diff -u gcc-4.6-4.6.2/debian/rules.parameters gcc-4.6-4.6.2/debian/rules.parameters --- gcc-4.6-4.6.2/debian/rules.parameters +++ gcc-4.6-4.6.2/debian/rules.parameters @@ -2,15 +2,15 @@ GCC_VERSION := 4.6.2 NEXT_GCC_VERSION := 4.6.3 BASE_VERSION := 4.6 -SOURCE_VERSION := 4.6.2-12ubuntu1 -DEB_VERSION := 4.6.2-12ubuntu1 -DEB_EVERSION := 1:4.6.2-12ubuntu1 +SOURCE_VERSION := 4.6.2-14ubuntu1 +DEB_VERSION := 4.6.2-14ubuntu1 +DEB_EVERSION := 1:4.6.2-14ubuntu1 GDC_BASE_VERSION := DEB_GDC_VERSION := DEB_SOVERSION := 4.6 DEB_SOEVERSION := 1:4.6 DEB_LIBGCC_SOVERSION := 1:4.6 -DEB_LIBGCC_VERSION := 1:4.6.2-12ubuntu1 +DEB_LIBGCC_VERSION := 1:4.6.2-14ubuntu1 DEB_STDCXX_SOVERSION := 4.6 DEB_GCJ_SOVERSION := 4.6 PKG_GCJ_EXT := 12 diff -u gcc-4.6-4.6.2/debian/control.m4 gcc-4.6-4.6.2/debian/control.m4 --- gcc-4.6-4.6.2/debian/control.m4 +++ gcc-4.6-4.6.2/debian/control.m4 @@ -107,7 +107,7 @@ Priority: PRI(required) Depends: ${misc:Depends} Replaces: ${base:Replaces} -Breaks: gcj-4.6-base (<< 4.6.1-3ubuntu3), gnat-4.6 (<< 4.6.1-4ubuntu3) +Breaks: gcj-4.6-base (<< 4.6.1-4~), gnat-4.6 (<< 4.6.1-5~), dehydra (<= 0.9.hg20110609-2) Description: GCC, the GNU Compiler Collection (base package) This package contains files common to all languages and libraries contained in the GNU Compiler Collection (GCC). @@ -187,8 +187,8 @@ Section: debug Priority: extra Depends: BASEDEP, libgcc1`'LS (= ${gcc:EpochVersion}), ${misc:Depends} -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same')) -ifdef(`TARGET',`',`Provides: libgcc1-dbg-armel [armel], libgcc1-dbg-armhf [armhf]') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same')) +ifdef(`TARGET',`dnl',`Provides: libgcc1-dbg-armel [armel], libgcc1-dbg-armhf [armhf]') Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') Debug symbols for the GCC support library. ifdef(`TARGET', `dnl @@ -650,7 +650,7 @@ ifenabled(`libmudf',` Package: libmudflap`'MF_SO`'LS Architecture: ifdef(`TARGET',`all',`any') -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support ')`Provides: libmudflap'MF_SO`-armel [armel], libmudflap'MF_SO`-armhf [armhf]') Section: ifdef(`TARGET',`devel',`libs') @@ -662,7 +662,7 @@ Package: libmudflap`'MF_SO-dbg`'LS Architecture: ifdef(`TARGET',`all',`any') -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same ')`Provides: libmudflap'MF_SO`-dbg-armel [armel], libmudflap'MF_SO`-dbg-armhf [armhf]') Section: debug Priority: extra @@ -863,7 +863,7 @@ Package: libgomp`'GOMP_SO`'LS Section: ifdef(`TARGET',`devel',`libs') Architecture: ifdef(`TARGET',`all',`any') -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support ')`Provides: libgomp'GOMP_SO`-armel [armel], libgomp'GOMP_SO`-armhf [armhf]') Priority: ifdef(`TARGET',`extra',`PRI(optional)') @@ -877,7 +877,7 @@ Section: debug Priority: extra Depends: BASEDEP, libgomp`'GOMP_SO`'LS (= ${gcc:Version}), ${misc:Depends} -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same ')`Provides: libgomp'GOMP_SO`-dbg-armel [armel], libgomp'GOMP_SO`-dbg-armhf [armhf]') Description: GCC OpenMP (GOMP) support library (debug symbols) GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers @@ -998,7 +998,7 @@ Package: libquadmath`'QMATH_SO`'LS Section: ifdef(`TARGET',`devel',`libs') Architecture: ifdef(`TARGET',`all',`any') -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support '))`'dnl Priority: ifdef(`TARGET',`extra',`PRI(optional)') @@ -1013,7 +1013,7 @@ Section: debug Priority: extra Depends: BASEDEP, libquadmath`'QMATH_SO`'LS (= ${gcc:Version}), ${misc:Depends} -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same '))`'dnl Description: GCC Quad-Precision Math Library (debug symbols) A library, which provides quad-precision mathematical functions on targets @@ -1182,7 +1182,7 @@ Package: libobjc`'OBJC_SO`'LS Section: ifdef(`TARGET',`devel',`libs') Architecture: ifdef(`TARGET',`all',`any') -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support ')`Provides: libobjc'OBJC_SO`-armel [armel], libobjc'OBJC_SO`-armhf [armhf]') Priority: ifdef(`TARGET',`extra',`PRI(optional)') @@ -1193,7 +1193,7 @@ Package: libobjc`'OBJC_SO-dbg`'LS Section: debug Architecture: ifdef(`TARGET',`all',`any') -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same ')`Provides: libobjc'OBJC_SO`-dbg-armel [armel], libobjc'OBJC_SO`-dbg-armhf [armhf]') Priority: extra Depends: BASEDEP, libobjc`'OBJC_SO`'LS (= ${gcc:Version}), libgcc`'GCC_SO-dbg`'LS, ${misc:Depends} @@ -1353,7 +1353,7 @@ Package: libgfortran`'FORTRAN_SO`'LS Section: ifdef(`TARGET',`devel',`libs') Architecture: ifdef(`TARGET',`all',`any') -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support ')`Provides: libgfortran'FORTRAN_SO`-armel [armel], libgfortran'FORTRAN_SO`-armhf [armhf]') Priority: ifdef(`TARGET',`extra',PRI(optional)) @@ -1365,7 +1365,7 @@ Package: libgfortran`'FORTRAN_SO-dbg`'LS Section: debug Architecture: ifdef(`TARGET',`all',`any') -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same ')`Provides: libgfortran'FORTRAN_SO`-dbg-armel [armel], libgfortran'FORTRAN_SO`-dbg-armhf [armhf]') Priority: extra Depends: BASEDEP, libgfortran`'FORTRAN_SO`'LS (= ${gcc:Version}), ${misc:Depends} @@ -1539,7 +1539,7 @@ Package: libgo`'GO_SO`'LS Section: ifdef(`TARGET',`devel',`libs') Architecture: ifdef(`TARGET',`all',`any') -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support ')`Provides: libgo'GO_SO`-armel [armel], libgo'GO_SO`-armhf [armhf]') Priority: ifdef(`TARGET',`extra',PRI(optional)) @@ -1551,7 +1551,7 @@ Package: libgo`'GO_SO-dbg`'LS Section: debug Architecture: ifdef(`TARGET',`all',`any') -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same ')`Provides: libgo'GO_SO`-dbg-armel [armel], libgo'GO_SO`-dbg-armhf [armhf]') Priority: extra Depends: BASEDEP, libgo`'GO_SO`'LS (= ${gcc:Version}), ${misc:Depends} @@ -1828,8 +1828,8 @@ Section: ifdef(`TARGET',`devel',`libs') Priority: ifdef(`TARGET',`extra',PRI(required)) Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} -ifdef(`TARGET',`Provides: libstdc++CXX_SO-TARGET-dcv1 -',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`Provides: libstdc++CXX_SO-TARGET-dcv1', +ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support ')`Provides: libstdc++'CXX_SO`-armel [armel], libstdc++'CXX_SO`-armhf [armhf]') Conflicts: scim (<< 1.4.2-1) @@ -1980,9 +1980,7 @@ Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev, libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev, libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev Suggests: libstdc++CXX_SO`'PV-doc ')`'dnl native -Provides: libstdc++-dev`'LS -ifdef(`TARGET',`, libstdc++-dev-TARGET-dcv1, libstdc++CXX_SO-dev-TARGET-dcv1 -')`'dnl +Provides: libstdc++-dev`'LS`'ifdef(`TARGET',`, libstdc++-dev-TARGET-dcv1, libstdc++CXX_SO-dev-TARGET-dcv1') Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET)',` (TARGET)', `') This package contains the headers and static library files necessary for building C++ programs which use libstdc++. @@ -2019,9 +2017,10 @@ Section: debug Priority: extra Depends: BASEDEP, libstdc++CXX_SO`'LS (>= ${gcc:Version}), libgcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} -ifdef(`TARGET',`Provides: libstdc++CXX_SO-dbg-TARGET-dcv1 -',ifdef(`MULTIARCH', `Multi-Arch: same -')`Provides: libstdc++'CXX_SO`'PV`-dbg-armel [armel], libstdc++'CXX_SO`'PV`-dbg-armhf [armhf]') +ifdef(`TARGET',`Provides: libstdc++CXX_SO-dbg-TARGET-dcv1',`dnl +ifdef(`MULTIARCH', `Multi-Arch: same',`dnl') +Provides: libstdc++'CXX_SO`'PV`-dbg-armel [armel], libstdc++'CXX_SO`'PV`-dbg-armhf [armhf]dnl +') Recommends: libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}) Conflicts: libstdc++5-dbg`'LS, libstdc++5-3.3-dbg`'LS, libstdc++6-dbg`'LS, libstdc++6-4.0-dbg`'LS, libstdc++6-4.1-dbg`'LS, libstdc++6-4.2-dbg`'LS, libstdc++6-4.3-dbg`'LS, libstdc++6-4.4-dbg`'LS, libstdc++6-4.5-dbg`'LS Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') @@ -2175,7 +2174,7 @@ Package: libgnat`'-GNAT_V Section: libs Architecture: any -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support '))`'dnl Priority: PRI(optional) @@ -2192,7 +2191,7 @@ Package: libgnat`'-GNAT_V-dbg Section: debug Architecture: any -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support '))`'dnl Priority: extra @@ -2225,7 +2224,7 @@ Package: libgnatvsn`'GNAT_V Architecture: any -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support '))`'dnl Priority: PRI(optional) @@ -2243,7 +2242,7 @@ Package: libgnatvsn`'GNAT_V-dbg Architecture: any -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support '))`'dnl Priority: extra @@ -2282,7 +2281,7 @@ Package: libgnatprj`'GNAT_V Architecture: any -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support '))`'dnl Priority: PRI(optional) @@ -2303,7 +2302,7 @@ Package: libgnatprj`'GNAT_V-dbg Architecture: any -ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same Pre-Depends: multiarch-support '))`'dnl Priority: extra diff -u gcc-4.6-4.6.2/debian/control gcc-4.6-4.6.2/debian/control --- gcc-4.6-4.6.2/debian/control +++ gcc-4.6-4.6.2/debian/control @@ -18,7 +18,7 @@ Priority: required Depends: ${misc:Depends} Replaces: ${base:Replaces} -Breaks: gcj-4.6-base (<< 4.6.1-3ubuntu3), gnat-4.6 (<< 4.6.1-4ubuntu3) +Breaks: gcj-4.6-base (<< 4.6.1-4~), gnat-4.6 (<< 4.6.1-5~), dehydra (<= 0.9.hg20110609-2) Description: GCC, the GNU Compiler Collection (base package) This package contains files common to all languages and libraries contained in the GNU Compiler Collection (GCC). @@ -1181,8 +1181,7 @@ Depends: gcc-4.6-base (= ${gcc:Version}), g++-4.6 (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), ${dep:libcdev}, ${misc:Depends} Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev, libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev, libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev Suggests: libstdc++6-4.6-doc -Provides: libstdc++-dev -Description: GNU Standard C++ Library v3 (development files) +Provides: libstdc++-devDescription: GNU Standard C++ Library v3 (development files) This package contains the headers and static library files necessary for building C++ programs which use libstdc++. . diff -u gcc-4.6-4.6.2/debian/rules.defs gcc-4.6-4.6.2/debian/rules.defs --- gcc-4.6-4.6.2/debian/rules.defs +++ gcc-4.6-4.6.2/debian/rules.defs @@ -125,7 +125,7 @@ DEB_CROSS = yes else # first ones are squeeze+1 and maverick - ifeq (,$(filter $(distrelease),lenny etch squeeze sid dapper hardy jaunty karmic lucid)) + ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid)) with_sysroot = / endif endif @@ -850,8 +850,7 @@ # libssp ------------------ ifeq ($(with_ssp)-$(with_common_libs),yes-yes) #ifneq ($(DEB_CROSS),yes) - with_libssp := $(if $(wildcard $(builddir)/gcc/auto-host.h), \ - $(shell if grep -qs '^\#define TARGET_LIBC_PROVIDES_SSP 1' $(builddir)/gcc/auto-host.h; then echo 'libc provides ssp'; else echo 'yes'; fi)) + with_libssp := $(if $(wildcard $(builddir)/gcc/auto-host.h),$(shell if grep -qs '^\#define TARGET_LIBC_PROVIDES_SSP 1' $(builddir)/gcc/auto-host.h; then echo 'libc provides ssp'; else echo 'yes'; fi)) #endif endif diff -u gcc-4.6-4.6.2/debian/changelog gcc-4.6-4.6.2/debian/changelog --- gcc-4.6-4.6.2/debian/changelog +++ gcc-4.6-4.6.2/debian/changelog @@ -1,3 +1,40 @@ +gcc-4.6 (4.6.2-14ubuntu1) precise; urgency=low + + * Merge with Debian. + + -- Matthias Klose Fri, 10 Feb 2012 19:34:24 +0100 + +gcc-4.6 (4.6.2-14) unstable; urgency=low + + * Update to SVN 20120210 (r184105) from the gcc-4_6-branch. + - Fix PR rtl-optimization/52139, PR rtl-optimization/52060, + PR middle-end/52074, PR target/52129, PR middle-end/48071, + PR target/52006, PR libmudflap/40778, PR rtl-optimization/51767, + PR middle-end/51768, PR middle-end/44777, PR debug/51695, PR c/51360, + PR debug/51517, PR middle-end/52140, PR target/51106, PR c++/51669, + PR driver/48306, PR tree-optimization/49536. + * Fix libstdc++-dev control file for cross builds. + + -- Matthias Klose Fri, 10 Feb 2012 19:11:07 +0100 + +gcc-4.6 (4.6.2-13) unstable; urgency=low + + * Update to SVN 20120208 (r184026) from the gcc-4_6-branch. + - Fix PR middle-end/51994, PR target/40068, PR target/52107, + PR tree-optimization/51118, PR rtl-optimization/51374, PR target/51835, + PR target/50313, PR middle-end/45678, PR ada/46192, PR fortran/52151, + PR fortran/52093, PR fortran/52012, PR fortran/52022, PR fortran/51966, + PR fortran/51948, PR fortran/51913, PR libstdc++/51795, PR libjava/48512. + + * Install libstdc++ -gdb.py file into /usr/lib/debug. + Closes: #652160, #653446. + * Configure --with-system-root, remove trailing slash from system root. + * Strip whitespace from with_libssp definition. Closes: #653255. + * Fix control file generation for cross packages. LP: #913734. + * Update the Linaro support to the 4.6-2012.01-1 release. + + -- Matthias Klose Thu, 09 Feb 2012 01:06:15 +0100 + gcc-4.6 (4.6.2-12ubuntu1) precise; urgency=low * Merge with Debian. diff -u gcc-4.6-4.6.2/debian/patches/gcc-powerpc-nof.diff gcc-4.6-4.6.2/debian/patches/gcc-powerpc-nof.diff --- gcc-4.6-4.6.2/debian/patches/gcc-powerpc-nof.diff +++ gcc-4.6-4.6.2/debian/patches/gcc-powerpc-nof.diff @@ -1,9 +1,7 @@ # DP: Don't build nof multlib on powerpc. -Index: gcc-4.6-4.6.1/src/gcc/config/rs6000/t-linux64 -=================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/rs6000/t-linux64 2011-08-20 16:05:05.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/rs6000/t-linux64 2011-08-20 16:08:08.900172593 +0000 +--- a/src/gcc/config/rs6000/t-linux64 ++++ b/src/gcc/config/rs6000/t-linux64 @@ -31,13 +31,10 @@ # it doesn't tell anything about the 32bit libraries on those systems. Set # MULTILIB_OSDIRNAMES according to what is found on the target. diff -u gcc-4.6-4.6.2/debian/patches/libjava-disable-static.diff gcc-4.6-4.6.2/debian/patches/libjava-disable-static.diff --- gcc-4.6-4.6.2/debian/patches/libjava-disable-static.diff +++ gcc-4.6-4.6.2/debian/patches/libjava-disable-static.diff @@ -6,7 +6,7 @@ --- a/src/Makefile.in +++ b/src/Makefile.in -@@ -54431,7 +54431,7 @@ +@@ -53956,7 +53956,7 @@ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ @@ -15,7 +15,7 @@ || exit 1 @endif target-libjava -@@ -55345,7 +55345,7 @@ +@@ -54870,7 +54870,7 @@ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ diff -u gcc-4.6-4.6.2/debian/patches/libffi-powerpc-sysv-without-string-ops.diff gcc-4.6-4.6.2/debian/patches/libffi-powerpc-sysv-without-string-ops.diff --- gcc-4.6-4.6.2/debian/patches/libffi-powerpc-sysv-without-string-ops.diff +++ gcc-4.6-4.6.2/debian/patches/libffi-powerpc-sysv-without-string-ops.diff @@ -1,6 +1,6 @@ --- a/src/libffi/src/powerpc/ffi.c +++ b/src/libffi/src/powerpc/ffi.c -@@ -46,11 +46,6 @@ +@@ -45,11 +45,6 @@ FLAG_RETURNS_64BITS = 1 << (31-28), FLAG_RETURNS_128BITS = 1 << (31-27), /* cr6 */ @@ -12,7 +12,7 @@ FLAG_ARG_NEEDS_COPY = 1 << (31- 7), #ifndef __NO_FPRS__ -@@ -688,37 +683,22 @@ +@@ -687,37 +682,22 @@ break; case FFI_TYPE_STRUCT: @@ -65,7 +65,7 @@ case FFI_TYPE_VOID: flags |= FLAG_RETURNS_NOTHING; break; -@@ -932,21 +912,30 @@ +@@ -931,21 +911,30 @@ void ffi_call(ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue) { @@ -106,7 +106,7 @@ switch (cif->abi) { -@@ -968,6 +957,10 @@ +@@ -967,6 +956,10 @@ FFI_ASSERT (0); break; } diff -u gcc-4.6-4.6.2/debian/patches/pr49696.diff gcc-4.6-4.6.2/debian/patches/pr49696.diff --- gcc-4.6-4.6.2/debian/patches/pr49696.diff +++ gcc-4.6-4.6.2/debian/patches/pr49696.diff @@ -5,10 +5,8 @@ (sync_old__12, sync_new__12, sync_nand_12): Likewise. (sync_old_nand_12, sync_new_nand_12, test_and_set_12): Likewise. -Index: gcc/config/mips/sync.md -=================================================================== ---- a/src/gcc/config/mips/sync.md (revision 179430) -+++ b/src/gcc/config/mips/sync.md (revision 179431) +--- a/src/gcc/config/mips/sync.md ++++ b/src/gcc/config/mips/sync.md @@ -136,7 +136,7 @@ [(match_operand:SI 1 "register_operand" "d") (match_operand:SI 2 "register_operand" "d") diff -u gcc-4.6-4.6.2/debian/patches/gcc-base-version.diff gcc-4.6-4.6.2/debian/patches/gcc-base-version.diff --- gcc-4.6-4.6.2/debian/patches/gcc-base-version.diff +++ gcc-4.6-4.6.2/debian/patches/gcc-base-version.diff @@ -5,13 +5,13 @@ @@ -1 +1 @@ -4.6.2 +4.6 ---- a/src/gcc/FULL-VER +--- /dev/null +++ b/src/gcc/FULL-VER @@ -0,0 +1 @@ +4.6.2 --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in -@@ -834,11 +834,13 @@ +@@ -832,11 +832,13 @@ TM_H = $(GTM_H) insn-flags.h $(OPTIONS_H) # Variables for version information. @@ -26,7 +26,7 @@ BASEVER_c := $(shell cat $(BASEVER)) DEVPHASE_c := $(shell cat $(DEVPHASE)) DATESTAMP_c := $(shell cat $(DATESTAMP)) -@@ -857,7 +859,7 @@ +@@ -855,7 +857,7 @@ # development phase collapsed to the empty string in release mode # (i.e. if DEVPHASE_c is empty). The space immediately after the # comma in the $(if ...) constructs is significant - do not remove it. @@ -35,7 +35,7 @@ DEVPHASE_s := "\"$(if $(DEVPHASE_c), ($(DEVPHASE_c)))\"" DATESTAMP_s := "\"$(if $(DEVPHASE_c), $(DATESTAMP_c))\"" PKGVERSION_s:= "\"@PKGVERSION@\"" -@@ -2187,9 +2189,9 @@ +@@ -2184,9 +2186,9 @@ $(MACHMODE_H) prefix.o: prefix.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) prefix.h \ @@ -47,7 +47,7 @@ -c $(srcdir)/prefix.c $(OUTPUT_OPTION) # Language-independent files. -@@ -2260,9 +2262,9 @@ +@@ -2257,9 +2259,9 @@ dumpvers: dumpvers.c @@ -59,7 +59,7 @@ -DREVISION=$(REVISION_s) \ -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ -DBUGURL=$(BUGURL_s) -c $(srcdir)/version.c $(OUTPUT_OPTION) -@@ -2801,10 +2803,10 @@ +@@ -2798,10 +2800,10 @@ tree-ssa-alias.h $(TREE_FLOW_H) bversion.h: s-bversion; @true @@ -74,7 +74,7 @@ echo "#define BUILDING_GCC_VERSION (BUILDING_GCC_MAJOR * 1000 + BUILDING_GCC_MINOR)" >> bversion.h $(STAMP) s-bversion -@@ -3805,9 +3807,9 @@ +@@ -3802,9 +3804,9 @@ ## build/version.o is compiled by the $(COMPILER_FOR_BUILD) but needs ## several C macro definitions, just like version.o build/version.o: version.c version.h \ @@ -86,7 +86,7 @@ -DREVISION=$(REVISION_s) \ -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ -DBUGURL=$(BUGURL_s) -o $@ $< -@@ -3968,7 +3970,7 @@ +@@ -3965,7 +3967,7 @@ cppbuiltin.o: cppbuiltin.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ cppbuiltin.h Makefile $(COMPILER) $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) \ @@ -95,7 +95,7 @@ -c $(srcdir)/cppbuiltin.c $(OUTPUT_OPTION) cppdefault.o: cppdefault.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ -@@ -3989,8 +3991,8 @@ +@@ -3986,8 +3988,8 @@ build/gcov-iov.o -o $@ gcov-iov.h: s-iov @@ -106,7 +106,7 @@ > tmp-gcov-iov.h $(SHELL) $(srcdir)/../move-if-change tmp-gcov-iov.h gcov-iov.h $(STAMP) s-iov -@@ -4214,8 +4216,8 @@ +@@ -4211,8 +4213,8 @@ TEXI_CPPINT_FILES = cppinternals.texi gcc-common.texi gcc-vers.texi # gcc-vers.texi is generated from the version files. @@ -117,7 +117,7 @@ if [ "$(DEVPHASE_c)" = "experimental" ]; \ then echo "@set DEVELOPMENT"; \ else echo "@clear DEVELOPMENT"; \ -@@ -4582,9 +4584,11 @@ +@@ -4579,9 +4581,11 @@ install-driver: installdirs xgcc$(exeext) -rm -f $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) -$(INSTALL_PROGRAM) xgcc$(exeext) $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) diff -u gcc-4.6-4.6.2/debian/patches/pr50193.diff gcc-4.6-4.6.2/debian/patches/pr50193.diff --- gcc-4.6-4.6.2/debian/patches/pr50193.diff +++ gcc-4.6-4.6.2/debian/patches/pr50193.diff @@ -17,9 +17,9 @@ === modified file 'gcc/config/arm/predicates.md' ---- a/src/gcc/config/arm/predicates.md 2011-10-03 09:47:33 +0000 -+++ b/src/gcc/config/arm/predicates.md 2011-10-10 11:43:28 +0000 -@@ -219,13 +220,20 @@ +--- a/src/gcc/config/arm/predicates.md ++++ b/src/gcc/config/arm/predicates.md +@@ -218,13 +218,20 @@ (match_test "mode == GET_MODE (op)"))) ;; True for shift operators. @@ -41,10 +41,8 @@ (match_test "mode == GET_MODE (op)"))) ;; True for MULT, to identify which variant of shift_operator is in use. - -=== added file 'gcc/testsuite/gcc.target/arm/shiftable.c' ---- a/src/gcc/testsuite/gcc.target/arm/shiftable.c 1970-01-01 00:00:00 +0000 -+++ b/src/gcc/testsuite/gcc.target/arm/shiftable.c 2011-10-10 11:43:28 +0000 +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/arm/shiftable.c @@ -0,0 +1,63 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ @@ -112 +109,0 @@ - diff -u gcc-4.6-4.6.2/debian/patches/pr49940.diff gcc-4.6-4.6.2/debian/patches/pr49940.diff --- gcc-4.6-4.6.2/debian/patches/pr49940.diff +++ gcc-4.6-4.6.2/debian/patches/pr49940.diff @@ -3,11 +3,9 @@ # This patch consists in copying the declaration (and import) of lwp_self from # s-osint-freebsd.ads to s-osint-kfreebsd-gnu.ads. -Index: b/src/gcc/ada/s-osinte-kfreebsd-gnu.ads -=================================================================== --- a/src/gcc/ada/s-osinte-kfreebsd-gnu.ads +++ b/src/gcc/ada/s-osinte-kfreebsd-gnu.ads -@@ -238,6 +254,16 @@ +@@ -238,6 +238,16 @@ function getpid return pid_t; pragma Import (C, getpid, "getpid"); diff -u gcc-4.6-4.6.2/debian/patches/mudflap-varargs.diff gcc-4.6-4.6.2/debian/patches/mudflap-varargs.diff --- gcc-4.6-4.6.2/debian/patches/mudflap-varargs.diff +++ gcc-4.6-4.6.2/debian/patches/mudflap-varargs.diff @@ -6,11 +6,9 @@ * builtins.c (build_va_arg_indirect_ref): Use build_simple_mem_ref_loc. -Index: builtins.c -=================================================================== ---- a/src/gcc/builtins.c (revision 171675) -+++ b/src/gcc/builtins.c (working copy) -@@ -4748,7 +4748,7 @@ std_gimplify_va_arg_expr (tree valist, t +--- a/src/gcc/builtins.c ++++ b/src/gcc/builtins.c +@@ -4772,7 +4772,7 @@ tree build_va_arg_indirect_ref (tree addr) { diff -u gcc-4.6-4.6.2/debian/patches/gcc-textdomain.diff gcc-4.6-4.6.2/debian/patches/gcc-textdomain.diff --- gcc-4.6-4.6.2/debian/patches/gcc-textdomain.diff +++ gcc-4.6-4.6.2/debian/patches/gcc-textdomain.diff @@ -15,7 +15,7 @@ open_quote = _("`"); --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in -@@ -5216,8 +5216,8 @@ +@@ -5157,8 +5157,8 @@ dir=$(localedir)/$$lang/LC_MESSAGES; \ echo $(mkinstalldirs) $(DESTDIR)$$dir; \ $(mkinstalldirs) $(DESTDIR)$$dir || exit 1; \ diff -u gcc-4.6-4.6.2/debian/patches/sparc-force-cpu.diff gcc-4.6-4.6.2/debian/patches/sparc-force-cpu.diff --- gcc-4.6-4.6.2/debian/patches/sparc-force-cpu.diff +++ gcc-4.6-4.6.2/debian/patches/sparc-force-cpu.diff @@ -2,7 +2,7 @@ --- a/src/gcc/config.gcc +++ b/src/gcc/config.gcc -@@ -3736,6 +3736,13 @@ +@@ -3766,6 +3766,13 @@ ;; esac diff -u gcc-4.6-4.6.2/debian/patches/alpha-no-ev4-directive.diff gcc-4.6-4.6.2/debian/patches/alpha-no-ev4-directive.diff --- gcc-4.6-4.6.2/debian/patches/alpha-no-ev4-directive.diff +++ gcc-4.6-4.6.2/debian/patches/alpha-no-ev4-directive.diff @@ -6,7 +6,7 @@ --- a/src/gcc/config/alpha/alpha.c +++ b/src/gcc/config/alpha/alpha.c -@@ -9740,7 +9740,7 @@ +@@ -9733,7 +9733,7 @@ fputs ("\t.set nomacro\n", asm_out_file); if (TARGET_SUPPORT_ARCH | TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) { @@ -15,7 +15,7 @@ if (alpha_cpu == PROCESSOR_EV6 || TARGET_FIX || TARGET_CIX) arch = "ev6"; -@@ -9750,10 +9750,9 @@ +@@ -9743,10 +9743,9 @@ arch = "ev56"; else if (alpha_cpu == PROCESSOR_EV5) arch = "ev5"; diff -u gcc-4.6-4.6.2/debian/patches/s390-biarch.diff gcc-4.6-4.6.2/debian/patches/s390-biarch.diff --- gcc-4.6-4.6.2/debian/patches/s390-biarch.diff +++ gcc-4.6-4.6.2/debian/patches/s390-biarch.diff @@ -12,7 +12,7 @@ --- a/src/gcc/config.gcc +++ b/src/gcc/config.gcc -@@ -2289,6 +2289,9 @@ +@@ -2304,6 +2304,9 @@ ;; s390-*-linux*) tm_file="s390/s390.h dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h s390/linux.h" diff -u gcc-4.6-4.6.2/debian/patches/libstdc++-pic.diff gcc-4.6-4.6.2/debian/patches/libstdc++-pic.diff --- gcc-4.6-4.6.2/debian/patches/libstdc++-pic.diff +++ gcc-4.6-4.6.2/debian/patches/libstdc++-pic.diff @@ -7,7 +7,7 @@ --- a/src/libstdc++-v3/src/Makefile.am +++ b/src/libstdc++-v3/src/Makefile.am -@@ -422,6 +422,11 @@ +@@ -445,6 +445,11 @@ $(CXX) $(OPT_LDFLAGS) $(SECTION_LDFLAGS) $(AM_CXXFLAGS) $(LTLDFLAGS) -o $@ @@ -21,7 +21,7 @@ all-local: build_debug --- a/src/libstdc++-v3/src/Makefile.in +++ b/src/libstdc++-v3/src/Makefile.in -@@ -710,7 +710,7 @@ +@@ -725,7 +725,7 @@ install-dvi-am: @@ -30,7 +30,7 @@ install-html: install-html-am -@@ -759,7 +759,7 @@ +@@ -774,7 +774,7 @@ distclean-libtool distclean-tags dvi dvi-am html html-am info \ info-am install install-am install-data install-data-am \ install-data-local install-dvi install-dvi-am install-exec \ @@ -39,7 +39,7 @@ install-info-am install-man install-pdf install-pdf-am \ install-ps install-ps-am install-strip \ install-toolexeclibLTLIBRARIES installcheck installcheck-am \ -@@ -964,6 +964,11 @@ +@@ -989,6 +989,11 @@ @GLIBCXX_LDBL_COMPAT_TRUE@compatibility-ldbl.o: compatibility-ldbl.cc @GLIBCXX_LDBL_COMPAT_TRUE@ $(CXXCOMPILE) -mlong-double-64 -c $< diff -u gcc-4.6-4.6.2/debian/patches/libjava-multiarch.diff gcc-4.6-4.6.2/debian/patches/libjava-multiarch.diff --- gcc-4.6-4.6.2/debian/patches/libjava-multiarch.diff +++ gcc-4.6-4.6.2/debian/patches/libjava-multiarch.diff @@ -2,8 +2,8 @@ --- a/src/libjava/configure.ac +++ b/src/libjava/configure.ac -@@ -1592,6 +1592,10 @@ - ../lib*) toolexeclibdir='$(subst /lib/../lib,/lib,'$toolexecmainlibdir/$multi_os_directory')' ;; +@@ -1593,6 +1593,10 @@ + .) toolexeclibdir=$toolexecmainlibdir ;; # Avoid trailing /. *) toolexeclibdir=$toolexecmainlibdir/$multi_os_directory ;; esac + multiarch=`$CC -print-multiarch` @@ -26,7 +26,7 @@ --- a/src/libjava/Makefile.am +++ b/src/libjava/Makefile.am -@@ -372,7 +372,7 @@ +@@ -371,7 +371,7 @@ -DGCJ_VERSIONED_LIBDIR="\"$(dbexecdir)\"" \ -DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \ -DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \ @@ -37,7 +37,7 @@ AM_GCJFLAGS = \ --- a/src/libjava/Makefile.in +++ b/src/libjava/Makefile.in -@@ -1019,7 +1019,7 @@ +@@ -1018,7 +1018,7 @@ -DGCJ_VERSIONED_LIBDIR="\"$(dbexecdir)\"" \ -DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \ -DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \ diff -u gcc-4.6-4.6.2/debian/patches/gcc-linaro.diff gcc-4.6-4.6.2/debian/patches/gcc-linaro.diff --- gcc-4.6-4.6.2/debian/patches/gcc-linaro.diff +++ gcc-4.6-4.6.2/debian/patches/gcc-linaro.diff @@ -1,4 +1,4 @@ -# DP: Changes for the Linaro 4.6-2012.01 release. +# DP: Changes for the Linaro 4.6-2012.02 release. --- a/src/ChangeLog +++ b/src/ChangeLog @@ -28,7 +28,96 @@ * GCC 4.6.2 released. --- a/src/ChangeLog.linaro +++ b/src/ChangeLog.linaro -@@ -0,0 +1,3132 @@ +@@ -0,0 +1,3221 @@ ++2012-02-07 Andrew Stubbs ++ ++ GCC Linaro 4.6-2012.02 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-02-01 Andrew Stubbs ++ ++ Merge from FSF GCC 4.6.2 (svn branches/gcc-4_6-branch 183786). ++ ++2012-01-20 Ramana Radhakrishnan ++ ++ Backport from mainline ++ 2012-01-20 Ramana Radhakrishnan ++ ++ PR target/51819 ++ * config/arm/arm.c (arm_print_operand): Correct output of alignment ++ hints for neon loads and stores. ++ ++2012-01-16 Michael Hope ++ ++ Backport from mainline r181210: ++ ++ gcc/ ++ 2011-11-07 Matthew Gretton-Dann ++ ++ * config/arm/arm-cores.def: Add -mcpu=cortex-a7. ++ * config/arm/arm-tables.opt: Regenerate. ++ * config/arm/arm-tune.md: Likewise. ++ * config/arm/bpabi.h (BE8_LINK_SPEC): Add Cortex A-7. ++ * doc/invoke.texi: Document -mcpu=cortex-a7. ++ ++2012-01-16 Michael Hope ++ ++ Backport from mainline r182561: ++ ++ 2011-12-20 Richard Henderson ++ ++ gcc/ ++ * config/arm/arm.md (*arm_cmpdi_unsigned): Enable for thumb2. ++ * config/arm/arm.c (arm_select_cc_mode): Use it. ++ ++2012-01-16 Michael Hope ++ ++ Backport from mainline r183011: ++ ++ 2012-01-09 Matthew Gretton-Dann ++ ++ * config/arm/arm-cores.def (cortex-a15): Use cortex_a15_tune for ++ tuning parameters. ++ * config/arm/arm.c (arm_cortex_a15_tune): New static variable. ++ ++2012-01-18 Michael Hope ++ ++ Backport from mainline r183126: ++ ++ 2012-01-12 Ira Rosen ++ ++ gcc/ ++ PR tree-optimization/51799 ++ * tree-vect-patterns.c (vect_recog_over_widening_pattern): Check ++ that the last operation is a type demotion. ++ ++ gcc/testsuite/ ++ * gcc.dg/vect/pr51799.c: New test. ++ * gcc.dg/vect/vect-widen-shift-u8.c: Expect two widening shift ++ patterns. ++ ++2012-01-12 Ulrich Weigand ++ ++ LP 879725 ++ Backport from mainline: ++ ++ 2012-01-02 Revital Eres ++ ++ gcc/ ++ * ddg.c (def_has_ccmode_p): New function. ++ (add_cross_iteration_register_deps, ++ create_ddg_dep_from_intra_loop_link): Call it. ++ ++ gcc/testsuite/ ++ * gcc.dg/sms-11.c: New file. ++ ++2012-01-11 Andrew Stubbs ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ +2012-01-11 Andrew Stubbs + + GCC Linaro 4.6-2012.01 released. @@ -3318,7 +3407,179 @@ ;; --- a/src/gcc/ChangeLog +++ b/src/gcc/ChangeLog -@@ -1,3 +1,483 @@ +@@ -1,3 +1,648 @@ ++2012-01-31 Matthew Gretton-Dann ++ ++ Backport from mainline. ++ 2011-01-31 Matthew Gretton-Dann ++ ++ config/arm/thumb2.md (thumb2_mov_notscc): Use MVN for true ++ condition. ++ ++2012-01-31 Andreas Krebbel ++ ++ * config/s390/s390.md ("*ashr3_and"): Add missing z196 flag ++ to srak instruction. ++ ++2012-01-30 Bin Cheng ++ ++ Backport from mainline. ++ 2012-01-30 Bin Cheng ++ ++ PR target/51835 ++ * config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI ++ for __aeabi_d2iz/__aeabi_d2uiz with hard-float. ++ ++2012-01-30 Ramana Radhakrishnan ++ ++ Backport from mainline. ++ 2012-01-20 Ramana Radhakrishnan ++ ++ PR target/50313 ++ * config/arm/arm.c (arm_load_pic_register): Use ++ gen_pic_load_addr_unified. Delete calls to gen_pic_load_addr_32bit ++ , gen_pic_add_dot_plus_eight and gen_pic_add_dot_plus_four. ++ (arm_pic_static_addr): Likewise. ++ (arm_rtx_costs_1): Adjust cost for UNSPEC_PIC_UNIFIED. ++ (arm_note_pic_base): Handle UNSPEC_PIC_UNIFIED. ++ * config/arm/arm.md (UNSPEC_PIC_UNIFIED): Define. ++ (pic_load_addr_unified): New. ++ ++2012-01-25 Richard Guenther ++ ++ * tree-ssa-sccvn.c (vn_reference_eq): Also compare if both ++ bases are dereferenced. ++ ++2012-01-24 Richard Guenther ++ ++ Forward-port to branch ++ 2010-09-21 Jakub Jelinek ++ ++ PR middle-end/45678 ++ * expr.c (expand_expr_real_1) : If ++ op0 isn't sufficiently aligned and there is movmisalignM ++ insn for mode, use it to load op0 into a temporary register. ++ ++2012-01-20 Eric Botcazou ++ ++ * cfgrtl.c (rtl_dump_bb): Do not dump insns for {ENTRY|EXIT}_BLOCK. ++ ++2012-01-19 Quentin Neill ++ ++ PR target/48743 ++ * config/i386/driver-i386.c (host_detect_local_cpu): Also check ++ family to distinguish PROCESSOR_ATHLON. ++ ++2012-01-18 Bill Schmidt ++ ++ PR tree-optimization/49642 ++ * ipa-split.c (forbidden_dominators): New variable. ++ (check_forbidden_calls): New function. ++ (dominated_by_forbidden): Likewise. ++ (consider_split): Check for forbidden dominators. ++ (execute_split_functions): Initialize and free forbidden ++ dominators info; call check_forbidden_calls. ++ ++2012-01-18 David Edelsohn ++ ++ * config/rs6000/rs6000.md (call_value_indirect_aix32): Fix typo ++ in mode of operand[4]. ++ ++2012-01-15 Uros Bizjak ++ ++ PR rtl-optimization/51821 ++ * recog.c (peep2_find_free_register): Determine clobbered registers ++ from insn pattern. ++ ++2012-01-12 Georg-Johann Lay ++ ++ Backport from mainline r183129 ++ PR target/51756 ++ * config/avr/avr.c (avr_encode_section_info): Test for absence of ++ DECL_EXTERNAL when checking for initializers of progmem variables. ++ ++22012-01-12 Matthew Gretton-Dann ++ ++ Backport from mainline ++ 2012-01-11 Matthew Gretton-Dann ++ ++ * config/arm/arm.md (mov_notscc): Use MVN for false condition. ++ ++2012-01-12 Uros Bizjak ++ ++ * config/i386/i386.md (*zero_extendsidi2_rex64): Correct movl template. ++ (x86_shift_adj_1): Remove operand constraint from operand 3. ++ ++2012-01-10 Joseph Myers ++ ++ Revert: ++ ++ 2008-09-18 Andrew Pinski ++ ++ PR rtl-opt/37451 ++ * loop-doloop.c (doloop_modify): New argument zero_extend_p and ++ zero extend count after the correction to it is done. ++ (doloop_optimize): Update call to doloop_modify, don't zero extend ++ count before call. ++ ++ 2008-11-03 Andrew Pinski ++ ++ PR rtl-opt/37782 ++ * loop-doloop.c (doloop_modify): Add from_mode argument that says what ++ mode count is in. ++ (doloop_optimize): Update call to doloop_modify. ++ ++2012-01-09 Richard Sandiford ++ ++ * config/mips/mips.md (loadgp_newabi_): Add missing earlyclobber. ++ ++2012-01-09 Eric Botcazou ++ ++ * config/sparc/sol2-unwind.h (sparc64_is_sighandler): Check that the ++ purported sigacthandler address isn't null before dereferencing it. ++ (sparc_is_sighandler): Likewise. ++ ++2012-01-09 Ramana Radhakrishnan ++ ++ Backport from mainline ++ 2011-11-04 Jiangning Liu ++ ++ PR rtl-optimization/38644 ++ * config/arm/arm.c (thumb1_expand_epilogue): Add memory barrier ++ for epilogue having stack adjustment. ++ ++2012-01-09 Eric Botcazou ++ ++ PR ada/41929 ++ * config/sparc/sol2-unwind.h (sparc64_is_sighandler): Remove SAVPC and ++ add CFA. Revert back to old code for Solaris 8+ multi-threaded. ++ (sparc_is_sighandler): Likewise. ++ (MD_FALLBACK_FRAME_STATE_FOR): Adjust call to IS_SIGHANDLER. ++ ++2012-01-06 Eric Botcazou ++ ++ Backport from mainline ++ 2012-01-06 Arnaud Charlet ++ ++ * c-decl.c (ext_block): Moved up. ++ (collect_all_refs, for_each_global_decl): Take ext_block into account. ++ ++2012-01-06 Richard Sandiford ++ ++ PR middle-end/48660 ++ * expr.h (copy_blkmode_to_reg): Declare. ++ * expr.c (copy_blkmode_to_reg): New function. ++ (expand_assignment): Don't expand register RESULT_DECLs before ++ the lhs. Use copy_blkmode_to_reg to copy BLKmode values into a ++ RESULT_DECL register. ++ (expand_expr_real_1): Handle BLKmode decls when looking for promotion. ++ ++2012-01-05 Eric Botcazou ++ ++ PR tree-optimization/51315 ++ * tree-sra.c (tree_non_aligned_mem_for_access_p): New predicate. ++ (build_accesses_from_assign): Use it instead of tree_non_aligned_mem_p. ++ +2012-01-04 Eric Botcazou + + PR tree-optimization/51624 @@ -3330,8 +3591,7 @@ + PR tree-optimization/49651 + * tree-ssa-structalias.c (type_can_have_subvars): New function. + (var_can_have_subvars): Use it. -+ (get_constraint_for_1): Only consider subfields if there -+ can be any. ++ (get_constraint_for_1): Only consider subfields if there can be any. + +2012-01-03 Sandra Loosemore + @@ -3372,8 +3632,7 @@ + + PR target/51623 + * config/rs6000/rs6000.c (rs6000_assemble_integer): Don't call -+ unlikely_text_section_p. Instead check for being in a code -+ section. ++ unlikely_text_section_p. Instead check for being in a code section. + +2011-12-23 Richard Guenther + @@ -3794,15 +4053,10 @@ + * config/i386/sse.md (*avx_unpcklpd256): Remove extra insn + constraints. Change alternative 1 to "x,m,1". + -+2011-10-26 Jakub Jelinek -+ -+ * BASE-VER: Set to 4.6.3. -+ * DEV-PHASE: Set to prerelease. -+ 2011-10-26 Release Manager * GCC 4.6.2 released. -@@ -144,8 +624,8 @@ +@@ -144,8 +794,8 @@ 2011-10-07 Bernd Schmidt @@ -3813,7 +4067,7 @@ 2011-10-06 Jakub Jelinek -@@ -252,7 +732,7 @@ +@@ -252,7 +902,7 @@ * config/rs6000/rs6000.md (probe_stack): Use explicit operand. * config/rs6000/rs6000.c (output_probe_stack_range): Likewise. @@ -3826,11 +4080,11 @@ +++ b/src/gcc/DATESTAMP @@ -1 +1 @@ -20111026 -+20120105 ++20120201 --- a/src/gcc/LINARO-VERSION +++ b/src/gcc/LINARO-VERSION @@ -0,0 +1 @@ -+4.6-2012.01 ++4.6-2012.02 --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in @@ -888,6 +888,8 @@ @@ -3880,7 +4134,17 @@ $(TREE_FLOW_H) value-prof.h $(FLAGS_H) $(DEMANGLE_H) \ --- a/src/gcc/ada/ChangeLog +++ b/src/gcc/ada/ChangeLog -@@ -1,3 +1,46 @@ +@@ -1,3 +1,56 @@ ++2012-01-21 Eric Botcazou ++ ++ PR ada/46192 ++ * gcc-interface/decl.c (gnat_to_gnu_entity) : In the case of a ++ renaming, preserve the volatileness through the indirection, if any. ++ ++2012-01-09 Eric Botcazou ++ ++ * gcc-interface/trans.c (addressable_p) : Fix thinko. ++ +2012-01-02 Eric Botcazou + + * gnatvsn.ads (Current_Year): Bump to 2011. @@ -4072,6 +4336,41 @@ align = align_cap; else align = ceil_alignment (tree_low_cst (TYPE_SIZE (gnu_type), 1)); +@@ -1009,6 +1023,14 @@ + entity is always accessed indirectly through it. */ + else + { ++ /* We need to preserve the volatileness of the renamed ++ object through the indirection. */ ++ if (TREE_THIS_VOLATILE (gnu_expr) ++ && !TYPE_VOLATILE (gnu_type)) ++ gnu_type ++ = build_qualified_type (gnu_type, ++ (TYPE_QUALS (gnu_type) ++ | TYPE_QUAL_VOLATILE)); + gnu_type = build_reference_type (gnu_type); + inner_const_flag = TREE_READONLY (gnu_expr); + const_flag = true; +--- a/src/gcc/ada/gcc-interface/trans.c ++++ b/src/gcc/ada/gcc-interface/trans.c +@@ -6,7 +6,7 @@ + * * + * C Implementation File * + * * +- * Copyright (C) 1992-2011, Free Software Foundation, Inc. * ++ * Copyright (C) 1992-2012, Free Software Foundation, Inc. * + * * + * GNAT is free software; you can redistribute it and/or modify it under * + * terms of the GNU General Public License as published by the Free Soft- * +@@ -7409,7 +7409,7 @@ + || DECL_ALIGN (TREE_OPERAND (gnu_expr, 1)) + >= TYPE_ALIGN (TREE_TYPE (gnu_expr)))) + /* The field of a padding record is always addressable. */ +- || TYPE_PADDING_P (TREE_TYPE (TREE_OPERAND (gnu_expr, 0)))) ++ || TYPE_IS_PADDING_P (TREE_TYPE (TREE_OPERAND (gnu_expr, 0)))) + && addressable_p (TREE_OPERAND (gnu_expr, 0), NULL_TREE)); + + case ARRAY_REF: case ARRAY_RANGE_REF: --- a/src/gcc/ada/gnatvsn.ads +++ b/src/gcc/ada/gnatvsn.ads @@ -6,7 +6,7 @@ @@ -4234,6 +4533,39 @@ } if (TREE_CODE (decl) == VAR_DECL) +@@ -9782,6 +9782,9 @@ + collect_source_ref (LOCATION_FILE (decl_sloc (decl, false))); + } + ++/* Preserve the external declarations scope across a garbage collect. */ ++static GTY(()) tree ext_block; ++ + /* Collect all references relevant to SOURCE_FILE. */ + + static void +@@ -9792,6 +9795,8 @@ + + FOR_EACH_VEC_ELT (tree, all_translation_units, i, t) + collect_ada_nodes (BLOCK_VARS (DECL_INITIAL (t)), source_file); ++ ++ collect_ada_nodes (BLOCK_VARS (ext_block), source_file); + } + + /* Iterate over all global declarations and call CALLBACK. */ +@@ -9810,10 +9815,10 @@ + for (decl = BLOCK_VARS (decls); decl; decl = TREE_CHAIN (decl)) + callback (decl); + } +-} + +-/* Preserve the external declarations scope across a garbage collect. */ +-static GTY(()) tree ext_block; ++ for (decl = BLOCK_VARS (ext_block); decl; decl = TREE_CHAIN (decl)) ++ callback (decl); ++} + + void + c_write_global_declarations (void) --- a/src/gcc/c-family/ChangeLog +++ b/src/gcc/c-family/ChangeLog @@ -1,3 +1,15 @@ @@ -4685,6 +5017,22 @@ return NULL; /* Misc codes. */ +--- a/src/gcc/cfgrtl.c ++++ b/src/gcc/cfgrtl.c +@@ -1642,9 +1642,10 @@ + putc ('\n', outf); + } + +- for (insn = BB_HEAD (bb), last = NEXT_INSN (BB_END (bb)); insn != last; +- insn = NEXT_INSN (insn)) +- print_rtl_single (outf, insn); ++ if (bb->index != ENTRY_BLOCK && bb->index != EXIT_BLOCK) ++ for (insn = BB_HEAD (bb), last = NEXT_INSN (BB_END (bb)); insn != last; ++ insn = NEXT_INSN (insn)) ++ print_rtl_single (outf, insn); + + if (df) + { --- a/src/gcc/combine.c +++ b/src/gcc/combine.c @@ -391,8 +391,8 @@ @@ -5056,7 +5404,7 @@ ARM_CORE("fa526", fa526, 4, FL_LDSCHED, fastmul) ARM_CORE("fa626", fa626, 4, FL_LDSCHED, fastmul) -@@ -122,15 +122,18 @@ +@@ -122,15 +122,19 @@ ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e) ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e) ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e) @@ -5068,6 +5416,7 @@ +ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2) +ARM_CORE("generic-armv7-a", genericv7a, 7A, FL_LDSCHED, cortex) +ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex_a5) ++ARM_CORE("cortex-a7", cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex) +ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex) ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9) -ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED, 9e) @@ -5077,7 +5426,7 @@ -ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, 9e) -ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, 9e) -ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, 9e) -+ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex) ++ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15) +ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex) +ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex) +ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex) @@ -5162,7 +5511,7 @@ ;; Generated automatically by gentune.sh from arm-cores.def (define_attr "tune" - "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,cortexa5,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexm4,cortexm3,cortexm1,cortexm0" -+ "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexr5,cortexm4,cortexm3,cortexm1,cortexm0" ++ "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexr5,cortexm4,cortexm3,cortexm1,cortexm0" (const (symbol_ref "((enum attr_tune) arm_tune)"))) --- a/src/gcc/config/arm/arm.c +++ b/src/gcc/config/arm/arm.c @@ -5306,7 +5655,7 @@ /* In case of a PRE_INC, POST_INC, PRE_DEC, POST_DEC memory reference, we must report the mode of the memory reference from -@@ -851,48 +881,117 @@ +@@ -851,48 +881,128 @@ { arm_slowmul_rtx_costs, NULL, @@ -5420,6 +5769,17 @@ + ARM_PREFETCH_BENEFICIAL(4,32,32), + false, /* Prefer constant pool. */ + arm_default_branch_cost ++}; ++ ++const struct tune_params arm_cortex_a15_tune = ++{ ++ arm_9e_rtx_costs, ++ NULL, ++ 1, /* Constant limit. */ ++ 1, /* Max cond insns. */ ++ ARM_PREFETCH_NOT_BENEFICIAL, /* TODO: Calculate correct values. */ ++ false, /* Prefer constant pool. */ ++ arm_cortex_a5_branch_cost }; const struct tune_params arm_fa726te_tune = @@ -5436,7 +5796,7 @@ }; -@@ -1698,7 +1797,8 @@ +@@ -1698,7 +1808,8 @@ arm_tune_wbuf = (tune_flags & FL_WBUF) != 0; arm_tune_xscale = (tune_flags & FL_XSCALE) != 0; arm_arch_iwmmxt = (insn_flags & FL_IWMMXT) != 0; @@ -5446,7 +5806,7 @@ arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0; /* If we are not using the default (ARM mode) section anchor offset -@@ -1965,6 +2065,28 @@ +@@ -1965,6 +2076,28 @@ fix_cm3_ldrd = 0; } @@ -5475,7 +5835,7 @@ if (TARGET_THUMB1 && flag_schedule_insns) { /* Don't warn since it's on by default in -O2. */ -@@ -1978,12 +2100,7 @@ +@@ -1978,12 +2111,7 @@ max_insns_skipped = 6; } else @@ -5489,7 +5849,7 @@ /* Hot/Cold partitioning is not currently supported, since we can't handle literal pool placement in that case. */ -@@ -2440,7 +2557,7 @@ +@@ -2440,7 +2568,7 @@ } /* Return true if I is a valid constant for the operation CODE. */ @@ -5498,7 +5858,7 @@ const_ok_for_op (HOST_WIDE_INT i, enum rtx_code code) { if (const_ok_for_arm (i)) -@@ -2448,7 +2565,21 @@ +@@ -2448,7 +2576,21 @@ switch (code) { @@ -5520,7 +5880,7 @@ case COMPARE: case EQ: case NE: -@@ -2564,68 +2695,41 @@ +@@ -2564,68 +2706,41 @@ 1); } @@ -5613,7 +5973,7 @@ } } -@@ -2652,13 +2756,161 @@ +@@ -2652,13 +2767,161 @@ the constant starting from `best_start', and also starting from zero (i.e. with bit 31 first to be output). If `best_start' doesn't yield a shorter sequence, we may as well use zero. */ @@ -5739,7 +6099,8 @@ + : tmp != b3 ? 16 + : 8; + } -+ + +- return best_start; + /* Second, try to find a 16-bit replicated constant that can + leave three of the bytes clear. If b2 or b4 is already + zero, then we can. If the 8-bit from above would not @@ -5766,8 +6127,7 @@ + } + } + } - -- return best_start; ++ + return_sequence->i[insns++] = result; + remainder &= ~result; + @@ -5780,7 +6140,7 @@ } /* Emit an instruction with the indicated PATTERN. If COND is -@@ -2675,7 +2927,6 @@ +@@ -2675,7 +2938,6 @@ /* As above, but extra parameter GENERATE which, if clear, suppresses RTL generation. */ @@ -5788,7 +6148,7 @@ static int arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, -@@ -2687,15 +2938,15 @@ +@@ -2687,15 +2949,15 @@ int final_invert = 0; int can_negate_initial = 0; int i; @@ -5807,7 +6167,7 @@ /* Find out which operations are safe for a given CODE. Also do a quick check for degenerate cases; these can occur when DImode operations -@@ -2704,7 +2955,6 @@ +@@ -2704,7 +2966,6 @@ { case SET: can_invert = 1; @@ -5815,7 +6175,7 @@ break; case PLUS: -@@ -2732,9 +2982,6 @@ +@@ -2732,9 +2993,6 @@ gen_rtx_SET (VOIDmode, target, source)); return 1; } @@ -5825,7 +6185,7 @@ break; case AND: -@@ -2776,6 +3023,7 @@ +@@ -2776,6 +3034,7 @@ gen_rtx_NOT (mode, source))); return 1; } @@ -5833,7 +6193,7 @@ break; case MINUS: -@@ -2798,7 +3046,6 @@ +@@ -2798,7 +3057,6 @@ source))); return 1; } @@ -5841,7 +6201,7 @@ break; -@@ -2807,9 +3054,7 @@ +@@ -2807,9 +3065,7 @@ } /* If we can do it in one insn get out quickly. */ @@ -5852,7 +6212,7 @@ { if (generate) emit_constant_insn (cond, -@@ -2862,15 +3107,6 @@ +@@ -2862,15 +3118,6 @@ switch (code) { case SET: @@ -5868,7 +6228,7 @@ /* See if we can do this by sign_extending a constant that is known to be negative. This is a good, way of doing it, since the shift may well merge into a subsequent insn. */ -@@ -3221,121 +3457,97 @@ +@@ -3221,121 +3468,97 @@ break; } @@ -5917,9 +6277,7 @@ + + /* Is the negated immediate sequence more efficient? */ + if (neg_insns < insns && neg_insns <= inv_insns) - { -- remainder ^= 0xffffffff; -- final_invert = 1; ++ { + insns = neg_insns; + immediates = &neg_immediates; + } @@ -5930,7 +6288,9 @@ + We must allow for an extra NOT instruction for XOR operations, although + there is some chance that the final 'mvn' will get optimized later. */ + if ((inv_insns + 1) < insns || (!final_invert && inv_insns < insns)) -+ { + { +- remainder ^= 0xffffffff; +- final_invert = 1; + insns = inv_insns; + immediates = &inv_immediates; } @@ -6066,7 +6426,18 @@ if (final_invert) { -@@ -5077,6 +5289,14 @@ +@@ -3570,6 +3793,10 @@ + add_libcall (libcall_htab, + convert_optab_libfunc (trunc_optab, HFmode, SFmode)); + add_libcall (libcall_htab, ++ convert_optab_libfunc (sfix_optab, SImode, DFmode)); ++ add_libcall (libcall_htab, ++ convert_optab_libfunc (ufix_optab, SImode, DFmode)); ++ add_libcall (libcall_htab, + convert_optab_libfunc (sfix_optab, DImode, DFmode)); + add_libcall (libcall_htab, + convert_optab_libfunc (ufix_optab, DImode, DFmode)); +@@ -5077,6 +5304,14 @@ if (IS_STACKALIGN (func_type)) return false; @@ -6081,7 +6452,64 @@ /* Everything else is ok. */ return true; } -@@ -5916,7 +6136,7 @@ +@@ -5379,11 +5614,7 @@ + + if (TARGET_32BIT) + { +- emit_insn (gen_pic_load_addr_32bit (pic_reg, pic_rtx)); +- if (TARGET_ARM) +- emit_insn (gen_pic_add_dot_plus_eight (pic_reg, pic_reg, labelno)); +- else +- emit_insn (gen_pic_add_dot_plus_four (pic_reg, pic_reg, labelno)); ++ emit_insn (gen_pic_load_addr_unified (pic_reg, pic_rtx, labelno)); + } + else /* TARGET_THUMB1 */ + { +@@ -5396,10 +5627,10 @@ + thumb_find_work_register (saved_regs)); + emit_insn (gen_pic_load_addr_thumb1 (pic_tmp, pic_rtx)); + emit_insn (gen_movsi (pic_offset_table_rtx, pic_tmp)); ++ emit_insn (gen_pic_add_dot_plus_four (pic_reg, pic_reg, labelno)); + } + else +- emit_insn (gen_pic_load_addr_thumb1 (pic_reg, pic_rtx)); +- emit_insn (gen_pic_add_dot_plus_four (pic_reg, pic_reg, labelno)); ++ emit_insn (gen_pic_load_addr_unified (pic_reg, pic_rtx, labelno)); + } + } + +@@ -5429,20 +5660,7 @@ + UNSPEC_SYMBOL_OFFSET); + offset_rtx = gen_rtx_CONST (Pmode, offset_rtx); + +- if (TARGET_32BIT) +- { +- emit_insn (gen_pic_load_addr_32bit (reg, offset_rtx)); +- if (TARGET_ARM) +- insn = emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno)); +- else +- insn = emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno)); +- } +- else /* TARGET_THUMB1 */ +- { +- emit_insn (gen_pic_load_addr_thumb1 (reg, offset_rtx)); +- insn = emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno)); +- } +- ++ insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno)); + return insn; + } + +@@ -5485,7 +5703,7 @@ + will_be_in_index_register (const_rtx x) + { + /* arm.md: calculate_pic_address will split this into a register. */ +- return GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_PIC_SYM; ++ return GET_CODE (x) == UNSPEC && (XINT (x, 1) == UNSPEC_PIC_SYM); + } + + /* Return nonzero if X is a valid ARM state address operand. */ +@@ -5916,7 +6134,7 @@ addresses based on the frame pointer or arg pointer until the reload pass starts. This is so that eliminating such addresses into stack based ones won't produce impossible code. */ @@ -6090,7 +6518,7 @@ thumb1_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) { /* ??? Not clear if this is right. Experiment. */ -@@ -6406,23 +6626,134 @@ +@@ -6406,23 +6624,134 @@ HOST_WIDE_INT val = INTVAL (XEXP (*p, 1)); HOST_WIDE_INT low, high; @@ -6242,7 +6670,7 @@ else return false; -@@ -6535,9 +6866,47 @@ +@@ -6535,9 +6864,47 @@ return for_each_rtx (&x, arm_tls_operand_p_1, NULL); } @@ -6291,17 +6719,26 @@ arm_cannot_force_const_mem (rtx x) { rtx base, offset; -@@ -7233,6 +7602,9 @@ +@@ -7233,6 +7600,18 @@ *total = COSTS_N_INSNS (4); return true; + case SET: + return false; + ++ case UNSPEC: ++ /* We cost this as high as our memory costs to allow this to ++ be hoisted from loops. */ ++ if (XINT (x, 1) == UNSPEC_PIC_UNIFIED) ++ { ++ *total = COSTS_N_INSNS (2 + ARM_NUM_REGS (mode)); ++ } ++ return true; ++ default: *total = COSTS_N_INSNS (4); return false; -@@ -7580,6 +7952,9 @@ +@@ -7580,6 +7959,9 @@ *total = COSTS_N_INSNS (1) + 1; return true; @@ -6311,7 +6748,7 @@ default: if (mode != VOIDmode) *total = COSTS_N_INSNS (ARM_NUM_REGS (mode)); -@@ -8160,6 +8535,21 @@ +@@ -8160,6 +8542,21 @@ return cost; } @@ -6333,50 +6770,40 @@ static int fp_consts_inited = 0; /* Only zero is valid for VFP. Other values are also valid for FPA. */ -@@ -8617,28 +9007,110 @@ +@@ -8617,7 +9014,67 @@ return 1; } -/* Return a string suitable for output of Neon immediate logic operation -- MNEM. */ +/* Return TRUE if rtx OP is legal for use in a VSHR or VSHL instruction. If + the immediate is valid, write a constant suitable for using as an operand + to VSHR/VSHL to *MODCONST and the corresponding element width to + *ELEMENTWIDTH. ISLEFTSHIFT is for determine left or right shift, + because they have different limitations. */ - --char * --neon_output_logic_immediate (const char *mnem, rtx *op2, enum machine_mode mode, -- int inverse, int quad) ++ +int +neon_immediate_valid_for_shift (rtx op, enum machine_mode mode, + rtx *modconst, int *elementwidth, + bool isleftshift) - { -- int width, is_valid; -- static char templ[40]; ++{ + unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode)); + unsigned int n_elts = CONST_VECTOR_NUNITS (op), i; + unsigned HOST_WIDE_INT last_elt = 0; + unsigned HOST_WIDE_INT maxshift; - -- is_valid = neon_immediate_valid_for_logic (*op2, mode, inverse, op2, &width); ++ + /* Split vector constant out into a byte vector. */ + for (i = 0; i < n_elts; i++) + { + rtx el = CONST_VECTOR_ELT (op, i); + unsigned HOST_WIDE_INT elpart; - -- gcc_assert (is_valid != 0); ++ + if (GET_CODE (el) == CONST_INT) + elpart = INTVAL (el); + else if (GET_CODE (el) == CONST_DOUBLE) + return 0; + else + gcc_unreachable (); - -- if (quad) -- sprintf (templ, "%s.i%d\t%%q0, %%2", mnem, width); ++ + if (i != 0 && elpart != last_elt) + return 0; + @@ -6409,24 +6836,10 @@ +} + +/* Return a string suitable for output of Neon immediate logic operation -+ MNEM. */ -+ -+char * -+neon_output_logic_immediate (const char *mnem, rtx *op2, enum machine_mode mode, -+ int inverse, int quad) -+{ -+ int width, is_valid; -+ static char templ[40]; -+ -+ is_valid = neon_immediate_valid_for_logic (*op2, mode, inverse, op2, &width); -+ -+ gcc_assert (is_valid != 0); -+ -+ if (quad) -+ sprintf (templ, "%s.i%d\t%%q0, %%2", mnem, width); - else - sprintf (templ, "%s.i%d\t%%P0, %%2", mnem, width); + MNEM. */ + char * +@@ -8639,6 +9096,28 @@ return templ; } @@ -6455,7 +6868,7 @@ /* Output a sequence of pairwise operations to implement a reduction. NOTE: We do "too much work" here, because pairwise operations work on two registers-worth of operands in one go. Unfortunately we can't exploit those -@@ -9111,6 +9583,11 @@ +@@ -9111,6 +9590,11 @@ if (GET_CODE (ind) == REG) return arm_address_register_rtx_p (ind, 0); @@ -6467,7 +6880,7 @@ return FALSE; } -@@ -9139,11 +9616,14 @@ +@@ -9139,11 +9623,14 @@ return GENERAL_REGS; } @@ -6485,7 +6898,17 @@ if (arm_coproc_mem_operand (x, wb) || s_register_operand (x, mode)) return NO_REGS; -@@ -9812,6 +10292,9 @@ +@@ -9426,7 +9913,8 @@ + arm_note_pic_base (rtx *x, void *date ATTRIBUTE_UNUSED) + { + if (GET_CODE (*x) == UNSPEC +- && XINT (*x, 1) == UNSPEC_PIC_BASE) ++ && (XINT (*x, 1) == UNSPEC_PIC_BASE ++ || XINT (*x, 1) == UNSPEC_PIC_UNIFIED)) + return 1; + return 0; + } +@@ -9812,6 +10300,9 @@ rtx base_reg_rtx = NULL; int i, stm_case; @@ -6495,7 +6918,7 @@ /* Can only handle up to MAX_LDM_STM_OPS insns at present, though could be easily extended if required. */ gcc_assert (nops >= 2 && nops <= MAX_LDM_STM_OPS); -@@ -9869,7 +10352,9 @@ +@@ -9869,7 +10360,9 @@ /* If it isn't an integer register, then we can't do this. */ if (unsorted_regs[i] < 0 || (TARGET_THUMB1 && unsorted_regs[i] > LAST_LO_REGNUM) @@ -6506,7 +6929,7 @@ || (TARGET_THUMB2 && unsorted_regs[i] == SP_REGNUM) || unsorted_regs[i] > 14) return 0; -@@ -10331,6 +10816,335 @@ +@@ -10331,6 +10824,335 @@ return true; } @@ -6842,7 +7265,7 @@ int arm_gen_movmemqi (rtx *operands) { -@@ -10343,8 +11157,13 @@ +@@ -10343,8 +11165,13 @@ if (GET_CODE (operands[2]) != CONST_INT || GET_CODE (operands[3]) != CONST_INT @@ -6858,7 +7281,25 @@ return 0; dstbase = operands[0]; -@@ -11433,6 +12252,19 @@ +@@ -10772,7 +11599,7 @@ + return CC_Zmode; + + /* We can do an equality test in three Thumb instructions. */ +- if (!TARGET_ARM) ++ if (!TARGET_32BIT) + return CC_Zmode; + + /* FALLTHROUGH */ +@@ -10784,7 +11611,7 @@ + /* DImode unsigned comparisons can be implemented by cmp + + cmpeq without a scratch register. Not worth doing in + Thumb-2. */ +- if (TARGET_ARM) ++ if (TARGET_32BIT) + return CC_CZmode; + + /* FALLTHROUGH */ +@@ -11433,6 +12260,19 @@ return 0; } @@ -6878,7 +7319,7 @@ /* Move a minipool fix MP from its current location to before MAX_MP. If MAX_MP is NULL, then MP doesn't need moving, but the addressing constraints may need updating. */ -@@ -11979,8 +12811,12 @@ +@@ -11979,8 +12819,12 @@ within range. */ gcc_assert (GET_CODE (from) != BARRIER); @@ -6893,7 +7334,7 @@ /* If there is a jump table, add its length. */ tmp = is_jump_table (from); -@@ -12400,6 +13236,11 @@ +@@ -12400,6 +13244,11 @@ insn = table; } } @@ -6905,7 +7346,7 @@ } fix = minipool_fix_head; -@@ -16591,7 +17432,7 @@ +@@ -16591,7 +17440,7 @@ { rtx addr; bool postinc = FALSE; @@ -6914,7 +7355,7 @@ gcc_assert (GET_CODE (x) == MEM); addr = XEXP (x, 0); -@@ -16606,12 +17447,12 @@ +@@ -16606,14 +17455,14 @@ instruction (for some alignments) as an aid to the memory subsystem of the target. */ align = MEM_ALIGN (x) >> 3; @@ -6926,11 +7367,14 @@ + if (memsize == 16 && (align % 32) == 0) align_bits = 256; - else if ((modesize == 8 || modesize == 16) && (align % 16) == 0) -+ else if ((memsize == 8 || memsize == 16) && (align % 16) == 0) ++ else if (memsize == 16 && (align % 16) == 0) align_bits = 128; - else if ((align % 8) == 0) +- else if ((align % 8) == 0) ++ else if (memsize >= 8 && (align % 8) == 0) align_bits = 64; -@@ -16663,6 +17504,11 @@ + else + align_bits = 0; +@@ -16663,6 +17512,11 @@ } return; @@ -6942,7 +7386,7 @@ /* Register specifier for vld1.16/vst1.16. Translate the S register number into a D register number and element index. */ case 'z': -@@ -17022,10 +17868,10 @@ +@@ -17022,10 +17876,10 @@ decremented/zeroed by arm_asm_output_opcode as the insns are output. */ /* Returns the index of the ARM condition code string in @@ -6957,7 +7401,7 @@ { enum machine_mode mode = GET_MODE (XEXP (comparison, 0)); enum arm_cond_code code; -@@ -17049,11 +17895,11 @@ +@@ -17049,11 +17903,11 @@ case CC_DLTUmode: code = ARM_CC; dominance: @@ -6972,7 +7416,7 @@ case CC_NOOVmode: switch (comp_code) -@@ -17062,7 +17908,7 @@ +@@ -17062,7 +17916,7 @@ case EQ: return ARM_EQ; case GE: return ARM_PL; case LT: return ARM_MI; @@ -6981,7 +7425,7 @@ } case CC_Zmode: -@@ -17070,7 +17916,7 @@ +@@ -17070,7 +17924,7 @@ { case NE: return ARM_NE; case EQ: return ARM_EQ; @@ -6990,7 +7434,7 @@ } case CC_Nmode: -@@ -17078,7 +17924,7 @@ +@@ -17078,7 +17932,7 @@ { case NE: return ARM_MI; case EQ: return ARM_PL; @@ -6999,7 +7443,7 @@ } case CCFPEmode: -@@ -17103,7 +17949,7 @@ +@@ -17103,7 +17957,7 @@ /* UNEQ and LTGT do not have a representation. */ case UNEQ: /* Fall through. */ case LTGT: /* Fall through. */ @@ -7008,7 +7452,7 @@ } case CC_SWPmode: -@@ -17119,7 +17965,7 @@ +@@ -17119,7 +17973,7 @@ case GTU: return ARM_CC; case LEU: return ARM_CS; case LTU: return ARM_HI; @@ -7017,7 +7461,7 @@ } case CC_Cmode: -@@ -17127,7 +17973,7 @@ +@@ -17127,7 +17981,7 @@ { case LTU: return ARM_CS; case GEU: return ARM_CC; @@ -7026,7 +7470,7 @@ } case CC_CZmode: -@@ -17139,7 +17985,7 @@ +@@ -17139,7 +17993,7 @@ case GTU: return ARM_HI; case LEU: return ARM_LS; case LTU: return ARM_CC; @@ -7035,7 +7479,7 @@ } case CC_NCVmode: -@@ -17149,7 +17995,7 @@ +@@ -17149,7 +18003,7 @@ case LT: return ARM_LT; case GEU: return ARM_CS; case LTU: return ARM_CC; @@ -7044,7 +7488,7 @@ } case CCmode: -@@ -17165,13 +18011,22 @@ +@@ -17165,13 +18019,22 @@ case GTU: return ARM_HI; case LEU: return ARM_LS; case LTU: return ARM_CC; @@ -7068,7 +7512,7 @@ /* Tell arm_asm_output_opcode to output IT blocks for conditionally executed instructions. */ void -@@ -17783,926 +18638,618 @@ +@@ -17783,926 +18646,618 @@ return value; } @@ -8582,7 +9026,7 @@ /* Next create constant-qualified versions of the above types. */ const_intQI_node = build_qualified_type (neon_intQI_type_node, -@@ -18843,252 +19390,740 @@ +@@ -18843,252 +19398,740 @@ } } @@ -9539,7 +9983,7 @@ } static void -@@ -19115,6 +20150,17 @@ +@@ -19115,6 +20158,17 @@ arm_init_fp16_builtins (); } @@ -9557,7 +10001,7 @@ /* Implement TARGET_INVALID_PARAMETER_TYPE. */ static const char * -@@ -19266,55 +20312,68 @@ +@@ -19266,55 +20320,68 @@ return target; } @@ -9664,7 +10108,7 @@ tree exp, ...) { va_list ap; -@@ -19323,7 +20382,9 @@ +@@ -19323,7 +20390,9 @@ rtx op[NEON_MAX_BUILTIN_ARGS]; enum machine_mode tmode = insn_data[icode].operand[0].mode; enum machine_mode mode[NEON_MAX_BUILTIN_ARGS]; @@ -9674,7 +10118,7 @@ if (have_retval && (!target -@@ -19341,26 +20402,46 @@ +@@ -19341,26 +20410,46 @@ break; else { @@ -9724,7 +10168,7 @@ case NEON_ARG_STOP: gcc_unreachable (); } -@@ -19438,15 +20519,17 @@ +@@ -19438,15 +20527,17 @@ static rtx arm_expand_neon_builtin (int fcode, tree exp, rtx target) { @@ -9745,7 +10189,7 @@ NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_BINOP: -@@ -19456,90 +20539,90 @@ +@@ -19456,90 +20547,90 @@ case NEON_SCALARMULH: case NEON_SHIFTINSERT: case NEON_LOGICBINOP: @@ -9856,7 +10300,7 @@ NEON_ARG_STOP); } -@@ -19571,39 +20654,34 @@ +@@ -19571,39 +20662,34 @@ emit_move_insn (mem, tmp2); } @@ -9916,7 +10360,16 @@ } /* Expand an expression EXP that calls a built-in function, -@@ -21455,6 +22533,8 @@ +@@ -20859,6 +21945,8 @@ + gcc_assert (amount >= 0); + if (amount) + { ++ emit_insn (gen_blockage ()); ++ + if (amount < 512) + emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, + GEN_INT (amount))); +@@ -21455,6 +22543,8 @@ const char *fpu_name; if (arm_selected_arch) asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_arch->name); @@ -9925,7 +10378,7 @@ else asm_fprintf (asm_out_file, "\t.cpu %s\n", arm_selected_cpu->name); -@@ -21518,6 +22598,10 @@ +@@ -21518,6 +22608,10 @@ val = 6; asm_fprintf (asm_out_file, "\t.eabi_attribute 30, %d\n", val); @@ -9936,7 +10389,7 @@ /* Tag_ABI_FP_16bit_format. */ if (arm_fp16_format) asm_fprintf (asm_out_file, "\t.eabi_attribute 38, %d\n", -@@ -22261,7 +23345,21 @@ +@@ -22261,7 +23355,21 @@ return false; } @@ -9959,7 +10412,7 @@ registers when autovectorizing for Neon, at least until multiple vector widths are supported properly by the middle-end. */ -@@ -22272,15 +23370,15 @@ +@@ -22272,15 +23380,15 @@ switch (mode) { case SFmode: @@ -9980,7 +10433,7 @@ return V2DImode; break; -@@ -22305,14 +23403,16 @@ +@@ -22305,14 +23413,16 @@ /* Implement TARGET_CLASS_LIKELY_SPILLED_P. @@ -10002,7 +10455,7 @@ || rclass == CC_REG) return true; -@@ -22964,8 +24064,13 @@ +@@ -22964,8 +24074,13 @@ { switch (arm_tune) { @@ -10016,7 +10469,7 @@ case cortexa5: case cortexa8: case cortexa9: -@@ -23218,12 +24323,26 @@ +@@ -23218,12 +24333,26 @@ rtx target, rtx memory) { @@ -10047,7 +10500,7 @@ } /* Emit a strex{b,h,d, } instruction appropriate for the specified -@@ -23236,14 +24355,41 @@ +@@ -23236,14 +24365,41 @@ rtx value, rtx memory) { @@ -10094,7 +10547,7 @@ } /* Helper to emit a two operand instruction. */ -@@ -23285,7 +24431,7 @@ +@@ -23285,7 +24441,7 @@ required_value: @@ -10103,7 +10556,7 @@ the modify to continue, if NULL no comparsion is performed. */ static void arm_output_sync_loop (emit_f emit, -@@ -23299,7 +24445,13 @@ +@@ -23299,7 +24455,13 @@ enum attr_sync_op sync_op, int early_barrier_required) { @@ -10118,7 +10571,7 @@ gcc_assert (t1 != t2); -@@ -23310,82 +24462,142 @@ +@@ -23310,82 +24472,142 @@ arm_output_ldrex (emit, mode, old_value, memory); @@ -10282,7 +10735,7 @@ break; default: -@@ -23393,8 +24605,11 @@ +@@ -23393,8 +24615,11 @@ } } @@ -10295,7 +10748,7 @@ } static rtx -@@ -23488,7 +24703,7 @@ +@@ -23488,7 +24713,7 @@ target = gen_reg_rtx (mode); memory = arm_legitimize_sync_memory (memory); @@ -10304,7 +10757,7 @@ { rtx load_temp = gen_reg_rtx (SImode); -@@ -23507,6 +24722,12 @@ +@@ -23507,6 +24732,12 @@ } } @@ -10317,7 +10770,7 @@ static bool arm_vector_alignment_reachable (const_tree type, bool is_packed) { -@@ -23660,4 +24881,53 @@ +@@ -23660,4 +24891,53 @@ return NO_REGS; } @@ -10750,18 +11203,19 @@ ;; UNSPEC Usage: ;; Note: sin and cos are no-longer used. -@@ -104,6 +113,10 @@ +@@ -104,6 +113,11 @@ (UNSPEC_SYMBOL_OFFSET 27) ; The offset of the start of the symbol from ; another symbolic address. (UNSPEC_MEMORY_BARRIER 28) ; Represent a memory barrier. -+ (UNSPEC_UNALIGNED_LOAD 29) ; Used to represent ldr/ldrh instructions that access ++ (UNSPEC_PIC_UNIFIED 29) ; Create a common pic addressing form. ++ (UNSPEC_UNALIGNED_LOAD 30) ; Used to represent ldr/ldrh instructions that access + ; unaligned locations, on architectures which support + ; that. -+ (UNSPEC_UNALIGNED_STORE 30) ; Same for str/strh. ++ (UNSPEC_UNALIGNED_STORE 31) ; Same for str/strh. ] ) -@@ -332,6 +345,13 @@ +@@ -332,6 +346,13 @@ (const_string "mult") (const_string "alu"))) @@ -10775,7 +11229,7 @@ ; Load scheduling, set from the arm_ld_sched variable ; initialized by arm_option_override() (define_attr "ldsched" "no,yes" (const (symbol_ref "arm_ld_sched"))) -@@ -490,7 +510,7 @@ +@@ -490,7 +511,7 @@ (define_attr "tune_cortexr4" "yes,no" (const (if_then_else @@ -10784,7 +11238,7 @@ (const_string "yes") (const_string "no")))) -@@ -498,7 +518,7 @@ +@@ -498,7 +519,7 @@ (define_attr "generic_sched" "yes,no" (const (if_then_else @@ -10793,7 +11247,7 @@ (eq_attr "tune_cortexr4" "yes")) (const_string "no") (const_string "yes")))) -@@ -524,6 +544,7 @@ +@@ -524,6 +545,7 @@ (include "cortex-a5.md") (include "cortex-a8.md") (include "cortex-a9.md") @@ -10801,7 +11255,7 @@ (include "cortex-r4.md") (include "cortex-r4f.md") (include "cortex-m4.md") -@@ -701,21 +722,24 @@ +@@ -701,21 +723,24 @@ ;; (plus (reg rN) (reg sp)) into (reg rN). In this case reload will ;; put the duplicated register first, and not try the commutative version. (define_insn_and_split "*arm_addsi3" @@ -10831,7 +11285,7 @@ && (reload_completed || !arm_eliminable_register (operands[1]))" [(clobber (const_int 0))] " -@@ -724,8 +748,9 @@ +@@ -724,8 +749,9 @@ operands[1], 0); DONE; " @@ -10843,7 +11297,7 @@ ) (define_insn_and_split "*thumb1_addsi3" -@@ -791,7 +816,7 @@ +@@ -791,7 +817,7 @@ "" ) @@ -10852,7 +11306,7 @@ [(set (reg:CC_NOOV CC_REGNUM) (compare:CC_NOOV (plus:SI (match_operand:SI 1 "s_register_operand" "r, r") -@@ -1806,7 +1831,37 @@ +@@ -1806,7 +1832,37 @@ (set_attr "predicable" "yes")] ) @@ -10891,7 +11345,7 @@ [(set (match_operand:DI 0 "s_register_operand" "=r") (plus:DI (mult:DI (sign_extend:DI -@@ -1819,6 +1874,39 @@ +@@ -1819,6 +1875,39 @@ [(set_attr "insn" "smlalxy") (set_attr "predicable" "yes")]) @@ -10931,7 +11385,7 @@ (define_expand "mulsf3" [(set (match_operand:SF 0 "s_register_operand" "") (mult:SF (match_operand:SF 1 "s_register_operand" "") -@@ -2384,10 +2472,10 @@ +@@ -2384,10 +2473,10 @@ ;;; this insv pattern, so this pattern needs to be reevalutated. (define_expand "insv" @@ -10946,7 +11400,7 @@ "TARGET_ARM || arm_arch_thumb2" " { -@@ -2398,35 +2486,70 @@ +@@ -2398,35 +2487,70 @@ if (arm_arch_thumb2) { @@ -10959,12 +11413,12 @@ { - HOST_WIDE_INT val = INTVAL (operands[3]) & mask; + rtx base_addr; -+ + +- if (val == 0) + if (BYTES_BIG_ENDIAN) + start_bit = GET_MODE_BITSIZE (GET_MODE (operands[3])) - width + - start_bit; - -- if (val == 0) ++ + if (width == 32) { - emit_insn (gen_insv_zero (operands[0], operands[1], @@ -11035,7 +11489,7 @@ target = copy_rtx (operands[0]); /* Avoid using a subreg as a subtarget, and avoid writing a paradoxical subreg as the final target. */ -@@ -3272,7 +3395,7 @@ +@@ -3272,7 +3396,7 @@ bool need_else; if (which_alternative != 0 || operands[3] != const0_rtx @@ -11044,7 +11498,7 @@ need_else = true; else need_else = false; -@@ -3618,12 +3741,10 @@ +@@ -3618,12 +3742,10 @@ ;; to reduce register pressure later on. (define_expand "extzv" @@ -11061,7 +11515,7 @@ "TARGET_THUMB1 || arm_arch_thumb2" " { -@@ -3632,10 +3753,57 @@ +@@ -3632,10 +3754,57 @@ if (arm_arch_thumb2) { @@ -11122,7 +11576,7 @@ operands[3] = GEN_INT (rshift); -@@ -3645,12 +3813,154 @@ +@@ -3645,12 +3814,154 @@ DONE; } @@ -11280,7 +11734,7 @@ [(set (match_operand:SI 0 "s_register_operand" "=r") (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r") (match_operand:SI 2 "const_int_operand" "M") -@@ -3672,6 +3982,28 @@ +@@ -3672,6 +3983,28 @@ (set_attr "predicable" "yes")] ) @@ -11309,7 +11763,7 @@ ;; Unary arithmetic insns -@@ -4044,8 +4376,8 @@ +@@ -4044,8 +4377,8 @@ (define_insn "zero_extenddi2" [(set (match_operand:DI 0 "s_register_operand" "=r") @@ -11320,7 +11774,38 @@ "TARGET_32BIT " "#" [(set_attr "length" "8") -@@ -5937,8 +6269,8 @@ +@@ -5257,6 +5590,30 @@ + "operands[3] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];" + ) + ++;; operand1 is the memory address to go into ++;; pic_load_addr_32bit. ++;; operand2 is the PIC label to be emitted ++;; from pic_add_dot_plus_eight. ++;; We do this to allow hoisting of the entire insn. ++(define_insn_and_split "pic_load_addr_unified" ++ [(set (match_operand:SI 0 "s_register_operand" "=r,r,l") ++ (unspec:SI [(match_operand:SI 1 "" "mX,mX,mX") ++ (match_operand:SI 2 "" "")] ++ UNSPEC_PIC_UNIFIED))] ++ "flag_pic" ++ "#" ++ "&& reload_completed" ++ [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_PIC_SYM)) ++ (set (match_dup 0) (unspec:SI [(match_dup 0) (match_dup 3) ++ (match_dup 2)] UNSPEC_PIC_BASE))] ++ "operands[3] = TARGET_THUMB ? GEN_INT (4) : GEN_INT (8);" ++ [(set_attr "type" "load1,load1,load1") ++ (set_attr "pool_range" "4096,4096,1024") ++ (set_attr "neg_pool_range" "4084,0,0") ++ (set_attr "arch" "a,t2,t1") ++ (set_attr "length" "8,6,4")] ++) ++ + ;; The rather odd constraints on the following are to force reload to leave + ;; the insn alone, and to force the minipool generation pass to then move + ;; the GOT symbol to memory. +@@ -5937,8 +6294,8 @@ (define_insn "*arm_movqi_insn" @@ -11331,7 +11816,7 @@ "TARGET_32BIT && ( register_operand (operands[0], QImode) || register_operand (operands[1], QImode))" -@@ -5946,10 +6278,14 @@ +@@ -5946,10 +6303,14 @@ mov%?\\t%0, %1 mvn%?\\t%0, #%B1 ldr%(b%)\\t%0, %1 @@ -11349,7 +11834,7 @@ ) (define_insn "*thumb1_movqi_insn" -@@ -6179,7 +6515,7 @@ +@@ -6179,7 +6540,7 @@ [(match_operand:DF 0 "arm_reload_memory_operand" "=o") (match_operand:DF 1 "s_register_operand" "r") (match_operand:SI 2 "s_register_operand" "=&r")] @@ -11358,7 +11843,7 @@ " { enum rtx_code code = GET_CODE (XEXP (operands[0], 0)); -@@ -6442,7 +6778,7 @@ +@@ -6442,7 +6803,7 @@ (define_expand "cbranchsi4" [(set (pc) (if_then_else @@ -11367,7 +11852,7 @@ [(match_operand:SI 1 "s_register_operand" "") (match_operand:SI 2 "nonmemory_operand" "")]) (label_ref (match_operand 3 "" "")) -@@ -6493,7 +6829,7 @@ +@@ -6493,7 +6854,7 @@ (define_expand "cbranchsf4" [(set (pc) (if_then_else @@ -11376,7 +11861,7 @@ [(match_operand:SF 1 "s_register_operand" "") (match_operand:SF 2 "arm_float_compare_operand" "")]) (label_ref (match_operand 3 "" "")) -@@ -6505,7 +6841,7 @@ +@@ -6505,7 +6866,7 @@ (define_expand "cbranchdf4" [(set (pc) (if_then_else @@ -11385,7 +11870,7 @@ [(match_operand:DF 1 "s_register_operand" "") (match_operand:DF 2 "arm_float_compare_operand" "")]) (label_ref (match_operand 3 "" "")) -@@ -6517,7 +6853,7 @@ +@@ -6517,7 +6878,7 @@ (define_expand "cbranchdi4" [(set (pc) (if_then_else @@ -11394,7 +11879,7 @@ [(match_operand:DI 1 "cmpdi_operand" "") (match_operand:DI 2 "cmpdi_operand" "")]) (label_ref (match_operand 3 "" "")) -@@ -7106,13 +7442,17 @@ +@@ -7106,13 +7467,17 @@ (define_insn "*arm_cmpsi_insn" [(set (reg:CC CC_REGNUM) @@ -11415,7 +11900,18 @@ ) (define_insn "*cmpsi_shiftsi" -@@ -7283,7 +7623,14 @@ +@@ -7175,8 +7540,8 @@ + [(set (reg:CC_CZ CC_REGNUM) + (compare:CC_CZ (match_operand:DI 0 "s_register_operand" "r") + (match_operand:DI 1 "arm_di_operand" "rDi")))] +- "TARGET_ARM" +- "cmp%?\\t%R0, %R1\;cmpeq\\t%Q0, %Q1" ++ "TARGET_32BIT" ++ "cmp\\t%R0, %R1\;it eq\;cmpeq\\t%Q0, %Q1" + [(set_attr "conds" "set") + (set_attr "length" "8")] + ) +@@ -7283,7 +7648,14 @@ return \"b%d1\\t%l0\"; " [(set_attr "conds" "use") @@ -11431,7 +11927,7 @@ ) (define_insn "*arm_cond_branch_reversed" -@@ -7302,7 +7649,14 @@ +@@ -7302,7 +7674,14 @@ return \"b%D1\\t%l0\"; " [(set_attr "conds" "use") @@ -11447,7 +11943,16 @@ ) -@@ -7354,7 +7708,7 @@ +@@ -7346,7 +7725,7 @@ + (not:SI (match_operator:SI 1 "arm_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)])))] + "TARGET_ARM" +- "mov%D1\\t%0, #0\;mvn%d1\\t%0, #1" ++ "mvn%D1\\t%0, #0\;mvn%d1\\t%0, #1" + [(set_attr "conds" "use") + (set_attr "insn" "mov") + (set_attr "length" "8")] +@@ -7354,7 +7733,7 @@ (define_expand "cstoresi4" [(set (match_operand:SI 0 "s_register_operand" "") @@ -11456,7 +11961,7 @@ [(match_operand:SI 2 "s_register_operand" "") (match_operand:SI 3 "reg_or_int_operand" "")]))] "TARGET_32BIT || TARGET_THUMB1" -@@ -7490,7 +7844,7 @@ +@@ -7490,7 +7869,7 @@ (define_expand "cstoresf4" [(set (match_operand:SI 0 "s_register_operand" "") @@ -11465,7 +11970,7 @@ [(match_operand:SF 2 "s_register_operand" "") (match_operand:SF 3 "arm_float_compare_operand" "")]))] "TARGET_32BIT && TARGET_HARD_FLOAT" -@@ -7500,7 +7854,7 @@ +@@ -7500,7 +7879,7 @@ (define_expand "cstoredf4" [(set (match_operand:SI 0 "s_register_operand" "") @@ -11474,7 +11979,7 @@ [(match_operand:DF 2 "s_register_operand" "") (match_operand:DF 3 "arm_float_compare_operand" "")]))] "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE" -@@ -7510,7 +7864,7 @@ +@@ -7510,7 +7889,7 @@ (define_expand "cstoredi4" [(set (match_operand:SI 0 "s_register_operand" "") @@ -11483,7 +11988,7 @@ [(match_operand:DI 2 "cmpdi_operand" "") (match_operand:DI 3 "cmpdi_operand" "")]))] "TARGET_32BIT" -@@ -7630,7 +7984,7 @@ +@@ -7630,7 +8009,7 @@ (define_expand "movsicc" [(set (match_operand:SI 0 "s_register_operand" "") @@ -11492,7 +11997,7 @@ (match_operand:SI 2 "arm_not_operand" "") (match_operand:SI 3 "arm_not_operand" "")))] "TARGET_32BIT" -@@ -7650,7 +8004,7 @@ +@@ -7650,7 +8029,7 @@ (define_expand "movsfcc" [(set (match_operand:SF 0 "s_register_operand" "") @@ -11501,7 +12006,7 @@ (match_operand:SF 2 "s_register_operand" "") (match_operand:SF 3 "nonmemory_operand" "")))] "TARGET_32BIT && TARGET_HARD_FLOAT" -@@ -7676,7 +8030,7 @@ +@@ -7676,7 +8055,7 @@ (define_expand "movdfcc" [(set (match_operand:DF 0 "s_register_operand" "") @@ -11510,7 +12015,7 @@ (match_operand:DF 2 "s_register_operand" "") (match_operand:DF 3 "arm_float_add_operand" "")))] "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP_DOUBLE)" -@@ -7754,7 +8108,14 @@ +@@ -7754,7 +8133,14 @@ return \"b%?\\t%l0\"; } " @@ -11526,7 +12031,7 @@ ) (define_insn "*thumb_jump" -@@ -8839,40 +9200,85 @@ +@@ -8839,40 +9225,85 @@ (set_attr "length" "8,12")] ) @@ -11629,7 +12134,7 @@ ) (define_insn "*cmp_ite1" -@@ -8880,35 +9286,81 @@ +@@ -8880,35 +9311,81 @@ (compare (if_then_else:SI (match_operator 4 "arm_comparison_operator" @@ -11665,15 +12170,7 @@ + \"cmn\\t%2, #%n3\"} + }; + static const char * const cmp2[NUM_OF_COND_CMP][2] = - { -- {\"cmp\\t%0, %1\;cmp%d4\\t%2, %3\", -- \"cmp\\t%2, %3\;cmp%D5\\t%0, %1\"}, -- {\"cmn\\t%0, #%n1\;cmp%d4\\t%2, %3\", -- \"cmp\\t%2, %3\;cmn%D5\\t%0, #%n1\"}, -- {\"cmp\\t%0, %1\;cmn%d4\\t%2, #%n3\", -- \"cmn\\t%2, #%n3\;cmp%D5\\t%0, %1\"}, -- {\"cmn\\t%0, #%n1\;cmn%d4\\t%2, #%n3\", -- \"cmn\\t%2, #%n3\;cmn%D5\\t%0, #%n1\"} ++ { + {\"cmp%d4\\t%2, %3\", + \"cmp%D5\\t%0, %1\"}, + {\"cmp%d4\\t%2, %3\", @@ -11682,12 +12179,20 @@ + \"cmp%D5\\t%0, %1\"}, + {\"cmn%d4\\t%2, #%n3\", + \"cmn%D5\\t%0, #%n1\"} - }; ++ }; + static const char * const ite[2] = -+ { + { +- {\"cmp\\t%0, %1\;cmp%d4\\t%2, %3\", +- \"cmp\\t%2, %3\;cmp%D5\\t%0, %1\"}, +- {\"cmn\\t%0, #%n1\;cmp%d4\\t%2, %3\", +- \"cmp\\t%2, %3\;cmn%D5\\t%0, #%n1\"}, +- {\"cmp\\t%0, %1\;cmn%d4\\t%2, #%n3\", +- \"cmn\\t%2, #%n3\;cmp%D5\\t%0, %1\"}, +- {\"cmn\\t%0, #%n1\;cmn%d4\\t%2, #%n3\", +- \"cmn\\t%2, #%n3\;cmn%D5\\t%0, #%n1\"} + \"it\\t%d4\", + \"it\\t%D5\" -+ }; + }; + static const int cmp_idx[9] = {CMP_CMP, CMP_CMP, CMP_CMN, + CMP_CMP, CMN_CMP, CMP_CMP, + CMN_CMP, CMP_CMN, CMN_CMN}; @@ -11727,7 +12232,7 @@ ) (define_insn "*cmp_and" -@@ -8916,34 +9368,80 @@ +@@ -8916,34 +9393,80 @@ (compare (and:SI (match_operator 4 "arm_comparison_operator" @@ -11762,17 +12267,6 @@ + \"cmn%d4\\t%2, #%n3\"} + }; + static const char *const cmp2[NUM_OF_COND_CMP][2] = -+ { -+ {\"cmp\\t%2, %3\", -+ \"cmp\\t%0, %1\"}, -+ {\"cmp\\t%2, %3\", -+ \"cmn\\t%0, #%n1\"}, -+ {\"cmn\\t%2, #%n3\", -+ \"cmp\\t%0, %1\"}, -+ {\"cmn\\t%2, #%n3\", -+ \"cmn\\t%0, #%n1\"} -+ }; -+ static const char *const ite[2] = { - {\"cmp\\t%2, %3\;cmp%d5\\t%0, %1\", - \"cmp\\t%0, %1\;cmp%d4\\t%2, %3\"}, @@ -11782,9 +12276,20 @@ - \"cmp\\t%0, %1\;cmn%d4\\t%2, #%n3\"}, - {\"cmn\\t%2, #%n3\;cmn%d5\\t%0, #%n1\", - \"cmn\\t%0, #%n1\;cmn%d4\\t%2, #%n3\"} ++ {\"cmp\\t%2, %3\", ++ \"cmp\\t%0, %1\"}, ++ {\"cmp\\t%2, %3\", ++ \"cmn\\t%0, #%n1\"}, ++ {\"cmn\\t%2, #%n3\", ++ \"cmp\\t%0, %1\"}, ++ {\"cmn\\t%2, #%n3\", ++ \"cmn\\t%0, #%n1\"} + }; ++ static const char *const ite[2] = ++ { + \"it\\t%d5\", + \"it\\t%d4\" - }; ++ }; + static const int cmp_idx[9] = {CMP_CMP, CMP_CMP, CMP_CMN, + CMP_CMP, CMN_CMP, CMP_CMP, + CMN_CMP, CMP_CMN, CMN_CMN}; @@ -11824,7 +12329,7 @@ ) (define_insn "*cmp_ior" -@@ -8951,34 +9449,80 @@ +@@ -8951,34 +9474,80 @@ (compare (ior:SI (match_operator 4 "arm_comparison_operator" @@ -11927,7 +12432,7 @@ ) (define_insn_and_split "*ior_scc_scc" -@@ -8990,11 +9534,11 @@ +@@ -8990,11 +9559,11 @@ [(match_operand:SI 4 "s_register_operand" "r") (match_operand:SI 5 "arm_add_operand" "rIL")]))) (clobber (reg:CC CC_REGNUM))] @@ -11941,7 +12446,7 @@ [(set (match_dup 7) (compare (ior:SI -@@ -9023,9 +9567,9 @@ +@@ -9023,9 +9592,9 @@ (set (match_operand:SI 7 "s_register_operand" "=r") (ior:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)]) (match_op_dup 6 [(match_dup 4) (match_dup 5)])))] @@ -11953,7 +12458,7 @@ [(set (match_dup 0) (compare (ior:SI -@@ -9046,11 +9590,11 @@ +@@ -9046,11 +9615,11 @@ [(match_operand:SI 4 "s_register_operand" "r") (match_operand:SI 5 "arm_add_operand" "rIL")]))) (clobber (reg:CC CC_REGNUM))] @@ -11967,7 +12472,7 @@ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y) != CCmode)" [(set (match_dup 7) -@@ -9081,9 +9625,9 @@ +@@ -9081,9 +9650,9 @@ (set (match_operand:SI 7 "s_register_operand" "=r") (and:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)]) (match_op_dup 6 [(match_dup 4) (match_dup 5)])))] @@ -11979,7 +12484,7 @@ [(set (match_dup 0) (compare (and:SI -@@ -9108,11 +9652,11 @@ +@@ -9108,11 +9677,11 @@ [(match_operand:SI 4 "s_register_operand" "r,r,r") (match_operand:SI 5 "arm_add_operand" "rIL,rIL,rIL")]))) (clobber (reg:CC CC_REGNUM))] @@ -11993,7 +12498,7 @@ [(parallel [(set (match_dup 0) (match_op_dup 3 [(match_dup 1) (match_dup 2)])) (clobber (reg:CC CC_REGNUM))]) -@@ -10222,6 +10766,8 @@ +@@ -10222,6 +10791,8 @@ ;; Push multiple registers to the stack. Registers are in parallel (use ...) ;; expressions. For simplicity, the first register is also in the unspec ;; part. @@ -12002,7 +12507,7 @@ (define_insn "*push_multi" [(match_parallel 2 "multi_register_push" [(set (match_operand:BLK 0 "memory_operand" "=m") -@@ -10261,7 +10807,9 @@ +@@ -10261,7 +10832,9 @@ return \"\"; }" @@ -12062,11 +12567,12 @@ +Enable unaligned word and halfword accesses to packed data. --- a/src/gcc/config/arm/bpabi.h +++ b/src/gcc/config/arm/bpabi.h -@@ -56,7 +56,8 @@ +@@ -56,7 +56,9 @@ "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}" #define BE8_LINK_SPEC " %{mbig-endian:%{march=armv7-a|mcpu=cortex-a5"\ - "|mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15:%{!r:--be8}}}" ++ "|mcpu=cortex-a7"\ + "|mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15|mcpu=generic-armv7-a"\ + ":%{!r:--be8}}}" @@ -15222,6 +15728,15 @@ "@ mov%?\\t%0, %1\\t%@ movhi movw%?\\t%0, %L1\\t%@ movhi +@@ -257,7 +259,7 @@ + (not:SI (match_operator:SI 1 "arm_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)])))] + "TARGET_THUMB2" +- "ite\\t%D1\;mov%D1\\t%0, #0\;mvn%d1\\t%0, #1" ++ "ite\\t%D1\;mvn%D1\\t%0, #0\;mvn%d1\\t%0, #1" + [(set_attr "conds" "use") + (set_attr "length" "10")] + ) @@ -779,26 +781,6 @@ (set_attr "length" "2")] ) @@ -15527,7 +16042,15 @@ } if (AVR_HAVE_MOVW) -@@ -5173,10 +5176,10 @@ +@@ -5151,6 +5154,7 @@ + if (new_decl_p + && decl && DECL_P (decl) + && NULL_TREE == DECL_INITIAL (decl) ++ && !DECL_EXTERNAL (decl) + && avr_progmem_p (decl, DECL_ATTRIBUTES (decl))) + { + warning (OPT_Wuninitialized, +@@ -5173,10 +5177,10 @@ default_file_start (); @@ -15864,6 +16387,17 @@ { __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 1); __Y = _mm_insert_epi64 (__Y, __D, __N % 2); +--- a/src/gcc/config/i386/driver-i386.c ++++ b/src/gcc/config/i386/driver-i386.c +@@ -507,7 +507,7 @@ + processor = PROCESSOR_AMDFAM10; + else if (has_sse2 || has_longmode) + processor = PROCESSOR_K8; +- else if (has_3dnowp) ++ else if (has_3dnowp && family == 6) + processor = PROCESSOR_ATHLON; + else if (has_mmx) + processor = PROCESSOR_K6; --- a/src/gcc/config/i386/freebsd.h +++ b/src/gcc/config/i386/freebsd.h @@ -147,3 +147,6 @@ @@ -15925,6 +16459,15 @@ (match_operand:DF 1 "general_operand" "fm,f,G,rm,r,F ,F ,C ,Y2*x,m ,Y2*x,r ,Yi"))] "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1])) +@@ -3647,7 +3647,7 @@ + (match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))] + "TARGET_64BIT" + "@ +- mov\t{%k1, %k0|%k0, %k1} ++ mov{l}\t{%1, %k0|%k0, %1} + # + movd\t{%1, %0|%0, %1} + movd\t{%1, %0|%0, %1} @@ -5103,7 +5103,7 @@ && reload_completed && (SSE_REG_P (operands[0]) @@ -16006,6 +16549,15 @@ [(set (match_dup 0) (float:MODEF (match_dup 1)))]) (define_insn "*float2_i387_with_temp" +@@ -9222,7 +9222,7 @@ + (match_dup 0))) + (set (match_dup 1) + (if_then_else:SWI48 (ne (reg:CCZ FLAGS_REG) (const_int 0)) +- (match_operand:SWI48 3 "register_operand" "r") ++ (match_operand:SWI48 3 "register_operand" "") + (match_dup 1)))] + "TARGET_CMOVE" + "operands[4] = GEN_INT (GET_MODE_BITSIZE (mode));") @@ -14625,7 +14625,7 @@ emit_insn (gen_sse4_1_round2 (operands[0], operands[1], GEN_INT (0x04))); @@ -16124,6 +16676,17 @@ [(set_attr "type" "sselog") (set_attr "prefix" "vex") (set_attr "mode" "V4DF")]) +--- a/src/gcc/config/mips/mips.md ++++ b/src/gcc/config/mips/mips.md +@@ -4707,7 +4707,7 @@ + ;; of _gp from the start of this function. Operand 1 is the incoming + ;; function address. + (define_insn_and_split "loadgp_newabi_" +- [(set (match_operand:P 0 "register_operand" "=d") ++ [(set (match_operand:P 0 "register_operand" "=&d") + (unspec:P [(match_operand:P 1) + (match_operand:P 2 "register_operand" "d")] + UNSPEC_LOADGP))] --- a/src/gcc/config/pa/pa.c +++ b/src/gcc/config/pa/pa.c @@ -1863,6 +1863,11 @@ @@ -16458,6 +17021,236 @@ error_p = false; break; } +--- a/src/gcc/config/rs6000/rs6000.md ++++ b/src/gcc/config/rs6000/rs6000.md +@@ -12241,8 +12241,8 @@ + " + { + operands[3] = gen_reg_rtx (SImode); +- operands[4] = gen_rtx_MEM (DImode, +- gen_rtx_PLUS (DImode, stack_pointer_rtx, ++ operands[4] = gen_rtx_MEM (SImode, ++ gen_rtx_PLUS (SImode, stack_pointer_rtx, + GEN_INT (20))); + + operands[5] = gen_rtx_MEM (SImode, +--- a/src/gcc/config/s390/s390.md ++++ b/src/gcc/config/s390/s390.md +@@ -7644,6 +7644,7 @@ + sra\t%0,%1,%Y2" + [(set_attr "op_type" "RS,RSY") + (set_attr "atype" "reg,reg") ++ (set_attr "cpu_facility" "*,z196") + (set_attr "z10prop" "z10_super_E1,*")]) + + +--- a/src/gcc/config/sparc/sol2-unwind.h ++++ b/src/gcc/config/sparc/sol2-unwind.h +@@ -1,5 +1,5 @@ + /* DWARF2 EH unwinding support for SPARC Solaris. +- Copyright (C) 2009, 2010, 2011 Free Software Foundation, Inc. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. + + This file is part of GCC. + +@@ -34,7 +34,7 @@ + #define IS_SIGHANDLER sparc64_is_sighandler + + static int +-sparc64_is_sighandler (unsigned int *pc, unsigned int *savpc, int *nframes) ++sparc64_is_sighandler (unsigned int *pc, void *cfa, int *nframes) + { + if (/* Solaris 8 - single-threaded + ---------------------------- +@@ -110,38 +110,58 @@ + && pc[ 0] == 0x81c7e008 + && pc[ 1] == 0x81e80000) + { +- if (/* Solaris 8 /usr/lib/sparcv9/libthread.so.1 +- ------------------------------------------ +- Before patch 108827-08: +- : st %g4, [ %i1 + 0x1c ] +- +- Since patch 108827-08: +- : st %l0, [ %i4 + 0x10 ] */ +- savpc[-1] == 0xc826601c +- || savpc[-1] == 0xe0272010) ++ /* We have observed different calling frames among different ++ versions of the operating system, so that we need to ++ discriminate using the upper frame. We look for the return ++ address of the caller frame (there is an offset of 15 double ++ words between the frame address and the place where this return ++ address is stored) in order to do some more pattern matching. */ ++ unsigned int cuh_pattern ++ = *(unsigned int *)(*(unsigned long *)(cfa + 15*8) - 4); ++ ++ if (cuh_pattern == 0xd25fa7ef) + { +- /* We need to move up three frames: ++ /* This matches the call_user_handler pattern for Solaris 10. ++ There are 2 cases so we look for the return address of the ++ caller's caller frame in order to do more pattern matching. */ ++ unsigned long sah_address = *(unsigned long *)(cfa + 176 + 15*8); ++ ++ if (sah_address && *(unsigned int *)(sah_address - 4) == 0x92100019) ++ /* This is the same setup as for Solaris 9, see below. */ ++ *nframes = 3; ++ else ++ /* The sigacthandler frame isn't present in the chain. ++ We need to move up two frames: + + <-- context->cfa + __sighndlr +- sigacthandler ++ call_user_handler frame + +- */ +- *nframes = 2; ++ */ ++ *nframes = 2; + } +- else /* Solaris 8 /usr/lib/lwp/sparcv9/libthread.so.1, Solaris 9+ +- ---------------------------------------------------------- */ +- { +- /* We need to move up three frames: ++ else if (cuh_pattern == 0x9410001a || cuh_pattern == 0x94100013) ++ /* This matches the call_user_handler pattern for Solaris 9 and ++ for Solaris 8 running inside Solaris Containers respectively ++ We need to move up three frames: + + <-- context->cfa + __sighndlr + call_user_handler + sigacthandler + +- */ +- *nframes = 3; +- } ++ */ ++ *nframes = 3; ++ else ++ /* This is the default Solaris 8 case. ++ We need to move up two frames: ++ ++ <-- context->cfa ++ __sighndlr ++ sigacthandler ++ ++ */ ++ *nframes = 2; + return 1; + } + +@@ -172,7 +192,7 @@ + #define IS_SIGHANDLER sparc_is_sighandler + + static int +-sparc_is_sighandler (unsigned int *pc, unsigned int * savpc, int *nframes) ++sparc_is_sighandler (unsigned int *pc, void *cfa, int *nframes) + { + if (/* Solaris 8, 9 - single-threaded + ------------------------------- +@@ -200,7 +220,7 @@ + && pc[-1] == 0x9410001a + && pc[ 0] == 0x80a62008) + { +- /* Need to move up one frame: ++ /* We need to move up one frame: + + <-- context->cfa + sigacthandler +@@ -231,7 +251,7 @@ + && pc[ 1] == 0x81e80000 + && pc[ 2] == 0x80a26000) + { +- /* Need to move up one frame: ++ /* We need to move up one frame: + + <-- context->cfa + __libthread_segvhdlr +@@ -258,33 +278,58 @@ + && pc[ 0] == 0x81c7e008 + && pc[ 1] == 0x81e80000) + { +- if (/* Solaris 8 /usr/lib/libthread.so.1 +- ---------------------------------- +- : mov %i0, %o0 */ +- savpc[-1] == 0x90100018) ++ /* We have observed different calling frames among different ++ versions of the operating system, so that we need to ++ discriminate using the upper frame. We look for the return ++ address of the caller frame (there is an offset of 15 words ++ between the frame address and the place where this return ++ address is stored) in order to do some more pattern matching. */ ++ unsigned int cuh_pattern ++ = *(unsigned int *)(*(unsigned int *)(cfa + 15*4) - 4); ++ ++ if (cuh_pattern == 0xd407a04c) + { +- /* We need to move up two frames: ++ /* This matches the call_user_handler pattern for Solaris 10. ++ There are 2 cases so we look for the return address of the ++ caller's caller frame in order to do more pattern matching. */ ++ unsigned int sah_address = *(unsigned int *)(cfa + 96 + 15*4); ++ ++ if (sah_address && *(unsigned int *)(sah_address - 4) == 0x92100019) ++ /* This is the same setup as for Solaris 9, see below. */ ++ *nframes = 3; ++ else ++ /* The sigacthandler frame isn't present in the chain. ++ We need to move up two frames: + + <-- context->cfa + __sighndlr +- sigacthandler ++ call_user_handler frame + +- */ +- *nframes = 2; ++ */ ++ *nframes = 2; + } +- else /* Solaris 8 /usr/lib/lwp/libthread.so.1, Solaris 9+ +- -------------------------------------------------- */ +- { +- /* We need to move up three frames: ++ else if (cuh_pattern == 0x9410001a || cuh_pattern == 0x9410001b) ++ /* This matches the call_user_handler pattern for Solaris 9 and ++ for Solaris 8 running inside Solaris Containers respectively. ++ We need to move up three frames: + + <-- context->cfa + __sighndlr + call_user_handler + sigacthandler + +- */ +- *nframes = 3; +- } ++ */ ++ *nframes = 3; ++ else ++ /* This is the default Solaris 8 case. ++ We need to move up two frames: ++ ++ <-- context->cfa ++ __sighndlr ++ sigacthandler ++ ++ */ ++ *nframes = 2; + return 1; + } + +@@ -322,7 +367,7 @@ + return _URC_NO_REASON; + } + +- if (IS_SIGHANDLER (pc, (unsigned int *)fp->fr_savpc, &nframes)) ++ if (IS_SIGHANDLER (pc, this_cfa, &nframes)) + { + struct handler_args { + struct frame frwin; --- a/src/gcc/config/sparc/sparc.c +++ b/src/gcc/config/sparc/sparc.c @@ -4569,8 +4569,9 @@ @@ -16840,7 +17633,23 @@ gcc_AC_PROG_INSTALL --- a/src/gcc/cp/ChangeLog +++ b/src/gcc/cp/ChangeLog -@@ -1,3 +1,63 @@ +@@ -1,3 +1,79 @@ ++2012-01-19 Kai Tietz ++ ++ PR c++/51344 ++ * decl2.c (save_template_attributes): Use merge_attributes ++ instead of chaining up via TREE_CHAIN. ++ ++2012-01-16 Jakub Jelinek ++ ++ PR c++/51854 ++ * mangle.c (write_template_arg_literal): Sorry instead of aborting. ++ ++2012-01-16 Jason Merrill ++ ++ PR c++/51868 ++ * typeck.c (build_static_cast_1): Handle bit-fields properly. ++ +2011-12-20 Dodji Seketeli + + PR debug/49951 @@ -17007,6 +17816,20 @@ /* When a stmt has been parsed, this function is called. */ +--- a/src/gcc/cp/decl2.c ++++ b/src/gcc/cp/decl2.c +@@ -1185,9 +1185,9 @@ + + old_attrs = *q; + +- /* Place the late attributes at the beginning of the attribute ++ /* Merge the late attributes at the beginning with the attribute + list. */ +- TREE_CHAIN (tree_last (late_attrs)) = *q; ++ late_attrs = merge_attributes (late_attrs, *q); + *q = late_attrs; + + if (!DECL_P (*decl_p) && *decl_p == TYPE_MAIN_VARIANT (*decl_p)) --- a/src/gcc/cp/init.c +++ b/src/gcc/cp/init.c @@ -141,7 +141,9 @@ @@ -17033,6 +17856,18 @@ if (CLASS_TYPE_P (type)) { gcc_assert (!TYPE_NEEDS_CONSTRUCTING (type)); +--- a/src/gcc/cp/mangle.c ++++ b/src/gcc/cp/mangle.c +@@ -2770,7 +2770,8 @@ + break; + + default: +- gcc_unreachable (); ++ sorry ("mangling %C", TREE_CODE (value)); ++ break; + } + + write_char ('E'); --- a/src/gcc/cp/pt.c +++ b/src/gcc/cp/pt.c @@ -11439,6 +11439,9 @@ @@ -17102,24 +17937,50 @@ } /* Handle complex lvalues (when permitted) -@@ -5772,8 +5770,18 @@ +@@ -5698,11 +5696,12 @@ + { + tree intype; + tree result; ++ cp_lvalue_kind clk; + + /* Assume the cast is valid. */ + *valid_p = true; + +- intype = TREE_TYPE (expr); ++ intype = unlowered_expr_type (expr); + + /* Save casted types in the function's used types hash table. */ + used_types_insert (type); +@@ -5768,12 +5767,29 @@ + cv2 T2 if cv2 T2 is reference-compatible with cv1 T1 (8.5.3)." */ + if (TREE_CODE (type) == REFERENCE_TYPE + && TYPE_REF_IS_RVALUE (type) +- && real_lvalue_p (expr) ++ && (clk = real_lvalue_p (expr)) && reference_related_p (TREE_TYPE (type), intype) && (c_cast_p || at_least_as_qualified_p (TREE_TYPE (type), intype))) { - expr = build_typed_address (expr, type); - return convert_from_reference (expr); -+ /* Handle the lvalue case here by casting to lvalue reference and -+ then changing it to an rvalue reference. Casting an xvalue to -+ rvalue reference will be handled by the main code path. */ -+ tree lref = cp_build_reference_type (TREE_TYPE (type), false); -+ result = (perform_direct_initialization_if_possible -+ (lref, expr, c_cast_p, complain)); -+ result = cp_fold_convert (type, result); -+ /* Make sure we don't fold back down to a named rvalue reference, -+ because that would be an lvalue. */ -+ if (DECL_P (result)) -+ result = build1 (NON_LVALUE_EXPR, type, result); -+ return convert_from_reference (result); ++ if (clk == clk_ordinary) ++ { ++ /* Handle the (non-bit-field) lvalue case here by casting to ++ lvalue reference and then changing it to an rvalue reference. ++ Casting an xvalue to rvalue reference will be handled by the ++ main code path. */ ++ tree lref = cp_build_reference_type (TREE_TYPE (type), false); ++ result = (perform_direct_initialization_if_possible ++ (lref, expr, c_cast_p, complain)); ++ result = cp_fold_convert (type, result); ++ /* Make sure we don't fold back down to a named rvalue reference, ++ because that would be an lvalue. */ ++ if (DECL_P (result)) ++ result = build1 (NON_LVALUE_EXPR, type, result); ++ return convert_from_reference (result); ++ } ++ else ++ /* For a bit-field or packed field, bind to a temporary. */ ++ expr = rvalue (expr); } /* Resolve overloaded address here rather than once in @@ -17228,7 +18089,7 @@ TREE_READONLY (dest) = 0; --- a/src/gcc/ddg.c +++ b/src/gcc/ddg.c -@@ -145,6 +145,27 @@ +@@ -145,6 +145,45 @@ return rtx_mem_access_p (PATTERN (insn)); } @@ -17253,10 +18114,28 @@ + return false; +} + ++/* Return true if one of the definitions in INSN has MODE_CC. Otherwise ++ return false. */ ++static bool ++def_has_ccmode_p (rtx insn) ++{ ++ df_ref *def; ++ ++ for (def = DF_INSN_DEFS (insn); *def; def++) ++ { ++ enum machine_mode mode = GET_MODE (DF_REF_REG (*def)); ++ ++ if (GET_MODE_CLASS (mode) == MODE_CC) ++ return true; ++ } ++ ++ return false; ++} ++ /* Computes the dependence parameters (latency, distance etc.), creates a ddg_edge and adds it to the given DDG. */ static void -@@ -173,10 +194,15 @@ +@@ -173,10 +212,16 @@ compensate for that by generating reg-moves based on the life-range analysis. The anti-deps that will be deleted are the ones which have true-deps edges in the opposite direction (in other words @@ -17271,11 +18150,12 @@ - if (flag_modulo_sched_allow_regmoves && (t == ANTI_DEP && dt == REG_DEP)) + if (flag_modulo_sched_allow_regmoves + && (t == ANTI_DEP && dt == REG_DEP) ++ && !def_has_ccmode_p (dest_node->insn) + && !autoinc_var_is_used_p (dest_node->insn, src_node->insn)) { rtx set; -@@ -301,8 +327,15 @@ +@@ -301,8 +346,16 @@ gcc_assert (first_def_node); @@ -17288,11 +18168,12 @@ - || !flag_modulo_sched_allow_regmoves) + || !flag_modulo_sched_allow_regmoves + || JUMP_P (use_node->insn) -+ || autoinc_var_is_used_p (DF_REF_INSN (last_def), use_insn)) ++ || autoinc_var_is_used_p (DF_REF_INSN (last_def), use_insn) ++ || def_has_ccmode_p (DF_REF_INSN (last_def))) create_ddg_dep_no_link (g, use_node, first_def_node, ANTI_DEP, REG_DEP, 1); -@@ -385,6 +418,33 @@ +@@ -385,6 +438,33 @@ &PATTERN (insn2)); } @@ -17326,7 +18207,7 @@ /* Given two nodes, analyze their RTL insns and add inter-loop mem deps to ddg G. */ static void -@@ -472,10 +532,22 @@ +@@ -472,10 +552,22 @@ if (DEBUG_INSN_P (j_node->insn)) continue; if (mem_access_insn_p (j_node->insn)) @@ -17351,7 +18232,7 @@ } } } -@@ -1011,6 +1083,7 @@ +@@ -1011,6 +1103,7 @@ for (i = 0; i < all_sccs->num_sccs; i++) free_scc (all_sccs->sccs[i]); @@ -17810,6 +18691,118 @@ x = validize_mem (force_const_mem (mode, x)); /* See if the machine can do this with a load multiple insn. */ +@@ -2180,6 +2180,111 @@ + return tgtblk; + } + ++/* Copy BLKmode value SRC into a register of mode MODE. Return the ++ register if it contains any data, otherwise return null. ++ ++ This is used on targets that return BLKmode values in registers. */ ++ ++rtx ++copy_blkmode_to_reg (enum machine_mode mode, tree src) ++{ ++ int i, n_regs; ++ unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes; ++ unsigned int bitsize; ++ rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX; ++ enum machine_mode dst_mode; ++ ++ gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode); ++ ++ x = expand_normal (src); ++ ++ bytes = int_size_in_bytes (TREE_TYPE (src)); ++ if (bytes == 0) ++ return NULL_RTX; ++ ++ /* If the structure doesn't take up a whole number of words, see ++ whether the register value should be padded on the left or on ++ the right. Set PADDING_CORRECTION to the number of padding ++ bits needed on the left side. ++ ++ In most ABIs, the structure will be returned at the least end of ++ the register, which translates to right padding on little-endian ++ targets and left padding on big-endian targets. The opposite ++ holds if the structure is returned at the most significant ++ end of the register. */ ++ if (bytes % UNITS_PER_WORD != 0 ++ && (targetm.calls.return_in_msb (TREE_TYPE (src)) ++ ? !BYTES_BIG_ENDIAN ++ : BYTES_BIG_ENDIAN)) ++ padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) ++ * BITS_PER_UNIT)); ++ ++ n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; ++ dst_words = XALLOCAVEC (rtx, n_regs); ++ bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD); ++ ++ /* Copy the structure BITSIZE bits at a time. */ ++ for (bitpos = 0, xbitpos = padding_correction; ++ bitpos < bytes * BITS_PER_UNIT; ++ bitpos += bitsize, xbitpos += bitsize) ++ { ++ /* We need a new destination pseudo each time xbitpos is ++ on a word boundary and when xbitpos == padding_correction ++ (the first time through). */ ++ if (xbitpos % BITS_PER_WORD == 0 ++ || xbitpos == padding_correction) ++ { ++ /* Generate an appropriate register. */ ++ dst_word = gen_reg_rtx (word_mode); ++ dst_words[xbitpos / BITS_PER_WORD] = dst_word; ++ ++ /* Clear the destination before we move anything into it. */ ++ emit_move_insn (dst_word, CONST0_RTX (word_mode)); ++ } ++ ++ /* We need a new source operand each time bitpos is on a word ++ boundary. */ ++ if (bitpos % BITS_PER_WORD == 0) ++ src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode); ++ ++ /* Use bitpos for the source extraction (left justified) and ++ xbitpos for the destination store (right justified). */ ++ store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD, word_mode, ++ extract_bit_field (src_word, bitsize, ++ bitpos % BITS_PER_WORD, 1, false, ++ NULL_RTX, word_mode, word_mode)); ++ } ++ ++ if (mode == BLKmode) ++ { ++ /* Find the smallest integer mode large enough to hold the ++ entire structure. */ ++ for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); ++ mode != VOIDmode; ++ mode = GET_MODE_WIDER_MODE (mode)) ++ /* Have we found a large enough mode? */ ++ if (GET_MODE_SIZE (mode) >= bytes) ++ break; ++ ++ /* A suitable mode should have been found. */ ++ gcc_assert (mode != VOIDmode); ++ } ++ ++ if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode)) ++ dst_mode = word_mode; ++ else ++ dst_mode = mode; ++ dst = gen_reg_rtx (dst_mode); ++ ++ for (i = 0; i < n_regs; i++) ++ emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]); ++ ++ if (mode != dst_mode) ++ dst = gen_lowpart (mode, dst); ++ ++ return dst; ++} ++ + /* Add a USE expression for REG to the (possibly empty) list pointed + to by CALL_FUSAGE. REG must denote a hard register. */ + @@ -2308,7 +2413,7 @@ offset -= size; @@ -17855,6 +18848,35 @@ x = validize_mem (force_const_mem (mode, x)); /* If X is a hard register in a non-integer mode, copy it into a pseudo; +@@ -4382,7 +4487,9 @@ + if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from) + && COMPLETE_TYPE_P (TREE_TYPE (from)) + && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST +- && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL) ++ && ! (((TREE_CODE (to) == VAR_DECL ++ || TREE_CODE (to) == PARM_DECL ++ || TREE_CODE (to) == RESULT_DECL) + && REG_P (DECL_RTL (to))) + || TREE_CODE (to) == SSA_NAME)) + { +@@ -4428,12 +4535,15 @@ + rtx temp; + + push_temp_slots (); +- temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL); ++ if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode) ++ temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from); ++ else ++ temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL); + + if (GET_CODE (to_rtx) == PARALLEL) + emit_group_load (to_rtx, temp, TREE_TYPE (from), + int_size_in_bytes (TREE_TYPE (from))); +- else ++ else if (temp) + emit_move_insn (to_rtx, temp); + + preserve_temp_slots (to_rtx); @@ -4866,16 +4976,136 @@ return NULL_RTX; } @@ -18276,15 +19298,15 @@ { - HOST_WIDE_INT nz_elts, count, elts; - bool must_clear; -+ HOST_WIDE_INT nz_elts, init_elts; -+ bool complete_p; - +- - categorize_ctor_elements (exp, &nz_elts, &count, &must_clear); - if (must_clear) - return 1; - - elts = count_type_elements (TREE_TYPE (exp), false); -- ++ HOST_WIDE_INT nz_elts, init_elts; ++ bool complete_p; + - return nz_elts < elts / 4; + categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p); + return !complete_p || nz_elts < init_elts / 4; @@ -18379,6 +19401,26 @@ case VEC_PACK_TRUNC_EXPR: case VEC_PACK_SAT_EXPR: case VEC_PACK_FIX_TRUNC_EXPR: +@@ -8533,10 +8677,15 @@ + return temp; + } + +- /* If the mode of DECL_RTL does not match that of the decl, it +- must be a promoted value. We return a SUBREG of the wanted mode, +- but mark it so that we know that it was already extended. */ +- if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp)) ++ /* If the mode of DECL_RTL does not match that of the decl, ++ there are two cases: we are dealing with a BLKmode value ++ that is returned in a register, or we are dealing with ++ a promoted value. In the latter case, return a SUBREG ++ of the wanted mode, but mark it so that we know that it ++ was already extended. */ ++ if (REG_P (decl_rtl) ++ && DECL_MODE (exp) != BLKmode ++ && GET_MODE (decl_rtl) != DECL_MODE (exp)) + { + enum machine_mode pmode; + @@ -8545,10 +8694,13 @@ if (code == SSA_NAME && (g = SSA_NAME_DEF_STMT (ssa_name)) @@ -18425,6 +19467,39 @@ /* If the field isn't aligned enough to fetch as a memref, fetch it as a bit field. */ || (mode1 != BLKmode +@@ -9486,10 +9646,32 @@ + results. */ + if (MEM_P (op0)) + { ++ enum insn_code icode; ++ + op0 = copy_rtx (op0); + + if (TYPE_ALIGN_OK (type)) + set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type))); ++ else if (mode != BLKmode ++ && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode) ++ /* If the target does have special handling for unaligned ++ loads of mode then use them. */ ++ && ((icode = optab_handler (movmisalign_optab, mode)) ++ != CODE_FOR_nothing)) ++ { ++ rtx reg, insn; ++ ++ op0 = adjust_address (op0, mode, 0); ++ /* We've already validated the memory, and we're creating a ++ new pseudo destination. The predicates really can't ++ fail. */ ++ reg = gen_reg_rtx (mode); ++ ++ /* Nor can the insn generator. */ ++ insn = GEN_FCN (icode) (reg, op0); ++ emit_insn (insn); ++ return reg; ++ } + else if (STRICT_ALIGNMENT + && mode != BLKmode + && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)) --- a/src/gcc/expr.h +++ b/src/gcc/expr.h @@ -324,6 +324,8 @@ @@ -18490,7 +19565,44 @@ case, we'd have to replace it by its greatest power-of-2 --- a/src/gcc/fortran/ChangeLog +++ b/src/gcc/fortran/ChangeLog -@@ -1,3 +1,84 @@ +@@ -1,3 +1,121 @@ ++2012-01-28 Tobias Burnus ++ ++ PR fortran/52022 ++ * trans-expr.c (gfc_conv_procedure_call): Fix passing ++ of functions, which return allocatables. ++ ++2012-01-25 Tobias Burnus ++ ++ PR fortran/51966 ++ * resolve.c (resolve_structure_cons): Only create an ++ array constructors for nonscalars. ++ ++2012-01-24 Tobias Burnus ++ ++ PR fortran/51948 ++ * check.c (variable_check): Fix checking for ++ result variables and deeply nested BLOCKs. ++ ++2012-01-21 Tobias Burnus ++ ++ PR fortran/51913 ++ * interface.c (compare_parameter): Fix CLASS comparison. ++ ++2012-01-19 Tobias Burnus ++ ++ PR fortran/51904 ++ *expr.c (gfc_build_intrinsic_call): Also set the symtree. ++ ++2012-01-14 Tobias Burnus ++ ++ Backported from mainline ++ 2012-01-14 Tobias Burnus ++ ++ PR fortran/51800 ++ * resolve.c (build_default_init_expr): Also initialize ++ nonconstant-length strings with -finit-character=. ++ +2012-01-01 Thomas König + + Backport from trunk @@ -18577,7 +19689,7 @@ * GCC 4.6.2 released. --- a/src/gcc/fortran/check.c +++ b/src/gcc/fortran/check.c -@@ -485,10 +485,31 @@ +@@ -485,23 +485,47 @@ && (gfc_current_intrinsic_arg[n]->intent == INTENT_OUT || gfc_current_intrinsic_arg[n]->intent == INTENT_INOUT)) { @@ -18613,6 +19725,29 @@ } if (e->expr_type == EXPR_VARIABLE + && e->symtree->n.sym->attr.flavor != FL_PARAMETER +- && (allow_proc +- || !e->symtree->n.sym->attr.function +- || (e->symtree->n.sym == e->symtree->n.sym->result +- && (e->symtree->n.sym == gfc_current_ns->proc_name +- || (gfc_current_ns->parent +- && e->symtree->n.sym +- == gfc_current_ns->parent->proc_name))))) ++ && (allow_proc || !e->symtree->n.sym->attr.function)) + return SUCCESS; + ++ if (e->expr_type == EXPR_VARIABLE && e->symtree->n.sym->attr.function ++ && e->symtree->n.sym == e->symtree->n.sym->result) ++ { ++ gfc_namespace *ns; ++ for (ns = gfc_current_ns; ns; ns = ns->parent) ++ if (ns->proc_name == e->symtree->n.sym) ++ return SUCCESS; ++ } ++ + gfc_error ("'%s' argument of '%s' intrinsic at %L must be a variable", + gfc_current_intrinsic_arg[n]->name, gfc_current_intrinsic, &e->where); + --- a/src/gcc/fortran/dependency.c +++ b/src/gcc/fortran/dependency.c @@ -163,9 +163,19 @@ @@ -18656,7 +19791,19 @@ /* Get an expression for a default initializer. */ gfc_expr * -@@ -4520,9 +4523,24 @@ +@@ -4360,6 +4363,11 @@ + result->value.function.name = name; + result->value.function.isym = isym; + ++ result->symtree = gfc_find_symtree (gfc_current_ns->sym_root, name); ++ gcc_assert (result->symtree ++ && (result->symtree->n.sym->attr.flavor == FL_PROCEDURE ++ || result->symtree->n.sym->attr.flavor == FL_UNKNOWN)); ++ + va_start (ap, numarg); + atail = NULL; + for (i = 0; i < numarg; ++i) +@@ -4520,9 +4528,24 @@ return FAILURE; } @@ -18683,9 +19830,39 @@ /* Check variable definition context for associate-names. */ if (!pointer && sym->assoc) { +--- a/src/gcc/fortran/interface.c ++++ b/src/gcc/fortran/interface.c +@@ -1535,7 +1535,7 @@ + return 0; + } + +- /* F2003, 12.5.2.5. */ ++ /* F2008, 12.5.2.5. */ + if (formal->ts.type == BT_CLASS + && (CLASS_DATA (formal)->attr.class_pointer + || CLASS_DATA (formal)->attr.allocatable)) +@@ -1547,8 +1547,8 @@ + formal->name, &actual->where); + return 0; + } +- if (CLASS_DATA (actual)->ts.u.derived +- != CLASS_DATA (formal)->ts.u.derived) ++ if (!gfc_compare_derived_types (CLASS_DATA (actual)->ts.u.derived, ++ CLASS_DATA (formal)->ts.u.derived)) + { + if (where) + gfc_error ("Actual argument to '%s' at %L must have the same " --- a/src/gcc/fortran/resolve.c +++ b/src/gcc/fortran/resolve.c -@@ -3132,10 +3132,10 @@ +@@ -1053,6 +1053,7 @@ + && comp->ts.u.cl->length->expr_type == EXPR_CONSTANT + && cons->expr->ts.u.cl && cons->expr->ts.u.cl->length + && cons->expr->ts.u.cl->length->expr_type == EXPR_CONSTANT ++ && cons->expr->rank != 0 + && mpz_cmp (cons->expr->ts.u.cl->length->value.integer, + comp->ts.u.cl->length->value.integer) != 0) + { +@@ -3132,10 +3133,10 @@ "procedure within a PURE procedure", name, &expr->where); t = FAILURE; } @@ -18699,7 +19876,7 @@ /* Functions without the RECURSIVE attribution are not allowed to * call themselves. */ -@@ -3195,6 +3195,9 @@ +@@ -3195,6 +3196,9 @@ else if (gfc_pure (NULL)) gfc_error ("Subroutine call to '%s' at %L is not PURE", sym->name, &c->loc); @@ -18709,7 +19886,7 @@ } -@@ -9687,7 +9690,7 @@ +@@ -9687,7 +9691,7 @@ int i; /* These symbols should never have a default initialization. */ @@ -18718,7 +19895,50 @@ || sym->attr.external || sym->attr.dummy || sym->attr.pointer -@@ -11394,6 +11397,14 @@ +@@ -9811,6 +9815,26 @@ + gfc_free_expr (init_expr); + init_expr = NULL; + } ++ if (!init_expr && gfc_option.flag_init_character == GFC_INIT_CHARACTER_ON ++ && sym->ts.u.cl->length) ++ { ++ gfc_actual_arglist *arg; ++ init_expr = gfc_get_expr (); ++ init_expr->where = sym->declared_at; ++ init_expr->ts = sym->ts; ++ init_expr->expr_type = EXPR_FUNCTION; ++ init_expr->value.function.isym = ++ gfc_intrinsic_function_by_id (GFC_ISYM_REPEAT); ++ init_expr->value.function.name = "repeat"; ++ arg = gfc_get_actual_arglist (); ++ arg->expr = gfc_get_character_expr (sym->ts.kind, &sym->declared_at, ++ NULL, 1); ++ arg->expr->value.character.string[0] ++ = gfc_option.flag_init_character_value; ++ arg->next = gfc_get_actual_arglist (); ++ arg->next->expr = gfc_copy_expr (sym->ts.u.cl->length); ++ init_expr->value.function.actual = arg; ++ } + break; + + default: +@@ -9837,10 +9861,12 @@ + if (init == NULL) + return; + +- /* For saved variables, we don't want to add an initializer at +- function entry, so we just add a static initializer. */ ++ /* For saved variables, we don't want to add an initializer at function ++ entry, so we just add a static initializer. Note that automatic variables ++ are stack allocated even with -fno-automatic. */ + if (sym->attr.save || sym->ns->save_all +- || gfc_option.flag_max_stack_var_size == 0) ++ || (gfc_option.flag_max_stack_var_size == 0 ++ && (!sym->attr.dimension || !is_non_constant_shape_array (sym)))) + { + /* Don't clobber an existing initializer! */ + gcc_assert (sym->value == NULL); +@@ -11394,6 +11420,14 @@ for (c = sym->components; c != NULL; c = c->next) { @@ -18733,7 +19953,7 @@ /* F2008, C442. */ if (c->attr.codimension /* FIXME: c->as check due to PR 43412. */ && (!c->attr.allocatable || (c->as && c->as->type != AS_DEFERRED))) -@@ -12925,24 +12936,25 @@ +@@ -12925,24 +12959,25 @@ int gfc_implicit_pure (gfc_symbol *sym) { @@ -18877,6 +20097,18 @@ } else gfc_add_expr_to_block (&body, gfc_generate_return ()); +--- a/src/gcc/fortran/trans-expr.c ++++ b/src/gcc/fortran/trans-expr.c +@@ -3064,7 +3064,8 @@ + || (fsym->attr.proc_pointer + && e->expr_type == EXPR_VARIABLE + && gfc_is_proc_ptr_comp (e, NULL)) +- || fsym->attr.allocatable)) ++ || (fsym->attr.allocatable ++ && fsym->attr.flavor != FL_PROCEDURE))) + { + /* Scalar pointer dummy args require an extra level of + indirection. The null pointer already contains --- a/src/gcc/fortran/trans-types.c +++ b/src/gcc/fortran/trans-types.c @@ -2092,6 +2092,9 @@ @@ -18929,7 +20161,7 @@ #define YY_RESTORE_YY_MORE_OFFSET char *yytext; -#line 1 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 1 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 1 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" /* -*- indented-text -*- */ /* Process source files and output type information. Copyright (C) 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010 @@ -18938,7 +20170,7 @@ . */ #define YY_NO_INPUT 1 -#line 25 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 25 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 25 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" #include "bconfig.h" #include "system.h" @@ -18978,7 +20210,7 @@ register int yy_act; -#line 59 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 59 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 59 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" /* Do this on entry to yylex(): */ *yylval = 0; @@ -18996,7 +20228,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 70 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 70 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 70 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_struct); return TYPEDEF; @@ -19005,7 +20237,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 74 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 74 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 74 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_struct); return STRUCT; @@ -19014,7 +20246,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 78 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 78 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 78 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_struct); return UNION; @@ -19023,7 +20255,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 82 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 82 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 82 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_struct); return EXTERN; @@ -19032,7 +20264,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 86 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 86 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 86 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_struct); return STATIC; @@ -19041,7 +20273,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 91 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 91 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 91 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_struct); return DEFVEC_OP; @@ -19050,7 +20282,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 95 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 95 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 95 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_struct); return DEFVEC_I; @@ -19059,7 +20291,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 99 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 99 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 99 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_struct); return DEFVEC_ALLOC; @@ -19068,21 +20300,21 @@ case 9: YY_RULE_SETUP -#line 107 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 107 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 107 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_struct_comment); } YY_BREAK case 10: /* rule 10 can match eol */ YY_RULE_SETUP -#line 109 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 109 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 109 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { update_lineno (yytext, yyleng); } YY_BREAK case 11: /* rule 11 can match eol */ YY_RULE_SETUP -#line 110 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 110 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 110 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { lexer_line.line++; } YY_BREAK case 12: @@ -19091,7 +20323,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 112 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 112 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 112 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" /* don't care */ YY_BREAK case 13: @@ -19100,7 +20332,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 113 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 113 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 113 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { return GTY_TOKEN; } YY_BREAK case 14: @@ -19109,7 +20341,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 114 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 114 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 114 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { return VEC_TOKEN; } YY_BREAK case 15: @@ -19118,7 +20350,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 115 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 115 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 115 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { return UNION; } YY_BREAK case 16: @@ -19127,7 +20359,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 116 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 116 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 116 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { return STRUCT; } YY_BREAK case 17: @@ -19136,7 +20368,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 117 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 117 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 117 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { return ENUM; } YY_BREAK case 18: @@ -19145,7 +20377,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 118 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 118 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 118 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { return PTR_ALIAS; } YY_BREAK case 19: @@ -19154,13 +20386,13 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 119 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 119 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 119 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { return NESTED_PTR; } YY_BREAK case 20: YY_RULE_SETUP -#line 120 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 120 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 120 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { return NUM; } YY_BREAK case 21: @@ -19169,7 +20401,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 121 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 121 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 121 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1); return PARAM_IS; @@ -19178,12 +20410,12 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ -#line 127 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 127 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 127 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" case 23: /* rule 23 can match eol */ YY_RULE_SETUP -#line 127 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 127 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 127 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { size_t len; @@ -19192,7 +20424,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 139 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 139 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 139 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1); return ID; @@ -19201,7 +20433,7 @@ /* rule 25 can match eol */ YY_RULE_SETUP -#line 144 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 144 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 144 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1); return STRING; @@ -19210,7 +20442,7 @@ /* rule 26 can match eol */ YY_RULE_SETUP -#line 149 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 149 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 149 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1); return ARRAY; @@ -19219,7 +20451,7 @@ /* rule 27 can match eol */ YY_RULE_SETUP -#line 153 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 153 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 153 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng); return CHAR; @@ -19228,13 +20460,13 @@ case 28: YY_RULE_SETUP -#line 158 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 158 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 158 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { return ELLIPSIS; } YY_BREAK case 29: YY_RULE_SETUP -#line 159 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 159 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 159 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { return yytext[0]; } YY_BREAK /* ignore pp-directives */ @@ -19242,13 +20474,13 @@ /* rule 30 can match eol */ YY_RULE_SETUP -#line 162 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 162 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 162 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" {lexer_line.line++;} YY_BREAK case 31: YY_RULE_SETUP -#line 164 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 164 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 164 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { error_at_line (&lexer_line, "unexpected character `%s'", yytext); } @@ -19257,35 +20489,35 @@ case 32: YY_RULE_SETUP -#line 169 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 169 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 169 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_comment); } YY_BREAK case 33: /* rule 33 can match eol */ YY_RULE_SETUP -#line 170 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 170 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 170 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { lexer_line.line++; } YY_BREAK case 34: -#line 172 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 172 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 172 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" case 35: /* rule 35 can match eol */ -#line 173 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 173 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 173 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" case 36: /* rule 36 can match eol */ YY_RULE_SETUP -#line 173 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 173 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 173 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 37: /* rule 37 can match eol */ YY_RULE_SETUP -#line 174 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 174 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 174 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { update_lineno (yytext, yyleng); } YY_BREAK case 38: @@ -19294,7 +20526,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 175 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 175 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 175 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK @@ -19302,16 +20534,16 @@ /* rule 39 can match eol */ YY_RULE_SETUP -#line 178 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 178 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 178 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { lexer_line.line++; } YY_BREAK case 40: -#line 180 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 180 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 180 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" case 41: YY_RULE_SETUP -#line 180 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 180 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 180 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 42: @@ -19320,29 +20552,29 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 181 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 181 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 181 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 43: YY_RULE_SETUP -#line 183 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 183 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 183 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(INITIAL); } YY_BREAK case 44: YY_RULE_SETUP -#line 184 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 184 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 184 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { BEGIN(in_struct); } YY_BREAK case 45: -#line 187 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 187 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 187 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" case 46: YY_RULE_SETUP -#line 187 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 187 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 187 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" { error_at_line (&lexer_line, "unterminated comment or string; unexpected EOF"); @@ -19351,13 +20583,13 @@ /* rule 47 can match eol */ YY_RULE_SETUP -#line 192 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 192 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 192 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 48: YY_RULE_SETUP -#line 194 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 194 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 194 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 1650 "gengtype-lex.c" @@ -19381,7 +20613,7 @@ #define YYTABLES_NAME "yytables" -#line 194 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 194 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.01/gcc/gengtype-lex.l" ++#line 194 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.02/gcc/gengtype-lex.l" @@ -20276,6 +21508,178 @@ struct data_in *data_in; struct lto_input_block ib_main; unsigned int i; +--- a/src/gcc/ipa-split.c ++++ b/src/gcc/ipa-split.c +@@ -130,6 +130,10 @@ + + struct split_point best_split_point; + ++/* Set of basic blocks that are not allowed to dominate a split point. */ ++ ++static bitmap forbidden_dominators; ++ + static tree find_retval (basic_block return_bb); + + /* Callback for walk_stmt_load_store_addr_ops. If T is non-SSA automatic +@@ -270,6 +274,83 @@ + return ok; + } + ++/* If STMT is a call, check the callee against a list of forbidden ++ predicate functions. If a match is found, look for uses of the ++ call result in condition statements that compare against zero. ++ For each such use, find the block targeted by the condition ++ statement for the nonzero result, and set the bit for this block ++ in the forbidden dominators bitmap. The purpose of this is to avoid ++ selecting a split point where we are likely to lose the chance ++ to optimize away an unused function call. */ ++ ++static void ++check_forbidden_calls (gimple stmt) ++{ ++ imm_use_iterator use_iter; ++ use_operand_p use_p; ++ tree lhs; ++ ++ /* At the moment, __builtin_constant_p is the only forbidden ++ predicate function call (see PR49642). */ ++ if (!gimple_call_builtin_p (stmt, BUILT_IN_CONSTANT_P)) ++ return; ++ ++ lhs = gimple_call_lhs (stmt); ++ ++ if (!lhs || TREE_CODE (lhs) != SSA_NAME) ++ return; ++ ++ FOR_EACH_IMM_USE_FAST (use_p, use_iter, lhs) ++ { ++ tree op1; ++ basic_block use_bb, forbidden_bb; ++ enum tree_code code; ++ edge true_edge, false_edge; ++ gimple use_stmt = USE_STMT (use_p); ++ ++ if (gimple_code (use_stmt) != GIMPLE_COND) ++ continue; ++ ++ /* Assuming canonical form for GIMPLE_COND here, with constant ++ in second position. */ ++ op1 = gimple_cond_rhs (use_stmt); ++ code = gimple_cond_code (use_stmt); ++ use_bb = gimple_bb (use_stmt); ++ ++ extract_true_false_edges_from_block (use_bb, &true_edge, &false_edge); ++ ++ /* We're only interested in comparisons that distinguish ++ unambiguously from zero. */ ++ if (!integer_zerop (op1) || code == LE_EXPR || code == GE_EXPR) ++ continue; ++ ++ if (code == EQ_EXPR) ++ forbidden_bb = false_edge->dest; ++ else ++ forbidden_bb = true_edge->dest; ++ ++ bitmap_set_bit (forbidden_dominators, forbidden_bb->index); ++ } ++} ++ ++/* If BB is dominated by any block in the forbidden dominators set, ++ return TRUE; else FALSE. */ ++ ++static bool ++dominated_by_forbidden (basic_block bb) ++{ ++ unsigned dom_bb; ++ bitmap_iterator bi; ++ ++ EXECUTE_IF_SET_IN_BITMAP (forbidden_dominators, 1, dom_bb, bi) ++ { ++ if (dominated_by_p (CDI_DOMINATORS, bb, BASIC_BLOCK (dom_bb))) ++ return true; ++ } ++ ++ return false; ++} ++ + /* We found an split_point CURRENT. NON_SSA_VARS is bitmap of all non ssa + variables used and RETURN_BB is return basic block. + See if we can split function here. */ +@@ -411,6 +492,18 @@ + " Refused: split part has non-ssa uses\n"); + return; + } ++ ++ /* If the split point is dominated by a forbidden block, reject ++ the split. */ ++ if (!bitmap_empty_p (forbidden_dominators) ++ && dominated_by_forbidden (current->entry_bb)) ++ { ++ if (dump_file && (dump_flags & TDF_DETAILS)) ++ fprintf (dump_file, ++ " Refused: split point dominated by forbidden block\n"); ++ return; ++ } ++ + /* See if retval used by return bb is computed by header or split part. + When it is computed by split part, we need to produce return statement + in the split part and add code to header to pass it around. +@@ -1329,6 +1422,10 @@ + return 0; + } + ++ /* Initialize bitmap to track forbidden calls. */ ++ forbidden_dominators = BITMAP_ALLOC (NULL); ++ calculate_dominance_info (CDI_DOMINATORS); ++ + /* Compute local info about basic blocks and determine function size/time. */ + VEC_safe_grow_cleared (bb_info, heap, bb_info_vec, last_basic_block + 1); + memset (&best_split_point, 0, sizeof (best_split_point)); +@@ -1350,6 +1447,7 @@ + this_time = estimate_num_insns (stmt, &eni_time_weights) * freq; + size += this_size; + time += this_time; ++ check_forbidden_calls (stmt); + + if (dump_file && (dump_flags & TDF_DETAILS)) + { +@@ -1371,6 +1469,7 @@ + BITMAP_FREE (best_split_point.split_bbs); + todo = TODO_update_ssa | TODO_cleanup_cfg; + } ++ BITMAP_FREE (forbidden_dominators); + VEC_free (bb_info, heap, bb_info_vec); + bb_info_vec = NULL; + return todo; +--- a/src/gcc/java/ChangeLog ++++ b/src/gcc/java/ChangeLog +@@ -1,3 +1,8 @@ ++2012-01-23 Andreas Schwab ++ ++ * lang.c (java_init_options_struct): Set ++ frontend_set_flag_trapping_math. ++ + 2011-10-26 Release Manager + + * GCC 4.6.2 released. +--- a/src/gcc/java/lang.c ++++ b/src/gcc/java/lang.c +@@ -1,6 +1,6 @@ + /* Java(TM) language-specific utility routines. + Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, +- 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc. ++ 2005, 2006, 2007, 2008, 2010, 2012 Free Software Foundation, Inc. + + This file is part of GCC. + +@@ -550,6 +550,7 @@ + + /* In Java floating point operations never trap. */ + opts->x_flag_trapping_math = 0; ++ opts->frontend_set_flag_trapping_math = true; + + /* In Java arithmetic overflow always wraps around. */ + opts->x_flag_wrapv = 1; --- a/src/gcc/loop-doloop.c +++ b/src/gcc/loop-doloop.c @@ -78,6 +78,8 @@ @@ -20400,6 +21804,64 @@ */ condition = gen_rtx_fmt_ee (NE, VOIDmode, inc_src, const1_rtx); +@@ -334,14 +394,11 @@ + describes the loop, DESC describes the number of iterations of the + loop, and DOLOOP_INSN is the low-overhead looping insn to emit at the + end of the loop. CONDITION is the condition separated from the +- DOLOOP_SEQ. COUNT is the number of iterations of the LOOP. +- ZERO_EXTEND_P says to zero extend COUNT after the increment of it to +- word_mode from FROM_MODE. */ ++ DOLOOP_SEQ. COUNT is the number of iterations of the LOOP. */ + + static void + doloop_modify (struct loop *loop, struct niter_desc *desc, +- rtx doloop_seq, rtx condition, rtx count, +- bool zero_extend_p, enum machine_mode from_mode) ++ rtx doloop_seq, rtx condition, rtx count) + { + rtx counter_reg; + rtx tmp, noloop = NULL_RTX; +@@ -415,11 +472,7 @@ + } + + if (increment_count) +- count = simplify_gen_binary (PLUS, from_mode, count, const1_rtx); +- +- if (zero_extend_p) +- count = simplify_gen_unary (ZERO_EXTEND, word_mode, +- count, from_mode); ++ count = simplify_gen_binary (PLUS, mode, count, const1_rtx); + + /* Insert initialization of the count register into the loop header. */ + start_sequence (); +@@ -555,7 +608,6 @@ + struct niter_desc *desc; + unsigned word_mode_size; + unsigned HOST_WIDE_INT word_mode_max; +- bool zero_extend_p = false; + + if (dump_file) + fprintf (dump_file, "Doloop: Processing loop %d.\n", loop->num); +@@ -630,7 +682,8 @@ + { + if (word_mode_size > GET_MODE_BITSIZE (mode)) + { +- zero_extend_p = true; ++ count = simplify_gen_unary (ZERO_EXTEND, word_mode, ++ count, mode); + iterations = simplify_gen_unary (ZERO_EXTEND, word_mode, + iterations, mode); + iterations_max = simplify_gen_unary (ZERO_EXTEND, word_mode, +@@ -674,8 +727,7 @@ + return false; + } + +- doloop_modify (loop, desc, doloop_seq, condition, count, +- zero_extend_p, mode); ++ doloop_modify (loop, desc, doloop_seq, condition, count); + return true; + } + --- a/src/gcc/lto/ChangeLog +++ b/src/gcc/lto/ChangeLog @@ -1,3 +1,10 @@ @@ -24918,6 +26380,33 @@ } /* Returns 1 if OP is an operand that is a CONST_INT. */ +@@ -3023,6 +3027,7 @@ + static int search_ofs; + enum reg_class cl; + HARD_REG_SET live; ++ df_ref *def_rec; + int i; + + gcc_assert (from < MAX_INSNS_PER_PEEP2 + 1); +@@ -3036,12 +3041,14 @@ + + while (from != to) + { +- HARD_REG_SET this_live; ++ gcc_assert (peep2_insn_data[from].insn != NULL_RTX); ++ ++ /* Don't use registers set or clobbered by the insn. */ ++ for (def_rec = DF_INSN_DEFS (peep2_insn_data[from].insn); ++ *def_rec; def_rec++) ++ SET_HARD_REG_BIT (live, DF_REF_REGNO (*def_rec)); + + from = peep2_buf_position (from + 1); +- gcc_assert (peep2_insn_data[from].insn != NULL_RTX); +- REG_SET_TO_HARD_REG_SET (this_live, peep2_insn_data[from].live_before); +- IOR_HARD_REG_SET (live, this_live); + } + + cl = (class_str[0] == 'r' ? GENERAL_REGS --- a/src/gcc/regcprop.c +++ b/src/gcc/regcprop.c @@ -418,10 +418,9 @@ @@ -25696,7 +27185,131 @@ +extern bool default_legitimate_constant_p (enum machine_mode, rtx); --- a/src/gcc/testsuite/ChangeLog +++ b/src/gcc/testsuite/ChangeLog -@@ -1,3 +1,287 @@ +@@ -1,3 +1,411 @@ ++2012-01-30 Bin Cheng ++ ++ Backport from mainline. ++ 2012-01-30 Bin Cheng ++ ++ PR target/51835 ++ * gcc.target/arm/pr51835.c: New testcase. ++ ++2012-01-28 Tobias Burnus ++ ++ PR fortran/52022 ++ * gfortran.dg/dummy_procedure_7.f90: New. ++ ++2012-01-25 Jason Merrill ++ ++ PR target/51934 ++ * g++.dg/torture/pr51344.C: Limit to x86. ++ ++2012-01-25 Tobias Burnus ++ ++ PR fortran/51966 ++ * gfortran.dg/derived_constructor_char_3.f90: New. ++ ++2012-01-24 Tobias Burnus ++ ++ PR fortran/51948 ++ * gfortran.dg/move_alloc_12.f90: New. ++ ++2012-01-21 Tobias Burnus ++ ++ PR fortran/51913 ++ * gfortran.dg/class_47.f90: New. ++ ++2012-01-21 Eric Botcazou ++ ++ * gnat.dg/renaming5.ad[sb]: New test. ++ ++2012-01-20 Kai Tietz ++ ++ * g++.dg/torture/pr51344.C: Fix typo. ++ ++2012-01-19 Kai Tietz ++ ++ * g++.dg/torture/pr51344.C: New test. ++ ++2012-01-19 Tobias Burnus ++ ++ PR fortran/51904 ++ * gfortran.dg/intrinsic_size_2.f90: New. ++ ++2012-01-18 Bill Schmidt ++ ++ PR tree-optimization/49642 ++ * gcc.dg/tree-ssa/pr49642.c: New test. ++ ++2012-01-16 Jason Merrill ++ ++ PR c++/51854 ++ * g++.dg/abi/mangle60.C: New. ++ ++ PR c++/51868 ++ * g++.dg/cpp0x/rv-bitfield.C: New. ++ * g++.dg/cpp0x/rv-bitfield2.C: New. ++ ++2012-01-15 Uros Bizjak ++ ++ PR rtl-optimization/51821 ++ * gcc.dg/pr51821.c: New test. ++ ++2012-01-14 Tobias Burnus ++ ++ Backported from mainline ++ 2012-01-14 Tobias Burnus ++ ++ PR fortran/51800 ++ * gfortran.dg/init_flag_8.f90: New. ++ * gfortran.dg/init_flag_9.f90: New. ++ ++2012-01-12 Matthew Gretton-Dann ++ ++ Backport from mainline: ++ 2012-01-11 Matthew Gretton-Dann ++ ++ * testsuite/gcc.c-torture/execute/20120110-1.c: New testcase. ++ ++2012-01-10 Joseph Myers ++ ++ * gcc.c-torture/execute/doloop-1.c, ++ gcc.c-torture/execute/doloop-2.c: New tests. ++ ++2012-01-09 Martin Jambor ++ ++ PR tree-optimization/51759 ++ * g++.dg/ipa/pr51759.C: New test. ++ ++2012-01-09 Ramana Radhakrishnan ++ ++ Backport from mainline: ++ 2011-11-04 Jiangning Liu ++ ++ PR rtl-optimization/38644 ++ * gcc.target/arm/stack-red-zone.c: New. ++ ++2012-01-09 Andrew Stubbs ++ ++ Backport from mainline: ++ ++ 2012-01-06 Andrew Stubbs ++ ++ * gcc.target/arm/headmerge-2.c: Adjust scan pattern. ++ ++2012-01-06 Richard Sandiford ++ ++ PR middle-end/48660 ++ * g++.dg/pr48660.C: New test. ++ ++2012-01-06 Eric Botcazou ++ ++ * ada/acats/overflow.lst: Add cb20004. ++ ++2012-01-05 Eric Botcazou ++ ++ * gcc.c-torture/execute/20120104-1.c: New test. ++ +2012-01-04 Richard Guenther + + PR tree-optimization/49651 @@ -25984,7 +27597,7 @@ 2011-10-26 Release Manager * GCC 4.6.2 released. -@@ -9,9 +293,9 @@ +@@ -9,9 +417,9 @@ 2011-10-20 Uros Bizjak @@ -25997,6 +27610,37 @@ 2011-10-19 Jason Merrill +--- a/src/gcc/testsuite/ada/acats/overflow.lst ++++ b/src/gcc/testsuite/ada/acats/overflow.lst +@@ -14,3 +14,4 @@ + c460008 + c460011 + c4a012b ++cb20004 +--- a/src/gcc/testsuite/g++.dg/abi/mangle60.C ++++ b/src/gcc/testsuite/g++.dg/abi/mangle60.C +@@ -0,0 +1,21 @@ ++// PR c++/51854 ++// { dg-options "" } ++// { dg-excess-errors "" { xfail *-*-* } } ++ ++template struct A; ++ ++template ++char foo(U, V); ++ ++// { dg-final { scan-assembler "_Z3barIiEvP1AIXszcl3foocvT__ELCi0_42EEEE" } } ++template ++void bar(A *); ++ ++// { dg-final { scan-assembler "_Z3bazIiEvP1AIXszcl3foocvT__ELCf00000000_00000000EEEE" } } ++template ++void baz(A *); ++ ++int main() { ++ bar(0); ++ baz(0); ++} --- a/src/gcc/testsuite/g++.dg/cpp0x/auto31.C +++ b/src/gcc/testsuite/g++.dg/cpp0x/auto31.C @@ -0,0 +1,12 @@ @@ -26089,6 +27733,41 @@ +} + +template void Boo(int); +--- a/src/gcc/testsuite/g++.dg/cpp0x/rv-bitfield.C ++++ b/src/gcc/testsuite/g++.dg/cpp0x/rv-bitfield.C +@@ -0,0 +1,12 @@ ++// { dg-options -std=c++0x } ++ ++struct A ++{ ++ int i : 1; ++}; ++ ++int main() ++{ ++ A a; ++ static_cast(a.i); ++} +--- a/src/gcc/testsuite/g++.dg/cpp0x/rv-bitfield2.C ++++ b/src/gcc/testsuite/g++.dg/cpp0x/rv-bitfield2.C +@@ -0,0 +1,17 @@ ++// PR c++/51868 ++// { dg-options -std=c++0x } ++ ++struct A { ++ A() {} ++ A(const A&) {} ++ A(A&&) {} ++}; ++ ++struct B { ++ A a; ++ int f : 1; ++}; ++ ++B func() { ++ return B(); ++} --- a/src/gcc/testsuite/g++.dg/cpp0x/rv-cast3.C +++ b/src/gcc/testsuite/g++.dg/cpp0x/rv-cast3.C @@ -0,0 +1,18 @@ @@ -26178,6 +27857,35 @@ + // *** glibc detected *** ./test: free(): invalid next size (fast) + delete d; +} +--- a/src/gcc/testsuite/g++.dg/ipa/pr51759.C ++++ b/src/gcc/testsuite/g++.dg/ipa/pr51759.C +@@ -0,0 +1,26 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2" } */ ++ ++extern "C" void abort (void); ++struct S ++{ ++ void __attribute__((noinline)) set(unsigned val) ++ { ++ data = val; ++ if (data != val) ++ abort (); ++ } ++ int pad0; ++ unsigned pad1 : 8; ++ unsigned data : 24; ++ int pad2; ++}; ++int main() ++{ ++ S s; ++ s.pad2 = -1; ++ s.set(0); ++ if (s.pad2 != -1) ++ abort (); ++} ++ --- a/src/gcc/testsuite/g++.dg/other/enum2.C +++ b/src/gcc/testsuite/g++.dg/other/enum2.C @@ -0,0 +1,3 @@ @@ -26240,6 +27948,20 @@ + long size = reinterpret_cast(t_size); + return (size == t_end - t_start); +} +--- a/src/gcc/testsuite/g++.dg/torture/pr51344.C ++++ b/src/gcc/testsuite/g++.dg/torture/pr51344.C +@@ -0,0 +1,11 @@ ++/* { dg-do compile { target { i?86-*-* && ilp32 } } } */ ++class A; ++ ++template ++class B ++{ ++ friend __attribute__((cdecl)) A& operator >>(A& a, B& b) ++ { ++ return a; ++ } ++}; --- a/src/gcc/testsuite/g++.dg/tree-ssa/pr50622.C +++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr50622.C @@ -0,0 +1,30 @@ @@ -26496,6 +28218,96 @@ + + return 0; +} +--- a/src/gcc/testsuite/gcc.c-torture/execute/20120105-1.c ++++ b/src/gcc/testsuite/gcc.c-torture/execute/20120105-1.c +@@ -0,0 +1,24 @@ ++struct __attribute__((packed)) S ++{ ++ int a, b, c; ++}; ++ ++static int __attribute__ ((noinline,noclone)) ++extract(const char *p) ++{ ++ struct S s; ++ __builtin_memcpy (&s, p, sizeof(struct S)); ++ return s.a; ++} ++ ++volatile int i; ++ ++int main (void) ++{ ++ char p[sizeof(struct S) + 1]; ++ ++ __builtin_memset (p, 0, sizeof(struct S) + 1); ++ i = extract (p + 1); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.c-torture/execute/20120111-1.c ++++ b/src/gcc/testsuite/gcc.c-torture/execute/20120111-1.c +@@ -0,0 +1,18 @@ ++#include ++#include ++ ++uint32_t f0a (uint64_t arg2) __attribute__((noinline)); ++ ++uint32_t ++f0a (uint64_t arg) ++{ ++ return ~(arg > -3); ++} ++ ++int main() { ++ uint32_t r1; ++ r1 = f0a (12094370573988097329ULL); ++ if (r1 != ~0U) ++ abort (); ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.c-torture/execute/doloop-1.c ++++ b/src/gcc/testsuite/gcc.c-torture/execute/doloop-1.c +@@ -0,0 +1,18 @@ ++#include ++ ++extern void exit (int); ++extern void abort (void); ++ ++volatile unsigned int i; ++ ++int ++main (void) ++{ ++ unsigned char z = 0; ++ ++ do ++i; ++ while (--z > 0); ++ if (i != UCHAR_MAX + 1U) ++ abort (); ++ exit (0); ++} +--- a/src/gcc/testsuite/gcc.c-torture/execute/doloop-2.c ++++ b/src/gcc/testsuite/gcc.c-torture/execute/doloop-2.c +@@ -0,0 +1,18 @@ ++#include ++ ++extern void exit (int); ++extern void abort (void); ++ ++volatile unsigned int i; ++ ++int ++main (void) ++{ ++ unsigned short z = 0; ++ ++ do ++i; ++ while (--z > 0); ++ if (i != USHRT_MAX + 1U) ++ abort (); ++ exit (0); ++} --- a/src/gcc/testsuite/gcc.c-torture/execute/pr51323.c +++ b/src/gcc/testsuite/gcc.c-torture/execute/pr51323.c @@ -0,0 +1,35 @@ @@ -27218,6 +29030,34 @@ + abort (); + return 0; +} +--- a/src/gcc/testsuite/gcc.dg/pr51821.c ++++ b/src/gcc/testsuite/gcc.dg/pr51821.c +@@ -0,0 +1,25 @@ ++/* { dg-do run } */ ++/* { dg-options "-std=c99 -O2" } */ ++/* { dg-options "-std=c99 -O2 -msse" { target { i?86-*-* x86_64-*-* } } } */ ++/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */ ++ ++extern void abort (void); ++ ++unsigned int __attribute__((noinline)) ++test (int shift_size) ++{ ++ unsigned long long res = ~0; ++ ++ return res << shift_size; ++} ++ ++int ++main () ++{ ++ int dst = 32; ++ ++ if (test (dst) != 0) ++ abort (); ++ ++ return 0; ++} --- a/src/gcc/testsuite/gcc.dg/sms-10.c +++ b/src/gcc/testsuite/gcc.dg/sms-10.c @@ -0,0 +1,118 @@ @@ -27339,6 +29179,46 @@ + +/* { dg-final { scan-rtl-dump-times "SMS succeeded" 1 "sms" { target powerpc*-*-* } } } */ +/* { dg-final { cleanup-rtl-dump "sms" } } */ +--- a/src/gcc/testsuite/gcc.dg/sms-11.c ++++ b/src/gcc/testsuite/gcc.dg/sms-11.c +@@ -0,0 +1,37 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -fmodulo-sched -fmodulo-sched-allow-regmoves -fdump-rtl-sms" } */ ++ ++extern void abort (void); ++ ++float out[4][4] = { 6, 6, 7, 5, 6, 7, 5, 5, 6, 4, 4, 4, 6, 2, 3, 4 }; ++ ++void ++invert (void) ++{ ++ int i, j, k = 0, swap; ++ float tmp[4][4] = { 5, 6, 7, 5, 6, 7, 5, 5, 4, 4, 4, 4, 3, 2, 3, 4 }; ++ ++ for (i = 0; i < 4; i++) ++ { ++ for (j = i + 1; j < 4; j++) ++ if (tmp[j][i] > tmp[i][i]) ++ swap = j; ++ ++ if (swap != i) ++ tmp[i][k] = tmp[swap][k]; ++ } ++ ++ for (i = 0; i < 4; i++) ++ for (j = 0; j < 4; j++) ++ if (tmp[i][j] != out[i][j]) ++ abort (); ++} ++ ++int ++main () ++{ ++ invert (); ++ return 0; ++} ++ ++/* { dg-final { cleanup-rtl-dump "sms" } } */ --- a/src/gcc/testsuite/gcc.dg/sms-9.c +++ b/src/gcc/testsuite/gcc.dg/sms-9.c @@ -0,0 +1,60 @@ @@ -27567,6 +29447,58 @@ + } + return 0; +} +--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr49642.c ++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr49642.c +@@ -0,0 +1,49 @@ ++/* Verify that ipa-split is disabled following __builtin_constant_p. */ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -fdump-tree-optimized" } */ ++ ++typedef unsigned int u32; ++typedef unsigned long long u64; ++ ++static inline __attribute__((always_inline)) __attribute__((const)) ++int __ilog2_u32(u32 n) ++{ ++ int bit; ++ asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n)); ++ return 31 - bit; ++} ++ ++ ++static inline __attribute__((always_inline)) __attribute__((const)) ++int __ilog2_u64(u64 n) ++{ ++ int bit; ++ asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n)); ++ return 63 - bit; ++} ++ ++ ++ ++static u64 ehca_map_vaddr(void *caddr); ++ ++struct ehca_shca { ++ u32 hca_cap_mr_pgsize; ++}; ++ ++static u64 ehca_get_max_hwpage_size(struct ehca_shca *shca) ++{ ++ return 1UL << ( __builtin_constant_p(shca->hca_cap_mr_pgsize) ? ( (shca->hca_cap_mr_pgsize) < 1 ? ____ilog2_NaN() : (shca->hca_cap_mr_pgsize) & (1ULL << 63) ? 63 : (shca->hca_cap_mr_pgsize) & (1ULL << 62) ? 62 : (shca->hca_cap_mr_pgsize) & (1ULL << 61) ? 61 : (shca->hca_cap_mr_pgsize) & (1ULL << 60) ? 60 : (shca->hca_cap_mr_pgsize) & (1ULL << 59) ? 59 : (shca->hca_cap_mr_pgsize) & (1ULL << 58) ? 58 : (shca->hca_cap_mr_pgsize) & (1ULL << 57) ? 57 : (shca->hca_cap_mr_pgsize) & (1ULL << 56) ? 56 : (shca->hca_cap_mr_pgsize) & (1ULL << 55) ? 55 : (shca->hca_cap_mr_pgsize) & (1ULL << 54) ? 54 : (shca->hca_cap_mr_pgsize) & (1ULL << 53) ? 53 : (shca->hca_cap_mr_pgsize) & (1ULL << 52) ? 52 : (shca->hca_cap_mr_pgsize) & (1ULL << 51) ? 51 : (shca->hca_cap_mr_pgsize) & (1ULL << 50) ? 50 : (shca->hca_cap_mr_pgsize) & (1ULL << 49) ? 49 : (shca->hca_cap_mr_pgsize) & (1ULL << 48) ? 48 : (shca->hca_cap_mr_pgsize) & (1ULL << 47) ? 47 : (shca->hca_cap_mr_pgsize) & (1ULL << 46) ? 46 : (shca->hca_cap_mr_pgsize) & (1ULL << 45) ? 45 : (shca->hca_cap_mr_pgsize) & (1ULL << 44) ? 44 : (shca->hca_cap_mr_pgsize) & (1ULL << 43) ? 43 : (shca->hca_cap_mr_pgsize) & (1ULL << 42) ? 42 : (shca->hca_cap_mr_pgsize) & (1ULL << 41) ? 41 : (shca->hca_cap_mr_pgsize) & (1ULL << 40) ? 40 : (shca->hca_cap_mr_pgsize) & (1ULL << 39) ? 39 : (shca->hca_cap_mr_pgsize) & (1ULL << 38) ? 38 : (shca->hca_cap_mr_pgsize) & (1ULL << 37) ? 37 : (shca->hca_cap_mr_pgsize) & (1ULL << 36) ? 36 : (shca->hca_cap_mr_pgsize) & (1ULL << 35) ? 35 : (shca->hca_cap_mr_pgsize) & (1ULL << 34) ? 34 : (shca->hca_cap_mr_pgsize) & (1ULL << 33) ? 33 : (shca->hca_cap_mr_pgsize) & (1ULL << 32) ? 32 : (shca->hca_cap_mr_pgsize) & (1ULL << 31) ? 31 : (shca->hca_cap_mr_pgsize) & (1ULL << 30) ? 30 : (shca->hca_cap_mr_pgsize) & (1ULL << 29) ? 29 : (shca->hca_cap_mr_pgsize) & (1ULL << 28) ? 28 : (shca->hca_cap_mr_pgsize) & (1ULL << 27) ? 27 : (shca->hca_cap_mr_pgsize) & (1ULL << 26) ? 26 : (shca->hca_cap_mr_pgsize) & (1ULL << 25) ? 25 : (shca->hca_cap_mr_pgsize) & (1ULL << 24) ? 24 : (shca->hca_cap_mr_pgsize) & (1ULL << 23) ? 23 : (shca->hca_cap_mr_pgsize) & (1ULL << 22) ? 22 : (shca->hca_cap_mr_pgsize) & (1ULL << 21) ? 21 : (shca->hca_cap_mr_pgsize) & (1ULL << 20) ? 20 : (shca->hca_cap_mr_pgsize) & (1ULL << 19) ? 19 : (shca->hca_cap_mr_pgsize) & (1ULL << 18) ? 18 : (shca->hca_cap_mr_pgsize) & (1ULL << 17) ? 17 : (shca->hca_cap_mr_pgsize) & (1ULL << 16) ? 16 : (shca->hca_cap_mr_pgsize) & (1ULL << 15) ? 15 : (shca->hca_cap_mr_pgsize) & (1ULL << 14) ? 14 : (shca->hca_cap_mr_pgsize) & (1ULL << 13) ? 13 : (shca->hca_cap_mr_pgsize) & (1ULL << 12) ? 12 : (shca->hca_cap_mr_pgsize) & (1ULL << 11) ? 11 : (shca->hca_cap_mr_pgsize) & (1ULL << 10) ? 10 : (shca->hca_cap_mr_pgsize) & (1ULL << 9) ? 9 : (shca->hca_cap_mr_pgsize) & (1ULL << 8) ? 8 : (shca->hca_cap_mr_pgsize) & (1ULL << 7) ? 7 : (shca->hca_cap_mr_pgsize) & (1ULL << 6) ? 6 : (shca->hca_cap_mr_pgsize) & (1ULL << 5) ? 5 : (shca->hca_cap_mr_pgsize) & (1ULL << 4) ? 4 : (shca->hca_cap_mr_pgsize) & (1ULL << 3) ? 3 : (shca->hca_cap_mr_pgsize) & (1ULL << 2) ? 2 : (shca->hca_cap_mr_pgsize) & (1ULL << 1) ? 1 : (shca->hca_cap_mr_pgsize) & (1ULL << 0) ? 0 : ____ilog2_NaN() ) : (sizeof(shca->hca_cap_mr_pgsize) <= 4) ? __ilog2_u32(shca->hca_cap_mr_pgsize) : __ilog2_u64(shca->hca_cap_mr_pgsize) ); ++} ++ ++int x(struct ehca_shca *shca) { ++ return ehca_get_max_hwpage_size(shca); ++} ++ ++int y(struct ehca_shca *shca) ++{ ++ return ehca_get_max_hwpage_size(shca); ++} ++ ++/* { dg-final { scan-tree-dump-times "____ilog2_NaN" 0 "optimized" } } */ ++/* { dg-final { cleanup-tree-dump "optimized" } } */ --- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr51583.c +++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr51583.c @@ -0,0 +1,34 @@ @@ -28715,6 +30647,27 @@ +} + +/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/pr51799.c ++++ b/src/gcc/testsuite/gcc.dg/vect/pr51799.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++ ++typedef signed char int8_t; ++typedef unsigned char uint8_t; ++typedef signed short int16_t; ++typedef unsigned long uint32_t; ++void ++f0a (uint32_t * __restrict__ result, int8_t * __restrict__ arg1, ++ uint32_t * __restrict__ arg4, int8_t temp_6) ++{ ++ int idx; ++ for (idx = 0; idx < 416; idx += 1) ++ { ++ result[idx] = (uint8_t)(((arg1[idx] << 7) + arg4[idx]) * temp_6); ++ } ++} ++ ++/* { dg-final { cleanup-tree-dump "vect" } } */ --- a/src/gcc/testsuite/gcc.dg/vect/slp-11.c +++ b/src/gcc/testsuite/gcc.dg/vect/slp-11.c @@ -1,113 +0,0 @@ @@ -31635,7 +33588,7 @@ + --- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-u8.c +++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-u8.c -@@ -0,0 +1,65 @@ +@@ -0,0 +1,64 @@ +/* { dg-require-effective-target vect_int } */ +/* { dg-require-effective-target vect_shift } */ + @@ -31697,10 +33650,9 @@ + return 0; +} + -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 1 "vect" { target vect_widen_shift } } } */ ++/* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 2 "vect" { target vect_widen_shift } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ -+ --- a/src/gcc/testsuite/gcc.dg/vect/vect.exp +++ b/src/gcc/testsuite/gcc.dg/vect/vect.exp @@ -75,15 +75,20 @@ @@ -31920,6 +33872,16 @@ +/* { dg-final { scan-assembler-not "__sync_" } } */ +/* { dg-final { scan-assembler-not "ldrex\t" } } */ +/* { dg-final { scan-assembler-not "strex\t" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/headmerge-2.c ++++ b/src/gcc/testsuite/gcc.target/arm/headmerge-2.c +@@ -1,6 +1,6 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ +-/* { dg-final { scan-assembler-times "120" 1 } } */ ++/* { dg-final { scan-assembler-times "120\n" 1 } } */ + + extern void foo1 (int); + extern void foo2 (int); --- a/src/gcc/testsuite/gcc.target/arm/mla-2.c +++ b/src/gcc/testsuite/gcc.target/arm/mla-2.c @@ -0,0 +1,9 @@ @@ -35586,6 +37548,23 @@ +} + +/* { dg-final { scan-assembler "umlal" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/pr51835.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr51835.c +@@ -0,0 +1,14 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -mfloat-abi=hard -mfpu=fpv4-sp-d16" } */ ++/* { dg-require-effective-target arm_thumb2_ok } */ ++ ++int func1 (double d) ++{ ++ return (int)d; ++} ++unsigned int func2 (double d) ++{ ++ return (unsigned int)d; ++} ++ ++/* { dg-final { scan-assembler-times "fmrrd\[\\t \]+r0,\[\\t \]*r1,\[\\t \]*d0" 2 } } */ --- a/src/gcc/testsuite/gcc.target/arm/shiftable.c +++ b/src/gcc/testsuite/gcc.target/arm/shiftable.c @@ -0,0 +1,63 @@ @@ -35731,6 +37710,21 @@ +} + +/* { dg-final { scan-assembler "smlatt" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/stack-red-zone.c ++++ b/src/gcc/testsuite/gcc.target/arm/stack-red-zone.c +@@ -0,0 +1,12 @@ ++/* No stack red zone. PR38644. */ ++/* { dg-options "-mthumb -O2" } */ ++/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp" } } */ ++ ++extern int doStreamReadBlock (int *, char *, int size, int); ++ ++char readStream (int *s) ++{ ++ char c = 0; ++ doStreamReadBlock (s, &c, 1, *s); ++ return c; ++} --- a/src/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c +++ b/src/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c @@ -0,0 +1,13 @@ @@ -36540,6 +38534,49 @@ + sum[4] = s12; + ; +} +--- a/src/gcc/testsuite/gfortran.dg/class_47.f90 ++++ b/src/gcc/testsuite/gfortran.dg/class_47.f90 +@@ -0,0 +1,40 @@ ++! { dg-do compile } ++! ++! PR fortran/51913 ++! ++! Contributed by Alexander Tismer ++! ++MODULE m_sparseMatrix ++ ++ implicit none ++ ++ type :: sparseMatrix_t ++ ++ end type sparseMatrix_t ++END MODULE m_sparseMatrix ++ ++!=============================================================================== ++module m_subroutine ++! USE m_sparseMatrix !< when uncommenting this line program works fine ++ ++ implicit none ++ ++ contains ++ subroutine test(matrix) ++ use m_sparseMatrix ++ class(sparseMatrix_t), pointer :: matrix ++ end subroutine ++end module ++ ++!=============================================================================== ++PROGRAM main ++ use m_subroutine ++ USE m_sparseMatrix ++ implicit none ++ ++ CLASS(sparseMatrix_t), pointer :: sparseMatrix ++ ++ call test(sparseMatrix) ++END PROGRAM ++ ++! { dg-final { cleanup-modules "m_sparsematrix m_subroutine" } } --- a/src/gcc/testsuite/gfortran.dg/default_initialization_5.f90 +++ b/src/gcc/testsuite/gfortran.dg/default_initialization_5.f90 @@ -0,0 +1,66 @@ @@ -36609,6 +38646,107 @@ +! { dg-final { scan-tree-dump-times "my_data.head = &tgt" 1 "original" } } +! { dg-final { cleanup-tree-dump "original" } } +! { dg-final { cleanup-modules "arr_m list_m worker_mod" } } +--- a/src/gcc/testsuite/gfortran.dg/derived_constructor_char_3.f90 ++++ b/src/gcc/testsuite/gfortran.dg/derived_constructor_char_3.f90 +@@ -0,0 +1,30 @@ ++! { dg-do compile } ++! ++! PR fortran/51966 ++! ++! Contributed by Peter Wind ++! ++ ++ type :: Deriv ++ character(len=10) :: name ++ end type ++ character(len=8), dimension(2), parameter :: & ++ DEF_ECOSYSTEMS = (/ "Gridxxxx", "StringYY" /) ++ ++ type(Deriv), save :: DepEcoSystem = Deriv(DEF_ECOSYSTEMS(1)) ++ ++ if (DepEcoSystem%name /= "Gridxxxx" & ++ .or. DepEcoSystem%name(9:9) /= ' ' & ++ .or. DepEcoSystem%name(10:10) /= ' ') call abort() ++ DepEcoSystem%name = 'ABCDEFGHIJ' ++ call Init_EcoSystems() ++ if (DepEcoSystem%name /= "StringYY" & ++ .or. DepEcoSystem%name(9:9) /= ' ' & ++ .or. DepEcoSystem%name(10:10) /= ' ') call abort() ++ ++contains ++ subroutine Init_EcoSystems() ++ integer :: i =2 ++ DepEcoSystem = Deriv(DEF_ECOSYSTEMS(i)) ++ end subroutine Init_EcoSystems ++end +--- a/src/gcc/testsuite/gfortran.dg/dummy_procedure_7.f90 ++++ b/src/gcc/testsuite/gfortran.dg/dummy_procedure_7.f90 +@@ -0,0 +1,65 @@ ++! { dg-do run } ++! ++! PR fortran/52022 ++! ++ ++module check ++ integer, save :: icheck = 0 ++end module check ++ ++module t ++implicit none ++ contains ++subroutine sol(cost) ++ use check ++ interface ++ function cost(p) result(y) ++ double precision,dimension(:) :: p ++ double precision,dimension(:),allocatable :: y ++ end function cost ++ end interface ++ ++ if (any (cost([1d0,2d0]) /= [2.d0, 4.d0])) call abort () ++ icheck = icheck + 1 ++end subroutine ++ ++end module t ++ ++module tt ++ procedure(cost1),pointer :: pcost ++contains ++ subroutine init() ++ pcost=>cost1 ++ end subroutine ++ ++ function cost1(x) result(y) ++ double precision,dimension(:) :: x ++ double precision,dimension(:),allocatable :: y ++ allocate(y(2)) ++ y=2d0*x ++ end function cost1 ++ ++ ++ ++ function cost(x) result(y) ++ double precision,dimension(:) :: x ++ double precision,dimension(:),allocatable :: y ++ allocate(y(2)) ++ y=pcost(x) ++ end function cost ++end module ++ ++program test ++ use tt ++ use t ++ use check ++ implicit none ++ ++ call init() ++ if (any (cost([3.d0,7.d0]) /= [6.d0, 14.d0])) call abort () ++ if (icheck /= 0) call abort () ++ call sol(cost) ++ if (icheck /= 1) call abort () ++end program test ++ ++! { dg-final { cleanup-modules "t tt check" } } --- a/src/gcc/testsuite/gfortran.dg/implicit_pure_1.f90 +++ b/src/gcc/testsuite/gfortran.dg/implicit_pure_1.f90 @@ -0,0 +1,53 @@ @@ -36685,6 +38823,101 @@ + +! { dg-final { scan-module-absence "m" "IMPLICIT_PURE" } } +! { dg-final { cleanup-modules "m" } } +--- a/src/gcc/testsuite/gfortran.dg/init_flag_8.f90 ++++ b/src/gcc/testsuite/gfortran.dg/init_flag_8.f90 +@@ -0,0 +1,18 @@ ++! { dg-do compile } ++! { dg-options "-fno-automatic -finit-local-zero" } ++! ++! PR fortran/51800 ++! ++! Contributed by Mario Baumann ++! ++ SUBROUTINE FOO( N, A ) ++ IMPLICIT NONE ++ INTEGER :: N ++ INTEGER :: A(1:N) ++ INTEGER :: J ++ INTEGER :: DUMMY(1:N) ++ DO J=1,N ++ DUMMY(J) = 0 ++ A(J) = DUMMY(J) ++ END DO ++ END SUBROUTINE FOO +--- a/src/gcc/testsuite/gfortran.dg/init_flag_9.f90 ++++ b/src/gcc/testsuite/gfortran.dg/init_flag_9.f90 +@@ -0,0 +1,15 @@ ++! { dg-do run } ++! { dg-options "-finit-character=89" } ++! ++! PR fortran/51800 ++! ++ ++subroutine foo(n) ++ character(len=n) :: str ++! print *, str ++ if (str /= repeat ('Y', n)) call abort() ++end subroutine foo ++ ++call foo(3) ++call foo(10) ++end +--- a/src/gcc/testsuite/gfortran.dg/intrinsic_size_2.f90 ++++ b/src/gcc/testsuite/gfortran.dg/intrinsic_size_2.f90 +@@ -0,0 +1,17 @@ ++! { dg-do compile } ++! ++! PR fortran/51904 ++! ++! Contributed by David Sagan. ++! ++ ++call qp_draw_polyline_basic([1.0,2.0]) ++contains ++subroutine qp_draw_polyline_basic (x) ++ implicit none ++ real :: x(:), f ++ integer :: i ++ f = 0 ++ print *, size(f*x) ++end subroutine ++end +--- a/src/gcc/testsuite/gfortran.dg/move_alloc_12.f90 ++++ b/src/gcc/testsuite/gfortran.dg/move_alloc_12.f90 +@@ -0,0 +1,33 @@ ++! { dg-do compile } ++! ++! PR fortran/51948 ++! ++ type :: t ++ end type t ++contains ++ function func(x, y) ++ class(t) :: y ++ type(t), allocatable :: func ++ type(t), allocatable :: x ++ ++ select type (y) ++ type is(t) ++ call move_alloc (x, func) ++ end select ++ end function ++ ++ function func2(x, y) ++ class(t) :: y ++ class(t), allocatable :: func2 ++ class(t), allocatable :: x ++ ++ block ++ block ++ select type (y) ++ type is(t) ++ call move_alloc (x, func2) ++ end select ++ end block ++ end block ++ end function ++end --- a/src/gcc/testsuite/gfortran.dg/move_alloc_8.f90 +++ b/src/gcc/testsuite/gfortran.dg/move_alloc_8.f90 @@ -0,0 +1,106 @@ @@ -36985,6 +39218,47 @@ + function Negate (Bitmap : Bitmap_T) return Bitmap_T; + +end Frame_Overflow; +--- a/src/gcc/testsuite/gnat.dg/renaming5.adb ++++ b/src/gcc/testsuite/gnat.dg/renaming5.adb +@@ -0,0 +1,30 @@ ++-- PR ada/46192 ++-- Testcase by Rolf Ebert ++ ++-- { dg-do compile } ++-- { dg-options "-O2 -fdump-tree-optimized" } ++ ++with System; use System; ++ ++package body Renaming5 is ++ ++ type Bits_In_Byte is array (0 .. 7) of Boolean; ++ pragma Pack (Bits_In_Byte); ++ ++ A : Bits_In_Byte; ++ for A'Address use System'To_Address(16#c0#); ++ pragma Volatile (A); ++ ++ B : Bits_In_Byte renames A; ++ ++ procedure Proc is ++ begin ++ while B (0) = False loop ++ null; ++ end loop; ++ end; ++ ++end Renaming5; ++ ++-- { dg-final { scan-tree-dump-times "goto" 2 "optimized" } } ++-- { dg-final { cleanup-tree-dump "optimized" } } +--- a/src/gcc/testsuite/gnat.dg/renaming5.ads ++++ b/src/gcc/testsuite/gnat.dg/renaming5.ads +@@ -0,0 +1,5 @@ ++package Renaming5 is ++ ++ procedure Proc; ++ ++end Renaming5; --- a/src/gcc/testsuite/gnat.dg/specs/addr1.ads +++ b/src/gcc/testsuite/gnat.dg/specs/addr1.ads @@ -15,7 +15,7 @@ @@ -38061,7 +40335,7 @@ --- a/src/gcc/tree-sra.c +++ b/src/gcc/tree-sra.c -@@ -1020,26 +1020,28 @@ +@@ -1020,31 +1020,52 @@ return false; } @@ -38101,33 +40375,51 @@ return true; return false; -@@ -1071,7 +1073,11 @@ + } + ++/* Return true if EXP is a memory reference less aligned than what the access ++ ACC would require. This is invoked only on strict-alignment targets. */ ++ ++static bool ++tree_non_aligned_mem_for_access_p (tree exp, struct access *acc) ++{ ++ unsigned int acc_align; ++ ++ /* The alignment of the access is that of its expression. However, it may ++ have been artificially increased, e.g. by a local alignment promotion, ++ so we cap it to the alignment of the type of the base, on the grounds ++ that valid sub-accesses cannot be more aligned than that. */ ++ acc_align = get_object_alignment (acc->expr, BIGGEST_ALIGNMENT); ++ if (acc->base && acc_align > TYPE_ALIGN (TREE_TYPE (acc->base))) ++ acc_align = TYPE_ALIGN (TREE_TYPE (acc->base)); ++ ++ return tree_non_aligned_mem_p (exp, acc_align); ++} ++ + /* Scan expressions occuring in STMT, create access structures for all accesses + to candidates for scalarization and remove those candidates which occur in + statements or expressions that prevent them from being split apart. Return +@@ -1071,7 +1092,8 @@ if (lacc) { lacc->grp_assignment_write = 1; - lacc->grp_unscalarizable_region |= tree_non_mode_aligned_mem_p (rhs); -+ if (STRICT_ALIGNMENT -+ && tree_non_aligned_mem_p (rhs, -+ get_object_alignment (lhs, -+ BIGGEST_ALIGNMENT))) ++ if (STRICT_ALIGNMENT && tree_non_aligned_mem_for_access_p (rhs, lacc)) + lacc->grp_unscalarizable_region = 1; } if (racc) -@@ -1080,7 +1086,11 @@ +@@ -1080,7 +1102,8 @@ if (should_scalarize_away_bitmap && !gimple_has_volatile_ops (stmt) && !is_gimple_reg_type (racc->type)) bitmap_set_bit (should_scalarize_away_bitmap, DECL_UID (racc->base)); - racc->grp_unscalarizable_region |= tree_non_mode_aligned_mem_p (lhs); -+ if (STRICT_ALIGNMENT -+ && tree_non_aligned_mem_p (lhs, -+ get_object_alignment (rhs, -+ BIGGEST_ALIGNMENT))) ++ if (STRICT_ALIGNMENT && tree_non_aligned_mem_for_access_p (lhs, racc)) + racc->grp_unscalarizable_region = 1; } if (lacc && racc -@@ -1435,29 +1445,67 @@ +@@ -1435,29 +1458,67 @@ return fold_build2_loc (loc, MEM_REF, exp_type, base, off); } @@ -38152,14 +40444,8 @@ + tree type = model->type, t; + VEC(tree,stack) *cr_stack = NULL; + - if (TREE_CODE (model->expr) == COMPONENT_REF) - { -- tree t, exp_type, fld = TREE_OPERAND (model->expr, 1); -- offset -= int_bit_position (fld); -- exp_type = TREE_TYPE (TREE_OPERAND (model->expr, 0)); -- t = build_ref_for_offset (loc, base, offset, exp_type, gsi, insert_after); -- return fold_build3_loc (loc, COMPONENT_REF, TREE_TYPE (fld), t, fld, -- NULL_TREE); ++ if (TREE_CODE (model->expr) == COMPONENT_REF) ++ { + tree expr = model->expr; + + /* Create a stack of the COMPONENT_REFs so later we can walk them in @@ -38181,15 +40467,18 @@ + expr = TREE_OPERAND (expr, 0); + type = TREE_TYPE (expr); + } while (TREE_CODE (expr) == COMPONENT_REF); - } -- else -- return build_ref_for_offset (loc, base, offset, model->type, -- gsi, insert_after); ++ } + + t = build_ref_for_offset (loc, base, offset, type, gsi, insert_after); + -+ if (TREE_CODE (model->expr) == COMPONENT_REF) -+ { + if (TREE_CODE (model->expr) == COMPONENT_REF) + { +- tree t, exp_type, fld = TREE_OPERAND (model->expr, 1); +- offset -= int_bit_position (fld); +- exp_type = TREE_TYPE (TREE_OPERAND (model->expr, 0)); +- t = build_ref_for_offset (loc, base, offset, exp_type, gsi, insert_after); +- return fold_build3_loc (loc, COMPONENT_REF, TREE_TYPE (fld), t, fld, +- NULL_TREE); + unsigned i; + tree expr; + @@ -38202,13 +40491,16 @@ + } + + VEC_free (tree, stack, cr_stack); -+ } + } +- else +- return build_ref_for_offset (loc, base, offset, model->type, +- gsi, insert_after); + + return t; } /* Construct a memory reference consisting of component_refs and array_refs to -@@ -2594,6 +2642,10 @@ +@@ -2594,6 +2655,10 @@ rhs = get_access_replacement (racc); if (!useless_type_conversion_p (lacc->type, racc->type)) rhs = fold_build1_loc (loc, VIEW_CONVERT_EXPR, lacc->type, rhs); @@ -38219,7 +40511,7 @@ } else { -@@ -2609,6 +2661,9 @@ +@@ -2609,6 +2674,9 @@ else rhs = build_ref_for_model (loc, top_racc->base, offset, lacc, new_gsi, true); @@ -38229,7 +40521,7 @@ } stmt = gimple_build_assign (get_access_replacement (lacc), rhs); -@@ -3604,7 +3659,8 @@ +@@ -3604,7 +3672,8 @@ || gimple_code (access->stmt) == GIMPLE_ASM)) return true; @@ -39307,7 +41599,26 @@ { --- a/src/gcc/tree-ssa-sccvn.c +++ b/src/gcc/tree-ssa-sccvn.c -@@ -2982,7 +2982,8 @@ +@@ -546,6 +546,7 @@ + tem1.type = TREE_TYPE (tem1.op0); + tem1.opcode = TREE_CODE (tem1.op0); + vro1 = &tem1; ++ deref1 = false; + } + if (deref2 && vro2->opcode == ADDR_EXPR) + { +@@ -554,7 +555,10 @@ + tem2.type = TREE_TYPE (tem2.op0); + tem2.opcode = TREE_CODE (tem2.op0); + vro2 = &tem2; ++ deref2 = false; + } ++ if (deref1 != deref2) ++ return false; + if (!vn_reference_op_eq (vro1, vro2)) + return false; + ++j; +@@ -2982,7 +2986,8 @@ /* ??? We should handle stores from calls. */ else if (TREE_CODE (lhs) == SSA_NAME) { @@ -41008,7 +43319,7 @@ oprnd0 = gimple_assign_rhs1 (stmt); *type_in = half_type; -@@ -641,10 +871,818 @@ +@@ -641,10 +871,820 @@ when doing outer-loop vectorization. */ gcc_assert (!nested_in_vect_loop_p (loop, last_stmt)); @@ -41365,13 +43676,15 @@ + { + use_lhs = gimple_assign_lhs (use_stmt); + use_type = TREE_TYPE (use_lhs); -+ /* Support only type promotion or signedess change. Check that USE_TYPE -+ is not bigger than the original type. */ ++ /* Support only type demotion or signedess change. */ + if (!INTEGRAL_TYPE_P (use_type) -+ || TYPE_PRECISION (new_type) > TYPE_PRECISION (use_type) -+ || TYPE_PRECISION (type) < TYPE_PRECISION (use_type)) ++ || TYPE_PRECISION (type) <= TYPE_PRECISION (use_type)) + return NULL; + ++ /* Check that NEW_TYPE is not bigger than the conversion result. */ ++ if (TYPE_PRECISION (new_type) > TYPE_PRECISION (use_type)) ++ return NULL; ++ + if (TYPE_UNSIGNED (new_type) != TYPE_UNSIGNED (use_type) + || TYPE_PRECISION (new_type) != TYPE_PRECISION (use_type)) + { @@ -41827,7 +44140,7 @@ /* Function vect_pattern_recog_1 Input: -@@ -669,29 +1707,33 @@ +@@ -669,29 +1709,33 @@ static void vect_pattern_recog_1 ( @@ -41869,7 +44182,7 @@ pattern_vectype = type_out ? type_out : type_in; } else -@@ -736,22 +1778,32 @@ +@@ -736,22 +1780,32 @@ } /* Mark the stmts that are involved in the pattern. */ @@ -41915,7 +44228,7 @@ } -@@ -761,8 +1813,8 @@ +@@ -761,8 +1815,8 @@ LOOP_VINFO - a struct_loop_info of a loop in which we want to look for computation idioms. @@ -41926,7 +44239,7 @@ also record some information in the struct_stmt_info of the relevant stmts, as explained below: -@@ -777,79 +1829,113 @@ +@@ -777,79 +1831,113 @@ S5: ... = ..use(a_0).. - - - Say the sequence {S1,S2,S3,S4} was detected as a pattern that can be diff -u gcc-4.6-4.6.2/debian/patches/gcc-system-root.diff gcc-4.6-4.6.2/debian/patches/gcc-system-root.diff --- gcc-4.6-4.6.2/debian/patches/gcc-system-root.diff +++ gcc-4.6-4.6.2/debian/patches/gcc-system-root.diff @@ -1,17 +1,42 @@ -# DP: Avoid include paths starting with a double slash +# DP: Remove trailing slash from system root directory ---- a/src/gcc/configure.ac -+++ b/src/gcc/configure.ac -@@ -733,8 +733,10 @@ - yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;; - *) TARGET_SYSTEM_ROOT=$with_sysroot ;; - esac -- -- TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"' +--- a/src/gcc/incpath.c ++++ b/src/gcc/incpath.c +@@ -172,7 +172,15 @@ + + /* Should this directory start with the sysroot? */ + if (sysroot && p->add_sysroot) +- str = concat (sysroot, p->fname, NULL); ++ { ++ char *sysroot_no_trailing_dir_separator = xstrdup (sysroot); ++ size_t sysroot_len = strlen (sysroot); + -+ if test "x$TARGET_SYSTEM_ROOT" != x/; then -+ TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"' -+ fi - CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)' - - if test "x$prefix" = xNONE; then ++ if (sysroot_len > 0 && sysroot[sysroot_len - 1] == DIR_SEPARATOR) ++ sysroot_no_trailing_dir_separator[sysroot_len - 1] = '\0'; ++ str = concat (sysroot_no_trailing_dir_separator, p->fname, NULL); ++ free (sysroot_no_trailing_dir_separator); ++ } + else if (!p->add_sysroot && relocated + && strncmp (p->fname, cpp_PREFIX, cpp_PREFIX_len) == 0) + { +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -2440,9 +2440,17 @@ + + if (target_system_root) + { ++ char *sysroot_no_trailing_dir_separator = xstrdup (target_system_root); ++ size_t sysroot_len = strlen (target_system_root); ++ ++ if (sysroot_len > 0 ++ && target_system_root[sysroot_len - 1] == DIR_SEPARATOR) ++ sysroot_no_trailing_dir_separator[sysroot_len - 1] = '\0'; ++ + if (target_sysroot_suffix) + prefix = concat (target_sysroot_suffix, prefix, NULL); +- prefix = concat (target_system_root, prefix, NULL); ++ prefix = concat (sysroot_no_trailing_dir_separator, prefix, NULL); ++ free (sysroot_no_trailing_dir_separator); + + /* We have to override this because GCC's notion of sysroot + moves along with GCC. */ diff -u gcc-4.6-4.6.2/debian/patches/pr47818.diff gcc-4.6-4.6.2/debian/patches/pr47818.diff --- gcc-4.6-4.6.2/debian/patches/pr47818.diff +++ gcc-4.6-4.6.2/debian/patches/pr47818.diff @@ -1,10 +1,8 @@ # DP: Fix PR ada/47818: Pragma Assert is rejected with No_Implementation_Pragmas restriction. -diff --git a/gcc/ada/sem_prag.adb b/gcc/ada/sem_prag.adb -index fd509c4..b5bae50 100644 --- a/src/gcc/ada/sem_prag.adb +++ b/src/gcc/ada/sem_prag.adb -@@ -6477,7 +6477,16 @@ package body Sem_Prag is +@@ -6477,7 +6477,16 @@ -- Set True if category of assertions referenced by Name enabled begin diff -u gcc-4.6-4.6.2/debian/patches/gcc-d-lang.diff gcc-4.6-4.6.2/debian/patches/gcc-d-lang.diff --- gcc-4.6-4.6.2/debian/patches/gcc-d-lang.diff +++ gcc-4.6-4.6.2/debian/patches/gcc-d-lang.diff @@ -1,7 +1,7 @@ # DP: Add D options and specs for the gcc driver. ---- /dev/null 2011-07-23 10:07:44.175344374 +0100 -+++ b/src/gcc/d/lang-specs.h 2011-07-09 23:51:52.807002983 +0100 +--- /dev/null ++++ b/src/gcc/d/lang-specs.h @@ -0,0 +1,53 @@ +/* GDC -- D front-end for GCC + Copyright (C) 2004 David Friedman @@ -56,8 +56,8 @@ + %{M} %{MM} %{!fsyntax-only:%(invoke_as)}}", D_D_SPEC, 1, 0 }, +#endif + ---- /dev/null 2011-07-23 10:07:44.175344374 +0100 -+++ b/src/gcc/d/lang.opt 2011-07-24 15:48:56.848040870 +0100 +--- /dev/null ++++ b/src/gcc/d/lang.opt @@ -0,0 +1,215 @@ +; GDC -- D front-end for GCC +; Copyright (C) 2004 David Friedman @@ -274,9 +274,9 @@ + +static_libphobos +Driver ---- a/src/gcc/gcc.c 2011-02-23 02:04:43.000000000 +0000 -+++ b/src/gcc/gcc.c 2011-07-12 21:55:05.805144355 +0100 -@@ -373,6 +373,7 @@ or with constant text in a single argume +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -373,6 +373,7 @@ assembler has done its job. %D Dump out a -L option for each directory in startfile_prefixes. If multilib_dir is set, extra entries are generated with it affixed. @@ -284,7 +284,7 @@ %l process LINK_SPEC as a spec. %L process LIB_SPEC as a spec. %G process LIBGCC_SPEC as a spec. -@@ -5095,6 +5096,17 @@ do_spec_1 (const char *spec, int inswitc +@@ -5095,6 +5096,17 @@ return value; break; diff -u gcc-4.6-4.6.2/debian/patches/gcc-multilib64-multiarch.diff gcc-4.6-4.6.2/debian/patches/gcc-multilib64-multiarch.diff --- gcc-4.6-4.6.2/debian/patches/gcc-multilib64-multiarch.diff +++ gcc-4.6-4.6.2/debian/patches/gcc-multilib64-multiarch.diff @@ -1,20 +1,16 @@ # DP: Use lib instead of lib64 as the 64bit system dir on biarch # DP: architectures defaulting to 64bit. -Index: gcc-4.6-4.6.1/src/gcc/config/s390/t-linux64 -=================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/s390/t-linux64 2011-08-20 16:05:05.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/s390/t-linux64 2011-08-20 16:08:42.440221785 +0000 +--- a/src/gcc/config/s390/t-linux64 ++++ b/src/gcc/config/s390/t-linux64 @@ -7,4 +7,4 @@ MULTILIB_OPTIONS = m64/m31 MULTILIB_DIRNAMES = 64 32 -MULTILIB_OSDIRNAMES = ../lib64:s390x-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):s390-linux-gnu +MULTILIB_OSDIRNAMES = ../lib:s390x-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):s390-linux-gnu -Index: gcc-4.6-4.6.1/src/gcc/config/rs6000/t-linux64 -=================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/rs6000/t-linux64 2011-08-20 16:08:08.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/rs6000/t-linux64 2011-08-20 16:09:43.770311733 +0000 +--- a/src/gcc/config/rs6000/t-linux64 ++++ b/src/gcc/config/rs6000/t-linux64 @@ -34,7 +34,7 @@ MULTILIB_OPTIONS = m64/m32 MULTILIB_DIRNAMES = 64 32 @@ -24,10 +20,8 @@ softfp_wrap_start := '\#ifndef __powerpc64__' softfp_wrap_end := '\#endif' -Index: gcc-4.6-4.6.1/src/gcc/config/sparc/t-linux64 -=================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/sparc/t-linux64 2011-08-20 16:05:05.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/sparc/t-linux64 2011-08-20 16:08:42.440221785 +0000 +--- a/src/gcc/config/sparc/t-linux64 ++++ b/src/gcc/config/sparc/t-linux64 @@ -26,7 +26,7 @@ MULTILIB_OPTIONS = m64/m32 @@ -37,10 +31,8 @@ LIBGCC = stmp-multilib INSTALL_LIBGCC = install-multilib -Index: gcc-4.6-4.6.1/src/gcc/config/i386/t-linux64 -=================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/i386/t-linux64 2011-08-20 16:06:59.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/i386/t-linux64 2011-08-20 16:08:42.440221785 +0000 +--- a/src/gcc/config/i386/t-linux64 ++++ b/src/gcc/config/i386/t-linux64 @@ -25,7 +25,7 @@ MULTILIB_OPTIONS = m64/m32 diff -u gcc-4.6-4.6.2/debian/patches/armhf-triplet.diff gcc-4.6-4.6.2/debian/patches/armhf-triplet.diff --- gcc-4.6-4.6.2/debian/patches/armhf-triplet.diff +++ gcc-4.6-4.6.2/debian/patches/armhf-triplet.diff @@ -1,8 +1,8 @@ # DP: add support for arm-linux-*eabi* triplets; useful for armhf ---- a/src/libjava/configure.ac.orig +--- a/src/libjava/configure.ac +++ b/src/libjava/configure.ac -@@ -924,7 +924,7 @@ +@@ -926,7 +926,7 @@ # on Darwin -single_module speeds up loading of the dynamic libraries. extra_ldflags_libjava=-Wl,-single_module ;; @@ -11,9 +11,9 @@ # Some of the ARM unwinder code is actually in libstdc++. We # could in principle replicate it in libgcj, but it's better to # have a dependency on libstdc++. ---- a/src/gcc/config.gcc.orig +--- a/src/gcc/config.gcc +++ b/src/gcc/config.gcc -@@ -822,7 +822,7 @@ +@@ -826,7 +826,7 @@ esac tmake_file="${tmake_file} t-linux arm/t-arm" case ${target} in @@ -22,7 +22,7 @@ tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h" tm_file="$tm_file ../../libgcc/config/arm/bpabi-lib.h" tmake_file="$tmake_file arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc" -@@ -850,7 +850,7 @@ +@@ -854,7 +854,7 @@ tm_file="dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/linux-gas.h arm/uclinux-elf.h glibc-stdint.h" tmake_file="arm/t-arm arm/t-arm-elf" case ${target} in @@ -31,9 +31,9 @@ tm_file="$tm_file arm/bpabi.h arm/uclinux-eabi.h" tm_file="$tm_file ../../libgcc/config/arm/bpabi-lib.h" tmake_file="$tmake_file arm/t-bpabi" ---- a/src/gcc/testsuite/lib/target-supports.exp.orig +--- a/src/gcc/testsuite/lib/target-supports.exp +++ b/src/gcc/testsuite/lib/target-supports.exp -@@ -3235,7 +3235,7 @@ +@@ -3265,7 +3265,7 @@ || [istarget i?86-*-*] || [istarget x86_64-*-*] || [istarget alpha*-*-*] @@ -42,7 +42,7 @@ || [istarget bfin*-*linux*] || [istarget hppa*-*linux*] || [istarget s390*-*-*] -@@ -3266,7 +3266,7 @@ +@@ -3296,7 +3296,7 @@ || [istarget i?86-*-*] || [istarget x86_64-*-*] || [istarget alpha*-*-*] @@ -51,9 +51,9 @@ || [istarget hppa*-*linux*] || [istarget s390*-*-*] || [istarget powerpc*-*-*] ---- a/src/gcc/ada/gcc-interface/Makefile.in.orig +--- a/src/gcc/ada/gcc-interface/Makefile.in +++ b/src/gcc/ada/gcc-interface/Makefile.in -@@ -1846,7 +1846,7 @@ +@@ -1841,7 +1841,7 @@ LIBRARY_VERSION := $(LIB_VERSION) endif @@ -62,9 +62,9 @@ LIBGNAT_TARGET_PAIRS = \ a-intnam.ads // ---- a/src/libstdc++-v3/testsuite/20_util/make_signed/requirements/typedefs-2.cc.orig +--- a/src/libstdc++-v3/testsuite/20_util/make_signed/requirements/typedefs-2.cc +++ b/src/libstdc++-v3/testsuite/20_util/make_signed/requirements/typedefs-2.cc @@ -1,5 +1,5 @@ // { dg-options "-std=gnu++0x -funsigned-char -fshort-enums" } diff -u gcc-4.6-4.6.2/debian/patches/pr49944.diff gcc-4.6-4.6.2/debian/patches/pr49944.diff --- gcc-4.6-4.6.2/debian/patches/pr49944.diff +++ gcc-4.6-4.6.2/debian/patches/pr49944.diff @@ -14,8 +14,6 @@ pthread_attr_setinheritsched, pthread_attr_getinheritsched, Time_Slice_Supported): Copy from s-osinte-freebsd.ads. -Index: b/src/gcc/ada/s-osinte-kfreebsd-gnu.ads -=================================================================== --- a/src/gcc/ada/s-osinte-kfreebsd-gnu.ads +++ b/src/gcc/ada/s-osinte-kfreebsd-gnu.ads @@ -7,7 +7,7 @@ @@ -179,8 +177,6 @@ type pthread_attr_t is record detachstate : int; schedpolicy : int; -Index: b/src/gcc/ada/gcc-interface/Makefile.in -=================================================================== --- a/src/gcc/ada/gcc-interface/Makefile.in +++ b/src/gcc/ada/gcc-interface/Makefile.in @@ -1125,9 +1125,7 @@ @@ -205,8 +201,6 @@ s-taspri.ads

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