bionic/linux-snapdragon: 4.15.0-1058.64 -proposed tracker

Hardware Certification have begun testing this -proposed kernel.

Hardware Certification have completed testing this -proposed kernel. No regressions were observed, results are available here: http://people.canonical.com/~hwcert/sru-testing/snapdragon/4.15.0-1058.64/snapdragon-4.15-proposed-published.html

This bug was fixed in the package linux-snapdragon - 4.15.0-1058.64

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linux-snapdragon (4.15.0-1058.64) bionic; urgency=medium

  * linux-snapdragon: 4.15.0-1058.64 -proposed tracker (LP: #1834925)

  * Initial support for Qualcomm Snapdragon 820 chipset (LP: #1832012)
    - clk: qcom: Register the gdscs before the clocks
    - scsi: ufs: Extract devfreq registration
    - scsi: ufs: Use freq table with devfreq
    - scsi: ufshcd: Fix NULL pointer dereference for in ufshcd_init
    - Revert "PCI: qcom: add runtime pm support to pcie_port"
    - PCI: qcom: add runtime pm support to pcie_port
    - PCI: qcom: Fix error handling in runtime PM support
    - PCI: qcom: Don't deassert reset GPIO during probe
    - Revert "phy: qcom-qmp: Fix failure path in phy_init functions"
    - Revert "phy: qcom-qmp: Fix phy pipe clock gating"
    - Revert "phy: qcom-qmp: Fix failure path in phy_init functions"
    - phy: qcom-qmp: Fix failure path in phy_init functions
    - phy: qcom-qmp: Fix phy pipe clock gating
    - phy: qcom-qmp: Adapt to clk_bulk_* APIs
    - phy: qcom-qmp: Power-on PHY before initialization
    - phy: qcom-qusb2: Power-on PHY before initialization
    - phy: qcom-qmp: Fix PHY block reset sequence
    - phy: qcom-qmp: Move SERDES/PCS START after PHY reset
    - phy: qcom-qusb2: Add support for different register layouts
    - phy: qcom-qusb2: Add support for QUSB2 V2 version
    - phy: qcom-qmp: Move register offsets to header file
    - phy: qcom-qmp: Add register offsets for QMP V3 PHY
    - phy: qcom-qmp: Add support for QMP V3 USB3 PHY
    - phy: Add USB speed related PHY modes
    - phy: qcom-qusb2: Add support for runtime PM
    - phy: qcom-qmp: Add support for runtime PM
    - phy: add SPDX identifier to QMP and QUSB2 PHY drivers
    - phy: qcom-qmp: Enable pipe_clk before PHY initialization
    - dt-bindings: phy-qcom-qusb2: Update binding for QUSB2 V2 version
    - dt-bindings: phy-qcom-usb2: Add support to override tuning values
    - phy: qcom-qmp: Add QMP V3 USB3 UNI PHY support for sdm845
    - phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845
    - phy: qcom-usb-hs: Mark expected switch fall-through
    - phy: qcom-qmp: Quiet -EPROBE_DEFER from qcom_qmp_phy_probe()
    - phy: qcom-qusb2: Quiet -EPROBE_DEFER from qusb2_phy_probe()
    - phy: Convert to using %pOFn instead of device_node.name
    - phy: Update PHY power control sequence
    - phy: General struct and field cleanup
    - phy: Add QMP phy based UFS phy support for sdm845
    - phy: qcom-ufs: Remove stale methods that handle ref clk
    - scsi/ufs: qcom: Remove ufs_qcom_phy_*() calls from host
    - phy: qcom-ufs: Declare 20nm qcom ufs qmp phy as Broken
    - phy: qcom-qusb2: Use HSTX_TRIM fused value as is
    - phy: qcom-qusb2: Fix HSTX_TRIM tuning with fused value for SDM845
    - phy: core: Allow phy_pm_runtime_xxx API calls with NULL phy
    - phy: core: rework phy_set_mode to accept phy mode and submode
    - phy: qcom-qmp: Utilize fully-specified DT registers
    - phy: qcom-qmp: Expose provided clocks to DT
    - phy: qcom-ufs: Use iopoll.h readl_poll_timeout macro
    - phy: qcom-qmp: Add QMP V3 USB3 PHY support for msm8998
    - phy: qc...

All tasks have been completed and the bug is being set to Fix Released