FSMDesigner

Registered 2012-04-19 by Richard Leys

FSMDesigner from CAG@Uni Heidelberg

FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.

Project information

Maintainer:
Richard Leys
Driver:
Richard Leys
Development focus:

5.2 series 

lp:fsmdesigner 
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Programming Languages:
C++
Licences:
Creative Commons - Attribution Share Alike
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FSMDesigner 5.2 series is the current focus of development

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Latest version is 5.2.0
released on 2012-08-16

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