Linaro GCC 4.6-2011.11

Milestone information

Project:
Linaro GCC
Series:
4.6
Version:
4.6-2011.11
Released:
2011-11-10  
Registrant:
Michael Hope
Release registered:
2011-11-10
Active:
No. Drivers cannot target bugs and blueprints to this milestone.  

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3 Andrew Stubbs, 1 Dr. David Alan Gilbert, 1 Ira Rosen, 1 Michael Hope
Blueprints:
5 Implemented
Bugs:
2 Fix Released

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Release notes 

The Linaro Toolchain Working Group is pleased to announce the 2011.11
release of Linaro GCC 4.6.

No changes were made in Linaro GCC 4.5 or Linaro GDB this month and,
as such, no release has been made.

Linaro GCC 4.6 2011.11 is the ninth release in the 4.6 series. Based
off the latest GCC 4.6.2 release, it contains a range of vectoriser
performance improvements and general bug fixes.

Interesting changes include:
 * Updates to 4.6.2
 * A new -mtune=native flag to auto-detect the CPU of the build machine
 * A new -mtune=generic-* flag to tune for a blend of processors
 * Use of the ARMv7 unaligned access support for unaligned variables
 * Vectorization of widening shifts
 * Support for different load offsets and swap operands in SLP
 * Support for multiple types in SLP
 * Support for scheduling register moves in SMS

Fixes:
 * LP: #836401 ICE on a | (b << negative-constant)

The source tarballs are available from:
 https://launchpad.net/gcc-linaro/+milestone/4.6-2011.11

Downloads are available from the Linaro GCC page on Launchpad:
 https://launchpad.net/gcc-linaro

More information on the features and issues are available from the
release page:
 https://launchpad.net/gcc-linaro/4.6/4.6-2011.11

Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain

Bugs: https://bugs.launchpad.net/gcc-linaro/

Questions? https://ask.linaro.org/

Interested in commercial support? inquire at support@linaro.org

Changelog 

View the full changelog

2011-11-04 Revital Eres <email address hidden>

 Backport from mainline -r180673:

 gcc/
 * modulo-sched.c (generate_prolog_epilog): Mark prolog
 and epilog as BB_DISABLE_SCHEDULE.
 (mark_loop_unsched): New function.
 (sms_schedule): Call it.

2011-10-26 Andrew Stubbs <email address hidden>

 Merge FSF GCC 4.6.2 Release (svn branches/gcc-4_6-branch 180515).

2011-10-27 Ira Rosen <email address hidden>

 Backport from mainline:

 2011-10-18 Ira Rosen <email address hidden>

 gcc/
 * doc/md.texi (vec_widen_ushiftl_hi, vec_widen_ushiftl_lo,
 vec_widen_sshiftl_hi, vec_widen_sshiftl_lo): Document.
 * tree-pretty-print.c (dump_generic_node): Handle WIDEN_LSHIFT_EXPR,
 VEC_WIDEN_LSHIFT_HI_EXPR and VEC_WIDEN_LSHIFT_LO_EXPR.
 (op_code_prio): Likewise.
 (op_symbol_code): Handle WIDEN_LSHIFT_EXPR.
 * optabs.c (optab_for_tree_code): Handle
 VEC_WIDEN_LSHIFT_HI_EXPR and VEC_WIDEN_LSHIFT_LO_EXPR.
 (init-optabs): Initialize optab codes for vec_widen_u/sshiftl_hi/lo.
 * optabs.h (enum optab_index): Add OTI_vec_widen_u/sshiftl_hi/lo.
 * genopinit.c (optabs): Initialize the new optabs.
 * expr.c (expand_expr_real_2): Handle
 VEC_WIDEN_LSHIFT_HI_EXPR and VEC_WIDEN_LSHIFT_LO_EXPR.
 * gimple-pretty-print.c (dump_binary_rhs): Likewise.
 * tree-vectorizer.h (NUM_PATTERNS): Increase to 8.
 * tree.def (WIDEN_LSHIFT_EXPR, VEC_WIDEN_LSHIFT_HI_EXPR,
 VEC_WIDEN_LSHIFT_LO_EXPR): New.
 * cfgexpand.c (expand_debug_expr): Handle new tree codes.
 * tree-vect-patterns.c (vect_vect_recog_func_ptrs): Add
 vect_recog_widen_shift_pattern.
 (vect_handle_widen_mult_by_const): Rename...
 (vect_handle_widen_op_by_const): ...to this. Handle shifts.
 Add a new argument, update documentation.
 (vect_recog_widen_mult_pattern): Assume that only second
 operand can be constant. Update call to
 vect_handle_widen_op_by_const.
 (vect_recog_over_widening_pattern): Fix typo.
 (vect_recog_widen_shift_pattern): New.
 * tree-vect-stmts.c (vectorizable_type_promotion): Handle
 widening shifts.
 (supportable_widening_operation): Likewise.
 * tree-inline.c (estimate_operator_cost): Handle new tree codes.
 * tree-vect-generic.c (expand_vector_operations_1): Likewise.
 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
 * config/arm/neon.md (neon_vec_<US>shiftl_<mode>): New.
 (vec_widen_<US>shiftl_lo_<mode>, neon_vec_<US>shiftl_hi_<mode>,
 vec_widen_<US>shiftl_hi_<mode>, neon_vec_<US>shift_left_<mode>):
 Likewise.
 * config/arm/predicates.md (const_neon_scalar_shift_amount_operand):
 New.
 * config/arm/iterators.md (V_innermode): New.
 * tree-vect-slp.c (vect_build_slp_tree): Require same shift operand
 for widening shift.

 gcc/testsuite
 * testsuite/lib/target-supports.exp
 (check_effective_target_vect_widen_shift): New.
 * gcc.dg/vect/vect-widen-shift-s16.c: New.
 * gcc.dg/vect/vect-widen-shift-s8.c: New.
 * gcc.dg/vect/vect-widen-shift-u16.c: New.
 * gcc.dg/vect/vect-widen-shift-u8.c: New.

 2011-10-06 Jakub Jelinek <email address hidden>

 gcc/
 * tree-vect-patterns.c (vect_pattern_recog_1): Use
 vect_recog_func_ptr typedef for the first argument.
 (vect_pattern_recog): Rename vect_recog_func_ptr variable
 to vect_recog_func, use vect_recog_func_ptr typedef for it.

 2011-10-16 Ira Rosen <email address hidden>

 gcc/
 PR tree-optimization/50727
 * tree-vect-patterns.c (vect_operation_fits_smaller_type): Add
 DEF_STMT to the list of statements to be replaced by the
 pattern statements.

 2011-10-09 Ira Rosen <email address hidden>

 gcc/
 PR tree-optimization/50635
 * tree-vect-patterns.c (vect_handle_widen_mult_by_const): Add
 DEF_STMT to the list of statements to be replaced by the
 pattern statements.
 (vect_handle_widen_mult_by_const): Don't check TYPE_OUT.

2011-10-27 Ira Rosen <email address hidden>

 Backport from mainline:
 2011-10-16 Ira Rosen <email address hidden>

 gcc/
 * tree-vect-stmts.c (vectorizable_load): For SLP without permutation
 treat the first load of the node as the first element in its
 interleaving chain.
 * tree-vect-slp.c (vect_get_and_check_slp_defs): Swap the operands if
 necessary and possible.
 (vect_build_slp_tree): Add new argument. Allow load groups of any size
 in basic blocks. Keep all the loads for further permutation check.
 Use the new argument to determine if there is a permutation. Update
 the recursive calls.
 (vect_supported_load_permutation_p): Allow subchains of interleaving
 chains in basic block vectorization.
 (vect_analyze_slp_instance): Update the call to vect_build_slp_tree.
 Check load permutation based on the new parameter.
 (vect_schedule_slp_instance): Don't start from the first element in
 interleaving chain unless the loads are permuted.

 gcc/testsuite/
 * gcc.dg/vect/bb-slp-29.c: New test.

2011-10-21 Andrew Stubbs <email address hidden>

 Backport from FSF mainline:

 2011-10-21 Andrew Stubbs <email address hidden>

 PR target/50809

 gcc/
 * config/arm/driver-arm.c (vendors): Make static.

2011-10-19 Andrew Stubbs <email address hidden>

 Backport from FSF:

 2011-10-18 Andrew Stubbs <email address hidden>

 PR tree-optimization/50717

 gcc/
 * tree-ssa-math-opts.c (is_widening_mult_p): Remove the 'type'
 parameter. Calculate 'type' from stmt.
 (convert_mult_to_widen): Update call the is_widening_mult_p.
 (convert_plusminus_to_widen): Likewise.

 gcc/testsuite/
 * gcc.dg/pr50717-1.c: New file.
 * gcc.target/arm/wmul-12.c: Correct types.
 * gcc.target/arm/wmul-8.c: Correct types.

2011-10-19 Andrew Stubbs <email address hidden>

 Backport from FSF:

 2011-10-18 Andrew Stubbs <email address hidden>

 * config/arm/driver-arm.c (host_detect_local_cpu): Close the file
 before exiting.

 2011-10-18 Andrew Stubbs <email address hidden>

 gcc/
 * config.host (arm*-*-linux*): Add driver-arm.o and x-arm.
 * config/arm/arm.opt: Add 'native' processor_type and
 arm_arch enum values.
 * config/arm/arm.h (host_detect_local_cpu): New prototype.
 (EXTRA_SPEC_FUNCTIONS): New define.
 (MCPU_MTUNE_NATIVE_SPECS): New define.
 (DRIVER_SELF_SPECS): New define.
 * config/arm/driver-arm.c: New file.
 * config/arm/x-arm: New file.
 * doc/invoke.texi (ARM Options): Document -mcpu=native,
 -mtune=native and -march=native.

2011-10-19 Andrew Stubbs <email address hidden>

 Backport from FSF:

 2011-09-09 Andrew Stubbs <email address hidden>

 gcc/
 * config/arm/arm-cores.def (generic-armv7-a): New architecture.
 * config/arm/arm-tables.opt: Regenerate.
 * config/arm/arm-tune.md: Regenerate.
 * config/arm/arm.c (arm_file_start): Output .arch directive when
 user passes -mcpu=generic-*.
 (arm_issue_rate): Add genericv7a support.
 * config/arm/arm.h (EXTRA_SPECS): Add asm_cpu_spec.
 (ASM_CPU_SPEC): New define.
 * config/arm/elf.h (ASM_SPEC): Use %(asm_cpu_spec).
 * config/arm/semi.h (ASM_SPEC): Likewise.
 * doc/invoke.texi (ARM Options): Document -mcpu=generic-*
 and -mtune=generic-*.

2011-10-20 Michael Hope <email address hidden>

 Backport from mainline r180131:

 2011-10-18 Julian Brown <email address hidden>

 gcc/
 * config/arm/arm.c (arm_block_move_unaligned_straight)
 (arm_adjust_block_mem, arm_block_move_unaligned_loop)
 (arm_movmemqi_unaligned): New.
 (arm_gen_movmemqi): Support unaligned block copies.

 gcc/testsuite/
 * lib/target-supports.exp (check_effective_target_arm_unaligned): New.
 * gcc.target/arm/unaligned-memcpy-1.c: New.
 * gcc.target/arm/unaligned-memcpy-2.c: New.
 * gcc.target/arm/unaligned-memcpy-3.c: New.
 * gcc.target/arm/unaligned-memcpy-4.c: New.

2011-10-17 Richard Sandiford <email address hidden>

 gcc/
 Backport from mainline:

 2011-10-10 Richard Sandiford <email address hidden>

 * modulo-sched.c (ps_reg_move_info): Add num_consecutive_stages.
 (SCHED_FIRST_REG_MOVE, SCHED_NREG_MOVES): Delete.
 (node_sched_params): Remove first_reg_move and nreg_moves.
 (ps_num_consecutive_stages, extend_node_sched_params): New functions.
 (update_node_sched_params): Move up file.
 (print_node_sched_params): Print the stage. Don't dump info related
 to first_reg_move and nreg_moves.
 (set_columns_for_row): New function.
 (set_columns_for_ps): Move up file and use set_columns_for_row.
 (schedule_reg_move): New function.
 (schedule_reg_moves): Call extend_node_sched_params and
 schedule_reg_move. Extend size of uses bitmap. Initialize
 num_consecutive_stages. Return false if a move could not be
 scheduled.
 (apply_reg_moves): Don't emit moves here.
 (permute_partial_schedule): Handle register moves.
 (duplicate_insns_of_cycles): Remove for_prolog. Emit moves according
 to the same stage-count test as ddg nodes.
 (generate_prolog_epilog): Update calls accordingly.
 (sms_schedule): Allow move-scheduling to add a new first stage.

2011-10-17 Richard Sandiford <email address hidden>

 gcc/
 Backport from mainline:

 2011-10-10 Richard Sandiford <email address hidden>

 * modulo-sched.c (ps_insn): Adjust comment.
 (ps_reg_move_info): New structure.
 (partial_schedule): Add reg_moves field.
 (SCHED_PARAMS): Use node_sched_param_vec instead of node_sched_params.
 (node_sched_params): Turn first_reg_move into an identifier.
 (ps_reg_move): New function.
 (ps_rtl_insn): Cope with register moves.
 (ps_first_note): Adjust comment and assert that the instruction
 isn't a register move.
 (node_sched_params): Replace with...
 (node_sched_param_vec): ...this vector.
 (set_node_sched_params): Adjust accordingly.
 (print_node_sched_params): Take a partial schedule instead of a ddg.
 Use ps_rtl_insn and ps_reg_move.
 (generate_reg_moves): Rename to...
 (schedule_reg_moves): ...this. Remove rescan parameter. Record each
 move in the partial schedule, but don't emit it here. Don't perform
 register substitutions here either.
 (apply_reg_moves): New function.
 (duplicate_insns_of_cycles): Use register indices directly,
 rather than finding instructions using PREV_INSN. Use ps_reg_move.
 (sms_schedule): Call schedule_reg_moves before committing to
 a partial schedule. Try the next ii if the schedule fails.
 Use apply_reg_moves instead of generate_reg_moves. Adjust
 call to print_node_sched_params. Free node_sched_param_vec
 instead of node_sched_params.
 (create_partial_schedule): Initialize reg_moves.
 (free_partial_schedule): Free reg_moves.

2011-10-17 Richard Sandiford <email address hidden>

 gcc/
 Backport from mainline:

 2011-10-10 Richard Sandiford <email address hidden>

 * modulo-sched.c (ps_insn): Replace node field with an identifier.
 (SCHED_ASAP): Replace with..
 (NODE_ASAP): ...this macro.
 (SCHED_PARAMS): New macro.
 (SCHED_TIME, SCHED_FIRST_REG_MOVE, SCHED_NREG_MOVES, SCHED_ROW)
 (SCHED_STAGE, SCHED_COLUMN): Redefine using SCHED_PARAMS.
 (node_sched_params): Remove asap.
 (ps_rtl_insn, ps_first_note): New functions.
 (set_node_sched_params): Use XCNEWVEC. Don't copy across the
 asap values.
 (print_node_sched_params): Use SCHED_PARAMS and NODE_ASAP.
 (generate_reg_moves): Pass ids to the SCHED_* macros.
 (update_node_sched_params): Take a ps insn identifier rather than
 a node as parameter. Use ps_rtl_insn.
 (set_columns_for_ps): Update for above field and SCHED_* macro changes.
 (permute_partial_schedule): Use ps_rtl_insn and ps_first_note.
 (optimize_sc): Update for above field and SCHED_* macro changes.
 Update calls to try_scheduling_node_in_cycle and
 update_node_sched_params.
 (duplicate_insns_of_cycles): Adjust for above field and SCHED_*
 macro changes. Use ps_rtl_insn and ps_first_note.
 (sms_schedule): Pass ids to the SCHED_* macros.
 (get_sched_window): Adjust for above field and SCHED_* macro changes.
 Use NODE_ASAP instead of SCHED_ASAP.
 (try_scheduling_node_in_cycle): Remove node parameter. Update
 call to ps_add_node_check_conflicts. Pass ids to the SCHED_*
 macros.
 (sms_schedule_by_order): Update call to try_scheduling_node_in_cycle.
 (ps_insert_empty_row): Adjust for above field changes.
 (compute_split_row): Use ids rather than nodes.
 (verify_partial_schedule): Adjust for above field changes.
 (print_partial_schedule): Use ps_rtl_insn.
 (create_ps_insn): Take an id rather than a node.
 (ps_insn_find_column): Adjust for above field changes.
 Use ps_rtl_insn.
 (ps_insn_advance_column): Adjust for above field changes.
 (add_node_to_ps): Remove node parameter. Update call to
 create_ps_insn.
 (ps_has_conflicts): Use ps_rtl_insn.
 (ps_add_node_check_conflicts): Replace node parameter than an id.

2011-10-17 Richard Sandiford <email address hidden>

 gcc/
 Backport from mainline:

 2011-10-10 Richard Sandiford <email address hidden>

 * modulo-sched.c (undo_replace_buff_elem): Delete.
 (generate_reg_moves): Don't build and return an undo list.
 (free_undo_replace_buff): Delete.
 (sms_schedule): Adjust call to generate_reg_moves.
 Don't call free_undo_replace_buff.

2011-10-17 Richard Sandiford <email address hidden>

 gcc/
 Backport from mainline:

 2011-08-08 Richard Sandiford <email address hidden>

 * modulo-sched.c (get_sched_window): Use a table for the debug output.
 Print the current ii.
 (sms_schedule_by_order): Reduce whitespace in dump line.

2011-10-17 Richard Sandiford <email address hidden>

 gcc/
 Backport from mainline:

 2011-08-08 Richard Sandiford <email address hidden>

 * modulo-sched.c (get_sched_window): Use just one loop for predecessors
 and one loop for successors. Fix upper bound of memory range.

2011-10-17 Michael Hope <email address hidden>

 Backport from mainline r178852:

 2011-09-14 Julian Brown <email address hidden>

 gcc/
 * config/arm/arm.c (arm_override_options): Add unaligned_access
 support.
 (arm_file_start): Emit attribute for unaligned access as appropriate.
 * config/arm/arm.md (UNSPEC_UNALIGNED_LOAD)
 (UNSPEC_UNALIGNED_STORE): Add constants for unspecs.
 (insv, extzv): Add unaligned-access support.
 (extv): Change to expander. Likewise.
 (extzv_t1, extv_regsi): Add helpers.
 (unaligned_loadsi, unaligned_loadhis, unaligned_loadhiu)
 (unaligned_storesi, unaligned_storehi): New.
 (*extv_reg): New (previous extv implementation).
 * config/arm/arm.opt (munaligned_access): Add option.
 * config/arm/constraints.md (Uw): New constraint.
 * expmed.c (store_bit_field_1): Adjust bitfield numbering according
 to size of access, not size of unit, when BITS_BIG_ENDIAN !=
 BYTES_BIG_ENDIAN. Don't use bitfield accesses for
 volatile accesses when -fstrict-volatile-bitfields is in effect.
 (extract_bit_field_1): Likewise.

 Backport from mainline r172697:

 2011-04-19 Wei Guozhi <email address hidden>

 PR target/47855
 gcc/
 * config/arm/arm-protos.h (thumb1_legitimate_address_p): New prototype.
 * config/arm/arm.c (thumb1_legitimate_address_p): Remove the static
 linkage.
 * config/arm/constraints.md (Uu): New constraint.
 * config/arm/arm.md (*arm_movqi_insn): Compute attr "length".

2011-10-16 Ira Rosen <email address hidden>

 Backport from mainline:

 2011-09-27 Ira Rosen <email address hidden>

 gcc/
 * tree-vect-stmts.c (vectorizable_type_demotion): Handle basic block
 vectorization.
 (vectorizable_type_promotion): Likewise.
 (vect_analyze_stmt): Call vectorizable_type_demotion and
 vectorizable_type_promotion for basic blocks.
 (supportable_widening_operation): Don't assume loop vectorization.
 * tree-vect-slp.c (vect_build_slp_tree): Allow multiple types for
 basic blocks. Update vectorization factor for basic block
 vectorization.
 (vect_analyze_slp_instance): Allow multiple types for basic block
 vectorization. Recheck unrolling factor after construction of SLP
 instance.

 gcc/testsuite/
 * gcc.dg/vect/bb-slp-11.c: Expect to get vectorized with 64-bit
 vectors.
 * gcc.dg/vect/bb-slp-27.c: New.
 * gcc.dg/vect/bb-slp-28.c: New.

 2011-10-04 Ira Rosen <email address hidden>

 gcc/testsuite/
 * lib/target-supports.exp (check_effective_target_vect_multiple_sizes):
 Make et_vect_multiple_sizes_saved global.
 (check_effective_target_vect64): Make et_vect64_saved global.

2011-10-13 Andrew Stubbs <email address hidden>

 Backport from mainline:

 2011-10-07 Andrew Stubbs <email address hidden>

 gcc/
 * config/arm/predicates.md (shift_amount_operand): Remove constant
 range check.
 (shift_operator): Check range of constants for all shift operators.

 gcc/testsuite/
 * gcc.dg/pr50193-1.c: New file.
 * gcc.target/arm/shiftable.c: New file.

5 blueprints and 2 bugs targeted

Blueprint Priority Assignee Delivery
64 bit sync primitives (some work for this milestone) 4 High Dr. David Alan Gilbert  11 Implemented
Linaro GCC the product (some work for this milestone) 4 High Andrew Stubbs  11 Implemented
NEON widening left shift 3 Medium Ira Rosen  11 Implemented
Native tuning 3 Medium   11 Implemented
Unaligned struct access 3 Medium Michael Hope  11 Implemented
Bug report Importance Assignee Status
836401 #836401 ICE on a | (b << negative-constant) 3 High Andrew Stubbs  10 Fix Released
836401 #836401 ICE on a | (b << negative-constant) 3 High Andrew Stubbs  10 Fix Released
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