pcb

pcb pcb-4.1.3

bug fix release

Milestone information

Project:
pcb
Series:
trunk
Version:
pcb-4.1.3
Released:
2018-10-03  
Registrant:
Bert Timmerman
Release registered:
2018-10-03
Active:
No. Drivers cannot target bugs and blueprints to this milestone.  

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Activities

Assigned to you:
No blueprints or bugs assigned to you.
Assignees:
10 Chad Parker, 2 Luis de Arquer, 1 Milan Prochac
Blueprints:
No blueprints are targeted to this milestone.
Bugs:
13 Fix Released

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Release notes 

Release notes for pcb-4.1.3

Dear Users,

This is a bug fix release of pcb.

Kind regards,

The pcb development team.

Contributors
------------
The following authors contributed to the 4.1.3 release:
- Charles Parker
- Milan Prochac
- Bert Timmerman

Please note that names are in no particular order and all e-mail
addresses have been removed for privacy.

User experience improvements
----------------------------
- Potential data loss when currently opened PCB file is modified on disk.
- Blind/Burried vias clear soldermask on layers they don't intersect.
- Fixed ChangeClearSize() for changing a via's solder mask clearance.
- Fixed polygon to line separation DRC.
- Fixed DRC flags lines that are cleared by other objects.
- Fixed DRC misses lines near polygons if clearance < bloat.
- Fixed the segfault on picking load netlist menu item.

Plugins
-------
- none

Exporters
---------
- none

Footprints library
------------------
- none

Developer experience improvements
---------------------------------
- Added file version tests.
- Fixed some compile warnings.
- Fixed some Bison warnings.

Notes for early adapters
------------------------
- none.

Changed dependencies
--------------------
- none.

Changelog 

This release does not have a changelog.

0 blueprints and 13 bugs targeted

Bug report Importance Assignee Status
1790649 #1790649 pcb refuses to load footprint files 2 Critical Chad Parker  10 Fix Released
746178 #746178 Polygon to line separation DRC wrong 3 High Luis de Arquer  10 Fix Released
1782036 #1782036 DRC flags lines that are cleared by other objects 3 High Luis de Arquer  10 Fix Released
1782041 #1782041 DRC misses lines near polygons if clearance < bloat 3 High Chad Parker  10 Fix Released
1788845 #1788845 Picking load netlist menu item causes segfault 3 High Chad Parker  10 Fix Released
929123 #929123 ChangeClearSize() is broken for changing a via's solder mask clearance 4 Medium Chad Parker  10 Fix Released
1767812 #1767812 Blind/Burried Vias Clear Soldermask on Layers they Don't Intersect 4 Medium Milan Prochac  10 Fix Released
1773852 #1773852 Potential data loss when currently opened PCB file is modified on disk 4 Medium Chad Parker  10 Fix Released
1780682 #1780682 PCBFileVersionNeeded tests features in the wrong order 4 Medium Chad Parker  10 Fix Released
1773409 #1773409 File operations, bugs and change requests 5 Low Chad Parker  10 Fix Released
1773652 #1773652 Compile warnings on master 5 Low Chad Parker  10 Fix Released
1776089 #1776089 Bison warnings 5 Low Chad Parker  10 Fix Released
1780676 #1780676 pcbtest.sh needs to specify the appropriate menu resource file 5 Low Chad Parker  10 Fix Released
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