diff -Nru crust-firmware-0.5/3rdparty/kconfig/Makefile crust-firmware-0.6/3rdparty/kconfig/Makefile --- crust-firmware-0.5/3rdparty/kconfig/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/3rdparty/kconfig/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: GPL-2.0-only # # Based in part on scripts/kconfig/Makefile from Linux v4.19. diff -Nru crust-firmware-0.5/3rdparty/Makefile crust-firmware-0.6/3rdparty/Makefile --- crust-firmware-0.5/3rdparty/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/3rdparty/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/arch/Kconfig crust-firmware-0.6/arch/Kconfig --- crust-firmware-0.5/arch/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2020-2021 The Crust Firmware Authors. +# Copyright © 2020-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/arch/Makefile crust-firmware-0.6/arch/Makefile --- crust-firmware-0.5/arch/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2020-2021 The Crust Firmware Authors. +# Copyright © 2020-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/arch/or1k/counter.c crust-firmware-0.6/arch/or1k/counter.c --- crust-firmware-0.5/arch/or1k/counter.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/counter.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -7,14 +7,14 @@ #include void -counter_init(void) +cycle_counter_init(void) { mtspr(SPR_TICK_TTMR_ADDR, SPR_TICK_TTMR_MODE_CONTINUE << SPR_TICK_TTMR_MODE_LSB); } uint32_t -counter_read(void) +cycle_counter_read(void) { return mfspr(SPR_TICK_TTCR_ADDR); } diff -Nru crust-firmware-0.5/arch/or1k/exception.c crust-firmware-0.6/arch/or1k/exception.c --- crust-firmware-0.5/arch/or1k/exception.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/exception.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/arch/or1k/include/asm/exception.h crust-firmware-0.6/arch/or1k/include/asm/exception.h --- crust-firmware-0.5/arch/or1k/include/asm/exception.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/include/asm/exception.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/arch/or1k/include/counter.h crust-firmware-0.6/arch/or1k/include/counter.h --- crust-firmware-0.5/arch/or1k/include/counter.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/include/counter.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,26 +0,0 @@ -/* - * Copyright © 2017-2021 The Crust Firmware Authors. - * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only - */ - -#ifndef COUNTER_H -#define COUNTER_H - -#include - -/** - * Initialize the system counter. - * - * This function must be called before delays or timeouts can be used. - */ -void counter_init(void); - -/** - * Read the system counter. - * - * This counter (the OpenRISC 1000 architectural tick timer) is a 32-bit up - * counter running at the same frequency as the CPU clock. - */ -uint32_t counter_read(void); - -#endif /* COUNTER_H */ diff -Nru crust-firmware-0.5/arch/or1k/include/exception.h crust-firmware-0.6/arch/or1k/include/exception.h --- crust-firmware-0.5/arch/or1k/include/exception.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/include/exception.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/arch/or1k/include/spr.h crust-firmware-0.6/arch/or1k/include/spr.h --- crust-firmware-0.5/arch/or1k/include/spr.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/include/spr.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/arch/or1k/include/trap.h crust-firmware-0.6/arch/or1k/include/trap.h --- crust-firmware-0.5/arch/or1k/include/trap.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/include/trap.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/arch/or1k/Makefile crust-firmware-0.6/arch/or1k/Makefile --- crust-firmware-0.5/arch/or1k/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2020-2021 The Crust Firmware Authors. +# Copyright © 2020-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/arch/or1k/math.S crust-firmware-0.6/arch/or1k/math.S --- crust-firmware-0.5/arch/or1k/math.S 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/math.S 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/arch/or1k/runtime.S crust-firmware-0.6/arch/or1k/runtime.S --- crust-firmware-0.5/arch/or1k/runtime.S 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/runtime.S 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/arch/or1k/scp.ld.S crust-firmware-0.6/arch/or1k/scp.ld.S --- crust-firmware-0.5/arch/or1k/scp.ld.S 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/scp.ld.S 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -55,7 +55,7 @@ * boot. Before changing this value, verify the firmware can recover from a * crash even after the new data is modified. */ - ASSERT(SIZEOF(.data) == MAX_CLUSTERS * MAX_CORES_PER_CLUSTER + 0x08, + ASSERT(SIZEOF(.data) == ALIGN(MAX_CLUSTERS * MAX_CORES_PER_CLUSTER + 8, 4), "Changes to .data persist after an exception!") .bss . : ALIGN(4) { diff -Nru crust-firmware-0.5/arch/or1k/start.S crust-firmware-0.6/arch/or1k/start.S --- crust-firmware-0.5/arch/or1k/start.S 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/arch/or1k/start.S 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/debug/battery.c crust-firmware-0.6/common/debug/battery.c --- crust-firmware-0.5/common/debug/battery.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/debug/battery.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/debug/dram.c crust-firmware-0.6/common/debug/dram.c --- crust-firmware-0.5/common/debug/dram.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/debug/dram.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2021 The Crust Firmware Authors. + * Copyright © 2021-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/debug/Kconfig crust-firmware-0.6/common/debug/Kconfig --- crust-firmware-0.5/common/debug/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/debug/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # @@ -75,7 +75,7 @@ config DEBUG_PRINT_BATTERY bool "Print battery consumption periodically while off/asleep" - depends on MFD_AXP803 + depends on MFD_AXP223 || MFD_AXP803 help While the system is off or asleep and the battery is discharging, print the battery voltage, discharge @@ -91,6 +91,7 @@ config DEBUG_PRINT_SPRS bool "Print the contents of Special Purpose Registers at boot" + depends on ARCH_OR1K help The OpenRISC 1000 architecture defines various Special Purpose Registers, or SPRs, that describe the particular diff -Nru crust-firmware-0.5/common/debug/latency.c crust-firmware-0.6/common/debug/latency.c --- crust-firmware-0.5/common/debug/latency.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/debug/latency.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -18,11 +18,11 @@ debug_print_latency(uint8_t current_state) { if (current_state != last_state) { - cycles = counter_read(); + cycles = cycle_counter_read(); iterations = 0; last_state = current_state; } else if (iterations < ITERATIONS && ++iterations == ITERATIONS) { info("State %u: %u cycles/iteration", current_state, - udiv_round(counter_read() - cycles, ITERATIONS)); + udiv_round(cycle_counter_read() - cycles, ITERATIONS)); } } diff -Nru crust-firmware-0.5/common/debug/Makefile crust-firmware-0.6/common/debug/Makefile --- crust-firmware-0.5/common/debug/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/debug/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2020-2021 The Crust Firmware Authors. +# Copyright © 2020-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/common/debug/monitor.c crust-firmware-0.6/common/debug/monitor.c --- crust-firmware-0.5/common/debug/monitor.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/debug/monitor.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/debug/sprs.c crust-firmware-0.6/common/debug/sprs.c --- crust-firmware-0.5/common/debug/sprs.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/debug/sprs.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/debug/steps.c crust-firmware-0.6/common/debug/steps.c --- crust-firmware-0.5/common/debug/steps.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/debug/steps.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2021 The Crust Firmware Authors. + * Copyright © 2021-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/debug.c crust-firmware-0.6/common/debug.c --- crust-firmware-0.5/common/debug.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/debug.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/delay.c crust-firmware-0.6/common/delay.c --- crust-firmware-0.5/common/delay.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/delay.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/device.c crust-firmware-0.6/common/device.c --- crust-firmware-0.5/common/device.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/device.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/Kconfig crust-firmware-0.6/common/Kconfig --- crust-firmware-0.5/common/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/common/Makefile crust-firmware-0.6/common/Makefile --- crust-firmware-0.5/common/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/common/regulator_list.c crust-firmware-0.6/common/regulator_list.c --- crust-firmware-0.5/common/regulator_list.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/regulator_list.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/scpi.c crust-firmware-0.6/common/scpi.c --- crust-firmware-0.5/common/scpi.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/scpi.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/scpi_cmds.c crust-firmware-0.6/common/scpi_cmds.c --- crust-firmware-0.5/common/scpi_cmds.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/scpi_cmds.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/simple_device.c crust-firmware-0.6/common/simple_device.c --- crust-firmware-0.5/common/simple_device.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/simple_device.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/common/system.c crust-firmware-0.6/common/system.c --- crust-firmware-0.5/common/system.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/system.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -27,7 +27,6 @@ #include #include #include -#include #define NEXT_STATE (system_state + 2) @@ -106,10 +105,10 @@ system_state = SS_AWAKE; /* First, enable watchdog protection. */ - watchdog = device_get_or_null(&r_twd.dev); + watchdog = watchdog_get(); /* Perform one-time device driver initialization. */ - counter_init(); + cycle_counter_init(); r_ccu_init(); ccu_init(); css_init(); @@ -126,9 +125,9 @@ * could result in a silent infinite loop. * * Serial communication needs accurate clock frequencies. Specifically, - * OSC16M must be calibrated before initializing R_UART, and R_UART + * IOSC must be calibrated before initializing R_UART, and R_UART * will only work after an exception restart while off/asleep if the - * calibrated OSC16M frequency is retained across the restart. + * calibrated IOSC frequency is retained across the restart. */ serial_init(); @@ -270,7 +269,7 @@ r_ccu_resume(); /* Enable watchdog protection. */ - watchdog = device_get_or_null(&r_twd.dev); + watchdog = watchdog_get(); /* The system is now ready to reset or resume. */ system_state = NEXT_STATE; @@ -294,6 +293,7 @@ mailbox = device_get_or_null(&msgbox.dev); /* Resume execution on the CSS. */ + record_step(STEP_RESUME_CSS); css_resume(); record_step(STEP_RESUME_COMPLETE); @@ -314,7 +314,7 @@ case SS_RESET: /* Attempt to reset the SoC using the watchdog. */ if (watchdog) - watchdog_set_timeout(watchdog, 1); + watchdog_reset_system(watchdog); /* Continue making reboot/reset attempts. */ break; diff -Nru crust-firmware-0.5/common/timeout.c crust-firmware-0.6/common/timeout.c --- crust-firmware-0.5/common/timeout.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/common/timeout.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -11,7 +11,7 @@ bool timeout_expired(uint32_t timeout) { - uint32_t now = counter_read(); + uint32_t now = cycle_counter_read(); /* If the timeout wrapped, wait until the counter also wraps. */ return (now ^ timeout) >> 31 == 0 && now >= timeout; @@ -21,7 +21,7 @@ timeout_set(uint32_t useconds) { uint32_t cycles = CPUCLK_MHz * useconds; - uint32_t now = counter_read(); + uint32_t now = cycle_counter_read(); /* Ensure the MSB is zero for the wraparound check above. */ assert(cycles >> 31 == 0); diff -Nru crust-firmware-0.5/configs/a64-olinuxino_defconfig crust-firmware-0.6/configs/a64-olinuxino_defconfig --- crust-firmware-0.5/configs/a64-olinuxino_defconfig 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/configs/a64-olinuxino_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,3 @@ +CONFIG_PLATFORM_A64=y +CONFIG_CEC=y +CONFIG_MFD_AXP20X=y diff -Nru crust-firmware-0.5/configs/a64-olinuxino-emmc_defconfig crust-firmware-0.6/configs/a64-olinuxino-emmc_defconfig --- crust-firmware-0.5/configs/a64-olinuxino-emmc_defconfig 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/configs/a64-olinuxino-emmc_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,3 @@ +CONFIG_PLATFORM_A64=y +CONFIG_CEC=y +CONFIG_MFD_AXP20X=y diff -Nru crust-firmware-0.5/configs/beelink_gs1_defconfig crust-firmware-0.6/configs/beelink_gs1_defconfig --- crust-firmware-0.5/configs/beelink_gs1_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/beelink_gs1_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,6 +1,6 @@ CONFIG_PLATFORM_H6=y CONFIG_CIR=y -CONFIG_CIR_USE_OSC24M=y CONFIG_CIR_PROTO_NEC=y CONFIG_CIR_WAKE_CODE=0x8051 +CONFIG_CIR_USE_OSC24M=y CONFIG_MFD_AXP20X=y diff -Nru crust-firmware-0.5/configs/defconfig crust-firmware-0.6/configs/defconfig --- crust-firmware-0.5/configs/defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1 @@ +CONFIG_PLATFORM_A64=y diff -Nru crust-firmware-0.5/configs/libretech_all_h3_cc_h5_defconfig crust-firmware-0.6/configs/libretech_all_h3_cc_h5_defconfig --- crust-firmware-0.5/configs/libretech_all_h3_cc_h5_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/libretech_all_h3_cc_h5_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,3 +1,4 @@ +CONFIG_PLATFORM_A64=y CONFIG_SOC_H5=y CONFIG_CIR=y CONFIG_REGULATOR_GPIO_DRAM=y diff -Nru crust-firmware-0.5/configs/nanopi_a64_defconfig crust-firmware-0.6/configs/nanopi_a64_defconfig --- crust-firmware-0.5/configs/nanopi_a64_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/nanopi_a64_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,2 +1,3 @@ +CONFIG_PLATFORM_A64=y CONFIG_CIR=y CONFIG_MFD_AXP20X=y diff -Nru crust-firmware-0.5/configs/nanopi_m1_plus_defconfig crust-firmware-0.6/configs/nanopi_m1_plus_defconfig --- crust-firmware-0.5/configs/nanopi_m1_plus_defconfig 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/configs/nanopi_m1_plus_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,2 @@ +CONFIG_PLATFORM_H3=y +CONFIG_REGULATOR_GPIO_DRAM=y diff -Nru crust-firmware-0.5/configs/orangepi_pc2_defconfig crust-firmware-0.6/configs/orangepi_pc2_defconfig --- crust-firmware-0.5/configs/orangepi_pc2_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/orangepi_pc2_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,3 +1,4 @@ +CONFIG_PLATFORM_A64=y CONFIG_SOC_H5=y CONFIG_CIR=y CONFIG_CIR_USE_OSC24M=y diff -Nru crust-firmware-0.5/configs/orangepi_win_defconfig crust-firmware-0.6/configs/orangepi_win_defconfig --- crust-firmware-0.5/configs/orangepi_win_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/orangepi_win_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,2 +1,3 @@ +CONFIG_PLATFORM_A64=y CONFIG_CIR=y CONFIG_MFD_AXP20X=y diff -Nru crust-firmware-0.5/configs/orangepi_zero_plus_defconfig crust-firmware-0.6/configs/orangepi_zero_plus_defconfig --- crust-firmware-0.5/configs/orangepi_zero_plus_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/orangepi_zero_plus_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,2 +1,3 @@ +CONFIG_PLATFORM_A64=y CONFIG_SOC_H5=y CONFIG_REGULATOR_GPIO_DRAM=y diff -Nru crust-firmware-0.5/configs/pine64-lts_defconfig crust-firmware-0.6/configs/pine64-lts_defconfig --- crust-firmware-0.5/configs/pine64-lts_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/pine64-lts_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1 +1,3 @@ +CONFIG_PLATFORM_A64=y +CONFIG_CEC=y CONFIG_MFD_AXP20X=y diff -Nru crust-firmware-0.5/configs/pine64_plus_defconfig crust-firmware-0.6/configs/pine64_plus_defconfig --- crust-firmware-0.5/configs/pine64_plus_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/pine64_plus_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1 +1,3 @@ +CONFIG_PLATFORM_A64=y +CONFIG_CEC=y CONFIG_MFD_AXP20X=y diff -Nru crust-firmware-0.5/configs/pinebook_defconfig crust-firmware-0.6/configs/pinebook_defconfig --- crust-firmware-0.5/configs/pinebook_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/pinebook_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,2 +1,3 @@ +CONFIG_PLATFORM_A64=y CONFIG_MFD_AXP20X=y # CONFIG_SERIAL is not set diff -Nru crust-firmware-0.5/configs/pinephone_defconfig crust-firmware-0.6/configs/pinephone_defconfig --- crust-firmware-0.5/configs/pinephone_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/pinephone_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,2 +1,3 @@ +CONFIG_PLATFORM_A64=y CONFIG_MFD_AXP20X=y # CONFIG_SERIAL is not set diff -Nru crust-firmware-0.5/configs/pinetab_defconfig crust-firmware-0.6/configs/pinetab_defconfig --- crust-firmware-0.5/configs/pinetab_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/pinetab_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,2 +1,3 @@ +CONFIG_PLATFORM_A64=y CONFIG_MFD_AXP20X=y # CONFIG_SERIAL is not set diff -Nru crust-firmware-0.5/configs/tanix_tx6_defconfig crust-firmware-0.6/configs/tanix_tx6_defconfig --- crust-firmware-0.5/configs/tanix_tx6_defconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/configs/tanix_tx6_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ CONFIG_PLATFORM_H6=y CONFIG_CIR=y CONFIG_CIR_PROTO_NECX=y -CONFIG_CIR_USE_OSC24M=y CONFIG_CIR_WAKE_CODE=0x40404d +CONFIG_CIR_USE_OSC24M=y diff -Nru crust-firmware-0.5/configs/teres_i_defconfig crust-firmware-0.6/configs/teres_i_defconfig --- crust-firmware-0.5/configs/teres_i_defconfig 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/configs/teres_i_defconfig 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,3 @@ +CONFIG_PLATFORM_A64=y +CONFIG_MFD_AXP20X=y +# CONFIG_SERIAL is not set diff -Nru crust-firmware-0.5/debian/changelog crust-firmware-0.6/debian/changelog --- crust-firmware-0.5/debian/changelog 2022-12-22 15:17:54.000000000 +0000 +++ crust-firmware-0.6/debian/changelog 2023-09-02 15:21:32.000000000 +0000 @@ -1,3 +1,27 @@ +crust-firmware (0.6-1) unstable; urgency=medium + + * New upstream release. + Remove applied patches and now redundant documentation. + + -- Nicolas Boulenguez Sat, 02 Sep 2023 15:21:32 +0000 + +crust-firmware (0.5.1.20230301-1) unstable; urgency=medium + + [ Jonas Smedegaard ] + * fix source helper tool copyright-check: + + adjust to work with newer Path::Tiny 0.144 + + avoid insecure shell expansion + * update copyright info: update coverage + + [ Nicolas Boulenguez ] + * Detect duplicate defconfigs, make new defconfigs easyer to forward + * New upstream snapshot based on commit c308a504. + Refresh README.Debian, copyright and patches. + * Remove teres_i until there is a tester again + * Forward patches + + -- Nicolas Boulenguez Thu, 31 Aug 2023 15:35:24 +0000 + crust-firmware (0.5-3) unstable; urgency=medium * Standards-Version: 4.6.2. diff -Nru crust-firmware-0.5/debian/control crust-firmware-0.6/debian/control --- crust-firmware-0.5/debian/control 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/control 2023-09-02 15:12:35.000000000 +0000 @@ -11,6 +11,7 @@ debhelper-compat (= 13), flex, gcc-or1k-elf, + python3, Rules-Requires-Root: no Homepage: https://github.com/crust-firmware/crust Vcs-Browser: https://salsa.debian.org/debian/crust-firmware diff -Nru crust-firmware-0.5/debian/copyright crust-firmware-0.6/debian/copyright --- crust-firmware-0.5/debian/copyright 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/copyright 2023-09-02 15:12:35.000000000 +0000 @@ -6,9 +6,9 @@ Files: * Copyright: 2014-2017 ARM Limited and Contributors - 2020-2022 Nicolas Boulenguez + 2020-2023 Nicolas Boulenguez 2005-2014 Rich Felker, et al. - 2017-2021 The Crust Firmware Authors + 2017-2023 The Crust Firmware Authors License-Grant: SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only License: BSD-3-clause or GPL-2 @@ -49,7 +49,7 @@ Files: debian/copyright-check Copyright: - 2020-2021 Jonas Smedegaard + 2020-2023 Jonas Smedegaard 2020-2021 Purism, SPC License-Grant: This program is free software; @@ -59,7 +59,6 @@ either version 3, or (at your option) any later version. License: GPL-3+ -Reference: debian/copyright License: BSD-1-clause Redistribution and use in source and binary forms, with or without diff -Nru crust-firmware-0.5/debian/copyright-check crust-firmware-0.6/debian/copyright-check --- crust-firmware-0.5/debian/copyright-check 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/copyright-check 2023-09-02 15:12:35.000000000 +0000 @@ -1,5 +1,5 @@ #!/bin/sh -# Copyright 2020-2021 Jonas Smedegaard +# Copyright 2020-2023 Jonas Smedegaard # Copyright 2020-2021 Purism, SPC # Description: helper script to update copyright_hints # @@ -19,6 +19,7 @@ # Depends: # licensecheck, # libipc-system-simple-perl, +# libpath-tiny-perl, # libregexp-assemble-perl, # perl, @@ -38,9 +39,10 @@ -e '$nonverb_re = Regexp::Assemble->new->add( "\\W+", map { "\\W+(?:$_)\\W+" } @{ $opt{nonverb} } )->as_string;'\ -e '@content_re = map { s/\W+/[**]/g; s/\Q[**]\E\d\Q[**]\E/[**]\\S{0,2}[**]/g; s/\Q[**]\E/$nonverb_re/g; qr/$_/ } @license, @grant;'\ -e '$inspect = sub {'\ + -e 'return if $_[0]->is_dir;'\ -e '$file = $_[0];'\ -e 'if (@firstline_re) {'\ - -e '($head) = $_[0]->lines( { count => 1 } );'\ + -e '($head) = $file->lines( { count => 1 } );'\ -e 'push @match, quotemeta and return '\ -e 'if any { $head =~ $_ } @firstline_re };'\ -e 'push @match, quotemeta'\ @@ -62,8 +64,8 @@ RE_SKIP="$RE_omit" # licensing patterns misdetected by licensecheck -RE_main=$(_file_regex --grantglob '*' *) -RE_kconfig=$(_file_regex --grantglob '3rdparty/kconfig/*' *) +RE_main=$(_file_regex --grantglob '*' -- *) +RE_kconfig=$(_file_regex --grantglob '3rdparty/kconfig/*' -- *) # TODO: automate more of this manual cleanup: # * strip garbage copyright holders diff -Nru crust-firmware-0.5/debian/copyright_hints crust-firmware-0.6/debian/copyright_hints --- crust-firmware-0.5/debian/copyright_hints 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/copyright_hints 2023-09-02 15:12:35.000000000 +0000 @@ -146,8 +146,8 @@ Files debian/copyright-check Copyright - 2020-2021, Jonas Smedegaard 2020-2021, Purism, SPC + 2020-2023, Jonas Smedegaard K / /mg;' protected nor stating copyright or licensing License: GPL-3+ diff -Nru crust-firmware-0.5/debian/gbp.conf crust-firmware-0.6/debian/gbp.conf --- crust-firmware-0.5/debian/gbp.conf 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/gbp.conf 2023-09-02 15:17:29.000000000 +0000 @@ -1,14 +1,17 @@ -# clone this source: gbp clone $PKG_GIT_URL -# track upstream source: git remote add upstream-git $UPSTREAM_GIT_URL +# clone this source: gbp clone vcs-git:crust-firmware +# track upstream source: git remote add upstream-git https://github.com/crust-firmware/crust.git # update this source: gbp pull # update upstream source: git fetch upstream-git --tags -# import upstream release: gbp import-orig --upstream-vcs-tag=$VERSION --uscan +# import upstream release: gbp import-orig --uscan # build package: gbp buildpackage # publish source release: gbp tag && gbp push [DEFAULT] pristine-tar = True -sign-tags = True +# sign-tags = True filter = */.git* debian-branch = debian/master upstream-branch = upstream/master + +[import-orig] +upstream-vcs-tag=v%(version)s diff -Nru crust-firmware-0.5/debian/links crust-firmware-0.6/debian/links --- crust-firmware-0.5/debian/links 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/debian/links 2023-09-02 15:21:32.000000000 +0000 @@ -0,0 +1,60 @@ +#!/usr/bin/python3 + +import sys + +platforms = ( + + # Jonas Smedegaard + # maybe Rodrigo Exterckötter Tjäder + 'a64-olinuxino', + + # Jonas Smedegaard + # Philip Rinn + 'a64-olinuxino-emmc', + + # Sunil Mohan Adapa + 'pine64-lts', + + # Vagrant Cascadian + 'pine64_plus', + + # Vagrant Cascadian + 'pinebook', + + # Arnaud Ferraris + # maybe Arnaud Ferraris (1.1, 1.2) + # maybe Benoit Delcour (1.2) + 'pinephone', + + # Arnaud Ferraris + 'pinetab', + +) + +# Detect duplicate defconfig files. +# With any argument, list platforms that debian/rules must actually build. +# Without arguments, provide arguments for dh_link, linking each +# duplicate to the built platform. + +# pylint debian/links --disable=missing-module-docstring +# mypy debian/links && rm -fr .mypy_cache/ +# debian/links +# debian/links arg + +# Map a defconfig to the platforms with this configuration. +platforms_per_config: dict[bytes, list[str]] = {} + +for platform in platforms: + path = f'configs/{platform}_defconfig' +# Variant building all available platforms: +# for path in glob.glob('configs/*_defconfig'): +# platform = path[8:-10] + with open(path, 'br') as defconfig: + platforms_per_config.setdefault(defconfig.read(), []).append(platform) + +if len(sys.argv) == 1: + for built, *links in platforms_per_config.values(): + for link in links: + print(f'usr/lib/crust-firmware/{built}.bin usr/lib/crust-firmware/{link}.bin') +else: + print(*(duplicates[0] for duplicates in platforms_per_config.values())) diff -Nru crust-firmware-0.5/debian/patches/2001_generic_platforms.patch crust-firmware-0.6/debian/patches/2001_generic_platforms.patch --- crust-firmware-0.5/debian/patches/2001_generic_platforms.patch 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/patches/2001_generic_platforms.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,30 +0,0 @@ -Description: add configs for generic platforms -Forwarded: not-needed -Author: Jonas Smedegaard -Last-Update: 2021-11-15 ---- -This patch header follows DEP-3: http://dep.debian.net/deps/dep3/ ---- /dev/null -+++ b/configs/generic_a64_axp20x_cec_defconfig -@@ -0,0 +1,2 @@ -+CONFIG_MFD_AXP20X=y -+CONFIG_CEC=y ---- /dev/null -+++ b/configs/generic_a64_axp20x_cec_no-serial_defconfig -@@ -0,0 +1,3 @@ -+CONFIG_MFD_AXP20X=y -+CONFIG_CEC=y -+# CONFIG_SERIAL is not set ---- /dev/null -+++ b/configs/generic_a64_axp20x_defconfig -@@ -0,0 +1 @@ -+CONFIG_MFD_AXP20X=y ---- /dev/null -+++ b/configs/generic_a64_axp20x_no-serial_defconfig -@@ -0,0 +1,2 @@ -+CONFIG_MFD_AXP20X=y -+# CONFIG_SERIAL is not set ---- /dev/null -+++ b/configs/generic_a64_no-serial_defconfig -@@ -0,0 +1 @@ -+# CONFIG_SERIAL is not set diff -Nru crust-firmware-0.5/debian/patches/2002_no_warn_rwx_segments.patch crust-firmware-0.6/debian/patches/2002_no_warn_rwx_segments.patch --- crust-firmware-0.5/debian/patches/2002_no_warn_rwx_segments.patch 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/patches/2002_no_warn_rwx_segments.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,15 +0,0 @@ -Description: Do not allow a warning to break the build -Bug-Debian: https://bugs.debian.org/1015057 -Forwarded: https://github.com/crust-firmware/crust/issues/207 -Author: Nicolas Boulenguez - ---- a/Makefile -+++ b/Makefile -@@ -81,6 +81,7 @@ - -Wl,-O1 \ - -Wl,--build-id=none \ - -Wl,--fatal-warnings \ -+ -Wl,--no-warn-rwx-segments \ - -Wl,--gc-sections \ - -Wl,--no-dynamic-linker \ - -Wl,--no-undefined diff -Nru crust-firmware-0.5/debian/patches/README crust-firmware-0.6/debian/patches/README --- crust-firmware-0.5/debian/patches/README 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/patches/README 1970-01-01 00:00:00.000000000 +0000 @@ -1,3 +0,0 @@ -0xxx: Grabbed from upstream development. -1xxx: Possibly relevant for upstream adoption. -2xxx: Only relevant for official Debian release. diff -Nru crust-firmware-0.5/debian/patches/series crust-firmware-0.6/debian/patches/series --- crust-firmware-0.5/debian/patches/series 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/patches/series 1970-01-01 00:00:00.000000000 +0000 @@ -1,2 +0,0 @@ -2001_generic_platforms.patch -2002_no_warn_rwx_segments.patch diff -Nru crust-firmware-0.5/debian/README.Debian crust-firmware-0.6/debian/README.Debian --- crust-firmware-0.5/debian/README.Debian 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/README.Debian 2023-09-02 15:21:32.000000000 +0000 @@ -1,13 +1,6 @@ Crust firmware for Debian ========================= -Mainline u-boot ---------------- - -As documented in upstream README, -Crust is supported since u-boot v2021.01-rc1. - - Mainline linux -------------- @@ -24,29 +17,4 @@ More information: - -HDMI CEC --------- - -These platforms seems to have a fully wired HDMI connector, -and should wakeup by messages sent to them via HDMI CEC bus: - - * a64-olinuxino - * a64-olinuxino-emmc - * pine64-lts - * pine64_plus - - -Serial port ------------ - -These platforms are known to be mainly battery-powered, -and to save extra power has serial port disabled during suspend: - - * pinebook - * pinephone - * pinetab - * teres_i - - - -- Jonas Smedegaard Tue, 16 Nov 2021 00:20:49 +0100 + -- Nicolas Boulenguez , Sat, 2 Sep 2023 17:23:39 +0200 diff -Nru crust-firmware-0.5/debian/rules crust-firmware-0.6/debian/rules --- crust-firmware-0.5/debian/rules 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/rules 2023-09-02 15:21:32.000000000 +0000 @@ -2,43 +2,17 @@ verbose := $(if $(filter terse,$(DEB_BUILD_OPTIONS)),,V=1) -platforms = $(foreach p, a64 a64_axp20x a64_axp20x_cec,\ - generic_$p generic_$p_no-serial) - -# Jonas Smedegaard -# maybe Rodrigo Exterckötter Tjäder -platforms_like_generic_a64_axp20x_cec += a64-olinuxino - -# Jonas Smedegaard -# Philip Rinn -platforms_like_generic_a64_axp20x_cec += a64-olinuxino-emmc - -# Sunil Mohan Adapa -platforms_like_generic_a64_axp20x_cec += pine64-lts - -# Vagrant Cascadian -platforms_like_generic_a64_axp20x_cec += pine64_plus - -# Vagrant Cascadian -platforms_like_generic_a64_axp20x_no-serial += pinebook - -# Arnaud Ferraris -# maybe Arnaud Ferraris (1.1, 1.2) -# maybe Benoit Delcour (1.2) -platforms_like_generic_a64_axp20x_no-serial += pinephone - -# Arnaud Ferraris -platforms_like_generic_a64_axp20x_no-serial += pinetab - -# Jonas Smedegaard -platforms_like_generic_a64_axp20x_no-serial += teres_i - %: dh $@ -# create most generic config, not possible to contain in patch -execute_before_dh_auto_build: - touch configs/generic_a64_defconfig +# The upstream build system is designed for people building only the +# platform matching their hardware. +# Debian wants to support several platforms, but build and install +# only one representant per defconfig. +# The supported platforms are listed in debian/links. +# The following list contains the actually built platforms. +platforms := $(shell debian/links arg) +# The same script installs aliases with dh_link (hence the name). override_dh_auto_build: $(platforms) $(platforms): @@ -48,8 +22,3 @@ # Move to the parent directory for easyer installation. # Rename the binary file after the platform. install -m644 build/$@/scp.bin build/$@.bin - -override_dh_link: - dh_link -- $(foreach source,$(platforms),\ - $(foreach target,$(platforms_like_$(source)),\ - usr/lib/crust-firmware/$(source).bin usr/lib/crust-firmware/$(target).bin)) diff -Nru crust-firmware-0.5/debian/watch crust-firmware-0.6/debian/watch --- crust-firmware-0.5/debian/watch 2022-12-22 15:13:12.000000000 +0000 +++ crust-firmware-0.6/debian/watch 2023-09-02 15:15:38.000000000 +0000 @@ -1,6 +1,6 @@ version=4 # check: uscan --report -# update: gbp import-orig --upstream-vcs-tag=vX.Y.Z --uscan +# update: see debian/gbp.conf opts=\ dversionmangle=auto \ diff -Nru crust-firmware-0.5/drivers/cec/cec.c crust-firmware-0.6/drivers/cec/cec.c --- crust-firmware-0.5/drivers/cec/cec.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cec/cec.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2021 The Crust Firmware Authors. + * Copyright © 2021-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/cec/dw-hdmi-cec.c crust-firmware-0.6/drivers/cec/dw-hdmi-cec.c --- crust-firmware-0.5/drivers/cec/dw-hdmi-cec.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cec/dw-hdmi-cec.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2021 The Crust Firmware Authors. + * Copyright © 2021-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -154,7 +154,7 @@ mmio_write_8(self->regs + CEC_MASK, state->stash[1]); mmio_write_8(self->regs + CEC_MUTE, state->stash[0]); - /* Restoring IH_MUTE must be last, since it enables interrutps */ + /* Restoring IH_MUTE must be last, since it enables interrupts */ mmio_write_8(self->regs + IH_MUTE, state->stash[3]); clock_put(&self->bus_clock); diff -Nru crust-firmware-0.5/drivers/cec/Kconfig crust-firmware-0.6/drivers/cec/Kconfig --- crust-firmware-0.5/drivers/cec/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cec/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,10 +1,11 @@ # -# Copyright © 2021 The Crust Firmware Authors. +# Copyright © 2021-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # config CEC bool "HDMI CEC" + depends on HAVE_HDMI help Listen for messages from TV or other devices on HDMI CEC bus. This can be used as a wakeup source. Note: Clocks and resets diff -Nru crust-firmware-0.5/drivers/cec/Makefile crust-firmware-0.6/drivers/cec/Makefile --- crust-firmware-0.5/drivers/cec/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cec/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2021 The Crust Firmware Authors. +# Copyright © 2021-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/drivers/cir/cir.c crust-firmware-0.6/drivers/cir/cir.c --- crust-firmware-0.5/drivers/cir/cir.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cir/cir.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/cir/cir.h crust-firmware-0.6/drivers/cir/cir.h --- crust-firmware-0.5/drivers/cir/cir.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cir/cir.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/cir/Kconfig crust-firmware-0.6/drivers/cir/Kconfig --- crust-firmware-0.5/drivers/cir/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cir/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,10 +1,11 @@ # -# Copyright © 2020-2021 The Crust Firmware Authors. +# Copyright © 2020-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # config CIR bool "CIR (infrared) receiver" + depends on HAVE_R_CIR help Listen for input from an infrared remote controller or keyboard. This can be used as a wakeup source. @@ -52,7 +53,7 @@ bool "Use OSC24M as parent clock" help Sometimes boards come without external 32768 Hz oscillator - and thus RTC use the internal RC oscilator as a source + and thus RTC use the internal RC oscillator as a source for generating 32768 Hz clock. However, such clock is not precise enough for IR signal decoding purposes. diff -Nru crust-firmware-0.5/drivers/cir/Makefile crust-firmware-0.6/drivers/cir/Makefile --- crust-firmware-0.5/drivers/cir/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cir/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2020-2021 The Crust Firmware Authors. +# Copyright © 2020-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/drivers/cir/nec.c crust-firmware-0.6/drivers/cir/nec.c --- crust-firmware-0.5/drivers/cir/nec.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cir/nec.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2021 The Crust Firmware Authors. + * Copyright © 2021-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/cir/rc6.c crust-firmware-0.6/drivers/cir/rc6.c --- crust-firmware-0.5/drivers/cir/rc6.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cir/rc6.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/cir/sunxi-cir.c crust-firmware-0.6/drivers/cir/sunxi-cir.c --- crust-firmware-0.5/drivers/cir/sunxi-cir.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/cir/sunxi-cir.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/clock/ccu.c crust-firmware-0.6/drivers/clock/ccu.c --- crust-firmware-0.5/drivers/clock/ccu.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/ccu.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/clock/ccu.h crust-firmware-0.6/drivers/clock/ccu.h --- crust-firmware-0.5/drivers/clock/ccu.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/ccu.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2019-2021 The Crust Firmware Authors. + * Copyright © 2019-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -91,9 +91,9 @@ * ============== */ -uint32_t r_ccu_common_get_osc16m_rate(const struct ccu *self, - const struct ccu_clock *clk, - uint32_t rate); +uint32_t r_ccu_common_get_iosc_rate(const struct ccu *self, + const struct ccu_clock *clk, + uint32_t rate); void r_ccu_common_suspend(uint8_t depth); void r_ccu_common_resume(void); void r_ccu_common_init(void); diff -Nru crust-firmware-0.5/drivers/clock/ccu_helpers.c crust-firmware-0.6/drivers/clock/ccu_helpers.c --- crust-firmware-0.5/drivers/clock/ccu_helpers.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/ccu_helpers.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2019-2021 The Crust Firmware Authors. + * Copyright © 2019-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/clock/clock.c crust-firmware-0.6/drivers/clock/clock.c --- crust-firmware-0.5/drivers/clock/clock.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/clock.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/clock/clock.h crust-firmware-0.6/drivers/clock/clock.h --- crust-firmware-0.5/drivers/clock/clock.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/clock.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/clock/Makefile crust-firmware-0.6/drivers/clock/Makefile --- crust-firmware-0.5/drivers/clock/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # @@ -9,6 +9,8 @@ obj-y += ccu_helpers.o obj-y += r_ccu_common.o +obj-$(CONFIG_PLATFORM_A23) += sun8i-a23-ccu.o +obj-$(CONFIG_PLATFORM_A23) += sun8i-r-ccu.o obj-$(CONFIG_PLATFORM_A64) += sun50i-a64-ccu.o obj-$(CONFIG_PLATFORM_A64) += sun8i-r-ccu.o obj-$(CONFIG_PLATFORM_A83T) += sun8i-a83t-ccu.o diff -Nru crust-firmware-0.5/drivers/clock/r_ccu_common.c crust-firmware-0.6/drivers/clock/r_ccu_common.c --- crust-firmware-0.5/drivers/clock/r_ccu_common.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/r_ccu_common.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2019-2021 The Crust Firmware Authors. + * Copyright © 2019-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include @@ -20,9 +19,9 @@ PLL_CTRL_REG1_LDO_EN) /* Persist this var as r_ccu_init() may not be called after an exception. */ -static uint32_t osc16m_rate = 16000000U; +static uint32_t iosc_rate = CPUCLK_Hz; -DEFINE_FIXED_RATE(r_ccu_common_get_osc16m_rate, osc16m_rate) +DEFINE_FIXED_RATE(r_ccu_common_get_iosc_rate, iosc_rate) /** * Write a value to the lockable bits in PLL_CTRL_REG1. @@ -95,24 +94,24 @@ /* Cycle until the interval will not span a counter wraparound. */ do { - before = counter_read(); + before = cycle_counter_read(); barrier(); - now = r_twd_counter_read(); + now = system_counter_read(); end = now + (REFCLK_HZ >> 9); } while (end < now); /* Cycle until the end of the interval. */ do { - after = counter_read(); + after = cycle_counter_read(); /* Ensure the counters are read in a consistent order. */ barrier(); - now = r_twd_counter_read(); + now = system_counter_read(); } while (now < end); /* - * Convert the number of OSC16M cycles in 1/512 second to Hz. 512 is + * Convert the number of IOSC cycles in 1/512 second to Hz. 512 is * chosen because it is the largest power-of-two factor of 24MHz, the * reference clock frequency. */ - osc16m_rate = (after - before) << 9; + iosc_rate = (after - before) << 9; } diff -Nru crust-firmware-0.5/drivers/clock/sun50i-a64-ccu.c crust-firmware-0.6/drivers/clock/sun50i-a64-ccu.c --- crust-firmware-0.5/drivers/clock/sun50i-a64-ccu.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/sun50i-a64-ccu.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/clock/sun50i-h6-ccu.c crust-firmware-0.6/drivers/clock/sun50i-h6-ccu.c --- crust-firmware-0.5/drivers/clock/sun50i-h6-ccu.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/sun50i-h6-ccu.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/clock/sun50i-h6-r-ccu.c crust-firmware-0.6/drivers/clock/sun50i-h6-r-ccu.c --- crust-firmware-0.5/drivers/clock/sun50i-h6-r-ccu.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/sun50i-h6-r-ccu.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -31,7 +31,7 @@ }, { .dev = &r_ccu.dev, - .id = CLK_OSC16M, + .id = CLK_IOSC, }, { .dev = &ccu.dev, @@ -91,9 +91,9 @@ } static const struct ccu_clock r_ccu_clocks[SUN50I_H6_R_CCU_CLOCKS] = { - [CLK_OSC16M] = { + [CLK_IOSC] = { .get_parent = ccu_get_null_parent, - .get_rate = r_ccu_common_get_osc16m_rate, + .get_rate = r_ccu_common_get_iosc_rate, }, [CLK_OSC24M] = { .get_parent = ccu_get_null_parent, @@ -202,13 +202,13 @@ void r_ccu_init(void) { - /* Set CPUS to OSC16M/1 (16MHz). */ + /* Set CPUS to IOSC/1 (16MHz). */ mmio_write_32(CPUS_CLK_REG, CPUS_CLK_REG_CLK_SRC(2) | CPUS_CLK_REG_PRE_DIV(0) | CPUS_CLK_REG_DIV_P(0)); - /* Set R_APB2 to OSC16M/1 (16MHz). */ + /* Set R_APB2 to IOSC/1 (16MHz). */ mmio_write_32(R_APB2_CLK_REG, R_APB2_CLK_REG_CLK_SRC(2) | R_APB2_CLK_REG_PRE_DIV(0) | diff -Nru crust-firmware-0.5/drivers/clock/sun8i-a23-ccu.c crust-firmware-0.6/drivers/clock/sun8i-a23-ccu.c --- crust-firmware-0.5/drivers/clock/sun8i-a23-ccu.c 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/sun8i-a23-ccu.c 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,233 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "ccu.h" + +#define CPUX_AXI_CFG_REG 0x0050 +#define AHB1_APB1_CFG_REG 0x0054 +#define APB2_CFG_REG 0x0058 + +#define CPUX_CLK_SRC(x) ((x) << 16) +#define CPUX_APB_CLK_M(x) ((x) << 8) +#define CPUX_AXI_CLK_M(x) ((x) << 0) + +#define AHB1_CLK_SRC(x) ((x) << 12) +#define APB1_CLK_DIV(x) ((x) << 8) +#define AHB1_PRE_DIV(x) ((x) << 6) +#define AHB1_CLK_P(x) ((x) << 4) + +#define APB2_CLK_SRC(x) ((x) << 24) +#define APB2_CLK_P(x) ((x) << 16) +#define APB2_CLK_M(x) ((x) << 0) + +static DEFINE_FIXED_RATE(ccu_get_pll_periph0_rate, 600000000U) + +/* + * While APB2 has a mux, assume its parent is OSC24M. Reparenting APB2 + * to PLL_PERIPH0 in Linux for faster UART clocks is unsupported. + */ +static DEFINE_FIXED_PARENT(ccu_get_apb2_parent, r_ccu, CLK_OSC24M) +static DEFINE_FIXED_PARENT(ccu_get_apb2, ccu, CLK_APB2) + +static const struct clock_handle ccu_dram_parents[] = { + { + .dev = &ccu.dev, + .id = CLK_PLL_DDR0, + }, + { + .dev = &ccu.dev, + .id = CLK_PLL_DDR1, + }, +}; + +static const struct clock_handle * +ccu_get_dram_parent(const struct ccu *self, const struct ccu_clock *clk UNUSED) +{ + uint32_t val = mmio_read_32(self->regs + 0x00f8); + + return &ccu_dram_parents[bitfield_get(val, 20, 1)]; +} + +static const struct ccu_clock ccu_clocks[SUN8I_A23_CCU_CLOCKS] = { + [CLK_PLL_CPUX] = { + .get_parent = ccu_get_null_parent, + .get_rate = ccu_get_parent_rate, + .reg = 0x0000, + .lock = 28, + .gate = BITMAP_INDEX(0x0000, 31), + }, + [CLK_PLL_DDR0] = { + .get_parent = ccu_get_null_parent, + .get_rate = ccu_get_parent_rate, + .reg = 0x0020, + .lock = 28, + .update = 20, + .gate = BITMAP_INDEX(0x0020, 31), + }, + [CLK_PLL_PERIPH0] = { + .get_parent = ccu_get_null_parent, + .get_rate = ccu_get_pll_periph0_rate, + }, + [CLK_PLL_DDR1] = { + .get_parent = ccu_get_null_parent, + .get_rate = ccu_get_parent_rate, + .reg = 0x004c, + .lock = 28, + .update = 30, + .gate = BITMAP_INDEX(0x004c, 31), + }, + [CLK_APB2] = { + .get_parent = ccu_get_apb2_parent, + .get_rate = ccu_get_parent_rate, + }, + /* Reset requires re-training DRAM, so ignore it. */ + [CLK_BUS_DRAM] = { + .get_parent = ccu_get_null_parent, + .get_rate = ccu_get_parent_rate, + .gate = BITMAP_INDEX(0x0060, 14), + }, + [CLK_BUS_MSGBOX] = { + .get_parent = ccu_get_null_parent, + .get_rate = ccu_get_parent_rate, + .gate = BITMAP_INDEX(0x0064, 21), + .reset = BITMAP_INDEX(0x02c4, 21), + }, + [CLK_BUS_PIO] = { + .get_parent = ccu_get_null_parent, + .get_rate = ccu_get_parent_rate, + .gate = BITMAP_INDEX(0x0068, 5), + }, +#if CONFIG(SERIAL_DEV_UART0) + [CLK_BUS_UART0] = { + .get_parent = ccu_get_apb2, + .get_rate = ccu_get_parent_rate, + .gate = BITMAP_INDEX(0x006c, 16), + .reset = BITMAP_INDEX(0x02d8, 16), + }, +#elif CONFIG(SERIAL_DEV_UART1) + [CLK_BUS_UART1] = { + .get_parent = ccu_get_apb2, + .get_rate = ccu_get_parent_rate, + .gate = BITMAP_INDEX(0x006c, 17), + .reset = BITMAP_INDEX(0x02d8, 17), + }, +#elif CONFIG(SERIAL_DEV_UART2) + [CLK_BUS_UART2] = { + .get_parent = ccu_get_apb2, + .get_rate = ccu_get_parent_rate, + .gate = BITMAP_INDEX(0x006c, 18), + .reset = BITMAP_INDEX(0x02d8, 18), + }, +#elif CONFIG(SERIAL_DEV_UART3) + [CLK_BUS_UART3] = { + .get_parent = ccu_get_apb2, + .get_rate = ccu_get_parent_rate, + .gate = BITMAP_INDEX(0x006c, 19), + .reset = BITMAP_INDEX(0x02d8, 19), + }, +#elif CONFIG(SERIAL_DEV_UART4) /* depends on SOC_A23 */ + [CLK_BUS_UART4] = { + .get_parent = ccu_get_apb2, + .get_rate = ccu_get_parent_rate, + .gate = BITMAP_INDEX(0x006c, 20), + .reset = BITMAP_INDEX(0x02d8, 20), + }, +#endif + [CLK_DRAM] = { + .get_parent = ccu_get_dram_parent, + .get_rate = ccu_get_parent_rate, + .reg = 0x00f4, + .update = 16, + .reset = BITMAP_INDEX(0x00f4, 31), + }, + [CLK_MBUS] = { + .get_parent = ccu_get_null_parent, + .get_rate = ccu_get_parent_rate, + .gate = BITMAP_INDEX(0x015c, 31), + .reset = BITMAP_INDEX(0x00fc, 31), + }, +}; + +const struct ccu ccu = { + .dev = { + .name = "ccu", + .drv = &ccu_driver.drv, + .state = CLOCK_DEVICE_STATE_INIT(SUN8I_A23_CCU_CLOCKS), + }, + .clocks = ccu_clocks, + .regs = DEV_CCU, +}; + +static const struct clock_handle pll_cpux = { + .dev = &ccu.dev, + .id = CLK_PLL_CPUX, +}; + +void +ccu_suspend(void) +{ + /* Set AHB1 to LOSC/1 (32kHz), APB1 to AHB1/2 (16kHz). */ + mmio_write_32(DEV_CCU + AHB1_APB1_CFG_REG, + AHB1_CLK_SRC(0) | + APB1_CLK_DIV(1) | + AHB1_PRE_DIV(2) | + AHB1_CLK_P(0)); + + clock_put(&pll_cpux); +} + +void +ccu_suspend_cluster(uint32_t cluster UNUSED) +{ + /* Set CPUX to LOSC (32kHz), APB to CPUX/4, AXI to CPUX/3. */ + mmio_write_32(DEV_CCU + CPUX_AXI_CFG_REG, + CPUX_CLK_SRC(0) | + CPUX_APB_CLK_M(3) | + CPUX_AXI_CLK_M(2)); +} + +void +ccu_resume(void) +{ + clock_get(&pll_cpux); + + /* Set AHB1 to PLL_PERIPH0/3 (200MHz), APB1 to AHB1/2 (100MHz). */ + mmio_write_32(DEV_CCU + AHB1_APB1_CFG_REG, + AHB1_CLK_SRC(3) | + APB1_CLK_DIV(1) | + AHB1_PRE_DIV(2) | + AHB1_CLK_P(0)); +} + +void +ccu_resume_cluster(uint32_t cluster UNUSED) +{ + /* Set CPUX to PLL_CPUX, APB to CPUX/4, AXI to CPUX/3. */ + mmio_write_32(DEV_CCU + CPUX_AXI_CFG_REG, + CPUX_CLK_SRC(2) | + CPUX_APB_CLK_M(3) | + CPUX_AXI_CLK_M(2)); +} + +void +ccu_init(void) +{ + /* Set APB2 to OSC24M/1 (24MHz). */ + mmio_write_32(DEV_CCU + APB2_CFG_REG, + APB2_CLK_SRC(1) | + APB2_CLK_P(0) | + APB2_CLK_M(0)); + + ccu_resume(); + ccu_resume_cluster(0); +} diff -Nru crust-firmware-0.5/drivers/clock/sun8i-a83t-ccu.c crust-firmware-0.6/drivers/clock/sun8i-a83t-ccu.c --- crust-firmware-0.5/drivers/clock/sun8i-a83t-ccu.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/sun8i-a83t-ccu.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/clock/sun8i-h3-ccu.c crust-firmware-0.6/drivers/clock/sun8i-h3-ccu.c --- crust-firmware-0.5/drivers/clock/sun8i-h3-ccu.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/sun8i-h3-ccu.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/clock/sun8i-r-ccu.c crust-firmware-0.6/drivers/clock/sun8i-r-ccu.c --- crust-firmware-0.5/drivers/clock/sun8i-r-ccu.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/clock/sun8i-r-ccu.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -35,7 +35,7 @@ }, { .dev = &r_ccu.dev, - .id = CLK_OSC16M, + .id = CLK_IOSC, }, }; @@ -97,9 +97,9 @@ } static const struct ccu_clock r_ccu_clocks[SUN8I_R_CCU_CLOCKS] = { - [CLK_OSC16M] = { + [CLK_IOSC] = { .get_parent = ccu_get_null_parent, - .get_rate = r_ccu_common_get_osc16m_rate, + .get_rate = r_ccu_common_get_iosc_rate, }, [CLK_OSC24M] = { .get_parent = ccu_get_null_parent, @@ -128,19 +128,21 @@ .get_rate = ccu_get_parent_rate, .gate = BITMAP_INDEX(0x0028, 0), }, +#if CONFIG(HAVE_R_CIR) [CLK_BUS_R_CIR] = { .get_parent = r_ccu_get_apb0, .get_rate = ccu_get_parent_rate, .gate = BITMAP_INDEX(0x0028, 1), .reset = BITMAP_INDEX(0x00b0, 1), }, +#endif [CLK_BUS_R_TIMER] = { .get_parent = r_ccu_get_apb0, .get_rate = ccu_get_parent_rate, .gate = BITMAP_INDEX(0x0028, 2), .reset = BITMAP_INDEX(0x00b0, 2), }, -#if CONFIG(HAVE_RSB) +#if CONFIG(HAVE_R_RSB) [CLK_BUS_R_RSB] = { .get_parent = r_ccu_get_apb0, .get_rate = ccu_get_parent_rate, @@ -160,12 +162,14 @@ .gate = BITMAP_INDEX(0x0028, 6), .reset = BITMAP_INDEX(0x00b0, 6), }, +#if CONFIG(HAVE_R_TWD) [CLK_BUS_R_TWD] = { /* Parent omitted to allow enabling before CCU init. */ .get_parent = ccu_get_null_parent, .get_rate = ccu_get_parent_rate, .gate = BITMAP_INDEX(0x0028, 7), }, +#endif [CLK_R_CIR] = { .get_parent = ccu_get_r_cir_parent, .get_rate = ccu_get_r_cir_rate, @@ -187,7 +191,7 @@ void r_ccu_init(void) { - /* Set CPUS to OSC16M/1 (16MHz). */ + /* Set CPUS to IOSC/1 (600 kHz or 16MHz). */ mmio_write_32(CPUS_CLK_REG, CPUS_CLK_REG_CLK_SRC(3) | CPUS_CLK_REG_PRE_DIV(0) | diff -Nru crust-firmware-0.5/drivers/counter/Makefile crust-firmware-0.6/drivers/counter/Makefile --- crust-firmware-0.5/drivers/counter/Makefile 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/counter/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,10 @@ +# +# Copyright © 2022 The Crust Firmware Authors. +# SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only +# + +obj-$(CONFIG_PLATFORM_A23) += sun6i-a31-cnt64.o +obj-$(CONFIG_PLATFORM_A64) += sun6i-a31-cnt64.o +obj-$(CONFIG_PLATFORM_A83T) += sun9i-a80-timestamp.o +obj-$(CONFIG_PLATFORM_H3) += sun6i-a31-cnt64.o +obj-$(CONFIG_PLATFORM_H6) += sun9i-a80-timestamp.o diff -Nru crust-firmware-0.5/drivers/counter/sun6i-a31-cnt64.c crust-firmware-0.6/drivers/counter/sun6i-a31-cnt64.c --- crust-firmware-0.5/drivers/counter/sun6i-a31-cnt64.c 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/counter/sun6i-a31-cnt64.c 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,17 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#include +#include +#include + +uint32_t +system_counter_read(void) +{ + mmio_write_32(CNT64_CTRL_REG, CNT64_RL_EN); + mmio_pollz_32(CNT64_CTRL_REG, CNT64_RL_EN); + + return mmio_read_32(CNT64_LO_REG); +} diff -Nru crust-firmware-0.5/drivers/counter/sun9i-a80-timestamp.c crust-firmware-0.6/drivers/counter/sun9i-a80-timestamp.c --- crust-firmware-0.5/drivers/counter/sun9i-a80-timestamp.c 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/counter/sun9i-a80-timestamp.c 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,17 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#include +#include +#include + +#define CNT_LO_REG (DEV_TIMESTAMP_STATUS + 0x0) +#define CNT_HI_REG (DEV_TIMESTAMP_STATUS + 0x4) + +uint32_t +system_counter_read(void) +{ + return mmio_read_32(CNT_LO_REG); +} diff -Nru crust-firmware-0.5/drivers/css/css.c crust-firmware-0.6/drivers/css/css.c --- crust-firmware-0.5/drivers/css/css.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/css/css.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -101,15 +101,12 @@ lead_core = core; } } else { - record_step(STEP_RESUME_CSS); css_resume_css(*css_ps); *css_ps = SCPI_CSS_ON; - record_step(STEP_RESUME_CLUSTER); css_resume_cluster(cluster, *cluster_ps); *cluster_ps = SCPI_CSS_ON; - record_step(STEP_RESUME_CORE); css_resume_core(cluster, core, *core_ps); *core_ps = SCPI_CSS_ON; } diff -Nru crust-firmware-0.5/drivers/css/css_default.c crust-firmware-0.6/drivers/css/css_default.c --- crust-firmware-0.5/drivers/css/css_default.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/css/css_default.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/css/css.h crust-firmware-0.6/drivers/css/css.h --- crust-firmware-0.5/drivers/css/css.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/css/css.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2019-2021 The Crust Firmware Authors. + * Copyright © 2019-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/css/css_helpers.c crust-firmware-0.6/drivers/css/css_helpers.c --- crust-firmware-0.5/drivers/css/css_helpers.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/css/css_helpers.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/css/css_power_state.c crust-firmware-0.6/drivers/css/css_power_state.c --- crust-firmware-0.5/drivers/css/css_power_state.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/css/css_power_state.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/css/Makefile crust-firmware-0.6/drivers/css/Makefile --- crust-firmware-0.5/drivers/css/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/css/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # @@ -8,6 +8,7 @@ obj-y += css_helpers.o obj-y += css_power_state.o +obj-$(CONFIG_PLATFORM_A23) += sun6i-a31-css.o obj-$(CONFIG_PLATFORM_A64) += sun50i-a64-css.o -obj-$(CONFIG_PLATFORM_H3) += sun8i-h3-css.o +obj-$(CONFIG_PLATFORM_H3) += sun6i-a31-css.o obj-$(CONFIG_PLATFORM_H6) += sun50i-h6-css.o diff -Nru crust-firmware-0.5/drivers/css/sun50i-a64-css.c crust-firmware-0.6/drivers/css/sun50i-a64-css.c --- crust-firmware-0.5/drivers/css/sun50i-a64-css.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/css/sun50i-a64-css.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/css/sun50i-h6-css.c crust-firmware-0.6/drivers/css/sun50i-h6-css.c --- crust-firmware-0.5/drivers/css/sun50i-h6-css.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/css/sun50i-h6-css.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/css/sun6i-a31-css.c crust-firmware-0.6/drivers/css/sun6i-a31-css.c --- crust-firmware-0.5/drivers/css/sun6i-a31-css.c 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/css/sun6i-a31-css.c 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,142 @@ +/* + * Copyright © 2017-2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "css.h" + +#define PLL_PERIPH0_CTRL_REG 0x0028 +#define CPUX_AXI_CFG_REG 0x0050 +#define AHB1_APB1_CFG_REG 0x0054 + +#if CONFIG(PLATFORM_H3) + +uint32_t +css_get_irq_status(void) +{ + return mmio_read_32(IRQ_FIQ_STATUS_REG); +} + +#endif + +void +css_suspend_css(uint32_t new_state) +{ + if (new_state < SCPI_CSS_OFF) + return; + + /* Assert the CPU subsystem reset (active-low). */ + mmio_write_32(CPU_SYS_RESET_REG, 0); +} + +void +css_resume_css(uint32_t old_state) +{ + if (old_state < SCPI_CSS_OFF) + return; + + /* Deassert the CPU subsystem reset (active-low). */ + mmio_write_32(CPU_SYS_RESET_REG, CPU_SYS_RESET); +} + +void +css_suspend_cluster(uint32_t cluster, uint32_t new_state) +{ + if (new_state < SCPI_CSS_RETENTION) + return; + + /* Lower the cluster clock frequency. */ + ccu_suspend_cluster(cluster); +} + +void +css_resume_cluster(uint32_t cluster, uint32_t old_state) +{ + if (old_state < SCPI_CSS_RETENTION) + return; + + /* Raise the cluster clock frequency. */ + ccu_resume_cluster(cluster); +} + +void +css_suspend_core(uint32_t cluster UNUSED, uint32_t core, uint32_t new_state) +{ + if (new_state < SCPI_CSS_OFF) + return; + + /* Wait for the core to be in WFI and ready to shut down. */ + mmio_poll_32(CPUn_STATUS_REG(core), CPUn_STATUS_REG_STANDBYWFI); + /* Deassert DBGPWRDUP (prevent debug access to the core). */ + mmio_clr_32(DBG_CTRL_REG1, DBG_CTRL_REG1_DBGPWRDUP(core)); + /* Core 0 does not have a separate power domain. */ + if (core > 0) { + /* Activate the core output clamps. */ + mmio_set_32(C0_PWROFF_GATING_REG, C0_CPUn_PWROFF_GATING(core)); + /* Remove power from the core power domain. */ + css_set_power_switch(C0_CPUn_PWR_SWITCH_REG(core), false); + } else { + /* Assert core reset and power-on reset (active-low). */ + mmio_write_32(CPUn_RST_CTRL_REG(core), 0); + } +} + +void +css_resume_core(uint32_t cluster UNUSED, uint32_t core, uint32_t old_state) +{ + uint32_t bus_clk, cpu_clk; + + if (old_state < SCPI_CSS_OFF) + return; + + /* Core 0 does not have a separate power domain. */ + if (core > 0) { + /* Assert core reset and power-on reset (active-low). */ + mmio_write_32(CPUn_RST_CTRL_REG(core), 0); + /* Turn on power to the core power domain. */ + css_set_power_switch(C0_CPUn_PWR_SWITCH_REG(core), true); + /* Release the core output clamps. */ + mmio_clr_32(C0_PWROFF_GATING_REG, C0_CPUn_PWROFF_GATING(core)); + } else if (CONFIG(PLATFORM_H3)) { + /* Save registers that will be clobbered by the BROM. */ + cpu_clk = mmio_read_32(DEV_CCU + CPUX_AXI_CFG_REG); + bus_clk = mmio_read_32(DEV_CCU + AHB1_APB1_CFG_REG); + + /* Bypass PLL_PERIPH0 so AHB1 frequency does not spike. */ + mmio_set_32(DEV_CCU + PLL_PERIPH0_CTRL_REG, BIT(25)); + } + /* Deassert core reset and power-on reset (active-low). */ + mmio_write_32(CPUn_RST_CTRL_REG(core), + CPUn_RST_CTRL_REG_nCORERESET | + CPUn_RST_CTRL_REG_nCPUPORESET); + if (core == 0 && CONFIG(PLATFORM_H3)) { + /* Spin until the BROM has clobbered the clock registers. */ + mmio_pollz_32(DEV_CCU + AHB1_APB1_CFG_REG, BIT(13)); + + /* Disable PLL_PERIPH0 bypass. */ + mmio_clr_32(DEV_CCU + PLL_PERIPH0_CTRL_REG, BIT(25)); + + /* Restore the clobbered registers. */ + mmio_write_32(DEV_CCU + CPUX_AXI_CFG_REG, cpu_clk); + mmio_write_32(DEV_CCU + AHB1_APB1_CFG_REG, bus_clk); + } + /* Assert DBGPWRDUP (allow debug access to the core). */ + mmio_set_32(DBG_CTRL_REG1, DBG_CTRL_REG1_DBGPWRDUP(core)); +} + +void +css_init(void) +{ + /* Enable hardware L1/L2 cache flush for all cores (active-low). */ + mmio_clr_32(GEN_CTRL_REG, + GEN_CTRL_REG_L2RSTDISABLE | + GEN_CTRL_REG_L1RSTDISABLE_MASK); +} diff -Nru crust-firmware-0.5/drivers/css/sun8i-h3-css.c crust-firmware-0.6/drivers/css/sun8i-h3-css.c --- crust-firmware-0.5/drivers/css/sun8i-h3-css.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/css/sun8i-h3-css.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,138 +0,0 @@ -/* - * Copyright © 2017-2021 The Crust Firmware Authors. - * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "css.h" - -#define PLL_PERIPH0_CTRL_REG 0x0028 -#define CPUX_AXI_CFG_REG 0x0050 -#define AHB1_APB1_CFG_REG 0x0054 - -uint32_t -css_get_irq_status(void) -{ - return mmio_read_32(IRQ_FIQ_STATUS_REG); -} - -void -css_suspend_css(uint32_t new_state) -{ - if (new_state < SCPI_CSS_OFF) - return; - - /* Assert the CPU subsystem reset (active-low). */ - mmio_write_32(CPU_SYS_RESET_REG, 0); -} - -void -css_resume_css(uint32_t old_state) -{ - if (old_state < SCPI_CSS_OFF) - return; - - /* Deassert the CPU subsystem reset (active-low). */ - mmio_write_32(CPU_SYS_RESET_REG, CPU_SYS_RESET); -} - -void -css_suspend_cluster(uint32_t cluster, uint32_t new_state) -{ - if (new_state < SCPI_CSS_RETENTION) - return; - - /* Lower the cluster clock frequency. */ - ccu_suspend_cluster(cluster); -} - -void -css_resume_cluster(uint32_t cluster, uint32_t old_state) -{ - if (old_state < SCPI_CSS_RETENTION) - return; - - /* Raise the cluster clock frequency. */ - ccu_resume_cluster(cluster); -} - -void -css_suspend_core(uint32_t cluster UNUSED, uint32_t core, uint32_t new_state) -{ - if (new_state < SCPI_CSS_OFF) - return; - - /* Wait for the core to be in WFI and ready to shut down. */ - mmio_poll_32(CPUn_STATUS_REG(core), CPUn_STATUS_REG_STANDBYWFI); - /* Deassert DBGPWRDUP (prevent debug access to the core). */ - mmio_clr_32(DBG_CTRL_REG1, DBG_CTRL_REG1_DBGPWRDUP(core)); - /* Core 0 does not have a separate power domain. */ - if (core > 0) { - /* Activate the core output clamps. */ - mmio_set_32(C0_PWROFF_GATING_REG, C0_CPUn_PWROFF_GATING(core)); - /* Remove power from the core power domain. */ - css_set_power_switch(C0_CPUn_PWR_SWITCH_REG(core), false); - } else { - /* Assert core reset and power-on reset (active-low). */ - mmio_write_32(CPUn_RST_CTRL_REG(core), 0); - } -} - -void -css_resume_core(uint32_t cluster UNUSED, uint32_t core, uint32_t old_state) -{ - uint32_t bus_clk, cpu_clk; - - if (old_state < SCPI_CSS_OFF) - return; - - /* Core 0 does not have a separate power domain. */ - if (core > 0) { - /* Assert core reset and power-on reset (active-low). */ - mmio_write_32(CPUn_RST_CTRL_REG(core), 0); - /* Turn on power to the core power domain. */ - css_set_power_switch(C0_CPUn_PWR_SWITCH_REG(core), true); - /* Release the core output clamps. */ - mmio_clr_32(C0_PWROFF_GATING_REG, C0_CPUn_PWROFF_GATING(core)); - } else { - /* Save registers that will be clobbered by the BROM. */ - cpu_clk = mmio_read_32(DEV_CCU + CPUX_AXI_CFG_REG); - bus_clk = mmio_read_32(DEV_CCU + AHB1_APB1_CFG_REG); - - /* Bypass PLL_PERIPH0 so AHB1 frequency does not spike. */ - mmio_set_32(DEV_CCU + PLL_PERIPH0_CTRL_REG, BIT(25)); - } - /* Deassert core reset and power-on reset (active-low). */ - mmio_write_32(CPUn_RST_CTRL_REG(core), - CPUn_RST_CTRL_REG_nCORERESET | - CPUn_RST_CTRL_REG_nCPUPORESET); - if (core == 0) { - /* Spin until the BROM has clobbered the clock registers. */ - mmio_pollz_32(DEV_CCU + AHB1_APB1_CFG_REG, BIT(13)); - - /* Disable PLL_PERIPH0 bypass. */ - mmio_clr_32(DEV_CCU + PLL_PERIPH0_CTRL_REG, BIT(25)); - - /* Restore the clobbered registers. */ - mmio_write_32(DEV_CCU + CPUX_AXI_CFG_REG, cpu_clk); - mmio_write_32(DEV_CCU + AHB1_APB1_CFG_REG, bus_clk); - } - /* Assert DBGPWRDUP (allow debug access to the core). */ - mmio_set_32(DBG_CTRL_REG1, DBG_CTRL_REG1_DBGPWRDUP(core)); -} - -void -css_init(void) -{ - /* Enable hardware L1/L2 cache flush for all cores (active-low). */ - mmio_clr_32(GEN_CTRL_REG, - GEN_CTRL_REG_L2RSTDISABLE | - GEN_CTRL_REG_L1RSTDISABLE_MASK); -} diff -Nru crust-firmware-0.5/drivers/dram/dram.c crust-firmware-0.6/drivers/dram/dram.c --- crust-firmware-0.5/drivers/dram/dram.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/dram/dram.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/dram/Makefile crust-firmware-0.6/drivers/dram/Makefile --- crust-firmware-0.5/drivers/dram/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/dram/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/drivers/dram/sun50i-h6-dram.c crust-firmware-0.6/drivers/dram/sun50i-h6-dram.c --- crust-firmware-0.5/drivers/dram/sun50i-h6-dram.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/dram/sun50i-h6-dram.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/dram/sun8i-h3-dram.c crust-firmware-0.6/drivers/dram/sun8i-h3-dram.c --- crust-firmware-0.5/drivers/dram/sun8i-h3-dram.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/dram/sun8i-h3-dram.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/gpio/gpio.c crust-firmware-0.6/drivers/gpio/gpio.c --- crust-firmware-0.5/drivers/gpio/gpio.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/gpio/gpio.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/gpio/gpio.h crust-firmware-0.6/drivers/gpio/gpio.h --- crust-firmware-0.5/drivers/gpio/gpio.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/gpio/gpio.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/gpio/Makefile crust-firmware-0.6/drivers/gpio/Makefile --- crust-firmware-0.5/drivers/gpio/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/gpio/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/drivers/gpio/sunxi-gpio.c crust-firmware-0.6/drivers/gpio/sunxi-gpio.c --- crust-firmware-0.5/drivers/gpio/sunxi-gpio.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/gpio/sunxi-gpio.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/irq/irq.c crust-firmware-0.6/drivers/irq/irq.c --- crust-firmware-0.5/drivers/irq/irq.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/irq/irq.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/irq/Makefile crust-firmware-0.6/drivers/irq/Makefile --- crust-firmware-0.5/drivers/irq/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/irq/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,10 +1,11 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # obj-y += irq.o +obj-$(CONFIG_PLATFORM_A23) += sun6i-a31-r-intc.o obj-$(CONFIG_PLATFORM_A64) += sun6i-a31-r-intc.o obj-$(CONFIG_PLATFORM_A83T) += sun6i-a31-r-intc.o obj-$(CONFIG_PLATFORM_H3) += sun6i-a31-r-intc.o diff -Nru crust-firmware-0.5/drivers/irq/sun6i-a31-r-intc.c crust-firmware-0.6/drivers/irq/sun6i-a31-r-intc.c --- crust-firmware-0.5/drivers/irq/sun6i-a31-r-intc.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/irq/sun6i-a31-r-intc.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/Kconfig crust-firmware-0.6/drivers/Kconfig --- crust-firmware-0.5/drivers/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # @@ -13,5 +13,6 @@ source "pmic/Kconfig" source "regulator/Kconfig" source "serial/Kconfig" +source "watchdog/Kconfig" endmenu diff -Nru crust-firmware-0.5/drivers/Makefile crust-firmware-0.6/drivers/Makefile --- crust-firmware-0.5/drivers/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,11 +1,12 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # obj-$(CONFIG_CEC) += cec/ obj-$(CONFIG_CIR) += cir/ obj-y += clock/ +obj-y += counter/ obj-y += css/ obj-y += dram/ obj-y += gpio/ diff -Nru crust-firmware-0.5/drivers/mfd/axp20x.c crust-firmware-0.6/drivers/mfd/axp20x.c --- crust-firmware-0.5/drivers/mfd/axp20x.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/mfd/axp20x.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -14,7 +14,11 @@ #define IC_TYPE_REG 0x03 #define IC_TYPE_MASK 0xcf -#if CONFIG(MFD_AXP803) +#if CONFIG(MFD_AXP223) +#define IC_TYPE_VALUE 0x06 +#define I2C_ADDRESS 0x34 +#define RSB_ADDRESS (0x2d << 16 | 0x3a3) +#elif CONFIG(MFD_AXP803) #define IC_TYPE_VALUE 0x41 #define I2C_ADDRESS 0x34 #define RSB_ADDRESS (0x2d << 16 | 0x3a3) diff -Nru crust-firmware-0.5/drivers/mfd/Kconfig crust-firmware-0.6/drivers/mfd/Kconfig --- crust-firmware-0.5/drivers/mfd/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/mfd/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2020-2021 The Crust Firmware Authors. +# Copyright © 2020-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # @@ -20,9 +20,15 @@ choice bool "X-Powers PMIC variant" depends on MFD_AXP20X + default MFD_AXP223 if PLATFORM_A23 default MFD_AXP803 if PLATFORM_A64 default MFD_AXP805 if PLATFORM_H6 +config MFD_AXP223 + bool "AXP223" + help + This PMIC is usually paired with the A23/A33 SoC. + config MFD_AXP803 bool "AXP803" help diff -Nru crust-firmware-0.5/drivers/mfd/Makefile crust-firmware-0.6/drivers/mfd/Makefile --- crust-firmware-0.5/drivers/mfd/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/mfd/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/drivers/msgbox/Makefile crust-firmware-0.6/drivers/msgbox/Makefile --- crust-firmware-0.5/drivers/msgbox/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/msgbox/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/drivers/msgbox/msgbox.c crust-firmware-0.6/drivers/msgbox/msgbox.c --- crust-firmware-0.5/drivers/msgbox/msgbox.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/msgbox/msgbox.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/msgbox/msgbox.h crust-firmware-0.6/drivers/msgbox/msgbox.h --- crust-firmware-0.5/drivers/msgbox/msgbox.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/msgbox/msgbox.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/msgbox/sunxi-msgbox.c crust-firmware-0.6/drivers/msgbox/sunxi-msgbox.c --- crust-firmware-0.5/drivers/msgbox/sunxi-msgbox.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/msgbox/sunxi-msgbox.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/pmic/axp20x.c crust-firmware-0.6/drivers/pmic/axp20x.c --- crust-firmware-0.5/drivers/pmic/axp20x.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/pmic/axp20x.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/pmic/axp20x.h crust-firmware-0.6/drivers/pmic/axp20x.h --- crust-firmware-0.5/drivers/pmic/axp20x.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/pmic/axp20x.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/pmic/axp223.c crust-firmware-0.6/drivers/pmic/axp223.c --- crust-firmware-0.5/drivers/pmic/axp223.c 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/pmic/axp223.c 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,42 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#include +#include +#include +#include + +#include "axp20x.h" + +static int +axp223_pmic_suspend(const struct device *dev) +{ + const struct axp20x_pmic *self = to_axp20x_pmic(dev); + + /* Enable resume, allow IRQs during suspend. */ + return regmap_set_bits(self->map, WAKEUP_CTRL_REG, BIT(4) | BIT(3)); +} + +static const struct pmic_driver axp223_pmic_driver = { + .drv = { + .probe = axp20x_pmic_probe, + .release = axp20x_pmic_release, + }, + .ops = { + .reset = axp20x_pmic_reset, + .resume = axp20x_pmic_resume, + .shutdown = axp20x_pmic_shutdown, + .suspend = axp223_pmic_suspend, + }, +}; + +const struct axp20x_pmic axp223_pmic = { + .dev = { + .name = "axp223-pmic", + .drv = &axp223_pmic_driver.drv, + .state = DEVICE_STATE_INIT, + }, + .map = &axp20x.map, +}; diff -Nru crust-firmware-0.5/drivers/pmic/axp803.c crust-firmware-0.6/drivers/pmic/axp803.c --- crust-firmware-0.5/drivers/pmic/axp803.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/pmic/axp803.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/pmic/axp805.c crust-firmware-0.6/drivers/pmic/axp805.c --- crust-firmware-0.5/drivers/pmic/axp805.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/pmic/axp805.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/pmic/Kconfig crust-firmware-0.6/drivers/pmic/Kconfig --- crust-firmware-0.5/drivers/pmic/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/pmic/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # @@ -8,6 +8,11 @@ config PMIC bool +config PMIC_AXP223 + bool + select PMIC + default MFD_AXP223 + config PMIC_AXP803 bool select PMIC diff -Nru crust-firmware-0.5/drivers/pmic/Makefile crust-firmware-0.6/drivers/pmic/Makefile --- crust-firmware-0.5/drivers/pmic/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/pmic/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,9 +1,10 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # obj-y += pmic.o +obj-$(CONFIG_PMIC_AXP223) += axp20x.o axp223.o obj-$(CONFIG_PMIC_AXP803) += axp20x.o axp803.o obj-$(CONFIG_PMIC_AXP805) += axp20x.o axp805.o diff -Nru crust-firmware-0.5/drivers/pmic/pmic.c crust-firmware-0.6/drivers/pmic/pmic.c --- crust-firmware-0.5/drivers/pmic/pmic.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/pmic/pmic.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,11 +1,12 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ #include #include #include +#include #include #include @@ -28,9 +29,11 @@ { const struct device *pmic = NULL; + if (CONFIG(PMIC_AXP223)) + pmic = device_get_or_null(&axp223_pmic.dev); if (CONFIG(PMIC_AXP803)) pmic = device_get_or_null(&axp803_pmic.dev); - if (!pmic && CONFIG(PMIC_AXP805)) + if (CONFIG(PMIC_AXP805)) pmic = device_get_or_null(&axp805_pmic.dev); return pmic; diff -Nru crust-firmware-0.5/drivers/pmic/pmic.h crust-firmware-0.6/drivers/pmic/pmic.h --- crust-firmware-0.5/drivers/pmic/pmic.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/pmic/pmic.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/regmap/Kconfig crust-firmware-0.6/drivers/regmap/Kconfig --- crust-firmware-0.5/drivers/regmap/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regmap/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,12 +1,12 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # choice bool "I2C controller pin selection" - depends on HAVE_I2C - default I2C_PINS_NONE if HAVE_RSB + depends on HAVE_R_I2C + default I2C_PINS_NONE if HAVE_R_RSB default I2C_PINS_PL0_PL1 help Choose which pair of pins is used for the I2C bus. @@ -30,7 +30,7 @@ config I2C_PINS_PL8_PL9 bool "PL8/PL9" - depends on HAVE_RSB + depends on HAVE_R_RSB help Select this option if your board has a PMIC or regulator connected via I2C using the alternate set of pins. @@ -40,21 +40,21 @@ config I2C_PIN_MODE_PL0_PL1 int depends on I2C_PINS_PL0_PL1 - default 3 if HAVE_RSB + default 3 if HAVE_R_RSB default 2 help Provide the pin mode that configures PL0/PL1 as I2C SCL/SDA. config I2C bool - default HAVE_I2C && (!I2C_PINS_NONE || COMPILE_TEST) + default HAVE_R_I2C && (!I2C_PINS_NONE || COMPILE_TEST) help This option is selected if the chosen pin configuration allows the I2C controller to be used. config RSB bool - default HAVE_RSB && (!I2C_PINS_PL0_PL1 || COMPILE_TEST) + default HAVE_R_RSB && (!I2C_PINS_PL0_PL1 || COMPILE_TEST) help This option is selected if the chosen pin configuration allows the RSB controller to be used. diff -Nru crust-firmware-0.5/drivers/regmap/Makefile crust-firmware-0.6/drivers/regmap/Makefile --- crust-firmware-0.5/drivers/regmap/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regmap/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/drivers/regmap/regmap.c crust-firmware-0.6/drivers/regmap/regmap.c --- crust-firmware-0.5/drivers/regmap/regmap.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regmap/regmap.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/regmap/regmap.h crust-firmware-0.6/drivers/regmap/regmap.h --- crust-firmware-0.5/drivers/regmap/regmap.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regmap/regmap.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/regmap/regmap-i2c.c crust-firmware-0.6/drivers/regmap/regmap-i2c.c --- crust-firmware-0.5/drivers/regmap/regmap-i2c.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regmap/regmap-i2c.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/regmap/regmap-i2c.h crust-firmware-0.6/drivers/regmap/regmap-i2c.h --- crust-firmware-0.5/drivers/regmap/regmap-i2c.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regmap/regmap-i2c.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/regmap/sun6i-i2c.c crust-firmware-0.6/drivers/regmap/sun6i-i2c.c --- crust-firmware-0.5/drivers/regmap/sun6i-i2c.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regmap/sun6i-i2c.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/regmap/sunxi-rsb.c crust-firmware-0.6/drivers/regmap/sunxi-rsb.c --- crust-firmware-0.5/drivers/regmap/sunxi-rsb.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regmap/sunxi-rsb.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/regulator/axp20x.c crust-firmware-0.6/drivers/regulator/axp20x.c --- crust-firmware-0.5/drivers/regulator/axp20x.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/axp20x.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -8,10 +8,6 @@ #include "axp20x.h" -#define GPIO_LDO_MASK 0x7 -#define GPIO_LDO_ON 0x3 -#define GPIO_LDO_OFF 0x4 - static int axp20x_regulator_get_state(const struct regulator_handle *handle, bool *enabled) @@ -25,14 +21,7 @@ if ((err = regmap_read(self->map, addr, &val))) return err; - /* - * GPIO LDOs have a pin function, not an enable bit. Their - * distinguishing feature is a mask containing more than one bit. - */ - if (mask == GPIO_LDO_MASK) - *enabled = (val & mask) == GPIO_LDO_ON; - else - *enabled = (val & mask); + *enabled = (val & mask); return SUCCESS; } @@ -43,18 +32,8 @@ const struct axp20x_regulator *self = to_axp20x_regulator(handle->dev); uint8_t addr = self->info[handle->id].enable_register; uint8_t mask = self->info[handle->id].enable_mask; - uint8_t val; - - /* - * GPIO LDOs have a pin function, not an enable bit. Their - * distinguishing feature is a mask containing more than one bit. - */ - if (mask == GPIO_LDO_MASK) - val = enabled ? GPIO_LDO_ON : GPIO_LDO_OFF; - else - val = enabled ? mask : 0; - return regmap_update_bits(self->map, addr, mask, val); + return regmap_update_bits(self->map, addr, mask, enabled ? mask : 0); } static int diff -Nru crust-firmware-0.5/drivers/regulator/axp20x.h crust-firmware-0.6/drivers/regulator/axp20x.h --- crust-firmware-0.5/drivers/regulator/axp20x.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/axp20x.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -15,8 +15,6 @@ struct axp20x_regulator_info { uint8_t enable_register; uint8_t enable_mask; - uint8_t value_register; - uint8_t value_mask; }; extern const struct regulator_driver axp20x_regulator_driver; diff -Nru crust-firmware-0.5/drivers/regulator/axp221.c crust-firmware-0.6/drivers/regulator/axp221.c --- crust-firmware-0.5/drivers/regulator/axp221.c 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/axp221.c 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,96 @@ +/* + * Copyright © 2023 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#include +#include +#include +#include + +#include "axp20x.h" + +#define OUTPUT_POWER_CONTROL1 0x10 +#define OUTPUT_POWER_CONTROL2 0x12 +#define OUTPUT_POWER_CONTROL3 0x13 + +static const struct axp20x_regulator_info axp221_regulators[] = { + [AXP221_REGL_DC5LDO] = { + .enable_register = OUTPUT_POWER_CONTROL1, + .enable_mask = BIT(0), + }, + [AXP221_REGL_DCDC1] = { + .enable_register = OUTPUT_POWER_CONTROL1, + .enable_mask = BIT(1), + }, + [AXP221_REGL_DCDC2] = { + .enable_register = OUTPUT_POWER_CONTROL1, + .enable_mask = BIT(2), + }, + [AXP221_REGL_DCDC3] = { + .enable_register = OUTPUT_POWER_CONTROL1, + .enable_mask = BIT(3), + }, + [AXP221_REGL_DCDC4] = { + .enable_register = OUTPUT_POWER_CONTROL1, + .enable_mask = BIT(4), + }, + [AXP221_REGL_DCDC5] = { + .enable_register = OUTPUT_POWER_CONTROL1, + .enable_mask = BIT(5), + }, + [AXP221_REGL_ALDO1] = { + .enable_register = OUTPUT_POWER_CONTROL1, + .enable_mask = BIT(6), + }, + [AXP221_REGL_ALDO2] = { + .enable_register = OUTPUT_POWER_CONTROL1, + .enable_mask = BIT(7), + }, + [AXP221_REGL_ALDO3] = { + .enable_register = OUTPUT_POWER_CONTROL3, + .enable_mask = BIT(7), + }, + [AXP221_REGL_DLDO1] = { + .enable_register = OUTPUT_POWER_CONTROL2, + .enable_mask = BIT(3), + }, + [AXP221_REGL_DLDO2] = { + .enable_register = OUTPUT_POWER_CONTROL2, + .enable_mask = BIT(4), + }, + [AXP221_REGL_DLDO3] = { + .enable_register = OUTPUT_POWER_CONTROL2, + .enable_mask = BIT(5), + }, + [AXP221_REGL_DLDO4] = { + .enable_register = OUTPUT_POWER_CONTROL2, + .enable_mask = BIT(6), + }, + [AXP221_REGL_ELDO1] = { + .enable_register = OUTPUT_POWER_CONTROL2, + .enable_mask = BIT(0), + }, + [AXP221_REGL_ELDO2] = { + .enable_register = OUTPUT_POWER_CONTROL2, + .enable_mask = BIT(1), + }, + [AXP221_REGL_ELDO3] = { + .enable_register = OUTPUT_POWER_CONTROL2, + .enable_mask = BIT(2), + }, + [AXP221_REGL_DC1SW] = { + .enable_register = OUTPUT_POWER_CONTROL2, + .enable_mask = BIT(7), + }, +}; + +const struct axp20x_regulator axp221_regulator = { + .dev = { + .name = "axp221-regulator", + .drv = &axp20x_regulator_driver.drv, + .state = DEVICE_STATE_INIT, + }, + .map = &axp20x.map, + .info = axp221_regulators, +}; diff -Nru crust-firmware-0.5/drivers/regulator/axp803.c crust-firmware-0.6/drivers/regulator/axp803.c --- crust-firmware-0.5/drivers/regulator/axp803.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/axp803.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -18,128 +18,78 @@ [AXP803_REGL_DCDC1] = { .enable_register = OUTPUT_POWER_CONTROL1, .enable_mask = BIT(0), - .value_register = 0x20, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_DCDC2] = { .enable_register = OUTPUT_POWER_CONTROL1, .enable_mask = BIT(1), - .value_register = 0x21, - .value_mask = GENMASK(6, 0), }, [AXP803_REGL_DCDC3] = { .enable_register = OUTPUT_POWER_CONTROL1, .enable_mask = BIT(2), - .value_register = 0x22, - .value_mask = GENMASK(6, 0), }, [AXP803_REGL_DCDC4] = { .enable_register = OUTPUT_POWER_CONTROL1, .enable_mask = BIT(3), - .value_register = 0x23, - .value_mask = GENMASK(6, 0), }, [AXP803_REGL_DCDC5] = { .enable_register = OUTPUT_POWER_CONTROL1, .enable_mask = BIT(4), - .value_register = 0x24, - .value_mask = GENMASK(6, 0), }, [AXP803_REGL_DCDC6] = { .enable_register = OUTPUT_POWER_CONTROL1, .enable_mask = BIT(5), - .value_register = 0x25, - .value_mask = GENMASK(6, 0), }, [AXP803_REGL_DC1SW] = { .enable_register = OUTPUT_POWER_CONTROL2, .enable_mask = BIT(7), - .value_register = 0x20, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_ALDO1] = { .enable_register = OUTPUT_POWER_CONTROL3, .enable_mask = BIT(5), - .value_register = 0x28, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_ALDO2] = { .enable_register = OUTPUT_POWER_CONTROL3, .enable_mask = BIT(6), - .value_register = 0x29, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_ALDO3] = { .enable_register = OUTPUT_POWER_CONTROL3, .enable_mask = BIT(7), - .value_register = 0x2a, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_DLDO1] = { .enable_register = OUTPUT_POWER_CONTROL2, .enable_mask = BIT(3), - .value_register = 0x15, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_DLDO2] = { .enable_register = OUTPUT_POWER_CONTROL2, .enable_mask = BIT(4), - .value_register = 0x16, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_DLDO3] = { .enable_register = OUTPUT_POWER_CONTROL2, .enable_mask = BIT(5), - .value_register = 0x17, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_DLDO4] = { .enable_register = OUTPUT_POWER_CONTROL2, .enable_mask = BIT(6), - .value_register = 0x18, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_ELDO1] = { .enable_register = OUTPUT_POWER_CONTROL2, .enable_mask = BIT(0), - .value_register = 0x19, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_ELDO2] = { .enable_register = OUTPUT_POWER_CONTROL2, .enable_mask = BIT(1), - .value_register = 0x1a, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_ELDO3] = { .enable_register = OUTPUT_POWER_CONTROL2, .enable_mask = BIT(2), - .value_register = 0x1b, - .value_mask = GENMASK(4, 0), }, [AXP803_REGL_FLDO1] = { .enable_register = OUTPUT_POWER_CONTROL3, .enable_mask = BIT(2), - .value_register = 0x1c, - .value_mask = GENMASK(3, 0), }, [AXP803_REGL_FLDO2] = { .enable_register = OUTPUT_POWER_CONTROL3, .enable_mask = BIT(3), - .value_register = 0x1d, - .value_mask = GENMASK(3, 0), - }, - [AXP803_REGL_GPIO0] = { - .enable_register = 0x90, - .enable_mask = GENMASK(2, 0), - .value_register = 0x91, - .value_mask = GENMASK(4, 0), - }, - [AXP803_REGL_GPIO1] = { - .enable_register = 0x92, - .enable_mask = GENMASK(2, 0), - .value_register = 0x93, - .value_mask = GENMASK(4, 0), }, }; diff -Nru crust-firmware-0.5/drivers/regulator/axp805.c crust-firmware-0.6/drivers/regulator/axp805.c --- crust-firmware-0.5/drivers/regulator/axp805.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/axp805.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -17,92 +17,62 @@ [AXP805_REGL_DCDCA] = { .enable_register = POWER_ONOFF_CTRL_REG1, .enable_mask = BIT(0), - .value_register = 0x12, - .value_mask = GENMASK(6, 0), }, [AXP805_REGL_DCDCB] = { .enable_register = POWER_ONOFF_CTRL_REG1, .enable_mask = BIT(1), - .value_register = 0x13, - .value_mask = GENMASK(4, 0), }, [AXP805_REGL_DCDCC] = { .enable_register = POWER_ONOFF_CTRL_REG1, .enable_mask = BIT(2), - .value_register = 0x14, - .value_mask = GENMASK(6, 0), }, [AXP805_REGL_DCDCD] = { .enable_register = POWER_ONOFF_CTRL_REG1, .enable_mask = BIT(3), - .value_register = 0x15, - .value_mask = GENMASK(5, 0), }, [AXP805_REGL_DCDCE] = { .enable_register = POWER_ONOFF_CTRL_REG1, .enable_mask = BIT(4), - .value_register = 0x16, - .value_mask = GENMASK(4, 0), }, [AXP805_REGL_ALDO1] = { .enable_register = POWER_ONOFF_CTRL_REG1, .enable_mask = BIT(5), - .value_register = 0x17, - .value_mask = GENMASK(4, 0), }, [AXP805_REGL_ALDO2] = { .enable_register = POWER_ONOFF_CTRL_REG1, .enable_mask = BIT(6), - .value_register = 0x18, - .value_mask = GENMASK(4, 0), }, [AXP805_REGL_ALDO3] = { .enable_register = POWER_ONOFF_CTRL_REG1, .enable_mask = BIT(7), - .value_register = 0x19, - .value_mask = GENMASK(4, 0), }, [AXP805_REGL_BLDO1] = { .enable_register = POWER_ONOFF_CTRL_REG2, .enable_mask = BIT(0), - .value_register = 0x20, - .value_mask = GENMASK(3, 0), }, [AXP805_REGL_BLDO2] = { .enable_register = POWER_ONOFF_CTRL_REG2, .enable_mask = BIT(1), - .value_register = 0x21, - .value_mask = GENMASK(3, 0), }, [AXP805_REGL_BLDO3] = { .enable_register = POWER_ONOFF_CTRL_REG2, .enable_mask = BIT(2), - .value_register = 0x22, - .value_mask = GENMASK(3, 0), }, [AXP805_REGL_BLDO4] = { .enable_register = POWER_ONOFF_CTRL_REG2, .enable_mask = BIT(3), - .value_register = 0x23, - .value_mask = GENMASK(3, 0), }, [AXP805_REGL_CLDO1] = { .enable_register = POWER_ONOFF_CTRL_REG2, .enable_mask = BIT(4), - .value_register = 0x24, - .value_mask = GENMASK(4, 0), }, [AXP805_REGL_CLDO2] = { .enable_register = POWER_ONOFF_CTRL_REG2, .enable_mask = BIT(5), - .value_register = 0x25, - .value_mask = GENMASK(4, 0), }, [AXP805_REGL_CLDO3] = { .enable_register = POWER_ONOFF_CTRL_REG2, .enable_mask = BIT(6), - .value_register = 0x26, - .value_mask = GENMASK(4, 0), }, [AXP805_REGL_DCSW] = { .enable_register = POWER_ONOFF_CTRL_REG2, diff -Nru crust-firmware-0.5/drivers/regulator/gpio.c crust-firmware-0.6/drivers/regulator/gpio.c --- crust-firmware-0.5/drivers/regulator/gpio.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/gpio.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/regulator/Kconfig crust-firmware-0.6/drivers/regulator/Kconfig --- crust-firmware-0.5/drivers/regulator/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,10 +1,14 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # menu "Regulators (voltage/current)" +config REGULATOR_AXP221 + bool + default MFD_AXP223 + config REGULATOR_AXP803 bool default MFD_AXP803 diff -Nru crust-firmware-0.5/drivers/regulator/Makefile crust-firmware-0.6/drivers/regulator/Makefile --- crust-firmware-0.5/drivers/regulator/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,10 +1,11 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # obj-y += regulator.o +obj-$(CONFIG_REGULATOR_AXP221) += axp20x.o axp221.o obj-$(CONFIG_REGULATOR_AXP803) += axp20x.o axp803.o obj-$(CONFIG_REGULATOR_AXP805) += axp20x.o axp805.o obj-$(CONFIG_REGULATOR_GPIO) += gpio.o diff -Nru crust-firmware-0.5/drivers/regulator/regulator.c crust-firmware-0.6/drivers/regulator/regulator.c --- crust-firmware-0.5/drivers/regulator/regulator.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/regulator.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/regulator/regulator.h crust-firmware-0.6/drivers/regulator/regulator.h --- crust-firmware-0.5/drivers/regulator/regulator.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/regulator.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/regulator/sy8106a.c crust-firmware-0.6/drivers/regulator/sy8106a.c --- crust-firmware-0.5/drivers/regulator/sy8106a.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/regulator/sy8106a.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/serial/Kconfig crust-firmware-0.6/drivers/serial/Kconfig --- crust-firmware-0.5/drivers/serial/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/serial/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/drivers/serial/Makefile crust-firmware-0.6/drivers/serial/Makefile --- crust-firmware-0.5/drivers/serial/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/serial/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,10 +1,11 @@ # -# Copyright © 2019-2021 The Crust Firmware Authors. +# Copyright © 2019-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # obj-y += serial.o uart.o +obj-$(CONFIG_PLATFORM_A23) += sun8i-a23-uart.o obj-$(CONFIG_PLATFORM_A83T) += sun8i-a83t-uart.o obj-$(CONFIG_PLATFORM_H3) += sun8i-h3-uart.o obj-$(CONFIG_PLATFORM_H6) += sun50i-h6-uart.o diff -Nru crust-firmware-0.5/drivers/serial/serial.c crust-firmware-0.6/drivers/serial/serial.c --- crust-firmware-0.5/drivers/serial/serial.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/serial/serial.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/serial/sun50i-a64-uart.c crust-firmware-0.6/drivers/serial/sun50i-a64-uart.c --- crust-firmware-0.5/drivers/serial/sun50i-a64-uart.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/serial/sun50i-a64-uart.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/serial/sun50i-h6-uart.c crust-firmware-0.6/drivers/serial/sun50i-h6-uart.c --- crust-firmware-0.5/drivers/serial/sun50i-h6-uart.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/serial/sun50i-h6-uart.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/serial/sun8i-a23-uart.c crust-firmware-0.6/drivers/serial/sun8i-a23-uart.c --- crust-firmware-0.5/drivers/serial/sun8i-a23-uart.c 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/serial/sun8i-a23-uart.c 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,180 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#include +#include +#include + +#include "uart.h" + +#if CONFIG(SERIAL_DEV_UART0) + +const struct simple_device uart = { + .dev = { + .name = "uart0", + .drv = &uart_driver, + .state = DEVICE_STATE_INIT, + }, + .clock = { .dev = &ccu.dev, .id = CLK_BUS_UART0 }, + .pins = SIMPLE_DEVICE_PINS_INIT { + { + .dev = &pio.dev, + .id = SUNXI_GPIO_PIN(5, 2), /* PF2 */ + .drive = DRIVE_10mA, + .mode = 3, + .pull = PULL_NONE, + }, + { + .dev = &pio.dev, + .id = SUNXI_GPIO_PIN(5, 4), /* PF4 */ + .drive = DRIVE_10mA, + .mode = 3, + .pull = PULL_UP, + }, + }, + .regs = DEV_UART0, +}; + +#elif CONFIG(SERIAL_DEV_UART1) + +const struct simple_device uart = { + .dev = { + .name = "uart1", + .drv = &uart_driver, + .state = DEVICE_STATE_INIT, + }, + .clock = { .dev = &ccu.dev, .id = CLK_BUS_UART1 }, + .pins = SIMPLE_DEVICE_PINS_INIT { + { + .dev = &pio.dev, + .id = SUNXI_GPIO_PIN(6, 6), /* PG6 */ + .drive = DRIVE_10mA, + .mode = 2, + .pull = PULL_NONE, + }, + { + .dev = &pio.dev, + .id = SUNXI_GPIO_PIN(6, 7), /* PG7 */ + .drive = DRIVE_10mA, + .mode = 2, + .pull = PULL_UP, + }, + }, + .regs = DEV_UART1, +}; + +#elif CONFIG(SERIAL_DEV_UART2) + +const struct simple_device uart = { + .dev = { + .name = "uart2", + .drv = &uart_driver, + .state = DEVICE_STATE_INIT, + }, + .clock = { .dev = &ccu.dev, .id = CLK_BUS_UART2 }, + .pins = SIMPLE_DEVICE_PINS_INIT { + { + .dev = &pio.dev, + .id = SUNXI_GPIO_PIN(1, 0), /* PB0 */ + .drive = DRIVE_10mA, + .mode = 2, + .pull = PULL_NONE, + }, + { + .dev = &pio.dev, + .id = SUNXI_GPIO_PIN(1, 1), /* PB1 */ + .drive = DRIVE_10mA, + .mode = 2, + .pull = PULL_UP, + }, + }, + .regs = DEV_UART2, +}; + +#elif CONFIG(SERIAL_DEV_UART3) + +const struct simple_device uart = { + .dev = { + .name = "uart3", + .drv = &uart_driver, + .state = DEVICE_STATE_INIT, + }, + .clock = { .dev = &ccu.dev, .id = CLK_BUS_UART3 }, + .pins = SIMPLE_DEVICE_PINS_INIT { + { + .dev = &pio.dev, + .id = SUNXI_GPIO_PIN(7, 6), /* PH4 */ + .drive = DRIVE_10mA, + .mode = 3, + .pull = PULL_NONE, + }, + { + .dev = &pio.dev, + .id = SUNXI_GPIO_PIN(7, 7), /* PH5 */ + .drive = DRIVE_10mA, + .mode = 3, + .pull = PULL_UP, + }, + }, + .regs = DEV_UART3, +}; + +#elif CONFIG(SERIAL_DEV_UART4) + +const struct simple_device uart = { + .dev = { + .name = "uart4", + .drv = &uart_driver, + .state = DEVICE_STATE_INIT, + }, + .clock = { .dev = &ccu.dev, .id = CLK_BUS_UART4 }, + .pins = SIMPLE_DEVICE_PINS_INIT { + { + .dev = &pio.dev, + .id = SUNXI_GPIO_PIN(0, 4), /* PA4 */ + .drive = DRIVE_10mA, + .mode = 3, + .pull = PULL_NONE, + }, + { + .dev = &pio.dev, + .id = SUNXI_GPIO_PIN(0, 5), /* PA5 */ + .drive = DRIVE_10mA, + .mode = 3, + .pull = PULL_UP, + }, + }, + .regs = DEV_UART4, +}; + +#elif CONFIG(SERIAL_DEV_R_UART) + +const struct simple_device uart = { + .dev = { + .name = "r_uart", + .drv = &uart_driver, + .state = DEVICE_STATE_INIT, + }, + .clock = { .dev = &r_ccu.dev, .id = CLK_BUS_R_UART }, + .pins = SIMPLE_DEVICE_PINS_INIT { + { + .dev = &r_pio.dev, + .id = SUNXI_GPIO_PIN(0, 2), /* PL2 */ + .drive = DRIVE_10mA, + .mode = 2, + .pull = PULL_NONE, + }, + { + .dev = &r_pio.dev, + .id = SUNXI_GPIO_PIN(0, 3), /* PL3 */ + .drive = DRIVE_10mA, + .mode = 2, + .pull = PULL_UP, + }, + }, + .regs = DEV_R_UART, +}; + +#endif diff -Nru crust-firmware-0.5/drivers/serial/sun8i-a83t-uart.c crust-firmware-0.6/drivers/serial/sun8i-a83t-uart.c --- crust-firmware-0.5/drivers/serial/sun8i-a83t-uart.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/serial/sun8i-a83t-uart.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/serial/sun8i-h3-uart.c crust-firmware-0.6/drivers/serial/sun8i-h3-uart.c --- crust-firmware-0.5/drivers/serial/sun8i-h3-uart.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/serial/sun8i-h3-uart.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/serial/uart.c crust-firmware-0.6/drivers/serial/uart.c --- crust-firmware-0.5/drivers/serial/uart.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/serial/uart.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/serial/uart.h crust-firmware-0.6/drivers/serial/uart.h --- crust-firmware-0.5/drivers/serial/uart.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/serial/uart.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/drivers/watchdog/Kconfig crust-firmware-0.6/drivers/watchdog/Kconfig --- crust-firmware-0.5/drivers/watchdog/Kconfig 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/watchdog/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,43 @@ +# +# Copyright © 2022 The Crust Firmware Authors. +# SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only +# + +choice + bool "Watchdog timer" + default WATCHDOG_SUN9I_A80_TWD if PLATFORM_H6 + default WATCHDOG_SUN6I_A31_WDT + help + The firmware is monitored by a watchdog timer. If an + error occurs, the watchdog will reset the system instead + of allowing it to hang. + + The watchdog also services user-requested system resets. + +config WATCHDOG_SUN6I_A31_WDT + bool "Watchdog (R_WDOG)" + help + This driver supports the watchdog in A31 and newer SoCs. + + This watchdog timer can reset the system after a minimum + delay of one half second. + + Due to a bug in the H6 SoC, this watchdog timer hardware + is used by other system software on that platform. When + building for an H6 board, do not select this driver + unless you know what you are doing. + +config WATCHDOG_SUN9I_A80_TWD + bool "Trusted watchdog (R_TWD)" + depends on HAVE_R_TWD + help + This driver supports the trusted watchdog in A80 and + newer SoCs. + + This watchdog timer can reset the system immediately. + + Older versions of Linux may interfere with this device, + causing an unexpected reboot during system resume. As a + workaround, select a different watchdog device. + +endchoice diff -Nru crust-firmware-0.5/drivers/watchdog/Makefile crust-firmware-0.6/drivers/watchdog/Makefile --- crust-firmware-0.5/drivers/watchdog/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/watchdog/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,8 +1,9 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # obj-y += watchdog.o -obj-y += sunxi-twd.o +obj-$(CONFIG_WATCHDOG_SUN6I_A31_WDT) += sun6i-a31-wdt.o +obj-$(CONFIG_WATCHDOG_SUN9I_A80_TWD) += sun9i-a80-twd.o diff -Nru crust-firmware-0.5/drivers/watchdog/sun6i-a31-wdt.c crust-firmware-0.6/drivers/watchdog/sun6i-a31-wdt.c --- crust-firmware-0.5/drivers/watchdog/sun6i-a31-wdt.c 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/watchdog/sun6i-a31-wdt.c 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,90 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "watchdog.h" + +#define WDOG_CTRL_REG 0x10 +#define WDOG_CFG_REG 0x14 +#define WDOG_MODE_REG 0x18 + +#define WDOG_RESTART_KEY (0xa57 << 1) + +#define WDOG_LONG_TIMEOUT (5 << 4) /* 5.0 seconds */ +#define WDOG_SHORT_TIMEOUT (0 << 4) /* 0.5 seconds */ + +static inline const struct sun6i_a31_wdt * +to_sun6i_a31_wdt(const struct device *dev) +{ + return container_of(dev, const struct sun6i_a31_wdt, dev); +} + +static void +sun6i_a31_wdt_reset_system(const struct device *dev) +{ + const struct sun6i_a31_wdt *self = to_sun6i_a31_wdt(dev); + + mmio_write_32(self->regs + WDOG_MODE_REG, WDOG_SHORT_TIMEOUT | BIT(0)); + + udelay(1000000); +} + +static void +sun6i_a31_wdt_restart(const struct device *dev) +{ + const struct sun6i_a31_wdt *self = to_sun6i_a31_wdt(dev); + + mmio_write_32(self->regs + WDOG_CTRL_REG, WDOG_RESTART_KEY | BIT(0)); +} + +static int +sun6i_a31_wdt_probe(const struct device *dev) +{ + const struct sun6i_a31_wdt *self = to_sun6i_a31_wdt(dev); + + /* Enable system reset on timeout. */ + mmio_write_32(self->regs + WDOG_CFG_REG, 1); + + /* Start the watchdog with the default (long) timeout. */ + mmio_write_32(self->regs + WDOG_MODE_REG, WDOG_LONG_TIMEOUT | BIT(0)); + + return SUCCESS; +} + +static void +sun6i_a31_wdt_release(const struct device *dev) +{ + const struct sun6i_a31_wdt *self = to_sun6i_a31_wdt(dev); + + /* Stop the watchdog. */ + mmio_write_32(self->regs + WDOG_MODE_REG, 0); +} + +static const struct watchdog_driver sun6i_a31_wdt_driver = { + .drv = { + .probe = sun6i_a31_wdt_probe, + .release = sun6i_a31_wdt_release, + }, + .ops = { + .reset_system = sun6i_a31_wdt_reset_system, + .restart = sun6i_a31_wdt_restart, + }, +}; + +const struct sun6i_a31_wdt r_wdog = { + .dev = { + .name = "r_wdog", + .drv = &sun6i_a31_wdt_driver.drv, + .state = DEVICE_STATE_INIT, + }, + .regs = DEV_R_WDOG, +}; diff -Nru crust-firmware-0.5/drivers/watchdog/sun9i-a80-twd.c crust-firmware-0.6/drivers/watchdog/sun9i-a80-twd.c --- crust-firmware-0.5/drivers/watchdog/sun9i-a80-twd.c 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/drivers/watchdog/sun9i-a80-twd.c 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,105 @@ +/* + * Copyright © 2017-2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "watchdog.h" + +#define TWD_STATUS_REG 0x00 +#define TWD_CTRL_REG 0x10 +#define TWD_RESTART_REG 0x14 +#define TWD_LOW_CNT_REG 0x20 +#define TWD_INTV_REG 0x30 + +#define TWD_RESTART_KEY (0xD14 << 16) + +#define TWD_TIMEOUT (5 * REFCLK_HZ) /* 5 seconds */ + +static void +sun9i_a80_twd_reset_system(const struct device *dev) +{ + const struct simple_device *self = to_simple_device(dev); + + /* Set the timeout to the smallest value. 0 is broken on some SoCs. */ + mmio_write_32(self->regs + TWD_INTV_REG, 1); + + udelay(1); +} + +static void +sun9i_a80_twd_restart(const struct device *dev) +{ + const struct simple_device *self = to_simple_device(dev); + + mmio_write_32(self->regs + TWD_RESTART_REG, TWD_RESTART_KEY | BIT(0)); +} + +static int +sun9i_a80_twd_probe(const struct device *dev) +{ + const struct simple_device *self = to_simple_device(dev); + uintptr_t regs = self->regs; + int err; + + if ((err = simple_device_probe(dev))) + return err; + + /* Clear the watchdog configuration. */ + mmio_write_32(regs + TWD_CTRL_REG, BIT(0)); + mmio_pollz_32(regs + TWD_CTRL_REG, BIT(0)); + + /* Set counter clock source to OSC24M. */ + mmio_set_32(regs + TWD_CTRL_REG, BIT(31)); + + /* Program a conservative default timeout. */ + mmio_write_32(regs + TWD_INTV_REG, TWD_TIMEOUT); + + /* Update the comparator to (counter + timeout). */ + sun9i_a80_twd_restart(dev); + + /* Start the watchdog counter; enable system reset. */ + mmio_clrset_32(regs + TWD_CTRL_REG, BIT(1), BIT(9)); + + return SUCCESS; +} + +static void +sun9i_a80_twd_release(const struct device *dev) +{ + const struct simple_device *self = to_simple_device(dev); + + /* Disable system reset; stop the watchdog counter. */ + mmio_clrset_32(self->regs + TWD_CTRL_REG, BIT(9), BIT(1)); + + simple_device_release(dev); +} + +static const struct watchdog_driver sun9i_a80_twd_driver = { + .drv = { + .probe = sun9i_a80_twd_probe, + .release = sun9i_a80_twd_release, + }, + .ops = { + .reset_system = sun9i_a80_twd_reset_system, + .restart = sun9i_a80_twd_restart, + }, +}; + +const struct simple_device r_twd = { + .dev = { + .name = "r_twd", + .drv = &sun9i_a80_twd_driver.drv, + .state = DEVICE_STATE_INIT, + }, + .clock = { .dev = &r_ccu.dev, .id = CLK_BUS_R_TWD }, + .regs = DEV_R_TWD, +}; diff -Nru crust-firmware-0.5/drivers/watchdog/sunxi-twd.c crust-firmware-0.6/drivers/watchdog/sunxi-twd.c --- crust-firmware-0.5/drivers/watchdog/sunxi-twd.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/watchdog/sunxi-twd.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,110 +0,0 @@ -/* - * Copyright © 2017-2021 The Crust Firmware Authors. - * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "watchdog.h" - -#define TWD_STATUS_REG 0x00 -#define TWD_CTRL_REG 0x10 -#define TWD_RESTART_REG 0x14 -#define TWD_LOW_CNT_REG 0x20 -#define TWD_INTV_REG 0x30 - -#define TWD_RESTART_KEY (0xD14 << 16) - -#define TWD_TIMEOUT (5 * REFCLK_HZ) /* 5 seconds */ - -static void -sunxi_twd_restart(const struct device *dev) -{ - const struct simple_device *self = to_simple_device(dev); - - mmio_write_32(self->regs + TWD_RESTART_REG, TWD_RESTART_KEY | BIT(0)); -} - -static void -sunxi_twd_set_timeout(const struct device *dev, uint32_t timeout) -{ - const struct simple_device *self = to_simple_device(dev); - - mmio_write_32(self->regs + TWD_INTV_REG, timeout); -} - -static int -sunxi_twd_probe(const struct device *dev) -{ - const struct simple_device *self = to_simple_device(dev); - uintptr_t regs = self->regs; - int err; - - if ((err = simple_device_probe(dev))) - return err; - - /* Clear the watchdog configuration. */ - mmio_write_32(regs + TWD_CTRL_REG, BIT(0)); - mmio_pollz_32(regs + TWD_CTRL_REG, BIT(0)); - - /* Set counter clock source to OSC24M. */ - mmio_set_32(regs + TWD_CTRL_REG, BIT(31)); - - /* Program a conservative default timeout. */ - mmio_write_32(regs + TWD_INTV_REG, TWD_TIMEOUT); - - /* Update the comparator to (counter + timeout). */ - sunxi_twd_restart(dev); - - /* Start the watchdog counter; enable system reset. */ - mmio_clrset_32(regs + TWD_CTRL_REG, BIT(1), BIT(9)); - - return SUCCESS; -} - -static void -sunxi_twd_release(const struct device *dev) -{ - const struct simple_device *self = to_simple_device(dev); - - /* Disable system reset; stop the watchdog counter. */ - mmio_clrset_32(self->regs + TWD_CTRL_REG, BIT(9), BIT(1)); - - simple_device_release(dev); -} - -static const struct watchdog_driver sunxi_twd_driver = { - .drv = { - .probe = sunxi_twd_probe, - .release = sunxi_twd_release, - }, - .ops = { - .restart = sunxi_twd_restart, - .set_timeout = sunxi_twd_set_timeout, - }, -}; - -const struct simple_device r_twd = { - .dev = { - .name = "r_twd", - .drv = &sunxi_twd_driver.drv, - .state = DEVICE_STATE_INIT, - }, - .clock = { .dev = &r_ccu.dev, .id = CLK_BUS_R_TWD }, - .regs = DEV_R_TWD, -}; - -uint32_t -r_twd_counter_read(void) -{ - assert(device_active(&r_twd.dev)); - - return mmio_read_32(DEV_R_TWD + TWD_LOW_CNT_REG); -} diff -Nru crust-firmware-0.5/drivers/watchdog/watchdog.c crust-firmware-0.6/drivers/watchdog/watchdog.c --- crust-firmware-0.5/drivers/watchdog/watchdog.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/watchdog/watchdog.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -7,6 +7,8 @@ #include #include #include +#include +#include #include "watchdog.h" @@ -22,14 +24,27 @@ return &drv->ops; } +const struct device * +watchdog_get(void) +{ + const struct device *watchdog = NULL; + + if (CONFIG(WATCHDOG_SUN6I_A31_WDT)) + watchdog = device_get_or_null(&r_wdog.dev); + if (CONFIG(WATCHDOG_SUN9I_A80_TWD)) + watchdog = device_get_or_null(&r_twd.dev); + + return watchdog; +} + void -watchdog_restart(const struct device *dev) +watchdog_reset_system(const struct device *dev) { - watchdog_ops_for(dev)->restart(dev); + watchdog_ops_for(dev)->reset_system(dev); } void -watchdog_set_timeout(const struct device *dev, uint32_t timeout) +watchdog_restart(const struct device *dev) { - watchdog_ops_for(dev)->set_timeout(dev, timeout); + watchdog_ops_for(dev)->restart(dev); } diff -Nru crust-firmware-0.5/drivers/watchdog/watchdog.h crust-firmware-0.6/drivers/watchdog/watchdog.h --- crust-firmware-0.5/drivers/watchdog/watchdog.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/drivers/watchdog/watchdog.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -10,8 +10,8 @@ #include struct watchdog_driver_ops { + void (*reset_system)(const struct device *dev); void (*restart)(const struct device *dev); - void (*set_timeout)(const struct device *dev, uint32_t timeout); }; struct watchdog_driver { diff -Nru crust-firmware-0.5/include/common/debug.h crust-firmware-0.6/include/common/debug.h --- crust-firmware-0.5/include/common/debug.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/common/debug.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/common/delay.h crust-firmware-0.6/include/common/delay.h --- crust-firmware-0.5/include/common/delay.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/common/delay.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/common/device.h crust-firmware-0.6/include/common/device.h --- crust-firmware-0.5/include/common/device.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/common/device.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/common/regulator_list.h crust-firmware-0.6/include/common/regulator_list.h --- crust-firmware-0.5/include/common/regulator_list.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/common/regulator_list.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/common/scpi.h crust-firmware-0.6/include/common/scpi.h --- crust-firmware-0.5/include/common/scpi.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/common/scpi.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/common/simple_device.h crust-firmware-0.6/include/common/simple_device.h --- crust-firmware-0.5/include/common/simple_device.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/common/simple_device.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/common/steps.h crust-firmware-0.6/include/common/steps.h --- crust-firmware-0.5/include/common/steps.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/common/steps.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2021 The Crust Firmware Authors. + * Copyright © 2021-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -33,8 +33,6 @@ STEP_RESUME_DRAM_CHECKSUM, STEP_RESUME_DEVICES, STEP_RESUME_CSS, - STEP_RESUME_CLUSTER, - STEP_RESUME_CORE, STEP_RESUME_COMPLETE, }; diff -Nru crust-firmware-0.5/include/common/system.h crust-firmware-0.6/include/common/system.h --- crust-firmware-0.5/include/common/system.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/common/system.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/common/timeout.h crust-firmware-0.6/include/common/timeout.h --- crust-firmware-0.5/include/common/timeout.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/common/timeout.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/cec/dw-hdmi-cec.h crust-firmware-0.6/include/drivers/cec/dw-hdmi-cec.h --- crust-firmware-0.5/include/drivers/cec/dw-hdmi-cec.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/cec/dw-hdmi-cec.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2021 The Crust Firmware Authors. + * Copyright © 2021-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/cec.h crust-firmware-0.6/include/drivers/cec.h --- crust-firmware-0.5/include/drivers/cec.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/cec.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2021 The Crust Firmware Authors. + * Copyright © 2021-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/cir/sunxi-cir.h crust-firmware-0.6/include/drivers/cir/sunxi-cir.h --- crust-firmware-0.5/include/drivers/cir/sunxi-cir.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/cir/sunxi-cir.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/cir.h crust-firmware-0.6/include/drivers/cir.h --- crust-firmware-0.5/include/drivers/cir.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/cir.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/clock/ccu.h crust-firmware-0.6/include/drivers/clock/ccu.h --- crust-firmware-0.5/include/drivers/clock/ccu.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/clock/ccu.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -8,7 +8,10 @@ #include #include -#if CONFIG(PLATFORM_A64) +#if CONFIG(PLATFORM_A23) +#include +#include +#elif CONFIG(PLATFORM_A64) #include #include #elif CONFIG(PLATFORM_A83T) diff -Nru crust-firmware-0.5/include/drivers/clock/sun50i-a64-ccu.h crust-firmware-0.6/include/drivers/clock/sun50i-a64-ccu.h --- crust-firmware-0.5/include/drivers/clock/sun50i-a64-ccu.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/clock/sun50i-a64-ccu.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/clock/sun50i-h6-ccu.h crust-firmware-0.6/include/drivers/clock/sun50i-h6-ccu.h --- crust-firmware-0.5/include/drivers/clock/sun50i-h6-ccu.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/clock/sun50i-h6-ccu.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/clock/sun50i-h6-r-ccu.h crust-firmware-0.6/include/drivers/clock/sun50i-h6-r-ccu.h --- crust-firmware-0.5/include/drivers/clock/sun50i-h6-r-ccu.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/clock/sun50i-h6-r-ccu.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -7,7 +7,7 @@ #define DRIVERS_CLOCK_SUN50I_H6_R_CCU_H enum { - CLK_OSC16M, + CLK_IOSC, CLK_OSC24M, CLK_OSC32K, CLK_AR100, diff -Nru crust-firmware-0.5/include/drivers/clock/sun8i-a23-ccu.h crust-firmware-0.6/include/drivers/clock/sun8i-a23-ccu.h --- crust-firmware-0.5/include/drivers/clock/sun8i-a23-ccu.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/include/drivers/clock/sun8i-a23-ccu.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,34 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef DRIVERS_CLOCK_SUN8I_A23_CCU_H +#define DRIVERS_CLOCK_SUN8I_A23_CCU_H + +enum { + CLK_PLL_CPUX, + CLK_PLL_DDR0, + CLK_PLL_PERIPH0, + CLK_PLL_DDR1, + CLK_APB2, + CLK_BUS_DRAM, + CLK_BUS_MSGBOX, + CLK_BUS_PIO, +#if CONFIG(SERIAL_DEV_UART0) + CLK_BUS_UART0, +#elif CONFIG(SERIAL_DEV_UART1) + CLK_BUS_UART1, +#elif CONFIG(SERIAL_DEV_UART2) + CLK_BUS_UART2, +#elif CONFIG(SERIAL_DEV_UART3) + CLK_BUS_UART3, +#elif CONFIG(SERIAL_DEV_UART4) /* depends on SOC_A23 */ + CLK_BUS_UART4, +#endif + CLK_DRAM, + CLK_MBUS, + SUN8I_A23_CCU_CLOCKS +}; + +#endif /* DRIVERS_CLOCK_SUN8I_A23_CCU_H */ diff -Nru crust-firmware-0.5/include/drivers/clock/sun8i-a83t-ccu.h crust-firmware-0.6/include/drivers/clock/sun8i-a83t-ccu.h --- crust-firmware-0.5/include/drivers/clock/sun8i-a83t-ccu.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/clock/sun8i-a83t-ccu.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/clock/sun8i-h3-ccu.h crust-firmware-0.6/include/drivers/clock/sun8i-h3-ccu.h --- crust-firmware-0.5/include/drivers/clock/sun8i-h3-ccu.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/clock/sun8i-h3-ccu.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/clock/sun8i-r-ccu.h crust-firmware-0.6/include/drivers/clock/sun8i-r-ccu.h --- crust-firmware-0.5/include/drivers/clock/sun8i-r-ccu.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/clock/sun8i-r-ccu.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -7,21 +7,25 @@ #define DRIVERS_CLOCK_SUN8I_R_CCU_H enum { - CLK_OSC16M, + CLK_IOSC, CLK_OSC24M, CLK_OSC32K, CLK_AR100, CLK_AHB0, CLK_APB0, CLK_BUS_R_PIO, +#if CONFIG(HAVE_R_CIR) CLK_BUS_R_CIR, +#endif CLK_BUS_R_TIMER, -#if CONFIG(HAVE_RSB) +#if CONFIG(HAVE_R_RSB) CLK_BUS_R_RSB, #endif CLK_BUS_R_UART, CLK_BUS_R_I2C, +#if CONFIG(HAVE_R_TWD) CLK_BUS_R_TWD, +#endif CLK_R_CIR, SUN8I_R_CCU_CLOCKS }; diff -Nru crust-firmware-0.5/include/drivers/clock.h crust-firmware-0.6/include/drivers/clock.h --- crust-firmware-0.5/include/drivers/clock.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/clock.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/counter.h crust-firmware-0.6/include/drivers/counter.h --- crust-firmware-0.5/include/drivers/counter.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/include/drivers/counter.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,35 @@ +/* + * Copyright © 2017-2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef DRIVERS_COUNTER_H +#define DRIVERS_COUNTER_H + +#include + +/** + * Initialize the cycle counter. + * + * This function must be called once before attempting to read the cycle + * counter. Note that the delay and timeout libraries use the cycle counter. + */ +void cycle_counter_init(void); + +/** + * Read the cycle counter. + * + * This counter is at least 32 bits wide and runs at the CPU clock frequency. + */ +uint32_t cycle_counter_read(void); + +/** + * Read the system counter. + * + * This counter is at least 32 bits wide and runs at the platform's reference + * clock frequency (usually 24 MHz). Note that this clock may be unavailable + * while the system is off or asleep. + */ +uint32_t system_counter_read(void); + +#endif /* DRIVERS_COUNTER_H */ diff -Nru crust-firmware-0.5/include/drivers/css.h crust-firmware-0.6/include/drivers/css.h --- crust-firmware-0.5/include/drivers/css.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/css.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/dram.h crust-firmware-0.6/include/drivers/dram.h --- crust-firmware-0.5/include/drivers/dram.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/dram.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/gpio/sunxi-gpio.h crust-firmware-0.6/include/drivers/gpio/sunxi-gpio.h --- crust-firmware-0.5/include/drivers/gpio/sunxi-gpio.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/gpio/sunxi-gpio.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/gpio.h crust-firmware-0.6/include/drivers/gpio.h --- crust-firmware-0.5/include/drivers/gpio.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/gpio.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/irq.h crust-firmware-0.6/include/drivers/irq.h --- crust-firmware-0.5/include/drivers/irq.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/irq.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/mfd/axp20x.h crust-firmware-0.6/include/drivers/mfd/axp20x.h --- crust-firmware-0.5/include/drivers/mfd/axp20x.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/mfd/axp20x.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/msgbox/sunxi-msgbox.h crust-firmware-0.6/include/drivers/msgbox/sunxi-msgbox.h --- crust-firmware-0.5/include/drivers/msgbox/sunxi-msgbox.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/msgbox/sunxi-msgbox.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/msgbox.h crust-firmware-0.6/include/drivers/msgbox.h --- crust-firmware-0.5/include/drivers/msgbox.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/msgbox.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/pmic/axp20x.h crust-firmware-0.6/include/drivers/pmic/axp20x.h --- crust-firmware-0.5/include/drivers/pmic/axp20x.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/pmic/axp20x.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/pmic/axp223.h crust-firmware-0.6/include/drivers/pmic/axp223.h --- crust-firmware-0.5/include/drivers/pmic/axp223.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/include/drivers/pmic/axp223.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,13 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef DRIVERS_PMIC_AXP223_H +#define DRIVERS_PMIC_AXP223_H + +#include + +extern const struct axp20x_pmic axp223_pmic; + +#endif /* DRIVERS_PMIC_AXP223_H */ diff -Nru crust-firmware-0.5/include/drivers/pmic/axp803.h crust-firmware-0.6/include/drivers/pmic/axp803.h --- crust-firmware-0.5/include/drivers/pmic/axp803.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/pmic/axp803.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/pmic/axp805.h crust-firmware-0.6/include/drivers/pmic/axp805.h --- crust-firmware-0.5/include/drivers/pmic/axp805.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/pmic/axp805.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/pmic.h crust-firmware-0.6/include/drivers/pmic.h --- crust-firmware-0.5/include/drivers/pmic.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/pmic.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/regmap/sun6i-i2c.h crust-firmware-0.6/include/drivers/regmap/sun6i-i2c.h --- crust-firmware-0.5/include/drivers/regmap/sun6i-i2c.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/regmap/sun6i-i2c.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/regmap/sunxi-rsb.h crust-firmware-0.6/include/drivers/regmap/sunxi-rsb.h --- crust-firmware-0.5/include/drivers/regmap/sunxi-rsb.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/regmap/sunxi-rsb.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/regmap.h crust-firmware-0.6/include/drivers/regmap.h --- crust-firmware-0.5/include/drivers/regmap.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/regmap.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/regulator/axp20x.h crust-firmware-0.6/include/drivers/regulator/axp20x.h --- crust-firmware-0.5/include/drivers/regulator/axp20x.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/regulator/axp20x.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/regulator/axp221.h crust-firmware-0.6/include/drivers/regulator/axp221.h --- crust-firmware-0.5/include/drivers/regulator/axp221.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/include/drivers/regulator/axp221.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,34 @@ +/* + * Copyright © 2023 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef DRIVERS_REGULATOR_AXP221_H +#define DRIVERS_REGULATOR_AXP221_H + +#include + +enum { + AXP221_REGL_DC5LDO, + AXP221_REGL_DCDC1, + AXP221_REGL_DCDC2, + AXP221_REGL_DCDC3, + AXP221_REGL_DCDC4, + AXP221_REGL_DCDC5, + AXP221_REGL_ALDO1, + AXP221_REGL_ALDO2, + AXP221_REGL_ALDO3, + AXP221_REGL_DLDO1, + AXP221_REGL_DLDO2, + AXP221_REGL_DLDO3, + AXP221_REGL_DLDO4, + AXP221_REGL_ELDO1, + AXP221_REGL_ELDO2, + AXP221_REGL_ELDO3, + AXP221_REGL_DC1SW, + AXP221_REGL_COUNT, +}; + +extern const struct axp20x_regulator axp221_regulator; + +#endif /* DRIVERS_REGULATOR_AXP221_H */ diff -Nru crust-firmware-0.5/include/drivers/regulator/axp803.h crust-firmware-0.6/include/drivers/regulator/axp803.h --- crust-firmware-0.5/include/drivers/regulator/axp803.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/regulator/axp803.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -28,8 +28,6 @@ AXP803_REGL_ELDO3, AXP803_REGL_FLDO1, AXP803_REGL_FLDO2, - AXP803_REGL_GPIO0, - AXP803_REGL_GPIO1, AXP803_REGL_COUNT, }; diff -Nru crust-firmware-0.5/include/drivers/regulator/axp805.h crust-firmware-0.6/include/drivers/regulator/axp805.h --- crust-firmware-0.5/include/drivers/regulator/axp805.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/regulator/axp805.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/regulator/gpio.h crust-firmware-0.6/include/drivers/regulator/gpio.h --- crust-firmware-0.5/include/drivers/regulator/gpio.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/regulator/gpio.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/regulator/sy8106a.h crust-firmware-0.6/include/drivers/regulator/sy8106a.h --- crust-firmware-0.5/include/drivers/regulator/sy8106a.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/regulator/sy8106a.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/regulator.h crust-firmware-0.6/include/drivers/regulator.h --- crust-firmware-0.5/include/drivers/regulator.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/regulator.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/serial.h crust-firmware-0.6/include/drivers/serial.h --- crust-firmware-0.5/include/drivers/serial.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/serial.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/drivers/watchdog/sun6i-a31-wdt.h crust-firmware-0.6/include/drivers/watchdog/sun6i-a31-wdt.h --- crust-firmware-0.5/include/drivers/watchdog/sun6i-a31-wdt.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/include/drivers/watchdog/sun6i-a31-wdt.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,19 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef DRIVERS_WATCHDOG_SUN6I_A31_WDT_H +#define DRIVERS_WATCHDOG_SUN6I_A31_WDT_H + +#include +#include + +struct sun6i_a31_wdt { + struct device dev; + uintptr_t regs; +}; + +extern const struct sun6i_a31_wdt r_wdog; + +#endif /* DRIVERS_WATCHDOG_SUN6I_A31_WDT_H */ diff -Nru crust-firmware-0.5/include/drivers/watchdog/sun9i-a80-twd.h crust-firmware-0.6/include/drivers/watchdog/sun9i-a80-twd.h --- crust-firmware-0.5/include/drivers/watchdog/sun9i-a80-twd.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/include/drivers/watchdog/sun9i-a80-twd.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,14 @@ +/* + * Copyright © 2017-2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef DRIVERS_WATCHDOG_SUN9I_A80_TWD_H +#define DRIVERS_WATCHDOG_SUN9I_A80_TWD_H + +#include +#include + +extern const struct simple_device r_twd; + +#endif /* DRIVERS_WATCHDOG_SUN9I_A80_TWD_H */ diff -Nru crust-firmware-0.5/include/drivers/watchdog/sunxi-twd.h crust-firmware-0.6/include/drivers/watchdog/sunxi-twd.h --- crust-firmware-0.5/include/drivers/watchdog/sunxi-twd.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/watchdog/sunxi-twd.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,22 +0,0 @@ -/* - * Copyright © 2017-2021 The Crust Firmware Authors. - * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only - */ - -#ifndef DRIVERS_WATCHDOG_SUNXI_TWD_H -#define DRIVERS_WATCHDOG_SUNXI_TWD_H - -#include -#include -#include - -extern const struct simple_device r_twd; - -/** - * Read the low 32 bits of the trusted watchdog counter. - * - * This counter increments at 24MHz while the watchdog is enabled. - */ -uint32_t r_twd_counter_read(void); - -#endif /* DRIVERS_WATCHDOG_SUNXI_TWD_H */ diff -Nru crust-firmware-0.5/include/drivers/watchdog.h crust-firmware-0.6/include/drivers/watchdog.h --- crust-firmware-0.5/include/drivers/watchdog.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/drivers/watchdog.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -9,18 +9,24 @@ #include /** - * Restart the watchdog. This must be called before the watchdog times out. + * Get a reference to an available watchdog device. + * + * @return A reference to a watchdog device. + */ +const struct device *watchdog_get(void); + +/** + * Use the watchdog to reset the system as soon as possible. * * @param dev The watchdog device. */ -void watchdog_restart(const struct device *dev); +void watchdog_reset_system(const struct device *dev); /** - * Set the watchdog timeout. It will take effect after the next restart. + * Restart the watchdog. This must be called before the watchdog times out. * - * @param dev The watchdog device. - * @param timeout The new watchdog timeout in clock cycles. + * @param dev The watchdog device. */ -void watchdog_set_timeout(const struct device *dev, uint32_t timeout); +void watchdog_restart(const struct device *dev); #endif /* DRIVERS_WATCHDOG_H */ diff -Nru crust-firmware-0.5/include/lib/bitfield.h crust-firmware-0.6/include/lib/bitfield.h --- crust-firmware-0.5/include/lib/bitfield.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/bitfield.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/lib/bitmap.h crust-firmware-0.6/include/lib/bitmap.h --- crust-firmware-0.5/include/lib/bitmap.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/bitmap.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/lib/byteswap.h crust-firmware-0.6/include/lib/byteswap.h --- crust-firmware-0.5/include/lib/byteswap.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/byteswap.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/lib/compiler.h crust-firmware-0.6/include/lib/compiler.h --- crust-firmware-0.5/include/lib/compiler.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/compiler.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/lib/division.h crust-firmware-0.6/include/lib/division.h --- crust-firmware-0.5/include/lib/division.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/division.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/lib/error.h crust-firmware-0.6/include/lib/error.h --- crust-firmware-0.5/include/lib/error.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/error.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/lib/intrusive.h crust-firmware-0.6/include/lib/intrusive.h --- crust-firmware-0.5/include/lib/intrusive.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/intrusive.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/lib/kconfig.h crust-firmware-0.6/include/lib/kconfig.h --- crust-firmware-0.5/include/lib/kconfig.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/kconfig.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/lib/macros.S crust-firmware-0.6/include/lib/macros.S --- crust-firmware-0.5/include/lib/macros.S 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/macros.S 2023-09-02 13:21:19.000000000 +0000 @@ -1,6 +1,6 @@ /* * Copyright © 2013-2017, ARM Limited and Contributors. All rights reserved. - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause */ diff -Nru crust-firmware-0.5/include/lib/mmio.h crust-firmware-0.6/include/lib/mmio.h --- crust-firmware-0.5/include/lib/mmio.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/mmio.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -123,7 +123,11 @@ static inline uint8_t mmio_read_8(uintptr_t addr) { +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ volatile uint8_t *ptr = (void *)(addr ^ 3); +#else + volatile uint8_t *ptr = (void *)addr; +#endif return *ptr; } @@ -165,7 +169,11 @@ static inline void mmio_write_8(uintptr_t addr, uint8_t val) { +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ volatile uint8_t *ptr = (void *)(addr ^ 3); +#else + volatile uint8_t *ptr = (void *)addr; +#endif *ptr = val; } diff -Nru crust-firmware-0.5/include/lib/scpi_protocol.h crust-firmware-0.6/include/lib/scpi_protocol.h --- crust-firmware-0.5/include/lib/scpi_protocol.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/scpi_protocol.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,6 +1,6 @@ /* * Copyright © 2014-2017, ARM Limited and Contributors. All rights reserved. - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -125,7 +125,7 @@ * swapping needed in command implementations. */ struct scpi_msg { -#ifdef __or1k__ +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ uint16_t size; uint8_t sender; uint8_t command; diff -Nru crust-firmware-0.5/include/lib/util.h crust-firmware-0.6/include/lib/util.h --- crust-firmware-0.5/include/lib/util.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/lib/util.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/stdlib/ctype.h crust-firmware-0.6/include/stdlib/ctype.h --- crust-firmware-0.5/include/stdlib/ctype.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/stdlib/ctype.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,6 +1,6 @@ /* * Copyright © 2005-2014 Rich Felker, et al. - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: MIT */ diff -Nru crust-firmware-0.5/include/stdlib/limits.h crust-firmware-0.6/include/stdlib/limits.h --- crust-firmware-0.5/include/stdlib/limits.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/stdlib/limits.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,6 +1,6 @@ /* * Copyright © 2005-2014 Rich Felker, et al. - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/stdlib/stdarg.h crust-firmware-0.6/include/stdlib/stdarg.h --- crust-firmware-0.5/include/stdlib/stdarg.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/stdlib/stdarg.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,6 +1,6 @@ /* * Copyright © 2005-2014 Rich Felker, et al. - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/stdlib/stdbool.h crust-firmware-0.6/include/stdlib/stdbool.h --- crust-firmware-0.5/include/stdlib/stdbool.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/stdlib/stdbool.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/stdlib/stddef.h crust-firmware-0.6/include/stdlib/stddef.h --- crust-firmware-0.5/include/stdlib/stddef.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/stdlib/stddef.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,6 +1,6 @@ /* * Copyright © 2005-2014 Rich Felker, et al. - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/include/stdlib/stdint.h crust-firmware-0.6/include/stdlib/stdint.h --- crust-firmware-0.5/include/stdlib/stdint.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/include/stdlib/stdint.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,6 +1,6 @@ /* * Copyright © 2005-2014 Rich Felker, et al. - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/Kconfig crust-firmware-0.6/Kconfig --- crust-firmware-0.5/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/lib/bitfield.c crust-firmware-0.6/lib/bitfield.c --- crust-firmware-0.5/lib/bitfield.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/lib/bitfield.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2019-2021 The Crust Firmware Authors. + * Copyright © 2019-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/lib/Makefile crust-firmware-0.6/lib/Makefile --- crust-firmware-0.5/lib/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/lib/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/LICENSE.md crust-firmware-0.6/LICENSE.md --- crust-firmware-0.5/LICENSE.md 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/LICENSE.md 2023-09-02 13:21:19.000000000 +0000 @@ -36,7 +36,7 @@ ## BSD 3-clause License Copyright © 2013-2017, ARM Limited and Contributors. All rights reserved. - Copyright © 2017-2021 The Crust Firmware Authors. + Copyright © 2017-2022 The Crust Firmware Authors. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff -Nru crust-firmware-0.5/Makefile crust-firmware-0.6/Makefile --- crust-firmware-0.5/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # @@ -8,7 +8,7 @@ TGT = $(OBJ)/scp BUILDAR = ar -BUILDCC = cc +BUILDCC ?= cc HOST_COMPILE ?= aarch64-linux-musl- HOSTAR = $(HOST_COMPILE)gcc-ar @@ -16,6 +16,7 @@ AR = $(CROSS_COMPILE)gcc-ar CC = $(CROSS_COMPILE)gcc +LD = $(shell $(CC) -print-prog-name=ld) OBJCOPY = $(CROSS_COMPILE)objcopy LEX = lex @@ -60,7 +61,8 @@ HOSTLDFLAGS = HOSTLDLIBS = -AFLAGS = -Wa,--fatal-warnings +AFLAGS = -Wa,--fatal-warnings \ + -Wa,--noexecstack CFLAGS = $(COMMON_CFLAGS) \ -ffreestanding \ -flto \ @@ -83,7 +85,10 @@ -Wl,--fatal-warnings \ -Wl,--gc-sections \ -Wl,--no-dynamic-linker \ - -Wl,--no-undefined + -Wl,--no-undefined \ + $(call ld-option,--no-warn-rwx-segments) + +ld-option = $(shell $(LD) -v $1 >/dev/null 2>&1 && printf '%s' '-Wl,$1') ############################################################################### @@ -112,7 +117,7 @@ M := @$(if $(filter-out 0,$(V)),:,exec printf ' %-7s %s\n') Q := $(if $(filter-out 0,$(V)),,@)exec -all: scp tools $(test-all) +all: scp $(test-all) check: $(test-all:%=%.test) diff -Nru crust-firmware-0.5/platform/a23/include/platform/cpucfg.h crust-firmware-0.6/platform/a23/include/platform/cpucfg.h --- crust-firmware-0.5/platform/a23/include/platform/cpucfg.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/platform/a23/include/platform/cpucfg.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,61 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef PLATFORM_CPUCFG_H +#define PLATFORM_CPUCFG_H + +#include +#include + +#define CPUS_RESET_REG (DEV_R_CPUCFG + 0x0000) +#define CPUS_RESET BIT(0) + +/* Four of these ranges exist. */ +#define CPUS_BYTE_SWAP_EN_REG (DEV_R_CPUCFG + 0x000c) +#define CPUS_BYTE_SWAP_EN_REG_RANGEn(n) BIT(0 + (n)) + +#define CPUS_BYTE_SWAP_LO_REG(n) (DEV_R_CPUCFG + 0x0010 + 0x08 * (n)) +#define CPUS_BYTE_SWAP_HI_REG(n) (DEV_R_CPUCFG + 0x0014 + 0x08 * (n)) + +#define CPUn_RST_CTRL_REG(n) (DEV_R_CPUCFG + 0x0040 + 0x40 * (n)) +#define CPUn_RST_CTRL_REG_nCORERESET BIT(1) +#define CPUn_RST_CTRL_REG_nCPUPORESET BIT(0) + +#define CPUn_CTRL_REG(n) (DEV_R_CPUCFG + 0x0044 + 0x40 * (n)) +#define CPUn_CTRL_REG_CP15SDISABLE BIT(0) + +#define CPUn_STATUS_REG(n) (DEV_R_CPUCFG + 0x0048 + 0x40 * (n)) +#define CPUn_STATUS_REG_STANDBYWFI BIT(2) +#define CPUn_STATUS_REG_STANDBYWFE BIT(1) +#define CPUn_STATUS_REG_SMPnAMP BIT(0) + +#define CPU_SYS_RESET_REG (DEV_R_CPUCFG + 0x0140) +#define CPU_SYS_RESET BIT(0) + +#define GEN_CTRL_REG (DEV_R_CPUCFG + 0x0184) +#define GEN_CTRL_REG_CFGSDISABLE BIT(8) +#define GEN_CTRL_REG_ACINACTM BIT(6) +#define GEN_CTRL_REG_nL2RESET BIT(5) +#define GEN_CTRL_REG_L2RSTDISABLE BIT(4) +#define GEN_CTRL_REG_L1RSTDISABLE(n) BIT(0 + (n)) +#define GEN_CTRL_REG_L1RSTDISABLE_MASK (0xf << 0) + +#define EVENT_IN_REG (DEV_R_CPUCFG + 0x0190) +#define EVENT_IN BIT(0) + +#define DBG_CTRL_REG0 (DEV_R_CPUCFG + 0x01e0) + +#define DBG_CTRL_REG1 (DEV_R_CPUCFG + 0x01e4) +#define DBG_CTRL_REG1_DBGPWRDUP(n) BIT(0 + (n)) +#define DBG_CTRL_REG1_DBGPWRDUP_MASK (0xf << 0) + +#define CNT64_CTRL_REG (DEV_R_CPUCFG + 0x0280) +#define CNT64_RL_EN BIT(1) +#define CNT64_CLR_EN BIT(0) + +#define CNT64_LO_REG (DEV_R_CPUCFG + 0x0284) +#define CNT64_HI_REG (DEV_R_CPUCFG + 0x0288) + +#endif /* PLATFORM_CPUCFG_H */ diff -Nru crust-firmware-0.5/platform/a23/include/platform/css.h crust-firmware-0.6/platform/a23/include/platform/css.h --- crust-firmware-0.5/platform/a23/include/platform/css.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/platform/a23/include/platform/css.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,16 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef PLATFORM_CSS_H +#define PLATFORM_CSS_H + +#define MAX_CLUSTERS 1 +#if CONFIG(SOC_A23) +#define MAX_CORES_PER_CLUSTER 2 +#else +#define MAX_CORES_PER_CLUSTER 4 +#endif + +#endif /* PLATFORM_CSS_H */ diff -Nru crust-firmware-0.5/platform/a23/include/platform/devices.h crust-firmware-0.6/platform/a23/include/platform/devices.h --- crust-firmware-0.5/platform/a23/include/platform/devices.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/platform/a23/include/platform/devices.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,68 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef PLATFORM_DEVICES_H +#define PLATFORM_DEVICES_H + +#define DEV_SYSCON 0x01c00000 +#define DEV_DMA 0x01c02000 +#define DEV_NAND 0x01c03000 +#define DEV_TCON0 0x01c0c000 +#define DEV_VE 0x01c0e000 +#define DEV_MMC0 0x01c0f000 +#define DEV_MMC1 0x01c10000 +#define DEV_MMC2 0x01c11000 +#define DEV_CE 0x01c15000 +#define DEV_MSGBOX 0x01c17000 +#define DEV_SPINLOCK 0x01c18000 +#define DEV_USBOTG 0x01c19000 +#define DEV_USB0 0x01c1a000 +#define DEV_CCU 0x01c20000 +#define DEV_PIO 0x01c20800 +#define DEV_TIMER 0x01c20c00 +#define DEV_PWM 0x01c21400 +#define DEV_I2S0 0x01c22000 +#define DEV_I2S1 0x01c22400 +#define DEV_LRADC 0x01c22800 +#define DEV_CODEC 0x01c22c00 +#define DEV_THS 0x01c25000 +#define DEV_UART0 0x01c28000 +#define DEV_UART1 0x01c28400 +#define DEV_UART2 0x01c28800 +#define DEV_UART3 0x01c28c00 +#define DEV_UART4 0x01c29000 +#define DEV_I2C0 0x01c2ac00 +#define DEV_I2C1 0x01c2b000 +#define DEV_I2C2 0x01c2b400 +#define DEV_GPU 0x01c40000 +#define DEV_HSTIMER 0x01c60000 +#define DEV_DRAMCOM 0x01c62000 +#define DEV_DRAMCTL 0x01c63000 +#define DEV_DRAMPHY 0x01c65000 +#define DEV_SPI0 0x01c68000 +#define DEV_SPI1 0x01c69000 +#define DEV_SCU 0x01c80000 +#define DEV_GICD 0x01c81000 +#define DEV_GICC 0x01c82000 +#define DEV_MIPI_DSI 0x01ca0000 +#define DEV_MIPI_DPHY 0x01ca1000 +#define DEV_CSI 0x01cb0000 +#define DEV_DEFE 0x01e00000 +#define DEV_DEBE 0x01e60000 +#define DEV_DRC 0x01e70000 +#define DEV_SAT 0x01e80000 +#define DEV_RTC 0x01f00000 +#define DEV_R_TIMER 0x01f00800 +#define DEV_R_INTC 0x01f00c00 +#define DEV_R_WDOG 0x01f01000 +#define DEV_R_PRCM 0x01f01400 +#define DEV_R_CPUCFG 0x01f01c00 +#define DEV_R_I2C 0x01f02400 +#define DEV_R_UART 0x01f02800 +#define DEV_R_PIO 0x01f02c00 +#define DEV_R_RSB 0x01f03400 +#define DEV_R_PWM 0x01f03800 + +#endif /* PLATFORM_DEVICES_H */ diff -Nru crust-firmware-0.5/platform/a23/include/platform/irq.h crust-firmware-0.6/platform/a23/include/platform/irq.h --- crust-firmware-0.5/platform/a23/include/platform/irq.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/platform/a23/include/platform/irq.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,25 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef PLATFORM_IRQ_H +#define PLATFORM_IRQ_H + +#define IRQ_NMI 0x00 +#define IRQ_R_TIMER0 0x01 +#define IRQ_R_TIMER1 0x02 + +#define IRQ_R_WDOG 0x04 + +#define IRQ_R_UART 0x06 +#define IRQ_R_RSB 0x07 +#define IRQ_R_ALARM0 0x08 +#define IRQ_R_ALARM1 0x09 + +#define IRQ_R_I2C 0x0c +#define IRQ_R_PIO_PL 0x0d + +#define IRQ_MSGBOX 0x11 + +#endif /* PLATFORM_IRQ_H */ diff -Nru crust-firmware-0.5/platform/a23/include/platform/memory.h crust-firmware-0.6/platform/a23/include/platform/memory.h --- crust-firmware-0.5/platform/a23/include/platform/memory.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/platform/a23/include/platform/memory.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,26 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef PLATFORM_MEMORY_H +#define PLATFORM_MEMORY_H + +#define FIRMWARE_BASE 0x00010000 +#define FIRMWARE_LIMIT SCPI_MEM_BASE +#define FIRMWARE_SIZE (FIRMWARE_LIMIT - FIRMWARE_BASE) + +#define SCPI_MEM_BASE (SRAM_A2_LIMIT - 0x400) +#define SCPI_MEM_LIMIT SRAM_A2_LIMIT +#define SCPI_MEM_SIZE (SCPI_MEM_LIMIT - SCPI_MEM_BASE) + +#define SRAM_A2_BASE 0x00000000 +#define SRAM_A2_LIMIT 0x00014000 +#define SRAM_A2_SIZE (SRAM_A2_LIMIT - SRAM_A2_BASE) + +/* Difference between SRAM_A2_BASE in the AR100 and ARM address spaces. */ +#define SRAM_A2_OFFSET 0x00040000 + +#define STACK_SIZE 0x00000400 + +#endif /* PLATFORM_MEMORY_H */ diff -Nru crust-firmware-0.5/platform/a23/include/platform/prcm.h crust-firmware-0.6/platform/a23/include/platform/prcm.h --- crust-firmware-0.5/platform/a23/include/platform/prcm.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/platform/a23/include/platform/prcm.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,86 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef PLATFORM_PRCM_H +#define PLATFORM_PRCM_H + +#include +#include + +#define CPUS_CLK_REG (DEV_R_PRCM + 0x0000) +#define CPUS_CLK_REG_CLK_SRC(x) ((x) << 16) +#define CPUS_CLK_REG_CLK_SRC_MASK (0x3 << 16) +#define CPUS_CLK_REG_PRE_DIV(x) ((x) << 8) +#define CPUS_CLK_REG_PRE_DIV_MASK (0x1f << 8) +#define CPUS_CLK_REG_DIV_P(x) ((x) << 4) +#define CPUS_CLK_REG_DIV_P_MASK (0x3 << 4) + +#define APB0_CLK_REG (DEV_R_PRCM + 0x000c) +#define APB0_CLK_REG_DIV_M(x) ((x) << 0) +#define APB0_CLK_REG_DIV_M_MASK (0x3 << 0) + +/* See r_ccu driver for bit definitions */ +#define APB0_GATE_REG (DEV_R_PRCM + 0x0028) +#define RTC_GATE_REG (DEV_R_PRCM + 0x002c) + +#define PLL_CTRL_REG0 (DEV_R_PRCM + 0x0040) +#define PLL_CTRL_REG0_TEST_CLK_SEL BIT(24) +#define PLL_CTRL_REG0_OSC24M_CLK_SEL(x) ((x) << 20) +#define PLL_CTRL_REG0_OSC24M_CLK_SEL_MASK (0x3 << 20) +#define PLL_CTRL_REG0_PLL_INPUT_SEL(x) ((x) << 12) +#define PLL_CTRL_REG0_PLL_INPUT_SEL_MASK (0x3 << 12) +#define PLL_CTRL_REG0_USB24M_CLK_SEL(x) ((x) << 4) +#define PLL_CTRL_REG0_USB24M_CLK_SEL_MASK (0x3 << 4) +#define PLL_CTRL_REG0_OSC24M_GAIN_ENHANCE BIT(1) +#define PLL_CTRL_REG0_PLL_BIAS_EN BIT(0) + +#define PLL_CTRL_REG1 (DEV_R_PRCM + 0x0044) +#define PLL_CTRL_REG1_KEY (0xa7 << 24) +#define PLL_CTRL_REG1_KEY_FIELD (0xff << 24) +#define PLL_CTRL_REG1_PLL_LDO_OUT(x) ((x) << 16) +#define PLL_CTRL_REG1_PLL_LDO_OUT_MASK (0x7 << 16) +#define PLL_CTRL_REG1_PLL_IN_PWR_SEL BIT(15) +#define PLL_CTRL_REG1_CLKTEST_EN BIT(3) +#define PLL_CTRL_REG1_CRYSTAL_EN BIT(2) +#define PLL_CTRL_REG1_LDO_EN (0x3 << 0) + +/* See r_ccu driver for bit definitions */ +#define APB0_RESET_REG (DEV_R_PRCM + 0x00b0) + +/* CPU0 does not have its own gating */ +#define C0_PWROFF_GATING_REG (DEV_R_PRCM + 0x0100) +#define C0_CPUn_PWROFF_GATING(n) BIT(0 + (n)) +#define C0_PWROFF_GATING BIT(0) + +#define VDD_SYS_PWROFF_GATING_REG (DEV_R_PRCM + 0x0110) +#define VDD_CPUS_GATING BIT(3) +#define AVCC_GATING BIT(2) +#define DRAM_PAD_HOLD (0x3 << 0) + +#define GPU_PWROFF_GATING_REG (DEV_R_PRCM + 0x0118) +#define GPU_PWROFF_GATING BIT(0) + +#define VDD_SYS_RESET_REG (DEV_R_PRCM + 0x0120) +#define VDD_SYS_RESET BIT(0) + +/* CPU0 does not have its own power switch */ +#define C0_CPUn_PWR_SWITCH_REG(n) (DEV_R_PRCM + 0x0140 + 0x04 * (n)) + +#define ADDA_PR_CFG_REG (DEV_R_PRCM + 0x01c0) +#define ADDA_PR_CFG_REG_RESET BIT(28) +#define ADDA_PR_CFG_REG_RW BIT(24) +#define ADDA_PR_CFG_REG_ADDR(x) ((x) << 16) +#define ADDA_PR_CFG_REG_ADDR_MASK (0x1f << 16) +#define ADDA_PR_CFG_REG_WDAT(x) ((x) << 8) +#define ADDA_PR_CFG_REG_WDAT_MASK (0xff << 8) +#define ADDA_PR_CFG_REG_RDAT(x) ((x) << 0) +#define ADDA_PR_CFG_REG_RDAT_MASK (0xff << 0) + +#define PRCM_SEC_SWITCH_REG (DEV_R_PRCM + 0x01d0) +#define PRCM_SEC_SWITCH_REG_POWER_SEC BIT(2) +#define PRCM_SEC_SWITCH_REG_PLL_SEC BIT(1) +#define PRCM_SEC_SWITCH_REG_CPUS_CLK_SEC BIT(0) + +#endif /* PLATFORM_PRCM_H */ diff -Nru crust-firmware-0.5/platform/a23/include/platform/time.h crust-firmware-0.6/platform/a23/include/platform/time.h --- crust-firmware-0.5/platform/a23/include/platform/time.h 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/platform/a23/include/platform/time.h 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,18 @@ +/* + * Copyright © 2022 The Crust Firmware Authors. + * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only + */ + +#ifndef PLATFORM_TIME_H +#define PLATFORM_TIME_H + +/* Actually around 600 kHz, but this is close enough for timeouts. */ +#define CPUCLK_MHz 1 +#define CPUCLK_kHz (CPUCLK_MHz * 1000) +#define CPUCLK_Hz (CPUCLK_MHz * 1000000) + +#define REFCLK_MHZ 24 +#define REFCLK_KHZ (REFCLK_MHZ * 1000) +#define REFCLK_HZ (REFCLK_MHZ * 1000000) + +#endif /* PLATFORM_TIME_H */ diff -Nru crust-firmware-0.5/platform/a23/Kconfig crust-firmware-0.6/platform/a23/Kconfig --- crust-firmware-0.5/platform/a23/Kconfig 1970-01-01 00:00:00.000000000 +0000 +++ crust-firmware-0.6/platform/a23/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -0,0 +1,20 @@ +# +# Copyright © 2022 The Crust Firmware Authors. +# SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only +# + +if PLATFORM_A23 + +choice + bool "SoC" + +config SOC_A23 + bool "A23" + select HAVE_UART4 + +config SOC_A33 + bool "A33" + +endchoice + +endif diff -Nru crust-firmware-0.5/platform/a64/include/platform/cpucfg.h crust-firmware-0.6/platform/a64/include/platform/cpucfg.h --- crust-firmware-0.5/platform/a64/include/platform/cpucfg.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a64/include/platform/cpucfg.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -102,4 +102,11 @@ #define C0_IRQ_OUT(n) BIT(0 + (n)) #define C0_IRQ_OUT_MASK (0xf << 0) +#define CNT64_CTRL_REG (DEV_R_CPUCFG + 0x0280) +#define CNT64_RL_EN BIT(1) +#define CNT64_CLR_EN BIT(0) + +#define CNT64_LO_REG (DEV_R_CPUCFG + 0x0284) +#define CNT64_HI_REG (DEV_R_CPUCFG + 0x0288) + #endif /* PLATFORM_CPUCFG_H */ diff -Nru crust-firmware-0.5/platform/a64/include/platform/css.h crust-firmware-0.6/platform/a64/include/platform/css.h --- crust-firmware-0.5/platform/a64/include/platform/css.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a64/include/platform/css.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/a64/include/platform/devices.h crust-firmware-0.6/platform/a64/include/platform/devices.h --- crust-firmware-0.5/platform/a64/include/platform/devices.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a64/include/platform/devices.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/a64/include/platform/irq.h crust-firmware-0.6/platform/a64/include/platform/irq.h --- crust-firmware-0.5/platform/a64/include/platform/irq.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a64/include/platform/irq.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/a64/include/platform/memory.h crust-firmware-0.6/platform/a64/include/platform/memory.h --- crust-firmware-0.5/platform/a64/include/platform/memory.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a64/include/platform/memory.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/a64/include/platform/prcm.h crust-firmware-0.6/platform/a64/include/platform/prcm.h --- crust-firmware-0.5/platform/a64/include/platform/prcm.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a64/include/platform/prcm.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -68,6 +68,7 @@ #define VDD_SYS_RESET_REG (DEV_R_PRCM + 0x0120) #define VDD_SYS_RESET BIT(0) +/* CPU0 does not have its own power switch */ #define C0_CPUn_PWR_SWITCH_REG(n) (DEV_R_PRCM + 0x0140 + 0x04 * (n)) #define ADDA_PR_CFG_REG (DEV_R_PRCM + 0x01c0) diff -Nru crust-firmware-0.5/platform/a64/include/platform/time.h crust-firmware-0.6/platform/a64/include/platform/time.h --- crust-firmware-0.5/platform/a64/include/platform/time.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a64/include/platform/time.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/a64/Kconfig crust-firmware-0.6/platform/a64/Kconfig --- crust-firmware-0.5/platform/a64/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a64/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,17 +1,21 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # +if PLATFORM_A64 + choice bool "SoC" config SOC_A64 bool "A64" - select HAVE_RSB + select HAVE_R_RSB select HAVE_UART4 config SOC_H5 bool "H5" endchoice + +endif diff -Nru crust-firmware-0.5/platform/a83t/include/platform/css.h crust-firmware-0.6/platform/a83t/include/platform/css.h --- crust-firmware-0.5/platform/a83t/include/platform/css.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a83t/include/platform/css.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/a83t/include/platform/devices.h crust-firmware-0.6/platform/a83t/include/platform/devices.h --- crust-firmware-0.5/platform/a83t/include/platform/devices.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a83t/include/platform/devices.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,81 +1,82 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ #ifndef PLATFORM_DEVICES_H #define PLATFORM_DEVICES_H -#define DEV_DE 0x01000000 -#define DEV_DEBUG 0x01400000 -#define DEV_CPU_BIST_C0 0x01502000 -#define DEV_CPU_BIST_C1 0x01602000 -#define DEV_CPUCFG 0x01700000 -#define DEV_TIMESTAMP 0x01710000 -#define DEV_CCI 0x01790000 -#define DEV_SYSCON 0x01c00000 -#define DEV_DMA 0x01c02000 -#define DEV_NAND 0x01c03000 -#define DEV_KEYMEM 0x01c0b000 -#define DEV_TCON0 0x01c0c000 -#define DEV_TCON1 0x01c0d000 -#define DEV_VE 0x01c0e000 -#define DEV_MMC0 0x01c0f000 -#define DEV_MMC1 0x01c10000 -#define DEV_MMC2 0x01c11000 -#define DEV_SID 0x01c14000 -#define DEV_SS 0x01c15000 -#define DEV_MSGBOX 0x01c17000 -#define DEV_SPINLOCK 0x01c18000 -#define DEV_USBOTG 0x01c19000 -#define DEV_USB0 0x01c1a000 -#define DEV_USB1 0x01c1b000 -#define DEV_TZASC 0x01c1e000 -#define DEV_CCU 0x01c20000 -#define DEV_PIO 0x01c20800 -#define DEV_TIMER 0x01c20c00 -#define DEV_SPDIF 0x01c21000 -#define DEV_PWM 0x01c21400 -#define DEV_I2S0 0x01c22000 -#define DEV_I2S1 0x01c22400 -#define DEV_I2S2 0x01c22800 -#define DEV_TDM 0x01c23000 -#define DEV_SPC 0x01c23400 -#define DEV_DSI 0x01c26000 -#define DEV_UART0 0x01c28000 -#define DEV_UART1 0x01c28400 -#define DEV_UART2 0x01c28800 -#define DEV_UART3 0x01c28c00 -#define DEV_UART4 0x01c29000 -#define DEV_I2C0 0x01c2ac00 -#define DEV_I2C1 0x01c2b000 -#define DEV_I2C2 0x01c2b400 -#define DEV_EMAC 0x01c30000 -#define DEV_GPU 0x01c40000 -#define DEV_HSTIMER 0x01c60000 -#define DEV_DRAMCOM 0x01c62000 -#define DEV_DRAMCTL 0x01c63000 -#define DEV_DRAMPHY 0x01c65000 -#define DEV_SPI0 0x01c68000 -#define DEV_SPI1 0x01c69000 -#define DEV_GIC 0x01c80000 -#define DEV_GICD 0x01c81000 -#define DEV_GICC 0x01c82000 -#define DEV_CSI 0x01cb0000 -#define DEV_HDMI 0x01ee0000 -#define DEV_R_TIMER 0x01f00800 -#define DEV_R_INTC 0x01f00c00 -#define DEV_R_WDOG 0x01f01000 -#define DEV_R_PRCM 0x01f01400 -#define DEV_R_TWD 0x01f01800 -#define DEV_R_CPUCFG 0x01f01c00 -#define DEV_R_CIR_RX 0x01f02000 -#define DEV_R_I2C 0x01f02400 -#define DEV_R_UART 0x01f02800 -#define DEV_R_PIO 0x01f02c00 -#define DEV_R_RSB 0x01f03400 -#define DEV_R_PWM 0x01f03800 -#define DEV_R_LRADC 0x01f03c00 -#define DEV_R_THS 0x01f04000 +#define DEV_DE 0x01000000 +#define DEV_DEBUG 0x01400000 +#define DEV_CPU_BIST_C0 0x01502000 +#define DEV_CPU_BIST_C1 0x01602000 +#define DEV_CPUCFG 0x01700000 +#define DEV_TIMESTAMP_STATUS 0x01710000 +#define DEV_TIMESTAMP_CTRL 0x01720000 +#define DEV_CCI 0x01790000 +#define DEV_SYSCON 0x01c00000 +#define DEV_DMA 0x01c02000 +#define DEV_NAND 0x01c03000 +#define DEV_KEYMEM 0x01c0b000 +#define DEV_TCON0 0x01c0c000 +#define DEV_TCON1 0x01c0d000 +#define DEV_VE 0x01c0e000 +#define DEV_MMC0 0x01c0f000 +#define DEV_MMC1 0x01c10000 +#define DEV_MMC2 0x01c11000 +#define DEV_SID 0x01c14000 +#define DEV_SS 0x01c15000 +#define DEV_MSGBOX 0x01c17000 +#define DEV_SPINLOCK 0x01c18000 +#define DEV_USBOTG 0x01c19000 +#define DEV_USB0 0x01c1a000 +#define DEV_USB1 0x01c1b000 +#define DEV_TZASC 0x01c1e000 +#define DEV_CCU 0x01c20000 +#define DEV_PIO 0x01c20800 +#define DEV_TIMER 0x01c20c00 +#define DEV_SPDIF 0x01c21000 +#define DEV_PWM 0x01c21400 +#define DEV_I2S0 0x01c22000 +#define DEV_I2S1 0x01c22400 +#define DEV_I2S2 0x01c22800 +#define DEV_TDM 0x01c23000 +#define DEV_SPC 0x01c23400 +#define DEV_DSI 0x01c26000 +#define DEV_UART0 0x01c28000 +#define DEV_UART1 0x01c28400 +#define DEV_UART2 0x01c28800 +#define DEV_UART3 0x01c28c00 +#define DEV_UART4 0x01c29000 +#define DEV_I2C0 0x01c2ac00 +#define DEV_I2C1 0x01c2b000 +#define DEV_I2C2 0x01c2b400 +#define DEV_EMAC 0x01c30000 +#define DEV_GPU 0x01c40000 +#define DEV_HSTIMER 0x01c60000 +#define DEV_DRAMCOM 0x01c62000 +#define DEV_DRAMCTL 0x01c63000 +#define DEV_DRAMPHY 0x01c65000 +#define DEV_SPI0 0x01c68000 +#define DEV_SPI1 0x01c69000 +#define DEV_GIC 0x01c80000 +#define DEV_GICD 0x01c81000 +#define DEV_GICC 0x01c82000 +#define DEV_CSI 0x01cb0000 +#define DEV_HDMI 0x01ee0000 +#define DEV_R_TIMER 0x01f00800 +#define DEV_R_INTC 0x01f00c00 +#define DEV_R_WDOG 0x01f01000 +#define DEV_R_PRCM 0x01f01400 +#define DEV_R_TWD 0x01f01800 +#define DEV_R_CPUCFG 0x01f01c00 +#define DEV_R_CIR_RX 0x01f02000 +#define DEV_R_I2C 0x01f02400 +#define DEV_R_UART 0x01f02800 +#define DEV_R_PIO 0x01f02c00 +#define DEV_R_RSB 0x01f03400 +#define DEV_R_PWM 0x01f03800 +#define DEV_R_LRADC 0x01f03c00 +#define DEV_R_THS 0x01f04000 #endif /* PLATFORM_DEVICES_H */ diff -Nru crust-firmware-0.5/platform/a83t/include/platform/irq.h crust-firmware-0.6/platform/a83t/include/platform/irq.h --- crust-firmware-0.5/platform/a83t/include/platform/irq.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a83t/include/platform/irq.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/a83t/include/platform/memory.h crust-firmware-0.6/platform/a83t/include/platform/memory.h --- crust-firmware-0.5/platform/a83t/include/platform/memory.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a83t/include/platform/memory.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/a83t/include/platform/prcm.h crust-firmware-0.6/platform/a83t/include/platform/prcm.h --- crust-firmware-0.5/platform/a83t/include/platform/prcm.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a83t/include/platform/prcm.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/a83t/include/platform/time.h crust-firmware-0.6/platform/a83t/include/platform/time.h --- crust-firmware-0.5/platform/a83t/include/platform/time.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/a83t/include/platform/time.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h3/include/platform/cpucfg.h crust-firmware-0.6/platform/h3/include/platform/cpucfg.h --- crust-firmware-0.5/platform/h3/include/platform/cpucfg.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h3/include/platform/cpucfg.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ @@ -61,4 +61,11 @@ #define DBG_CTRL_REG1_DBGPWRDUP(n) BIT(0 + (n)) #define DBG_CTRL_REG1_DBGPWRDUP_MASK (0xf << 0) +#define CNT64_CTRL_REG (DEV_R_CPUCFG + 0x0280) +#define CNT64_RL_EN BIT(1) +#define CNT64_CLR_EN BIT(0) + +#define CNT64_LO_REG (DEV_R_CPUCFG + 0x0284) +#define CNT64_HI_REG (DEV_R_CPUCFG + 0x0288) + #endif /* PLATFORM_CPUCFG_H */ diff -Nru crust-firmware-0.5/platform/h3/include/platform/css.h crust-firmware-0.6/platform/h3/include/platform/css.h --- crust-firmware-0.5/platform/h3/include/platform/css.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h3/include/platform/css.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h3/include/platform/devices.h crust-firmware-0.6/platform/h3/include/platform/devices.h --- crust-firmware-0.5/platform/h3/include/platform/devices.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h3/include/platform/devices.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h3/include/platform/irq.h crust-firmware-0.6/platform/h3/include/platform/irq.h --- crust-firmware-0.5/platform/h3/include/platform/irq.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h3/include/platform/irq.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h3/include/platform/memory.h crust-firmware-0.6/platform/h3/include/platform/memory.h --- crust-firmware-0.5/platform/h3/include/platform/memory.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h3/include/platform/memory.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h3/include/platform/prcm.h crust-firmware-0.6/platform/h3/include/platform/prcm.h --- crust-firmware-0.5/platform/h3/include/platform/prcm.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h3/include/platform/prcm.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h3/include/platform/time.h crust-firmware-0.6/platform/h3/include/platform/time.h --- crust-firmware-0.5/platform/h3/include/platform/time.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h3/include/platform/time.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h6/include/platform/cpucfg.h crust-firmware-0.6/platform/h6/include/platform/cpucfg.h --- crust-firmware-0.5/platform/h6/include/platform/cpucfg.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h6/include/platform/cpucfg.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h6/include/platform/css.h crust-firmware-0.6/platform/h6/include/platform/css.h --- crust-firmware-0.5/platform/h6/include/platform/css.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h6/include/platform/css.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h6/include/platform/devices.h crust-firmware-0.6/platform/h6/include/platform/devices.h --- crust-firmware-0.5/platform/h6/include/platform/devices.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h6/include/platform/devices.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,95 +1,95 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ #ifndef PLATFORM_DEVICES_H #define PLATFORM_DEVICES_H -#define DEV_DE 0x01000000 -#define DEV_DEBUG 0x01420000 -#define DEV_GPU 0x01800000 -#define DEV_CE_NS 0x01904000 -#define DEV_CE_S 0x01904800 -#define DEV_EMCE 0x01905000 -#define DEV_KEYMEM 0x01908000 -#define DEV_VP9 0x01c00000 -#define DEV_VE 0x01c0e000 -#define DEV_SYSCON 0x03000000 -#define DEV_CCU 0x03001000 -#define DEV_DMA 0x03002000 -#define DEV_MSGBOX 0x03003000 -#define DEV_SPINLOCK 0x03004000 -#define DEV_HSTIMER 0x03005000 -#define DEV_SID 0x03006000 -#define DEV_TZASC 0x03007000 -#define DEV_SPC 0x03008000 -#define DEV_TIMER 0x03009000 -#define DEV_PWM 0x0300a000 -#define DEV_PIO 0x0300b000 -#define DEV_PSI 0x0300c000 -#define DEV_DCU 0x03010000 -#define DEV_SCU 0x03020000 -#define DEV_GICD 0x03021000 -#define DEV_GICC 0x03022000 -#define DEV_IOMMU 0x030f0000 -#define DEV_DRAMCOM 0x04002000 -#define DEV_DRAMCTL 0x04003000 -#define DEV_DRAMPHY 0x04005000 -#define DEV_NAND 0x04011000 -#define DEV_MMC0 0x04020000 -#define DEV_MMC1 0x04021000 -#define DEV_MMC2 0x04022000 -#define DEV_UART0 0x05000000 -#define DEV_UART1 0x05000400 -#define DEV_UART2 0x05000800 -#define DEV_UART3 0x05000c00 -#define DEV_I2C0 0x05002000 -#define DEV_I2C1 0x05002400 -#define DEV_I2C2 0x05002800 -#define DEV_I2C3 0x05002c00 -#define DEV_SCR0 0x05005000 -#define DEV_SCR1 0x05005400 -#define DEV_SPI0 0x05010000 -#define DEV_SPI1 0x05011000 -#define DEV_EMAC 0x05020000 -#define DEV_TS0 0x05060000 -#define DEV_THS 0x05070400 -#define DEV_CIR_TX 0x05061000 -#define DEV_I2S3 0x0508f000 -#define DEV_I2S0 0x05090000 -#define DEV_I2S1 0x05091000 -#define DEV_I2S2 0x05092000 -#define DEV_SPDIF 0x05093000 -#define DEV_DMIC 0x05095000 -#define DEV_AHUB 0x05097000 -#define DEV_USB0 0x05100000 -#define DEV_USB1 0x05200000 -#define DEV_USB3 0x05311000 -#define DEV_PCIE 0x05400000 -#define DEV_HDMI 0x06000000 -#define DEV_TCON_TOP 0x06510000 -#define DEV_TCON0 0x06511000 -#define DEV_TCON1 0x06515000 -#define DEV_CSI 0x06620000 -#define DEV_RTC 0x07000000 -#define DEV_R_CPUCFG 0x07000400 -#define DEV_R_PRCM 0x07010000 -#define DEV_R_TIMER 0x07020000 -#define DEV_R_WDOG 0x07020400 -#define DEV_R_TWD 0x07020800 -#define DEV_R_PWM 0x07020c00 -#define DEV_R_INTC 0x07021000 -#define DEV_R_PIO 0x07022000 -#define DEV_R_CIR_RX 0x07040000 -#define DEV_R_W1 0x07040400 -#define DEV_R_UART 0x07080000 -#define DEV_R_I2C 0x07081400 -#define DEV_R_RSB 0x07083000 -#define DEV_CPUSYSCFG 0x08100000 -#define DEV_CNT_R 0x08110000 -#define DEV_CNT_C 0x08120000 -#define DEV_CPUCFG 0x09010000 -#define DEV_CPU_BIST 0x09020000 +#define DEV_DE 0x01000000 +#define DEV_DEBUG 0x01420000 +#define DEV_GPU 0x01800000 +#define DEV_CE_NS 0x01904000 +#define DEV_CE_S 0x01904800 +#define DEV_EMCE 0x01905000 +#define DEV_KEYMEM 0x01908000 +#define DEV_VP9 0x01c00000 +#define DEV_VE 0x01c0e000 +#define DEV_SYSCON 0x03000000 +#define DEV_CCU 0x03001000 +#define DEV_DMA 0x03002000 +#define DEV_MSGBOX 0x03003000 +#define DEV_SPINLOCK 0x03004000 +#define DEV_HSTIMER 0x03005000 +#define DEV_SID 0x03006000 +#define DEV_TZASC 0x03007000 +#define DEV_SPC 0x03008000 +#define DEV_TIMER 0x03009000 +#define DEV_PWM 0x0300a000 +#define DEV_PIO 0x0300b000 +#define DEV_PSI 0x0300c000 +#define DEV_DCU 0x03010000 +#define DEV_SCU 0x03020000 +#define DEV_GICD 0x03021000 +#define DEV_GICC 0x03022000 +#define DEV_IOMMU 0x030f0000 +#define DEV_DRAMCOM 0x04002000 +#define DEV_DRAMCTL 0x04003000 +#define DEV_DRAMPHY 0x04005000 +#define DEV_NAND 0x04011000 +#define DEV_MMC0 0x04020000 +#define DEV_MMC1 0x04021000 +#define DEV_MMC2 0x04022000 +#define DEV_UART0 0x05000000 +#define DEV_UART1 0x05000400 +#define DEV_UART2 0x05000800 +#define DEV_UART3 0x05000c00 +#define DEV_I2C0 0x05002000 +#define DEV_I2C1 0x05002400 +#define DEV_I2C2 0x05002800 +#define DEV_I2C3 0x05002c00 +#define DEV_SCR0 0x05005000 +#define DEV_SCR1 0x05005400 +#define DEV_SPI0 0x05010000 +#define DEV_SPI1 0x05011000 +#define DEV_EMAC 0x05020000 +#define DEV_TS0 0x05060000 +#define DEV_THS 0x05070400 +#define DEV_CIR_TX 0x05061000 +#define DEV_I2S3 0x0508f000 +#define DEV_I2S0 0x05090000 +#define DEV_I2S1 0x05091000 +#define DEV_I2S2 0x05092000 +#define DEV_SPDIF 0x05093000 +#define DEV_DMIC 0x05095000 +#define DEV_AHUB 0x05097000 +#define DEV_USB0 0x05100000 +#define DEV_USB1 0x05200000 +#define DEV_USB3 0x05311000 +#define DEV_PCIE 0x05400000 +#define DEV_HDMI 0x06000000 +#define DEV_TCON_TOP 0x06510000 +#define DEV_TCON0 0x06511000 +#define DEV_TCON1 0x06515000 +#define DEV_CSI 0x06620000 +#define DEV_RTC 0x07000000 +#define DEV_R_CPUCFG 0x07000400 +#define DEV_R_PRCM 0x07010000 +#define DEV_R_TIMER 0x07020000 +#define DEV_R_WDOG 0x07020400 +#define DEV_R_TWD 0x07020800 +#define DEV_R_PWM 0x07020c00 +#define DEV_R_INTC 0x07021000 +#define DEV_R_PIO 0x07022000 +#define DEV_R_CIR_RX 0x07040000 +#define DEV_R_W1 0x07040400 +#define DEV_R_UART 0x07080000 +#define DEV_R_I2C 0x07081400 +#define DEV_R_RSB 0x07083000 +#define DEV_CPUSYSCFG 0x08100000 +#define DEV_TIMESTAMP_STATUS 0x08110000 +#define DEV_TIMESTAMP_CTRL 0x08120000 +#define DEV_CPUCFG 0x09010000 +#define DEV_CPU_BIST 0x09020000 #endif /* PLATFORM_DEVICES_H */ diff -Nru crust-firmware-0.5/platform/h6/include/platform/irq.h crust-firmware-0.6/platform/h6/include/platform/irq.h --- crust-firmware-0.5/platform/h6/include/platform/irq.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h6/include/platform/irq.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h6/include/platform/memory.h crust-firmware-0.6/platform/h6/include/platform/memory.h --- crust-firmware-0.5/platform/h6/include/platform/memory.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h6/include/platform/memory.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h6/include/platform/prcm.h crust-firmware-0.6/platform/h6/include/platform/prcm.h --- crust-firmware-0.5/platform/h6/include/platform/prcm.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h6/include/platform/prcm.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2020-2021 The Crust Firmware Authors. + * Copyright © 2020-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/h6/include/platform/time.h crust-firmware-0.6/platform/h6/include/platform/time.h --- crust-firmware-0.5/platform/h6/include/platform/time.h 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/h6/include/platform/time.h 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/platform/Kconfig crust-firmware-0.6/platform/Kconfig --- crust-firmware-0.5/platform/Kconfig 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/platform/Kconfig 2023-09-02 13:21:19.000000000 +0000 @@ -1,10 +1,11 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # config PLATFORM string + default "a23" if PLATFORM_A23 default "a64" if PLATFORM_A64 default "a83t" if PLATFORM_A83T default "h3" if PLATFORM_H3 @@ -13,37 +14,51 @@ choice prompt "Platform selection" +config PLATFORM_A23 + bool "A23/A33" + depends on ARCH_OR1K + select HAVE_R_RSB + config PLATFORM_A64 bool "A64/H5" depends on ARCH_OR1K select HAVE_DRAM_SUSPEND + select HAVE_HDMI + select HAVE_R_CIR + select HAVE_R_TWD config PLATFORM_A83T bool "A83T" depends on ARCH_OR1K - select HAVE_RSB + select HAVE_HDMI + select HAVE_R_CIR + select HAVE_R_RSB + select HAVE_R_TWD select HAVE_UART4 config PLATFORM_H3 bool "H3" depends on ARCH_OR1K select HAVE_DRAM_SUSPEND + select HAVE_HDMI + select HAVE_R_CIR + select HAVE_R_TWD config PLATFORM_H6 bool "H6" depends on ARCH_OR1K select HAVE_DCXO select HAVE_DRAM_SUSPEND - select HAVE_RSB + select HAVE_HDMI + select HAVE_R_CIR + select HAVE_R_RSB + select HAVE_R_TWD endchoice -if PLATFORM_A64 - +source "a23/Kconfig" source "a64/Kconfig" -endif - config HAVE_DCXO bool help @@ -56,17 +71,33 @@ Select this option on platforms with the ability to suspend the DRAM controller. -config HAVE_I2C +config HAVE_HDMI + bool + help + Select this option on platforms with an HDMI controller. + +config HAVE_R_CIR + bool + help + Select this option on platforms with a consumer infrared + (CIR) controller. + +config HAVE_R_I2C bool default y help - Select this option on platforms with an I2C controller. + Select this option on platforms with an R_I2C controller. -config HAVE_RSB +config HAVE_R_RSB bool help Select this option on platforms with an RSB controller. +config HAVE_R_TWD + bool + help + Select this option on platforms with a trusted watchdog. + config HAVE_UART4 bool help diff -Nru crust-firmware-0.5/README.md crust-firmware-0.6/README.md --- crust-firmware-0.5/README.md 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/README.md 2023-09-02 13:21:19.000000000 +0000 @@ -9,7 +9,7 @@ The crust is the lowest-level component of a delicious fruit pie. Similarly, Crust is the lowest-level firmware component that runs on `$FRUIT` (Banana, Orange, Lichee) Pi single-board computers and other Allwinner-based devices, -such as the Pine64 Pinebook and PinePhone. +such as the Olimex TERES-I laptop and the Pine64 PinePhone. Crust improves battery life and thermal performance by implementing a deep sleep state. During deep sleep, the CPU cores, the DRAM controller, and most @@ -48,6 +48,8 @@ | SoC | Support level | SCPI | CPU cores | CPU subsystem | DRAM | PMIC | |-------|-------------------|------|-----------|---------------|------|------| +| A23 | Known to run | Yes | Yes | Yes | No | Yes | +| A33 | Known to run | Yes | Yes | Yes | No | Yes | | A64 | Production/stable | Yes | Yes | Yes | Yes | Yes | | A83T | Known to compile | Yes | No | No | No | No | | H3 | Working beta | Yes | Yes | Yes | Yes | N/A | @@ -111,10 +113,10 @@ your `PATH`, export `CROSS_COMPILE` or edit the top of the `Makefile` to provide the appropriate prefix or full path. -Run `make` to build the firmware and related tools, or `make scp` to build just -the firmware, which will be placed at `build/scp/scp.bin`. Adding `V=1` to the -command line will run a verbose build, showing you the commands as they run. -Set `SRC`, `OBJ`, or `TGT` as necessary if you want to do an out-of-tree build. +Run `make` to build the firmware, which will be placed at `build/scp/scp.bin`. +Adding `V=1` to the command line will perform a verbose build, showing you the +commands as they run. Set `SRC`, `OBJ`, or `TGT` as necessary if you want to do +an out-of-tree build. [bootlin]: https://toolchains.bootlin.com/ [crust-meta]: https://github.com/crust-firmware/meta diff -Nru crust-firmware-0.5/scripts/Makefile.format crust-firmware-0.6/scripts/Makefile.format --- crust-firmware-0.5/scripts/Makefile.format 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/scripts/Makefile.format 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/scripts/Makefile.kbuild crust-firmware-0.6/scripts/Makefile.kbuild --- crust-firmware-0.5/scripts/Makefile.kbuild 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/scripts/Makefile.kbuild 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/scripts/test.sh crust-firmware-0.6/scripts/test.sh --- crust-firmware-0.5/scripts/test.sh 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/scripts/test.sh 2023-09-02 13:21:19.000000000 +0000 @@ -1,6 +1,6 @@ #!/bin/sh -eu # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/scripts/version.sh crust-firmware-0.6/scripts/version.sh --- crust-firmware-0.5/scripts/version.sh 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/scripts/version.sh 2023-09-02 13:21:19.000000000 +0000 @@ -1,11 +1,11 @@ #!/bin/sh -eu # -# Copyright © 2020-2021 The Crust Firmware Authors. +# Copyright © 2020-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # major=0 -minor=5 +minor=6 patch=10000 srcdir=$1 diff -Nru crust-firmware-0.5/tools/load.c crust-firmware-0.6/tools/load.c --- crust-firmware-0.5/tools/load.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/tools/load.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/tools/Makefile crust-firmware-0.6/tools/Makefile --- crust-firmware-0.5/tools/Makefile 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/tools/Makefile 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ # -# Copyright © 2017-2021 The Crust Firmware Authors. +# Copyright © 2017-2022 The Crust Firmware Authors. # SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only # diff -Nru crust-firmware-0.5/tools/test.c crust-firmware-0.6/tools/test.c --- crust-firmware-0.5/tools/test.c 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/tools/test.c 2023-09-02 13:21:19.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2017-2021 The Crust Firmware Authors. + * Copyright © 2017-2022 The Crust Firmware Authors. * SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ diff -Nru crust-firmware-0.5/.travis.yml crust-firmware-0.6/.travis.yml --- crust-firmware-0.5/.travis.yml 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/.travis.yml 2023-09-02 13:21:19.000000000 +0000 @@ -75,5 +75,5 @@ sha256sum -b build/$config/scp.bin echo =========== end $config =========== done - make SRC=$TRAVIS_BUILD_DIR V=1 html + make SRC=$TRAVIS_BUILD_DIR V=1 html tools ... diff -Nru crust-firmware-0.5/.uncrustify crust-firmware-0.6/.uncrustify --- crust-firmware-0.5/.uncrustify 2021-11-06 15:51:49.000000000 +0000 +++ crust-firmware-0.6/.uncrustify 2023-09-02 13:21:19.000000000 +0000 @@ -92,7 +92,7 @@ indent_access_spec_body = false indent_align_assign = true indent_align_string = true -indent_bool_paren = false +indent_bool_paren = 0 indent_brace = 0 indent_brace_parent = false indent_braces = false @@ -107,7 +107,7 @@ indent_cmt_with_tabs = false indent_col1_comment = false indent_columns = 8 -indent_comma_paren = false +indent_comma_paren = 0 indent_constr_colon = false indent_continue = 0 indent_cpp_lambda_body = false @@ -152,8 +152,8 @@ indent_paren_open_brace = false indent_preserve_sql = false indent_relative_single_line_comments = false -indent_shift = false -indent_sing_line_comments = 0 +indent_shift = 0 +indent_single_line_comments_before = 0 indent_square_nl = false indent_switch_case = 0 indent_switch_pp = true @@ -181,7 +181,7 @@ mod_full_brace_for = remove mod_full_brace_function = ignore mod_full_brace_if = remove -mod_full_brace_if_chain = true +mod_full_brace_if_chain = 1 mod_full_brace_if_chain_only = false mod_full_brace_nl = 2 mod_full_brace_nl_block_rem_mlcond = false @@ -399,7 +399,7 @@ pp_ignore_define_body = false pp_indent = remove pp_indent_at_level = false -pp_indent_brace = true +pp_indent_brace = 1 pp_indent_case = true pp_indent_count = 1 pp_indent_extern = true @@ -489,7 +489,7 @@ sp_before_square = remove sp_before_squares = remove sp_before_template_paren = ignore -sp_before_tr_emb_cmt = force +sp_before_tr_cmt = force sp_before_type_brace_init_lst_close = ignore sp_before_unnamed_byref = ignore sp_before_unnamed_ptr_star = force @@ -568,7 +568,7 @@ sp_macro_func = force sp_member = remove sp_not = remove -sp_num_before_tr_emb_cmt = 1 +sp_num_before_tr_cmt = 1 sp_paren_brace = force sp_paren_comma = force sp_paren_paren = remove