diff -Nru graywolf-0.1.5/CMakeLists.txt graywolf-0.1.6/CMakeLists.txt --- graywolf-0.1.5/CMakeLists.txt 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/CMakeLists.txt 2018-08-11 21:48:56.000000000 +0000 @@ -1,9 +1,12 @@ -cmake_minimum_required (VERSION 2.6) +cmake_minimum_required (VERSION 2.8.5) project (graywolf) +enable_testing() + find_package(PkgConfig) find_package(X11) INCLUDE(CheckIncludeFiles) +include(GNUInstallDirs) pkg_check_modules(GSL gsl) @@ -12,12 +15,22 @@ MESSAGE(FATAL_ERROR "The development files for the GNU Scientific Library (libgsl) are required to build graywolf.") endif() +if (NOT X11_FOUND) + MESSAGE(FATAL_ERROR "The development files for X11 (libx11-dev) are required to build graywolf.") +endif() + # Include RPATH in build so that ldconfig is not necessary after install SET(CMAKE_SKIP_BUILD_RPATH FALSE) SET(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE) -SET(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_PREFIX}/lib") +SET(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_FULL_LIBDIR}") SET(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE) +MATH(EXPR SIZEOF_VOID_P_BITS "${CMAKE_SIZEOF_VOID_P}*8") + +# Ignore no-implicit-function-declaration warnings for now, since there are so many - and it then becomes +# easier to see other warnings popping up. +SET(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DSIZEOF_VOID_P=${SIZEOF_VOID_P_BITS} -Wno-implicit-function-declaration") + CONFIGURE_FILE(${CMAKE_CURRENT_SOURCE_DIR}/config.h.in ${CMAKE_CURRENT_BINARY_DIR}/include/config-build.h) @@ -27,3 +40,5 @@ add_subdirectory(src) add_subdirectory(script) +add_subdirectory(tests) + diff -Nru graywolf-0.1.5/debian/changelog graywolf-0.1.6/debian/changelog --- graywolf-0.1.5/debian/changelog 2018-07-15 07:04:17.000000000 +0000 +++ graywolf-0.1.6/debian/changelog 2018-08-11 22:06:34.000000000 +0000 @@ -1,3 +1,40 @@ +graywolf (0.1.6-1) unstable; urgency=medium + + * Upload to unstable + * New upstream release + * debian/compat: level 11 + * debian/control: + - debhelper >= 11 + - New standards version 4.2.0 - no changes + * debian/rules: + - Do not run tests on x32 architecture + * debian/tests: + - Add autopkgtest for graywolf + * debian/upstream/metadata added + + -- Ruben Undheim Sun, 12 Aug 2018 00:06:34 +0200 + +graywolf (0.1.5.2-1~exp1) experimental; urgency=medium + + * New upstream release + * debian/control: + - Added "rsync" to build-dependencies since tests + require it when running on 64 bit architectures + * debian/rules: + - Define missing ${arch} in rules. + + -- Ruben Undheim Mon, 23 Jul 2018 19:35:31 +0200 + +graywolf (0.1.5.1-1~exp1) experimental; urgency=medium + + * New upstream release + - Drop patch 04_install_directory_multiarch.patch + - Refreshed the other patches + * debian/rules: + - Do not run tests on 32 bit architectures + + -- Ruben Undheim Fri, 20 Jul 2018 23:32:47 +0200 + graywolf (0.1.5-1) unstable; urgency=medium * New upstream release diff -Nru graywolf-0.1.5/debian/compat graywolf-0.1.6/debian/compat --- graywolf-0.1.5/debian/compat 2017-03-08 08:45:52.000000000 +0000 +++ graywolf-0.1.6/debian/compat 2018-08-11 22:06:34.000000000 +0000 @@ -1 +1 @@ -9 +11 diff -Nru graywolf-0.1.5/debian/control graywolf-0.1.6/debian/control --- graywolf-0.1.5/debian/control 2018-07-15 07:00:57.000000000 +0000 +++ graywolf-0.1.6/debian/control 2018-08-11 22:06:34.000000000 +0000 @@ -3,12 +3,13 @@ Uploaders: Ruben Undheim Section: electronics Priority: optional -Build-Depends: debhelper (>= 9), +Build-Depends: debhelper (>= 11), cmake, pkg-config, libx11-dev, - libgsl-dev -Standards-Version: 4.1.5 + libgsl-dev, + rsync +Standards-Version: 4.2.0 Vcs-Browser: https://salsa.debian.org/science-team/graywolf Vcs-Git: https://salsa.debian.org/science-team/graywolf.git Homepage: https://github.com/rubund/graywolf diff -Nru graywolf-0.1.5/debian/patches/01_no_rpath_in_debian_package.patch graywolf-0.1.6/debian/patches/01_no_rpath_in_debian_package.patch --- graywolf-0.1.5/debian/patches/01_no_rpath_in_debian_package.patch 2018-07-15 06:49:54.000000000 +0000 +++ graywolf-0.1.6/debian/patches/01_no_rpath_in_debian_package.patch 2018-08-11 22:06:34.000000000 +0000 @@ -5,27 +5,25 @@ Forwarded: doesn't make sense upstream --- - CMakeLists.txt | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) + CMakeLists.txt | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt -index a86dbaa..7b2b6f4 100644 +index 32a348c..03c90d5 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt -@@ -12,11 +12,11 @@ if (NOT GSL_FOUND) - MESSAGE(FATAL_ERROR "The development files for the GNU Scientific Library (libgsl) are required to build graywolf.") +@@ -20,10 +20,10 @@ if (NOT X11_FOUND) endif() --# Include RPATH in build so that ldconfig is not necessary after install + # Include RPATH in build so that ldconfig is not necessary after install -SET(CMAKE_SKIP_BUILD_RPATH FALSE) -SET(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE) --SET(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_PREFIX}/lib") +-SET(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_FULL_LIBDIR}") -SET(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE) -+# # Include RPATH in build so that ldconfig is not necessary after install -+# SET(CMAKE_SKIP_BUILD_RPATH FALSE) -+# SET(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE) -+# SET(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_PREFIX}/lib") -+# SET(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE) ++#SET(CMAKE_SKIP_BUILD_RPATH FALSE) ++#SET(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE) ++#SET(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_FULL_LIBDIR}") ++#SET(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE) + MATH(EXPR SIZEOF_VOID_P_BITS "${CMAKE_SIZEOF_VOID_P}*8") - CONFIGURE_FILE(${CMAKE_CURRENT_SOURCE_DIR}/config.h.in ${CMAKE_CURRENT_BINARY_DIR}/include/config-build.h) diff -Nru graywolf-0.1.5/debian/patches/02_dont_create_link.patch graywolf-0.1.6/debian/patches/02_dont_create_link.patch --- graywolf-0.1.5/debian/patches/02_dont_create_link.patch 2018-07-15 06:49:54.000000000 +0000 +++ graywolf-0.1.6/debian/patches/02_dont_create_link.patch 2018-08-11 22:06:34.000000000 +0000 @@ -9,10 +9,10 @@ 1 file changed, 1 deletion(-) diff --git a/CMakeLists.txt b/CMakeLists.txt -index 7b2b6f4..aca6357 100644 +index 03c90d5..6c57ff7 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt -@@ -23,7 +23,6 @@ CONFIGURE_FILE(${CMAKE_CURRENT_SOURCE_DIR}/config.h.in ${CMAKE_CURRENT_BINARY_DI +@@ -36,7 +36,6 @@ CONFIGURE_FILE(${CMAKE_CURRENT_SOURCE_DIR}/config.h.in ${CMAKE_CURRENT_BINARY_DI install(DIRECTORY flow DESTINATION lib/graywolf/bin) diff -Nru graywolf-0.1.5/debian/patches/04_install_directory_multiarch.patch graywolf-0.1.6/debian/patches/04_install_directory_multiarch.patch --- graywolf-0.1.5/debian/patches/04_install_directory_multiarch.patch 2018-07-15 06:49:54.000000000 +0000 +++ graywolf-0.1.6/debian/patches/04_install_directory_multiarch.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,18 +0,0 @@ -From: Ruben Undheim -Date: Sat, 14 May 2016 15:58:01 +0200 -Subject: This patch makes the library support multi-arch - ---- - src/Ylib/CMakeLists.txt | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/src/Ylib/CMakeLists.txt b/src/Ylib/CMakeLists.txt -index 754c145..c463e57 100644 ---- a/src/Ylib/CMakeLists.txt -+++ b/src/Ylib/CMakeLists.txt -@@ -12,4 +12,4 @@ set_target_properties(ycadgraywolf PROPERTIES VERSION 1.0.0 SOVERSION 1) - - INCLUDE_DIRECTORIES(${CMAKE_SOURCE_DIR}/include ${CMAKE_BINARY_DIR}/include ${X11_INCLUDE_DIR}) - --install(TARGETS ycadgraywolf DESTINATION lib) -+install(TARGETS ycadgraywolf DESTINATION lib/${CMAKE_LIBRARY_ARCHITECTURE}) diff -Nru graywolf-0.1.5/debian/patches/series graywolf-0.1.6/debian/patches/series --- graywolf-0.1.5/debian/patches/series 2018-07-15 06:49:27.000000000 +0000 +++ graywolf-0.1.6/debian/patches/series 2018-08-11 22:06:34.000000000 +0000 @@ -1,3 +1,2 @@ 01_no_rpath_in_debian_package.patch 02_dont_create_link.patch -04_install_directory_multiarch.patch diff -Nru graywolf-0.1.5/debian/rules graywolf-0.1.6/debian/rules --- graywolf-0.1.5/debian/rules 2018-07-15 07:03:02.000000000 +0000 +++ graywolf-0.1.6/debian/rules 2018-08-11 22:06:34.000000000 +0000 @@ -7,5 +7,24 @@ export DEB_BUILD_MAINT_OPTIONS = hardening=+all +arch = $(shell dpkg-architecture -qDEB_BUILD_ARCH) + %: dh $@ + + +# Test suite does not support 32 bit architectures at the moment +override_dh_auto_test: + echo ${arch} + if [ "${arch}" = "i386" ] || \ + [ "${arch}" = "armel" ] || \ + [ "${arch}" = "armhf" ] || \ + [ "${arch}" = "mips" ] || \ + [ "${arch}" = "mipsel" ] || \ + [ "${arch}" = "x32" ] || \ + [ "${arch}" = "s390x" ] ; then \ + echo "Do not care of test result on this architecture" ;\ + else \ + echo "Do run tests on this architecture" ;\ + dh_auto_test ;\ + fi diff -Nru graywolf-0.1.5/debian/tests/control graywolf-0.1.6/debian/tests/control --- graywolf-0.1.5/debian/tests/control 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/debian/tests/control 2018-08-11 22:06:34.000000000 +0000 @@ -0,0 +1,2 @@ +Tests: maintest +Depends: @ diff -Nru graywolf-0.1.5/debian/tests/maintest graywolf-0.1.6/debian/tests/maintest --- graywolf-0.1.5/debian/tests/maintest 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/debian/tests/maintest 2018-08-11 22:06:34.000000000 +0000 @@ -0,0 +1,53 @@ +#!/bin/bash + +#set -e + +TMPDIR=`mktemp -d` + +cp tests/map9v3/map9v3.cel ${TMPDIR}/ +cp tests/map9v3/map9v3.par ${TMPDIR}/ + +RET=0 + +pushd ${TMPDIR} +graywolf -n map9v3 2> stderr.log +RETRUN="$?" +popd + +if [ "$RETRUN" != "0" ] ; then + RET=1 +fi + +if [ ! -f ${TMPDIR}/map9v3.pl1 ] ; then + echo "map9v3.pl1 not found after running graywolf" + RET=1 +fi + + +# Not reliable since different on 64bit vs 32bit architetures +#diff ${TMPDIR}/map9v3.pl1 tests/map9v3/expected/map9v3.pl1 +#RETSUB="$?" +#if [ "$RETSUB" != "0" ] ; then +# RET=1 +#fi + +if [ ! -f ${TMPDIR}/map9v3.pl2 ] ; then + echo "map9v3.pl2 not found after running graywolf" + RET=1 +fi + +# Not reliable since different on 64bit vs 32bit architetures +#diff ${TMPDIR}/map9v3.pl2 tests/map9v3/expected/map9v3.pl2 +#RETSUB="$?" +#if [ "$RETSUB" != "0" ] ; then +# RET=1 +#fi + +if [ "$RET" != "0" ] ; then + echo "stderr from running graywolf -->" + cat ${TMPDIR}/stderr.log + echo "<--" +fi + +rm -rf ${TMPDIR} +exit ${RET} diff -Nru graywolf-0.1.5/debian/upstream/metadata graywolf-0.1.6/debian/upstream/metadata --- graywolf-0.1.5/debian/upstream/metadata 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/debian/upstream/metadata 2018-08-11 22:06:34.000000000 +0000 @@ -0,0 +1,6 @@ +--- +Bug-Database: https://github.com/rubund/graywolf/issues +Bug-Submit: https://github.com/rubund/graywolf/issues/new +Name: graywolf +Repository: https://github.com/rubund/graywolf.git +Repository-Browse: https://github.com/rubund/graywolf diff -Nru graywolf-0.1.5/include/yalecad/assign.h graywolf-0.1.6/include/yalecad/assign.h --- graywolf-0.1.5/include/yalecad/assign.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/assign.h 2018-08-11 21:48:56.000000000 +0000 @@ -9,9 +9,6 @@ #ifndef YASSIGN_H #define YASSIGN_H -#ifndef lint -static char YassignId[] = "@(#) assign.h (Yale) version 1.3 10/9/90" ; -#endif #include #include diff -Nru graywolf-0.1.5/include/yalecad/base.h graywolf-0.1.6/include/yalecad/base.h --- graywolf-0.1.5/include/yalecad/base.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/base.h 2018-08-11 21:48:56.000000000 +0000 @@ -35,9 +35,6 @@ #ifndef YBASE_H #define YBASE_H -#ifndef lint -static char Ybase_HId[] = "@(#) base.h version 1.34 3/5/92" ; -#endif /* Take care of prototyping first, so system file can include it */ diff -Nru graywolf-0.1.5/include/yalecad/buster.h graywolf-0.1.6/include/yalecad/buster.h --- graywolf-0.1.5/include/yalecad/buster.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/buster.h 2018-08-11 21:48:56.000000000 +0000 @@ -17,9 +17,6 @@ #ifndef YBUSTER_H #define YBUSTER_H -#ifndef lint -static char YbusterId[] = "@(#) buster.h version 1.5 4/18/91" ; -#endif #include @@ -29,7 +26,7 @@ } YBUSTBOX , *YBUSTBOXPTR ; -extern Ybuster_init() ; +extern void Ybuster_init() ; /* Arguments: none @@ -40,7 +37,7 @@ into tiles. */ -extern Ybuster_addpt( P2( INT x, INT y ) ) ; +extern void Ybuster_addpt( P2( INT x, INT y ) ) ; /* Arguments: INT x, y ; @@ -61,7 +58,7 @@ ptr[3].x, ptr[3].y if ptr is the returned pointer. */ -extern Ybuster_free() ; +extern void Ybuster_free() ; /* Arguments: none diff -Nru graywolf-0.1.5/include/yalecad/colors.h graywolf-0.1.6/include/yalecad/colors.h --- graywolf-0.1.5/include/yalecad/colors.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/colors.h 2018-08-11 21:48:56.000000000 +0000 @@ -10,9 +10,6 @@ #ifndef COLOR_H #define COLOR_H -#ifndef lint -static char colors_hId[] = "@(#) colors.h version 1.8 2/26/92" ; -#endif #define TWWHITE 1 #define TWBLACK 2 diff -Nru graywolf-0.1.5/include/yalecad/debug.h graywolf-0.1.6/include/yalecad/debug.h --- graywolf-0.1.5/include/yalecad/debug.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/debug.h 2018-08-11 21:48:56.000000000 +0000 @@ -164,7 +164,6 @@ Returns TRUE if debug is on. It returns FALSE otherwise. */ -extern YdebugWrite() ; /* Function: Write the debug data structure to a file. @@ -191,6 +190,8 @@ #endif /* DEBUG */ +extern void YdebugWrite() ; + /* now selectively delete either ASSERTIONS or PRINT */ #ifdef TURNOFFPRINTD diff -Nru graywolf-0.1.5/include/yalecad/deck.h graywolf-0.1.6/include/yalecad/deck.h --- graywolf-0.1.5/include/yalecad/deck.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/deck.h 2018-08-11 21:48:56.000000000 +0000 @@ -21,9 +21,6 @@ #ifndef DECK_H #define DECK_H -#ifndef lint -static char YdeckId[] = "@(#) deck.h (Yale) version 1.16 1/22/92" ; -#endif #include #include diff -Nru graywolf-0.1.5/include/yalecad/dialog.h graywolf-0.1.6/include/yalecad/dialog.h --- graywolf-0.1.5/include/yalecad/dialog.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/dialog.h 2018-08-11 21:48:56.000000000 +0000 @@ -9,9 +9,6 @@ #define DIALOG_H -#ifndef lint -static char dialogHId[] = "@(#) dialog.h version 1.4 12/7/90" ; -#endif #include diff -Nru graywolf-0.1.5/include/yalecad/draw.h graywolf-0.1.6/include/yalecad/draw.h --- graywolf-0.1.5/include/yalecad/draw.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/draw.h 2018-08-11 21:48:56.000000000 +0000 @@ -17,9 +17,6 @@ #ifndef DRAW_H #define DRAW_H -#ifndef lint -static char YdrawId[] = "@(#) draw.h (Yale) version 1.20 3/6/92" ; -#endif #include /* need for BOOL definitions used below */ @@ -77,7 +74,7 @@ TWdrawLine(ref_num,(INT)X1,(INT)Y1,(INT)X2,(INT)Y2,color, label) ; \ } -extern _TW3DdrawAxis( P1(BOOL drawNotErase) ) ; +extern void _TW3DdrawAxis( P1(BOOL drawNotErase) ) ; /******** FUNCTIONS NORMALLY USED BY GRAPHIC PROGRAM USERS *********/ @@ -115,14 +112,14 @@ It is found by calling TWsaveState in the calling processs. */ -extern TWcloseGraphics() ; +extern void TWcloseGraphics() ; /* Function: Closes graphics display and performs cleanup operations. Should be performed before end of program. */ -extern TWsetMode( P1(INT mode) ) ; +extern void TWsetMode( P1(INT mode) ) ; /* Function: Allows user to change mode during run. Helpful to dump the current @@ -212,7 +209,7 @@ Label is optional - a label is attached to figure if non-null. */ -extern TWarb_init() ; +extern void TWarb_init() ; /* Arguments: none @@ -220,7 +217,7 @@ Start a new arbitrary figure. */ -extern TWarb_addpt( P2( INT xpos, INT ypos ) ) ; +extern void TWarb_addpt( P2( INT xpos, INT ypos ) ) ; /* Function: Add a new point to the current arbitrary figure @@ -240,7 +237,7 @@ */ /* copy pixmap to screen and flush screen output buffer */ -extern TWflushFrame() ; +extern void TWflushFrame() ; /* Arguments: None. Function: @@ -249,7 +246,7 @@ after all TWdraws have performed. */ -extern TWstartFrame() ; +extern void TWstartFrame() ; /* Arguments: None. Function: @@ -259,21 +256,21 @@ */ /********** ROUTINES USED BY SCREEN GRAPHICS ONLY ******************/ -extern TWzoom() ; +extern void TWzoom() ; /* Arguments: None Function: Performs a zoom in main graphics window. */ -extern TWtranslate() ; +extern void TWtranslate() ; /* Arguments: None Function: Translate center to picked or entered point in main graphics window. */ -extern TWfullView() ; +extern void TWfullView() ; /* Arguments: None Function: @@ -281,14 +278,14 @@ determined by TWsetWindow. */ -extern TWsetwindow( P4( INT left, INT bottom, INT right, INT top ) ) ; +extern void TWsetwindow( P4( INT left, INT bottom, INT right, INT top ) ) ; /* Function: set the boundary of the visible window according to user coordinates Must call this function before draws. */ -extern TWcolorXOR( P2( INT color, BOOL exorFlag ) ) ; +extern void TWcolorXOR( P2( INT color, BOOL exorFlag ) ) ; /* Function: set a particular colors draw function. If exorFlag is set to TRUE, @@ -297,13 +294,13 @@ over any current contents blocking the view. The default is copy mode. */ -extern TWhighLightRect( P4( INT x1,INT y1,INT x2,INT y2 )) ; +extern void TWhighLightRect( P4( INT x1,INT y1,INT x2,INT y2 )) ; /* Function: Highlight the given area in black. */ -extern TWsync( ) ; +extern void TWsync( ) ; /* Arguments: None Function: @@ -312,7 +309,7 @@ internally in the graphics module. */ -extern TWmoveRect( P6( INT *x1, INT *y1, INT *x2, INT *y2, INT ptx, INT pty )) ; +extern void TWmoveRect( P6( INT *x1, INT *y1, INT *x2, INT *y2, INT ptx, INT pty )) ; /* Function: Draw ghost figure of rectangle as the user moves it on the screen. @@ -335,14 +332,14 @@ value corresponding to the function value given in the menu file. */ -extern TWgetPt( P2( INT *x, INT *y )) ; +extern void TWgetPt( P2( INT *x, INT *y )) ; /* Function: Wait for user to enter point with a mouse pointer. Returns x,y position of pointer when clicked in user coordinate system. */ -extern TWmessage( P1( char *message ) ) ; +extern void TWmessage( P1( char *message ) ) ; /* Function: Write messsage to the message window. @@ -383,7 +380,7 @@ the window ID which is needed in the TWinitParasite argument list. */ -extern TWrestoreState() ; +extern void TWrestoreState() ; /* Arguments:None Function: @@ -392,7 +389,7 @@ */ /* check to see if main window has been requested to change size */ -extern TWcheckReconfig() ; +extern void TWcheckReconfig() ; /* Arguments:None Function: @@ -403,7 +400,7 @@ */ -extern TWsetFrame( P1(INT number) ) ; +extern void TWsetFrame( P1(INT number) ) ; /* Function: Set the dump file to the given frame number. Valid frame numbers start @@ -421,7 +418,7 @@ menus. */ -extern TWforceRedraw() ; +extern void TWforceRedraw() ; /* Function: This function forces a redraw by sending an exposure event @@ -429,7 +426,7 @@ exposure events. */ -extern TWdrawString( P4(INT x, INT y, INT color, char *label ) ) ; +extern void TWdrawString( P4(INT x, INT y, INT color, char *label ) ) ; /* Function: Draw a string left justified from the given location. @@ -481,7 +478,7 @@ Draws a line in 3 dimensions. */ -extern INT TW3DdrawCube( P9(INT ref_num, INT x1, INT y1, INT z1, +extern void TW3DdrawCube( P9(INT ref_num, INT x1, INT y1, INT z1, INT x2, INT y2, INT z2, INT color, char *label ) ) ; /* Function: @@ -506,11 +503,13 @@ Finished arbitrary point and draws it to the screen. */ -extern TWarb_fill( P1(BOOL flag ) ) ; +extern void TWarb_fill( P1(BOOL flag ) ) ; /* Function: If flag is true, arbitrary figures (both 2D and 3D) will be filled. Otherwise, no fill will be added. */ +BOOL TWget_arb_fill(); + #endif /* DRAW_H */ diff -Nru graywolf-0.1.5/include/yalecad/dset.h graywolf-0.1.6/include/yalecad/dset.h --- graywolf-0.1.5/include/yalecad/dset.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/dset.h 2018-08-11 21:48:56.000000000 +0000 @@ -11,9 +11,6 @@ #ifndef YDSET_H #define YDSET_H -#ifndef lint -static char Ydset_h_SccsId[] = "@(#) dset.h version 1.6 3/28/92"; -#endif #include #include @@ -151,7 +148,7 @@ /*------------------------ Ydset_dump ------------------------*/ -extern Ydset_dump(P2( YDSETPTR set, VOID (*printFunc)() ) ); +extern void Ydset_dump(P2( YDSETPTR set, VOID (*printFunc)() ) ); #endif /* YDSET_H */ diff -Nru graywolf-0.1.5/include/yalecad/edcolors.h graywolf-0.1.6/include/yalecad/edcolors.h --- graywolf-0.1.5/include/yalecad/edcolors.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/edcolors.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,6 @@ +#ifndef INC_EDCOLORS_H +#define INC_EDCOLORS_H + +void TWtoggleColors(); + +#endif diff -Nru graywolf-0.1.5/include/yalecad/graph.h graywolf-0.1.6/include/yalecad/graph.h --- graywolf-0.1.5/include/yalecad/graph.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/graph.h 2018-08-11 21:48:56.000000000 +0000 @@ -8,9 +8,6 @@ #ifndef YGRAPH_H #define YGRAPH_H -#ifndef lint -static char YgraphId[] = "@(#) Graph.h version 1.8 8/19/91"; -#endif #include #include diff -Nru graywolf-0.1.5/include/yalecad/hash.h graywolf-0.1.6/include/yalecad/hash.h --- graywolf-0.1.5/include/yalecad/hash.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/hash.h 2018-08-11 21:48:56.000000000 +0000 @@ -76,7 +76,7 @@ */ -extern Yhash_table_delete( P2(YHASHPTR hashtable,INT (*userdelete)() ) ) ; +extern void Yhash_table_delete( P2(YHASHPTR hashtable,INT (*userdelete)() ) ) ; /* Function: Frees the memory associated with a hash table. The user diff -Nru graywolf-0.1.5/include/yalecad/heap.h graywolf-0.1.6/include/yalecad/heap.h --- graywolf-0.1.5/include/yalecad/heap.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/heap.h 2018-08-11 21:48:56.000000000 +0000 @@ -18,9 +18,6 @@ #ifndef HEAP_H #define HEAP_H -#ifndef lint -static char YHeap_SccsId[] = "@(#) heap.h version 1.3 7/11/91"; -#endif #include diff -Nru graywolf-0.1.5/include/yalecad/linalg.h graywolf-0.1.6/include/yalecad/linalg.h --- graywolf-0.1.5/include/yalecad/linalg.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/linalg.h 2018-08-11 21:48:56.000000000 +0000 @@ -8,9 +8,6 @@ #ifndef YLINALG_H #define YLINALG_H -#ifndef lint -static char YlinAlgId[] = "@(#) linalg.h version 1.1 1/15/91" ; -#endif #define YEPSILON 1.0E-12 #define YMIN -1.0E-38 @@ -29,9 +26,9 @@ extern YMPTR Ymatrix_transpose( P1( YMPTR mptr ) ) ; extern YMPTR Ymatrix_mult( P2(YMPTR aptr, YMPTR bptr ) ) ; extern YMPTR Ymatrix_sub( P2(YMPTR aptr, YMPTR bptr ) ) ; -extern Ymatrix_disp( P1(YMPTR mptr ) ) ; +extern void Ymatrix_disp( P1(YMPTR mptr ) ) ; extern YMPTR Ymatrix_eye( P1(INT size ) ) ; -extern Ymatrix_zero( P1(YMPTR matrix ) ) ; +extern void Ymatrix_zero( P1(YMPTR matrix ) ) ; extern YMPTR Ymatrix_copy( P1(YMPTR input ) ) ; extern YMPTR Ymatrix_linv( P1(YMPTR aptr ) ) ; extern YMPTR Ymatrix_cofactors( P1(YMPTR aptr ) ) ; diff -Nru graywolf-0.1.5/include/yalecad/mac.h graywolf-0.1.6/include/yalecad/mac.h --- graywolf-0.1.5/include/yalecad/mac.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/mac.h 2018-08-11 21:48:56.000000000 +0000 @@ -8,9 +8,6 @@ #ifndef MAC_H #define MAC_H -#ifndef lint -static char Ymac_HId[] = "@(#) mac.h version 1.4 1/8/92" ; -#endif #ifdef THINK_C diff -Nru graywolf-0.1.5/include/yalecad/menus.h graywolf-0.1.6/include/yalecad/menus.h --- graywolf-0.1.5/include/yalecad/menus.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/menus.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,25 @@ +#ifndef INC_MENUS_H +#define INC_MENUS_H + +#include + +void TWdrawMenus(); + +void TWfreeMenuWindows(); + +void TWinforMenus(); + +void TWmouse_tracking_start(); + +BOOL TWmouse_tracking_end(); + +BOOL TWmouse_tracking_pt( INT *x, INT *y ); + +INT TWsaveState(); + +void TWrestoreState(); + +BOOL TWinterupt(); + +#endif /*INC_MENUS_H*/ + diff -Nru graywolf-0.1.5/include/yalecad/message.h graywolf-0.1.6/include/yalecad/message.h --- graywolf-0.1.5/include/yalecad/message.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/message.h 2018-08-11 21:48:56.000000000 +0000 @@ -75,7 +75,7 @@ } /* message routines */ -extern Ymessage_print( P3(INT messageType, char *routine, char *message) ) ; +extern void Ymessage_print( P3(INT messageType, char *routine, char *message) ) ; /* Function: Print a message to screen and/or to a file. There are the following @@ -105,13 +105,13 @@ YmsgG is a global pointer to a character buffer workspace. */ -extern Ymessage_warn_count() ; +extern void Ymessage_warn_count() ; /* Function: Increment the warning count. */ -extern Ymessage_error_count() ; +extern void Ymessage_error_count() ; /* Function: Increment the error count. @@ -129,13 +129,13 @@ Returns the error count. */ -extern Ymessage_init( P1(FILE *fileptr) ) ; +extern void Ymessage_init( P1(FILE *fileptr) ) ; /* Function: Redirects the messages to the given file. */ -extern Ymessage_output( P1(char *messageString ) ) ; +extern void Ymessage_output( P1(char *messageString ) ) ; /* Function: Output message to screen if verbose mode has been set or @@ -143,7 +143,7 @@ it does nothing. Used in the OUT macros. */ -extern Ymessage_mode( P1(INT mode) ) ; +extern void Ymessage_mode( P1(INT mode) ) ; /* Function: Set the message mode. It may be one of M_VERBOSE, M_NORMAL, or @@ -156,13 +156,13 @@ Returns the state of the message mode switch. */ -extern Ymessage_flush() ; +extern void Ymessage_flush() ; /* Function: Flush the buffered output. */ -extern Ymessage_close() ; +extern void Ymessage_close() ; /* Function: Close the output streams. diff -Nru graywolf-0.1.5/include/yalecad/okmalloc.h graywolf-0.1.6/include/yalecad/okmalloc.h --- graywolf-0.1.5/include/yalecad/okmalloc.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/okmalloc.h 2018-08-11 21:48:56.000000000 +0000 @@ -7,9 +7,6 @@ #ifndef YOKMALLOC_H #define YOKMALLOC_H -#ifndef lint -static char Yokmalloc_HId[] = "@(#) okmalloc.h version 1.1 3/5/92" ; -#endif /* memory definitions - for portability and ease of use */ #ifndef MEM_DEBUG diff -Nru graywolf-0.1.5/include/yalecad/plot.h graywolf-0.1.6/include/yalecad/plot.h --- graywolf-0.1.5/include/yalecad/plot.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/plot.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,7 @@ +#ifndef INC_PLOT_H +#define INC_PLOT_H + +void Yplot_flush( char *gName ); + +#endif /* INC_PLOT_H */ + diff -Nru graywolf-0.1.5/include/yalecad/program.h graywolf-0.1.6/include/yalecad/program.h --- graywolf-0.1.5/include/yalecad/program.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/program.h 2018-08-11 21:48:56.000000000 +0000 @@ -22,7 +22,7 @@ starts the elapsed timer. */ -extern YexitPgm( P1(INT status) ) ; +extern void YexitPgm( P1(INT status) ) ; /* Function: Exit a program gracefully. It always outputs a message with diff -Nru graywolf-0.1.5/include/yalecad/project.h graywolf-0.1.6/include/yalecad/project.h --- graywolf-0.1.5/include/yalecad/project.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/project.h 2018-08-11 21:48:56.000000000 +0000 @@ -8,9 +8,6 @@ #ifndef YPROJECT_H #define YPROJECT_H -#ifndef lint -static char Yproject_HId[] = "@(#) project.h version 1.2 3/5/92" ; -#endif #define NOTOUCH 0 /* tiles don't touch or overlap */ @@ -24,7 +21,7 @@ ( YprojectX((t1_l),(t1_r),(t2_l),(t2_r) ) ? \ YprojectY((t1_b),(t1_t),(t2_b),(t2_t) ) : 0 ) -extern Yproject_space( P2(INT xspace, INT yspace ) ) ; +extern void Yproject_space( P2(INT xspace, INT yspace ) ) ; extern INT YprojectX( P4( INT tile1_left, INT tile1_right, INT tile2_left, INT tile2_right ) ) ; diff -Nru graywolf-0.1.5/include/yalecad/queue.h graywolf-0.1.6/include/yalecad/queue.h --- graywolf-0.1.5/include/yalecad/queue.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/queue.h 2018-08-11 21:48:56.000000000 +0000 @@ -22,7 +22,7 @@ } YQUEUE ; /* *********** FIFO routines *************** */ -extern YinitQueue( P2(YQUEUE *queue, char *node ) ) ; +extern void YinitQueue( P2(YQUEUE *queue, char *node ) ) ; /* Arguments: YQUEUE *queue ; @@ -40,7 +40,7 @@ Returns the users pointer to the first element in the FIFO. */ -extern Yadd2Queue( P2(YQUEUE *queue, char *node ) ) ; +extern void Yadd2Queue( P2(YQUEUE *queue, char *node ) ) ; /* Arguments: YQUEUE *queue ; @@ -59,7 +59,7 @@ */ /* debug function to dump the contents of the queue */ -extern YdumpQueue( P1(YQUEUE *queue ) ) ; +extern void YdumpQueue( P1(YQUEUE *queue ) ) ; /* Arguments: YQUEUE *queue ; diff -Nru graywolf-0.1.5/include/yalecad/quicksort.h graywolf-0.1.6/include/yalecad/quicksort.h --- graywolf-0.1.5/include/yalecad/quicksort.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/quicksort.h 2018-08-11 21:48:56.000000000 +0000 @@ -6,9 +6,6 @@ #ifndef YQUICKSORT_H #define YQUICKSORT_H -#ifndef lint -static char Yquicksort_HId[] = "@(#) quicksort.h version 1.1 3/5/92" ; -#endif extern VOID Yquicksort( P4(VOIDPTR base, INT n, INT size, INT (*compare)() ) ) ; diff -Nru graywolf-0.1.5/include/yalecad/rand.h graywolf-0.1.6/include/yalecad/rand.h --- graywolf-0.1.5/include/yalecad/rand.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/rand.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,7 @@ +#ifndef INC_RAND_H +#define INC_RAND_H + +INT Yacm_random(); + +#endif /*INC_RAND_H*/ + diff -Nru graywolf-0.1.5/include/yalecad/rbtree.h graywolf-0.1.6/include/yalecad/rbtree.h --- graywolf-0.1.5/include/yalecad/rbtree.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/rbtree.h 2018-08-11 21:48:56.000000000 +0000 @@ -17,9 +17,6 @@ #ifndef RBTREE_H #define RBTREE_H -#ifndef lint -static char YrbtreeId[] = "@(#) rbtree.h version 1.20 5/22/92" ; -#endif #include diff -Nru graywolf-0.1.5/include/yalecad/relpos.h graywolf-0.1.6/include/yalecad/relpos.h --- graywolf-0.1.5/include/yalecad/relpos.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/relpos.h 2018-08-11 21:48:56.000000000 +0000 @@ -11,9 +11,6 @@ the truncated center regardless of orientation with the addtion of the REL_POST MACROs. ----------------------------------------------------------------- */ -/* ***************************************************************** - static char SccsId[] = "@(#) relpos.h version 1.5 3/16/92" ; -***************************************************************** */ /* ----------------------------------------------------------------- The following is a macro which calculates the global pin position diff -Nru graywolf-0.1.5/include/yalecad/set.h graywolf-0.1.6/include/yalecad/set.h --- graywolf-0.1.5/include/yalecad/set.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/set.h 2018-08-11 21:48:56.000000000 +0000 @@ -28,9 +28,6 @@ #ifndef SET_H #define SET_H -#ifndef lint -static char YsetId[] = "@(#) set.h (Yale) version 1.7 2/15/91" ; -#endif #include @@ -81,7 +78,7 @@ returns a pointer to the set data structure. */ -extern Yset_free( P1(YSETPTR set ) ) ; +extern void Yset_free( P1(YSETPTR set ) ) ; /* Arguments: YSETPTR set ; @@ -110,7 +107,7 @@ returns TRUE if this a new member of set FALSE if already a member. */ -extern Yset_delete( P2(YSETPTR set, INT node ) ) ; +extern void Yset_delete( P2(YSETPTR set, INT node ) ) ; /* Arguments: YSETPTR set ; @@ -120,7 +117,7 @@ */ -extern Yset_empty( P1(YSETPTR set ) ) ; +extern void Yset_empty( P1(YSETPTR set ) ) ; /* Arguments: YSETPTR set ; @@ -128,7 +125,7 @@ makes the set an empty set. */ -extern Yset_comp( P1(YSETPTR set ) ) ; +extern void Yset_comp( P1(YSETPTR set ) ) ; /* Arguments: YSETPTR set ; diff -Nru graywolf-0.1.5/include/yalecad/stack.h graywolf-0.1.6/include/yalecad/stack.h --- graywolf-0.1.5/include/yalecad/stack.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/stack.h 2018-08-11 21:48:56.000000000 +0000 @@ -5,9 +5,6 @@ DATE: Dec 6, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char StackSccsId[] = "@(#) stack.h version 1.3 10/9/90" ; -#endif #ifndef STACK_H diff -Nru graywolf-0.1.5/include/yalecad/string.h graywolf-0.1.6/include/yalecad/string.h --- graywolf-0.1.5/include/yalecad/string.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/string.h 2018-08-11 21:48:56.000000000 +0000 @@ -9,6 +9,7 @@ #define YSTRING_H #include +#include extern char *Ystrclone( P1(char *str) ) ; /* diff -Nru graywolf-0.1.5/include/yalecad/system.h graywolf-0.1.6/include/yalecad/system.h --- graywolf-0.1.5/include/yalecad/system.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/system.h 2018-08-11 21:48:56.000000000 +0000 @@ -7,9 +7,6 @@ #ifndef YSYSTEM_H #define YSYSTEM_H -#ifndef lint -static char Ysystem_HId[] = "@(#) system.h version 1.1 3/5/92" ; -#endif /* Ysystem - diff -Nru graywolf-0.1.5/include/yalecad/tech.h graywolf-0.1.6/include/yalecad/tech.h --- graywolf-0.1.5/include/yalecad/tech.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/tech.h 2018-08-11 21:48:56.000000000 +0000 @@ -7,9 +7,6 @@ #ifndef YTECH_H #define YTECH_H -#ifndef lint -static char YassignId[] = "@(#) tech.h (Yale) version 1.1 10/22/90" ; -#endif #include @@ -22,7 +19,7 @@ #define VIA2_3 "via2/3" -extern Ytech_init( P1(char *designName ) ) ; +extern void Ytech_init( P1(char *designName ) ) ; /* Function: Read a technology file for a given design. Must be called diff -Nru graywolf-0.1.5/include/yalecad/time.h graywolf-0.1.6/include/yalecad/time.h --- graywolf-0.1.5/include/yalecad/time.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/time.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,7 @@ +#ifndef INC_TIME_H +#define INC_TIME_H + +char *YcurTime( INT *time_in_sec ); + +#endif /* INC_TIME_H */ + diff -Nru graywolf-0.1.5/include/yalecad/timer.h graywolf-0.1.6/include/yalecad/timer.h --- graywolf-0.1.5/include/yalecad/timer.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/timer.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,8 @@ +#ifndef INC_TIMER_H +#define INC_TIMER_H + +void Ytimer_elapsed( INT *time_elapsed ); + +void Ytimer_start(); + +#endif /*INC_TIMER_H */ diff -Nru graywolf-0.1.5/include/yalecad/tree.h graywolf-0.1.6/include/yalecad/tree.h --- graywolf-0.1.5/include/yalecad/tree.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/tree.h 2018-08-11 21:48:56.000000000 +0000 @@ -8,9 +8,6 @@ #ifndef TREE_H #define TREE_H -#ifndef lint -static char treeId[] = "@(#) tree.h version 1.3 10/9/90" ; -#endif #ifndef RBTREE_H typedef struct tree { @@ -100,7 +97,7 @@ NULL if nothing is in the tree or if no match to the key is found. */ -extern Ytree_insert( P2(YTREEPTR tree, char *data ) ) ; +extern void Ytree_insert( P2(YTREEPTR tree, char *data ) ) ; /* Arguments: YTREEPTR tree ; diff -Nru graywolf-0.1.5/include/yalecad/wgraphics.h graywolf-0.1.6/include/yalecad/wgraphics.h --- graywolf-0.1.5/include/yalecad/wgraphics.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/wgraphics.h 2018-08-11 21:48:56.000000000 +0000 @@ -12,9 +12,6 @@ #ifndef WGRAPHICS_H #define WGRAPHICS_H -#ifndef lint -static char YwgraphicsId[] = "@(#) wgraphics.h (Yale) version 1.7 8/12/91" ; -#endif /******** FUNCTIONS NORMALLY USED BY GRAPHIC PROGRAM USERS *********/ #define TWinitGraphics( argc, argv, numC, colors,menuPath,refresh_func) \ diff -Nru graywolf-0.1.5/include/yalecad/yreadpar.h graywolf-0.1.6/include/yalecad/yreadpar.h --- graywolf-0.1.5/include/yalecad/yreadpar.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/include/yalecad/yreadpar.h 2018-08-11 21:48:56.000000000 +0000 @@ -13,9 +13,6 @@ #ifndef YREADPAR_H #define YREADPAR_H -#ifndef lint -static char YreadParId[] = "@(#) yreadpar.h version 1.4 4/18/91" ; -#endif #include #include diff -Nru graywolf-0.1.5/README.md graywolf-0.1.6/README.md --- graywolf-0.1.5/README.md 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/README.md 2018-08-11 21:48:56.000000000 +0000 @@ -14,11 +14,47 @@ ------------ graywolf is used for placement in VLSI design. It's mainly used together with -qflow. +qflow. (http://opencircuitdesign.com/qflow/) Install procedure ----------------- - -cmake . +``` +mkdir build +cd build +cmake .. make sudo make install +``` + +Test +---- + +After "make", you can run the test suite: (unfortunately, the test will not work on 32-bit architectures yet) + +``` +make test +``` + +To dump out log for failing tests: + +``` +CTEST_OUTPUT_ON_FAILURE=1 make test +``` + +To run completely verbose tests: + +``` +make test ARGS="-V" +``` + + +Contributions +------------- + +There are two main branches: *master* and *dev*. Since people expect *master* +to be stable in a "production environment", any ground-breaking +changes/refactoring must be merged into *dev*. Please do not open pull-request +towards *master* for these changes. + +Pull requests targeting specific bugfixes need to be merged into both *master* +and *dev*, so it is ok to open a pull request for either of them. diff -Nru graywolf-0.1.5/src/date/date.c graywolf-0.1.6/src/date/date.c --- graywolf-0.1.5/src/date/date.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/date/date.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,9 +46,6 @@ REVISIONS: May 4, 1990 - now use static so we can look at compile date in object code. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) date.c version 1.2 5/12/90" ; -#endif #include diff -Nru graywolf-0.1.5/src/date/getdate.c graywolf-0.1.6/src/date/getdate.c --- graywolf-0.1.5/src/date/getdate.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/date/getdate.c 2018-08-11 21:48:56.000000000 +0000 @@ -39,20 +39,17 @@ #include +#include +#include #define LRECL 256 #define EOS '\0' -#ifndef lint -static char SccsId[] = "@(#) getdate.c version 1.2 5/12/90" ; -#endif /* this small program creates a file called date.h */ /* which contains a define statement with the current time */ -main( argc , argv ) -int argc ; -char *argv ; +int main( int argc , char ** argv ) { FILE *fp ; @@ -82,13 +79,14 @@ /* get rid of newline character */ len = strlen( date ) ; date[len-1] = EOS ; - fprintf(fp,"#define DATE \"@\(#\) Yale compilation date:%s\"\n",date); + fprintf(fp,"#define DATE \"@(#) Yale compilation date:%s\"\n",date); fclose(fp) ; exit(0) ; } /* errors - give unknown date */ -fprintf(fp,"#define DATE \"@\(#\) Yale compilation date:unknown\"\n") ; +fprintf(fp,"#define DATE \"@(#) Yale compilation date:unknown\"\n") ; fclose(fp) ; +return 0; } /* end main */ diff -Nru graywolf-0.1.5/src/genrows/CMakeLists.txt graywolf-0.1.6/src/genrows/CMakeLists.txt --- graywolf-0.1.5/src/genrows/CMakeLists.txt 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/genrows/CMakeLists.txt 2018-08-11 21:48:56.000000000 +0000 @@ -2,8 +2,8 @@ add_executable(genrows draw.c genrows.c main.c merge.c readpar.c ${CMAKE_SOURCE_DIR}/src/date/date.c) -target_link_libraries(genrows ${CMAKE_BINARY_DIR}/src/Ylib/libycadgraywolf.so) -target_link_libraries(genrows X11) +target_link_libraries(genrows ycadgraywolf) +target_link_libraries(genrows ${X11_LIBRARIES}) target_link_libraries(genrows m) INCLUDE_DIRECTORIES(${CMAKE_SOURCE_DIR}/include ${CMAKE_BINARY_DIR}/include .) diff -Nru graywolf-0.1.5/src/genrows/draw.c graywolf-0.1.6/src/genrows/draw.c --- graywolf-0.1.5/src/genrows/draw.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/genrows/draw.c 2018-08-11 21:48:56.000000000 +0000 @@ -68,9 +68,6 @@ orientation and now follow control menu convention. Sat Sep 21 15:37:36 EDT 1991 - added memory capability. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) draw.c (Yale) version 3.22 5/14/92" ; -#endif #include #include @@ -87,6 +84,7 @@ #include #include #include +#include "genrows.h" #define FCOLOR TWYELLOW @@ -124,33 +122,37 @@ #include -static draw_tile(); -static draw_macro(); -static draw_fs(); -static last_chance(); -static no_move_message(); -static save_for_do(); -static update_macro(); -static graphics_dump(); +static void draw_tile(); +static void draw_macro(); +static void draw_fs(); +static void last_chance(); +static void no_move_message(); +static void save_for_do(); +static void update_macro(); +static void graphics_dump(); static INT pick_macro(); static TILE_BOX *pick_tile(); static ROW_BOX *pick_row(); static BOOL edit_tiles(); -static edit_macro(); -static update_vertices(); -static rotate_vertices(); -static find_nearest_corner(); -static highlight_corner(); -static outm(); +static void edit_macro(); +static void update_vertices(); +static void rotate_vertices(); +static void find_nearest_corner(); +static void highlight_corner(); +static void outm(); + +/* forward declarations */ +void edit_row(ROW_BOX* rowptr ); +void get_global_pos(INT macro, INT *l, INT *b, INT *r, INT *t ); -initgraphics( argc, argv, windowId ) +void initgraphics( argc, argv, windowId ) INT argc, windowId ; char *argv[] ; { char *host ; char *Ygetenv() ; - extern INT draw_the_data() ; + void draw_the_data() ; if( !(graphicsG) ){ @@ -165,7 +167,7 @@ if( windowId ){ /* init windows as a parasite */ if( !( TWinitParasite(argc,argv,TWnumcolors(), - TWstdcolors(),FALSE,MENU, draw_the_data, windowId ))){ + TWstdcolors(),FALSE,MENU, (INT (*)()) draw_the_data, windowId ))){ M(ERRMSG,"initgraphics","Aborting graphics."); graphicsG = FALSE ; return ; @@ -173,7 +175,7 @@ } else { /* init window as a master */ if(!(TWinitGraphics(argc,argv,TWnumcolors(),TWstdcolors(), - FALSE,MENU, draw_the_data ))){ + FALSE,MENU, (INT (*)()) draw_the_data ))){ M(ERRMSG,"initgraphics","Aborting graphics."); graphicsG = FALSE ; return ; @@ -188,7 +190,7 @@ /* how to draw the data */ -INT +void draw_the_data() { INT i ; /* counter */ @@ -349,7 +351,7 @@ } /* end draw_the_data */ /* ***************************************************************** */ -static draw_tile( tileptr ) +static void draw_tile( tileptr ) TILE_BOX *tileptr ; /* current tile */ { INT color ; /* current color */ @@ -375,7 +377,7 @@ color, labelptr ) ; } /* end draw_tile */ -static draw_macro( macro, color ) +static void draw_macro( macro, color ) INT macro ; INT color ; { @@ -409,7 +411,7 @@ } } /* end draw_macro */ -static draw_fs( mptr ) +static void draw_fs( mptr ) MACROPTR mptr ; /* current macro */ { INT i ; /* counter */ @@ -471,7 +473,7 @@ } /* end draw_fs */ /* set the size of the graphics window */ -setGraphicWindow() +void setGraphicWindow() { INT l, b, r, t ; INT expand ; @@ -1213,7 +1215,7 @@ } /* end process_graphics */ -static last_chance() +static void last_chance() { INT i ; /* counter */ @@ -1230,12 +1232,12 @@ } } /* end last_chance */ -static no_move_message() +static void no_move_message() { TWmessage("Macro moves/core changes not allowed in partitioning"); } -static save_for_do( save ) +static void save_for_do( save ) INT save ; { char filename[LRECL] ; @@ -1251,7 +1253,7 @@ TWCLOSE( fp ) ; } /* end undo */ -static update_macro() +static void update_macro() { char filename[LRECL] ; FILE *fp ; @@ -1276,7 +1278,7 @@ } /* update_macro */ /* dumps the data to a file for future study */ -static graphics_dump() +static void graphics_dump() { /* now change mode to dump to file */ TWsetMode(1) ; @@ -1502,7 +1504,7 @@ return( maxrows ) ; } /* end get_maxrows */ -static INT update_tile_data( answer, field ) +static void update_tile_data_wrap( answer, field ) TWDRETURNPTR answer ; /* return from user */ INT field ; { @@ -1584,6 +1586,12 @@ } /* end switch */ } +static INT update_tile_data(TWDRETURNPTR answer, INT field ) +{ + update_tile_data_wrap( answer, field ); + return 0; // return value is ignored +} + static BOOL edit_tiles( tile ) TILE_BOX *tile ; { @@ -1711,7 +1719,7 @@ /* means the user change the field */ temp = get_row_height( answer ) ; if( temp <= 0 ){ - return ; + return FALSE; } tile->actual_row_height = temp ; } @@ -1721,7 +1729,7 @@ if( rows < 0 ){ outm( ERRMSG, "edit_tile", "Invalid number of rows. Must be non-negative" ) ; - return ; + return FALSE; } /* now calculate the channel separation for this tile */ height = tile->ury - tile->lly ; @@ -1742,7 +1750,7 @@ if( rows < 0 ){ outm( ERRMSG, "edit_tile", "Invalid number of rows. Must be non-negative" ) ; - return ; + return FALSE; } /* now calculate the channel separation for this tile */ height = tile->ury - tile->lly ; @@ -1763,7 +1771,7 @@ if( temp <= 0 ){ outm( ERRMSG, "edit_tile", "Invalid minimum length. Must be greater than zero" ) ; - return ; + return FALSE; } tile->min_length = temp ; } @@ -1773,12 +1781,12 @@ if( temp < tile->llx ){ outm( ERRMSG, "edit_tile", "Invalid end of row. Must be greater than tile left" ); - return ; + return FALSE; } if( temp > tile->urx ){ outm( ERRMSG, "edit_tile", "Invalid end of row. Must be less than tile right" ) ; - return ; + return FALSE; } tile->max_length = temp - tile->llx - tile->row_start ; } @@ -1788,12 +1796,12 @@ if( temp < tile->llx ){ outm( ERRMSG, "edit_tile", "Invalid start of row. Must be greater than tile left") ; - return ; + return FALSE; } if( temp > tile->urx ){ outm( ERRMSG, "edit_tile", "Invalid start of row. Row must start before end of tile" ) ; - return ; + return FALSE; } tile->row_start = temp - tile->llx ; /* now modify the width of the tile accordingly */ @@ -1815,7 +1823,7 @@ if( temp <= 0 ){ outm( ERRMSG, "edit_tile", "ERROR:Invalid class. Must be greater than zero" ) ; - return ; + return FALSE; } tile->class = temp ; } @@ -1826,7 +1834,7 @@ } /* end edit_tiles */ -edit_row( rowptr ) +void edit_row( rowptr ) ROW_BOX *rowptr ; { @@ -1948,7 +1956,7 @@ } /* end switch */ if( deltax == 0 && deltay == 0 ){ - return ; /* no work to do */ + return 0; /* no work to do */ } /* else update the cooridates positions */ if( deltax != 0 ){ @@ -1967,7 +1975,7 @@ } } /* end update_macro_data */ -static edit_macro( macro, xoff, yoff ) +static void edit_macro(int macro,int xoff, int yoff ) { TWDRETURNPTR answer ; /* return from user */ MACROPTR mptr ; /* current macro information */ @@ -2033,9 +2041,7 @@ } /* end edit_macro */ -get_global_pos( macro, l, b, r, t ) -INT macro ; -INT *l, *r, *b, *t ; +void get_global_pos(INT macro, INT *l, INT *b, INT *r, INT *t ) { MACROPTR mptr ; @@ -2047,7 +2053,7 @@ *t = mptr->top + mptr->ycenter ; } /* end get_global_pos */ -static update_vertices( macro, newxcenter, newycenter ) +static void update_vertices( macro, newxcenter, newycenter ) INT macro, newxcenter, newycenter ; { INT j ; @@ -2068,7 +2074,7 @@ mptr->ycenter = newycenter ; } /* end update_vertices */ -static rotate_vertices( mptr, orient ) +static void rotate_vertices( mptr, orient ) MACROPTR mptr ; INT orient ; { @@ -2172,7 +2178,7 @@ } /* end rotate_vertices */ -static find_nearest_corner( macro, x, y, x_ret, y_ret ) +static void find_nearest_corner( macro, x, y, x_ret, y_ret ) INT macro, x, y, *x_ret, *y_ret ; { INT j ; @@ -2207,7 +2213,7 @@ } /* end find_nearest_corner */ -static highlight_corner( macro, x, y ) +static void highlight_corner( macro, x, y ) INT macro, x, y ; { INT l, b, r, t ; /* the core */ @@ -2225,7 +2231,7 @@ } /* end highlight_corner */ -static outm( errtype, routine, string ) +static void outm( errtype, routine, string ) INT errtype ; char *routine ; char *string ; diff -Nru graywolf-0.1.5/src/genrows/genrows.c graywolf-0.1.6/src/genrows/genrows.c --- graywolf-0.1.5/src/genrows/genrows.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/genrows/genrows.c 2018-08-11 21:48:56.000000000 +0000 @@ -80,9 +80,6 @@ Tue Sep 24 00:47:00 EDT 1991 - output core into .gen file. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) genrows.c (Yale) version 3.24 5/14/92" ; -#endif #include #include @@ -92,6 +89,7 @@ #include #include #include +#include "genrows.h" #define NOTOUCH 0 #define OVERLAP1 1 @@ -117,8 +115,15 @@ static INT feed_lengthS = 0 ; /* length of feeds */ static YTREEPTR tile_memoryG ; -static reset_tile_parameters(); +static void reset_tile_parameters(); static INT compare_tiles(); +void grid_rows(); +void set_spacing(); +void init_vertex_list(INT left, INT bottom, INT right, INT top ); +void free_structures( BOOL allpts ); +void update_tile_memory( BOOL free_flag ); +void find_core(); +void check_overlap(); #if SIZEOF_VOID_P == 64 #define INTSCANSTR "%ld" @@ -126,7 +131,7 @@ #define INTSCANSTR "%d" #endif -init_data_structures() +void init_data_structures() { /*static INT compare_tiles() ;*/ @@ -143,13 +148,13 @@ tile_memoryG = Yrbtree_init( compare_tiles ) ; } /* end init_data_structures */ -set_feed_length( percent ) +void set_feed_length( percent ) DOUBLE percent ; { feed_lengthS = (INT) ( percent / 100.0 * (DOUBLE) stdcell_lengthS ) ; } /* end set_feed_length */ -process_tiles() +void process_tiles() { TILE_BOX *tptr ; INT llx , lly , urx , ury ; @@ -216,7 +221,7 @@ } /* end process_tiles */ -check_tiles() +void check_tiles() { TILE_BOX *tile1 , *tile2 ; @@ -238,7 +243,7 @@ -print_blk_file() +void print_blk_file() { /* output the rows; check for multiple row segments - if there @@ -421,7 +426,7 @@ return ; } /* end print_blk_file */ -print_tiles() +void print_tiles() { INT i ; @@ -438,7 +443,7 @@ return ; } /* end print_tiles */ -print_vertices() +void print_vertices() { /* for debug only */ @@ -811,7 +816,7 @@ } /* llx, lly, urx, ury, force, class mirror */ fscanf(fp, INTSCANSTR " " INTSCANSTR " " INTSCANSTR " " INTSCANSTR - " " INTSCANSTR " " INTSCANSTR " " INTSCANSTR, + " %d " INTSCANSTR " %d", &(tptr->llx), &(tptr->lly), &(tptr->urx), &(tptr->ury), &(tptr->force), &(tptr->class), &(tptr->mirror) ) ; @@ -820,7 +825,7 @@ &(tptr->numrows), &(tptr->actual_row_height), &(tptr->add_no_more_than), &(tptr->channel_separation) ) ; /* min_length, row_start, max_length, illegal */ - fscanf(fp, INTSCANSTR " " INTSCANSTR " " INTSCANSTR " " INTSCANSTR, + fscanf(fp, INTSCANSTR " " INTSCANSTR " " INTSCANSTR " %d", &(tptr->min_length), &(tptr->row_start), &(tptr->max_length), &(tptr->illegal) ) ; } /* end tile loop */ @@ -828,7 +833,7 @@ return( TRUE ) ; } -save_state(fp) +void save_state(fp) FILE *fp ; { INT i ; @@ -885,7 +890,7 @@ } /* end save_state */ -process_vertices() +void process_vertices() { VERTEXPTR check_vertex , vertex ; @@ -1035,7 +1040,7 @@ return ; } /* end process_vertices */ -build_macros() +void build_macros() { INT i ; INT j ; @@ -1087,7 +1092,7 @@ } /* end build_macros */ -makerows() +void makerows() { TILE_BOX *tileptr, *get_starting_tile() ; @@ -1387,7 +1392,7 @@ return( totalw ) ; } /* end convert_tile_to_rows */ -divide_tile( tile , horiz_line ) +void divide_tile( tile , horiz_line ) TILE_BOX *tile ; INT horiz_line ; { @@ -1429,7 +1434,7 @@ } /* end divide_tile */ -divide_tilelr( tile , vert_line ) +void divide_tilelr( tile , vert_line ) TILE_BOX *tile ; INT vert_line ; { @@ -1472,7 +1477,7 @@ } /* end divide_tilelr */ -get_core( left, bottom, right, top, tileFlag ) +void get_core( left, bottom, right, top, tileFlag ) INT *left, *bottom, *right, *top ; BOOL tileFlag ; /* if true include the tiles in core */ { @@ -1509,7 +1514,7 @@ return( set_of_rowsS ) ; } /* end get_rowptr */ -grid_rows() +void grid_rows() { ROW_BOX *rowptr , *segment ; INT oldX, oldY ; @@ -1530,7 +1535,7 @@ } } /* end grid_rows */ -set_minimum_length( length ) +void set_minimum_length( length ) INT length ; { TILE_BOX *tileptr ; /* current tile */ @@ -1541,7 +1546,7 @@ } } /* end set_minimum_length */ -set_row_separation( channel_sep_relative, channel_sep_absolute ) +void set_row_separation( channel_sep_relative, channel_sep_absolute ) DOUBLE channel_sep_relative; INT channel_sep_absolute; { @@ -1555,7 +1560,7 @@ } } /* end set_row_separation */ -set_spacing() +void set_spacing() { TILE_BOX *tileptr ; /* current tile */ @@ -1585,7 +1590,7 @@ return( FALSE ) ; } /* end force_tiles */ -check_user_data() +void check_user_data() { if( min_lengthS < spacingG ){ M( ERRMSG, "check_user_errors", @@ -1594,7 +1599,7 @@ } } /* end check_user_errors */ -remakerows() +void remakerows() { ROW_BOX *freerow, *freeseg ; /* used to free data */ ROW_BOX *segptr ; /* traverse segments freeing them */ @@ -1624,8 +1629,7 @@ } /* end remakerows */ -init_vertex_list( left, bottom, right, top ) -INT left, bottom, right, top ; +void init_vertex_list(INT left, INT bottom, INT right, INT top ) { /* start the vertex list */ @@ -1662,8 +1666,7 @@ Ysafe_free( tile ) ; } /* end free_tile */ -free_structures( allpts ) -BOOL allpts ; +void free_structures( BOOL allpts ) { TILE_BOX *last_tile ; @@ -1684,8 +1687,7 @@ } } -update_tile_memory( free_flag ) -BOOL free_flag ; +void update_tile_memory( BOOL free_flag ) { TILE_BOX *tile ; @@ -1701,7 +1703,7 @@ } } /* end update_tile_memory */ -recalculate( freepts ) +void recalculate( freepts ) BOOL freepts ; { BOOL previous_invalid_state ; @@ -1725,7 +1727,7 @@ } } /* end recalculate */ -find_core() +void find_core() { INT macro ; INT left, rite, bot, top ; @@ -1791,7 +1793,7 @@ return( TRUE ) ; } /* end snap_core */ -set_core( left, right, bottom, top ) +void set_core( left, right, bottom, top ) INT left, right, bottom, top ; { cx1S = left ; @@ -1800,7 +1802,7 @@ cy2S = top ; } /* end set_core */ -check_overlap() +void check_overlap() { INT macro ; INT match ; @@ -1932,7 +1934,7 @@ } /* end count_rows */ #endif /* NEEDED */ -calculate_numrows() +void calculate_numrows() { INT l, r, b, t ; /* dimensions of new core */ @@ -1985,7 +1987,7 @@ } /* end compare_tiles */ -static reset_tile_parameters() +static void reset_tile_parameters() { TILE_BOX lo ; /* low sentinel */ diff -Nru graywolf-0.1.5/src/genrows/genrows.h graywolf-0.1.6/src/genrows/genrows.h --- graywolf-0.1.5/src/genrows/genrows.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/src/genrows/genrows.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,9 @@ +#ifndef __GENROWS_GENROWS_H__ +#define __GENROWS_GENROWS_H__ + +void calculate_numrows(void); +void recalculate(BOOL freepts); +void remakerows(void); +void set_core(INT left, INT right, INT bottom, INT top ); + +#endif // __GENROWS_GENROWS_H__ diff -Nru graywolf-0.1.5/src/genrows/globals.h graywolf-0.1.6/src/genrows/globals.h --- graywolf-0.1.5/src/genrows/globals.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/genrows/globals.h 2018-08-11 21:48:56.000000000 +0000 @@ -55,9 +55,6 @@ #ifndef GLOBALS_H #define GLOBALS_H -#ifndef lint -static char SccsglobalsId[] = "@(#) globals.h (Yale) version 3.11 5/14/92" ; -#endif #ifndef GLOBAL_DEFS #define EXTERN extern diff -Nru graywolf-0.1.5/src/genrows/main.c graywolf-0.1.6/src/genrows/main.c --- graywolf-0.1.5/src/genrows/main.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/genrows/main.c 2018-08-11 21:48:56.000000000 +0000 @@ -56,9 +56,6 @@ for debugging X. Sat Sep 21 15:48:12 EDT 1991 - added memory functionality. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) main.c (Yale) version 3.10 9/21/91" ; -#endif #define GLOBAL_DEFS #define EXPECTEDMEMORY ( 512 * 1024 ) @@ -71,236 +68,238 @@ #include #include #include +#include "readpar.h" /* NOTE ****** macros cannot overlap !!! ****** */ /* NOTE: time efficiencies have been completely ignored during - the development of these algorithms. At this point, - I am only interested in EFFECTIVE and ROBUST - functionality. ---Carl Sechen */ + the development of these algorithms. At this point, + I am only interested in EFFECTIVE and ROBUST + functionality. ---Carl Sechen */ +/* Forward declarations */ +void syntax(void); -main( argc, argv ) -int argc ; -char *argv[] ; +int main(int argc, char **argv) { - FILE *fp ; - int yaleIntro() ; - char filename[LRECL] ; /* used for input filename */ - char *ptr ; /* used to parse command line */ - int windowId ; /* window id */ - BOOL parasite ; /* true if window inheritance is on */ - BOOL debug ; /* true if debug is requested */ - BOOL force_tiles() ; /* returns true if last tile is forced */ + FILE *fp ; + void yaleIntro() ; + char filename[LRECL] ; /* used for input filename */ + char *ptr ; /* used to parse command line */ + int windowId ; /* window id */ + BOOL parasite ; /* true if window inheritance is on */ + BOOL debug ; /* true if debug is requested */ + BOOL force_tiles() ; /* returns true if last tile is forced */ - /* ********************** start initialization *********************** */ + /* ********************** start initialization *********************** */ #ifdef DEBUGX - extern int _Xdebug ; - _Xdebug = TRUE ; + extern int _Xdebug ; + _Xdebug = TRUE ; #endif - /* start up cleanup handler */ - YINITCLEANUP( "config", NULL, MAYBEDUMP ) ; + /* start up cleanup handler */ + YINITCLEANUP( "config", NULL, MAYBEDUMP ) ; - Yinit_memsize( EXPECTEDMEMORY ) ; + Yinit_memsize( EXPECTEDMEMORY ) ; - if( argc < 2 || argc > 4 ){ - syntax() ; - } else { - debug = FALSE ; - parasite = FALSE ; - windowId = 0 ; - noMacroMoveG = FALSE ; + if( argc < 2 || argc > 4 ){ + syntax() ; + } else { + debug = FALSE ; + parasite = FALSE ; + windowId = 0 ; + noMacroMoveG = FALSE ; #ifndef NOGRAPHICS - graphicsG = TRUE ; + graphicsG = TRUE ; #else - graphicsG = FALSE ; + graphicsG = FALSE ; #endif - if( *argv[1] == '-' ){ - for( ptr = ++argv[1]; *ptr; ptr++ ){ - switch( *ptr ){ - case 'd': - debug = TRUE ; - YsetDebug( TRUE ) ; - break ; - case 'f': - noMacroMoveG = TRUE ; - break ; - case 'n': - graphicsG = FALSE ; - break ; - case 'w': - parasite = TRUE ; - break ; - default: - sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; - M(ERRMSG,"main",YmsgG); - syntax() ; - } - } - YdebugMemory( debug ) ; - - /* handle I/O requests */ - cktNameG = Ystrclone( argv[2] ); - - YinitProgram( "config", VERSION, yaleIntro ); - - /* now tell the user what he picked */ - M(MSG,NULL,"\n\nconfig switches:\n" ) ; - if( debug ){ - YsetDebug( TRUE ) ; - M(MSG,NULL,"\tdebug on\n" ) ; - } - if( graphicsG ){ - M(MSG,NULL,"\tGraphics mode on\n" ) ; - } else { - M(MSG,NULL,"\tGraphics mode off\n" ) ; - } - if( parasite ){ - M(MSG,NULL,"\tconfig will inherit window\n" ) ; - /* look for windowid */ - if( argc != 4 ){ - M(ERRMSG,"main","Need to specify windowID\n" ) ; - syntax() ; - } else { - windowId = atoi( argv[3] ) ; - } - } - if( noMacroMoveG ){ - M(MSG,NULL,"\tconfig will not alloc macro moves\n" ) ; - } - M(MSG,NULL,"\n" ) ; - } else if( argc == 2 ){ - /* order is important here */ - YdebugMemory( FALSE ) ; - cktNameG = Ystrclone( argv[1] ); - - YinitProgram( "config", VERSION, yaleIntro ); - - } else { - syntax() ; - } - } - init_data_structures() ; - G( initgraphics( argc, argv, windowId ) ) ; - /* ********************** end initialization ************************* */ - - sprintf( filename, "%s.mver", cktNameG ) ; - fp = TWOPEN( filename, "r", ABORT ) ; - - /* actual_row_heightS is the default used for rows placed across the - top of the core--these are NOT generated from a tile */ - read_vertices(fp,TRUE) ; - TWCLOSE(fp); - - /* now safe to read parameter file */ - readpar() ; - - build_macros() ; - - process_vertices() ; - D( "genrows/main", print_vertices() ) ; - - process_tiles() ; - - D( "genrows/main", print_tiles() ) ; - - merge_tiles() ; - - D( "genrows/main", print_tiles() ) ; - - check_tiles() ; - - /* *************************************************************** */ - /* THE USER SHOULD BE ABLE TO DO: - (1) Be able to divide a tile into two parts, separated by a - horizontal line -- when the rows above should have a - higher height, for example. - To divide a tile, simply call the function: - divide_tile( tile , horiz_line ) - TILE_BOX *tile ; - int horiz_line ; - - (2) Be able to expand a tile in any direction. - (3) Be able to edit the actual_row_height. - (4) Be able to edit the channel_separation. - *BUT,THE check_tiles MUST BE CONDUCTED IF THE USER - CHANGES ANYTHING IN (3) OR (4) - (5) Be able to edit the min_length - - /* *************************************************************** */ - /* make the rows once to see where the tiles are */ - /* force the last tile with rows to line up */ - remakerows() ; + if( *argv[1] == '-' ){ + for( ptr = ++argv[1]; *ptr; ptr++ ){ + switch( *ptr ){ + case 'd': + debug = TRUE ; + YsetDebug( TRUE ) ; + break ; + case 'f': + noMacroMoveG = TRUE ; + break ; + case 'n': + graphicsG = FALSE ; + break ; + case 'w': + parasite = TRUE ; + break ; + default: + sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; + M(ERRMSG,"main",YmsgG); + syntax() ; + } + } + YdebugMemory( debug ) ; + + /* handle I/O requests */ + cktNameG = Ystrclone( argv[2] ); + + YinitProgram( "config", VERSION, yaleIntro ); + + /* now tell the user what he picked */ + M(MSG,NULL,"\n\nconfig switches:\n" ) ; + if( debug ){ + YsetDebug( TRUE ) ; + M(MSG,NULL,"\tdebug on\n" ) ; + } + if( graphicsG ){ + M(MSG,NULL,"\tGraphics mode on\n" ) ; + } else { + M(MSG,NULL,"\tGraphics mode off\n" ) ; + } + if( parasite ){ + M(MSG,NULL,"\tconfig will inherit window\n" ) ; + /* look for windowid */ + if( argc != 4 ){ + M(ERRMSG,"main","Need to specify windowID\n" ) ; + syntax() ; + } else { + windowId = atoi( argv[3] ) ; + } + } + if( noMacroMoveG ){ + M(MSG,NULL,"\tconfig will not alloc macro moves\n" ) ; + } + M(MSG,NULL,"\n" ) ; + } else if( argc == 2 ){ + /* order is important here */ + YdebugMemory( FALSE ) ; + cktNameG = Ystrclone( argv[1] ); - if( num_rowsG && num_macrosG == 0 ){ - memoryG = FALSE ; - calculate_numrows() ; - memoryG = TRUE ; - } + YinitProgram( "config", VERSION, yaleIntro ); - if( force_tiles() ){ - remakerows() ; + } else { + syntax() ; } + } + init_data_structures() ; + G( initgraphics( argc, argv, windowId ) ) ; + /* ********************** end initialization ************************* */ - if( graphicsG ){ + sprintf( filename, "%s.mver", cktNameG ) ; + fp = TWOPEN( filename, "r", ABORT ) ; - G( process_graphics() ) ; - - } /* end graphics switch */ + /* actual_row_heightS is the default used for rows placed across the + top of the core--these are NOT generated from a tile */ + read_vertices(fp,TRUE) ; + TWCLOSE(fp); - if( graphicsG ){ - G( TWcloseGraphics() ) ; - } - print_blk_file() ; + /* now safe to read parameter file */ + readpar() ; - /* now save a restart file */ - sprintf( filename, "%s.gsav", cktNameG ) ; - fp = TWOPEN( filename, "w", ABORT ) ; - save_state(fp) ; - TWCLOSE( fp ) ; - - /* now blow away do and undo files if they exist */ - sprintf( filename, "%s.undo", cktNameG ) ; - if( YfileExists( filename) ){ - Yrm_files( filename ) ; - } - sprintf( filename, "%s.redo", cktNameG ) ; - if( YfileExists( filename) ){ - Yrm_files( filename ) ; - } + build_macros() ; + + process_vertices() ; + D( "genrows/main", print_vertices() ) ; + + process_tiles() ; + + D( "genrows/main", print_tiles() ) ; + + merge_tiles() ; + + D( "genrows/main", print_tiles() ) ; + + check_tiles() ; + + /* *************************************************************** */ + /* THE USER SHOULD BE ABLE TO DO: + (1) Be able to divide a tile into two parts, separated by a + horizontal line -- when the rows above should have a + higher height, for example. + To divide a tile, simply call the function: + divide_tile( tile , horiz_line ) + TILE_BOX *tile ; + int horiz_line ; + + (2) Be able to expand a tile in any direction. + (3) Be able to edit the actual_row_height. + (4) Be able to edit the channel_separation. + *BUT,THE check_tiles MUST BE CONDUCTED IF THE USER + CHANGES ANYTHING IN (3) OR (4) + (5) Be able to edit the min_length + + /* *************************************************************** */ + /* make the rows once to see where the tiles are */ + /* force the last tile with rows to line up */ + remakerows() ; + + if( num_rowsG && num_macrosG == 0 ){ + memoryG = FALSE ; + calculate_numrows() ; + memoryG = TRUE ; + } + + if( force_tiles() ){ + remakerows() ; + } + + if( graphicsG ){ + + G( process_graphics() ) ; + + } /* end graphics switch */ + + if( graphicsG ){ + G( TWcloseGraphics() ) ; + } + print_blk_file() ; + + /* now save a restart file */ + sprintf( filename, "%s.gsav", cktNameG ) ; + fp = TWOPEN( filename, "w", ABORT ) ; + save_state(fp) ; + TWCLOSE( fp ) ; + + /* now blow away do and undo files if they exist */ + sprintf( filename, "%s.undo", cktNameG ) ; + if( YfileExists( filename) ){ + Yrm_files( filename ) ; + } + sprintf( filename, "%s.redo", cktNameG ) ; + if( YfileExists( filename) ){ + Yrm_files( filename ) ; + } - YexitPgm( PGMOK ) ; + YexitPgm( PGMOK ) ; + return 0; } /* end main */ -yaleIntro() +void yaleIntro() { - fprintf(stdout,"\n%s\n",YmsgG) ; - fprintf(stdout,"Row configuration program\n"); - fprintf(stdout," Yale University\n"); + fprintf(stdout,"\n%s\n",YmsgG) ; + fprintf(stdout,"Row configuration program\n"); + fprintf(stdout," Yale University\n"); } /* end yaleIntro */ /* give user correct syntax */ -syntax() +void syntax() { - M(ERRMSG,NULL,"\n" ) ; - M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); - sprintf( YmsgG, - "\nconfig [-dnw] designName [windowId] \n" ) ; - M(MSG,NULL,YmsgG ) ; - M(MSG,NULL,"\twhose options are zero or more of the following:\n"); - M(MSG,NULL,"\t\td - prints debug info and performs extensive\n"); - M(MSG,NULL,"\t\t error checking\n"); - M(MSG,NULL,"\t\tn - no graphics - the default is to open the\n"); - M(MSG,NULL,"\t\t display and output graphics to an Xwindow\n"); - M(MSG,NULL,"\t\tw - parasite mode - user must specify windowId\n"); - YexitPgm(PGMFAIL); + M(ERRMSG,NULL,"\n" ) ; + M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); + sprintf( YmsgG, + "\nconfig [-dnw] designName [windowId] \n" ) ; + M(MSG,NULL,YmsgG ) ; + M(MSG,NULL,"\twhose options are zero or more of the following:\n"); + M(MSG,NULL,"\t\td - prints debug info and performs extensive\n"); + M(MSG,NULL,"\t\t error checking\n"); + M(MSG,NULL,"\t\tn - no graphics - the default is to open the\n"); + M(MSG,NULL,"\t\t display and output graphics to an Xwindow\n"); + M(MSG,NULL,"\t\tw - parasite mode - user must specify windowId\n"); + YexitPgm(PGMFAIL); } /* end syntax */ diff -Nru graywolf-0.1.5/src/genrows/merge.c graywolf-0.1.6/src/genrows/merge.c --- graywolf-0.1.5/src/genrows/merge.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/genrows/merge.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,9 +46,6 @@ REVISIONS: Fri Jan 25 17:50:54 PST 1991 - added mirror row feature. Sat Sep 21 15:41:10 EDT 1991 - updated for memory. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) merge.c (Yale) version 3.5 5/14/92" ; -#endif #include #include @@ -57,12 +54,14 @@ -static check_max_length(); -static merge_adjacent_tiles(); +static void check_max_length(); +static void merge_adjacent_tiles(); +void merge_downward( TILE_BOX *begin_tile ); +void merge_upward( TILE_BOX *begin_tile ); -merge_tiles() +void merge_tiles() { TILE_BOX *tileptr ; /* current tile */ @@ -73,8 +72,7 @@ } } /* end merge_tiles */ -merge_upward( begin_tile ) -TILE_BOX *begin_tile ; +void merge_upward( TILE_BOX *begin_tile ) { INT left ; /* left edge of merge tile */ INT right ; /* right edge of merge tile */ @@ -224,8 +222,7 @@ } /* end merge_upward */ -merge_downward( begin_tile ) -TILE_BOX *begin_tile ; +void merge_downward( TILE_BOX *begin_tile ) { INT left ; /* left edge of merge tile */ INT right ; /* right edge of merge tile */ @@ -377,7 +374,7 @@ } /* end merge_downward */ -merge_right( begin_tile ) +void merge_right( begin_tile ) TILE_BOX *begin_tile ; { INT bottom ; /* bottom edge of merge tile */ @@ -524,7 +521,7 @@ } /* end merge_right */ -merge_left( begin_tile ) +void merge_left( begin_tile ) TILE_BOX *begin_tile ; { INT bottom ; /* bottom edge of merge tile */ @@ -668,7 +665,7 @@ } /* end merge_left */ -static check_max_length( tileptr ) +static void check_max_length( tileptr ) TILE_BOX *tileptr ; { INT length ; /* length of tile */ @@ -678,7 +675,7 @@ }/* end check_max_length */ -renumber_tiles() +void renumber_tiles() { INT count ; /* count the tiles */ TILE_BOX *tileptr ; /* current tile */ @@ -688,7 +685,7 @@ } } /* end renumber_tiles() */ -static merge_adjacent_tiles() +static void merge_adjacent_tiles() { TILE_BOX *tileptr1 , *tileptr2 , *tileptr ; @@ -732,7 +729,7 @@ return ; }/* end merge_adjacent_tiles */ -dtiles() +void dtiles() { TILE_BOX *tptr ; /* current tile */ diff -Nru graywolf-0.1.5/src/genrows/readpar.c graywolf-0.1.6/src/genrows/readpar.c --- graywolf-0.1.5/src/genrows/readpar.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/genrows/readpar.c 2018-08-11 21:48:56.000000000 +0000 @@ -51,9 +51,6 @@ Fri Sep 6 15:13:23 CDT 1991 - now read previous row separation. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) readpar.c (Yale) version 1.9 5/14/92" ; -#endif #include #include @@ -61,18 +58,19 @@ #include #include #include +#include "readpar.h" #define COMMENT '#' static BOOL abortS = FALSE ; -static err_msg(); -static get_defaults(); +static void err_msg(); +static void get_defaults(); static int getnumRows(); -readpar() +void readpar() { INT line ; @@ -229,7 +227,7 @@ } /* end readpar */ -static err_msg( keyword ) +static void err_msg( keyword ) char *keyword ; { sprintf( YmsgG, "The value for %s was", keyword ); @@ -239,7 +237,7 @@ abortS = TRUE ; }/* end err_msg */ -static get_defaults( feed_percent_default, row_sep_default ) +static void get_defaults( feed_percent_default, row_sep_default ) BOOL feed_percent_default, row_sep_default ; { FILE *fp ; diff -Nru graywolf-0.1.5/src/genrows/readpar.h graywolf-0.1.6/src/genrows/readpar.h --- graywolf-0.1.5/src/genrows/readpar.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/src/genrows/readpar.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,6 @@ +#ifndef __GENROWS_READPAR_H__ +#define __GENROWS_READPAR_H__ + +void readpar(void); + +#endif // __GENROWS_READPAR_H__ diff -Nru graywolf-0.1.5/src/mc_compact/cdraw.c graywolf-0.1.6/src/mc_compact/cdraw.c --- graywolf-0.1.5/src/mc_compact/cdraw.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/cdraw.c 2018-08-11 21:48:56.000000000 +0000 @@ -52,9 +52,6 @@ Fri Mar 29 14:13:22 EST 1991 - temp fix for 2D graphics avoids arbitrary edge explosion. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) cdraw.c version 7.5 3/29/91" ; -#endif #ifndef NOGRAPHICS @@ -92,13 +89,15 @@ static BOOL drawChanGraphS = TRUE ; static INT zspanS ; -init_graphics( argc, argv, windowId ) +void draw_changraph(); + +void init_graphics( argc, argv, windowId ) INT argc, windowId ; char *argv[] ; { char *host, *Ygetenv() ; int xpandx, xpandy ; - INT draw_the_data() ; + void draw_the_data() ; /* we need to find host for display */ if(!(host = Ygetenv("DISPLAY"))) { @@ -110,14 +109,14 @@ if( windowId ){ /* init windows as a parasite */ if( !( TWinitParasite(argc,argv,TWnumcolors(),TWstdcolors(), - FALSE, MENU, draw_the_data, windowId ))){ + FALSE, MENU, (INT (*)()) draw_the_data, windowId ))){ M(ERRMSG,"initgraphics","Aborting graphics."); graphicsG = FALSE ; return ; } } else { if(!(TWinitGraphics(argc,argv,TWnumcolors(),TWstdcolors(), - FALSE, MENU, draw_the_data ))){ + FALSE, MENU, (INT (*)()) draw_the_data ))){ M(ERRMSG,"init_graphics","Aborting graphics."); graphicsG = FALSE ; return ; @@ -134,7 +133,7 @@ } } -set_draw_critical( flag ) +void set_draw_critical( flag ) BOOL flag ; { @@ -147,7 +146,7 @@ } /* end set_draw_critical */ /* draw_the_data routine draws compaction graph */ -INT draw_the_data() +void draw_the_data() { INT i ; @@ -383,7 +382,7 @@ } /* end draw_the_data */ /* heart of the graphic system processes user input */ -process_graphics() +void process_graphics() { int x1, y1, x2, y2 ; /* coordinates for fixing cells and neighhds */ @@ -554,7 +553,7 @@ /* how to draw the channel graph */ -draw_changraph() +void draw_changraph() { INT i ; /* temp counter */ INT color ; /* color of edge */ diff -Nru graywolf-0.1.5/src/mc_compact/changraph.c graywolf-0.1.6/src/mc_compact/changraph.c --- graywolf-0.1.5/src/mc_compact/changraph.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/changraph.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,9 +46,6 @@ structure. Mon Aug 12 16:44:05 CDT 1991 - updated for new Yrbtree_init. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) changraph.c (Yale) version 1.4 5/21/92" ; -#endif #include #include @@ -68,7 +65,7 @@ /* ***************************************************************** Initialize graph by adding creating memory for it. **************************************************************** */ -init_graph( numnodes, numedges ) +void init_graph( numnodes, numedges ) INT numnodes ; INT numedges ; { @@ -92,7 +89,7 @@ /* ***************************************************************** Build graph by first adding nodes and node information to it. **************************************************************** */ -addNode( node, xc, yc ) +void addNode( node, xc, yc ) INT node, xc, yc ; { CHANBOXPTR nptr ; @@ -107,14 +104,14 @@ /* ***************************************************************** Build channel adjacency list by forming undirected graph. **************************************************************** */ -addEdge( node1, node2, HnotV, cell_lb, cell_rt ) +void addEdge( node1, node2, HnotV, cell_lb, cell_rt ) INT node1 ; INT node2 ; BOOL HnotV ; /* TRUE if horizontal FALSE if vertical */ INT cell_lb ; /* cell on left (bottom) for vert (horz) channel */ INT cell_rt ; /* cell on right (top) for vert (horz) channel */ { - static edgeCountS = 0 ; /* current number of edges */ + static int edgeCountS = 0 ; /* current number of edges */ ADJPTR newfE, /* new forward edge */ temp ; /* temporary pointer to relink adjacency list */ ADJPTR findAdjPtr() ; /* returns an edge given two nodes */ @@ -248,7 +245,7 @@ *(edge->end), edge->HnotV ) ; } /* end print_edge */ -build_trees() +void build_trees() { INT i ; INFOPTR eptr ; /* current edge */ @@ -375,7 +372,7 @@ return( closest_edge ) ; } /* end get_closest_edge */ -stretch_graph( stretch_edge, x, y ) +void stretch_graph( stretch_edge, x, y ) INFOPTR stretch_edge ; INT x, y ; { diff -Nru graywolf-0.1.5/src/mc_compact/cmain.c graywolf-0.1.6/src/mc_compact/cmain.c --- graywolf-0.1.5/src/mc_compact/cmain.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/cmain.c 2018-08-11 21:48:56.000000000 +0000 @@ -51,9 +51,6 @@ Fri Mar 29 14:17:51 EST 1991 - added DEBUGX switch and added path deck initialization. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) cmain.c (Yale) version 7.4 4/21/91" ; -#endif #include #include @@ -68,7 +65,9 @@ #define EXPECTEDMEMORY (256 * 1024) /* 256k is more than enough */ -main( argc , argv ) +void syntax(); + +int main( argc , argv ) int argc ; char *argv[] ; { @@ -239,11 +238,12 @@ } YexitPgm(PGMOK); + return 0; } /* end main */ /* give user correct syntax */ -syntax() +void syntax() { M(ERRMSG,NULL,"\n" ) ; M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); diff -Nru graywolf-0.1.5/src/mc_compact/CMakeLists.txt graywolf-0.1.6/src/mc_compact/CMakeLists.txt --- graywolf-0.1.5/src/mc_compact/CMakeLists.txt 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/CMakeLists.txt 2018-08-11 21:48:56.000000000 +0000 @@ -3,7 +3,7 @@ add_executable(mc_compact cdraw.c compactor.c io.c multi.c stdmacro.c changraph.c debug2.c movestrat2.c readcgraph.c xcompact.c cmain.c grid.c movestrat.c readtiles.c ycompact.c ${CMAKE_SOURCE_DIR}/src/date/date.c) -target_link_libraries(mc_compact ${CMAKE_BINARY_DIR}/src/Ylib/libycadgraywolf.so) +target_link_libraries(mc_compact ycadgraywolf) INCLUDE_DIRECTORIES(${CMAKE_SOURCE_DIR}/include ${CMAKE_BINARY_DIR}/include .) diff -Nru graywolf-0.1.5/src/mc_compact/compactor.c graywolf-0.1.6/src/mc_compact/compactor.c --- graywolf-0.1.5/src/mc_compact/compactor.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/compactor.c 2018-08-11 21:48:56.000000000 +0000 @@ -62,14 +62,13 @@ Fri Mar 29 14:25:29 EST 1991 - now save the critical path. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) compactor.c version 7.3 3/29/91" ; -#endif #include #include -remove_violations() +void freeGraph( INT direction ); + +void remove_violations() { ERRORPTR violations, saveError, buildXGraph(), buildYGraph() ; @@ -112,7 +111,7 @@ } /* end remove_violations */ -compact() +void compact() { INT length ; /* length of longest path */ INT count ; /* number of compaction cycles */ @@ -202,8 +201,7 @@ } /* end compact */ -freeGraph( direction ) -INT direction ; +void freeGraph( INT direction ) { INT i ; ECOMPBOXPTR edge , saveEdge ; @@ -319,7 +317,7 @@ } } -cleanupGraph( direction ) +void cleanupGraph( direction ) INT direction ; { INT i ; @@ -429,7 +427,7 @@ } /* find bounding box of tiles */ -find_core( l, r, b, t ) +void find_core( l, r, b, t ) INT *l, *r, *b, *t ; { diff -Nru graywolf-0.1.5/src/mc_compact/debug2.c graywolf-0.1.6/src/mc_compact/debug2.c --- graywolf-0.1.5/src/mc_compact/debug2.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/debug2.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,15 +49,12 @@ Sun Nov 4 13:22:21 EST 1990 - added new debug function for displaying cell slacks. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) debug2.c version 7.1 11/10/90" ; -#endif #include #include #include -dumpxGraph() +void dumpxGraph() { int i ; ECOMPBOXPTR eptr ; @@ -135,7 +132,7 @@ } -dumpyGraph() +void dumpyGraph() { int i ; ECOMPBOXPTR eptr ; @@ -227,7 +224,7 @@ return( NULL ) ; } -dycons() +void dycons() { int i, bcons ; ECOMPBOXPTR eptr, eptr2 ; @@ -275,7 +272,7 @@ -dsort( numtiles, XNotY ) +void dsort( numtiles, XNotY ) int numtiles ; BOOL XNotY ; { @@ -311,7 +308,7 @@ } /* end numtiles */ -dxancerr() +void dxancerr() { int i ; @@ -329,7 +326,7 @@ } } -dump_anc() +void dump_anc() { INT i ; INT last ; @@ -341,7 +338,7 @@ } } /* dump_anc */ -dslack( XNotY, center, length ) +void dslack( XNotY, center, length ) BOOL XNotY ; BOOL center ; INT length ; @@ -417,7 +414,7 @@ } } /* end dslack */ -dedges( cell, XnotY, forwardNotBack ) +void dedges( cell, XnotY, forwardNotBack ) INT cell ; BOOL XnotY ; BOOL forwardNotBack ; @@ -463,7 +460,7 @@ fprintf( stderr, "\n\n" ) ; } -dyancerr() +void dyancerr() { int i ; @@ -482,7 +479,7 @@ } -check_xancestors() +void check_xancestors() { INT i ; INT count ; @@ -519,7 +516,7 @@ } } /* end check_xancestors */ -check_yancestors() +void check_yancestors() { INT i ; INT count ; diff -Nru graywolf-0.1.5/src/mc_compact/grid.c graywolf-0.1.6/src/mc_compact/grid.c --- graywolf-0.1.5/src/mc_compact/grid.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/grid.c 2018-08-11 21:48:56.000000000 +0000 @@ -45,14 +45,11 @@ REVISIONS: Apr 30, 1989 - removed unnecessary variables. Mon May 6 22:33:51 EDT 1991 - no longer grid cells. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) grid.c version 7.2 5/6/91" ; -#endif #include #include -grid_data() +void grid_data() { int xcenter , ycenter, remainder ; diff -Nru graywolf-0.1.5/src/mc_compact/io.c graywolf-0.1.6/src/mc_compact/io.c --- graywolf-0.1.5/src/mc_compact/io.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/io.c 2018-08-11 21:48:56.000000000 +0000 @@ -51,9 +51,6 @@ Fri Nov 8 18:16:21 EST 1991 - removed INT_SMALL and INT_LARGE definitions since gcc couldn't handle it. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) io.c version 7.5 5/21/92" ; -#endif #include #include @@ -70,6 +67,7 @@ static BOOL multiS ; /* cell has multiple tiles ??? */ static CELLBOXPTR ptrS ; /* pointer to current cell */ +void addSourceNSink(); /* ***************** ERROR HANDLING ****************************** */ /* ERRORABORT is a macro which forces routines not to do any work */ @@ -81,12 +79,19 @@ } \ } \ -setErrorFlag() +#define ERRORABORTINT() \ +{ \ + if( errorFlagS ){ \ + return -1; /* don't do any work for errors */ \ + } \ +} \ + +void setErrorFlag() { errorFlagS = TRUE ; } /* ***************** ERROR HANDLING ****************************** */ -init( numtiles, numcells ) +void init( numtiles, numcells ) INT numtiles, numcells ; { INT i ; @@ -129,7 +134,7 @@ } } /* end init */ -final_tiles() +void final_tiles() { INT i ; /* counter */ INT space ; /* counter */ @@ -259,7 +264,7 @@ } /* end final_tiles */ /* set the current cell */ -initCell( celltype, cellnum, x, y, xoffset, yoffset ) +void initCell( celltype, cellnum, x, y, xoffset, yoffset ) INT celltype ; INT cellnum ; INT x, y ; @@ -289,8 +294,7 @@ multiS = 0 ; } /* end initCell */ -init_extra_tile( cell, type ) -INT cell ; +void init_extra_tile(INT cell, int type ) { curTileS = numtilesG ; numtilesG++ ; @@ -312,11 +316,11 @@ COMPACTPTR tptr ; NODEPTR temp, nptr ; - ERRORABORT() ; + ERRORABORTINT(); if( ++curTileS > numtilesG ){ setErrorFlag() ; M(ERRMSG, "addtile", "Problem with number of tiles\n" ) ; - return ; + return -1; } tptr = tileNodeG[curTileS] ; /* save relative positions */ @@ -372,7 +376,7 @@ } /* end addtile */ -endCell() +void endCell() { ERRORABORT() ; /* update the bounding box of the cell */ @@ -393,7 +397,7 @@ } } /* end endCell */ -process_tiles() +void process_tiles() { INT i ; COMPACTPTR t ; @@ -454,7 +458,7 @@ } /* end process_tiles */ /* ADD source and sink nodes to both x and y graphs */ -addSourceNSink() +void addSourceNSink() { COMPACTPTR source, sink ; INT x ; @@ -558,7 +562,7 @@ /* ***************************************************************** OUTPUT routine - output the results. **************************************************************** */ -output() +void output() { INT c ; INT tile ; diff -Nru graywolf-0.1.5/src/mc_compact/movestrat2.c graywolf-0.1.6/src/mc_compact/movestrat2.c --- graywolf-0.1.5/src/mc_compact/movestrat2.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/movestrat2.c 2018-08-11 21:48:56.000000000 +0000 @@ -56,9 +56,6 @@ graph constraint compaction. Mon May 6 22:37:01 EDT 1991 - make sure window is correct. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) movestrat2.c version 7.9 5/6/91" ; -#endif #include #include @@ -77,12 +74,12 @@ static DOUBLE best_areaS = 1.0E30 ; -static x_center(); -static calc_xslacks(); -static update_xslacks(); -static y_center(); -static calc_yslacks(); -static update_yslacks(); +static void x_center(); +static void calc_xslacks( int cur_cell ); +static void update_xslacks(); +static void y_center(); +static void calc_yslacks( int cur_cell ); +static void update_yslacks(); static INT sortby_xslack(); @@ -93,7 +90,7 @@ xSource = 0, xsink = numtilesG + 1, ysource = numtilesG + 2, and ysink = numtilesG + 3 positions in the tileNode array. */ -BOOL move_compactx( length ) +void move_compactx( length ) INT length ; { INT i, @@ -214,7 +211,7 @@ } /* end move_compactx */ -static x_center() +static void x_center() { INT i, newX, @@ -336,7 +333,7 @@ } /* end center_x */ -static calc_xslacks( cur_cell ) +static void calc_xslacks( int cur_cell ) { INT i ; /* counter */ INT xmin ; /* max of all the minimums of a cell */ @@ -383,7 +380,7 @@ } } /* end calc_xslacks */ -static update_xslacks( tptr ) +static void update_xslacks( tptr ) COMPACTPTR tptr ; { INT j ; /* current tile adjacent to node */ @@ -420,7 +417,7 @@ } /* end update_xslacks */ -BOOL move_compacty( length ) +void move_compacty( length ) int length ; { INT i, @@ -541,7 +538,7 @@ } /* end move_compacty */ -static y_center() +static void y_center() { int i, newY, @@ -664,7 +661,7 @@ } /* end y_center */ -static calc_yslacks( cur_cell ) +static void calc_yslacks( int cur_cell ) { INT i ; /* counter */ INT ymin ; /* max of all the minimums of a cell */ @@ -712,7 +709,7 @@ } } /* end calc_yslacks */ -static update_yslacks( tptr ) +static void update_yslacks( tptr ) COMPACTPTR tptr ; { INT j ; /* current tile adjacent to node */ diff -Nru graywolf-0.1.5/src/mc_compact/movestrat.c graywolf-0.1.6/src/mc_compact/movestrat.c --- graywolf-0.1.5/src/mc_compact/movestrat.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/movestrat.c 2018-08-11 21:48:56.000000000 +0000 @@ -55,9 +55,6 @@ when cells completely cover each other. We now always return 0 for minslack in X and Y backward searches. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) movestrat.c version 7.2 2/17/91" ; -#endif #include #include @@ -73,8 +70,9 @@ static int findxerror(); static int findyerror(); +void update_cell_tiles(int cell, int deltax, int deltay ); -moveStrategy( violations ) +void moveStrategy( violations ) ERRORPTR violations ; { COMPACTPTR tileL, tileR, tileB, tileT ; @@ -277,8 +275,7 @@ } /* end moveStrategy */ /* HOW to update the tiles of the cells */ -update_cell_tiles( cell, deltax, deltay ) -int cell, deltax, deltay ; +void update_cell_tiles(int cell, int deltax, int deltay ) { CELLBOXPTR cellptr ; COMPACTPTR t ; @@ -311,7 +308,7 @@ } /* end update_cell_tiles */ -BOOL dcheck_pos( cell ) +void dcheck_pos( cell ) int cell ; { @@ -343,7 +340,7 @@ } /* end dcheck_pos */ -static int find_bound( tile, avoid, direction ) +static int find_bound( tile, avoid, direction ) COMPACTPTR tile ; int avoid ; /* avoid finding tile that you have error (cell #) */ int direction ; @@ -429,6 +426,7 @@ /* now calculate how far the tile can move based on slack */ switch( direction ){ + // FIXME: use enum, so compiler can detect that there are only 4 directions case XFORWARD: return( tile->r + minslack ) ; case XBACKWARD: @@ -436,6 +434,7 @@ case YFORWARD: return( tile->t + minslack ) ; case YBACKWARD: + default: return( tile->b - minslack ) ; } /* end switch */ diff -Nru graywolf-0.1.5/src/mc_compact/multi.c graywolf-0.1.6/src/mc_compact/multi.c --- graywolf-0.1.5/src/mc_compact/multi.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/multi.c 2018-08-11 21:48:56.000000000 +0000 @@ -45,9 +45,6 @@ DATE: Jan 21, 1990 REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) multi.c version 7.3 5/21/92" ; -#endif #include #include @@ -68,19 +65,19 @@ static VERTEXPTR vertex_listS = NIL( VERTEX_BOX *) ; /* head of the list */ -static preprocess_multi(); +static void preprocess_multi(); static BOOL fix_tiles(); -static add_to_multi_list(); +static void add_to_multi_list(); static BOOL find_tile(); -static init_vertex_list(); -static add_extra_points(); -static swap(); -static add_pt(); -static free_vertex_list(); +static void init_vertex_list(); +static void add_extra_points(); +static void swap(); +static void add_pt(); +static void free_vertex_list(); -multi_tiles() +void multi_tiles() { preprocess_multi( TRUE ) ; final_tiles() ; @@ -90,7 +87,7 @@ /* remove overlap between tiles of a multi-tile cell */ /* Since this operation is only done once, a reliable O(n2) algorithm */ /* is reasonable here */ -static preprocess_multi( fixNotCheck ) +static void preprocess_multi( fixNotCheck ) BOOL fixNotCheck ; { @@ -284,7 +281,7 @@ /* which are adjacent. Since the tiles of a multi tile cell cannot */ /* move relative to one another. We can precompute the edges in the */ /* graphs. Here we need only to save the node numbers */ -static add_to_multi_list( tilea, tileb ) +static void add_to_multi_list( tilea, tileb ) COMPACTPTR tilea ; /* info on tile a */ COMPACTPTR tileb ; /* info on tile b */ { @@ -307,7 +304,7 @@ } /* end add_to_multi_list */ /* add the precomputed edges to the xgraph */ -add_mtiles_to_xgraph() +void add_mtiles_to_xgraph() { ERRORPTR multi_tile ; /* temp pointer */ COMPACTPTR nodeI, nodeJ ; /* two adjacent nodes */ @@ -332,7 +329,7 @@ } /* end add_mtiles_to_xgraph() */ /* add the precomputed edges to the ygraph */ -add_mtiles_to_ygraph() +void add_mtiles_to_ygraph() { ERRORPTR multi_tile ; /* temp pointer */ COMPACTPTR nodeI, nodeJ ; /* two adjacent nodes */ @@ -498,7 +495,7 @@ return(TRUE) ; } /* end find_tile */ -static init_vertex_list( left, bottom, right, top ) +static void init_vertex_list( left, bottom, right, top ) INT left, bottom, right, top ; { /* add in inverse order so list will be in correct order */ @@ -508,7 +505,7 @@ add_pt( left, bottom, START ) ; } /* end init_vertex_list */ -static add_extra_points() +static void add_extra_points() { INT xpt[9] ; INT ypt[9] ; @@ -613,7 +610,7 @@ } } -static swap( a, b ) +static void swap( a, b ) INT *a, *b ; { INT tmp ; @@ -623,7 +620,7 @@ *b = tmp ; } /* end swap */ -static add_pt( x, y, class ) +static void add_pt( x, y, class ) INT x, y, class ; { VERTEXPTR temp ; /* head of the list */ @@ -640,7 +637,7 @@ vertex_listS->class = class ; } /* end add_pt */ -static free_vertex_list() +static void free_vertex_list() { VERTEXPTR next_vertex ; diff -Nru graywolf-0.1.5/src/mc_compact/readcgraph.c graywolf-0.1.6/src/mc_compact/readcgraph.c --- graywolf-0.1.5/src/mc_compact/readcgraph.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/readcgraph.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,9 +37,6 @@ * */ -#ifndef lint -static char yysccsid[] = "@(#)yaccpar 1.8 (Berkeley) 01/20/90"; -#endif #define YYBYACC 1 /* ----------------------------------------------------------------- FILE: readcgraph.c <- readcgraph.y <- readcgraph.l @@ -58,9 +55,6 @@ DATE: Apr 7, 1988 REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) readcgraph.y (Yale) version 1.1 2/23/91" ; -#endif #include #include @@ -262,7 +256,7 @@ /* ********************* #include "readcgraph_l.h" *******************/ -read_cgraph() +void read_cgraph() { char filename[LRECL] ; #ifdef YYDEBUG @@ -281,7 +275,7 @@ } /* end read_cgraph */ -yyerror(s) +void yyerror(s) char *s; { sprintf(YmsgG,"problem reading %s.mrte:", cktNameG ); @@ -292,7 +286,7 @@ abortS = TRUE ; } -yywrap() +int yywrap() { return(1); } diff -Nru graywolf-0.1.5/src/mc_compact/readcgraph_l.h graywolf-0.1.6/src/mc_compact/readcgraph_l.h --- graywolf-0.1.5/src/mc_compact/readcgraph_l.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/readcgraph_l.h 2018-08-11 21:48:56.000000000 +0000 @@ -50,10 +50,13 @@ #define PADTOKENOFFSET(v) ( &(v[6]) ) /* 6 because 6 pad tokens */ static INT screen() ; -static INT check_line_count() ; +static void check_line_count() ; + +static int yylook(void); +static int yyback(int *p, int m); # define YYNEWLINE 10 -yylex(){ +int yylex(){ int nstr; extern int yyprevious; while((nstr = yylook()) >= 0) yyfussy: switch(nstr){ @@ -161,7 +164,7 @@ } /* end screen function */ -static INT check_line_count( s ) +static void check_line_count( s ) char *s ; { if( s ){ @@ -443,7 +446,7 @@ int *yyfnd; extern struct yysvf *yyestate; int yyprevious = YYNEWLINE; -yylook(){ +static int yylook(){ register struct yysvf *yystate, **lsp; register struct yywork *yyt; struct yysvf *yyz; @@ -591,8 +594,7 @@ # endif } } -yyback(p, m) - int *p; +static int yyback(int *p, int m) { if (p==0) return(0); while (*p) @@ -603,16 +605,16 @@ return(0); } /* the following are only used in the lex library */ -yyinput(){ +int yyinput(){ if (yyin == NULL) yyin = stdin; return(input()); } -yyoutput(c) +void yyoutput(c) int c; { if (yyout == NULL) yyout = stdout; output(c); } -yyunput(c) +void yyunput(c) int c; { unput(c); } diff -Nru graywolf-0.1.5/src/mc_compact/readtiles.c graywolf-0.1.6/src/mc_compact/readtiles.c --- graywolf-0.1.5/src/mc_compact/readtiles.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/readtiles.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,9 +37,6 @@ * */ -#ifndef lint -static char yysccsid[] = "@(#)yaccpar 1.8 (Berkeley) 01/20/90"; -#endif #define YYBYACC 1 /* ----------------------------------------------------------------- FILE: readtiles.c <- readtiles.y <- readtiles.l @@ -62,9 +59,6 @@ May 3, 1989 - changed to Y prefixes. Mon May 6 22:35:12 EDT 1991 - added offset keyword. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) readtiles.y version 7.2 5/6/91" ; -#endif #include #include @@ -254,7 +248,7 @@ /* ********************* #include "readtiles_l.h" *******************/ /* ********************* #include "readtiles_l.h" *******************/ -readtiles() +void readtiles() { char filename[LRECL] ; #ifdef YYDEBUG @@ -272,7 +266,7 @@ } /* end readtiles */ -yyerror(s) +void yyerror(s) char *s; { sprintf(YmsgG,"problem reading %s.mvio:", cktNameG ); @@ -283,7 +277,7 @@ setErrorFlag() ; } -yywrap() +int yywrap() { return(1); } diff -Nru graywolf-0.1.5/src/mc_compact/readtiles_l.h graywolf-0.1.6/src/mc_compact/readtiles_l.h --- graywolf-0.1.5/src/mc_compact/readtiles_l.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/readtiles_l.h 2018-08-11 21:48:56.000000000 +0000 @@ -54,10 +54,13 @@ #define END(v) (v-1 + sizeof(v) / sizeof( v[0] ) ) /* for table lookup */ static int screen() ; -static int check_line_count() ; +static void check_line_count() ; + +static int yylook(void); +static int yyback(int *p, int m); # define YYNEWLINE 10 -yylex(){ +int yylex(){ int nstr; extern int yyprevious; while((nstr = yylook()) >= 0) yyfussy: switch(nstr){ @@ -160,7 +163,7 @@ } /* end screen function */ -static int check_line_count( s ) +static void check_line_count( s ) char *s ; { if( s ){ @@ -498,7 +501,7 @@ int *yyfnd; extern struct yysvf *yyestate; int yyprevious = YYNEWLINE; -yylook(){ +static int yylook(){ register struct yysvf *yystate, **lsp; register struct yywork *yyt; struct yysvf *yyz; @@ -646,8 +649,7 @@ # endif } } -yyback(p, m) - int *p; +static int yyback(int *p, int m) { if (p==0) return(0); while (*p) @@ -658,16 +660,16 @@ return(0); } /* the following are only used in the lex library */ -yyinput(){ +int yyinput(){ if (yyin == NULL) yyin = stdin; return(input()); } -yyoutput(c) +void yyoutput(c) int c; { if (yyout == NULL) yyout = stdout; output(c); } -yyunput(c) +void yyunput(c) int c; { unput(c); } diff -Nru graywolf-0.1.5/src/mc_compact/stdmacro.c graywolf-0.1.6/src/mc_compact/stdmacro.c --- graywolf-0.1.5/src/mc_compact/stdmacro.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/stdmacro.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,9 +49,6 @@ Jun 21, 1989 - changed swap to exchange only x positions. May 4, 1990 - updated the functionality of Yset_init. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) stdmacro.c version 7.3 2/15/91" ; -#endif #include #include @@ -96,7 +93,7 @@ static int sortbydist(); -partition_compact() +void partition_compact() { ERRORPTR violations, buildXGraph() ; int i ; @@ -374,7 +371,7 @@ } /* end depth_first_search */ /* perform the swap of two nodes */ -swap_nodes( node1, node2 ) +void swap_nodes( node1, node2 ) int node1, node2 ; { COMPACTPTR tptr1 ; /* tile pointer */ @@ -413,7 +410,7 @@ } /* end swap_nodes */ -remove_problem( source, sink ) +int remove_problem( source, sink ) int source, sink ; { int i ; /* temp counter */ diff -Nru graywolf-0.1.5/src/mc_compact/xcompact.c graywolf-0.1.6/src/mc_compact/xcompact.c --- graywolf-0.1.5/src/mc_compact/xcompact.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/xcompact.c 2018-08-11 21:48:56.000000000 +0000 @@ -55,18 +55,19 @@ May 3, 1989 - changed to Y prefixes. May 6, 1989 - added no graphics compile switch ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) xcompact.c version 7.2 11/10/90" ; -#endif #include #include #include +void formxEdge(int fromNode, int toNode ); +void initxPicket(); +void update_xpicket(int i, PICKETPTR lowerLimit, PICKETPTR upperLimit ); + static PICKETPTR botPickS ; -buildXGraph() +void buildXGraph() { int i ; /* counter */ int overlapx ; /* overlap conditions in x direction */ @@ -225,9 +226,7 @@ } /* end buildXGraph */ -formxEdge( fromNode, toNode ) -int fromNode ; -int toNode ; +void formxEdge(int fromNode, int toNode ) { COMPACTPTR e1, e2 ; ECOMPBOXPTR temp, newE ; @@ -298,7 +297,7 @@ ASSERT( newE->constraint >= 0, "formxEdge", YmsgG ) ; } -initxPicket() +void initxPicket() { COMPACTPTR sink, source, node ; int i ; @@ -334,9 +333,7 @@ -update_xpicket( i, lowerLimit, upperLimit ) -int i ; -PICKETPTR lowerLimit, upperLimit ; +void update_xpicket(int i, PICKETPTR lowerLimit, PICKETPTR upperLimit ) { PICKETPTR t, temp, curPick ; COMPACTPTR newtile ; /* new tile to be added to picket */ @@ -545,7 +542,7 @@ }/* end projectY */ /* sort by x first then y */ -sortbyXY( tileA , tileB ) +int sortbyXY( tileA , tileB ) COMPACTPTR *tileA , *tileB ; { @@ -557,7 +554,7 @@ } } -load_ancestors( direction ) +void load_ancestors( direction ) INT direction ; { INT i ; /* counter */ @@ -588,7 +585,7 @@ } } -static xforwardPath() +static void xforwardPath() { INT j ; /* current tile adjacent to node */ @@ -628,7 +625,7 @@ } /* end loop on queue */ } /* end xforwardPath */ -static xbackwardPath() +static void xbackwardPath() { INT j ; /* current tile adjacent to node */ @@ -835,7 +832,7 @@ return( length ) ; } /* end longestxPath */ -dxpick() +void dxpick() { PICKETPTR curPick ; printf("Bottom to top pickets:\n" ) ; diff -Nru graywolf-0.1.5/src/mc_compact/ycompact.c graywolf-0.1.6/src/mc_compact/ycompact.c --- graywolf-0.1.5/src/mc_compact/ycompact.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mc_compact/ycompact.c 2018-08-11 21:48:56.000000000 +0000 @@ -56,15 +56,15 @@ May 3, 1989 - changed to Y prefixes. May 6, 1989 - added no graphics compile switch ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) ycompact.c version 7.1 11/10/90" ; -#endif #include #include static PICKETPTR leftPickS ; +void formyEdge(int fromNode, int toNode ); +void inityPicket(); +void update_ypicket(int i, PICKETPTR lowerLimit, PICKETPTR upperLimit ); ERRORPTR buildYGraph() { @@ -241,9 +241,7 @@ } /* end buildYGraph */ -formyEdge( fromNode, toNode ) -int fromNode ; -int toNode ; +void formyEdge(int fromNode, int toNode ) { COMPACTPTR e1, e2 ; ECOMPBOXPTR temp, newE ; @@ -318,7 +316,7 @@ } -inityPicket( ) +void inityPicket( ) { COMPACTPTR source, sink, node ; int i ; @@ -354,9 +352,7 @@ -update_ypicket( i, lowerLimit, upperLimit ) -int i ; -PICKETPTR lowerLimit, upperLimit ; +void update_ypicket(int i, PICKETPTR lowerLimit, PICKETPTR upperLimit ) { PICKETPTR t, temp, curPick ; COMPACTPTR newtile ; /* new tile to be added to picket */ @@ -501,7 +497,7 @@ }/* end picket update */ /* sort by y first then x */ -sortbyYX( tileA , tileB ) +int sortbyYX( tileA , tileB ) COMPACTPTR *tileA , *tileB ; { @@ -513,7 +509,7 @@ } } -static yforwardPath() +static void yforwardPath() { INT j ; /* current tile adjacent to node */ @@ -554,7 +550,7 @@ } /* end yforwardPath */ -static ybackwardPath() +static void ybackwardPath() { INT j ; /* current tile adjacent to node */ @@ -762,7 +758,7 @@ } /* end longestyPath */ -dypick() +void dypick() { PICKETPTR curPick ; printf("Bottom to top pickets:\n" ) ; diff -Nru graywolf-0.1.5/src/mincut/CMakeLists.txt graywolf-0.1.6/src/mincut/CMakeLists.txt --- graywolf-0.1.5/src/mincut/CMakeLists.txt 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mincut/CMakeLists.txt 2018-08-11 21:48:56.000000000 +0000 @@ -2,8 +2,8 @@ add_executable(Mincut main.c output.c readcells.c ${CMAKE_SOURCE_DIR}/src/date/date.c) -target_link_libraries(Mincut ${CMAKE_BINARY_DIR}/src/Ylib/libycadgraywolf.so) -target_link_libraries(Mincut X11) +target_link_libraries(Mincut ycadgraywolf) +target_link_libraries(Mincut ${X11_LIBRARIES}) target_link_libraries(Mincut m) INCLUDE_DIRECTORIES(${CMAKE_SOURCE_DIR}/include ${CMAKE_BINARY_DIR}/include .) diff -Nru graywolf-0.1.5/src/mincut/main.c graywolf-0.1.6/src/mincut/main.c --- graywolf-0.1.5/src/mincut/main.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mincut/main.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,145 +49,148 @@ syntax. Fri Jan 25 17:57:06 PST 1991 - added debug flag to syntax. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) main.c version 1.1 7/30/91" ; -#endif #define MAIN_VARS #include #include +#include #include #include #include #include #include #include "globals.h" +#include "output.h" #include "config-build.h" #define EXPECTEDMEMORY (1024 * 1024) /* 1M should be enough */ #define VERSION "v1.0" -main( argc , argv ) -int argc ; -char *argv[] ; -{ - - char *YinitProgram(), *Ystrclone() ; - char filename[LRECL] ; - char command[LRECL] ; - char *ptr ; - int arg_count ; - int yaleIntro() ; - int debug ; - FILE *fp ; - char *twdir, *Ygetenv() ; +/* Forward declarations */ +void syntax(void); - /* start up cleanup handler */ - YINITCLEANUP( argv[0], NULL, MAYBEDUMP ) ; +int main(int argc, char **argv) +{ - Yinit_memsize( EXPECTEDMEMORY ) ; + char *YinitProgram(), *Ystrclone() ; + char filename[LRECL] ; + char command[LRECL] ; + char *ptr ; + int arg_count ; + void yaleIntro() ; + int debug ; + FILE *fp ; + char *twdir, *Ygetenv() ; + + /* start up cleanup handler */ + YINITCLEANUP( argv[0], NULL, MAYBEDUMP ) ; + + Yinit_memsize( EXPECTEDMEMORY ) ; + + if( argc < 2 || argc > 3 ){ + syntax() ; + } else { + debug = FALSE ; + arg_count = 1 ; + if( *argv[1] == '-' ){ + for( ptr = ++argv[1]; *ptr; ptr++ ){ + switch( *ptr ){ + case 'd': + debug = TRUE ; + break ; + default: + sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; + M(ERRMSG,"main",YmsgG); + syntax() ; + } + } + YdebugMemory( debug ) ; + cktNameG = Ystrclone( argv[++arg_count] ); + + /* now tell the user what he picked */ + M(MSG,NULL,"\n\nSyntax switches:\n" ) ; + if( debug ){ + YsetDebug( TRUE ) ; + M(MSG,NULL,"\tdebug on\n" ) ; + } + M(MSG,NULL,"\n" ) ; + } else if( argc == 2 ){ + /* order is important here */ + YdebugMemory( FALSE ) ; + cktNameG = Ystrclone( argv[1] ); - if( argc < 2 || argc > 3 ){ - syntax() ; } else { - debug = FALSE ; - arg_count = 1 ; - if( *argv[1] == '-' ){ - for( ptr = ++argv[1]; *ptr; ptr++ ){ - switch( *ptr ){ - case 'd': - debug = TRUE ; - break ; - default: - sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; - M(ERRMSG,"main",YmsgG); - syntax() ; - } - } - YdebugMemory( debug ) ; - cktNameG = Ystrclone( argv[++arg_count] ); - - /* now tell the user what he picked */ - M(MSG,NULL,"\n\nSyntax switches:\n" ) ; - if( debug ){ - YsetDebug( TRUE ) ; - M(MSG,NULL,"\tdebug on\n" ) ; - } - M(MSG,NULL,"\n" ) ; - } else if( argc == 2 ){ - /* order is important here */ - YdebugMemory( FALSE ) ; - cktNameG = Ystrclone( argv[1] ); - - } else { - syntax() ; - } + syntax() ; } + } - /* we can change this value in the debugger */ - YinitProgram(NOCUT, VERSION, yaleIntro) ; + /* we can change this value in the debugger */ + YinitProgram(NOCUT, VERSION, yaleIntro) ; - if( twdir = TWFLOWDIR ){ - sprintf(command, "awk -f %s/bin/splt_file.a %s.cel", twdir , - cktNameG ) ; - } else { - fprintf(stderr,"ERROR:TWDIR environment variable not set.\n"); - fprintf(stderr,"Please set it to TimberWolf root directory\n"); - YexitPgm( PGMFAIL ) ; - } - read_par() ; + /* Check if TWDIR overridden */ + if((twdir = getenv("TWDIR"))) { + M(MSG,NULL, "Directory overridden with 'TWDIR' environment variable\n" ) ; + } + else { + twdir = TWFLOWDIR; + } + + sprintf(command, "awk -f %s/bin/splt_file.a %s.cel", twdir , cktNameG ) ; + + read_par() ; + + sprintf( filename, "%s.cel", cktNameG ) ; + fp = TWOPEN( filename, "r", ABORT ) ; + readcells( fp ) ; + TWCLOSE( fp ) ; + + sprintf( filename, "%s.mcel", cktNameG ) ; + fp = TWOPEN( filename, "w", ABORT ) ; + output( fp ) ; + TWCLOSE( fp ) ; + + sprintf( filename, "%s.stat", cktNameG ) ; + fp = TWOPEN( filename, "a", ABORT ) ; + update_stats( fp ) ; + TWCLOSE( fp ) ; - sprintf( filename, "%s.cel", cktNameG ) ; - fp = TWOPEN( filename, "r", ABORT ) ; - readcells( fp ) ; - TWCLOSE( fp ) ; - - sprintf( filename, "%s.mcel", cktNameG ) ; - fp = TWOPEN( filename, "w", ABORT ) ; - output( fp ) ; - TWCLOSE( fp ) ; - - sprintf( filename, "%s.stat", cktNameG ) ; - fp = TWOPEN( filename, "a", ABORT ) ; - update_stats( fp ) ; - TWCLOSE( fp ) ; - - fprintf(stdout, "Splitting %s.cel into " , cktNameG ) ; - fprintf(stdout, "%s.scel and %s.mcel...\n" , cktNameG , cktNameG ) ; - fflush( stdout ) ; - Ysystem( "Mincut", ABORT, command, NULL ) ; - fprintf(stdout, "\tdone!\n\n" ) ; - fflush( stdout ) ; + fprintf(stdout, "Splitting %s.cel into " , cktNameG ) ; + fprintf(stdout, "%s.scel and %s.mcel...\n" , cktNameG , cktNameG ) ; + fflush( stdout ) ; + Ysystem( "Mincut", ABORT, command, NULL ) ; + fprintf(stdout, "\tdone!\n\n" ) ; + fflush( stdout ) ; - YexitPgm( PGMOK ) ; + YexitPgm( PGMOK ) ; + return 0; } /* end main */ /* give user correct syntax */ -syntax() +void syntax() { - M(ERRMSG,NULL,"\n" ) ; - M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); - sprintf( YmsgG, - "\n%s circuitName\n\n", NOCUT ); - M(MSG,NULL,YmsgG ) ; - YexitPgm(PGMFAIL); + M(ERRMSG,NULL,"\n" ) ; + M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); + sprintf( YmsgG, + "\n%s circuitName\n\n", NOCUT ); + M(MSG,NULL,YmsgG ) ; + YexitPgm(PGMFAIL); } /* end syntax */ -yaleIntro() +void yaleIntro() { - int i ; + int i ; - M( MSG, NULL, "\n") ; - M( MSG, NULL, YmsgG) ; - M( MSG, NULL, "\nTimberWolf System Floorplan Setup Program\n"); - M( MSG, NULL, "Authors: Carl Sechen, Bill Swartz,\n"); - M( MSG, NULL, " Yale University\n"); - M( MSG, NULL, "\n"); + M( MSG, NULL, "\n") ; + M( MSG, NULL, YmsgG) ; + M( MSG, NULL, "\nTimberWolf System Floorplan Setup Program\n"); + M( MSG, NULL, "Authors: Carl Sechen, Bill Swartz,\n"); + M( MSG, NULL, " Yale University\n"); + M( MSG, NULL, "\n"); } /* end yaleIntro */ diff -Nru graywolf-0.1.5/src/mincut/output.c graywolf-0.1.6/src/mincut/output.c --- graywolf-0.1.5/src/mincut/output.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mincut/output.c 2018-08-11 21:48:56.000000000 +0000 @@ -52,12 +52,10 @@ Wed Jul 24 21:06:02 CDT 1991 - added a more meaningful output error message. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) output.c version 1.1 7/30/91" ; -#endif #include #include "globals.h" +#include "output.h" #include #include #include @@ -83,15 +81,18 @@ static char current_cellS[LRECL] ; /* the current cell name */ static char cur_pinnameS[LRECL] ; /* current pinname */ static YHASHPTR netTableS ; /* hash table for cross referencing nets */ + +void write_softpins( FILE *fp ); + /* *************************************************************** */ -init() +void init() { /* get ready for parsing */ /* make hash table for nets */ netTableS = Yhash_table_create( EXPECTEDNUMNETS ) ; } /* end init */ -addCell( celltype, cellname ) +void addCell( celltype, cellname ) int celltype ; char *cellname ; { @@ -107,7 +108,7 @@ } /* end addCell */ -addNet( signal ) +void addNet( signal ) char *signal ; { NETPTR data ; @@ -148,7 +149,7 @@ } } /* end addNet */ -set_bbox( left, right, bottom, top ) +void set_bbox( left, right, bottom, top ) INT left, right, bottom, top ; { DOUBLE width, height ; @@ -162,7 +163,7 @@ total_std_cellS++ ; } /* end set_bbox */ -output( fp ) +void output( fp ) FILE *fp ; { INT g ; @@ -255,8 +256,7 @@ } /* end output */ -write_softpins( fp ) -FILE *fp ; +void write_softpins( FILE *fp ) { YTABLEPTR thread ; NETPTR net ; @@ -277,7 +277,7 @@ fprintf( fp, "\n" ) ; } /* end write_softpins */ -read_par() +void read_par() { char input[LRECL] ; char *bufferptr ; @@ -314,7 +314,7 @@ } } /* end readpar */ -update_stats( fp ) +void update_stats( fp ) FILE *fp ; { fprintf( fp, "tot_length:%d\n", (INT)total_cell_lenS); diff -Nru graywolf-0.1.5/src/mincut/output.h graywolf-0.1.6/src/mincut/output.h --- graywolf-0.1.5/src/mincut/output.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/src/mincut/output.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,6 @@ +#ifndef __MINCUT_OUTPUT_H__ +#define __MINCUT_OUTPUT_H__ + +void read_par(void); + +#endif // __MINCUT_OUTPUT_H__ diff -Nru graywolf-0.1.5/src/mincut/readcells.c graywolf-0.1.6/src/mincut/readcells.c --- graywolf-0.1.5/src/mincut/readcells.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mincut/readcells.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,9 +37,6 @@ * */ -#ifndef lint -static char yysccsid[] = "@(#)yaccpar 1.8 (Berkeley) 01/20/90"; -#endif #define YYBYACC 1 /* ----------------------------------------------------------------- FILE: readcells.c <- readcells.y <- readcells.l @@ -83,9 +80,6 @@ Tue Aug 13 12:57:00 CDT 1991 - now allow stdcells to have no pins and fixed mirror keyword prob. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) readcells.y version 1.4 5/22/92" ; -#endif #include #include @@ -797,7 +791,7 @@ /* ********************* #include "readcells_l.h" *******************/ /* ********************* #include "readcells_l.h" *******************/ -readcells( fp ) +void readcells( fp ) FILE *fp ; { #ifdef YYDEBUG @@ -816,7 +810,7 @@ } /* end readcells */ -yyerror(s) +void yyerror(s) char *s; { sprintf(YmsgG,"problem reading %s.cel:", cktNameG ); @@ -826,7 +820,7 @@ M( MSG,"yacc", YmsgG ) ; } /* end yyerror */ -yywrap() +int yywrap() { return(1); } diff -Nru graywolf-0.1.5/src/mincut/readcells_l.h graywolf-0.1.6/src/mincut/readcells_l.h --- graywolf-0.1.5/src/mincut/readcells_l.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/mincut/readcells_l.h 2018-08-11 21:48:56.000000000 +0000 @@ -60,10 +60,13 @@ #define END(v) (v-1 + sizeof(v) / sizeof( v[0] ) ) /* for table lookup */ static int screen() ; -static int check_line_count() ; +static void check_line_count() ; + +static int yylook(void); +static int yyback(int *p, int m); # define YYNEWLINE 10 -yylex(){ +INT yylex(){ int nstr; extern int yyprevious; while((nstr = yylook()) >= 0) yyfussy: switch(nstr){ @@ -206,7 +209,7 @@ } /* end screen function */ -static int check_line_count( s ) +static void check_line_count( s ) char *s ; { if( s ){ @@ -523,7 +526,7 @@ int *yyfnd; extern struct yysvf *yyestate; int yyprevious = YYNEWLINE; -yylook(){ +static int yylook(){ register struct yysvf *yystate, **lsp; register struct yywork *yyt; struct yysvf *yyz; @@ -671,8 +674,7 @@ # endif } } -yyback(p, m) - int *p; +static int yyback(int *p, int m) { if (p==0) return(0); while (*p) @@ -683,16 +685,16 @@ return(0); } /* the following are only used in the lex library */ -yyinput(){ +INT yyinput(){ if (yyin == NULL) yyin = stdin; return(input()); } -yyoutput(c) +void yyoutput(c) int c; { if (yyout == NULL) yyout = stdout; output(c); } -yyunput(c) +void yyunput(c) int c; { unput(c); } diff -Nru graywolf-0.1.5/src/syntax/CMakeLists.txt graywolf-0.1.6/src/syntax/CMakeLists.txt --- graywolf-0.1.5/src/syntax/CMakeLists.txt 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/syntax/CMakeLists.txt 2018-08-11 21:48:56.000000000 +0000 @@ -2,8 +2,8 @@ add_executable(syntax main.c output.c readcells.c ${CMAKE_SOURCE_DIR}/src/date/date.c) -target_link_libraries(syntax ${CMAKE_BINARY_DIR}/src/Ylib/libycadgraywolf.so) -target_link_libraries(syntax X11) +target_link_libraries(syntax ycadgraywolf) +target_link_libraries(syntax ${X11_LIBRARIES}) target_link_libraries(syntax m) INCLUDE_DIRECTORIES(${CMAKE_SOURCE_DIR}/include ${CMAKE_BINARY_DIR}/include .) diff -Nru graywolf-0.1.5/src/syntax/main.c graywolf-0.1.6/src/syntax/main.c --- graywolf-0.1.5/src/syntax/main.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/syntax/main.c 2018-08-11 21:48:56.000000000 +0000 @@ -48,9 +48,6 @@ syntax. Fri Jan 25 17:57:06 PST 1991 - added debug flag to syntax. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) main.c version 1.6 2/23/91" ; -#endif #define MAIN_VARS @@ -66,120 +63,122 @@ #define EXPECTEDMEMORY (1024 * 1024) /* 1M should be enough */ #define VERSION "v1.1" -main( argc , argv ) -int argc ; -char *argv[] ; -{ - - char *YinitProgram(), *Ystrclone() ; - char filename[LRECL] ; - char filename2[LRECL] ; - char *ptr ; - int arg_count ; - int yaleIntro() ; - int debug ; - FILE *fp ; +/* Forward declarations */ +void syntax(void); - /* start up cleanup handler */ - YINITCLEANUP( argv[0], NULL, MAYBEDUMP ) ; +int main(int argc, char ** argv) +{ - Yinit_memsize( EXPECTEDMEMORY ) ; + char *YinitProgram(), *Ystrclone() ; + char filename[LRECL] ; + char filename2[LRECL] ; + char *ptr ; + int arg_count ; + void yaleIntro() ; + int debug ; + FILE *fp ; + + /* start up cleanup handler */ + YINITCLEANUP( argv[0], NULL, MAYBEDUMP ) ; + + Yinit_memsize( EXPECTEDMEMORY ) ; + + if( argc < 2 || argc > 3 ){ + syntax() ; + } else { + debug = FALSE ; + arg_count = 1 ; + if( *argv[1] == '-' ){ + for( ptr = ++argv[1]; *ptr; ptr++ ){ + switch( *ptr ){ + case 'd': + debug = TRUE ; + break ; + default: + sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; + M(ERRMSG,"main",YmsgG); + syntax() ; + } + } + YdebugMemory( debug ) ; + cktNameG = Ystrclone( argv[++arg_count] ); + + /* now tell the user what he picked */ + M(MSG,NULL,"\n\nSyntax switches:\n" ) ; + if( debug ){ + YsetDebug( TRUE ) ; + M(MSG,NULL,"\tdebug on\n" ) ; + } + M(MSG,NULL,"\n" ) ; + } else if( argc == 2 ){ + /* order is important here */ + YdebugMemory( FALSE ) ; + cktNameG = Ystrclone( argv[1] ); - if( argc < 2 || argc > 3 ){ - syntax() ; } else { - debug = FALSE ; - arg_count = 1 ; - if( *argv[1] == '-' ){ - for( ptr = ++argv[1]; *ptr; ptr++ ){ - switch( *ptr ){ - case 'd': - debug = TRUE ; - break ; - default: - sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; - M(ERRMSG,"main",YmsgG); - syntax() ; - } - } - YdebugMemory( debug ) ; - cktNameG = Ystrclone( argv[++arg_count] ); - - /* now tell the user what he picked */ - M(MSG,NULL,"\n\nSyntax switches:\n" ) ; - if( debug ){ - YsetDebug( TRUE ) ; - M(MSG,NULL,"\tdebug on\n" ) ; - } - M(MSG,NULL,"\n" ) ; - } else if( argc == 2 ){ - /* order is important here */ - YdebugMemory( FALSE ) ; - cktNameG = Ystrclone( argv[1] ); - - } else { - syntax() ; - } + syntax() ; } + } - /* remove old version of stat file */ - sprintf( filename, "%s.stat", cktNameG ) ; - Yrm_files( filename ) ; - - sprintf( filename, "%s.temp", cktNameG ) ; - fpoG = TWOPEN( filename, "w", ABORT ) ; - - /* we can change this value in the debugger */ - YinitProgram(SYNTAX, VERSION, yaleIntro) ; - - sprintf( filename, "%s.cel", cktNameG ) ; - fp = TWOPEN( filename, "r", ABORT ) ; - readcells( fp ) ; - - if(!(Ymessage_get_errorcount() ) ){ - M( MSG, NULL, "No syntax errors were found\n" ) ; - output() ; - } else { - TWCLOSE( fp ) ; - TWCLOSE( fpoG ) ; - YexitPgm( PGMFAIL ) ; - } + /* remove old version of stat file */ + sprintf( filename, "%s.stat", cktNameG ) ; + Yrm_files( filename ) ; + + sprintf( filename, "%s.temp", cktNameG ) ; + fpoG = TWOPEN( filename, "w", ABORT ) ; + + /* we can change this value in the debugger */ + YinitProgram(SYNTAX, VERSION, yaleIntro) ; + + sprintf( filename, "%s.cel", cktNameG ) ; + fp = TWOPEN( filename, "r", ABORT ) ; + readcells( fp ) ; + + if(!(Ymessage_get_errorcount() ) ){ + M( MSG, NULL, "No syntax errors were found\n" ) ; + output() ; + } else { TWCLOSE( fp ) ; TWCLOSE( fpoG ) ; + YexitPgm( PGMFAIL ) ; + } + TWCLOSE( fp ) ; + TWCLOSE( fpoG ) ; + + /* now move .temp file to .stat */ + sprintf( filename, "%s.temp", cktNameG ) ; + sprintf( filename2, "%s.stat", cktNameG ) ; + YmoveFile( filename, filename2 ) ; - /* now move .temp file to .stat */ - sprintf( filename, "%s.temp", cktNameG ) ; - sprintf( filename2, "%s.stat", cktNameG ) ; - YmoveFile( filename, filename2 ) ; - - YexitPgm( PGMOK ) ; + YexitPgm( PGMOK ) ; + return 0; } /* end main */ /* give user correct syntax */ -syntax() +void syntax() { - M(ERRMSG,NULL,"\n" ) ; - M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); - sprintf( YmsgG, - "\n%s circuitName\n\n", SYNTAX ); - M(MSG,NULL,YmsgG ) ; - YexitPgm(PGMFAIL); + M(ERRMSG,NULL,"\n" ) ; + M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); + sprintf( YmsgG, + "\n%s circuitName\n\n", SYNTAX ); + M(MSG,NULL,YmsgG ) ; + YexitPgm(PGMFAIL); } /* end syntax */ -yaleIntro() +void yaleIntro() { - int i ; + int i ; - M( MSG, NULL, "\n") ; - M( MSG, NULL, YmsgG) ; - M( MSG, NULL, "\nTimberWolf System Syntax Checker\n"); - M( MSG, NULL, "Authors: Carl Sechen, Kai-Win Lee, Bill Swartz,\n"); - M( MSG, NULL, " Dahe Chen, and Jimmy Lam\n"); - M( MSG, NULL, " Yale University\n"); - M( MSG, NULL, "\n"); + M( MSG, NULL, "\n") ; + M( MSG, NULL, YmsgG) ; + M( MSG, NULL, "\nTimberWolf System Syntax Checker\n"); + M( MSG, NULL, "Authors: Carl Sechen, Kai-Win Lee, Bill Swartz,\n"); + M( MSG, NULL, " Dahe Chen, and Jimmy Lam\n"); + M( MSG, NULL, " Yale University\n"); + M( MSG, NULL, "\n"); - fprintf(fpoG,"%s\n",YmsgG ) ; + fprintf(fpoG,"%s\n",YmsgG ) ; } /* end yaleIntro */ diff -Nru graywolf-0.1.5/src/syntax/output.c graywolf-0.1.6/src/syntax/output.c --- graywolf-0.1.5/src/syntax/output.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/syntax/output.c 2018-08-11 21:48:56.000000000 +0000 @@ -52,9 +52,6 @@ Wed Jul 24 21:06:02 CDT 1991 - added a more meaningful output error message. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) output.c version 1.8 7/24/91" ; -#endif #include #include "globals.h" @@ -87,14 +84,14 @@ static YHASHPTR netTableS ; /* hash table for cross referencing nets */ static DOUBLE cellAreaS = 0 ; /* area of the macro cells */ /* *************************************************************** */ -init() +void init() { /* get ready for parsing */ /* make hash table for nets */ netTableS = Yhash_table_create( EXPECTEDNUMNETS ) ; } /* end init */ -addCell( celltype, cellname ) +void addCell( celltype, cellname ) int celltype ; char *cellname ; { @@ -127,7 +124,7 @@ } /* end addCell */ -addNet( signal ) +void addNet( signal ) char *signal ; { int *data ; @@ -153,24 +150,24 @@ } /* end addNet */ -addEquiv() +void addEquiv() { equivS++ ; } /* end addEquiv */ -addUnEquiv() +void addUnEquiv() { unequivS++ ; } /* end addUnEquiv */ -add_instance() +void add_instance() { if( celltypeS == HARDCELLTYPE || celltypeS == SOFTCELLTYPE ){ numinstanceS++ ; } } /* end add_instance */ -set_bbox( left, right, bottom, top ) +void set_bbox( left, right, bottom, top ) INT left, right, bottom, top ; { minxS = left ; @@ -179,7 +176,7 @@ maxyS = top ; } /* end set_bbox */ -start_pt( x, y ) +void start_pt( x, y ) int x, y ; { Ybuster_init() ; @@ -190,7 +187,7 @@ maxyS = y ; } /* end start_pt */ -add_pt( x, y ) +void add_pt( x, y ) int x, y ; { Ybuster_addpt( x, y ) ; @@ -200,7 +197,7 @@ maxyS = MAX( y, maxyS ) ; } /* end add_pt */ -processCorners() +void processCorners() { YBUSTBOXPTR bustptr ; /* get a tile from Ybuster */ DOUBLE this_cell ; /* area of the current tile */ @@ -222,7 +219,7 @@ } } /* end processCorners */ -check_xloc( value ) +void check_xloc( value ) char *value ; { if( (strcmp( value, "L" ) != STRINGEQ ) && strcmp( value, "R" ) != STRINGEQ ){ @@ -232,7 +229,7 @@ Ysafe_free( value ) ; } /* end check_xloc */ -check_yloc( value ) +void check_yloc( value ) char *value ; { if( (strcmp( value, "B" ) != STRINGEQ ) && strcmp( value, "T" ) != STRINGEQ ){ @@ -242,7 +239,7 @@ Ysafe_free( value ) ; } /* end check_xloc */ -check_sideplace( side ) +void check_sideplace( side ) char *side ; { INT numsides ; @@ -266,13 +263,13 @@ Ysafe_free( side ) ; } /* end check_sideplace */ -set_pinname( pinname ) +void set_pinname( pinname ) char *pinname ; { strcpy( cur_pinnameS, pinname ) ; } /* end set_pinname */ -check_pos( xpos, ypos ) +void check_pos( xpos, ypos ) int xpos, ypos ; { @@ -286,7 +283,7 @@ /* ***************************************************************** OUTPUT routine - output the results. **************************************************************** */ -output() +void output() { char *yctime = (char *)YcurTime(NULL); fprintf( fpoG, "TIMESTAMP:%s\n", yctime ) ; diff -Nru graywolf-0.1.5/src/syntax/readcells.c graywolf-0.1.6/src/syntax/readcells.c --- graywolf-0.1.5/src/syntax/readcells.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/syntax/readcells.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,9 +37,6 @@ * */ -#ifndef lint -static char yysccsid[] = "@(#)yaccpar 1.8 (Berkeley) 01/20/90"; -#endif #define YYBYACC 1 /* ----------------------------------------------------------------- FILE: readcells.c <- readcells.y <- readcells.l @@ -85,9 +82,6 @@ Tue Aug 13 12:54:32 CDT 1991 - fixed problem with mirror keyword. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) readcells.y version 1.19 5/22/92" ; -#endif #include #include @@ -803,7 +797,7 @@ /* ********************* #include "readcells_l.h" *******************/ /* ********************* #include "readcells_l.h" *******************/ -readcells( fp ) +void readcells( fp ) FILE *fp ; { #ifdef YYDEBUG @@ -822,7 +816,7 @@ } /* end readcells */ -yyerror(s) +void yyerror(s) char *s; { sprintf(YmsgG,"problem reading %s.cel:", cktNameG ); @@ -832,7 +826,7 @@ M( MSG,"yacc", YmsgG ) ; } /* end yyerror */ -yywrap() +int yywrap() { return(1); } diff -Nru graywolf-0.1.5/src/syntax/readcells_l.h graywolf-0.1.6/src/syntax/readcells_l.h --- graywolf-0.1.5/src/syntax/readcells_l.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/syntax/readcells_l.h 2018-08-11 21:48:56.000000000 +0000 @@ -60,10 +60,13 @@ #define END(v) (v-1 + sizeof(v) / sizeof( v[0] ) ) /* for table lookup */ static int screen() ; -static int check_line_count() ; +static void check_line_count() ; + +static int yylook(void); +static int yyback(int *p, int m); # define YYNEWLINE 10 -yylex(){ +int yylex(){ int nstr; extern int yyprevious; while((nstr = yylook()) >= 0) yyfussy: switch(nstr){ @@ -206,7 +209,7 @@ } /* end screen function */ -static int check_line_count( s ) +static void check_line_count( s ) char *s ; { if( s ){ @@ -523,7 +526,7 @@ int *yyfnd; extern struct yysvf *yyestate; int yyprevious = YYNEWLINE; -yylook(){ +static int yylook(){ register struct yysvf *yystate, **lsp; register struct yywork *yyt; struct yysvf *yyz; @@ -671,8 +674,7 @@ # endif } } -yyback(p, m) - int *p; +static int yyback(int *p, int m) { if (p==0) return(0); while (*p) @@ -683,16 +685,16 @@ return(0); } /* the following are only used in the lex library */ -yyinput(){ +int yyinput(){ if (yyin == NULL) yyin = stdin; return(input()); } -yyoutput(c) +void yyoutput(c) int c; { if (yyout == NULL) yyout = stdout; output(c); } -yyunput(c) +void yyunput(c) int c; { unput(c); } diff -Nru graywolf-0.1.5/src/twflow/autoflow.c graywolf-0.1.6/src/twflow/autoflow.c --- graywolf-0.1.5/src/twflow/autoflow.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twflow/autoflow.c 2018-08-11 21:48:56.000000000 +0000 @@ -59,9 +59,6 @@ Fri Feb 22 23:55:29 EST 1991 - fixed new library rename. Sun Apr 21 22:33:53 EDT 1991 - now allow optional files. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) autoflow.c version 2.4 4/21/91" ; -#endif #include #include @@ -69,11 +66,14 @@ #include #include + #define STARTOBJECT 0 /* start of the graph */ #define ERROR -1 /* error from YgetFileTime() */ static INT objectS ; /* the last program that was run */ -auto_flow() +void report_problem( ADJPTR adjptr ); + +void auto_flow() { ADJPTR adjptr ; /* current edge in graph */ @@ -126,7 +126,7 @@ } /* end autoflow */ -exec_single_prog() +void exec_single_prog() { ADJPTR adjptr ; /* current edge in graph */ ADJPTR get_edge_from_user(); /* decides which way to travel */ @@ -185,8 +185,7 @@ G( draw_the_data() ) ; } /* end exec_single_prog */ -report_problem( adjptr ) -ADJPTR adjptr ; +void report_problem( ADJPTR adjptr ) { sprintf( YmsgG, "Trouble executing %s", proGraphG[adjptr->node]->name) ; @@ -271,7 +270,7 @@ } /* end BOOL check_dependencies */ /* allow graphics loop to change the object */ -autoflow_set_object( object ) +void autoflow_set_object( object ) INT object ; { objectS = object ; diff -Nru graywolf-0.1.5/src/twflow/CMakeLists.txt graywolf-0.1.6/src/twflow/CMakeLists.txt --- graywolf-0.1.5/src/twflow/CMakeLists.txt 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twflow/CMakeLists.txt 2018-08-11 21:48:56.000000000 +0000 @@ -2,8 +2,8 @@ add_executable(graywolf autoflow.c findflow.c graphics.c io.c main.c program.c readobjects.c ${CMAKE_SOURCE_DIR}/src/date/date.c) -target_link_libraries(graywolf ${CMAKE_BINARY_DIR}/src/Ylib/libycadgraywolf.so) -target_link_libraries(graywolf X11) +target_link_libraries(graywolf ycadgraywolf) +target_link_libraries(graywolf ${X11_LIBRARIES}) target_link_libraries(graywolf m) INCLUDE_DIRECTORIES(${CMAKE_SOURCE_DIR}/include ${CMAKE_BINARY_DIR}/include .) diff -Nru graywolf-0.1.5/src/twflow/findflow.c graywolf-0.1.6/src/twflow/findflow.c --- graywolf-0.1.5/src/twflow/findflow.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twflow/findflow.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,9 +46,6 @@ Thu Apr 18 01:18:32 EDT 1991 - now changed where to look for the flow files. User can override. ---------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) findflow.c version 1.4 4/18/91" ; -#endif #include diff -Nru graywolf-0.1.5/src/twflow/graphics.c graywolf-0.1.6/src/twflow/graphics.c --- graywolf-0.1.5/src/twflow/graphics.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twflow/graphics.c 2018-08-11 21:48:56.000000000 +0000 @@ -62,9 +62,6 @@ Sat Feb 23 04:51:29 EST 1991 - added parasite mode. Sun Apr 21 22:35:09 EDT 1991 - updated to the convention. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) graphics.c version 2.6 4/21/91" ; -#endif #include #include @@ -99,347 +96,347 @@ #include -init_graphics(argc,argv,windowId) -INT argc ; -char *argv[] ; -INT windowId ; +void init_graphics(argc,argv,windowId) + INT argc ; + char *argv[] ; + INT windowId ; { - INT draw_the_data() ; + void draw_the_data() ; - if( !(graphicsG) ){ - return ; - } - if( windowId ){ - /* init windows as a parasite */ - fprintf( stderr,"windowId:%d\n", windowId ) ; - if( !( TWinitParasite(argc,argv,TWnumcolors(),TWstdcolors(), - FALSE, MENU, draw_the_data, windowId ))){ - M(ERRMSG,"initgraphics","Aborting graphics."); - graphicsG = FALSE ; - return ; - } - } else { - if(!(TWinitGraphics(argc,argv,TWnumcolors(),TWstdcolors(), - FALSE, MENU, draw_the_data ))){ - M(ERRMSG,"init_graphics","Aborting graphics."); - graphicsG = FALSE ; - return ; - } + if( !(graphicsG) ){ + return ; + } + if( windowId ){ + /* init windows as a parasite */ + fprintf( stderr,"windowId:%d\n", windowId ) ; + if( !( TWinitParasite(argc,argv,TWnumcolors(),TWstdcolors(), + FALSE, MENU, (INT (*)()) draw_the_data, windowId ))){ + M(ERRMSG,"initgraphics","Aborting graphics."); + graphicsG = FALSE ; + return ; + } + } else { + if(!(TWinitGraphics(argc,argv,TWnumcolors(),TWstdcolors(), + FALSE, MENU, (INT (*)())draw_the_data ))){ + M(ERRMSG,"init_graphics","Aborting graphics."); + graphicsG = FALSE ; + return ; } - TWdrawMenus() ; - TWflushFrame() ; + } + TWdrawMenus() ; + TWflushFrame() ; } /* end init_graphics */ /* draw_the_data routine draws compaction graph */ -INT draw_the_data() +void draw_the_data() { - INT i ; - INT color ; - OBJECTPTR o ; - DPTR dptr ; - ADJPTR eptr ; - - /* graphics is turned off */ - if( !graphicsG ){ - return ; - } - - TWstartFrame() ; - /* first draw the objects */ - for( i=1; i<= numobjectsG;i++){ - o = proGraphG[i] ; - if( i == selectedObjS ){ - color = TWRED ; - } else { - color = TWGREEN ; - } - TWdrawCell( i, o->l,o->b,o->r,o->t, color, o->name ) ; - } /* end drawing the objects */ - - /* next draw the edges between objects */ - /* go thru all the objects */ - for( i=1;i<= numobjectsG;i++){ - /* go thru all the edges of an object */ - for( eptr = proGraphG[i]->adjF ;eptr; eptr=eptr->next){ - if( eptr == selectedEdgeS ){ - color = TWRED ; - } else { - color = TWBLUE ; - } - for( dptr = eptr->geometry; dptr ; dptr = dptr->next ){ - TWdrawNet( i,dptr->x1,dptr->y1, - dptr->x2,dptr->y2, color, NULL); - } - } - } - TWflushFrame() ; - if( YdebugAssert() ){ - sleep( SLEEPTIME ) ; + INT i ; + INT color ; + OBJECTPTR o ; + DPTR dptr ; + ADJPTR eptr ; + + /* graphics is turned off */ + if( !graphicsG ){ + return ; + } + + TWstartFrame() ; + /* first draw the objects */ + for( i=1; i<= numobjectsG;i++){ + o = proGraphG[i] ; + if( i == selectedObjS ){ + color = TWRED ; + } else { + color = TWGREEN ; + } + TWdrawCell( i, o->l,o->b,o->r,o->t, color, o->name ) ; + } /* end drawing the objects */ + + /* next draw the edges between objects */ + /* go thru all the objects */ + for( i=1;i<= numobjectsG;i++){ + /* go thru all the edges of an object */ + for( eptr = proGraphG[i]->adjF ;eptr; eptr=eptr->next){ + if( eptr == selectedEdgeS ){ + color = TWRED ; + } else { + color = TWBLUE ; + } + for( dptr = eptr->geometry; dptr ; dptr = dptr->next ){ + TWdrawNet( i,dptr->x1,dptr->y1, + dptr->x2,dptr->y2, color, NULL); + } } + } + TWflushFrame() ; + if( YdebugAssert() ){ + sleep( SLEEPTIME ) ; + } } /* end draw_the_data */ /* heart of the graphic system processes user input */ -process_graphics() +void process_graphics() { - INT selection ; /* the users pick */ - INT find_obj() ; /* find the users pick */ - INT x, y ; /* the picked point */ - - /* data might have changed so show user current config */ - /* any function other that the draw controls need to worry about */ - /* this concurrency problem - show user current config */ - draw_the_data() ; - /* use TWcheckExposure to flush exposure events since we just */ - /* drew the data */ - TWcheckExposure() ; - TWmessage( WAITMSG ) ; - M( MSG, NULL, WAITMSG ) ; - M( MSG, NULL, "\n" ) ; - - selection = CANCEL ; - while( selection != CONTINUE_PGM ){ /* loop until exit */ - selection = TWcheckMouse() ; - switch( selection ){ - case CANCEL: - /* do nothing */ - break ; - case AUTO_REDRAW_ON: - auto_drawS = TRUE ; - break ; - case AUTO_REDRAW_OFF: - auto_drawS = FALSE ; - break ; - case CLOSE_GRAPHICS: - TWcloseGraphics() ; - /* update all costs and reload cells */ - graphicsG = FALSE ; - return ; - case COLORS: - TWtoggleColors() ; - break ; - case CONTINUE_PGM: - break ; - case DUMP_GRAPHICS: - TWsetFrame(0) ; /* update the frame count */ - /* now change mode to dump to file */ - TWsetMode(1) ; - /* dump the data to a file now instead of screen */ - draw_the_data() ; - /* restore the state to previous condition */ - /* and set draw to screen */ - TWsetMode(0) ; - break ; - case EXIT_PROGRAM: - TWcloseGraphics() ; - YexitPgm( PGMOK ) ; - return ; - case FULLVIEW: - TWfullView() ; - break ; - case REDRAW: - draw_the_data() ; - /* use TWcheckExposure to flush exposure events since */ - /* we just drew the data */ - TWcheckExposure() ; - break ; - case TELL_POINT: - TWmessage( "Pick a point" ) ; - TWgetPt( &x, &y ) ; - sprintf( YmsgG,"The point is (%d,%d)",x,y ) ; - TWmessage( YmsgG ) ; - break ; - case TRANSLATE: - TWtranslate() ; - break ; - case ZOOM: - TWzoom() ; - break ; - case AUTOFLOW: - autoflowG = TRUE ; /* used to interrupt auto flow */ - auto_flow() ; - break ; - case PICK_PGM: - selectedObjS = find_obj() ; - autoflow_set_object( selectedObjS ) ; - break ; - case EXECUTE_PGM: - exec_single_prog() ; - break ; - case PROMPT_ON: - promptS = TRUE ; - TWmessage( "Prompt on" ) ; - break ; - case PROMPT_OFF: - promptS = FALSE ; - TWmessage( "Prompt off" ) ; - break ; - } /* end switch */ - - if( auto_drawS && TWcheckExposure() ){ - draw_the_data() ; - } - } - TWmessage("Continuing - to interrupt program click on top menu window") ; + INT selection ; /* the users pick */ + INT find_obj() ; /* find the users pick */ + INT x, y ; /* the picked point */ + + /* data might have changed so show user current config */ + /* any function other that the draw controls need to worry about */ + /* this concurrency problem - show user current config */ + draw_the_data() ; + /* use TWcheckExposure to flush exposure events since we just */ + /* drew the data */ + TWcheckExposure() ; + TWmessage( WAITMSG ) ; + M( MSG, NULL, WAITMSG ) ; + M( MSG, NULL, "\n" ) ; + + selection = CANCEL ; + while( selection != CONTINUE_PGM ){ /* loop until exit */ + selection = TWcheckMouse() ; + switch( selection ){ + case CANCEL: + /* do nothing */ + break ; + case AUTO_REDRAW_ON: + auto_drawS = TRUE ; + break ; + case AUTO_REDRAW_OFF: + auto_drawS = FALSE ; + break ; + case CLOSE_GRAPHICS: + TWcloseGraphics() ; + /* update all costs and reload cells */ + graphicsG = FALSE ; + return ; + case COLORS: + TWtoggleColors() ; + break ; + case CONTINUE_PGM: + break ; + case DUMP_GRAPHICS: + TWsetFrame(0) ; /* update the frame count */ + /* now change mode to dump to file */ + TWsetMode(1) ; + /* dump the data to a file now instead of screen */ + draw_the_data() ; + /* restore the state to previous condition */ + /* and set draw to screen */ + TWsetMode(0) ; + break ; + case EXIT_PROGRAM: + TWcloseGraphics() ; + YexitPgm( PGMOK ) ; + return ; + case FULLVIEW: + TWfullView() ; + break ; + case REDRAW: + draw_the_data() ; + /* use TWcheckExposure to flush exposure events since */ + /* we just drew the data */ + TWcheckExposure() ; + break ; + case TELL_POINT: + TWmessage( "Pick a point" ) ; + TWgetPt( &x, &y ) ; + sprintf( YmsgG,"The point is (%d,%d)",x,y ) ; + TWmessage( YmsgG ) ; + break ; + case TRANSLATE: + TWtranslate() ; + break ; + case ZOOM: + TWzoom() ; + break ; + case AUTOFLOW: + autoflowG = TRUE ; /* used to interrupt auto flow */ + auto_flow() ; + break ; + case PICK_PGM: + selectedObjS = find_obj() ; + autoflow_set_object( selectedObjS ) ; + break ; + case EXECUTE_PGM: + exec_single_prog() ; + break ; + case PROMPT_ON: + promptS = TRUE ; + TWmessage( "Prompt on" ) ; + break ; + case PROMPT_OFF: + promptS = FALSE ; + TWmessage( "Prompt off" ) ; + break ; + } /* end switch */ + + if( auto_drawS && TWcheckExposure() ){ + draw_the_data() ; + } + } + TWmessage("Continuing - to interrupt program click on top menu window") ; } /* end process_graphics */ /* get edge loops until it gets answer from user */ ADJPTR get_edge_from_user( obj, direction ) -OBJECTPTR obj ; -BOOL direction ; + OBJECTPTR obj ; + BOOL direction ; { - ADJPTR adjptr ; - ADJPTR start_edge ; - ADJPTR findEdge() ; - INT edge_count ; - char *answer ; - - while( TRUE ){ /* loop until user makes a selection */ - if( direction == FORWARD ){ - start_edge = obj->adjF ; - } else { - start_edge = obj->adjB ; - } - /* count the number of edges that meet the criteria */ - edge_count = 0 ; - for( adjptr = start_edge ; adjptr ; adjptr = adjptr->next ){ - edge_count++ ; - } - for( adjptr = start_edge ; adjptr ; adjptr = adjptr->next ){ - if( direction == FORWARD ){ - selectedEdgeS = adjptr ; - } else { - /* need to reverse edge so selectedEdge will match */ - selectedEdgeS = findEdge( adjptr->node, obj->node, - FORWARD ) ; - } - /* show user the edge */ - draw_the_data() ; - TWcheckExposure() ; - - if( edge_count > 1 ){ - /* give directions */ - sprintf( YmsgG,"%s","If edge is not correct, enter n ") ; - strcat( YmsgG, - "for next edge. If satisfied, enter non-null string:") ; - /* look for empty string - means we are satisfied */ - answer = TWgetString(YmsgG) ; - if( answer ){ - if( *answer != 'n' ){ - return( adjptr ) ; - } - } else { - return( adjptr ) ; - } - } else { - /* simple case the correct edge */ - return( adjptr ) ; - } - } /* end for loop */ - } /* end while loop */ + ADJPTR adjptr ; + ADJPTR start_edge ; + ADJPTR findEdge() ; + INT edge_count ; + char *answer ; + + while( TRUE ){ /* loop until user makes a selection */ + if( direction == FORWARD ){ + start_edge = obj->adjF ; + } else { + start_edge = obj->adjB ; + } + /* count the number of edges that meet the criteria */ + edge_count = 0 ; + for( adjptr = start_edge ; adjptr ; adjptr = adjptr->next ){ + edge_count++ ; + } + for( adjptr = start_edge ; adjptr ; adjptr = adjptr->next ){ + if( direction == FORWARD ){ + selectedEdgeS = adjptr ; + } else { + /* need to reverse edge so selectedEdge will match */ + selectedEdgeS = findEdge( adjptr->node, obj->node, + FORWARD ) ; + } + /* show user the edge */ + draw_the_data() ; + TWcheckExposure() ; + + if( edge_count > 1 ){ + /* give directions */ + sprintf( YmsgG,"%s","If edge is not correct, enter n ") ; + strcat( YmsgG, + "for next edge. If satisfied, enter non-null string:") ; + /* look for empty string - means we are satisfied */ + answer = TWgetString(YmsgG) ; + if( answer ){ + if( *answer != 'n' ){ + return( adjptr ) ; + } + } else { + return( adjptr ) ; + } + } else { + /* simple case the correct edge */ + return( adjptr ) ; + } + } /* end for loop */ + } /* end while loop */ } /* end get_edge_from_user */ /* the corresponding handshake to set the highlighted drawing object */ -graphics_set_object( object ) -INT object ; +void graphics_set_object( object ) + INT object ; { - selectedObjS = object ; /* set the current selected object */ + selectedObjS = object ; /* set the current selected object */ } /* graphics_set_object */ /* find the object in question */ INT find_obj() { - INT i ; - INT x, y ; /* coordinates picked by user */ - INT obj ; /* selected cell */ - OBJECTPTR o ; /* pointer to object */ + INT i ; + INT x, y ; /* coordinates picked by user */ + INT obj ; /* selected cell */ + OBJECTPTR o ; /* pointer to object */ - obj = 0 ; - TWmessage("Pick program by clicking any mouse button at center of object"); + obj = 0 ; + TWmessage("Pick program by clicking any mouse button at center of object"); #ifdef NEEDED - (void) sleep(SLEEPTIME) ; + (void) sleep(SLEEPTIME) ; #endif - TWgetPt( &x, &y ) ; - /* look thru all programs O(programs) algorithm */ - for( i=1; i<= numobjectsG;i++){ - o = proGraphG[i] ; - /* see if cell boundary contains this point */ - if( x >= o->l && x <= o->r ){ - if( y >= o->b && y <= o->t ){ - selectedObjS = i ; - draw_the_data() ; - TWcheckExposure() ; - - obj = selectedObjS ; - break ; - } - } - } /* end loop */ - - if( obj == 0 ){ - TWmessage( "No cell selected" ) ; - if( selectedObjS ){ /* user didn't like any options */ - selectedObjS = 0 ; - draw_the_data() ; /* draw the data with highlight off */ - TWcheckExposure() ; - } - } else { - sprintf( YmsgG, "Selected program:%s", proGraphG[obj]->name ) ; - TWmessage( YmsgG ) ; + TWgetPt( &x, &y ) ; + /* look thru all programs O(programs) algorithm */ + for( i=1; i<= numobjectsG;i++){ + o = proGraphG[i] ; + /* see if cell boundary contains this point */ + if( x >= o->l && x <= o->r ){ + if( y >= o->b && y <= o->t ){ + selectedObjS = i ; + draw_the_data() ; + TWcheckExposure() ; + + obj = selectedObjS ; + break ; + } } - return( obj ) ; + } /* end loop */ + + if( obj == 0 ){ + TWmessage( "No cell selected" ) ; + if( selectedObjS ){ /* user didn't like any options */ + selectedObjS = 0 ; + draw_the_data() ; /* draw the data with highlight off */ + TWcheckExposure() ; + } + } else { + sprintf( YmsgG, "Selected program:%s", proGraphG[obj]->name ) ; + TWmessage( YmsgG ) ; + } + return( obj ) ; } /* end find_obj */ #else /* NOGRAPHICS case */ /* get edge loops until it gets answer from user */ ADJPTR get_edge_from_user( obj, direction ) -OBJECTPTR obj ; -BOOL direction ; + OBJECTPTR obj ; + BOOL direction ; { - ADJPTR adjptr ; - ADJPTR findEdge() ; - INT node1, node2 ; - char reply[LRECL] ; - - while( TRUE ){ /* loop until user makes a selection */ - if( direction == FORWARD ){ - adjptr = obj->adjF ; - } else { - adjptr = obj->adjB ; - } - for( ; adjptr ; adjptr = adjptr->next ){ - if( direction == FORWARD ){ - node1 = obj->node ; - node2 = adjptr->node ; - } else { - node1 = adjptr->node ; - node2 = obj->node ; - } - /* tell the user the edge */ - - /* give directions */ - fprintf( stdout,"%s-->%s", proGraphG[node1]->name, - proGraphG[node2]->name ) ; - fprintf( stdout,"If execution path is correct, enter y[es].\n") ; - fprintf( stdout,"Otherwise enter n for next edge.\n") ; - fscanf( stdout, "%s", reply ) ; - if( reply ){ - if( reply[0] == 'y' || reply[0] == 'Y' ){ - return( adjptr ) ; - } - } - } /* end for loop */ - } /* end while loop */ + ADJPTR adjptr ; + ADJPTR findEdge() ; + INT node1, node2 ; + char reply[LRECL] ; + + while( TRUE ){ /* loop until user makes a selection */ + if( direction == FORWARD ){ + adjptr = obj->adjF ; + } else { + adjptr = obj->adjB ; + } + for( ; adjptr ; adjptr = adjptr->next ){ + if( direction == FORWARD ){ + node1 = obj->node ; + node2 = adjptr->node ; + } else { + node1 = adjptr->node ; + node2 = obj->node ; + } + /* tell the user the edge */ + + /* give directions */ + fprintf( stdout,"%s-->%s", proGraphG[node1]->name, + proGraphG[node2]->name ) ; + fprintf( stdout,"If execution path is correct, enter y[es].\n") ; + fprintf( stdout,"Otherwise enter n for next edge.\n") ; + fscanf( stdout, "%s", reply ) ; + if( reply ){ + if( reply[0] == 'y' || reply[0] == 'Y' ){ + return( adjptr ) ; + } + } + } /* end for loop */ + } /* end while loop */ } /* end get_edge_from_user */ @@ -447,37 +444,37 @@ /* make_decision asks the user for the next program to run */ ADJPTR make_decision( obj, direction ) -OBJECTPTR obj ; -BOOL direction ; + OBJECTPTR obj ; + BOOL direction ; { - ADJPTR adjptr ; - ADJPTR get_edge_from_user() ; + ADJPTR adjptr ; + ADJPTR get_edge_from_user() ; - if( promptS ){ - adjptr = get_edge_from_user( obj, direction ) ; - adjptr->marked = TRUE ; - return( adjptr ) ; - } else { - /* ******************************************************** - * Avoid asking user - use ordering information given by - * the user. Take first unexecuted edge as next edge to be - * executed. - *********************************************************** */ - if( direction == FORWARD ){ - adjptr = obj->adjF ; - } else { - adjptr = obj->adjB ; - } - for( ; adjptr ; adjptr = adjptr->next ){ - if( !(adjptr->marked) ){ - adjptr->marked = TRUE ; - return( adjptr ) ; - } - } - /* if we didn't find any unmarked nodes we need to ask user */ - adjptr = get_edge_from_user( obj, direction ) ; - return( adjptr ) ; - + if( promptS ){ + adjptr = get_edge_from_user( obj, direction ) ; + adjptr->marked = TRUE ; + return( adjptr ) ; + } else { + /* ******************************************************** + * Avoid asking user - use ordering information given by + * the user. Take first unexecuted edge as next edge to be + * executed. + *********************************************************** */ + if( direction == FORWARD ){ + adjptr = obj->adjF ; + } else { + adjptr = obj->adjB ; } + for( ; adjptr ; adjptr = adjptr->next ){ + if( !(adjptr->marked) ){ + adjptr->marked = TRUE ; + return( adjptr ) ; + } + } + /* if we didn't find any unmarked nodes we need to ask user */ + adjptr = get_edge_from_user( obj, direction ) ; + return( adjptr ) ; + + } } /* end make decision */ diff -Nru graywolf-0.1.5/src/twflow/io.c graywolf-0.1.6/src/twflow/io.c --- graywolf-0.1.5/src/twflow/io.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twflow/io.c 2018-08-11 21:48:56.000000000 +0000 @@ -75,14 +75,12 @@ be executed FIFO. Sun Apr 21 22:35:40 EDT 1991 - now allow optional files. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) io.c version 2.2 4/21/91" ; -#endif #include #include #include #include +#include "io.h" #define START "start" #define OPTIONAL '*' @@ -106,6 +104,9 @@ static ADJPTR botEdgeS ; /* the current pointer */ static EDGEPTR edgeListS = NULL ; /* list of drawable edges */ +void add_object(char * pname, INT node ); +void set_window(); + /* ***************** ERROR HANDLING ****************************** */ /* ERRORABORT is a macro which forces routines not to do any work */ /* when we find a syntax error in the input routine. */ @@ -116,13 +117,13 @@ } \ } \ -setErrorFlag() +void setErrorFlag() { errorFlagS = TRUE ; } /* ***************** ERROR HANDLING ****************************** */ -init( numobj ) +void init( numobj ) INT numobj ; { INT i ; @@ -153,9 +154,7 @@ } /* end init */ /* create a new object */ -add_object( pname, node ) -char *pname ; -INT node ; +void add_object(char * pname, INT node ) { ERRORABORT() ; if( ++curObjS != node || node > numobjectsG ){ @@ -169,7 +168,7 @@ } /* end add_object */ -add_pdependency( fromNode ) +void add_pdependency( fromNode ) INT fromNode ; { OBJECTPTR from, to ; @@ -217,7 +216,7 @@ } /* end add_pdependency */ -add_path( pathname ) +void add_path( pathname ) char *pathname ; { ERRORABORT() ; @@ -225,13 +224,13 @@ } /* end add_path */ /* set file type */ -set_file_type( type ) +void set_file_type( type ) BOOL type ; { inputNotOutputS = type ; } /* end set_file_type */ -add_fdependency( file ) +void add_fdependency( file ) char *file ; { INT len ; @@ -273,7 +272,7 @@ newF->fname = file ; } /* end add_fdependency */ -add_args( argument ) +void add_args( argument ) char *argument ; { ERRORABORT() ; @@ -282,7 +281,7 @@ edgeListS->argv[edgeListS->argc++] = argument ; } /* end add_args */ -add_box( l, b, r, t ) +void add_box( l, b, r, t ) INT l, b, r, t ; { ERRORABORT() ; @@ -304,7 +303,7 @@ data but we want to make it easy for the user. It's not much trouble anyway. - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - */ -start_edge( fromNode ) +void start_edge( fromNode ) INT fromNode ; { EDGEPTR temp ; @@ -339,7 +338,7 @@ } /* end start_edge */ -add_line( x1, y1, x2, y2 ) +void add_line( x1, y1, x2, y2 ) INT x1, y1, x2, y2 ; { @@ -391,7 +390,7 @@ /* process lines */ /* Now add the drawn lines to the graph data structure */ -process_arcs() +void process_arcs() { ADJPTR adjptr ; EDGEPTR edge ; @@ -450,7 +449,7 @@ } /* end process_arcs */ /* clean edges so everything must be checked */ -unmark_edges() +void unmark_edges() { INT i ; /* counter */ OBJECTPTR o ; /* object pointer */ @@ -471,7 +470,7 @@ #include -set_window() +void set_window() { INT xpand ; /* make output look nice */ INT min, max ; /* make into square */ diff -Nru graywolf-0.1.5/src/twflow/io.h graywolf-0.1.6/src/twflow/io.h --- graywolf-0.1.5/src/twflow/io.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/src/twflow/io.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,6 @@ +#ifndef __TWFLOW_IO_H__ +#define __TWFLOW_IO_H__ + +void add_path(char* pathname); + +#endif // __TWFLOW_IO_H__ diff -Nru graywolf-0.1.5/src/twflow/main.c graywolf-0.1.6/src/twflow/main.c --- graywolf-0.1.5/src/twflow/main.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twflow/main.c 2018-08-11 21:48:56.000000000 +0000 @@ -63,12 +63,10 @@ a flow directory. Also added show_flows call. Sun Apr 21 22:36:29 EDT 1991 - now find the flow directory. ---------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) main.c version 2.8 4/21/91" ; -#endif #include #include +#include #include #include #include @@ -85,241 +83,244 @@ #define NULLWINDOW 0 #define VERSION "2.1" -main( argc , argv ) -INT argc ; -char *argv[] ; -{ +/* Forward declarations */ +void syntax(void); +void show_flows(); - char filename[LRECL] ; /* buffer for filename */ - char *ptr ; /* argument pointer */ - char *Ygetenv() ; /* get environment variable */ - FILE *fp ; /* file pointer */ - FILE *find_flow_file() ; /* return pointer to flow file */ - BOOL debug ; /* TRUE if debug on */ - BOOL general_mode ; /* TRUE if top level user flow */ - BOOL lock ; /* whether to create a lock file */ - BOOL verbose ; /* whether to go into verbose mode.*/ - BOOL parasite ; /* TRUE if we are to take over win */ - INT arg_count ; /* parse the command line */ - INT windowId ; /* the parasite window id */ - VOID yaleIntro() ; /* give intro for program */ - - /* start up cleanup handler */ - YINITCLEANUP( argv[0], NULL, MAYBEDUMP ) ; - - Yinit_memsize( EXPECTEDMEMORY ) ; - - flow_dirG = NIL(char *) ; - - /* make sure we have environment variable */ - if(!(twdirG = TWFLOWDIR)) { - M(ERRMSG,"twflow","Can't get environment variable 'TWDIR'\n") ; - M(MSG,NULL, - "Please use setenv to set 'TWDIR' to TimberWolf directory\n" ) ; - YexitPgm(MASTERFAIL); - } +int main(int argc, char ** argv ) +{ - if( argc < 2 || argc > 5 ){ - syntax() ; - } else { + char filename[LRECL] ; /* buffer for filename */ + char *ptr ; /* argument pointer */ + char *Ygetenv() ; /* get environment variable */ + FILE *fp ; /* file pointer */ + FILE *find_flow_file() ; /* return pointer to flow file */ + BOOL debug ; /* TRUE if debug on */ + BOOL general_mode ; /* TRUE if top level user flow */ + BOOL lock ; /* whether to create a lock file */ + BOOL verbose ; /* whether to go into verbose mode.*/ + BOOL parasite ; /* TRUE if we are to take over win */ + INT arg_count ; /* parse the command line */ + INT windowId ; /* the parasite window id */ + VOID yaleIntro() ; /* give intro for program */ + + /* start up cleanup handler */ + YINITCLEANUP( argv[0], NULL, MAYBEDUMP ) ; + + Yinit_memsize( EXPECTEDMEMORY ) ; + + flow_dirG = NIL(char *) ; + + /* Check if TWDIR overridden */ + if((twdirG = getenv("TWDIR"))) { + M(MSG,NULL, "Directory overridden with 'TWDIR' environment variable\n" ) ; + } + else { + twdirG = TWFLOWDIR; + } + + if( argc < 2 || argc > 5 ){ + syntax() ; + } else { #ifndef NOGRAPHICS - graphicsG = TRUE ; + graphicsG = TRUE ; #else - graphicsG = FALSE ; + graphicsG = FALSE ; #endif /* NOGRAPHICS */ - windowId = NULLWINDOW ; /* initialize window to NULL */ - debug = FALSE ; - lock = FALSE ; - tomusG = FALSE ; - parasite = FALSE ; - autoflowG = TRUE ; - general_mode = FALSE ; - verbose = FALSE ; - arg_count = 1 ; - if( *argv[1] == '-' ){ - for( ptr = ++argv[1]; *ptr; ptr++ ){ - switch( *ptr ){ - case 'd': - debug = TRUE ; - break ; - case 'g': - general_mode = TRUE ; - break ; - case 'l': - lock = TRUE ; - break ; - case 'n': - graphicsG = FALSE ; - break ; - case 'p': - autoflowG = FALSE ; - break ; - case 't': - tomusG = TRUE ; - break ; - case 'v': - verbose = TRUE ; - break ; - case 'w': - parasite = TRUE ; - break ; - default: - sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; - M(ERRMSG,"main",YmsgG); - syntax() ; - } - } - YdebugMemory( debug ) ; - YinitProgram( MASTER, VERSION, yaleIntro ); - - cktNameG = Ystrclone( argv[++arg_count] ); - Ymessage_mode( verbose ) ; - - /* now tell the user what he picked */ - M(MSG,NULL,"Twflow switches:\n" ) ; - if( debug ){ - YsetDebug( TRUE ) ; - M(MSG,NULL,"\tdebug on\n" ) ; - } - if( graphicsG ){ - M(MSG,NULL,"\tGraphics mode on\n" ) ; - } else { - M(MSG,NULL,"\tGraphics mode off\n" ) ; - } - if( parasite ){ - M(MSG,NULL,"\tTwflow will inherit window\n" ) ; - /* look for windowid */ - if(argc != 4){ - M(ERRMSG,"main","Need to specify windowID\n" ) ; - syntax() ; - } else { - G( windowId = atoi( argv[++arg_count] ) ) ; - } - } - if( general_mode ){ - M(MSG,NULL,"\tGeneral mode on\n" ) ; - } else if( tomusG ){ - M(MSG,NULL,"\tTomus partition mode on\n" ) ; - } else { - M(MSG,NULL,"\tTimberWolf mode on\n" ) ; - } - M(MSG,NULL,"\n" ) ; - - } else if( argc <= 3 ){ - /* order is important here */ - YdebugMemory( FALSE ) ; - cktNameG = Ystrclone( argv[arg_count] ); - YinitProgram( MASTER, VERSION, yaleIntro ); - } else { - syntax() ; - } - if( ++arg_count < argc ){ - /* this means we have the flow directory specified */ - flow_dirG = Ystrclone( argv[arg_count] ) ; - sprintf( YmsgG, "\n\tFlow directory given:%s\n\n", flow_dirG ); - M( MSG,NULL, YmsgG ) ; - } + windowId = NULLWINDOW ; /* initialize window to NULL */ + debug = FALSE ; + lock = FALSE ; + tomusG = FALSE ; + parasite = FALSE ; + autoflowG = TRUE ; + general_mode = FALSE ; + verbose = FALSE ; + arg_count = 1 ; + if( *argv[1] == '-' ){ + for( ptr = ++argv[1]; *ptr; ptr++ ){ + switch( *ptr ){ + case 'd': + debug = TRUE ; + break ; + case 'g': + general_mode = TRUE ; + break ; + case 'l': + lock = TRUE ; + break ; + case 'n': + graphicsG = FALSE ; + break ; + case 'p': + autoflowG = FALSE ; + break ; + case 't': + tomusG = TRUE ; + break ; + case 'v': + verbose = TRUE ; + break ; + case 'w': + parasite = TRUE ; + break ; + default: + sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; + M(ERRMSG,"main",YmsgG); + syntax() ; + } + } + YdebugMemory( debug ) ; + YinitProgram( MASTER, VERSION, yaleIntro ); + + cktNameG = Ystrclone( argv[++arg_count] ); + Ymessage_mode( verbose ) ; + + /* now tell the user what he picked */ + M(MSG,NULL,"Twflow switches:\n" ) ; + if( debug ){ + YsetDebug( TRUE ) ; + M(MSG,NULL,"\tdebug on\n" ) ; + } + if( graphicsG ){ + M(MSG,NULL,"\tGraphics mode on\n" ) ; + } else { + M(MSG,NULL,"\tGraphics mode off\n" ) ; + } + if( parasite ){ + M(MSG,NULL,"\tTwflow will inherit window\n" ) ; + /* look for windowid */ + if(argc != 4){ + M(ERRMSG,"main","Need to specify windowID\n" ) ; + syntax() ; + } else { + G( windowId = atoi( argv[++arg_count] ) ) ; + } + } + if( general_mode ){ + M(MSG,NULL,"\tGeneral mode on\n" ) ; + } else if( tomusG ){ + M(MSG,NULL,"\tTomus partition mode on\n" ) ; + } else { + M(MSG,NULL,"\tTimberWolf mode on\n" ) ; + } + M(MSG,NULL,"\n" ) ; + + } else if( argc <= 3 ){ + /* order is important here */ + YdebugMemory( FALSE ) ; + cktNameG = Ystrclone( argv[arg_count] ); + YinitProgram( MASTER, VERSION, yaleIntro ); + } else { + syntax() ; } - - - /* initialize the graphics */ - G( init_graphics(argc,argv,windowId) ) ; - - Ylog_start( cktNameG, "Program initialization completed..." ) ; - if( lock ){ - /* create a lock file to say we are busy */ - sprintf( filename, "/tmp/twsc.%s", cktNameG ) ; - (VOID) Yfile_create_lock( filename, FALSE ) ; + if( ++arg_count < argc ){ + /* this means we have the flow directory specified */ + flow_dirG = Ystrclone( argv[arg_count] ) ; + sprintf( YmsgG, "\n\tFlow directory given:%s\n\n", flow_dirG ); + M( MSG,NULL, YmsgG ) ; } - Ymessage_flush() ; - - /* ------------------ end initialization ------------------------- */ + } - /* determine the correct flow file */ - /* return file and filename */ - fp = find_flow_file( general_mode, debug, filename ) ; - - /* now we can read this file */ - readobjects( fp, filename ) ; - - /* If we haven't been given a flow directory override, find */ - /* the flow directory. */ - if(!(flow_dirG)){ - sprintf( filename, "%s/bin/flow/flow", twdirG ) ; - if( flow_dirG = Yfile_slink( filename )){ - flow_dirG = Ystrclone( flow_dirG ) ; - } else { - G( TWcloseGraphics() ) ; - YexitPgm(PGMFAIL); - } - } - /* let user user see data */ - G( draw_the_data() ) ; + /* initialize the graphics */ + G( init_graphics(argc,argv,windowId) ) ; - /* - verify_pathnames() ; - */ - - if( !graphicsG || autoflowG ){ - /* if no graphics must go auto_flow */ - autoflowG = TRUE ; - auto_flow() ; + Ylog_start( cktNameG, "Program initialization completed..." ) ; + if( lock ){ + /* create a lock file to say we are busy */ + sprintf( filename, "/tmp/twsc.%s", cktNameG ) ; + (VOID) Yfile_create_lock( filename, FALSE ) ; + } + Ymessage_flush() ; + + /* ------------------ end initialization ------------------------- */ + + /* determine the correct flow file */ + /* return file and filename */ + fp = find_flow_file( general_mode, debug, filename ) ; + + /* now we can read this file */ + readobjects( fp, filename ) ; + + /* If we haven't been given a flow directory override, find */ + /* the flow directory. */ + if(!(flow_dirG)){ + sprintf( filename, "%s/bin/flow/flow", twdirG ) ; + if( flow_dirG = Yfile_slink( filename )){ + flow_dirG = Ystrclone( flow_dirG ) ; } else { - G( process_graphics() ) ; + G( TWcloseGraphics() ) ; + YexitPgm(PGMFAIL); } + } - G( TWcloseGraphics() ) ; + /* let user user see data */ + G( draw_the_data() ) ; - if( problemsG ){ - YexitPgm(PGMFAIL); - } else { - YexitPgm(PGMOK); - } + /* + verify_pathnames() ; + */ + + if( !graphicsG || autoflowG ){ + /* if no graphics must go auto_flow */ + autoflowG = TRUE ; + auto_flow() ; + } else { + G( process_graphics() ) ; + } + + G( TWcloseGraphics() ) ; + + if( problemsG ){ + YexitPgm(PGMFAIL); + } else { + YexitPgm(PGMOK); + } + return 0; } /* end main */ /* give user correct syntax */ -syntax() +void syntax() { - M(ERRMSG,NULL,"\n" ) ; - M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); - sprintf( YmsgG, "\ngraywolf [-gpndw] designName [windowId] [flowdirectory]\n" ); - M(MSG,NULL,YmsgG ) ; - M(MSG,NULL,"\twhose options are one or more of the following:\n"); - M(MSG,NULL,"\t\tg - general mode - does not use TimberWolf system\n"); - M(MSG,NULL,"\t\t information. Default is TimberWolf mode\n"); - M(MSG,NULL,"\t\tp - pick mode - [graphics only] wait for user\n"); - M(MSG,NULL,"\t\t upon entering the program\n"); - M(MSG,NULL,"\t\tn - no graphics - the default is to open the\n"); - M(MSG,NULL,"\t\t display and output graphics to an Xwindow\n"); - M(MSG,NULL,"\t\td - prints debug info and performs extensive\n"); - M(MSG,NULL,"\t\t error checking\n"); - M(MSG,NULL,"\t\tw - parasite mode will inherit a window. Requires\n"); - M(MSG,NULL,"\t\t a valid windowId\n"); + M(ERRMSG,NULL,"\n" ) ; + M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); + sprintf( YmsgG, "\ngraywolf [-gpndw] designName [windowId] [flowdirectory]\n" ); + M(MSG,NULL,YmsgG ) ; + M(MSG,NULL,"\twhose options are one or more of the following:\n"); + M(MSG,NULL,"\t\tg - general mode - does not use TimberWolf system\n"); + M(MSG,NULL,"\t\t information. Default is TimberWolf mode\n"); + M(MSG,NULL,"\t\tp - pick mode - [graphics only] wait for user\n"); + M(MSG,NULL,"\t\t upon entering the program\n"); + M(MSG,NULL,"\t\tn - no graphics - the default is to open the\n"); + M(MSG,NULL,"\t\t display and output graphics to an Xwindow\n"); + M(MSG,NULL,"\t\td - prints debug info and performs extensive\n"); + M(MSG,NULL,"\t\t error checking\n"); + M(MSG,NULL,"\t\tw - parasite mode will inherit a window. Requires\n"); + M(MSG,NULL,"\t\t a valid windowId\n"); - show_flows() ; + show_flows() ; - YexitPgm(MASTERFAIL); + YexitPgm(MASTERFAIL); } /* end syntax */ VOID yaleIntro() { - char message[LRECL] ; + char message[LRECL] ; - sprintf( message,"\n%s\n",YmsgG) ; - M(MSG,NULL,message) ; - M(MSG,NULL,"Authors: Bill Swartz, Carl Sechen\n"); - M(MSG,NULL," Yale University\n"); + sprintf( message,"\n%s\n",YmsgG) ; + M(MSG,NULL,message) ; + M(MSG,NULL,"Authors: Bill Swartz, Carl Sechen\n"); + M(MSG,NULL," Yale University\n"); } /* end yaleIntro */ -show_flows() +void show_flows() { - char command[LRECL] ; - /* now show user the flow directories */ - sprintf( command, "%s/bin/show_flows", twdirG ) ; - Ysystem( "show_flows", ABORT, command, NULL ) ; + char command[LRECL] ; + /* now show user the flow directories */ + sprintf( command, "%s/bin/show_flows", twdirG ) ; + Ysystem( "show_flows", ABORT, command, NULL ) ; } /* end show_flows */ diff -Nru graywolf-0.1.5/src/twflow/program.c graywolf-0.1.6/src/twflow/program.c --- graywolf-0.1.5/src/twflow/program.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twflow/program.c 2018-08-11 21:48:56.000000000 +0000 @@ -52,9 +52,6 @@ Sun Apr 21 22:37:20 EDT 1991 - changed windowId to @WINDOWID and added @FLOWDIR. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) program.c version 2.3 4/21/91" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/twflow/readobjects.c graywolf-0.1.6/src/twflow/readobjects.c --- graywolf-0.1.5/src/twflow/readobjects.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twflow/readobjects.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,9 +37,6 @@ * */ -#ifndef lint -static char yysccsid[] = "@(#)yaccpar 1.8 (Berkeley) 01/20/90"; -#endif #define YYBYACC 1 /* ----------------------------------------------------------------- FILE: readobjects.c <- readobjects.y <- readobjects.l @@ -66,9 +63,6 @@ made output prettier for syntax errors. Sun Apr 21 22:38:38 EDT 1991 - added missing close file. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) readobjects.y version 2.5 4/21/91" ; -#endif #include #include @@ -76,6 +70,7 @@ #include /* file opening insert file. */ #include /* use debug utilities. */ #include +#include "io.h" #undef REJECT /* undefine TWMC macro for lex's version */ @@ -305,7 +300,7 @@ /* ********************* #include "readobjects_l.h" *******************/ /* ********************* #include "readobjects_l.h" *******************/ -readobjects( fp, filename ) +void readobjects( fp, filename ) FILE *fp ; char *filename ; { @@ -326,7 +321,7 @@ } /* end readobjects */ -yyerror(s) +void yyerror(s) char *s; { sprintf(YmsgG,"problem reading:%s\n", filenameS ); @@ -337,7 +332,7 @@ setErrorFlag() ; } -yywrap() +int yywrap() { return(1); } diff -Nru graywolf-0.1.5/src/twflow/readobjects_l.h graywolf-0.1.6/src/twflow/readobjects_l.h --- graywolf-0.1.5/src/twflow/readobjects_l.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twflow/readobjects_l.h 2018-08-11 21:48:56.000000000 +0000 @@ -50,10 +50,13 @@ #define END(v) (v-1 + sizeof(v) / sizeof( v[0] ) ) /* for table lookup */ static INT screen() ; -static INT check_line_count() ; +static void check_line_count() ; + +static int yylook(void); +static int yyback(int *p, int m); # define YYNEWLINE 10 -yylex(){ +int yylex(){ int nstr; extern int yyprevious; while((nstr = yylook()) >= 0) yyfussy: switch(nstr){ @@ -155,7 +158,7 @@ } /* end screen function */ -static INT check_line_count( s ) +static void check_line_count( s ) char *s ; { if( s ){ @@ -493,7 +496,7 @@ int *yyfnd; extern struct yysvf *yyestate; int yyprevious = YYNEWLINE; -yylook(){ +static int yylook(){ register struct yysvf *yystate, **lsp; register struct yywork *yyt; struct yysvf *yyz; @@ -641,8 +644,7 @@ # endif } } -yyback(p, m) - int *p; +static int yyback(int *p, int m) { if (p==0) return(0); while (*p) @@ -653,16 +655,16 @@ return(0); } /* the following are only used in the lex library */ -yyinput(){ +int yyinput(){ if (yyin == NULL) yyin = stdin; return(input()); } -yyoutput(c) +void yyoutput(c) int c; { if (yyout == NULL) yyout = stdout; output(c); } -yyunput(c) +void yyunput(c) int c; { unput(c); } diff -Nru graywolf-0.1.5/src/twmc/acceptt.c graywolf-0.1.6/src/twmc/acceptt.c --- graywolf-0.1.5/src/twmc/acceptt.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/acceptt.c 2018-08-11 21:48:56.000000000 +0000 @@ -44,18 +44,16 @@ DATE: Jan 30, 1988 REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) acceptt.c version 3.3 9/5/90" ; -#endif #include +#include #include #define MASK 0x3ff static DOUBLE table1S[1024] , table2S[1024] , table3S[1024] ; -init_table() +void init_table() { INT i2 ; table1S[0] = 1.0 ; diff -Nru graywolf-0.1.5/src/twmc/analyze.c graywolf-0.1.6/src/twmc/analyze.c --- graywolf-0.1.5/src/twmc/analyze.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/analyze.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,14 +46,12 @@ DATE: Apr 4, 1988 REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) analyze.c version 3.7 4/18/91" ; -#endif #include #include #include #include +#include #define CURWT 1 #define PRIORWT 1 diff -Nru graywolf-0.1.5/src/twmc/CMakeLists.txt graywolf-0.1.6/src/twmc/CMakeLists.txt --- graywolf-0.1.5/src/twmc/CMakeLists.txt 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/CMakeLists.txt 2018-08-11 21:48:56.000000000 +0000 @@ -2,8 +2,8 @@ add_executable(TimberWolfMC acceptt.c analyze.c compact.c config1.c config2.c configpads.c debug.c finalout.c finalpin.c gmain.c findcheck.c findcost.c findloc.c findside.c fixcell.c genorient.c graphics.c initialize.c initnets.c loadbins.c main.c makebins.c makesite.c mergecell.c neworient.c newtemp.c outgeo.c outpin.c output.c overlap.c paths.c partition.c penalties.c perimeter.c placepads.c placepin.c prboard.c readcells.c readnets.c rmain.c readpar.c reconfig.c savewolf.c scrapnet.c sortpin.c selectpin.c setpwates.c sortpad.c twstats.c uaspect.c uloop.c unbust.c uinst.c unet.c upin.c upinswap.c usite1.c usite2.c usoftmove.c utemp.c watesides.c window.c wirecosts.c wireest.c wireratio.c ${CMAKE_SOURCE_DIR}/src/date/date.c) -target_link_libraries(TimberWolfMC ${CMAKE_BINARY_DIR}/src/Ylib/libycadgraywolf.so) -target_link_libraries(TimberWolfMC X11) +target_link_libraries(TimberWolfMC ycadgraywolf) +target_link_libraries(TimberWolfMC ${X11_LIBRARIES}) target_link_libraries(TimberWolfMC m) target_link_libraries(TimberWolfMC ${GSL_LIBRARIES}) diff -Nru graywolf-0.1.5/src/twmc/compact.c graywolf-0.1.6/src/twmc/compact.c --- graywolf-0.1.5/src/twmc/compact.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/compact.c 2018-08-11 21:48:56.000000000 +0000 @@ -68,15 +68,15 @@ Sun May 5 14:19:53 EDT 1991 - pass gridding point to compactor. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) compact.c version 3.12 5/5/91" ; -#endif #include #include #include #include #include +#include +#include +#include #include "config-build.h" @@ -91,273 +91,277 @@ #define SCELLKEYWORD "stdcell" #define TILEKEYWORD "l" -compact( compactFlag ) -BOOL compactFlag ; /* signals use of compaction */ +void compact( BOOL compactFlag ) { - char filename[LRECL] ; - char *Yrelpath() ; - char *pathname ; - char *twdir ; /* path of TimberWolf directory */ - char *getenv() ; /* used to get TWDIR environment variable */ - char buffer[LRECL], *bufferptr ; - char **tokens ; /* for parsing file */ - INT numtokens, line ; - BOOL abort ; /* whether to abort program */ - INT cell, numtiles, numcells ; - INT xcenter, ycenter ; - INT xoffset, yoffset ; - INT l, r, b, t ; - INT closegraphics() ; - CELLBOXPTR cellptr ; - TILEBOXPTR tileptr ; - BOUNBOXPTR bounptr ; /* bounding box pointer */ - RTILEBOXPTR rtptr ; /* current routing tile */ - FILE *fp ; - INT type ; - - - /* ######### Create compaction file and exec compactor ######### */ - /* open compaction file for writing */ - sprintf(filename, "%s.mvio" , cktNameG ) ; - fp = TWOPEN( filename , "w", ABORT ) ; - - /* first count number of tiles and cells to be output */ - numtiles = 0 ; - numcells = 0 ; - for( cell = 1 ; cell <= endsuperG ; cell++ ){ - cellptr = cellarrayG[cell] ; - if( cellptr->celltype != CUSTOMCELLTYPE && cellptr->celltype != - SOFTCELLTYPE ){ - continue ; - } - numcells++ ; - - for( tileptr=cellptr->tiles;tileptr;tileptr = tileptr->next ){ - numtiles++ ; - } - /* count number of routing tiles if they exist */ - if( routingTilesG ){ - for( rtptr = routingTilesG[cell]; rtptr; rtptr = rtptr->next){ - numtiles++ ; - } - } - } /* end counting number of tiles */ - - /* now need to call compactor if no cells exist in the case of a single stdcell core */ - if( numtiles == 0 ){ - return ; + char filename[LRECL] ; + char *Yrelpath() ; + char *pathname ; + char *twdir ; /* path of TimberWolf directory */ + char *getenv() ; /* used to get TWDIR environment variable */ + char buffer[LRECL], *bufferptr ; + char **tokens ; /* for parsing file */ + INT numtokens, line ; + BOOL abort ; /* whether to abort program */ + INT cell, numtiles, numcells ; + INT xcenter, ycenter ; + INT xoffset, yoffset ; + INT l, r, b, t ; + INT closegraphics() ; + CELLBOXPTR cellptr ; + TILEBOXPTR tileptr ; + BOUNBOXPTR bounptr ; /* bounding box pointer */ + RTILEBOXPTR rtptr ; /* current routing tile */ + FILE *fp ; + INT type ; + + + /* ######### Create compaction file and exec compactor ######### */ + /* open compaction file for writing */ + sprintf(filename, "%s.mvio" , cktNameG ) ; + fp = TWOPEN( filename , "w", ABORT ) ; + + /* first count number of tiles and cells to be output */ + numtiles = 0 ; + numcells = 0 ; + for( cell = 1 ; cell <= endsuperG ; cell++ ){ + cellptr = cellarrayG[cell] ; + if( cellptr->celltype != CUSTOMCELLTYPE && cellptr->celltype != + SOFTCELLTYPE ){ + continue ; } + numcells++ ; - /* NOW output data */ + for( tileptr=cellptr->tiles;tileptr;tileptr = tileptr->next ){ + numtiles++ ; + } + /* count number of routing tiles if they exist */ + if( routingTilesG ){ + for( rtptr = routingTilesG[cell]; rtptr; rtptr = rtptr->next){ + numtiles++ ; + } + } + } /* end counting number of tiles */ - fprintf( fp, "numtiles:%d numcells:%d\n", numtiles, numcells ) ; - for( cell = 1 ; cell <= endsuperG; cell++ ){ - cellptr = cellarrayG[cell] ; - type = cellptr->celltype ; - if( type != CUSTOMCELLTYPE && type != SOFTCELLTYPE ){ - continue ; - } - xcenter = cellptr->xcenter ; - ycenter = cellptr->ycenter ; - xoffset = cellptr->bounBox[cellptr->orient]->l ; - yoffset = cellptr->bounBox[cellptr->orient]->b ; - - if( type == CUSTOMCELLTYPE || type == SOFTCELLTYPE ){ - fprintf( fp, "cell %d x:%d y:%d offset:%d %d\n", - cellarrayG[cell]->cellnum, xcenter, ycenter, - xoffset, yoffset ) ; - } else { - fprintf( fp, "stdcell %d x:%d y:%d offset:%d %d\n", - cellarrayG[cell]->cellnum, xcenter, ycenter, - xoffset, yoffset ) ; - } - - /* setup translation of output points */ - bounptr = cellptr->bounBox[0] ; - /* now init the translation routines using bounding box */ - Ytrans_init( bounptr->l,bounptr->b,bounptr->r,bounptr->t, - cellptr->orient ) ; - for( tileptr=cellptr->tiles;tileptr;tileptr = tileptr->next ){ - - l = tileptr->left ; - r = tileptr->right ; - b = tileptr->bottom ; - t = tileptr->top ; - - if( cellptr->softflag){ - /* ------------------------------------------------ - At this point, a softcells aspect ratio has - been fixed. So after placement set orig and current - fields of the tilebox to same value. After this - point, the current field will be used for the border - added during global route and the orig field is cell - size without routing border. - --------------------------------------------------*/ - if( compactFlag == FALSE ){ /* 1st time compact called */ - tileptr->orig_left = tileptr->left ; - tileptr->orig_right = tileptr->right ; - tileptr->orig_bottom = tileptr->bottom ; - tileptr->orig_top = tileptr->top ; - } - } - - /* calculate orientation for cell tiles */ - YtranslateC( &l,&b,&r,&t,cellptr->orient) ; - fprintf( fp, "l:%d r:%d b:%d t:%d\n", l,r,b,t ) ; - - } /* end tiles of a cell loop */ - - /* output routing tiles if they exist */ - if( routingTilesG ){ - for( rtptr = routingTilesG[cell]; rtptr; rtptr = rtptr->next){ - fprintf( fp, "l:%d r:%d b:%d t:%d\n", - rtptr->x1, rtptr->x2, rtptr->y1, rtptr->y2 ) ; - } - } - - } /* end cell loop */ - - TWCLOSE( fp ) ; - - - /* now call the compactor */ - /* find the path of compactor relative to main program */ - pathname = Yrelpath( argv0G, COMPACTPATH ) ; - if( !(YfileExists(pathname))){ - if( twdir = TWFLOWDIR ){ - sprintf( filename, "%s/bin/%s", twdir, COMPACTPROG ) ; - pathname = Ystrclone( filename ) ; - } + /* now need to call compactor if no cells exist in the case of a single stdcell core */ + if( numtiles == 0 ){ + return ; + } + + /* NOW output data */ + + fprintf( fp, "numtiles:%d numcells:%d\n", numtiles, numcells ) ; + for( cell = 1 ; cell <= endsuperG; cell++ ){ + cellptr = cellarrayG[cell] ; + type = cellptr->celltype ; + if( type != CUSTOMCELLTYPE && type != SOFTCELLTYPE ){ + continue ; } - if( doPartitionG ){ - sprintf( YmsgG, "%s -vn %s %d %d %d %d %d %d", pathname, - cktNameG, blockrG, blocktG, track_spacingXG,track_spacingYG, - track_spacingXG, track_spacingYG); - } else if( compactFlag == VIOLATIONSONLY ){ - sprintf( YmsgG, "%s -vn %s %d %d %d %d %d %d", pathname, - cktNameG, blockrG, blocktG, track_spacingXG,track_spacingYG, - track_spacingXG, track_spacingYG ); - } else if( compactFlag == COMPACT ){ - /* - sprintf( YmsgG, "%s -n %s %d %d 0 0 0 0", pathname, - cktNameG, blockrG, blocktG ); - */ - sprintf( YmsgG, "%s -cn %s %d %d %d %d 0 0", pathname, - cktNameG, blockrG, blocktG, track_spacingXG,track_spacingYG ); - - D( "twsc/compact_graphics", - sprintf( YmsgG, "%s -c %s %d %d %d %d 0 0", pathname, - cktNameG, blockrG, blocktG, track_spacingXG,track_spacingYG); - ) ; + xcenter = cellptr->xcenter ; + ycenter = cellptr->ycenter ; + xoffset = cellptr->bounBox[cellptr->orient]->l ; + yoffset = cellptr->bounBox[cellptr->orient]->b ; + + if( type == CUSTOMCELLTYPE || type == SOFTCELLTYPE ){ + fprintf( fp, "cell %d x:%d y:%d offset:%d %d\n", + cellarrayG[cell]->cellnum, xcenter, ycenter, + xoffset, yoffset ) ; } else { - M( ERRMSG,"compact", "unknown compact flag\n" ) ; - return ; + fprintf( fp, "stdcell %d x:%d y:%d offset:%d %d\n", + cellarrayG[cell]->cellnum, xcenter, ycenter, + xoffset, yoffset ) ; } - M( MSG, NULL, YmsgG ) ; - M( MSG, NULL, "\n" ) ; - /* Ysystme will kill program if catastrophe occurred */ - Ysystem( COMPACTPROG, ABORT, YmsgG, closegraphics ) ; - Ysafe_free( pathname ) ; /* free name created in Yrelpath */ - /* ############# end of compactor execution ############# */ - - - - /* **************** READ RESULTS of compaction ************/ - /* open compaction file for writing */ - M( MSG, NULL, "Reading results of compaction...\n" ) ; - sprintf(filename, "%s.mcpt" , cktNameG ) ; - fp = TWOPEN( filename , "r", ABORT ) ; - /* parse file */ - line = 0 ; - abort = FALSE ; - while( bufferptr=fgets(buffer,LRECL,fp )){ - /* parse file */ - line ++ ; /* increment line number */ - tokens = Ystrparser( bufferptr, ": \t\n", &numtokens ); - - if( numtokens == 0 ){ - /* skip over empty lines */ - continue ; - } else if( strcmp( tokens[0], INFOKEYWORD ) == STRINGEQ){ - /* look at first field for keyword */ - /* ie. numtiles:5 numcells:4 */ - if( numtokens != 4 ){ - sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; - M(ERRMSG, "compact", YmsgG ) ; - abort = TRUE ; - continue ; - } - if( numcells != atoi(tokens[3] ) ){ - M(ERRMSG, "compact", "number of cells incorrect" ) ; - abort = TRUE ; - } - if( abort ) break ; /* no sense in reading any longer */ - } else if( strcmp( tokens[0], CELLKEYWORD ) == STRINGEQ || - strcmp( tokens[0], SCELLKEYWORD ) == STRINGEQ ){ - /* cell 1 x:312 y:512 offet:39 40 or */ - /* softcell 1 x:312 y:512 offet:39 40 */ - /* look at first field for keyword */ - if( numtokens != 9 ){ - sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; - M(ERRMSG, "compact", YmsgG ) ; - abort = TRUE ; - continue ; - } - cell = atoi( tokens[1] ) ; - ASSERTNCONT( cell > 0 && cell <= endsuperG, "compact", - "cell out of bounds" ) ; - cellptr = cellarrayG[cell] ; - cellptr->xcenter = atoi(tokens[3] ) ; - cellptr->ycenter = atoi(tokens[5] ) ; - - } else if( strcmp( tokens[0], TILEKEYWORD ) == STRINGEQ){ - /* look at first field for keyword */ - /* l:-115 r:270 b:-85 t:85 */ - if( numtokens != 8 ){ - sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; - M(ERRMSG, "compact", YmsgG ) ; - abort = TRUE ; - continue ; - } - } else { - sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; - M(ERRMSG, "compact", YmsgG ) ; - abort = TRUE ; - continue ; - } + /* setup translation of output points */ + bounptr = cellptr->bounBox[0] ; + /* now init the translation routines using bounding box */ + Ytrans_init( bounptr->l,bounptr->b,bounptr->r,bounptr->t, + cellptr->orient ) ; + for( tileptr=cellptr->tiles;tileptr;tileptr = tileptr->next ){ + + l = tileptr->left ; + r = tileptr->right ; + b = tileptr->bottom ; + t = tileptr->top ; + + if( cellptr->softflag){ + /* ------------------------------------------------ + At this point, a softcells aspect ratio has + been fixed. So after placement set orig and current + fields of the tilebox to same value. After this + point, the current field will be used for the border + added during global route and the orig field is cell + size without routing border. + --------------------------------------------------*/ + if( compactFlag == FALSE ){ /* 1st time compact called */ + tileptr->orig_left = tileptr->left ; + tileptr->orig_right = tileptr->right ; + tileptr->orig_bottom = tileptr->bottom ; + tileptr->orig_top = tileptr->top ; + } + } + + /* calculate orientation for cell tiles */ + YtranslateC( &l,&b,&r,&t,cellptr->orient) ; + fprintf( fp, "l:%d r:%d b:%d t:%d\n", l,r,b,t ) ; + + } /* end tiles of a cell loop */ + + /* output routing tiles if they exist */ + if( routingTilesG ){ + for( rtptr = routingTilesG[cell]; rtptr; rtptr = rtptr->next){ + fprintf( fp, "l:%d r:%d b:%d t:%d\n", + rtptr->x1, rtptr->x2, rtptr->y1, rtptr->y2 ) ; + } } - TWCLOSE( fp ) ; - if( abort ){ - M(ERRMSG, "compact", "Problem with compaction. Must abort\n" ) ; - closegraphics() ; - YexitPgm( PGMFAIL ) ; + } /* end cell loop */ + + TWCLOSE( fp ) ; + + + /* now call the compactor */ + /* find the path of compactor relative to main program */ + pathname = Yrelpath( argv0G, COMPACTPATH ) ; + if( !(YfileExists(pathname))){ + /* Check if TWDIR overridden */ + if((twdir = getenv("TWDIR"))) { + M(MSG,NULL, "Directory overridden with 'TWDIR' environment variable\n" ) ; + } + else { + twdir = TWFLOWDIR; } - /* ************ END READ RESULTS of compaction ************/ + sprintf( filename, "%s/bin/%s", twdir, COMPACTPROG ) ; + pathname = Ystrclone( filename ) ; + } + if( doPartitionG ){ + sprintf( YmsgG, "%s -vn %s %d %d %d %d %d %d", pathname, + cktNameG, blockrG, blocktG, track_spacingXG,track_spacingYG, + track_spacingXG, track_spacingYG); + } else if( compactFlag == VIOLATIONSONLY ){ + sprintf( YmsgG, "%s -vn %s %d %d %d %d %d %d", pathname, + cktNameG, blockrG, blocktG, track_spacingXG,track_spacingYG, + track_spacingXG, track_spacingYG ); + } else if( compactFlag == COMPACT ){ + /* + sprintf( YmsgG, "%s -n %s %d %d 0 0 0 0", pathname, + cktNameG, blockrG, blocktG ); + */ + sprintf( YmsgG, "%s -cn %s %d %d %d %d 0 0", pathname, + cktNameG, blockrG, blocktG, track_spacingXG,track_spacingYG ); + + D( "twsc/compact_graphics", + sprintf( YmsgG, "%s -c %s %d %d %d %d 0 0", pathname, + cktNameG, blockrG, blocktG, track_spacingXG,track_spacingYG); + ) ; + } else { + M( ERRMSG,"compact", "unknown compact flag\n" ) ; + return ; + } + M( MSG, NULL, YmsgG ) ; + M( MSG, NULL, "\n" ) ; + /* Ysystme will kill program if catastrophe occurred */ + Ysystem( COMPACTPROG, ABORT, YmsgG, closegraphics ) ; + Ysafe_free( pathname ) ; /* free name created in Yrelpath */ + /* ############# end of compactor execution ############# */ + + + + /* **************** READ RESULTS of compaction ************/ + /* open compaction file for writing */ + M( MSG, NULL, "Reading results of compaction...\n" ) ; + sprintf(filename, "%s.mcpt" , cktNameG ) ; + fp = TWOPEN( filename , "r", ABORT ) ; + + /* parse file */ + line = 0 ; + abort = FALSE ; + while( bufferptr=fgets(buffer,LRECL,fp )){ + /* parse file */ + line ++ ; /* increment line number */ + tokens = Ystrparser( bufferptr, ": \t\n", &numtokens ); + + if( numtokens == 0 ){ + /* skip over empty lines */ + continue ; + } else if( strcmp( tokens[0], INFOKEYWORD ) == STRINGEQ){ + /* look at first field for keyword */ + /* ie. numtiles:5 numcells:4 */ + if( numtokens != 4 ){ + sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; + M(ERRMSG, "compact", YmsgG ) ; + abort = TRUE ; + continue ; + } + if( numcells != atoi(tokens[3] ) ){ + M(ERRMSG, "compact", "number of cells incorrect" ) ; + abort = TRUE ; + } + if( abort ) break ; /* no sense in reading any longer */ + } else if( strcmp( tokens[0], CELLKEYWORD ) == STRINGEQ || + strcmp( tokens[0], SCELLKEYWORD ) == STRINGEQ ){ + /* cell 1 x:312 y:512 offet:39 40 or */ + /* softcell 1 x:312 y:512 offet:39 40 */ + /* look at first field for keyword */ + if( numtokens != 9 ){ + sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; + M(ERRMSG, "compact", YmsgG ) ; + abort = TRUE ; + continue ; + } + cell = atoi( tokens[1] ) ; + ASSERTNCONT( cell > 0 && cell <= endsuperG, "compact", + "cell out of bounds" ) ; + cellptr = cellarrayG[cell] ; + cellptr->xcenter = atoi(tokens[3] ) ; + cellptr->ycenter = atoi(tokens[5] ) ; + + } else if( strcmp( tokens[0], TILEKEYWORD ) == STRINGEQ){ + /* look at first field for keyword */ + /* l:-115 r:270 b:-85 t:85 */ + if( numtokens != 8 ){ + sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; + M(ERRMSG, "compact", YmsgG ) ; + abort = TRUE ; + continue ; + } + } else { + sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; + M(ERRMSG, "compact", YmsgG ) ; + abort = TRUE ; + continue ; + } + } + TWCLOSE( fp ) ; + + if( abort ){ + M(ERRMSG, "compact", "Problem with compaction. Must abort\n" ) ; + closegraphics() ; + YexitPgm( PGMFAIL ) ; + } + /* ************ END READ RESULTS of compaction ************/ } /* end compact */ #define HOWMANY 0 /* need accurate cell centers in density calculation */ -get_cell_centers( cell, xc, yc ) -INT cell ; -INT *xc, *yc ; +void get_cell_centers( cell, xc, yc ) + INT cell ; + INT *xc, *yc ; { - INT last_core_cell ; + INT last_core_cell ; - last_core_cell = (INT) routingTilesG[HOWMANY] - 4 ; + last_core_cell = (INT) routingTilesG[HOWMANY] - 4 ; - if( cell <= last_core_cell ){ - *xc = cellarrayG[cell]->xcenter ; - *yc = cellarrayG[cell]->ycenter ; - } else { - /* pad macro */ - /* next line is equivalent to */ - /* cell = endpadgrpsG + (cell - last_core_cell) */ - cell += endpadgrpsG - last_core_cell ; - *xc = cellarrayG[cell]->xcenter ; - *yc = cellarrayG[cell]->ycenter ; - } + if( cell <= last_core_cell ){ + *xc = cellarrayG[cell]->xcenter ; + *yc = cellarrayG[cell]->ycenter ; + } else { + /* pad macro */ + /* next line is equivalent to */ + /* cell = endpadgrpsG + (cell - last_core_cell) */ + cell += endpadgrpsG - last_core_cell ; + *xc = cellarrayG[cell]->xcenter ; + *yc = cellarrayG[cell]->ycenter ; + } } /* end get_cell_centers */ diff -Nru graywolf-0.1.5/src/twmc/config1.c graywolf-0.1.6/src/twmc/config1.c --- graywolf-0.1.5/src/twmc/config1.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/config1.c 2018-08-11 21:48:56.000000000 +0000 @@ -68,20 +68,20 @@ after each configuration change. Thu Oct 17 11:47:32 EDT 1991 - added initialization. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) config1.c version 3.10 10/18/91" ; -#endif #include #include #include +#include +#include +#include #define NUMBINSPERCELL 4 /* we want average cell to be in 4 bins for accuracy */ #define WIREAREAUNKNOWN 0 /* at this time we don't know wire area */ #define UPDATE (BOOL) FALSE /* don't initialize updateFixedCells */ -config1() +void config1() { CELLBOXPTR cellptr ; @@ -211,7 +211,6 @@ "Calling TimberWolfMC recursively to scale data by %d\n", scale_dataG ) ; M( MSG, NULL, YmsgG ) ; - TWCLOSE( fpoG ) ; parasite = get_arg_string( arguments ) ; M( MSG, NULL, arguments ) ; M( MSG, NULL, "\n" ) ; diff -Nru graywolf-0.1.5/src/twmc/config2.c graywolf-0.1.6/src/twmc/config2.c --- graywolf-0.1.5/src/twmc/config2.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/config2.c 2018-08-11 21:48:56.000000000 +0000 @@ -55,17 +55,11 @@ Apr 23, 1990 - Now calculate total area based on all instances so that the wire estimation will be correct. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) config2.c version 3.3 9/5/90" ; -#endif #include #include -config2( numbinX, numbinY, wire_red_ratio ) -INT numbinX ; -INT numbinY ; -DOUBLE wire_red_ratio ; +void config2(INT numbinX, INT numbinY, DOUBLE wire_red_ratio ) { INT inst ; /* counter */ diff -Nru graywolf-0.1.5/src/twmc/configpads.c graywolf-0.1.6/src/twmc/configpads.c --- graywolf-0.1.5/src/twmc/configpads.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/configpads.c 2018-08-11 21:48:56.000000000 +0000 @@ -53,26 +53,26 @@ Thu Aug 29 15:44:00 CDT 1991 - added overflow processing code. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) configpads.c version 3.10 11/23/91" ; -#endif #include #include #include #include +#include + +#include "configpads.h" /* ***************** STATIC FUNCTION DEFINITIONS ******************* */ static BOOL check_overflow( P1(BOOL retain_pad_groups) ) ; -static move_clockwise( P4(INT pad, INT side, INT cw_side, INT moveable_cw) ) ; -static move_counterclockwise( P4(INT pad,INT side,INT ccw_side,INT m_ccw ) ) ; -static update_pad_position( P3(PADBOXPTR pad,INT current_side, INT move_side) ); -static expand_core( P1(INT side) ) ; +static void move_clockwise( P4(INT pad, INT side, INT cw_side, INT moveable_cw) ) ; +static void move_counterclockwise( P4(INT pad,INT side,INT ccw_side,INT m_ccw ) ) ; +static void update_pad_position( P3(PADBOXPTR pad,INT current_side, INT move_side) ); +static void expand_core( P1(INT side) ) ; static INT compare_overflow( P2(INT *side1, INT *side2) ) ; -static update_pad_groups( P1(void) ) ; -static resort_place_array( P1(void) ) ; -static child_constraints(P5(PADBOXPTR pad,INT side,DOUBLE lb,DOUBLE ub,BOOL s)); -static place_variable( P3(INT first,INT numpads,INT side) ) ; +static void update_pad_groups( P1(void) ) ; +static void resort_place_array( P1(void) ) ; +static void child_constraints(P5(PADBOXPTR pad,INT side,DOUBLE lb,DOUBLE ub,BOOL s)); +static void place_variable( P3(INT first,INT numpads,INT side) ) ; /* ***************** STATIC VARIABLE DEFINITIONS ******************* */ static INT overflowS[5] ; /* amount of overflow on each side */ @@ -81,7 +81,7 @@ static INT last_pad_on_sideS[5] ; /* index of last pad on side */ static INT pad_extraS ; /* insure that sort works correctly */ -align_pads() +void align_pads() { INT pad ; /* counter */ INT side ; /* current pad side */ @@ -335,7 +335,7 @@ } /* end check_overflow */ -static move_clockwise( pad, side, clockwise_side, moveable_cw ) +static void move_clockwise( pad, side, clockwise_side, moveable_cw ) INT pad, side, clockwise_side, moveable_cw ; { PADBOXPTR padptr ; /* current pad info */ @@ -352,7 +352,7 @@ } /* end move_clockwise */ -static move_counterclockwise( pad, side, counterclockwise, moveable_ccw ) +static void move_counterclockwise( pad, side, counterclockwise, moveable_ccw ) INT pad, side, counterclockwise, moveable_ccw ; { PADBOXPTR padptr ; /* current pad info */ @@ -368,7 +368,7 @@ } /* end move_counterclockwise */ -static update_pad_position( padptr, current_side, move_side ) +static void update_pad_position( padptr, current_side, move_side ) PADBOXPTR padptr ; /* current pad info */ INT current_side ; INT move_side ; @@ -392,7 +392,7 @@ } /* end switch side ... */ } /* end update_pad_position */ -static expand_core( side ) +static void expand_core( side ) INT side ; { INT i ; /* counter */ @@ -462,14 +462,14 @@ } } /* end compare_placearray */ -static resort_place_array() +static void resort_place_array() { Yquicksort( &(placearrayG[1]), numpadsG, sizeof(PADBOXPTR), compare_placearray ); } /* end resort_place_array */ /* ***************************************************************** */ /* set the lo_pos and hi_pos fields for the pads */ -static update_pad_groups() +static void update_pad_groups() { INT i ; /* pad counter */ @@ -503,7 +503,7 @@ } /* end update_pad_groups */ /* this will set the constaints for pad groups and children of them */ -static child_constraints( pad, side, lb, ub, spacing_restricted ) +static void child_constraints( pad, side, lb, ub, spacing_restricted ) PADBOXPTR pad ; INT side ; DOUBLE lb, ub ; @@ -526,12 +526,7 @@ } /* end child_constraints */ /* ***************************************************************** */ -calc_constraints( pad, side, lb, ub, spacing_restricted,lowpos, uppos ) -PADBOXPTR pad ; -INT side ; -DOUBLE *lb, *ub ; -BOOL *spacing_restricted ; -INT *lowpos, *uppos ; +void calc_constraints( PADBOXPTR pad, INT side, DOUBLE *lb, DOUBLE *ub, BOOL *spacing_restricted, INT *lowpos, INT *uppos ) { DOUBLE lowbound, hibound ; @@ -586,7 +581,7 @@ } /* end calc_constraints */ /* ***************************************************************** */ -static place_variable( first, numpads, side ) +static void place_variable( first, numpads, side ) INT first, numpads, side ; { INT pad ; /* counter */ @@ -644,7 +639,7 @@ } /* end place_variable */ -dimension_pads() +void dimension_pads() { INT i ; /* pad counter */ PADBOXPTR pad ; /* current pad */ @@ -686,7 +681,7 @@ /* ***************************************************************** */ -orient_pads() +void orient_pads() { INT i ; /* counter */ PADBOXPTR pad ; /* current pad info */ diff -Nru graywolf-0.1.5/src/twmc/configpads.h graywolf-0.1.6/src/twmc/configpads.h --- graywolf-0.1.5/src/twmc/configpads.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/src/twmc/configpads.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,7 @@ +#ifndef INC_TSMC_CONFIGPADS_H +#define INC_TSMC_CONFIGPADS_H + +void calc_constraints( PADBOXPTR pad, INT side, DOUBLE *lb, DOUBLE *ub, BOOL *spacing_restricted, INT *lowpos, INT *uppos ); + +#endif /* INC_TSMC_CONFIGPADS_H */ + diff -Nru graywolf-0.1.5/src/twmc/debug.c graywolf-0.1.6/src/twmc/debug.c --- graywolf-0.1.5/src/twmc/debug.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/debug.c 2018-08-11 21:48:56.000000000 +0000 @@ -47,9 +47,6 @@ Mar 30, 1989 - changed tile datastructure. Apr 23, 1990 - moved graph routines to library. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) debug.c version 3.3 9/5/90" ; -#endif #include /* #include */ @@ -64,7 +61,7 @@ /* ***************************************************************** DUMP CELL BIN LISTS */ -dcellList( cell ) +void dcellList( cell ) INT cell ; { INT binX, binY, limit ; @@ -150,7 +147,7 @@ /* ***************************************************************** DUMP CELL BIN LISTS */ -dbinList( flag ) +void dbinList( flag ) INT flag ; { INT x, y, limit ; @@ -204,7 +201,7 @@ /* ***************************************************************** DUMP OVERLAP BIN STRUCTURE */ -dbins( flag ) +void dbins( flag ) BOOL flag ; { @@ -254,7 +251,7 @@ /* ***************************************************************** DUMP MOVEBOX STRUCTURE */ -dmove() +void dmove() { INT i; @@ -296,7 +293,7 @@ /* ***************************************************************** DUMP TILEPTR STRUCTURE */ -dtile(cell) +void dtile(cell) INT cell ; { @@ -316,7 +313,7 @@ RELOAD BINS same as loadbins make call because of dbx bug. Also reinitializes nupenalty field */ -dloadbins( flag ) +void dloadbins( flag ) BOOL flag ; { INT x, y ; @@ -334,7 +331,7 @@ /* ***************************************************************** DUMP CURRENT CELL AREAS */ -dcellareas() +void dcellareas() { printf("Area without routing area:%d\n",calc_cellareas(FALSE) ) ; @@ -343,7 +340,7 @@ } /* end dcellareas */ #ifdef NEEDED -DORIENT( cell ) +void DORIENT( cell ) INT cell ; { FILE *fp ; @@ -464,7 +461,7 @@ } /* end dumpForce */ -dsoftpins( cell ) +void dsoftpins( cell ) INT cell ; { diff -Nru graywolf-0.1.5/src/twmc/dens.h graywolf-0.1.6/src/twmc/dens.h --- graywolf-0.1.5/src/twmc/dens.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/dens.h 2018-08-11 21:48:56.000000000 +0000 @@ -6,9 +6,6 @@ and added the TILE macro definitions. Wed May 1 19:16:12 EDT 1991 - added switchbox definition. ----------------------------------------------------------------- */ -/* ***************************************************************** - static char SccsId[] = "@(#) dens.h version 3.5 5/1/91" ; -***************************************************************** */ #ifndef DENS_H #define DENS_H diff -Nru graywolf-0.1.5/src/twmc/finalout.c graywolf-0.1.6/src/twmc/finalout.c --- graywolf-0.1.5/src/twmc/finalout.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/finalout.c 2018-08-11 21:48:56.000000000 +0000 @@ -72,12 +72,11 @@ Wed Jul 24 20:48:13 CDT 1991 - now always wait for user at the end of annealing if requested. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) finalout.c (Yale) version 3.15 7/24/91" ; -#endif #include #include +#include +#include /* redefine flags for easier reading */ #define VIOLATIONSONLY FALSE @@ -87,7 +86,12 @@ #define NOCONSTRAINTS FALSE #define CONSTRAINTS TRUE -finalout() + +void Output( INT cycle ); +void check_graphics(); +void prnt_cost( char * out_string ) ; + +void finalout() { INT c ; @@ -211,8 +215,7 @@ -Output( cycle ) -INT cycle ; +void Output( INT cycle ) { if( cycle == 0 || cycle < doCompactionG / 2 ){ @@ -228,8 +231,7 @@ } /* end Output */ /* print out the current cost to the user */ -prnt_cost( out_string ) -char *out_string ; +void prnt_cost( char * out_string ) { INT xspan ; INT yspan ; @@ -259,7 +261,7 @@ }/* end print_current_cost */ -check_graphics() +void check_graphics() { if( doGraphicsG && wait_for_userG ){ G( TWmessage( "TimberWolfMC waiting for your response" ) ) ; diff -Nru graywolf-0.1.5/src/twmc/finalpin.c graywolf-0.1.6/src/twmc/finalpin.c --- graywolf-0.1.5/src/twmc/finalpin.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/finalpin.c 2018-08-11 21:48:56.000000000 +0000 @@ -44,9 +44,6 @@ REVISIONS: Feb 7, 1990 - complete rewrite of finalpin. Now uses low temperature anneal. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) finalpin.c version 3.6 4/3/92" ; -#endif #include #include @@ -55,7 +52,7 @@ #define EXPECTEDNUMSITES 500 -finalpin() +void finalpin() { } @@ -71,7 +68,7 @@ static INT instS ; /* used to calculate diff from orig */ /* perform a low temperature anneal on pins */ -final_pin_place() +void final_pin_place() { INT i ; /* counter */ @@ -163,7 +160,7 @@ /* ***************************************************************** */ -update_sites( cellptr ) +void update_sites( cellptr ) CELLBOXPTR cellptr ; { @@ -493,7 +490,7 @@ } /* end update_sites */ -find_closest_site( cellptr, sitePtr, curSidePins, numsoftpins, +void find_closest_site( cellptr, sitePtr, curSidePins, numsoftpins, firstSite, lastSite ) CELLBOXPTR cellptr ; CONTENTPTR *sitePtr ; @@ -786,7 +783,7 @@ return( sites ) ; } /* end check_alloc */ -static set_pin_n_site( site_array, pin, site ) +static void set_pin_n_site( site_array, pin, site ) CONTENTPTR *site_array ; PINBOXPTR pin ; INT site ; @@ -809,7 +806,7 @@ /* ****************************************************************** */ -static init_hard_struct( cellptr ) +static void init_hard_struct( cellptr ) CELLBOXPTR cellptr ; { INT oright, otop ; /* calculate difference from bbox */ @@ -839,7 +836,7 @@ Wdiv2S = ROUND( val ) / 2 ; } /* end init_hard_struct */ -static find_new_hard_pos( pin ) +static void find_new_hard_pos( pin ) PINBOXPTR pin ; { DOUBLE val ; diff -Nru graywolf-0.1.5/src/twmc/findcheck.c graywolf-0.1.6/src/twmc/findcheck.c --- graywolf-0.1.5/src/twmc/findcheck.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/findcheck.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,16 +46,13 @@ Oct 25, 1988 - remove weights from funccost Mar 30, 1989 - changed tile datastructure. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) findcheck.c version 3.3 9/5/90" ; -#endif #include #include #include -finalcheck() +void finalcheck() { NETBOXPTR netptr ; @@ -132,7 +129,7 @@ -initcheck() +void initcheck() { NETBOXPTR netptr ; diff -Nru graywolf-0.1.5/src/twmc/findcost.c graywolf-0.1.6/src/twmc/findcost.c --- graywolf-0.1.5/src/twmc/findcost.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/findcost.c 2018-08-11 21:48:56.000000000 +0000 @@ -54,16 +54,13 @@ using cost only. Bin penalty doesn't matter. Apr 23, 1990 - added new debug code. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) findcost.c version 3.7 11/23/91" ; -#endif #include #include #include -findcost() +int findcost() { NETBOXPTR netptr ; diff -Nru graywolf-0.1.5/src/twmc/findloc.c graywolf-0.1.6/src/twmc/findloc.c --- graywolf-0.1.5/src/twmc/findloc.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/findloc.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,9 +37,6 @@ * */ -#ifndef lint -static char SccsId[] = "@(#) findloc.c version 3.3 9/5/90" ; -#endif #include #include @@ -61,11 +58,7 @@ * the best possible location in the site. */ -findLoc( pinptr, lArray, nPinLocs, HorV ) -PINBOXPTR pinptr ; -BOOL HorV ; -INT nPinLocs ; -FBOXPTR lArray ; +int findLoc( PINBOXPTR pinptr, FBOXPTR lArray, INT nPinLocs, BOOL HorV ) { INT bigoX , bigoY , litoX , litoY ; diff -Nru graywolf-0.1.5/src/twmc/findside.c graywolf-0.1.6/src/twmc/findside.c --- graywolf-0.1.5/src/twmc/findside.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/findside.c 2018-08-11 21:48:56.000000000 +0000 @@ -56,14 +56,12 @@ of T shaped cells. Now finds correct side. Wed Feb 13 23:35:07 EST 1991 - renamed set routines. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) findside.c version 3.5 2/13/91" ; -#endif #include #include #include #include +#include #define HOWMANY 0 @@ -123,10 +121,7 @@ /* load the side with a pin count and add factor */ -loadside( pSideArray, side , factor ) -PSIDEBOX *pSideArray ; -INT side ; -DOUBLE factor ; +void loadside( PSIDEBOX *pSideArray, INT side , DOUBLE factor ) { pSideArray[side].pincount += factor ; @@ -135,9 +130,7 @@ } /* end loadside */ -load_soft_pins( ptr, pSideArray ) -CELLBOXPTR ptr ; -PSIDEBOX *pSideArray ; +void load_soft_pins( CELLBOXPTR ptr, PSIDEBOX *pSideArray ) { INT i ; /* counter */ diff -Nru graywolf-0.1.5/src/twmc/findside.h graywolf-0.1.6/src/twmc/findside.h --- graywolf-0.1.5/src/twmc/findside.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/src/twmc/findside.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,12 @@ +#ifndef INC_FINDSIDE_H +#define INC_FINDSIDE_H + +#include +#include + + +void loadside( PSIDEBOX *pSideArray, INT side , DOUBLE factor ); +void load_soft_pins( CELLBOXPTR ptr, PSIDEBOX *pSideArray ); + +#endif /* INC_FINDSIDE_H */ + diff -Nru graywolf-0.1.5/src/twmc/fixcell.c graywolf-0.1.6/src/twmc/fixcell.c --- graywolf-0.1.5/src/twmc/fixcell.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/fixcell.c 2018-08-11 21:48:56.000000000 +0000 @@ -76,9 +76,6 @@ Wed Jul 24 20:43:22 CDT 1991 - added delete function for fixing cells. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) fixcell.c version 3.9 11/23/91" ; -#endif #include #include @@ -102,8 +99,7 @@ static INT oldxspanS ; static INT oldyspanS ; -VOID updateFixedCells( initializeFlag ) -BOOL initializeFlag ; +VOID updateFixedCells( BOOL initializeFlag ) { INT i ; @@ -512,10 +508,8 @@ /* In fixing a cell, determine which side of the core to reference */ /* cell so that changes to the position of the cell due to core size */ /* changes will be minimized. */ -VOID -determine_origin( x, y, left_not_right, bottom_not_top ) -INT *x, *y ; /* point of reference */ -char *left_not_right, *bottom_not_top ; +VOID determine_origin( INT *x, INT *y, char *left_not_right, char *bottom_not_top ) +//INT *x, *y ; /* point of reference */ { if( *x <= blockmxG ){ strcpy( left_not_right, "L" ) ; @@ -533,7 +527,7 @@ } } /* end determine_origin */ -delete_fix_constraint( cell ) +void delete_fix_constraint( cell ) INT cell ; { CELLBOXPTR ptr ; diff -Nru graywolf-0.1.5/src/twmc/genorient.c graywolf-0.1.6/src/twmc/genorient.c --- graywolf-0.1.5/src/twmc/genorient.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/genorient.c 2018-08-11 21:48:56.000000000 +0000 @@ -79,17 +79,18 @@ Sun May 5 14:27:53 EDT 1991 - fixed problem with orienting bounboxes. Had used wrong translation function. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) genorient.c (Yale) version 3.13 5/5/91" ; -#endif #include #include #include #include +#include + +void translate_numpins( CELLBOXPTR ptr ); +void trans_bbox( CELLBOXPTR ptr ); /* genorient works on range [lowerBound..upperBound] inclusive */ -genorient(lowerBound, upperBound) +void genorient(lowerBound, upperBound) INT lowerBound, upperBound ; { @@ -277,8 +278,7 @@ /* regenorient works on range [lowerBound..upperBound] inclusive */ /* recalculates the bounding boxes and updates all the views */ /* works in an incremental manner */ -regenorient(lowerBound, upperBound) -INT lowerBound, upperBound ; +void regenorient(INT lowerBound, INT upperBound) { INT cell ; @@ -325,8 +325,7 @@ /* trans_bbox - translate bounding box into 8 views */ -trans_bbox( ptr ) -CELLBOXPTR ptr ; +void trans_bbox( CELLBOXPTR ptr ) { INT orient ; @@ -355,7 +354,7 @@ } /* end trans_bbox() */ /* allocate space for and load termarray */ -loadTermArray() +void loadTermArray() { INT net ; PINBOXPTR pinptr ; @@ -368,8 +367,7 @@ } } /* end loadTermArray */ -translate_numpins( ptr ) -CELLBOXPTR ptr ; +void translate_numpins( CELLBOXPTR ptr ) { INT pt ; /* point counter */ INT minx ; /* looking for lowest y pt */ diff -Nru graywolf-0.1.5/src/twmc/gmain.c graywolf-0.1.6/src/twmc/gmain.c --- graywolf-0.1.5/src/twmc/gmain.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/gmain.c 2018-08-11 21:48:56.000000000 +0000 @@ -50,17 +50,18 @@ Wed May 1 19:17:23 EDT 1991 - added switchbox keyword so we can ignore these areas during wire estimation. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) gmain.c version 3.8 5/1/91" ; -#endif #define DENS_DEFS +#include #include #include #include #include #include +#include +#include +#include #include "config-build.h" @@ -69,193 +70,198 @@ -static free_routing_tiles(); +static void free_routing_tiles(); /* -------------------------------------------------------------------- - There are two ways to call the channel graph generator. - 1. updateNotChan == FALSE: - call the channel graph generator to build graph and input files - for the global router. - 2. updateNotChan == TRUE: - call the channel graph generator to read the density information - from the global router and build the routing tiles. We will - update the routing tiles in this file. --------------------------------------------------------------------- */ -gmain( updateNotChan ) -BOOL updateNotChan ; /* if true update routing tiles otherwise normal */ + There are two ways to call the channel graph generator. + 1. updateNotChan == FALSE: + call the channel graph generator to build graph and input files + for the global router. + 2. updateNotChan == TRUE: + call the channel graph generator to read the density information + from the global router and build the routing tiles. We will + update the routing tiles in this file. + -------------------------------------------------------------------- */ +void gmain( BOOL updateNotChan ) + /* if updateNotChan true update routing tiles otherwise normal */ { - char filename[LRECL] ; - char *Yrelpath() ; - char *pathname ; - char *twdir ; /* path of TimberWolf directory */ - char *getenv() ; /* used to get TWDIR environment variable */ - INT windowId ; /* windowId of current window */ - char buffer[LRECL], *bufferptr ; - char **tokens ; /* for parsing file */ - INT numtokens, line ; - INT closegraphics() ; - BOOL abort ; /* whether to abort program */ - INT cell ; - INT xc, yc ; /* xcenter and ycenter of cell */ - INT side ; /* side that routing tile is on */ - INT xcenter, ycenter ; /* xcenter and ycenter of cell */ - INT x1, x2, y1, y2 ; - INT ncells ; /* the number of cells in graph */ - CELLBOXPTR cptr ; - RTILEBOXPTR tmp ; /* current routing tile */ - RTILEBOXPTR tile ; /* current routing tile */ - FILE *fp ; - BOOL stateSaved = FALSE ; /* TRUE when graphics parasite mode */ - - /* ################### begin gengraph execution ################## */ - /* find the path of compactor relative to main program */ - pathname = Yrelpath( argv0G, GENGRAPHPATH ) ; - if( !(YfileExists(pathname))){ - if( twdir = TWFLOWDIR ){ - sprintf( filename, "%s/bin/%s", twdir, GENGRAPHPROG ) ; - pathname = Ystrclone( filename ) ; - } - } - if( updateNotChan ){ - /* never use graphics to update channel graph */ - sprintf( YmsgG, "%s -nr %s", pathname, cktNameG ) ; + char filename[LRECL] ; + char *Yrelpath() ; + char *pathname ; + char *twdir ; /* path of TimberWolf directory */ + char *getenv() ; /* used to get TWDIR environment variable */ + INT windowId ; /* windowId of current window */ + char buffer[LRECL], *bufferptr ; + char **tokens ; /* for parsing file */ + INT numtokens, line ; + INT closegraphics() ; + BOOL abort ; /* whether to abort program */ + INT cell ; + INT xc, yc ; /* xcenter and ycenter of cell */ + INT side ; /* side that routing tile is on */ + INT xcenter, ycenter ; /* xcenter and ycenter of cell */ + INT x1, x2, y1, y2 ; + INT ncells ; /* the number of cells in graph */ + CELLBOXPTR cptr ; + RTILEBOXPTR tmp ; /* current routing tile */ + RTILEBOXPTR tile ; /* current routing tile */ + FILE *fp ; + BOOL stateSaved = FALSE ; /* TRUE when graphics parasite mode */ + + /* ################### begin gengraph execution ################## */ + /* find the path of compactor relative to main program */ + pathname = Yrelpath( argv0G, GENGRAPHPATH ) ; + if( !(YfileExists(pathname))){ + /* Check if TWDIR overridden */ + if((twdir = getenv("TWDIR"))) { + M(MSG,NULL, "Directory overridden with 'TWDIR' environment variable\n" ) ; + } + else { + twdir = TWFLOWDIR; + } + sprintf( filename, "%s/bin/%s", twdir, GENGRAPHPROG ) ; + pathname = Ystrclone( filename ) ; + } + if( updateNotChan ){ + /* never use graphics to update channel graph */ + sprintf( YmsgG, "%s -nr %s", pathname, cktNameG ) ; + } else { + if( doGraphicsG ){ + G( windowId = TWsaveState() ) ; + stateSaved = TRUE ; + sprintf( YmsgG, "%s -w %s %d", pathname,cktNameG,windowId ) ; } else { - if( doGraphicsG ){ - G( windowId = TWsaveState() ) ; - stateSaved = TRUE ; - sprintf( YmsgG, "%s -w %s %d", pathname,cktNameG,windowId ) ; - } else { - sprintf( YmsgG, "%s -n %s", pathname, cktNameG ) ; - } - } - M( MSG, NULL, YmsgG ) ; - M( MSG, NULL, "\n" ) ; - /* Ysystem will kill program if catastrophe occurred */ - Ysystem( GENGRAPHPROG, ABORT, YmsgG, closegraphics ) ; - - if( stateSaved ){ - sleep(1) ; - /* if we save the graphics state we need to restore it */ - G( TWrestoreState() ) ; - } - Ysafe_free( pathname ) ; /* free name created in Yrelpath */ - /* ################### end of gengraph execution ################# */ - - - if( !(updateNotChan) ){ - /* no more work to do */ - return ; + sprintf( YmsgG, "%s -n %s", pathname, cktNameG ) ; } + } + M( MSG, NULL, YmsgG ) ; + M( MSG, NULL, "\n" ) ; + /* Ysystem will kill program if catastrophe occurred */ + Ysystem( GENGRAPHPROG, ABORT, YmsgG, closegraphics ) ; + + if( stateSaved ){ + sleep(1) ; + /* if we save the graphics state we need to restore it */ + G( TWrestoreState() ) ; + } + Ysafe_free( pathname ) ; /* free name created in Yrelpath */ + /* ################### end of gengraph execution ################# */ + + + if( !(updateNotChan) ){ + /* no more work to do */ + return ; + } + + /* ********************* read routing tiles *********************** */ + free_routing_tiles() ; + + /* number of cells is core cells + 4 pad blocks */ + ncells = numcellsG + 4 ; + + /* allocate list of routing tiles for cells */ + routingTilesG = (RTILEBOXPTR *) + Ysafe_calloc( ncells + 1, sizeof(RTILEBOXPTR) ); + + /* add number of cells to routing tile structure */ + routingTilesG[0] = (RTILEBOXPTR) ncells ; + + sprintf( filename, "%s.mtle", cktNameG ) ; + fp = TWOPEN( filename, "r", ABORT ) ; + + /* parse file */ + line = 0 ; + abort = FALSE ; + while( bufferptr=fgets(buffer,LRECL,fp )){ + /* parse file */ + line ++ ; /* increment line number */ + tokens = Ystrparser( bufferptr, " :\t\n", &numtokens ); - /* ********************* read routing tiles *********************** */ - free_routing_tiles() ; - - /* number of cells is core cells + 4 pad blocks */ - ncells = numcellsG + 4 ; - - /* allocate list of routing tiles for cells */ - routingTilesG = (RTILEBOXPTR *) - Ysafe_calloc( ncells + 1, sizeof(RTILEBOXPTR) ); - - /* add number of cells to routing tile structure */ - routingTilesG[0] = (RTILEBOXPTR) ncells ; - - sprintf( filename, "%s.mtle", cktNameG ) ; - fp = TWOPEN( filename, "r", ABORT ) ; + if( numtokens == 0 ){ + /* skip over empty lines */ + continue ; + } else if( numtokens == 16 || numtokens == 17 ){ + cell = atoi( tokens[1] ) ; + xc = atoi( tokens[3] ) ; + yc = atoi( tokens[5] ) ; + x1 = atoi( tokens[7] ) ; + y1 = atoi( tokens[9] ) ; + x2 = atoi( tokens[11] ) ; + y2 = atoi( tokens[13] ) ; + side = atoi( tokens[15] ) ; + + if( tmp = routingTilesG[cell] ){ + tile = routingTilesG[cell] = (RTILEBOXPTR) + Ysafe_malloc( sizeof(RTILEBOX) ); + tile->next = tmp ; + } else { + tile = routingTilesG[cell] = (RTILEBOXPTR) + Ysafe_malloc( sizeof(RTILEBOX) ); + tile->next = NULL ; + } + + /* check xcenter of the cells to see if we must adjust tile */ + if( cell <= numcellsG ){ + cptr = cellarrayG[cell] ; + } else { + cptr = cellarrayG[endpadgrpsG+cell-numcellsG] ; + } + xcenter = cptr->xcenter ; + ycenter = cptr->ycenter ; + + tile->x1 = x1 + xc - xcenter ; + tile->y1 = y1 + yc - ycenter ; + tile->x2 = x2 + xc - xcenter ; + tile->y2 = y2 + yc - ycenter ; + tile->side = side ; + if( numtokens == 17 ){ + if( strcmp( tokens[16], "switchbox" ) == STRINGEQ ){ + tile->switchbox = TRUE ; + } else { + tile->switchbox = FALSE ; + } + } else { + tile->switchbox = FALSE ; + } - /* parse file */ - line = 0 ; - abort = FALSE ; - while( bufferptr=fgets(buffer,LRECL,fp )){ - /* parse file */ - line ++ ; /* increment line number */ - tokens = Ystrparser( bufferptr, " :\t\n", &numtokens ); - - if( numtokens == 0 ){ - /* skip over empty lines */ - continue ; - } else if( numtokens == 16 || numtokens == 17 ){ - cell = atoi( tokens[1] ) ; - xc = atoi( tokens[3] ) ; - yc = atoi( tokens[5] ) ; - x1 = atoi( tokens[7] ) ; - y1 = atoi( tokens[9] ) ; - x2 = atoi( tokens[11] ) ; - y2 = atoi( tokens[13] ) ; - side = atoi( tokens[15] ) ; - - if( tmp = routingTilesG[cell] ){ - tile = routingTilesG[cell] = (RTILEBOXPTR) - Ysafe_malloc( sizeof(RTILEBOX) ); - tile->next = tmp ; - } else { - tile = routingTilesG[cell] = (RTILEBOXPTR) - Ysafe_malloc( sizeof(RTILEBOX) ); - tile->next = NULL ; - } - - /* check xcenter of the cells to see if we must adjust tile */ - if( cell <= numcellsG ){ - cptr = cellarrayG[cell] ; - } else { - cptr = cellarrayG[endpadgrpsG+cell-numcellsG] ; - } - xcenter = cptr->xcenter ; - ycenter = cptr->ycenter ; - - tile->x1 = x1 + xc - xcenter ; - tile->y1 = y1 + yc - ycenter ; - tile->x2 = x2 + xc - xcenter ; - tile->y2 = y2 + yc - ycenter ; - tile->side = side ; - if( numtokens == 17 ){ - if( strcmp( tokens[16], "switchbox" ) == STRINGEQ ){ - tile->switchbox = TRUE ; - } else { - tile->switchbox = FALSE ; - } - } else { - tile->switchbox = FALSE ; - } - - } else { - sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; - M(ERRMSG, "gmain", YmsgG ) ; - abort = TRUE ; - } - } - if( abort ){ - closegraphics() ; - YexitPgm( PGMFAIL ) ; - } - TWCLOSE( fp ) ; - /* ********************** end routing tiles ********************** */ + } else { + sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; + M(ERRMSG, "gmain", YmsgG ) ; + abort = TRUE ; + } + } + if( abort ){ + closegraphics() ; + YexitPgm( PGMFAIL ) ; + } + TWCLOSE( fp ) ; + /* ********************** end routing tiles ********************** */ } /* end gmain */ -init_routing_tiles() +void init_routing_tiles() { - routingTilesG = NULL ; + routingTilesG = NULL ; } /* end init_routing_tiles */ -static free_routing_tiles() +static void free_routing_tiles() { - INT cell ; /* cell counter */ - RTILEBOXPTR freeptr ; /* free tile */ - RTILEBOXPTR rptr ; /* traverse tiles */ - - /* free previous routing tiles if they exist */ - if( routingTilesG ){ - for( cell = 1 ; cell <= numcellsG; cell++ ){ - for( rptr = routingTilesG[cell]; rptr; ){ - freeptr = rptr ; - rptr = rptr->next ; - Ysafe_free( freeptr ) ; - } - } - Ysafe_free( routingTilesG ) ; - routingTilesG = NULL ; + INT cell ; /* cell counter */ + RTILEBOXPTR freeptr ; /* free tile */ + RTILEBOXPTR rptr ; /* traverse tiles */ + + /* free previous routing tiles if they exist */ + if( routingTilesG ){ + for( cell = 1 ; cell <= numcellsG; cell++ ){ + for( rptr = routingTilesG[cell]; rptr; ){ + freeptr = rptr ; + rptr = rptr->next ; + Ysafe_free( freeptr ) ; + } } + Ysafe_free( routingTilesG ) ; + routingTilesG = NULL ; + } } /* end free_routing_tiles */ diff -Nru graywolf-0.1.5/src/twmc/graphics.c graywolf-0.1.6/src/twmc/graphics.c --- graywolf-0.1.5/src/twmc/graphics.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/graphics.c 2018-08-11 21:48:56.000000000 +0000 @@ -80,13 +80,11 @@ Thu Aug 22 22:10:09 CDT 1991 - fixed problem with fixed cells moving during pairwise flips. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) graphics.c (Yale) version 3.17 10/18/91" ; -#endif #ifndef NOGRAPHICS #include +#include #include #include #include @@ -97,6 +95,9 @@ #include #include #include +#include +#include +#include #define CELLEST 0 @@ -166,14 +167,18 @@ /* Forward references */ INT draw_the_data() ; -static draw_fs(); -static edit_cell(); -static edit_field_string(); -static edit_field_case(); -static fix_the_cell(); -static fix_the_cell2(); +static void draw_fs(); +static void edit_cell(); +static void edit_field_string(); +static void edit_field_case(); +static void fix_the_cell(); +static void fix_the_cell2(); + +void set_graphics_wait_menu( TWMENUBOX menus[] ); +void twmc_draw_a_cell( int cell ); +void draw_neighbors( INT cell ); -initMCGraphics( argc, argv, windowId ) +void initMCGraphics( argc, argv, windowId ) INT argc, windowId ; char *argv[] ; { @@ -231,7 +236,7 @@ } /* end initMCGraphics */ -setGraphicWindow() +void setGraphicWindow() { INT expand ; INT minx ; @@ -269,8 +274,7 @@ /* set what we are going to draw on a dump to the screen */ /* placement data, compaction data , etc. are valid */ -set_graphic_context( context ) -INT context ; +void set_graphic_context( INT context ) { if( context == PARTITION_PLACEMENT ){ /* after placement ignore drawing the standard macros */ @@ -280,7 +284,7 @@ } /* end set_graphic_context */ /* heart of the graphic system processes user input */ -process_graphics() +void process_graphics() { INT x1, y1, x2, y2 ; /* coordinates for fixing cells and neighhds */ @@ -889,7 +893,7 @@ } /* end draw_the_data */ -twmc_draw_a_cell( cell ) +void twmc_draw_a_cell( int cell ) { INT pt ; INT xc, yc ; @@ -1007,7 +1011,7 @@ } /* end TWdrawCell */ -static draw_fs( cptr ) +static void draw_fs( cptr ) CELLBOXPTR cptr ; { INT x[10], y[10] ; /* only 10 points to an F */ @@ -1049,8 +1053,7 @@ } /* end draw_fs */ /* draw the neighborhood of a cell if it exists */ -draw_neighbors( cell ) -INT cell ; +void draw_neighbors( INT cell ) { CELLBOXPTR ptr ; @@ -1090,7 +1093,7 @@ } /* end draw_neighbors */ /* avoid dump when we don't want it */ -dsetDump( flag ) +void dsetDump( flag ) BOOL flag ; { avoidDump = flag ; @@ -1103,7 +1106,7 @@ } /* dumps the data to a file for future study */ -graphics_dump() +void graphics_dump() { /* now change mode to dump to file */ TWsetMode(1) ; @@ -1113,7 +1116,7 @@ TWsetMode(0) ; } /* end graphics_dump() */ -static edit_cell( cell ) +static void edit_cell( cell ) INT cell ; { @@ -1262,7 +1265,7 @@ } /* end edit_tiles */ -static edit_field_string( dialog, field, string ) +static void edit_field_string( dialog, field, string ) TWDIALOGPTR dialog; /* dialog record */ INT field ; char *string ; @@ -1271,7 +1274,7 @@ } /* end edit_field_string */ -static edit_field_case( dialog, field, initcase ) +static void edit_field_case( dialog, field, initcase ) TWDIALOGPTR dialog; /* dialog record */ INT field ; INT initcase ; @@ -1282,8 +1285,7 @@ } /* end edit_field_case */ -set_graphics_wait_menu( menus ) -TWMENUBOX menus[] ; +void set_graphics_wait_menu( TWMENUBOX menus[] ) { INT i ; /* counter */ for( i = 0; i < TWNUMMENUS; i++ ){ @@ -1302,7 +1304,7 @@ } } -static fix_the_cell( cell ) +static void fix_the_cell( cell ) INT cell ; { INT i ; /* counter */ @@ -1318,7 +1320,7 @@ cellarrayG[cell]->orientList[HOWMANYORIENT] = 1 ; } /* end fix_the_cell */ -static fix_the_cell2( cell ) +static void fix_the_cell2( cell ) INT cell ; { INT x1, y1 ; diff -Nru graywolf-0.1.5/src/twmc/initialize.c graywolf-0.1.6/src/twmc/initialize.c --- graywolf-0.1.5/src/twmc/initialize.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/initialize.c 2018-08-11 21:48:56.000000000 +0000 @@ -116,9 +116,6 @@ Fri Oct 18 00:06:37 EDT 1991 - moved buster code to library and updated for new NIL definition. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) initialize.c version 3.24 10/18/91" ; -#endif #include #include @@ -129,6 +126,7 @@ #include #include #include +#include /* below is what we expect to be a large floorplanning input */ @@ -155,6 +153,13 @@ } \ } \ +#define ERRORABORTINT() \ +{ \ + if( errorFlagS ){ \ + return -1; /* don't do any work for errors */ \ + } \ +} \ + /* ###################### STATIC definitions ######################### */ static INT curCellTypeS ; /* current cell type - ie, softcell,pad etc.*/ static INT cellinstanceS ; /* number of instances of current cell */ @@ -198,12 +203,12 @@ -static check_pos(); +static void check_pos(); /* set processing switch to avoid work when an error is found */ -setErrorFlag() +void setErrorFlag() { errorFlagS = TRUE ; } /* end setErrorFlag */ @@ -217,7 +222,7 @@ /* ***************************************************************** */ /* initialize global and static information */ -initCellInfo() +void initCellInfo() { numcellsG = 0 ; numnetsG = 0 ; @@ -255,7 +260,7 @@ /* ***************************************************************** */ /* cleanup operations at the end of readcells */ -cleanupReadCells() +void cleanupReadCells() { INT cell ; /* cell counter */ PADBOXPTR padptr ; /* current pad */ @@ -336,9 +341,7 @@ /* ***************************************************************** */ /* add another cell to cell list and initialize fields */ -addCell( cellName, cellType ) -char *cellName ; -CELLTYPE cellType ; +void addCell( char * cellName, CELLTYPE cellType ) { INT i ; INT *data ; @@ -475,7 +478,7 @@ /* ***************************************************************** */ /* perform cleanup operations on a cell */ -endCell() +void endCell() { ERRORABORT() ; @@ -534,10 +537,8 @@ /* ***************************************************************** */ -fixCell( fixedType, xloc, lorR, yloc, borT, xloc2, lorR2, yloc2, borT2 ) -INT fixedType ; /* valid types - neighborhood. point, group */ -INT xloc, yloc, xloc2, yloc2 ; -char *lorR, *borT, *lorR2, *borT2 ; +void fixCell( INT fixedType, INT xloc, char *lorR, INT yloc, char *borT, INT xloc2, char *lorR2, INT yloc2, char *borT2 ) +//INT fixedType ; /* valid types - neighborhood. point, group */ { INT leftOrRight, bottomOrTop ; @@ -612,8 +613,7 @@ } /* end fixCell */ -processCorners( numcorners ) -INT numcorners ; +void processCorners( INT numcorners ) { char *buster_msg ; /* message string to used by buster */ INT xx1, yy1, xx2, yy2 ; /* temp points */ @@ -790,8 +790,7 @@ } /* end processCorners */ /* ***************************************************************** */ -addCorner( xpos, ypos ) -INT xpos, ypos ; +void addCorner( INT xpos, INT ypos ) { if( ++cornerCountS >= tileptAllocS ){ tileptAllocS = cornerCountS + 1 ; @@ -819,8 +818,7 @@ } /* end addCorner */ /* ***************************************************************** */ -initializeCorner( cell ) -INT cell ; +void initializeCorner( INT cell ) { ptrS = cellarrayG[cell] ; curCellTypeS = ptrS->celltype ; @@ -828,8 +826,7 @@ } /* end initializeCorner */ /* ***************************************************************** */ -addClass( class ) -INT class ; +void addClass( INT class ) { ERRORABORT() ; @@ -842,7 +839,7 @@ /* ***************************************************************** */ /* first in the list is the initial orientation */ -initOrient( orient ) +void initOrient( orient ) INT orient ; { ERRORABORT() ; @@ -853,8 +850,7 @@ /* ***************************************************************** */ /* addOrient sets orientation valid for this cell */ -addOrient( orient ) -INT orient ; +void addOrient( INT orient ) { ERRORABORT() ; @@ -866,17 +862,16 @@ /* if this routine is called it means we are reading the input of a previous TimberWolf run. */ -set_cur_orient( orient ) -INT orient ; +int set_cur_orient( INT orient ) { -ERRORABORT() ; +ERRORABORTINT() ; ptrS->orient = orient ; } /* end set_cur_orient */ /* ***************************************************************** */ /* load aspect ratios */ -addAspectBounds( lowerBound, upperBound ) +void addAspectBounds( lowerBound, upperBound ) DOUBLE lowerBound, upperBound ; { ERRORABORT() ; @@ -986,7 +981,7 @@ } /* add pin and net */ /* ***************************************************************** */ -addPin( pinName, signal, layer, pinType ) +void addPin( pinName, signal, layer, pinType ) char *pinName ; char *signal ; INT layer ; @@ -1084,7 +1079,7 @@ } /* end addPin */ /* ***************************************************************** */ -set_pin_pos( xpos, ypos ) +void set_pin_pos( xpos, ypos ) INT xpos, ypos ; { INT side ; @@ -1122,7 +1117,7 @@ } /* end set_pin_pos */ /* ***************************************************************** */ -static check_pos( pinname, xpos, ypos ) +static void check_pos( pinname, xpos, ypos ) char *pinname ; INT xpos, ypos ; { @@ -1135,7 +1130,7 @@ } /* end check_pos */ /* add an equivalent pin-updates the pin position to effective position */ -addEquivPin( pinName, layer, xpos, ypos, pinType ) +void addEquivPin( pinName, layer, xpos, ypos, pinType ) char *pinName ; INT layer ; INT xpos, ypos ; @@ -1216,14 +1211,14 @@ } /* end addEquivPin */ /* ***************************************************************** */ -set_restrict_type( object ) +void set_restrict_type( object ) INT object ; { cur_restrict_objS = object ; } /* ***************************************************************** */ -addSideRestriction( side ) +void addSideRestriction( side ) INT side ; { INT howmany ; @@ -1271,7 +1266,7 @@ /* ***************************************************************** */ -add_pinspace( lower, upper ) +void add_pinspace( lower, upper ) DOUBLE lower ; DOUBLE upper ; { @@ -1319,7 +1314,7 @@ } /* end add_pinspace */ /* ***************************************************************** */ -add_soft_array() +void add_soft_array() { INT i ; PINBOXPTR *sarray ; @@ -1338,7 +1333,7 @@ } /* end add_soft_array */ -start_pin_group( pingroup, permute ) +void start_pin_group( pingroup, permute ) char *pingroup ; BOOL permute ; { @@ -1416,7 +1411,7 @@ /* ***************************************************************** */ /* add this pad to the current pad group */ -add2pingroup( pinName, ordered ) +void add2pingroup( pinName, ordered ) char *pinName ; BOOL ordered ; /* ordered flag is true if padgroup is fixed */ { @@ -1510,7 +1505,7 @@ } /* end add2pingroup */ /* ***************************************************************** */ -addSideSpace( lower, upper ) +void addSideSpace( lower, upper ) DOUBLE lower ; DOUBLE upper ; { @@ -1540,7 +1535,7 @@ } /* end addSideSpace */ /* ***************************************************************** */ -addPadSide( side ) +void addPadSide( side ) char *side ; { @@ -1578,7 +1573,7 @@ /* ***************************************************************** */ /* set whether a pad group can be permuted */ -setPermutation( permuteFlag ) +void setPermutation( int permuteFlag ) { ERRORABORT() ; pptrS->permute = permuteFlag ; @@ -1586,7 +1581,7 @@ /* ***************************************************************** */ /* add this pad to the current pad group */ -add2padgroup( padName, ordered ) +void add2padgroup( padName, ordered ) char *padName ; BOOL ordered ; /* ordered flag is true if pad is ordered in padgroup */ { @@ -1656,7 +1651,7 @@ } /* end add2PadGroup */ /* ***************************************************************** */ -add_cell_to_group( cellName ) +void add_cell_to_group( cellName ) char *cellName ; { GLISTPTR tempCell ; @@ -1698,7 +1693,7 @@ } /* end add_cell_to_group */ /* add a cell to the instance array of the defining cell */ -add_instance( instName ) +void add_instance( instName ) char *instName ; { if( cellinstanceS++ == 0 ){ @@ -1765,7 +1760,7 @@ return( tileptAllocS / 2 ) ; } /* end get_tile_count() */ -add_analog( numcorners ) +void add_analog( numcorners ) INT numcorners ; { ERRORABORT() ; @@ -1786,8 +1781,8 @@ analogS->num_corners = numcorners ; cornerCountS = 0 ; } else { - analogS->x_contour = NIL(INT) ; - analogS->y_contour = NIL(INT) ; + analogS->x_contour = NIL(INT *) ; + analogS->y_contour = NIL(INT *) ; analogS->num_corners = 0 ; } analogS->current = INIT_CURRENT ; @@ -1796,7 +1791,7 @@ } /* end add_analog */ -add_pin_contour( x, y ) +void add_pin_contour( x, y ) INT x, y ; { if( cornerCountS >= analogS->num_corners ){ @@ -1812,7 +1807,7 @@ } /* end start_pin_contour */ -add_current( current ) +void add_current( current ) FLOAT current ; { if(!(analogS)){ @@ -1821,7 +1816,7 @@ analogS->current = current ; } /* end add_current */ -add_power( power ) +void add_power( power ) FLOAT power ; { if(!(analogS)){ @@ -1830,7 +1825,7 @@ analogS->power = power ; } /* end add_power */ -no_layer_change() +void no_layer_change() { if(!(analogS)){ add_analog( 0 ) ; @@ -1838,7 +1833,7 @@ analogS->no_layer_change = TRUE ; } /* end no_cross_under */ -process_pin() +void process_pin() { INT i ; /* point counter */ INT side ; /* current side for pin */ diff -Nru graywolf-0.1.5/src/twmc/initialize.h graywolf-0.1.6/src/twmc/initialize.h --- graywolf-0.1.5/src/twmc/initialize.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/initialize.h 2018-08-11 21:48:56.000000000 +0000 @@ -5,9 +5,6 @@ DATE: March 15, 1990 REVISIONS: Wed Dec 19 19:38:46 EST 1990 - added analog pin type. ----------------------------------------------------------------- */ -/* ***************************************************************** - static char SccsId[] = "@(#) initialize.h version 3.4 12/19/90" ; -***************************************************************** */ #ifndef INITIALIZE_H #define INITIALIZE_H @@ -19,4 +16,14 @@ #define ADDEQUIVTYPE 6 #define ANALOGPINTYPE 7 +void fixCell( INT fixedType, INT xloc, char *lorR, INT yloc, char *borT, INT xloc2, char *lorR2, INT yloc2, char *borT2 ); + +void addClass( INT class ); + +void addCell( char * cellName, CELLTYPE cellType ); + +void endCell(); + +void addOrient( INT orient ); + #endif /* INITIALIZE_H */ diff -Nru graywolf-0.1.5/src/twmc/initnets.c graywolf-0.1.6/src/twmc/initnets.c --- graywolf-0.1.5/src/twmc/initnets.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/initnets.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,15 +46,14 @@ REVISIONS: Thu Dec 20 00:02:54 EST 1990 - made net cap and res. matches work. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) initnets.c version 1.5 10/18/91" ; -#endif #include #include +#include #include #include #include /* redefine yacc and lex globals */ +#include #define HOWMANY 0 @@ -71,8 +70,12 @@ static ANETPTR aptrS ; /* current analog net information record */ static COMMONPTR commonS ; /* current common point record */ +void build_path_array(); +void add_paths_to_cells(); + + /* initialization before parsing nets */ -init_nets() +void init_nets() { YHASHPTR getNetTable() ; numpathsG = 0 ; @@ -83,7 +86,7 @@ /* cleanup after parsing nets */ -cleanup_nets() +void cleanup_nets() { if( abortFlagS ){ closegraphics() ; @@ -95,7 +98,7 @@ add_paths_to_cells() ; } /* end cleanup_nets */ -set_net_error() +void set_net_error() { abortFlagS = TRUE ; } /* end set_net_error */ @@ -125,7 +128,7 @@ } } /* end find_net */ -add_path( pathFlag, net ) +void add_path( pathFlag, net ) BOOL pathFlag ; char *net ; { @@ -164,7 +167,7 @@ } /* end add_path */ -end_path(lower_bound, upper_bound, priority ) +void end_path(lower_bound, upper_bound, priority ) INT lower_bound, upper_bound, priority ; { GLISTPTR nets, path_ptr, tempPath ; @@ -204,7 +207,7 @@ } /* end function end_path */ -build_path_array() +void build_path_array() { INT i ; PATHPTR curPtr ; @@ -226,7 +229,7 @@ return( total_num_pathS ) ; } /* end get_total_paths */ -add_paths_to_cells() +void add_paths_to_cells() { INT i, j ; INT howmany ; @@ -270,7 +273,7 @@ } } /* end add_paths_to_cells */ -init_analog( net ) +void init_analog( net ) char *net ; { INT anet ; @@ -290,19 +293,19 @@ } /* end init_analog */ -set_cap_upper_bound( cap ) +void set_cap_upper_bound( cap ) DOUBLE cap ; { aptrS->cap_upper_bound = cap ; } /* end set_cap_upper_bound */ -set_res_upper_bound( res ) +void set_res_upper_bound( res ) DOUBLE res ; { aptrS->res_upper_bound = res ; } /* end set_res_upper_bound */ -set_net_type( net_type ) +void set_net_type( net_type ) INT net_type ; { switch( net_type ){ @@ -318,13 +321,13 @@ } } /* end set_net_type */ -set_max_voltage_drop( drop ) +void set_max_voltage_drop( drop ) DOUBLE drop ; { aptrS->max_drop = drop ; } /* end set_max_voltage_drop */ -add_common_pt() +void add_common_pt() { INT pt ; /* current number of common pts */ @@ -341,9 +344,9 @@ } commonS = aptrS->common_pts[pt-1] = (COMMONPTR) Ysafe_calloc( 1, sizeof(COMMONBOX) ) ; - commonS->common_set = NIL(INT) ; - commonS->cap_match = NIL(INT) ; - commonS->res_match = NIL(INT) ; + commonS->common_set = NIL(INT *) ; + commonS->cap_match = NIL(INT *) ; + commonS->res_match = NIL(INT *) ; commonS->num_pins = 0 ; } /* end common_pt */ @@ -367,7 +370,7 @@ return( 0 ) ; } -add2common( cell, pin ) +void add2common( cell, pin ) char *cell ; char *pin ; { @@ -400,7 +403,7 @@ } /* add2common */ -common_cap( cell, pin ) +void common_cap( cell, pin ) char *cell ; char *pin ; { @@ -433,7 +436,7 @@ } /* end common_cap */ -common_res( cell, pin ) +void common_res( cell, pin ) char *cell ; char *pin ; { @@ -466,7 +469,7 @@ } /* end common_res */ -start_net_capmatch( netname ) +void start_net_capmatch( netname ) char *netname ; { INT net ; /* index in netarray */ @@ -485,7 +488,7 @@ match[1] = net ; } /* end start_net_capmatch */ -add_net_capmatch( netname ) +void add_net_capmatch( netname ) char *netname ; { INT net ; /* index in netarray */ @@ -502,7 +505,7 @@ net_cap_matchG[numcapmatchS][howmany] = net ; } /* end add_netcapmatch */ -start_net_resmatch( netname ) +void start_net_resmatch( netname ) char *netname ; { INT net ; /* index in netarray */ @@ -521,7 +524,7 @@ match[1] = net ; } /* end start_net_resmatch */ -add_net_resmatch( netname ) +void add_net_resmatch( netname ) char *netname ; { INT net ; /* index in netarray */ diff -Nru graywolf-0.1.5/src/twmc/initnets.h graywolf-0.1.6/src/twmc/initnets.h --- graywolf-0.1.5/src/twmc/initnets.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/src/twmc/initnets.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,8 @@ +#ifndef __TWMC_INITNETS_H__ +#define __TWMC_INITNETS_H__ + +void end_path(INT lower_bound, INT upper_bound, INT priority); +void add_path(BOOL pathFlag, char* net); + +#endif // __TWMC_INITNETS_H__ + diff -Nru graywolf-0.1.5/src/twmc/loadbins.c graywolf-0.1.6/src/twmc/loadbins.c --- graywolf-0.1.5/src/twmc/loadbins.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/loadbins.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,9 +49,6 @@ May 11, 1989 - eliminated routing Flag override. Mon Feb 4 02:11:27 EST 1991 - added new wire estimator function. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) loadbins.c version 3.4 2/4/91" ; -#endif #include #include @@ -62,8 +59,7 @@ /* if defined the binpenalty should always remain equal to cell area */ /* #define BINTEST */ -loadbins(wireAreaKnown) -BOOL wireAreaKnown ; +void loadbins(BOOL wireAreaKnown) { CELLBOXPTR ptr ; @@ -223,8 +219,7 @@ /* ***************************************************************** CALCULATE CELL AREAS */ -INT calc_cellareas( routingFlag ) -BOOL routingFlag ; +INT calc_cellareas(BOOL routingFlag ) { INT totArea, orient, cell, l, r, b, t, xc, yc ; CELLBOXPTR cellptr ; diff -Nru graywolf-0.1.5/src/twmc/main.c graywolf-0.1.6/src/twmc/main.c --- graywolf-0.1.5/src/twmc/main.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/main.c 2018-08-11 21:48:56.000000000 +0000 @@ -91,9 +91,6 @@ Wed Jun 5 16:28:05 CDT 1991 - added condition for initializing aspect ratios. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) main.c version 3.27 11/23/91" ; -#endif #include @@ -105,6 +102,8 @@ #include #include #include +#include +#include "readpar.h" #define VERSION "v2.2" #define EXPECTEDMEMORY (1024 * 1024) @@ -118,588 +117,591 @@ static INT windowIdS ; /* the master window id if given */ static DOUBLE wire_red_ratioS = NOREDUCTION ; /* wire reduction */ +extern void make_movebox(void); + +void writeResults( INT wire, INT penal, INT rand ); + /* Forward declarations */ VOID syntax(); INT closegraphics(); -main( argc , argv ) -INT argc ; -char *argv[] ; +int main(int argc, char ** argv) { - FILE *fp ; - char filename[LRECL], - arguments[LRECL], /* pointer to argument options */ - *ptr, /* pointer to argument options */ - *Ystrclone() ; - INT yaleIntro(), - attempts, - arg_count ; /* argument counter */ - INT rememberWire, /* variables for writing history of run */ - rememberPenal, - rememberRand ; - BOOL get_arg_string( P1(char *arguments) ) ; - DOUBLE calc_init_lapFactor() , - calc_init_timeFactor() , - calc_init_coreFactor() , - analyze() , - totFunc, - totPen, - avgdTime, - avgdFunc ; + FILE *fp ; + char filename[LRECL], + arguments[LRECL], /* pointer to argument options */ + *ptr, /* pointer to argument options */ + *Ystrclone() ; + INT yaleIntro(), + attempts, + arg_count ; /* argument counter */ + INT rememberWire, /* variables for writing history of run */ + rememberPenal, + rememberRand ; + BOOL get_arg_string( P1(char *arguments) ) ; + DOUBLE calc_init_lapFactor() , + calc_init_timeFactor() , + calc_init_coreFactor() , + analyze() , + totFunc, + totPen, + avgdTime, + avgdFunc ; - /* ********************** start initialization *********************** */ + /* ********************** start initialization *********************** */ #ifdef DEBUGX - extern int _Xdebug ; - _Xdebug = TRUE ; + extern int _Xdebug ; + _Xdebug = TRUE ; #endif - /* start up cleanup handler */ - YINITCLEANUP( argv[0], NULL, MAYBEDUMP ) ; + /* start up cleanup handler */ + YINITCLEANUP( argv[0], NULL, MAYBEDUMP ) ; - Yinit_memsize( EXPECTEDMEMORY ) ; + Yinit_memsize( EXPECTEDMEMORY ) ; - if( argc < 2 || argc > 5 ){ - syntax() ; - } else { - debugS = FALSE ; - verboseG = FALSE ; - parasiteS = FALSE ; - quickrouteG = FALSE ; - windowIdS = 0 ; - scale_dataG = 0 ; - batchS = FALSE ; + if( argc < 2 || argc > 5 ){ + syntax() ; + } else { + debugS = FALSE ; + verboseG = FALSE ; + parasiteS = FALSE ; + quickrouteG = FALSE ; + windowIdS = 0 ; + scale_dataG = 0 ; + batchS = FALSE ; #ifndef NOGRAPHICS - doGraphicsG = TRUE ; + doGraphicsG = TRUE ; #else /* NOGRAPHICS case */ - doGraphicsG = FALSE ; + doGraphicsG = FALSE ; #endif /* NOGRAPHICS */ - arg_count = 1 ; - if( *argv[1] == '-' ){ - for( ptr = ++argv[1]; *ptr; ptr++ ){ - switch( *ptr ){ - case 'b': - batchS = TRUE ; - doGraphicsG = FALSE ; - break ; - case 'd': - debugS = TRUE ; - break ; - case 'n': - doGraphicsG = FALSE ; - break ; - case 'o': /* overflow */ - scale_dataG = atoi( argv[++arg_count] ) ; - break ; - case 'p': - padsOnlyS = TRUE ; - break ; - case 'q': - quickrouteG = TRUE ; - break ; - case 'v': - verboseG = TRUE ; - break ; - case 'w': - parasiteS = TRUE ; - break ; - default: - sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; - M(ERRMSG,"main",YmsgG); - syntax() ; - } - } - YdebugMemory( debugS ) ; - - /* handle I/O requests */ - argv0G = Ystrclone( argv[0] ) ; - cktNameG = Ystrclone( argv[++arg_count] ); - sprintf( filename, "%s.mout" , cktNameG ) ; - if( scale_dataG ){ - fpoG = TWOPEN( filename, "a", ABORT ) ; - } else { - fpoG = TWOPEN( filename, "w", ABORT ) ; - } - Ymessage_init(fpoG) ; - Ymessage_mode( verboseG ) ; - - YinitProgram( "TimberWolfMC", VERSION, yaleIntro ); - - /* now tell the user what he picked */ - M(MSG,NULL,"\n\nTimberWolfMC switches:\n" ) ; - if( debugS ){ - YsetDebug( TRUE ) ; - M(MSG,NULL,"\tdebug on\n" ) ; - } - if( verboseG ){ - M(MSG,NULL,"\tMessages will be redirected to screen\n" ) ; - } - if( doGraphicsG ){ - M(MSG,NULL,"\tGraphics mode on\n" ) ; - } else { - M(MSG,NULL,"\tGraphics mode off\n" ) ; - } - if( parasiteS ){ - M(MSG,NULL,"\tTimberWolfMC will inherit window\n" ) ; - /* look for windowid */ - if((scale_dataG && argc != 5) || (!scale_dataG && argc != 4)){ - M(ERRMSG,"main","Need to specify windowID\n" ) ; - syntax() ; - - } else { - windowIdS = atoi( argv[++arg_count] ) ; - } - } - M(MSG,NULL,"\n" ) ; - } else if( argc == 2 ){ - /* order is important here */ - YdebugMemory( FALSE ) ; - cktNameG = Ystrclone( argv[1] ); - argv0G = Ystrclone( argv[0] ) ; - - sprintf( filename, "%s.mout" , cktNameG ) ; - fpoG = TWOPEN( filename, "w", ABORT ) ; - Ymessage_init(fpoG) ; - Ymessage_mode( verboseG ) ; - - YinitProgram( "TimberWolfMC", VERSION, yaleIntro ); - - } else { - syntax() ; - } - } - /* ********************** end initialization ************************* */ - - readpar() ; - - G( initMCGraphics( argc, argv, windowIdS ) ) ; - - while( TRUE ){ - - /* initialize annealing exp. table */ - init_table() ; - init_acceptance_rate() ; /* initialize heuristic annealing schedule */ - - if( randVarG == -1 ) { - randVarG = Yrandom_seed() ; - Yset_random_seed( randVarG ) ; - } - OUT2("\nThe rand generator seed was: %u\n\n\n", (unsigned) randVarG ); - rememberRand = randVarG ; - FLUSHOUT(); - - - /* assume first that this is a mixed mode case - .mcel otherwise */ - /* it is a macro cell only case so look for .cel */ - sprintf(filename, "%s.mcel" , cktNameG ) ; - if(!(fp = TWOPEN( filename , "r", NOABORT ))){ - sprintf(filename, "%s.cel" , cktNameG ) ; - fp = TWOPEN( filename , "r", ABORT ) ; - } - readcells( fp ) ; - TWCLOSE(fp); - - /* now see if we need to perform a quickroute to get */ - /* wiring estimate */ - sprintf( filename, "%s.mest", cktNameG ) ; - if( !(quickrouteG) && !(cost_onlyG) && !(scale_dataG) && - !(doPartitionG)){ - if(!(YfileExists( filename ))){ - /* perform a quickroute if file doesn't exist */ - quickrouteG = TRUE ; - parasiteS = get_arg_string( arguments ) ; - M( MSG, NULL, arguments ) ; - M( MSG, NULL, "\n" ) ; - Ysystem( "TimberWolfMC",ABORT,arguments,closegraphics ) ; - if( parasiteS ){ - /* if we save the graphics state we need to restore it */ - G( TWrestoreState() ) ; - } - quickrouteG = FALSE ; - } - } - /* check to see if .mest file was created */ - new_wire_estG = FALSE ; - if( fp = TWOPEN( filename, "r", NOABORT )){ - if( read_wire_est( fp ) ){ - new_wire_estG = TRUE ; - } - TWCLOSE( fp ) ; - } - - /* make move box structure base on the largest number of tiles */ - make_movebox() ; - - /* first check existence of .mnet file, for .net file */ - sprintf(filename, "%s.mnet", cktNameG ) ; - if(!(fp = TWOPEN( filename , "r", NOABORT ))){ - if(!(doPartitionG)){ - sprintf(filename, "%s.net", cktNameG ) ; - fp = TWOPEN( filename , "r", NOABORT ) ; - } - } - readnets( fp ) ; - if( fp ) TWCLOSE( fp ) ; - - if( doPartitionG && numcellsG == numstdcellG ){ - /* no macro cells to be placed - perform cost only from now on */ - /* that is just place pads */ - cost_onlyG = TRUE ; - } - - /* call config1 to get initial configuration */ - config1() ; - - /* see if we can open save file for writing */ - sprintf(filename, "%s.msav", cktNameG ) ; - fp = TWOPEN( filename , "w", ABORT ) ; - TWCLOSE( fp ) ; - - /* initialize incremental bounding box data structures */ - /* uses count found in prnt_netinfo */ - init_unet() ; - - funccostG = findcost() ; - initcheck() ; - - /* at this point we can initialize the aspect ratios */ - if(!(cost_onlyG)){ - initialize_aspect_ratios() ; - } - - /* startup graphics */ - if( doGraphicsG ){ - G( set_graphic_context( PLACEMENT ) ) ; - if( !wait_for_userG ){ - G( draw_the_data() ) ; - } else G( if( TWinterupt() ) ){ - G( process_graphics() ) ; - } - } - - OUT2("\n\n\nTHE ROUTE COST OF THE CURRENT PLACEMENT: %d",funccostG ); - OUT2("\nTHE PENALTY OF THE CURRENT PLACEMENT: %d\n", penaltyG ) ; - FLUSHOUT(); - - - if( wire_red_ratioS < -1000.0 ){ - - /* if wire_red_ratioS is greater that -1000 it was set in readpar */ - /* this is only for debug purposes */ - if( !(doPartitionG) && numcellsG > 1 ){ - wire_red_ratioS = analyze() ; - - if( wireEstimateOnlyG ) { - closegraphics() ; - YexitPgm(OK); - } - - } else { - /* tmp */ - wire_red_ratioS = 2.0 ; - } - } - - if( cost_onlyG && !restartG ){ - /* done initialization */ - break ; - } - - Yplot_init( 0, "graph", "graph_par","graph_stp","graph_lap","graph_T", - "graph_prob",NULL ) ; - - attmaxG = compute_attprcel() ; - - - /* try a restart if requested */ - sprintf(filename, "%s.mres", cktNameG ) ; - fp = TWOPEN( filename , "r", NOABORT ) ; - if( !( restartG && fp) ) { - - /* ****** NORMAL CASE - NO RESTART ********** */ - if( restartG ){ - ASSERT( restartG && !fp, "main","restart logic error\n" ) ; - sprintf(YmsgG, - "restart file:%s wasn't present but restart requested!\n", - filename ) ; - M(ERRMSG,"main",YmsgG ); - M(MSG,NULL,"Must exit...\n\n" ); - closegraphics() ; - YexitPgm( PGMFAIL ) ; - } else if (fp){ - ASSERT( !restartG && fp, "main","restart logic error\n" ) ; - sprintf(YmsgG, - "<%s.mres> present but restart was not requested in par file.\n", - cktNameG ) ; - M(WARNMSG,"main",YmsgG ) ; - } - - /*** initialization. JL ***/ - init_control(TRUE); /*** set move generation controller. ***/ - initStatCollection() ; /* init funccost penalty recorder */ - - OUT1("High temperature randomization and " ) ; - OUT1("controller initialization...\n") ; - iterationG = -2 ; - TG = 1.0e30; /*** set to VERY HIGH temperature. ***/ - attempts = (attmaxG > 3 * numcellsG) ? attmaxG : 3 * numcellsG ; - /* call all controllers to set factors to initial points */ - /* statistics should all be zero */ - getStatistics( &totFunc, &totPen, &avgdTime, &avgdFunc ) ; - coreFactorG = calc_init_coreFactor() ; - lapFactorG = calc_init_lapFactor( totFunc, totPen ) ; - timeFactorG = calc_init_timeFactor( avgdFunc, avgdTime ) ; - - uloop( attempts ) ; - - - /* ----------------------------------------------------------- - Call config2 to reconfigure core based on estimated routing - area. Take border bins into account. - ----------------------------------------------------------- */ - config2( maxBinXG-1, maxBinYG-1, wire_red_ratioS ); - - - /* since we now are configured scrap long nets */ - scrapnet() ; - - funccostG = findcost() ; - OUT1("\n\n\n"); - OUT3("parameter adjust: route:%d penalty:%d\n", - funccostG, penaltyG ) ; - FLUSHOUT(); - - /* call controllers a second time to update factors */ - /* set negative feedback controllers */ - getStatistics( &totFunc, &totPen, &avgdTime, &avgdFunc ) ; - lapFactorG = calc_init_lapFactor( totFunc, totPen ) ; - timeFactorG = calc_init_timeFactor( avgdFunc, avgdTime ) ; - funccostG = findcost() ; /* calc initial costs with factors */ - - attempts = attmaxG ; - iterationG = -1 ; - uloop( attempts ) ; - - /* Tell the user the expected outcome */ - OUT2("\n\nThe average random wirelength is: %10.0f\n", - avg_funcG ) ; - OUT2("The expected optimum wirelength is: %10.0f\n\n", - avg_funcG/wire_red_ratioS ) ; - - funccostG = findcost() ; - OUT1("\n\n\nThe New Cost Values after readjustment:\n\n"); - OUT3("route:%d penalty:%d\n\n\n", funccostG, penaltyG ) ; - FLUSHOUT(); - - - OUT1("Statistic collection...\n") ; - attempts = attmaxG ; - iterationG = 0 ; - uloop( attempts ) ; - - G( draw_the_data() ) ; - - } else { - - /* ****** RESTART CASE ******* */ - OUT2("reading data from %s\n", filename ) ; - restartG = TW_oldinput( fp ) ; - if( !(restartG) ){ - M(ERRMSG,"main","Restart aborted because of error\n"); - M(MSG,NULL, "Catastrophic error. Must exit...\n"); - closegraphics() ; - YexitPgm( PGMFAIL ) ; - } - funccostG = findcost() ; - OUT2("\n\n\nTHE ROUTE COST OF THE CURRENT PLACEMENT: %d\n" - , funccostG ) ; - OUT2("\n\nTHE PENALTY OF THE CURRENT PLACEMENT: %d\n" , - penaltyG ) ; - FLUSHOUT() ; - - /* startup graphics */ - G( set_graphic_context( PLACEMENT ) ) ; - G( draw_the_data() ) ; - - } /* end RESTART CASE */ - - if( !cost_onlyG ) { - OUT1("\n\nTimberWolf Cell Placement Ready for Action\n\n"); - /* allow multi cell moves */ - G( set_graphic_context( PLACEMENT ) ) ; - utemp( attmaxG, TRUE ) ; - } - - funccostG = findcost() ; - rememberWire = funccostG ; - rememberPenal = binpenalG ; - - - finalout() ; - finalcheck() ; - twstats() ; - break ; /* avoid a loop-loop only for restart failure */ + arg_count = 1 ; + if( *argv[1] == '-' ){ + for( ptr = ++argv[1]; *ptr; ptr++ ){ + switch( *ptr ){ + case 'b': + batchS = TRUE ; + doGraphicsG = FALSE ; + break ; + case 'd': + debugS = TRUE ; + break ; + case 'n': + doGraphicsG = FALSE ; + break ; + case 'o': /* overflow */ + scale_dataG = atoi( argv[++arg_count] ) ; + break ; + case 'p': + padsOnlyS = TRUE ; + break ; + case 'q': + quickrouteG = TRUE ; + break ; + case 'v': + verboseG = TRUE ; + break ; + case 'w': + parasiteS = TRUE ; + break ; + default: + sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; + M(ERRMSG,"main",YmsgG); + syntax() ; + } + } + YdebugMemory( debugS ) ; + + /* handle I/O requests */ + argv0G = Ystrclone( argv[0] ) ; + cktNameG = Ystrclone( argv[++arg_count] ); + sprintf( filename, "%s.mout" , cktNameG ) ; + if( scale_dataG ){ + fpoG = TWOPEN( filename, "a", ABORT ) ; + } else { + fpoG = TWOPEN( filename, "w", ABORT ) ; + } + Ymessage_init(fpoG) ; + Ymessage_mode( verboseG ) ; + + YinitProgram( "TimberWolfMC", VERSION, yaleIntro ); + + /* now tell the user what he picked */ + M(MSG,NULL,"\n\nTimberWolfMC switches:\n" ) ; + if( debugS ){ + YsetDebug( TRUE ) ; + M(MSG,NULL,"\tdebug on\n" ) ; + } + if( verboseG ){ + M(MSG,NULL,"\tMessages will be redirected to screen\n" ) ; + } + if( doGraphicsG ){ + M(MSG,NULL,"\tGraphics mode on\n" ) ; + } else { + M(MSG,NULL,"\tGraphics mode off\n" ) ; + } + if( parasiteS ){ + M(MSG,NULL,"\tTimberWolfMC will inherit window\n" ) ; + /* look for windowid */ + if((scale_dataG && argc != 5) || (!scale_dataG && argc != 4)){ + M(ERRMSG,"main","Need to specify windowID\n" ) ; + syntax() ; + + } else { + windowIdS = atoi( argv[++arg_count] ) ; + } + } + M(MSG,NULL,"\n" ) ; + } else if( argc == 2 ){ + /* order is important here */ + YdebugMemory( FALSE ) ; + cktNameG = Ystrclone( argv[1] ); + argv0G = Ystrclone( argv[0] ) ; + + sprintf( filename, "%s.mout" , cktNameG ) ; + fpoG = TWOPEN( filename, "w", ABORT ) ; + Ymessage_init(fpoG) ; + Ymessage_mode( verboseG ) ; - } /* end doPlacement loop */ + YinitProgram( "TimberWolfMC", VERSION, yaleIntro ); - if( cost_onlyG && !restartG ){ - finalout() ; - twstats() ; + } else { + syntax() ; } + } + /* ********************** end initialization ************************* */ + + readpar() ; + + G( initMCGraphics( argc, argv, windowIdS ) ) ; + + while( TRUE ){ + + /* initialize annealing exp. table */ + init_table() ; + init_acceptance_rate() ; /* initialize heuristic annealing schedule */ + + if( randVarG == -1 ) { + randVarG = Yrandom_seed() ; + Yset_random_seed( randVarG ) ; + } + OUT2("\nThe rand generator seed was: %u\n\n\n", (unsigned) randVarG ); + rememberRand = randVarG ; + FLUSHOUT(); + + + /* assume first that this is a mixed mode case - .mcel otherwise */ + /* it is a macro cell only case so look for .cel */ + sprintf(filename, "%s.mcel" , cktNameG ) ; + if(!(fp = TWOPEN( filename , "r", NOABORT ))){ + sprintf(filename, "%s.cel" , cktNameG ) ; + fp = TWOPEN( filename , "r", ABORT ) ; + } + readcells( fp ) ; + TWCLOSE(fp); + + /* now see if we need to perform a quickroute to get */ + /* wiring estimate */ + sprintf( filename, "%s.mest", cktNameG ) ; + if( !(quickrouteG) && !(cost_onlyG) && !(scale_dataG) && + !(doPartitionG)){ + if(!(YfileExists( filename ))){ + /* perform a quickroute if file doesn't exist */ + quickrouteG = TRUE ; + parasiteS = get_arg_string( arguments ) ; + M( MSG, NULL, arguments ) ; + M( MSG, NULL, "\n" ) ; + Ysystem( "TimberWolfMC",ABORT,arguments,closegraphics ) ; + if( parasiteS ){ + /* if we save the graphics state we need to restore it */ + G( TWrestoreState() ) ; + } + quickrouteG = FALSE ; + } + } + /* check to see if .mest file was created */ + new_wire_estG = FALSE ; + if( fp = TWOPEN( filename, "r", NOABORT )){ + if( read_wire_est( fp ) ){ + new_wire_estG = TRUE ; + } + TWCLOSE( fp ) ; + } + + /* make move box structure base on the largest number of tiles */ + make_movebox() ; + + /* first check existence of .mnet file, for .net file */ + sprintf(filename, "%s.mnet", cktNameG ) ; + if(!(fp = TWOPEN( filename , "r", NOABORT ))){ + if(!(doPartitionG)){ + sprintf(filename, "%s.net", cktNameG ) ; + fp = TWOPEN( filename , "r", NOABORT ) ; + } + } + readnets( fp ) ; + if( fp ) TWCLOSE( fp ) ; + + if( doPartitionG && numcellsG == numstdcellG ){ + /* no macro cells to be placed - perform cost only from now on */ + /* that is just place pads */ + cost_onlyG = TRUE ; + } + + /* call config1 to get initial configuration */ + config1() ; + + /* see if we can open save file for writing */ + sprintf(filename, "%s.msav", cktNameG ) ; + fp = TWOPEN( filename , "w", ABORT ) ; + TWCLOSE( fp ) ; + + /* initialize incremental bounding box data structures */ + /* uses count found in prnt_netinfo */ + init_unet() ; + + funccostG = findcost() ; + initcheck() ; + + /* at this point we can initialize the aspect ratios */ + if(!(cost_onlyG)){ + initialize_aspect_ratios() ; + } + + /* startup graphics */ if( doGraphicsG ){ - if( wait_for_userG && !doPartitionG ){ - G( TWmessage( "TimberWolfMC waiting for your response" ) ) ; - G( set_graphic_context( PLACEMENT ) ) ; - G( process_graphics() ) ; - } else { - G( graphics_dump() ) ; - } - closegraphics() ; - } - OUT1("\n\n************************************ \n\n"); - OUT1("TimberWolf has completed its mission\n"); - OUT1("\n\n************************************ \n\n"); - - if( verboseG ){ - Yprint_stats( stdout ) ; - } - Yprint_stats( fpoG ) ; - Yplot_close() ; - writeResults( rememberWire, rememberPenal, rememberRand ); - if( sc_output() ){ - create_sc_output() ; + G( set_graphic_context( PLACEMENT ) ) ; + if( !wait_for_userG ){ + G( draw_the_data() ) ; + } else G( if( TWinterupt() ) ){ + G( process_graphics() ) ; + } + } + + OUT2("\n\n\nTHE ROUTE COST OF THE CURRENT PLACEMENT: %d",funccostG ); + OUT2("\nTHE PENALTY OF THE CURRENT PLACEMENT: %d\n", penaltyG ) ; + FLUSHOUT(); + + + if( wire_red_ratioS < -1000.0 ){ + + /* if wire_red_ratioS is greater that -1000 it was set in readpar */ + /* this is only for debug purposes */ + if( !(doPartitionG) && numcellsG > 1 ){ + wire_red_ratioS = analyze() ; + + if( wireEstimateOnlyG ) { + closegraphics() ; + YexitPgm(OK); + } + + } else { + /* tmp */ + wire_red_ratioS = 2.0 ; + } + } + + if( cost_onlyG && !restartG ){ + /* done initialization */ + break ; + } + + Yplot_init( 0, "graph", "graph_par","graph_stp","graph_lap","graph_T", + "graph_prob",NULL ) ; + + attmaxG = compute_attprcel() ; + + + /* try a restart if requested */ + sprintf(filename, "%s.mres", cktNameG ) ; + fp = TWOPEN( filename , "r", NOABORT ) ; + if( !( restartG && fp) ) { + + /* ****** NORMAL CASE - NO RESTART ********** */ + if( restartG ){ + ASSERT( restartG && !fp, "main","restart logic error\n" ) ; + sprintf(YmsgG, + "restart file:%s wasn't present but restart requested!\n", + filename ) ; + M(ERRMSG,"main",YmsgG ); + M(MSG,NULL,"Must exit...\n\n" ); + closegraphics() ; + YexitPgm( PGMFAIL ) ; + } else if (fp){ + ASSERT( !restartG && fp, "main","restart logic error\n" ) ; + sprintf(YmsgG, + "<%s.mres> present but restart was not requested in par file.\n", + cktNameG ) ; + M(WARNMSG,"main",YmsgG ) ; + } + + /*** initialization. JL ***/ + init_control(TRUE); /*** set move generation controller. ***/ + initStatCollection() ; /* init funccost penalty recorder */ + + OUT1("High temperature randomization and " ) ; + OUT1("controller initialization...\n") ; + iterationG = -2 ; + TG = 1.0e30; /*** set to VERY HIGH temperature. ***/ + attempts = (attmaxG > 3 * numcellsG) ? attmaxG : 3 * numcellsG ; + /* call all controllers to set factors to initial points */ + /* statistics should all be zero */ + getStatistics( &totFunc, &totPen, &avgdTime, &avgdFunc ) ; + coreFactorG = calc_init_coreFactor() ; + lapFactorG = calc_init_lapFactor( totFunc, totPen ) ; + timeFactorG = calc_init_timeFactor( avgdFunc, avgdTime ) ; + + uloop( attempts ) ; + + + /* ----------------------------------------------------------- + Call config2 to reconfigure core based on estimated routing + area. Take border bins into account. + ----------------------------------------------------------- */ + config2( maxBinXG-1, maxBinYG-1, wire_red_ratioS ); + + + /* since we now are configured scrap long nets */ + scrapnet() ; + + funccostG = findcost() ; + OUT1("\n\n\n"); + OUT3("parameter adjust: route:%d penalty:%d\n", + funccostG, penaltyG ) ; + FLUSHOUT(); + + /* call controllers a second time to update factors */ + /* set negative feedback controllers */ + getStatistics( &totFunc, &totPen, &avgdTime, &avgdFunc ) ; + lapFactorG = calc_init_lapFactor( totFunc, totPen ) ; + timeFactorG = calc_init_timeFactor( avgdFunc, avgdTime ) ; + funccostG = findcost() ; /* calc initial costs with factors */ + + attempts = attmaxG ; + iterationG = -1 ; + uloop( attempts ) ; + + /* Tell the user the expected outcome */ + OUT2("\n\nThe average random wirelength is: %10.0f\n", + avg_funcG ) ; + OUT2("The expected optimum wirelength is: %10.0f\n\n", + avg_funcG/wire_red_ratioS ) ; + + funccostG = findcost() ; + OUT1("\n\n\nThe New Cost Values after readjustment:\n\n"); + OUT3("route:%d penalty:%d\n\n\n", funccostG, penaltyG ) ; + FLUSHOUT(); + + + OUT1("Statistic collection...\n") ; + attempts = attmaxG ; + iterationG = 0 ; + uloop( attempts ) ; + + G( draw_the_data() ) ; + + } else { + + /* ****** RESTART CASE ******* */ + OUT2("reading data from %s\n", filename ) ; + restartG = TW_oldinput( fp ) ; + if( !(restartG) ){ + M(ERRMSG,"main","Restart aborted because of error\n"); + M(MSG,NULL, "Catastrophic error. Must exit...\n"); + closegraphics() ; + YexitPgm( PGMFAIL ) ; + } + funccostG = findcost() ; + OUT2("\n\n\nTHE ROUTE COST OF THE CURRENT PLACEMENT: %d\n" + , funccostG ) ; + OUT2("\n\nTHE PENALTY OF THE CURRENT PLACEMENT: %d\n" , + penaltyG ) ; + FLUSHOUT() ; + + /* startup graphics */ + G( set_graphic_context( PLACEMENT ) ) ; + G( draw_the_data() ) ; + + } /* end RESTART CASE */ + + if( !cost_onlyG ) { + OUT1("\n\nTimberWolf Cell Placement Ready for Action\n\n"); + /* allow multi cell moves */ + G( set_graphic_context( PLACEMENT ) ) ; + utemp( attmaxG, TRUE ) ; } - Ymessage_close() ; - YexitPgm(OK) ; + funccostG = findcost() ; + rememberWire = funccostG ; + rememberPenal = binpenalG ; + + + finalout() ; + finalcheck() ; + twstats() ; + break ; /* avoid a loop-loop only for restart failure */ + + } /* end doPlacement loop */ + + if( cost_onlyG && !restartG ){ + finalout() ; + twstats() ; + } + if( doGraphicsG ){ + if( wait_for_userG && !doPartitionG ){ + G( TWmessage( "TimberWolfMC waiting for your response" ) ) ; + G( set_graphic_context( PLACEMENT ) ) ; + G( process_graphics() ) ; + } else { + G( graphics_dump() ) ; + } + closegraphics() ; + } + OUT1("\n\n************************************ \n\n"); + OUT1("TimberWolf has completed its mission\n"); + OUT1("\n\n************************************ \n\n"); + + if( verboseG ){ + Yprint_stats( stdout ) ; + } + Yprint_stats( fpoG ) ; + Yplot_close() ; + writeResults( rememberWire, rememberPenal, rememberRand ); + if( sc_output() ){ + create_sc_output() ; + } + Ymessage_close() ; + YexitPgm(OK) ; + + return 0; } /* end main routine */ INT yaleIntro() { - fprintf(fpoG,"\n%s\n",YmsgG) ; - fprintf(fpoG,"Authors: Carl Sechen, Bill Swartz, Kai-Win Lee\n"); - fprintf(fpoG," Dahe Chen, and Jimmy Lam\n"); - fprintf(fpoG," Yale University\n"); - - fprintf(stdout,"\n%s\n",YmsgG) ; - fprintf(stdout,"Authors: Carl Sechen, Bill Swartz, Kai-Win Lee\n"); - fprintf(stdout," Dahe Chen, and Jimmy Lam\n"); - fprintf(stdout," Yale University\n"); + fprintf(fpoG,"\n%s\n",YmsgG) ; + fprintf(fpoG,"Authors: Carl Sechen, Bill Swartz, Kai-Win Lee\n"); + fprintf(fpoG," Dahe Chen, and Jimmy Lam\n"); + fprintf(fpoG," Yale University\n"); + + fprintf(stdout,"\n%s\n",YmsgG) ; + fprintf(stdout,"Authors: Carl Sechen, Bill Swartz, Kai-Win Lee\n"); + fprintf(stdout," Dahe Chen, and Jimmy Lam\n"); + fprintf(stdout," Yale University\n"); + return 0; } /* end yaleIntro */ /* this routine takes information about run and write to history file */ /* to accumulate data about runs */ -writeResults( wire, penal, rand ) -INT wire, penal, rand ; +void writeResults( INT wire, INT penal, INT rand ) { - FILE *fpdebug ; - INT left_side, right_side, bottom_side, top_side ; - char filename[LRECL] ; - - funccostG = findcost() ; - sprintf( filename,"%s.history", cktNameG ) ; - fpdebug = TWOPEN( filename, "a", ABORT ) ; - /* find core region */ - find_core_boundary( &left_side, &right_side, &bottom_side, &top_side); - bdxlengthG = right_side - left_side ; - bdylengthG = top_side - bottom_side ; - fprintf( fpdebug, - "%4.2le\t%4.2le\t%4.2le\t%4.2le\t%d\t%d\t%d\t%4.2le\t%34.32le\n", - (DOUBLE) wire, (DOUBLE) penal, - (DOUBLE) funccostG, (DOUBLE) penaltyG, bdxlengthG, bdylengthG, - rand, (DOUBLE) bdxlengthG * bdylengthG, wire_red_ratioS ) ; - TWCLOSE( fpdebug ) ; + FILE *fpdebug ; + INT left_side, right_side, bottom_side, top_side ; + char filename[LRECL] ; + + funccostG = findcost() ; + sprintf( filename,"%s.history", cktNameG ) ; + fpdebug = TWOPEN( filename, "a", ABORT ) ; + /* find core region */ + find_core_boundary( &left_side, &right_side, &bottom_side, &top_side); + bdxlengthG = right_side - left_side ; + bdylengthG = top_side - bottom_side ; + fprintf( fpdebug, + "%4.2le\t%4.2le\t%4.2le\t%4.2le\t%d\t%d\t%d\t%4.2le\t%34.32le\n", + (DOUBLE) wire, (DOUBLE) penal, + (DOUBLE) funccostG, (DOUBLE) penaltyG, bdxlengthG, bdylengthG, + rand, (DOUBLE) bdxlengthG * bdylengthG, wire_red_ratioS ) ; + TWCLOSE( fpdebug ) ; } /* end writeResults */ /* close graphics window on fault */ INT closegraphics( ) { - if( doGraphicsG ){ - G( TWcloseGraphics() ) ; - } + if( doGraphicsG ){ + G( TWcloseGraphics() ) ; + } + return 0; } /* end closegraphics */ /* give user correct syntax */ VOID syntax() { - M(ERRMSG,NULL,"\n" ) ; - M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); - sprintf( YmsgG, - "\nTimberWolfMC [-dnpvw] designName [windowId] \n" ) ; - M(MSG,NULL,YmsgG ) ; - M(MSG,NULL,"\twhose options are zero or more of the following:\n"); - M(MSG,NULL,"\t\td - prints debug info and performs extensive\n"); - M(MSG,NULL,"\t\t error checking\n"); - M(MSG,NULL,"\t\tn - no graphics - the default is to open the\n"); - M(MSG,NULL,"\t\t display and output graphics to an Xwindow\n"); - M(MSG,NULL,"\t\tp - place pads only - read core placement.\n"); - M(MSG,NULL,"\t\tv - verbose mode - writes to screen\n"); - M(MSG,NULL,"\t\tw - parasite mode - user must specify windowId\n"); - YexitPgm(PGMFAIL); + M(ERRMSG,NULL,"\n" ) ; + M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); + sprintf( YmsgG, + "\nTimberWolfMC [-dnpvw] designName [windowId] \n" ) ; + M(MSG,NULL,YmsgG ) ; + M(MSG,NULL,"\twhose options are zero or more of the following:\n"); + M(MSG,NULL,"\t\td - prints debug info and performs extensive\n"); + M(MSG,NULL,"\t\t error checking\n"); + M(MSG,NULL,"\t\tn - no graphics - the default is to open the\n"); + M(MSG,NULL,"\t\t display and output graphics to an Xwindow\n"); + M(MSG,NULL,"\t\tp - place pads only - read core placement.\n"); + M(MSG,NULL,"\t\tv - verbose mode - writes to screen\n"); + M(MSG,NULL,"\t\tw - parasite mode - user must specify windowId\n"); + YexitPgm(PGMFAIL); } /* end syntax */ /* used to TimberWolfMC recursively for the overflow case */ /* returns windowid if graphics are on and window is passed */ -BOOL get_arg_string( arguments ) -char *arguments ; +BOOL get_arg_string( char *arguments ) { - char temp[LRECL] ; /* used to build strings */ - INT window ; /* current window ID */ + char temp[LRECL] ; /* used to build strings */ + INT window ; /* current window ID */ - sprintf( arguments, "%s -", argv0G ) ; - if( scale_dataG ){ - strcat( arguments, "o" ) ; - } - if( debugS ){ - strcat( arguments, "d" ) ; - } - if( verboseG ){ - strcat( arguments, "v" ) ; - } - if( quickrouteG ){ - strcat( arguments, "q" ) ; - } - window = 0 ; - if( doGraphicsG ){ - /* save state of graphics and get window id */ - G( window = TWsaveState() ) ; - if( window ){ - strcat( arguments, "w" ) ; - } - } else if( batchS ){ - strcat( arguments, "b" ) ; - } else { - strcat( arguments, "n" ) ; - } - strcat( arguments, " " ) ; - /* now build the values */ - if( scale_dataG ){ - sprintf( temp, "%d ", scale_dataG ) ; - strcat( arguments, temp ) ; - } - /* now the design name */ - strcat( arguments, cktNameG ) ; - /* now pass graphics window if necessary */ + sprintf( arguments, "%s -", argv0G ) ; + if( scale_dataG ){ + strcat( arguments, "o" ) ; + } + if( debugS ){ + strcat( arguments, "d" ) ; + } + if( verboseG ){ + strcat( arguments, "v" ) ; + } + if( quickrouteG ){ + strcat( arguments, "q" ) ; + } + window = 0 ; + if( doGraphicsG ){ + /* save state of graphics and get window id */ + G( window = TWsaveState() ) ; if( window ){ - sprintf( temp, " %d", window ) ; - strcat( arguments, temp ) ; - return(TRUE) ; - } else { - return(FALSE) ; + strcat( arguments, "w" ) ; } + } else if( batchS ){ + strcat( arguments, "b" ) ; + } else { + strcat( arguments, "n" ) ; + } + strcat( arguments, " " ) ; + /* now build the values */ + if( scale_dataG ){ + sprintf( temp, "%d ", scale_dataG ) ; + strcat( arguments, temp ) ; + } + /* now the design name */ + strcat( arguments, cktNameG ) ; + /* now pass graphics window if necessary */ + if( window ){ + sprintf( temp, " %d", window ) ; + strcat( arguments, temp ) ; + return(TRUE) ; + } else { + return(FALSE) ; + } } /* end function get_arg_string() */ BOOL get_batch_mode() { - return( batchS ) ; + return( batchS ) ; } /* end get_batch_mode */ -set_wiring_reduction( reduction ) -DOUBLE reduction ; +void set_wiring_reduction( reduction ) + DOUBLE reduction ; { - wire_red_ratioS = reduction ; + wire_red_ratioS = reduction ; } /* set_wiring_reduction */ diff -Nru graywolf-0.1.5/src/twmc/main.h graywolf-0.1.6/src/twmc/main.h --- graywolf-0.1.5/src/twmc/main.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/main.h 2018-08-11 21:48:56.000000000 +0000 @@ -30,9 +30,6 @@ Sat Feb 23 00:22:35 EST 1991 - added defines for TOMUS. Wed May 1 16:42:30 EDT 1991 - removed defines for TOMUS. ----------------------------------------------------------------- */ -/* ***************************************************************** - static char SccsId[] = "@(#) main.h version 3.7 5/1/91" ; -***************************************************************** */ #ifndef MAIN_H #define MAIN_H @@ -139,4 +136,49 @@ #undef EXTERN +BOOL get_arg_string( char *arguments ); + +void makebins( INT numbins ); + +VOID updateFixedCells( BOOL initializeFlag ); +void loadbins(BOOL wireAreaKnown); +void placepads(); +void resize_wire_params(); +void reconfigure( INT numbinX, INT numbinY, DOUBLE newCoreArea ); +INT calc_cellareas(BOOL routingFlag ); +void graphics_dump(); +INT draw_the_data(); +void turn_wireest_on( INT turn_on ); +void set_pin_verbosity( BOOL flag ); +void process_graphics(); +void savewolf( BOOL forceSave ); +INT closegraphics(); +void grid_cells(); +void compact( BOOL compactFlag ); +void set_determine_side( BOOL flag ); +void set_graphic_context( INT context ); +void config_rows(); +void print_paths(); +void setVirtualCore( BOOL flag ); +void gmain( BOOL updateNotChan ); +void rmain( BOOL constraint_flag ); +void adapt_wire_estimator(); +int findcost(); +void wirecosts(); +void reorigin(); +void update_pins( BOOL initialFlag ); +void outgeo(); +void output( FILE *fp ); +void outpin(); +void output_partition(); +void find_core_boundary( INT *left, INT *right, INT *bottom, INT *top ); +void finalcheck(); +void initcheck(); +void initializeCorner( INT cell ); +void addCorner( INT xpos, INT ypos ); +void processCorners( INT numcorners ); +void regenorient(INT lowerBound, INT upperBound); +void set_dump_ratio( int count ); +VOID determine_origin( INT *x, INT *y, char *left_not_right, char *bottom_not_top ); + #endif /* MAIN_H */ diff -Nru graywolf-0.1.5/src/twmc/makebins.c graywolf-0.1.6/src/twmc/makebins.c --- graywolf-0.1.5/src/twmc/makebins.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/makebins.c 2018-08-11 21:48:56.000000000 +0000 @@ -48,15 +48,11 @@ Mar 1, 1988 - added variance. Nov 20, 1988 - fixed aspect ratio. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) makebins.c version 3.3 9/5/90" ; -#endif #include #include -makebins( numbins ) -INT numbins ; +void makebins( INT numbins ) { BINBOXPTR bptr ; diff -Nru graywolf-0.1.5/src/twmc/makesite.c graywolf-0.1.6/src/twmc/makesite.c --- graywolf-0.1.5/src/twmc/makesite.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/makesite.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,16 +37,13 @@ * */ -#ifndef lint -static char SccsId[] = "@(#) makesite.c version 3.3 9/5/90" ; -#endif #include #include DOUBLE val1 , val2 ; -Vside( kArray, cellptr , x , yy1 , yy2 , flag ) +INT Vside( kArray, cellptr , x , yy1 , yy2 , flag ) KBOXPTR kArray ; CELLBOXPTR cellptr ; INT x , yy1 , yy2 , flag ; @@ -157,7 +154,7 @@ -Hside( kArray, cellptr , xx1 , xx2 , y , flag ) +INT Hside( kArray, cellptr , xx1 , xx2 , y , flag ) KBOXPTR kArray ; CELLBOXPTR cellptr ; INT xx1 , xx2 , y , flag ; diff -Nru graywolf-0.1.5/src/twmc/menus.h graywolf-0.1.6/src/twmc/menus.h --- graywolf-0.1.5/src/twmc/menus.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/menus.h 2018-08-11 21:48:56.000000000 +0000 @@ -1,3 +1,5 @@ +#ifndef INC_TWMC_MENUS_H +#define INC_TWMC_MENUS_H /* TWmenu definitions */ #define TWNUMMENUS 38 @@ -92,3 +94,5 @@ 0,0,0,0,0,0 } ; + +#endif diff -Nru graywolf-0.1.5/src/twmc/mergecell.c graywolf-0.1.6/src/twmc/mergecell.c --- graywolf-0.1.5/src/twmc/mergecell.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/mergecell.c 2018-08-11 21:48:56.000000000 +0000 @@ -45,9 +45,6 @@ DATE: Aug 17, 1988 REVISIONS: Jan 29, 1989 - changed msg to YmsgG and added \n's. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) mergecell.c version 3.3 9/5/90" ; -#endif #include #include @@ -58,7 +55,7 @@ /* mergeCells takes the contents of child and parent and merges them together */ /* to form a new parent */ -mergeCells( cptr, pptr ) +void mergeCells( cptr, pptr ) CELLBOXPTR cptr ; /* pointer to child cell box */ CELLBOXPTR pptr ; /* pointer to parent cell box */ { diff -Nru graywolf-0.1.5/src/twmc/neworient.c graywolf-0.1.6/src/twmc/neworient.c --- graywolf-0.1.5/src/twmc/neworient.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/neworient.c 2018-08-11 21:48:56.000000000 +0000 @@ -43,16 +43,12 @@ DATE: Jan 29, 1988 REVISIONS: Thu Apr 18 01:37:39 EDT 1991 - added check_valid_orientation. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) neworient.c version 3.4 4/18/91" ; -#endif #include #include +#include -newOrient( cellptr , range ) -CELLBOXPTR cellptr ; -INT range ; +int newOrient( CELLBOXPTR cellptr , INT range ) { INT incidence , count , i , orient ; @@ -149,8 +145,7 @@ returns +1 if it could find a valid orientation. */ -INT check_valid_orient( cptr ) -CELLBOXPTR cptr ; +INT check_valid_orient( CELLBOXPTR cptr ) { INT i ; /* view counter */ diff -Nru graywolf-0.1.5/src/twmc/neworient.h graywolf-0.1.6/src/twmc/neworient.h --- graywolf-0.1.5/src/twmc/neworient.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/src/twmc/neworient.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,10 @@ +#ifndef INC_NEWORIENT_H +#define INC_NEWORIENT_H + +#include +#include + +INT check_valid_orient( CELLBOXPTR cptr ); + +#endif + diff -Nru graywolf-0.1.5/src/twmc/newtemp.c graywolf-0.1.6/src/twmc/newtemp.c --- graywolf-0.1.5/src/twmc/newtemp.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/newtemp.c 2018-08-11 21:48:56.000000000 +0000 @@ -57,9 +57,6 @@ Mon Feb 4 02:14:30 EST 1991 - reset the number of attempts and added quickroute function. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) newtemp.c version 3.4 2/4/91" ; -#endif #include #include @@ -72,7 +69,7 @@ static DOUBLE speedS ; /* multiply attempts per cell by this factor */ /* calculate static exponential time constants */ -init_acceptance_rate() +void init_acceptance_rate() { /* determine alpha */ alphaS = - log( CRITRATIO ) / HIGHTEMP ; @@ -144,7 +141,7 @@ } /* end compute_attprcell */ -set_tw_speed( speed ) +void set_tw_speed( speed ) DOUBLE speed ; { speedS = speed ; @@ -154,7 +151,7 @@ #ifdef TESTRATIO /* test program for desired acceptance rate profile */ -main( argc , argv ) +INT main( argc , argv ) INT argc ; char *argv[] ; { @@ -167,5 +164,6 @@ printf( "%4.2le\n" , d_ratio ) ; } + return 0; } /* end main */ #endif /* TESTRATIO */ diff -Nru graywolf-0.1.5/src/twmc/outgeo.c graywolf-0.1.6/src/twmc/outgeo.c --- graywolf-0.1.5/src/twmc/outgeo.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/outgeo.c 2018-08-11 21:48:56.000000000 +0000 @@ -66,9 +66,6 @@ buster. Wed Jun 5 16:30:30 CDT 1991 - eliminated unbust. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) outgeo.c version 3.6 6/5/91" ; -#endif #include #include @@ -79,12 +76,12 @@ -static store_pad_loc(); +static void store_pad_loc(); -outgeo() +void outgeo() { FILE *fp ; @@ -281,7 +278,7 @@ } /* end outgeo */ -static store_pad_loc( cellptr, l, r, b, t ) +static void store_pad_loc( cellptr, l, r, b, t ) CELLBOXPTR cellptr ; INT l, r, b, t ; { diff -Nru graywolf-0.1.5/src/twmc/outpin.c graywolf-0.1.6/src/twmc/outpin.c --- graywolf-0.1.5/src/twmc/outpin.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/outpin.c 2018-08-11 21:48:56.000000000 +0000 @@ -65,9 +65,6 @@ Sat May 11 22:41:38 EDT 1991 - automatically move pad pins to correct channel. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) outpin.c version 3.11 5/11/91" ; -#endif #include #include @@ -86,16 +83,16 @@ -static output_pin(); +static void output_pin(); static INT find_cell(); -static process_analog_net(); +static void process_analog_net(); static INT find_cell(); -static output_matches(); +static void output_matches(); -outpin() +void outpin() { INT net ; /* counter */ @@ -132,7 +129,7 @@ } /* end outpins */ -static output_pin( pinptr ) +static void output_pin( pinptr ) PINBOXPTR pinptr ; { INT i ; /* softpin counter */ @@ -258,7 +255,7 @@ } } /* end output_pin */ -static process_analog_net( netptr ) +static void process_analog_net( netptr ) NETBOXPTR netptr ; { INT i, j ; /* counters */ @@ -372,7 +369,7 @@ return( side2cellS[side] ) ; } /* end getPadMacroNum */ -setPadMacroNum( side, cellnum ) +void setPadMacroNum( side, cellnum ) INT side ; INT cellnum ; { @@ -423,7 +420,7 @@ return( output_typeS ) ; } /* end get_circuit_type */ -static output_matches() +static void output_matches() { INT i, j ; INT net ; diff -Nru graywolf-0.1.5/src/twmc/output.c graywolf-0.1.6/src/twmc/output.c --- graywolf-0.1.5/src/twmc/output.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/output.c 2018-08-11 21:48:56.000000000 +0000 @@ -84,9 +84,6 @@ groups. Mon Aug 12 16:57:04 CDT 1991 - create sc output files. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) output.c version 3.16 3/6/92" ; -#endif #include #include @@ -104,22 +101,22 @@ -static output_corners(); -static output_class_orient(); -static output_pins(); -static output_side_n_space(); -static output_pad_groups(); -static output_fixed(); -static create_pl1(); -static print_four_corners(); -static create_pin(); +static void output_corners(); +static void output_class_orient(); +static void output_pins(); +static void output_side_n_space(); +static void output_pad_groups(); +static void output_fixed(); +static void create_pl1(); +static void print_four_corners(); +static void create_pin(); +void output_vertices( FILE *fp, CELLBOXPTR cellptr ); -output( fp ) -FILE *fp ; +void output( FILE *fp ) { INT cell ; @@ -201,7 +198,7 @@ } /* end output */ -output_pads( fp ) +void output_pads( fp ) FILE *fp ; { @@ -248,14 +245,14 @@ } /* end output_pads */ -static output_corners( cellptr ) +static void output_corners( cellptr ) CELLBOXPTR cellptr ; { fprintf( outS, "corners %d\n", cellptr->numsides ) ; output_vertices( outS, cellptr ) ; } /* end output_corners */ -static output_class_orient( cellptr ) +static void output_class_orient( cellptr ) CELLBOXPTR cellptr ; { INT i ; @@ -273,7 +270,7 @@ } /* end output_class_orient */ -static output_pins( cellptr ) +static void output_pins( cellptr ) CELLBOXPTR cellptr ; { INT i ; /* counter */ @@ -342,7 +339,7 @@ } } } /* end output_pins */ -static output_side_n_space( cellptr ) +static void output_side_n_space( cellptr ) CELLBOXPTR cellptr ; { INT i ; /* counter */ @@ -392,7 +389,7 @@ } } /* end output_side_n_space */ -static output_pad_groups( cellptr ) +static void output_pad_groups( cellptr ) CELLBOXPTR cellptr ; { INT i, child, padnum ; @@ -416,7 +413,7 @@ } /* end output_pad_groups */ -static output_fixed( cellptr ) +static void output_fixed( cellptr ) CELLBOXPTR cellptr ; { FIXEDBOXPTR fixptr ; @@ -461,15 +458,12 @@ } } /* end output_fixed */ -set_determine_side( flag ) -BOOL flag ; +void set_determine_side( BOOL flag ) { determine_sideS = flag ; } /* end set_determine_side */ -output_vertices( fp, cellptr ) -FILE *fp ; -CELLBOXPTR cellptr ; +void output_vertices( FILE *fp, CELLBOXPTR cellptr ) { INT xc , yc ; TILEBOXPTR tileptr ; @@ -573,7 +567,7 @@ } /* end output_vertices */ -create_sc_output() +void create_sc_output() { create_pl1() ; create_pin() ; @@ -581,7 +575,7 @@ /** by kroy July 1991 **/ /* modified by WPS Aug 6, 1991 */ -static create_pl1() +static void create_pl1() { FILE *fpp1 ; CELLBOXPTR cellptr ; @@ -664,7 +658,7 @@ } /* create_pl1 */ -static print_four_corners( fp, cellptr ) +static void print_four_corners( fp, cellptr ) FILE *fp ; CELLBOXPTR cellptr ; { @@ -690,7 +684,7 @@ /* by WPS Aug 6, 1991 */ -static create_pin() +static void create_pin() { FILE *fpp1 ; CELLBOXPTR cellptr ; diff -Nru graywolf-0.1.5/src/twmc/overlap.c graywolf-0.1.6/src/twmc/overlap.c --- graywolf-0.1.5/src/twmc/overlap.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/overlap.c 2018-08-11 21:48:56.000000000 +0000 @@ -68,9 +68,6 @@ Sun Jan 20 21:34:36 PST 1991 - ported to AIX. Mon Feb 4 02:15:23 EST 1991 - added new wire estimator. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) overlap.c version 3.6 4/18/91" ; -#endif #include #include @@ -91,16 +88,18 @@ static TILEBOXPTR tileptrS ; static MOVEBOXPTR posS ; static BINBOXPTR bptrS ; -static xcS, ycS, orientS ; +static int xcS, ycS, orientS ; static INT minXS, maxXS, minYS, maxYS ; static INT newbinpenalS ; static INT xcostS, ycostS ; -static INT (*calc_Bins)() ;/* remember which bin function */ +static void (*calc_Bins)() ;/* remember which bin function */ static INT (*wire_est)() ; /* remember which wire estimation function */ /* global references */ extern INT wireestxy( P3(MOVEBOXPTR pos,INT xc, INT yc) ) ; extern INT wireestxy2( P3(MOVEBOXPTR pos,INT xc, INT yc) ) ; +void sub_penal( MOVEBOXPTR *cellpos ); +void add_penal( MOVEBOXPTR *cellpos ); /* ***************************************************************** ONE CELL OVERLAP CALCULATION @@ -109,7 +108,7 @@ /* MOVEBOXPTR *old_aposG, *new_aposG ; */ { register BINBOXPTR *fastbin ; - register x, y ; + register int x, y ; /* ----------------------------------------------------------------- @@ -185,7 +184,7 @@ /* MOVEBOXPTR *old_aposG, *new_aposG, *old_bposG, *new_bposG ; */ { register BINBOXPTR *fastbin ; - register x, y ; + register int x, y ; /* ----------------------------------------------------------------- @@ -301,11 +300,11 @@ /* ***************************************************************** Update one cell move by transferring from nu to penalty fields */ -INT update_overlap( /* old_aposG */ ) +void update_overlap( /* old_aposG */ ) /* MOVEBOXPTR *old_aposG ; */ { register BINBOXPTR *fastbin ; - register x, y ; + register int x, y ; /* ----------------------------------------------------------------- Perform overlap update for OLD A - NEW A pair @@ -329,11 +328,11 @@ /* ***************************************************************** Update two cell move by transferring from nu to penalty fields */ -INT update_overlap2( /* old_aposG, old_bposG */ ) +void update_overlap2( /* old_aposG, old_bposG */ ) /* MOVEBOXPTR *old_apos, *old_bpos ; */ { register BINBOXPTR *fastbin ; - register x, y ; + register int x, y ; /* ----------------------------------------------------------------- Perform overlap update for OLD A - NEW B pair @@ -376,8 +375,7 @@ Subtract penalty from bins. Takes pointer to move box record as an argument */ -sub_penal( cellpos ) -MOVEBOXPTR *cellpos ; +void sub_penal( MOVEBOXPTR *cellpos ) { INT count, maxcount ; INT x, y ; @@ -534,8 +532,7 @@ Add penalty to bins. Takes pointer to move box record as an argument */ -add_penal( cellpos ) -MOVEBOXPTR *cellpos ; +void add_penal( MOVEBOXPTR *cellpos ) { INT count, maxcount ; INT x, y ; @@ -695,7 +692,7 @@ Takes pointer to move box record as an argument */ -INT calc_wBins( cellpos ) +void calc_wBins( cellpos ) MOVEBOXPTR *cellpos ; { @@ -768,7 +765,7 @@ DOES NOT use wire estimation in the calculation. Takes pointer to move box record as an argument */ -INT calc_nBins( cellpos ) +void calc_nBins( cellpos ) MOVEBOXPTR *cellpos ; { @@ -838,8 +835,7 @@ calc_wBins routine and calc_nBins routine. In this case, the calc_Bins routine is set to calc_wBins. */ -turn_wireest_on( turn_on ) -INT turn_on ; +void turn_wireest_on( INT turn_on ) { if( turn_on ){ @@ -860,7 +856,7 @@ the use of many global variables. This routines sets up static variables in this file. */ -setup_Bins( s_cellptr, s_xc, s_yc, s_orient ) +void setup_Bins( s_cellptr, s_xc, s_yc, s_orient ) CELLBOXPTR s_cellptr ; INT s_xc ; INT s_yc ; @@ -878,7 +874,7 @@ It is assumed that setup bins was immediately called before call to this routine. */ -add2bin( cellpos ) +void add2bin( cellpos ) MOVEBOXPTR *cellpos ; { INT count, maxcount ; diff -Nru graywolf-0.1.5/src/twmc/pads.h graywolf-0.1.6/src/twmc/pads.h --- graywolf-0.1.5/src/twmc/pads.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/pads.h 2018-08-11 21:48:56.000000000 +0000 @@ -1,6 +1,3 @@ -/* ***************************************************************** - static char SccsId[] = "@(#) pads.h version 3.6 2/23/91" ; -***************************************************************** */ #ifndef PADS_H #define PADS_H diff -Nru graywolf-0.1.5/src/twmc/partition.c graywolf-0.1.6/src/twmc/partition.c --- graywolf-0.1.5/src/twmc/partition.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/partition.c 2018-08-11 21:48:56.000000000 +0000 @@ -76,9 +76,6 @@ Fri Oct 18 00:09:45 EDT 1991 - eliminated read_blk_file. Instead, to find core we read it using read_gen_file. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) partition.c version 3.20 4/6/92" ; -#endif #include #include @@ -115,349 +112,356 @@ /* Forward declaration */ extern INT closegraphics(); +void read_stat_file(); +void build_mver_file(INT left, INT right, INT bottom, INT top ); +void read_gen_file(); -config_rows() +void config_rows() { - DOUBLE read_par_file() ; /* get default from user */ - INT left, right, bottom, top;/* core area */ - char *Yrelpath() ; - char *pathname ; - char *twdir ; /* path of TimberWolf directory */ - char *getenv() ; /* used to get TWDIR environment variable */ - char filename[LRECL] ; - BOOL stateSaved = FALSE ; /* whether need to restore state */ - BOOL get_batch_mode() ; /* find out whether we are in batch mode */ - - read_stat_file() ; - (void) read_par_file() ; - grid_cells() ; - - /* place the pads to get standard cell core area */ - find_core_boundary( &left, &right, &bottom, &top ) ; - - build_mver_file( left, right, bottom, top ) ; - - /* now call genrows program */ - /* find the path of genrows relative to main program */ - pathname = Yrelpath( argv0G, GENROWPATH ) ; - if( !(YfileExists(pathname))){ - if( twdir = TWFLOWDIR ){ - sprintf( filename, "%s/bin/%s", twdir, GENROWPROG ) ; - pathname = Ystrclone( filename ) ; - } - } - if( doGraphicsG ){ - G( sprintf( YmsgG, "%s -w %s %lu", - pathname, cktNameG, (unsigned long)TWsaveState() ) ) ; - stateSaved = TRUE ; - } else if( get_batch_mode() ){ - sprintf( YmsgG, "%s %s", pathname, cktNameG ) ; - } else { /* no graphics case */ - sprintf( YmsgG, "%s -n %s", pathname, cktNameG ) ; - } - M( MSG, NULL, YmsgG ) ; - M( MSG, NULL, "\n" ) ; - /* Ysystem will kill program if catastrophe occurred */ - Ysystem( GENROWPROG, ABORT, YmsgG, closegraphics ) ; - Ysafe_free( pathname ) ; /* free name created in Yrelpath */ - /* ############# end of genrows execution ############# */ - - if( stateSaved ){ - /* if we save the graphics state we need to restore it */ - G( TWrestoreState() ) ; - } + DOUBLE read_par_file() ; /* get default from user */ + INT left, right, bottom, top;/* core area */ + char *Yrelpath() ; + char *pathname ; + char *twdir ; /* path of TimberWolf directory */ + char *getenv() ; /* used to get TWDIR environment variable */ + char filename[LRECL] ; + BOOL stateSaved = FALSE ; /* whether need to restore state */ + BOOL get_batch_mode() ; /* find out whether we are in batch mode */ + + read_stat_file() ; + (void) read_par_file() ; + grid_cells() ; + + /* place the pads to get standard cell core area */ + find_core_boundary( &left, &right, &bottom, &top ) ; + + build_mver_file( left, right, bottom, top ) ; + + /* now call genrows program */ + /* find the path of genrows relative to main program */ + pathname = Yrelpath( argv0G, GENROWPATH ) ; + if( !(YfileExists(pathname))){ + /* Check if TWDIR overridden */ + if((twdir = getenv("TWDIR"))) { + M(MSG,NULL, "Directory overridden with 'TWDIR' environment variable\n" ) ; + } + else { + twdir = TWFLOWDIR; + } + sprintf( filename, "%s/bin/%s", twdir, GENROWPROG ) ; + pathname = Ystrclone( filename ) ; + } + if( doGraphicsG ){ + G( sprintf( YmsgG, "%s -w %s %lu", + pathname, cktNameG, (unsigned long)TWsaveState() ) ) ; + stateSaved = TRUE ; + } else if( get_batch_mode() ){ + sprintf( YmsgG, "%s %s", pathname, cktNameG ) ; + } else { /* no graphics case */ + sprintf( YmsgG, "%s -n %s", pathname, cktNameG ) ; + } + M( MSG, NULL, YmsgG ) ; + M( MSG, NULL, "\n" ) ; + /* Ysystem will kill program if catastrophe occurred */ + Ysystem( GENROWPROG, ABORT, YmsgG, closegraphics ) ; + Ysafe_free( pathname ) ; /* free name created in Yrelpath */ + /* ############# end of genrows execution ############# */ + + if( stateSaved ){ + /* if we save the graphics state we need to restore it */ + G( TWrestoreState() ) ; + } - /* read result to update new core */ - read_gen_file() ; + /* read result to update new core */ + read_gen_file() ; - /* add spacing between pads and core area. */ + /* add spacing between pads and core area. */ #ifdef LATER - cellarrayG[endpadgrpsG+L]->tiles->rborder = numpadsG*track_spacingXG ; - cellarrayG[endpadgrpsG+R]->tiles->lborder = numpadsG*track_spacingXG ; - cellarrayG[endpadgrpsG+B]->tiles->tborder = numpadsG*track_spacingYG ; - cellarrayG[endpadgrpsG+T]->tiles->bborder = numpadsG*track_spacingYG ; + cellarrayG[endpadgrpsG+L]->tiles->rborder = numpadsG*track_spacingXG ; + cellarrayG[endpadgrpsG+R]->tiles->lborder = numpadsG*track_spacingXG ; + cellarrayG[endpadgrpsG+B]->tiles->tborder = numpadsG*track_spacingYG ; + cellarrayG[endpadgrpsG+T]->tiles->bborder = numpadsG*track_spacingYG ; #endif - /* read back result */ - setVirtualCore( TRUE ) ; - placepads() ; + /* read back result */ + setVirtualCore( TRUE ) ; + placepads() ; } /* end config_rows */ -read_stat_file() +void read_stat_file() { - char filename[LRECL] ; - char input[LRECL] ; - char *bufferptr ; - char **tokens ; - INT class ; - INT numtokens ; - INT class_count ; - FILE *fin ; - - /*********************************************************** - * Read from circuitName.stat file. - ***********************************************************/ - sprintf( filename, "%s.stat", cktNameG ) ; - fin = TWOPEN(filename,"r", ABORT ) ; - - class_count = 0 ; - num_classeS = 0 ; - while( bufferptr = fgets( input, LRECL, fin ) ){ - tokens = Ystrparser( bufferptr, " :\t\n", &numtokens ) ; - if( strcmp( tokens[0], "tot_length" ) == STRINGEQ ){ - tlengthS = atoi( tokens[1] ) ; - } else if( strcmp( tokens[0], "cell_height" ) == STRINGEQ ){ - cheightS = atoi( tokens[1] ) ; - } else if( strcmp( tokens[0], "num_classes" ) == STRINGEQ ){ - num_classeS = atoi( tokens[1] ) ; - classS = YVECTOR_MALLOC( 1, num_classeS, INT ) ; - lbS = YVECTOR_MALLOC( 1, num_classeS, INT ) ; - ubS = YVECTOR_MALLOC( 1, num_classeS, INT ) ; - } else if( strcmp( tokens[0], "class" ) == STRINGEQ ){ - class = atoi( tokens[1] ) ; - classS[++class_count] = class ; - lbS[class_count] = atoi( tokens[3] ) ; - ubS[class_count] = atoi( tokens[5] ) ; - } + char filename[LRECL] ; + char input[LRECL] ; + char *bufferptr ; + char **tokens ; + INT class ; + INT numtokens ; + INT class_count ; + FILE *fin ; + + /*********************************************************** + * Read from circuitName.stat file. + ***********************************************************/ + sprintf( filename, "%s.stat", cktNameG ) ; + fin = TWOPEN(filename,"r", ABORT ) ; + + class_count = 0 ; + num_classeS = 0 ; + while( bufferptr = fgets( input, LRECL, fin ) ){ + tokens = Ystrparser( bufferptr, " :\t\n", &numtokens ) ; + if( strcmp( tokens[0], "tot_length" ) == STRINGEQ ){ + tlengthS = atoi( tokens[1] ) ; + } else if( strcmp( tokens[0], "cell_height" ) == STRINGEQ ){ + cheightS = atoi( tokens[1] ) ; + } else if( strcmp( tokens[0], "num_classes" ) == STRINGEQ ){ + num_classeS = atoi( tokens[1] ) ; + classS = YVECTOR_MALLOC( 1, num_classeS, INT ) ; + lbS = YVECTOR_MALLOC( 1, num_classeS, INT ) ; + ubS = YVECTOR_MALLOC( 1, num_classeS, INT ) ; + } else if( strcmp( tokens[0], "class" ) == STRINGEQ ){ + class = atoi( tokens[1] ) ; + classS[++class_count] = class ; + lbS[class_count] = atoi( tokens[3] ) ; + ubS[class_count] = atoi( tokens[5] ) ; } + } - TWCLOSE( fin ) ; + TWCLOSE( fin ) ; } /* end read_stat_file */ DOUBLE read_par_file() { - char *bufferptr ; - char **tokens ; /* for parsing menu file */ - INT numtokens ; - INT line ; /* line number of TWmenu file */ - BOOL onNotOff ; - BOOL wildcard ; - - Yreadpar_init( cktNameG, USER, TWSC, TRUE ) ; - while( tokens = Yreadpar_next( &bufferptr, &line, &numtokens, - &onNotOff, &wildcard )){ - if( numtokens == 0 ){ - /* skip over empty lines */ - continue ; - } - if( numtokens != 2 && numtokens != 3 ){ - continue ; - } - if( strcmp( tokens[0], ROWSEP ) == STRINGEQ){ - - /* there better be only two or three tokens on this line */ - /* 3rd token for absolute row spacing is not handled */ - if( numtokens == 2 ){ - rowSepS = atof( tokens[1] ) ; - } else if (numtokens == 3 ){ - rowSepS = atof( tokens[1] ) ; - rowSepAbsS = atof( tokens[2] ) ; - } else { - sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; - M(ERRMSG, "read_par_file", YmsgG ) ; - } - } - } - if( rowSepS < 0.0 ) { - M(ERRMSG,"read_par_file","Improper row separation.\n" ) ; - M(MSG,NULL,"Row separaion should be specified in .par file\n" ) ; - M(MSG,NULL,"Defaulting to 1.0\n" ) ; - rowSepS = 1.0 ; - rowSepAbsS = 0.0 ; - } - return( rowSepS ) ; + char *bufferptr ; + char **tokens ; /* for parsing menu file */ + INT numtokens ; + INT line ; /* line number of TWmenu file */ + BOOL onNotOff ; + BOOL wildcard ; + + Yreadpar_init( cktNameG, USER, TWSC, TRUE ) ; + while( tokens = Yreadpar_next( &bufferptr, &line, &numtokens, + &onNotOff, &wildcard )){ + if( numtokens == 0 ){ + /* skip over empty lines */ + continue ; + } + if( numtokens != 2 && numtokens != 3 ){ + continue ; + } + if( strcmp( tokens[0], ROWSEP ) == STRINGEQ){ + + /* there better be only two or three tokens on this line */ + /* 3rd token for absolute row spacing is not handled */ + if( numtokens == 2 ){ + rowSepS = atof( tokens[1] ) ; + } else if (numtokens == 3 ){ + rowSepS = atof( tokens[1] ) ; + rowSepAbsS = atof( tokens[2] ) ; + } else { + sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; + M(ERRMSG, "read_par_file", YmsgG ) ; + } + } + } + if( rowSepS < 0.0 ) { + M(ERRMSG,"read_par_file","Improper row separation.\n" ) ; + M(MSG,NULL,"Row separaion should be specified in .par file\n" ) ; + M(MSG,NULL,"Defaulting to 1.0\n" ) ; + rowSepS = 1.0 ; + rowSepAbsS = 0.0 ; + } + return( rowSepS ) ; } /* end read_par_file */ -output_partition() +void output_partition() { #define RELATIVE_TO_CURPOS 1 - INT i ; - long delta ; /* how far to jump backwards */ - INT error ; /* error code returned from fseek */ - INT x, y ; /* pin positions */ - INT xc, yc ; /* cell center */ - INT instance ; /* current cell instance */ - INT line ; /* current line number */ - BOOL found ; /* find mc keywords */ - FILE *fp ; - char filename[LRECL] ; - char buffer[LRECL] ; - char *bufferptr ; - char *matchptr ; - PINBOXPTR pin ; - CELLBOXPTR cptr ; - - /* **************************************************************** - Output the ports into sc cell file. - ***************************************************************** */ - - /* other definitions for the apollo version */ - char filename_out[LRECL] ; - FILE *fout ; - - sprintf( filename, "%s.scel", cktNameG ) ; - fp = TWOPEN( filename, "r", ABORT ) ; - sprintf( filename_out, "%s.temp", cktNameG ) ; - fout = TWOPEN( filename_out, "w", ABORT ) ; - - /* start at beginning of file and read till read mc entity or pad */ - line = 0 ; - while( bufferptr = fgets( buffer, LRECL, fp )){ - /* remove leading blanks or tabs */ - matchptr = Yremove_lblanks( bufferptr ) ; - if( strncmp( matchptr, "hardcell", 8 ) == STRINGEQ ){ - break ; - } else if( strncmp( matchptr, "softcell", 8 ) == STRINGEQ ){ - break ; - } else if( strncmp( matchptr, "pad", 3 ) == STRINGEQ ){ - break ; - } else { - /* do an echo */ - line++ ; - fprintf( fout, "%s", bufferptr ) ; - } - } - D( "output_partition", - fprintf( stderr, "broke on line:%d\n", line ) ; - ) ; - /* send the rest of the macro output of .mdat to fout */ - output( fout ) ; - TWCLOSE( fp ) ; - Yrm_files( filename ) ; - /* move the new file to .scel due to a bug in fseek on the apollo */ - YmoveFile( filename_out, filename ) ; + INT i ; + long delta ; /* how far to jump backwards */ + INT error ; /* error code returned from fseek */ + INT x, y ; /* pin positions */ + INT xc, yc ; /* cell center */ + INT instance ; /* current cell instance */ + INT line ; /* current line number */ + BOOL found ; /* find mc keywords */ + FILE *fp ; + char filename[LRECL] ; + char buffer[LRECL] ; + char *bufferptr ; + char *matchptr ; + PINBOXPTR pin ; + CELLBOXPTR cptr ; + + /* **************************************************************** + Output the ports into sc cell file. + ***************************************************************** */ + + /* other definitions for the apollo version */ + char filename_out[LRECL] ; + FILE *fout ; + + sprintf( filename, "%s.scel", cktNameG ) ; + fp = TWOPEN( filename, "r", ABORT ) ; + sprintf( filename_out, "%s.temp", cktNameG ) ; + fout = TWOPEN( filename_out, "w", ABORT ) ; + + /* start at beginning of file and read till read mc entity or pad */ + line = 0 ; + while( bufferptr = fgets( buffer, LRECL, fp )){ + /* remove leading blanks or tabs */ + matchptr = Yremove_lblanks( bufferptr ) ; + if( strncmp( matchptr, "hardcell", 8 ) == STRINGEQ ){ + break ; + } else if( strncmp( matchptr, "softcell", 8 ) == STRINGEQ ){ + break ; + } else if( strncmp( matchptr, "pad", 3 ) == STRINGEQ ){ + break ; + } else { + /* do an echo */ + line++ ; + fprintf( fout, "%s", bufferptr ) ; + } + } + D( "output_partition", + fprintf( stderr, "broke on line:%d\n", line ) ; + ) ; + /* send the rest of the macro output of .mdat to fout */ + output( fout ) ; + TWCLOSE( fp ) ; + Yrm_files( filename ) ; + /* move the new file to .scel due to a bug in fseek on the apollo */ + YmoveFile( filename_out, filename ) ; } /* end of prnt_data */ -build_mver_file( left, right, bottom, top ) -INT left, right, bottom, top ; +void build_mver_file(INT left, INT right, INT bottom, INT top ) { - CELLBOXPTR cellptr ; - FILE *fp ; - char filename[LRECL] ; - INT type ; - INT i, k, cell ; - INT xc, yc ; - INT x, y ; - INT separation ; - BOUNBOXPTR bounptr ; /* bounding box pointer */ - - /* ######### Create genrows file and exec genrows ######### */ - /* open vertex file for writing */ - sprintf(filename, "%s.mver" , cktNameG ) ; - fp = TWOPEN( filename , "w", ABORT ) ; - - fprintf( fp, "total_row_length %d\n", tlengthS ) ; - if( num_classeS ){ - fprintf( fp, "num_classes %d\n", num_classeS ) ; - } - for( i = 1 ; i <= num_classeS ; i++ ){ - fprintf( fp, "class %d lb %d ub %d\n", classS[i], lbS[i], ubS[i] ) ; - } - fprintf( fp, "actual_row_height %d\n", cheightS ) ; - separation = (INT) ( (DOUBLE) cheightS * rowSepS + rowSepAbsS) ; - fprintf( fp, "channel_separation %d\n", separation ) ; - fprintf( fp, "min_length %d\n", (right-left) / 5 ) ; - fprintf( fp, "core %d %d %d %d\n", left, bottom, right, top ) ; - fprintf( fp, "grid %d %d\n", track_spacingXG, track_spacingYG ) ; - num_macroS = 0 ; - for( cell = 1 ; cell <= numcellsG ; cell++ ) { - - cellptr = cellarrayG[cell] ; - type = cellptr->celltype ; - if( type != CUSTOMCELLTYPE && type != SOFTCELLTYPE ){ - continue ; - } - num_macroS++ ; - } - fprintf( fp, "num_macro %d\n", num_macroS ) ; - - - for( cell = 1 ; cell <= numcellsG ; cell++ ) { - - cellptr = cellarrayG[cell] ; - type = cellptr->celltype ; - if( type != CUSTOMCELLTYPE && type != SOFTCELLTYPE ){ - continue ; - } - fprintf(fp,"macro orient %d %d vertices ", cellptr->orient, - cellptr->numsides ) ; - output_vertices( fp, cellptr ) ; - } + CELLBOXPTR cellptr ; + FILE *fp ; + char filename[LRECL] ; + INT type ; + INT i, k, cell ; + INT xc, yc ; + INT x, y ; + INT separation ; + BOUNBOXPTR bounptr ; /* bounding box pointer */ + + /* ######### Create genrows file and exec genrows ######### */ + /* open vertex file for writing */ + sprintf(filename, "%s.mver" , cktNameG ) ; + fp = TWOPEN( filename , "w", ABORT ) ; + + fprintf( fp, "total_row_length %d\n", tlengthS ) ; + if( num_classeS ){ + fprintf( fp, "num_classes %d\n", num_classeS ) ; + } + for( i = 1 ; i <= num_classeS ; i++ ){ + fprintf( fp, "class %d lb %d ub %d\n", classS[i], lbS[i], ubS[i] ) ; + } + fprintf( fp, "actual_row_height %d\n", cheightS ) ; + separation = (INT) ( (DOUBLE) cheightS * rowSepS + rowSepAbsS) ; + fprintf( fp, "channel_separation %d\n", separation ) ; + fprintf( fp, "min_length %d\n", (right-left) / 5 ) ; + fprintf( fp, "core %d %d %d %d\n", left, bottom, right, top ) ; + fprintf( fp, "grid %d %d\n", track_spacingXG, track_spacingYG ) ; + num_macroS = 0 ; + for( cell = 1 ; cell <= numcellsG ; cell++ ) { + + cellptr = cellarrayG[cell] ; + type = cellptr->celltype ; + if( type != CUSTOMCELLTYPE && type != SOFTCELLTYPE ){ + continue ; + } + num_macroS++ ; + } + fprintf( fp, "num_macro %d\n", num_macroS ) ; + + + for( cell = 1 ; cell <= numcellsG ; cell++ ) { + + cellptr = cellarrayG[cell] ; + type = cellptr->celltype ; + if( type != CUSTOMCELLTYPE && type != SOFTCELLTYPE ){ + continue ; + } + fprintf(fp,"macro orient %d %d vertices ", cellptr->orient, + cellptr->numsides ) ; + output_vertices( fp, cellptr ) ; + } - TWCLOSE( fp ) ; + TWCLOSE( fp ) ; } /* end build_mver_file */ - -read_gen_file() + +void read_gen_file() { - char filename[LRECL] ; - char buffer[LRECL], *bufferptr ; - char **tokens ; /* for parsing file */ - INT numtokens, line ; - INT cell ; /* current cell number */ - INT type ; /* current cell type */ - CELLBOXPTR cellptr ; /* current cell */ - BOOL abort ; /* whether to abort program */ - FILE *fp ; - - if( num_macroS == 0 ){ - return ; - } - /* **************** READ RESULTS of genrows ************/ - sprintf(filename, "%s.gen" , cktNameG ) ; - fp = TWOPEN( filename , "r", ABORT ) ; - - /* parse file */ - line = 0 ; - abort = FALSE ; - for( cell = 1 ; cell <= numcellsG ; cell++ ) { - - cellptr = cellarrayG[cell] ; - type = cellptr->celltype ; - if( type != CUSTOMCELLTYPE && type != SOFTCELLTYPE ){ - continue ; - } - while( bufferptr=fgets(buffer,LRECL,fp )){ - /* parse file */ - line++ ; /* increment line number */ - tokens = Ystrparser( bufferptr, " \t\n", &numtokens ); - if( numtokens == 0 ){ - /* skip over empty lines */ - continue ; - } else if( numtokens == 3 ){ - cellptr->xcenter = atoi( tokens[0] ) ; - cellptr->ycenter = atoi( tokens[1] ) ; - cellptr->orient = atoi( tokens[2] ) ; - break ; /* go on to the next cell */ - } else if( strcmp(tokens[0], "core" ) == STRINGEQ && - numtokens == 5 ){ - blocklG = MIN( blocklG, atoi( tokens[1] ) ) ; - blockbG = MIN( blockbG, atoi( tokens[2] ) ) ; - blockrG = MAX( blockrG, atoi( tokens[3] ) ) ; - blocktG = MAX( blocktG, atoi( tokens[4] ) ) ; - } else { - sprintf( YmsgG, "Problem reading .gen file on line:%d\n",line ) ; - M( ERRMSG, "read_gen_file", YmsgG ) ; - abort = TRUE ; - } - } - } - - TWCLOSE( fp ) ; - - if( abort ){ - M(ERRMSG, "read_gen_file", "Problem with genrows. Must abort\n" ) ; - closegraphics() ; - YexitPgm( PGMFAIL ) ; - } - /* ************ END READ RESULTS of genrows ************/ + char filename[LRECL] ; + char buffer[LRECL], *bufferptr ; + char **tokens ; /* for parsing file */ + INT numtokens, line ; + INT cell ; /* current cell number */ + INT type ; /* current cell type */ + CELLBOXPTR cellptr ; /* current cell */ + BOOL abort ; /* whether to abort program */ + FILE *fp ; + + if( num_macroS == 0 ){ + return ; + } + /* **************** READ RESULTS of genrows ************/ + sprintf(filename, "%s.gen" , cktNameG ) ; + fp = TWOPEN( filename , "r", ABORT ) ; + + /* parse file */ + line = 0 ; + abort = FALSE ; + for( cell = 1 ; cell <= numcellsG ; cell++ ) { + + cellptr = cellarrayG[cell] ; + type = cellptr->celltype ; + if( type != CUSTOMCELLTYPE && type != SOFTCELLTYPE ){ + continue ; + } + while( bufferptr=fgets(buffer,LRECL,fp )){ + /* parse file */ + line++ ; /* increment line number */ + tokens = Ystrparser( bufferptr, " \t\n", &numtokens ); + if( numtokens == 0 ){ + /* skip over empty lines */ + continue ; + } else if( numtokens == 3 ){ + cellptr->xcenter = atoi( tokens[0] ) ; + cellptr->ycenter = atoi( tokens[1] ) ; + cellptr->orient = atoi( tokens[2] ) ; + break ; /* go on to the next cell */ + } else if( strcmp(tokens[0], "core" ) == STRINGEQ && + numtokens == 5 ){ + blocklG = MIN( blocklG, atoi( tokens[1] ) ) ; + blockbG = MIN( blockbG, atoi( tokens[2] ) ) ; + blockrG = MAX( blockrG, atoi( tokens[3] ) ) ; + blocktG = MAX( blocktG, atoi( tokens[4] ) ) ; + } else { + sprintf( YmsgG, "Problem reading .gen file on line:%d\n",line ) ; + M( ERRMSG, "read_gen_file", YmsgG ) ; + abort = TRUE ; + } + } + } + + TWCLOSE( fp ) ; + + if( abort ){ + M(ERRMSG, "read_gen_file", "Problem with genrows. Must abort\n" ) ; + closegraphics() ; + YexitPgm( PGMFAIL ) ; + } + /* ************ END READ RESULTS of genrows ************/ } /* end read_gen_file() */ diff -Nru graywolf-0.1.5/src/twmc/paths.c graywolf-0.1.6/src/twmc/paths.c --- graywolf-0.1.5/src/twmc/paths.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/paths.c 2018-08-11 21:48:56.000000000 +0000 @@ -71,9 +71,6 @@ Fri Jan 18 18:32:01 PST 1991 - updated output format. Sun Jan 20 21:34:36 PST 1991 - ported to AIX. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) paths.c version 3.9 4/21/91" ; -#endif #include #include @@ -84,8 +81,10 @@ INT dcalc_min_path_len(); INT dcalc_max_path_len(); +void add2path_set( INT path ); +void clear_path_set(); -print_paths( ) +void print_paths( ) { char filename[LRECL] ; @@ -351,7 +350,7 @@ } /* end function calc_incr_time */ -update_time( cell ) +void update_time( cell ) INT cell ; { @@ -461,7 +460,7 @@ } /* end function calc_incr_time2 */ -update_time2( cella, cellb ) +void update_time2( cella, cellb ) INT cella, cellb ; { INT path_num ; /* name of path */ @@ -499,7 +498,7 @@ static INT path_set_countS ; /* current set count */ /* initialize set */ -init_path_set() +void init_path_set() { INT i ; @@ -512,8 +511,7 @@ } /* end initset */ /* add a path to the set if not already in set */ -add2path_set( path ) -INT path ; +void add2path_set( INT path ) { PSETPTR temp, cpath ; @@ -546,7 +544,7 @@ return( path_set_listS ) ; } -clear_path_set() +void clear_path_set() { path_set_countS ++ ; path_set_listS = NULL ; @@ -566,14 +564,14 @@ static INT net_set_count ; /* current set count */ /* initialize set */ -init_net_set() +void init_net_set() { net_set_array = (INT *) Ysafe_calloc((numnetsG+1), sizeof(INT) ); net_set_count = 1 ; } /* end initset */ /* add a net to the set if not already in set */ -add2net_set( net ) +void add2net_set( net ) INT net ; { if( net >= 1 || net <= numnetsG ){ @@ -585,7 +583,7 @@ } } /* end add2net_set */ -BOOL member_net_set( net ) +BOOL member_net_set( int net ) /* test for membership */ { if( net_set_array[net] == net_set_count ){ @@ -595,7 +593,7 @@ } } /* end member_net_set */ -clear_net_set() +void clear_net_set() { /* to clear set we only need to increment net_set_count */ /* we can use this set up to 2 Gig times without any problem */ diff -Nru graywolf-0.1.5/src/twmc/penalties.c graywolf-0.1.6/src/twmc/penalties.c --- graywolf-0.1.5/src/twmc/penalties.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/penalties.c 2018-08-11 21:48:56.000000000 +0000 @@ -51,9 +51,6 @@ Thu Feb 7 00:20:00 EST 1991 - reworked graph data. Thu Apr 18 01:40:16 EDT 1991 - refit overlap parameters. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) penalties.c version 3.8 9/16/91" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/twmc/perimeter.c graywolf-0.1.6/src/twmc/perimeter.c --- graywolf-0.1.5/src/twmc/perimeter.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/perimeter.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,18 +37,13 @@ * */ -#ifndef lint -static char SccsId[] = "@(#) perimeter.c version 3.4 12/16/90" ; -#endif #include #include #include -perimeter( A, numcorners ) -YBUSTBOXPTR A ; -INT numcorners ; +int perimeter( YBUSTBOXPTR A, INT numcorners ) { INT i , sum ; diff -Nru graywolf-0.1.5/src/twmc/placepads.c graywolf-0.1.6/src/twmc/placepads.c --- graywolf-0.1.5/src/twmc/placepads.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/placepads.c 2018-08-11 21:48:56.000000000 +0000 @@ -76,9 +76,6 @@ options when only a fraction of the pins to pads have connections to the core. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) placepads.c version 3.14 11/23/91" ; -#endif #include #include @@ -95,12 +92,15 @@ #define PADKEYWORD "pad" /* ***************** STATIC FUNCTION DEFINITIONS ******************* */ -static find_optimum_locations( P1(void) ) ; -static place_pad( P2(PADBOXPTR pad,INT bestside ) ) ; -static place_children( P5(PADBOXPTR pad,INT side,DOUBLE lb,DOUBLE ub,BOOL sr) ) ; +static void find_optimum_locations( P1(void) ) ; +static void place_pad( P2(PADBOXPTR pad,INT bestside ) ) ; +static void place_children( P5(PADBOXPTR pad,INT side,DOUBLE lb,DOUBLE ub,BOOL sr) ) ; static INT find_cost_for_a_side(P5(PADBOXPTR pad,INT side,DOUBLE lb,DOUBLE ub, - BOOL spacing_restricted ) ) ; -static find_core( P1(void) ) ; + BOOL spacing_restricted ) ) ; +static void find_core( P1(void) ) ; + +void call_place_pads(); +void output_nets( FILE *fp, int numnets ); /* ***************** STATIC VARIABLE DEFINITIONS ******************* */ static INT sumposS ; /* sum of the modified opt. pin pos. of pad pins */ @@ -114,300 +114,300 @@ /*------------------------------------------------------------------- - placepads() now call placepads program or uses internal algorithm. - If you convert from placepads program remember to change numterms - field to endsuper. -____________________________________________________________________*/ + placepads() now call placepads program or uses internal algorithm. + If you convert from placepads program remember to change numterms + field to endsuper. + ____________________________________________________________________*/ -placepads() +void placepads() { - if( padspacingG == EXACT_PADS ){ - /* no work to do */ - return ; - } - - find_core(); /* GET THE UPDATED CORE'S DIMENSION */ - - if( external_pad_programG ){ - call_place_pads() ; - funccostG = findcost() ; - return ; - } - - /* otherwise do the internal routines */ - D( "placepads/initially", - print_pads( "pads initially\n", padarrayG, totalpadsG ) ; - ) ; - - find_optimum_locations() ; - D( "placepads/after_find_opt", - print_pads( "pads after_cost\n", sortarrayG, totalpadsG ) ; - ) ; - - sort_pads(); - D( "placepads/after_sort", - print_pads( "pads after sort\n", placearrayG, numpadsG ); - ) ; + if( padspacingG == EXACT_PADS ){ + /* no work to do */ + return ; + } - align_pads(); - D( "placepads/after_align", - print_pads( "pads after align\n", placearrayG, numpadsG ) ; - ) ; + find_core(); /* GET THE UPDATED CORE'S DIMENSION */ - orient_pads(); - D( "placepads/after_orient", - print_pads( "pads after orient\n", placearrayG, numpadsG ) ; - ) ; + if( external_pad_programG ){ + call_place_pads() ; + funccostG = findcost() ; + return ; + } - dimension_pads(); - D( "placepads/after_dim", - print_pads( "pads after dimension\n", placearrayG, numpadsG ) ; - ) ; + /* otherwise do the internal routines */ + D( "placepads/initially", + print_pads( "pads initially\n", padarrayG, totalpadsG ) ; + ) ; + + find_optimum_locations() ; + D( "placepads/after_find_opt", + print_pads( "pads after_cost\n", sortarrayG, totalpadsG ) ; + ) ; + + sort_pads(); + D( "placepads/after_sort", + print_pads( "pads after sort\n", placearrayG, numpadsG ); + ) ; + + align_pads(); + D( "placepads/after_align", + print_pads( "pads after align\n", placearrayG, numpadsG ) ; + ) ; + + orient_pads(); + D( "placepads/after_orient", + print_pads( "pads after orient\n", placearrayG, numpadsG ) ; + ) ; + + dimension_pads(); + D( "placepads/after_dim", + print_pads( "pads after dimension\n", placearrayG, numpadsG ) ; + ) ; - funccostG = findcost() ; + funccostG = findcost() ; } /* end placepads */ /* ***************************************************************** */ -static find_optimum_locations() +static void find_optimum_locations() { - INT i ; /* pad counter */ - INT side ; /* loop thru valid sides */ - INT cost ; /* current cost */ - INT bestpos ; /* best modified position for pad */ - INT besttie ; /* best position for pad for tiebreak */ - INT bestcost ; /* best cost for pad or padgroup */ - INT bestside ; /* best side to place pad or padgroup */ - PADBOXPTR pad ; /* current pad */ - - /** FIND OPTIMUM PLACE FOR PADS ACCORDING TO THE RESTRICTIONS **/ - for( i = 1; i <= totalpadsG; i++ ){ - - /**** LEAVES AND SUBROOTS NEED TO BE PLACED ON THE SAME - **** SIDE AS THEIR PARENT ROOT, HENCE WE PLACE THE ROOT - **** FIRST, AND THEN PLACE ALL ITS CHILDREN **/ - - pad = padarrayG[i] ; - if( pad->padtype == PADGROUPTYPE && pad->hierarchy == ROOT ){ - /* the case of a padgroup root */ - bestcost = INT_MAX ; - for (side = 1; side <= 4; side++ ) { - if( pad->valid_side[ALL] || pad->valid_side[side] ){ - cost = find_cost_for_a_side( pad,side, - (DOUBLE) pad->lowerbound, (DOUBLE) pad->upperbound, - pad->fixed ) ; - if( cost < bestcost) { - bestcost = cost; - bestside = side ; - } - } - } - place_children( pad, bestside, (DOUBLE) pad->lowerbound, - (DOUBLE) pad->upperbound, pad->fixed ) ; - - } else if( pad->padtype == PADCELLTYPE && pad->hierarchy == NONE ) { - /* the case of a pad that is not in a padgroup */ - bestcost = INT_MAX ; - for (side = 1; side <= 4; side++ ) { - if( pad->valid_side[ALL] || pad->valid_side[side] ){ - cost = find_cost_for_a_side( pad,side, - (DOUBLE) pad->lowerbound, (DOUBLE) pad->upperbound, - pad->fixed ) ; - if( cost < bestcost) { - bestcost = cost; - bestside = side ; - bestpos = sumposS ; - besttie = sumtieS ; - } - } - } - /* now use the best positions for the position */ - sumposS = bestpos ; - sumtieS = besttie ; - place_pad( pad, bestside ) ; + INT i ; /* pad counter */ + INT side ; /* loop thru valid sides */ + INT cost ; /* current cost */ + INT bestpos ; /* best modified position for pad */ + INT besttie ; /* best position for pad for tiebreak */ + INT bestcost ; /* best cost for pad or padgroup */ + INT bestside ; /* best side to place pad or padgroup */ + PADBOXPTR pad ; /* current pad */ + + /** FIND OPTIMUM PLACE FOR PADS ACCORDING TO THE RESTRICTIONS **/ + for( i = 1; i <= totalpadsG; i++ ){ + + /**** LEAVES AND SUBROOTS NEED TO BE PLACED ON THE SAME + **** SIDE AS THEIR PARENT ROOT, HENCE WE PLACE THE ROOT + **** FIRST, AND THEN PLACE ALL ITS CHILDREN **/ + + pad = padarrayG[i] ; + if( pad->padtype == PADGROUPTYPE && pad->hierarchy == ROOT ){ + /* the case of a padgroup root */ + bestcost = INT_MAX ; + for (side = 1; side <= 4; side++ ) { + if( pad->valid_side[ALL] || pad->valid_side[side] ){ + cost = find_cost_for_a_side( pad,side, + (DOUBLE) pad->lowerbound, (DOUBLE) pad->upperbound, + pad->fixed ) ; + if( cost < bestcost) { + bestcost = cost; + bestside = side ; + } + } + } + place_children( pad, bestside, (DOUBLE) pad->lowerbound, + (DOUBLE) pad->upperbound, pad->fixed ) ; + + } else if( pad->padtype == PADCELLTYPE && pad->hierarchy == NONE ) { + /* the case of a pad that is not in a padgroup */ + bestcost = INT_MAX ; + for (side = 1; side <= 4; side++ ) { + if( pad->valid_side[ALL] || pad->valid_side[side] ){ + cost = find_cost_for_a_side( pad,side, + (DOUBLE) pad->lowerbound, (DOUBLE) pad->upperbound, + pad->fixed ) ; + if( cost < bestcost) { + bestcost = cost; + bestside = side ; + bestpos = sumposS ; + besttie = sumtieS ; + } + } + } + /* now use the best positions for the position */ + sumposS = bestpos ; + sumtieS = besttie ; + place_pad( pad, bestside ) ; - } /* end simple pad case */ - } + } /* end simple pad case */ + } } /* end find_optimum */ /* ***************************************************************** */ static INT find_cost_for_a_side(pad,side,lb,ub,spacing_restricted) -PADBOXPTR pad; -INT side ; -DOUBLE lb, ub ; -BOOL spacing_restricted ; -{ - INT i ; /* children counter */ - INT pos ; /* current pos. of current core pin constrained*/ - INT dist ; /* current distance from core pin to pad */ - INT cost ; /* sum of the opt pad pins to closest core pin */ - INT dist2 ; /* under restrictions dist from core pin to pad */ - INT lowpos ; /* convert lower bound to a position */ - INT uppos ; /* convert upper bound to a position */ - INT bestpos ; /* best constrained pos for pad to core for 1 net */ - INT besttie ; /* best position for pad to core for 1 net */ - INT bestdist ; /* best distance for pad to core for 1 net */ - INT tiebreak ; /* best place to put pad pin unconstrained */ - BOOL pinFound ; /* true if we find a match on current net */ - PINBOXPTR pinptr; /* current pin */ - PINBOXPTR netterm;/* loop thru pins of a net */ - PADBOXPTR child; /* go thru the children of the padgroup */ - - - /**** FOR NORMAL PADS AND LEAVES, JUST CALCULATE THE COST */ - /*** AND POSITION. THE LEAF CASE IS THE RETURN CONDITION OF */ - /*** THE RECURSION ON THE ROOT PADS ***/ - - if( pad->hierarchy == LEAF || pad->hierarchy == SUBROOT ){ - if( !(pad->valid_side[ALL]) && !(pad->valid_side[side]) ){ - /* this is not a valid side return a huge cost */ - return( PINFINITY ) ; - } - } - /* At this point are guaranteed to have a valid side */ - cost = 0 ; - sumposS = 0 ; - sumtieS = 0 ; - - /* determine spacing restrictions */ - calc_constraints( pad, side, &lb, &ub, &spacing_restricted, - &lowpos, &uppos ) ; - - if( pad->hierarchy == LEAF || pad->hierarchy == NONE ){ - - - /**** FOR ALL PINS BELONGING TO THE SAME NET AS PINS ON THE - PAD, FIND THE PIN CLOSEST TO THE SIDE IN padside. ****/ - - /**** ASSUME NO PIN WAS FOUND ***/ - pin_countS = 0 ; - - for ( pinptr = cellarrayG[pad->cellnum]->pinptr ;pinptr; pinptr = pinptr->nextpin) { - bestdist = INT_MAX ; - /*** GO TO FIRST TERMS OF THE NET TO MAKE SURE ALL - TERMINALS ARE INCLUDED ***/ - pinFound = FALSE ; - netterm = netarrayG[pinptr->net]->pins; - for( ;netterm ;netterm = netterm->next ) { - - /**** CALCULATE THE DISTANCE FROM CORE. - **** pos IS THE POSITION OF THE PAD ON THIS SIDE - **** WHICH RESULTS IN THE SHORTEST DISTANCE TO THE PIN. - **** ONLY PINS ON CELLS ARE IN THIS CONTEST **/ - - - if( netterm->cell <= endsuperG ) { - switch (side) { - case L: - pos = netterm->ypos; - dist = netterm->xpos - coreG[X][MINI]; - break; - case T: - pos = netterm->xpos; - dist = coreG[Y][MAXI] - netterm->ypos; - break; - case R: - pos = netterm->ypos; - dist = coreG[X][MAXI] - netterm->xpos; - break; - case B: - pos = netterm->xpos; - dist = netterm->ypos - coreG[Y][MINI]; - break; - } /* end switch on side */ - - tiebreak = pos ; /* save original spot */ - if( spacing_restricted ){ - /* the pad placement on the side has been */ - /* restricted in some way */ - if( lowpos <= pos && pos <= uppos ){ - /* everythings cool do no extra distance */ - dist2 = 0 ; - } else if( lowpos > pos ){ - dist2 = ABS( lowpos - pos ) ; - pos = lowpos ; - } else if( pos > uppos ){ - dist2 = ABS( pos - uppos ) ; - pos = uppos ; - } - /* modify the distance by it Manhattan length */ - /* to the pad in the orthogonal direction */ - /* since this pad is fixed at a point */ -/* could modify this to be more accurate since we want matching padpin*/ - dist += dist2 ; - } - } - if (dist < bestdist) { - bestdist = dist; /*** UPDATE THE BEST DISTANCE */ - bestpos = pos; /*** AND BEST POSITION */ - besttie = tiebreak; /* save the original position */ - pinFound = TRUE ; /* pin on this net was found */ - } - } /* end looking at this net */ - - if( pinFound ){ - /*** SUM UP THE BEST POSITION OF ALL PINS */ - sumposS += bestpos ; - sumtieS += besttie ; - - /*** KEEP TRACK OF THE TOTAL COST FOR THIS SIDE */ - cost += bestdist; - pin_countS++ ; - } - } /* end for loop on pins of the pad */ - - /*** IF NO PIN IS FOUND TO MATCH WITH PAD ARBITRARILY ***/ - /*** SET best position to random number for THIS PAD ***/ - if( pin_countS == 0 ){ - if( spacing_restricted ){ - /* average between constraints */ - sumposS = (lowpos + uppos) / 2 ; - } else { - /* - Randomly pick a cost to break ties in the - case that this pad could go on any side. Small - value will not effect padgroups - */ - cost = PICK_INT( 0, 3 ) ; - switch (side) { - case L: - sumposS = PICK_INT( coreG[Y][MINI],coreG[Y][MAXI] ) ; - break; - case T: - sumposS = PICK_INT( coreG[X][MINI],coreG[X][MAXI] ) ; - break; - case R: - sumposS = PICK_INT( coreG[Y][MINI],coreG[Y][MAXI] ) ; - break; - case B: - sumposS = PICK_INT( coreG[X][MINI],coreG[X][MAXI] ) ; - break; - default: - break; - } - } - sumtieS = sumposS ; - } /* end pin_countS == 0 */ - - return( cost ) ; - - } else { - - /*** - IF THE PAD IS A SUPERPAD, THEN SEARCH THROUGH ALL *** - ITS CHILDREN AND SUM THE COST AND IDEAL POSITION *** - RECURSIVELY. Use the spacing restrictions derived above. - ***/ - - - for( i = 1 ;i <= pad->children[HOWMANY]; i++ ){ - child = padarrayG[pad->children[i]]; - cost += find_cost_for_a_side( child, side, - lb, ub, spacing_restricted ) ; - } - return( cost ); + PADBOXPTR pad; + INT side ; + DOUBLE lb, ub ; + BOOL spacing_restricted ; +{ + INT i ; /* children counter */ + INT pos ; /* current pos. of current core pin constrained*/ + INT dist ; /* current distance from core pin to pad */ + INT cost ; /* sum of the opt pad pins to closest core pin */ + INT dist2 ; /* under restrictions dist from core pin to pad */ + INT lowpos ; /* convert lower bound to a position */ + INT uppos ; /* convert upper bound to a position */ + INT bestpos ; /* best constrained pos for pad to core for 1 net */ + INT besttie ; /* best position for pad to core for 1 net */ + INT bestdist ; /* best distance for pad to core for 1 net */ + INT tiebreak ; /* best place to put pad pin unconstrained */ + BOOL pinFound ; /* true if we find a match on current net */ + PINBOXPTR pinptr; /* current pin */ + PINBOXPTR netterm;/* loop thru pins of a net */ + PADBOXPTR child; /* go thru the children of the padgroup */ + + + /**** FOR NORMAL PADS AND LEAVES, JUST CALCULATE THE COST */ + /*** AND POSITION. THE LEAF CASE IS THE RETURN CONDITION OF */ + /*** THE RECURSION ON THE ROOT PADS ***/ + + if( pad->hierarchy == LEAF || pad->hierarchy == SUBROOT ){ + if( !(pad->valid_side[ALL]) && !(pad->valid_side[side]) ){ + /* this is not a valid side return a huge cost */ + return( PINFINITY ) ; + } + } + /* At this point are guaranteed to have a valid side */ + cost = 0 ; + sumposS = 0 ; + sumtieS = 0 ; + + /* determine spacing restrictions */ + calc_constraints( pad, side, &lb, &ub, &spacing_restricted, + &lowpos, &uppos ) ; + + if( pad->hierarchy == LEAF || pad->hierarchy == NONE ){ + + + /**** FOR ALL PINS BELONGING TO THE SAME NET AS PINS ON THE + PAD, FIND THE PIN CLOSEST TO THE SIDE IN padside. ****/ + + /**** ASSUME NO PIN WAS FOUND ***/ + pin_countS = 0 ; + + for ( pinptr = cellarrayG[pad->cellnum]->pinptr ;pinptr; pinptr = pinptr->nextpin) { + bestdist = INT_MAX ; + /*** GO TO FIRST TERMS OF THE NET TO MAKE SURE ALL + TERMINALS ARE INCLUDED ***/ + pinFound = FALSE ; + netterm = netarrayG[pinptr->net]->pins; + for( ;netterm ;netterm = netterm->next ) { + + /**** CALCULATE THE DISTANCE FROM CORE. + **** pos IS THE POSITION OF THE PAD ON THIS SIDE + **** WHICH RESULTS IN THE SHORTEST DISTANCE TO THE PIN. + **** ONLY PINS ON CELLS ARE IN THIS CONTEST **/ + + + if( netterm->cell <= endsuperG ) { + switch (side) { + case L: + pos = netterm->ypos; + dist = netterm->xpos - coreG[X][MINI]; + break; + case T: + pos = netterm->xpos; + dist = coreG[Y][MAXI] - netterm->ypos; + break; + case R: + pos = netterm->ypos; + dist = coreG[X][MAXI] - netterm->xpos; + break; + case B: + pos = netterm->xpos; + dist = netterm->ypos - coreG[Y][MINI]; + break; + } /* end switch on side */ + + tiebreak = pos ; /* save original spot */ + if( spacing_restricted ){ + /* the pad placement on the side has been */ + /* restricted in some way */ + if( lowpos <= pos && pos <= uppos ){ + /* everythings cool do no extra distance */ + dist2 = 0 ; + } else if( lowpos > pos ){ + dist2 = ABS( lowpos - pos ) ; + pos = lowpos ; + } else if( pos > uppos ){ + dist2 = ABS( pos - uppos ) ; + pos = uppos ; + } + /* modify the distance by it Manhattan length */ + /* to the pad in the orthogonal direction */ + /* since this pad is fixed at a point */ + /* could modify this to be more accurate since we want matching padpin*/ + dist += dist2 ; + } + } + if (dist < bestdist) { + bestdist = dist; /*** UPDATE THE BEST DISTANCE */ + bestpos = pos; /*** AND BEST POSITION */ + besttie = tiebreak; /* save the original position */ + pinFound = TRUE ; /* pin on this net was found */ + } + } /* end looking at this net */ + + if( pinFound ){ + /*** SUM UP THE BEST POSITION OF ALL PINS */ + sumposS += bestpos ; + sumtieS += besttie ; + + /*** KEEP TRACK OF THE TOTAL COST FOR THIS SIDE */ + cost += bestdist; + pin_countS++ ; + } + } /* end for loop on pins of the pad */ + + /*** IF NO PIN IS FOUND TO MATCH WITH PAD ARBITRARILY ***/ + /*** SET best position to random number for THIS PAD ***/ + if( pin_countS == 0 ){ + if( spacing_restricted ){ + /* average between constraints */ + sumposS = (lowpos + uppos) / 2 ; + } else { + /* + Randomly pick a cost to break ties in the + case that this pad could go on any side. Small + value will not effect padgroups + */ + cost = PICK_INT( 0, 3 ) ; + switch (side) { + case L: + sumposS = PICK_INT( coreG[Y][MINI],coreG[Y][MAXI] ) ; + break; + case T: + sumposS = PICK_INT( coreG[X][MINI],coreG[X][MAXI] ) ; + break; + case R: + sumposS = PICK_INT( coreG[Y][MINI],coreG[Y][MAXI] ) ; + break; + case B: + sumposS = PICK_INT( coreG[X][MINI],coreG[X][MAXI] ) ; + break; + default: + break; + } + } + sumtieS = sumposS ; + } /* end pin_countS == 0 */ + + return( cost ) ; + + } else { + + /*** + IF THE PAD IS A SUPERPAD, THEN SEARCH THROUGH ALL *** + ITS CHILDREN AND SUM THE COST AND IDEAL POSITION *** + RECURSIVELY. Use the spacing restrictions derived above. + ***/ + + + for( i = 1 ;i <= pad->children[HOWMANY]; i++ ){ + child = padarrayG[pad->children[i]]; + cost += find_cost_for_a_side( child, side, + lb, ub, spacing_restricted ) ; } + return( cost ); + } } /* end find_cost_for_a_side */ /* ***************************************************************** */ @@ -418,33 +418,33 @@ **** are set in those routines. Otherwise set sumposS and sumtieS **** to their proper values. ***/ -static place_pad( pad, bestside ) -PADBOXPTR pad ; -INT bestside ; +static void place_pad( pad, bestside ) + PADBOXPTR pad ; + INT bestside ; { - if( pin_countS == 0 ){ - /*** SET PAD TO RANDOM POSITION DETERMINED IN find_cost_for_side*/ - pad->position = sumposS ; - pad->tiebreak = sumtieS ; - } else { - pad->position = sumposS / pin_countS ; - pad->tiebreak = sumtieS / pin_countS ; - } - /* now bound pad center to current core boundary for normal case */ - pad->padside = bestside ; + if( pin_countS == 0 ){ + /*** SET PAD TO RANDOM POSITION DETERMINED IN find_cost_for_side*/ + pad->position = sumposS ; + pad->tiebreak = sumtieS ; + } else { + pad->position = sumposS / pin_countS ; + pad->tiebreak = sumtieS / pin_countS ; + } + /* now bound pad center to current core boundary for normal case */ + pad->padside = bestside ; #ifdef LATER - switch( bestside ){ - case L: - case R: - pad->position = MAX( pad->position, coreG[Y][MINI] ) ; - pad->position = MIN( pad->position, coreG[Y][MAXI] ) ; - break; - case T: - case B: - pad->position = MAX( pad->position, coreG[X][MINI] ) ; - pad->position = MIN( pad->position, coreG[X][MAXI] ) ; - } /* end bound of pad position */ + switch( bestside ){ + case L: + case R: + pad->position = MAX( pad->position, coreG[Y][MINI] ) ; + pad->position = MIN( pad->position, coreG[Y][MAXI] ) ; + break; + case T: + case B: + pad->position = MAX( pad->position, coreG[X][MINI] ) ; + pad->position = MIN( pad->position, coreG[X][MAXI] ) ; + } /* end bound of pad position */ #endif } /* end place_pad */ @@ -454,112 +454,112 @@ /**** RECURSIVELY SET THE PADSIDE OF ALL CHILDREN OF THE ROOT PAD TO THE **** PADSIDE OF THE PARENT. GIVEN THAT SIDE, SET THE OPTIMAL CXCENTER */ -static place_children( pad, side, lb, ub, spacing_restricted ) -PADBOXPTR pad ; -INT side ; -DOUBLE lb, ub ; -BOOL spacing_restricted ; -{ - INT i ; /* pad counter */ - INT pos ; /* position of last placed pad */ - INT min_pos ; /* min position of the last padgroup */ - INT max_pos ; /* max position of the last padgroup */ - DOUBLE lowbound ; /* lower bound for pad or pad group */ - DOUBLE hibound ; /* upper bound for pad or pad group */ - PADBOXPTR child; /* go thru the children of the padgroup */ - - /* DETERMINE SPACING RESTRICTIONS */ - if( spacing_restricted ){ - /* this is the case that the spacing has been restricted */ - if( pad->fixed ){ - /* if the padgroup bounds have been fixed, */ - /* force position to be within bound */ - /* assume we are ok and then correct it */ - lowbound = pad->lowerbound ; - if( lowbound < lb ){ - lowbound = lb ; - } - if( lowbound > ub ){ - lowbound = ub ; - } - hibound = pad->upperbound ; - if( hibound < lb ){ - hibound = lb ; - } - if( hibound > ub ){ - hibound = ub ; - } - } else { - /* this pad is not fixed use the given ub and lb */ - lowbound = lb ; hibound = ub ; - } +static void place_children( pad, side, lb, ub, spacing_restricted ) + PADBOXPTR pad ; + INT side ; + DOUBLE lb, ub ; + BOOL spacing_restricted ; +{ + INT i ; /* pad counter */ + INT pos ; /* position of last placed pad */ + INT min_pos ; /* min position of the last padgroup */ + INT max_pos ; /* max position of the last padgroup */ + DOUBLE lowbound ; /* lower bound for pad or pad group */ + DOUBLE hibound ; /* upper bound for pad or pad group */ + PADBOXPTR child; /* go thru the children of the padgroup */ + + /* DETERMINE SPACING RESTRICTIONS */ + if( spacing_restricted ){ + /* this is the case that the spacing has been restricted */ + if( pad->fixed ){ + /* if the padgroup bounds have been fixed, */ + /* force position to be within bound */ + /* assume we are ok and then correct it */ + lowbound = pad->lowerbound ; + if( lowbound < lb ){ + lowbound = lb ; + } + if( lowbound > ub ){ + lowbound = ub ; + } + hibound = pad->upperbound ; + if( hibound < lb ){ + hibound = lb ; + } + if( hibound > ub ){ + hibound = ub ; + } } else { - if( pad->fixed ){ - /* the padgroup bounds have not been fixed */ - /* just take the pad's restricted position */ - lowbound = pad->lowerbound; - hibound = pad->upperbound; - spacing_restricted = TRUE ; - } - } - /* **** END spacing restriction calculations *** */ - - if( pad->hierarchy == LEAF ){ - find_cost_for_a_side( pad, side, - lowbound, hibound, spacing_restricted ) ; - place_pad( pad, side ) ; - return ; + /* this pad is not fixed use the given ub and lb */ + lowbound = lb ; hibound = ub ; + } + } else { + if( pad->fixed ){ + /* the padgroup bounds have not been fixed */ + /* just take the pad's restricted position */ + lowbound = pad->lowerbound; + hibound = pad->upperbound; + spacing_restricted = TRUE ; + } + } + /* **** END spacing restriction calculations *** */ + + if( pad->hierarchy == LEAF ){ + find_cost_for_a_side( pad, side, + lowbound, hibound, spacing_restricted ) ; + place_pad( pad, side ) ; + return ; + } else { + pos = 0 ; + min_pos = INT_MAX ; + max_pos = INT_MIN ; + for( i = 1; i <= pad->children[HOWMANY]; i++ ){ + child = padarrayG[pad->children[i]]; + place_children( child, side, lowbound, hibound, spacing_restricted ) ; + pos += child->position ; + min_pos = MIN( child->position, min_pos ) ; + max_pos = MAX( child->position, max_pos ) ; + } + if( pad->children[HOWMANY] ){ + pad->position = pos /= pad->children[HOWMANY] ; } else { - pos = 0 ; - min_pos = INT_MAX ; - max_pos = INT_MIN ; - for( i = 1; i <= pad->children[HOWMANY]; i++ ){ - child = padarrayG[pad->children[i]]; - place_children( child, side, lowbound, hibound, spacing_restricted ) ; - pos += child->position ; - min_pos = MIN( child->position, min_pos ) ; - max_pos = MAX( child->position, max_pos ) ; - } - if( pad->children[HOWMANY] ){ - pad->position = pos /= pad->children[HOWMANY] ; - } else { - pad->position = pos ; - } - /* for tiebreak use the bounds of the padgroup and average them. */ - /* set the side of the pad */ - pad->padside = side ; - pad->tiebreak = (min_pos + max_pos ) / 2 ; - return ; + pad->position = pos ; } + /* for tiebreak use the bounds of the padgroup and average them. */ + /* set the side of the pad */ + pad->padside = side ; + pad->tiebreak = (min_pos + max_pos ) / 2 ; + return ; + } } /* end place_children */ /* ***************************************************************** */ /* ***************************************************************** */ #ifdef DEBUG -print_pads( message, array, howmany ) -char *message ; -PADBOXPTR *array ; -INT howmany ; -{ - INT i ; - PADBOXPTR ptr ; - CELLBOXPTR cptr ; - - fprintf( stderr, "\n%s\n", message ) ; - - /* now print them out */ - for( i = 1 ; i <= howmany; i++ ){ - ptr = array[i] ; - cptr = cellarrayG[ptr->cellnum] ; - fprintf( stderr, - "pad:%s x:%d y:%d type:%d side:%d pos:%d tie:%d orient:%d\n", - cptr->cname, cptr->xcenter, cptr->ycenter, ptr->hierarchy, - ptr->padside, ptr->position, ptr->tiebreak, cptr->orient ) ; - } - fprintf( stderr, "\n" ) ; +void print_pads( message, array, howmany ) + char *message ; + PADBOXPTR *array ; + INT howmany ; +{ + INT i ; + PADBOXPTR ptr ; + CELLBOXPTR cptr ; + + fprintf( stderr, "\n%s\n", message ) ; + + /* now print them out */ + for( i = 1 ; i <= howmany; i++ ){ + ptr = array[i] ; + cptr = cellarrayG[ptr->cellnum] ; + fprintf( stderr, + "pad:%s x:%d y:%d type:%d side:%d pos:%d tie:%d orient:%d\n", + cptr->cname, cptr->xcenter, cptr->ycenter, ptr->hierarchy, + ptr->padside, ptr->position, ptr->tiebreak, cptr->orient ) ; + } + fprintf( stderr, "\n" ) ; - dimension_pads() ; - G( process_graphics() ) ; + dimension_pads() ; + G( process_graphics() ) ; } /* end print_pads */ @@ -568,415 +568,417 @@ /* turn virtual core on and off */ -setVirtualCore( flag ) -BOOL flag ; +void setVirtualCore( BOOL flag ) { - virtualCoreS = flag ; + virtualCoreS = flag ; } /* end set Virtual core */ /* function finds and returns core boundary region including cells */ /* which overlap the core region */ -find_core_boundary( left, right, bottom, top ) -INT *left, *right, *bottom, *top ; +void find_core_boundary( INT *left, INT *right, INT *bottom, INT *top ) { - BOOL rememberFlag ; + BOOL rememberFlag ; - /* call routine to find core boundary based on virtual core */ - rememberFlag = virtualCoreS ;/* so we can put flag back */ - virtualCoreS = TRUE ; - find_core() ; - - /* set flag back to whatever it was */ - virtualCoreS = rememberFlag ; - - /* now return values */ - *left = coreG[X][MINI] ; - *right = coreG[X][MAXI] ; - *bottom = coreG[Y][MINI] ; - *top = coreG[Y][MAXI] ; + /* call routine to find core boundary based on virtual core */ + rememberFlag = virtualCoreS ;/* so we can put flag back */ + virtualCoreS = TRUE ; + find_core() ; + + /* set flag back to whatever it was */ + virtualCoreS = rememberFlag ; + + /* now return values */ + *left = coreG[X][MINI] ; + *right = coreG[X][MAXI] ; + *bottom = coreG[Y][MINI] ; + *top = coreG[Y][MAXI] ; } /* end find_core_boundary */ /* given a cell it returns bounding box of cell in global coordinates */ -get_global_pos( cell, l, b, r, t ) -INT cell ; -INT *l, *r, *b, *t ; -{ - INT orient ; - BOUNBOXPTR bounptr ; - CELLBOXPTR ptr ; - - ptr = cellarrayG[cell] ; - orient = ptr->orient ; - bounptr = ptr->bounBox[orient] ; - *l = bounptr->l ; - *r = bounptr->r ; - *b = bounptr->b ; - *t = bounptr->t ; - - /* now add xcenter ycenter to get global position */ - *l += ptr->xcenter ; - *r += ptr->xcenter ; - *b += ptr->ycenter ; - *t += ptr->ycenter ; +void get_global_pos( cell, l, b, r, t ) + INT cell ; + INT *l, *r, *b, *t ; +{ + INT orient ; + BOUNBOXPTR bounptr ; + CELLBOXPTR ptr ; + + ptr = cellarrayG[cell] ; + orient = ptr->orient ; + bounptr = ptr->bounBox[orient] ; + *l = bounptr->l ; + *r = bounptr->r ; + *b = bounptr->b ; + *t = bounptr->t ; + + /* now add xcenter ycenter to get global position */ + *l += ptr->xcenter ; + *r += ptr->xcenter ; + *b += ptr->ycenter ; + *t += ptr->ycenter ; } /* end get_global_pos */ /* given a cell it returns bounding box of cell including routing area */ -get_routing_boundary( cell, ret_l, ret_b, ret_r, ret_t ) -INT cell ; -INT *ret_l, *ret_r, *ret_b, *ret_t ; /* return quantities */ -{ - INT minx, maxx ; - INT miny, maxy ; - CELLBOXPTR ptr ; - RTILEBOXPTR tileptr ; - - - get_global_pos( cell, ret_l, ret_b, ret_r, ret_t ) ; - - if( !(routingTilesG) ){ - /* return cell boundary if no routing tiles */ - return ; - } - - /* otherwise find bounding box of routing tiles */ - minx = INT_MAX ; - miny = INT_MAX ; - maxx = INT_MIN ; - maxy = INT_MIN ; - for( tileptr = routingTilesG[cell];tileptr;tileptr=tileptr->next ){ - minx = MIN( minx, tileptr->x1 ) ; - maxx = MAX( maxx, tileptr->x2 ) ; - miny = MIN( miny, tileptr->y1 ) ; - maxy = MAX( maxy, tileptr->y2 ) ; - } - - /* now add xcenter ycenter to get global position */ - ptr = cellarrayG[cell] ; - *ret_l = MIN( minx + ptr->xcenter, *ret_l ) ; - *ret_r = MAX( maxx + ptr->xcenter, *ret_r ) ; - *ret_b = MIN( miny + ptr->ycenter, *ret_b ) ; - *ret_t = MAX( maxy + ptr->ycenter, *ret_t ) ; +void get_routing_boundary( cell, ret_l, ret_b, ret_r, ret_t ) + INT cell ; + INT *ret_l, *ret_r, *ret_b, *ret_t ; /* return quantities */ +{ + INT minx, maxx ; + INT miny, maxy ; + CELLBOXPTR ptr ; + RTILEBOXPTR tileptr ; + + + get_global_pos( cell, ret_l, ret_b, ret_r, ret_t ) ; + + if( !(routingTilesG) ){ + /* return cell boundary if no routing tiles */ return ; + } + + /* otherwise find bounding box of routing tiles */ + minx = INT_MAX ; + miny = INT_MAX ; + maxx = INT_MIN ; + maxy = INT_MIN ; + for( tileptr = routingTilesG[cell];tileptr;tileptr=tileptr->next ){ + minx = MIN( minx, tileptr->x1 ) ; + maxx = MAX( maxx, tileptr->x2 ) ; + miny = MIN( miny, tileptr->y1 ) ; + maxy = MAX( maxy, tileptr->y2 ) ; + } + + /* now add xcenter ycenter to get global position */ + ptr = cellarrayG[cell] ; + *ret_l = MIN( minx + ptr->xcenter, *ret_l ) ; + *ret_r = MAX( maxx + ptr->xcenter, *ret_r ) ; + *ret_b = MIN( miny + ptr->ycenter, *ret_b ) ; + *ret_t = MAX( maxy + ptr->ycenter, *ret_t ) ; + return ; } /* end get_routing_boundary */ static INT get_pad_routing( cell ) -INT cell ; + INT cell ; { - CELLBOXPTR cptr ; /* pad cell in question */ - RTILEBOXPTR tptr ; /* look at all the routing tiles */ - INT last_core_cell ; /* calc last core cell index */ - INT new ; /* new position with routing */ - INT old ; /* old position with no routing */ - - last_core_cell = ( (INT) routingTilesG[HOWMANY] ) - 4 ; - - /* find bounding box of routing tiles */ - cptr = cellarrayG[endpadgrpsG + cell] ; - tptr = routingTilesG[last_core_cell + cell] ; - new = 0 ; - switch( cell ){ + CELLBOXPTR cptr ; /* pad cell in question */ + RTILEBOXPTR tptr ; /* look at all the routing tiles */ + INT last_core_cell ; /* calc last core cell index */ + INT new ; /* new position with routing */ + INT old ; /* old position with no routing */ + + last_core_cell = ( (INT) routingTilesG[HOWMANY] ) - 4 ; + + /* find bounding box of routing tiles */ + cptr = cellarrayG[endpadgrpsG + cell] ; + tptr = routingTilesG[last_core_cell + cell] ; + new = 0 ; + switch( cell ){ case L: - for( ; tptr ; tptr = tptr->next ){ - new = MAX( new, tptr->x2 ) ; - } - old = cptr->tiles->right ; - break ; + for( ; tptr ; tptr = tptr->next ){ + new = MAX( new, tptr->x2 ) ; + } + old = cptr->tiles->right ; + break ; case T: - for( ; tptr ; tptr = tptr->next ){ - new = MIN( new, tptr->y1 ) ; - } - old = cptr->tiles->bottom ; - break ; + for( ; tptr ; tptr = tptr->next ){ + new = MIN( new, tptr->y1 ) ; + } + old = cptr->tiles->bottom ; + break ; case R: - for( ; tptr ; tptr = tptr->next ){ - new = MIN( new, tptr->x1 ) ; - } - old = cptr->tiles->left ; - break ; + for( ; tptr ; tptr = tptr->next ){ + new = MIN( new, tptr->x1 ) ; + } + old = cptr->tiles->left ; + break ; case B: - for( ; tptr ; tptr = tptr->next ){ - new = MAX( new, tptr->y2 ) ; - } - old = cptr->tiles->top ; - break ; - } /* end switch */ - - if( new ){ - return( ABS( new - old ) ) ; - } - return( 0 ) ; + for( ; tptr ; tptr = tptr->next ){ + new = MAX( new, tptr->y2 ) ; + } + old = cptr->tiles->top ; + break ; + } /* end switch */ + + if( new ){ + return( ABS( new - old ) ) ; + } + return( 0 ) ; } /* end get_pad_routing */ -static find_core() +static void find_core() { - INT ominx, ominy ; - INT omaxx, omaxy ; - INT l, r, b, t ; - INT i ; - - if( virtualCoreS ){ - /* initialize xmin, ymax, etc. */ - coreG[X][MINI] = INT_MAX ; - coreG[Y][MINI] = INT_MAX ; - coreG[X][MAXI] = INT_MIN ; - coreG[Y][MAXI] = INT_MIN ; - - /* reset bounding boxes for all cells for get_global_pos */ - regenorient(1, numcellsG) ; - - /* find virtual boundary of core */ - for( i=1;i<=numcellsG;i++ ){ - - if( cellarrayG[i]->celltype == STDCELLTYPE && doPartitionG ){ - /* ignore standard cell types */ - continue ; - } - - if( doPartitionG ){ - get_global_pos( i, &l, &b, &r, &t ) ; - } else { - get_routing_boundary( i, &l, &b, &r, &t ) ; - } - coreG[X][MINI] = MIN( coreG[X][MINI], l ) ; - coreG[X][MAXI] = MAX( coreG[X][MAXI], r ) ; - coreG[Y][MINI] = MIN( coreG[Y][MINI], b ) ; - coreG[Y][MAXI] = MAX( coreG[Y][MAXI], t ) ; - - } - if( doPartitionG ){ - coreG[X][MINI] = MIN( coreG[X][MINI], blocklG ) ; - coreG[X][MAXI] = MAX( coreG[X][MAXI], blockrG ) ; - coreG[Y][MINI] = MIN( coreG[Y][MINI], blockbG ) ; - coreG[Y][MAXI] = MAX( coreG[Y][MAXI], blocktG ) ; - } - /* set block parameters once virtual core is set */ - blocklG = coreG[X][MINI] ; - blockrG = coreG[X][MAXI] ; - blockbG = coreG[Y][MINI] ; - blocktG = coreG[Y][MAXI] ; - } else { - coreG[X][MINI] = blocklG ; - coreG[X][MAXI] = blockrG ; - coreG[Y][MINI] = blockbG ; - coreG[Y][MAXI] = blocktG ; - } - - /* now guarantee space between core and pads */ - /* if global router info not available */ - if( !(routingTilesG) ){ - coreG[X][MINI] -= track_spacingXG ; - coreG[Y][MINI] -= track_spacingYG ; - coreG[X][MAXI] += track_spacingXG ; - coreG[Y][MAXI] += track_spacingYG ; - } else if(!(doPartitionG)){ - /* find delta in pad spacing */ - coreG[X][MINI] -= get_pad_routing( L ) ; - coreG[Y][MAXI] += get_pad_routing( T ) ; - coreG[X][MAXI] += get_pad_routing( R ) ; - coreG[Y][MINI] -= get_pad_routing( B ) ; - } - - /* if the grid is given force to grid positions */ - if( gridCellsG ){ - ominx = coreG[X][MINI] ; - ominy = coreG[Y][MINI] ; - omaxx = coreG[X][MAXI] ; - omaxy = coreG[Y][MAXI] ; - YforceGrid( &coreG[X][MINI], &coreG[Y][MINI] ) ; - YforceGrid( &coreG[X][MAXI], &coreG[Y][MAXI] ) ; - - /* make sure gridded data is outside of core to avoid overlap */ - if( ominx < coreG[X][MINI] ){ - coreG[X][MINI] -= track_spacingXG ; - } - if( ominy < coreG[Y][MINI] ){ - coreG[Y][MINI] -= track_spacingYG ; - } - if( omaxx > coreG[X][MAXI] ){ - coreG[X][MAXI] += track_spacingXG ; - } - if( omaxy > coreG[Y][MAXI] ){ - coreG[Y][MAXI] += track_spacingYG ; - } - } - perdimG[X] = coreG[X][MAXI] - coreG[X][MINI] ; - perdimG[Y] = coreG[Y][MAXI] - coreG[Y][MINI] ; + INT ominx, ominy ; + INT omaxx, omaxy ; + INT l, r, b, t ; + INT i ; + + if( virtualCoreS ){ + /* initialize xmin, ymax, etc. */ + coreG[X][MINI] = INT_MAX ; + coreG[Y][MINI] = INT_MAX ; + coreG[X][MAXI] = INT_MIN ; + coreG[Y][MAXI] = INT_MIN ; + + /* reset bounding boxes for all cells for get_global_pos */ + regenorient(1, numcellsG) ; + + /* find virtual boundary of core */ + for( i=1;i<=numcellsG;i++ ){ + + if( cellarrayG[i]->celltype == STDCELLTYPE && doPartitionG ){ + /* ignore standard cell types */ + continue ; + } + + if( doPartitionG ){ + get_global_pos( i, &l, &b, &r, &t ) ; + } else { + get_routing_boundary( i, &l, &b, &r, &t ) ; + } + coreG[X][MINI] = MIN( coreG[X][MINI], l ) ; + coreG[X][MAXI] = MAX( coreG[X][MAXI], r ) ; + coreG[Y][MINI] = MIN( coreG[Y][MINI], b ) ; + coreG[Y][MAXI] = MAX( coreG[Y][MAXI], t ) ; + + } + if( doPartitionG ){ + coreG[X][MINI] = MIN( coreG[X][MINI], blocklG ) ; + coreG[X][MAXI] = MAX( coreG[X][MAXI], blockrG ) ; + coreG[Y][MINI] = MIN( coreG[Y][MINI], blockbG ) ; + coreG[Y][MAXI] = MAX( coreG[Y][MAXI], blocktG ) ; + } + /* set block parameters once virtual core is set */ + blocklG = coreG[X][MINI] ; + blockrG = coreG[X][MAXI] ; + blockbG = coreG[Y][MINI] ; + blocktG = coreG[Y][MAXI] ; + } else { + coreG[X][MINI] = blocklG ; + coreG[X][MAXI] = blockrG ; + coreG[Y][MINI] = blockbG ; + coreG[Y][MAXI] = blocktG ; + } + + /* now guarantee space between core and pads */ + /* if global router info not available */ + if( !(routingTilesG) ){ + coreG[X][MINI] -= track_spacingXG ; + coreG[Y][MINI] -= track_spacingYG ; + coreG[X][MAXI] += track_spacingXG ; + coreG[Y][MAXI] += track_spacingYG ; + } else if(!(doPartitionG)){ + /* find delta in pad spacing */ + coreG[X][MINI] -= get_pad_routing( L ) ; + coreG[Y][MAXI] += get_pad_routing( T ) ; + coreG[X][MAXI] += get_pad_routing( R ) ; + coreG[Y][MINI] -= get_pad_routing( B ) ; + } + + /* if the grid is given force to grid positions */ + if( gridCellsG ){ + ominx = coreG[X][MINI] ; + ominy = coreG[Y][MINI] ; + omaxx = coreG[X][MAXI] ; + omaxy = coreG[Y][MAXI] ; + YforceGrid( &coreG[X][MINI], &coreG[Y][MINI] ) ; + YforceGrid( &coreG[X][MAXI], &coreG[Y][MAXI] ) ; + + /* make sure gridded data is outside of core to avoid overlap */ + if( ominx < coreG[X][MINI] ){ + coreG[X][MINI] -= track_spacingXG ; + } + if( ominy < coreG[Y][MINI] ){ + coreG[Y][MINI] -= track_spacingYG ; + } + if( omaxx > coreG[X][MAXI] ){ + coreG[X][MAXI] += track_spacingXG ; + } + if( omaxy > coreG[Y][MAXI] ){ + coreG[Y][MAXI] += track_spacingYG ; + } + } + perdimG[X] = coreG[X][MAXI] - coreG[X][MINI] ; + perdimG[Y] = coreG[Y][MAXI] - coreG[Y][MINI] ; } /* end find_core */ /* ***********************EXTERNAL ROUTINES ************************** */ -call_place_pads() +void call_place_pads() { - FILE *fp ; - INT pad ; - INT line ; - INT numnets ; - INT numtokens ; - INT closegraphics() ; - INT find_numnets() ; - BOOL abort ; - char **tokens ; - char *bufferptr ; - char *pathname, *Yrelpath() ; - char *twdir, *Ygetenv() ; - char filename[LRECL] ; - char buffer[LRECL] ; - CELLBOXPTR cellptr ; - - /* build the input file for the placepads program */ - sprintf( filename, "%s.pads", cktNameG ); - fp = TWOPEN( filename, "w", ABORT ) ; - numnets = find_numnets() ; - fprintf( fp, "core %d %d %d %d\n", - coreG[X][MINI], coreG[Y][MINI], coreG[X][MAXI], coreG[Y][MAXI] ) ; - fprintf( fp, "pads %d numnets %d\n", numpadsG+numpadgroupsG, numnets); - output_pads( fp ) ; - output_nets( fp, numnets ) ; - TWCLOSE( fp ) ; - - /* now call the placepad program */ - /* find the path of placepads relative to main program */ - pathname = Yrelpath( argv0G, PLACEPADPATH ) ; - if( !(YfileExists(pathname))){ - if( twdir = TWFLOWDIR ){ - sprintf( filename, "%s/bin/%s", twdir, PLACEPADPROG ) ; - pathname = Ystrclone( filename ) ; - } - } - switch( padspacingG ){ - case ABUT_PADS: - sprintf( YmsgG, "%s -asn %s", pathname, cktNameG ) ; - break ; - case UNIFORM_PADS: - sprintf( YmsgG, "%s -usn %s", pathname, cktNameG ) ; - break ; - case VARIABLE_PADS: - sprintf( YmsgG, "%s -osn %s", pathname, cktNameG ) ; - break ; - } - M( MSG, NULL, YmsgG ) ; - M( MSG, NULL, "\n" ) ; - - /* Ysystem will kill program if catastrophe occurred */ - Ysystem( PLACEPADPROG, ABORT, YmsgG, closegraphics ) ; - Ysafe_free( pathname ) ; /* free name created in Yrelpath */ - /* ############# end of placepads execution ############# */ - - /* **************** READ RESULTS of placepads ************/ - /* open pad placement file for reading */ - M( MSG, NULL, "Reading results of placing pads...\n" ) ; - sprintf(filename, "%s.pout" , cktNameG ) ; - fp = TWOPEN( filename , "r", ABORT ) ; - + FILE *fp ; + INT pad ; + INT line ; + INT numnets ; + INT numtokens ; + INT closegraphics() ; + INT find_numnets() ; + BOOL abort ; + char **tokens ; + char *bufferptr ; + char *pathname, *Yrelpath() ; + char *twdir, *Ygetenv() ; + char filename[LRECL] ; + char buffer[LRECL] ; + CELLBOXPTR cellptr ; + + /* build the input file for the placepads program */ + sprintf( filename, "%s.pads", cktNameG ); + fp = TWOPEN( filename, "w", ABORT ) ; + numnets = find_numnets() ; + fprintf( fp, "core %d %d %d %d\n", + coreG[X][MINI], coreG[Y][MINI], coreG[X][MAXI], coreG[Y][MAXI] ) ; + fprintf( fp, "pads %d numnets %d\n", numpadsG+numpadgroupsG, numnets); + output_pads( fp ) ; + output_nets( fp, numnets ) ; + TWCLOSE( fp ) ; + + /* now call the placepad program */ + /* find the path of placepads relative to main program */ + pathname = Yrelpath( argv0G, PLACEPADPATH ) ; + if( !(YfileExists(pathname))){ + /* Check if TWDIR overridden */ + if((twdir = getenv("TWDIR"))) { + M(MSG,NULL, "Directory overridden with 'TWDIR' environment variable\n" ) ; + } + else { + twdir = TWFLOWDIR; + } + sprintf( filename, "%s/bin/%s", twdir, PLACEPADPROG ) ; + pathname = Ystrclone( filename ) ; + } + switch( padspacingG ){ + case ABUT_PADS: + sprintf( YmsgG, "%s -asn %s", pathname, cktNameG ) ; + break ; + case UNIFORM_PADS: + sprintf( YmsgG, "%s -usn %s", pathname, cktNameG ) ; + break ; + case VARIABLE_PADS: + sprintf( YmsgG, "%s -osn %s", pathname, cktNameG ) ; + break ; + } + M( MSG, NULL, YmsgG ) ; + M( MSG, NULL, "\n" ) ; + + /* Ysystem will kill program if catastrophe occurred */ + Ysystem( PLACEPADPROG, ABORT, YmsgG, closegraphics ) ; + Ysafe_free( pathname ) ; /* free name created in Yrelpath */ + /* ############# end of placepads execution ############# */ + + /* **************** READ RESULTS of placepads ************/ + /* open pad placement file for reading */ + M( MSG, NULL, "Reading results of placing pads...\n" ) ; + sprintf(filename, "%s.pout" , cktNameG ) ; + fp = TWOPEN( filename , "r", ABORT ) ; + + /* parse file */ + line = 0 ; + abort = FALSE ; + pad = endsuperG ; + while( bufferptr=fgets(buffer,LRECL,fp )){ /* parse file */ - line = 0 ; - abort = FALSE ; - pad = endsuperG ; - while( bufferptr=fgets(buffer,LRECL,fp )){ - /* parse file */ - line ++ ; /* increment line number */ - tokens = Ystrparser( bufferptr, ": \t\n", &numtokens ); - - if( numtokens == 0 ){ - /* skip over empty lines */ - continue ; - } else if( strcmp( tokens[0], PADKEYWORD ) == STRINGEQ){ - /* look at first field for keyword */ - /* ie. pad x y orient padside */ - if( numtokens != 6 ){ - sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; - M(ERRMSG, "placepads", YmsgG ) ; - abort = TRUE ; - continue ; - } - pad++ ; - ASSERTNBREAK( pad > 0 && pad <= endpadsG, "placepads", - "pad out of bounds\n" ) ; - cellptr = cellarrayG[pad] ; - cellptr->xcenter = atoi(tokens[2] ) ; - cellptr->ycenter = atoi(tokens[3] ) ; - cellptr->orient = atoi(tokens[4] ) ; - cellptr->padptr->padside = atoi(tokens[5] ) ; - - } else { - sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; - M(ERRMSG, "placepads", YmsgG ) ; - abort = TRUE ; - continue ; - } - } - TWCLOSE( fp ) ; - - if( abort ){ - M(ERRMSG, "placepads", "Problem with placing pads.Must abort\n") ; - closegraphics() ; - YexitPgm( PGMFAIL ) ; - } - /* ************ END READ RESULTS of placepads ************/ + line ++ ; /* increment line number */ + tokens = Ystrparser( bufferptr, ": \t\n", &numtokens ); + + if( numtokens == 0 ){ + /* skip over empty lines */ + continue ; + } else if( strcmp( tokens[0], PADKEYWORD ) == STRINGEQ){ + /* look at first field for keyword */ + /* ie. pad x y orient padside */ + if( numtokens != 6 ){ + sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; + M(ERRMSG, "placepads", YmsgG ) ; + abort = TRUE ; + continue ; + } + pad++ ; + ASSERTNBREAK( pad > 0 && pad <= endpadsG, "placepads", + "pad out of bounds\n" ) ; + cellptr = cellarrayG[pad] ; + cellptr->xcenter = atoi(tokens[2] ) ; + cellptr->ycenter = atoi(tokens[3] ) ; + cellptr->orient = atoi(tokens[4] ) ; + cellptr->padptr->padside = atoi(tokens[5] ) ; + + } else { + sprintf( YmsgG, "Syntax error on line:%d\n", line ) ; + M(ERRMSG, "placepads", YmsgG ) ; + abort = TRUE ; + continue ; + } + } + TWCLOSE( fp ) ; + + if( abort ){ + M(ERRMSG, "placepads", "Problem with placing pads.Must abort\n") ; + closegraphics() ; + YexitPgm( PGMFAIL ) ; + } + /* ************ END READ RESULTS of placepads ************/ } /* end call_place_pads */ INT find_numnets() { - INT pad ; - INT numnets ; - CELLBOXPTR ptr ; - PINBOXPTR pin ; - - if(!(pad_net_setS) ){ - pad_net_setS = Yset_init( 1, numnetsG ) ; - } - Yset_empty( pad_net_setS ) ; - numnets = 0 ; - for( pad = endsuperG; pad <= endpadsG; pad++ ){ - ptr = cellarrayG[ pad ] ; - for( pin = ptr->pinptr; pin ; pin = pin->nextpin ){ - if( netarrayG[ pin->net ]->numpins <= 1 ){ - continue ; - } - if( Yset_add( pad_net_setS, pin->net ) ){ - /* Yset_add returns TRUE if a new member of set */ - numnets++ ; - } - } + INT pad ; + INT numnets ; + CELLBOXPTR ptr ; + PINBOXPTR pin ; + + if(!(pad_net_setS) ){ + pad_net_setS = Yset_init( 1, numnetsG ) ; + } + Yset_empty( pad_net_setS ) ; + numnets = 0 ; + for( pad = endsuperG; pad <= endpadsG; pad++ ){ + ptr = cellarrayG[ pad ] ; + for( pin = ptr->pinptr; pin ; pin = pin->nextpin ){ + if( netarrayG[ pin->net ]->numpins <= 1 ){ + continue ; + } + if( Yset_add( pad_net_setS, pin->net ) ){ + /* Yset_add returns TRUE if a new member of set */ + numnets++ ; + } } - return( numnets ) ; + } + return( numnets ) ; } /* end find_numnets */ -output_nets( fp, numnets ) -FILE *fp ; +void output_nets( FILE *fp, int numnets ) { - INT net ; - INT pincount ; - PINBOXPTR pin ; - NETBOXPTR netptr ; - YSETLISTPTR list ; - - for( list = Yset_enumerate(pad_net_setS) ;list; list = list->next ){ - net = list->node ; - netptr = netarrayG[ net ] ; - fprintf( fp, "net %s ", netptr->nname ) ; - pincount = 0 ; - for( pin = netptr->pins; pin ; pin = pin->next ){ - if( pin->cell > endsuperG ){ - /* skip over the pad connections */ - continue ; - } - fprintf( fp, "%d %d ", pin->xpos, pin->ypos ) ; - if( ++pincount > 5 ){ - pincount = 0 ; - fprintf( fp, "\n" ) ; - } - } - if( pincount != 0 ){ - fprintf( fp, "\n" ) ; - } + INT net ; + INT pincount ; + PINBOXPTR pin ; + NETBOXPTR netptr ; + YSETLISTPTR list ; + + for( list = Yset_enumerate(pad_net_setS) ;list; list = list->next ){ + net = list->node ; + netptr = netarrayG[ net ] ; + fprintf( fp, "net %s ", netptr->nname ) ; + pincount = 0 ; + for( pin = netptr->pins; pin ; pin = pin->next ){ + if( pin->cell > endsuperG ){ + /* skip over the pad connections */ + continue ; + } + fprintf( fp, "%d %d ", pin->xpos, pin->ypos ) ; + if( ++pincount > 5 ){ + pincount = 0 ; + fprintf( fp, "\n" ) ; + } + } + if( pincount != 0 ){ + fprintf( fp, "\n" ) ; } + } } /* end output_nets */ diff -Nru graywolf-0.1.5/src/twmc/placepin.c graywolf-0.1.6/src/twmc/placepin.c --- graywolf-0.1.5/src/twmc/placepin.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/placepin.c 2018-08-11 21:48:56.000000000 +0000 @@ -70,9 +70,6 @@ Wed Jun 5 15:43:33 CDT 1991 - changed REL_POS to REL_POST for accuracy. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) placepin.c version 3.18 11/23/91" ; -#endif #include #include @@ -134,32 +131,32 @@ BOOL contiguous_pinsG = TRUE ; /* ****** static FUNCTION definitions ******** */ -static find_optimal_locations( P1(BOOL newVertFlag )); +static void find_optimal_locations( P1(BOOL newVertFlag )); static INT find_cost_for_a_side( P5( PINBOXPTR pin, INT side, DOUBLE lb, DOUBLE ub, BOOL spacing_restricted )) ; -static determine_bbox( P2( INT net, INT cell )) ; -static place_pin( P4( PINBOXPTR pin, INT pos, INT tiebreak, INT side ) ) ; -static place_children( P5( PINBOXPTR pin, INT side, DOUBLE lb, DOUBLE ub, +static void determine_bbox( P2( INT net, INT cell )) ; +static void place_pin( P4( PINBOXPTR pin, INT pos, INT tiebreak, INT side ) ) ; +static void place_children( P5( PINBOXPTR pin, INT side, DOUBLE lb, DOUBLE ub, BOOL spacing_restricted ) ) ; -static set_hardpin_pos( P2( PINBOXPTR pin, BOOL newVertFlag ) ); -static sort_softpins() ; +static void set_hardpin_pos( P2( PINBOXPTR pin, BOOL newVertFlag ) ); +static void sort_softpins() ; static INT compare_pins( P2( PINBOXPTR *pinptr1, PINBOXPTR *pinptr2 ) ) ; static INT sort_by_pos( P2( PINBOXPTR *pinptr1, PINBOXPTR *pinptr2 ) ) ; -static install_pin_groups( P1( PINBOXPTR pin ) ) ; -static permute_pg( P1( PINBOXPTR pin ) ) ; -static space_pins() ; -static place_soft_equivs() ; -static find_next_free_spotm( P3( SIDEBOXPTR sideptr, PINBOXPTR pin, INT *pos )) ; +static void install_pin_groups( P1( PINBOXPTR pin ) ) ; +static void permute_pg( P1( PINBOXPTR pin ) ) ; +static void space_pins() ; +static void place_soft_equivs() ; +static void find_next_free_spotm( P3( SIDEBOXPTR sideptr, PINBOXPTR pin, INT *pos )) ; static BOOL find_next_free_spotg(P3( SIDEBOXPTR sideptr, PINBOXPTR pin, INT *pos )) ; -static init_side_array( P1( BOOL newVertFlag ) ) ; -static side_to_global() ; -static find_hardpin_side() ; +static void init_side_array( P1( BOOL newVertFlag ) ) ; +static void side_to_global() ; +static void find_hardpin_side() ; /* ****** global FUNCTION definitions ******** */ -extern init_wire_est() ; -extern set_up_pinplace() ; -extern set_pin_verbosity( P1(BOOL flag ) ) ; -extern update_pins( P1( BOOL initialFlag ) ) ; -extern print_pins( P3( char *message , PINBOXPTR *array , INT howmany ) ) ; +extern void init_wire_est() ; +extern void set_up_pinplace() ; +extern void set_pin_verbosity( P1(BOOL flag ) ) ; +extern void update_pins( P1( BOOL initialFlag ) ) ; +extern void print_pins( P3( char *message , PINBOXPTR *array , INT howmany ) ) ; extern INT *find_pin_sides( P1( INT cell ) ) ; extern INT find_tile_side( P3( INT center, INT loc, INT direction ) ) ; /* ################################################################## */ @@ -172,7 +169,7 @@ pins along the sides and returns all answers in the pin->t?pos_new fields. No calculation to funccost or timing penalty is performed. ____________________________________________________________________*/ -placepin( cell, newVertFlag ) +void placepin( cell, newVertFlag ) INT cell ; BOOL newVertFlag ; /* use the x_new field if true otherwise use x field */ { @@ -222,7 +219,7 @@ } /* end placepins */ /* ***************************************************************** */ -static find_optimal_locations( newVertFlag ) +static void find_optimal_locations( newVertFlag ) BOOL newVertFlag ; { INT i, j ; /* pin counters */ @@ -542,7 +539,7 @@ /* ***************************************************************** */ /* find the bounding box of this net without this cell */ -static determine_bbox( net, cell ) +static void determine_bbox( net, cell ) INT net ; /* calculate this net */ INT cell ; /* exclude this cell */ { @@ -600,7 +597,7 @@ /* ***************************************************************** */ /**** SET XPOS OF THE PIN TO DESIRED POSITION. *****/ -static place_pin( pin, pos, tiebreak, side ) +static void place_pin( pin, pos, tiebreak, side ) PINBOXPTR pin; INT pos; INT tiebreak; @@ -617,7 +614,7 @@ /**** RECURSIVELY SET THE SIDE OF ALL CHILDREN OF THE ROOT PIN TO THE **** PADSIDE OF THE PARENT. GIVEN THAT SIDE, SET THE OPTIMAL POSITION */ -static place_children( pin, side, lb, ub, spacing_restricted ) +static void place_children( pin, side, lb, ub, spacing_restricted ) PINBOXPTR pin ; INT side ; DOUBLE lb, ub ; @@ -711,7 +708,7 @@ /* ***************************************************************** */ /**** SET XPOS OF THE PIN TO DESIRED POSITION. *****/ -static set_hardpin_pos( pin, newVertFlag ) +static void set_hardpin_pos( pin, newVertFlag ) PINBOXPTR pin; BOOL newVertFlag ; { @@ -750,7 +747,7 @@ PIN SORTING ROUTINES ***********************************************************************/ -static sort_softpins() +static void sort_softpins() { INT i ; /* pin counter */ INT pos ; /* position in place array */ @@ -912,7 +909,7 @@ /* ***************************************************************** */ /* install the pin groups and set numpinS */ -static install_pin_groups( pin ) +static void install_pin_groups( pin ) PINBOXPTR pin ; { INT i ; /* pin counter */ @@ -951,7 +948,7 @@ } /* end install_pin_groups */ /* ***************************************************************** */ -static permute_pg( pin ) +static void permute_pg( pin ) PINBOXPTR pin ; { INT j, k ; /* used to reverse pins */ @@ -1023,7 +1020,7 @@ } /* end permute_pg */ /* ***************************************************************** */ -static space_pins() +static void space_pins() { INT i ; /* counter on pins */ @@ -1148,7 +1145,7 @@ } /* end space_pins */ -static place_soft_equivs() +static void place_soft_equivs() { INT i ; /* counter on pins */ INT j ; @@ -1215,7 +1212,7 @@ } /* end place_softequivs */ /* minimize the amount of overflow on this side */ -static find_next_free_spotm( sideptr, pin, pos ) +static void find_next_free_spotm( sideptr, pin, pos ) SIDEBOXPTR sideptr ; PINBOXPTR pin ; INT *pos ; @@ -1330,7 +1327,7 @@ } /* find_next_free_spotg */ /* ***************************************************************** */ -static side_to_global() +static void side_to_global() { INT i; INT side ; @@ -1406,7 +1403,7 @@ } /* end for loop */ } /* end side_to_global() */ -set_up_pinplace() +void set_up_pinplace() { INT i ; /* counter */ INT j ; /* counter */ @@ -1513,7 +1510,7 @@ } /* end set_up_pinplace */ -static init_side_array( newVertFlag ) +static void init_side_array( newVertFlag ) BOOL newVertFlag ; /* use _new fields if true use x, y otherwise */ { @@ -1591,7 +1588,7 @@ } /* end init_side_array() */ /* find the side that the hardpin is nearest. */ -static find_hardpin_side() +static void find_hardpin_side() { INT i ; /* counter */ @@ -1655,8 +1652,8 @@ } /* end find_hardpin_side() */ -update_pins( initialFlag ) /* initialize pin placement */ -BOOL initialFlag ;/* if TRUE set all fields;if FALSE update orig fields */ +void update_pins( BOOL initialFlag ) /* initialize pin placement */ +//BOOL initialFlag ;/* if TRUE set all fields;if FALSE update orig fields */ { INT howmany ; /* number of cells with soft pins */ INT i ; /* counter */ @@ -1711,8 +1708,7 @@ } /* end test on existence of soft cells */ } /* initial pinplace */ -set_pin_verbosity( flag ) -BOOL flag ; +void set_pin_verbosity( BOOL flag ) { tell_overflowS = flag ; } /* end set_pin_verbosity */ @@ -1824,7 +1820,7 @@ return( 0 ) ; } /* end find_tile_side */ -init_wire_est() +void init_wire_est() { INT i ; /* counter */ INT j ; /* counter */ @@ -1866,7 +1862,7 @@ /* ***************************************************************** */ #ifdef DEBUG -print_pins( message, array, howmany ) +void print_pins( message, array, howmany ) char *message ; PINBOXPTR *array ; INT howmany ; diff -Nru graywolf-0.1.5/src/twmc/prboard.c graywolf-0.1.6/src/twmc/prboard.c --- graywolf-0.1.5/src/twmc/prboard.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/prboard.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,14 +46,11 @@ gridding of cells for mighty interface. Mon Jan 7 18:31:00 CST 1991 - don't grid pads. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) prboard.c version 3.6 4/18/91" ; -#endif #include #include -grid_cells() +void grid_cells() { INT xcenter , ycenter, remainder ; diff -Nru graywolf-0.1.5/src/twmc/readcells.c graywolf-0.1.6/src/twmc/readcells.c --- graywolf-0.1.5/src/twmc/readcells.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/readcells.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,9 +37,6 @@ * */ -#ifndef lint -static char yysccsid[] = "@(#)yaccpar 1.8 (Berkeley) 01/20/90"; -#endif #define YYBYACC 1 /* ----------------------------------------------------------------- FILE: readcells.c <- readcells_yacc <- readcells_lex @@ -83,9 +80,6 @@ Thu Aug 22 22:10:09 CDT 1991 - fixed problem with fixed cells moving during pairwise flips. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) readcells.y version 3.15 3/6/92" ; -#endif #include #include @@ -760,7 +754,7 @@ /* ********************* #include "readcells_l.h" *******************/ /* ********************* #include "readcells_l.h" *******************/ -readcells( fp ) +void readcells( fp ) FILE *fp ; { #ifdef YYDEBUG @@ -777,7 +771,7 @@ } /* end readcells */ -yyerror(s) +void yyerror(s) char *s; { sprintf(YmsgG,"problem reading %s.[m]cel:", cktNameG ); @@ -788,7 +782,7 @@ setErrorFlag() ; } -yywrap() +int yywrap() { return(1); } diff -Nru graywolf-0.1.5/src/twmc/readcells.h graywolf-0.1.6/src/twmc/readcells.h --- graywolf-0.1.5/src/twmc/readcells.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/readcells.h 2018-08-11 21:48:56.000000000 +0000 @@ -6,9 +6,6 @@ DATE: Aug 7, 1988 REVISIONS: ----------------------------------------------------------------- */ -/* ***************************************************************** - static char SccsId[] = "@(#) readcells.h version 3.4 3/6/92" ; -***************************************************************** */ #define yyact CUSTOM_yyact #define yyback CUSTOM_yyback diff -Nru graywolf-0.1.5/src/twmc/readcells_l.h graywolf-0.1.6/src/twmc/readcells_l.h --- graywolf-0.1.5/src/twmc/readcells_l.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/readcells_l.h 2018-08-11 21:48:56.000000000 +0000 @@ -59,10 +59,13 @@ #define END(v) (v-1 + sizeof(v) / sizeof( v[0] ) ) /* for table lookup */ static INT screen() ; -static INT check_line_count() ; +static void check_line_count() ; + +static int yylook(void); +static int yyback(int *p, int m); # define YYNEWLINE 10 -yylex(){ +INT yylex(){ int nstr; extern int yyprevious; while((nstr = yylook()) >= 0) yyfussy: switch(nstr){ @@ -189,7 +192,7 @@ } /* end screen function */ -static INT check_line_count( s ) +static void check_line_count( s ) char *s ; { if( s ){ @@ -508,7 +511,7 @@ int *yyfnd; extern struct yysvf *yyestate; int yyprevious = YYNEWLINE; -yylook(){ +static int yylook(){ register struct yysvf *yystate, **lsp; register struct yywork *yyt; struct yysvf *yyz; @@ -656,8 +659,7 @@ # endif } } -yyback(p, m) - int *p; +static int yyback(int *p, int m) { if (p==0) return(0); while (*p) @@ -668,16 +670,16 @@ return(0); } /* the following are only used in the lex library */ -yyinput(){ +int yyinput(){ if (yyin == NULL) yyin = stdin; return(input()); } -yyoutput(c) +void yyoutput(c) int c; { if (yyout == NULL) yyout = stdout; output(c); } -yyunput(c) +void yyunput(c) int c; { unput(c); } diff -Nru graywolf-0.1.5/src/twmc/readnets.c graywolf-0.1.6/src/twmc/readnets.c --- graywolf-0.1.5/src/twmc/readnets.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/readnets.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,9 +37,6 @@ * */ -#ifndef lint -static char yysccsid[] = "@(#)yaccpar 1.8 (Berkeley) 01/20/90"; -#endif #define YYBYACC 1 /* ----------------------------------------------------------------- FILE: readnets.c <- readnets_yacc <- readnets_lex @@ -68,15 +65,13 @@ and finalized analog input format. Sun Jan 20 21:34:36 PST 1991 - ported to AIX. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) readnets.y version 3.8 3/6/92" ; -#endif #include #include #include #include #include /* redefine yacc and lex globals */ +#include #undef REJECT /* undefine TWMC macro for lex's version */ #define YYDEBUG 1 /* condition compile for yacc debug */ @@ -337,7 +332,7 @@ /* ********************* #include "readnets_l.h" *******************/ /* ********************* #include "readnets_l.h" *******************/ -readnets( fp ) +void readnets( fp ) FILE *fp ; { #ifdef YYDEBUG @@ -357,7 +352,7 @@ } /* end readnets */ -yyerror(s) +void yyerror(s) char *s; { extern char *cktNameG ; @@ -371,7 +366,7 @@ set_net_error() ; } -yywrap() +int yywrap() { return(1); } diff -Nru graywolf-0.1.5/src/twmc/readnets.h graywolf-0.1.6/src/twmc/readnets.h --- graywolf-0.1.5/src/twmc/readnets.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/readnets.h 2018-08-11 21:48:56.000000000 +0000 @@ -9,9 +9,6 @@ Thu Mar 7 01:48:21 EST 1991 - added more definitions for byacc. ----------------------------------------------------------------- */ -/* ***************************************************************** - static char SccsId[] = "@(#) readnets.h version 3.6 3/6/92" ; -***************************************************************** */ #include #define STARTPATH 1 /* flag for start of path */ #define CONTPATH 0 /* flag for continuing path */ diff -Nru graywolf-0.1.5/src/twmc/readnets_l.h graywolf-0.1.6/src/twmc/readnets_l.h --- graywolf-0.1.5/src/twmc/readnets_l.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/readnets_l.h 2018-08-11 21:48:56.000000000 +0000 @@ -55,10 +55,13 @@ #define END(v) (v-1 + sizeof(v) / sizeof( v[0] ) ) /* for table lookup */ static INT screen() ; -static INT check_line_count() ; +static void check_line_count() ; + +static int yylook(void); +static int yyback(int *p, int m); # define YYNEWLINE 10 -yylex(){ +INT yylex(){ int nstr; extern int yyprevious; while((nstr = yylook()) >= 0) yyfussy: switch(nstr){ @@ -167,7 +170,7 @@ } /* end screen function */ -static INT check_line_count( s ) +static void check_line_count( s ) char *s ; { if( s ){ @@ -508,7 +511,7 @@ int *yyfnd; extern struct yysvf *yyestate; int yyprevious = YYNEWLINE; -yylook(){ +static int yylook(){ register struct yysvf *yystate, **lsp; register struct yywork *yyt; struct yysvf *yyz; @@ -656,8 +659,7 @@ # endif } } -yyback(p, m) - int *p; +static int yyback(int *p, int m) { if (p==0) return(0); while (*p) @@ -668,16 +670,16 @@ return(0); } /* the following are only used in the lex library */ -yyinput(){ +int yyinput(){ if (yyin == NULL) yyin = stdin; return(input()); } -yyoutput(c) +void yyoutput(c) int c; { if (yyout == NULL) yyout = stdout; output(c); } -yyunput(c) +void yyunput(c) int c; { unput(c); } diff -Nru graywolf-0.1.5/src/twmc/readpar.c graywolf-0.1.6/src/twmc/readpar.c --- graywolf-0.1.5/src/twmc/readpar.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/readpar.c 2018-08-11 21:48:56.000000000 +0000 @@ -74,9 +74,6 @@ Fri Oct 18 00:15:59 EDT 1991 - now scale block when calling TimberWolf recursively. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) readpar.c version 3.20 11/23/91" ; -#endif #include #include @@ -84,6 +81,7 @@ #include #include #include +#include "readpar.h" #define DEFAULTLAMBDA 0.1 #define INIT_ACCEPTANCE 0.99999 @@ -102,14 +100,14 @@ -static init_read_par(); -static readparam(); -static process_readpar(); -static err_msg(); +static void init_read_par(); +static void readparam(); +static void process_readpar(); +static void err_msg(); -readpar() +void readpar() { init_read_par() ; readparam( TWMC ) ; @@ -117,7 +115,7 @@ process_readpar() ; } -static init_read_par() +static void init_read_par() { /* set the default values */ offsetG = 0 ; @@ -163,7 +161,7 @@ -static readparam( parfile ) +static void readparam( parfile ) INT parfile ; { @@ -483,7 +481,7 @@ } } /* end readpar */ -static process_readpar() +static void process_readpar() { char *layer ; /* name of layer */ INT i ; /* counter */ @@ -675,7 +673,7 @@ return ; } /* end process_readpar */ -static err_msg( keyword ) +static void err_msg( keyword ) char *keyword ; { OUT2("The value for %s was", keyword ); diff -Nru graywolf-0.1.5/src/twmc/readpar.h graywolf-0.1.6/src/twmc/readpar.h --- graywolf-0.1.5/src/twmc/readpar.h 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/src/twmc/readpar.h 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,7 @@ +#ifndef __TWMC_READPAR_H__ +#define __TWMC_READPAR_H__ + +void readpar(void); + +#endif // __TWMC_READPAR_H__ + diff -Nru graywolf-0.1.5/src/twmc/reconfig.c graywolf-0.1.6/src/twmc/reconfig.c --- graywolf-0.1.5/src/twmc/reconfig.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/reconfig.c 2018-08-11 21:48:56.000000000 +0000 @@ -52,19 +52,13 @@ Sun May 5 14:23:51 EDT 1991 - added reorigin and now allow user to set origin. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) reconfig.c version 3.6 5/5/91" ; -#endif #include #include #define UPDATE (BOOL) FALSE /* don't initialize updateFixedCells */ -reconfigure( numbinX, numbinY, newCoreArea ) -INT numbinX ; -INT numbinY ; -DOUBLE newCoreArea ; +void reconfigure( INT numbinX, INT numbinY, DOUBLE newCoreArea ) { DOUBLE factor ; @@ -147,7 +141,7 @@ -reorigin() +void reorigin() { CELLBOXPTR cellptr ; diff -Nru graywolf-0.1.5/src/twmc/rmain.c graywolf-0.1.6/src/twmc/rmain.c --- graywolf-0.1.5/src/twmc/rmain.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/rmain.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,9 +46,6 @@ REVISIONS: Sun Dec 16 00:36:43 EST 1990 - Modified for Dahe's new version of the global router. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) rmain.c version 3.6 2/23/91" ; -#endif #include #include @@ -62,55 +59,59 @@ #define GROUTEPATH "../Mickey" -rmain( constraint_flag ) -BOOL constraint_flag ; +void rmain( BOOL constraint_flag ) { - INT closegraphics() ; - char filename[LRECL] ; - char *Yrelpath() ; - char *pathname ; - char *twdir ; /* path of TimberWolf directory */ - char *getenv() ; /* used to get TWDIR environment variable */ - FILE *fp ; - - /* first build .gpar file for global router */ - sprintf( filename, "%s.gpar", cktNameG ) ; - fp = TWOPEN( filename, "w", ABORT ) ; - switch( get_circuit_type() ){ + INT closegraphics() ; + char filename[LRECL] ; + char *Yrelpath() ; + char *pathname ; + char *twdir ; /* path of TimberWolf directory */ + char *getenv() ; /* used to get TWDIR environment variable */ + FILE *fp ; + + /* first build .gpar file for global router */ + sprintf( filename, "%s.gpar", cktNameG ) ; + fp = TWOPEN( filename, "w", ABORT ) ; + switch( get_circuit_type() ){ case NO_CKT_TYPE: case DIGITAL: - fprintf( fp, "digital.circuit\n" ) ; - break ; + fprintf( fp, "digital.circuit\n" ) ; + break ; case ANALOG: - fprintf( fp, "analog.circuit\n" ) ; - break ; + fprintf( fp, "analog.circuit\n" ) ; + break ; case MIXED: - fprintf( fp, "mixed.circuit\n" ) ; - break ; + fprintf( fp, "mixed.circuit\n" ) ; + break ; + } + fprintf( fp, "limit_iteration 99999\n" ) ; + if( constraint_flag ){ + fprintf( fp, "objective 2\n" ) ; + } else { + fprintf( fp, "objective 1\n" ) ; + } + TWCLOSE( fp ) ; + + /* now call the global router */ + /* find the path of compactor relative to main program */ + pathname = Yrelpath( argv0G, GROUTEPATH ) ; + if( !(YfileExists(pathname))){ + /* Check if TWDIR overridden */ + if((twdir = getenv("TWDIR"))) { + M(MSG,NULL, "Directory overridden with 'TWDIR' environment variable\n" ) ; } - fprintf( fp, "limit_iteration 99999\n" ) ; - if( constraint_flag ){ - fprintf( fp, "objective 2\n" ) ; - } else { - fprintf( fp, "objective 1\n" ) ; + else { + twdir = TWFLOWDIR; } - TWCLOSE( fp ) ; - - /* now call the global router */ - /* find the path of compactor relative to main program */ - pathname = Yrelpath( argv0G, GROUTEPATH ) ; - if( !(YfileExists(pathname))){ - if( twdir = TWFLOWDIR ){ - sprintf( filename, "%s/bin/%s", twdir, GROUTEPROG ) ; - pathname = Ystrclone( filename ) ; - } - } - sprintf( YmsgG, "%s %s", pathname, cktNameG ) ; - M( MSG, NULL, YmsgG ) ; - M( MSG, NULL, "\n" ) ; - /* Ysystem will kill program if catastrophe occurred */ - Ysystem( GROUTEPROG, ABORT, YmsgG, closegraphics ) ; - Ysafe_free( pathname ) ; /* free name created in Yrelpath */ - /* ############# end of gengraph execution ############# */ + sprintf( filename, "%s/bin/%s", twdir, GROUTEPROG ) ; + pathname = Ystrclone( filename ) ; + } + sprintf( YmsgG, "%s %s", pathname, cktNameG ) ; + M( MSG, NULL, YmsgG ) ; + M( MSG, NULL, "\n" ) ; + /* Ysystem will kill program if catastrophe occurred */ + Ysystem( GROUTEPROG, ABORT, YmsgG, closegraphics ) ; + Ysafe_free( pathname ) ; /* free name created in Yrelpath */ + /* ############# end of gengraph execution ############# */ } /* end gmain */ diff -Nru graywolf-0.1.5/src/twmc/savewolf.c graywolf-0.1.6/src/twmc/savewolf.c --- graywolf-0.1.5/src/twmc/savewolf.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/savewolf.c 2018-08-11 21:48:56.000000000 +0000 @@ -63,19 +63,30 @@ reorigin. Mon Sep 16 22:23:04 EDT 1991 - fixed for R6000. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) savewolf.c version 3.12 9/16/91" ; -#endif #include #include #include #include +#if SIZEOF_VOID_P == 64 +#define INTSCANSTR "%ld" +#else +#define INTSCANSTR "%d" +#endif + +#if SIZEOF_VOID_P == 64 +#define UINTSCANSTR "%lu" +#else +#define UINTSCANSTR "%u" +#endif + #define MAXTIMEBEFORESAVE 600.0 /* seconds before new save 10min. */ -savewolf( forceSave ) -BOOL forceSave ; /* if true save parameters regardless of time */ +void HPO(FILE *fp,DOUBLE d); +void HPI(FILE *fp,DOUBLE *d); + +void savewolf( BOOL forceSave ) { INT m ; @@ -156,11 +167,9 @@ } TWCLOSE( fp ) ; -#ifdef UNIX sprintf(file1, "%s.mtmp", cktNameG); sprintf(file2, "%s.msav", cktNameG); rename(file1, file2); -#endif return ; } /* end savewolf */ @@ -199,29 +208,30 @@ error += read_window( fp ) ; error += read_wireest( fp ) ; fscanf(fp,"%[ #:a-zA-Z]\n",YmsgG ); /* throw away comment */ -fscanf( fp, "%[ #:a-zA-Z]%d\n", YmsgG, &number_of_cells ) ; +fscanf( fp, "%[ #:a-zA-Z]" INTSCANSTR "\n", YmsgG, &number_of_cells ) ; if( number_of_cells != numcellsG ){ M(ERRMSG,"TW_oldinput","Number of cells in restart file in error\n"); /* abort at this time no sense going on */ return( FALSE ) ; } -fscanf( fp, "%u", &randVarG ) ; +fscanf( fp, "" UINTSCANSTR "", &randVarG ) ; Yset_random_seed( randVarG ) ; -fscanf( fp, "%d %d\n", &blocktG, &blockrG ) ; +fscanf( fp, "" INTSCANSTR " " INTSCANSTR "\n", &blocktG, &blockrG ) ; /* set blockl and blockb to zero anticipating call to placepads */ blocklG = blockbG = 0 ; -fscanf( fp, "%d %d\n", &blockmxG, &blockmyG ) ; -fscanf( fp, "%d %d\n", &binWidthXG, &binXOffstG ) ; -fscanf( fp, "%d %d\n", &binWidthYG, &binYOffstG ) ; +fscanf( fp, "" INTSCANSTR " " INTSCANSTR "\n", &blockmxG, &blockmyG ) ; +fscanf( fp, "" INTSCANSTR " " INTSCANSTR "\n", &binWidthXG, &binXOffstG ) ; +fscanf( fp, "" INTSCANSTR " " INTSCANSTR "\n", &binWidthYG, &binYOffstG ) ; HPI(fp,&slopeXG) ; HPI(fp,&slopeYG) ; -HPI(fp,&baseWeightG) ; +HPI(fp,(DOUBLE *)(&baseWeightG)) ; HPI(fp,&wireFactorXG) ; HPI(fp,&wireFactorYG) ; HPI(fp,&aveChanWidG) ; HPI(fp,&lapFactorG) ; -while( fscanf( fp , " %d %d %d %d ", &cell , &orient , +while( fscanf( fp , " " INTSCANSTR " " INTSCANSTR " " INTSCANSTR " " + INTSCANSTR " ", &cell , &orient , &xcenter , &ycenter ) == 4 ) { ptr = cellarrayG[ cell ] ; @@ -230,7 +240,7 @@ ptr->ycenter = ycenter ; ptr->boun_valid = FALSE ; if( instptr = ptr->instptr ){ - fscanf( fp , "%d", &inst ) ; + fscanf( fp , INTSCANSTR, &inst ) ; ptr->cur_inst = inst ; /* update tiles */ ptr->tiles = instptr->tile_inst[inst] ; @@ -249,7 +259,7 @@ fscanf( fp , "%lf" , &aspect ) ; ptr->aspect = aspect ; for( term = ptr->pinptr; term; term = term->nextpin ){ - fscanf( fp, "%d %d", &(term->txpos), &(term->typos) ) ; + fscanf( fp, "" INTSCANSTR " " INTSCANSTR "", &(term->txpos), &(term->typos) ) ; term->txpos_orig[inst] = term->txpos ; term->typos_orig[inst] = term->typos ; } @@ -351,16 +361,14 @@ } } /* end TW_oldinput */ -HPO(fp,d) -FILE *fp; /* high precision output */ -DOUBLE d; +void HPO(FILE *fp,DOUBLE d) +//FILE *fp; /* high precision output */ { fprintf(fp,"%34.32le\n",d); } /* end HPO */ -HPI(fp,d) -FILE *fp; /* high precision input */ -DOUBLE *d; +void HPI(FILE *fp,DOUBLE *d) +//FILE *fp; /* high precision input */ { INT numread ; diff -Nru graywolf-0.1.5/src/twmc/scrapnet.c graywolf-0.1.6/src/twmc/scrapnet.c --- graywolf-0.1.5/src/twmc/scrapnet.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/scrapnet.c 2018-08-11 21:48:56.000000000 +0000 @@ -43,14 +43,11 @@ DATE: Feb 7, 1990 REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) scrapnet.c version 3.3 9/5/90" ; -#endif #include #include -scrapnet() +void scrapnet() { NETBOXPTR dimptr ; diff -Nru graywolf-0.1.5/src/twmc/selectpin.c graywolf-0.1.6/src/twmc/selectpin.c --- graywolf-0.1.5/src/twmc/selectpin.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/selectpin.c 2018-08-11 21:48:56.000000000 +0000 @@ -48,15 +48,12 @@ controller. Mar 20, 1989 - rewrote to work with new data structure ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) selectpin.c version 3.3 9/5/90" ; -#endif #include #include -BOOL selectpin( acellptr ) +void selectpin( acellptr ) CELLBOXPTR acellptr ; { diff -Nru graywolf-0.1.5/src/twmc/setpwates.c graywolf-0.1.6/src/twmc/setpwates.c --- graywolf-0.1.5/src/twmc/setpwates.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/setpwates.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,14 +46,11 @@ Mon Feb 4 02:20:39 EST 1991 - updated for new wire estimator NOTE that standard cell weights are -2 as a flag. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) setpwates.c version 3.4 2/4/91" ; -#endif #include #include -setpwates() +void setpwates() { TILEBOXPTR tileptr ; diff -Nru graywolf-0.1.5/src/twmc/sortpad.c graywolf-0.1.6/src/twmc/sortpad.c --- graywolf-0.1.5/src/twmc/sortpad.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/sortpad.c 2018-08-11 21:48:56.000000000 +0000 @@ -48,9 +48,6 @@ Tue Mar 12 17:05:03 CST 1991 - fixed initialization problem with permutation. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) sortpad.c version 3.6 3/12/91" ; -#endif #include #include @@ -60,12 +57,12 @@ static INT compare_pads(); static INT sort_by_pos(); -static install_pad_groups(); -static permute_pads(); +static void install_pad_groups(); +static void permute_pads(); -sort_pads() +void sort_pads() { INT i ; /* pad counter */ INT pos ; /* position in place array */ @@ -185,7 +182,7 @@ } /* end sort_by_pos */ /* ***************************************************************** */ -static install_pad_groups( pad, position ) +static void install_pad_groups( pad, position ) PADBOXPTR pad ; INT *position ; { @@ -222,7 +219,7 @@ } /* end install_pad_groups */ /* ***************************************************************** */ -static permute_pads( pad ) +static void permute_pads( pad ) PADBOXPTR pad ; { INT tmp ; /* used to reverse permutable pads */ diff -Nru graywolf-0.1.5/src/twmc/sortpin.c graywolf-0.1.6/src/twmc/sortpin.c --- graywolf-0.1.5/src/twmc/sortpin.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/sortpin.c 2018-08-11 21:48:56.000000000 +0000 @@ -47,11 +47,9 @@ channel graph. Sun Jan 20 21:34:36 PST 1991 - ported to AIX. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) sortpin.c version 3.7 10/18/91" ; -#endif #include +#include #include #include @@ -60,7 +58,7 @@ static INT comparePin() ; -sortpins() +void sortpins() { INT j , n , cell ; diff -Nru graywolf-0.1.5/src/twmc/twstats.c graywolf-0.1.6/src/twmc/twstats.c --- graywolf-0.1.5/src/twmc/twstats.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/twstats.c 2018-08-11 21:48:56.000000000 +0000 @@ -45,9 +45,6 @@ DATE: Feb 29, 1988 REVISIONS: Jan 30, 1989 - added number of net info at beginning of run. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) twstats.c version 3.3 9/5/90" ; -#endif #include #include @@ -56,7 +53,7 @@ static INT maxpinS = 0 ; -twstats() +void twstats() { INT temp ; DOUBLE reduction ; @@ -107,13 +104,13 @@ static INT printPinS = 0 ; -set_print_pin( pin ) +void set_print_pin( pin ) INT pin ; { printPinS = pin ; } -prnt_netinfo() +void prnt_netinfo() { SHORT numpins ; @@ -174,7 +171,7 @@ } /* end prnt_netinfo */ -get_max_pin() +INT get_max_pin() { return( maxpinS ) ; } /* end get_max_pin */ diff -Nru graywolf-0.1.5/src/twmc/uaspect.c graywolf-0.1.6/src/twmc/uaspect.c --- graywolf-0.1.5/src/twmc/uaspect.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/uaspect.c 2018-08-11 21:48:56.000000000 +0000 @@ -53,9 +53,6 @@ Sat Apr 27 01:09:01 EDT 1991 - fixed problem with aspect ratio and added aspect ratio initialization. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) uaspect.c version 3.5 4/27/91" ; -#endif #include #include @@ -236,7 +233,7 @@ -initialize_aspect_ratios() +void initialize_aspect_ratios() { INT i ; /* counter */ INT binX, binY ; /* set initial bins */ diff -Nru graywolf-0.1.5/src/twmc/uinst.c graywolf-0.1.6/src/twmc/uinst.c --- graywolf-0.1.5/src/twmc/uinst.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/uinst.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,9 +49,6 @@ Sat Apr 27 01:10:04 EDT 1991 - fixed problem with aspect ratio calculation. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) uinst.c version 3.9 11/23/91" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/twmc/uloop.c graywolf-0.1.6/src/twmc/uloop.c --- graywolf-0.1.5/src/twmc/uloop.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/uloop.c 2018-08-11 21:48:56.000000000 +0000 @@ -106,9 +106,6 @@ Sat Nov 23 21:21:49 EST 1991 - began working with automatically setting move strategy. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) uloop.c version 3.14 4/6/92" ; -#endif #include #include @@ -170,7 +167,7 @@ -static output_move_table(); +static void output_move_table(); @@ -191,7 +188,7 @@ /* ***************************************************************** uloop - inner loop of simulated annealing algorithm. */ -uloop( limit ) +void uloop( limit ) INT limit ; { @@ -963,7 +960,7 @@ /* initializes random wiring and overlap statistics */ -initStatCollection() +void initStatCollection() { avgsG = 0.0 ; avg_funcG = 0.0 ; @@ -977,7 +974,7 @@ } /* end initStatCollection */ /* ***************************************************************** */ -getStatistics( totalWire, totalPenalty, avg_time, avg_func ) +void getStatistics( totalWire, totalPenalty, avg_time, avg_func ) DOUBLE *totalWire, *totalPenalty, *avg_time, *avg_func ; { *totalWire = totalwireS ; @@ -994,7 +991,7 @@ softcells only use old_aposG[1] and new_aposG[1] since they can have only one tile. */ -make_movebox() +void make_movebox() { INT i ; INT maxtiles ; @@ -1039,7 +1036,7 @@ /* ***************************************************************** save_uloop - save uloop parameters for restart */ -save_uloop( fp ) +void save_uloop( fp ) FILE *fp ; { fprintf(fp,"# uloop parameters:\n") ; @@ -1083,13 +1080,13 @@ } /* end read_uloop */ -set_dump_ratio( count ) +void set_dump_ratio( int count ) { dumpRatioS = count ; } /* end dump_ratio */ -static output_move_table( flip, att, move_size ) +static void output_move_table( flip, att, move_size ) INT *flip, *att ; DOUBLE *move_size ; { diff -Nru graywolf-0.1.5/src/twmc/unbust.c graywolf-0.1.6/src/twmc/unbust.c --- graywolf-0.1.5/src/twmc/unbust.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/unbust.c 2018-08-11 21:48:56.000000000 +0000 @@ -52,9 +52,6 @@ of buster. Sun Jan 20 21:34:36 PST 1991 - ported to AIX. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) unbust.c version 3.7 1/20/91" ; -#endif #include #include @@ -95,11 +92,12 @@ static INT sortbyYX(); static INT sortbyorder(); static INT remove_redundant_points(); -static add_vpts(); -static chek_vpt(); -static add_hpts(); -static chek_hpt(); +static void add_vpts(); +static void chek_vpt(); +static void add_hpts(); +static void chek_hpt(); +void dump_pts( POINTPTR *pt ); @@ -282,7 +280,7 @@ if( i == limit ){ M( ERRMSG, "unbust", "we have detected an infinite loop in automaton\n" ) ; - return ; + return NULL; } dump_pts( VptS ) ; @@ -408,10 +406,11 @@ } /* end switch */ } /* end going thru posibilities */ + return 0; } /* end get_next_state */ -addPt( tile, x, y ) +void addPt( tile, x, y ) INT tile, x, y ; { INT i ; /* counter */ @@ -445,7 +444,7 @@ return ; } /* end addPt */ -addPts( cell, l, r, b, t ) +void addPts( cell, l, r, b, t ) INT cell, l, r, b, t ; { addPt( cell, l, b ) ; @@ -456,7 +455,7 @@ l, b, l, t, r, t, r, b ) ) ; } /* end addPts */ -initPts( addpoint_flag ) +void initPts( addpoint_flag ) BOOL addpoint_flag ; { INT i ; /* counter */ @@ -588,7 +587,7 @@ } /* end remove_redundant_points */ -static add_vpts( numpts ) +static void add_vpts( numpts ) INT numpts ; { POINTPTR tile1ptr ; /* temp pointer to a point */ @@ -675,7 +674,7 @@ } /* end add_vpts */ -static chek_vpt( tile1, tile2, tile3, tile4 ) +static void chek_vpt( tile1, tile2, tile3, tile4 ) POINTPTR tile1, tile2, tile3, tile4 ; { /* four cases */ @@ -750,7 +749,7 @@ } /* end chek_vpt */ -static add_hpts( numpts ) +static void add_hpts( numpts ) INT numpts ; { POINTPTR tile1ptr ; /* temp pointer to a point */ @@ -837,7 +836,7 @@ } } /* end add_hpts */ -static chek_hpt( tile1, tile2, tile3, tile4 ) +static void chek_hpt( tile1, tile2, tile3, tile4 ) POINTPTR tile1, tile2, tile3, tile4 ; { /* four cases */ @@ -911,8 +910,7 @@ } } /* end chek_hpt */ - dump_pts( pt ) - POINTPTR *pt ; +void dump_pts( POINTPTR *pt ) { INT i ; POINTPTR ptr ; diff -Nru graywolf-0.1.5/src/twmc/unet.c graywolf-0.1.6/src/twmc/unet.c --- graywolf-0.1.5/src/twmc/unet.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/unet.c 2018-08-11 21:48:56.000000000 +0000 @@ -58,9 +58,6 @@ Apr 23, 1990 - added assertion to make sure half perimeter does not go negative. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) unet.c (Yale) version 3.6 11/23/91" ; -#endif #include #include @@ -74,14 +71,14 @@ -static check_validbound(); -static wire_boundary2(); -static wire_boundary1(); +static void check_validbound(); +static void wire_boundary2(); +static void wire_boundary1(); -init_unet() +void init_unet() { INT maxpin, get_max_pin() ; @@ -279,7 +276,7 @@ return( cost ) ; } /* end unet2 */ -static check_validbound( netptr , termptr , nextptr ) +static void check_validbound( netptr , termptr , nextptr ) NETBOXPTR netptr ; PINBOXPTR termptr , nextptr ; { @@ -365,7 +362,7 @@ } } /* end check_validbound */ -static wire_boundary2( c , netptr ) +static void wire_boundary2( c , netptr ) NETBOXPTR netptr ; INT c ; { @@ -761,7 +758,7 @@ } } /* end wire_boundary2 */ -static wire_boundary1( netptr ) +static void wire_boundary1( netptr ) NETBOXPTR netptr ; { diff -Nru graywolf-0.1.5/src/twmc/upin.c graywolf-0.1.6/src/twmc/upin.c --- graywolf-0.1.5/src/twmc/upin.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/upin.c 2018-08-11 21:48:56.000000000 +0000 @@ -54,9 +54,6 @@ Aug 13, 1990 - moved relpos to yalecad/relpos.h Wed Jan 30 14:15:02 EST 1991 - removed relpos. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) upin.c version 3.4 1/30/91" ; -#endif #include #include @@ -64,7 +61,7 @@ #define BREAK_PT2 6 -upin_test( termptr, pos ) +void upin_test( termptr, pos ) PINBOXPTR termptr ; MOVEBOXPTR pos ; { @@ -89,7 +86,7 @@ } } /* end upin_test */ -upin_accept( termptr ) +void upin_accept( termptr ) PINBOXPTR termptr ; { diff -Nru graywolf-0.1.5/src/twmc/upinswap.c graywolf-0.1.6/src/twmc/upinswap.c --- graywolf-0.1.5/src/twmc/upinswap.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/upinswap.c 2018-08-11 21:48:56.000000000 +0000 @@ -45,9 +45,6 @@ DATE: Mar 30, 1990 - new vertion of pinswap code. REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) upinswap.c version 3.3 9/5/90" ; -#endif #include #include @@ -116,7 +113,7 @@ } /* end upinswap */ -check_pin( a ) +void check_pin( a ) INT a ; { INT x, y, l, r, t, b; diff -Nru graywolf-0.1.5/src/twmc/usite1.c graywolf-0.1.6/src/twmc/usite1.c --- graywolf-0.1.5/src/twmc/usite1.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/usite1.c 2018-08-11 21:48:56.000000000 +0000 @@ -48,9 +48,6 @@ Oct 21, 1988 - changed to sqrt of overlap penalty. Nov 25, 1988 - added timing driven code ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) usite1.c version 3.4 9/10/90" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/twmc/usite2.c graywolf-0.1.6/src/twmc/usite2.c --- graywolf-0.1.5/src/twmc/usite2.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/usite2.c 2018-08-11 21:48:56.000000000 +0000 @@ -50,9 +50,6 @@ Nov 25, 1988 - added timing driven code. May 3, 1989 - added unet2 for two cell swaps. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) usite2.c version 3.4 9/10/90" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/twmc/usoftmove.c graywolf-0.1.6/src/twmc/usoftmove.c --- graywolf-0.1.5/src/twmc/usoftmove.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/usoftmove.c 2018-08-11 21:48:56.000000000 +0000 @@ -48,9 +48,6 @@ Mar 16, 1989 - rewrote data structure and move upin to usoftmove.c. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) usoftmove.c version 3.3 9/5/90" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/twmc/utemp.c graywolf-0.1.6/src/twmc/utemp.c --- graywolf-0.1.5/src/twmc/utemp.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/utemp.c 2018-08-11 21:48:56.000000000 +0000 @@ -54,15 +54,12 @@ Oct 14,1990 - added overlap iterations. Fri Jan 25 18:09:20 PST 1991 - removed unnecessary globals. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) utemp.c version 3.6 4/6/92" ; -#endif #include #include #include -utemp( attempts, multi_cell_moves ) +void utemp( attempts, multi_cell_moves ) INT attempts ; BOOL multi_cell_moves ; { diff -Nru graywolf-0.1.5/src/twmc/watesides.c graywolf-0.1.6/src/twmc/watesides.c --- graywolf-0.1.5/src/twmc/watesides.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/watesides.c 2018-08-11 21:48:56.000000000 +0000 @@ -45,16 +45,11 @@ wire estimator. REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) watesides.c version 3.5 2/4/91" ; -#endif #include #include -watesides( ptr, pSideArray ) -CELLBOXPTR ptr ; -PSIDEBOX *pSideArray ; +void watesides( CELLBOXPTR ptr, PSIDEBOX *pSideArray ) { TILEBOXPTR tileptr ; diff -Nru graywolf-0.1.5/src/twmc/window.c graywolf-0.1.6/src/twmc/window.c --- graywolf-0.1.5/src/twmc/window.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/window.c 2018-08-11 21:48:56.000000000 +0000 @@ -61,9 +61,6 @@ Apr 09, 1989 - fixed bug in pick_position and pick_neighborhood so that cells can't jump outside region. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) window.c version 3.6 11/26/90" ; -#endif #include #include @@ -110,7 +107,7 @@ /* ***************************************************************** init_control - initialize range limiter. */ -init_control(first) +void init_control(first) BOOL first ; { INT i; @@ -162,7 +159,7 @@ /* ***************************************************************** pick_positon - pick place to move within range limiter. */ -pick_position(x,y,ox,oy) +void pick_position(x,y,ox,oy) INT *x,*y,ox,oy; { register INT i,m,n; @@ -236,7 +233,7 @@ pick_neighborhood - pick place to move within neighborhood while still using range limiter. */ -pick_neighborhood(x,y,ox,oy,fixptr) +void pick_neighborhood(x,y,ox,oy,fixptr) INT *x,*y,ox,oy; FIXEDBOXPTR fixptr ; { @@ -327,7 +324,7 @@ *y = n; } /* end pick_neighborhood */ -update_window_size( iteration ) +void update_window_size( iteration ) DOUBLE iteration ; { if( iteration <= HIGHTEMP ){ @@ -357,7 +354,7 @@ } -fix_window() +void fix_window() { /*** set window to minimum for low temp anneal ***/ xalS = min_xalphaS; @@ -372,7 +369,7 @@ static DOUBLE ws_yalS; static DOUBLE ws_ratioS ; -save_window( fp ) +void save_window( fp ) FILE *fp ; { if( fp ){ /* if a file pointer is given write to file */ diff -Nru graywolf-0.1.5/src/twmc/wirecosts.c graywolf-0.1.6/src/twmc/wirecosts.c --- graywolf-0.1.5/src/twmc/wirecosts.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/wirecosts.c 2018-08-11 21:48:56.000000000 +0000 @@ -48,15 +48,12 @@ DATE: Apr 27, 1989 - added heading and added limitnets calc. REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) wirecosts.c version 3.3 9/5/90" ; -#endif #include #include -wirecosts() +void wirecosts() { NETBOXPTR dimptr ; diff -Nru graywolf-0.1.5/src/twmc/wireest.c graywolf-0.1.6/src/twmc/wireest.c --- graywolf-0.1.5/src/twmc/wireest.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/wireest.c 2018-08-11 21:48:56.000000000 +0000 @@ -51,9 +51,6 @@ Thu Mar 7 01:49:31 EST 1991 - now save wireestimation parameters. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) wireest.c version 3.6 3/7/91" ; -#endif #include #include @@ -88,13 +85,13 @@ -static check_routing(); +static void check_routing(); /*******************************************************************/ -wireestxy( pos, xc, yc ) +void wireestxy( pos, xc, yc ) MOVEBOXPTR pos ; INT xc, yc ; { @@ -266,7 +263,7 @@ } /* end wireestxy */ /*********************************************************************/ -wireestxy2( pos, xc, yc ) +void wireestxy2( pos, xc, yc ) MOVEBOXPTR pos ; INT xc, yc ; { @@ -346,7 +343,7 @@ } /* end read_wire_est */ -resize_wire_params() +void resize_wire_params() { blocklS = (DOUBLE) blocklG ; blockbS = (DOUBLE) blockbG ; @@ -355,7 +352,7 @@ } /* end resize_wire_params */ -static check_routing( routing ) +static void check_routing( routing ) INT *routing ; { if( *routing < 0 ){ @@ -370,7 +367,7 @@ /* ***************************************************************** save_wireest - save wireest parameters for restart */ -save_wireest( fp ) +void save_wireest( fp ) FILE *fp ; { fprintf(fp,"# wireest parameters:\n") ; diff -Nru graywolf-0.1.5/src/twmc/wireratio.c graywolf-0.1.6/src/twmc/wireratio.c --- graywolf-0.1.5/src/twmc/wireratio.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twmc/wireratio.c 2018-08-11 21:48:56.000000000 +0000 @@ -52,9 +52,6 @@ Wed May 1 19:18:55 EDT 1991 - added switchbox field so we can ignore these areas during wire estimation. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) wireratio.c version 3.9 3/10/92" ; -#endif #include #include @@ -64,7 +61,7 @@ #include #include -gsl_matrix_disp( mptr, rows, cols ) +static void gsl_matrix_disp( mptr, rows, cols ) gsl_matrix *mptr ; int rows, cols; { @@ -79,7 +76,7 @@ fprintf( stderr, "\n" ) ; } /* end gsl_matrix_disp */ -gsl_vector_disp( vptr, rows ) +static void gsl_vector_disp( vptr, rows ) gsl_vector *vptr ; int rows; { @@ -91,7 +88,7 @@ fprintf( stderr, "\n" ) ; } /* end gsl_vector_disp */ -static set_pins( A, center, loc, tile_side, sidepins, count ) +static void set_pins( A, center, loc, tile_side, sidepins, count ) gsl_matrix *A ; /* the matrix holding x y positions */ INT center ; INT loc ; @@ -116,7 +113,7 @@ } } /* end set_pins */ -adapt_wire_estimator() +void adapt_wire_estimator() { INT i ; /* coefficient counter */ INT cell ; /* cell counter */ diff -Nru graywolf-0.1.5/src/twsc/acceptt.c graywolf-0.1.6/src/twsc/acceptt.c --- graywolf-0.1.5/src/twsc/acceptt.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/acceptt.c 2018-08-11 21:48:56.000000000 +0000 @@ -44,9 +44,6 @@ DATE: Jan 30, 1988 REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) acceptt.c version 4.7 4/2/92" ; -#endif #include #include @@ -57,7 +54,7 @@ static DOUBLE table1S[1024] , table2S[1024] , table3S[1024] ; -init_table() +void init_table() { INT i2 ; table1S[0] = 1.0 ; diff -Nru graywolf-0.1.5/src/twsc/buildimp.c graywolf-0.1.6/src/twsc/buildimp.c --- graywolf-0.1.5/src/twsc/buildimp.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/buildimp.c 2018-08-11 21:48:56.000000000 +0000 @@ -53,11 +53,6 @@ dynamic. Wed Jan 16 14:26:44 PST 1991 - removed re_buildimp ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) buildimp.c (Yale) version 4.9 11/7/91" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -68,7 +63,7 @@ extern BOOL ignore_feedsG ; /* Treat feedthroughs as width 0 */ -buildimp( ) +void buildimp( ) { IPBOXPTR *impinptr , imptr ; @@ -174,7 +169,7 @@ } -link_imptr( ) +void link_imptr( ) { INT i , row , *Aray ; CBOXPTR cellptr ; @@ -196,7 +191,7 @@ } -decide_boundary( ) +void decide_boundary( ) { INT row , fcx , fcl , lcx , lcr , lcl ; @@ -236,7 +231,7 @@ } -fixwolf( ) +void fixwolf( ) { INT j , last_j ; @@ -256,7 +251,7 @@ } -addfeed( row , pos , feednum ) +void addfeed( row , pos , feednum ) INT row , pos , feednum ; { CBOXPTR cellptr ; diff -Nru graywolf-0.1.5/src/twsc/cell_width.c graywolf-0.1.6/src/twsc/cell_width.c --- graywolf-0.1.5/src/twsc/cell_width.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/cell_width.c 2018-08-11 21:48:56.000000000 +0000 @@ -47,11 +47,6 @@ DATE: July 26, 1991 ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) cell_width.c (Yale) version 1.1 9/27/91" ; -#endif -#endif #define PADKEYWORD "pad" #define RELATIVE_TO_CURPOS 1 @@ -78,7 +73,7 @@ extern INT extra_cellsG ; static INT compare_cell_length(); -static read_pads(); +static void read_pads(); @@ -86,22 +81,19 @@ /*------------ User defined print routine to print out the tree ------------*/ /*--------------------------------------------------------------------------*/ -INT print_cell_name(c1) -CBOXPTR c1; +void print_cell_name(CBOXPTR c1) { return; } -INT print_cell_length(c1) -CBOXPTR c1; +void print_cell_length(CBOXPTR c1) { return; } -INT print_cell_pins(c1) -CBOXPTR c1; +void print_cell_pins(CBOXPTR c1) { return ; } @@ -112,7 +104,7 @@ -calc_cells_width() +void calc_cells_width() { FILE *fp; /*--- file pointer to stdcell.comp ---*/ @@ -560,7 +552,7 @@ /****************************************************************************/ -static read_pads( fp ) +static void read_pads( fp ) FILE *fp ; { char buffer[LRECL], *bufferptr ; diff -Nru graywolf-0.1.5/src/twsc/cglbroute.c graywolf-0.1.6/src/twsc/cglbroute.c --- graywolf-0.1.5/src/twsc/cglbroute.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/cglbroute.c 2018-08-11 21:48:56.000000000 +0000 @@ -56,11 +56,6 @@ REVISIONS: Sat Dec 15 22:08:21 EST 1990 - modified pinloc values so that it will always be positive. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) cglbroute.c (Yale) version 4.5 12/15/90" ; -#endif -#endif #include "standard.h" #include "main.h" @@ -83,7 +78,7 @@ static INT *crowdmaxS , glb_crowdmaxS , *node_rightS ; static DOUBLE ctrackContS , factor_hereS , factor_oneS , factor_twoS ; -cglb_initial() +void cglb_initial() { INT i , j , net , x , tilted_seg ; @@ -147,7 +142,7 @@ } -proj_tree_to_grid( ) +void proj_tree_to_grid( ) { SEGBOXPTR segptr ; @@ -294,7 +289,7 @@ } -set_cbucket( ) +void set_cbucket( ) { HCAPPTR hcaptr , headptr ; @@ -366,7 +361,7 @@ } -cglbroute() +void cglbroute() { SEGBOXPTR segptr ; @@ -694,7 +689,7 @@ } -free_cglb_initial() +void free_cglb_initial() { INT i , j , last_j , row ; @@ -718,7 +713,7 @@ } -reinitial_Hdensity() +void reinitial_Hdensity() { INT i , j ; @@ -731,7 +726,7 @@ } -update_switchvalue() +void update_switchvalue() { INT net , x , tilted_seg ; @@ -792,7 +787,7 @@ } -rebuild_cbucket() +void rebuild_cbucket() { INT row , j , last_j ; HCAPPTR hcaptr , headptr ; @@ -843,7 +838,7 @@ #ifdef DEBUG -check_cbucket() +void check_cbucket() { INT row, j ; HCAPPTR dptr , denptr ; diff -Nru graywolf-0.1.5/src/twsc/changrid.c graywolf-0.1.6/src/twsc/changrid.c --- graywolf-0.1.5/src/twsc/changrid.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/changrid.c 2018-08-11 21:48:56.000000000 +0000 @@ -47,16 +47,11 @@ so that it will always be positive. Wed Aug 28 14:27:04 EDT 1991 - added more debug. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) changrid.c (Yale) version 4.5 8/29/91" ; -#endif -#endif #include "standard.h" #include "groute.h" -changrid( ) +void changrid( ) { CHANGRDPTR **gdptr , grdptr , cgdptr , ngdptr ; @@ -220,7 +215,7 @@ } -pre_findrcost() +void pre_findrcost() { SEGBOXPTR segptr ; diff -Nru graywolf-0.1.5/src/twsc/CMakeLists.txt graywolf-0.1.6/src/twsc/CMakeLists.txt --- graywolf-0.1.5/src/twsc/CMakeLists.txt 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/CMakeLists.txt 2018-08-11 21:48:56.000000000 +0000 @@ -3,8 +3,8 @@ add_executable(TimberWolfSC acceptt.c coarseglb.c debug2.c findcostf.c globroute.c newtemp.c overlap.c readcell.c rowevener.c sortpin.c ucxxo1.c upair.c buildimp.c configpads.c debug.c findrcost.c graphics.c outcm.c parser.c readnets.c savewolf.c steiner.c ucxxo2.c urcost.c cell_width.c configure.c dimbox.c findunlap.c main.c outpins1.c paths.c readpar.c seagate.c uc0.c ucxxp.c utemp.c cglbroute.c countf.c feedest.c gateswap.c mergeseg.c outpins.c placepads.c reconfig.c sort.c ucxx1.c uloop.c xpickint.c changrid.c crossbus.c findcost.c globe.c netgraph.c output.c readblck.c rmoverlap.c sortpad.c ucxx2.c unlap.c ${CMAKE_SOURCE_DIR}/src/date/date.c) -target_link_libraries(TimberWolfSC ${CMAKE_BINARY_DIR}/src/Ylib/libycadgraywolf.so) -target_link_libraries(TimberWolfSC X11) +target_link_libraries(TimberWolfSC ycadgraywolf) +target_link_libraries(TimberWolfSC ${X11_LIBRARIES}) target_link_libraries(TimberWolfSC m) INCLUDE_DIRECTORIES(${CMAKE_SOURCE_DIR}/include ${CMAKE_BINARY_DIR}/include .) diff -Nru graywolf-0.1.5/src/twsc/coarseglb.c graywolf-0.1.6/src/twsc/coarseglb.c --- graywolf-0.1.5/src/twsc/coarseglb.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/coarseglb.c 2018-08-11 21:48:56.000000000 +0000 @@ -61,11 +61,6 @@ REVISIONS: Aug 27, 1990 - modified shift so it only shifts if not enough room for pads. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) coarseglb.c (Yale) version 4.10 12/9/91" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -78,6 +73,19 @@ /* static definitions */ static INT *accumulate_feedS , *feed_diffS , *diff_in_rowfeedS ; static INT *feed_shortS , half_hzsepS , right_Pads_left_edgeS ; +INT set_node(INT x ); + +/* local functions */ +static int space_for_feed(void); +void set_up_grid( ); +void initialize_feed_need(); +void feed_config( ); +void compute_feed_diff( INT iteration ); +void update_feed_config( INT iteration ); +INT no_of_feedthru_cells(); +void addin_feedcell(); +void final_feed_config(); +void free_cglb_data(); /* global definitions */ INT longest_row_lengthG ; @@ -89,13 +97,13 @@ extern BOOL no_feed_at_endG ; extern BOOL ignore_feedsG ; -coarseglb() +void coarseglb() { INT shift ; INT iteration = 0 ; -assign_row_to_pin() ; +void assign_row_to_pin() ; if( case_unequiv_pinG ) { unequiv_pin_pre_processing() ; } @@ -154,7 +162,7 @@ } -assign_row_to_pin() +void assign_row_to_pin() { CBOXPTR cellptr ; @@ -172,7 +180,7 @@ -set_up_grid( ) +void set_up_grid( ) { INT i , j , x , row_rite ; @@ -278,7 +286,7 @@ } } -initialize_feed_need() +void initialize_feed_need() { INT i , row ; @@ -296,7 +304,7 @@ } -feed_config( ) +void feed_config( ) { INT row , cell , cxcenter , k ; @@ -324,8 +332,7 @@ } -set_node( x ) -INT x ; +INT set_node(INT x ) { DOUBLE h ; @@ -341,8 +348,7 @@ } -compute_feed_diff( iteration ) -INT iteration ; +void compute_feed_diff( INT iteration ) { INT i , j , k , range , left_node , rite_node ; @@ -404,7 +410,7 @@ } -space_for_feed( ) +static int space_for_feed(void) { PINBOXPTR pinptr ; @@ -526,8 +532,7 @@ } -update_feed_config( iteration ) -INT iteration ; +void update_feed_config( INT iteration ) { INT cell , padside , shift ; @@ -655,7 +660,7 @@ } -no_of_feedthru_cells() +INT no_of_feedthru_cells() { INT i , row , n , difference , lastcell_rite , total_feedthrus ; @@ -697,7 +702,7 @@ } -addin_feedcell() +void addin_feedcell() { INT row , i , k , r , last , feednum , row_left ; @@ -822,7 +827,7 @@ } -final_feed_config( ) +void final_feed_config( ) { IPBOXPTR imptr ; @@ -881,7 +886,7 @@ } -free_cglb_data() +void free_cglb_data() { INT i , net ; diff -Nru graywolf-0.1.5/src/twsc/configpads.c graywolf-0.1.6/src/twsc/configpads.c --- graywolf-0.1.5/src/twsc/configpads.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/configpads.c 2018-08-11 21:48:56.000000000 +0000 @@ -57,9 +57,6 @@ Thu Aug 29 15:44:00 CDT 1991 - added overflow processing code. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) configpads.c version 4.12 11/7/91" ; -#endif #include #include @@ -69,15 +66,17 @@ /* ***************** STATIC FUNCTION DEFINITIONS ******************* */ static BOOL check_overflow( P1(BOOL retain_pad_groups) ) ; -static move_clockwise( P4(INT pad, INT side, INT cw_side, INT moveable_cw) ) ; -static move_counterclockwise( P4(INT pad,INT side,INT ccw_side,INT m_ccw ) ) ; -static update_pad_position( P3(PADBOXPTR pad,INT current_side, INT move_side) ); -static expand_core( P1(INT side) ) ; +static void move_clockwise( P4(INT pad, INT side, INT cw_side, INT moveable_cw) ) ; +static void move_counterclockwise( P4(INT pad,INT side,INT ccw_side,INT m_ccw ) ) ; +static void update_pad_position( P3(PADBOXPTR pad,INT current_side, INT move_side) ); +static void expand_core( P1(INT side) ) ; static INT compare_overflow( P2(INT *side1, INT *side2) ) ; -static update_pad_groups( P1(void) ) ; -static resort_place_array( P1(void) ) ; -static child_constraints(P5(PADBOXPTR pad,INT side,DOUBLE lb,DOUBLE ub,BOOL s)); -static place_variable( P3(INT first,INT numpads,INT side) ) ; +static void update_pad_groups( P1(void) ) ; +static void resort_place_array( P1(void) ) ; +static void child_constraints(P5(PADBOXPTR pad,INT side,DOUBLE lb,DOUBLE ub,BOOL s)); +static void place_variable( P3(INT first,INT numpads,INT side) ) ; + +void calc_constraints( PADBOXPTR pad, INT side, DOUBLE *lb, DOUBLE *ub, BOOL *spacing_restricted, INT *lowpos, INT *uppos ); /* ***************** STATIC VARIABLE DEFINITIONS ******************* */ static INT overflowS[5] ; /* amount of overflow on each side */ @@ -86,7 +85,7 @@ static INT last_pad_on_sideS[5] ; /* index of last pad on side */ static INT pad_extraS ; /* insure that sort works correctly */ -align_pads() +void align_pads() { INT pad ; /* counter */ INT side ; /* current pad side */ @@ -340,7 +339,7 @@ } /* end check_overflow */ -static move_clockwise( pad, side, clockwise_side, moveable_cw ) +static void move_clockwise( pad, side, clockwise_side, moveable_cw ) INT pad, side, clockwise_side, moveable_cw ; { PADBOXPTR padptr ; /* current pad info */ @@ -357,7 +356,7 @@ } /* end move_clockwise */ -static move_counterclockwise( pad, side, counterclockwise, moveable_ccw ) +static void move_counterclockwise( pad, side, counterclockwise, moveable_ccw ) INT pad, side, counterclockwise, moveable_ccw ; { PADBOXPTR padptr ; /* current pad info */ @@ -373,7 +372,7 @@ } /* end move_counterclockwise */ -static update_pad_position( padptr, current_side, move_side ) +static void update_pad_position( padptr, current_side, move_side ) PADBOXPTR padptr ; /* current pad info */ INT current_side ; INT move_side ; @@ -397,7 +396,7 @@ } /* end switch side ... */ } /* end update_pad_position */ -static expand_core( side ) +static void expand_core( side ) INT side ; { INT i ; /* counter */ @@ -467,14 +466,14 @@ } } /* end compare_placearray */ -static resort_place_array() +static void resort_place_array() { Yquicksort( &(placearrayG[1]), numpadsG, sizeof(PADBOXPTR), compare_placearray ); } /* end resort_place_array */ /* ***************************************************************** */ /* set the lo_pos and hi_pos fields for the pads */ -static update_pad_groups() +static void update_pad_groups() { INT i ; /* pad counter */ @@ -508,7 +507,7 @@ } /* end update_pad_groups */ /* this will set the constaints for pad groups and children of them */ -static child_constraints( pad, side, lb, ub, spacing_restricted ) +static void child_constraints( pad, side, lb, ub, spacing_restricted ) PADBOXPTR pad ; INT side ; DOUBLE lb, ub ; @@ -531,12 +530,7 @@ } /* end child_constraints */ /* ***************************************************************** */ -calc_constraints( pad, side, lb, ub, spacing_restricted,lowpos, uppos ) -PADBOXPTR pad ; -INT side ; -DOUBLE *lb, *ub ; -BOOL *spacing_restricted ; -INT *lowpos, *uppos ; +void calc_constraints( PADBOXPTR pad, INT side, DOUBLE *lb, DOUBLE *ub, BOOL *spacing_restricted, INT *lowpos, INT *uppos ) { DOUBLE lowbound, hibound ; @@ -591,7 +585,7 @@ } /* end calc_constraints */ /* ***************************************************************** */ -static place_variable( first, numpads, side ) +static void place_variable( first, numpads, side ) INT first, numpads, side ; { INT pad ; /* counter */ @@ -645,7 +639,7 @@ } /* end place_variable */ /* ***************************************************************** */ -dimension_pads() +void dimension_pads() { INT i ; /* pad counter */ PADBOXPTR pad ; /* current pad */ @@ -691,7 +685,7 @@ /* ***************************************************************** */ -orient_pads() +void orient_pads() { INT i ; /* counter */ PADBOXPTR pad ; /* current pad info */ diff -Nru graywolf-0.1.5/src/twsc/configure.c graywolf-0.1.6/src/twsc/configure.c --- graywolf-0.1.5/src/twsc/configure.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/configure.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,11 +49,6 @@ Tue Mar 19 16:27:35 CST 1991 - fixed calculation problem with rowSep. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) configure.c (Yale) version 4.12 3/19/91" ; -#endif -#endif #define CONFIG_VARS @@ -88,8 +83,10 @@ static INT mttshiftS ; static INT mbbshiftS ; +void random_placement(); -configure() + +void configure() { INT block ; @@ -953,7 +950,7 @@ -random_placement() +void random_placement() { INT cell , row , borient , blk , widthS ; diff -Nru graywolf-0.1.5/src/twsc/countf.c graywolf-0.1.6/src/twsc/countf.c --- graywolf-0.1.5/src/twsc/countf.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/countf.c 2018-08-11 21:48:56.000000000 +0000 @@ -51,11 +51,6 @@ REVISIONS: Sat Dec 15 22:08:21 EST 1990 - modified pinloc values so that it will always be positive. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) countf.c (Yale) version 4.10 2/23/92" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -77,7 +72,12 @@ static INT **row_mapS ; static BOOL num_callS = FALSE ; -countf() +void prep_feed_count_1(); +void prep_feed_count(); +void insert_row(INT flag); +int feed_situation(INT row , INT net); + +int countf() { PINBOXPTR netptr ; @@ -264,7 +264,7 @@ -prep_feed_count_1() +void prep_feed_count_1() { INT row ; @@ -288,7 +288,7 @@ } -prep_feed_count() +void prep_feed_count() { INT row ; @@ -310,8 +310,7 @@ -insert_row( flag ) -INT flag ; +void insert_row(INT flag ) { PINBOXPTR pinptr ; @@ -384,8 +383,7 @@ -feed_situation( row , net ) -INT row , net ; +int feed_situation(INT row , INT net ) { PINBOXPTR nptr ; diff -Nru graywolf-0.1.5/src/twsc/crossbus.c graywolf-0.1.6/src/twsc/crossbus.c --- graywolf-0.1.5/src/twsc/crossbus.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/crossbus.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,11 +46,6 @@ DATE: Mar 27, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) crossbus.c (Yale) version 4.5 10/14/90" ; -#endif -#endif #include "standard.h" #include "main.h" @@ -62,7 +57,7 @@ extern INT row_extentG ; extern BOOL exclude_noncrossbus_padsG ; -handle_crossbuses() +void handle_crossbuses() { PINBOXPTR netptr ; @@ -487,7 +482,7 @@ -check_violations() +void check_violations() { FENCEBOXPTR fence ; @@ -589,7 +584,7 @@ -reduce_violations() +int reduce_violations() { FENCEBOXPTR fence , save_fence ; diff -Nru graywolf-0.1.5/src/twsc/debug2.c graywolf-0.1.6/src/twsc/debug2.c --- graywolf-0.1.5/src/twsc/debug2.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/debug2.c 2018-08-11 21:48:56.000000000 +0000 @@ -68,11 +68,6 @@ Sat Dec 15 22:08:21 EST 1990 - modified pinloc values so that it will always be positive. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) debug2.c (Yale) version 4.7 12/15/90" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -94,7 +89,7 @@ -dbx_adj( net ) +void dbx_adj( net ) INT net ; { @@ -122,7 +117,7 @@ TWCLOSE(fp) ; } -dbx_netseg( net1 , net2 ) +void dbx_netseg( net1 , net2 ) INT net1 , net2 ; { @@ -149,7 +144,7 @@ TWCLOSE(fp) ; } -dbx_seg( segptr ) +void dbx_seg( segptr ) SEGBOXPTR segptr ; { @@ -169,7 +164,7 @@ } -dbx_feed( row1 , row2 ) +void dbx_feed( row1 , row2 ) INT row1 , row2 ; { @@ -245,7 +240,7 @@ } -dbx_imp( row1 , row2 ) +void dbx_imp( row1 , row2 ) INT row1 , row2 ; { @@ -275,7 +270,7 @@ TWCLOSE(fp) ; } -dbx_funcost() +void dbx_funcost() { INT net , cost , minx , miny , maxx , maxy ; @@ -312,7 +307,7 @@ } } -mst_graph( net1 , net2 ) +void mst_graph( net1 , net2 ) INT net1 , net2 ; { @@ -407,7 +402,7 @@ -dbx_fdasgn( row ) +void dbx_fdasgn( row ) INT row ; { @@ -480,7 +475,7 @@ -check_cost() +void check_cost() { CBOXPTR ptr ; diff -Nru graywolf-0.1.5/src/twsc/debug.c graywolf-0.1.6/src/twsc/debug.c --- graywolf-0.1.5/src/twsc/debug.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/debug.c 2018-08-11 21:48:56.000000000 +0000 @@ -57,17 +57,12 @@ DATE: Mar 27, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) debug.c (Yale) version 4.5 9/7/90" ; -#endif -#endif #include "standard.h" #include "groute.h" #include "pads.h" -cellbox_data( first_cell , last_cell ) +void cellbox_data( first_cell , last_cell ) INT first_cell , last_cell ; { @@ -96,7 +91,7 @@ } -cellterm_data( first_cell , last_cell ) +void cellterm_data( first_cell , last_cell ) INT first_cell , last_cell ; { @@ -146,7 +141,7 @@ } -dbx_terminal( first_net , last_net ) +void dbx_terminal( first_net , last_net ) INT first_net , last_net ; { @@ -170,7 +165,7 @@ } -dbx_grd( ptr1 , ptr2 ) +void dbx_grd( ptr1 , ptr2 ) CHANGRDPTR ptr1 , ptr2 ; { @@ -190,7 +185,7 @@ } } -pairCheck( first_row , last_row ) +void pairCheck( first_row , last_row ) INT first_row , last_row ; { @@ -239,7 +234,7 @@ -dbx_track( start_chan , end_chan ) +void dbx_track( start_chan , end_chan ) INT start_chan , end_chan ; { INT chan ; diff -Nru graywolf-0.1.5/src/twsc/dimbox.c graywolf-0.1.6/src/twsc/dimbox.c --- graywolf-0.1.5/src/twsc/dimbox.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/dimbox.c 2018-08-11 21:48:56.000000000 +0000 @@ -64,11 +64,6 @@ Mon Nov 18 16:28:30 EST 1991 - fixed initialization problem with check_validbound. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) dimbox.c (Yale) version 4.5 11/18/91" ; -#endif -#endif #include "standard.h" #define break_pt 5 @@ -78,7 +73,12 @@ static INT kS ; static PINBOXPTR *memoptrS ; -init_dimbox() +void wire_boundary1(DBOXPTR dimptr); +void check_validbound(DBOXPTR dimptr, PINBOXPTR termptr, PINBOXPTR nextptr ); +void wire_boundary2(INT c , DBOXPTR dimptr); + + +void init_dimbox() { INT maxpin, get_max_pin() ; @@ -89,7 +89,7 @@ } /* end init_dimbox */ -new_dbox( antrmptr , costptr ) +void new_dbox( antrmptr , costptr ) PINBOXPTR antrmptr ; INT *costptr ; { @@ -137,7 +137,7 @@ } -new_dbox2( antrmptr , bntrmptr , costptr ) +void new_dbox2( antrmptr , bntrmptr , costptr ) PINBOXPTR antrmptr , bntrmptr ; INT *costptr ; { @@ -230,8 +230,7 @@ } -wire_boundary1( dimptr ) -DBOXPTR dimptr ; +void wire_boundary1(DBOXPTR dimptr ) { PINBOXPTR netptr ; @@ -269,9 +268,7 @@ } } -check_validbound( dimptr , termptr , nextptr ) -DBOXPTR dimptr ; -PINBOXPTR termptr , nextptr ; +void check_validbound(DBOXPTR dimptr, PINBOXPTR termptr, PINBOXPTR nextptr ) { INT nux , nuy , x , y ; @@ -355,9 +352,7 @@ } } -wire_boundary2( c , dimptr ) -DBOXPTR dimptr ; -INT c ; +void wire_boundary2(INT c , DBOXPTR dimptr ) { PINBOXPTR netptr ; @@ -751,7 +746,7 @@ } } -dbox_pos( antrmptr ) +void dbox_pos( antrmptr ) PINBOXPTR antrmptr ; { @@ -778,7 +773,7 @@ } -dbox_pos_swap( antrmptr ) +void dbox_pos_swap( antrmptr ) PINBOXPTR antrmptr ; { @@ -803,7 +798,7 @@ } -init_dbox_pos_swap( antrmptr ) +void init_dbox_pos_swap( antrmptr ) PINBOXPTR antrmptr ; { diff -Nru graywolf-0.1.5/src/twsc/feedest.c graywolf-0.1.6/src/twsc/feedest.c --- graywolf-0.1.5/src/twsc/feedest.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/feedest.c 2018-08-11 21:48:56.000000000 +0000 @@ -62,14 +62,10 @@ Tue Mar 12 17:08:44 CST 1991 - added back missing computation. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) feedest.c (Yale) version 4.9 3/12/91" ; -#endif -#endif #define FEEDS_VARS +#include #include "standard.h" #include "groute.h" #include "feeds.h" @@ -87,587 +83,587 @@ static INT chip_width_penaltyS ; static INT *est_min_ratioS ; +void estimate_pass_thru_penalty(INT row1 , INT row2 ); -feedest() +void feedest() { -DOUBLE ratio ; -INT net , row , toprow , botrow, maxdesire ; -DBOXPTR dimptr ; -PINBOXPTR ptr ; - -fd_estimateS = (DOUBLE *)Ysafe_calloc( numChansG + 1, sizeof(DOUBLE) ) ; -min_feedS = (INT *)Ysafe_calloc( numChansG + 1, sizeof(INT) ) ; -row_flagS = (INT *)Ysafe_calloc( numChansG + 1, sizeof(INT) ) ; -rowfeed_penaltyG = (INT *)Ysafe_malloc( ( numChansG + 1 ) * sizeof(INT) ) ; -est_min_ratioS = (INT *)Ysafe_malloc( numChansG * sizeof(INT) ) ; + DOUBLE ratio ; + INT net , row , toprow , botrow, maxdesire ; + DBOXPTR dimptr ; + PINBOXPTR ptr ; + + fd_estimateS = (DOUBLE *)Ysafe_calloc( numChansG + 1, sizeof(DOUBLE) ) ; + min_feedS = (INT *)Ysafe_calloc( numChansG + 1, sizeof(INT) ) ; + row_flagS = (INT *)Ysafe_calloc( numChansG + 1, sizeof(INT) ) ; + rowfeed_penaltyG = (INT *)Ysafe_malloc( ( numChansG + 1 ) * sizeof(INT) ) ; + memset(rowfeed_penaltyG, 0, ( numChansG + 1 ) * sizeof(INT) ); // FIXME: If not clearing, result is non-determinsitic. Figure out why + est_min_ratioS = (INT *)Ysafe_malloc( numChansG * sizeof(INT) ) ; -maxdesire = barrayG[1]->desire ; -for( row = 2 ; row <= numRowsG ; row++ ) { + maxdesire = barrayG[1]->desire ; + for( row = 2 ; row <= numRowsG ; row++ ) { if( maxdesire < barrayG[row]->desire ) { - maxdesire = barrayG[row]->desire ; + maxdesire = barrayG[row]->desire ; } -} + } -ratio = (DOUBLE)(maxdesire) / (DOUBLE)( barrayG[numRowsG]->bycenter - - barrayG[1]->bycenter + rowHeightG ) ; -ratio = 1.0 / ratio ; /* to fix Kai-Win's bug */ + ratio = (DOUBLE)(maxdesire) / (DOUBLE)( barrayG[numRowsG]->bycenter - + barrayG[1]->bycenter + rowHeightG ) ; + ratio = 1.0 / ratio ; /* to fix Kai-Win's bug */ -if( absolute_minimum_feedsG ) { + if( absolute_minimum_feedsG ) { if( ratio >= 1.0 ) { - chip_width_penaltyS = barrayG[numRowsG]->bycenter - - barrayG[1]->bycenter + rowHeightG ; + chip_width_penaltyS = barrayG[numRowsG]->bycenter - + barrayG[1]->bycenter + rowHeightG ; } else { - chip_width_penaltyS = maxdesire ; + chip_width_penaltyS = maxdesire ; } -} else { + } else { /* chip_width_penaltyS = 2.0 * (DOUBLE) rowHeightG ; */ chip_width_penaltyS = 6.9 * (DOUBLE) rowHeightG ; -} + } -if( !absolute_minimum_feedsG ) { + if( !absolute_minimum_feedsG ) { add_Lcorner_feedG = TRUE ; /* Carl */ for( row = 1 ; row <= numRowsG ; row++ ) { - if( FeedInRowG[row] == 0 ) { - add_Lcorner_feedG = FALSE ; - break ; - } + if( FeedInRowG[row] == 0 ) { + add_Lcorner_feedG = FALSE ; + break ; + } } /* Carl */ -} else { + } else { add_Lcorner_feedG = FALSE ; -} -for( net = 1 ; net <= numnetsG ; net++ ) { + } + for( net = 1 ; net <= numnetsG ; net++ ) { dimptr = netarrayG[net] ; if( !(dimptr->pins) ) { - continue ; + continue ; } switch( dimptr->numpins ) { - case 0 : - case 1 : - break ; - case 2 : - ptr = dimptr->pins ; - toprow = ptr->row ; - botrow = ptr->next->row ; - if( toprow > botrow ) { - for( row = botrow + 1 ; row < toprow ; row++ ) { - fd_estimateS[row]++ ; - min_feedS[row]++ ; - } - if( ABS( ptr->xpos - ptr->next->xpos ) >= - average_feed_sepG ) { - fd_estimateS[botrow] += 0.5 ; - fd_estimateS[toprow] += 0.5 ; - } - } else if( toprow < botrow ) { - for( row = toprow + 1 ; row < botrow ; row++ ) { - fd_estimateS[row]++ ; - min_feedS[row]++ ; - } - if( ABS( ptr->xpos - ptr->next->xpos ) >= - average_feed_sepG ) { - fd_estimateS[botrow] += 0.5 ; - fd_estimateS[toprow] += 0.5 ; - } - } - row_flagS[botrow] = 0 ; - row_flagS[toprow] = 0 ; - break ; - case 3 : - case 4 : - case 5 : - ptr = dimptr->pins ; - toprow = botrow = ptr->row ; - row_flagS[toprow] = 1 ; - for( ptr = ptr->next ; ptr ; ptr = ptr->next ) { - row = ptr->row ; - if( row < botrow ) { - botrow = row ; - } - if( row > toprow ) { - toprow = row ; - } - row_flagS[row] = 1 ; - } - for( row = botrow + 1 ; row < toprow ; row++ ) { - if( row_flagS[row] ) { - fd_estimateS[row]++ ; - row_flagS[row] = 0 ; - } else { - fd_estimateS[row] += 1.5 ; - min_feedS[row]++ ; - } - } - if( toprow > botrow ) { - fd_estimateS[botrow] += 0.5 ; - fd_estimateS[toprow] += 0.5 ; - } - row_flagS[botrow] = 0 ; - row_flagS[toprow] = 0 ; - break ; - default : - ptr = dimptr->pins ; - toprow = botrow = ptr->row ; - row_flagS[toprow] = 1 ; - for( ptr = ptr->next ; ptr ; ptr = ptr->next ) { - row = ptr->row ; - if( row < botrow ) { - botrow = row ; - } - if( row > toprow ) { - toprow = row ; - } - row_flagS[row] = 1 ; - } - for( row = botrow + 1 ; row < toprow ; row++ ) { - if( row_flagS[row] ) { - fd_estimateS[row]++ ; - row_flagS[row] = 0 ; - } else { - fd_estimateS[row] += 1.5 ; - min_feedS[row]++ ; - } - } - if( toprow > botrow ) { - fd_estimateS[botrow]++ ; - fd_estimateS[toprow]++ ; - } - row_flagS[botrow] = 0 ; - row_flagS[toprow] = 0 ; - break ; - } -} - -estimate_pass_thru_penalty( 1 , numRowsG ) ; - -} + case 0 : + case 1 : + break ; + case 2 : + ptr = dimptr->pins ; + toprow = ptr->row ; + botrow = ptr->next->row ; + if( toprow > botrow ) { + for( row = botrow + 1 ; row < toprow ; row++ ) { + fd_estimateS[row]++ ; + min_feedS[row]++ ; + } + if( ABS( ptr->xpos - ptr->next->xpos ) >= + average_feed_sepG ) { + fd_estimateS[botrow] += 0.5 ; + fd_estimateS[toprow] += 0.5 ; + } + } else if( toprow < botrow ) { + for( row = toprow + 1 ; row < botrow ; row++ ) { + fd_estimateS[row]++ ; + min_feedS[row]++ ; + } + if( ABS( ptr->xpos - ptr->next->xpos ) >= + average_feed_sepG ) { + fd_estimateS[botrow] += 0.5 ; + fd_estimateS[toprow] += 0.5 ; + } + } + row_flagS[botrow] = 0 ; + row_flagS[toprow] = 0 ; + break ; + case 3 : + case 4 : + case 5 : + ptr = dimptr->pins ; + toprow = botrow = ptr->row ; + row_flagS[toprow] = 1 ; + for( ptr = ptr->next ; ptr ; ptr = ptr->next ) { + row = ptr->row ; + if( row < botrow ) { + botrow = row ; + } + if( row > toprow ) { + toprow = row ; + } + row_flagS[row] = 1 ; + } + for( row = botrow + 1 ; row < toprow ; row++ ) { + if( row_flagS[row] ) { + fd_estimateS[row]++ ; + row_flagS[row] = 0 ; + } else { + fd_estimateS[row] += 1.5 ; + min_feedS[row]++ ; + } + } + if( toprow > botrow ) { + fd_estimateS[botrow] += 0.5 ; + fd_estimateS[toprow] += 0.5 ; + } + row_flagS[botrow] = 0 ; + row_flagS[toprow] = 0 ; + break ; + default : + ptr = dimptr->pins ; + toprow = botrow = ptr->row ; + row_flagS[toprow] = 1 ; + for( ptr = ptr->next ; ptr ; ptr = ptr->next ) { + row = ptr->row ; + if( row < botrow ) { + botrow = row ; + } + if( row > toprow ) { + toprow = row ; + } + row_flagS[row] = 1 ; + } + for( row = botrow + 1 ; row < toprow ; row++ ) { + if( row_flagS[row] ) { + fd_estimateS[row]++ ; + row_flagS[row] = 0 ; + } else { + fd_estimateS[row] += 1.5 ; + min_feedS[row]++ ; + } + } + if( toprow > botrow ) { + fd_estimateS[botrow]++ ; + fd_estimateS[toprow]++ ; + } + row_flagS[botrow] = 0 ; + row_flagS[toprow] = 0 ; + break ; + } + } + + estimate_pass_thru_penalty( 1 , numRowsG ) ; + +} + +void re_estimate_feed_penalty() +{ + + INT i , n , row , row_rite , excess_fd , *old_penalty ; + DOUBLE ratio , factor ; + FEED_DATA *feedptr ; + CBOXPTR cellptr ; -re_estimate_feed_penalty() -{ - -INT i , n , row , row_rite , excess_fd , *old_penalty ; -DOUBLE ratio , factor ; -FEED_DATA *feedptr ; -CBOXPTR cellptr ; - -old_penalty = (INT *)Ysafe_malloc( numChansG * sizeof(INT) ) ; -for( row = 1 ; row <= numRowsG ; row++ ) { + old_penalty = (INT *)Ysafe_malloc( numChansG * sizeof(INT) ) ; + for( row = 1 ; row <= numRowsG ; row++ ) { old_penalty[row] = rowfeed_penaltyG[row] ; feedptr = feedpptrG[row] ; n = 0 ; for( i = 1 ; i <= chan_node_noG ; i++ ) { - n += feedptr[i]->needed ; + n += feedptr[i]->needed ; } fd_estimateS[row] = n ; -} -estimate_pass_thru_penalty( 1 , numRowsG ) ; + } + estimate_pass_thru_penalty( 1 , numRowsG ) ; -if( !enough_built_in_feedG ) { + if( !enough_built_in_feedG ) { goto out ; -} -for( row = 1 ; row <= numRowsG ; row++ ) { + } + for( row = 1 ; row <= numRowsG ; row++ ) { rowfeed_penaltyG[row] = - ( 2 * old_penalty[row] + 3 * rowfeed_penaltyG[row] ) / 5 ; + ( 2 * old_penalty[row] + 3 * rowfeed_penaltyG[row] ) / 5 ; cellptr = carrayG[ pairArrayG[row][ pairArrayG[row][0] ] ] ; row_rite = cellptr->cxcenter + cellptr->tileptr->right ; if( fdWidthG > 0 ) { - excess_fd = fdcel_addedG[row] + 1 - - ( right_most_in_classG[ row_rite_classG[row] ] - row_rite ) / - fdWidthG; + excess_fd = fdcel_addedG[row] + 1 - + ( right_most_in_classG[ row_rite_classG[row] ] - row_rite ) / + fdWidthG; } else { - excess_fd = fdcel_addedG[row] + 1 - - ( right_most_in_classG[ row_rite_classG[row] ] - row_rite ) ; + excess_fd = fdcel_addedG[row] + 1 - + ( right_most_in_classG[ row_rite_classG[row] ] - row_rite ) ; } if( excess_fd <= 0 ) { - continue ; + continue ; } ratio = (DOUBLE)(fdcel_addedG[row]) / (DOUBLE)(FeedInRowG[row]) ; if( ratio <= 0.01 ) { - factor = 4 ; + factor = 4 ; } else if( ratio <= 0.03 ) { - factor = 8 ; + factor = 8 ; } else if( ratio <= 0.05 ) { - factor = 15 ; + factor = 15 ; } else if( ratio <= 0.08 ) { - factor = 25 ; + factor = 25 ; } else if( ratio <= 0.10 ) { - factor = 30 ; + factor = 30 ; } else if( ratio <= 0.20 ) { - factor = 40 ; + factor = 40 ; } else { - factor = 50 ; + factor = 50 ; } rowfeed_penaltyG[row] += factor * ratio * (DOUBLE)(rowHeightG) ; -} -/* -fp = TWOPEN("vcost.dat", "a", ABORT ) ; -fprintf(fp, " row newcost oldcost\n" ) ; -for( row = 1 ; row <= numRowsG ; row++ ) { - fprintf(fp," %3d %7d %7d\n", row, - rowfeed_penaltyG[row], old_penalty[row] ) ; -} -TWCLOSE(fp) ; -*/ + } + /* + fp = TWOPEN("vcost.dat", "a", ABORT ) ; + fprintf(fp, " row newcost oldcost\n" ) ; + for( row = 1 ; row <= numRowsG ; row++ ) { + fprintf(fp," %3d %7d %7d\n", row, + rowfeed_penaltyG[row], old_penalty[row] ) ; + } + TWCLOSE(fp) ; + */ out: -Ysafe_free( old_penalty ); + Ysafe_free( old_penalty ); } #ifdef Carl -estimate_pass_thru_penalty( row1 , row2 ) -INT row1 , row2 ; +void estimate_pass_thru_penalty(INT row1 , INT row2 ) { -INT row ; -DOUBLE ratio ; -if( row1 < 1 ) { + INT row ; + DOUBLE ratio ; + if( row1 < 1 ) { row1 = 1 ; -} -if( row2 > numRowsG ) { + } + if( row2 > numRowsG ) { row2 = numRowsG ; -} -ratio = (DOUBLE) implicit_feed_count / (DOUBLE) TotRegPins ; -if( ratio > 0.0 ) { + } + ratio = (DOUBLE) implicit_feed_count / (DOUBLE) TotRegPins ; + if( ratio > 0.0 ) { ratio += 0.1 ; -} -if( ratio > 1.0 ) { + } + if( ratio > 1.0 ) { ratio = 1.0 ; -} -for( row = row1 ; row <= row2 ; row++ ) { + } + for( row = row1 ; row <= row2 ; row++ ) { if( !absolute_minimum_feeds ) { - rowfeed_penaltyG[row] = (2.0 - ratio * 1.2) * rowHeightG ; + rowfeed_penaltyG[row] = (2.0 - ratio * 1.2) * rowHeightG ; } else { - rowfeed_penaltyG[row] = chip_width_penaltyS ; + rowfeed_penaltyG[row] = chip_width_penaltyS ; } -} + } } #else -estimate_pass_thru_penalty( row1 , row2 ) -INT row1 , row2 ; +void estimate_pass_thru_penalty(INT row1 , INT row2 ) { -INT row ; -DOUBLE actual , estimate , act_est_ratio ; -if( row1 < 1 ) { + INT row ; + DOUBLE actual , estimate , act_est_ratio ; + if( row1 < 1 ) { row1 = 1 ; -} -if( row2 > numRowsG ) { + } + if( row2 > numRowsG ) { row2 = numRowsG ; -} + } -for( row = row1 ; row <= row2 ; row++ ) { + for( row = row1 ; row <= row2 ; row++ ) { actual = FeedInRowG[row] ; estimate = fd_estimateS[row] ; if( actual > min_feedS[row] && !absolute_minimum_feedsG ) { - if( estimate > 0.0 ) { - act_est_ratio = actual / estimate ; - } else { - act_est_ratio = INT_MAX ; - /* fix by Carl 1/25/89 */ - } - if( act_est_ratio >= 4 ) { - rowfeed_penaltyG[row] = rowHeightG * 0.3 ; - } else if( act_est_ratio >= 1.0 ) { - rowfeed_penaltyG[row] = - ( 0.9 - 0.2 * ( act_est_ratio - 1.0 ) ) * rowHeightG ; - } else if( act_est_ratio <= 0.5 ) { - rowfeed_penaltyG[row] = 6.9 * rowHeightG ; - } else { - rowfeed_penaltyG[row] = - ( 0.9 + 12.0 * ( 1.0 - act_est_ratio ) ) * rowHeightG ; - } + if( estimate > 0.0 ) { + act_est_ratio = actual / estimate ; + } else { + act_est_ratio = INT_MAX ; + /* fix by Carl 1/25/89 */ + } + if( act_est_ratio >= 4 ) { + rowfeed_penaltyG[row] = rowHeightG * 0.3 ; + } else if( act_est_ratio >= 1.0 ) { + rowfeed_penaltyG[row] = + ( 0.9 - 0.2 * ( act_est_ratio - 1.0 ) ) * rowHeightG ; + } else if( act_est_ratio <= 0.5 ) { + rowfeed_penaltyG[row] = 6.9 * rowHeightG ; + } else { + rowfeed_penaltyG[row] = + ( 0.9 + 12.0 * ( 1.0 - act_est_ratio ) ) * rowHeightG ; + } } else { - rowfeed_penaltyG[row] = chip_width_penaltyS ; + rowfeed_penaltyG[row] = chip_width_penaltyS ; } -} + } } #endif -update_feedest( net ) -INT net ; +void update_feedest( net ) + INT net ; { -DBOXPTR dimptr ; -SEGBOXPTR seg ; -PINBOXPTR ptr ; -INT row , toprow , botrow , row1 , row2 ; + DBOXPTR dimptr ; + SEGBOXPTR seg ; + PINBOXPTR ptr ; + INT row , toprow , botrow , row1 , row2 ; -dimptr = netarrayG[net] ; -if( !(dimptr->pins) ) { - return ; -} -switch( dimptr->numpins ) { -case 0 : -case 1 : -case 2 : + dimptr = netarrayG[net] ; + if( !(dimptr->pins) ) { return ; -case 3 : -case 4 : -case 5 : - ptr = dimptr->pins ; - toprow = botrow = ptr->row ; - row_flagS[toprow] = 1 ; - for( ptr = ptr->next ; ptr ; ptr = ptr->next ) { - row = ptr->row ; - if( row < botrow ) { - botrow = row ; - } - if( row > toprow ) { - toprow = row ; - } - row_flagS[row] = 1 ; - } - for( row = botrow + 1 ; row < toprow ; row++ ) { - if( row_flagS[row] ) { - fd_estimateS[row]-- ; - row_flagS[row] = 0 ; - } else { - fd_estimateS[row] -= 1.5 ; - } - } - if( toprow > botrow ) { - fd_estimateS[botrow] -= 0.5 ; - fd_estimateS[toprow] -= 0.5 ; - } - row_flagS[botrow] = 0 ; - row_flagS[toprow] = 0 ; - break ; -default : - ptr = dimptr->pins ; - toprow = botrow = ptr->row ; - row_flagS[toprow] = 1 ; - for( ptr = ptr->next ; ptr ; ptr = ptr->next ) { - row = ptr->row ; - if( row < botrow ) { - botrow = row ; - } - if( row > toprow ) { - toprow = row ; - } - row_flagS[row] = 1 ; - } - for( row = botrow + 1 ; row < toprow ; row++ ) { - if( row_flagS[row] ) { - fd_estimateS[row]-- ; - row_flagS[row] = 0 ; - } else { - fd_estimateS[row] -= 1.5 ; - } - } - if( toprow > botrow ) { - fd_estimateS[botrow]-- ; - fd_estimateS[toprow]-- ; - } - row_flagS[botrow] = 0 ; - row_flagS[toprow] = 0 ; - break ; -} -for( seg = netsegHeadG[net]->next ; seg ; seg = seg->next ) { + } + switch( dimptr->numpins ) { + case 0 : + case 1 : + case 2 : + return ; + case 3 : + case 4 : + case 5 : + ptr = dimptr->pins ; + toprow = botrow = ptr->row ; + row_flagS[toprow] = 1 ; + for( ptr = ptr->next ; ptr ; ptr = ptr->next ) { + row = ptr->row ; + if( row < botrow ) { + botrow = row ; + } + if( row > toprow ) { + toprow = row ; + } + row_flagS[row] = 1 ; + } + for( row = botrow + 1 ; row < toprow ; row++ ) { + if( row_flagS[row] ) { + fd_estimateS[row]-- ; + row_flagS[row] = 0 ; + } else { + fd_estimateS[row] -= 1.5 ; + } + } + if( toprow > botrow ) { + fd_estimateS[botrow] -= 0.5 ; + fd_estimateS[toprow] -= 0.5 ; + } + row_flagS[botrow] = 0 ; + row_flagS[toprow] = 0 ; + break ; + default : + ptr = dimptr->pins ; + toprow = botrow = ptr->row ; + row_flagS[toprow] = 1 ; + for( ptr = ptr->next ; ptr ; ptr = ptr->next ) { + row = ptr->row ; + if( row < botrow ) { + botrow = row ; + } + if( row > toprow ) { + toprow = row ; + } + row_flagS[row] = 1 ; + } + for( row = botrow + 1 ; row < toprow ; row++ ) { + if( row_flagS[row] ) { + fd_estimateS[row]-- ; + row_flagS[row] = 0 ; + } else { + fd_estimateS[row] -= 1.5 ; + } + } + if( toprow > botrow ) { + fd_estimateS[botrow]-- ; + fd_estimateS[toprow]-- ; + } + row_flagS[botrow] = 0 ; + row_flagS[toprow] = 0 ; + break ; + } + for( seg = netsegHeadG[net]->next ; seg ; seg = seg->next ) { row1 = seg->pin1ptr->row ; row2 = seg->pin2ptr->row ; if( row1 == row2 ) { - if( ABS( seg->pin1ptr->pinloc - seg->pin2ptr->pinloc ) <= 1 ) { - continue ; - } else { - fd_estimateS[row1]++ ; - } + if( ABS( seg->pin1ptr->pinloc - seg->pin2ptr->pinloc ) <= 1 ) { + continue ; + } else { + fd_estimateS[row1]++ ; + } } else { - for( row = row1 + 1 ; row < row2 ; row++ ) { - fd_estimateS[row]++ ; - } - if( seg->pin1ptr->pinloc < NEITHER ) { - fd_estimateS[row1]++ ; - } - if( seg->pin2ptr->pinloc > NEITHER ) { - fd_estimateS[row2]++ ; - } - if( add_Lcorner_feedG && seg->switchvalue != nswLINE ) { - fd_estimateS[row1] += 0.5 ; - fd_estimateS[row2] += 0.5 ; - } + for( row = row1 + 1 ; row < row2 ; row++ ) { + fd_estimateS[row]++ ; + } + if( seg->pin1ptr->pinloc < NEITHER ) { + fd_estimateS[row1]++ ; + } + if( seg->pin2ptr->pinloc > NEITHER ) { + fd_estimateS[row2]++ ; + } + if( add_Lcorner_feedG && seg->switchvalue != nswLINE ) { + fd_estimateS[row1] += 0.5 ; + fd_estimateS[row2] += 0.5 ; + } } -} -for( ptr = steinerHeadG[net]->next; ptr ; ptr = ptr->next ) { + } + for( ptr = steinerHeadG[net]->next; ptr ; ptr = ptr->next ) { fd_estimateS[ ptr->row ]++ ; -} + } -estimate_pass_thru_penalty( botrow , toprow ) ; + estimate_pass_thru_penalty( botrow , toprow ) ; } -free_up_feedest_malloc() +void free_up_feedest_malloc() { -Ysafe_free( fd_estimateS ) ; -Ysafe_free( min_feedS ) ; -Ysafe_free( row_flagS ) ; -Ysafe_free( rowfeed_penaltyG ) ; -Ysafe_free( est_min_ratioS ) ; + Ysafe_free( fd_estimateS ) ; + Ysafe_free( min_feedS ) ; + Ysafe_free( row_flagS ) ; + Ysafe_free( rowfeed_penaltyG ) ; + Ysafe_free( est_min_ratioS ) ; } -update_segment_data( segptr ) -SEGBOXPTR segptr ; +void update_segment_data( segptr ) + SEGBOXPTR segptr ; { -PINBOXPTR ptr1 , ptr2 ; + PINBOXPTR ptr1 , ptr2 ; -ptr1 = segptr->pin1ptr ; -ptr2 = segptr->pin2ptr ; -segptr->flag = NEW ; -if( ptr1->row < ptr2->row ) { + ptr1 = segptr->pin1ptr ; + ptr2 = segptr->pin2ptr ; + segptr->flag = NEW ; + if( ptr1->row < ptr2->row ) { segptr->pin1ptr = ptr1 ; segptr->pin2ptr = ptr2 ; if( ABS( ptr1->xpos - ptr2->xpos ) >= average_feed_sepG ) { - segptr->switchvalue = swL_up ; + segptr->switchvalue = swL_up ; } else { - segptr->switchvalue = nswLINE ; + segptr->switchvalue = nswLINE ; } -} else if( ptr1->row > ptr2->row ) { + } else if( ptr1->row > ptr2->row ) { segptr->pin2ptr = ptr1 ; segptr->pin1ptr = ptr2 ; if( ABS( ptr1->xpos - ptr2->xpos ) >= average_feed_sepG ) { - segptr->switchvalue = swL_up ; + segptr->switchvalue = swL_up ; } else { - segptr->switchvalue = nswLINE ; + segptr->switchvalue = nswLINE ; } -} else if( (INT) ptr1->pinloc == BOTCELL && (INT) ptr2->pinloc == TOPCELL ) { + } else if( (INT) ptr1->pinloc == BOTCELL && (INT) ptr2->pinloc == TOPCELL ) { segptr->pin1ptr = ptr1 ; segptr->pin2ptr = ptr2 ; segptr->switchvalue = nswLINE ; -} else if( (INT) ptr1->pinloc == TOPCELL && (INT) ptr2->pinloc == BOTCELL ) { + } else if( (INT) ptr1->pinloc == TOPCELL && (INT) ptr2->pinloc == BOTCELL ) { segptr->pin1ptr = ptr2 ; segptr->pin2ptr = ptr1 ; segptr->switchvalue = nswLINE ; -} else if( ptr1->xpos <= ptr2->xpos ) { + } else if( ptr1->xpos <= ptr2->xpos ) { segptr->pin1ptr = ptr1 ; segptr->pin2ptr = ptr2 ; segptr->switchvalue = nswLINE ; -} else { + } else { segptr->pin1ptr = ptr2 ; segptr->pin2ptr = ptr1 ; segptr->switchvalue = nswLINE ; -} + } } PINBOXPTR makeSTpt( net , ptr1 , ptr2 ) -INT net ; -PINBOXPTR ptr1 , ptr2 ; + INT net ; + PINBOXPTR ptr1 , ptr2 ; { -PINBOXPTR ptr ; + PINBOXPTR ptr ; -ptr = (PINBOXPTR)Ysafe_malloc( sizeof(PINBOX) ) ; -ptr->xpos = ptr1->xpos ; -ptr->ypos = ptr2->ypos ; -ptr->terminal = 0 ; -if( ptr1->terminal == 0 ) { + ptr = (PINBOXPTR)Ysafe_malloc( sizeof(PINBOX) ) ; + ptr->xpos = ptr1->xpos ; + ptr->ypos = ptr2->ypos ; + ptr->terminal = 0 ; + if( ptr1->terminal == 0 ) { ptr->newx = ptr1->newx ; -} else { + } else { ptr->newx = ptr1->terminal ; -} - /* the 'newx' field is temporary used for storing the - y-direction terminal that steiner points refered to */ -ptr->row = ptr2->row ; -ptr->pinloc = NEITHER ; -ptr->newy = 3 * ptr->row ; -ptr->net = net ; -ptr->adjptr = (ADJASEGPTR)Ysafe_calloc( 1, sizeof(ADJASEG) ) ; -ptr->next = steinerHeadG[net]->next ; -steinerHeadG[net]->next = ptr ; -return( ptr ) ; + } + /* the 'newx' field is temporary used for storing the + y-direction terminal that steiner points refered to */ + ptr->row = ptr2->row ; + ptr->pinloc = NEITHER ; + ptr->newy = 3 * ptr->row ; + ptr->net = net ; + ptr->adjptr = (ADJASEGPTR)Ysafe_calloc( 1, sizeof(ADJASEG) ) ; + ptr->next = steinerHeadG[net]->next ; + steinerHeadG[net]->next = ptr ; + return( ptr ) ; } SEGBOXPTR makeseg( lowptr , highptr ) -PINBOXPTR lowptr , highptr ; + PINBOXPTR lowptr , highptr ; { -ADJASEG *adj1, *adj2 ; -SEGBOXPTR segptr ; + ADJASEG *adj1, *adj2 ; + SEGBOXPTR segptr ; -segptr = ( SEGBOXPTR )Ysafe_malloc( sizeof(SEGBOX) ) ; -if( lowptr->row < highptr->row ) { + segptr = ( SEGBOXPTR )Ysafe_malloc( sizeof(SEGBOX) ) ; + if( lowptr->row < highptr->row ) { segptr->pin1ptr = lowptr ; segptr->pin2ptr = highptr ; segptr->switchvalue = swL_up ; -} else if( lowptr->row > highptr->row ) { + } else if( lowptr->row > highptr->row ) { segptr->pin2ptr = lowptr ; segptr->pin1ptr = highptr ; segptr->switchvalue = swL_up ; -} else if( (INT) lowptr->pinloc == BOTCELL && (INT) highptr->pinloc == TOPCELL ) { + } else if( (INT) lowptr->pinloc == BOTCELL && (INT) highptr->pinloc == TOPCELL ) { segptr->pin1ptr = lowptr ; segptr->pin2ptr = highptr ; segptr->switchvalue = swL_up ; -} else if( (INT) lowptr->pinloc == TOPCELL && (INT) highptr->pinloc == BOTCELL ) { + } else if( (INT) lowptr->pinloc == TOPCELL && (INT) highptr->pinloc == BOTCELL ) { segptr->pin1ptr = highptr ; segptr->pin2ptr = lowptr ; segptr->switchvalue = swL_up ; -} else if( lowptr->xpos < highptr->xpos ) { + } else if( lowptr->xpos < highptr->xpos ) { segptr->pin1ptr = lowptr ; segptr->pin2ptr = highptr ; segptr->switchvalue = nswLINE ; -} else { + } else { segptr->pin2ptr = lowptr ; segptr->pin1ptr = highptr ; segptr->switchvalue = nswLINE ; -} -adj1 = (ADJASEGPTR)Ysafe_calloc( 1, sizeof(ADJASEG) ) ; -adj2 = (ADJASEGPTR)Ysafe_calloc( 1, sizeof(ADJASEG) ) ; -adj1->segptr = segptr ; -adj2->segptr = segptr ; -adj1->next = lowptr->adjptr->next ; -adj2->next = highptr->adjptr->next ; - lowptr->adjptr->next = adj1 ; -highptr->adjptr->next = adj2 ; -segptr->next = netsegHeadG[lowptr->net]->next ; -netsegHeadG[lowptr->net]->next = segptr ; -return( segptr ) ; + } + adj1 = (ADJASEGPTR)Ysafe_calloc( 1, sizeof(ADJASEG) ) ; + adj2 = (ADJASEGPTR)Ysafe_calloc( 1, sizeof(ADJASEG) ) ; + adj1->segptr = segptr ; + adj2->segptr = segptr ; + adj1->next = lowptr->adjptr->next ; + adj2->next = highptr->adjptr->next ; + lowptr->adjptr->next = adj1 ; + highptr->adjptr->next = adj2 ; + segptr->next = netsegHeadG[lowptr->net]->next ; + netsegHeadG[lowptr->net]->next = segptr ; + return( segptr ) ; } -dbg_cost() -{ -FILE *fp ; -INT row ; -DOUBLE cost, ratio ; - -fp = TWOPEN("vcost.dat", "w", ABORT ) ; -fprintf(fp, " rowHeightG = %d\n", rowHeightG ) ; -fprintf(fp, " row cost actual estimate ratio\n" ) ; -for( row = 1 ; row <= numRowsG ; row++ ) { +void dbg_cost() +{ + FILE *fp ; + INT row ; + DOUBLE cost, ratio ; + + fp = TWOPEN("vcost.dat", "w", ABORT ) ; + fprintf(fp, " rowHeightG = %d\n", rowHeightG ) ; + fprintf(fp, " row cost actual estimate ratio\n" ) ; + for( row = 1 ; row <= numRowsG ; row++ ) { cost = (DOUBLE)(rowfeed_penaltyG[row]) / (DOUBLE)(rowHeightG) ; ratio = (DOUBLE)(FeedInRowG[row]) / fd_estimateS[row] ; fprintf(fp, " %3d %5.2f %6d %8.2f %8.2f\n", row, cost, - FeedInRowG[row], fd_estimateS[row], ratio ) ; -} -TWCLOSE(fp) ; + FeedInRowG[row], fd_estimateS[row], ratio ) ; + } + TWCLOSE(fp) ; } -dbx_fdpen() +void dbx_fdpen() { -FILE *fp ; -FEED_DATA *feedptr ; -INT row , i , s ; + FILE *fp ; + FEED_DATA *feedptr ; + INT row , i , s ; -fp = TWOPEN("pen.dat" , "w", ABORT ) ; -fprintf(fp," row min_feedSS fd_estimateS act_feed needed\n" ) ; -for( row = 1 ; row <= numRowsG ; row++ ) { + fp = TWOPEN("pen.dat" , "w", ABORT ) ; + fprintf(fp," row min_feedSS fd_estimateS act_feed needed\n" ) ; + for( row = 1 ; row <= numRowsG ; row++ ) { feedptr = feedpptrG[row] ; s = 0 ; for( i = 1 ; i <= chan_node_noG ; i++ ) { - s += feedptr[i]->needed ; + s += feedptr[i]->needed ; } fprintf(fp," %3d %8d %8d %8d %6d\n", row, min_feedS[row], - (INT)fd_estimateS[row] , FeedInRowG[row] , s ) ; -} -TWCLOSE(fp) ; + (INT)fd_estimateS[row] , FeedInRowG[row] , s ) ; + } + TWCLOSE(fp) ; } diff -Nru graywolf-0.1.5/src/twsc/findcost.c graywolf-0.1.6/src/twsc/findcost.c --- graywolf-0.1.5/src/twsc/findcost.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/findcost.c 2018-08-11 21:48:56.000000000 +0000 @@ -58,11 +58,6 @@ Thu Sep 19 14:15:51 EDT 1991 - added equal width cell capability. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) findcost.c (Yale) version 4.18 4/2/92" ; -#endif -#endif #define EXTRA_BIN 0.50 #define MAXNUMPINS 100 /* WPS */ @@ -92,10 +87,13 @@ static INT iwirexS ; static INT iwireyS ; static INT print_pinS = 0 ; -static spread_equal_cells(); -static spread_cells(); +static void spread_equal_cells(); +static void spread_cells(); + +void create_cell(); +void find_net_sizes(); -findcost() +INT findcost() { INT block , bin ; FILE *fp ; @@ -713,7 +711,7 @@ return( cost ) ; } /* end findcost */ -static spread_equal_cells() +static void spread_equal_cells() { FILE *tp ; @@ -806,7 +804,7 @@ -static spread_cells() +static void spread_cells() { INT bin, cell ; @@ -862,7 +860,7 @@ -create_cell( ) +void create_cell( ) { FILE *fpr ; @@ -934,7 +932,7 @@ -find_net_sizes() +void find_net_sizes() { PINBOXPTR netptr ; @@ -999,12 +997,12 @@ return ; } -get_max_pin() +INT get_max_pin() { return( maxpinS ) ; } /* end get_max_pin */ -set_print_pin( pins ) +void set_print_pin( pins ) INT pins ; { print_pinS = pins ; diff -Nru graywolf-0.1.5/src/twsc/findcostf.c graywolf-0.1.6/src/twsc/findcostf.c --- graywolf-0.1.5/src/twsc/findcostf.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/findcostf.c 2018-08-11 21:48:56.000000000 +0000 @@ -52,11 +52,6 @@ Wed Sep 11 11:18:19 CDT 1991 - modified for new global routing algorith. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) findcostf.c (Yale) version 4.18 4/2/92" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -82,7 +77,7 @@ INT recompute_wirecost() ; INT recompute_timecost() ; -findcostf() +INT findcostf() { TIBOXPTR tileptr1 ; CBOXPTR cellptr1 ; @@ -330,7 +325,7 @@ -install_clusters() +void install_clusters() { INT row , n , i , bin , i_error , delta_bin , length_in_row , cell ; @@ -432,7 +427,7 @@ -place_clusters() +void place_clusters() { INT bin , cell , row , c , count ; diff -Nru graywolf-0.1.5/src/twsc/findrcost.c graywolf-0.1.6/src/twsc/findrcost.c --- graywolf-0.1.5/src/twsc/findrcost.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/findrcost.c 2018-08-11 21:48:56.000000000 +0000 @@ -51,11 +51,6 @@ REVISIONS: Sat Dec 15 22:08:21 EST 1990 - modified pinloc values so that it will always be positive. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) findrcost.c (Yale) version 4.6 12/15/90" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -64,7 +59,12 @@ static INT cedge_binwidthS ; static INT num_edgebinS ; -findrcost() +INT facing_cellheight( INT pin , INT row , INT pinloc , INT status ); +void initial_tracks(SEGBOXPTR segptr ); +void set_cedgebin(); +void reset_track(); + +void findrcost() { SEGBOXPTR segptr ; @@ -136,8 +136,7 @@ } } -initial_tracks( segptr ) -SEGBOXPTR segptr ; +void initial_tracks(SEGBOXPTR segptr ) { INT x1 , x2 , pin1 , pin2 ; @@ -200,7 +199,7 @@ /* the set_cedgebin() , reset_track , facing_cellheight() function would be used only when the cells are in uneven height */ -set_cedgebin() +void set_cedgebin() { CBOXPTR cellptr ; @@ -248,7 +247,7 @@ } -reset_track() +void reset_track() { CBOXPTR cellptr ; @@ -292,8 +291,7 @@ } -facing_cellheight( pin , row , pinloc , status ) -INT pin, row , pinloc , status ; +INT facing_cellheight( INT pin , INT row , INT pinloc , INT status ) { CBOXPTR cellptr ; @@ -360,7 +358,7 @@ } } -fcellheight( pin , fcell , status ) +INT fcellheight( pin , fcell , status ) INT pin , *fcell , status ; { diff -Nru graywolf-0.1.5/src/twsc/findunlap.c graywolf-0.1.6/src/twsc/findunlap.c --- graywolf-0.1.5/src/twsc/findunlap.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/findunlap.c 2018-08-11 21:48:56.000000000 +0000 @@ -59,11 +59,6 @@ Wed Sep 11 11:19:25 CDT 1991 - modified for new global router. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) findunlap.c (Yale) version 4.14 4/2/92" ; -#endif -#endif #include "standard.h" @@ -74,6 +69,11 @@ #define PICK_INT(l,u) (((l)<(u)) ? ((RAND % ((u)-(l)+1))+(l)) : (l)) +INT find_shortest_row(INT long_row ); +INT row_cost(INT long_row , INT short_row , INT width ); +void find_last_6_moveable_cells( INT row, INT *cell1, INT *cell2, INT *cell3, INT *cell4, INT *cell5, INT *cell6); +void determine_unequal_rows(INT *short_row, INT *long_row ); + /* globals */ INT largest_delta_row_lenG ; extern INT **pairArrayG ; @@ -88,7 +88,7 @@ static INT *row_lengthS ; static BOOL first_passS = TRUE ; -findunlap(flag) +void findunlap(flag) INT flag ; { @@ -372,7 +372,7 @@ -even_the_rows(flag,even_the_rows_max) +void even_the_rows(flag,even_the_rows_max) INT flag ; BOOL even_the_rows_max ; { @@ -580,7 +580,7 @@ -gate_arrayG_even_the_rows(flag) +void gate_arrayG_even_the_rows(flag) INT flag ; { @@ -809,8 +809,7 @@ -row_cost( long_row , short_row , width ) -INT long_row , short_row , width ; +INT row_cost(INT long_row , INT short_row , INT width ) { INT cost ; @@ -822,9 +821,7 @@ -find_last_6_moveable_cells( row, cell1, cell2, cell3, cell4, cell5, cell6) -INT row ; -INT *cell1 , *cell2 , *cell3 , *cell4 , *cell5 , *cell6 ; +void find_last_6_moveable_cells( INT row, INT *cell1, INT *cell2, INT *cell3, INT *cell4, INT *cell5, INT *cell6) { INT i ; @@ -924,7 +921,7 @@ -find_longest_row() +INT find_longest_row() { INT row ; INT num_trys ; @@ -962,8 +959,7 @@ */ -find_shortest_row( long_row ) -INT long_row ; +INT find_shortest_row(INT long_row ) { INT row ; INT short_row_length ; @@ -991,8 +987,7 @@ } -determine_unequal_rows( short_row, long_row ) -INT *short_row, *long_row ; +void determine_unequal_rows(INT *short_row, INT *long_row ) { INT row ; INT short_row_length, long_row_length ; @@ -1016,7 +1011,7 @@ -even_the_rows_2( iteration ) +void even_the_rows_2( iteration ) INT iteration ; { @@ -1255,7 +1250,7 @@ -check_row_length() +INT check_row_length() { INT longest , row , shortest ; @@ -1302,7 +1297,7 @@ -findunlap2() +void findunlap2() { CBOXPTR cellptr ; diff -Nru graywolf-0.1.5/src/twsc/gateswap.c graywolf-0.1.6/src/twsc/gateswap.c --- graywolf-0.1.5/src/twsc/gateswap.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/gateswap.c 2018-08-11 21:48:56.000000000 +0000 @@ -48,11 +48,6 @@ txpos fields. Needed to pass the beginning of the cell pin listx instead of pina and pinb. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) gateswap.c (Yale) version 4.6 2/23/92" ; -#endif -#endif #include #include "ucxxglb.h" @@ -60,9 +55,9 @@ #include #include "readnets.h" -gate_swap( between_two_cells, sgidxa, sgidxb ) -INT between_two_cells ; -INT sgidxa, sgidxb ; +void adjust_paths_on_cell(INT cell); + +int gate_swap(INT between_two_cells, INT sgidxa, INT sgidxb ) { CBOXPTR cell1ptr , cell2ptr ; @@ -283,8 +278,7 @@ -adjust_paths_on_cell( cell ) -INT cell ; +void adjust_paths_on_cell( INT cell ) { INT net_number ; diff -Nru graywolf-0.1.5/src/twsc/globe.c graywolf-0.1.6/src/twsc/globe.c --- graywolf-0.1.5/src/twsc/globe.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/globe.c 2018-08-11 21:48:56.000000000 +0000 @@ -81,11 +81,6 @@ Tue May 12 22:23:31 EDT 1992 - fixed problem with orientation movement and added placement_improve switch. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) globe.c (Yale) version 4.24 5/12/92" ; -#endif -#endif #define GLOBE_VARS @@ -102,6 +97,8 @@ #define CARL_NEW #define PICK_INT(l,u) (((l)<(u)) ? ((RAND % ((u)-(l)+1))+(l)) : (l)) +INT cell_rotate(INT row , INT index ); + /* global variables */ BOOL connectFlagG ; @@ -111,6 +108,18 @@ static LONG swap_cost( P1(BOOL perim_flag ) ) ; +void free_static_in_globe(); +void preFeedAssgn(); +void FeedAssgn(INT row ); +void row_seg_intersect(PINBOXPTR ptr1 , PINBOXPTR ptr2 , SEGBOXPTR segptr ); +void copy_workerS_field(FEED_SEG_PTR aptr, FEED_SEG_PTR bptr ); +void assgn_impin(IPBOXPTR imptr , FEED_SEG_PTR fsptr , int row ); +void relax_padPins_pinloc(); +void relax_unequiv_pinloc(); +void elim_unused_feedsSC(); +void rebuild_nextpin(); +void rebuild_cell_paths(); + /* static variables */ static INT *wk_headS , max_feed_in_a_rowS ; static INT *L_jogS ; @@ -119,7 +128,7 @@ static LONG global_wire_lengthS ; static INT swap_limitS ; -globe() +int globe() { INT row , net , cost , last_cost , swaps , found , total_final_cost ; @@ -306,13 +315,13 @@ } -globe_free_up() +void globe_free_up() { netgraph_free_up(); } -preFeedAssgn() +void preFeedAssgn() { SEGBOXPTR segptr , nextptr ; @@ -346,7 +355,7 @@ } -free_static_in_globe() +void free_static_in_globe() { INT i ; @@ -362,8 +371,7 @@ #ifdef CARL_NEW -FeedAssgn( row ) -INT row ; +void FeedAssgn(INT row ) { PINBOXPTR netptr , ptr1 , ptr2 ; @@ -713,8 +721,7 @@ } #else -FeedAssgn( row ) -INT row ; +void FeedAssgn(INT row ) { PINBOXPTR netptr , ptr1 , ptr2 ; @@ -890,9 +897,7 @@ #endif -row_seg_intersect( ptr1 , ptr2 , segptr ) -PINBOXPTR ptr1 , ptr2 ; -SEGBOXPTR segptr ; +void row_seg_intersect(PINBOXPTR ptr1 , PINBOXPTR ptr2 , SEGBOXPTR segptr ) { INT i ; @@ -917,8 +922,7 @@ } -copy_workerS_field( aptr, bptr ) -FEED_SEG_PTR aptr, bptr ; +void copy_workerS_field(FEED_SEG_PTR aptr, FEED_SEG_PTR bptr ) { aptr->netptr = bptr->netptr ; aptr->refer = bptr->refer ; @@ -927,9 +931,7 @@ #ifdef CARL_NEW -assgn_impin( imptr , fsptr , row ) -IPBOXPTR imptr ; -FEED_SEG_PTR fsptr ; +void assgn_impin(IPBOXPTR imptr , FEED_SEG_PTR fsptr , int row ) { INT net ; @@ -997,9 +999,7 @@ } } #else -assgn_impin( imptr , fsptr , row ) -IPBOXPTR imptr ; -FEED_SEG_PTR fsptr ; +void assgn_impin(IPBOXPTR imptr , FEED_SEG_PTR fsptr , int row ) { INT net ; @@ -1045,7 +1045,7 @@ } -local_Assgn( row , node ) +void local_Assgn( row , node ) INT row , node ; { @@ -1160,7 +1160,7 @@ -unequiv_pin_pre_processing() +void unequiv_pin_pre_processing() { DBOXPTR dimptr ; PINBOXPTR ptr ; @@ -1217,7 +1217,7 @@ } -relax_padPins_pinloc() +void relax_padPins_pinloc() { INT i ; PINBOXPTR pinptr ; @@ -1234,7 +1234,7 @@ } -relax_unequiv_pinloc() +void relax_unequiv_pinloc() { DBOXPTR dimptr ; PINBOXPTR ptr ; @@ -1256,7 +1256,7 @@ } -check_unequiv_connectivity() +int check_unequiv_connectivity() { INT net, channel, correctness ; ADJASEG *adj ; @@ -1406,7 +1406,7 @@ -improve_place_sequential( row , index ) +int improve_place_sequential( row , index ) INT row , index ; { @@ -1620,8 +1620,7 @@ } -cell_rotate( row , index ) -INT row , index ; +INT cell_rotate(INT row , INT index ) { INT cell, swap ; @@ -1776,7 +1775,7 @@ } } /* end cell_rotate() */ -elim_unused_feedsSC() +void elim_unused_feedsSC() { CBOXPTR ptr , cellptr , first_cptr , last_cptr ; @@ -1872,7 +1871,7 @@ return ; } -rebuild_nextpin() +void rebuild_nextpin() { INT net, cell ; PINBOXPTR netptr , cnetptr ; @@ -1905,7 +1904,7 @@ } } /* end rebuild_nextpin */ -rebuild_cell_paths() +void rebuild_cell_paths() { INT i ; CBOXPTR ptr ; diff -Nru graywolf-0.1.5/src/twsc/globroute.c graywolf-0.1.6/src/twsc/globroute.c --- graywolf-0.1.5/src/twsc/globroute.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/globroute.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,11 +49,6 @@ REVISIONS: Sat Dec 15 22:08:21 EST 1990 - modified pinloc values so that it will always be positive. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) globroute.c (Yale) version 4.5 12/15/90" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -62,10 +57,12 @@ /* global variables */ extern INT Max_numPinsG ; +void process_cross(SEGBOXPTR segptr, INT status); + #define TOP 1 #define BOT 0 -globroute() +void globroute() { INT flips , attempts , net ; @@ -159,9 +156,7 @@ return ; } -process_cross( segptr , status ) -INT status ; -SEGBOXPTR segptr ; +void process_cross(SEGBOXPTR segptr, INT status ) { INT x1 , x2 ; diff -Nru graywolf-0.1.5/src/twsc/graphics.c graywolf-0.1.6/src/twsc/graphics.c --- graywolf-0.1.5/src/twsc/graphics.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/graphics.c 2018-08-11 21:48:56.000000000 +0000 @@ -54,9 +54,6 @@ Tue May 7 00:09:43 EDT 1991 - added TWsetFrame initialization and draw orientation markers. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) graphics.c version 4.21 5/15/92" ; -#endif #include "standard.h" #include "main.h" @@ -115,11 +112,16 @@ static INT pinsizeS ; /* size of the pin */ -static draw_fs(); +static void draw_fs(); extern VOID draw_a_cell( INT ); -extern INT draw_the_data() ; +extern void draw_the_data() ; +void graphics_dump(); +void reset_heat_index(); +void closegraphics(); + +void setGraphicWindow(); -initGraphics( argc, argv, windowId ) +void initGraphics( argc, argv, windowId ) INT argc ; char *argv[] ; INT windowId ; @@ -149,7 +151,7 @@ if( windowId ){ /* init windows as a parasite */ if(!(TWinitParasite(argc,argv,TWnumcolors(),TWstdcolors(), - FALSE,menuS, draw_the_data, windowId ))){ + FALSE,menuS, (INT (*)()) draw_the_data, windowId ))){ M(ERRMSG,"initGraphics","Aborting graphics."); doGraphicsG = FALSE ; avoidDump = TRUE ; @@ -158,7 +160,7 @@ } else { /* init window as a master */ if(!(TWinitGraphics(argc,argv,TWnumcolors(),TWstdcolors(),FALSE, - menuS,draw_the_data ))){ + menuS, (INT (*)()) draw_the_data ))){ M(ERRMSG,"initGraphics","Aborting graphics."); doGraphicsG = FALSE ; avoidDump = TRUE ; @@ -180,7 +182,7 @@ } /* end initGraphics */ -init_heat_index() +void init_heat_index() { GRAPHICSABORT ; @@ -191,7 +193,7 @@ initS = TRUE ; } /* end init_heat_index */ -expand_heat_index() +void expand_heat_index() { INT oldnum, i; @@ -209,7 +211,7 @@ } } /* end expand_heat_index */ -setGraphicWindow() +void setGraphicWindow() { INT expand ; INT minx ; @@ -247,7 +249,7 @@ } /* end setGraphicWindow */ /* heart of the graphic syskem processes user input */ -process_graphics() +void process_graphics() { INT x, y ; /* coordinates from pointer */ @@ -419,7 +421,7 @@ /* the graphics program can draw the results at each desired */ /* timestep. */ -INT draw_the_data() +void draw_the_data() { INT i ; @@ -597,7 +599,7 @@ } /* end draw a cell */ -static draw_fs( cptr ) +static void draw_fs( cptr ) CBOXPTR cptr ; { INT x[10], y[10] ; /* only 10 points to an F */ @@ -638,7 +640,7 @@ TWdrawArb( 0, FCOLOR, NIL(char *) ) ; } /* end draw_fs */ -erase_a_cell( cell, x, y ) +void erase_a_cell( cell, x, y ) INT cell ; INT x, y ; { @@ -676,7 +678,7 @@ /* dumps the data to a file for future study */ -graphics_dump() +void graphics_dump() { /* now change mode to dump to file */ TWsetMode(1) ; @@ -687,7 +689,7 @@ } /* see if uses wishes an interrupt otherwise just draw the data */ -check_graphics( drawFlag ) +void check_graphics( drawFlag ) BOOL drawFlag ; { if( doGraphicsG ){ @@ -700,7 +702,7 @@ } } /* end check_graphics */ -graphics_cell_update( cell ) +void graphics_cell_update( cell ) INT cell ; { GRAPHICSABORT ; @@ -714,7 +716,7 @@ draw_a_cell( cell ) ; } /* end graphics_cell_update */ -graphics_cell_attempt( cell ) +void graphics_cell_attempt( cell ) INT cell ; { GRAPHICSABORT ; @@ -723,7 +725,7 @@ heat_attemptS[cell]++ ; } /* end graphics_cell_attempt */ -reset_heat_index() +void reset_heat_index() { INT i ; /* counter */ @@ -734,7 +736,7 @@ } } /* end reset_heat_index */ -set_update( flag ) +void set_update( flag ) BOOL flag ; { updateS = flag ; @@ -743,7 +745,7 @@ #endif /* NOGRAPHICS */ /* close graphics window on fault */ -closegraphics( ) +void closegraphics( ) { if( doGraphicsG ){ G( TWcloseGraphics() ) ; diff -Nru graywolf-0.1.5/src/twsc/main.c graywolf-0.1.6/src/twsc/main.c --- graywolf-0.1.5/src/twsc/main.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/main.c 2018-08-11 21:48:56.000000000 +0000 @@ -83,9 +83,6 @@ Thu Nov 7 23:03:57 EST 1991 - fixed problem with picking best global route criteria and added new row evener. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) main.c (Yale) version 4.38 5/15/92" ; -#endif #define MAIN_VARS #include "standard.h" @@ -132,6 +129,8 @@ extern INT largest_delta_row_lenG ; extern INT total_row_lengthG ; +extern void readnets(FILE* fp); + /* static variables */ static INT routing_loopS ; static INT *save_cell_xS ; @@ -145,41 +144,43 @@ static INT num_feeds_addedS ;/* number of feeds added on best iteration */ static DOUBLE ave_row_sepS ; /* the row separation for a run */ +void install_swap_pass_thrus(PINBOXPTR netptr); +void incorporate_ECOs(); +void syntax(); +void init_utemp(); -main( argc , argv ) -INT argc ; -char *argv[] ; +int main(int argc , char *argv[]) { -FILE *fp ; -DOUBLE quality_value(); -char filename[LRECL] ; -INT ll, rr, bb, tt ; -INT bdxlen , bdylen ; -INT block ; -INT yaleIntro() ; -INT cx, cy, cl, cr, cb, ct, cell ; -char *ptr ; -char *Ystrclone() ; -BOOL debug ; -BOOL parasite ; -BOOL windowId ; -BOOL verbose ; -INT arg_count ; -char *Ygetenv() ; - -/* ********************** start initialization *********************** */ -/* start up cleanup handler */ -YINITCLEANUP( argv[0], NULL, MAYBEDUMP ) ; + FILE *fp ; + DOUBLE quality_value(); + char filename[LRECL] ; + INT ll, rr, bb, tt ; + INT bdxlen , bdylen ; + INT block ; + INT yaleIntro() ; + INT cx, cy, cl, cr, cb, ct, cell ; + char *ptr ; + char *Ystrclone() ; + BOOL debug ; + BOOL parasite ; + BOOL windowId ; + BOOL verbose ; + INT arg_count ; + char *Ygetenv() ; + + /* ********************** start initialization *********************** */ + /* start up cleanup handler */ + YINITCLEANUP( argv[0], NULL, MAYBEDUMP ) ; -Yinit_memsize( EXPECTEDMEMORY ) ; + Yinit_memsize( EXPECTEDMEMORY ) ; -USER_INITIALIZATION() ; + USER_INITIALIZATION() ; -if( argc < 2 || argc > 4 ){ + if( argc < 2 || argc > 4 ){ syntax() ; -} else { + } else { debug = FALSE ; parasite = FALSE ; verbose = FALSE ; @@ -191,150 +192,150 @@ #endif /* NOGRAPHICS */ arg_count = 1 ; if( *argv[1] == '-' ){ - for( ptr = ++argv[1]; *ptr; ptr++ ){ - switch( *ptr ){ - case 'd': - debug = TRUE ; - break ; - case 'n': - doGraphicsG = FALSE ; - break ; - case 'v': - verbose = TRUE ; - break ; - case 'w': - parasite = TRUE ; - break ; - default: - sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; - M(ERRMSG,"main",YmsgG); - syntax() ; - } - } - YdebugMemory( debug ) ; - - cktNameG = Ystrclone( argv[++arg_count] ); - - /* now tell the user what he picked */ - M(MSG,NULL,"\n\nTimberWolfSC switches:\n" ) ; - if( debug ){ - YsetDebug( TRUE ) ; - M(MSG,NULL,"\tdebug on\n" ) ; - } - if( doGraphicsG ){ - M(MSG,NULL,"\tGraphics mode on\n" ) ; - } else { - M(MSG,NULL,"\tGraphics mode off\n" ) ; - } - if( parasite ){ - M(MSG,NULL,"\tTimberWolfSC will inherit window\n" ) ; - /* look for windowid */ - if(argc != 4){ - M(ERRMSG,"main","Need to specify windowID\n" ) ; - syntax() ; - - } else { - G( windowId = atoi( argv[++arg_count] ) ) ; - } - } - if( verbose ){ - M(MSG,NULL,"\tVerbose mode on\n" ) ; - Ymessage_mode( M_VERBOSE ) ; - } - M(MSG,NULL,"\n" ) ; + for( ptr = ++argv[1]; *ptr; ptr++ ){ + switch( *ptr ){ + case 'd': + debug = TRUE ; + break ; + case 'n': + doGraphicsG = FALSE ; + break ; + case 'v': + verbose = TRUE ; + break ; + case 'w': + parasite = TRUE ; + break ; + default: + sprintf( YmsgG,"Unknown option:%c\n", *ptr ) ; + M(ERRMSG,"main",YmsgG); + syntax() ; + } + } + YdebugMemory( debug ) ; + + cktNameG = Ystrclone( argv[++arg_count] ); + + /* now tell the user what he picked */ + M(MSG,NULL,"\n\nTimberWolfSC switches:\n" ) ; + if( debug ){ + YsetDebug( TRUE ) ; + M(MSG,NULL,"\tdebug on\n" ) ; + } + if( doGraphicsG ){ + M(MSG,NULL,"\tGraphics mode on\n" ) ; + } else { + M(MSG,NULL,"\tGraphics mode off\n" ) ; + } + if( parasite ){ + M(MSG,NULL,"\tTimberWolfSC will inherit window\n" ) ; + /* look for windowid */ + if(argc != 4){ + M(ERRMSG,"main","Need to specify windowID\n" ) ; + syntax() ; + + } else { + G( windowId = atoi( argv[++arg_count] ) ) ; + } + } + if( verbose ){ + M(MSG,NULL,"\tVerbose mode on\n" ) ; + Ymessage_mode( M_VERBOSE ) ; + } + M(MSG,NULL,"\n" ) ; } else if( argc == 2 ){ - /* order is important here */ - YdebugMemory( FALSE ) ; - cktNameG = Ystrclone( argv[1] ); + /* order is important here */ + YdebugMemory( FALSE ) ; + cktNameG = Ystrclone( argv[1] ); } else { - syntax() ; - } -} -sprintf( filename , "%s.out" , cktNameG ) ; -fpoG = TWOPEN( filename, "w", ABORT ) ; -Ymessage_init( fpoG ) ; /* send all the messages to a file normally */ -YinitProgram( "TimberWolfSC", "v6.0", yaleIntro ); -/* ********************** end initialization ************************* */ - -readParFile(); - -/* check to see if twdir is set so we can run SGGR */ -if( SGGRG ){ - if( !(twdirS = TWFLOWDIR)){ - M( ERRMSG,main,"TWDIR environment variable not set.\n"); - M( ERRMSG,NULL,"Please set it to TimberWolf root directory\n"); - M( ERRMSG,NULL,"SGGR cannot automatically be run after annealing\n"); + syntax() ; } -} -G( initGraphics( argc, argv, windowId ) ) ; - -Yset_random_seed( (INT) randomSeedG ) ; -fprintf( fpoG, "\nThe random number generator seed is: %u\n\n\n", - randomSeedG ) ; - -/* - get a pointer to blockfile -*/ -sprintf( filename , "%s.blk" , cktNameG ) ; -fp = TWOPEN( filename , "r" , ABORT ) ; -readblck( fp ) ; -TWCLOSE( fp ) ; + } + sprintf( filename , "%s.out" , cktNameG ) ; + fpoG = TWOPEN( filename, "w", ABORT ) ; + Ymessage_init( fpoG ) ; /* send all the messages to a file normally */ + YinitProgram( "TimberWolfSC", "v6.0", yaleIntro ); + /* ********************** end initialization ************************* */ + + readParFile(); + + /* Check if TWDIR overridden */ + if((twdirS = getenv("TWDIR"))) { + M(MSG,NULL, "Directory overridden with 'TWDIR' environment variable\n" ) ; + } + else { + twdirS = TWFLOWDIR; + } + + G( initGraphics( argc, argv, windowId ) ) ; + + Yset_random_seed( (INT) randomSeedG ) ; + fprintf( fpoG, "\nThe random number generator seed is: %u\n\n\n", + randomSeedG ) ; + + /* + get a pointer to blockfile + */ + sprintf( filename , "%s.blk" , cktNameG ) ; + fp = TWOPEN( filename , "r" , ABORT ) ; + readblck( fp ) ; + TWCLOSE( fp ) ; -maxCellOG = 0 ; -for( block = 1 ; block <= numRowsG ; block++ ) { + maxCellOG = 0 ; + for( block = 1 ; block <= numRowsG ; block++ ) { if( barrayG[block]->borient == 2 ) { - maxCellOG = 1 ; - break ; + maxCellOG = 1 ; + break ; } -} + } -if( rowsG > 0 ) { + if( rowsG > 0 ) { sprintf( filename , "%s.scel" , cktNameG ) ; -} else { + } else { sprintf( filename , "%s.cel" , cktNameG ) ; -} -/* avoid crashes later on */ -if( spacer_widthG == -1 && (rowsG > 0 || gate_arrayG) ){ + } + /* avoid crashes later on */ + if( spacer_widthG == -1 && (rowsG > 0 || gate_arrayG) ){ M( ERRMSG, "main", - "Neither spacer width nor feedthru width was specified in .par file\n" ) ; + "Neither spacer width nor feedthru width was specified in .par file\n" ) ; M( ERRMSG, NULL, "FATAL:must exit\n\n" ) ; -} + } -fp = TWOPEN( filename , "r" , ABORT ) ; -readcell( fp ) ; -TWCLOSE( fp ) ; - -/* - get a pointer to the netlist input file -*/ -sprintf( filename , "%s.net" , cktNameG ) ; -fp = TWOPEN( filename , "r", NOABORT ) ; -readnets( fp ) ; -if( fp ) { + fp = TWOPEN( filename , "r" , ABORT ) ; + readcell( fp ) ; + TWCLOSE( fp ) ; + + /* + get a pointer to the netlist input file + */ + sprintf( filename , "%s.net" , cktNameG ) ; + fp = TWOPEN( filename , "r", NOABORT ) ; + readnets( fp ) ; + if( fp ) { TWCLOSE( fp ) ; -} - + } -if ( Equal_Width_CellsG && file_conversionG ) { - closegraphics() ; - calc_cells_width(); - fprintf(stderr,"\n***************************************************"); - fprintf(stderr,"\nThe file stdcell.comp has the converted equal cells"); - fprintf(stderr,"\n***************************************************"); - fprintf(stderr,"\n\n"); - YexitPgm(PGMOK); -} - -iterationG = 0 ; - -tt = INT_MIN ; -bb = INT_MAX ; -rr = INT_MIN ; -ll = INT_MAX ; -for( block = 1 ; block <= numRowsG ; block++ ) { + if ( Equal_Width_CellsG && file_conversionG ) { + closegraphics() ; + calc_cells_width(); + fprintf(stderr,"\n***************************************************"); + fprintf(stderr,"\nThe file stdcell.comp has the converted equal cells"); + fprintf(stderr,"\n***************************************************"); + fprintf(stderr,"\n\n"); + YexitPgm(PGMOK); + + } + + iterationG = 0 ; + + tt = INT_MIN ; + bb = INT_MAX ; + rr = INT_MIN ; + ll = INT_MAX ; + for( block = 1 ; block <= numRowsG ; block++ ) { cx = barrayG[block]->bxcenter ; cy = barrayG[block]->bycenter ; cl = barrayG[block]->bleft; @@ -342,29 +343,29 @@ cb = barrayG[block]->bbottom; ct = barrayG[block]->btop; if( cx + cr > rr ) { - rr = cx + cr ; + rr = cx + cr ; } if( cx + cl < ll ) { - ll = cx + cl ; + ll = cx + cl ; } if( cy + ct > tt ) { - tt = cy + ct ; + tt = cy + ct ; } if( cy + cb < bb ) { - bb = cy + cb ; + bb = cy + cb ; } -} -blkxspanG = rr - ll ; -blkyspanG = tt - bb ; + } + blkxspanG = rr - ll ; + blkyspanG = tt - bb ; -left_row_boundaryG = ll ; -row_extentG = rr - ll ; + left_row_boundaryG = ll ; + row_extentG = rr - ll ; -fprintf(fpoG,"block x-span:%d block y-span:%d\n",blkxspanG,blkyspanG); + fprintf(fpoG,"block x-span:%d block y-span:%d\n",blkxspanG,blkyspanG); -for( cell = 1 ; cell <= lastpadG ; cell++ ) { + for( cell = 1 ; cell <= lastpadG ; cell++ ) { if( cell > numcellsG - extra_cellsG && cell <= numcellsG ) { - continue ; + continue ; } cx = carrayG[cell]->cxcenter ; cy = carrayG[cell]->cycenter ; @@ -373,301 +374,302 @@ cb = carrayG[cell]->tileptr->bottom; ct = carrayG[cell]->tileptr->top; if( cx + cr > rr ) { - rr = cx + cr ; + rr = cx + cr ; } if( cx + cl < ll ) { - ll = cx + cl ; + ll = cx + cl ; } if( cy + ct > tt ) { - tt = cy + ct ; + tt = cy + ct ; } if( cy + cb < bb ) { - bb = cy + cb ; + bb = cy + cb ; } -} -bdxlen = rr - ll ; -bdylen = tt - bb ; + } + bdxlen = rr - ll ; + bdylen = tt - bb ; -lrtxspanG = rr ; -lrtyspanG = tt ; + lrtxspanG = rr ; + lrtyspanG = tt ; -if( Equal_Width_CellsG ) { + if( Equal_Width_CellsG ) { binpenConG = 0 ; roLenConG = 0 ; -} else { + } else { binpenConG = 1.0 ; roLenConG = 6.0 ; -} -calc_init_timeFactor() ; -fprintf(fpoG,"Using default value of bin.penalty.control:%f\n", - binpenConG ) ; -pairArrayG = NULL ; - -funccostG = findcost() ; - -fprintf( fpoG , "bdxlen:%d bdylen:%d\n", bdxlen , bdylen ) ; -fprintf( fpoG , "l:%d t:%d r:%d b:%d\n", ll , tt , rr , bb ) ; - -fprintf( fpoG, "\n\n\nTHIS IS THE ROUTE COST OF THE "); -fprintf( fpoG, "CURRENT PLACEMENT: %d\n" , funccostG ) ; -fprintf( fpoG, "\n\n\nTHIS IS THE PENALTY OF THE ") ; -fprintf( fpoG , "CURRENT PLACEMENT: %d\n" , penaltyG ) ; -fflush( fpoG ) ; + } + calc_init_timeFactor() ; + fprintf(fpoG,"Using default value of bin.penalty.control:%f\n", + binpenConG ) ; + pairArrayG = NULL ; + + funccostG = findcost() ; + + fprintf( fpoG , "bdxlen:%d bdylen:%d\n", bdxlen , bdylen ) ; + fprintf( fpoG , "l:%d t:%d r:%d b:%d\n", ll , tt , rr , bb ) ; + + fprintf( fpoG, "\n\n\nTHIS IS THE ROUTE COST OF THE "); + fprintf( fpoG, "CURRENT PLACEMENT: %d\n" , funccostG ) ; + fprintf( fpoG, "\n\n\nTHIS IS THE PENALTY OF THE ") ; + fprintf( fpoG , "CURRENT PLACEMENT: %d\n" , penaltyG ) ; + fflush( fpoG ) ; -if( intelG && !ignore_crossbusesG ) { + if( intelG && !ignore_crossbusesG ) { handle_crossbuses() ; -} + } -G( init_heat_index() ) ; -G( check_graphics(TRUE) ) ; + G( init_heat_index() ) ; + G( check_graphics(TRUE) ) ; -fflush(fpoG); -fflush(stdout); + fflush(fpoG); + fflush(stdout); -if( orientation_optimizationG ) { + if( orientation_optimizationG ) { costonlyG = FALSE ; -} + } -if( ECOs_existG ) { + if( ECOs_existG ) { costonlyG = TRUE ; printf("ECOs are being incorporated as requested\n"); fprintf(fpoG,"ECOs are being incorporated as requested\n"); incorporate_ECOs() ; -} + } -if( costonlyG ) { + if( costonlyG ) { orientation_optimizationG = TRUE ; utemp() ; -} else { + } else { init_utemp() ; utemp() ; -} + } -fprintf( fpoG , "\nStatistics:\n"); -fprintf( fpoG , "Number of Cells: %d\n", numcellsG ); -fprintf( fpoG , "Number of Pads: %d \n", numtermsG - numpadgrpsG ); -fprintf( fpoG , "Number of Nets: %d \n", numnetsG ) ; -fprintf( fpoG , "Number of Pins: %d \n", maxtermG ) ; -fprintf( fpoG , "Number of PadGroups: %d \n", numpadgrpsG ); -fprintf( fpoG , "Number of Implicit Feed Thrus: %d\n", - implicit_feed_countG++ ) ; -fprintf( fpoG , "Number of Feed Thrus Added: %d\n", num_feeds_addedS ) ; -fprintf( fpoG , "Feed Percentage: %4.2f%%\n", - 100.0 * (DOUBLE) (num_feeds_addedS * fdWidthG) / - (DOUBLE) total_row_lengthG ) ; -fprintf( fpoG , "Average Row Separation: %4.2f\n", - ave_row_sepS ) ; + fprintf( fpoG , "\nStatistics:\n"); + fprintf( fpoG , "Number of Cells: %d\n", numcellsG ); + fprintf( fpoG , "Number of Pads: %d \n", numtermsG - numpadgrpsG ); + fprintf( fpoG , "Number of Nets: %d \n", numnetsG ) ; + fprintf( fpoG , "Number of Pins: %d \n", maxtermG ) ; + fprintf( fpoG , "Number of PadGroups: %d \n", numpadgrpsG ); + fprintf( fpoG , "Number of Implicit Feed Thrus: %d\n", + implicit_feed_countG++ ) ; + fprintf( fpoG , "Number of Feed Thrus Added: %d\n", num_feeds_addedS ) ; + fprintf( fpoG , "Feed Percentage: %4.2f%%\n", + 100.0 * (DOUBLE) (num_feeds_addedS * fdWidthG) / + (DOUBLE) total_row_lengthG ) ; + fprintf( fpoG , "Average Row Separation: %4.2f\n", + ave_row_sepS ) ; -if( intelG ) { + if( intelG ) { fprintf( fpoG , "Checking violations at the end\n"); check_violations() ; -} + } -Yprint_stats(fpoG); -/* TWCLOSE(fpoG) ; */ /* Handled by Ymessage_close() in YexitPgm() */ + Yprint_stats(fpoG); + /* TWCLOSE(fpoG) ; */ /* Handled by Ymessage_close() in YexitPgm() */ -closegraphics() ; + closegraphics() ; -YexitPgm(PGMOK); + YexitPgm(PGMOK); + return 0; } /* end main */ -initialize_global_router1() +void initialize_global_router1() { -INT cell , row ; + INT cell , row ; -save_cell_xS = (INT *) - Ysafe_malloc( (1 + numcellsG + numtermsG) * sizeof(INT)); -save_cell_yS = (INT *) - Ysafe_malloc( (1 + numcellsG + numtermsG) * sizeof(INT)); -save_cell_bS = (INT *) - Ysafe_malloc( (1 + numcellsG + numtermsG) * sizeof(INT)); -save_cell_cS = (INT *) - Ysafe_malloc( (1 + numcellsG + numtermsG) * sizeof(INT)); -save_orientS = (INT *) - Ysafe_malloc( (1 + numcellsG + numtermsG) * sizeof(INT)); -save_desireS = (INT *) - Ysafe_malloc( (1 + numRowsG) * sizeof(INT)); -save_orig_desireS = (INT *) - Ysafe_malloc( (1 + numRowsG) * sizeof(INT)); -for( cell = 1 ; cell <= lastpadG ; cell++ ) { + save_cell_xS = (INT *) + Ysafe_malloc( (1 + numcellsG + numtermsG) * sizeof(INT)); + save_cell_yS = (INT *) + Ysafe_malloc( (1 + numcellsG + numtermsG) * sizeof(INT)); + save_cell_bS = (INT *) + Ysafe_malloc( (1 + numcellsG + numtermsG) * sizeof(INT)); + save_cell_cS = (INT *) + Ysafe_malloc( (1 + numcellsG + numtermsG) * sizeof(INT)); + save_orientS = (INT *) + Ysafe_malloc( (1 + numcellsG + numtermsG) * sizeof(INT)); + save_desireS = (INT *) + Ysafe_malloc( (1 + numRowsG) * sizeof(INT)); + save_orig_desireS = (INT *) + Ysafe_malloc( (1 + numRowsG) * sizeof(INT)); + for( cell = 1 ; cell <= lastpadG ; cell++ ) { save_cell_xS[cell] = carrayG[cell]->cxcenter ; save_cell_yS[cell] = carrayG[cell]->cycenter ; save_cell_bS[cell] = carrayG[cell]->cblock ; save_cell_cS[cell] = carrayG[cell]->cclass ; save_orientS[cell] = carrayG[cell]->corient ; -} -for( row = 1 ; row <= numRowsG ; row++ ) { + } + for( row = 1 ; row <= numRowsG ; row++ ) { save_desireS[row] = barrayG[row]->desire ; save_orig_desireS[row] = barrayG[row]->orig_desire ; -} + } -return ; + return ; } -initialize_global_router() +void initialize_global_router() { -CBOXPTR ptr ; -PINBOXPTR pinptr, pin, cnetptr , netptr ; -INT cell , row , net ; -BOOL coreConnection ; + CBOXPTR ptr ; + PINBOXPTR pinptr, pin, cnetptr , netptr ; + INT cell , row , net ; + BOOL coreConnection ; -rebuild_nextpin() ; -insert_row(0) ; + rebuild_nextpin() ; + insert_row(0) ; -for( cell = 1 ; cell <= lastpadG; cell++ ) { + for( cell = 1 ; cell <= lastpadG; cell++ ) { carrayG[cell]->cxcenter = save_cell_xS[cell] ; row = carrayG[cell]->cblock = save_cell_bS[cell] ; if( row != 0 ){ - carrayG[cell]->cycenter = barrayG[row]->bycenter ; + carrayG[cell]->cycenter = barrayG[row]->bycenter ; } else { - carrayG[cell]->cycenter = save_cell_yS[cell] ; + carrayG[cell]->cycenter = save_cell_yS[cell] ; } carrayG[cell]->cclass = save_cell_cS[cell] ; carrayG[cell]->corient = (char) save_orientS[cell] ; -} + } -for( cell = 1 ; cell <= lastpadG ; cell++ ) { + for( cell = 1 ; cell <= lastpadG ; cell++ ) { ptr = carrayG[cell] ; if( cell > numcellsG ) { - for( pinptr = ptr->pins; pinptr ; pinptr = pinptr->nextpin ) { - if( route_padnets_outsideG ){ - /* look at each net on the pads to see if it has a */ - /* connection in the core */ - coreConnection = FALSE ; - for( pin = netarrayG[pinptr->net]->pins; pin; pin = pin->next ){ - if( pin->cell <= numcellsG ){ - coreConnection = TRUE ; - break ; - } - } - if(!(coreConnection )){ - /* no connection to the core we can route this in */ - /* the top channel */ - pinptr->row = numRowsG + 1 ; - pinptr->pinloc = BOTCELL ; - /* now go on to the next pin */ - continue ; - } - } - /* set the pinlocation for the pads and macros */ - if( ptr->padptr->padside ) { - if( pinptr->row > numRowsG ) { - pinptr->pinloc = BOTCELL ; - } else { - pinptr->pinloc = TOPCELL ; - } - } - } + for( pinptr = ptr->pins; pinptr ; pinptr = pinptr->nextpin ) { + if( route_padnets_outsideG ){ + /* look at each net on the pads to see if it has a */ + /* connection in the core */ + coreConnection = FALSE ; + for( pin = netarrayG[pinptr->net]->pins; pin; pin = pin->next ){ + if( pin->cell <= numcellsG ){ + coreConnection = TRUE ; + break ; + } + } + if(!(coreConnection )){ + /* no connection to the core we can route this in */ + /* the top channel */ + pinptr->row = numRowsG + 1 ; + pinptr->pinloc = BOTCELL ; + /* now go on to the next pin */ + continue ; + } + } + /* set the pinlocation for the pads and macros */ + if( ptr->padptr->padside ) { + if( pinptr->row > numRowsG ) { + pinptr->pinloc = BOTCELL ; + } else { + pinptr->pinloc = TOPCELL ; + } + } + } } else { - for( pinptr = ptr->pins; pinptr ; pinptr = pinptr->nextpin ) { - if( pinptr->typos[(ptr->corient)%2] > 0 ) { - pinptr->pinloc = TOPCELL ; - } else if(pinptr->typos[(ptr->corient)%2] < 0 ){ - pinptr->pinloc = BOTCELL ; - } else { - pinptr->pinloc = NEITHER ; - } - } + for( pinptr = ptr->pins; pinptr ; pinptr = pinptr->nextpin ) { + if( pinptr->typos[(ptr->corient)%2] > 0 ) { + pinptr->pinloc = TOPCELL ; + } else if(pinptr->typos[(ptr->corient)%2] < 0 ){ + pinptr->pinloc = BOTCELL ; + } else { + pinptr->pinloc = NEITHER ; + } + } } -} -for( row = 1 ; row <= numRowsG ; row++ ) { + } + for( row = 1 ; row <= numRowsG ; row++ ) { barrayG[row]->desire = save_desireS[row] ; barrayG[row]->orig_desire = save_orig_desireS[row] ; -} -no_row_lengthsG = 1 ; -findunlap(0) ; -no_row_lengthsG = 0 ; + } + no_row_lengthsG = 1 ; + findunlap(0) ; + no_row_lengthsG = 0 ; -return ; + return ; } -execute_global_router() +void execute_global_router() { -PINBOXPTR netptr ; -INT i , j, row ; -INT loop_boundary ; -INT temp ; -INT core_height ; -INT core_width ; -INT total_row_height ; -INT best_tracks ; -DOUBLE area ; -DOUBLE best_area ; -BOOL decision ; + PINBOXPTR netptr ; + INT i , j, row ; + INT loop_boundary ; + INT temp ; + INT core_height ; + INT core_width ; + INT total_row_height ; + INT best_tracks ; + DOUBLE area ; + DOUBLE best_area ; + BOOL decision ; -char command[LRECL] ; + char command[LRECL] ; -if( gate_arrayG && vertical_track_on_cell_edgeG ) { + if( gate_arrayG && vertical_track_on_cell_edgeG ) { findunlap(0) ; fprintf(fpoG,"Removed %d redundant implicit feeds\n", - rm_overlapping_feeds() ) ; -} + rm_overlapping_feeds() ) ; + } -loop_boundary = 4 ; -routing_loopS = 8 ; + loop_boundary = 4 ; + routing_loopS = 8 ; -/* added by Carl 24 Jan 91 */ -total_row_height = 0 ; -for( row = 1 ; row <= numRowsG ; row++ ) { + /* added by Carl 24 Jan 91 */ + total_row_height = 0 ; + for( row = 1 ; row <= numRowsG ; row++ ) { if( pairArrayG[row][0] < 1 ) { - fprintf(fpoG,"Trying to fix empty row problem ...") ; - printf("Trying to fix empty row problem ...") ; - fflush(fpoG); - fflush(stdout); - even_the_rows(0,FALSE) ; - if( pairArrayG[row][0] < 1 ) { - /* take even more drastic measures */ - even_the_rows(0,TRUE) ; - } - for( row = 1 ; row <= numRowsG ; row++ ) { - if( pairArrayG[row][0] < 1 ) { - fprintf(fpoG,"Global router cannot handle a row without cells\n"); - printf("Global router cannot handle a row without cells\n"); - YexitPgm(PGMFAIL); - } - } - fprintf(fpoG," fixed\n"); - printf(" fixed\n"); - fflush(fpoG); - fflush(stdout); - break ; + fprintf(fpoG,"Trying to fix empty row problem ...") ; + printf("Trying to fix empty row problem ...") ; + fflush(fpoG); + fflush(stdout); + even_the_rows(0,FALSE) ; + if( pairArrayG[row][0] < 1 ) { + /* take even more drastic measures */ + even_the_rows(0,TRUE) ; + } + for( row = 1 ; row <= numRowsG ; row++ ) { + if( pairArrayG[row][0] < 1 ) { + fprintf(fpoG,"Global router cannot handle a row without cells\n"); + printf("Global router cannot handle a row without cells\n"); + YexitPgm(PGMFAIL); + } + } + fprintf(fpoG," fixed\n"); + printf(" fixed\n"); + fflush(fpoG); + fflush(stdout); + break ; } /* accumulate the total row height */ total_row_height += barrayG[row]->btop - barrayG[row]->bbottom ; -} -/* end */ + } + /* end */ -if( swap_netG > 0 ) { + if( swap_netG > 0 ) { /* there are TW_PASS_THRU pins on a swap-able gate */ /* we must add them to the implicit list on the relevant cell */ netptr = netarrayG[swap_netG]->pins ; for( ; netptr ; netptr = netptr->next ) { - install_swap_pass_thrus( netptr ) ; + install_swap_pass_thrus( netptr ) ; } netarrayG[swap_netG]->ignore = -1 ; -} + } -if( glob_route_only_crit_netsG ) { + if( glob_route_only_crit_netsG ) { route_only_critical_nets() ; -} else { + } else { elim_nets(1) ; /* nets which are NOT to be global routed */ -} + } -actual_feed_thru_cells_addedG = 0 ; + actual_feed_thru_cells_addedG = 0 ; -initialize_global_router1() ; -if( SGGRG ) { + initialize_global_router1() ; + if( SGGRG ) { initialize_global_router() ; coarseglb() ; /* this function returns "early" if SGGR */ /* now place pads for the final time using real cell positions for core */ @@ -682,61 +684,61 @@ closegraphics() ; if( twdirS ){ - Ymessage_mode( M_VERBOSE ) ; - M( MSG, NULL, "\n\nPlacement phase complete...\n\n" ) ; - M( MSG, NULL, "\n\nNow calling SGGR...\n\n" ) ; - - TWCLOSE(fpoG) ; - sprintf( command, "%s/bin/SGGR %s", twdirS, cktNameG ) ; - Ysystem( "SGGR", ABORT, command, NULL ) ; + Ymessage_mode( M_VERBOSE ) ; + M( MSG, NULL, "\n\nPlacement phase complete...\n\n" ) ; + M( MSG, NULL, "\n\nNow calling SGGR...\n\n" ) ; + + TWCLOSE(fpoG) ; + sprintf( command, "%s/bin/SGGR %s", twdirS, cktNameG ) ; + Ysystem( "SGGR", ABORT, command, NULL ) ; } else TWCLOSE(fpoG) ; YexitPgm(PGMOK); -} + } -best_area = DBL_MAX ; + best_area = DBL_MAX ; -USER_NEXT_METER() ; -USER_SEND_VALUE( routing_loopS ) ; -save_abs_min_flagG = absolute_minimum_feedsG ; - -/* now place pads using real cell positions for core */ -/* boundary to insure we don't have overlap */ -setVirtualCore( TRUE ) ; -placepads() ; -/* draw the data */ -G( check_graphics(TRUE) ) ; + USER_NEXT_METER() ; + USER_SEND_VALUE( routing_loopS ) ; + save_abs_min_flagG = absolute_minimum_feedsG ; + + /* now place pads using real cell positions for core */ + /* boundary to insure we don't have overlap */ + setVirtualCore( TRUE ) ; + placepads() ; + /* draw the data */ + G( check_graphics(TRUE) ) ; -if( !(placement_improveG )){ + if( !(placement_improveG )){ /* limit the number of cases since we won't move cells */ routing_loopS = 4 ; call_row_evenerG = FALSE ; -} + } -/* from here on, the pad side must be retained during global routing */ -placepads_retain_side( TRUE ) ; -for( j = 1 ; j <= routing_loopS ; j++ ) { + /* from here on, the pad side must be retained during global routing */ + placepads_retain_side( TRUE ) ; + for( j = 1 ; j <= routing_loopS ; j++ ) { if( j == routing_loopS || j == loop_boundary ) { - absolute_minimum_feedsG = TRUE ; + absolute_minimum_feedsG = TRUE ; } else { - absolute_minimum_feedsG = save_abs_min_flagG ; + absolute_minimum_feedsG = save_abs_min_flagG ; } if( j <= loop_boundary ) { - if( call_row_evenerG ){ - do_not_even_rowsG = FALSE ; - fprintf(fpoG,"TimberWolfSC did call even_the_rows()\n"); - } else { - do_not_even_rowsG = TRUE ; - fprintf(fpoG,"TimberWolfSC did NOT call even_the_rows()\n"); - } + if( call_row_evenerG ){ + do_not_even_rowsG = FALSE ; + fprintf(fpoG,"TimberWolfSC did call even_the_rows()\n"); + } else { + do_not_even_rowsG = TRUE ; + fprintf(fpoG,"TimberWolfSC did NOT call even_the_rows()\n"); + } } else { - do_not_even_rowsG = FALSE ; - fprintf(fpoG,"TimberWolfSC did call even_the_rows()\n"); + do_not_even_rowsG = FALSE ; + fprintf(fpoG,"TimberWolfSC did call even_the_rows()\n"); } if( absolute_minimum_feedsG ) { - fprintf(fpoG,"TimberWolfSC using absolute_minimum_feeds\n"); + fprintf(fpoG,"TimberWolfSC using absolute_minimum_feeds\n"); } tracksG = 0 ; @@ -744,15 +746,15 @@ coarseglb() ; if( globe() == 0 ) { - fprintf(fpoG,"WARNING: refine_fixed_placement failed\n"); - printf("WARNING: refine_fixed_placement failed\n"); - fflush(fpoG); - fflush(stdout); - USER_INCR_METER() ; - continue ; + fprintf(fpoG,"WARNING: refine_fixed_placement failed\n"); + printf("WARNING: refine_fixed_placement failed\n"); + fflush(fpoG); + fflush(stdout); + USER_INCR_METER() ; + continue ; } if( output_at_densityG ){ - density() ; + density() ; } placepads() ; /* draw the data */ @@ -760,265 +762,264 @@ core_width = barrayG[1]->desire ; for( row = 2 ; row <= numRowsG ; row++ ) { - if( core_width < barrayG[row]->desire ) { - core_width = barrayG[row]->desire ; - } + if( core_width < barrayG[row]->desire ) { + core_width = barrayG[row]->desire ; + } } core_width += largest_delta_row_lenG ; core_height = tracksG * track_pitchG + total_row_height ; area = (DOUBLE) core_height * (DOUBLE) core_width ; if( area < best_area ){ - best_area = area ; - decision = TRUE ; - best_tracks = tracksG ; + best_area = area ; + decision = TRUE ; + best_tracks = tracksG ; } else { - decision = FALSE ; + decision = FALSE ; } if( decision ) { - fprintf(fpoG,"THIS G. ROUTING IS BEING SAVED AS BEST SO FAR\n"); - fprintf(fpoG,"\nFINAL NUMBER OF ROUTING TRACKS: %d\n\n", - tracksG); - for( i = 1 ; i <= numChansG ; i++ ) { - fprintf(fpoG,"MAX OF CHANNEL:%3d is: %3d\n", i - , maxTrackG[i]); - } - outpins() ; - output() ; - print_paths() ; - best_tracks = tracksG ; - /* save this for final statistics */ - num_feeds_addedS = actual_feed_thru_cells_addedG ; - /* save the effective row separation */ - ave_row_sepS = (DOUBLE) (tracksG * track_pitchG) / - (DOUBLE) total_row_height ; + fprintf(fpoG,"THIS G. ROUTING IS BEING SAVED AS BEST SO FAR\n"); + fprintf(fpoG,"\nFINAL NUMBER OF ROUTING TRACKS: %d\n\n", + tracksG); + for( i = 1 ; i <= numChansG ; i++ ) { + fprintf(fpoG,"MAX OF CHANNEL:%3d is: %3d\n", i + , maxTrackG[i]); + } + outpins() ; + output() ; + print_paths() ; + best_tracks = tracksG ; + /* save this for final statistics */ + num_feeds_addedS = actual_feed_thru_cells_addedG ; + /* save the effective row separation */ + ave_row_sepS = (DOUBLE) (tracksG * track_pitchG) / + (DOUBLE) total_row_height ; } globe_free_up() ; final_free_up() ; USER_INCR_METER() ; -} -fprintf(fpoG,"\n\n***********************************************\n"); -fprintf(fpoG,"*ACTUAL* FINAL NUMBER OF ROUTING TRACKS: %d\n", - best_tracks); -fprintf(fpoG,"***********************************************\n\n"); -fflush(fpoG); -fprintf(stdout,"\n\n***********************************************\n"); -fprintf(stdout,"*ACTUAL* FINAL NUMBER OF ROUTING TRACKS: %d\n", - best_tracks); -fprintf(stdout,"***********************************************\n\n"); -fflush(stdout); + } + fprintf(fpoG,"\n\n***********************************************\n"); + fprintf(fpoG,"*ACTUAL* FINAL NUMBER OF ROUTING TRACKS: %d\n", + best_tracks); + fprintf(fpoG,"***********************************************\n\n"); + fflush(fpoG); + fprintf(stdout,"\n\n***********************************************\n"); + fprintf(stdout,"*ACTUAL* FINAL NUMBER OF ROUTING TRACKS: %d\n", + best_tracks); + fprintf(stdout,"***********************************************\n\n"); + fflush(stdout); -return ; + return ; } -init_utemp() +void init_utemp() { -INT row , bin ; + INT row , bin ; -bin_configG = (INT **) Ysafe_malloc( (1 + numRowsG) * sizeof(INT *) ) ; -for( row = 1 ; row <= numRowsG ; row++ ) { + bin_configG = (INT **) Ysafe_malloc( (1 + numRowsG) * sizeof(INT *) ) ; + for( row = 1 ; row <= numRowsG ; row++ ) { bin_configG[row] = (INT *) Ysafe_malloc( (1 + numBinsG) * sizeof(INT) ); for( bin = 0 ; bin <= numBinsG ; bin++ ) { - bin_configG[row][bin] = 0 ; + bin_configG[row][bin] = 0 ; } -} + } -return ; + return ; } -install_swap_pass_thrus( netptr ) -PINBOXPTR netptr ; +void install_swap_pass_thrus(PINBOXPTR netptr ) { -CBOXPTR ptr ; -IPBOXPTR imptr ; -PINBOXPTR termptr ; -INT impxpos , impypos , cell ; -char *pname ; - -/* code borrowed from readcell() */ -/* fscanf( fp , " %d %d " , &impxpos , &impypos ) ; */ -/* impxpos and impypos are rel. to cell center -- to - get these we need to find the relevant pin on - the cell */ -cell = netptr->cell ; -ptr = carrayG[cell] ; -for( termptr = ptr->pins ;termptr ; termptr = termptr->nextpin ) { + CBOXPTR ptr ; + IPBOXPTR imptr ; + PINBOXPTR termptr ; + INT impxpos , impypos , cell ; + char *pname ; + + /* code borrowed from readcell() */ + /* fscanf( fp , " %d %d " , &impxpos , &impypos ) ; */ + /* impxpos and impypos are rel. to cell center -- to + get these we need to find the relevant pin on + the cell */ + cell = netptr->cell ; + ptr = carrayG[cell] ; + for( termptr = ptr->pins ;termptr ; termptr = termptr->nextpin ) { if( termptr == netptr ) { - impxpos = termptr->txpos[0] ; - impypos = termptr->typos[0] ; - fprintf(fpoG,"FOUND the connection in install_swap...\n"); - break ; - } -} -imptr = ( IPBOXPTR )Ysafe_malloc( sizeof( IPBOX ) ) ; -imptr->pinname = (char *) Ysafe_malloc( - (strlen( netptr->pinname ) + 1 ) * - sizeof( char ) ) ; -imptr->eqpinname = (char *) Ysafe_malloc( - (strlen( netptr->eqptr->pinname ) + 1 ) * - sizeof( char ) ) ; -sprintf( imptr->pinname , "%s" , netptr->pinname ) ; -sprintf( imptr->eqpinname , "%s" , netptr->eqptr->pinname ) ; - -imptr->txpos = impxpos ; -imptr->cell = cell ; -imptr->terminal = ++last_pin_numberG ; -imptr->next = ptr->imptr ; -ptr->imptr = imptr ; + impxpos = termptr->txpos[0] ; + impypos = termptr->typos[0] ; + fprintf(fpoG,"FOUND the connection in install_swap...\n"); + break ; + } + } + imptr = ( IPBOXPTR )Ysafe_malloc( sizeof( IPBOX ) ) ; + imptr->pinname = (char *) Ysafe_malloc( + (strlen( netptr->pinname ) + 1 ) * + sizeof( char ) ) ; + imptr->eqpinname = (char *) Ysafe_malloc( + (strlen( netptr->eqptr->pinname ) + 1 ) * + sizeof( char ) ) ; + sprintf( imptr->pinname , "%s" , netptr->pinname ) ; + sprintf( imptr->eqpinname , "%s" , netptr->eqptr->pinname ) ; + + imptr->txpos = impxpos ; + imptr->cell = cell ; + imptr->terminal = ++last_pin_numberG ; + imptr->next = ptr->imptr ; + ptr->imptr = imptr ; -if( impypos > 0 ) { /* swap the pinnames */ + if( impypos > 0 ) { /* swap the pinnames */ pname = imptr->pinname ; imptr->pinname = imptr->eqpinname ; imptr->eqpinname = pname ; -} + } -return ; + return ; } -incorporate_ECOs() +void incorporate_ECOs() { -PINBOXPTR termptr , netptr ; -INT *nets, xspot, yspot , i , net , cell , count, maxpins ; -INT orient , row , xmin, xmax, ymin, ymax , x , y ; - -xspot = 0 ; -yspot = 0 ; -maxpins = get_max_pin() ; -nets = (INT *) Ysafe_calloc( maxpins+1, sizeof(INT) ) ; -for( cell = 1 ; cell <= numcellsG ; cell++ ) { + PINBOXPTR termptr , netptr ; + INT *nets, xspot, yspot , i , net , cell , count, maxpins ; + INT orient , row , xmin, xmax, ymin, ymax , x , y ; + + xspot = 0 ; + yspot = 0 ; + maxpins = get_max_pin() ; + nets = (INT *) Ysafe_calloc( maxpins+1, sizeof(INT) ) ; + for( cell = 1 ; cell <= numcellsG ; cell++ ) { if( carrayG[cell]->ECO_flag == 1 ) { - printf("ECO added cell being processed: <%s> ", - carrayG[cell]->cname ) ; - fprintf(fpoG,"ECO added cell being processed: <%s> ", - carrayG[cell]->cname ) ; - termptr = carrayG[cell]->pins ; - for( ; termptr ; termptr = termptr->nextpin ) { - net = termptr->net ; - for( i = 0 ; nets[i] != 0 ; i++ ) { - if( nets[i] == net ) { - break ; - } - } - if( nets[i] == 0 ) { - nets[i] = net ; - } - } - /* nets[] is the list of unique nets for the cell */ - count = 0 ; - for( i = 0 ; nets[i] != 0 ; i++ ) { - /* compute bounding boxes of the unique nets, - taking care to ignore ECO_added cells */ - /* ************ updated on 12/21/90 by Carl */ - net = nets[i] ; - if( !(netptr = netarrayG[net]->pins)) { - continue ; - } - if( carrayG[ netptr->cell ]->ECO_flag == 1 ) { - /* don't let ECO added cells influence the decision */ - xmin = INT_MAX ; - xmax = INT_MIN ; - ymin = INT_MAX ; - ymax = INT_MIN ; - } else { - xmin = xmax = netptr->xpos ; - ymin = ymax = netptr->ypos ; - } - count = 0 ; - for( netptr = netptr->next ; netptr ; netptr = netptr->next ) { - if( carrayG[ netptr->cell ]->ECO_flag == 1 ) { - continue ; - /* don't let ECO_added cells influence the decision */ - } - x = netptr->xpos ; - y = netptr->ypos ; - if( x < xmin ) { - xmin = x ; - } - if( x > xmax ) { - xmax = x ; - } - if( y < ymin ) { - ymin = y ; - } - if( y > ymax ) { - ymax = y ; - } - } - /* ************ */ - xspot += (xmax + xmin) / 2 ; - yspot += (ymax + ymin) / 2 ; - count++ ; - } - if( count >= 1 ){ - xspot /= count ; - yspot /= count ; - } else { - fprintf( stderr, "Incorrectly specified ECO cell:%s", - carrayG[cell]->cname ) ; - } - - for( row = 1 ; row <= numRowsG ; row++ ) { - if( barrayG[row]->bycenter > yspot ) { - break ; - } - } - if( row > numRowsG ) { - row = numRowsG ; - } else if( row > 1 ) { - if( barrayG[row]->bycenter - yspot > - yspot - barrayG[row-1]->bycenter ) { - row-- ; - } - } - yspot = barrayG[row]->bycenter ; - - carrayG[cell]->cxcenter = xspot ; - carrayG[cell]->cycenter = yspot ; - carrayG[cell]->cblock = row ; - carrayG[cell]->ECO_flag = 0 ; - - printf(" ... placed in row:%d x:%d\n", row , xspot ) ; - fprintf(fpoG," ... placed in row:%d x:%d\n", row , xspot ) ; - - orient = carrayG[cell]->corient ; - for( termptr = carrayG[cell]->pins ; termptr ; - termptr = termptr->nextpin ) { - termptr->xpos = termptr->txpos[ orient/2 ] + xspot ; - termptr->ypos = termptr->typos[ orient%2 ] + yspot ; - } + printf("ECO added cell being processed: <%s> ", + carrayG[cell]->cname ) ; + fprintf(fpoG,"ECO added cell being processed: <%s> ", + carrayG[cell]->cname ) ; + termptr = carrayG[cell]->pins ; + for( ; termptr ; termptr = termptr->nextpin ) { + net = termptr->net ; + for( i = 0 ; nets[i] != 0 ; i++ ) { + if( nets[i] == net ) { + break ; + } + } + if( nets[i] == 0 ) { + nets[i] = net ; + } + } + /* nets[] is the list of unique nets for the cell */ + count = 0 ; + for( i = 0 ; nets[i] != 0 ; i++ ) { + /* compute bounding boxes of the unique nets, + taking care to ignore ECO_added cells */ + /* ************ updated on 12/21/90 by Carl */ + net = nets[i] ; + if( !(netptr = netarrayG[net]->pins)) { + continue ; + } + if( carrayG[ netptr->cell ]->ECO_flag == 1 ) { + /* don't let ECO added cells influence the decision */ + xmin = INT_MAX ; + xmax = INT_MIN ; + ymin = INT_MAX ; + ymax = INT_MIN ; + } else { + xmin = xmax = netptr->xpos ; + ymin = ymax = netptr->ypos ; + } + count = 0 ; + for( netptr = netptr->next ; netptr ; netptr = netptr->next ) { + if( carrayG[ netptr->cell ]->ECO_flag == 1 ) { + continue ; + /* don't let ECO_added cells influence the decision */ + } + x = netptr->xpos ; + y = netptr->ypos ; + if( x < xmin ) { + xmin = x ; + } + if( x > xmax ) { + xmax = x ; + } + if( y < ymin ) { + ymin = y ; + } + if( y > ymax ) { + ymax = y ; + } + } + /* ************ */ + xspot += (xmax + xmin) / 2 ; + yspot += (ymax + ymin) / 2 ; + count++ ; + } + if( count >= 1 ){ + xspot /= count ; + yspot /= count ; + } else { + fprintf( stderr, "Incorrectly specified ECO cell:%s", + carrayG[cell]->cname ) ; + } + + for( row = 1 ; row <= numRowsG ; row++ ) { + if( barrayG[row]->bycenter > yspot ) { + break ; + } + } + if( row > numRowsG ) { + row = numRowsG ; + } else if( row > 1 ) { + if( barrayG[row]->bycenter - yspot > + yspot - barrayG[row-1]->bycenter ) { + row-- ; + } + } + yspot = barrayG[row]->bycenter ; + + carrayG[cell]->cxcenter = xspot ; + carrayG[cell]->cycenter = yspot ; + carrayG[cell]->cblock = row ; + carrayG[cell]->ECO_flag = 0 ; + + printf(" ... placed in row:%d x:%d\n", row , xspot ) ; + fprintf(fpoG," ... placed in row:%d x:%d\n", row , xspot ) ; + + orient = carrayG[cell]->corient ; + for( termptr = carrayG[cell]->pins ; termptr ; + termptr = termptr->nextpin ) { + termptr->xpos = termptr->txpos[ orient/2 ] + xspot ; + termptr->ypos = termptr->typos[ orient%2 ] + yspot ; + } } -} + } -return ; + return ; } /* give user correct syntax */ -syntax() +void syntax() { - M(ERRMSG,NULL,"\n" ) ; - M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); - sprintf( YmsgG, - "\nTimberWolfSC [-dnw] designName [windowId] \n" ) ; - M(MSG,NULL,YmsgG ) ; - M(MSG,NULL,"\twhose options are zero or more of the following:\n"); - M(MSG,NULL,"\t\td - prints debug info and performs extensive\n"); - M(MSG,NULL,"\t\t error checking\n"); - M(MSG,NULL,"\t\tn - no graphics - the default is to open the\n"); - M(MSG,NULL,"\t\t display and output graphics to an Xwindow\n"); - M(MSG,NULL,"\t\tv - verbose mode - echo output to the screen\n"); - M(MSG,NULL,"\t\tw - parasite mode - user must specify windowId\n"); - YexitPgm(PGMFAIL); + M(ERRMSG,NULL,"\n" ) ; + M(MSG,NULL,"Incorrect syntax. Correct syntax:\n"); + sprintf( YmsgG, + "\nTimberWolfSC [-dnw] designName [windowId] \n" ) ; + M(MSG,NULL,YmsgG ) ; + M(MSG,NULL,"\twhose options are zero or more of the following:\n"); + M(MSG,NULL,"\t\td - prints debug info and performs extensive\n"); + M(MSG,NULL,"\t\t error checking\n"); + M(MSG,NULL,"\t\tn - no graphics - the default is to open the\n"); + M(MSG,NULL,"\t\t display and output graphics to an Xwindow\n"); + M(MSG,NULL,"\t\tv - verbose mode - echo output to the screen\n"); + M(MSG,NULL,"\t\tw - parasite mode - user must specify windowId\n"); + YexitPgm(PGMFAIL); } /* end syntax */ diff -Nru graywolf-0.1.5/src/twsc/mergeseg.c graywolf-0.1.6/src/twsc/mergeseg.c --- graywolf-0.1.5/src/twsc/mergeseg.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/mergeseg.c 2018-08-11 21:48:56.000000000 +0000 @@ -60,11 +60,6 @@ REVISIONS: Sat Dec 15 22:08:21 EST 1990 - modified pinloc values so that it will always be positive. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) mergeseg.c (Yale) version 4.4 12/15/90" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -85,6 +80,10 @@ static PINBOXPTR nthptrS[30], sthptrS[30], wstptrS[30], estptrS[30] ; static INT nthS, sthS, wstS, estS ; +void mergedge( PINBOXPTR netptr, INT direction ); +void rplacseg(PINBOXPTR netptr, PINBOXPTR oldnode, PINBOXPTR newnode); +void set_steiner_flag( PINBOXPTR ptr1, PINBOXPTR ptr2, PINBOXPTR ptr3 , PINBOXPTR stptr ); +void recheck_steiner_flag( PINBOXPTR stptr ); /*------------------------------------------------------------------* * The function mergeseg() tries to combines the edges incident * @@ -92,8 +91,7 @@ * new nodes. * *------------------------------------------------------------------*/ -mergeseg( netptr ) -PINBOXPTR netptr ; +void mergeseg(PINBOXPTR netptr ) { PINBOXPTR ptr ; ADJASEG *adj ; @@ -131,9 +129,7 @@ } -mergedge( netptr, direction ) -PINBOXPTR netptr ; -INT direction ; +void mergedge( PINBOXPTR netptr, INT direction ) { PINBOXPTR stptr, astptr, *dirptr, xmedian, ymedian ; INT i, n, (*funcptr)() ; @@ -215,8 +211,7 @@ } -rplacseg( netptr, oldnode, newnode ) -PINBOXPTR netptr, oldnode, newnode ; +void rplacseg(PINBOXPTR netptr, PINBOXPTR oldnode, PINBOXPTR newnode ) { ADJASEG *adj, *tmpadj ; SEGBOX *segptr ; @@ -244,8 +239,7 @@ } -set_steiner_flag( ptr1, ptr2, ptr3 , stptr ) -PINBOXPTR ptr1, ptr2, ptr3, stptr ; +void set_steiner_flag( PINBOXPTR ptr1, PINBOXPTR ptr2, PINBOXPTR ptr3 , PINBOXPTR stptr ) { PINBOXPTR hiptr, loptr ; @@ -290,8 +284,7 @@ } -recheck_steiner_flag( stptr ) -PINBOXPTR stptr ; +void recheck_steiner_flag( PINBOXPTR stptr ) { ADJASEG *adj ; SEGBOX *segptr ; diff -Nru graywolf-0.1.5/src/twsc/netgraph.c graywolf-0.1.6/src/twsc/netgraph.c --- graywolf-0.1.5/src/twsc/netgraph.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/netgraph.c 2018-08-11 21:48:56.000000000 +0000 @@ -57,24 +57,11 @@ so that it will always be positive. Tue Jan 15 20:30:05 PST 1991 - changed frees to Ysafe_frees. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) netgraph.c (Yale) version 4.7 1/15/91" ; -#endif -#endif #include "standard.h" #include "groute.h" #include "main.h" -typedef struct graph_edge_cost { - SHORT node1 ; - SHORT node2 ; - INT cost ; - INT channel ; -} -*EDGE_COST , -EDGE_COST_BOX ; /* global variable definitions */ INT *count_G = NULL; @@ -93,7 +80,13 @@ static PINBOXPTR **z_S ; static EDGE_COST *edge_dataS ; -netgraph_free_up() +INT find_set_name(INT v ); +void rebuild_netgraph(INT net ); +void rebuild_netgraph_carl(INT net ); +void remove_unnecessary_feed(INT net , INT flag ); +void do_set_union(INT i , INT j ); + +void netgraph_free_up() { Ysafe_free( count_G ) ; count_G = NULL ; @@ -103,7 +96,7 @@ Ysafe_free( vertex_G ) ; vertex_G = NULL ; } -postFeedAssgn() +void postFeedAssgn() { INT net , i , row , botrow , toprow , last_i ; @@ -193,8 +186,7 @@ } -rebuild_netgraph( net ) -INT net ; +void rebuild_netgraph(INT net ) { PINBOXPTR netptr ; @@ -392,8 +384,7 @@ * pins such that there are only one edge incident on them * *--------------------------------------------------------------------*/ -remove_unnecessary_feed( net , flag ) -INT net , flag ; +void remove_unnecessary_feed(INT net , INT flag ) { DBOXPTR dimptr ; @@ -760,8 +751,7 @@ } -find_set_name( v ) -INT v ; +INT find_set_name(INT v ) { INT i , k ; @@ -785,8 +775,7 @@ * Hopcroft and Ullman page 129 to 139 for this algorithm of * * Union and Find problem. * *--------------------------------------------------------------*/ -do_set_union( i , j ) -INT i , j ; +void do_set_union(INT i , INT j ) { INT large , small ; @@ -803,7 +792,7 @@ } -switchable_or_not() +void switchable_or_not() { SEGBOXPTR segptr ; @@ -837,7 +826,7 @@ } -free_z_memory() +void free_z_memory() { INT i , j , last_i ; @@ -863,7 +852,7 @@ -postFeedAssgn_carl() +void postFeedAssgn_carl() { INT net , i , row , botrow , toprow , last_i ; @@ -960,8 +949,7 @@ -rebuild_netgraph_carl( net ) -INT net ; +void rebuild_netgraph_carl(INT net ) { PINBOXPTR netptr ; diff -Nru graywolf-0.1.5/src/twsc/newtemp.c graywolf-0.1.6/src/twsc/newtemp.c --- graywolf-0.1.5/src/twsc/newtemp.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/newtemp.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,11 +46,6 @@ DATE: Dec 19, 1988 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) newtemp.c (Yale) version 4.3 9/7/90" ; -#endif -#endif #include "standard.h" #include @@ -75,7 +70,7 @@ static DOUBLE betaS ; /* exponential decay constant for low temp */ /* calculate static exponential time constants */ -init_acceptance_rate() +void init_acceptance_rate() { /* determine alpha */ alphaS = - log( CRITRATIO ) / HIGHTEMP ; diff -Nru graywolf-0.1.5/src/twsc/outcm.c graywolf-0.1.6/src/twsc/outcm.c --- graywolf-0.1.5/src/twsc/outcm.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/outcm.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,11 +46,6 @@ DATE: Mar 27, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) outcm.c (Yale) version 4.3 9/7/90" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -62,7 +57,7 @@ #define INTSCANSTR "%d" #endif -outcm() +void outcm() { char filename[64] ; @@ -123,7 +118,7 @@ -incm(fp) +void incm(fp) FILE *fp ; { diff -Nru graywolf-0.1.5/src/twsc/outpins1.c graywolf-0.1.6/src/twsc/outpins1.c --- graywolf-0.1.5/src/twsc/outpins1.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/outpins1.c 2018-08-11 21:48:56.000000000 +0000 @@ -62,11 +62,6 @@ DATE: Mar 27, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) outpins1.c (Yale) version 1.3 4/18/91" ; -#endif -#endif #include #include "standard.h" @@ -99,14 +94,14 @@ static INT *left_edgeS ; static FILE *fpS ; -static do_outpins(); -static do_vertical_channel(); -static do_left_vertical_channel(); -static do_right_vertical_channel(); -static do_bottom_channel(); -static do_top_channel(); +static void do_outpins(); +static void do_vertical_channel(); +static void do_left_vertical_channel(); +static void do_right_vertical_channel(); +static void do_bottom_channel(); +static void do_top_channel(); -old_outpins() +void old_outpins() { PINBOXPTR ptr1 , ptr2 , ptr ; @@ -281,7 +276,7 @@ * 9. 0 * *-------------------------------------------------------------------*/ -static do_outpins( ptr , flag ) +static void do_outpins( ptr , flag ) PINBOXPTR ptr ; int flag ; { @@ -435,7 +430,7 @@ } -static do_pseudo_pins( ptr , channel , group_number ) +static void do_pseudo_pins( ptr , channel , group_number ) PINBOXPTR ptr ; int channel , group_number ; { @@ -521,7 +516,7 @@ -static do_left_pseudo_pins( ptr , channel , group_number ) +static void do_left_pseudo_pins( ptr , channel , group_number ) PINBOXPTR ptr ; int channel , group_number ; { @@ -561,7 +556,7 @@ } -static do_right_pseudo_pins( ptr , channel , group_number ) +static void do_right_pseudo_pins( ptr , channel , group_number ) PINBOXPTR ptr ; int channel , group_number ; { @@ -600,7 +595,7 @@ -static do_vertical_channel( ptr ) +static void do_vertical_channel( ptr ) PINBOXPTR ptr ; { @@ -642,7 +637,7 @@ } -static do_left_vertical_channel( ptr ) +static void do_left_vertical_channel( ptr ) PINBOXPTR ptr ; { @@ -708,7 +703,7 @@ } -static do_right_vertical_channel( ptr ) +static void do_right_vertical_channel( ptr ) PINBOXPTR ptr ; { @@ -774,7 +769,7 @@ } -static do_bottom_channel( ptr ) +static void do_bottom_channel( ptr ) PINBOXPTR ptr ; { int x , y , group_number , layer , i ; @@ -856,7 +851,7 @@ } -static do_top_channel( ptr ) +static void do_top_channel( ptr ) PINBOXPTR ptr ; { int x , y , group_number , layer , i ; diff -Nru graywolf-0.1.5/src/twsc/outpins.c graywolf-0.1.6/src/twsc/outpins.c --- graywolf-0.1.5/src/twsc/outpins.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/outpins.c 2018-08-11 21:48:56.000000000 +0000 @@ -68,11 +68,6 @@ Thu Dec 5 21:58:34 EST 1991 - fixed problem with macro cell output pins. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) outpins.c (Yale) version 4.9 12/5/91" ; -#endif -#endif #include #include "standard.h" @@ -106,14 +101,14 @@ char *find_layer( /* pinname, layer */ ) ; -static do_outpins(); -static do_macropins(); -static do_left_vertical_channel(); -static do_right_vertical_channel(); -static do_bottom_channel(); -static do_top_channel(); +static void do_outpins(); +static void do_macropins(); +static void do_left_vertical_channel(); +static void do_right_vertical_channel(); +static void do_bottom_channel(); +static void do_top_channel(); -outpins() +void outpins() { PINBOXPTR ptr1 , ptr2 , ptr ; @@ -291,7 +286,7 @@ * 9. layer * *-------------------------------------------------------------------*/ -static do_outpins( ptr , flag ) +static void do_outpins( ptr , flag ) PINBOXPTR ptr ; INT flag ; { @@ -452,7 +447,7 @@ return ; } -static do_macropins( ptr ) +static void do_macropins( ptr ) PINBOXPTR ptr ; { @@ -514,7 +509,7 @@ return ; } -static do_left_pseudo_pins( ptr , channel , groupS_number ) +static void do_left_pseudo_pins( ptr , channel , groupS_number ) PINBOXPTR ptr ; INT channel , groupS_number ; { @@ -554,7 +549,7 @@ } -static do_right_pseudo_pins( ptr , channel , groupS_number ) +static void do_right_pseudo_pins( ptr , channel , groupS_number ) PINBOXPTR ptr ; INT channel , groupS_number ; { @@ -591,7 +586,7 @@ #endif } -static do_left_vertical_channel( ptr ) +static void do_left_vertical_channel( ptr ) PINBOXPTR ptr ; { @@ -673,7 +668,7 @@ } -static do_right_vertical_channel( ptr ) +static void do_right_vertical_channel( ptr ) PINBOXPTR ptr ; { @@ -738,7 +733,7 @@ } -static do_bottom_channel( ptr ) +static void do_bottom_channel( ptr ) PINBOXPTR ptr ; { INT x , y , groupS_number , layer , i ; @@ -824,7 +819,7 @@ } -static do_top_channel( ptr ) +static void do_top_channel( ptr ) PINBOXPTR ptr ; { INT x , y , groupS_number , layer , i ; @@ -937,7 +932,7 @@ } /* end find_layer */ -set_pin_format( flag ) +void set_pin_format( flag ) BOOL flag ; { old_formatS = flag ; diff -Nru graywolf-0.1.5/src/twsc/output.c graywolf-0.1.6/src/twsc/output.c --- graywolf-0.1.5/src/twsc/output.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/output.c 2018-08-11 21:48:56.000000000 +0000 @@ -55,11 +55,6 @@ Tue Aug 13 12:47:54 CDT 1991 - fixed create new cell file. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) output.c (Yale) version 4.14 9/23/91" ; -#endif -#endif /* #define DEC */ /* added on 06/01/90 Sury */ @@ -90,7 +85,11 @@ /* static definitions */ static char a_lineS[LRECL] ; -output() +INT load_a_lineS(FILE *fp); +void create_cel_file(); +void add_new_line( INT x_rel , INT block , char *fixed_ptr , FILE *fp ); + +void output() { FILE *fpp1 , *fpp2 ; @@ -312,7 +311,7 @@ -final_free_up() +void final_free_up() { INT i, j, k, row, pin, net, cell, chan, track ; CBOXPTR cellptr ; @@ -439,7 +438,7 @@ -create_cel_file() +void create_cel_file() { @@ -514,10 +513,7 @@ -add_new_line( x_rel , block , fixed_ptr , fp ) -INT x_rel , block ; -char *fixed_ptr ; -FILE *fp ; +void add_new_line( INT x_rel , INT block , char *fixed_ptr , FILE *fp ) { fprintf(fp, "initially %s %d from left of block %d\n", @@ -527,8 +523,7 @@ -load_a_lineS(fp) -FILE *fp ; +INT load_a_lineS(FILE *fp) { INT i ; @@ -550,7 +545,7 @@ } /* ******************************************************************** */ -density() +void density() { /* set all the cells at density */ INT row ; diff -Nru graywolf-0.1.5/src/twsc/overlap.c graywolf-0.1.6/src/twsc/overlap.c --- graywolf-0.1.5/src/twsc/overlap.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/overlap.c 2018-08-11 21:48:56.000000000 +0000 @@ -64,15 +64,10 @@ DATE: Mar 27, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) overlap.c (Yale) version 4.3 9/7/90" ; -#endif -#endif #include "ucxxglb.h" -new_old( c ) +void new_old( c ) INT c ; { @@ -172,7 +167,7 @@ */ -old_assgnto_new1( alobin , ahibin , anewlobin , anewhibin ) +void old_assgnto_new1( alobin , ahibin , anewlobin , anewhibin ) INT alobin , ahibin , anewlobin , anewhibin ; { @@ -198,7 +193,7 @@ } -new_assgnto_old1( alobin , ahibin , anewlobin , anewhibin ) +void new_assgnto_old1( alobin , ahibin , anewlobin , anewhibin ) INT alobin , ahibin , anewlobin , anewhibin ; { @@ -223,7 +218,7 @@ } } -old_assgnto_new2( a1lobin , a1hibin , a2lobin , a2hibin , +void old_assgnto_new2( a1lobin , a1hibin , a2lobin , a2hibin , b1lobin , b1hibin , b2lobin , b2hibin ) INT a1lobin , a1hibin , a2lobin , a2hibin ; INT b1lobin , b1hibin , b2lobin , b2hibin ; @@ -256,7 +251,7 @@ } -new_assgnto_old2( a1lobin , a1hibin , a2lobin , a2hibin , +void new_assgnto_old2( a1lobin , a1hibin , a2lobin , a2hibin , b1lobin , b1hibin , b2lobin , b2hibin ) INT a1lobin , a1hibin , a2lobin , a2hibin ; INT b1lobin , b1hibin , b2lobin , b2hibin ; @@ -289,7 +284,7 @@ } -sub_penal( startx , endx , block , LoBin , HiBin ) +void sub_penal( startx , endx , block , LoBin , HiBin ) INT startx , endx , block , LoBin , HiBin ; { @@ -322,7 +317,7 @@ } } -add_penal( startx , endx , block , LoBin , HiBin ) +void add_penal( startx , endx , block , LoBin , HiBin ) INT startx , endx , block , LoBin , HiBin ; { @@ -355,7 +350,7 @@ } -term_newpos( antrmptr , xcenter , ycenter , newaor ) +void term_newpos( antrmptr , xcenter , ycenter , newaor ) PINBOXPTR antrmptr ; INT xcenter , ycenter , newaor ; { diff -Nru graywolf-0.1.5/src/twsc/parser.c graywolf-0.1.6/src/twsc/parser.c --- graywolf-0.1.5/src/twsc/parser.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/parser.c 2018-08-11 21:48:56.000000000 +0000 @@ -85,9 +85,6 @@ Wed Sep 11 11:21:42 CDT 1991 - fixed for new global router feed problem. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) parser.c (Yale) version 4.40 5/15/92" ; -#endif /* #define MITLL */ @@ -127,6 +124,13 @@ extern BOOL rigidly_fixed_cellsG ; extern BOOL stand_cell_as_gate_arrayG ; +void addCell( char *cellname, INT celltype ); +void add_tile(INT left, INT bottom, INT right, INT top ); +void add_padside(char * padside); +void setPermutation( int permuteFlag ); +void add2padgroup( char *padName, BOOL ordered ); +void end_padgroup(); + /* below is what we expect to be a typical standard cell input */ /* user may change parameters if they wish. Subject to change */ #define EXPECTEDNUMCELLS 3500 @@ -144,6 +148,20 @@ } \ } \ +#define ERRORABORTINT() \ +{ \ + if( abortS ){ \ + return -1; /* don't do any work for errors */ \ + } \ +} \ + +#define ERRORABORTPOINTER() \ +{ \ + if( abortS ){ \ + return NULL; /* don't do any work for errors */ \ + } \ +} \ + /* ########################## STATIC definitions ########################### */ static INT curCellTypeS ; /* current cell type - ie, stdcell,pad etc. */ static INT curNetS ; /* current net number */ @@ -179,11 +197,11 @@ } ; -static layer_test(); -static check_pin(); +static void layer_test(); +static void check_pin(); /* ###################### END STATIC definitions ############################ */ -static get_stat_hints() +static void get_stat_hints() { FILE *fp ; /* current file */ char buffer[LRECL] ; /* temp storage */ @@ -244,12 +262,12 @@ } /* end get_stat_hints */ -set_error_flag() +void set_error_flag() { abortS = TRUE ; } /* set_error_flag */ -initialize_parser() +void initialize_parser() { INT except ; /* counter */ INT width ; /* width of exception */ @@ -309,9 +327,7 @@ } /* initialize_parser */ -addCell( cellname, celltype ) -char *cellname ; -INT celltype ; +void addCell( char *cellname, INT celltype ) { /* save current cell name and type for error messages */ curCellNameS = cellname ; @@ -409,8 +425,7 @@ } /* end addCell */ -add_tile( left, bottom, right, top ) -INT left, bottom, right, top ; +void add_tile(INT left, INT bottom, INT right, INT top ) { INT width ; /* width of tile */ INT height ; /* height of tile */ @@ -464,7 +479,7 @@ } /* end add_tile */ -add_initial_orient( orient ) +void add_initial_orient( orient ) INT orient ; { @@ -484,7 +499,7 @@ { INT *data ; /* pointer to allocated space for swap_group record */ - ERRORABORT() ; + ERRORABORTPOINTER() ; /* how to add the data to the hash table */ /* create space for data */ @@ -494,8 +509,7 @@ return( (char *) data ) ; } /* end add_swap_func */ -add_swap_group( swap_name ) -char *swap_name ; +void add_swap_group(char * swap_name ) { INT i ; /* counter */ INT *groupptr ; /* the return group from searching in hash table */ @@ -562,7 +576,7 @@ } /* end add_swap_group */ -add_pingroup() +void add_pingroup() { INT i ; /* counter */ INT j ; /* counter */ @@ -590,7 +604,7 @@ } /* end add_pingroup */ -end_pingroup() +void end_pingroup() { pin_group_light_is_onS = 0 ; @@ -600,7 +614,7 @@ if (need_swap_groupS == TRUE) swap_groupS = 0; } /* end end_pingroup */ -static add_implicit_feed( pin_name, signal, layer, xpos, ypos ) +static void add_implicit_feed( pin_name, signal, layer, xpos, ypos ) char *pin_name, *signal ; INT layer, xpos, ypos ; { @@ -638,7 +652,7 @@ { INT *data ; /* pointer to allocated space for net record in hashtable */ - ERRORABORT() ; + ERRORABORTPOINTER() ; /* how to add the data to the hash table */ /* create space for data */ data = (INT *) Ysafe_malloc( sizeof(INT) ) ; @@ -649,9 +663,9 @@ static char *add_pin_func() { - INT *data ; /* pointer to allocated space for pin_grp_hash record */ + PINLIST *data ; /* pointer to allocated space for pin_grp_hash record */ - ERRORABORT() ; + ERRORABORTPOINTER() ; /* how to add the data to the hash table */ /* create space for data */ @@ -659,7 +673,7 @@ return( (char *) data ) ; } /* end add_swap_func */ -add_pin( pin_name, signal, layer, xpos, ypos ) +void add_pin( pin_name, signal, layer, xpos, ypos ) char *pin_name, *signal ; INT layer, xpos, ypos ; { @@ -796,7 +810,7 @@ if( pin_group_light_is_onS > 0 ) { pin_ptr = (PINLISTPTR) Yhash_add( swap_group_listG[swap_groupS].pin_grp_hash, - ptrS->cname, add_pin_func, &newflag ) ; + ptrS->cname, add_pin_func, (BOOL *) &newflag ) ; if (newflag) { /* This is the first pin group for this swap group in this cell */ @@ -861,7 +875,7 @@ } /* end add_pin */ -static check_pin( xpos, ypos, pinname ) +static void check_pin( xpos, ypos, pinname ) INT xpos, ypos ; char *pinname ; { @@ -888,7 +902,7 @@ } } /* end check_pin */ -add_equiv( equiv_name, layer, eq_xpos, eq_ypos, unequiv_flag ) +void add_equiv( equiv_name, layer, eq_xpos, eq_ypos, unequiv_flag ) char *equiv_name ; INT layer, eq_xpos, eq_ypos ; BOOL unequiv_flag ; @@ -967,11 +981,9 @@ } } /* end add_equiv */ -add_port( portname, signal, layer, xpos, ypos ) -char *portname, *signal ; -INT xpos, ypos ; +int add_port(char *portname, char *signal, int layer, INT xpos, INT ypos ) { - ERRORABORT() ; + ERRORABORTINT() ; addCell( portname, PORTTYPE ) ; add_tile( 0, 0, 0, 0 ) ; /* now perform overrides */ @@ -987,7 +999,7 @@ -static layer_test( layer ) +static void layer_test( layer ) INT layer ; { if( layer != 0 && layer != 1 && layer != 2 && layer != 3 ) { @@ -1001,14 +1013,14 @@ } } /* end layer_test */ -init_legal_blocks( numblocks ) +void init_legal_blocks( numblocks ) INT numblocks ; { ERRORABORT() ; ptrS->cclass = 0 ; } /* end init_legal_blocks */ -add_legal_blocks( block_class ) +void add_legal_blocks( block_class ) INT block_class ; { INT row ; /* row counter */ @@ -1043,14 +1055,14 @@ ptrS->cbclass[index] += bit_class ; } /* end add_legal_blocks */ -set_mirror_flag() +void set_mirror_flag() { ERRORABORT() ; /* this is for the current cell */ ptrS->orflag = 0 ; } /* end set_mirror_flag */ -add_orient( orient ) +void add_orient( orient ) INT orient ; { ERRORABORT() ; @@ -1058,7 +1070,7 @@ ptrS->corient = orient ; } /* end add_orient */ -fix_placement( fixed_type, from, fixed_loc, block ) +void fix_placement( fixed_type, from, fixed_loc, block ) char *fixed_type, *fixed_loc ; INT from, block; { @@ -1146,7 +1158,7 @@ } } /* end fix_placement */ -add_extra_cells() +void add_extra_cells() { INT row ; /* row counter */ @@ -1257,13 +1269,13 @@ } } /* end add_extra_cells */ -static INT free_swap_data( data ) +static void free_swap_data( data ) INT *data ; { Ysafe_free( data ) ; } /* free_swap_data */ -static trans_tile( ptr, orient ) +static void trans_tile( ptr, orient ) CBOXPTR ptr ; INT orient ; { @@ -1286,7 +1298,7 @@ ptr->cheight = t - b ; } /* end trans_tile */ -static build_pad_group( side, sidename, padgroupname ) +static void build_pad_group( side, sidename, padgroupname ) INT side ; char *sidename, *padgroupname ; { @@ -1319,7 +1331,7 @@ } } /* end build_pad_group() */ -cleanup_readcells() +void cleanup_readcells() { INT trl ; /* total_row_length */ INT row ; /* row counter */ @@ -1784,14 +1796,14 @@ } if( swappable_gates_existG ) { - Yhash_table_delete( swap_hash_tableS, free_swap_data ) ; + Yhash_table_delete( swap_hash_tableS, (INT (*)()) free_swap_data ) ; } return ; } /* end cleanup_readcells */ -not_supported( object ) +void not_supported( object ) char *object ; { sprintf( YmsgG, "%s is not supported -- sorry!\n", object ) ; @@ -1804,7 +1816,7 @@ return( net_hash_tableS ) ; } /* end get_net_table */ -add_eco() +void add_eco() { ERRORABORT() ; ECOs_existG++ ; @@ -1813,7 +1825,7 @@ /* ***************************************************************** */ /* added below for pad capability */ -init_corners() +void init_corners() { minxS = INT_MAX ; maxxS = INT_MIN ; @@ -1827,7 +1839,7 @@ ptAllocS = 4 ; } /* end init_corners */ -add_corner( x, y ) +void add_corner( x, y ) INT x, y ; { INT pt ; /* point counter */ @@ -1851,7 +1863,7 @@ pptrS->ypoints[pt] = y ; } /* end add_corner */ -process_corners() +void process_corners() { INT xcenter ; /* center of cell */ INT ycenter ; /* center of cell */ @@ -1892,8 +1904,7 @@ } /* end process_corners */ -add_padside( padside ) -char *padside ; +void add_padside(char * padside ) { INT numsides ; /* length of side restriction string */ INT i ; /* counter */ @@ -1973,7 +1984,7 @@ } } /* end add_padside */ -add_sidespace( lower, upper ) +void add_sidespace( lower, upper ) DOUBLE lower, upper ; { ERRORABORT() ; @@ -2014,14 +2025,14 @@ /* ***************************************************************** */ /* set whether a pad group can be permuted */ -setPermutation( permuteFlag ) +void setPermutation( int permuteFlag ) { ERRORABORT() ; pptrS->permute = permuteFlag ; } /* end setPermutation */ /* ***************************************************************** */ -set_old_format( padside ) +void set_old_format( padside ) char *padside ; { ERRORABORT() ; @@ -2044,9 +2055,8 @@ } /* set_old_format */ /* add this pad to the current pad group */ -add2padgroup( padName, ordered ) -char *padName ; -BOOL ordered ; /* ordered flag is true if pad is fixed in padgroup */ +void add2padgroup( char *padName, BOOL ordered ) +//BOOL ordered ; /* ordered flag is true if pad is fixed in padgroup */ { INT i, endofpads, endofgroups ; @@ -2113,7 +2123,7 @@ } /* end add2PadGroup */ -end_padgroup() +void end_padgroup() { ERRORABORT() ; diff -Nru graywolf-0.1.5/src/twsc/paths.c graywolf-0.1.6/src/twsc/paths.c --- graywolf-0.1.5/src/twsc/paths.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/paths.c 2018-08-11 21:48:56.000000000 +0000 @@ -79,9 +79,6 @@ Fri Nov 8 01:08:41 EST 1991 - rewrote pad output file for easier understanding. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) paths.c version 4.12 4/2/92" ; -#endif /* #define ZERO_CHECK */ @@ -101,9 +98,13 @@ INT dcalc_max_path_len() ; INT dcalc_path_len(INT, INT); +void add2path_set( INT path ); +void clear_path_set(); +BOOL member_net_set( int net ); + static INT errorboundS = 0 ; -print_paths( ) +void print_paths( ) { char filename[LRECL] ; @@ -375,7 +376,7 @@ } /* end function calc_incr_time */ -update_time( cell ) +void update_time( cell ) INT cell ; { @@ -483,7 +484,7 @@ } /* end function calc_incr_time2 */ -update_time2() +void update_time2() { PATHPTR path ; PSETPTR pathlist, enum_path_set() ; @@ -517,7 +518,7 @@ static INT path_set_countS ; /* current set count */ /* initialize set */ -init_path_set() +void init_path_set() { INT i ; @@ -530,8 +531,7 @@ } /* end initset */ /* add a path to the set if not already in set */ -add2path_set( path ) -INT path ; +void add2path_set( INT path ) { PSETPTR temp, cpath ; @@ -564,7 +564,7 @@ return( path_set_listS ) ; } -clear_path_set() +void clear_path_set() { path_set_countS ++ ; path_set_listS = NULL ; @@ -584,14 +584,14 @@ static INT net_set_count ; /* current set count */ /* initialize set */ -init_net_set() +void init_net_set() { net_set_array = (INT *) Ysafe_calloc((numnetsG+1), sizeof(INT) ); net_set_count = 1 ; } /* end initset */ /* add a net to the set if not already in set */ -add2net_set( net ) +void add2net_set( net ) INT net ; { if( net >= 1 || net <= numnetsG ){ @@ -603,7 +603,7 @@ } } /* end add2net_set */ -BOOL member_net_set( net ) +BOOL member_net_set( int net ) /* test for membership */ { if( net_set_array[net] == net_set_count ){ @@ -613,7 +613,7 @@ } } /* end member_net_set */ -clear_net_set() +void clear_net_set() { /* to clear set we only need to increment net_set_count */ /* we can use this set up to 2 Gig times without any problem */ @@ -789,7 +789,7 @@ return( 0 ) ; } /* end dprint_error() */ -dverify_nets() +void dverify_nets() { INT net ; /* net of path */ @@ -805,7 +805,7 @@ } } /* end dverify_nets */ -dprint_paths( cell ) +void dprint_paths( cell ) { INT path_num ; /* name of path */ INT net ; /* net of path */ @@ -839,7 +839,7 @@ } /* end for( pptr... */ } /* end dprint_paths() */ -dprint_net_set() +void dprint_net_set() { INT net ; @@ -877,7 +877,7 @@ -calc_init_timeFactor() +void calc_init_timeFactor() { #ifdef ZERO_CHECK diff -Nru graywolf-0.1.5/src/twsc/placepads.c graywolf-0.1.6/src/twsc/placepads.c --- graywolf-0.1.5/src/twsc/placepads.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/placepads.c 2018-08-11 21:48:56.000000000 +0000 @@ -79,9 +79,6 @@ options when only a fraction of the pins to pads have connections to the core. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) placepads.c version 4.15 5/12/92" ; -#endif #define PAD_VARS @@ -95,12 +92,14 @@ extern INT **pairArrayG ; /* ***************** STATIC FUNCTION DEFINITIONS ******************* */ -static find_optimum_locations( P1(void) ) ; -static place_pad( P2(PADBOXPTR pad,INT bestside ) ) ; -static place_children( P5(PADBOXPTR pad,INT side,DOUBLE lb,DOUBLE ub,BOOL sr) ) ; +static void find_optimum_locations( P1(void) ) ; +static void place_pad( P2(PADBOXPTR pad,INT bestside ) ) ; +static void place_children( P5(PADBOXPTR pad,INT side,DOUBLE lb,DOUBLE ub,BOOL sr) ) ; static INT find_cost_for_a_side(P5(PADBOXPTR pad,INT side,DOUBLE lb,DOUBLE ub, BOOL spacing_restricted ) ) ; -static find_core( P1(void) ) ; +static void find_core( P1(void) ) ; + +void get_global_pos(INT cell, INT *l, INT *b, INT *r, INT *t); /* ***************** STATIC VARIABLE DEFINITIONS ******************* */ static BOOL virtualCoreS = FALSE ; @@ -116,7 +115,7 @@ spacing and ordering. ____________________________________________________________________*/ -placepads() +void placepads() { if( padspacingG == EXACT_PADS ){ return ; @@ -155,7 +154,7 @@ } /* end placepads */ /* ***************************************************************** */ -static find_optimum_locations() +static void find_optimum_locations() { INT i ; /* pad counter */ INT side ; /* loop thru valid sides */ @@ -414,7 +413,7 @@ **** are set in those routines. Otherwise set sumposS and sumtieS **** to their proper values. ***/ -static place_pad( pad, bestside ) +static void place_pad( pad, bestside ) PADBOXPTR pad ; INT bestside ; { @@ -452,7 +451,7 @@ /**** RECURSIVELY SET THE PADSIDE OF ALL CHILDREN OF THE ROOT PAD TO THE **** PADSIDE OF THE PARENT. GIVEN THAT SIDE, SET THE OPTIMAL CXCENTER */ -static place_children( pad, side, lb, ub, spacing_restricted ) +static void place_children( pad, side, lb, ub, spacing_restricted ) PADBOXPTR pad ; INT side ; DOUBLE lb, ub ; @@ -539,7 +538,7 @@ /* ***************************************************************** */ #ifdef DEBUG -print_pads( message, array, howmany ) +void print_pads( message, array, howmany ) char *message ; PADBOXPTR *array ; INT howmany ; @@ -570,7 +569,7 @@ /* ***************************************************************** */ -static find_core() +static void find_core() { INT minx, maxx ; INT miny, maxy ; @@ -651,7 +650,7 @@ } /* end FindCore */ /* turn virtual core on and off */ -setVirtualCore( flag ) +void setVirtualCore( flag ) BOOL flag ; { virtualCoreS = flag ; @@ -659,9 +658,7 @@ /* given a cell it returns bounding box of cell in global coordinates */ -get_global_pos( cell, l, b, r, t ) -INT cell ; -INT *l, *r, *b, *t ; +void get_global_pos(INT cell, INT *l, INT *b, INT *r, INT *t ) { CBOXPTR ptr ; @@ -681,7 +678,7 @@ } /* end get_global_pos */ -placepads_retain_side( flag ) +void placepads_retain_side( flag ) BOOL flag; { retain_sideS = flag ; diff -Nru graywolf-0.1.5/src/twsc/readblck.c graywolf-0.1.6/src/twsc/readblck.c --- graywolf-0.1.5/src/twsc/readblck.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/readblck.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,14 +49,10 @@ Wed Sep 11 11:25:16 CDT 1991 - updated for new global router algorithm (feeds). ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) readblck.c (Yale) version 4.10 11/8/91" ; -#endif -#endif #define READBLCK_VARS +#include #include "standard.h" #include "main.h" #include "parser.h" @@ -78,7 +74,7 @@ /* global variables */ -readblck( fp ) +void readblck( fp ) FILE *fp ; { @@ -286,7 +282,7 @@ } else if( strcmp( input , "mirror" ) == 0 ) { barrayG[block]->borient = 2 ; } else if( strcmp( input , "relative_length" ) == 0 ) { - fscanf( fp , " %f " , &relLen ) ; + fscanf( fp , " %lf " , &relLen ) ; relativeLenG[block] = relLen ; uniform_rowsG = 0 ; } diff -Nru graywolf-0.1.5/src/twsc/readcell.c graywolf-0.1.6/src/twsc/readcell.c --- graywolf-0.1.5/src/twsc/readcell.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/readcell.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,9 +37,6 @@ * */ -#ifndef lint -static char yysccsid[] = "@(#)yaccpar 1.8 (Berkeley) 01/20/90"; -#endif #define YYBYACC 1 /* ----------------------------------------------------------------- FILE: readcell.c <- readcell.y <- readcell.l @@ -79,9 +76,6 @@ Tue Aug 13 12:52:19 CDT 1991 - fixed problem with mirror and created_new_cell file. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) readcell.y (Yale) version 4.16 8/13/91" ; -#endif #include #include @@ -673,7 +667,7 @@ /* ********************* #include "readcell_l.h" *******************/ /* ********************* #include "readcell_l.h" *******************/ -readcell( fp ) +void readcell( fp ) FILE *fp ; { #ifdef YYDEBUG @@ -691,7 +685,7 @@ cleanup_readcells(); } /* end readcell */ -yyerror(s) +void yyerror(s) char *s; { if( rowsG > 0 ){ @@ -706,7 +700,7 @@ set_error_flag() ; } /* end yyerror */ -yywrap() +int yywrap() { return(1); } diff -Nru graywolf-0.1.5/src/twsc/readcell.h graywolf-0.1.6/src/twsc/readcell.h --- graywolf-0.1.5/src/twsc/readcell.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/readcell.h 2018-08-11 21:48:56.000000000 +0000 @@ -6,9 +6,6 @@ DATE: Aug 7, 1988 REVISIONS: ----------------------------------------------------------------- */ -/* ***************************************************************** - static char SccsId[] = "@(#) readcell.h version 4.2 9/7/90" ; -***************************************************************** */ #define yyact READCEL_yyact #define yyback READCEL_yyback diff -Nru graywolf-0.1.5/src/twsc/readcell_l.h graywolf-0.1.6/src/twsc/readcell_l.h --- graywolf-0.1.5/src/twsc/readcell_l.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/readcell_l.h 2018-08-11 21:48:56.000000000 +0000 @@ -49,12 +49,15 @@ #define token(x) x /* makes it look like regular lex */ #define END(v) (v-1 + sizeof(v) / sizeof( v[0] ) ) /* for table lookup */ -static screen() ; -static check_line_count() ; +static INT screen() ; +static void check_line_count() ; static INT line_countS = 0 ; +static int yylook(void); +static int yyback(int *p, int m); + # define YYNEWLINE 10 -yylex(){ +INT yylex(){ int nstr; extern int yyprevious; while((nstr = yylook()) >= 0) yyfussy: switch(nstr){ @@ -170,7 +173,7 @@ "unequiv", token(UNEQUIV) } ; -static int screen() +static INT screen() { int c ; struct rw_table *low = rwtable, /* ptr to beginning */ @@ -195,7 +198,7 @@ } /* end screen function */ -static int check_line_count( s ) +static void check_line_count( s ) char *s ; { if( s ){ @@ -512,7 +515,7 @@ int *yyfnd; extern struct yysvf *yyestate; int yyprevious = YYNEWLINE; -yylook(){ +static int yylook(){ register struct yysvf *yystate, **lsp; register struct yywork *yyt; struct yysvf *yyz; @@ -559,7 +562,7 @@ } # endif yyr = yyt; - if ( (int)yyt > (int)yycrank){ + if ( (INT)yyt > (INT)yycrank){ yyt = yyr + yych; if (yyt <= yytop && yyt->verify+yysvec == yystate){ if(yyt->advance+yysvec == YYLERR) /* error transitions */ @@ -569,7 +572,7 @@ } } # ifdef YYOPTIM - else if((int)yyt < (int)yycrank) { /* r < yycrank */ + else if((INT)yyt < (INT)yycrank) { /* r < yycrank */ yyt = yyr = yycrank+(yycrank-yyt); # ifdef LEXDEBUG if(debug)fprintf(yyout,"compressed state\n"); @@ -661,8 +664,7 @@ # endif } } -yyback(p, m) - int *p; +static int yyback(int *p, int m) { if (p==0) return(0); while (*p) @@ -673,16 +675,16 @@ return(0); } /* the following are only used in the lex library */ -yyinput(){ +int yyinput(){ if (yyin == NULL) yyin = stdin; return(input()); } -yyoutput(c) +void yyoutput(c) int c; { if (yyout == NULL) yyout = stdout; output(c); } -yyunput(c) +void yyunput(c) int c; { unput(c); } diff -Nru graywolf-0.1.5/src/twsc/readnets.c graywolf-0.1.6/src/twsc/readnets.c --- graywolf-0.1.5/src/twsc/readnets.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/readnets.c 2018-08-11 21:48:56.000000000 +0000 @@ -37,9 +37,6 @@ * */ -#ifndef lint -static char yysccsid[] = "@(#)yaccpar 1.8 (Berkeley) 01/20/90"; -#endif #define YYBYACC 1 /* ----------------------------------------------------------------- FILE: readnets.c <- readnets_yacc <- readnets_lex @@ -67,15 +64,11 @@ Thu Apr 18 01:55:39 EDT 1991 - added debug function and fixed for new library names. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) readnets.y (Yale) version 4.12 4/21/91" ; -#endif -#endif #include #include #include +#include #include "readnets.h" /* redefine yacc and lex globals */ #include "standard.h" #include "main.h" @@ -274,12 +267,15 @@ /* ********************* #include "readnets_l.h" *******************/ -static free_net_data(); -static bad_net(); +static void free_net_data(); +static void bad_net(); char *Ystrclone(); +void check_paths(); +void build_path_array(); +void add_paths_to_cells(); -readnets( fp ) +void readnets( fp ) FILE *fp ; { /* static free_net_data() ; */ @@ -310,17 +306,17 @@ init_net_set() ; add_paths_to_cells() ; /* free hash table */ - Yhash_table_delete( net_hash_tableS , free_net_data ) ; + Yhash_table_delete( net_hash_tableS , (INT (*)()) free_net_data ) ; } /* end readnets */ -static free_net_data( data ) +static void free_net_data( data ) INT *data ; { Ysafe_free( data ) ; } /* free_swap_data */ -process_net_rec( netname ) +void process_net_rec( netname ) char *netname ; { INT *data ; @@ -334,21 +330,21 @@ } /* end process_net_rec */ -ignore_net() +void ignore_net() { if( netS ){ netarrayG[netS]->ignore = 1 ; } } /* end ignore_net */ -ignore_route() +void ignore_route() { if( netS ){ netarrayG[netS]->ignore = -1 ; } } /* end ignore_route */ -yyerror(s) +void yyerror(s) char *s; { sprintf(YmsgG,"problem reading %s.net:", cktNameG ); @@ -360,12 +356,12 @@ abortFlagS = TRUE ; } -yywrap() +int yywrap() { return(1); } -add_path( pathFlag, net ) +void add_path( pathFlag, net ) BOOL pathFlag ; char *net ; { @@ -404,7 +400,7 @@ } /* end add_path */ -end_path(lower_bound, upper_bound, priority ) +void end_path(lower_bound, upper_bound, priority ) INT lower_bound, upper_bound, priority ; { GLISTPTR nets, path_ptr, tempPath ; @@ -443,7 +439,7 @@ } /* end function end_path */ -check_paths() +void check_paths() { INT i ; /* counter */ DBOXPTR nptr ; /* traverse the nets */ @@ -462,7 +458,7 @@ } /* check_paths */ -build_path_array() +void build_path_array() { INT i ; PATHPTR curPtr ; @@ -486,7 +482,7 @@ return( total_num_pathS ) ; } /* end get_total_paths */ -add_paths_to_cells() +void add_paths_to_cells() { INT i ; INT net_number ; @@ -530,7 +526,7 @@ } } -static bad_net( net, fatal ) +static void bad_net( net, fatal ) char *net ; BOOL fatal ; { diff -Nru graywolf-0.1.5/src/twsc/readnets_l.h graywolf-0.1.6/src/twsc/readnets_l.h --- graywolf-0.1.5/src/twsc/readnets_l.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/readnets_l.h 2018-08-11 21:48:56.000000000 +0000 @@ -52,10 +52,13 @@ #define END(v) (v-1 + sizeof(v) / sizeof( v[0] ) ) /* for table lookup */ static INT screen() ; -static INT check_line_count() ; +static void check_line_count() ; + +static int yylook(void); +static int yyback(int *p, int m); # define YYNEWLINE 10 -yylex(){ +INT yylex(){ int nstr; extern int yyprevious; while((nstr = yylook()) >= 0) yyfussy: switch(nstr){ @@ -154,7 +157,7 @@ } /* end screen function */ -static INT check_line_count( s ) +static void check_line_count( s ) char *s ; { if( s ){ @@ -470,7 +473,7 @@ int *yyfnd; extern struct yysvf *yyestate; int yyprevious = YYNEWLINE; -yylook(){ +static int yylook(){ register struct yysvf *yystate, **lsp; register struct yywork *yyt; struct yysvf *yyz; @@ -516,7 +519,7 @@ } # endif yyr = yyt; - if ( (int)yyt > (int)yycrank){ + if ( (INT)yyt > (INT)yycrank){ yyt = yyr + yych; if (yyt <= yytop && yyt->verify+yysvec == yystate){ if(yyt->advance+yysvec == YYLERR) /* error transitions */ @@ -526,7 +529,7 @@ } } # ifdef YYOPTIM - else if((int)yyt < (int)yycrank) { /* r < yycrank */ + else if((INT)yyt < (INT)yycrank) { /* r < yycrank */ yyt = yyr = yycrank+(yycrank-yyt); # ifdef LEXDEBUG if(debug)fprintf(yyout,"compressed state\n"); @@ -618,8 +621,7 @@ # endif } } -yyback(p, m) - int *p; +static int yyback(int *p, int m) { if (p==0) return(0); while (*p) @@ -630,16 +632,16 @@ return(0); } /* the following are only used in the lex library */ -yyinput(){ +INT yyinput(){ if (yyin == NULL) yyin = stdin; return(input()); } -yyoutput(c) +void yyoutput(c) int c; { if (yyout == NULL) yyout = stdout; output(c); } -yyunput(c) +void yyunput(c) int c; { unput(c); } diff -Nru graywolf-0.1.5/src/twsc/readpar.c graywolf-0.1.6/src/twsc/readpar.c --- graywolf-0.1.5/src/twsc/readpar.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/readpar.c 2018-08-11 21:48:56.000000000 +0000 @@ -65,11 +65,6 @@ Fri Nov 8 01:13:18 EST 1991 - added even the rows maximally. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) readpar.c (Yale) version 4.26 5/12/92" ; -#endif -#endif #define READPAR_VARS #define NOTSPECIFIED -1 @@ -139,12 +134,12 @@ static BOOL abortS = FALSE ; static BOOL readparamS = FALSE ; -static init_read_par(); -static readparam(); -static process_readpar(); -static err_msg(); +static void init_read_par(); +static void readparam(); +static void process_readpar(); +static void err_msg(); -readParFile() +void readParFile() { init_read_par() ; readparam( TWSC ) ; @@ -152,7 +147,7 @@ process_readpar() ; } -static init_read_par() +static void init_read_par() { /* initialization of variables */ SGGRG = FALSE ; @@ -178,7 +173,7 @@ file_conversionG = FALSE ; } /* end init_read_par */ -static readparam( parfile ) +static void readparam( parfile ) INT parfile ; { @@ -686,7 +681,7 @@ } /* end readparam */ -static process_readpar() +static void process_readpar() { char *layer ; /* name of layer */ @@ -819,7 +814,7 @@ return ; } /* end process_readpar */ -yaleIntro() +void yaleIntro() { INT i ; @@ -867,7 +862,7 @@ } /* end yaleIntro */ -static err_msg( keyword ) +static void err_msg( keyword ) char *keyword ; { OUT2("The value for %s was", keyword ); diff -Nru graywolf-0.1.5/src/twsc/reconfig.c graywolf-0.1.6/src/twsc/reconfig.c --- graywolf-0.1.5/src/twsc/reconfig.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/reconfig.c 2018-08-11 21:48:56.000000000 +0000 @@ -51,11 +51,6 @@ Wed Sep 11 11:27:46 CDT 1991 - added user output info for blocks. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) reconfig.c (Yale) version 4.11 4/2/92" ; -#endif -#endif #include "standard.h" #include "readpar.h" @@ -114,7 +109,7 @@ } /* end reconfig */ -static configuref() +static void configuref() { INT row ; INT cell ; @@ -172,14 +167,14 @@ } /* end configuref */ -read_feeds( fp ) +void read_feeds( fp ) FILE *fp ; { fscanf( fp , INTSCANSTR , &feed_lengthS ) ; feed_length_setS = TRUE ; } /* end read_feeds */ -save_feeds( fp ) +void save_feeds( fp ) FILE *fp ; { fprintf( fp, "%d\n", feed_lengthS ) ; diff -Nru graywolf-0.1.5/src/twsc/rmoverlap.c graywolf-0.1.6/src/twsc/rmoverlap.c --- graywolf-0.1.5/src/twsc/rmoverlap.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/rmoverlap.c 2018-08-11 21:48:56.000000000 +0000 @@ -66,15 +66,12 @@ REVISIONS: Sat Dec 15 22:08:21 EST 1990 - modified pinloc values so that it will always be positive. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) rmoverlap.c (Yale) version 4.4 12/15/90" ; -#endif -#endif #include "standard.h" #include "groute.h" +INT check_connectivity(INT net ); + /* global variable references */ extern BOOL connectFlagG ; PINBOXPTR depth_first_search() ; @@ -83,7 +80,13 @@ static INT *segcountS ; static SEGBOXPTR **chan_segS ; -assgn_channel_to_seg() +void rm_segm_overlap(SEGBOXPTR *checkseg , INT m ); +void replace_seg(PINBOXPTR netptr, PINBOXPTR oldnode, PINBOXPTR newnode ); +void add_adj(SEGBOXPTR segptr, PINBOXPTR node ); +void check_overlap_at_pin(PINBOXPTR ptr ); +void depth_first_check(PINBOXPTR ptr , SEGBOXPTR oldedge ); + +void assgn_channel_to_seg() { PINBOXPTR ptr1 , ptr2 ; @@ -138,7 +141,7 @@ } -free_chan_seg() +void free_chan_seg() { INT i ; @@ -150,7 +153,7 @@ } -remove_overlap_segment( net ) +void remove_overlap_segment( net ) INT net ; { @@ -196,9 +199,7 @@ } -rm_segm_overlap( checkseg , m ) -SEGBOXPTR *checkseg ; -INT m ; +void rm_segm_overlap(SEGBOXPTR *checkseg , INT m ) { SEGBOXPTR aseg , bseg , seg ; @@ -372,8 +373,7 @@ } -replace_seg( netptr, oldnode, newnode ) -PINBOXPTR netptr , oldnode , newnode ; +void replace_seg(PINBOXPTR netptr, PINBOXPTR oldnode, PINBOXPTR newnode ) { ADJASEGPTR adj, tmpadj ; SEGBOXPTR segptr ; @@ -409,9 +409,7 @@ } -add_adj( segptr, node ) -SEGBOXPTR segptr ; -PINBOXPTR node ; +void add_adj(SEGBOXPTR segptr, PINBOXPTR node ) { ADJASEG *adjptr ; @@ -422,8 +420,7 @@ } -check_overlap_at_pin( ptr ) -PINBOXPTR ptr ; +void check_overlap_at_pin(PINBOXPTR ptr ) { PINBOXPTR aptr , bptr ; @@ -532,8 +529,7 @@ } -check_connectivity( net ) -INT net ; +INT check_connectivity(INT net ) { INT correctness = 1 ; PINBOXPTR ptr , hdptr ; @@ -558,9 +554,7 @@ return( correctness ) ; } -depth_first_check( ptr , oldedge ) -PINBOXPTR ptr ; -SEGBOXPTR oldedge ; +void depth_first_check(PINBOXPTR ptr , SEGBOXPTR oldedge ) { PINBOXPTR nextptr ; SEGBOXPTR segptr ; diff -Nru graywolf-0.1.5/src/twsc/rowevener.c graywolf-0.1.6/src/twsc/rowevener.c --- graywolf-0.1.5/src/twsc/rowevener.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/rowevener.c 2018-08-11 21:48:56.000000000 +0000 @@ -51,11 +51,6 @@ DATE: Mar 27, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) rowevener.c (Yale) version 4.7 12/5/91" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -74,8 +69,9 @@ static INT *expect_row_rightS , *expect_row_lengthS ; static INT *cell_kickedS ; +void decide_right_most_in_class(); -rowevener() +void rowevener() { INT i , n , row , *addnum , add_to_this_row , total_remaining ; @@ -129,7 +125,7 @@ } -decide_right_most_in_class() +void decide_right_most_in_class() { INT n , row , row_right ; diff -Nru graywolf-0.1.5/src/twsc/savewolf.c graywolf-0.1.6/src/twsc/savewolf.c --- graywolf-0.1.5/src/twsc/savewolf.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/savewolf.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,12 +49,8 @@ and the .res file are consistent. Thu Sep 19 16:36:02 EDT 1991 - added more error checking. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) savewolf.c (Yale) version 4.6 9/19/91" ; -#endif -#endif +#include #include "standard.h" #include "main.h" #include "groute.h" @@ -69,7 +65,7 @@ #define INTSCANSTR "%d" #endif -savewolf(flag) +void savewolf(flag) INT flag ; { @@ -140,7 +136,7 @@ return ; } -TW_oldin( fp ) +void TW_oldin( fp ) FILE *fp ; { @@ -162,7 +158,7 @@ fscanf( fp , "%lf" , &roLenConG ) ; /* no longer use cost_scale_factor but save for backwards compatibility */ fscanf( fp , "%lf" , &cost_scale_factor ) ; -fscanf( fp , INTSCANSTR , &estimate_feedsG ) ; +fscanf( fp , "%d" , &estimate_feedsG ) ; read_feeds( fp ) ; read_control( fp ) ; diff -Nru graywolf-0.1.5/src/twsc/seagate.c graywolf-0.1.6/src/twsc/seagate.c --- graywolf-0.1.5/src/twsc/seagate.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/seagate.c 2018-08-11 21:48:56.000000000 +0000 @@ -44,11 +44,6 @@ DATE: Apr 7, 1990 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) seagate.c (Yale) version 4.7 3/7/91" ; -#endif -#endif #include "standard.h" @@ -66,7 +61,7 @@ extern BOOL min_total_densityG ; extern BOOL stand_cell_as_gate_arrayG ; -seagate_input() +void seagate_input() { FILE *fp ; CBOXPTR cellptr ; diff -Nru graywolf-0.1.5/src/twsc/sort.c graywolf-0.1.6/src/twsc/sort.c --- graywolf-0.1.5/src/twsc/sort.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/sort.c 2018-08-11 21:48:56.000000000 +0000 @@ -63,26 +63,13 @@ DATE: Mar 27, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) sort.c (Yale) version 4.3 9/7/90" ; -#endif -#endif #include "standard.h" #include "groute.h" #include "feeds.h" -typedef struct graph_edge_cost { - SHORT node1 ; - SHORT node2 ; - INT cost ; - INT channel ; -} -*EDGE_COST , -EDGE_COST_BOX ; -compare_cost( a , b ) +INT compare_cost( a , b ) EDGE_COST *a , *b ; { return( (*a)->cost - (*b)->cost ) ; @@ -107,7 +94,7 @@ return( (*a)->netptr->xpos - (*b)->netptr->xpos ) ; } -comparepinx( a , b ) +INT comparepinx( a , b ) PINBOXPTR *a , *b ; { return( (*a)->xpos - (*b)->xpos ) ; diff -Nru graywolf-0.1.5/src/twsc/sortpad.c graywolf-0.1.6/src/twsc/sortpad.c --- graywolf-0.1.5/src/twsc/sortpad.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/sortpad.c 2018-08-11 21:48:56.000000000 +0000 @@ -50,9 +50,6 @@ Tue Mar 12 17:09:30 CST 1991 - fixed initialization problem with permute_pads. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) sortpad.c version 4.6 3/12/91" ; -#endif #include #include @@ -70,7 +67,7 @@ PAD SORTING ROUTINES *******************************************************************************/ -sort_pads() +void sort_pads() { INT i ; /* pad counter */ INT pos ; /* position in place array */ diff -Nru graywolf-0.1.5/src/twsc/sortpin.c graywolf-0.1.6/src/twsc/sortpin.c --- graywolf-0.1.5/src/twsc/sortpin.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/sortpin.c 2018-08-11 21:48:56.000000000 +0000 @@ -63,11 +63,6 @@ call sortpin1 which is used during a gateswap. Also added new sortpin2 for gateswap between two cells. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) sortpin.c (Yale) version 4.3 9/7/90" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -76,7 +71,10 @@ static PINBOXPTR *sortArrayS ; /* the normal array for sorting */ static PINBOXPTR *sortArraySwapS ; -sortpin() +void shellsort( PINBOXPTR term[] , INT n ); +void sortpin1( INT cell ); + +void sortpin() { INT cell ; /* current cell */ @@ -123,8 +121,7 @@ /* sort the pins of a single cell by net */ -sortpin1( cell ) -INT cell ; +void sortpin1( INT cell ) { INT j , n ; @@ -149,7 +146,7 @@ return ; } /* end sortpin1 */ -sortpin2( cella, cellb ) +void sortpin2( cella, cellb ) INT cella, cellb ; { @@ -204,9 +201,7 @@ return ; } /* end sortpin2 */ -shellsort( term , n ) -PINBOXPTR term[] ; -INT n ; +void shellsort( PINBOXPTR term[] , INT n ) { PINBOXPTR ptr ; @@ -226,7 +221,7 @@ } -shellsortx( term , n ) +void shellsortx( term , n ) PINBOXPTR term[] ; INT n ; { @@ -247,7 +242,7 @@ } -shellsorty( term , n ) +void shellsorty( term , n ) PINBOXPTR term[] ; INT n ; { @@ -268,9 +263,7 @@ } -shellsort_referx( worker , head , n ) -FEED_SEG_PTR worker[] ; -INT n ; +void shellsort_referx( FEED_SEG_PTR worker[] , int head , INT n ) { FEED_SEG_PTR ptr ; diff -Nru graywolf-0.1.5/src/twsc/standard.h graywolf-0.1.6/src/twsc/standard.h --- graywolf-0.1.5/src/twsc/standard.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/standard.h 2018-08-11 21:48:56.000000000 +0000 @@ -279,6 +279,15 @@ YHASHPTR pin_grp_hash ; } SWAPBOX ; +typedef struct graph_edge_cost { + INT node1 ; + INT node2 ; + INT cost ; + INT channel ; +} +*EDGE_COST , +EDGE_COST_BOX ; + /* ****************** GLOBALS ************************** */ /* THE MAJOR PARTS OF THE DATA STRUCTURES */ EXTERN CBOXPTR *carrayG ; @@ -324,7 +333,7 @@ #undef EXTERN /* *********************** PROTOTYPES FOR TWSC ******************** */ -extern init_table( P1(void) ) ; +extern void init_table( P1(void) ) ; extern BOOL acceptt( P3(INT d_wire,INT d_time,INT d_penal) ) ; extern BOOL accept_greedy( P3(INT d_wire,INT d_time,INT d_penal) ) ; diff -Nru graywolf-0.1.5/src/twsc/steiner.c graywolf-0.1.6/src/twsc/steiner.c --- graywolf-0.1.5/src/twsc/steiner.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/steiner.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,11 +49,6 @@ so that it will always be positive. Sun Jan 20 21:47:52 PST 1991 - ported to AIX. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) steiner.c (Yale) version 4.7 1/20/91" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -73,7 +68,9 @@ static PINBOXPTR *vertexS ; static INT **costS , *lowcostS , *closestS , *components , max_pinS ; -steiner() +void make_net_Tree(PINBOXPTR startptr); + +void steiner() { @@ -204,8 +201,7 @@ } -make_net_Tree( startptr ) -PINBOXPTR startptr ; +void make_net_Tree(PINBOXPTR startptr ) { PINBOXPTR netptr , iptr , jptr ; @@ -345,7 +341,7 @@ #ifdef EVEN_ROW -redo_steiner() +void redo_steiner() { INT net , i ; diff -Nru graywolf-0.1.5/src/twsc/uc0.c graywolf-0.1.6/src/twsc/uc0.c --- graywolf-0.1.5/src/twsc/uc0.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/uc0.c 2018-08-11 21:48:56.000000000 +0000 @@ -47,17 +47,12 @@ to D( ) constructs to speed execution time during debug mode. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) uc0.c (Yale) version 4.6 2/23/92" ; -#endif -#endif #include "standard.h" #include -uc0( a , newaor ) +void uc0( a , newaor ) INT a , newaor ; { diff -Nru graywolf-0.1.5/src/twsc/ucxx1.c graywolf-0.1.6/src/twsc/ucxx1.c --- graywolf-0.1.5/src/twsc/ucxx1.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/ucxx1.c 2018-08-11 21:48:56.000000000 +0000 @@ -47,17 +47,12 @@ to D( ) constructs to speed execution time during debug mode. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) ucxx1.c (Yale) version 4.7 2/23/92" ; -#endif -#endif #include "ucxxglb.h" #include -ucxx1( bxcenter , bycenter ) +INT ucxx1( bxcenter , bycenter ) INT bxcenter , bycenter ; { diff -Nru graywolf-0.1.5/src/twsc/ucxx2.c graywolf-0.1.6/src/twsc/ucxx2.c --- graywolf-0.1.5/src/twsc/ucxx2.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/ucxx2.c 2018-08-11 21:48:56.000000000 +0000 @@ -53,11 +53,6 @@ Thu Sep 19 14:15:51 EDT 1991 - added equal width cell capability. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) ucxx2.c (Yale) version 4.10 4/2/92" ; -#endif -#endif #include "ucxxglb.h" #include "readpar.h" @@ -65,7 +60,10 @@ static INT anxcenterS , bnxcenterS ; -ucxx2( ) +void find_new_pos(); +void add_cell(INT ** cellptr , INT c ); + +INT ucxx2( ) { CBOXPTR acellptr , bcellptr ; @@ -241,7 +239,7 @@ } -find_new_pos() +void find_new_pos() { INT newA_l , newA_r , newB_l , newB_r ; @@ -314,8 +312,7 @@ } -add_cell( cellptr , c ) -INT **cellptr , c ; +void add_cell(INT ** cellptr , INT c ) { INT k ; diff -Nru graywolf-0.1.5/src/twsc/ucxxo1.c graywolf-0.1.6/src/twsc/ucxxo1.c --- graywolf-0.1.5/src/twsc/ucxxo1.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/ucxxo1.c 2018-08-11 21:48:56.000000000 +0000 @@ -47,11 +47,6 @@ to D( ) constructs to speed execution time during debug mode. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) ucxxo1.c (Yale) version 4.7 2/23/92" ; -#endif -#endif #include "ucxxglb.h" #include @@ -60,7 +55,7 @@ */ -ucxxo1( bxcenter , bycenter , newaor ) +INT ucxxo1( bxcenter , bycenter , newaor ) INT bxcenter , bycenter , newaor ; { diff -Nru graywolf-0.1.5/src/twsc/ucxxo2.c graywolf-0.1.6/src/twsc/ucxxo2.c --- graywolf-0.1.5/src/twsc/ucxxo2.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/ucxxo2.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,17 +49,12 @@ Thu Sep 19 14:15:51 EDT 1991 - added equal width cell capability. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) ucxxo2.c (Yale) version 4.8 2/23/92" ; -#endif -#endif #include "ucxxglb.h" #include "readpar.h" #include -ucxxo2( newaor , newbor ) +INT ucxxo2( newaor , newbor ) INT newaor , newbor ; { diff -Nru graywolf-0.1.5/src/twsc/ucxxp.c graywolf-0.1.6/src/twsc/ucxxp.c --- graywolf-0.1.5/src/twsc/ucxxp.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/ucxxp.c 2018-08-11 21:48:56.000000000 +0000 @@ -45,16 +45,11 @@ DATE: Mar 27, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) ucxxp.c (Yale) version 4.6 2/23/92" ; -#endif -#endif #include "ucxxglb.h" #include -ucxxp( a , b , anxcenter , bnxcenter ) +INT ucxxp( a , b , anxcenter , bnxcenter ) INT a , b , anxcenter , bnxcenter ; { diff -Nru graywolf-0.1.5/src/twsc/uloop.c graywolf-0.1.6/src/twsc/uloop.c --- graywolf-0.1.5/src/twsc/uloop.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/uloop.c 2018-08-11 21:48:56.000000000 +0000 @@ -80,11 +80,6 @@ Thu Sep 19 14:15:51 EDT 1991 - added equal width cell capability. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) uloop.c (Yale) version 4.14 3/23/92" ; -#endif -#endif #define UCXXGLB_VARS @@ -157,6 +152,12 @@ DOUBLE compute_and_combination() ; DOUBLE combination() ; INT eval_ratio() ; +void rowcon(); + +INT tw_frozen(INT cost ); +void pick_fence_position(INT *x, INT *y, FENCEBOX * fence); +void pick_position(INT *x, INT *y, INT ox, INT oy, DOUBLE scale); +void update_window_size(DOUBLE iternum ); /* static variables */ static INT acc_cntS = 0 ; @@ -183,7 +184,7 @@ static DOUBLE a_ratioS; static DOUBLE total_costS; -init_uloop() +void init_uloop() { not_doneS = 1; acc_cntS = move_cntS ; @@ -191,7 +192,7 @@ } /* end init_uloop */ -uloop() +void uloop() { FENCEBOXPTR fence ; @@ -850,7 +851,7 @@ -rowcon() +void rowcon() { INT C , R , p_first , totalCells , cellsPerRow , temp_R ; @@ -1084,7 +1085,7 @@ } -sanity_check() +INT sanity_check() { INT *cellxptr , cell , center , block , bin , i ; @@ -1107,7 +1108,7 @@ } -sanity_check2() +INT sanity_check2() { INT *cellxptr , *clist ; @@ -1146,7 +1147,7 @@ } -sanity_check3() +INT sanity_check3() { INT *cellxptr ; @@ -1188,7 +1189,7 @@ return((ratioG < AC4) ? 0 : 1); } -init_control(first) +void init_control(first) INT first; { INT i; @@ -1226,9 +1227,7 @@ -pick_fence_position(x,y,fence) -INT *x, *y ; -FENCEBOX *fence ; +void pick_fence_position(INT *x, INT *y, FENCEBOX *fence) { register INT left,right; BBOXPTR bblckptr ; @@ -1248,9 +1247,7 @@ return; } -pick_position(x,y,ox,oy,scale) -INT *x,*y,ox,oy; -DOUBLE scale ; +void pick_position(INT *x, INT *y, INT ox, INT oy, DOUBLE scale) { register INT i,m,n,bleft,bright; DOUBLE tmp ; @@ -1296,8 +1293,7 @@ } /* change range limiter according to iterationG number */ -update_window_size( iternum ) -DOUBLE iternum ; +void update_window_size(DOUBLE iternum ) { /* @@ -1351,7 +1347,7 @@ */ } -save_control( fp ) +void save_control( fp ) FILE *fp ; { fprintf(fp,"%d 0 %d\n",pairtestG,not_doneS); @@ -1362,21 +1358,20 @@ fprintf(fp,"%f %f %f\n",avg_timeG, avg_funcG, timeFactorG); } -read_control( fp ) +void read_control( fp ) FILE *fp ; { INT junk ; - fscanf(fp,"%ld %ld %ld\n",&pairtestG,&junk,¬_doneS); - fscanf(fp,"%ld %ld %ld %ld\n",&acc_cntS,&move_cntS,&first_fdsS,&first_capS); + fscanf(fp,"%d %ld %d\n",&pairtestG,&junk,¬_doneS); + fscanf(fp,"%ld %ld %d %d\n",&acc_cntS,&move_cntS,&first_fdsS,&first_capS); fscanf(fp,"%lf %lf %lf %lf\n",&stepS,&xalS,&yalS,&a_ratioS); fscanf(fp,"%lf %lf\n",&ratioG,&total_costS) ; fscanf(fp,"%lf %lf\n",&bin_capS,&row_capS); fscanf(fp,"%lf %lf %lf\n",&avg_timeG, &avg_funcG, &timeFactorG); } -tw_frozen( cost ) -INT cost ; +INT tw_frozen(INT cost ) { DOUBLE diff , avg_first_set , avg_second_set ; diff -Nru graywolf-0.1.5/src/twsc/unlap.c graywolf-0.1.6/src/twsc/unlap.c --- graywolf-0.1.5/src/twsc/unlap.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/unlap.c 2018-08-11 21:48:56.000000000 +0000 @@ -45,11 +45,6 @@ DATE: Mar 27, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) unlap.c (Yale) version 4.5 10/14/90" ; -#endif -#endif #include "standard.h" #include "groute.h" @@ -63,7 +58,7 @@ extern BOOL no_feed_at_endG ; extern BOOL rigidly_fixed_cellsG ; -unlap(flag) +void unlap(flag) INT flag ; { diff -Nru graywolf-0.1.5/src/twsc/upair.c graywolf-0.1.6/src/twsc/upair.c --- graywolf-0.1.5/src/twsc/upair.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/upair.c 2018-08-11 21:48:56.000000000 +0000 @@ -50,11 +50,6 @@ Fri Sep 6 15:20:48 CDT 1991 - now place pads during pairwise swaps. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) upair.c (Yale) version 4.12 5/12/92" ; -#endif -#endif #include "standard.h" #include "main.h" @@ -67,7 +62,7 @@ extern BOOL orientation_optimizationG ; extern BOOL placement_improveG ; -upair() +void upair() { CBOXPTR acellptr, bcellptr ; @@ -302,7 +297,7 @@ } -eval_range( acellptr , bcellptr, axc , anxc , bxc , bnxc ) +INT eval_range( acellptr , bcellptr, axc , anxc , bxc , bnxc ) CBOXPTR acellptr , bcellptr ; INT axc , anxc , bxc , bnxc ; { diff -Nru graywolf-0.1.5/src/twsc/urcost.c graywolf-0.1.6/src/twsc/urcost.c --- graywolf-0.1.5/src/twsc/urcost.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/urcost.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,18 +46,12 @@ REVISIONS: Tue Mar 19 16:22:56 CST 1991 - fixed crash when there are no routing tracks in a channel. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) urcost.c (Yale) version 4.4 3/19/91" ; -#endif -#endif #include "standard.h" #include "groute.h" #include -urcost( segptr ) -SEGBOXPTR segptr ; +int urcost(SEGBOXPTR segptr ) { CHANGRDPTR aptr1 , aptr2 , bptr1 , bptr2 , ptr ; diff -Nru graywolf-0.1.5/src/twsc/utemp.c graywolf-0.1.6/src/twsc/utemp.c --- graywolf-0.1.5/src/twsc/utemp.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/utemp.c 2018-08-11 21:48:56.000000000 +0000 @@ -60,11 +60,6 @@ Thu Aug 22 22:27:18 CDT 1991 - Carl made changes for rigidly fixed cells. ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) utemp.c (Yale) version 4.19 4/5/92" ; -#endif -#endif #include "standard.h" @@ -98,8 +93,11 @@ INT comparex() ; INT compute_attprcel() ; +void from_middle(); +void from_beginning(); +void elim_nets(INT print_flag); -utemp() +void utemp() { INT check ; @@ -247,7 +245,7 @@ return ; } -from_middle() +void from_middle() { init_control(-1); /* set move generation controller. */ @@ -265,7 +263,7 @@ } -from_beginning() +void from_beginning() { init_uloop(); @@ -349,7 +347,7 @@ return(n); } -rm_overlapping_feeds() +INT rm_overlapping_feeds() { INT row , cell , *rowptr , target ; @@ -398,7 +396,7 @@ -route_only_critical_nets() +void route_only_critical_nets() { GLISTPTR pptr ; /* pointer to paths of a cell */ @@ -429,8 +427,7 @@ -elim_nets(print_flag) -INT print_flag ; +void elim_nets(INT print_flag) { DBOXPTR dimptr; /* bounding box for net */ @@ -490,7 +487,7 @@ -refine_fixed_placement() +INT refine_fixed_placement() { CBOXPTR cellptr , cellptr1 ; diff -Nru graywolf-0.1.5/src/twsc/xpickint.c graywolf-0.1.6/src/twsc/xpickint.c --- graywolf-0.1.5/src/twsc/xpickint.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/twsc/xpickint.c 2018-08-11 21:48:56.000000000 +0000 @@ -45,18 +45,12 @@ DATE: Mar 27, 1989 REVISIONS: ----------------------------------------------------------------- */ -#ifndef VMS -#ifndef lint -static char SccsId[] = "@(#) xpickint.c (Yale) version 4.4 9/7/90" ; -#endif -#endif #include #define PICK_INT(l,u) (((l)<(u)) ? ((RAND % ((u)-(l)+1))+(l)) : (l)) -XPICK_INT( l , u , c ) -INT l , u , c ; +int XPICK_INT(INT l , INT u , INT c ) { INT d ; diff -Nru graywolf-0.1.5/src/Ylib/assign.c graywolf-0.1.6/src/Ylib/assign.c --- graywolf-0.1.5/src/Ylib/assign.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/assign.c 2018-08-11 21:48:56.000000000 +0000 @@ -44,9 +44,6 @@ REVISIONS: Sun Nov 3 12:49:49 EST 1991 - made assign more memory efficient by using YVECTOR routines. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) assign.c (Yale) version 1.4 4/16/92" ; -#endif #include #include @@ -69,7 +66,7 @@ static void initassign(); static void shortestpath(); static void augmentation(); -static void transformation(); +static void transformation( INT ys[], INT yt[], INT dplus[], INT dminus[], INT d, int m, int n ); static INT *allocatevector() ; static INT **allocatematrix() ; @@ -362,9 +359,7 @@ } /* end augmentation */ -static void transformation( ys, yt, dplus, dminus, d, m, n ) -INT ys[], yt[], dplus[], dminus[] ; -INT d ; +static void transformation( INT ys[], INT yt[], INT dplus[], INT dminus[], INT d, int m, int n ) /* * update ys and yt */ diff -Nru graywolf-0.1.5/src/Ylib/buster.c graywolf-0.1.6/src/Ylib/buster.c --- graywolf-0.1.5/src/Ylib/buster.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/buster.c 2018-08-11 21:48:56.000000000 +0000 @@ -59,9 +59,6 @@ for more extensive error checking. Thu Oct 17 11:08:18 EDT 1991 - added buster_chcek_rect. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) buster.c version 3.8 12/15/91" ; -#endif #include #include @@ -86,6 +83,7 @@ static char *user_messageS; /* output message on error */ /* ################## END STATIC definitions ########################## */ static BOOL check_rect( P4(INT xx1, INT yy1, INT xx2, INT yy2 ) ) ; +BOOL Ybuster_check_rect(INT xx1, INT yy1, INT xx2, INT yy2 ); YBUSTBOXPTR Ybuster() { @@ -222,7 +220,7 @@ } /* end buster */ /* ***************************************************************** */ -Ybuster_addpt( xpos, ypos ) +void Ybuster_addpt( xpos, ypos ) INT xpos, ypos ; { if( xpos == ptS[cornerCountS].x && ypos == ptS[cornerCountS].y ){ @@ -239,7 +237,7 @@ } /* end add_arb_pt */ /* ***************************************************************** */ -Ybuster_init() +void Ybuster_init() { /* allocate memory if needed */ if(!(ptS)){ @@ -255,7 +253,7 @@ } /* end Ybuster_init */ /* ***************************************************************** */ -Ybuster_free() +void Ybuster_free() { /* free allocate memory */ if(ptS){ @@ -315,8 +313,7 @@ /* ***************************************************************** */ /* detect problems with clockwise rotation pattern */ -BOOL Ybuster_check_rect( xx1, yy1, xx2, yy2 ) -INT xx1, yy1, xx2, yy2 ; +BOOL Ybuster_check_rect(INT xx1, INT yy1, INT xx2, INT yy2 ) { INT next_state ; /* the next direction of the edge */ static INT errorArrayL[6] = @@ -364,7 +361,7 @@ return( FALSE ) ; } /* end Ybuster_check_rect */ -Ybuster_check_rect_init( user_string ) +void Ybuster_check_rect_init( user_string ) char *user_string ; { cur_stateS = S_STATE ; diff -Nru graywolf-0.1.5/src/Ylib/cleanup.c graywolf-0.1.6/src/Ylib/cleanup.c --- graywolf-0.1.5/src/Ylib/cleanup.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/cleanup.c 2018-08-11 21:48:56.000000000 +0000 @@ -73,9 +73,6 @@ Fri Jan 25 16:16:50 PST 1991 - fixed to run on HPUX. Mon Sep 16 22:20:09 EDT 1991 - fixed to run on R6000. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) cleanup.c version 3.13 11/2/91" ; -#endif #include diff -Nru graywolf-0.1.5/src/Ylib/CMakeLists.txt graywolf-0.1.6/src/Ylib/CMakeLists.txt --- graywolf-0.1.5/src/Ylib/CMakeLists.txt 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/CMakeLists.txt 2018-08-11 21:48:56.000000000 +0000 @@ -12,4 +12,4 @@ INCLUDE_DIRECTORIES(${CMAKE_SOURCE_DIR}/include ${CMAKE_BINARY_DIR}/include ${X11_INCLUDE_DIR}) -install(TARGETS ycadgraywolf DESTINATION lib) +install(TARGETS ycadgraywolf DESTINATION ${CMAKE_INSTALL_LIBDIR}) diff -Nru graywolf-0.1.5/src/Ylib/colors.c graywolf-0.1.6/src/Ylib/colors.c --- graywolf-0.1.5/src/Ylib/colors.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/colors.c 2018-08-11 21:48:56.000000000 +0000 @@ -40,7 +40,7 @@ /* ----------------------------------------------------------------- FILE: color.c DESCRIPTION:These routines give the standard colors for TimberWolf - draw system. They can be overriden by creating a color matrix + draw system. They can be overridden by creating a color matrix similar to below. CONTENTS: char **TWstdcolors() INT TWnumcolors() @@ -51,9 +51,6 @@ Fri Jan 18 18:38:36 PST 1991 - fixed to run on AIX. Fri Jan 25 15:41:25 PST 1991 - fixed to run on HPUX. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) colors.c version 3.8 2/26/92" ; -#endif #include diff -Nru graywolf-0.1.5/src/Ylib/deck.c graywolf-0.1.6/src/Ylib/deck.c --- graywolf-0.1.5/src/Ylib/deck.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/deck.c 2018-08-11 21:48:56.000000000 +0000 @@ -65,9 +65,6 @@ Fri Feb 22 23:34:38 EST 1991 - fixed Ydeck_pop Ydeck_dequeue when queue is empty. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) deck.c (Yale) version 1.17 1/22/92" ; -#endif #include diff -Nru graywolf-0.1.5/src/Ylib/dialog.c graywolf-0.1.6/src/Ylib/dialog.c --- graywolf-0.1.5/src/Ylib/dialog.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/dialog.c 2018-08-11 21:48:56.000000000 +0000 @@ -67,9 +67,6 @@ Thu Jan 30 02:55:16 EST 1992 - added window manager hints and now allow different font for dialog box. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) dialog.c version 3.15 3/6/92" ; -#endif #ifndef NOGRAPHICS @@ -91,6 +88,7 @@ #include #include #include +#include #include "info.h" #define WHITE 1 /* white parent gc is one in array */ @@ -142,19 +140,18 @@ static TWDIALOGPTR fieldS ; /* the current dialog array */ /* function definitions */ -static INT world2pix_x() ; -static INT world2pix_y() ; -static INT world2fonty() ; +static INT world2pix_x(int) ; +static INT world2pix_y(int) ; +static INT world2fonty(int) ; static INT pixlen() ; -static set_stipple_font( P2(BOOL stippleOn, INT font_change ) ) ; -static debug_dialog( P1( TWDIALOGPTR fieldp ) ) ; -static check_cases( P3( TWDIALOGPTR fieldp, INT select, +static void set_stipple_font( P2(BOOL stippleOn, INT font_change ) ) ; +static void debug_dialog( P1( TWDIALOGPTR fieldp ) ) ; +static void check_cases( P3( TWDIALOGPTR fieldp, INT select, INT (*user_function)() )) ; -static draw_fields( P1(TWDIALOGPTR fieldp) ) ; -static TWfreeWindows() ; -static find_font_boundary() ; -static edit_field( P4( INT field, Window win, XEvent event, - INT (*user_function)() ) ) ; +static void draw_fields( P1(TWDIALOGPTR fieldp) ) ; +static void TWfreeWindows() ; +static void find_font_boundary() ; +static void edit_field( P4( INT field, Window win, XEvent event, INT (*user_function)() ) ) ; /* build a dialog box and get info */ TWDRETURNPTR TWdialog( fieldp, dialogname, user_function ) @@ -522,9 +519,7 @@ } /* end TWdialog */ -static set_stipple_font( stippleOn, font_change ) -BOOL stippleOn ; -INT font_change ; +static void set_stipple_font( BOOL stippleOn, INT font_change ) { INT i ; /* counter */ @@ -553,7 +548,7 @@ } /* end set_stipple_font */ /* check the case fields and set all member of group to false */ -static check_cases( fieldp, select, user_function ) +static void check_cases( fieldp, select, user_function ) TWDIALOGPTR fieldp ; INT select ; INT (*user_function)() ; @@ -585,8 +580,7 @@ } /* end check_cases */ -static draw_fields( fieldp ) -TWDIALOGPTR fieldp ; +static void draw_fields( TWDIALOGPTR fieldp ) { INT i ; /* counter */ TWDIALOGPTR fptr ; /* current dialog field */ @@ -632,7 +626,7 @@ } /* end draw_fields */ -static TWfreeWindows() +static void TWfreeWindows() { INT i, j ; /* counters */ @@ -645,7 +639,7 @@ } /* end TWfreeWindows */ -static find_font_boundary() +static void find_font_boundary() { fwidthS = fontinfoS->max_bounds.rbearing - fontinfoS->min_bounds.lbearing ; @@ -656,17 +650,17 @@ /* tranforms the world coordinate character column format */ /* to pixel coordinates */ -static INT world2pix_x( x ) +static INT world2pix_x( int x ) { return( x * fwidthS ) ; } /* end world2pix_x */ -static INT world2pix_y( y ) +static INT world2pix_y( int y ) { return( y * fheightS ) ; } /* end world2pix_y */ -static INT world2fonty( y ) +static INT world2fonty( int y ) { return( (++y) * fheightS - fontinfoS->max_bounds.descent ) ; } /* end world2pix_y */ @@ -678,11 +672,7 @@ return( fwidthS * length ) ; } /* end pixlen */ -static edit_field( field, win, event, user_function ) -INT field ; -Window win ; -XEvent event ; /* describes the button event */ -INT (*user_function)() ; +static void edit_field( INT field, Window win, XEvent event, INT (*user_function)() ) { TWDIALOGPTR fptr; /* current field of dialog */ TWDRETURNPTR dptr; /* return field of dialog */ diff -Nru graywolf-0.1.5/src/Ylib/draw.c graywolf-0.1.6/src/Ylib/draw.c --- graywolf-0.1.5/src/Ylib/draw.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/draw.c 2018-08-11 21:48:56.000000000 +0000 @@ -173,9 +173,6 @@ Thu Mar 5 17:01:09 EST 1992 - added clipping for faster draw during zoom. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) draw.c (Yale) version 3.41 3/10/92" ; -#endif #ifndef NOGRAPHICS @@ -195,6 +192,8 @@ #include #include #include +#include +#include #define YDRAW_VARS #include "info.h" @@ -232,7 +231,7 @@ static VOID drawDLine() ; static VOID drawWLine() ; static VOID initcolors( P2(char **desiredColorArray,INT numC ) ) ; -static closeFrame(P1(void)) ; +static void closeFrame(P1(void)) ; static VOID set_viewing_transformation() ; extern VOID TW3Dperspective( P5(DOUBLE x, DOUBLE y, DOUBLE z, DOUBLE *pX, DOUBLE *pY ) ) ; @@ -333,7 +332,7 @@ return( TRUE ) ; } /* end TWcheckServer */ -TWsetMode( mode ) +void TWsetMode( mode ) INT mode ; { if( dumpOnlyS && mode != TWWRITEONLY ){ @@ -473,7 +472,7 @@ /* we are done for the dump_graphics mode */ initS = TRUE ; TWsetMode( TWWRITEONLY ) ; /* always enable both modes */ - return ; + return initS; } else { /* OTHERWISE INITIALIZE BOTH MODES */ TWsetMode( TWWRITENDRAW ) ; /* always enable both modes */ @@ -731,7 +730,7 @@ } /* end TWgetDrawInfo */ -TWsetDrawInfo( winheight, winwidth, pixmap ) +void TWsetDrawInfo( winheight, winwidth, pixmap ) INT winheight, winwidth ; Pixmap pixmap ; { @@ -743,7 +742,7 @@ } /* end TWsetDrawInfo */ -TWforceRedraw() +void TWforceRedraw() { XEvent event ; /* describes configuration event */ @@ -757,7 +756,7 @@ XSendEvent( dpyS, drawS, TRUE, ExposureMask, &event ) ; } /* end TWforceRedraw */ -TWcloseGraphics() +void TWcloseGraphics() { if(!(initS )){ @@ -780,7 +779,7 @@ /*********** BEGIN STRICT GRAPHICS ROUTINES ************* */ /* perform a zoom in main graphics window */ -TWzoom() +void TWzoom() { INT x1, y1 ; /* first point of user zoom */ INT x2, y2 ; /* second point of user zoom */ @@ -831,7 +830,7 @@ } /* returns to full screen after zoom */ -TWfullView() +void TWfullView() { if( fullViewS ){ return ; @@ -846,7 +845,7 @@ } /* end TWfullScreen */ /* set the window area for bar */ -TWsetwindow( left, bottom, right, top ) +void TWsetwindow( left, bottom, right, top ) INT left, bottom, right, top ; { INT xspan, yspan ; /* span of data */ @@ -931,7 +930,7 @@ } } /* end set_clip_window() */ -TWtranslate() +void TWtranslate() { INT x1, y1 ; INT last_xoff, last_yoff ; @@ -970,7 +969,7 @@ /* copy pixmap to screen and flush screen output buffer */ /* flush screen output buffer */ -TWflushFrame() +void TWflushFrame() { if( modeS == TWWRITEONLY ){ return ; @@ -980,7 +979,7 @@ } /* end TWflushFrame */ /* process everything in buffer */ -TWsync() +void TWsync() { if( modeS == TWWRITEONLY ){ return ; @@ -1189,7 +1188,7 @@ } /* end initcolor */ -TWcolorXOR( color, exorFlag ) +void TWcolorXOR( color, exorFlag ) INT color ; BOOL exorFlag ; { @@ -1212,7 +1211,7 @@ /* start a new slate */ -static startDFrame() +static void startDFrame() { XClearWindow( dpyS, drawS ) ; if( reverseS ){ @@ -1355,7 +1354,7 @@ } } /* end drawDCell */ -TWarb_init() +void TWarb_init() { /* allocate memory if needed */ if(!(ptS)){ @@ -1381,7 +1380,7 @@ } /* end TWarb_init */ /* ***************************************************************** */ -TWarb_addpt( xpos, ypos ) +void TWarb_addpt( xpos, ypos ) INT xpos, ypos ; { @@ -1511,7 +1510,7 @@ } } /* end drawDArb */ -TWarb_fill( flag ) +void TWarb_fill( flag ) BOOL flag ; { fillArbS = flag ; @@ -1522,7 +1521,7 @@ return( fillArbS ) ; } /* end TWget_arb_fill */ -TWrect_fill( flag ) +void TWrect_fill( flag ) BOOL flag ; { rect_fillS = flag ; @@ -1533,7 +1532,7 @@ return( rect_fillS ) ; } /* end TWget_rect_fill */ -TWhighLightRect( x1,y1,x2,y2 ) +void TWhighLightRect( x1,y1,x2,y2 ) /* draw a rectangle whose diagonals are (x1,y1) and (x2,y2) */ register INT x1,y1,x2,y2 ; { @@ -1559,7 +1558,7 @@ x1,y2,width,height ) ; } /* end TWhighLightRect */ -TWmoveRect( x1, y1, x2, y2, ptx, pty ) +void TWmoveRect( x1, y1, x2, y2, ptx, pty ) INT *x1, *y1, *x2, *y2, ptx, pty ; /* x1, y1, x2, y2 are all user data absolute coordinates */ /* ptx and pty are the value of the pointer from TWgetPt */ @@ -1665,7 +1664,7 @@ return( fontinfo ) ; } /* end TWgetfont */ -_TW3DdrawAxis( drawNotErase ) +void _TW3DdrawAxis( drawNotErase ) BOOL drawNotErase ; { INT xspan, yspan, zspan ; @@ -1889,7 +1888,7 @@ /*------------------------- Draws a 3 dimensional cube. -------------------------*/ -INT TW3DdrawCube(ref_num, x1, y1, z1, x2, y2, z2, color, label) +void TW3DdrawCube(ref_num, x1, y1, z1, x2, y2, z2, color, label) INT ref_num, x1, y1, z1, x2, y2, z2 ; INT color; char *label; @@ -1959,7 +1958,7 @@ } /* end TW3DdrawCube */ /* returns string size in user coordinate system */ -TWstringSize( string, width, height ) +void TWstringSize( string, width, height ) char *string ; INT *width, *height ; { @@ -1975,7 +1974,7 @@ } -TWdrawString( x, y, color, label ) +void TWdrawString( x, y, color, label ) INT x, y, color ; char *label ; { @@ -2026,7 +2025,7 @@ static INT numCharS = 0 ; /* symbol table counter */ -TWstartFrame() +void TWstartFrame() { char filename[LRECL] ; char dummy[5] ; @@ -2088,7 +2087,7 @@ } /* end startNewFrame */ /* write size of data at end of files and close them if frames are open */ -static closeFrame() +static void closeFrame() { char dummy[5] ; UNSIGNED_INT nitems ; @@ -2130,7 +2129,7 @@ } /* closeFrame */ -TWsetFrame( number ) +void TWsetFrame( number ) INT number ; { char fileName[LRECL] ; diff -Nru graywolf-0.1.5/src/Ylib/dset.c graywolf-0.1.6/src/Ylib/dset.c --- graywolf-0.1.5/src/Ylib/dset.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/dset.c 2018-08-11 21:48:56.000000000 +0000 @@ -54,9 +54,6 @@ problem with Ydset_enumerate_parents. Sun Dec 15 02:28:14 EST 1991 - added dset_dump_tree. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) dset.c version 1.13 2/3/92"; -#endif #define YDSET_DEFS #include @@ -103,7 +100,7 @@ } /* end dset_free_element() */ /* delete all the trees associated with set */ -static dset_free_trees( dset ) +static void dset_free_trees( dset ) YDSETPTR dset ; { if ( dset->superset_tree ) { @@ -650,7 +647,7 @@ /*------------------------ Ydset_dump ------------------------*/ -Ydset_dump(dset,printFunc) +void Ydset_dump(dset,printFunc) YDSETPTR dset; VOID (*printFunc)(); { @@ -736,7 +733,7 @@ /*------------------------ Ydset_dump_tree ------------------------*/ -Ydset_dump_tree(dset,print_key) +void Ydset_dump_tree(dset,print_key) YDSETPTR dset; VOID (*print_key)(); { diff -Nru graywolf-0.1.5/src/Ylib/edcolors.c graywolf-0.1.6/src/Ylib/edcolors.c --- graywolf-0.1.5/src/Ylib/edcolors.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/edcolors.c 2018-08-11 21:48:56.000000000 +0000 @@ -47,9 +47,6 @@ Wed May 1 18:56:14 EDT 1991 - added toggle for arb fill. Sun Nov 3 12:52:21 EST 1991 - fixed gcc complaints. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) edcolors.c (Yale) version 1.8 12/15/91" ; -#endif #ifndef NOGRAPHICS @@ -66,11 +63,11 @@ #include "info.h" static TWDIALOGPTR fieldS ; -static init_field( P8(INT field, INT row, INT column, INT str_len, char *string, +static void init_field( P8(INT field, INT row, INT column, INT str_len, char *string, INT type, INT color, INT group ) ) ; /* be able to turn off individual colors */ -TWtoggleColors() +void TWtoggleColors() { char **colors ; /* the standard color array */ INT i ; /* counter */ @@ -159,7 +156,7 @@ } /* end TWtoggleColors */ -static init_field( field, row, column, str_len, string, +static void init_field( field, row, column, str_len, string, type, color, group ) INT field, row, column, str_len, type, color, group ; char *string ; diff -Nru graywolf-0.1.5/src/Ylib/file.c graywolf-0.1.6/src/Ylib/file.c --- graywolf-0.1.5/src/Ylib/file.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/file.c 2018-08-11 21:48:56.000000000 +0000 @@ -63,14 +63,12 @@ Oct 07, 1991 - fix #include sys/dir.h for SYS5 A/UX (RAWeier) Oct 18, 1991 - change INT to BOOL in YopenFile (RAWeier) ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) file.c version 3.11 10/20/91" ; -#endif #include #include #include #include +#include #define SERROR 0 @@ -99,6 +97,7 @@ #include #include +#include /* check if a file exists */ BOOL YfileExists(pathname) diff -Nru graywolf-0.1.5/src/Ylib/getftime.c graywolf-0.1.6/src/Ylib/getftime.c --- graywolf-0.1.5/src/Ylib/getftime.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/getftime.c 2018-08-11 21:48:56.000000000 +0000 @@ -45,9 +45,6 @@ DATE: May 8, 1989 - original coding. REVISIONS: Apr 29, 1990 - added message.h ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) getftime.c version 1.3 8/28/90" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/Ylib/graph.c graywolf-0.1.6/src/Ylib/graph.c --- graywolf-0.1.5/src/Ylib/graph.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/graph.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,9 +49,6 @@ 1) instead of rebuilding priority heaps all the time, keep them around as part of graph structures. -----------------------------------------------------------------*/ -#ifndef lint -static char SccsId[] = "@(#) graph.c version 1.35 4/2/92" ; -#endif #include #include @@ -62,6 +59,7 @@ #include #include #include +#include /* numbers are TWcolors to ease debugging */ #define BLACK TWBLACK diff -Nru graywolf-0.1.5/src/Ylib/grid.c graywolf-0.1.6/src/Ylib/grid.c --- graywolf-0.1.5/src/Ylib/grid.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/grid.c 2018-08-11 21:48:56.000000000 +0000 @@ -66,9 +66,6 @@ REVISIONS: Thu Apr 18 00:39:45 EDT 1991 - renamed functions so that names were consistent. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) grid.c version 1.4 4/18/91" ; -#endif #include @@ -76,9 +73,12 @@ static INT offsetyS = 0 ; static INT xgridS = 1 ; /* default grid is one */ static INT ygridS = 1 ; + +void Ygridx( INT *x ); +void Ygridy( INT *y ); /* ***************************************************************** */ /* force coordinate to closest xy grid position */ -YforceGrid( x , y ) +void YforceGrid( x , y ) INT *x , *y ; { Ygridx( x ) ; @@ -86,8 +86,7 @@ } /* end forceGrid */ /* force coordinate to closest x grid position */ -Ygridx( x ) -INT *x ; +void Ygridx( INT *x ) { INT newx ; @@ -102,8 +101,7 @@ /* force coordinate to closest x grid position */ -Ygridy( y ) -INT *y ; +void Ygridy( INT *y ) { INT newy ; @@ -117,7 +115,7 @@ } /* end Ygridy */ /* force coordinate to smallest x grid position */ -Ygridx_down( x ) +void Ygridx_down( x ) INT *x ; { @@ -129,7 +127,7 @@ } /* end Ygridx_down */ /* force coordinate to smallest y grid position */ -Ygridy_down( y ) +void Ygridy_down( y ) INT *y ; { @@ -142,7 +140,7 @@ } /* end Ygridy_down */ /* round coordinate to larger x grid position */ -Ygridx_up( x ) +void Ygridx_up( x ) INT *x ; { @@ -157,7 +155,7 @@ } /* end Ygridx_up */ /* round coordinate to larger y grid position */ -Ygridy_up( y ) +void Ygridy_up( y ) INT *y ; { @@ -171,28 +169,28 @@ } /* end Ygridy_up */ -Ygrid_setx( x, offset ) +void Ygrid_setx( x, offset ) INT x, offset ; { xgridS = x ; offsetxS = offset ; } /* end Ygrid_setx */ -Ygrid_sety( y, offset ) +void Ygrid_sety( y, offset ) INT y, offset ; { ygridS = y ; offsetyS = offset ; } /* end Ygrid_sety */ -Ygrid_getx( x, offset ) +void Ygrid_getx( x, offset ) INT *x, *offset ; { *x = xgridS ; *offset = offsetxS ; } /* end Ygrid_getx */ -Ygrid_gety( y, offset ) +void Ygrid_gety( y, offset ) INT *y, *offset ; { *y = ygridS ; diff -Nru graywolf-0.1.5/src/Ylib/hash.c graywolf-0.1.6/src/Ylib/hash.c --- graywolf-0.1.5/src/Ylib/hash.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/hash.c 2018-08-11 21:48:56.000000000 +0000 @@ -55,11 +55,9 @@ Thu Apr 18 00:40:49 EDT 1991 - renamed functions for consistency. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) hash.c version 3.11 12/15/91" ; -#endif #include +#include #include #include #include @@ -97,7 +95,7 @@ return(hashtable->size) ; } -Yhash_table_delete(hashtable, userdelete ) +void Yhash_table_delete(hashtable, userdelete ) YHASHPTR hashtable ; INT (*userdelete)() ; { diff -Nru graywolf-0.1.5/src/Ylib/heap.c graywolf-0.1.6/src/Ylib/heap.c --- graywolf-0.1.5/src/Ylib/heap.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/heap.c 2018-08-11 21:48:56.000000000 +0000 @@ -72,9 +72,6 @@ #include -#ifndef lint -static char Yheap_Id[] = "@(#) heap.c version 1.8 12/15/91"; -#endif /**************************************************************************** diff -Nru graywolf-0.1.5/src/Ylib/info.h graywolf-0.1.6/src/Ylib/info.h --- graywolf-0.1.5/src/Ylib/info.h 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/info.h 2018-08-11 21:48:56.000000000 +0000 @@ -56,7 +56,7 @@ EXTERN INT TWsafe_wait_timeG ;/* time to wait before redraw */ extern TWINFOPTR TWgetDrawInfo() ; /* TW library routines use this */ -extern TWsetDrawInfo( P3( INT winheight, INT winwidth, Pixmap pixmap )) ; +extern void TWsetDrawInfo( P3( INT winheight, INT winwidth, Pixmap pixmap )) ; extern Window TWgetWindowId( P2(Display *dpy, Window backwindow) ) ; extern BOOL TWinitMenuWindow( P1(TWMENUPTR menu_fields) ) ; extern XFontStruct *TWgetfont( P2(char *fname, Font *font) ) ; diff -Nru graywolf-0.1.5/src/Ylib/list.c graywolf-0.1.6/src/Ylib/list.c --- graywolf-0.1.5/src/Ylib/list.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/list.c 2018-08-11 21:48:56.000000000 +0000 @@ -69,9 +69,6 @@ Sun Nov 3 12:54:08 EST 1991 - added to library. 12/09/91 - cleanup for non-ANSI compilers -R.A.Weier ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) list.c Yale Version 1.9 12/9/91" ; -#endif #include diff -Nru graywolf-0.1.5/src/Ylib/log.c graywolf-0.1.6/src/Ylib/log.c --- graywolf-0.1.5/src/Ylib/log.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/log.c 2018-08-11 21:48:56.000000000 +0000 @@ -48,9 +48,6 @@ DATE: May 7, 1989 - original coding. REVISIONS: Aug 7, 1989 - Moved to libary. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) log.c version 1.2 8/28/90" ; -#endif #include #include @@ -60,7 +57,7 @@ static char cktNameS[LRECL] = " " ; /* put a message in the log file */ -Ylog_msg( message ) +void Ylog_msg( message ) char *message ; { INT timestamp ; /* seconds since Jan 1, 1970 */ @@ -75,7 +72,7 @@ TWCLOSE( fp ) ; } /* end log */ -Ylog_start( design, message ) +void Ylog_start( design, message ) char *design ; char *message ; { diff -Nru graywolf-0.1.5/src/Ylib/menus.c graywolf-0.1.6/src/Ylib/menus.c --- graywolf-0.1.5/src/Ylib/menus.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/menus.c 2018-08-11 21:48:56.000000000 +0000 @@ -127,14 +127,12 @@ Wed Feb 26 03:54:12 EST 1992 - added persistent windows and added dim features. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) menus.c (Yale) version 3.36 2/26/92" ; -#endif #ifndef NOGRAPHICS #include #include +#include #include #include #include @@ -147,6 +145,8 @@ #include #include #include +#include +#include #include "info.h" #define DEFAULT_TIMEOUT 10 * 1000 /* 10 seconds to timeout on message window */ @@ -214,14 +214,15 @@ #define SLEEPTIME (unsigned) 2 /* sleep for two seconds */ /* define static functions */ -static set_window_lights( P1(BOOL flag) ) ; -static resize_windows( P2( INT winwidth, INT winheight ) ) ; -static debug_menus( P1(TWMENUPTR menu_field) ) ; -static draw_persistent_message( P1(char *message) ) ; +static void set_window_lights( P1(BOOL flag) ) ; +static void resize_windows( P2( INT winwidth, INT winheight ) ) ; +static void debug_menus( P1(TWMENUPTR menu_field) ) ; +static void draw_persistent_message( P1(char *message) ) ; +void TWcheckReconfig(); /* get information from main draw routine and set it */ -TWinforMenus( ) +void TWinforMenus( ) { TWINFOPTR TWgetDrawInfo() ; @@ -251,7 +252,7 @@ return( (INT) backS ) ; } /* end TWgetWindowId */ -TWrestoreState() +void TWrestoreState() { long event_mask ; /* used to set input selection to window */ XWindowAttributes wattr; /* get the window attributes */ @@ -588,7 +589,7 @@ } /* end TWinitMenuWindow */ -TWdrawMenus() +void TWdrawMenus() { INT i ; MENUPTR menuptr ; @@ -606,7 +607,7 @@ } /* end TWdrawMenus */ /* turn top window entering and leaving lights */ -static set_window_lights( flag ) +static void set_window_lights( flag ) BOOL flag ; { INT i ; /* window counter */ @@ -986,7 +987,7 @@ } /* end TWcheckMouse */ -TWdisableMenu( menu_item ) +void TWdisableMenu( menu_item ) INT menu_item ; { INT menu ; /* counter */ @@ -1008,7 +1009,7 @@ } } /* end TWdisableMenu() */ -TWenableMenu( menu_item ) +void TWenableMenu( menu_item ) INT menu_item ; { INT menu ; /* counter */ @@ -1030,7 +1031,7 @@ } } /* end TWenableMenu() */ -TWgetPt( x, y ) +void TWgetPt( x, y ) INT *x, *y ; { BOOL press ; /* tells whether button has been pushed */ @@ -1075,7 +1076,7 @@ } /* end TWgetPt */ -TWmessage( message ) +void TWmessage( message ) char *message ; { if( persistenceS ){ @@ -1089,7 +1090,7 @@ } /* end TWmessage */ -TWmessagePersistence(flag) +void TWmessagePersistence(flag) BOOL flag ; { persistenceS = flag ; @@ -1099,7 +1100,7 @@ } } /* end TWmessagePersistence() */ -static draw_persistent_message( non_persistent_message ) +static void draw_persistent_message( non_persistent_message ) char *non_persistent_message ; { INT fwidth ; /* font width */ @@ -1305,7 +1306,7 @@ } /* end TWgetPt2 */ /* start receiving events concerning mouse tracking */ -TWmouse_tracking_start() +void TWmouse_tracking_start() { long event_mask ; /* set events */ @@ -1319,8 +1320,7 @@ /* get the current mouse position */ /* returns true if position has changed */ -BOOL TWmouse_tracking_pt( x, y ) -INT *x, *y ; +BOOL TWmouse_tracking_pt( INT *x, INT *y ) { XEvent event ; /* describes event */ INT xtemp, ytemp ; /* current position of pointer */ @@ -1460,7 +1460,7 @@ } /* end TWinterupt */ /* update windows if configuration changes */ -TWcheckReconfig() +void TWcheckReconfig() { INT height ; /* height of current backing window */ XEvent event ; /* describes configuration event */ @@ -1508,8 +1508,7 @@ } /* end TWcheckReconfig */ -static resize_windows( winwidth, winheight ) -INT winwidth, winheight ; +static void resize_windows( INT winwidth, INT winheight ) { INT halfstep ; /* menu half spacing */ INT xpos ; /* position of menu */ @@ -1573,7 +1572,7 @@ } /* end TWcheckReconfig */ -TWfreeMenuWindows() +void TWfreeMenuWindows() { INT i, j ; /* counters */ MENUPTR menuptr ; /* temporary for selected menu record */ @@ -1749,7 +1748,7 @@ return( bufferL ) ; } /* end cap_item */ -static debug_menus( menu_field ) +static void debug_menus( menu_field ) TWMENUPTR menu_field ; { INT i ; /* counter */ diff -Nru graywolf-0.1.5/src/Ylib/message.c graywolf-0.1.6/src/Ylib/message.c --- graywolf-0.1.5/src/Ylib/message.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/message.c 2018-08-11 21:48:56.000000000 +0000 @@ -74,9 +74,6 @@ system. Modified names to make it easier. Thu Mar 7 01:27:48 EST 1991 - now always flush stdout. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) message.c version 3.6 3/7/91" ; -#endif #include #include @@ -96,7 +93,7 @@ char *YmsgG = message_bufS ; -Ymessage_print( messageType, routine, messageString ) +void Ymessage_print( messageType, routine, messageString ) INT messageType ; char *routine ; char *messageString ; @@ -166,13 +163,13 @@ } /* end message_print */ /* increment the static variable */ -Ymessage_warn_count() +void Ymessage_warn_count() { warningCountS++ ; } /* end message_warn_count */ /* increment the static variable */ -Ymessage_error_count() +void Ymessage_error_count() { errorCountS++ ; }/* end Ymessage_error_count */ @@ -187,7 +184,7 @@ return(errorCountS); } /*end Ymessage_get_errorcount */ -Ymessage_output( messageString ) +void Ymessage_output( messageString ) char *messageString ; { @@ -200,13 +197,13 @@ } /* end message_output */ -Ymessage_init( fileptr ) +void Ymessage_init( fileptr ) FILE *fileptr ; { foutS = fileptr ; } /* end Ymessage_init */ -Ymessage_mode( mode ) +void Ymessage_mode( mode ) INT mode ; { if( mode == M_VERBOSE ){ @@ -229,7 +226,7 @@ return( modeS ) ; } /* end Ymessage_get_mode */ -Ymessage_flush() +void Ymessage_flush() { if( outS ){ fflush(outS) ; @@ -240,7 +237,7 @@ fflush( stdout ) ; } /* end Ymessage_flush */ -Ymessage_close() +void Ymessage_close() { if( foutS ){ TWCLOSE(foutS) ; diff -Nru graywolf-0.1.5/src/Ylib/mst.c graywolf-0.1.6/src/Ylib/mst.c --- graywolf-0.1.5/src/Ylib/mst.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/mst.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,14 +46,12 @@ REVISIONS: Thu Oct 17 11:09:03 EDT 1991 - renamed functions according to convention. Added mst_color function. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) mst.c (Yale) version 1.5 1/24/92" ; -#endif #include #include #include #include +#include static INT numpinS ; /* allocation of memory */ static INT *nodeXS ; /* array of x locations for pins */ @@ -66,7 +64,7 @@ #define SQUARE(a) ((a)*(a)) #define INF INT_MAX -static cost(i,j) +static int cost(i,j) /* return the square of the Euclidian distance of 2 points */ INT i, j ; { @@ -76,7 +74,7 @@ return( SQUARE(nodeXS[i]-nodeXS[j])+SQUARE(nodeYS[i]-nodeYS[j]) ); } /* end cost */ -Ymst_init( numpins ) +void Ymst_init( numpins ) INT numpins ; { numpinS = numpins ; @@ -87,7 +85,7 @@ countS = 0 ; } /* end Ymst_init() */ -Ymst_free() +void Ymst_free() { YFREE(nodeXS) ; YFREE(nodeYS) ; @@ -95,12 +93,12 @@ YFREE(lowcostS) ; } /* end Ymst_free() */ -Ymst_clear() +void Ymst_clear() { countS = 0 ; } /* end Yclear_mst() */ -Ymst_addpt( x, y ) +void Ymst_addpt( x, y ) INT x, y ; { if( countS >= numpinS ){ @@ -112,7 +110,7 @@ countS++ ; } /* end Ymst_addpt() */ -Ymst_draw() +void Ymst_draw() { INT mincost ; /* minimum cost for pin */ INT closest_pt ; /* closest neighbor for pin */ @@ -148,7 +146,7 @@ } /* end Ymst_draw() */ -Ymst_enumerate( x1, y1, x2, y2, startFlag ) +void Ymst_enumerate( x1, y1, x2, y2, startFlag ) INT *x1, *y1, *x2, *y2 ; BOOL startFlag ; { @@ -194,7 +192,7 @@ } /* end Ymst_enumerate() */ -Ymst_color( color ) +void Ymst_color( int color ) { colorS = color ; } /* end Ymst_color */ diff -Nru graywolf-0.1.5/src/Ylib/mytime.c graywolf-0.1.6/src/Ylib/mytime.c --- graywolf-0.1.5/src/Ylib/mytime.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/mytime.c 2018-08-11 21:48:56.000000000 +0000 @@ -51,9 +51,6 @@ Dec 09, 1991 - industrial users say gettimeofday is more "universal" and improves portability (RAWeier) --------------------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) mytime.c version 3.8 12/15/91" ; -#endif #include diff -Nru graywolf-0.1.5/src/Ylib/okmalloc.c graywolf-0.1.6/src/Ylib/okmalloc.c --- graywolf-0.1.5/src/Ylib/okmalloc.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/okmalloc.c 2018-08-11 21:48:56.000000000 +0000 @@ -125,9 +125,6 @@ Tue Jan 7 18:03:31 EST 1992 - fixed memory manager on the MAC. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) okmalloc.c (Yale) version 3.24 3/6/92" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/Ylib/path.c graywolf-0.1.6/src/Ylib/path.c --- graywolf-0.1.5/src/Ylib/path.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/path.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,15 +49,13 @@ Oct 20, 1990 - pathname should be bufsize since users path may be very long. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) path.c version 3.8 10/23/90" ; -#endif #include #include #include #include #include +#include #undef LRECL #define LRECL BUFSIZ diff -Nru graywolf-0.1.5/src/Ylib/plot.c graywolf-0.1.6/src/Ylib/plot.c --- graywolf-0.1.5/src/Ylib/plot.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/plot.c 2018-08-11 21:48:56.000000000 +0000 @@ -47,9 +47,6 @@ Apr 29, 1990 - added message.h Fri Jan 18 18:38:36 PST 1991 - fixed to run on AIX. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) plot.c version 1.6 12/9/91" ; -#endif #include #include @@ -74,14 +71,14 @@ static INT findType(); -Yplot_control( toggle ) +void Yplot_control( toggle ) BOOL toggle ; { graphFilesS = toggle ; } /* end YgraphControl */ /* graph init uses variable number of arguments */ -Yplot_init( int dval, ... ) +void Yplot_init( int dval, ... ) { va_list ap ; @@ -108,7 +105,7 @@ } /* graph init uses variable number of arguments */ -Yplot_heading( int dval, ... ) +void Yplot_heading( int dval, ... ) { va_list ap ; @@ -157,7 +154,7 @@ va_end(ap) ; } -Yplot_close() +void Yplot_close() { INT i ; @@ -180,7 +177,7 @@ /* This is what argument list looks like - use it to pass any type */ /* of variable to graph */ /* GRAPH( graphFileName, xVarformat, xVar, yVarformat, yVars... ) */ -Yplot( int dval, ... ) +void Yplot( int dval, ... ) { va_list ap ; char *gName ; @@ -321,8 +318,7 @@ } -Yplot_flush( gName ) -char *gName ; +void Yplot_flush( char *gName ) { INT i ; diff -Nru graywolf-0.1.5/src/Ylib/program.c graywolf-0.1.6/src/Ylib/program.c --- graywolf-0.1.5/src/Ylib/program.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/program.c 2018-08-11 21:48:56.000000000 +0000 @@ -60,13 +60,12 @@ Fri Feb 22 23:39:39 EST 1991 - added newline character at exit. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) program.c version 3.8 3/4/92" ; -#endif #include #include #include +#include +#include static char programName[LRECL]; static char progVersion[LRECL]; @@ -110,8 +109,7 @@ } /* end initProgram */ /* exit program gracefully */ -YexitPgm(status) -INT status ; +void YexitPgm(INT status) { INT errorCount, diff -Nru graywolf-0.1.5/src/Ylib/project.c graywolf-0.1.6/src/Ylib/project.c --- graywolf-0.1.5/src/Ylib/project.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/project.c 2018-08-11 21:48:56.000000000 +0000 @@ -44,9 +44,6 @@ DATE: Tue Oct 29 15:02:21 EST 1991 REVISIONS: ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) project.c (Yale) version 1.1 11/20/91" ; -#endif #include #include @@ -54,7 +51,7 @@ static INT xspaceS = 0 ; static INT yspaceS = 0 ; -Yproject_space( xspace, yspace ) +void Yproject_space( xspace, yspace ) INT xspace, yspace ; { xspaceS = xspace ; diff -Nru graywolf-0.1.5/src/Ylib/queue.c graywolf-0.1.6/src/Ylib/queue.c --- graywolf-0.1.5/src/Ylib/queue.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/queue.c 2018-08-11 21:48:56.000000000 +0000 @@ -55,15 +55,12 @@ DATE: Mar 16, 1989 REVISIONS: Sep 16, 1989 - all debug directed to stderr. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) queue.c (Yale) version 3.4 12/15/91" ; -#endif #include #include /* initialize queue */ -YinitQueue( queue, node ) +void YinitQueue( queue, node ) YQUEUE *queue ; char *node ; { @@ -92,7 +89,7 @@ } /* end YtopQueue */ /* add a vertex to the end of the queue */ -Yadd2Queue( queue, node ) +void Yadd2Queue( queue, node ) YQUEUE *queue ; char *node ; { @@ -114,7 +111,7 @@ } /* debug function to dump the contents of the queue */ -YdumpQueue( queue ) +void YdumpQueue( queue ) YQUEUE *queue ; { YQUEUEPTR temp ; diff -Nru graywolf-0.1.5/src/Ylib/quicksort.c graywolf-0.1.6/src/Ylib/quicksort.c --- graywolf-0.1.5/src/Ylib/quicksort.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/quicksort.c 2018-08-11 21:48:56.000000000 +0000 @@ -38,9 +38,6 @@ * */ -#ifndef lint -static char SccsId[] = "@(#) quicksort.c version 3.3 3/6/92" ; -#endif /* modified version of @(#)qsort.c 4.2 (Berkeley) 3/9/83 */ @@ -52,7 +49,7 @@ static INT (*compare_fun)(); /* comparison function */ -static qst(); +static void qst(); #define compar(a,b) ( (*compare_fun)(a,b) ) @@ -138,7 +135,7 @@ * (And there are only three places where this is done). */ -static qst(base, max) +static void qst(base, max) char *base, *max; { register char c, *i, *j, *jj; diff -Nru graywolf-0.1.5/src/Ylib/radixsort.c graywolf-0.1.6/src/Ylib/radixsort.c --- graywolf-0.1.5/src/Ylib/radixsort.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/radixsort.c 2018-08-11 21:48:56.000000000 +0000 @@ -27,9 +27,6 @@ * SUCH DAMAGE. */ -#ifndef lint -static char SccsId[] = "@(#) radixsort.c (Yale) version 1.4 4/18/92" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/Ylib/rand.c graywolf-0.1.6/src/Ylib/rand.c --- graywolf-0.1.5/src/Ylib/rand.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/rand.c 2018-08-11 21:48:56.000000000 +0000 @@ -53,9 +53,6 @@ Tue Apr 7 09:37:53 EDT 1992 - now you don't need to initialize random number generator if you don't care. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) rand.c version 3.8 4/7/92" ; -#endif #include #include @@ -81,7 +78,7 @@ } /* end acm_random */ -Yset_random_seed( seed ) +void Yset_random_seed( seed ) INT seed ; { seed = ABS(seed) ; @@ -101,7 +98,7 @@ /* test whether generator works correctly. */ -main() +int main() { INT n, randnum ; Yset_random_seed( 1 ) ; @@ -111,6 +108,8 @@ printf( "The final value is randnum:%d\n", randnum ) ; printf( "It should be 1043618065 if everything is correct.\n" ) ; printf( "See article.\n\n" ) ; + + return 0; } #endif /* TEST */ diff -Nru graywolf-0.1.5/src/Ylib/rbtree.c graywolf-0.1.6/src/Ylib/rbtree.c --- graywolf-0.1.5/src/Ylib/rbtree.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/rbtree.c 2018-08-11 21:48:56.000000000 +0000 @@ -81,9 +81,6 @@ Wed Feb 26 03:55:15 EST 1992 - fixed problem with successor routines when passed nilS. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) rbtree.c (Yale) version 3.38 4/18/92" ; -#endif #define YTREE_H_DEFS @@ -131,12 +128,12 @@ static BINTREEPTR tree_search( P2(YTREEPTR tree, char *key) ) ; static BINTREEPTR tree_suc( P1(BINTREEPTR ptr) ) ; static BINTREEPTR tree_pred( P1(BINTREEPTR ptr) ) ; -static left_rotate( P2(YTREEPTR tree, BINTREEPTR x) ) ; -static right_rotate( P2(YTREEPTR tree, BINTREEPTR x) ) ; -static tree_free( P1(BINTREEPTR ptr) ) ; -static free_tree_and_data( P2(BINTREEPTR ptr, VOID (*userDelete)() ) ) ; -static tree_delete( P3(YTREEPTR tree, BINTREEPTR z, VOID (*userDelete)() ) ) ; -static tree_dump( P4(YTREEPTR tree,BINTREEPTR ptr, +static void left_rotate( P2(YTREEPTR tree, BINTREEPTR x) ) ; +static void right_rotate( P2(YTREEPTR tree, BINTREEPTR x) ) ; +static void tree_free( P1(BINTREEPTR ptr) ) ; +static void free_tree_and_data( P2(BINTREEPTR ptr, VOID (*userDelete)() ) ) ; +static void tree_delete( P3(YTREEPTR tree, BINTREEPTR z, VOID (*userDelete)() ) ) ; +static void tree_dump( P4(YTREEPTR tree,BINTREEPTR ptr, VOID (*print_key)(),INT printTab) ) ; YTREEPTR Yrbtree_init( compare_func ) @@ -433,7 +430,7 @@ } /* end Yrbtree_search_pred */ -static left_rotate( tree, x ) +static void left_rotate( tree, x ) YTREEPTR tree ; BINTREEPTR x ; { @@ -456,7 +453,7 @@ x->parent = y ; } /* left_rotate */ -static right_rotate( tree, x ) +static void right_rotate( tree, x ) YTREEPTR tree ; BINTREEPTR x ; { @@ -483,7 +480,7 @@ * Delete a node in the tree by using actual pointer. Also frees * user data if necessary. ----------------------------------------------------------------- */ -static tree_delete( tree, z, userDelete ) +static void tree_delete( tree, z, userDelete ) YTREEPTR tree ; BINTREEPTR z ; VOID (*userDelete)(); @@ -837,7 +834,7 @@ } } /* end Yrbtree_deleteCurrentEnumerate() */ -static tree_dump( tree, ptr, print_key, printTab ) +static void tree_dump( tree, ptr, print_key, printTab ) YTREEPTR tree ; BINTREEPTR ptr ; VOID (*print_key)() ; @@ -1022,7 +1019,7 @@ } /* end Yrbtree_interval_free() */ -static tree_free( ptr ) +static void tree_free( ptr ) BINTREEPTR ptr ; { @@ -1037,7 +1034,7 @@ } } /* end tree_free */ -static free_tree_and_data( ptr, userDelete ) +static void free_tree_and_data( ptr, userDelete ) BINTREEPTR ptr ; VOID (*userDelete)(); { @@ -1256,7 +1253,7 @@ return( (char *) data ) ; } /* end make_data */ -main() +int main() { YTREEPTR tree1 ; diff -Nru graywolf-0.1.5/src/Ylib/relpath.c graywolf-0.1.6/src/Ylib/relpath.c --- graywolf-0.1.5/src/Ylib/relpath.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/relpath.c 2018-08-11 21:48:56.000000000 +0000 @@ -46,9 +46,6 @@ DATE: Apr 18, 1989 REVISIONS: May 8, 1989 - updated to handle ../../ constructs. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) relpath.c version 3.2 8/28/90" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/Ylib/set.c graywolf-0.1.6/src/Ylib/set.c --- graywolf-0.1.5/src/Ylib/set.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/set.c 2018-08-11 21:48:56.000000000 +0000 @@ -66,9 +66,6 @@ May 8, 1990 - fixed error messages. Fri Feb 15 15:36:27 EST 1991 - renamed the set functions. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) set.c version 3.8 12/15/91" ; -#endif #include #include @@ -91,7 +88,7 @@ /* make sure set limits are correct */ if( lowerLimit > upperLimit ){ M( ERRMSG, "Yset_init", "Set limits are in error\n" ) ; - return ; + return NULL; } sizeSet = upperLimit - lowerLimit + 1 ; set->set = YMALLOC( sizeSet, YSETLISTPTR ) ; @@ -110,7 +107,7 @@ return( set ) ; } /* end Yset_init */ -Yset_free( set ) +void Yset_free( set ) YSETPTR set ; { INT i ; @@ -180,9 +177,7 @@ } /* end Yset_add */ /* delete a node from the set */ -Yset_delete( set, node ) -YSETPTR set ; -INT node ; +void Yset_delete( YSETPTR set, INT node ) { YSETLISTPTR delptr ; @@ -224,7 +219,7 @@ } /* end Yset_delete */ /* To clear set we only need to update in_set number and to null list */ -Yset_empty( set ) +void Yset_empty( set ) YSETPTR set ; { set->in_set++ ; @@ -234,7 +229,7 @@ /* Set complementation */ -Yset_comp( set ) +void Yset_comp( set ) YSETPTR set ; { diff -Nru graywolf-0.1.5/src/Ylib/stat.c graywolf-0.1.6/src/Ylib/stat.c --- graywolf-0.1.5/src/Ylib/stat.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/stat.c 2018-08-11 21:48:56.000000000 +0000 @@ -56,9 +56,6 @@ DATE: Mar 7, 1989 REVISIONS: Sun Apr 21 21:21:58 EDT 1991 - renamed to Ystat_ ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) stat.c (Yale) version 3.3 4/21/91" ; -#endif #include diff -Nru graywolf-0.1.5/src/Ylib/stats.c graywolf-0.1.6/src/Ylib/stats.c --- graywolf-0.1.5/src/Ylib/stats.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/stats.c 2018-08-11 21:48:56.000000000 +0000 @@ -49,11 +49,9 @@ compile for HPUX. Wed Feb 26 03:56:25 EST 1992 - added date for reference. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) stats.c version 3.8 2/26/92" ; -#endif #include +#include #ifdef VMS #define AVOID @@ -72,6 +70,7 @@ #include #include #include +#include #endif /* AVOID */ @@ -99,7 +98,7 @@ struct rusage rusage ; struct rlimit rlp ; caddr_t p ; - caddr_t sbrk() ; + // caddr_t sbrk() ; /*********************************************************** * Get the hostname diff -Nru graywolf-0.1.5/src/Ylib/string.c graywolf-0.1.6/src/Ylib/string.c --- graywolf-0.1.5/src/Ylib/string.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/string.c 2018-08-11 21:48:56.000000000 +0000 @@ -58,9 +58,6 @@ Wed Apr 17 23:37:19 EDT 1991 - fixed logic problem with Yremove_lblanks. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) string.c version 3.8 2/29/92" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/Ylib/system.c graywolf-0.1.6/src/Ylib/system.c --- graywolf-0.1.5/src/Ylib/system.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/system.c 2018-08-11 21:48:56.000000000 +0000 @@ -43,12 +43,10 @@ DATE: Apr 26, 1990 REVISIONS: May 12, 1990 - added move file and getenv. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) system.c version 3.4 8/28/90" ; -#endif #include #include +#include INT Ysystem( program, abortFlag, exec_statement, abort_func ) char *program ; @@ -77,21 +75,21 @@ return( 0 ) ; } /* end Ysystem */ -YcopyFile( sourcefile, destfile ) +void YcopyFile( sourcefile, destfile ) char *sourcefile, *destfile ; { sprintf( YmsgG, "/bin/cp %s %s", sourcefile, destfile ) ; Ysystem( "Ylib/YcopyFile", ABORT, YmsgG, NULL ) ; } /* end Ycopyfile */ -YmoveFile( sourcefile, destfile ) +void YmoveFile( sourcefile, destfile ) char *sourcefile, *destfile ; { sprintf( YmsgG, "/bin/mv %s %s", sourcefile, destfile ) ; Ysystem( "Ylib/YmoveFile", ABORT, YmsgG, NULL ) ; } /* end Ycopyfile */ -Yrm_files( files ) +void Yrm_files( files ) char *files ; { sprintf( YmsgG, "/bin/rm -rf %s", files ) ; diff -Nru graywolf-0.1.5/src/Ylib/time.c graywolf-0.1.6/src/Ylib/time.c --- graywolf-0.1.5/src/Ylib/time.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/time.c 2018-08-11 21:48:56.000000000 +0000 @@ -48,9 +48,6 @@ DATE: Oct 23, 1988 REVISIONS: Apr 27, 1989 - changed to Y prefix and added time in seconds. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) time.c version 3.3 8/28/90" ; -#endif #include #include diff -Nru graywolf-0.1.5/src/Ylib/timer.c graywolf-0.1.6/src/Ylib/timer.c --- graywolf-0.1.5/src/Ylib/timer.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/timer.c 2018-08-11 21:48:56.000000000 +0000 @@ -47,9 +47,6 @@ REVISIONS: Apr 01, 1991 - added SYS5 (A/UX) support (RAWeier) ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) timer.c version 4.3 10/25/91" ; -#endif #include @@ -64,7 +61,7 @@ static INT base_timeS = 0 ; /* the time in seconds at the start */ static INT milli_timeS ; /* the millisecond part of the start */ /* initialize the timer */ -Ytimer_start() +void Ytimer_start() { #ifdef SYS5 struct tms tp ; @@ -79,8 +76,7 @@ } /* end Ytimer_start */ /* this is the time elapsed since the timer start in milliseconds */ -Ytimer_elapsed( time_elapsed ) -INT *time_elapsed ; +void Ytimer_elapsed( INT *time_elapsed ) { #ifdef SYS5 struct tms tp; diff -Nru graywolf-0.1.5/src/Ylib/trans.c graywolf-0.1.6/src/Ylib/trans.c --- graywolf-0.1.5/src/Ylib/trans.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/trans.c 2018-08-11 21:48:56.000000000 +0000 @@ -52,9 +52,6 @@ Sat Nov 23 21:07:47 EST 1991 - added boundary translation functions. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) trans.c version 1.5 3/6/92" ; -#endif #define YTRANS_DEFS #include diff -Nru graywolf-0.1.5/src/Ylib/wgraphics.c graywolf-0.1.6/src/Ylib/wgraphics.c --- graywolf-0.1.5/src/Ylib/wgraphics.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/wgraphics.c 2018-08-11 21:48:56.000000000 +0000 @@ -65,9 +65,6 @@ Mon Aug 12 15:57:17 CDT 1991 - fixed problem with routine names. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) wgraphics.c version 3.8 8/12/91" ; -#endif #include #include @@ -80,6 +77,8 @@ #include #include #include +#include + #define NODIRECTORY 1 #define NOINIT 2 @@ -96,6 +95,9 @@ static INT numNetS = 0 ; /* net counter */ static INT numCharS = 0 ; /* symbol table counter */ +void TWflushWFrame(); +void TWdrawWRect( INT ref_num, INT x1,INT y1, INT x2, INT y2, INT color, char *label); + BOOL TWinitWGraphics( numC, desiredColors) INT numC ; char **desiredColors ; @@ -129,7 +131,7 @@ } /* end function TWinitWGraphics */ -TWcloseWGraphics() +void TWcloseWGraphics() { if(!(initS )){ @@ -145,7 +147,7 @@ } /* end TWcloseGraphics */ -TWstartWFrame() +void TWstartWFrame() { char filename[LRECL] ; char dummy[5] ; @@ -191,7 +193,7 @@ } /* end startWFrame */ /* write size of data at end of files and close them if frames are open */ -TWflushWFrame() +void TWflushWFrame() { char dummy[5] ; UNSIGNED_INT nitems ; @@ -230,7 +232,7 @@ } /* TWflushWFrame */ -TWsetWFrame( number ) +void TWsetWFrame( number ) INT number ; { char fileName[LRECL] ; @@ -255,7 +257,7 @@ /* ********* GENERIC WRITE ROUTINES ************** */ /* draw a rectangle whose diagonals are (x1,y1) and (x2,y2) */ /* if the specified color is default or invalid, use default color */ -TWdrawWPin( ref_num, x1,y1,x2,y2,color,label) +void TWdrawWPin( ref_num, x1,y1,x2,y2,color,label) INT ref_num ; /* reference number */ INT x1,y1,x2,y2, color; char *label; @@ -264,7 +266,7 @@ } /* end drawWPin */ /* draw a one pixel tall line segment from x1,y1 to x2,y2 */ -TWdrawWLine( ref_num,x1,y1,x2,y2,color,label) +void TWdrawWLine( ref_num,x1,y1,x2,y2,color,label) INT ref_num ; /* reference number */ INT x1,y1,x2,y2,color ; char *label; @@ -306,10 +308,7 @@ /* draw a rectangle whose diagonals are (x1,y1) and (x2,y2) */ /* if the specified color is default or invalid, use default color */ -TWdrawWRect( ref_num, x1,y1,x2,y2,color,label) -INT ref_num ; /* reference number */ -INT x1,y1,x2,y2, color; -char *label; +void TWdrawWRect( INT ref_num, INT x1,INT y1, INT x2, INT y2, INT color, char *label) { DATABOX record ; UNSIGNED_INT nitems ; diff -Nru graywolf-0.1.5/src/Ylib/ydebug.c graywolf-0.1.6/src/Ylib/ydebug.c --- graywolf-0.1.5/src/Ylib/ydebug.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/ydebug.c 2018-08-11 21:48:56.000000000 +0000 @@ -67,9 +67,6 @@ Tue Feb 4 15:31:28 EST 1992 - added return_code variable to Ydebug so you can switch it in the debugger if necessary. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) ydebug.c (Yale) version 3.15 2/7/92" ; -#endif #include #include @@ -137,7 +134,7 @@ return( debugFlagS ) ; } /* end YdebugAssert */ -YdebugWrite() +void YdebugWrite() { ROUTINEPTR data ; /* the data in the tree */ FILE *fp ; /* write to the debug file */ @@ -160,7 +157,7 @@ } } -YsetDebug( flag ) +void YsetDebug( flag ) BOOL flag ; { @@ -215,7 +212,7 @@ return( data ) ; } /* end make_data_debug */ -YfixDebug( ptr, type ) +void YfixDebug( ptr, type ) char *ptr ; INT type ; { diff -Nru graywolf-0.1.5/src/Ylib/yreadpar.c graywolf-0.1.6/src/Ylib/yreadpar.c --- graywolf-0.1.5/src/Ylib/yreadpar.c 2018-07-15 06:39:21.000000000 +0000 +++ graywolf-0.1.6/src/Ylib/yreadpar.c 2018-08-11 21:48:56.000000000 +0000 @@ -61,9 +61,6 @@ Sat Apr 18 11:29:50 EDT 1992 - added compactor program entry - CMPT. ----------------------------------------------------------------- */ -#ifndef lint -static char SccsId[] = "@(#) yreadpar.c (Yale) version 1.6 10/1/91" ; -#endif #include #include @@ -703,8 +700,8 @@ object1, object2 ); M( ERRMSG, "Yreadpar_spacing", YmsgG ) ; M( ERRMSG, NULL, "\tDefaulting to zero.\n\n" ) ; - return( 0 ) ; } + return( 0 ) ; } /* end Yreadpar_spacing */ @@ -765,8 +762,8 @@ object ); M( ERRMSG, "Yreadpar_layer_res", YmsgG ) ; M( ERRMSG, NULL, "\tDefaulting to zero.\n\n" ) ; - return( 0 ) ; } + return( 0 ) ; } /* end Yreadpar_layer_res */ @@ -789,8 +786,8 @@ object ); M( ERRMSG, "Yreadpar_layer_cap", YmsgG ) ; M( ERRMSG, NULL, "\tDefaulting to zero.\n\n" ) ; - return( (DOUBLE) 0.0 ) ; } + return( (DOUBLE) 0.0 ) ; } /* end Yreadpar_layer_cap */ @@ -814,8 +811,8 @@ object ); M( ERRMSG, "Yreadpar_layer_HnotV", YmsgG ) ; M( ERRMSG, NULL, "\tDefaulting to horizontal.\n\n" ) ; - return( TRUE ) ; } + return( TRUE ) ; } /* end Yreadpar_layer_HnotV */ @@ -838,8 +835,8 @@ object ); M( ERRMSG, "Yreadpar_layer2id", YmsgG ) ; M( ERRMSG, NULL, "\tDefaulting to horizontal.\n\n" ) ; - return( TRUE ) ; } + return( TRUE ) ; } /* end Yreadpar_layer2id */ @@ -888,8 +885,8 @@ "Could not find a via between layers %s and %s.\n", object1, object2 ); M( ERRMSG, "Yreadpar_vianame", YmsgG ) ; - return( NIL(char *) ) ; } + return( NIL(char *) ) ; } /* end Yreadpar_vianame */ diff -Nru graywolf-0.1.5/tests/CMakeLists.txt graywolf-0.1.6/tests/CMakeLists.txt --- graywolf-0.1.5/tests/CMakeLists.txt 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/CMakeLists.txt 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,36 @@ +add_test( + NAME install_in_tmp + COMMAND ${CMAKE_CURRENT_SOURCE_DIR}/install_in_tmp.sh ${CMAKE_SOURCE_DIR} ${CMAKE_BINARY_DIR} +) +set_tests_properties(install_in_tmp PROPERTIES DEPENDS graywolf) + +add_test( + NAME map9v3 + COMMAND ${CMAKE_CURRENT_SOURCE_DIR}/runtest.sh ${CMAKE_SOURCE_DIR} ${CMAKE_BINARY_DIR} map9v3 +) +set_tests_properties(map9v3 PROPERTIES DEPENDS install_in_tmp) + +add_test( + NAME map9v3-twsc + COMMAND ${CMAKE_CURRENT_SOURCE_DIR}/twsc/runtest.sh ${CMAKE_SOURCE_DIR} ${CMAKE_BINARY_DIR} map9v3 +) +set_tests_properties(map9v3-twsc PROPERTIES DEPENDS install_in_tmp) + +add_test( + NAME map9v3-mincut + COMMAND ${CMAKE_CURRENT_SOURCE_DIR}/mincut/runtest.sh ${CMAKE_SOURCE_DIR} ${CMAKE_BINARY_DIR} map9v3 +) +set_tests_properties(map9v3-mincut PROPERTIES DEPENDS install_in_tmp) + +add_test( + NAME map9v3-twmc + COMMAND ${CMAKE_CURRENT_SOURCE_DIR}/twmc/runtest.sh ${CMAKE_SOURCE_DIR} ${CMAKE_BINARY_DIR} map9v3 +) +set_tests_properties(map9v3-twmc PROPERTIES DEPENDS install_in_tmp) + +add_test( + NAME map9v3_other_seed + COMMAND ${CMAKE_CURRENT_SOURCE_DIR}/runtest.sh ${CMAKE_SOURCE_DIR} ${CMAKE_BINARY_DIR} map9v3_other_seed +) +set_tests_properties(map9v3_other_seed PROPERTIES DEPENDS install_in_tmp) + diff -Nru graywolf-0.1.5/tests/install_in_tmp.sh graywolf-0.1.6/tests/install_in_tmp.sh --- graywolf-0.1.5/tests/install_in_tmp.sh 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/install_in_tmp.sh 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,15 @@ +#!/bin/sh + +rm -rf $2/micro_env +mkdir -p $2/micro_env +mkdir -p $2/micro_env/bin +cp $2/src/mincut/Mincut $2/micro_env/bin/ +cp $2/src/twmc/TimberWolfMC $2/micro_env/bin/ +cp $2/src/twsc/TimberWolfSC $2/micro_env/bin/ +cp $2/src/genrows/genrows $2/micro_env/bin/ +cp $2/src/mc_compact/mc_compact $2/micro_env/bin/ +cp $2/src/syntax/syntax $2/micro_env/bin/ +cp $2/script/show_flows $2/micro_env/bin/ +cp $1/script/splt_file.a $2/micro_env/bin/ +cp -r $1/flow $2/micro_env/bin/ +ln -sf flow.noroute $2/micro_env/bin/flow/flow diff -Nru graywolf-0.1.5/tests/map9v3/expected/map9v3.blk graywolf-0.1.6/tests/map9v3/expected/map9v3.blk --- graywolf-0.1.5/tests/map9v3/expected/map9v3.blk 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3/expected/map9v3.blk 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,19 @@ +rows 9 +row -239 -200 24239 1800 mirror +row -239 1800 24239 3800 +row -239 3800 24239 5800 mirror +row -239 5800 24239 7800 +row -239 7800 24239 9800 mirror +row -239 9800 24239 11800 +row -239 11800 24239 13800 mirror +row -239 13800 24239 15800 +row -239 15800 24239 17800 mirror + +/* + The Tile and Macro Information: + numtiles 1 + -240 -200 24240 27400 + + nummacros 0 + +*/ diff -Nru graywolf-0.1.5/tests/map9v3/expected/map9v3.out graywolf-0.1.6/tests/map9v3/expected/map9v3.out --- graywolf-0.1.5/tests/map9v3/expected/map9v3.out 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3/expected/map9v3.out 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,1147 @@ + +TimberWolfSC version:v6.0 date:Mon May 25 21:19:07 EDT 1992 +Row-Based Placement and Global Routing Program +Authors: Carl Sechen, Kai-Win Lee, and Bill Swartz, + Yale University + + + + +TimberWolf will perform a global route step +feedThruWidth: 160 +track.pitch: 200 +route2act was not entered in the .par file +route2act defaulted to track.pitch +route2act: 200 +Directory overriden with 'TWDIR' environment variable + +The random number generator seed is: 12345 + + +rowSep: 0.000000 + +[get_stat_hints]:Found hints in file +[get_stat_hints]:Total cells:253 Number of nets:228 + +[add_swap_group]:Implicit swap group <$abc$733$n76_bF$pin> created +[add_swap_group]:Implicit swap group <$abc$733$n75_1_bF$pin> created +[add_swap_group]:Implicit swap group created +[add_swap_group]:Implicit swap group <$abc$733$n164_bF$pin> created +[add_extra_cells]:Added 114 spacer cells to the gate array +total cell length: 213440 +total block length: 220302 +block x-span:24478 block y-span:18000 + + +TIMING FACTOR (COMPUTED) : 4.000000 +Using default value of bin.penalty.control:1.000000 +Original Average Cell Width:992.000000 +Adjusted Average Cell Width:468.000000 +numBinsG automatically set to:53 +binWidthG = 468 +average_cell_width is:468 +standard deviation of cell length is:1189.83 +TimberWolfSC starting from the beginning + + + +THIS IS THE ROUTE COST OF THE ORIGINAL PLACEMENT: 3476250 + +The number of nets with 2 pins is 134 +The number of nets with 3 pins is 33 +The number of nets with 4 pins is 19 +The number of nets with 5 pins is 13 +The number of nets with 6 pins is 15 +The number of nets with 7 pins is 7 +The number of nets with 8 pins is 4 +The number of nets with 12 pins is 2 +The number of nets with 32 pins is 1 +The number of nets with 100 pins or more is 0 +Average number of pins per net = 3.223684 +The maximum number of pins on a single net is:32 + +Percentage of Nets Connecting to at least 2 cells:1.00 +Percentage of Nets Connecting to at least 3 cells:0.46 +Percentage of Nets Connecting to at least 4 cells:0.28 +Percentage of Nets Connecting to at least 5 cells:0.20 +Percentage of Nets Connecting to at least 6 cells:0.14 + +bdxlen:25280 bdylen:18400 +l:-239 t:17800 r:25041 b:-600 + + + +THIS IS THE ROUTE COST OF THE CURRENT PLACEMENT: 3123651 + + + +THIS IS THE PENALTY OF THE CURRENT PLACEMENT: 101690 +block:1 desire:24478 +block:2 desire:24478 +block:3 desire:24478 +block:4 desire:24478 +block:5 desire:24478 +block:6 desire:24478 +block:7 desire:24478 +block:8 desire:24478 +block:9 desire:24478 +Total Desired Length: 220302 +rowControl: 0.024 expected deviation above minimum: 6.02 +rowControl: 0.023 expected deviation above minimum: 3.21 + +Iter T fds Wire Penal Time P_lim err binC rowC timeC s/p rej. Acc. g_sw Vwt + -1: 0.00e+00 0 4517291 45918 0 999999 0.00 1.00 6.00 3.00 0.00 0.00 0.949 + 0: 1.21e+05 0 4743320 49442 0 999999 0.00 1.00 6.00 3.00 1.11 0.00 0.949 0.99 + 1: 1.16e+05 0 4738524 58078 0 999999 0.00 1.00 6.00 3.00 1.06 0.00 0.952 0.99 + 2: 8.80e+04 0 4672292 58718 0 166201 0.00 1.00 6.00 3.00 1.09 0.00 0.942 0.98 + 3: 6.23e+04 0 4390693 37594 0 127044 0.00 1.00 6.00 3.00 1.12 0.00 0.917 0.98 + 4: 4.23e+04 0 4280096 26390 0 100426 0.00 1.00 6.00 3.00 1.12 0.00 0.890 0.97 + 5: 3.38e+04 0 4332618 26722 0 79708 0.00 1.00 5.96 3.00 1.14 0.00 0.844 0.95 + 6: 2.71e+04 0 4126538 18718 0 68952 0.00 1.00 5.94 3.00 1.14 0.00 0.815 0.94 + 7: 2.33e+04 0 4101353 30558 0 61800 0.00 1.00 5.63 3.00 1.20 0.00 0.780 0.92 + 8: 2.07e+04 0 4021908 16162 0 57371 0.00 1.00 5.77 3.00 1.22 0.00 0.750 0.91 + 9: 1.82e+04 0 4079279 18394 0 52907 0.00 1.00 5.38 3.00 1.23 0.00 0.725 0.91 + 10: 1.59e+04 0 3964203 15826 0 50515 0.00 1.00 5.07 3.00 1.20 0.00 0.701 0.89 + 11: 1.47e+04 0 3828881 25758 0 46756 0.00 1.00 4.67 3.00 1.30 0.00 0.671 0.88 + 12: 1.41e+04 0 3857322 33758 0 43885 0.00 1.00 4.66 3.00 1.28 0.00 0.644 0.85 + 13: 1.34e+04 0 3605396 11998 0 43342 0.00 1.00 4.96 3.00 1.23 0.00 0.623 0.87 + 14: 1.17e+04 0 3725961 17754 0 41915 0.00 1.00 4.42 3.00 1.35 0.00 0.610 0.86 + 15: 1.15e+04 0 3393589 23202 0 39366 0.00 1.00 4.12 3.00 1.36 0.00 0.577 0.84 + 16: 1.07e+04 0 3587073 21274 0 38162 0.00 1.00 4.03 3.00 1.32 0.00 0.562 0.83 + 17: 9.33e+03 0 3512893 14554 0 36722 0.00 1.00 3.87 3.00 1.35 0.00 0.549 0.81 + 18: 8.93e+03 0 3390060 27034 0 35255 0.00 1.00 3.45 3.00 1.41 0.00 0.521 0.81 + 19: 8.70e+03 0 3365439 16478 0 35267 0.00 1.00 3.54 3.00 1.39 0.00 0.501 0.80 + 20: 8.58e+03 0 3244200 12634 0 32782 0.00 1.00 3.54 3.00 1.45 0.00 0.482 0.81 + 21: 7.96e+03 0 3322389 9434 0 32013 0.00 1.00 3.53 3.00 1.45 0.00 0.472 0.77 + 22: 7.68e+03 0 3198014 19034 0 31009 0.00 1.00 3.50 3.00 1.44 0.00 0.452 0.75 + 23: 7.44e+03 0 2893155 18394 0 30539 0.00 1.00 3.48 3.00 1.46 0.00 0.443 0.76 + 24: 7.00e+03 0 3173856 18074 0 29533 0.00 1.00 3.46 3.00 1.45 0.00 0.446 0.76 + 25: 7.42e+03 0 3098174 20006 0 28065 0.00 1.00 3.43 3.00 1.45 0.00 0.434 0.75 + 26: 7.38e+03 0 3094445 15514 0 29847 0.00 1.00 3.41 3.00 1.47 0.00 0.440 0.74 + 27: 7.18e+03 0 3191458 19674 0 28239 0.00 1.00 3.36 3.00 1.42 0.00 0.443 0.75 + 28: 7.72e+03 0 3077790 17758 0 29230 0.00 1.00 3.33 3.00 1.40 0.00 0.433 0.77 + 29: 7.00e+03 0 3098729 18074 0 30480 0.00 1.00 3.29 3.00 1.42 0.00 0.450 0.74 + 30: 6.86e+03 0 3193370 12310 0 29060 0.00 1.00 3.24 3.00 1.45 0.00 0.442 0.71 + 31: 6.96e+03 0 3130129 16162 0 27776 0.00 1.00 3.13 3.00 1.48 0.00 0.439 0.75 + 32: 6.80e+03 0 3178531 10398 0 28143 0.00 1.00 3.06 3.00 1.40 0.00 0.442 0.73 + 33: 6.85e+03 0 3127299 12314 0 28044 0.00 1.00 2.90 3.00 1.45 0.00 0.439 0.74 + 34: 6.63e+03 0 2941924 11358 0 26796 0.00 1.00 2.77 3.00 1.47 0.00 0.443 0.73 + 35: 6.41e+03 0 2984202 16474 0 26539 0.00 1.00 2.61 3.00 1.42 0.00 0.443 0.74 + 36: 7.28e+03 0 2954852 11998 0 26083 0.00 1.00 2.52 3.00 1.43 0.00 0.427 0.75 + 37: 6.69e+03 0 3072857 16482 0 26173 0.00 1.00 2.36 3.00 1.43 0.00 0.448 0.76 + 38: 6.62e+03 0 2880050 21274 0 26179 0.00 1.00 2.27 3.00 1.34 0.00 0.441 0.74 + 39: 7.07e+03 0 2953326 21274 0 25760 0.00 1.02 2.27 3.00 1.50 0.00 0.433 0.74 + 40: 6.86e+03 0 2943723 15510 0 27430 0.00 1.00 2.28 3.00 1.44 0.00 0.443 0.75 + 41: 6.37e+03 0 3030647 14878 0 26387 0.00 1.04 2.16 3.00 1.43 0.00 0.447 0.73 + 42: 6.41e+03 0 2956097 13270 0 25568 0.00 1.07 2.03 3.00 1.43 0.00 0.439 0.74 + 43: 6.12e+03 0 2916215 29594 0 25093 0.00 1.02 1.85 3.00 1.45 0.00 0.444 0.74 + 44: 5.95e+03 0 2836613 18718 0 25296 0.00 1.04 2.09 3.00 1.39 0.00 0.443 0.73 + 45: 6.49e+03 0 2848741 20314 0 23803 0.00 1.10 2.06 3.00 1.47 0.00 0.431 0.73 + 46: 6.37e+03 0 2813841 26394 0 25043 0.00 1.05 2.07 3.00 1.45 0.00 0.442 0.73 + 47: 6.24e+03 0 2776032 23518 0 24883 0.00 1.03 2.27 3.00 1.38 0.00 0.442 0.72 + 48: 5.98e+03 0 2751095 14558 0 24315 0.00 1.08 2.39 3.00 1.38 0.00 0.444 0.71 + 49: 5.84e+03 0 2810288 21918 0 23072 0.00 1.10 2.24 3.00 1.46 0.00 0.442 0.71 + 50: 6.32e+03 0 2763840 20954 0 22864 0.00 1.14 2.33 3.00 1.37 0.00 0.432 0.70 + 51: 5.75e+03 0 2826441 12958 0 23218 0.00 1.20 2.40 3.00 1.44 0.00 0.449 0.72 + 52: 5.67e+03 0 2601377 11674 0 23823 0.00 1.27 2.19 3.00 1.45 0.00 0.441 0.71 + 53: 5.43e+03 0 2781387 28634 0 23600 0.00 1.37 1.92 3.00 1.38 0.00 0.444 0.70 + 54: 5.77e+03 0 2530290 20318 0 21419 0.00 1.45 2.33 3.00 1.39 0.00 0.434 0.70 + 55: 5.53e+03 0 2654425 12314 0 21850 0.02 1.56 2.42 3.00 1.39 0.00 0.444 0.67 + 56: 5.49e+03 0 2656785 11678 0 20821 0.00 1.66 2.17 3.00 1.36 0.00 0.441 0.71 + 57: 5.43e+03 0 2584524 16158 0 21151 0.04 1.74 1.89 3.00 1.32 0.00 0.441 0.68 + 58: 5.08e+03 0 2508733 16474 0 21043 0.06 1.88 1.82 3.00 1.25 0.00 0.447 0.69 + 59: 5.00e+03 0 2616910 14558 0 19760 0.01 2.05 1.77 3.00 1.26 0.00 0.442 0.68 + 60: 5.29e+03 0 2483965 12638 0 20166 0.00 2.11 1.64 3.00 1.25 0.00 0.435 0.67 + 61: 4.69e+03 0 2566086 30874 0 20272 0.00 2.23 1.40 3.00 1.25 0.00 0.452 0.67 + 62: 4.98e+03 0 2521222 12958 0 18580 0.02 2.32 2.16 3.00 1.32 0.01 0.434 0.66 + 63: 4.85e+03 0 2469369 21598 0 18921 0.00 2.40 1.95 3.00 1.22 0.01 0.443 0.66 + 64: 4.78e+03 0 2619499 16790 0 18980 0.01 2.50 2.24 3.00 1.23 0.02 0.441 0.66 + 65: 4.77e+03 0 2443482 11030 0 17420 0.01 2.57 2.26 3.00 1.22 0.03 0.440 0.63 + 66: 4.51e+03 0 2410241 16158 0 17583 0.02 2.65 1.94 3.00 1.29 0.02 0.445 0.65 + 67: 4.65e+03 0 2372266 19682 0 17694 0.01 2.77 1.95 3.00 1.34 0.02 0.437 0.64 + 68: 4.21e+03 0 2364424 10714 0 17823 0.03 2.78 2.20 3.00 1.26 0.03 0.450 0.64 + 69: 4.36e+03 0 2264044 13918 0 17307 0.01 2.89 1.88 3.00 1.30 0.03 0.436 0.59 + 70: 4.23e+03 0 2240521 15830 0 15529 0.01 2.96 1.78 3.00 1.29 0.03 0.443 0.68 + 71: 4.13e+03 0 2254374 19682 0 15624 0.02 2.99 1.82 3.00 1.17 0.04 0.442 0.60 + 72: 4.19e+03 0 2194736 17758 0 16191 0.00 3.12 2.13 3.00 1.23 0.04 0.438 0.60 + 73: 4.31e+03 0 2151203 7506 0 15679 0.00 3.13 2.32 3.00 1.35 0.05 0.437 0.63 + 74: 4.04e+03 0 2210090 14238 0 15467 0.00 3.19 1.83 3.00 1.24 0.05 0.446 0.60 + 75: 4.01e+03 0 2150819 11354 0 16469 0.00 3.22 1.81 3.00 1.22 0.04 0.441 0.59 + 76: 3.91e+03 0 2136210 12954 0 14615 0.00 3.39 1.60 3.00 1.25 0.05 0.443 0.56 + 77: 3.76e+03 0 2114095 21594 0 14646 0.00 3.45 1.51 3.00 1.19 0.04 0.444 0.57 + 78: 3.81e+03 0 2200671 10398 0 13936 0.00 3.49 2.06 3.00 1.24 0.07 0.438 0.55 + 79: 3.81e+03 0 2106950 11674 0 13639 0.00 3.54 1.81 3.00 1.23 0.06 0.440 0.56 + 80: 3.73e+03 0 2003883 13278 0 14473 0.02 3.55 1.67 3.00 1.20 0.05 0.442 0.57 + 81: 3.55e+03 0 2109300 15514 0 13806 0.00 3.63 1.66 3.00 1.06 0.05 0.435 0.58 + 82: 3.33e+03 0 1951257 19674 0 13481 0.01 3.66 1.83 3.00 0.97 0.06 0.418 0.54 + 83: 3.29e+03 0 1851100 6866 0 12708 0.00 3.71 2.34 3.00 1.06 0.08 0.394 0.52 + 84: 3.11e+03 0 1949109 13598 0 12366 0.00 3.73 1.87 3.00 1.07 0.09 0.381 0.50 + 85: 2.88e+03 0 1878320 8794 0 11795 0.00 3.75 1.95 3.00 1.07 0.09 0.366 0.49 + 86: 2.76e+03 0 1834739 12958 0 11198 0.00 3.77 1.65 3.00 1.09 0.08 0.347 0.49 + 87: 2.84e+03 0 1755601 8794 0 11043 0.01 3.78 1.70 3.00 0.98 0.09 0.325 0.48 + 88: 2.73e+03 0 1682685 11354 0 11276 0.00 3.75 1.43 3.00 0.96 0.10 0.317 0.48 + 89: 2.44e+03 0 1658863 9438 0 11051 0.00 3.77 1.38 3.00 0.98 0.10 0.311 0.45 + 90: 2.37e+03 0 1560740 11986 0 10166 0.00 3.75 1.18 3.00 0.97 0.11 0.289 0.43 + 91: 2.35e+03 0 1552494 9110 0 9359 0.00 3.68 1.22 3.00 0.86 0.12 0.274 0.44 + 92: 2.11e+03 0 1504800 8790 0 9083 0.00 3.66 1.01 3.00 1.04 0.12 0.272 0.43 + 93: 2.12e+03 0 1491606 15510 0 8839 0.00 3.62 1.00 3.00 0.89 0.13 0.249 0.41 + 94: 2.05e+03 0 1462872 9750 0 8392 0.00 3.64 1.41 3.00 0.79 0.14 0.242 0.39 + 95: 1.90e+03 0 1412075 10074 0 8937 0.00 3.64 1.31 3.00 0.86 0.13 0.236 0.39 + 96: 1.92e+03 0 1442971 8798 0 8429 0.00 3.63 1.25 3.00 0.91 0.14 0.217 0.40 + 97: 1.81e+03 0 1386287 7834 0 7753 0.00 3.56 1.09 3.00 0.89 0.16 0.214 0.39 + 98: 1.66e+03 0 1425397 11678 0 7738 0.00 3.53 1.00 3.00 0.89 0.16 0.208 0.39 + 99: 1.70e+03 0 1361156 9754 0 7378 0.00 3.46 1.16 3.00 0.83 0.17 0.188 0.38 +100: 1.61e+03 0 1322762 9110 0 6835 0.01 3.40 1.14 3.00 0.85 0.20 0.187 0.35 +101: 1.53e+03 0 1311085 6862 0 7566 0.00 3.37 1.08 3.00 0.86 0.16 0.179 0.38 +102: 1.51e+03 0 1277758 10390 0 6799 0.00 3.32 1.00 3.00 0.81 0.19 0.168 0.38 +103: 1.33e+03 0 1267633 8794 0 6172 0.01 3.29 1.11 3.00 1.00 0.22 0.171 0.38 +104: 1.37e+03 0 1257010 8150 0 6358 0.00 3.23 1.07 3.00 0.75 0.23 0.149 0.36 +105: 1.33e+03 0 1251291 7518 0 5946 0.00 3.11 1.00 3.00 0.75 0.22 0.148 0.37 +106: 1.27e+03 0 1190086 12634 0 6198 0.00 3.05 1.00 3.00 0.72 0.20 0.144 0.35 +107: 1.20e+03 0 1150964 7186 0 5959 0.00 3.01 1.46 3.00 0.70 0.21 0.138 0.35 +108: 1.15e+03 0 1180041 6866 0 5349 0.02 2.95 1.32 3.00 0.64 0.27 0.131 0.35 +109: 1.13e+03 0 1163245 6874 0 5117 0.00 2.89 1.15 3.00 0.62 0.28 0.123 0.35 +110: 1.05e+03 0 1185747 9750 0 5080 0.00 2.78 1.00 3.00 0.62 0.26 0.124 0.36 +111: 1.01e+03 0 1121597 8474 0 4954 0.00 2.71 1.24 3.00 0.64 0.28 0.114 0.34 +112: 1.00e+03 0 1092047 7518 0 4729 0.01 2.64 1.34 3.00 0.82 0.28 0.106 0.36 +113: 9.34e+02 0 1138297 7510 0 4862 0.00 2.60 1.34 3.00 0.75 0.25 0.108 0.33 +114: 9.04e+02 0 1069150 7518 0 4756 0.00 2.57 1.36 3.00 0.76 0.27 0.100 0.34 +115: 9.03e+02 0 1081107 6870 0 4425 0.00 2.53 1.41 3.00 0.62 0.31 0.092 0.33 +116: 8.27e+02 0 1068867 7826 0 4186 0.00 2.53 1.41 3.00 0.67 0.30 0.097 0.33 +117: 8.07e+02 0 1065625 9114 0 4415 0.00 2.53 1.41 3.00 0.63 0.31 0.087 0.33 +118: 8.60e+02 0 1057602 7830 0 3553 0.01 2.53 1.41 3.00 0.54 0.42 0.074 0.32 +119: 8.07e+02 0 1056856 8158 0 4117 0.00 2.53 1.41 3.00 0.60 0.36 0.083 0.33 +120: 7.82e+02 0 1045689 8798 0 3865 0.00 2.53 1.41 3.00 0.54 0.37 0.077 0.35 +121: 7.33e+02 0 1030188 10070 0 4033 0.00 2.53 1.41 3.00 0.58 0.35 0.077 0.34 +122: 7.13e+02 0 1063255 10070 0 3388 0.01 2.53 1.41 3.00 0.49 0.44 0.070 0.33 +123: 7.34e+02 0 1052165 9434 0 3332 0.00 2.53 1.41 3.00 0.45 0.47 0.061 0.33 +124: 7.33e+02 0 1041454 7518 0 3306 0.01 2.53 1.41 3.00 0.51 0.49 0.061 0.34 +125: 7.43e+02 0 1041343 7186 0 3221 0.00 2.53 1.41 3.00 0.59 0.46 0.059 0.33 +126: 5.53e+02 0 1025931 7830 0 3737 0.00 2.53 1.41 3.00 0.55 0.43 0.060 0.34 +127: 6.23e+02 0 1023697 7830 0 3232 0.00 2.53 1.41 3.00 0.47 0.47 0.054 0.33 +128: 5.82e+02 0 1021080 8478 0 3097 0.00 2.53 1.41 3.00 0.60 0.50 0.053 0.35 +129: 6.05e+02 0 1005863 7830 0 3087 0.00 2.53 1.41 3.00 0.48 0.50 0.050 0.35 +130: 5.42e+02 0 998852 7834 0 3094 0.00 2.53 1.41 3.00 0.46 0.50 0.050 0.32 +131: 4.51e+02 0 999669 7194 0 3121 0.00 2.53 1.41 3.00 0.45 0.50 0.049 0.33 +132: 5.26e+02 0 996774 7830 0 2751 0.00 2.53 1.41 3.00 0.48 0.56 0.043 0.33 +133: 4.96e+02 0 1008344 7194 0 2437 0.00 2.53 1.41 3.00 0.45 0.59 0.043 0.34 +134: 4.80e+02 0 994440 7514 0 2776 0.00 2.53 1.41 3.00 0.44 0.55 0.041 0.34 +135: 5.21e+02 0 990007 7198 0 2407 0.00 2.53 1.41 3.00 0.33 0.62 0.038 0.33 +136: 4.33e+02 0 990536 6870 0 2210 0.00 2.53 1.41 3.00 0.41 0.63 0.039 0.35 +137: 3.94e+02 0 984856 7510 0 2468 0.00 2.53 1.41 3.00 0.47 0.60 0.036 0.32 +138: 3.99e+02 0 986451 7186 0 2864 0.00 2.53 1.41 3.00 0.36 0.55 0.033 0.32 +139: 3.62e+02 0 987904 7510 0 2326 0.00 2.53 1.41 3.00 0.34 0.63 0.032 0.33 +140: 3.82e+02 0 973753 6874 0 2262 0.00 2.53 1.41 3.00 0.34 0.64 0.028 0.34 +141: 3.83e+02 0 968287 6878 0 2120 0.00 2.53 1.41 3.00 0.43 0.66 0.027 0.33 +142: 3.40e+02 0 976442 6878 0 2425 0.00 2.53 1.41 3.00 0.34 0.62 0.026 0.34 +143: 3.00e+02 0 963816 7514 0 2114 0.00 2.53 1.41 3.00 0.39 0.65 0.024 0.35 +144: 3.30e+02 0 958082 7190 0 1825 0.00 2.53 1.41 3.00 0.41 0.68 0.020 0.34 +145: 3.14e+02 0 957794 6870 0 1962 0.00 2.53 1.41 3.00 0.48 0.67 0.019 0.34 +146: 2.46e+02 0 951190 6870 0 1771 0.00 2.53 1.41 3.00 0.44 0.67 0.019 0.34 +147: 2.52e+02 0 951470 6870 0 1597 0.00 2.53 1.41 3.00 0.62 0.69 0.015 0.35 +148: 2.24e+02 0 954783 6870 0 1549 0.00 2.53 1.41 3.00 0.41 0.70 0.014 0.34 +149: 1.90e+02 0 944940 6870 0 1485 0.00 2.53 1.41 3.00 0.59 0.70 0.013 0.34 +150: 1.62e+02 0 946130 6870 0 1355 0.00 2.53 1.41 3.00 0.30 0.70 0.011 0.33 +151: 1.32e+02 0 947765 6870 0 1188 0.00 2.53 1.41 3.00 0.47 0.71 0.009 0.32 +152: 1.01e+02 0 943448 6866 0 992 0.00 2.53 1.41 3.00 0.42 0.72 0.008 0.32 +153: 9.15e+01 0 942659 6866 0 814 0.00 2.53 1.41 3.00 0.56 0.73 0.004 0.33 +154: 7.37e+01 0 942350 6866 0 686 0.00 2.53 1.41 3.00 0.50 0.75 0.003 0.34 +155: 5.25e+01 0 939182 6866 0 563 0.00 2.53 1.41 3.00 0.56 0.76 0.003 0.33 +Total Wire Length - X-Component:533838 +Total Wire Length - Y-Component:477908 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23360 -1118 24478 + 2 24000 -478 24478 + 3 24320 -158 24478 + 4 24480 2 24478 + 5 24160 -318 24478 + 6 24160 -318 24478 + 7 24160 -318 24478 + 8 21760 -2718 24478 + 9 23040 -1438 24478 + +LONGEST Block is:4 Its length is:24480 +total penalty is 6866 +Removed the cell overlaps --- Will do neighbor interchanges only now + +TOTAL INTERCONNECT LENGTH: 1011746 +initialRowControl: 0.132 +finalRowControl: 0.024 +iter T Wire accept Time + 157 0.001 983369 5% 0 + 158 0.001 982179 1% 0 + 159 0.001 982009 1% 0 +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 253 + the number of switchable L segment = 151 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 259 + the number of switchable L segment = 200 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 578361 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-28 +reduction: -1058 total_red:-1058 +iterations : 4 +final total global wire : 577303 +final total time penalty: 0 + +Total global wire reduced by: 0.183% + +VERIFICATION +final total global wire : 577303 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 59 + + +no. of accepted flips: 320 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 50 + + +THIS G. ROUTING IS BEING SAVED AS BEST SO FAR + +FINAL NUMBER OF ROUTING TRACKS: 50 + +MAX OF CHANNEL: 1 is: 2 +MAX OF CHANNEL: 2 is: 5 +MAX OF CHANNEL: 3 is: 4 +MAX OF CHANNEL: 4 is: 10 +MAX OF CHANNEL: 5 is: 5 +MAX OF CHANNEL: 6 is: 7 +MAX OF CHANNEL: 7 is: 5 +MAX OF CHANNEL: 8 is: 7 +MAX OF CHANNEL: 9 is: 3 +MAX OF CHANNEL: 10 is: 2 +Confirming number of eliminated feeds:0 +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 257 + the number of switchable L segment = 155 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 257 + the number of switchable L segment = 197 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 574508 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-28 +reduction: -598 total_red:-598 +iterations : 4 +final total global wire : 573910 +final total time penalty: 0 + +Total global wire reduced by: 0.104% + +VERIFICATION +final total global wire : 573910 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 54 + + +no. of accepted flips: 477 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 49 + + +THIS G. ROUTING IS BEING SAVED AS BEST SO FAR + +FINAL NUMBER OF ROUTING TRACKS: 49 + +MAX OF CHANNEL: 1 is: 2 +MAX OF CHANNEL: 2 is: 5 +MAX OF CHANNEL: 3 is: 4 +MAX OF CHANNEL: 4 is: 9 +MAX OF CHANNEL: 5 is: 3 +MAX OF CHANNEL: 6 is: 8 +MAX OF CHANNEL: 7 is: 6 +MAX OF CHANNEL: 8 is: 6 +MAX OF CHANNEL: 9 is: 3 +MAX OF CHANNEL: 10 is: 3 +Confirming number of eliminated feeds:0 +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 257 + the number of switchable L segment = 155 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 256 + the number of switchable L segment = 196 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 577122 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-28 +reduction: -918 total_red:-918 +iterations : 4 +final total global wire : 576204 +final total time penalty: 0 + +Total global wire reduced by: 0.159% + +VERIFICATION +final total global wire : 576204 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 55 + + +no. of accepted flips: 403 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 49 + + +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +TimberWolfSC using absolute_minimum_feeds +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 223 + the number of switchable L segment = 129 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 226 + the number of switchable L segment = 164 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 706896 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-35 +reduction: -2260 total_red:-2260 +iterations : 4 +final total global wire : 704636 +final total time penalty: 0 + +Total global wire reduced by: 0.320% + +VERIFICATION +final total global wire : 704636 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 60 + + +no. of accepted flips: 3 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 60 + + +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 257 + the number of switchable L segment = 155 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 256 + the number of switchable L segment = 197 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 576960 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-28 +reduction: -1018 total_red:-1018 +iterations : 4 +final total global wire : 575942 +final total time penalty: 0 + +Total global wire reduced by: 0.176% + +VERIFICATION +final total global wire : 575942 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 57 + + +no. of accepted flips: 786 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 49 + + +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 257 + the number of switchable L segment = 155 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 256 + the number of switchable L segment = 196 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 582809 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-29 +reduction: -420 total_red:-420 +iterations : 4 +final total global wire : 582389 +final total time penalty: 0 + +Total global wire reduced by: 0.072% + +VERIFICATION +final total global wire : 582389 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 59 + + +no. of accepted flips: 424 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 50 + + +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 257 + the number of switchable L segment = 155 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 256 + the number of switchable L segment = 196 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 579480 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-28 +reduction: -378 total_red:-378 +iterations : 4 +final total global wire : 579102 +final total time penalty: 0 + +Total global wire reduced by: 0.065% + +VERIFICATION +final total global wire : 579102 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 55 + + +no. of accepted flips: 757 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 50 + + +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +TimberWolfSC using absolute_minimum_feeds +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 223 + the number of switchable L segment = 129 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 226 + the number of switchable L segment = 164 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 707155 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-35 +reduction: -2580 total_red:-2580 +iterations : 4 +final total global wire : 704575 +final total time penalty: 0 + +Total global wire reduced by: 0.365% + +VERIFICATION +final total global wire : 704575 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 61 + + +no. of accepted flips: 2 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 61 + + +Actual # of Feed Cells Added: 0 + + + + +*********************************************** +*ACTUAL* FINAL NUMBER OF ROUTING TRACKS: 49 +*********************************************** + +FINAL TOTAL INTERCONNECT LENGTH: 1054778 +FINAL OVERLAP PENALTY: 0 FINAL VALUE OF TOTAL COST IS: 1054778 +MAX NUMBER OF ATTEMPTED FLIPS PER T: 1075 + +Statistics: +Number of Cells: 329 +Number of Pads: 38 +Number of Nets: 228 +Number of Pins: 2085 +Number of PadGroups: 0 +Number of Implicit Feed Thrus: 1334 +Number of Feed Thrus Added: 0 +Feed Percentage: 0.00% +Average Row Separation: 0.54 + + +Runtime Statistics +------------------------- +Machine name: macbookair +Date : Sat Jul 21 10:52:11 2018 + +User time: 7.3 seconds +System time: 0.0 seconds +Elapsed time: 7.3 seconds + +Average resident text size = 0K +Average resident data+stack size = 0K +Maximum resident size = 2692K +Virtual memory size = -1985762868K +Virtual memory limit = 0K (0K) + +Major page faults = 0 +Minor page faults = 781 +Swaps = 0 + +Input blocks = 0 +Output blocks = 696 + +Context switch (voluntary) = 0 +Context switch (involuntary) = 568 + +TimberWolfSC terminated normally with no errors and 0 warning[s] + diff -Nru graywolf-0.1.5/tests/map9v3/expected/map9v3.pin graywolf-0.1.6/tests/map9v3/expected/map9v3.pin --- graywolf-0.1.5/tests/map9v3/expected/map9v3.pin 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3/expected/map9v3.pin 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,1523 @@ +$abc$733$n76 2 INVX8_1 twfeed2 12321 9800 6 -1 1 +$abc$733$n76 1 INVX8_1 twfeed2 12321 7800 5 1 1 +$abc$733$n76 1 INVX8_1 Y 12321 7800 5 1 1 +$abc$733$n76 2 BUFX2_1 A 13441 9800 6 1 1 +$abc$733$n76 2 BUFX4_3 A 8951 9800 6 -1 1 +$abc$733$n76 2 BUFX4_2 A 8311 9800 6 -1 1 +$abc$733$n76 2 BUFX4_1 A 11191 9800 6 -1 1 +$abc$733$n76_bF$buf3 5 NAND3X1_1 twfeed3 9281 5800 4 -1 1 +$abc$733$n76_bF$buf3 3 NAND3X1_1 twfeed3 9281 3800 3 1 1 +$abc$733$n76_bF$buf3 7 AOI21X1_7 twfeed4 10561 9800 6 -1 1 +$abc$733$n76_bF$buf3 4 AOI21X1_7 twfeed4 10561 7800 5 1 1 +$abc$733$n76_bF$buf3 4 NOR2X1_13 twfeed3 10401 7800 5 -1 1 +$abc$733$n76_bF$buf3 5 NOR2X1_13 twfeed3 10401 5800 4 1 1 +$abc$733$n76_bF$buf3 3 INVX1_1 twfeed2 9281 3800 3 -1 1 +$abc$733$n76_bF$buf3 6 INVX1_1 twfeed2 9281 1800 2 1 1 +$abc$733$n76_bF$buf3 7 AOI21X1_7 $abc$733$n76_bF$pin/A 10161 9800 6 -1 1 +$abc$733$n76_bF$buf3 5 AND2X2_1 $abc$733$n76_bF$pin/A 8961 5800 4 -1 1 +$abc$733$n76_bF$buf3 3 NAND3X1_1 $abc$733$n76_bF$pin/C 9281 3800 3 1 1 +$abc$733$n76_bF$buf3 6 NAND3X1_8 $abc$733$n76_bF$pin/B 9081 1800 2 -1 1 +$abc$733$n76_bF$buf3 5 NOR2X1_13 $abc$733$n76_bF$pin/B 10401 5800 4 1 1 +$abc$733$n76_bF$buf3 7 BUFX4_1 Y 10872 9800 6 -1 1 +$abc$733$n76_bF$buf2 10 OAI21X1_6 twfeed2 6081 9800 6 -1 1 +$abc$733$n76_bF$buf2 8 OAI21X1_6 twfeed2 6081 7800 5 1 1 +$abc$733$n76_bF$buf2 8 OAI21X1_10 twfeed2 6081 7800 5 -1 1 +$abc$733$n76_bF$buf2 9 OAI21X1_10 twfeed2 6081 5800 4 1 1 +$abc$733$n76_bF$buf2 10 OAI21X1_6 $abc$733$n76_bF$pin/B 6081 9800 6 -1 1 +$abc$733$n76_bF$buf2 9 OAI21X1_11 $abc$733$n76_bF$pin/B 5281 5800 4 1 1 +$abc$733$n76_bF$buf2 9 OAI21X1_10 $abc$733$n76_bF$pin/B 6081 5800 4 1 1 +$abc$733$n76_bF$buf2 9 AOI21X1_8 $abc$733$n76_bF$pin/A 3921 5800 4 1 1 +$abc$733$n76_bF$buf2 10 AOI21X1_13 $abc$733$n76_bF$pin/A 6641 9800 6 -1 1 +$abc$733$n76_bF$buf2 10 BUFX4_2 Y 7992 9800 6 -1 1 +$abc$733$n76_bF$buf1 15 OAI21X1_7 twfeed1 8641 13800 8 -1 1 +$abc$733$n76_bF$buf1 11 OAI21X1_7 twfeed1 8641 11800 7 1 1 +$abc$733$n76_bF$buf1 14 DFFSR_26 twfeed11 6721 13800 8 -1 1 +$abc$733$n76_bF$buf1 12 DFFSR_26 twfeed11 6721 11800 7 1 1 +$abc$733$n76_bF$buf1 11 DFFSR_24 twfeed15 8641 11800 7 -1 1 +$abc$733$n76_bF$buf1 13 DFFSR_24 twfeed15 8641 9800 6 1 1 +$abc$733$n76_bF$buf1 12 DFFSR_24 twfeed22 7521 11800 7 -1 1 +$abc$733$n76_bF$buf1 13 DFFSR_24 twfeed22 7521 9800 6 1 1 +$abc$733$n76_bF$buf1 15 OAI21X1_7 $abc$733$n76_bF$pin/B 8801 13800 8 -1 1 +$abc$733$n76_bF$buf1 14 AOI21X1_4 $abc$733$n76_bF$pin/A 6801 13800 8 1 1 +$abc$733$n76_bF$buf1 13 OAI21X1_30 $abc$733$n76_bF$pin/B 7521 9800 6 -1 1 +$abc$733$n76_bF$buf1 13 AOI21X1_9 $abc$733$n76_bF$pin/A 7281 9800 6 1 1 +$abc$733$n76_bF$buf1 15 AOI21X1_5 $abc$733$n76_bF$pin/A 9201 13800 8 1 1 +$abc$733$n76_bF$buf1 13 BUFX4_3 Y 8632 9800 6 -1 1 +$abc$733$n76_bF$buf0 18 OAI21X1_8 twfeed2 13921 13800 8 -1 1 +$abc$733$n76_bF$buf0 16 OAI21X1_8 twfeed2 13921 11800 7 1 1 +$abc$733$n76_bF$buf0 17 OAI21X1_1 $abc$733$n76_bF$pin/A 14961 9800 6 1 1 +$abc$733$n76_bF$buf0 18 AOI21X1_6 $abc$733$n76_bF$pin/A 14801 13800 8 -1 1 +$abc$733$n76_bF$buf0 17 OAI21X1_9 $abc$733$n76_bF$pin/B 14241 9800 6 1 1 +$abc$733$n76_bF$buf0 18 OAI21X1_8 $abc$733$n76_bF$pin/B 13921 13800 8 -1 1 +$abc$733$n76_bF$buf0 16 BUFX2_1 Y 13771 11800 7 -1 1 +$abc$733$n76_bF$buf0 17 BUFX2_1 Y 13771 9800 6 1 1 +$abc$733$n164 28 INVX8_2 twfeed2 4641 17800 10 -1 1 +$abc$733$n164 19 INVX8_2 twfeed2 4641 15800 9 1 1 +$abc$733$n164 19 DFFSR_14 twfeed21 4801 15800 9 -1 1 +$abc$733$n164 20 DFFSR_14 twfeed21 4801 13800 8 1 1 +$abc$733$n164 29 BUFX4_6 twfeed1 13121 13800 8 -1 1 +$abc$733$n164 21 BUFX4_6 twfeed1 13121 11800 7 1 1 +$abc$733$n164 20 MUX2X1_5 twfeed2 4801 13800 8 -1 1 +$abc$733$n164 22 MUX2X1_5 twfeed2 4801 11800 7 1 1 +$abc$733$n164 21 BUFX4_7 twfeed3 13121 11800 7 -1 1 +$abc$733$n164 23 BUFX4_7 twfeed3 13121 9800 6 1 1 +$abc$733$n164 22 DFFSR_31 twfeed10 4801 11800 7 -1 1 +$abc$733$n164 24 DFFSR_31 twfeed10 4801 9800 6 1 1 +$abc$733$n164 23 DFFSR_4 twfeed21 12801 9800 6 -1 1 +$abc$733$n164 25 DFFSR_4 twfeed21 12801 7800 5 1 1 +$abc$733$n164 24 DFFSR_25 twfeed7 4801 9800 6 -1 1 +$abc$733$n164 25 DFFSR_25 twfeed7 4801 7800 5 1 1 +$abc$733$n164 25 BUFX2_8 twfeed2 12801 7800 5 -1 1 +$abc$733$n164 26 BUFX2_8 twfeed2 12801 5800 4 1 1 +$abc$733$n164 25 BUFX4_4 twfeed2 4801 7800 5 -1 1 +$abc$733$n164 27 BUFX4_4 twfeed2 4801 5800 4 1 1 +$abc$733$n164 19 INVX8_2 Y 4641 15800 9 1 1 +$abc$733$n164 26 BUFX4_8 A 11831 5800 4 1 1 +$abc$733$n164 23 BUFX4_7 A 12811 9800 6 1 1 +$abc$733$n164 29 BUFX4_6 A 13131 13800 8 -1 1 +$abc$733$n164 28 BUFX4_5 A 3831 17800 10 -1 1 +$abc$733$n164 27 BUFX4_4 A 4951 5800 4 1 1 +$abc$733$n164_bF$buf4 33 OAI21X1_2 twfeed2 4641 3800 3 -1 1 +$abc$733$n164_bF$buf4 30 OAI21X1_2 twfeed2 4641 1800 2 1 1 +$abc$733$n164_bF$buf4 34 DFFSR_25 twfeed5 5121 9800 6 -1 1 +$abc$733$n164_bF$buf4 31 DFFSR_25 twfeed5 5121 7800 5 1 1 +$abc$733$n164_bF$buf4 31 OAI21X1_11 twfeed1 5121 7800 5 -1 1 +$abc$733$n164_bF$buf4 32 OAI21X1_11 twfeed1 5121 5800 4 1 1 +$abc$733$n164_bF$buf4 32 DFFSR_30 twfeed2 4641 5800 4 -1 1 +$abc$733$n164_bF$buf4 33 DFFSR_30 twfeed2 4641 3800 3 1 1 +$abc$733$n164_bF$buf4 34 DFFSR_25 $abc$733$n164_bF$pin/R 5121 9800 6 -1 1 +$abc$733$n164_bF$buf4 30 DFFSR_32 $abc$733$n164_bF$pin/R 2561 1800 2 -1 1 +$abc$733$n164_bF$buf4 32 DFFSR_30 $abc$733$n164_bF$pin/R 4161 5800 4 -1 1 +$abc$733$n164_bF$buf4 32 DFFSR_13 $abc$733$n164_bF$pin/R 3041 5800 4 1 1 +$abc$733$n164_bF$buf4 33 DFFSR_1 $abc$733$n164_bF$pin/S 6421 3800 3 -1 1 +$abc$733$n164_bF$buf4 30 DFFSR_2 $abc$733$n164_bF$pin/R 3361 1800 2 1 1 +$abc$733$n164_bF$buf4 30 DFFSR_15 $abc$733$n164_bF$pin/R 4481 1800 2 -1 1 +$abc$733$n164_bF$buf4 32 BUFX4_4 Y 4632 5800 4 1 1 +$abc$733$n164_bF$buf3 38 DFFSR_14 twfeed7 2561 15800 9 -1 1 +$abc$733$n164_bF$buf3 35 DFFSR_14 twfeed7 2561 13800 8 1 1 +$abc$733$n164_bF$buf3 35 DFFSR_12 twfeed7 2721 13800 8 -1 1 +$abc$733$n164_bF$buf3 36 DFFSR_12 twfeed7 2721 11800 7 1 1 +$abc$733$n164_bF$buf3 40 DFFSR_27 twfeed4 5761 17800 10 -1 1 +$abc$733$n164_bF$buf3 37 DFFSR_27 twfeed4 5761 15800 9 1 1 +$abc$733$n164_bF$buf3 41 DFFSR_9 twfeed5 2561 17800 10 -1 1 +$abc$733$n164_bF$buf3 38 DFFSR_9 twfeed5 2561 15800 9 1 1 +$abc$733$n164_bF$buf3 37 MUX2X1_7 twfeed4 5761 15800 9 -1 1 +$abc$733$n164_bF$buf3 35 MUX2X1_7 twfeed4 5761 13800 8 1 1 +$abc$733$n164_bF$buf3 36 DFFSR_8 twfeed5 2561 11800 7 -1 1 +$abc$733$n164_bF$buf3 39 DFFSR_8 twfeed5 2561 9800 6 1 1 +$abc$733$n164_bF$buf3 35 DFFSR_26 $abc$733$n164_bF$pin/R 5761 13800 8 -1 1 +$abc$733$n164_bF$buf3 41 DFFSR_9 $abc$733$n164_bF$pin/R 2561 17800 10 -1 1 +$abc$733$n164_bF$buf3 35 DFFSR_14 $abc$733$n164_bF$pin/R 2241 13800 8 1 1 +$abc$733$n164_bF$buf3 39 DFFSR_31 $abc$733$n164_bF$pin/R 4001 9800 6 1 1 +$abc$733$n164_bF$buf3 40 DFFSR_27 $abc$733$n164_bF$pin/R 5921 17800 10 -1 1 +$abc$733$n164_bF$buf3 35 DFFSR_12 $abc$733$n164_bF$pin/R 3041 13800 8 -1 1 +$abc$733$n164_bF$buf3 39 DFFSR_8 $abc$733$n164_bF$pin/R 2561 9800 6 1 1 +$abc$733$n164_bF$buf3 41 BUFX4_5 Y 3512 17800 10 -1 1 +$abc$733$n164_bF$buf2 47 DFFSR_6 twfeed5 19521 17800 10 -1 1 +$abc$733$n164_bF$buf2 42 DFFSR_6 twfeed5 19521 15800 9 1 1 +$abc$733$n164_bF$buf2 48 DFFSR_11 twfeed7 17761 17800 10 -1 1 +$abc$733$n164_bF$buf2 42 DFFSR_11 twfeed7 17761 15800 9 1 1 +$abc$733$n164_bF$buf2 49 DFFSR_10 twfeed4 13441 17800 10 -1 1 +$abc$733$n164_bF$buf2 43 DFFSR_10 twfeed4 13441 15800 9 1 1 +$abc$733$n164_bF$buf2 42 AOI21X1_2 twfeed3 20321 15800 9 -1 1 +$abc$733$n164_bF$buf2 44 AOI21X1_2 twfeed3 20321 13800 8 1 1 +$abc$733$n164_bF$buf2 42 DFFSR_23 twfeed3 19681 15800 9 -1 1 +$abc$733$n164_bF$buf2 45 DFFSR_23 twfeed3 19681 13800 8 1 1 +$abc$733$n164_bF$buf2 42 DFFSR_23 twfeed15 17761 15800 9 -1 1 +$abc$733$n164_bF$buf2 46 DFFSR_23 twfeed15 17761 13800 8 1 1 +$abc$733$n164_bF$buf2 43 BUFX2_33 twfeed3 13441 15800 9 -1 1 +$abc$733$n164_bF$buf2 46 BUFX2_33 twfeed3 13441 13800 8 1 1 +$abc$733$n164_bF$buf2 45 DFFSR_23 $abc$733$n164_bF$pin/R 19361 13800 8 1 1 +$abc$733$n164_bF$buf2 48 DFFSR_11 $abc$733$n164_bF$pin/R 18081 17800 10 -1 1 +$abc$733$n164_bF$buf2 46 DFFSR_28 $abc$733$n164_bF$pin/R 17761 13800 8 -1 1 +$abc$733$n164_bF$buf2 49 DFFSR_10 $abc$733$n164_bF$pin/R 13281 17800 10 -1 1 +$abc$733$n164_bF$buf2 47 DFFSR_6 $abc$733$n164_bF$pin/R 19521 17800 10 -1 1 +$abc$733$n164_bF$buf2 44 DFFSR_7 $abc$733$n164_bF$pin/R 20321 13800 8 -1 1 +$abc$733$n164_bF$buf2 46 BUFX4_6 Y 13450 13800 8 -1 1 +$abc$733$n164_bF$buf1 54 OAI22X1_2 twfeed1 20161 9800 6 -1 1 +$abc$733$n164_bF$buf1 50 OAI22X1_2 twfeed1 20161 7800 5 1 1 +$abc$733$n164_bF$buf1 53 AOI21X1_7 twfeed2 10241 9800 6 -1 1 +$abc$733$n164_bF$buf1 50 AOI21X1_7 twfeed2 10241 7800 5 1 1 +$abc$733$n164_bF$buf1 50 OAI21X1_24 twfeed2 20161 7800 5 -1 1 +$abc$733$n164_bF$buf1 51 OAI21X1_24 twfeed2 20161 5800 4 1 1 +$abc$733$n164_bF$buf1 50 INVX4_1 twfeed1 10241 7800 5 -1 1 +$abc$733$n164_bF$buf1 52 INVX4_1 twfeed1 10241 5800 4 1 1 +$abc$733$n164_bF$buf1 53 DFFSR_24 $abc$733$n164_bF$pin/R 10241 9800 6 1 1 +$abc$733$n164_bF$buf1 54 DFFSR_20 $abc$733$n164_bF$pin/R 20641 9800 6 1 1 +$abc$733$n164_bF$buf1 52 DFFSR_16 $abc$733$n164_bF$pin/R 5601 5800 4 -1 1 +$abc$733$n164_bF$buf1 51 DFFSR_21 $abc$733$n164_bF$pin/R 20001 5800 4 -1 1 +$abc$733$n164_bF$buf1 52 DFFSR_29 $abc$733$n164_bF$pin/R 9121 5800 4 1 1 +$abc$733$n164_bF$buf1 54 DFFSR_22 $abc$733$n164_bF$pin/R 19201 9800 6 1 1 +$abc$733$n164_bF$buf1 53 BUFX4_7 Y 13130 9800 6 1 1 +$abc$733$n164_bF$buf0 58 INVX1_22 twfeed1 12321 5800 4 -1 1 +$abc$733$n164_bF$buf0 55 INVX1_22 twfeed1 12321 3800 3 1 1 +$abc$733$n164_bF$buf0 59 DFFSR_17 twfeed8 15361 3800 3 -1 1 +$abc$733$n164_bF$buf0 56 DFFSR_17 twfeed8 15361 1800 2 1 1 +$abc$733$n164_bF$buf0 61 DFFSR_4 twfeed5 15361 9800 6 -1 1 +$abc$733$n164_bF$buf0 57 DFFSR_4 twfeed5 15361 7800 5 1 1 +$abc$733$n164_bF$buf0 57 NOR2X1_18 twfeed2 15361 7800 5 -1 1 +$abc$733$n164_bF$buf0 58 NOR2X1_18 twfeed2 15361 5800 4 1 1 +$abc$733$n164_bF$buf0 58 DFFSR_19 twfeed16 15361 5800 4 -1 1 +$abc$733$n164_bF$buf0 59 DFFSR_19 twfeed16 15361 3800 3 1 1 +$abc$733$n164_bF$buf0 55 DFFSR_3 twfeed5 12321 3800 3 -1 1 +$abc$733$n164_bF$buf0 60 DFFSR_3 twfeed5 12321 1800 2 1 1 +$abc$733$n164_bF$buf0 56 DFFSR_17 $abc$733$n164_bF$pin/R 15841 1800 2 1 1 +$abc$733$n164_bF$buf0 58 DFFSR_19 $abc$733$n164_bF$pin/R 13601 5800 4 -1 1 +$abc$733$n164_bF$buf0 61 DFFSR_4 $abc$733$n164_bF$pin/R 15361 9800 6 -1 1 +$abc$733$n164_bF$buf0 56 DFFSR_18 $abc$733$n164_bF$pin/R 15361 1800 2 -1 1 +$abc$733$n164_bF$buf0 60 DFFSR_3 $abc$733$n164_bF$pin/R 12321 1800 2 1 1 +$abc$733$n164_bF$buf0 60 DFFSR_5 $abc$733$n164_bF$pin/R 12481 1800 2 -1 1 +$abc$733$n164_bF$buf0 58 BUFX4_8 Y 11512 5800 4 1 1 +clock 67 BUFX2_4 twfeed1 9121 17800 10 -1 1 +clock 62 BUFX2_4 twfeed1 9121 15800 9 1 1 +clock 62 AOI21X1_5 twfeed2 9121 15800 9 -1 1 +clock 63 AOI21X1_5 twfeed2 9121 13800 8 1 1 +clock 68 DFFSR_28 twfeed21 15201 13800 8 -1 1 +clock 64 DFFSR_28 twfeed21 15201 11800 7 1 1 +clock 63 OAI21X1_7 twfeed4 9121 13800 8 -1 1 +clock 65 OAI21X1_7 twfeed4 9121 11800 7 1 1 +clock 64 BUFX2_3 twfeed1 15201 11800 7 -1 1 +clock 66 BUFX2_3 twfeed1 15201 9800 6 1 1 +clock 65 DFFSR_24 twfeed12 9121 11800 7 -1 1 +clock 66 DFFSR_24 twfeed12 9121 9800 6 1 1 +clock 67 twpin_clock clock 9121 18100 -4 1 1 +clock 67 PSEUDO_CELL PSEUDO_PIN 9121 17801 10 1 0 +clock 67 PSEUDO_CELL PSEUDO_PIN 9121 17801 -4 -1 0 +clock 68 BUFX2_6 A 15201 13800 8 1 1 +clock 66 BUFX2_5 A 9441 9800 6 -1 1 +clock 67 BUFX2_4 A 9121 17800 10 -1 1 +clock 66 BUFX2_3 A 15201 9800 6 1 1 +clock 66 BUFX2_2 A 11361 9800 6 -1 1 +clock_bF$buf4 73 DFFSR_2 twfeed11 2401 3800 3 -1 1 +clock_bF$buf4 69 DFFSR_2 twfeed11 2401 1800 2 1 1 +clock_bF$buf4 73 AND2X2_5 twfeed3 5441 3800 3 -1 1 +clock_bF$buf4 70 AND2X2_5 twfeed3 5441 1800 2 1 1 +clock_bF$buf4 76 BUFX4_8 twfeed1 11841 7800 5 -1 1 +clock_bF$buf4 71 BUFX4_8 twfeed1 11841 5800 4 1 1 +clock_bF$buf4 71 NOR2X1_15 twfeed1 11361 5800 4 -1 1 +clock_bF$buf4 72 NOR2X1_15 twfeed1 11361 3800 3 1 1 +clock_bF$buf4 75 DFFSR_30 twfeed18 2081 5800 4 -1 1 +clock_bF$buf4 73 DFFSR_30 twfeed18 2081 3800 3 1 1 +clock_bF$buf4 72 DFFSR_3 twfeed11 11361 3800 3 -1 1 +clock_bF$buf4 70 DFFSR_3 twfeed11 11361 1800 2 1 1 +clock_bF$buf4 73 DFFSR_2 twfeed16 1601 3800 3 -1 1 +clock_bF$buf4 74 DFFSR_2 twfeed16 1601 1800 2 1 1 +clock_bF$buf4 70 DFFSR_15 clock_bF$pin/CLK 5480 1800 2 -1 1 +clock_bF$buf4 70 DFFSR_3 clock_bF$pin/CLK 11322 1800 2 1 1 +clock_bF$buf4 70 DFFSR_1 clock_bF$pin/CLK 7400 1800 2 1 1 +clock_bF$buf4 75 DFFSR_13 clock_bF$pin/CLK 2042 5800 4 1 1 +clock_bF$buf4 69 DFFSR_2 clock_bF$pin/CLK 2362 1800 2 1 1 +clock_bF$buf4 74 DFFSR_32 clock_bF$pin/CLK 1562 1800 2 -1 1 +clock_bF$buf4 70 DFFSR_5 clock_bF$pin/CLK 11482 1800 2 -1 1 +clock_bF$buf4 76 BUFX2_2 Y 11691 7800 5 1 1 +clock_bF$buf3 84 DFFSR_4 twfeed10 14561 9800 6 -1 1 +clock_bF$buf3 77 DFFSR_4 twfeed10 14561 7800 5 1 1 +clock_bF$buf3 85 DFFSR_20 twfeed7 20961 11800 7 -1 1 +clock_bF$buf3 78 DFFSR_20 twfeed7 20961 9800 6 1 1 +clock_bF$buf3 78 NOR2X1_20 twfeed1 20961 9800 6 -1 1 +clock_bF$buf3 79 NOR2X1_20 twfeed1 20961 7800 5 1 1 +clock_bF$buf3 79 OAI21X1_25 twfeed2 20961 7800 5 -1 1 +clock_bF$buf3 80 OAI21X1_25 twfeed2 20961 5800 4 1 1 +clock_bF$buf3 77 NAND2X1_2 twfeed1 14561 7800 5 -1 1 +clock_bF$buf3 81 NAND2X1_2 twfeed1 14561 5800 4 1 1 +clock_bF$buf3 81 DFFSR_19 twfeed13 14881 5800 4 -1 1 +clock_bF$buf3 82 DFFSR_19 twfeed13 14881 3800 3 1 1 +clock_bF$buf3 82 DFFSR_17 twfeed11 14881 3800 3 -1 1 +clock_bF$buf3 83 DFFSR_17 twfeed11 14881 1800 2 1 1 +clock_bF$buf3 80 DFFSR_21 clock_bF$pin/CLK 21000 5800 4 -1 1 +clock_bF$buf3 84 DFFSR_22 clock_bF$pin/CLK 18202 9800 6 1 1 +clock_bF$buf3 83 DFFSR_17 clock_bF$pin/CLK 14842 1800 2 1 1 +clock_bF$buf3 78 DFFSR_20 clock_bF$pin/CLK 21640 9800 6 1 1 +clock_bF$buf3 84 DFFSR_4 clock_bF$pin/CLK 14362 9800 6 -1 1 +clock_bF$buf3 83 DFFSR_18 clock_bF$pin/CLK 16360 1800 2 -1 1 +clock_bF$buf3 81 DFFSR_19 clock_bF$pin/CLK 14600 5800 4 -1 1 +clock_bF$buf3 85 BUFX2_3 Y 15531 11800 7 -1 1 +clock_bF$buf3 84 BUFX2_3 Y 15531 9800 6 1 1 +clock_bF$buf2 89 DFFSR_12 twfeed14 1601 13800 8 -1 1 +clock_bF$buf2 86 DFFSR_12 twfeed14 1601 11800 7 1 1 +clock_bF$buf2 92 DFFSR_27 twfeed11 6881 17800 10 -1 1 +clock_bF$buf2 87 DFFSR_27 twfeed11 6881 15800 9 1 1 +clock_bF$buf2 91 DFFSR_12 twfeed4 3201 13800 8 -1 1 +clock_bF$buf2 86 DFFSR_12 twfeed4 3201 11800 7 1 1 +clock_bF$buf2 93 DFFSR_9 twfeed11 1601 17800 10 -1 1 +clock_bF$buf2 87 DFFSR_9 twfeed11 1601 15800 9 1 1 +clock_bF$buf2 87 AOI21X1_4 twfeed1 6881 15800 9 -1 1 +clock_bF$buf2 88 AOI21X1_4 twfeed1 6881 13800 8 1 1 +clock_bF$buf2 87 DFFSR_14 twfeed1 1601 15800 9 -1 1 +clock_bF$buf2 89 DFFSR_14 twfeed1 1601 13800 8 1 1 +clock_bF$buf2 86 DFFSR_8 twfeed11 1601 11800 7 -1 1 +clock_bF$buf2 90 DFFSR_8 twfeed11 1601 9800 6 1 1 +clock_bF$buf2 93 DFFSR_9 clock_bF$pin/CLK 1562 17800 10 -1 1 +clock_bF$buf2 89 DFFSR_12 clock_bF$pin/CLK 2042 13800 8 -1 1 +clock_bF$buf2 91 DFFSR_14 clock_bF$pin/CLK 3240 13800 8 1 1 +clock_bF$buf2 88 DFFSR_26 clock_bF$pin/CLK 6760 13800 8 -1 1 +clock_bF$buf2 92 DFFSR_27 clock_bF$pin/CLK 6920 17800 10 -1 1 +clock_bF$buf2 90 DFFSR_8 clock_bF$pin/CLK 1562 9800 6 1 1 +clock_bF$buf2 92 BUFX2_4 Y 8791 17800 10 -1 1 +clock_bF$buf1 100 DFFSR_25 twfeed11 4161 9800 6 -1 1 +clock_bF$buf1 94 DFFSR_25 twfeed11 4161 7800 5 1 1 +clock_bF$buf1 97 DFFSR_25 twfeed6 4961 9800 6 -1 1 +clock_bF$buf1 94 DFFSR_25 twfeed6 4961 7800 5 1 1 +clock_bF$buf1 99 DFFSR_29 twfeed5 9121 7800 5 -1 1 +clock_bF$buf1 95 DFFSR_29 twfeed5 9121 5800 4 1 1 +clock_bF$buf1 94 BUFX4_4 twfeed1 4961 7800 5 -1 1 +clock_bF$buf1 95 BUFX4_4 twfeed1 4961 5800 4 1 1 +clock_bF$buf1 94 AOI21X1_8 twfeed2 4001 7800 5 -1 1 +clock_bF$buf1 96 AOI21X1_8 twfeed2 4001 5800 4 1 1 +clock_bF$buf1 95 DFFSR_29 clock_bF$pin/CLK 8122 5800 4 1 1 +clock_bF$buf1 97 DFFSR_31 clock_bF$pin/CLK 5000 9800 6 1 1 +clock_bF$buf1 95 DFFSR_16 clock_bF$pin/CLK 6600 5800 4 -1 1 +clock_bF$buf1 100 DFFSR_25 clock_bF$pin/CLK 4122 9800 6 -1 1 +clock_bF$buf1 96 DFFSR_30 clock_bF$pin/CLK 3162 5800 4 -1 1 +clock_bF$buf1 98 DFFSR_24 clock_bF$pin/CLK 9242 9800 6 1 1 +clock_bF$buf1 98 BUFX2_5 Y 9111 9800 6 -1 1 +clock_bF$buf1 99 BUFX2_5 Y 9111 7800 5 1 1 +clock_bF$buf0 102 AOI21X1_2 twfeed2 20481 15800 9 -1 1 +clock_bF$buf0 101 AOI21X1_2 twfeed2 20481 13800 8 1 1 +clock_bF$buf0 106 DFFSR_6 twfeed11 20481 17800 10 -1 1 +clock_bF$buf0 102 DFFSR_6 twfeed11 20481 15800 9 1 1 +clock_bF$buf0 106 DFFSR_11 twfeed11 17121 17800 10 -1 1 +clock_bF$buf0 103 DFFSR_11 twfeed11 17121 15800 9 1 1 +clock_bF$buf0 107 DFFSR_10 twfeed11 12321 17800 10 -1 1 +clock_bF$buf0 104 DFFSR_10 twfeed11 12321 15800 9 1 1 +clock_bF$buf0 103 DFFSR_23 twfeed19 17121 15800 9 -1 1 +clock_bF$buf0 105 DFFSR_23 twfeed19 17121 13800 8 1 1 +clock_bF$buf0 106 DFFSR_6 clock_bF$pin/CLK 20520 17800 10 -1 1 +clock_bF$buf0 106 DFFSR_11 clock_bF$pin/CLK 17082 17800 10 -1 1 +clock_bF$buf0 105 DFFSR_23 clock_bF$pin/CLK 18362 13800 8 1 1 +clock_bF$buf0 101 DFFSR_7 clock_bF$pin/CLK 21320 13800 8 -1 1 +clock_bF$buf0 107 DFFSR_10 clock_bF$pin/CLK 12282 17800 10 -1 1 +clock_bF$buf0 105 DFFSR_28 clock_bF$pin/CLK 16762 13800 8 -1 1 +clock_bF$buf0 104 BUFX2_6 Y 15531 15800 9 -1 1 +clock_bF$buf0 105 BUFX2_6 Y 15531 13800 8 1 1 +$abc$733$n75_1 111 DFFSR_4 twfeed22 12641 9800 6 -1 1 +$abc$733$n75_1 108 DFFSR_4 twfeed22 12641 7800 5 1 1 +$abc$733$n75_1 112 BUFX2_10 twfeed1 9921 9800 6 -1 1 +$abc$733$n75_1 109 BUFX2_10 twfeed1 9921 7800 5 1 1 +$abc$733$n75_1 108 BUFX2_8 twfeed1 12641 7800 5 -1 1 +$abc$733$n75_1 110 BUFX2_8 twfeed1 12641 5800 4 1 1 +$abc$733$n75_1 109 INVX4_1 Y 10081 7800 5 -1 1 +$abc$733$n75_1 110 INVX4_1 Y 10081 5800 4 1 1 +$abc$733$n75_1 112 BUFX2_10 A 9921 9800 6 -1 1 +$abc$733$n75_1 110 BUFX2_9 A 11201 5800 4 1 1 +$abc$733$n75_1 110 BUFX2_8 A 12641 5800 4 1 1 +$abc$733$n75_1 111 BUFX2_7 A 12641 9800 6 1 1 +$abc$733$n75_1_bF$buf3 113 OAI21X1_8 $abc$733$n75_1_bF$pin/C 14161 11800 7 1 1 +$abc$733$n75_1_bF$buf3 113 OAI21X1_9 $abc$733$n75_1_bF$pin/C 14001 11800 7 -1 1 +$abc$733$n75_1_bF$buf3 113 OAI21X1_1 $abc$733$n75_1_bF$pin/C 14641 11800 7 -1 1 +$abc$733$n75_1_bF$buf3 113 OAI21X1_7 $abc$733$n75_1_bF$pin/C 9041 11800 7 1 1 +$abc$733$n75_1_bF$buf3 113 OAI21X1_5 $abc$733$n75_1_bF$pin/C 11761 11800 7 -1 1 +$abc$733$n75_1_bF$buf3 113 BUFX2_7 Y 12311 11800 7 -1 1 +$abc$733$n75_1_bF$buf2 115 OAI21X1_24 twfeed4 20481 7800 5 -1 1 +$abc$733$n75_1_bF$buf2 114 OAI21X1_24 twfeed4 20481 5800 4 1 1 +$abc$733$n75_1_bF$buf2 114 OAI21X1_25 $abc$733$n75_1_bF$pin/A 21041 5800 4 1 1 +$abc$733$n75_1_bF$buf2 114 OAI21X1_20 $abc$733$n75_1_bF$pin/A 19121 5800 4 -1 1 +$abc$733$n75_1_bF$buf2 114 NAND2X1_10 $abc$733$n75_1_bF$pin/A 18561 5800 4 -1 1 +$abc$733$n75_1_bF$buf2 115 OAI21X1_24 $abc$733$n75_1_bF$pin/C 20401 7800 5 -1 1 +$abc$733$n75_1_bF$buf2 115 BUFX2_8 Y 12971 7800 5 -1 1 +$abc$733$n75_1_bF$buf1 118 OAI21X1_12 twfeed4 9761 5800 4 -1 1 +$abc$733$n75_1_bF$buf1 116 OAI21X1_12 twfeed4 9761 3800 3 1 1 +$abc$733$n75_1_bF$buf1 118 OAI21X1_13 twfeed1 10881 5800 4 -1 1 +$abc$733$n75_1_bF$buf1 117 OAI21X1_13 twfeed1 10881 3800 3 1 1 +$abc$733$n75_1_bF$buf1 116 OAI21X1_12 $abc$733$n75_1_bF$pin/C 9841 3800 3 1 1 +$abc$733$n75_1_bF$buf1 118 OAI21X1_13 $abc$733$n75_1_bF$pin/A 10801 5800 4 -1 1 +$abc$733$n75_1_bF$buf1 117 OAI21X1_15 $abc$733$n75_1_bF$pin/C 11601 3800 3 1 1 +$abc$733$n75_1_bF$buf1 118 NAND3X1_1 $abc$733$n75_1_bF$pin/B 9401 5800 4 -1 1 +$abc$733$n75_1_bF$buf1 118 BUFX2_9 Y 10871 5800 4 1 1 +$abc$733$n75_1_bF$buf0 119 OAI21X1_6 $abc$733$n75_1_bF$pin/C 6321 7800 5 1 1 +$abc$733$n75_1_bF$buf0 119 OAI21X1_11 $abc$733$n75_1_bF$pin/C 5521 7800 5 -1 1 +$abc$733$n75_1_bF$buf0 119 OAI21X1_10 $abc$733$n75_1_bF$pin/C 5841 7800 5 -1 1 +$abc$733$n75_1_bF$buf0 119 OAI21X1_30 $abc$733$n75_1_bF$pin/C 7281 7800 5 1 1 +$abc$733$n75_1_bF$buf0 119 BUFX2_10 Y 9591 7800 5 1 1 +state<0> 124 DFFSR_3 twfeed18 10241 3800 3 -1 1 +state<0> 120 DFFSR_3 twfeed18 10241 1800 2 1 1 +state<0> 128 OAI21X1_16 twfeed4 19201 3800 3 -1 1 +state<0> 120 OAI21X1_16 twfeed4 19201 1800 2 1 1 +state<0> 122 OAI21X1_24 twfeed3 20321 7800 5 -1 1 +state<0> 121 OAI21X1_24 twfeed3 20321 5800 4 1 1 +state<0> 129 OAI22X1_2 twfeed5 19521 9800 6 -1 1 +state<0> 122 OAI22X1_2 twfeed5 19521 7800 5 1 1 +state<0> 126 OAI21X1_21 twfeed2 22401 7800 5 -1 1 +state<0> 121 OAI21X1_21 twfeed2 22401 5800 4 1 1 +state<0> 121 DFFSR_21 twfeed7 20321 5800 4 -1 1 +state<0> 123 DFFSR_21 twfeed7 20321 3800 3 1 1 +state<0> 127 OAI21X1_12 twfeed1 10241 5800 4 -1 1 +state<0> 124 OAI21X1_12 twfeed1 10241 3800 3 1 1 +state<0> 123 NAND2X1_7 twfeed1 20321 3800 3 -1 1 +state<0> 120 NAND2X1_7 twfeed1 20321 1800 2 1 1 +state<0> 130 DFFSR_1 twfeed19 8641 3800 3 -1 1 +state<0> 120 DFFSR_1 twfeed19 8641 1800 2 1 1 +state<0> 120 OAI21X1_14 twfeed4 19201 1800 2 -1 1 +state<0> 125 OAI21X1_14 twfeed4 19201 -200 1 1 1 +state<0> 130 DFFSR_1 Q 8961 3800 3 -1 1 +state<0> 120 AOI21X1_12 C 8641 1800 2 -1 1 +state<0> 129 OAI21X1_29 A 18961 9800 6 -1 1 +state<0> 122 NAND3X1_7 A 20321 7800 5 1 1 +state<0> 129 OAI22X1_2 C 19521 9800 6 -1 1 +state<0> 126 OAI21X1_26 C 22481 7800 5 1 1 +state<0> 121 OAI22X1_1 C 21281 5800 4 1 1 +state<0> 126 OAI21X1_21 C 22161 7800 5 -1 1 +state<0> 120 OAI21X1_16 A 18801 1800 2 1 1 +state<0> 128 NAND3X1_2 A 19361 3800 3 -1 1 +state<0> 125 OAI21X1_14 C 19281 -200 1 1 1 +state<0> 127 INVX4_1 A 10241 5800 4 1 1 +state<3> 135 INVX8_1 twfeed1 12481 9800 6 -1 1 +state<3> 131 INVX8_1 twfeed1 12481 7800 5 1 1 +state<3> 134 DFFSR_4 twfeed15 13761 9800 6 -1 1 +state<3> 131 DFFSR_4 twfeed15 13761 7800 5 1 1 +state<3> 131 NAND2X1_6 twfeed1 13761 7800 5 -1 1 +state<3> 132 NAND2X1_6 twfeed1 13761 5800 4 1 1 +state<3> 131 AND2X2_2 twfeed1 12481 7800 5 -1 1 +state<3> 133 AND2X2_2 twfeed1 12481 5800 4 1 1 +state<3> 131 DFFSR_4 Q 12801 7800 5 1 1 +state<3> 134 AOI22X1_2 A 15761 9800 6 1 1 +state<3> 132 NAND2X1_6 A 13761 5800 4 1 1 +state<3> 133 AND2X2_2 B 12321 5800 4 1 1 +state<3> 135 AOI21X1_3 B 11201 9800 6 1 1 +state<3> 135 OAI21X1_5 A 12081 9800 6 1 1 +state<3> 135 INVX8_1 A 12481 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 139 NOR2X1_1 twfeed1 16481 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 136 NOR2X1_1 twfeed1 16481 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<3> 139 OR2X2_1 twfeed3 17281 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 137 OR2X2_1 twfeed3 17281 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<3> 137 OAI21X1_18 twfeed3 17281 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 138 OAI21X1_18 twfeed3 17281 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<3> 136 DFFSR_19 Q 16161 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<3> 138 BUFX2_14 A 18721 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 137 OAI21X1_18 C 17361 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 139 OR2X2_1 A 16961 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 139 NOR2X1_1 A 16481 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 143 DFFSR_18 twfeed21 17921 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 140 DFFSR_18 twfeed21 17921 -200 1 1 1 +$auto$iopadmap.cc:313:execute$873<2> 145 OR2X2_1 twfeed2 17121 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 141 OR2X2_1 twfeed2 17121 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<2> 141 XOR2X1_1 twfeed5 18241 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 142 XOR2X1_1 twfeed5 18241 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<2> 141 XOR2X1_1 twfeed3 17921 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 143 XOR2X1_1 twfeed3 17921 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<2> 141 OAI21X1_18 twfeed2 17121 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 144 OAI21X1_18 twfeed2 17121 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<2> 140 DFFSR_18 Q 17921 -200 1 1 1 +$auto$iopadmap.cc:313:execute$873<2> 142 BUFX2_13 A 18241 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 144 OAI21X1_18 A 17041 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<2> 145 OR2X2_1 B 17161 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 142 XOR2X1_1 B 18520 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<2> 145 NOR2X1_1 B 16801 5800 4 -1 1 +$abc$733$n77 146 AND2X2_3 A 16161 5800 4 1 1 +$abc$733$n77 146 NAND2X1_11 A 16801 5800 4 1 1 +$abc$733$n77 146 NAND2X1_1 A 16001 5800 4 1 1 +$abc$733$n77 146 NOR2X1_1 Y 16641 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<5> 150 OAI21X1_22 twfeed3 23201 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<5> 147 OAI21X1_22 twfeed3 23201 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<5> 147 NAND3X1_4 twfeed4 23201 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<5> 148 NAND3X1_4 twfeed4 23201 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<5> 148 BUFX2_16 twfeed1 23201 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<5> 149 BUFX2_16 twfeed1 23201 -200 1 1 1 +$auto$iopadmap.cc:313:execute$873<5> 147 DFFSR_21 Q 22561 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<5> 149 BUFX2_16 A 23201 -200 1 1 1 +$auto$iopadmap.cc:313:execute$873<5> 150 INVX1_26 A 19361 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<5> 150 NOR2X1_2 A 19841 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<4> 152 DFFSR_20 twfeed14 22081 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$873<4> 151 DFFSR_20 twfeed14 22081 9800 6 1 1 +$auto$iopadmap.cc:313:execute$873<4> 155 DFFSR_7 twfeed16 22081 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$873<4> 152 DFFSR_7 twfeed16 22081 11800 7 1 1 +$auto$iopadmap.cc:313:execute$873<4> 151 INVX1_27 twfeed2 22081 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<4> 153 INVX1_27 twfeed2 22081 7800 5 1 1 +$auto$iopadmap.cc:313:execute$873<4> 153 OAI21X1_21 twfeed4 22081 7800 5 -1 1 +$auto$iopadmap.cc:313:execute$873<4> 154 OAI21X1_21 twfeed4 22081 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<4> 152 DFFSR_20 Q 23201 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$873<4> 155 BUFX2_15 A 22081 13800 8 1 1 +$auto$iopadmap.cc:313:execute$873<4> 154 AOI22X1_1 C 17281 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<4> 154 NOR2X1_17 A 18401 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<4> 154 NOR2X1_2 B 19521 5800 4 1 1 +$abc$733$n78 157 NAND2X1_1 twfeed3 15681 7800 5 -1 1 +$abc$733$n78 156 NAND2X1_1 twfeed3 15681 5800 4 1 1 +$abc$733$n78 156 AND2X2_3 B 16321 5800 4 1 1 +$abc$733$n78 157 NAND2X1_1 B 15681 7800 5 -1 1 +$abc$733$n78 156 NOR2X1_2 Y 19681 5800 4 1 1 +$abc$733$n79 160 DFFSR_4 twfeed2 15841 9800 6 -1 1 +$abc$733$n79 158 DFFSR_4 twfeed2 15841 7800 5 1 1 +$abc$733$n79 158 NAND2X1_1 twfeed2 15841 7800 5 -1 1 +$abc$733$n79 159 NAND2X1_1 twfeed2 15841 5800 4 1 1 +$abc$733$n79 160 OAI21X1_27 B 17761 9800 6 -1 1 +$abc$733$n79 159 NOR2X1_18 B 15521 5800 4 1 1 +$abc$733$n79 159 NOR2X1_5 B 15041 5800 4 1 1 +$abc$733$n79 159 NAND2X1_1 Y 15741 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<7> 165 BUFX2_17 twfeed2 16321 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 161 BUFX2_17 twfeed2 16321 13800 8 1 1 +$auto$iopadmap.cc:313:execute$873<7> 166 BUFX2_18 twfeed1 14881 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 162 BUFX2_18 twfeed1 14881 15800 9 1 1 +$auto$iopadmap.cc:313:execute$873<7> 162 MUX2X1_4 twfeed5 14881 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 161 MUX2X1_4 twfeed5 14881 13800 8 1 1 +$auto$iopadmap.cc:313:execute$873<7> 161 DFFSR_28 twfeed14 16321 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 163 DFFSR_28 twfeed14 16321 11800 7 1 1 +$auto$iopadmap.cc:313:execute$873<7> 163 AOI22X1_2 twfeed5 16321 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 164 AOI22X1_2 twfeed5 16321 9800 6 1 1 +$auto$iopadmap.cc:313:execute$873<7> 165 DFFSR_23 Q 16801 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 166 BUFX2_18 A 14881 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 164 AOI22X1_2 C 16321 9800 6 1 1 +$auto$iopadmap.cc:313:execute$873<7> 164 NOR2X1_3 A 16161 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 170 DFFSR_28 twfeed15 16161 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 167 DFFSR_28 twfeed15 16161 11800 7 1 1 +$auto$iopadmap.cc:313:execute$873<6> 167 DFFSR_22 twfeed21 16641 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 168 DFFSR_22 twfeed21 16641 9800 6 1 1 +$auto$iopadmap.cc:313:execute$873<6> 168 INVX1_28 twfeed1 17441 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 169 INVX1_28 twfeed1 17441 7800 5 1 1 +$auto$iopadmap.cc:313:execute$873<6> 167 DFFSR_22 Q 16641 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 170 BUFX2_17 A 16161 13800 8 1 1 +$auto$iopadmap.cc:313:execute$873<6> 169 OAI21X1_27 C 18001 7800 5 1 1 +$auto$iopadmap.cc:313:execute$873<6> 168 INVX1_28 A 17441 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 168 NOR2X1_3 B 16481 9800 6 -1 1 +$abc$733$n80 173 NOR2X1_3 twfeed2 16321 9800 6 -1 1 +$abc$733$n80 171 NOR2X1_3 twfeed2 16321 7800 5 1 1 +$abc$733$n80 171 AND2X2_3 twfeed2 16321 7800 5 -1 1 +$abc$733$n80 172 AND2X2_3 twfeed2 16321 5800 4 1 1 +$abc$733$n80 172 AND2X2_6 B 13441 5800 4 1 1 +$abc$733$n80 172 NAND2X1_2 A 14561 5800 4 1 1 +$abc$733$n80 173 NOR2X1_3 Y 16321 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 176 DFFSR_19 twfeed4 13441 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 174 DFFSR_19 twfeed4 13441 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<1> 174 DFFSR_17 twfeed20 13441 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 175 DFFSR_17 twfeed20 13441 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<1> 174 DFFSR_17 Q 13281 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 175 BUFX2_12 A 13761 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 176 INVX1_22 A 12321 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 176 NOR2X1_4 A 12801 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 180 DFFSR_19 twfeed3 13281 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 177 DFFSR_19 twfeed3 13281 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<0> 180 AND2X2_1 twfeed2 8801 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 178 AND2X2_1 twfeed2 8801 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<0> 177 DFFSR_17 twfeed21 13281 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 179 DFFSR_17 twfeed21 13281 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<0> 178 DFFSR_16 Q 8161 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<0> 179 BUFX2_11 A 13281 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 180 AND2X2_1 B 8801 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 180 NOR2X1_13 A 10721 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<0> 180 NOR2X1_4 B 12481 5800 4 -1 1 +$abc$733$n81 182 NAND2X1_6 twfeed3 14081 7800 5 -1 1 +$abc$733$n81 181 NAND2X1_6 twfeed3 14081 5800 4 1 1 +$abc$733$n81 182 NAND2X1_6 B 14081 7800 5 -1 1 +$abc$733$n81 181 AND2X2_2 A 12481 5800 4 1 1 +$abc$733$n81 182 NAND2X1_2 B 14241 7800 5 -1 1 +$abc$733$n81 181 NOR2X1_4 Y 12641 5800 4 -1 1 +$abc$733$n82 183 NOR2X1_5 A 14721 5800 4 1 1 +$abc$733$n82 183 NAND2X1_2 Y 14301 5800 4 1 1 +$abc$733$n83_1 186 DFFSR_4 twfeed8 14881 9800 6 -1 1 +$abc$733$n83_1 184 DFFSR_4 twfeed8 14881 7800 5 1 1 +$abc$733$n83_1 184 NOR2X1_5 twfeed2 14881 7800 5 -1 1 +$abc$733$n83_1 185 NOR2X1_5 twfeed2 14881 5800 4 1 1 +$abc$733$n83_1 186 AOI22X1_2 B 15841 9800 6 1 1 +$abc$733$n83_1 186 OAI21X1_1 B 14881 9800 6 1 1 +$abc$733$n83_1 185 NOR2X1_5 Y 14881 5800 4 1 1 +$abc$546$n2 187 DFFSR_4 D 14721 9800 6 -1 1 +$abc$546$n2 187 OAI21X1_1 Y 14751 9800 6 1 1 +state<4> 189 INVX1_31 twfeed2 9441 1800 2 -1 1 +state<4> 188 INVX1_31 twfeed2 9441 -200 1 1 1 +state<4> 188 DFFSR_5 Q 9921 -200 1 1 1 +state<4> 188 NAND3X1_8 A 9281 -200 1 1 1 +state<4> 189 INVX1_1 A 9441 1800 2 1 1 +$abc$733$n85_1 190 OAI21X1_2 C 4881 3800 3 -1 1 +$abc$733$n85_1 190 INVX1_1 Y 9281 3800 3 -1 1 +state<1> 192 DFFSR_2 twfeed21 801 3800 3 -1 1 +state<1> 191 DFFSR_2 twfeed21 801 1800 2 1 1 +state<1> 192 DFFSR_2 Q 801 3800 3 -1 1 +state<1> 191 AND2X2_5 B 5281 1800 2 1 1 +state<1> 191 INVX1_2 A 4161 1800 2 1 1 +$abc$733$n86 193 OAI21X1_2 A 4561 1800 2 1 1 +$abc$733$n86 193 INVX1_2 Y 4321 1800 2 1 1 +start 194 twpin_start start -539 2260 -1 1 1 +start 194 PSEUDO_CELL PSEUDO_PIN -239 800 2 -2 0 +start 194 PSEUDO_CELL PSEUDO_PIN -239 800 -1 -1 0 +start 194 DFFSR_32 D 1921 1800 2 -1 1 +start 194 INVX1_3 A -159 1800 2 1 1 +$abc$733$n87_1 195 NOR2X1_6 B 481 1800 2 1 1 +$abc$733$n87_1 195 INVX1_3 Y 1 1800 2 1 1 +startbuf 197 DFFSR_32 twfeed21 1 1800 2 -1 1 +startbuf 196 DFFSR_32 twfeed21 1 -200 1 1 1 +startbuf 196 DFFSR_32 Q 1 -200 1 1 1 +startbuf 197 NOR2X1_6 A 161 1800 2 1 1 +$abc$733$n88 198 AND2X2_5 A 5121 1800 2 1 1 +$abc$733$n88 198 OAI21X1_2 B 4641 1800 2 1 1 +$abc$733$n88 198 NOR2X1_6 Y 321 1800 2 1 1 +$abc$546$n5 199 DFFSR_2 D 2721 1800 2 1 1 +$abc$546$n5 199 OAI21X1_2 Y 4771 1800 2 1 1 +$auto$iopadmap.cc:313:execute$884<1> 202 DFFSR_7 twfeed21 22881 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$884<1> 200 DFFSR_7 twfeed21 22881 11800 7 1 1 +$auto$iopadmap.cc:313:execute$884<1> 203 BUFX2_21 twfeed1 22881 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<1> 201 BUFX2_21 twfeed1 22881 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<1> 201 OR2X2_2 twfeed2 22881 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<1> 202 OR2X2_2 twfeed2 22881 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<1> 200 DFFSR_7 Q 22881 11800 7 1 1 +$auto$iopadmap.cc:313:execute$884<1> 203 BUFX2_21 A 22881 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<1> 202 INVX1_4 A 23361 13800 8 -1 1 +$abc$733$n90 204 AOI21X1_1 A 19441 13800 8 -1 1 +$abc$733$n90 204 INVX1_4 Y 23201 13800 8 -1 1 +state<2> 206 DFFSR_3 twfeed22 9601 3800 3 -1 1 +state<2> 205 DFFSR_3 twfeed22 9601 1800 2 1 1 +state<2> 205 DFFSR_5 D 11841 1800 2 -1 1 +state<2> 206 DFFSR_3 Q 9761 3800 3 -1 1 +state<2> 205 INVX1_31 A 9601 1800 2 -1 1 +state<2> 206 NAND3X1_1 A 9601 3800 3 1 1 +$abc$733$n91_1 216 INVX1_14 twfeed2 9441 13800 8 -1 1 +$abc$733$n91_1 207 INVX1_14 twfeed2 9441 11800 7 1 1 +$abc$733$n91_1 216 DFFSR_12 twfeed15 1441 13800 8 -1 1 +$abc$733$n91_1 208 DFFSR_12 twfeed15 1441 11800 7 1 1 +$abc$733$n91_1 211 MUX2X1_1 twfeed4 1441 9800 6 -1 1 +$abc$733$n91_1 209 MUX2X1_1 twfeed4 1441 7800 5 1 1 +$abc$733$n91_1 207 DFFSR_24 twfeed10 9441 11800 7 -1 1 +$abc$733$n91_1 210 DFFSR_24 twfeed10 9441 9800 6 1 1 +$abc$733$n91_1 208 DFFSR_8 twfeed12 1441 11800 7 -1 1 +$abc$733$n91_1 211 DFFSR_8 twfeed12 1441 9800 6 1 1 +$abc$733$n91_1 210 BUFX2_5 twfeed1 9441 9800 6 -1 1 +$abc$733$n91_1 212 BUFX2_5 twfeed1 9441 7800 5 1 1 +$abc$733$n91_1 212 DFFSR_29 twfeed3 9441 7800 5 -1 1 +$abc$733$n91_1 213 DFFSR_29 twfeed3 9441 5800 4 1 1 +$abc$733$n91_1 209 DFFSR_13 twfeed18 961 7800 5 -1 1 +$abc$733$n91_1 214 DFFSR_13 twfeed18 961 5800 4 1 1 +$abc$733$n91_1 213 NAND3X1_1 twfeed2 9441 5800 4 -1 1 +$abc$733$n91_1 215 NAND3X1_1 twfeed2 9441 3800 3 1 1 +$abc$733$n91_1 216 AOI21X1_2 B 20481 13800 8 1 1 +$abc$733$n91_1 216 NOR2X1_8 B 20801 13800 8 1 1 +$abc$733$n91_1 216 MUX2X1_7 S 6241 13800 8 1 1 +$abc$733$n91_1 214 MUX2X1_6 S 961 5800 4 -1 1 +$abc$733$n91_1 216 MUX2X1_5 S 4961 13800 8 -1 1 +$abc$733$n91_1 216 MUX2X1_4 S 14241 13800 8 1 1 +$abc$733$n91_1 216 MUX2X1_3 S 12001 13800 8 1 1 +$abc$733$n91_1 216 MUX2X1_2 S 1441 13800 8 1 1 +$abc$733$n91_1 211 MUX2X1_1 S 1921 9800 6 -1 1 +$abc$733$n91_1 216 AOI21X1_1 B 19361 13800 8 -1 1 +$abc$733$n91_1 216 NOR2X1_7 B 18881 13800 8 -1 1 +$abc$733$n91_1 215 NAND3X1_1 Y 9441 3800 3 1 1 +$auto$iopadmap.cc:313:execute$894<0> 219 OAI21X1_5 twfeed2 12001 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<0> 217 OAI21X1_5 twfeed2 12001 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<0> 219 DFFSR_24 twfeed21 7681 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<0> 218 DFFSR_24 twfeed21 7681 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<0> 220 XNOR2X1_2 twfeed7 12001 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<0> 219 XNOR2X1_2 twfeed7 12001 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<0> 219 DFFSR_24 Q 7681 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<0> 220 BUFX2_29 A 15681 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<0> 218 OAI21X1_30 A 7601 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<0> 217 OAI21X1_5 B 12001 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<0> 220 NOR2X1_7 A 18561 13800 8 -1 1 +$abc$733$n92 221 AOI21X1_1 C 19041 13800 8 -1 1 +$abc$733$n92 221 NOR2X1_7 Y 18721 13800 8 -1 1 +dp<1>_FF_INPUT 222 DFFSR_7 D 20961 13800 8 -1 1 +dp<1>_FF_INPUT 222 AOI21X1_1 Y 19201 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$884<2> 224 DFFSR_8 twfeed20 161 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$884<2> 223 DFFSR_8 twfeed20 161 9800 6 1 1 +$auto$iopadmap.cc:313:execute$884<2> 224 DFFSR_8 Q 1 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$884<2> 223 BUFX2_22 A 161 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$884<2> 223 INVX1_5 A 801 9800 6 -1 1 +$abc$733$n94 225 MUX2X1_1 A 1281 9800 6 -1 1 +$abc$733$n94 225 INVX1_5 Y 961 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<1> 227 DFFSR_25 twfeed21 2561 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<1> 226 DFFSR_25 twfeed21 2561 7800 5 1 1 +$auto$iopadmap.cc:313:execute$894<1> 226 DFFSR_25 Q 2561 7800 5 1 1 +$auto$iopadmap.cc:313:execute$894<1> 227 BUFX2_30 A 641 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<1> 227 OAI21X1_6 A 6001 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<1> 227 INVX1_6 A 2081 9800 6 -1 1 +$abc$733$n95_1 228 AOI21X1_13 B 6721 9800 6 -1 1 +$abc$733$n95_1 228 MUX2X1_1 B 1761 9800 6 -1 1 +$abc$733$n95_1 228 INVX1_6 Y 2241 9800 6 -1 1 +dp<2>_FF_INPUT 230 MUX2X1_1 twfeed3 1601 9800 6 -1 1 +dp<2>_FF_INPUT 229 MUX2X1_1 twfeed3 1601 7800 5 1 1 +dp<2>_FF_INPUT 230 DFFSR_8 D 1921 9800 6 1 1 +dp<2>_FF_INPUT 229 MUX2X1_1 Y 1502 7800 5 1 1 +$auto$iopadmap.cc:313:execute$884<3> 232 BUFX2_23 twfeed1 161 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<3> 231 BUFX2_23 twfeed1 161 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<3> 232 DFFSR_9 Q 1 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<3> 231 BUFX2_23 A 161 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<3> 231 INVX1_7 A 321 13800 8 1 1 +$abc$733$n97_1 233 MUX2X1_2 A 801 13800 8 1 1 +$abc$733$n97_1 233 INVX1_7 Y 481 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<2> 235 DFFSR_26 twfeed21 8321 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<2> 234 DFFSR_26 twfeed21 8321 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<2> 234 DFFSR_26 Q 8321 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<2> 235 BUFX2_31 A 8321 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<2> 235 OAI21X1_7 A 8721 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<2> 235 INVX1_8 A 7201 13800 8 1 1 +$abc$733$n98_1 236 AOI21X1_4 B 6721 13800 8 1 1 +$abc$733$n98_1 236 MUX2X1_2 B 1281 13800 8 1 1 +$abc$733$n98_1 236 INVX1_8 Y 7041 13800 8 1 1 +dp<3>_FF_INPUT 238 DFFSR_9 twfeed14 1121 17800 10 -1 1 +dp<3>_FF_INPUT 237 DFFSR_9 twfeed14 1121 15800 9 1 1 +dp<3>_FF_INPUT 238 DFFSR_9 D 1921 17800 10 -1 1 +dp<3>_FF_INPUT 237 MUX2X1_2 Y 1022 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<4> 240 DFFSR_10 twfeed21 10721 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<4> 239 DFFSR_10 twfeed21 10721 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<4> 239 DFFSR_10 Q 10721 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<4> 240 BUFX2_24 A 9761 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<4> 240 INVX1_9 A 10241 17800 10 -1 1 +$abc$733$n100 243 DFFSR_10 twfeed9 12641 17800 10 -1 1 +$abc$733$n100 241 DFFSR_10 twfeed9 12641 15800 9 1 1 +$abc$733$n100 241 MUX2X1_3 twfeed5 12641 15800 9 -1 1 +$abc$733$n100 242 MUX2X1_3 twfeed5 12641 13800 8 1 1 +$abc$733$n100 242 MUX2X1_3 A 12641 13800 8 1 1 +$abc$733$n100 243 INVX1_9 Y 10401 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 246 INVX1_10 twfeed1 9441 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 244 INVX1_10 twfeed1 9441 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<3> 246 MUX2X1_3 twfeed6 12801 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 245 MUX2X1_3 twfeed6 12801 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<3> 247 BUFX2_32 twfeed2 9441 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 246 BUFX2_32 twfeed2 9441 15800 9 1 1 +$auto$iopadmap.cc:313:execute$894<3> 246 DFFSR_27 Q 8481 15800 9 1 1 +$auto$iopadmap.cc:313:execute$894<3> 247 BUFX2_32 A 9601 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 245 OAI21X1_8 A 13841 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 245 XNOR2X1_2 A 12691 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 245 NOR2X1_10 A 12961 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<3> 244 INVX1_10 A 9441 13800 8 1 1 +$abc$733$n101_1 249 INVX1_10 twfeed2 9601 15800 9 -1 1 +$abc$733$n101_1 248 INVX1_10 twfeed2 9601 13800 8 1 1 +$abc$733$n101_1 248 AOI21X1_5 B 9121 13800 8 1 1 +$abc$733$n101_1 248 NOR2X1_9 B 11521 13800 8 1 1 +$abc$733$n101_1 248 MUX2X1_3 B 12161 13800 8 1 1 +$abc$733$n101_1 249 INVX1_10 Y 9601 15800 9 -1 1 +dp<4>_FF_INPUT 251 DFFSR_10 twfeed10 12481 17800 10 -1 1 +dp<4>_FF_INPUT 250 DFFSR_10 twfeed10 12481 15800 9 1 1 +dp<4>_FF_INPUT 251 DFFSR_10 D 12641 17800 10 -1 1 +dp<4>_FF_INPUT 250 MUX2X1_3 Y 12420 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<5> 253 INVX1_11 twfeed1 14561 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<5> 252 INVX1_11 twfeed1 14561 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<5> 252 DFFSR_11 Q 15521 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<5> 253 BUFX2_25 A 14401 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<5> 253 INVX1_11 A 14561 17800 10 -1 1 +$abc$733$n103_1 256 BUFX2_18 twfeed2 15041 17800 10 -1 1 +$abc$733$n103_1 254 BUFX2_18 twfeed2 15041 15800 9 1 1 +$abc$733$n103_1 254 MUX2X1_4 twfeed6 15041 15800 9 -1 1 +$abc$733$n103_1 255 MUX2X1_4 twfeed6 15041 13800 8 1 1 +$abc$733$n103_1 255 MUX2X1_4 A 14881 13800 8 1 1 +$abc$733$n103_1 256 INVX1_11 Y 14721 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$894<4> 259 OAI21X1_8 twfeed4 14241 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<4> 257 OAI21X1_8 twfeed4 14241 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<4> 257 OAI21X1_9 twfeed2 14241 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<4> 258 OAI21X1_9 twfeed2 14241 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<4> 257 DFFSR_28 Q 15201 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<4> 259 BUFX2_33 A 13761 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<4> 258 OAI21X1_9 A 14321 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<4> 259 XNOR2X1_2 B 12042 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<4> 259 NOR2X1_9 A 11841 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<4> 259 INVX1_12 A 14081 13800 8 1 1 +$abc$733$n104 261 INVX1_12 twfeed2 13921 15800 9 -1 1 +$abc$733$n104 260 INVX1_12 twfeed2 13921 13800 8 1 1 +$abc$733$n104 260 AOI21X1_6 B 14721 13800 8 -1 1 +$abc$733$n104 260 NOR2X1_10 B 13281 13800 8 1 1 +$abc$733$n104 260 MUX2X1_4 B 14401 13800 8 1 1 +$abc$733$n104 261 INVX1_12 Y 13921 15800 9 -1 1 +dp<5>_FF_INPUT 263 DFFSR_11 twfeed9 17441 17800 10 -1 1 +dp<5>_FF_INPUT 262 DFFSR_11 twfeed9 17441 15800 9 1 1 +dp<5>_FF_INPUT 263 DFFSR_11 D 17441 17800 10 -1 1 +dp<5>_FF_INPUT 262 MUX2X1_4 Y 14660 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<6> 265 DFFSR_12 twfeed21 481 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$884<6> 264 DFFSR_12 twfeed21 481 11800 7 1 1 +$auto$iopadmap.cc:313:execute$884<6> 264 DFFSR_12 Q 481 11800 7 1 1 +$auto$iopadmap.cc:313:execute$884<6> 265 BUFX2_26 A 161 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$884<6> 265 INVX1_13 A 3841 13800 8 -1 1 +$abc$733$n106_1 266 MUX2X1_5 A 4321 13800 8 -1 1 +$abc$733$n106_1 266 INVX1_13 Y 4001 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 272 INVX1_14 twfeed1 9281 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 267 INVX1_14 twfeed1 9281 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<5> 271 DFFSR_26 twfeed20 8161 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 267 DFFSR_26 twfeed20 8161 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<5> 267 DFFSR_31 twfeed21 6561 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 268 DFFSR_31 twfeed21 6561 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<5> 268 AOI21X1_13 twfeed1 6561 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 269 AOI21X1_13 twfeed1 6561 7800 5 1 1 +$auto$iopadmap.cc:313:execute$894<5> 269 OAI21X1_10 twfeed1 6241 7800 5 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 270 OAI21X1_10 twfeed1 6241 5800 4 1 1 +$auto$iopadmap.cc:313:execute$894<5> 269 DFFSR_29 Q 6561 7800 5 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 271 BUFX2_34 A 8161 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<5> 270 OAI21X1_10 A 6161 5800 4 1 1 +$auto$iopadmap.cc:313:execute$894<5> 272 NOR2X1_12 A 10241 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 272 XNOR2X1_1 A 10031 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<5> 272 INVX1_14 A 9281 13800 8 -1 1 +$abc$733$n107 275 NOR2X1_12 twfeed1 10241 13800 8 -1 1 +$abc$733$n107 273 NOR2X1_12 twfeed1 10241 11800 7 1 1 +$abc$733$n107 273 DFFSR_24 twfeed5 10241 11800 7 -1 1 +$abc$733$n107 274 DFFSR_24 twfeed5 10241 9800 6 1 1 +$abc$733$n107 274 AOI21X1_7 B 10241 9800 6 -1 1 +$abc$733$n107 275 NOR2X1_11 B 10401 13800 8 -1 1 +$abc$733$n107 275 MUX2X1_5 B 4801 13800 8 -1 1 +$abc$733$n107 275 INVX1_14 Y 9441 13800 8 -1 1 +dp<6>_FF_INPUT 277 DFFSR_12 twfeed9 2401 13800 8 -1 1 +dp<6>_FF_INPUT 276 DFFSR_12 twfeed9 2401 11800 7 1 1 +dp<6>_FF_INPUT 277 DFFSR_12 D 2401 13800 8 -1 1 +dp<6>_FF_INPUT 276 MUX2X1_5 Y 4542 11800 7 1 1 +$auto$iopadmap.cc:313:execute$884<7> 279 DFFSR_13 twfeed20 641 7800 5 -1 1 +$auto$iopadmap.cc:313:execute$884<7> 278 DFFSR_13 twfeed20 641 5800 4 1 1 +$auto$iopadmap.cc:313:execute$884<7> 279 DFFSR_13 Q 481 7800 5 -1 1 +$auto$iopadmap.cc:313:execute$884<7> 278 BUFX2_27 A 161 5800 4 1 1 +$auto$iopadmap.cc:313:execute$884<7> 278 INVX1_15 A 1 5800 4 -1 1 +$abc$733$n109 280 MUX2X1_6 A 321 5800 4 -1 1 +$abc$733$n109 280 INVX1_15 Y -159 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$894<6> 284 DFFSR_30 twfeed10 3361 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$894<6> 281 DFFSR_30 twfeed10 3361 3800 3 1 1 +$auto$iopadmap.cc:313:execute$894<6> 284 DFFSR_30 twfeed21 1601 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$894<6> 282 DFFSR_30 twfeed21 1601 3800 3 1 1 +$auto$iopadmap.cc:313:execute$894<6> 281 DFFSR_2 twfeed5 3361 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$894<6> 283 DFFSR_2 twfeed5 3361 1800 2 1 1 +$auto$iopadmap.cc:313:execute$894<6> 282 DFFSR_30 Q 1601 3800 3 1 1 +$auto$iopadmap.cc:313:execute$894<6> 283 BUFX2_35 A 3361 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$894<6> 284 OAI21X1_11 A 5201 5800 4 1 1 +$auto$iopadmap.cc:313:execute$894<6> 284 INVX1_16 A 1281 5800 4 -1 1 +$abc$733$n110_1 285 AOI21X1_8 B 4001 5800 4 1 1 +$abc$733$n110_1 285 MUX2X1_6 B 801 5800 4 -1 1 +$abc$733$n110_1 285 INVX1_16 Y 1121 5800 4 -1 1 +dp<7>_FF_INPUT 287 MUX2X1_6 twfeed4 481 5800 4 -1 1 +dp<7>_FF_INPUT 286 MUX2X1_6 twfeed4 481 3800 3 1 1 +dp<7>_FF_INPUT 287 DFFSR_13 D 2401 5800 4 1 1 +dp<7>_FF_INPUT 286 MUX2X1_6 Y 542 3800 3 1 1 +$auto$iopadmap.cc:313:execute$884<8> 290 BUFX2_28 twfeed1 4321 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<8> 288 BUFX2_28 twfeed1 4321 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<8> 291 DFFSR_14 twfeed22 4961 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<8> 289 DFFSR_14 twfeed22 4961 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<8> 288 DFFSR_14 twfeed18 4321 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<8> 289 DFFSR_14 twfeed18 4321 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<8> 291 DFFSR_14 Q 4801 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<8> 290 BUFX2_28 A 4321 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<8> 289 INVX1_17 A 5121 13800 8 1 1 +$abc$733$n112 292 MUX2X1_7 A 5601 13800 8 1 1 +$abc$733$n112 292 INVX1_17 Y 5281 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<7> 294 DFFSR_26 twfeed15 7361 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<7> 293 DFFSR_26 twfeed15 7361 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<7> 293 DFFSR_31 Q 6561 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<7> 294 BUFX2_36 A 7361 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<7> 294 NOR2X1_11 A 10721 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<7> 294 XNOR2X1_1 B 10680 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<7> 294 INVX1_18 A 9601 13800 8 -1 1 +$abc$733$n113 297 DFFSR_26 twfeed14 7201 13800 8 -1 1 +$abc$733$n113 295 DFFSR_26 twfeed14 7201 11800 7 1 1 +$abc$733$n113 295 AOI21X1_9 twfeed2 7201 11800 7 -1 1 +$abc$733$n113 296 AOI21X1_9 twfeed2 7201 9800 6 1 1 +$abc$733$n113 296 AOI21X1_9 B 7201 9800 6 1 1 +$abc$733$n113 297 NOR2X1_12 B 9921 13800 8 -1 1 +$abc$733$n113 297 MUX2X1_7 B 6081 13800 8 1 1 +$abc$733$n113 297 INVX1_18 Y 9761 13800 8 -1 1 +dp<8>_FF_INPUT 299 MUX2X1_7 twfeed3 5921 15800 9 -1 1 +dp<8>_FF_INPUT 298 MUX2X1_7 twfeed3 5921 13800 8 1 1 +dp<8>_FF_INPUT 298 DFFSR_14 D 2881 13800 8 1 1 +dp<8>_FF_INPUT 299 MUX2X1_7 Y 5822 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<0> 303 BUFX2_20 twfeed1 22401 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<0> 300 BUFX2_20 twfeed1 22401 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<0> 303 DFFSR_6 twfeed17 21441 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<0> 301 DFFSR_6 twfeed17 21441 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<0> 301 INVX1_19 twfeed1 21441 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<0> 302 INVX1_19 twfeed1 21441 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<0> 300 DFFSR_6 Q 22081 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<0> 303 BUFX2_20 A 22401 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<0> 302 INVX1_19 A 21441 13800 8 1 1 +$abc$733$n115 304 AOI21X1_2 A 20561 13800 8 1 1 +$abc$733$n115 304 INVX1_19 Y 21281 13800 8 1 1 +N<0> 305 twpin_N<0> N<0> 24061 14420 -2 1 1 +N<0> 305 PSEUDO_CELL PSEUDO_PIN 23441 12800 8 2 0 +N<0> 305 PSEUDO_CELL PSEUDO_PIN 23441 12800 -2 -1 0 +N<0> 305 NOR2X1_8 A 21121 13800 8 1 1 +$abc$733$n116_1 306 AOI21X1_2 C 20161 13800 8 1 1 +$abc$733$n116_1 306 NOR2X1_8 Y 20961 13800 8 1 1 +dp<0>_FF_INPUT 309 DFFSR_6 twfeed9 20161 17800 10 -1 1 +dp<0>_FF_INPUT 307 DFFSR_6 twfeed9 20161 15800 9 1 1 +dp<0>_FF_INPUT 307 AOI21X1_2 twfeed4 20161 15800 9 -1 1 +dp<0>_FF_INPUT 308 AOI21X1_2 twfeed4 20161 13800 8 1 1 +dp<0>_FF_INPUT 309 DFFSR_6 D 20161 17800 10 -1 1 +dp<0>_FF_INPUT 308 AOI21X1_2 Y 20321 13800 8 1 1 +$abc$733$n118_1 311 OAI21X1_3 twfeed4 10881 15800 9 -1 1 +$abc$733$n118_1 310 OAI21X1_3 twfeed4 10881 13800 8 1 1 +$abc$733$n118_1 311 OAI21X1_3 C 10961 15800 9 -1 1 +$abc$733$n118_1 310 XNOR2X1_1 Y 10291 13800 8 1 1 +$abc$733$n119 312 OAI21X1_3 A 11281 13800 8 1 1 +$abc$733$n119 312 NOR2X1_9 Y 11681 13800 8 1 1 +$abc$733$n120 313 OAI21X1_3 B 11201 13800 8 1 1 +$abc$733$n120 313 NOR2X1_10 Y 13121 13800 8 1 1 +$abc$733$n121 314 NAND2X1_3 A 10881 13800 8 -1 1 +$abc$733$n121 314 OAI21X1_3 Y 11071 13800 8 1 1 +$abc$733$n122 315 OAI21X1_4 A 11441 13800 8 -1 1 +$abc$733$n122 315 NOR2X1_11 Y 10561 13800 8 -1 1 +$abc$733$n123_1 316 OAI21X1_4 B 11521 13800 8 -1 1 +$abc$733$n123_1 316 NOR2X1_12 Y 10081 13800 8 -1 1 +$abc$733$n124 318 XNOR2X1_2 twfeed4 12481 13800 8 -1 1 +$abc$733$n124 317 XNOR2X1_2 twfeed4 12481 11800 7 1 1 +$abc$733$n124 317 OAI21X1_4 C 11761 11800 7 1 1 +$abc$733$n124 318 XNOR2X1_2 Y 12431 13800 8 -1 1 +$abc$733$n125 320 NAND2X1_3 twfeed3 11201 13800 8 -1 1 +$abc$733$n125 319 NAND2X1_3 twfeed3 11201 11800 7 1 1 +$abc$733$n125 319 NAND2X1_3 B 11201 11800 7 1 1 +$abc$733$n125 320 OAI21X1_4 Y 11651 13800 8 -1 1 +$abc$733$n126 323 NAND2X1_3 twfeed2 11041 13800 8 -1 1 +$abc$733$n126 321 NAND2X1_3 twfeed2 11041 11800 7 1 1 +$abc$733$n126 321 AOI21X1_3 twfeed1 11041 11800 7 -1 1 +$abc$733$n126 322 AOI21X1_3 twfeed1 11041 9800 6 1 1 +$abc$733$n126 322 AOI21X1_3 A 11121 9800 6 1 1 +$abc$733$n126 323 NAND2X1_3 Y 11141 13800 8 -1 1 +$abc$733$n127 324 AOI21X1_3 C 11521 9800 6 1 1 +$abc$733$n127 324 OAI21X1_5 Y 11871 9800 6 1 1 +sr<0>_FF_INPUT 325 DFFSR_24 D 9601 9800 6 1 1 +sr<0>_FF_INPUT 325 AOI21X1_3 Y 11361 9800 6 1 1 +$abc$733$n129 328 DFFSR_26 twfeed9 6401 13800 8 -1 1 +$abc$733$n129 326 DFFSR_26 twfeed9 6401 11800 7 1 1 +$abc$733$n129 326 DFFSR_31 twfeed20 6401 11800 7 -1 1 +$abc$733$n129 327 DFFSR_31 twfeed20 6401 9800 6 1 1 +$abc$733$n129 328 AOI21X1_4 C 6401 13800 8 1 1 +$abc$733$n129 327 OAI21X1_6 Y 6211 9800 6 -1 1 +sr<2>_FF_INPUT 329 DFFSR_26 D 6401 13800 8 -1 1 +sr<2>_FF_INPUT 329 AOI21X1_4 Y 6561 13800 8 1 1 +$abc$733$n131 330 AOI21X1_5 C 8801 13800 8 1 1 +$abc$733$n131 330 OAI21X1_7 Y 8931 13800 8 -1 1 +sr<3>_FF_INPUT 333 DFFSR_27 twfeed9 6561 17800 10 -1 1 +sr<3>_FF_INPUT 331 DFFSR_27 twfeed9 6561 15800 9 1 1 +sr<3>_FF_INPUT 331 AOI21X1_4 twfeed3 6561 15800 9 -1 1 +sr<3>_FF_INPUT 332 AOI21X1_4 twfeed3 6561 13800 8 1 1 +sr<3>_FF_INPUT 333 DFFSR_27 D 6561 17800 10 -1 1 +sr<3>_FF_INPUT 332 AOI21X1_5 Y 8961 13800 8 1 1 +$abc$733$n133_1 334 AOI21X1_6 C 14401 13800 8 -1 1 +$abc$733$n133_1 334 OAI21X1_8 Y 14051 13800 8 -1 1 +sr<4>_FF_INPUT 335 DFFSR_28 D 17121 13800 8 -1 1 +sr<4>_FF_INPUT 335 AOI21X1_6 Y 14561 13800 8 -1 1 +$abc$733$n135_1 336 AOI21X1_7 C 10561 9800 6 -1 1 +$abc$733$n135_1 336 OAI21X1_9 Y 14111 9800 6 1 1 +sr<5>_FF_INPUT 339 AOI21X1_7 twfeed3 10401 9800 6 -1 1 +sr<5>_FF_INPUT 337 AOI21X1_7 twfeed3 10401 7800 5 1 1 +sr<5>_FF_INPUT 337 NOR2X1_13 twfeed2 10561 7800 5 -1 1 +sr<5>_FF_INPUT 338 NOR2X1_13 twfeed2 10561 5800 4 1 1 +sr<5>_FF_INPUT 338 DFFSR_29 D 8481 5800 4 1 1 +sr<5>_FF_INPUT 339 AOI21X1_7 Y 10401 9800 6 -1 1 +$abc$733$n137 340 AOI21X1_8 C 4321 5800 4 1 1 +$abc$733$n137 340 OAI21X1_10 Y 5951 5800 4 1 1 +sr<6>_FF_INPUT 341 DFFSR_30 D 3521 5800 4 -1 1 +sr<6>_FF_INPUT 341 AOI21X1_8 Y 4161 5800 4 1 1 +$abc$733$n139 344 DFFSR_25 twfeed3 5441 9800 6 -1 1 +$abc$733$n139 342 DFFSR_25 twfeed3 5441 7800 5 1 1 +$abc$733$n139 342 OAI21X1_11 twfeed3 5441 7800 5 -1 1 +$abc$733$n139 343 OAI21X1_11 twfeed3 5441 5800 4 1 1 +$abc$733$n139 344 AOI21X1_9 C 6881 9800 6 1 1 +$abc$733$n139 343 OAI21X1_11 Y 5411 5800 4 1 1 +sr<7>_FF_INPUT 345 DFFSR_31 D 4641 9800 6 1 1 +sr<7>_FF_INPUT 345 AOI21X1_9 Y 7041 9800 6 1 1 +N<1> 348 NAND2X1_4 twfeed1 20321 1800 2 -1 1 +N<1> 346 NAND2X1_4 twfeed1 20321 -200 1 1 1 +N<1> 347 DFFSR_18 twfeed14 16801 1800 2 -1 1 +N<1> 346 DFFSR_18 twfeed14 16801 -200 1 1 1 +N<1> 346 twpin_N<1> N<1> 20321 -500 -3 -1 1 +N<1> 346 PSEUDO_CELL PSEUDO_PIN 20321 -201 1 -1 0 +N<1> 346 PSEUDO_CELL PSEUDO_PIN 20321 -201 -3 1 0 +N<1> 348 NAND2X1_4 A 20321 1800 2 -1 1 +N<1> 348 NOR2X1_14 A 19841 1800 2 -1 1 +N<1> 347 INVX1_20 A 16801 1800 2 1 1 +$abc$733$n141 350 OAI21X1_13 twfeed2 10721 5800 4 -1 1 +$abc$733$n141 349 OAI21X1_13 twfeed2 10721 3800 3 1 1 +$abc$733$n141 350 OAI21X1_13 B 10721 5800 4 -1 1 +$abc$733$n141 349 INVX1_20 Y 16641 3800 3 -1 1 +$abc$733$n142 351 NOR2X1_15 B 11041 5800 4 -1 1 +$abc$733$n142 351 OAI21X1_12 A 10161 5800 4 -1 1 +$abc$733$n142 351 NOR2X1_13 Y 10561 5800 4 1 1 +$abc$733$n143 352 OAI21X1_12 B 10081 5800 4 -1 1 +$abc$733$n143 352 AND2X2_1 Y 8542 5800 4 -1 1 +$abc$733$n144 354 OAI21X1_12 twfeed3 9921 5800 4 -1 1 +$abc$733$n144 353 OAI21X1_12 twfeed3 9921 3800 3 1 1 +$abc$733$n144 353 OAI21X1_13 C 10481 3800 3 1 1 +$abc$733$n144 354 OAI21X1_12 Y 9951 5800 4 -1 1 +counter<0>_FF_INPUT 355 DFFSR_16 D 6241 5800 4 -1 1 +counter<0>_FF_INPUT 355 OAI21X1_13 Y 10591 5800 4 -1 1 +N<2> 357 NAND2X1_4 twfeed2 20481 1800 2 -1 1 +N<2> 356 NAND2X1_4 twfeed2 20481 -200 1 1 1 +N<2> 356 twpin_N<2> N<2> 20641 -500 -3 -1 1 +N<2> 356 PSEUDO_CELL PSEUDO_PIN 20481 -201 1 -1 0 +N<2> 356 PSEUDO_CELL PSEUDO_PIN 20481 -201 -3 1 0 +N<2> 356 PSEUDO_CELL PSEUDO_PIN 20641 -201 1 -1 0 +N<2> 356 PSEUDO_CELL PSEUDO_PIN 20641 -201 -3 1 0 +N<2> 356 NAND2X1_4 B 20641 -200 1 1 1 +N<2> 357 NOR2X1_14 B 20161 1800 2 -1 1 +$abc$733$n146 358 OAI21X1_14 A 19601 1800 2 -1 1 +$abc$733$n146 358 NOR2X1_14 Y 20001 1800 2 -1 1 +$abc$733$n147 360 NAND3X1_4 twfeed1 22721 3800 3 -1 1 +$abc$733$n147 359 NAND3X1_4 twfeed1 22721 1800 2 1 1 +$abc$733$n147 361 NAND3X1_3 twfeed3 21121 3800 3 -1 1 +$abc$733$n147 359 NAND3X1_3 twfeed3 21121 1800 2 1 1 +$abc$733$n147 360 NAND3X1_4 A 22721 3800 3 -1 1 +$abc$733$n147 359 AOI21X1_10 B 21921 1800 2 1 1 +$abc$733$n147 361 NAND3X1_3 C 21121 3800 3 -1 1 +$abc$733$n147 361 NAND2X1_7 B 20001 3800 3 -1 1 +$abc$733$n147 359 INVX1_21 A 22561 1800 2 -1 1 +$abc$733$n147 359 NAND2X1_4 Y 20581 1800 2 -1 1 +$abc$733$n148 363 NAND2X1_8 twfeed3 20801 1800 2 -1 1 +$abc$733$n148 362 NAND2X1_8 twfeed3 20801 -200 1 1 1 +$abc$733$n148 364 OAI21X1_17 twfeed2 22081 1800 2 -1 1 +$abc$733$n148 362 OAI21X1_17 twfeed2 22081 -200 1 1 1 +$abc$733$n148 364 OAI21X1_17 B 22081 1800 2 -1 1 +$abc$733$n148 362 NAND2X1_8 B 20801 -200 1 1 1 +$abc$733$n148 363 OAI21X1_14 B 19521 1800 2 -1 1 +$abc$733$n148 362 INVX1_21 Y 22401 -200 1 1 1 +$abc$733$n149 365 NAND2X1_5 A 14561 1800 2 -1 1 +$abc$733$n149 365 OAI21X1_14 Y 19391 1800 2 -1 1 +$abc$733$n150 368 NAND2X1_11 twfeed3 17121 7800 5 -1 1 +$abc$733$n150 366 NAND2X1_11 twfeed3 17121 5800 4 1 1 +$abc$733$n150 369 NAND3X1_5 twfeed3 16801 9800 6 -1 1 +$abc$733$n150 367 NAND3X1_5 twfeed3 16801 7800 5 1 1 +$abc$733$n150 367 NAND2X1_11 twfeed2 16961 7800 5 -1 1 +$abc$733$n150 366 NAND2X1_11 twfeed2 16961 5800 4 1 1 +$abc$733$n150 369 NAND3X1_5 B 16921 9800 6 -1 1 +$abc$733$n150 366 AOI21X1_11 B 18721 5800 4 1 1 +$abc$733$n150 366 AOI22X1_1 B 17761 5800 4 1 1 +$abc$733$n150 368 NAND2X1_11 B 17121 7800 5 -1 1 +$abc$733$n150 366 OAI21X1_15 A 11921 5800 4 -1 1 +$abc$733$n150 366 AND2X2_2 Y 12062 5800 4 1 1 +$abc$733$n151_1 370 NOR2X1_15 A 11361 5800 4 -1 1 +$abc$733$n151_1 370 INVX1_22 Y 12161 5800 4 -1 1 +$abc$733$n152 371 OAI21X1_15 B 11841 5800 4 -1 1 +$abc$733$n152 371 NOR2X1_15 Y 11201 5800 4 -1 1 +$abc$733$n153_1 375 OAI21X1_15 twfeed2 11841 5800 4 -1 1 +$abc$733$n153_1 372 OAI21X1_15 twfeed2 11841 3800 3 1 1 +$abc$733$n153_1 372 DFFSR_3 twfeed8 11841 3800 3 -1 1 +$abc$733$n153_1 373 DFFSR_3 twfeed8 11841 1800 2 1 1 +$abc$733$n153_1 373 DFFSR_5 twfeed10 11681 1800 2 -1 1 +$abc$733$n153_1 374 DFFSR_5 twfeed10 11681 -200 1 1 1 +$abc$733$n153_1 374 NAND2X1_5 B 14241 -200 1 1 1 +$abc$733$n153_1 375 OAI21X1_15 Y 11711 5800 4 -1 1 +counter<1>_FF_INPUT 376 DFFSR_17 D 15201 1800 2 1 1 +counter<1>_FF_INPUT 376 NAND2X1_5 Y 14301 1800 2 -1 1 +$abc$733$n155 378 OAI21X1_19 twfeed4 17601 5800 4 -1 1 +$abc$733$n155 377 OAI21X1_19 twfeed4 17601 3800 3 1 1 +$abc$733$n155 379 AOI22X1_1 twfeed3 17601 7800 5 -1 1 +$abc$733$n155 378 AOI22X1_1 twfeed3 17601 5800 4 1 1 +$abc$733$n155 381 OAI21X1_27 twfeed1 17601 9800 6 -1 1 +$abc$733$n155 379 OAI21X1_27 twfeed1 17601 7800 5 1 1 +$abc$733$n155 377 XOR2X1_1 twfeed1 17601 3800 3 -1 1 +$abc$733$n155 380 XOR2X1_1 twfeed1 17601 1800 2 1 1 +$abc$733$n155 381 OAI21X1_27 A 17681 9800 6 -1 1 +$abc$733$n155 378 NOR2X1_18 A 15201 5800 4 1 1 +$abc$733$n155 378 OAI21X1_19 B 17921 5800 4 -1 1 +$abc$733$n155 380 OAI21X1_18 B 17121 1800 2 1 1 +$abc$733$n155 380 XOR2X1_1 A 17671 1800 2 1 1 +$abc$733$n155 378 NAND2X1_6 Y 14021 5800 4 1 1 +$abc$733$n156 382 OAI21X1_16 B 18881 1800 2 1 1 +$abc$733$n156 382 XOR2X1_1 Y 18081 1800 2 1 1 +N<3> 383 twpin_N<3> N<3> 24061 1340 -2 1 1 +N<3> 383 PSEUDO_CELL PSEUDO_PIN 23281 800 2 2 0 +N<3> 383 PSEUDO_CELL PSEUDO_PIN 23281 800 -2 -1 0 +N<3> 383 NOR2X1_16 A 23041 1800 2 -1 1 +N<3> 383 OAI21X1_17 A 22161 1800 2 -1 1 +N<3> 383 NAND2X1_8 A 21121 1800 2 -1 1 +N<3> 383 INVX1_23 A 20641 1800 2 1 1 +$abc$733$n157 385 NAND3X1_3 A 20801 3800 3 -1 1 +$abc$733$n157 384 NAND2X1_7 A 20321 1800 2 1 1 +$abc$733$n157 385 INVX1_23 Y 20481 3800 3 -1 1 +$abc$733$n157 384 INVX1_23 Y 20481 1800 2 1 1 +$abc$733$n158_1 386 NAND3X1_2 B 19561 1800 2 1 1 +$abc$733$n158_1 386 NAND2X1_7 Y 20061 1800 2 1 1 +$abc$733$n159 388 NAND3X1_3 twfeed1 20801 3800 3 -1 1 +$abc$733$n159 387 NAND3X1_3 twfeed1 20801 1800 2 1 1 +$abc$733$n159 388 NAND3X1_2 C 19681 3800 3 -1 1 +$abc$733$n159 387 NAND2X1_8 Y 20861 1800 2 -1 1 +$abc$733$n160_1 389 OAI21X1_16 C 19121 3800 3 -1 1 +$abc$733$n160_1 389 NAND3X1_2 Y 19521 3800 3 -1 1 +counter<2>_FF_INPUT 390 DFFSR_18 D 16001 1800 2 -1 1 +counter<2>_FF_INPUT 390 OAI21X1_16 Y 19011 1800 2 1 1 +N<4> 393 OAI21X1_17 twfeed3 21921 1800 2 -1 1 +N<4> 391 OAI21X1_17 twfeed3 21921 -200 1 1 1 +N<4> 392 OAI21X1_17 twfeed4 21761 1800 2 -1 1 +N<4> 391 OAI21X1_17 twfeed4 21761 -200 1 1 1 +N<4> 391 twpin_N<4> N<4> 21841 -500 -3 -1 1 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21921 -201 1 -1 0 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21921 -201 -3 1 0 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21761 -201 1 -1 0 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21761 -201 -3 1 0 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21841 -201 1 -1 0 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21841 -201 -3 1 0 +N<4> 393 NOR2X1_16 B 22721 1800 2 -1 1 +N<4> 392 INVX1_24 A 21601 1800 2 1 1 +N<4> 391 OAI21X1_17 C 21841 -200 1 1 1 +$abc$733$n162_1 395 NAND2X1_9 twfeed3 21601 1800 2 -1 1 +$abc$733$n162_1 394 NAND2X1_9 twfeed3 21601 -200 1 1 1 +$abc$733$n162_1 394 NAND2X1_9 B 21601 -200 1 1 1 +$abc$733$n162_1 395 OAI21X1_17 Y 21951 1800 2 -1 1 +$abc$733$n163_1 396 NAND3X1_3 B 21001 1800 2 1 1 +$abc$733$n163_1 396 INVX1_24 Y 21441 1800 2 1 1 +$abc$733$n164_1 398 NAND3X1_3 twfeed4 21281 3800 3 -1 1 +$abc$733$n164_1 397 NAND3X1_3 twfeed4 21281 1800 2 1 1 +$abc$733$n164_1 399 DFFSR_21 twfeed13 21281 5800 4 -1 1 +$abc$733$n164_1 398 DFFSR_21 twfeed13 21281 3800 3 1 1 +$abc$733$n164_1 399 NOR2X1_19 B 22721 5800 4 1 1 +$abc$733$n164_1 399 OAI21X1_23 A 23601 5800 4 1 1 +$abc$733$n164_1 399 OAI21X1_22 B 23041 5800 4 -1 1 +$abc$733$n164_1 399 OAI21X1_21 B 22401 5800 4 1 1 +$abc$733$n164_1 397 NAND2X1_9 A 21281 1800 2 -1 1 +$abc$733$n164_1 398 NAND3X1_3 Y 20961 3800 3 -1 1 +$abc$733$n165 402 DFFSR_21 twfeed15 21601 5800 4 -1 1 +$abc$733$n165 400 DFFSR_21 twfeed15 21601 3800 3 1 1 +$abc$733$n165 400 INVX1_24 twfeed1 21601 3800 3 -1 1 +$abc$733$n165 401 INVX1_24 twfeed1 21601 1800 2 1 1 +$abc$733$n165 402 OAI21X1_20 B 19041 5800 4 -1 1 +$abc$733$n165 401 NAND2X1_9 Y 21541 1800 2 -1 1 +$abc$733$n166 403 NOR2X1_17 B 18081 5800 4 1 1 +$abc$733$n166 403 OAI21X1_19 A 18001 5800 4 -1 1 +$abc$733$n166 403 OR2X2_1 Y 17441 5800 4 -1 1 +$abc$733$n167 405 XOR2X1_1 twfeed2 17761 3800 3 -1 1 +$abc$733$n167 404 XOR2X1_1 twfeed2 17761 1800 2 1 1 +$abc$733$n167 405 OAI21X1_19 C 17681 3800 3 1 1 +$abc$733$n167 404 OAI21X1_18 Y 17251 1800 2 1 1 +$abc$733$n168 407 NAND2X1_10 twfeed3 18241 5800 4 -1 1 +$abc$733$n168 406 NAND2X1_10 twfeed3 18241 3800 3 1 1 +$abc$733$n168 406 NAND2X1_10 B 18241 3800 3 1 1 +$abc$733$n168 407 OAI21X1_19 Y 17791 5800 4 -1 1 +$abc$733$n169 409 NAND2X1_10 twfeed2 18401 5800 4 -1 1 +$abc$733$n169 408 NAND2X1_10 twfeed2 18401 3800 3 1 1 +$abc$733$n169 408 OAI21X1_20 C 18801 3800 3 1 1 +$abc$733$n169 409 NAND2X1_10 Y 18301 5800 4 -1 1 +counter<3>_FF_INPUT 410 DFFSR_19 D 14241 5800 4 -1 1 +counter<3>_FF_INPUT 410 OAI21X1_20 Y 18911 5800 4 -1 1 +N<5> 416 DFFSR_21 twfeed21 22561 5800 4 -1 1 +N<5> 411 DFFSR_21 twfeed21 22561 3800 3 1 1 +N<5> 418 BUFX2_15 twfeed3 22401 15800 9 -1 1 +N<5> 412 BUFX2_15 twfeed3 22401 13800 8 1 1 +N<5> 412 DFFSR_7 twfeed17 22241 13800 8 -1 1 +N<5> 413 DFFSR_7 twfeed17 22241 11800 7 1 1 +N<5> 413 DFFSR_20 twfeed15 22241 11800 7 -1 1 +N<5> 414 DFFSR_20 twfeed15 22241 9800 6 1 1 +N<5> 414 INVX1_27 twfeed1 22241 9800 6 -1 1 +N<5> 415 INVX1_27 twfeed1 22241 7800 5 1 1 +N<5> 415 OAI21X1_21 twfeed3 22241 7800 5 -1 1 +N<5> 416 OAI21X1_21 twfeed3 22241 5800 4 1 1 +N<5> 411 INVX1_25 twfeed1 22561 3800 3 -1 1 +N<5> 417 INVX1_25 twfeed1 22561 1800 2 1 1 +N<5> 418 twpin_N<5> N<5> 24061 14260 -2 1 1 +N<5> 418 PSEUDO_CELL PSEUDO_PIN 23281 14800 9 2 0 +N<5> 418 PSEUDO_CELL PSEUDO_PIN 23281 14800 -2 -1 0 +N<5> 412 NOR2X1_21 A 21921 13800 8 1 1 +N<5> 418 OR2X2_2 A 23041 15800 9 -1 1 +N<5> 416 OAI21X1_22 A 22961 5800 4 -1 1 +N<5> 416 OAI21X1_21 A 22481 5800 4 1 1 +N<5> 417 INVX1_25 A 22561 1800 2 1 1 +$abc$733$n171 419 AOI21X1_10 C 22241 1800 2 1 1 +$abc$733$n171 419 INVX1_25 Y 22401 1800 2 1 1 +$abc$733$n172 420 NAND3X1_4 B 22921 1800 2 1 1 +$abc$733$n172 420 AOI21X1_10 A 21841 1800 2 1 1 +$abc$733$n172 420 NOR2X1_16 Y 22881 1800 2 -1 1 +$abc$733$n173 423 DFFSR_21 twfeed17 21921 5800 4 -1 1 +$abc$733$n173 421 DFFSR_21 twfeed17 21921 3800 3 1 1 +$abc$733$n173 421 AOI21X1_10 twfeed2 21921 3800 3 -1 1 +$abc$733$n173 422 AOI21X1_10 twfeed2 21921 1800 2 1 1 +$abc$733$n173 423 OAI22X1_1 A 21841 5800 4 1 1 +$abc$733$n173 422 AOI21X1_10 Y 22081 1800 2 1 1 +$abc$733$n174 424 OAI22X1_1 B 21761 5800 4 1 1 +$abc$733$n174 424 OAI21X1_21 Y 22271 5800 4 1 1 +$abc$733$n175 425 AOI21X1_11 A 18641 5800 4 1 1 +$abc$733$n175 425 AOI22X1_1 A 17841 5800 4 1 1 +$abc$733$n175 425 NOR2X1_17 Y 18241 5800 4 1 1 +$abc$733$n176 426 AOI22X1_1 D 17461 5800 4 1 1 +$abc$733$n176 426 NAND2X1_11 Y 17061 5800 4 1 1 +$abc$733$n177 427 OAI22X1_1 D 21441 5800 4 1 1 +$abc$733$n177 427 AOI22X1_1 Y 17591 5800 4 1 1 +counter<4>_FF_INPUT 430 NAND3X1_6 twfeed2 21601 9800 6 -1 1 +counter<4>_FF_INPUT 428 NAND3X1_6 twfeed2 21601 7800 5 1 1 +counter<4>_FF_INPUT 428 OAI22X1_1 twfeed3 21601 7800 5 -1 1 +counter<4>_FF_INPUT 429 OAI22X1_1 twfeed3 21601 5800 4 1 1 +counter<4>_FF_INPUT 430 DFFSR_20 D 21281 9800 6 1 1 +counter<4>_FF_INPUT 429 OAI22X1_1 Y 21601 5800 4 1 1 +N<6> 437 OAI21X1_22 twfeed4 23361 5800 4 -1 1 +N<6> 431 OAI21X1_22 twfeed4 23361 3800 3 1 1 +N<6> 438 OR2X2_2 twfeed3 22721 15800 9 -1 1 +N<6> 432 OR2X2_2 twfeed3 22721 13800 8 1 1 +N<6> 438 OR2X2_2 twfeed1 23041 15800 9 -1 1 +N<6> 433 OR2X2_2 twfeed1 23041 13800 8 1 1 +N<6> 433 DFFSR_7 twfeed22 23041 13800 8 -1 1 +N<6> 434 DFFSR_7 twfeed22 23041 11800 7 1 1 +N<6> 434 DFFSR_20 twfeed20 23041 11800 7 -1 1 +N<6> 435 DFFSR_20 twfeed20 23041 9800 6 1 1 +N<6> 435 OAI21X1_28 twfeed3 23361 9800 6 -1 1 +N<6> 436 OAI21X1_28 twfeed3 23361 7800 5 1 1 +N<6> 436 OAI21X1_23 twfeed3 23361 7800 5 -1 1 +N<6> 437 OAI21X1_23 twfeed3 23361 5800 4 1 1 +N<6> 437 twpin_N<6> N<6> 24061 4800 -2 1 1 +N<6> 437 PSEUDO_CELL PSEUDO_PIN 23441 4800 4 2 0 +N<6> 437 PSEUDO_CELL PSEUDO_PIN 23441 4800 -2 -1 0 +N<6> 432 NOR2X1_21 B 21601 13800 8 1 1 +N<6> 438 OR2X2_2 B 22841 15800 9 -1 1 +N<6> 431 OAI21X1_22 C 23281 3800 3 1 1 +$abc$733$n179 440 OAI21X1_23 twfeed4 23201 7800 5 -1 1 +$abc$733$n179 439 OAI21X1_23 twfeed4 23201 5800 4 1 1 +$abc$733$n179 440 OAI21X1_23 C 23281 7800 5 -1 1 +$abc$733$n179 439 OAI21X1_22 Y 23171 5800 4 -1 1 +$abc$733$n180 446 OR2X2_2 twfeed4 22561 15800 9 -1 1 +$abc$733$n180 441 OR2X2_2 twfeed4 22561 13800 8 1 1 +$abc$733$n180 441 DFFSR_7 twfeed19 22561 13800 8 -1 1 +$abc$733$n180 442 DFFSR_7 twfeed19 22561 11800 7 1 1 +$abc$733$n180 442 DFFSR_20 twfeed17 22561 11800 7 -1 1 +$abc$733$n180 443 DFFSR_20 twfeed17 22561 9800 6 1 1 +$abc$733$n180 443 OAI21X1_26 twfeed3 22561 9800 6 -1 1 +$abc$733$n180 444 OAI21X1_26 twfeed3 22561 7800 5 1 1 +$abc$733$n180 444 OAI21X1_21 twfeed1 22561 7800 5 -1 1 +$abc$733$n180 445 OAI21X1_21 twfeed1 22561 5800 4 1 1 +$abc$733$n180 445 NOR2X1_19 A 23041 5800 4 1 1 +$abc$733$n180 445 OAI21X1_23 B 23521 5800 4 1 1 +$abc$733$n180 446 OR2X2_2 Y 22561 15800 9 -1 1 +$abc$733$n181 447 OAI21X1_25 B 20961 5800 4 1 1 +$abc$733$n181 447 OAI21X1_23 Y 23391 5800 4 1 1 +$abc$733$n182 448 AND2X2_6 A 13601 5800 4 1 1 +$abc$733$n182 448 OAI21X1_24 A 20081 5800 4 1 1 +$abc$733$n182 448 NOR2X1_18 Y 15361 5800 4 1 1 +$abc$733$n183 449 AOI21X1_11 C 19041 5800 4 1 1 +$abc$733$n183 449 INVX1_26 Y 19201 5800 4 1 1 +$abc$733$n184 450 OAI21X1_24 B 20161 5800 4 1 1 +$abc$733$n184 450 AOI21X1_11 Y 18881 5800 4 1 1 +$abc$733$n185 452 OAI21X1_25 twfeed4 20641 7800 5 -1 1 +$abc$733$n185 451 OAI21X1_25 twfeed4 20641 5800 4 1 1 +$abc$733$n185 452 OAI21X1_25 C 20721 7800 5 -1 1 +$abc$733$n185 451 OAI21X1_24 Y 20291 5800 4 1 1 +counter<5>_FF_INPUT 453 DFFSR_21 D 20641 5800 4 -1 1 +counter<5>_FF_INPUT 453 OAI21X1_25 Y 20831 5800 4 1 1 +N<7> 454 twpin_N<7> N<7> 24061 9130 -2 1 1 +N<7> 454 PSEUDO_CELL PSEUDO_PIN 23441 8800 6 2 0 +N<7> 454 PSEUDO_CELL PSEUDO_PIN 23441 8800 -2 -1 0 +N<7> 454 OAI21X1_28 A 23121 9800 6 -1 1 +N<7> 454 OAI21X1_26 A 22801 9800 6 -1 1 +N<7> 454 INVX1_27 A 22241 9800 6 -1 1 +$abc$733$n187 456 NAND3X1_6 twfeed1 21441 9800 6 -1 1 +$abc$733$n187 455 NAND3X1_6 twfeed1 21441 7800 5 1 1 +$abc$733$n187 455 NAND3X1_6 A 21441 7800 5 1 1 +$abc$733$n187 456 NOR2X1_20 A 20961 9800 6 -1 1 +$abc$733$n187 456 INVX1_27 Y 22081 9800 6 -1 1 +$abc$733$n188 459 NOR2X1_20 twfeed3 21281 9800 6 -1 1 +$abc$733$n188 457 NOR2X1_20 twfeed3 21281 7800 5 1 1 +$abc$733$n188 457 NOR2X1_19 twfeed2 22881 7800 5 -1 1 +$abc$733$n188 458 NOR2X1_19 twfeed2 22881 5800 4 1 1 +$abc$733$n188 457 NAND3X1_6 C 21761 7800 5 1 1 +$abc$733$n188 459 NOR2X1_20 B 21281 9800 6 -1 1 +$abc$733$n188 458 NOR2X1_19 Y 22881 5800 4 1 1 +$abc$733$n189 460 OAI22X1_2 A 20081 9800 6 -1 1 +$abc$733$n189 460 NOR2X1_20 Y 21121 9800 6 -1 1 +$abc$733$n190 466 DFFSR_7 twfeed14 21761 13800 8 -1 1 +$abc$733$n190 461 DFFSR_7 twfeed14 21761 11800 7 1 1 +$abc$733$n190 461 DFFSR_20 twfeed12 21761 11800 7 -1 1 +$abc$733$n190 462 DFFSR_20 twfeed12 21761 9800 6 1 1 +$abc$733$n190 462 NAND3X1_6 twfeed3 21761 9800 6 -1 1 +$abc$733$n190 463 NAND3X1_6 twfeed3 21761 7800 5 1 1 +$abc$733$n190 463 OAI22X1_1 twfeed2 21761 7800 5 -1 1 +$abc$733$n190 464 OAI22X1_1 twfeed2 21761 5800 4 1 1 +$abc$733$n190 464 DFFSR_21 twfeed16 21761 5800 4 -1 1 +$abc$733$n190 465 DFFSR_21 twfeed16 21761 3800 3 1 1 +$abc$733$n190 465 NAND3X1_4 C 23041 3800 3 -1 1 +$abc$733$n190 466 NOR2X1_21 Y 21761 13800 8 1 1 +$abc$733$n191 470 OAI21X1_26 twfeed2 22721 9800 6 -1 1 +$abc$733$n191 467 OAI21X1_26 twfeed2 22721 7800 5 1 1 +$abc$733$n191 467 NOR2X1_19 twfeed3 22721 7800 5 -1 1 +$abc$733$n191 468 NOR2X1_19 twfeed3 22721 5800 4 1 1 +$abc$733$n191 468 DFFSR_21 twfeed22 22721 5800 4 -1 1 +$abc$733$n191 469 DFFSR_21 twfeed22 22721 3800 3 1 1 +$abc$733$n191 470 OAI21X1_28 B 23201 9800 6 -1 1 +$abc$733$n191 470 OAI21X1_26 B 22721 9800 6 -1 1 +$abc$733$n191 469 NAND3X1_4 Y 22881 3800 3 -1 1 +$abc$733$n192 471 OAI22X1_2 B 20001 9800 6 -1 1 +$abc$733$n192 471 OAI21X1_26 Y 22591 9800 6 -1 1 +$abc$733$n193 472 NAND3X1_5 A 17121 7800 5 1 1 +$abc$733$n193 472 INVX1_28 Y 17281 7800 5 1 1 +$abc$733$n194 474 NAND2X1_11 twfeed1 16801 7800 5 -1 1 +$abc$733$n194 473 NAND2X1_11 twfeed1 16801 5800 4 1 1 +$abc$733$n194 474 NAND3X1_5 C 16801 7800 5 1 1 +$abc$733$n194 473 AND2X2_3 Y 16580 5800 4 1 1 +$abc$733$n195 477 NAND3X1_5 twfeed2 16961 9800 6 -1 1 +$abc$733$n195 475 NAND3X1_5 twfeed2 16961 7800 5 1 1 +$abc$733$n195 476 NOR2X1_3 twfeed1 16161 9800 6 -1 1 +$abc$733$n195 475 NOR2X1_3 twfeed1 16161 7800 5 1 1 +$abc$733$n195 476 AOI22X1_2 D 16141 9800 6 1 1 +$abc$733$n195 477 AND2X2_4 A 18241 9800 6 -1 1 +$abc$733$n195 475 NAND3X1_5 Y 16961 7800 5 1 1 +$abc$733$n196 478 AND2X2_4 B 18401 9800 6 -1 1 +$abc$733$n196 478 OAI21X1_27 Y 17891 9800 6 -1 1 +$abc$733$n197 479 OAI22X1_2 D 19681 9800 6 -1 1 +$abc$733$n197 479 AND2X2_4 Y 18660 9800 6 -1 1 +counter<6>_FF_INPUT 480 DFFSR_22 D 18561 9800 6 1 1 +counter<6>_FF_INPUT 480 OAI22X1_2 Y 19841 9800 6 -1 1 +N<8> 484 OAI21X1_28 twfeed4 23521 9800 6 -1 1 +N<8> 481 OAI21X1_28 twfeed4 23521 7800 5 1 1 +N<8> 485 INVX1_29 twfeed1 23361 15800 9 -1 1 +N<8> 482 INVX1_29 twfeed1 23361 13800 8 1 1 +N<8> 482 INVX1_4 twfeed1 23361 13800 8 -1 1 +N<8> 483 INVX1_4 twfeed1 23361 11800 7 1 1 +N<8> 483 DFFSR_20 twfeed22 23361 11800 7 -1 1 +N<8> 484 DFFSR_20 twfeed22 23361 9800 6 1 1 +N<8> 481 twpin_N<8> N<8> 24061 8800 -2 1 1 +N<8> 481 PSEUDO_CELL PSEUDO_PIN 23601 6800 5 2 0 +N<8> 481 PSEUDO_CELL PSEUDO_PIN 23601 6800 -2 -1 0 +N<8> 485 INVX1_29 A 23361 15800 9 -1 1 +N<8> 481 OAI21X1_28 C 23441 7800 5 1 1 +$abc$733$n199 486 NAND3X1_7 B 20521 9800 6 -1 1 +$abc$733$n199 486 OAI21X1_28 Y 23331 9800 6 -1 1 +$abc$733$n200 489 INVX1_4 twfeed2 23201 13800 8 -1 1 +$abc$733$n200 487 INVX1_4 twfeed2 23201 11800 7 1 1 +$abc$733$n200 487 DFFSR_20 twfeed21 23201 11800 7 -1 1 +$abc$733$n200 488 DFFSR_20 twfeed21 23201 9800 6 1 1 +$abc$733$n200 488 NAND3X1_6 B 21641 9800 6 -1 1 +$abc$733$n200 489 INVX1_29 Y 23201 13800 8 1 1 +$abc$733$n201 490 NAND3X1_7 C 20641 7800 5 1 1 +$abc$733$n201 490 NAND3X1_6 Y 21601 7800 5 1 1 +$abc$733$n202 491 OAI21X1_29 C 19281 7800 5 1 1 +$abc$733$n202 491 NAND3X1_7 Y 20481 7800 5 1 1 +$abc$733$n203 492 OAI21X1_29 B 19041 9800 6 -1 1 +$abc$733$n203 492 AOI22X1_2 Y 16011 9800 6 1 1 +counter<7>_FF_INPUT 495 AOI21X1_1 twfeed3 19201 13800 8 -1 1 +counter<7>_FF_INPUT 493 AOI21X1_1 twfeed3 19201 11800 7 1 1 +counter<7>_FF_INPUT 493 DFFSR_22 twfeed5 19201 11800 7 -1 1 +counter<7>_FF_INPUT 494 DFFSR_22 twfeed5 19201 9800 6 1 1 +counter<7>_FF_INPUT 495 DFFSR_23 D 18721 13800 8 1 1 +counter<7>_FF_INPUT 494 OAI21X1_29 Y 19171 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$882 497 DFFSR_15 twfeed21 7041 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$882 496 DFFSR_15 twfeed21 7041 -200 1 1 1 +$auto$iopadmap.cc:313:execute$882 496 DFFSR_15 Q 7041 -200 1 1 1 +$auto$iopadmap.cc:313:execute$882 497 BUFX2_19 A 7681 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$882 497 INVX1_30 A 7841 1800 2 -1 1 +$abc$733$n205 498 AOI21X1_12 B 8321 1800 2 -1 1 +$abc$733$n205 498 INVX1_30 Y 8001 1800 2 -1 1 +$abc$733$n206 499 NAND3X1_8 C 8961 -200 1 1 1 +$abc$733$n206 499 INVX1_31 Y 9441 -200 1 1 1 +$abc$733$n207 501 NAND3X1_8 twfeed2 9121 1800 2 -1 1 +$abc$733$n207 500 NAND3X1_8 twfeed2 9121 -200 1 1 1 +$abc$733$n207 501 AOI21X1_12 A 8241 1800 2 -1 1 +$abc$733$n207 500 NAND3X1_8 Y 9121 -200 1 1 1 +done_FF_INPUT 502 DFFSR_15 D 5121 1800 2 -1 1 +done_FF_INPUT 502 AOI21X1_12 Y 8481 1800 2 -1 1 +$abc$733$n209 503 AOI21X1_13 C 7041 9800 6 -1 1 +$abc$733$n209 503 OAI21X1_30 Y 7391 9800 6 -1 1 +sr<1>_FF_INPUT 504 DFFSR_25 D 4481 9800 6 -1 1 +sr<1>_FF_INPUT 504 AOI21X1_13 Y 6881 9800 6 -1 1 +$abc$546$n149 505 DFFSR_1 D 7041 1800 2 1 1 +$abc$546$n149 505 AND2X2_5 Y 5540 1800 2 1 1 +$abc$546$n150 508 OAI21X1_15 twfeed3 11681 5800 4 -1 1 +$abc$546$n150 506 OAI21X1_15 twfeed3 11681 3800 3 1 1 +$abc$546$n150 506 DFFSR_3 twfeed9 11681 3800 3 -1 1 +$abc$546$n150 507 DFFSR_3 twfeed9 11681 1800 2 1 1 +$abc$546$n150 507 DFFSR_3 D 11681 1800 2 1 1 +$abc$546$n150 508 AND2X2_6 Y 13182 5800 4 1 1 +reset 509 twpin_reset reset 4481 18100 -4 1 1 +reset 509 PSEUDO_CELL PSEUDO_PIN 4481 17801 10 1 0 +reset 509 PSEUDO_CELL PSEUDO_PIN 4481 17801 -4 -1 0 +reset 509 INVX8_2 A 4481 17800 10 -1 1 +counter<0> 510 twpin_counter<0> counter<0> 13611 -500 -3 -1 1 +counter<0> 510 PSEUDO_CELL PSEUDO_PIN 13611 -201 1 -1 0 +counter<0> 510 PSEUDO_CELL PSEUDO_PIN 13611 -201 -3 1 0 +counter<0> 510 BUFX2_11 Y 13611 -200 1 1 1 +counter<1> 511 twpin_counter<1> counter<1> 14091 -500 -3 -1 1 +counter<1> 511 PSEUDO_CELL PSEUDO_PIN 14091 -201 1 -1 0 +counter<1> 511 PSEUDO_CELL PSEUDO_PIN 14091 -201 -3 1 0 +counter<1> 511 BUFX2_12 Y 14091 -200 1 1 1 +counter<2> 512 twpin_counter<2> counter<2> 18571 -500 -3 -1 1 +counter<2> 512 PSEUDO_CELL PSEUDO_PIN 18571 -201 1 -1 0 +counter<2> 512 PSEUDO_CELL PSEUDO_PIN 18571 -201 -3 1 0 +counter<2> 512 BUFX2_13 Y 18571 -200 1 1 1 +counter<3> 513 twpin_counter<3> counter<3> 19051 -500 -3 -1 1 +counter<3> 513 PSEUDO_CELL PSEUDO_PIN 19051 -201 1 -1 0 +counter<3> 513 PSEUDO_CELL PSEUDO_PIN 19051 -201 -3 1 0 +counter<3> 513 BUFX2_14 Y 19051 -200 1 1 1 +counter<4> 514 twpin_counter<4> counter<4> 24061 14800 -2 1 1 +counter<4> 514 PSEUDO_CELL PSEUDO_PIN 23441 12800 8 2 0 +counter<4> 514 PSEUDO_CELL PSEUDO_PIN 23441 12800 -2 -1 0 +counter<4> 514 BUFX2_15 Y 22411 13800 8 1 1 +counter<5> 515 twpin_counter<5> counter<5> 24061 800 -2 1 1 +counter<5> 515 PSEUDO_CELL PSEUDO_PIN 23281 800 2 2 0 +counter<5> 515 PSEUDO_CELL PSEUDO_PIN 23281 800 -2 -1 0 +counter<5> 515 BUFX2_16 Y 23531 1800 2 -1 1 +counter<6> 517 DFFSR_11 twfeed15 16481 17800 10 -1 1 +counter<6> 516 DFFSR_11 twfeed15 16481 15800 9 1 1 +counter<6> 517 twpin_counter<6> counter<6> 16481 18100 -4 1 1 +counter<6> 517 PSEUDO_CELL PSEUDO_PIN 16481 17801 10 1 0 +counter<6> 517 PSEUDO_CELL PSEUDO_PIN 16481 17801 -4 -1 0 +counter<6> 516 BUFX2_17 Y 16491 15800 9 -1 1 +counter<7> 518 twpin_counter<7> counter<7> 15211 18100 -4 1 1 +counter<7> 518 PSEUDO_CELL PSEUDO_PIN 15211 17801 10 1 0 +counter<7> 518 PSEUDO_CELL PSEUDO_PIN 15211 17801 -4 -1 0 +counter<7> 518 BUFX2_18 Y 15211 17800 10 -1 1 +done 519 twpin_done done 7351 -500 -3 -1 1 +done 519 PSEUDO_CELL PSEUDO_PIN 7351 -201 1 -1 0 +done 519 PSEUDO_CELL PSEUDO_PIN 7351 -201 -3 1 0 +done 519 BUFX2_19 Y 7351 -200 1 1 1 +dp<0> 520 twpin_dp<0> dp<0> 22731 18100 -4 1 1 +dp<0> 520 PSEUDO_CELL PSEUDO_PIN 22731 17801 10 1 0 +dp<0> 520 PSEUDO_CELL PSEUDO_PIN 22731 17801 -4 -1 0 +dp<0> 520 BUFX2_20 Y 22731 17800 10 -1 1 +dp<1> 521 twpin_dp<1> dp<1> 24061 16800 -2 1 1 +dp<1> 521 PSEUDO_CELL PSEUDO_PIN 23281 18800 10 2 0 +dp<1> 521 PSEUDO_CELL PSEUDO_PIN 23281 18800 -2 -1 0 +dp<1> 521 BUFX2_21 Y 23211 17800 10 -1 1 +dp<2> 522 twpin_dp<2> dp<2> -539 8800 -1 1 1 +dp<2> 522 PSEUDO_CELL PSEUDO_PIN -239 6800 5 -2 0 +dp<2> 522 PSEUDO_CELL PSEUDO_PIN -239 6800 -1 -1 0 +dp<2> 522 BUFX2_22 Y -169 7800 5 1 1 +dp<3> 523 twpin_dp<3> dp<3> -539 14800 -1 1 1 +dp<3> 523 PSEUDO_CELL PSEUDO_PIN -239 14800 9 -2 0 +dp<3> 523 PSEUDO_CELL PSEUDO_PIN -239 14800 -1 -1 0 +dp<3> 523 BUFX2_23 Y -169 15800 9 -1 1 +dp<4> 524 twpin_dp<4> dp<4> 10091 18100 -4 1 1 +dp<4> 524 PSEUDO_CELL PSEUDO_PIN 10091 17801 10 1 0 +dp<4> 524 PSEUDO_CELL PSEUDO_PIN 10091 17801 -4 -1 0 +dp<4> 524 BUFX2_24 Y 10091 17800 10 -1 1 +dp<5> 525 twpin_dp<5> dp<5> 14071 18100 -4 1 1 +dp<5> 525 PSEUDO_CELL PSEUDO_PIN 14071 17801 10 1 0 +dp<5> 525 PSEUDO_CELL PSEUDO_PIN 14071 17801 -4 -1 0 +dp<5> 525 BUFX2_25 Y 14071 17800 10 -1 1 +dp<6> 526 twpin_dp<6> dp<6> -539 12800 -1 1 1 +dp<6> 526 PSEUDO_CELL PSEUDO_PIN -239 12800 8 -2 0 +dp<6> 526 PSEUDO_CELL PSEUDO_PIN -239 12800 -1 -1 0 +dp<6> 526 BUFX2_26 Y -169 13800 8 -1 1 +dp<7> 527 twpin_dp<7> dp<7> -539 6800 -1 1 1 +dp<7> 527 PSEUDO_CELL PSEUDO_PIN -239 4800 4 -2 0 +dp<7> 527 PSEUDO_CELL PSEUDO_PIN -239 4800 -1 -1 0 +dp<7> 527 BUFX2_27 Y -169 5800 4 1 1 +dp<8> 528 twpin_dp<8> dp<8> 3991 18100 -4 1 1 +dp<8> 528 PSEUDO_CELL PSEUDO_PIN 3991 17801 10 1 0 +dp<8> 528 PSEUDO_CELL PSEUDO_PIN 3991 17801 -4 -1 0 +dp<8> 528 BUFX2_28 Y 3991 17800 10 -1 1 +sr<0> 530 DFFSR_11 twfeed18 16001 17800 10 -1 1 +sr<0> 529 DFFSR_11 twfeed18 16001 15800 9 1 1 +sr<0> 530 twpin_sr<0> sr<0> 16001 18100 -4 1 1 +sr<0> 530 PSEUDO_CELL PSEUDO_PIN 16001 17801 10 1 0 +sr<0> 530 PSEUDO_CELL PSEUDO_PIN 16001 17801 -4 -1 0 +sr<0> 529 BUFX2_29 Y 16011 15800 9 -1 1 +sr<1> 531 twpin_sr<1> sr<1> -539 8960 -1 1 1 +sr<1> 531 PSEUDO_CELL PSEUDO_PIN -239 6800 5 -2 0 +sr<1> 531 PSEUDO_CELL PSEUDO_PIN -239 6800 -1 -1 0 +sr<1> 531 BUFX2_30 Y 311 7800 5 1 1 +sr<2> 533 DFFSR_27 twfeed22 8641 17800 10 -1 1 +sr<2> 532 DFFSR_27 twfeed22 8641 15800 9 1 1 +sr<2> 533 twpin_sr<2> sr<2> 8641 18100 -4 1 1 +sr<2> 533 PSEUDO_CELL PSEUDO_PIN 8641 17801 10 1 0 +sr<2> 533 PSEUDO_CELL PSEUDO_PIN 8641 17801 -4 -1 0 +sr<2> 532 BUFX2_31 Y 8651 15800 9 -1 1 +sr<3> 534 twpin_sr<3> sr<3> 9281 18100 -4 1 1 +sr<3> 534 PSEUDO_CELL PSEUDO_PIN 9271 17801 10 1 0 +sr<3> 534 PSEUDO_CELL PSEUDO_PIN 9271 17801 -4 -1 0 +sr<3> 534 BUFX2_32 Y 9271 17800 10 -1 1 +sr<4> 536 DFFSR_10 twfeed5 13281 17800 10 -1 1 +sr<4> 535 DFFSR_10 twfeed5 13281 15800 9 1 1 +sr<4> 536 twpin_sr<4> sr<4> 13281 18100 -4 1 1 +sr<4> 536 PSEUDO_CELL PSEUDO_PIN 13281 17801 10 1 0 +sr<4> 536 PSEUDO_CELL PSEUDO_PIN 13281 17801 -4 -1 0 +sr<4> 535 BUFX2_33 Y 13431 15800 9 -1 1 +sr<5> 538 DFFSR_27 twfeed17 7841 17800 10 -1 1 +sr<5> 537 DFFSR_27 twfeed17 7841 15800 9 1 1 +sr<5> 538 twpin_sr<5> sr<5> 7841 18100 -4 1 1 +sr<5> 538 PSEUDO_CELL PSEUDO_PIN 7841 17801 10 1 0 +sr<5> 538 PSEUDO_CELL PSEUDO_PIN 7841 17801 -4 -1 0 +sr<5> 537 BUFX2_34 Y 7831 15800 9 -1 1 +sr<6> 539 twpin_sr<6> sr<6> 3691 -500 -3 -1 1 +sr<6> 539 PSEUDO_CELL PSEUDO_PIN 3691 -201 1 -1 0 +sr<6> 539 PSEUDO_CELL PSEUDO_PIN 3691 -201 -3 1 0 +sr<6> 539 BUFX2_35 Y 3691 -200 1 1 1 +sr<7> 541 DFFSR_27 twfeed16 7681 17800 10 -1 1 +sr<7> 540 DFFSR_27 twfeed16 7681 15800 9 1 1 +sr<7> 541 twpin_sr<7> sr<7> 7681 18100 -4 1 1 +sr<7> 541 PSEUDO_CELL PSEUDO_PIN 7681 17801 10 1 0 +sr<7> 541 PSEUDO_CELL PSEUDO_PIN 7681 17801 -4 -1 0 +sr<7> 540 BUFX2_36 Y 7691 15800 9 -1 1 +vdd 583 DFFSR_2 twfeed6 3201 3800 3 -1 1 +vdd 542 DFFSR_2 twfeed6 3201 1800 2 1 1 +vdd 584 DFFSR_3 twfeed4 12481 3800 3 -1 1 +vdd 543 DFFSR_3 twfeed4 12481 1800 2 1 1 +vdd 579 DFFSR_14 twfeed6 2401 15800 9 -1 1 +vdd 544 DFFSR_14 twfeed6 2401 13800 8 1 1 +vdd 555 DFFSR_8 twfeed2 3041 11800 7 -1 1 +vdd 545 DFFSR_8 twfeed2 3041 9800 6 1 1 +vdd 567 DFFSR_17 twfeed7 15521 3800 3 -1 1 +vdd 546 DFFSR_17 twfeed7 15521 1800 2 1 1 +vdd 568 DFFSR_17 twfeed19 13601 3800 3 -1 1 +vdd 543 DFFSR_17 twfeed19 13601 1800 2 1 1 +vdd 550 AOI21X1_1 twfeed1 19521 13800 8 -1 1 +vdd 547 AOI21X1_1 twfeed1 19521 11800 7 1 1 +vdd 559 DFFSR_25 twfeed1 5761 9800 6 -1 1 +vdd 548 DFFSR_25 twfeed1 5761 7800 5 1 1 +vdd 553 DFFSR_26 twfeed5 5761 13800 8 -1 1 +vdd 549 DFFSR_26 twfeed5 5761 11800 7 1 1 +vdd 558 BUFX4_3 twfeed1 8961 9800 6 -1 1 +vdd 548 BUFX4_3 twfeed1 8961 7800 5 1 1 +vdd 575 INVX1_2 twfeed1 4161 3800 3 -1 1 +vdd 542 INVX1_2 twfeed1 4161 1800 2 1 1 +vdd 544 INVX1_13 twfeed2 4001 13800 8 -1 1 +vdd 549 INVX1_13 twfeed2 4001 11800 7 1 1 +vdd 581 DFFSR_23 twfeed4 19521 15800 9 -1 1 +vdd 550 DFFSR_23 twfeed4 19521 13800 8 1 1 +vdd 577 DFFSR_23 twfeed13 18081 15800 9 -1 1 +vdd 551 DFFSR_23 twfeed13 18081 13800 8 1 1 +vdd 578 NOR2X1_10 twfeed3 13281 15800 9 -1 1 +vdd 552 NOR2X1_10 twfeed3 13281 13800 8 1 1 +vdd 576 MUX2X1_7 twfeed2 6081 15800 9 -1 1 +vdd 553 MUX2X1_7 twfeed2 6081 13800 8 1 1 +vdd 551 AOI21X1_1 twfeed4 19041 13800 8 -1 1 +vdd 547 AOI21X1_1 twfeed4 19041 11800 7 1 1 +vdd 551 DFFSR_28 twfeed3 18081 13800 8 -1 1 +vdd 554 DFFSR_28 twfeed3 18081 11800 7 1 1 +vdd 552 BUFX4_6 twfeed2 13281 13800 8 -1 1 +vdd 554 BUFX4_6 twfeed2 13281 11800 7 1 1 +vdd 544 DFFSR_12 twfeed8 2561 13800 8 -1 1 +vdd 555 DFFSR_12 twfeed8 2561 11800 7 1 1 +vdd 580 DFFSR_20 twfeed2 20161 11800 7 -1 1 +vdd 556 DFFSR_20 twfeed2 20161 9800 6 1 1 +vdd 554 DFFSR_22 twfeed14 17761 11800 7 -1 1 +vdd 556 DFFSR_22 twfeed14 17761 9800 6 1 1 +vdd 554 BUFX2_1 twfeed2 13601 11800 7 -1 1 +vdd 557 BUFX2_1 twfeed2 13601 9800 6 1 1 +vdd 554 DFFSR_24 twfeed6 10081 11800 7 -1 1 +vdd 558 DFFSR_24 twfeed6 10081 9800 6 1 1 +vdd 549 DFFSR_31 twfeed16 5761 11800 7 -1 1 +vdd 559 DFFSR_31 twfeed16 5761 9800 6 1 1 +vdd 556 OAI22X1_2 twfeed2 20001 9800 6 -1 1 +vdd 560 OAI22X1_2 twfeed2 20001 7800 5 1 1 +vdd 557 DFFSR_4 twfeed16 13601 9800 6 -1 1 +vdd 561 DFFSR_4 twfeed16 13601 7800 5 1 1 +vdd 545 DFFSR_25 twfeed18 3041 9800 6 -1 1 +vdd 562 DFFSR_25 twfeed18 3041 7800 5 1 1 +vdd 560 OAI21X1_24 twfeed1 20001 7800 5 -1 1 +vdd 563 OAI21X1_24 twfeed1 20001 5800 4 1 1 +vdd 582 NOR2X1_18 twfeed1 15201 7800 5 -1 1 +vdd 564 NOR2X1_18 twfeed1 15201 5800 4 1 1 +vdd 561 AND2X2_6 twfeed1 13601 7800 5 -1 1 +vdd 564 AND2X2_6 twfeed1 13601 5800 4 1 1 +vdd 548 OAI21X1_11 twfeed4 5601 7800 5 -1 1 +vdd 565 OAI21X1_11 twfeed4 5601 5800 4 1 1 +vdd 563 DFFSR_21 twfeed5 20001 5800 4 -1 1 +vdd 566 DFFSR_21 twfeed5 20001 3800 3 1 1 +vdd 564 DFFSR_19 twfeed15 15201 5800 4 -1 1 +vdd 567 DFFSR_19 twfeed15 15201 3800 3 1 1 +vdd 564 DFFSR_19 twfeed5 13601 5800 4 -1 1 +vdd 568 DFFSR_19 twfeed5 13601 3800 3 1 1 +vdd 565 DFFSR_16 twfeed10 6401 5800 4 -1 1 +vdd 569 DFFSR_16 twfeed10 6401 3800 3 1 1 +vdd 565 DFFSR_16 twfeed5 5601 5800 4 -1 1 +vdd 570 DFFSR_16 twfeed5 5601 3800 3 1 1 +vdd 569 DFFSR_1 twfeed5 6401 3800 3 -1 1 +vdd 542 DFFSR_1 twfeed5 6401 1800 2 1 1 +vdd 546 DFFSR_18 twfeed5 15361 1800 2 -1 1 +vdd 571 DFFSR_18 twfeed5 15361 -200 1 1 1 +vdd 543 DFFSR_5 twfeed5 12481 1800 2 -1 1 +vdd 572 DFFSR_5 twfeed5 12481 -200 1 1 1 +vdd 542 DFFSR_15 twfeed3 4161 1800 2 -1 1 +vdd 573 DFFSR_15 twfeed3 4161 -200 1 1 1 +vdd 542 DFFSR_32 twfeed1 3201 1800 2 -1 1 +vdd 574 DFFSR_32 twfeed1 3201 -200 1 1 1 +vdd 574 DFFSR_32 S 2541 -200 1 1 1 +vdd 549 DFFSR_31 S 4021 11800 7 -1 1 +vdd 575 DFFSR_30 S 4141 3800 3 1 1 +vdd 548 DFFSR_29 S 9101 7800 5 -1 1 +vdd 554 DFFSR_28 S 17741 11800 7 1 1 +vdd 576 DFFSR_27 S 5941 15800 9 1 1 +vdd 549 DFFSR_26 S 5781 11800 7 1 1 +vdd 548 DFFSR_25 S 5101 7800 5 1 1 +vdd 554 DFFSR_24 S 10221 11800 7 -1 1 +vdd 581 DFFSR_23 S 19341 15800 9 -1 1 +vdd 547 DFFSR_22 S 19181 11800 7 -1 1 +vdd 566 DFFSR_21 S 20021 3800 3 1 1 +vdd 580 DFFSR_20 S 20661 11800 7 -1 1 +vdd 568 DFFSR_19 S 13621 3800 3 1 1 +vdd 571 DFFSR_18 S 15381 -200 1 1 1 +vdd 567 DFFSR_17 S 15821 3800 3 -1 1 +vdd 570 DFFSR_16 S 5621 3800 3 1 1 +vdd 573 DFFSR_15 S 4501 -200 1 1 1 +vdd 579 DFFSR_14 S 2261 15800 9 -1 1 +vdd 562 DFFSR_13 S 3021 7800 5 -1 1 +vdd 555 DFFSR_12 S 3021 11800 7 1 1 +vdd 577 DFFSR_11 S 18061 15800 9 1 1 +vdd 578 DFFSR_10 S 13261 15800 9 1 1 +vdd 579 DFFSR_9 S 2541 15800 9 1 1 +vdd 555 DFFSR_8 S 2541 11800 7 -1 1 +vdd 580 DFFSR_7 S 20341 11800 7 1 1 +vdd 581 DFFSR_6 S 19541 15800 9 1 1 +vdd 572 DFFSR_5 S 12461 -200 1 1 1 +vdd 582 DFFSR_4 S 15341 7800 5 1 1 +vdd 584 DFFSR_3 S 12301 3800 3 -1 1 +vdd 583 DFFSR_2 S 3341 3800 3 -1 1 +vdd 542 DFFSR_1 R 6401 1800 2 1 1 diff -Nru graywolf-0.1.5/tests/map9v3/expected/map9v3.pl1 graywolf-0.1.6/tests/map9v3/expected/map9v3.pl1 --- graywolf-0.1.5/tests/map9v3/expected/map9v3.pl1 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3/expected/map9v3.pl1 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,253 @@ +DFFSR_32 -239 -200 3281 1800 3 1 +BUFX2_35 3281 -200 3761 1800 1 1 +DFFSR_15 3761 -200 7281 1800 1 1 +BUFX2_19 7281 -200 7761 1800 3 1 +INVX1_30 7761 -200 8081 1800 1 1 +AOI21X1_12 8081 -200 8721 1800 1 1 +NAND3X1_8 8721 -200 9361 1800 3 1 +INVX1_31 9361 -200 9681 1800 3 1 +DFFSR_5 9681 -200 13201 1800 3 1 +BUFX2_11 13201 -200 13681 1800 1 1 +BUFX2_12 13681 -200 14161 1800 1 1 +NAND2X1_5 14161 -200 14641 1800 3 1 +DFFSR_18 14641 -200 18161 1800 1 1 +BUFX2_13 18161 -200 18641 1800 1 1 +BUFX2_14 18641 -200 19121 1800 1 1 +OAI21X1_14 19121 -200 19761 1800 3 1 +NOR2X1_14 19761 -200 20241 1800 1 1 +NAND2X1_4 20241 -200 20721 1800 1 1 +NAND2X1_8 20721 -200 21201 1800 3 1 +NAND2X1_9 21201 -200 21681 1800 1 1 +OAI21X1_17 21681 -200 22321 1800 3 1 +INVX1_21 22321 -200 22641 1800 3 1 +NOR2X1_16 22641 -200 23121 1800 3 1 +BUFX2_16 23121 -200 23601 1800 1 1 +INVX1_3 -239 1800 81 3800 0 2 +NOR2X1_6 81 1800 561 3800 0 2 +DFFSR_2 561 1800 4081 3800 2 2 +INVX1_2 4081 1800 4401 3800 0 2 +OAI21X1_2 4401 1800 5041 3800 0 2 +AND2X2_5 5041 1800 5681 3800 0 2 +DFFSR_1 5681 1800 9201 3800 0 2 +INVX1_1 9201 1800 9521 3800 2 2 +DFFSR_3 9521 1800 13041 3800 2 2 +DFFSR_17 13041 1800 16561 3800 2 2 +INVX1_20 16561 1800 16881 3800 2 2 +OAI21X1_18 16881 1800 17521 3800 0 2 +XOR2X1_1 17521 1800 18641 3800 0 2 +OAI21X1_16 18641 1800 19281 3800 0 2 +NAND3X1_2 19281 1800 19921 3800 0 2 +NAND2X1_7 19921 1800 20401 3800 2 2 +INVX1_23 20401 1800 20721 3800 2 2 +NAND3X1_3 20721 1800 21361 3800 0 2 +INVX1_24 21361 1800 21681 3800 2 2 +AOI21X1_10 21681 1800 22321 3800 0 2 +INVX1_25 22321 1800 22641 3800 2 2 +NAND3X1_4 22641 1800 23281 3800 0 2 +INVX1_15 -239 3800 81 5800 3 3 +MUX2X1_6 81 3800 1041 5800 3 3 +INVX1_16 1041 3800 1361 5800 3 3 +DFFSR_30 1361 3800 4881 5800 3 3 +DFFSR_16 4881 3800 8401 5800 1 3 +AND2X2_1 8401 3800 9041 5800 3 3 +NAND3X1_1 9041 3800 9681 5800 3 3 +OAI21X1_12 9681 3800 10321 5800 3 3 +OAI21X1_13 10321 3800 10961 5800 3 3 +NOR2X1_15 10961 3800 11441 5800 3 3 +OAI21X1_15 11441 3800 12081 5800 3 3 +INVX1_22 12081 3800 12401 5800 3 3 +NOR2X1_4 12401 3800 12881 5800 3 3 +DFFSR_19 12881 3800 16401 5800 1 3 +NOR2X1_1 16401 3800 16881 5800 1 3 +OR2X2_1 16881 3800 17521 5800 1 3 +OAI21X1_19 17521 3800 18161 5800 3 3 +NAND2X1_10 18161 3800 18641 5800 3 3 +OAI21X1_20 18641 3800 19281 5800 3 3 +DFFSR_21 19281 3800 22801 5800 1 3 +OAI21X1_22 22801 3800 23441 5800 1 3 +BUFX2_27 -239 5800 241 7800 2 4 +DFFSR_13 241 5800 3761 7800 2 4 +AOI21X1_8 3761 5800 4401 7800 0 4 +BUFX4_4 4401 5800 5041 7800 2 4 +OAI21X1_11 5041 5800 5681 7800 0 4 +OAI21X1_10 5681 5800 6321 7800 2 4 +DFFSR_29 6321 5800 9841 7800 2 4 +INVX4_1 9841 5800 10321 7800 2 4 +NOR2X1_13 10321 5800 10801 7800 2 4 +BUFX2_9 10801 5800 11281 7800 2 4 +BUFX4_8 11281 5800 11921 7800 2 4 +AND2X2_2 11921 5800 12561 7800 2 4 +BUFX2_8 12561 5800 13041 7800 0 4 +AND2X2_6 13041 5800 13681 7800 2 4 +NAND2X1_6 13681 5800 14161 7800 0 4 +NAND2X1_2 14161 5800 14641 7800 2 4 +NOR2X1_5 14641 5800 15121 7800 0 4 +NOR2X1_18 15121 5800 15601 7800 0 4 +NAND2X1_1 15601 5800 16081 7800 2 4 +AND2X2_3 16081 5800 16721 7800 0 4 +NAND2X1_11 16721 5800 17201 7800 0 4 +AOI22X1_1 17201 5800 18001 7800 2 4 +NOR2X1_17 18001 5800 18481 7800 2 4 +AOI21X1_11 18481 5800 19121 7800 0 4 +INVX1_26 19121 5800 19441 7800 2 4 +NOR2X1_2 19441 5800 19921 7800 2 4 +OAI21X1_24 19921 5800 20561 7800 0 4 +OAI21X1_25 20561 5800 21201 7800 2 4 +OAI22X1_1 21201 5800 22001 7800 2 4 +OAI21X1_21 22001 5800 22641 7800 2 4 +NOR2X1_19 22641 5800 23121 7800 2 4 +OAI21X1_23 23121 5800 23761 7800 2 4 +BUFX2_22 -239 7800 241 9800 3 5 +BUFX2_30 241 7800 721 9800 3 5 +INVX1_5 721 7800 1041 9800 1 5 +MUX2X1_1 1041 7800 2001 9800 3 5 +INVX1_6 2001 7800 2321 9800 1 5 +DFFSR_25 2321 7800 5841 9800 3 5 +OAI21X1_6 5841 7800 6481 9800 1 5 +AOI21X1_13 6481 7800 7121 9800 1 5 +OAI21X1_30 7121 7800 7761 9800 3 5 +BUFX4_2 7761 7800 8401 9800 3 5 +BUFX4_3 8401 7800 9041 9800 3 5 +BUFX2_5 9041 7800 9521 9800 3 5 +BUFX2_10 9521 7800 10001 9800 3 5 +AOI21X1_7 10001 7800 10641 9800 1 5 +BUFX4_1 10641 7800 11281 9800 3 5 +BUFX2_2 11281 7800 11761 9800 1 5 +INVX8_1 11761 7800 12561 9800 3 5 +DFFSR_4 12561 7800 16081 9800 3 5 +NOR2X1_3 16081 7800 16561 9800 1 5 +NAND3X1_5 16561 7800 17201 9800 3 5 +INVX1_28 17201 7800 17521 9800 3 5 +OAI21X1_27 17521 7800 18161 9800 1 5 +AND2X2_4 18161 7800 18801 9800 1 5 +OAI21X1_29 18801 7800 19441 9800 1 5 +OAI22X1_2 19441 7800 20241 9800 3 5 +NAND3X1_7 20241 7800 20881 9800 1 5 +NOR2X1_20 20881 7800 21361 9800 1 5 +NAND3X1_6 21361 7800 22001 9800 1 5 +INVX1_27 22001 7800 22321 9800 3 5 +OAI21X1_26 22321 7800 22961 9800 3 5 +OAI21X1_28 22961 7800 23601 9800 1 5 +DFFSR_8 -239 9800 3281 11800 2 6 +DFFSR_31 3281 9800 6801 11800 0 6 +AOI21X1_9 6801 9800 7441 11800 2 6 +DFFSR_24 7441 9800 10961 11800 2 6 +AOI21X1_3 10961 9800 11601 11800 0 6 +OAI21X1_5 11601 9800 12241 11800 2 6 +BUFX2_7 12241 9800 12721 11800 2 6 +BUFX4_7 12721 9800 13361 11800 0 6 +BUFX2_1 13361 9800 13841 11800 0 6 +OAI21X1_9 13841 9800 14481 11800 2 6 +OAI21X1_1 14481 9800 15121 11800 2 6 +BUFX2_3 15121 9800 15601 11800 0 6 +AOI22X1_2 15601 9800 16401 11800 0 6 +DFFSR_22 16401 9800 19921 11800 2 6 +DFFSR_20 19921 9800 23441 11800 0 6 +BUFX2_26 -239 11800 241 13800 3 7 +DFFSR_12 241 11800 3761 13800 3 7 +INVX1_13 3761 11800 4081 13800 1 7 +MUX2X1_5 4081 11800 5041 13800 3 7 +DFFSR_26 5041 11800 8561 13800 1 7 +OAI21X1_7 8561 11800 9201 13800 1 7 +INVX1_14 9201 11800 9521 13800 1 7 +INVX1_18 9521 11800 9841 13800 1 7 +NOR2X1_12 9841 11800 10321 13800 3 7 +NOR2X1_11 10321 11800 10801 13800 3 7 +NAND2X1_3 10801 11800 11281 13800 1 7 +OAI21X1_4 11281 11800 11921 13800 1 7 +XNOR2X1_2 11921 11800 13041 13800 3 7 +BUFX4_6 13041 11800 13681 13800 1 7 +OAI21X1_8 13681 11800 14321 13800 1 7 +AOI21X1_6 14321 11800 14961 13800 3 7 +DFFSR_28 14961 11800 18481 13800 3 7 +NOR2X1_7 18481 11800 18961 13800 1 7 +AOI21X1_1 18961 11800 19601 13800 3 7 +DFFSR_7 19601 11800 23121 13800 1 7 +INVX1_4 23121 11800 23441 13800 3 7 +BUFX2_23 -239 13800 241 15800 2 8 +INVX1_7 241 13800 561 15800 0 8 +MUX2X1_2 561 13800 1521 15800 2 8 +DFFSR_14 1521 13800 5041 15800 0 8 +INVX1_17 5041 13800 5361 15800 0 8 +MUX2X1_7 5361 13800 6321 15800 2 8 +AOI21X1_4 6321 13800 6961 15800 2 8 +INVX1_8 6961 13800 7281 15800 2 8 +BUFX2_36 7281 13800 7761 15800 0 8 +BUFX2_34 7761 13800 8241 15800 2 8 +BUFX2_31 8241 13800 8721 15800 0 8 +AOI21X1_5 8721 13800 9361 15800 2 8 +INVX1_10 9361 13800 9681 15800 0 8 +XNOR2X1_1 9681 13800 10801 15800 0 8 +OAI21X1_3 10801 13800 11441 15800 2 8 +NOR2X1_9 11441 13800 11921 15800 2 8 +MUX2X1_3 11921 13800 12881 15800 0 8 +NOR2X1_10 12881 13800 13361 15800 0 8 +BUFX2_33 13361 13800 13841 15800 2 8 +INVX1_12 13841 13800 14161 15800 2 8 +MUX2X1_4 14161 13800 15121 15800 0 8 +BUFX2_6 15121 13800 15601 15800 0 8 +BUFX2_29 15601 13800 16081 15800 0 8 +BUFX2_17 16081 13800 16561 15800 0 8 +DFFSR_23 16561 13800 20081 15800 2 8 +AOI21X1_2 20081 13800 20721 15800 2 8 +NOR2X1_8 20721 13800 21201 15800 2 8 +INVX1_19 21201 13800 21521 15800 2 8 +NOR2X1_21 21521 13800 22001 15800 2 8 +BUFX2_15 22001 13800 22481 15800 0 8 +OR2X2_2 22481 13800 23121 15800 2 8 +INVX1_29 23121 13800 23441 15800 2 8 +DFFSR_9 -239 15800 3281 17800 3 9 +BUFX4_5 3281 15800 3921 17800 3 9 +BUFX2_28 3921 15800 4401 17800 3 9 +INVX8_2 4401 15800 5201 17800 1 9 +DFFSR_27 5201 15800 8721 17800 1 9 +BUFX2_4 8721 15800 9201 17800 3 9 +BUFX2_32 9201 15800 9681 17800 3 9 +BUFX2_24 9681 15800 10161 17800 1 9 +INVX1_9 10161 15800 10481 17800 1 9 +DFFSR_10 10481 15800 14001 17800 3 9 +BUFX2_25 14001 15800 14481 17800 3 9 +INVX1_11 14481 15800 14801 17800 1 9 +BUFX2_18 14801 15800 15281 17800 1 9 +DFFSR_11 15281 15800 18801 17800 3 9 +DFFSR_6 18801 15800 22321 17800 1 9 +BUFX2_20 22321 15800 22801 17800 1 9 +BUFX2_21 22801 15800 23281 17800 1 9 +twpin_clock 9041 18000 9201 18200 3 -4 +twpin_reset 4401 18000 4561 18200 3 -4 +twpin_start -639 2180 -439 2340 7 -1 +twpin_N<0> 23961 14340 24161 14500 6 -2 +twpin_N<1> 20241 -600 20401 -400 0 -3 +twpin_N<2> 20561 -600 20721 -400 0 -3 +twpin_N<3> 23961 1260 24161 1420 6 -2 +twpin_N<4> 21761 -600 21921 -400 0 -3 +twpin_N<5> 23961 14180 24161 14340 6 -2 +twpin_N<6> 23961 4720 24161 4880 6 -2 +twpin_N<7> 23961 9050 24161 9210 6 -2 +twpin_N<8> 23961 8720 24161 8880 6 -2 +twpin_dp<0> 22651 18000 22811 18200 3 -4 +twpin_dp<1> 23961 16720 24161 16880 6 -2 +twpin_dp<2> -639 8720 -439 8880 7 -1 +twpin_dp<3> -639 14720 -439 14880 7 -1 +twpin_dp<4> 10011 18000 10171 18200 3 -4 +twpin_dp<5> 13991 18000 14151 18200 3 -4 +twpin_dp<6> -639 12720 -439 12880 7 -1 +twpin_dp<7> -639 6720 -439 6880 7 -1 +twpin_dp<8> 3911 18000 4071 18200 3 -4 +twpin_done 7271 -600 7431 -400 0 -3 +twpin_counter<0> 13531 -600 13691 -400 0 -3 +twpin_counter<1> 14011 -600 14171 -400 0 -3 +twpin_counter<2> 18491 -600 18651 -400 0 -3 +twpin_counter<3> 18971 -600 19131 -400 0 -3 +twpin_counter<4> 23961 14720 24161 14880 6 -2 +twpin_counter<5> 23961 720 24161 880 6 -2 +twpin_counter<6> 16401 18000 16561 18200 3 -4 +twpin_counter<7> 15131 18000 15291 18200 3 -4 +twpin_sr<0> 15921 18000 16081 18200 3 -4 +twpin_sr<1> -639 8880 -439 9040 7 -1 +twpin_sr<2> 8561 18000 8721 18200 3 -4 +twpin_sr<3> 9201 18000 9361 18200 3 -4 +twpin_sr<4> 13201 18000 13361 18200 3 -4 +twpin_sr<5> 7761 18000 7921 18200 3 -4 +twpin_sr<6> 3611 -600 3771 -400 0 -3 +twpin_sr<7> 7601 18000 7761 18200 3 -4 diff -Nru graywolf-0.1.5/tests/map9v3/expected/map9v3.pl2 graywolf-0.1.6/tests/map9v3/expected/map9v3.pl2 --- graywolf-0.1.5/tests/map9v3/expected/map9v3.pl2 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3/expected/map9v3.pl2 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,47 @@ +1 -239 -200 23601 1800 0 0 +2 -239 1800 23281 3800 0 0 +3 -239 3800 23441 5800 0 0 +4 -239 5800 23761 7800 0 0 +5 -239 7800 23601 9800 0 0 +6 -239 9800 23441 11800 0 0 +7 -239 11800 23441 13800 0 0 +8 -239 13800 23441 15800 0 0 +9 -239 15800 23281 17800 0 0 +twpin_clock 9041 18000 9201 18200 3 -4 +twpin_reset 4401 18000 4561 18200 3 -4 +twpin_start -639 2180 -439 2340 7 -1 +twpin_N<0> 23961 14340 24161 14500 6 -2 +twpin_N<1> 20241 -600 20401 -400 0 -3 +twpin_N<2> 20561 -600 20721 -400 0 -3 +twpin_N<3> 23961 1260 24161 1420 6 -2 +twpin_N<4> 21761 -600 21921 -400 0 -3 +twpin_N<5> 23961 14180 24161 14340 6 -2 +twpin_N<6> 23961 4720 24161 4880 6 -2 +twpin_N<7> 23961 9050 24161 9210 6 -2 +twpin_N<8> 23961 8720 24161 8880 6 -2 +twpin_dp<0> 22651 18000 22811 18200 3 -4 +twpin_dp<1> 23961 16720 24161 16880 6 -2 +twpin_dp<2> -639 8720 -439 8880 7 -1 +twpin_dp<3> -639 14720 -439 14880 7 -1 +twpin_dp<4> 10011 18000 10171 18200 3 -4 +twpin_dp<5> 13991 18000 14151 18200 3 -4 +twpin_dp<6> -639 12720 -439 12880 7 -1 +twpin_dp<7> -639 6720 -439 6880 7 -1 +twpin_dp<8> 3911 18000 4071 18200 3 -4 +twpin_done 7271 -600 7431 -400 0 -3 +twpin_counter<0> 13531 -600 13691 -400 0 -3 +twpin_counter<1> 14011 -600 14171 -400 0 -3 +twpin_counter<2> 18491 -600 18651 -400 0 -3 +twpin_counter<3> 18971 -600 19131 -400 0 -3 +twpin_counter<4> 23961 14720 24161 14880 6 -2 +twpin_counter<5> 23961 720 24161 880 6 -2 +twpin_counter<6> 16401 18000 16561 18200 3 -4 +twpin_counter<7> 15131 18000 15291 18200 3 -4 +twpin_sr<0> 15921 18000 16081 18200 3 -4 +twpin_sr<1> -639 8880 -439 9040 7 -1 +twpin_sr<2> 8561 18000 8721 18200 3 -4 +twpin_sr<3> 9201 18000 9361 18200 3 -4 +twpin_sr<4> 13201 18000 13361 18200 3 -4 +twpin_sr<5> 7761 18000 7921 18200 3 -4 +twpin_sr<6> 3611 -600 3771 -400 0 -3 +twpin_sr<7> 7601 18000 7761 18200 3 -4 diff -Nru graywolf-0.1.5/tests/map9v3/expected/map9v3.pth graywolf-0.1.6/tests/map9v3/expected/map9v3.pth --- graywolf-0.1.5/tests/map9v3/expected/map9v3.pth 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3/expected/map9v3.pth 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,233 @@ +The paths: +############################################## + +The nets: +############################################## +net 1:$abc$733$n76 xspan:5130 yspan:4450 length:9580 numpins:5 +net 2:$abc$733$n76_bF$buf3 xspan:2511 yspan:10332 length:12843 numpins:6 +net 3:$abc$733$n76_bF$buf2 xspan:4071 yspan:2790 length:6861 numpins:6 +net 4:$abc$733$n76_bF$buf1 xspan:2809 yspan:11630 length:14439 numpins:6 +net 5:$abc$733$n76_bF$buf0 xspan:2220 yspan:2540 length:4760 numpins:5 +net 6:$abc$733$n164 xspan:10420 yspan:16810 length:27230 numpins:6 +net 7:$abc$733$n164_bF$buf4 xspan:5949 yspan:17309 length:23258 numpins:8 +net 8:$abc$733$n164_bF$buf3 xspan:6711 yspan:10660 length:17371 numpins:8 +net 9:$abc$733$n164_bF$buf2 xspan:7689 yspan:11880 length:19569 numpins:7 +net 10:$abc$733$n164_bF$buf1 xspan:20169 yspan:14030 length:34199 numpins:7 +net 11:$abc$733$n164_bF$buf0 xspan:5769 yspan:13790 length:19559 numpins:7 +net 12:clock xspan:8320 yspan:17160 length:25480 numpins:6 +net 13:clock_bF$buf4 xspan:12626 yspan:15996 length:28622 numpins:8 +net 14:clock_bF$buf3 xspan:11826 yspan:20000 length:31826 numpins:8 +net 15:clock_bF$buf2 xspan:9508 yspan:14000 length:23508 numpins:7 +net 16:clock_bF$buf1 xspan:7216 yspan:12998 length:20214 numpins:7 +net 17:clock_bF$buf0 xspan:10396 yspan:12004 length:22400 numpins:7 +net 18:$abc$733$n75_1 xspan:3840 yspan:6280 length:10120 numpins:5 +net 19:$abc$733$n75_1_bF$buf3 xspan:6160 yspan:5100 length:11260 numpins:6 +net 20:$abc$733$n75_1_bF$buf2 xspan:10070 yspan:4310 length:14380 numpins:5 +net 21:$abc$733$n75_1_bF$buf1 xspan:2360 yspan:4370 length:6730 numpins:5 +net 22:$abc$733$n75_1_bF$buf0 xspan:4070 yspan:5100 length:9170 numpins:5 +net 23:state<0> xspan:16560 yspan:20430 length:36990 numpins:12 +net 24:state<3> xspan:5040 yspan:8558 length:13598 numpins:7 +net 25:$auto$iopadmap.cc:313:execute$873<3> xspan:2960 yspan:7369 length:10329 numpins:5 +net 26:$auto$iopadmap.cc:313:execute$873<2> xspan:1839 yspan:7221 length:9060 numpins:6 +net 27:$abc$733$n77 xspan:800 yspan:2878 length:3678 numpins:4 +net 28:$auto$iopadmap.cc:313:execute$873<5> xspan:4480 yspan:8611 length:13091 numpins:4 +net 29:$auto$iopadmap.cc:313:execute$873<4> xspan:5920 yspan:10430 length:16350 numpins:5 +net 30:$abc$733$n78 xspan:4000 yspan:440 length:4440 numpins:3 +net 31:$abc$733$n79 xspan:2820 yspan:2881 length:5701 numpins:4 +net 32:$auto$iopadmap.cc:313:execute$873<7> xspan:2080 yspan:8049 length:10129 numpins:4 +net 33:$auto$iopadmap.cc:313:execute$873<6> xspan:2000 yspan:9088 length:11088 numpins:5 +net 34:$abc$733$n80 xspan:2880 yspan:2880 length:5760 numpins:3 +net 35:$auto$iopadmap.cc:313:execute$873<1> xspan:1600 yspan:5951 length:7551 numpins:4 +net 36:$auto$iopadmap.cc:313:execute$873<0> xspan:5440 yspan:5930 length:11370 numpins:5 +net 37:$abc$733$n81 xspan:1760 yspan:3419 length:5179 numpins:4 +net 38:$abc$733$n82 xspan:420 yspan:140 length:560 numpins:2 +net 39:$abc$733$n83_1 xspan:960 yspan:5899 length:6859 numpins:3 +net 40:$abc$546$n2 xspan:30 yspan:1560 length:1590 numpins:2 +net 41:state<4> xspan:640 yspan:1969 length:2609 numpins:3 +net 42:$abc$733$n85_1 xspan:4400 yspan:300 length:4700 numpins:2 +net 43:state<1> xspan:4480 yspan:1429 length:5909 numpins:3 +net 44:$abc$733$n86 xspan:240 yspan:330 length:570 numpins:2 +net 45:start xspan:2780 yspan:2740 length:5520 numpins:3 +net 46:$abc$733$n87_1 xspan:480 yspan:61 length:541 numpins:2 +net 47:startbuf xspan:160 yspan:1909 length:2069 numpins:2 +net 48:$abc$733$n88 xspan:4800 yspan:281 length:5081 numpins:3 +net 49:$abc$546$n5 xspan:2050 yspan:240 length:2290 numpins:2 +net 50:$auto$iopadmap.cc:313:execute$884<1> xspan:480 yspan:6049 length:6529 numpins:3 +net 51:$abc$733$n90 xspan:3760 yspan:70 length:3830 numpins:2 +net 52:state<2> xspan:2400 yspan:6551 length:8951 numpins:4 +net 53:$abc$733$n91_1 xspan:26720 yspan:33578 length:60298 numpins:12 +net 54:$auto$iopadmap.cc:313:execute$894<0> xspan:10960 yspan:6659 length:17619 numpins:5 +net 55:$abc$733$n92 xspan:320 yspan:201 length:521 numpins:2 +net 56:dp<1>_FF_INPUT xspan:1760 yspan:340 length:2100 numpins:2 +net 57:$auto$iopadmap.cc:313:execute$884<2> xspan:800 yspan:3769 length:4569 numpins:3 +net 58:$abc$733$n94 xspan:320 yspan:61 length:381 numpins:2 +net 59:$auto$iopadmap.cc:313:execute$894<1> xspan:5360 yspan:1719 length:7079 numpins:4 +net 60:$abc$733$n95_1 xspan:4960 yspan:401 length:5361 numpins:3 +net 61:dp<2>_FF_INPUT xspan:419 yspan:2840 length:3259 numpins:2 +net 62:$auto$iopadmap.cc:313:execute$884<3> xspan:320 yspan:2091 length:2411 numpins:3 +net 63:$abc$733$n97_1 xspan:320 yspan:61 length:381 numpins:2 +net 64:$auto$iopadmap.cc:313:execute$894<2> xspan:1520 yspan:5299 length:6819 numpins:4 +net 65:$abc$733$n98_1 xspan:5760 yspan:382 length:6142 numpins:3 +net 66:dp<3>_FF_INPUT xspan:899 yspan:1840 length:2739 numpins:2 +net 67:$auto$iopadmap.cc:313:execute$884<4> xspan:960 yspan:1389 length:2349 numpins:3 +net 68:$abc$733$n100 xspan:2240 yspan:2061 length:4301 numpins:2 +net 69:$auto$iopadmap.cc:313:execute$894<3> xspan:5630 yspan:8201 length:13831 numpins:6 +net 70:$abc$733$n101_1 xspan:3040 yspan:401 length:3441 numpins:4 +net 71:dp<4>_FF_INPUT xspan:221 yspan:1840 length:2061 numpins:2 +net 72:$auto$iopadmap.cc:313:execute$884<5> xspan:1120 yspan:1129 length:2249 numpins:3 +net 73:$abc$733$n103_1 xspan:480 yspan:2061 length:2541 numpins:2 +net 74:$auto$iopadmap.cc:313:execute$894<4> xspan:3961 yspan:9981 length:13942 numpins:6 +net 75:$abc$733$n104 xspan:1440 yspan:5520 length:6960 numpins:4 +net 76:dp<5>_FF_INPUT xspan:2781 yspan:1840 length:4621 numpins:2 +net 77:$auto$iopadmap.cc:313:execute$884<6> xspan:3680 yspan:1129 length:4809 numpins:3 +net 78:$abc$733$n106_1 xspan:320 yspan:61 length:381 numpins:2 +net 79:$auto$iopadmap.cc:313:execute$894<5> xspan:4130 yspan:12461 length:16591 numpins:6 +net 80:$abc$733$n107 xspan:5600 yspan:3940 length:9540 numpins:4 +net 81:dp<6>_FF_INPUT xspan:2141 yspan:840 length:2981 numpins:2 +net 82:$auto$iopadmap.cc:313:execute$884<7> xspan:800 yspan:1909 length:2709 numpins:3 +net 83:$abc$733$n109 xspan:480 yspan:61 length:541 numpins:2 +net 84:$auto$iopadmap.cc:313:execute$894<6> xspan:3920 yspan:6519 length:10439 numpins:4 +net 85:$abc$733$n110_1 xspan:3200 yspan:1879 length:5079 numpins:3 +net 86:dp<7>_FF_INPUT xspan:1981 yspan:2160 length:4141 numpins:2 +net 87:$auto$iopadmap.cc:313:execute$884<8> xspan:960 yspan:3129 length:4089 numpins:3 +net 88:$abc$733$n112 xspan:320 yspan:61 length:381 numpins:2 +net 89:$auto$iopadmap.cc:313:execute$894<7> xspan:4160 yspan:7051 length:11211 numpins:5 +net 90:$abc$733$n113 xspan:3840 yspan:4182 length:8022 numpins:4 +net 91:dp<8>_FF_INPUT xspan:3139 yspan:840 length:3979 numpins:2 +net 92:$auto$iopadmap.cc:313:execute$884<0> xspan:1280 yspan:3129 length:4409 numpins:3 +net 93:$abc$733$n115 xspan:720 yspan:70 length:790 numpins:2 +net 94:N<0> xspan:3420 yspan:1080 length:4500 numpins:2 +net 95:$abc$733$n116_1 xspan:800 yspan:201 length:1001 numpins:2 +net 96:dp<0>_FF_INPUT xspan:160 yspan:3020 length:3180 numpins:2 +net 97:$abc$733$n118_1 xspan:670 yspan:800 length:1470 numpins:2 +net 98:$abc$733$n119 xspan:400 yspan:30 length:430 numpins:2 +net 99:$abc$733$n120 xspan:1920 yspan:160 length:2080 numpins:2 +net 100:$abc$733$n121 xspan:190 yspan:1560 length:1750 numpins:2 +net 101:$abc$733$n122 xspan:880 yspan:30 length:910 numpins:2 +net 102:$abc$733$n123_1 xspan:1440 yspan:160 length:1600 numpins:2 +net 103:$abc$733$n124 xspan:770 yspan:800 length:1570 numpins:2 +net 104:$abc$733$n125 xspan:450 yspan:240 length:690 numpins:2 +net 105:$abc$733$n126 xspan:180 yspan:2750 length:2930 numpins:2 +net 106:$abc$733$n127 xspan:350 yspan:401 length:751 numpins:2 +net 107:sr<0>_FF_INPUT xspan:1760 yspan:340 length:2100 numpins:2 +net 108:$abc$733$n129 xspan:190 yspan:5399 length:5589 numpins:2 +net 109:sr<2>_FF_INPUT xspan:160 yspan:980 length:1140 numpins:2 +net 110:$abc$733$n131 xspan:130 yspan:1399 length:1529 numpins:2 +net 111:sr<3>_FF_INPUT xspan:2400 yspan:3020 length:5420 numpins:2 +net 112:$abc$733$n133_1 xspan:350 yspan:401 length:751 numpins:2 +net 113:sr<4>_FF_INPUT xspan:2560 yspan:340 length:2900 numpins:2 +net 114:$abc$733$n135_1 xspan:3550 yspan:2401 length:5951 numpins:2 +net 115:sr<5>_FF_INPUT xspan:2240 yspan:3020 length:5260 numpins:2 +net 116:$abc$733$n137 xspan:1630 yspan:401 length:2031 numpins:2 +net 117:sr<6>_FF_INPUT xspan:640 yspan:980 length:1620 numpins:2 +net 118:$abc$733$n139 xspan:1470 yspan:3599 length:5069 numpins:2 +net 119:sr<7>_FF_INPUT xspan:2400 yspan:340 length:2740 numpins:2 +net 120:N<1> xspan:4000 yspan:3640 length:7640 numpins:4 +net 121:$abc$733$n141 xspan:5920 yspan:2140 length:8060 numpins:2 +net 122:$abc$733$n142 xspan:880 yspan:3009 length:3889 numpins:3 +net 123:$abc$733$n143 xspan:1539 yspan:540 length:2079 numpins:2 +net 124:$abc$733$n144 xspan:590 yspan:400 length:990 numpins:2 +net 125:counter<0>_FF_INPUT xspan:4350 yspan:240 length:4590 numpins:2 +net 126:N<2> xspan:480 yspan:2521 length:3001 numpins:3 +net 127:$abc$733$n146 xspan:400 yspan:30 length:430 numpins:2 +net 128:$abc$733$n147 xspan:4060 yspan:5799 length:9859 numpins:6 +net 129:$abc$733$n148 xspan:2880 yspan:420 length:3300 numpins:4 +net 130:$abc$733$n149 xspan:4830 yspan:240 length:5070 numpins:2 +net 131:$abc$733$n150 xspan:7080 yspan:4171 length:11251 numpins:6 +net 132:$abc$733$n151_1 xspan:800 yspan:540 length:1340 numpins:2 +net 133:$abc$733$n152 xspan:640 yspan:160 length:800 numpins:2 +net 134:$abc$733$n153_1 xspan:2850 yspan:4240 length:7090 numpins:2 +net 135:counter<1>_FF_INPUT xspan:900 yspan:980 length:1880 numpins:2 +net 136:$abc$733$n155 xspan:4530 yspan:8500 length:13030 numpins:6 +net 137:$abc$733$n156 xspan:800 yspan:560 length:1360 numpins:2 +net 138:N<3> xspan:3900 yspan:1340 length:5240 numpins:5 +net 139:$abc$733$n157 xspan:480 yspan:400 length:880 numpins:3 +net 140:$abc$733$n158_1 xspan:500 yspan:580 length:1080 numpins:2 +net 141:$abc$733$n159 xspan:1180 yspan:1580 length:2760 numpins:2 +net 142:$abc$733$n160_1 xspan:400 yspan:380 length:780 numpins:2 +net 143:counter<2>_FF_INPUT xspan:3010 yspan:1560 length:4570 numpins:2 +net 144:N<4> xspan:1120 yspan:5121 length:6241 numpins:4 +net 145:$abc$733$n162_1 xspan:350 yspan:240 length:590 numpins:2 +net 146:$abc$733$n163_1 xspan:440 yspan:100 length:540 numpins:2 +net 147:$abc$733$n164_1 xspan:3280 yspan:11048 length:14328 numpins:6 +net 148:$abc$733$n165 xspan:2620 yspan:3460 length:6080 numpins:2 +net 149:$abc$733$n166 xspan:640 yspan:1839 length:2479 numpins:3 +net 150:$abc$733$n167 xspan:590 yspan:1800 length:2390 numpins:2 +net 151:$abc$733$n168 xspan:450 yspan:240 length:690 numpins:2 +net 152:$abc$733$n169 xspan:500 yspan:980 length:1480 numpins:2 +net 153:counter<3>_FF_INPUT xspan:4670 yspan:240 length:4910 numpins:2 +net 154:N<5> xspan:3340 yspan:23790 length:27130 numpins:6 +net 155:$abc$733$n171 xspan:160 yspan:501 length:661 numpins:2 +net 156:$abc$733$n172 xspan:1080 yspan:3230 length:4310 numpins:3 +net 157:$abc$733$n173 xspan:240 yspan:4350 length:4590 numpins:2 +net 158:$abc$733$n174 xspan:510 yspan:40 length:550 numpins:2 +net 159:$abc$733$n175 xspan:800 yspan:460 length:1260 numpins:3 +net 160:$abc$733$n176 xspan:400 yspan:500 length:900 numpins:2 +net 161:$abc$733$n177 xspan:3850 yspan:291 length:4141 numpins:2 +net 162:counter<4>_FF_INPUT xspan:320 yspan:3960 length:4280 numpins:2 +net 163:N<6> xspan:3140 yspan:10803 length:13943 numpins:4 +net 164:$abc$733$n179 xspan:110 yspan:2200 length:2310 numpins:2 +net 165:$abc$733$n180 xspan:960 yspan:9040 length:10000 numpins:3 +net 166:$abc$733$n181 xspan:2430 yspan:40 length:2470 numpins:2 +net 167:$abc$733$n182 xspan:6480 yspan:69 length:6549 numpins:3 +net 168:$abc$733$n183 xspan:160 yspan:501 length:661 numpins:2 +net 169:$abc$733$n184 xspan:1280 yspan:540 length:1820 numpins:2 +net 170:$abc$733$n185 xspan:430 yspan:400 length:830 numpins:2 +net 171:counter<5>_FF_INPUT xspan:190 yspan:2240 length:2430 numpins:2 +net 172:N<7> xspan:2300 yspan:210 length:2510 numpins:4 +net 173:$abc$733$n187 xspan:1120 yspan:600 length:1720 numpins:3 +net 174:$abc$733$n188 xspan:2080 yspan:2621 length:4701 numpins:3 +net 175:$abc$733$n189 xspan:1040 yspan:30 length:1070 numpins:2 +net 176:$abc$733$n190 xspan:1280 yspan:11440 length:12720 numpins:2 +net 177:$abc$733$n191 xspan:640 yspan:5460 length:6100 numpins:3 +net 178:$abc$733$n192 xspan:2590 yspan:40 length:2630 numpins:2 +net 179:$abc$733$n193 xspan:160 yspan:60 length:220 numpins:2 +net 180:$abc$733$n194 xspan:221 yspan:2420 length:2641 numpins:2 +net 181:$abc$733$n195 xspan:2100 yspan:2761 length:4861 numpins:3 +net 182:$abc$733$n196 xspan:510 yspan:0 length:510 numpins:2 +net 183:$abc$733$n197 xspan:1021 yspan:540 length:1561 numpins:2 +net 184:counter<6>_FF_INPUT xspan:1280 yspan:1360 length:2640 numpins:2 +net 185:N<8> xspan:1260 yspan:7380 length:8640 numpins:3 +net 186:$abc$733$n199 xspan:2810 yspan:0 length:2810 numpins:2 +net 187:$abc$733$n200 xspan:1560 yspan:5900 length:7460 numpins:2 +net 188:$abc$733$n201 xspan:960 yspan:420 length:1380 numpins:2 +net 189:$abc$733$n202 xspan:1200 yspan:380 length:1580 numpins:2 +net 190:$abc$733$n203 xspan:3030 yspan:1429 length:4459 numpins:2 +net 191:counter<7>_FF_INPUT xspan:510 yspan:5560 length:6070 numpins:2 +net 192:$auto$iopadmap.cc:313:execute$882 xspan:800 yspan:989 length:1789 numpins:3 +net 193:$abc$733$n205 xspan:320 yspan:261 length:581 numpins:2 +net 194:$abc$733$n206 xspan:480 yspan:260 length:740 numpins:2 +net 195:$abc$733$n207 xspan:880 yspan:750 length:1630 numpins:2 +net 196:done_FF_INPUT xspan:3360 yspan:340 length:3700 numpins:2 +net 197:$abc$733$n209 xspan:350 yspan:401 length:751 numpins:2 +net 198:sr<1>_FF_INPUT xspan:2400 yspan:340 length:2740 numpins:2 +net 199:$abc$546$n149 xspan:1501 yspan:340 length:1841 numpins:2 +net 200:$abc$546$n150 xspan:1501 yspan:3660 length:5161 numpins:2 +net 201:reset xspan:0 yspan:960 length:960 numpins:2 +net 202:counter<0> xspan:0 yspan:1300 length:1300 numpins:2 +net 203:counter<1> xspan:0 yspan:1300 length:1300 numpins:2 +net 204:counter<2> xspan:0 yspan:1300 length:1300 numpins:2 +net 205:counter<3> xspan:0 yspan:1300 length:1300 numpins:2 +net 206:counter<4> xspan:2130 yspan:4000 length:6130 numpins:2 +net 207:counter<5> xspan:1010 yspan:6000 length:7010 numpins:2 +net 208:counter<6> xspan:20 yspan:3300 length:3320 numpins:2 +net 209:counter<7> xspan:0 yspan:1300 length:1300 numpins:2 +net 210:done xspan:0 yspan:1300 length:1300 numpins:2 +net 211:dp<0> xspan:0 yspan:1300 length:1300 numpins:2 +net 212:dp<1> xspan:1330 yspan:4000 length:5330 numpins:2 +net 213:dp<2> xspan:370 yspan:0 length:370 numpins:2 +net 214:dp<3> xspan:370 yspan:0 length:370 numpins:2 +net 215:dp<4> xspan:0 yspan:1300 length:1300 numpins:2 +net 216:dp<5> xspan:0 yspan:1300 length:1300 numpins:2 +net 217:dp<6> xspan:370 yspan:0 length:370 numpins:2 +net 218:dp<7> xspan:370 yspan:0 length:370 numpins:2 +net 219:dp<8> xspan:0 yspan:1300 length:1300 numpins:2 +net 220:sr<0> xspan:20 yspan:3300 length:3320 numpins:2 +net 221:sr<1> xspan:850 yspan:160 length:1010 numpins:2 +net 222:sr<2> xspan:20 yspan:3300 length:3320 numpins:2 +net 223:sr<3> xspan:10 yspan:1300 length:1310 numpins:2 +net 224:sr<4> xspan:300 yspan:3300 length:3600 numpins:2 +net 225:sr<5> xspan:20 yspan:3300 length:3320 numpins:2 +net 226:sr<6> xspan:0 yspan:1300 length:1300 numpins:2 +net 227:sr<7> xspan:20 yspan:3300 length:3320 numpins:2 +net 228:vdd xspan:31740 yspan:95677 length:127417 numpins:32 diff -Nru graywolf-0.1.5/tests/map9v3/expected/map9v3.sav graywolf-0.1.6/tests/map9v3/expected/map9v3.sav --- graywolf-0.1.5/tests/map9v3/expected/map9v3.sav 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3/expected/map9v3.sav 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,382 @@ +0.001000 +158 +0 +1 +2.529029 +1.410680 +1.000000 +1 +0 +1 0 0 +671373 0 1 1 +0.000000 2018.500000 0.750000 0.000000 +0.003368 0.000000 +99.000000 99.000000 +0.000000 0.000000 3.000000 +1 5 3 10961 8800 +2 5 3 8081 8800 +3 5 3 8721 8800 +4 6 0 13601 10800 +5 4 2 4721 6800 +6 9 3 3601 16800 +7 7 1 13361 12800 +8 6 0 13041 10800 +9 4 0 11601 6800 +10 5 3 11521 8800 +11 6 0 15361 10800 +12 9 3 8961 16800 +13 5 3 9281 8800 +14 8 0 15361 14800 +15 6 2 12481 10800 +16 4 0 12801 6800 +17 4 2 11041 6800 +18 5 3 9761 8800 +19 4 2 10081 6800 +20 5 3 12161 8800 +21 3 1 16641 4800 +22 4 2 19361 6800 +23 4 0 15841 6800 +24 5 1 16321 8800 +25 3 1 12641 4800 +26 4 2 14401 6800 +27 4 0 14881 6800 +28 6 2 14801 10800 +29 2 2 9361 2800 +30 2 0 4241 2800 +31 2 2 401 2800 +32 2 0 1 2800 +33 2 0 4721 2800 +34 7 3 23281 12800 +35 3 3 9361 4800 +36 7 1 18721 12800 +37 7 3 19281 12800 +38 5 1 881 8800 +39 5 3 2161 8800 +40 5 3 1521 8800 +41 8 0 401 14800 +42 8 2 7121 14800 +43 8 2 1041 14800 +44 9 1 10321 16800 +45 8 0 9521 14800 +46 8 0 12401 14800 +47 9 1 14641 16800 +48 8 2 14001 14800 +49 8 0 14641 14800 +50 7 1 3921 12800 +51 7 1 9361 12800 +52 7 3 4561 12800 +53 3 1 -79 4800 +54 3 3 1201 4800 +55 3 3 561 4800 +56 8 0 5201 14800 +57 7 1 9681 12800 +58 8 2 5841 14800 +59 8 2 21361 14800 +60 8 2 20961 14800 +61 8 2 20401 14800 +62 8 0 10241 14800 +63 8 2 11681 14800 +64 8 0 13121 14800 +65 8 2 11121 14800 +66 7 3 10561 12800 +67 7 3 10081 12800 +68 7 3 12481 12800 +69 7 1 11601 12800 +70 7 1 11041 12800 +71 6 2 11921 10800 +72 6 0 11281 10800 +73 5 1 6161 8800 +74 8 2 6641 14800 +75 7 1 8881 12800 +76 8 2 9041 14800 +77 7 1 14001 12800 +78 7 3 14641 12800 +79 6 2 14161 10800 +80 5 1 10321 8800 +81 4 2 6001 6800 +82 4 0 4081 6800 +83 4 0 5361 6800 +84 6 2 7121 10800 +85 2 2 16721 2800 +86 4 2 10561 6800 +87 3 3 8721 4800 +88 3 3 10001 4800 +89 3 3 10641 4800 +90 1 1 20001 800 +91 1 1 20481 800 +92 1 3 22481 800 +93 1 3 19441 800 +94 4 2 12241 6800 +95 3 3 12241 4800 +96 3 3 11201 4800 +97 3 3 11761 4800 +98 1 3 14401 800 +99 4 0 13921 6800 +100 2 0 18081 2800 +101 2 2 20561 2800 +102 2 2 20161 2800 +103 1 3 20961 800 +104 2 0 19601 2800 +105 2 0 18961 2800 +106 1 3 22001 800 +107 2 2 21521 2800 +108 2 0 21041 2800 +109 1 1 21441 800 +110 3 1 17201 4800 +111 2 0 17201 2800 +112 3 3 17841 4800 +113 3 3 18401 4800 +114 3 3 18961 4800 +115 2 2 22481 2800 +116 1 3 22881 800 +117 2 0 22001 2800 +118 4 2 22321 6800 +119 4 2 18241 6800 +120 4 0 16961 6800 +121 4 2 17601 6800 +122 4 2 21601 6800 +123 3 1 23121 4800 +124 3 3 23761 4800 +125 4 2 23441 6800 +126 4 0 15361 6800 +127 4 2 19761 6800 +128 4 0 18801 6800 +129 4 0 20241 6800 +130 4 2 20881 6800 +131 5 3 22161 8800 +132 4 2 22881 6800 +133 5 1 21121 8800 +134 2 0 23521 2800 +135 2 0 22961 2800 +136 5 3 22641 8800 +137 5 3 17361 8800 +138 4 0 16401 6800 +139 5 3 16881 8800 +140 5 1 17841 8800 +141 5 1 18481 8800 +142 5 3 19841 8800 +143 5 1 23281 8800 +144 5 3 23761 8800 +145 5 1 21681 8800 +146 5 1 20561 8800 +147 6 0 16001 10800 +148 5 1 19121 8800 +149 1 1 7921 800 +150 1 3 9521 800 +151 1 3 9041 800 +152 1 1 8401 800 +153 5 3 7441 8800 +154 5 1 6801 8800 +155 2 0 5361 2800 +156 4 2 13361 6800 +157 9 1 4801 16800 +158 1 1 13441 800 +159 1 1 13921 800 +160 1 1 18401 800 +161 1 1 18881 800 +162 6 0 23681 10800 +163 4 0 24001 6800 +164 8 0 16321 14800 +165 9 1 15041 16800 +166 1 3 7521 800 +167 9 1 22561 16800 +168 7 1 23681 12800 +169 5 3 1 8800 +170 8 2 1 14800 +171 9 1 9921 16800 +172 9 3 14241 16800 +173 7 3 1 12800 +174 4 2 1 6800 +175 9 3 4161 16800 +176 8 0 15841 14800 +177 5 3 481 8800 +178 8 0 8481 14800 +179 9 3 9441 16800 +180 8 2 13601 14800 +181 8 2 8001 14800 +182 1 1 3521 800 +183 8 0 7521 14800 +184 2 0 7441 2800 +185 2 2 2321 2800 +186 2 2 11281 2800 +187 5 3 14321 8800 +188 1 3 11441 800 +189 9 1 20561 16800 +190 7 1 21361 12800 +191 6 2 1521 10800 +192 9 3 1521 16800 +193 9 3 12241 16800 +194 9 3 17041 16800 +195 7 3 2001 12800 +196 4 2 2001 6800 +197 8 0 3281 14800 +198 1 1 5521 800 +199 3 1 6641 4800 +200 2 2 14801 2800 +201 1 1 16401 800 +202 3 1 14641 4800 +203 6 0 21681 10800 +204 3 1 21041 4800 +205 6 2 18161 10800 +206 8 2 18321 14800 +207 6 2 9201 10800 +208 5 3 4081 8800 +209 7 1 6801 12800 +210 9 1 6961 16800 +211 7 3 16721 12800 +212 4 2 8081 6800 +213 3 3 3121 4800 +214 6 0 5041 10800 +215 1 3 1521 800 +216 0 0 0 -1000001 +217 0 0 0 -1000001 +218 0 0 0 -1000001 +219 0 0 0 -1000001 +220 0 0 0 -1000001 +221 0 0 0 -1000001 +222 0 0 0 -1000001 +223 0 0 0 -1000001 +224 0 0 0 -1000001 +225 0 0 0 -1000001 +226 0 0 0 -1000001 +227 0 0 0 -1000001 +228 0 0 0 -1000001 +229 0 0 0 -1000001 +230 0 0 0 -1000001 +231 0 0 0 -1000001 +232 0 0 0 -1000001 +233 0 0 0 -1000001 +234 0 0 0 -1000001 +235 0 0 0 -1000001 +236 0 0 0 -1000001 +237 0 0 0 -1000001 +238 0 0 0 -1000001 +239 0 0 0 -1000001 +240 0 0 0 -1000001 +241 0 0 0 -1000001 +242 0 0 0 -1000001 +243 0 0 0 -1000001 +244 0 0 0 -1000001 +245 0 0 0 -1000001 +246 0 0 0 -1000001 +247 0 0 0 -1000001 +248 0 0 0 -1000001 +249 0 0 0 -1000001 +250 0 0 0 -1000001 +251 0 0 0 -1000001 +252 0 0 0 -1000001 +253 0 0 0 -1000001 +254 0 0 0 -1000001 +255 0 0 0 -1000001 +256 0 0 0 -1000001 +257 0 0 0 -1000001 +258 0 0 0 -1000001 +259 0 0 0 -1000001 +260 0 0 0 -1000001 +261 0 0 0 -1000001 +262 0 0 0 -1000001 +263 0 0 0 -1000001 +264 0 0 0 -1000001 +265 0 0 0 -1000001 +266 0 0 0 -1000001 +267 0 0 0 -1000001 +268 0 0 0 -1000001 +269 0 0 0 -1000001 +270 0 0 0 -1000001 +271 0 0 0 -1000001 +272 0 0 0 -1000001 +273 0 0 0 -1000001 +274 0 0 0 -1000001 +275 0 0 0 -1000001 +276 0 0 0 -1000001 +277 0 0 0 -1000001 +278 0 0 0 -1000001 +279 0 0 0 -1000001 +280 0 0 0 -1000001 +281 0 0 0 -1000001 +282 0 0 0 -1000001 +283 0 0 0 -1000001 +284 0 0 0 -1000001 +285 0 0 0 -1000001 +286 0 0 0 -1000001 +287 0 0 0 -1000001 +288 0 0 0 -1000001 +289 0 0 0 -1000001 +290 0 0 0 -1000001 +291 0 0 0 -1000001 +292 0 0 0 -1000001 +293 0 0 0 -1000001 +294 0 0 0 -1000001 +295 0 0 0 -1000001 +296 0 0 0 -1000001 +297 0 0 0 -1000001 +298 0 0 0 -1000001 +299 0 0 0 -1000001 +300 0 0 0 -1000001 +301 0 0 0 -1000001 +302 0 0 0 -1000001 +303 0 0 0 -1000001 +304 0 0 0 -1000001 +305 0 0 0 -1000001 +306 0 0 0 -1000001 +307 0 0 0 -1000001 +308 0 0 0 -1000001 +309 0 0 0 -1000001 +310 0 0 0 -1000001 +311 0 0 0 -1000001 +312 0 0 0 -1000001 +313 0 0 0 -1000001 +314 0 0 0 -1000001 +315 0 0 0 -1000001 +316 0 0 0 -1000001 +317 0 0 0 -1000001 +318 0 0 0 -1000001 +319 0 0 0 -1000001 +320 0 0 0 -1000001 +321 0 0 0 -1000001 +322 0 0 0 -1000001 +323 0 0 0 -1000001 +324 0 0 0 -1000001 +325 0 0 0 -1000001 +326 0 0 0 -1000001 +327 0 0 0 -1000001 +328 0 0 0 -1000001 +329 0 0 0 -1000001 +330 0 3 9121 18100 +331 0 3 4481 18100 +332 0 7 -539 2260 +333 0 6 24541 14260 +334 0 0 20321 -500 +335 0 0 20641 -500 +336 0 6 24541 1340 +337 0 0 21841 -500 +338 0 6 24541 5340 +339 0 6 24541 5021 +340 0 6 24541 9130 +341 0 6 24541 9340 +342 0 3 22731 18100 +343 0 6 24541 12800 +344 0 7 -539 8800 +345 0 7 -539 14800 +346 0 3 10091 18100 +347 0 3 14071 18100 +348 0 7 -539 12800 +349 0 7 -539 6800 +350 0 3 3991 18100 +351 0 0 7351 -500 +352 0 0 13611 -500 +353 0 0 14091 -500 +354 0 0 18571 -500 +355 0 0 19051 -500 +356 0 6 24541 10800 +357 0 6 24541 6800 +358 0 3 16491 18100 +359 0 3 15211 18100 +360 0 3 16011 18100 +361 0 7 -539 8960 +362 0 3 8651 18100 +363 0 3 9281 18100 +364 0 3 13431 18100 +365 0 3 7851 18100 +366 0 0 3691 -500 +367 0 3 7691 18100 diff -Nru graywolf-0.1.5/tests/map9v3/map9v3.cel graywolf-0.1.6/tests/map9v3/map9v3.cel --- graywolf-0.1.5/tests/map9v3/map9v3.cel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3/map9v3.cel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,4148 @@ +cell 0 BUFX4_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf3 layer 1 89 -300 +cell 1 BUFX4_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf2 layer 1 89 -300 +cell 2 BUFX4_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf1 layer 1 89 -300 +cell 3 BUFX2_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n76 layer 1 -160 -140 +pin name Y signal $abc$733$n76_bF$buf0 layer 1 170 0 +cell 4 BUFX4_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf4 layer 1 89 -300 +cell 5 BUFX4_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf3 layer 1 89 -300 +cell 6 BUFX4_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf2 layer 1 89 -300 +cell 7 BUFX4_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf1 layer 1 89 -300 +cell 8 BUFX4_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf0 layer 1 89 -300 +cell 9 BUFX2_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf4 layer 1 170 0 +cell 10 BUFX2_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf3 layer 1 170 0 +cell 11 BUFX2_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf2 layer 1 170 0 +cell 12 BUFX2_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf1 layer 1 170 0 +cell 13 BUFX2_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf0 layer 1 170 0 +cell 14 BUFX2_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf3 layer 1 170 0 +cell 15 BUFX2_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf2 layer 1 170 0 +cell 16 BUFX2_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf1 layer 1 170 0 +cell 17 BUFX2_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf0 layer 1 170 0 +cell 18 INVX4_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<0> layer 1 -160 -340 +pin name Y signal $abc$733$n75_1 layer 1 0 0 +cell 19 INVX8_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -320 -340 +pin name Y signal $abc$733$n76 layer 1 -160 410 +cell 20 NOR2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 160 -61 +pin name Y signal $abc$733$n77 layer 1 0 -300 +cell 21 NOR2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<4> layer 1 160 -61 +pin name Y signal $abc$733$n78 layer 1 0 -300 +cell 22 NAND2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n78 layer 1 160 140 +pin name Y signal $abc$733$n79 layer 1 100 -680 +cell 23 NOR2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 -61 +pin name Y signal $abc$733$n80 layer 1 0 -300 +cell 24 NOR2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 160 -61 +pin name Y signal $abc$733$n81 layer 1 0 -300 +cell 25 NAND2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n80 layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n82 layer 1 100 -680 +cell 26 NOR2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n82 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n83_1 layer 1 0 -300 +cell 27 OAI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf3 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n83_1 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$546$n2 layer 1 50 -100 +cell 28 INVX1_1 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<4> layer 1 -80 -540 +pin name Y signal $abc$733$n85_1 layer 1 80 0 +cell 29 INVX1_2 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<1> layer 1 -80 -540 +pin name Y signal $abc$733$n86 layer 1 80 0 +cell 30 INVX1_3 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal start layer 1 -80 -540 +pin name Y signal $abc$733$n87_1 layer 1 80 0 +cell 31 NOR2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal startbuf layer 1 -160 -540 +pin name B signal $abc$733$n87_1 layer 1 160 -61 +pin name Y signal $abc$733$n88 layer 1 0 -300 +cell 32 OAI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n86 layer 1 -160 -330 +pin name B signal $abc$733$n88 layer 1 -80 -140 +pin name C signal $abc$733$n85_1 layer 1 160 300 +pin name Y signal $abc$546$n5 layer 1 50 -100 +cell 33 INVX1_4 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -80 -540 +pin name Y signal $abc$733$n90 layer 1 80 0 +cell 34 NAND3X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<2> layer 1 -240 60 +pin_group +pin name $abc$733$n75_1_bF$pin/B signal $abc$733$n75_1_bF$buf2 layer 1 -40 -100 +end_pin_group +pin_group +pin name $abc$733$n76_bF$pin/C signal $abc$733$n76_bF$buf2 layer 1 80 260 +end_pin_group +pin name Y signal $abc$733$n91_1 layer 1 -80 680 +cell 35 NOR2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n92 layer 1 0 -300 +cell 36 AOI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n90 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n92 layer 1 240 -501 +pin name Y signal dp<1>_FF_INPUT layer 1 80 -680 +cell 37 INVX1_5 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -80 -540 +pin name Y signal $abc$733$n94 layer 1 80 0 +cell 38 INVX1_6 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -80 -540 +pin name Y signal $abc$733$n95_1 layer 1 80 0 +cell 39 MUX2X1_1 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n94 layer 1 240 -61 +pin name B signal $abc$733$n95_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<2>_FF_INPUT layer 1 19 500 +cell 40 INVX1_7 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -80 -540 +pin name Y signal $abc$733$n97_1 layer 1 80 0 +cell 41 INVX1_8 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -80 -540 +pin name Y signal $abc$733$n98_1 layer 1 80 0 +cell 42 MUX2X1_2 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n97_1 layer 1 240 -61 +pin name B signal $abc$733$n98_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<3>_FF_INPUT layer 1 19 500 +cell 43 INVX1_9 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -80 -540 +pin name Y signal $abc$733$n100 layer 1 80 0 +cell 44 INVX1_10 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -80 -540 +pin name Y signal $abc$733$n101_1 layer 1 80 0 +cell 45 MUX2X1_3 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n100 layer 1 240 -61 +pin name B signal $abc$733$n101_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<4>_FF_INPUT layer 1 19 500 +cell 46 INVX1_11 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -80 -540 +pin name Y signal $abc$733$n103_1 layer 1 80 0 +cell 47 INVX1_12 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -80 -540 +pin name Y signal $abc$733$n104 layer 1 80 0 +cell 48 MUX2X1_4 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n103_1 layer 1 240 -61 +pin name B signal $abc$733$n104 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<5>_FF_INPUT layer 1 19 500 +cell 49 INVX1_13 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -80 -540 +pin name Y signal $abc$733$n106_1 layer 1 80 0 +cell 50 INVX1_14 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -80 -540 +pin name Y signal $abc$733$n107 layer 1 80 0 +cell 51 MUX2X1_5 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n106_1 layer 1 240 -61 +pin name B signal $abc$733$n107 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<6>_FF_INPUT layer 1 19 500 +cell 52 INVX1_15 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -80 -540 +pin name Y signal $abc$733$n109 layer 1 80 0 +cell 53 INVX1_16 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -80 -540 +pin name Y signal $abc$733$n110_1 layer 1 80 0 +cell 54 MUX2X1_6 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n109 layer 1 240 -61 +pin name B signal $abc$733$n110_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<7>_FF_INPUT layer 1 19 500 +cell 55 INVX1_17 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -80 -540 +pin name Y signal $abc$733$n112 layer 1 80 0 +cell 56 INVX1_18 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -80 -540 +pin name Y signal $abc$733$n113 layer 1 80 0 +cell 57 MUX2X1_7 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n112 layer 1 240 -61 +pin name B signal $abc$733$n113 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<8>_FF_INPUT layer 1 19 500 +cell 58 INVX1_19 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -80 -540 +pin name Y signal $abc$733$n115 layer 1 80 0 +cell 59 NOR2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n116_1 layer 1 0 -300 +cell 60 AOI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n115 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n116_1 layer 1 240 -501 +pin name Y signal dp<0>_FF_INPUT layer 1 80 -680 +cell 61 XNOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<7> layer 1 439 -300 +pin name Y signal $abc$733$n118_1 layer 1 50 -500 +cell 62 NOR2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -540 +pin name B signal $abc$733$n101_1 layer 1 160 -61 +pin name Y signal $abc$733$n119 layer 1 0 -300 +cell 63 NOR2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -540 +pin name B signal $abc$733$n104 layer 1 160 -61 +pin name Y signal $abc$733$n120 layer 1 0 -300 +cell 64 OAI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n119 layer 1 -160 -330 +pin name B signal $abc$733$n120 layer 1 -80 -140 +pin name C signal $abc$733$n118_1 layer 1 160 300 +pin name Y signal $abc$733$n121 layer 1 50 -100 +cell 65 NOR2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -540 +pin name B signal $abc$733$n107 layer 1 160 -61 +pin name Y signal $abc$733$n122 layer 1 0 -300 +cell 66 NOR2X1_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -540 +pin name B signal $abc$733$n113 layer 1 160 -61 +pin name Y signal $abc$733$n123_1 layer 1 0 -300 +cell 67 XNOR2X1_2 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<4> layer 1 439 -300 +pin name Y signal $abc$733$n124 layer 1 50 -500 +cell 68 OAI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n122 layer 1 -160 -330 +pin name B signal $abc$733$n123_1 layer 1 -80 -140 +pin name C signal $abc$733$n124 layer 1 160 300 +pin name Y signal $abc$733$n125 layer 1 50 -100 +cell 69 NAND2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n121 layer 1 -160 -340 +pin name B signal $abc$733$n125 layer 1 160 140 +pin name Y signal $abc$733$n126 layer 1 100 -680 +cell 70 OAI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<3> layer 1 -160 -330 +pin name B signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n127 layer 1 50 -100 +cell 71 AOI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n126 layer 1 -160 -70 +pin name B signal state<3> layer 1 -80 -261 +pin name C signal $abc$733$n127 layer 1 240 -501 +pin name Y signal sr<0>_FF_INPUT layer 1 80 -680 +cell 72 OAI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n129 layer 1 50 -100 +cell 73 AOI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n98_1 layer 1 -80 -261 +pin name C signal $abc$733$n129 layer 1 240 -501 +pin name Y signal sr<2>_FF_INPUT layer 1 80 -680 +cell 74 OAI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n131 layer 1 50 -100 +cell 75 AOI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n101_1 layer 1 -80 -261 +pin name C signal $abc$733$n131 layer 1 240 -501 +pin name Y signal sr<3>_FF_INPUT layer 1 80 -680 +cell 76 OAI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n133_1 layer 1 50 -100 +cell 77 AOI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n104 layer 1 -80 -261 +pin name C signal $abc$733$n133_1 layer 1 240 -501 +pin name Y signal sr<4>_FF_INPUT layer 1 80 -680 +cell 78 OAI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n135_1 layer 1 50 -100 +cell 79 AOI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n107 layer 1 -80 -261 +pin name C signal $abc$733$n135_1 layer 1 240 -501 +pin name Y signal sr<5>_FF_INPUT layer 1 80 -680 +cell 80 OAI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n137 layer 1 50 -100 +cell 81 AOI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n110_1 layer 1 -80 -261 +pin name C signal $abc$733$n137 layer 1 240 -501 +pin name Y signal sr<6>_FF_INPUT layer 1 80 -680 +cell 82 OAI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n139 layer 1 50 -100 +cell 83 AOI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n113 layer 1 -80 -261 +pin name C signal $abc$733$n139 layer 1 240 -501 +pin name Y signal sr<7>_FF_INPUT layer 1 80 -680 +cell 84 INVX1_20 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<1> layer 1 -80 -540 +pin name Y signal $abc$733$n141 layer 1 80 0 +cell 85 NOR2X1_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -540 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 160 -61 +end_pin_group +pin name Y signal $abc$733$n142 layer 1 0 -300 +cell 86 AND2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -240 -261 +end_pin_group +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -80 -100 +pin name Y signal $abc$733$n143 layer 1 179 -680 +cell 87 OAI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n142 layer 1 -160 -330 +pin name B signal $abc$733$n143 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n144 layer 1 50 -100 +cell 88 OAI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf1 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n141 layer 1 -80 -140 +pin name C signal $abc$733$n144 layer 1 160 300 +pin name Y signal counter<0>_FF_INPUT layer 1 50 -100 +cell 89 NOR2X1_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -540 +pin name B signal N<2> layer 1 160 -61 +pin name Y signal $abc$733$n146 layer 1 0 -300 +cell 90 NAND2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -340 +pin name B signal N<2> layer 1 160 140 +pin name Y signal $abc$733$n147 layer 1 100 -680 +cell 91 INVX1_21 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $abc$733$n147 layer 1 -80 -540 +pin name Y signal $abc$733$n148 layer 1 80 0 +cell 92 OAI21X1_14 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n146 layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n149 layer 1 50 -100 +cell 93 AND2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n81 layer 1 -240 -261 +pin name B signal state<3> layer 1 -80 -100 +pin name Y signal $abc$733$n150 layer 1 179 -680 +cell 94 INVX1_22 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -80 -540 +pin name Y signal $abc$733$n151_1 layer 1 80 0 +cell 95 NOR2X1_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n151_1 layer 1 -160 -540 +pin name B signal $abc$733$n142 layer 1 160 -61 +pin name Y signal $abc$733$n152 layer 1 0 -300 +cell 96 OAI21X1_15 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n150 layer 1 -160 -330 +pin name B signal $abc$733$n152 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n153_1 layer 1 50 -100 +cell 97 NAND2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n149 layer 1 -160 -340 +pin name B signal $abc$733$n153_1 layer 1 160 140 +pin name Y signal counter<1>_FF_INPUT layer 1 100 -680 +cell 98 NAND2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<3> layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n155 layer 1 100 -680 +cell 99 XOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $abc$733$n155 layer 1 -410 -290 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 439 -300 +pin name Y signal $abc$733$n156 layer 1 0 -700 +cell 100 INVX1_23 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<3> layer 1 -80 -540 +pin name Y signal $abc$733$n157 layer 1 80 0 +cell 101 NAND2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n157 layer 1 -160 -340 +pin name B signal $abc$733$n147 layer 1 160 140 +pin name Y signal $abc$733$n158_1 layer 1 100 -680 +cell 102 NAND2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -340 +pin name B signal $abc$733$n148 layer 1 160 140 +pin name Y signal $abc$733$n159 layer 1 100 -680 +cell 103 NAND3X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n158_1 layer 1 -40 -100 +pin name C signal $abc$733$n159 layer 1 80 260 +pin name Y signal $abc$733$n160_1 layer 1 -80 680 +cell 104 OAI21X1_16 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n156 layer 1 -80 -140 +pin name C signal $abc$733$n160_1 layer 1 160 300 +pin name Y signal counter<2>_FF_INPUT layer 1 50 -100 +cell 105 OAI21X1_17 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<3> layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal N<4> layer 1 160 300 +pin name Y signal $abc$733$n162_1 layer 1 50 -100 +cell 106 INVX1_24 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<4> layer 1 -80 -540 +pin name Y signal $abc$733$n163_1 layer 1 80 0 +cell 107 NAND3X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n157 layer 1 -240 60 +pin name B signal $abc$733$n163_1 layer 1 -40 -100 +pin name C signal $abc$733$n147 layer 1 80 260 +pin name Y signal $abc$733$n164_1 layer 1 -80 680 +cell 108 NAND2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -340 +pin name B signal $abc$733$n162_1 layer 1 160 140 +pin name Y signal $abc$733$n165 layer 1 100 -680 +cell 109 OR2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -240 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -40 -221 +pin name Y signal $abc$733$n166 layer 1 240 -100 +cell 110 OAI21X1_18 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<3> layer 1 160 300 +pin name Y signal $abc$733$n167 layer 1 50 -100 +cell 111 OAI21X1_19 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n166 layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $abc$733$n167 layer 1 160 300 +pin name Y signal $abc$733$n168 layer 1 50 -100 +cell 112 NAND2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf3 layer 1 -160 -340 +end_pin_group +pin name B signal $abc$733$n168 layer 1 160 140 +pin name Y signal $abc$733$n169 layer 1 100 -680 +cell 113 OAI21X1_20 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf2 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n165 layer 1 -80 -140 +pin name C signal $abc$733$n169 layer 1 160 300 +pin name Y signal counter<3>_FF_INPUT layer 1 50 -100 +cell 114 INVX1_25 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<5> layer 1 -80 -540 +pin name Y signal $abc$733$n171 layer 1 80 0 +cell 115 NOR2X1_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -540 +pin name B signal N<4> layer 1 160 -61 +pin name Y signal $abc$733$n172 layer 1 0 -300 +cell 116 AOI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n172 layer 1 -160 -70 +pin name B signal $abc$733$n147 layer 1 -80 -261 +pin name C signal $abc$733$n171 layer 1 240 -501 +pin name Y signal $abc$733$n173 layer 1 80 -680 +cell 117 OAI21X1_21 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n174 layer 1 50 -100 +cell 118 NOR2X1_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -540 +pin name B signal $abc$733$n166 layer 1 160 -61 +pin name Y signal $abc$733$n175 layer 1 0 -300 +cell 119 NAND2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n150 layer 1 160 140 +pin name Y signal $abc$733$n176 layer 1 100 -680 +cell 120 AOI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n175 layer 1 -240 -70 +pin name B signal $abc$733$n150 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<4> layer 1 320 -61 +pin name D signal $abc$733$n176 layer 1 140 -180 +pin name Y signal $abc$733$n177 layer 1 10 -431 +cell 121 OAI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n173 layer 1 -240 -330 +pin name B signal $abc$733$n174 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n177 layer 1 160 -140 +pin name Y signal counter<4>_FF_INPUT layer 1 0 -300 +cell 122 OAI21X1_22 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal N<6> layer 1 160 300 +pin name Y signal $abc$733$n179 layer 1 50 -100 +cell 123 OR2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -240 -540 +pin name B signal N<6> layer 1 -40 -221 +pin name Y signal $abc$733$n180 layer 1 240 -100 +cell 124 OAI21X1_23 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -330 +pin name B signal $abc$733$n180 layer 1 -80 -140 +pin name C signal $abc$733$n179 layer 1 160 300 +pin name Y signal $abc$733$n181 layer 1 50 -100 +cell 125 NOR2X1_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n155 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n182 layer 1 0 -300 +cell 126 INVX1_26 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -80 -540 +pin name Y signal $abc$733$n183 layer 1 80 0 +cell 127 AOI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n175 layer 1 -160 -70 +pin name B signal $abc$733$n150 layer 1 -80 -261 +pin name C signal $abc$733$n183 layer 1 240 -501 +pin name Y signal $abc$733$n184 layer 1 80 -680 +cell 128 OAI21X1_24 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -160 -330 +pin name B signal $abc$733$n184 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n185 layer 1 50 -100 +cell 129 OAI21X1_25 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf0 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n181 layer 1 -80 -140 +pin name C signal $abc$733$n185 layer 1 160 300 +pin name Y signal counter<5>_FF_INPUT layer 1 50 -100 +cell 130 INVX1_27 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<7> layer 1 -80 -540 +pin name Y signal $abc$733$n187 layer 1 80 0 +cell 131 NOR2X1_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n180 layer 1 -160 -540 +pin name B signal $abc$733$n164_1 layer 1 160 -61 +pin name Y signal $abc$733$n188 layer 1 0 -300 +cell 132 NOR2X1_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n187 layer 1 -160 -540 +pin name B signal $abc$733$n188 layer 1 160 -61 +pin name Y signal $abc$733$n189 layer 1 0 -300 +cell 133 NOR2X1_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<5> layer 1 -160 -540 +pin name B signal N<6> layer 1 160 -61 +pin name Y signal $abc$733$n190 layer 1 0 -300 +cell 134 NAND3X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n147 layer 1 -240 60 +pin name B signal $abc$733$n172 layer 1 -40 -100 +pin name C signal $abc$733$n190 layer 1 80 260 +pin name Y signal $abc$733$n191 layer 1 -80 680 +cell 135 OAI21X1_26 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n192 layer 1 50 -100 +cell 136 INVX1_28 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -80 -540 +pin name Y signal $abc$733$n193 layer 1 80 0 +cell 137 AND2X2_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n77 layer 1 -240 -261 +pin name B signal $abc$733$n78 layer 1 -80 -100 +pin name Y signal $abc$733$n194 layer 1 179 -680 +cell 138 NAND3X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n193 layer 1 -240 60 +pin name B signal $abc$733$n150 layer 1 -40 -100 +pin name C signal $abc$733$n194 layer 1 80 260 +pin name Y signal $abc$733$n195 layer 1 -80 680 +cell 139 OAI21X1_27 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n155 layer 1 -160 -330 +pin name B signal $abc$733$n79 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 300 +pin name Y signal $abc$733$n196 layer 1 50 -100 +cell 140 AND2X2_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n195 layer 1 -240 -261 +pin name B signal $abc$733$n196 layer 1 -80 -100 +pin name Y signal $abc$733$n197 layer 1 179 -680 +cell 141 OAI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n189 layer 1 -240 -330 +pin name B signal $abc$733$n192 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n197 layer 1 160 -140 +pin name Y signal counter<6>_FF_INPUT layer 1 0 -300 +cell 142 OAI21X1_28 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal N<8> layer 1 160 300 +pin name Y signal $abc$733$n199 layer 1 50 -100 +cell 143 INVX1_29 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<8> layer 1 -80 -540 +pin name Y signal $abc$733$n200 layer 1 80 0 +cell 144 NAND3X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n187 layer 1 -240 60 +pin name B signal $abc$733$n200 layer 1 -40 -100 +pin name C signal $abc$733$n188 layer 1 80 260 +pin name Y signal $abc$733$n201 layer 1 -80 680 +cell 145 NAND3X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n199 layer 1 -40 -100 +pin name C signal $abc$733$n201 layer 1 80 260 +pin name Y signal $abc$733$n202 layer 1 -80 680 +cell 146 AOI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -240 -70 +pin name B signal $abc$733$n83_1 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<7> layer 1 320 -61 +pin name D signal $abc$733$n195 layer 1 140 -180 +pin name Y signal $abc$733$n203 layer 1 10 -431 +cell 147 OAI21X1_29 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n203 layer 1 -80 -140 +pin name C signal $abc$733$n202 layer 1 160 300 +pin name Y signal counter<7>_FF_INPUT layer 1 50 -100 +cell 148 INVX1_30 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -80 -540 +pin name Y signal $abc$733$n205 layer 1 80 0 +cell 149 INVX1_31 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<2> layer 1 -80 -540 +pin name Y signal $abc$733$n206 layer 1 80 0 +cell 150 NAND3X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<4> layer 1 -240 60 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -40 -100 +end_pin_group +pin name C signal $abc$733$n206 layer 1 80 260 +pin name Y signal $abc$733$n207 layer 1 -80 680 +cell 151 AOI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n207 layer 1 -160 -70 +pin name B signal $abc$733$n205 layer 1 -80 -261 +pin name C signal state<0> layer 1 240 -501 +pin name Y signal done_FF_INPUT layer 1 80 -680 +cell 152 OAI21X1_30 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf2 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n209 layer 1 50 -100 +cell 153 AOI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf1 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n95_1 layer 1 -80 -261 +pin name C signal $abc$733$n209 layer 1 240 -501 +pin name Y signal sr<1>_FF_INPUT layer 1 80 -680 +cell 154 AND2X2_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n88 layer 1 -240 -261 +pin name B signal state<1> layer 1 -80 -100 +pin name Y signal $abc$546$n149 layer 1 179 -680 +cell 155 AND2X2_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -240 -261 +pin name B signal $abc$733$n80 layer 1 -80 -100 +pin name Y signal $abc$546$n150 layer 1 179 -680 +cell 156 INVX8_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal reset layer 1 -320 -340 +pin name Y signal $abc$733$n164 layer 1 -160 410 +cell 157 BUFX2_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -140 +pin name Y signal counter<0> layer 1 170 0 +cell 158 BUFX2_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -140 +pin name Y signal counter<1> layer 1 170 0 +cell 159 BUFX2_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -140 +pin name Y signal counter<2> layer 1 170 0 +cell 160 BUFX2_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -140 +pin name Y signal counter<3> layer 1 170 0 +cell 161 BUFX2_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -140 +pin name Y signal counter<4> layer 1 170 0 +cell 162 BUFX2_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -140 +pin name Y signal counter<5> layer 1 170 0 +cell 163 BUFX2_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -160 -140 +pin name Y signal counter<6> layer 1 170 0 +cell 164 BUFX2_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -140 +pin name Y signal counter<7> layer 1 170 0 +cell 165 BUFX2_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -160 -140 +pin name Y signal done layer 1 170 0 +cell 166 BUFX2_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -160 -140 +pin name Y signal dp<0> layer 1 170 0 +cell 167 BUFX2_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -160 -140 +pin name Y signal dp<1> layer 1 170 0 +cell 168 BUFX2_22 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -160 -140 +pin name Y signal dp<2> layer 1 170 0 +cell 169 BUFX2_23 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -160 -140 +pin name Y signal dp<3> layer 1 170 0 +cell 170 BUFX2_24 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -160 -140 +pin name Y signal dp<4> layer 1 170 0 +cell 171 BUFX2_25 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -160 -140 +pin name Y signal dp<5> layer 1 170 0 +cell 172 BUFX2_26 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -160 -140 +pin name Y signal dp<6> layer 1 170 0 +cell 173 BUFX2_27 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -160 -140 +pin name Y signal dp<7> layer 1 170 0 +cell 174 BUFX2_28 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -160 -140 +pin name Y signal dp<8> layer 1 170 0 +cell 175 BUFX2_29 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -140 +pin name Y signal sr<0> layer 1 170 0 +cell 176 BUFX2_30 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -140 +pin name Y signal sr<1> layer 1 170 0 +cell 177 BUFX2_31 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -140 +pin name Y signal sr<2> layer 1 170 0 +cell 178 BUFX2_32 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -140 +pin name Y signal sr<3> layer 1 170 0 +cell 179 BUFX2_33 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -140 +pin name Y signal sr<4> layer 1 170 0 +cell 180 BUFX2_34 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -140 +pin name Y signal sr<5> layer 1 170 0 +cell 181 BUFX2_35 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -140 +pin name Y signal sr<6> layer 1 170 0 +cell 182 BUFX2_36 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -140 +pin name Y signal sr<7> layer 1 170 0 +cell 183 DFFSR_1 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n149 layer 1 -400 -340 +pin name Q signal state<0> layer 1 1520 449 +pin name R signal vdd layer 1 -1040 -90 +pin_group +pin name $abc$733$n164_bF$pin/S signal $abc$733$n164_bF$buf4 layer 1 -1020 59 +end_pin_group +cell 184 DFFSR_2 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n5 layer 1 -400 -340 +pin name Q signal state<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 185 DFFSR_3 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n150 layer 1 -400 -340 +pin name Q signal state<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 186 DFFSR_4 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n2 layer 1 -400 -340 +pin name Q signal state<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 187 DFFSR_5 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal state<2> layer 1 -400 -340 +pin name Q signal state<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 188 DFFSR_6 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 189 DFFSR_7 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 190 DFFSR_8 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 191 DFFSR_9 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 192 DFFSR_10 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal dp<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 193 DFFSR_11 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 194 DFFSR_12 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 195 DFFSR_13 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 196 DFFSR_14 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<8>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<8> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 197 DFFSR_15 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal done_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$882 layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 198 DFFSR_16 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 199 DFFSR_17 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 200 DFFSR_18 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 201 DFFSR_19 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal counter<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 202 DFFSR_20 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal counter<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 203 DFFSR_21 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 204 DFFSR_22 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 205 DFFSR_23 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 206 DFFSR_24 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 207 DFFSR_25 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 208 DFFSR_26 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 209 DFFSR_27 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal sr<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 210 DFFSR_28 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal sr<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 211 DFFSR_29 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 212 DFFSR_30 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 213 DFFSR_31 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 214 DFFSR_32 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal start layer 1 -400 -340 +pin name Q signal startbuf layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +pad 1 name twpin_clock +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name clock signal clock layer 1 0 0 + +pad 2 name twpin_reset +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name reset signal reset layer 1 0 0 + +pad 3 name twpin_start +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name start signal start layer 1 0 0 + +pad 4 name twpin_N<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<0> signal N<0> layer 1 0 0 + +pad 5 name twpin_N<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<1> signal N<1> layer 1 0 0 + +pad 6 name twpin_N<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<2> signal N<2> layer 1 0 0 + +pad 7 name twpin_N<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<3> signal N<3> layer 1 0 0 + +pad 8 name twpin_N<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<4> signal N<4> layer 1 0 0 + +pad 9 name twpin_N<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<5> signal N<5> layer 1 0 0 + +pad 10 name twpin_N<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<6> signal N<6> layer 1 0 0 + +pad 11 name twpin_N<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<7> signal N<7> layer 1 0 0 + +pad 12 name twpin_N<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<8> signal N<8> layer 1 0 0 + +pad 13 name twpin_dp<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<0> signal dp<0> layer 1 0 0 + +pad 14 name twpin_dp<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<1> signal dp<1> layer 1 0 0 + +pad 15 name twpin_dp<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<2> signal dp<2> layer 1 0 0 + +pad 16 name twpin_dp<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<3> signal dp<3> layer 1 0 0 + +pad 17 name twpin_dp<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<4> signal dp<4> layer 1 0 0 + +pad 18 name twpin_dp<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<5> signal dp<5> layer 1 0 0 + +pad 19 name twpin_dp<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<6> signal dp<6> layer 1 0 0 + +pad 20 name twpin_dp<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<7> signal dp<7> layer 1 0 0 + +pad 21 name twpin_dp<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<8> signal dp<8> layer 1 0 0 + +pad 22 name twpin_done +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name done signal done layer 1 0 0 + +pad 23 name twpin_counter<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<0> signal counter<0> layer 1 0 0 + +pad 24 name twpin_counter<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<1> signal counter<1> layer 1 0 0 + +pad 25 name twpin_counter<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<2> signal counter<2> layer 1 0 0 + +pad 26 name twpin_counter<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<3> signal counter<3> layer 1 0 0 + +pad 27 name twpin_counter<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<4> signal counter<4> layer 1 0 0 + +pad 28 name twpin_counter<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<5> signal counter<5> layer 1 0 0 + +pad 29 name twpin_counter<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<6> signal counter<6> layer 1 0 0 + +pad 30 name twpin_counter<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<7> signal counter<7> layer 1 0 0 + +pad 31 name twpin_sr<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<0> signal sr<0> layer 1 0 0 + +pad 32 name twpin_sr<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<1> signal sr<1> layer 1 0 0 + +pad 33 name twpin_sr<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<2> signal sr<2> layer 1 0 0 + +pad 34 name twpin_sr<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<3> signal sr<3> layer 1 0 0 + +pad 35 name twpin_sr<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<4> signal sr<4> layer 1 0 0 + +pad 36 name twpin_sr<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<5> signal sr<5> layer 1 0 0 + +pad 37 name twpin_sr<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<6> signal sr<6> layer 1 0 0 + +pad 38 name twpin_sr<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<7> signal sr<7> layer 1 0 0 + + diff -Nru graywolf-0.1.5/tests/map9v3/map9v3.par graywolf-0.1.6/tests/map9v3/map9v3.par --- graywolf-0.1.5/tests/map9v3/map9v3.par 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3/map9v3.par 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,67 @@ +# osu035.par --- Parameter file for GrayWolf +# NOTE: all distance units are in centimicrons unless otherwise stated + +RULES + # values are resistance in ohms/sq and capacitance in fF/um^2 + layer metal1 0.07 0.030 horizontal + layer metal2 0.07 0.017 vertical + layer metal3 0.07 0.006 horizontal + layer metal4 0.04 0.004 vertical + + via via12 metal1 metal2 + via via23 metal2 metal3 + via via34 metal3 metal4 + + width metal1 60 + width metal2 60 + width metal3 60 + width metal4 120 + width via12 60 + width via23 60 + width via34 120 + + # Set spacing = track pitch - width, so that GrayWolf places pins + # on the right pitch. + # Pitches are (in um): + # metal1 = 200, metal2 = 160, metal3 = 200, metal4 = 320 + + spacing metal1 metal1 140 + spacing metal2 metal2 100 + spacing metal3 metal3 140 + spacing metal4 metal4 200 + + # Stacked vias allowed + spacing via12 via23 0 + spacing via23 via34 0 + + overhang via12 metal1 8 + overhang via12 metal2 6 + + overhang via23 metal2 8 + overhang via23 metal3 6 + + overhang via34 metal3 14 + overhang via34 metal4 16 +ENDRULES + +*vertical_wire_weight : 1.0 +*vertical_path_weight : 1.0 +*padspacing : variable +*rowSep : 0.0 0 +*track.pitch : 160 +*graphics.wait : off +*last_chance.wait : off +*random.seed : 12345 + +TWMC*chip.aspect.ratio : 0.75 + +TWSC*feedThruWidth : 160 layer 1 +TWSC*do.global.route : on +TWSC*ignore_feeds : true +TWSC*call_row_evener : true +TWSC*even_rows_maximally : true +# TWSC*no.graphics : on + +GENR*row_to_tile_spacing: 1 +# GENR*numrows : 6 +GENR*flip_alternate_rows : 1 diff -Nru graywolf-0.1.5/tests/map9v3_other_seed/expected/map9v3_other_seed.pl1 graywolf-0.1.6/tests/map9v3_other_seed/expected/map9v3_other_seed.pl1 --- graywolf-0.1.5/tests/map9v3_other_seed/expected/map9v3_other_seed.pl1 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3_other_seed/expected/map9v3_other_seed.pl1 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,253 @@ +NOR2X1_8 -239 -200 241 1800 1 1 +INVX1_19 241 -200 561 1800 1 1 +AOI21X1_2 561 -200 1201 1800 1 1 +BUFX2_28 1201 -200 1681 1800 3 1 +DFFSR_14 1681 -200 5201 1800 3 1 +BUFX2_25 5201 -200 5681 1800 1 1 +DFFSR_7 5681 -200 9201 1800 1 1 +BUFX2_21 9201 -200 9681 1800 1 1 +DFFSR_32 9681 -200 13201 1800 1 1 +BUFX2_12 13201 -200 13681 1800 3 1 +INVX1_22 13681 -200 14001 1800 1 1 +NOR2X1_15 14001 -200 14481 1800 1 1 +NOR2X1_4 14481 -200 14961 1800 1 1 +NOR2X1_13 14961 -200 15441 1800 1 1 +AND2X2_1 15441 -200 16081 1800 1 1 +OAI21X1_12 16081 -200 16721 1800 1 1 +OAI21X1_13 16721 -200 17361 1800 3 1 +BUFX2_11 17361 -200 17841 1800 1 1 +DFFSR_16 17841 -200 21361 1800 3 1 +INVX1_20 21361 -200 21681 1800 3 1 +XOR2X1_1 21681 -200 22801 1800 1 1 +NOR2X1_16 22801 -200 23281 1800 3 1 +BUFX2_20 -239 1800 241 3800 2 2 +DFFSR_6 241 1800 3761 3800 2 2 +INVX1_17 3761 1800 4081 3800 0 2 +DFFSR_11 4081 1800 7601 3800 2 2 +AOI21X1_1 7601 1800 8241 3800 2 2 +NOR2X1_7 8241 1800 8721 3800 2 2 +INVX1_4 8721 1800 9041 3800 2 2 +BUFX2_29 9041 1800 9521 3800 2 2 +DFFSR_24 9521 1800 13041 3800 2 2 +NOR2X1_6 13041 1800 13521 3800 0 2 +INVX1_3 13521 1800 13841 3800 0 2 +DFFSR_17 13841 1800 17361 3800 2 2 +NAND2X1_5 17361 1800 17841 3800 2 2 +DFFSR_23 17841 1800 21361 3800 0 2 +OAI21X1_14 21361 1800 22001 3800 2 2 +NOR2X1_14 22001 1800 22481 3800 2 2 +INVX1_21 22481 1800 22801 3800 2 2 +NAND2X1_4 22801 1800 23281 3800 2 2 +BUFX2_22 -239 3800 241 5800 3 3 +DFFSR_8 241 3800 3761 5800 3 3 +MUX2X1_7 3761 3800 4721 5800 3 3 +INVX1_5 4721 3800 5041 5800 1 3 +MUX2X1_1 5041 3800 6001 5800 3 3 +INVX1_11 6001 3800 6321 5800 1 3 +MUX2X1_4 6321 3800 7281 5800 3 3 +AOI21X1_13 7281 3800 7921 5800 1 3 +INVX1_6 7921 3800 8241 5800 3 3 +OAI21X1_30 8241 3800 8881 5800 3 3 +BUFX4_1 8881 3800 9521 5800 1 3 +OAI21X1_5 9521 3800 10161 5800 1 3 +AOI21X1_3 10161 3800 10801 5800 3 3 +BUFX2_7 10801 3800 11281 5800 3 3 +DFFSR_2 11281 3800 14801 5800 1 3 +INVX4_1 14801 3800 15281 5800 1 3 +BUFX2_10 15281 3800 15761 5800 1 3 +OAI21X1_1 15761 3800 16401 5800 1 3 +AND2X2_2 16401 3800 17041 5800 1 3 +OAI21X1_15 17041 3800 17681 5800 3 3 +AOI22X1_2 17681 3800 18481 5800 1 3 +OAI21X1_29 18481 3800 19121 5800 1 3 +OAI22X1_2 19121 3800 19921 5800 3 3 +NOR2X1_20 19921 3800 20401 5800 3 3 +NAND3X1_6 20401 3800 21041 5800 3 3 +NAND3X1_7 21041 3800 21681 5800 3 3 +INVX1_29 21681 3800 22001 5800 3 3 +INVX1_27 22001 3800 22321 5800 3 3 +OAI21X1_26 22321 3800 22961 5800 3 3 +OAI21X1_28 22961 3800 23601 5800 1 3 +BUFX2_26 -239 5800 241 7800 2 4 +DFFSR_12 241 5800 3761 7800 2 4 +INVX1_13 3761 5800 4081 7800 0 4 +MUX2X1_5 4081 5800 5041 7800 2 4 +DFFSR_25 5041 5800 8561 7800 0 4 +INVX8_1 8561 5800 9361 7800 2 4 +BUFX2_3 9361 5800 9841 7800 2 4 +BUFX4_6 9841 5800 10481 7800 0 4 +BUFX4_8 10481 5800 11121 7800 0 4 +BUFX2_2 11121 5800 11601 7800 0 4 +BUFX4_5 11601 5800 12241 7800 0 4 +OAI21X1_2 12241 5800 12881 7800 2 4 +INVX1_2 12881 5800 13201 7800 2 4 +AND2X2_5 13201 5800 13841 7800 0 4 +DFFSR_4 13841 5800 17361 7800 2 4 +AND2X2_4 17361 5800 18001 7800 2 4 +NOR2X1_3 18001 5800 18481 7800 0 4 +DFFSR_22 18481 5800 22001 7800 0 4 +BUFX2_17 22001 5800 22481 7800 0 4 +BUFX2_18 22481 5800 22961 7800 0 4 +NOR2X1_21 22961 5800 23441 7800 2 4 +BUFX2_23 -239 7800 241 9800 3 5 +DFFSR_9 241 7800 3761 9800 3 5 +INVX1_14 3761 7800 4081 9800 1 5 +DFFSR_29 4081 7800 7601 9800 3 5 +AOI21X1_7 7601 7800 8241 9800 1 5 +OAI21X1_9 8241 7800 8881 9800 3 5 +BUFX2_1 8881 7800 9361 9800 1 5 +INVX1_12 9361 7800 9681 9800 1 5 +DFFSR_28 9681 7800 13201 9800 3 5 +INVX1_1 13201 7800 13521 9800 1 5 +DFFSR_1 13521 7800 17041 9800 1 5 +NAND2X1_6 17041 7800 17521 9800 1 5 +AND2X2_6 17521 7800 18161 9800 3 5 +NAND2X1_2 18161 7800 18641 9800 1 5 +NOR2X1_5 18641 7800 19121 9800 1 5 +NOR2X1_18 19121 7800 19601 9800 1 5 +OAI21X1_27 19601 7800 20241 9800 1 5 +NAND3X1_5 20241 7800 20881 9800 3 5 +INVX1_28 20881 7800 21201 9800 3 5 +AOI21X1_10 21201 7800 21841 9800 3 5 +NAND2X1_8 21841 7800 22321 9800 3 5 +OAI21X1_17 22321 7800 22961 9800 1 5 +NAND3X1_4 22961 7800 23601 9800 1 5 +BUFX2_36 -239 9800 241 11800 2 6 +BUFX2_33 241 9800 721 11800 2 6 +INVX1_7 721 9800 1041 11800 0 6 +BUFX2_34 1041 9800 1521 11800 2 6 +MUX2X1_2 1521 9800 2481 11800 2 6 +XNOR2X1_2 2481 9800 3601 11800 2 6 +INVX1_18 3601 9800 3921 11800 0 6 +NOR2X1_12 3921 9800 4401 11800 2 6 +OAI21X1_4 4401 9800 5041 11800 2 6 +NOR2X1_11 5041 9800 5521 11800 0 6 +XNOR2X1_1 5521 9800 6641 11800 2 6 +NAND2X1_3 6641 9800 7121 11800 2 6 +OAI21X1_3 7121 9800 7761 11800 2 6 +NOR2X1_9 7761 9800 8241 11800 0 6 +INVX1_10 8241 9800 8561 11800 2 6 +NOR2X1_10 8561 9800 9041 11800 0 6 +OAI21X1_8 9041 9800 9681 11800 0 6 +AOI21X1_6 9681 9800 10321 11800 0 6 +BUFX2_6 10321 9800 10801 11800 2 6 +NAND3X1_1 10801 9800 11441 11800 2 6 +BUFX2_4 11441 9800 11921 11800 0 6 +DFFSR_5 11921 9800 15441 11800 2 6 +DFFSR_3 15441 9800 18961 11800 2 6 +NAND2X1_1 18961 9800 19441 11800 0 6 +NAND2X1_11 19441 9800 19921 11800 2 6 +AND2X2_3 19921 9800 20561 11800 0 6 +NOR2X1_19 20561 9800 21041 11800 0 6 +INVX1_25 21041 9800 21361 11800 0 6 +NAND3X1_2 21361 9800 22001 11800 2 6 +NAND2X1_7 22001 9800 22481 11800 2 6 +INVX1_23 22481 9800 22801 11800 0 6 +NAND3X1_3 22801 9800 23441 11800 0 6 +DFFSR_31 -239 11800 3281 13800 3 7 +AOI21X1_9 3281 11800 3921 13800 3 7 +AOI21X1_8 3921 11800 4561 13800 1 7 +OAI21X1_11 4561 11800 5201 13800 1 7 +OAI21X1_10 5201 11800 5841 13800 3 7 +INVX1_9 5841 11800 6161 13800 1 7 +MUX2X1_3 6161 11800 7121 13800 3 7 +AOI21X1_5 7121 11800 7761 13800 1 7 +BUFX4_2 7761 11800 8401 13800 3 7 +BUFX4_3 8401 11800 9041 13800 1 7 +AOI21X1_4 9041 11800 9681 13800 1 7 +OAI21X1_6 9681 11800 10321 13800 1 7 +INVX1_8 10321 11800 10641 13800 3 7 +OAI21X1_7 10641 11800 11281 13800 3 7 +BUFX2_9 11281 11800 11761 13800 3 7 +INVX1_31 11761 11800 12081 13800 1 7 +NAND3X1_8 12081 11800 12721 13800 3 7 +AOI21X1_12 12721 11800 13361 13800 1 7 +INVX1_30 13361 11800 13681 13800 3 7 +BUFX4_4 13681 11800 14321 13800 1 7 +BUFX2_8 14321 11800 14801 13800 1 7 +OAI21X1_20 14801 11800 15441 13800 1 7 +NAND2X1_10 15441 11800 15921 13800 3 7 +OAI21X1_25 15921 11800 16561 13800 1 7 +OAI21X1_24 16561 11800 17201 13800 3 7 +INVX1_26 17201 11800 17521 13800 1 7 +AOI21X1_11 17521 11800 18161 13800 3 7 +NOR2X1_17 18161 11800 18641 13800 3 7 +NOR2X1_2 18641 11800 19121 13800 1 7 +AOI22X1_1 19121 11800 19921 13800 3 7 +OAI22X1_1 19921 11800 20721 13800 3 7 +OAI21X1_21 20721 11800 21361 13800 3 7 +OAI21X1_23 21361 11800 22001 13800 1 7 +NAND2X1_9 22001 11800 22481 13800 1 7 +OAI21X1_22 22481 11800 23121 13800 1 7 +OR2X2_2 23121 11800 23761 13800 3 7 +BUFX2_27 -239 13800 241 15800 2 8 +INVX1_15 241 13800 561 15800 0 8 +MUX2X1_6 561 13800 1521 15800 2 8 +INVX1_16 1521 13800 1841 15800 2 8 +DFFSR_30 1841 13800 5361 15800 2 8 +DFFSR_27 5361 13800 8881 15800 2 8 +BUFX2_30 8881 13800 9361 15800 0 8 +BUFX4_7 9361 13800 10001 15800 2 8 +DFFSR_15 10001 13800 13521 15800 0 8 +DFFSR_21 13521 13800 17041 15800 0 8 +OAI21X1_19 17041 13800 17681 15800 2 8 +OAI21X1_18 17681 13800 18321 15800 2 8 +NOR2X1_1 18321 13800 18801 15800 2 8 +DFFSR_20 18801 13800 22321 15800 2 8 +OAI21X1_16 22321 13800 22961 15800 2 8 +INVX1_24 22961 13800 23281 15800 0 8 +DFFSR_13 -239 15800 3281 17800 3 9 +BUFX2_35 3281 15800 3761 17800 3 9 +BUFX2_24 3761 15800 4241 17800 3 9 +BUFX2_32 4241 15800 4721 17800 3 9 +DFFSR_10 4721 15800 8241 17800 3 9 +DFFSR_26 8241 15800 11761 17800 1 9 +BUFX2_31 11761 15800 12241 17800 1 9 +INVX8_2 12241 15800 13041 17800 3 9 +BUFX2_5 13041 15800 13521 17800 1 9 +BUFX2_19 13521 15800 14001 17800 3 9 +DFFSR_19 14001 15800 17521 17800 1 9 +BUFX2_16 17521 15800 18001 17800 3 9 +OR2X2_1 18001 15800 18641 17800 3 9 +BUFX2_14 18641 15800 19121 17800 3 9 +BUFX2_15 19121 15800 19601 17800 1 9 +BUFX2_13 19601 15800 20081 17800 1 9 +DFFSR_18 20081 15800 23601 17800 1 9 +twpin_clock 13041 18000 13201 18200 3 -4 +twpin_reset 12881 18000 13041 18200 3 -4 +twpin_start 10961 -600 11121 -400 0 -3 +twpin_N<0> -639 1260 -439 1420 7 -1 +twpin_N<1> 23961 2380 24161 2540 6 -2 +twpin_N<2> 23961 2860 24161 3020 6 -2 +twpin_N<3> 23961 1260 24161 1420 6 -2 +twpin_N<4> 23961 8720 24161 8880 6 -2 +twpin_N<5> 23961 13260 24161 13420 6 -2 +twpin_N<6> 23961 12720 24161 12880 6 -2 +twpin_N<7> 23961 5050 24161 5210 6 -2 +twpin_N<8> 23961 4420 24161 4580 6 -2 +twpin_dp<0> -639 2720 -439 2880 7 -1 +twpin_dp<1> 9531 -600 9691 -400 0 -3 +twpin_dp<2> -639 4720 -439 4880 7 -1 +twpin_dp<3> -639 8720 -439 8880 7 -1 +twpin_dp<4> 3751 18000 3911 18200 3 -4 +twpin_dp<5> 5531 -600 5691 -400 0 -3 +twpin_dp<6> -639 6720 -439 6880 7 -1 +twpin_dp<7> -639 14720 -439 14880 7 -1 +twpin_dp<8> 1191 -600 1351 -400 0 -3 +twpin_done 13511 18000 13671 18200 3 -4 +twpin_counter<0> 17691 -600 17851 -400 0 -3 +twpin_counter<1> 13191 -600 13351 -400 0 -3 +twpin_counter<2> 19931 18000 20091 18200 3 -4 +twpin_counter<3> 18631 18000 18791 18200 3 -4 +twpin_counter<4> 19451 18000 19611 18200 3 -4 +twpin_counter<5> 17511 18000 17671 18200 3 -4 +twpin_counter<6> 23961 6880 24161 7040 6 -2 +twpin_counter<7> 23961 6720 24161 6880 6 -2 +twpin_sr<0> 9041 -600 9201 -400 0 -3 +twpin_sr<1> 9201 18000 9361 18200 3 -4 +twpin_sr<2> 12091 18000 12251 18200 3 -4 +twpin_sr<3> 4231 18000 4391 18200 3 -4 +twpin_sr<4> -639 10720 -439 10880 7 -1 +twpin_sr<5> -639 11040 -439 11200 7 -1 +twpin_sr<6> 3271 18000 3431 18200 3 -4 +twpin_sr<7> -639 10880 -439 11040 7 -1 diff -Nru graywolf-0.1.5/tests/map9v3_other_seed/expected/map9v3_other_seed.pl2 graywolf-0.1.6/tests/map9v3_other_seed/expected/map9v3_other_seed.pl2 --- graywolf-0.1.5/tests/map9v3_other_seed/expected/map9v3_other_seed.pl2 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3_other_seed/expected/map9v3_other_seed.pl2 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,47 @@ +1 -239 -200 23281 1800 0 0 +2 -239 1800 23281 3800 0 0 +3 -239 3800 23601 5800 0 0 +4 -239 5800 23441 7800 0 0 +5 -239 7800 23601 9800 0 0 +6 -239 9800 23441 11800 0 0 +7 -239 11800 23761 13800 0 0 +8 -239 13800 23281 15800 0 0 +9 -239 15800 23601 17800 0 0 +twpin_clock 13041 18000 13201 18200 3 -4 +twpin_reset 12881 18000 13041 18200 3 -4 +twpin_start 10961 -600 11121 -400 0 -3 +twpin_N<0> -639 1260 -439 1420 7 -1 +twpin_N<1> 23961 2380 24161 2540 6 -2 +twpin_N<2> 23961 2860 24161 3020 6 -2 +twpin_N<3> 23961 1260 24161 1420 6 -2 +twpin_N<4> 23961 8720 24161 8880 6 -2 +twpin_N<5> 23961 13260 24161 13420 6 -2 +twpin_N<6> 23961 12720 24161 12880 6 -2 +twpin_N<7> 23961 5050 24161 5210 6 -2 +twpin_N<8> 23961 4420 24161 4580 6 -2 +twpin_dp<0> -639 2720 -439 2880 7 -1 +twpin_dp<1> 9531 -600 9691 -400 0 -3 +twpin_dp<2> -639 4720 -439 4880 7 -1 +twpin_dp<3> -639 8720 -439 8880 7 -1 +twpin_dp<4> 3751 18000 3911 18200 3 -4 +twpin_dp<5> 5531 -600 5691 -400 0 -3 +twpin_dp<6> -639 6720 -439 6880 7 -1 +twpin_dp<7> -639 14720 -439 14880 7 -1 +twpin_dp<8> 1191 -600 1351 -400 0 -3 +twpin_done 13511 18000 13671 18200 3 -4 +twpin_counter<0> 17691 -600 17851 -400 0 -3 +twpin_counter<1> 13191 -600 13351 -400 0 -3 +twpin_counter<2> 19931 18000 20091 18200 3 -4 +twpin_counter<3> 18631 18000 18791 18200 3 -4 +twpin_counter<4> 19451 18000 19611 18200 3 -4 +twpin_counter<5> 17511 18000 17671 18200 3 -4 +twpin_counter<6> 23961 6880 24161 7040 6 -2 +twpin_counter<7> 23961 6720 24161 6880 6 -2 +twpin_sr<0> 9041 -600 9201 -400 0 -3 +twpin_sr<1> 9201 18000 9361 18200 3 -4 +twpin_sr<2> 12091 18000 12251 18200 3 -4 +twpin_sr<3> 4231 18000 4391 18200 3 -4 +twpin_sr<4> -639 10720 -439 10880 7 -1 +twpin_sr<5> -639 11040 -439 11200 7 -1 +twpin_sr<6> 3271 18000 3431 18200 3 -4 +twpin_sr<7> -639 10880 -439 11040 7 -1 diff -Nru graywolf-0.1.5/tests/map9v3_other_seed/map9v3_other_seed.cel graywolf-0.1.6/tests/map9v3_other_seed/map9v3_other_seed.cel --- graywolf-0.1.5/tests/map9v3_other_seed/map9v3_other_seed.cel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3_other_seed/map9v3_other_seed.cel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,4148 @@ +cell 0 BUFX4_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf3 layer 1 89 -300 +cell 1 BUFX4_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf2 layer 1 89 -300 +cell 2 BUFX4_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf1 layer 1 89 -300 +cell 3 BUFX2_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n76 layer 1 -160 -140 +pin name Y signal $abc$733$n76_bF$buf0 layer 1 170 0 +cell 4 BUFX4_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf4 layer 1 89 -300 +cell 5 BUFX4_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf3 layer 1 89 -300 +cell 6 BUFX4_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf2 layer 1 89 -300 +cell 7 BUFX4_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf1 layer 1 89 -300 +cell 8 BUFX4_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf0 layer 1 89 -300 +cell 9 BUFX2_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf4 layer 1 170 0 +cell 10 BUFX2_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf3 layer 1 170 0 +cell 11 BUFX2_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf2 layer 1 170 0 +cell 12 BUFX2_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf1 layer 1 170 0 +cell 13 BUFX2_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf0 layer 1 170 0 +cell 14 BUFX2_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf3 layer 1 170 0 +cell 15 BUFX2_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf2 layer 1 170 0 +cell 16 BUFX2_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf1 layer 1 170 0 +cell 17 BUFX2_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf0 layer 1 170 0 +cell 18 INVX4_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<0> layer 1 -160 -340 +pin name Y signal $abc$733$n75_1 layer 1 0 0 +cell 19 INVX8_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -320 -340 +pin name Y signal $abc$733$n76 layer 1 -160 410 +cell 20 NOR2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 160 -61 +pin name Y signal $abc$733$n77 layer 1 0 -300 +cell 21 NOR2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<4> layer 1 160 -61 +pin name Y signal $abc$733$n78 layer 1 0 -300 +cell 22 NAND2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n78 layer 1 160 140 +pin name Y signal $abc$733$n79 layer 1 100 -680 +cell 23 NOR2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 -61 +pin name Y signal $abc$733$n80 layer 1 0 -300 +cell 24 NOR2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 160 -61 +pin name Y signal $abc$733$n81 layer 1 0 -300 +cell 25 NAND2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n80 layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n82 layer 1 100 -680 +cell 26 NOR2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n82 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n83_1 layer 1 0 -300 +cell 27 OAI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf3 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n83_1 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$546$n2 layer 1 50 -100 +cell 28 INVX1_1 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<4> layer 1 -80 -540 +pin name Y signal $abc$733$n85_1 layer 1 80 0 +cell 29 INVX1_2 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<1> layer 1 -80 -540 +pin name Y signal $abc$733$n86 layer 1 80 0 +cell 30 INVX1_3 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal start layer 1 -80 -540 +pin name Y signal $abc$733$n87_1 layer 1 80 0 +cell 31 NOR2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal startbuf layer 1 -160 -540 +pin name B signal $abc$733$n87_1 layer 1 160 -61 +pin name Y signal $abc$733$n88 layer 1 0 -300 +cell 32 OAI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n86 layer 1 -160 -330 +pin name B signal $abc$733$n88 layer 1 -80 -140 +pin name C signal $abc$733$n85_1 layer 1 160 300 +pin name Y signal $abc$546$n5 layer 1 50 -100 +cell 33 INVX1_4 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -80 -540 +pin name Y signal $abc$733$n90 layer 1 80 0 +cell 34 NAND3X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<2> layer 1 -240 60 +pin_group +pin name $abc$733$n75_1_bF$pin/B signal $abc$733$n75_1_bF$buf2 layer 1 -40 -100 +end_pin_group +pin_group +pin name $abc$733$n76_bF$pin/C signal $abc$733$n76_bF$buf2 layer 1 80 260 +end_pin_group +pin name Y signal $abc$733$n91_1 layer 1 -80 680 +cell 35 NOR2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n92 layer 1 0 -300 +cell 36 AOI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n90 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n92 layer 1 240 -501 +pin name Y signal dp<1>_FF_INPUT layer 1 80 -680 +cell 37 INVX1_5 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -80 -540 +pin name Y signal $abc$733$n94 layer 1 80 0 +cell 38 INVX1_6 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -80 -540 +pin name Y signal $abc$733$n95_1 layer 1 80 0 +cell 39 MUX2X1_1 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n94 layer 1 240 -61 +pin name B signal $abc$733$n95_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<2>_FF_INPUT layer 1 19 500 +cell 40 INVX1_7 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -80 -540 +pin name Y signal $abc$733$n97_1 layer 1 80 0 +cell 41 INVX1_8 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -80 -540 +pin name Y signal $abc$733$n98_1 layer 1 80 0 +cell 42 MUX2X1_2 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n97_1 layer 1 240 -61 +pin name B signal $abc$733$n98_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<3>_FF_INPUT layer 1 19 500 +cell 43 INVX1_9 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -80 -540 +pin name Y signal $abc$733$n100 layer 1 80 0 +cell 44 INVX1_10 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -80 -540 +pin name Y signal $abc$733$n101_1 layer 1 80 0 +cell 45 MUX2X1_3 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n100 layer 1 240 -61 +pin name B signal $abc$733$n101_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<4>_FF_INPUT layer 1 19 500 +cell 46 INVX1_11 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -80 -540 +pin name Y signal $abc$733$n103_1 layer 1 80 0 +cell 47 INVX1_12 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -80 -540 +pin name Y signal $abc$733$n104 layer 1 80 0 +cell 48 MUX2X1_4 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n103_1 layer 1 240 -61 +pin name B signal $abc$733$n104 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<5>_FF_INPUT layer 1 19 500 +cell 49 INVX1_13 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -80 -540 +pin name Y signal $abc$733$n106_1 layer 1 80 0 +cell 50 INVX1_14 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -80 -540 +pin name Y signal $abc$733$n107 layer 1 80 0 +cell 51 MUX2X1_5 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n106_1 layer 1 240 -61 +pin name B signal $abc$733$n107 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<6>_FF_INPUT layer 1 19 500 +cell 52 INVX1_15 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -80 -540 +pin name Y signal $abc$733$n109 layer 1 80 0 +cell 53 INVX1_16 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -80 -540 +pin name Y signal $abc$733$n110_1 layer 1 80 0 +cell 54 MUX2X1_6 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n109 layer 1 240 -61 +pin name B signal $abc$733$n110_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<7>_FF_INPUT layer 1 19 500 +cell 55 INVX1_17 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -80 -540 +pin name Y signal $abc$733$n112 layer 1 80 0 +cell 56 INVX1_18 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -80 -540 +pin name Y signal $abc$733$n113 layer 1 80 0 +cell 57 MUX2X1_7 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n112 layer 1 240 -61 +pin name B signal $abc$733$n113 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<8>_FF_INPUT layer 1 19 500 +cell 58 INVX1_19 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -80 -540 +pin name Y signal $abc$733$n115 layer 1 80 0 +cell 59 NOR2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n116_1 layer 1 0 -300 +cell 60 AOI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n115 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n116_1 layer 1 240 -501 +pin name Y signal dp<0>_FF_INPUT layer 1 80 -680 +cell 61 XNOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<7> layer 1 439 -300 +pin name Y signal $abc$733$n118_1 layer 1 50 -500 +cell 62 NOR2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -540 +pin name B signal $abc$733$n101_1 layer 1 160 -61 +pin name Y signal $abc$733$n119 layer 1 0 -300 +cell 63 NOR2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -540 +pin name B signal $abc$733$n104 layer 1 160 -61 +pin name Y signal $abc$733$n120 layer 1 0 -300 +cell 64 OAI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n119 layer 1 -160 -330 +pin name B signal $abc$733$n120 layer 1 -80 -140 +pin name C signal $abc$733$n118_1 layer 1 160 300 +pin name Y signal $abc$733$n121 layer 1 50 -100 +cell 65 NOR2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -540 +pin name B signal $abc$733$n107 layer 1 160 -61 +pin name Y signal $abc$733$n122 layer 1 0 -300 +cell 66 NOR2X1_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -540 +pin name B signal $abc$733$n113 layer 1 160 -61 +pin name Y signal $abc$733$n123_1 layer 1 0 -300 +cell 67 XNOR2X1_2 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<4> layer 1 439 -300 +pin name Y signal $abc$733$n124 layer 1 50 -500 +cell 68 OAI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n122 layer 1 -160 -330 +pin name B signal $abc$733$n123_1 layer 1 -80 -140 +pin name C signal $abc$733$n124 layer 1 160 300 +pin name Y signal $abc$733$n125 layer 1 50 -100 +cell 69 NAND2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n121 layer 1 -160 -340 +pin name B signal $abc$733$n125 layer 1 160 140 +pin name Y signal $abc$733$n126 layer 1 100 -680 +cell 70 OAI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<3> layer 1 -160 -330 +pin name B signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n127 layer 1 50 -100 +cell 71 AOI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n126 layer 1 -160 -70 +pin name B signal state<3> layer 1 -80 -261 +pin name C signal $abc$733$n127 layer 1 240 -501 +pin name Y signal sr<0>_FF_INPUT layer 1 80 -680 +cell 72 OAI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n129 layer 1 50 -100 +cell 73 AOI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n98_1 layer 1 -80 -261 +pin name C signal $abc$733$n129 layer 1 240 -501 +pin name Y signal sr<2>_FF_INPUT layer 1 80 -680 +cell 74 OAI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n131 layer 1 50 -100 +cell 75 AOI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n101_1 layer 1 -80 -261 +pin name C signal $abc$733$n131 layer 1 240 -501 +pin name Y signal sr<3>_FF_INPUT layer 1 80 -680 +cell 76 OAI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n133_1 layer 1 50 -100 +cell 77 AOI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n104 layer 1 -80 -261 +pin name C signal $abc$733$n133_1 layer 1 240 -501 +pin name Y signal sr<4>_FF_INPUT layer 1 80 -680 +cell 78 OAI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n135_1 layer 1 50 -100 +cell 79 AOI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n107 layer 1 -80 -261 +pin name C signal $abc$733$n135_1 layer 1 240 -501 +pin name Y signal sr<5>_FF_INPUT layer 1 80 -680 +cell 80 OAI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n137 layer 1 50 -100 +cell 81 AOI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n110_1 layer 1 -80 -261 +pin name C signal $abc$733$n137 layer 1 240 -501 +pin name Y signal sr<6>_FF_INPUT layer 1 80 -680 +cell 82 OAI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n139 layer 1 50 -100 +cell 83 AOI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n113 layer 1 -80 -261 +pin name C signal $abc$733$n139 layer 1 240 -501 +pin name Y signal sr<7>_FF_INPUT layer 1 80 -680 +cell 84 INVX1_20 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<1> layer 1 -80 -540 +pin name Y signal $abc$733$n141 layer 1 80 0 +cell 85 NOR2X1_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -540 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 160 -61 +end_pin_group +pin name Y signal $abc$733$n142 layer 1 0 -300 +cell 86 AND2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -240 -261 +end_pin_group +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -80 -100 +pin name Y signal $abc$733$n143 layer 1 179 -680 +cell 87 OAI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n142 layer 1 -160 -330 +pin name B signal $abc$733$n143 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n144 layer 1 50 -100 +cell 88 OAI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf1 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n141 layer 1 -80 -140 +pin name C signal $abc$733$n144 layer 1 160 300 +pin name Y signal counter<0>_FF_INPUT layer 1 50 -100 +cell 89 NOR2X1_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -540 +pin name B signal N<2> layer 1 160 -61 +pin name Y signal $abc$733$n146 layer 1 0 -300 +cell 90 NAND2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -340 +pin name B signal N<2> layer 1 160 140 +pin name Y signal $abc$733$n147 layer 1 100 -680 +cell 91 INVX1_21 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $abc$733$n147 layer 1 -80 -540 +pin name Y signal $abc$733$n148 layer 1 80 0 +cell 92 OAI21X1_14 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n146 layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n149 layer 1 50 -100 +cell 93 AND2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n81 layer 1 -240 -261 +pin name B signal state<3> layer 1 -80 -100 +pin name Y signal $abc$733$n150 layer 1 179 -680 +cell 94 INVX1_22 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -80 -540 +pin name Y signal $abc$733$n151_1 layer 1 80 0 +cell 95 NOR2X1_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n151_1 layer 1 -160 -540 +pin name B signal $abc$733$n142 layer 1 160 -61 +pin name Y signal $abc$733$n152 layer 1 0 -300 +cell 96 OAI21X1_15 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n150 layer 1 -160 -330 +pin name B signal $abc$733$n152 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n153_1 layer 1 50 -100 +cell 97 NAND2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n149 layer 1 -160 -340 +pin name B signal $abc$733$n153_1 layer 1 160 140 +pin name Y signal counter<1>_FF_INPUT layer 1 100 -680 +cell 98 NAND2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<3> layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n155 layer 1 100 -680 +cell 99 XOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $abc$733$n155 layer 1 -410 -290 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 439 -300 +pin name Y signal $abc$733$n156 layer 1 0 -700 +cell 100 INVX1_23 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<3> layer 1 -80 -540 +pin name Y signal $abc$733$n157 layer 1 80 0 +cell 101 NAND2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n157 layer 1 -160 -340 +pin name B signal $abc$733$n147 layer 1 160 140 +pin name Y signal $abc$733$n158_1 layer 1 100 -680 +cell 102 NAND2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -340 +pin name B signal $abc$733$n148 layer 1 160 140 +pin name Y signal $abc$733$n159 layer 1 100 -680 +cell 103 NAND3X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n158_1 layer 1 -40 -100 +pin name C signal $abc$733$n159 layer 1 80 260 +pin name Y signal $abc$733$n160_1 layer 1 -80 680 +cell 104 OAI21X1_16 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n156 layer 1 -80 -140 +pin name C signal $abc$733$n160_1 layer 1 160 300 +pin name Y signal counter<2>_FF_INPUT layer 1 50 -100 +cell 105 OAI21X1_17 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<3> layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal N<4> layer 1 160 300 +pin name Y signal $abc$733$n162_1 layer 1 50 -100 +cell 106 INVX1_24 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<4> layer 1 -80 -540 +pin name Y signal $abc$733$n163_1 layer 1 80 0 +cell 107 NAND3X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n157 layer 1 -240 60 +pin name B signal $abc$733$n163_1 layer 1 -40 -100 +pin name C signal $abc$733$n147 layer 1 80 260 +pin name Y signal $abc$733$n164_1 layer 1 -80 680 +cell 108 NAND2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -340 +pin name B signal $abc$733$n162_1 layer 1 160 140 +pin name Y signal $abc$733$n165 layer 1 100 -680 +cell 109 OR2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -240 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -40 -221 +pin name Y signal $abc$733$n166 layer 1 240 -100 +cell 110 OAI21X1_18 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<3> layer 1 160 300 +pin name Y signal $abc$733$n167 layer 1 50 -100 +cell 111 OAI21X1_19 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n166 layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $abc$733$n167 layer 1 160 300 +pin name Y signal $abc$733$n168 layer 1 50 -100 +cell 112 NAND2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf3 layer 1 -160 -340 +end_pin_group +pin name B signal $abc$733$n168 layer 1 160 140 +pin name Y signal $abc$733$n169 layer 1 100 -680 +cell 113 OAI21X1_20 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf2 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n165 layer 1 -80 -140 +pin name C signal $abc$733$n169 layer 1 160 300 +pin name Y signal counter<3>_FF_INPUT layer 1 50 -100 +cell 114 INVX1_25 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<5> layer 1 -80 -540 +pin name Y signal $abc$733$n171 layer 1 80 0 +cell 115 NOR2X1_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -540 +pin name B signal N<4> layer 1 160 -61 +pin name Y signal $abc$733$n172 layer 1 0 -300 +cell 116 AOI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n172 layer 1 -160 -70 +pin name B signal $abc$733$n147 layer 1 -80 -261 +pin name C signal $abc$733$n171 layer 1 240 -501 +pin name Y signal $abc$733$n173 layer 1 80 -680 +cell 117 OAI21X1_21 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n174 layer 1 50 -100 +cell 118 NOR2X1_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -540 +pin name B signal $abc$733$n166 layer 1 160 -61 +pin name Y signal $abc$733$n175 layer 1 0 -300 +cell 119 NAND2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n150 layer 1 160 140 +pin name Y signal $abc$733$n176 layer 1 100 -680 +cell 120 AOI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n175 layer 1 -240 -70 +pin name B signal $abc$733$n150 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<4> layer 1 320 -61 +pin name D signal $abc$733$n176 layer 1 140 -180 +pin name Y signal $abc$733$n177 layer 1 10 -431 +cell 121 OAI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n173 layer 1 -240 -330 +pin name B signal $abc$733$n174 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n177 layer 1 160 -140 +pin name Y signal counter<4>_FF_INPUT layer 1 0 -300 +cell 122 OAI21X1_22 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal N<6> layer 1 160 300 +pin name Y signal $abc$733$n179 layer 1 50 -100 +cell 123 OR2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -240 -540 +pin name B signal N<6> layer 1 -40 -221 +pin name Y signal $abc$733$n180 layer 1 240 -100 +cell 124 OAI21X1_23 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -330 +pin name B signal $abc$733$n180 layer 1 -80 -140 +pin name C signal $abc$733$n179 layer 1 160 300 +pin name Y signal $abc$733$n181 layer 1 50 -100 +cell 125 NOR2X1_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n155 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n182 layer 1 0 -300 +cell 126 INVX1_26 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -80 -540 +pin name Y signal $abc$733$n183 layer 1 80 0 +cell 127 AOI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n175 layer 1 -160 -70 +pin name B signal $abc$733$n150 layer 1 -80 -261 +pin name C signal $abc$733$n183 layer 1 240 -501 +pin name Y signal $abc$733$n184 layer 1 80 -680 +cell 128 OAI21X1_24 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -160 -330 +pin name B signal $abc$733$n184 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n185 layer 1 50 -100 +cell 129 OAI21X1_25 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf0 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n181 layer 1 -80 -140 +pin name C signal $abc$733$n185 layer 1 160 300 +pin name Y signal counter<5>_FF_INPUT layer 1 50 -100 +cell 130 INVX1_27 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<7> layer 1 -80 -540 +pin name Y signal $abc$733$n187 layer 1 80 0 +cell 131 NOR2X1_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n180 layer 1 -160 -540 +pin name B signal $abc$733$n164_1 layer 1 160 -61 +pin name Y signal $abc$733$n188 layer 1 0 -300 +cell 132 NOR2X1_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n187 layer 1 -160 -540 +pin name B signal $abc$733$n188 layer 1 160 -61 +pin name Y signal $abc$733$n189 layer 1 0 -300 +cell 133 NOR2X1_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<5> layer 1 -160 -540 +pin name B signal N<6> layer 1 160 -61 +pin name Y signal $abc$733$n190 layer 1 0 -300 +cell 134 NAND3X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n147 layer 1 -240 60 +pin name B signal $abc$733$n172 layer 1 -40 -100 +pin name C signal $abc$733$n190 layer 1 80 260 +pin name Y signal $abc$733$n191 layer 1 -80 680 +cell 135 OAI21X1_26 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n192 layer 1 50 -100 +cell 136 INVX1_28 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -80 -540 +pin name Y signal $abc$733$n193 layer 1 80 0 +cell 137 AND2X2_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n77 layer 1 -240 -261 +pin name B signal $abc$733$n78 layer 1 -80 -100 +pin name Y signal $abc$733$n194 layer 1 179 -680 +cell 138 NAND3X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n193 layer 1 -240 60 +pin name B signal $abc$733$n150 layer 1 -40 -100 +pin name C signal $abc$733$n194 layer 1 80 260 +pin name Y signal $abc$733$n195 layer 1 -80 680 +cell 139 OAI21X1_27 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n155 layer 1 -160 -330 +pin name B signal $abc$733$n79 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 300 +pin name Y signal $abc$733$n196 layer 1 50 -100 +cell 140 AND2X2_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n195 layer 1 -240 -261 +pin name B signal $abc$733$n196 layer 1 -80 -100 +pin name Y signal $abc$733$n197 layer 1 179 -680 +cell 141 OAI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n189 layer 1 -240 -330 +pin name B signal $abc$733$n192 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n197 layer 1 160 -140 +pin name Y signal counter<6>_FF_INPUT layer 1 0 -300 +cell 142 OAI21X1_28 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal N<8> layer 1 160 300 +pin name Y signal $abc$733$n199 layer 1 50 -100 +cell 143 INVX1_29 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<8> layer 1 -80 -540 +pin name Y signal $abc$733$n200 layer 1 80 0 +cell 144 NAND3X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n187 layer 1 -240 60 +pin name B signal $abc$733$n200 layer 1 -40 -100 +pin name C signal $abc$733$n188 layer 1 80 260 +pin name Y signal $abc$733$n201 layer 1 -80 680 +cell 145 NAND3X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n199 layer 1 -40 -100 +pin name C signal $abc$733$n201 layer 1 80 260 +pin name Y signal $abc$733$n202 layer 1 -80 680 +cell 146 AOI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -240 -70 +pin name B signal $abc$733$n83_1 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<7> layer 1 320 -61 +pin name D signal $abc$733$n195 layer 1 140 -180 +pin name Y signal $abc$733$n203 layer 1 10 -431 +cell 147 OAI21X1_29 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n203 layer 1 -80 -140 +pin name C signal $abc$733$n202 layer 1 160 300 +pin name Y signal counter<7>_FF_INPUT layer 1 50 -100 +cell 148 INVX1_30 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -80 -540 +pin name Y signal $abc$733$n205 layer 1 80 0 +cell 149 INVX1_31 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<2> layer 1 -80 -540 +pin name Y signal $abc$733$n206 layer 1 80 0 +cell 150 NAND3X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<4> layer 1 -240 60 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -40 -100 +end_pin_group +pin name C signal $abc$733$n206 layer 1 80 260 +pin name Y signal $abc$733$n207 layer 1 -80 680 +cell 151 AOI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n207 layer 1 -160 -70 +pin name B signal $abc$733$n205 layer 1 -80 -261 +pin name C signal state<0> layer 1 240 -501 +pin name Y signal done_FF_INPUT layer 1 80 -680 +cell 152 OAI21X1_30 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf2 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n209 layer 1 50 -100 +cell 153 AOI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf1 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n95_1 layer 1 -80 -261 +pin name C signal $abc$733$n209 layer 1 240 -501 +pin name Y signal sr<1>_FF_INPUT layer 1 80 -680 +cell 154 AND2X2_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n88 layer 1 -240 -261 +pin name B signal state<1> layer 1 -80 -100 +pin name Y signal $abc$546$n149 layer 1 179 -680 +cell 155 AND2X2_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -240 -261 +pin name B signal $abc$733$n80 layer 1 -80 -100 +pin name Y signal $abc$546$n150 layer 1 179 -680 +cell 156 INVX8_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal reset layer 1 -320 -340 +pin name Y signal $abc$733$n164 layer 1 -160 410 +cell 157 BUFX2_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -140 +pin name Y signal counter<0> layer 1 170 0 +cell 158 BUFX2_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -140 +pin name Y signal counter<1> layer 1 170 0 +cell 159 BUFX2_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -140 +pin name Y signal counter<2> layer 1 170 0 +cell 160 BUFX2_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -140 +pin name Y signal counter<3> layer 1 170 0 +cell 161 BUFX2_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -140 +pin name Y signal counter<4> layer 1 170 0 +cell 162 BUFX2_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -140 +pin name Y signal counter<5> layer 1 170 0 +cell 163 BUFX2_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -160 -140 +pin name Y signal counter<6> layer 1 170 0 +cell 164 BUFX2_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -140 +pin name Y signal counter<7> layer 1 170 0 +cell 165 BUFX2_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -160 -140 +pin name Y signal done layer 1 170 0 +cell 166 BUFX2_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -160 -140 +pin name Y signal dp<0> layer 1 170 0 +cell 167 BUFX2_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -160 -140 +pin name Y signal dp<1> layer 1 170 0 +cell 168 BUFX2_22 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -160 -140 +pin name Y signal dp<2> layer 1 170 0 +cell 169 BUFX2_23 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -160 -140 +pin name Y signal dp<3> layer 1 170 0 +cell 170 BUFX2_24 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -160 -140 +pin name Y signal dp<4> layer 1 170 0 +cell 171 BUFX2_25 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -160 -140 +pin name Y signal dp<5> layer 1 170 0 +cell 172 BUFX2_26 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -160 -140 +pin name Y signal dp<6> layer 1 170 0 +cell 173 BUFX2_27 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -160 -140 +pin name Y signal dp<7> layer 1 170 0 +cell 174 BUFX2_28 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -160 -140 +pin name Y signal dp<8> layer 1 170 0 +cell 175 BUFX2_29 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -140 +pin name Y signal sr<0> layer 1 170 0 +cell 176 BUFX2_30 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -140 +pin name Y signal sr<1> layer 1 170 0 +cell 177 BUFX2_31 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -140 +pin name Y signal sr<2> layer 1 170 0 +cell 178 BUFX2_32 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -140 +pin name Y signal sr<3> layer 1 170 0 +cell 179 BUFX2_33 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -140 +pin name Y signal sr<4> layer 1 170 0 +cell 180 BUFX2_34 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -140 +pin name Y signal sr<5> layer 1 170 0 +cell 181 BUFX2_35 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -140 +pin name Y signal sr<6> layer 1 170 0 +cell 182 BUFX2_36 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -140 +pin name Y signal sr<7> layer 1 170 0 +cell 183 DFFSR_1 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n149 layer 1 -400 -340 +pin name Q signal state<0> layer 1 1520 449 +pin name R signal vdd layer 1 -1040 -90 +pin_group +pin name $abc$733$n164_bF$pin/S signal $abc$733$n164_bF$buf4 layer 1 -1020 59 +end_pin_group +cell 184 DFFSR_2 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n5 layer 1 -400 -340 +pin name Q signal state<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 185 DFFSR_3 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n150 layer 1 -400 -340 +pin name Q signal state<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 186 DFFSR_4 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n2 layer 1 -400 -340 +pin name Q signal state<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 187 DFFSR_5 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal state<2> layer 1 -400 -340 +pin name Q signal state<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 188 DFFSR_6 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 189 DFFSR_7 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 190 DFFSR_8 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 191 DFFSR_9 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 192 DFFSR_10 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal dp<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 193 DFFSR_11 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 194 DFFSR_12 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 195 DFFSR_13 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 196 DFFSR_14 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<8>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<8> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 197 DFFSR_15 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal done_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$882 layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 198 DFFSR_16 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 199 DFFSR_17 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 200 DFFSR_18 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 201 DFFSR_19 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal counter<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 202 DFFSR_20 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal counter<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 203 DFFSR_21 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 204 DFFSR_22 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 205 DFFSR_23 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 206 DFFSR_24 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 207 DFFSR_25 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 208 DFFSR_26 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 209 DFFSR_27 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal sr<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 210 DFFSR_28 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal sr<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 211 DFFSR_29 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 212 DFFSR_30 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 213 DFFSR_31 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 214 DFFSR_32 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal start layer 1 -400 -340 +pin name Q signal startbuf layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +pad 1 name twpin_clock +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name clock signal clock layer 1 0 0 + +pad 2 name twpin_reset +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name reset signal reset layer 1 0 0 + +pad 3 name twpin_start +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name start signal start layer 1 0 0 + +pad 4 name twpin_N<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<0> signal N<0> layer 1 0 0 + +pad 5 name twpin_N<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<1> signal N<1> layer 1 0 0 + +pad 6 name twpin_N<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<2> signal N<2> layer 1 0 0 + +pad 7 name twpin_N<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<3> signal N<3> layer 1 0 0 + +pad 8 name twpin_N<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<4> signal N<4> layer 1 0 0 + +pad 9 name twpin_N<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<5> signal N<5> layer 1 0 0 + +pad 10 name twpin_N<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<6> signal N<6> layer 1 0 0 + +pad 11 name twpin_N<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<7> signal N<7> layer 1 0 0 + +pad 12 name twpin_N<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<8> signal N<8> layer 1 0 0 + +pad 13 name twpin_dp<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<0> signal dp<0> layer 1 0 0 + +pad 14 name twpin_dp<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<1> signal dp<1> layer 1 0 0 + +pad 15 name twpin_dp<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<2> signal dp<2> layer 1 0 0 + +pad 16 name twpin_dp<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<3> signal dp<3> layer 1 0 0 + +pad 17 name twpin_dp<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<4> signal dp<4> layer 1 0 0 + +pad 18 name twpin_dp<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<5> signal dp<5> layer 1 0 0 + +pad 19 name twpin_dp<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<6> signal dp<6> layer 1 0 0 + +pad 20 name twpin_dp<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<7> signal dp<7> layer 1 0 0 + +pad 21 name twpin_dp<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<8> signal dp<8> layer 1 0 0 + +pad 22 name twpin_done +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name done signal done layer 1 0 0 + +pad 23 name twpin_counter<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<0> signal counter<0> layer 1 0 0 + +pad 24 name twpin_counter<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<1> signal counter<1> layer 1 0 0 + +pad 25 name twpin_counter<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<2> signal counter<2> layer 1 0 0 + +pad 26 name twpin_counter<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<3> signal counter<3> layer 1 0 0 + +pad 27 name twpin_counter<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<4> signal counter<4> layer 1 0 0 + +pad 28 name twpin_counter<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<5> signal counter<5> layer 1 0 0 + +pad 29 name twpin_counter<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<6> signal counter<6> layer 1 0 0 + +pad 30 name twpin_counter<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<7> signal counter<7> layer 1 0 0 + +pad 31 name twpin_sr<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<0> signal sr<0> layer 1 0 0 + +pad 32 name twpin_sr<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<1> signal sr<1> layer 1 0 0 + +pad 33 name twpin_sr<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<2> signal sr<2> layer 1 0 0 + +pad 34 name twpin_sr<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<3> signal sr<3> layer 1 0 0 + +pad 35 name twpin_sr<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<4> signal sr<4> layer 1 0 0 + +pad 36 name twpin_sr<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<5> signal sr<5> layer 1 0 0 + +pad 37 name twpin_sr<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<6> signal sr<6> layer 1 0 0 + +pad 38 name twpin_sr<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<7> signal sr<7> layer 1 0 0 + + diff -Nru graywolf-0.1.5/tests/map9v3_other_seed/map9v3_other_seed.par graywolf-0.1.6/tests/map9v3_other_seed/map9v3_other_seed.par --- graywolf-0.1.5/tests/map9v3_other_seed/map9v3_other_seed.par 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/map9v3_other_seed/map9v3_other_seed.par 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,67 @@ +# osu035.par --- Parameter file for GrayWolf +# NOTE: all distance units are in centimicrons unless otherwise stated + +RULES + # values are resistance in ohms/sq and capacitance in fF/um^2 + layer metal1 0.07 0.030 horizontal + layer metal2 0.07 0.017 vertical + layer metal3 0.07 0.006 horizontal + layer metal4 0.04 0.004 vertical + + via via12 metal1 metal2 + via via23 metal2 metal3 + via via34 metal3 metal4 + + width metal1 60 + width metal2 60 + width metal3 60 + width metal4 120 + width via12 60 + width via23 60 + width via34 120 + + # Set spacing = track pitch - width, so that GrayWolf places pins + # on the right pitch. + # Pitches are (in um): + # metal1 = 200, metal2 = 160, metal3 = 200, metal4 = 320 + + spacing metal1 metal1 140 + spacing metal2 metal2 100 + spacing metal3 metal3 140 + spacing metal4 metal4 200 + + # Stacked vias allowed + spacing via12 via23 0 + spacing via23 via34 0 + + overhang via12 metal1 8 + overhang via12 metal2 6 + + overhang via23 metal2 8 + overhang via23 metal3 6 + + overhang via34 metal3 14 + overhang via34 metal4 16 +ENDRULES + +*vertical_wire_weight : 1.0 +*vertical_path_weight : 1.0 +*padspacing : variable +*rowSep : 0.0 0 +*track.pitch : 160 +*graphics.wait : off +*last_chance.wait : off +*random.seed : 123 + +TWMC*chip.aspect.ratio : 0.75 + +TWSC*feedThruWidth : 160 layer 1 +TWSC*do.global.route : on +TWSC*ignore_feeds : true +TWSC*call_row_evener : true +TWSC*even_rows_maximally : true +# TWSC*no.graphics : on + +GENR*row_to_tile_spacing: 1 +# GENR*numrows : 6 +GENR*flip_alternate_rows : 1 diff -Nru graywolf-0.1.5/tests/mincut/map9v3/expected/map9v3.mcel graywolf-0.1.6/tests/mincut/map9v3/expected/map9v3.mcel --- graywolf-0.1.5/tests/mincut/map9v3/expected/map9v3.mcel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/mincut/map9v3/expected/map9v3.mcel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,325 @@ +cluster 1 name core +corners 4 0 0 0 20661 20661 20661 20661 0 +asplb 0.5 aspub 2.0 +class 0 orientations 0 1 2 3 4 5 6 7 +softpin name pin1 signal sr<7> +softpin name pin2 signal sr<6> +softpin name pin3 signal sr<5> +softpin name pin4 signal sr<4> +softpin name pin5 signal sr<3> +softpin name pin6 signal sr<2> +softpin name pin7 signal sr<1> +softpin name pin8 signal sr<0> +softpin name pin9 signal dp<8> +softpin name pin10 signal dp<7> +softpin name pin11 signal dp<6> +softpin name pin12 signal dp<5> +softpin name pin13 signal dp<4> +softpin name pin14 signal dp<3> +softpin name pin15 signal dp<2> +softpin name pin16 signal dp<1> +softpin name pin17 signal dp<0> +softpin name pin18 signal done +softpin name pin19 signal counter<7> +softpin name pin20 signal counter<6> +softpin name pin21 signal counter<5> +softpin name pin22 signal counter<4> +softpin name pin23 signal counter<3> +softpin name pin24 signal counter<2> +softpin name pin25 signal counter<1> +softpin name pin26 signal counter<0> +softpin name pin27 signal reset +softpin name pin28 signal N<8> +softpin name pin29 signal N<7> +softpin name pin30 signal N<6> +softpin name pin31 signal N<5> +softpin name pin32 signal N<4> +softpin name pin33 signal N<3> +softpin name pin34 signal N<2> +softpin name pin35 signal N<1> +softpin name pin36 signal N<0> +softpin name pin37 signal start +softpin name pin38 signal clock + +instance core_L +corners 6 0 0 0 23856 11928 23856 11928 11928 23856 11928 23856 0 +asplb 0.5 aspub 2.0 +class 0 orientations 0 1 2 3 4 5 6 7 +softpin name pin1 signal sr<7> +softpin name pin2 signal sr<6> +softpin name pin3 signal sr<5> +softpin name pin4 signal sr<4> +softpin name pin5 signal sr<3> +softpin name pin6 signal sr<2> +softpin name pin7 signal sr<1> +softpin name pin8 signal sr<0> +softpin name pin9 signal dp<8> +softpin name pin10 signal dp<7> +softpin name pin11 signal dp<6> +softpin name pin12 signal dp<5> +softpin name pin13 signal dp<4> +softpin name pin14 signal dp<3> +softpin name pin15 signal dp<2> +softpin name pin16 signal dp<1> +softpin name pin17 signal dp<0> +softpin name pin18 signal done +softpin name pin19 signal counter<7> +softpin name pin20 signal counter<6> +softpin name pin21 signal counter<5> +softpin name pin22 signal counter<4> +softpin name pin23 signal counter<3> +softpin name pin24 signal counter<2> +softpin name pin25 signal counter<1> +softpin name pin26 signal counter<0> +softpin name pin27 signal reset +softpin name pin28 signal N<8> +softpin name pin29 signal N<7> +softpin name pin30 signal N<6> +softpin name pin31 signal N<5> +softpin name pin32 signal N<4> +softpin name pin33 signal N<3> +softpin name pin34 signal N<2> +softpin name pin35 signal N<1> +softpin name pin36 signal N<0> +softpin name pin37 signal start +softpin name pin38 signal clock + +instance core_T +corners 8 10330 0 10330 10330 0 10330 0 20660 30990 20660 30990 10330 20660 10330 20660 0 +asplb 0.5 aspub 2.0 +class 0 orientations 0 1 2 3 4 5 6 7 +softpin name pin1 signal sr<7> +softpin name pin2 signal sr<6> +softpin name pin3 signal sr<5> +softpin name pin4 signal sr<4> +softpin name pin5 signal sr<3> +softpin name pin6 signal sr<2> +softpin name pin7 signal sr<1> +softpin name pin8 signal sr<0> +softpin name pin9 signal dp<8> +softpin name pin10 signal dp<7> +softpin name pin11 signal dp<6> +softpin name pin12 signal dp<5> +softpin name pin13 signal dp<4> +softpin name pin14 signal dp<3> +softpin name pin15 signal dp<2> +softpin name pin16 signal dp<1> +softpin name pin17 signal dp<0> +softpin name pin18 signal done +softpin name pin19 signal counter<7> +softpin name pin20 signal counter<6> +softpin name pin21 signal counter<5> +softpin name pin22 signal counter<4> +softpin name pin23 signal counter<3> +softpin name pin24 signal counter<2> +softpin name pin25 signal counter<1> +softpin name pin26 signal counter<0> +softpin name pin27 signal reset +softpin name pin28 signal N<8> +softpin name pin29 signal N<7> +softpin name pin30 signal N<6> +softpin name pin31 signal N<5> +softpin name pin32 signal N<4> +softpin name pin33 signal N<3> +softpin name pin34 signal N<2> +softpin name pin35 signal N<1> +softpin name pin36 signal N<0> +softpin name pin37 signal start +softpin name pin38 signal clock + +instance core_L2 +corners 6 0 0 0 18478 18478 18478 18478 9239 27717 9239 27717 0 +asplb 0.5 aspub 2.0 +class 0 orientations 0 1 2 3 4 5 6 7 +softpin name pin1 signal sr<7> +softpin name pin2 signal sr<6> +softpin name pin3 signal sr<5> +softpin name pin4 signal sr<4> +softpin name pin5 signal sr<3> +softpin name pin6 signal sr<2> +softpin name pin7 signal sr<1> +softpin name pin8 signal sr<0> +softpin name pin9 signal dp<8> +softpin name pin10 signal dp<7> +softpin name pin11 signal dp<6> +softpin name pin12 signal dp<5> +softpin name pin13 signal dp<4> +softpin name pin14 signal dp<3> +softpin name pin15 signal dp<2> +softpin name pin16 signal dp<1> +softpin name pin17 signal dp<0> +softpin name pin18 signal done +softpin name pin19 signal counter<7> +softpin name pin20 signal counter<6> +softpin name pin21 signal counter<5> +softpin name pin22 signal counter<4> +softpin name pin23 signal counter<3> +softpin name pin24 signal counter<2> +softpin name pin25 signal counter<1> +softpin name pin26 signal counter<0> +softpin name pin27 signal reset +softpin name pin28 signal N<8> +softpin name pin29 signal N<7> +softpin name pin30 signal N<6> +softpin name pin31 signal N<5> +softpin name pin32 signal N<4> +softpin name pin33 signal N<3> +softpin name pin34 signal N<2> +softpin name pin35 signal N<1> +softpin name pin36 signal N<0> +softpin name pin37 signal start +softpin name pin38 signal clock + +pad 1 name twpin_clock +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name clock signal clock layer 1 0 0 + +pad 2 name twpin_reset +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name reset signal reset layer 1 0 0 + +pad 3 name twpin_start +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name start signal start layer 1 0 0 + +pad 4 name twpin_N<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<0> signal N<0> layer 1 0 0 + +pad 5 name twpin_N<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<1> signal N<1> layer 1 0 0 + +pad 6 name twpin_N<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<2> signal N<2> layer 1 0 0 + +pad 7 name twpin_N<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<3> signal N<3> layer 1 0 0 + +pad 8 name twpin_N<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<4> signal N<4> layer 1 0 0 + +pad 9 name twpin_N<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<5> signal N<5> layer 1 0 0 + +pad 10 name twpin_N<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<6> signal N<6> layer 1 0 0 + +pad 11 name twpin_N<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<7> signal N<7> layer 1 0 0 + +pad 12 name twpin_N<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<8> signal N<8> layer 1 0 0 + +pad 13 name twpin_dp<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<0> signal dp<0> layer 1 0 0 + +pad 14 name twpin_dp<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<1> signal dp<1> layer 1 0 0 + +pad 15 name twpin_dp<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<2> signal dp<2> layer 1 0 0 + +pad 16 name twpin_dp<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<3> signal dp<3> layer 1 0 0 + +pad 17 name twpin_dp<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<4> signal dp<4> layer 1 0 0 + +pad 18 name twpin_dp<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<5> signal dp<5> layer 1 0 0 + +pad 19 name twpin_dp<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<6> signal dp<6> layer 1 0 0 + +pad 20 name twpin_dp<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<7> signal dp<7> layer 1 0 0 + +pad 21 name twpin_dp<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<8> signal dp<8> layer 1 0 0 + +pad 22 name twpin_done +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name done signal done layer 1 0 0 + +pad 23 name twpin_counter<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<0> signal counter<0> layer 1 0 0 + +pad 24 name twpin_counter<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<1> signal counter<1> layer 1 0 0 + +pad 25 name twpin_counter<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<2> signal counter<2> layer 1 0 0 + +pad 26 name twpin_counter<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<3> signal counter<3> layer 1 0 0 + +pad 27 name twpin_counter<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<4> signal counter<4> layer 1 0 0 + +pad 28 name twpin_counter<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<5> signal counter<5> layer 1 0 0 + +pad 29 name twpin_counter<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<6> signal counter<6> layer 1 0 0 + +pad 30 name twpin_counter<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<7> signal counter<7> layer 1 0 0 + +pad 31 name twpin_sr<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<0> signal sr<0> layer 1 0 0 + +pad 32 name twpin_sr<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<1> signal sr<1> layer 1 0 0 + +pad 33 name twpin_sr<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<2> signal sr<2> layer 1 0 0 + +pad 34 name twpin_sr<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<3> signal sr<3> layer 1 0 0 + +pad 35 name twpin_sr<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<4> signal sr<4> layer 1 0 0 + +pad 36 name twpin_sr<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<5> signal sr<5> layer 1 0 0 + +pad 37 name twpin_sr<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<6> signal sr<6> layer 1 0 0 + +pad 38 name twpin_sr<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<7> signal sr<7> layer 1 0 0 + + diff -Nru graywolf-0.1.5/tests/mincut/map9v3/expected/map9v3.scel graywolf-0.1.6/tests/mincut/map9v3/expected/map9v3.scel --- graywolf-0.1.5/tests/mincut/map9v3/expected/map9v3.scel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/mincut/map9v3/expected/map9v3.scel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,3996 @@ + +cell 0 BUFX4_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf3 layer 1 89 -300 +cell 1 BUFX4_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf2 layer 1 89 -300 +cell 2 BUFX4_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf1 layer 1 89 -300 +cell 3 BUFX2_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n76 layer 1 -160 -140 +pin name Y signal $abc$733$n76_bF$buf0 layer 1 170 0 +cell 4 BUFX4_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf4 layer 1 89 -300 +cell 5 BUFX4_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf3 layer 1 89 -300 +cell 6 BUFX4_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf2 layer 1 89 -300 +cell 7 BUFX4_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf1 layer 1 89 -300 +cell 8 BUFX4_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf0 layer 1 89 -300 +cell 9 BUFX2_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf4 layer 1 170 0 +cell 10 BUFX2_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf3 layer 1 170 0 +cell 11 BUFX2_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf2 layer 1 170 0 +cell 12 BUFX2_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf1 layer 1 170 0 +cell 13 BUFX2_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf0 layer 1 170 0 +cell 14 BUFX2_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf3 layer 1 170 0 +cell 15 BUFX2_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf2 layer 1 170 0 +cell 16 BUFX2_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf1 layer 1 170 0 +cell 17 BUFX2_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf0 layer 1 170 0 +cell 18 INVX4_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<0> layer 1 -160 -340 +pin name Y signal $abc$733$n75_1 layer 1 0 0 +cell 19 INVX8_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -320 -340 +pin name Y signal $abc$733$n76 layer 1 -160 410 +cell 20 NOR2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 160 -61 +pin name Y signal $abc$733$n77 layer 1 0 -300 +cell 21 NOR2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<4> layer 1 160 -61 +pin name Y signal $abc$733$n78 layer 1 0 -300 +cell 22 NAND2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n78 layer 1 160 140 +pin name Y signal $abc$733$n79 layer 1 100 -680 +cell 23 NOR2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 -61 +pin name Y signal $abc$733$n80 layer 1 0 -300 +cell 24 NOR2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 160 -61 +pin name Y signal $abc$733$n81 layer 1 0 -300 +cell 25 NAND2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n80 layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n82 layer 1 100 -680 +cell 26 NOR2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n82 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n83_1 layer 1 0 -300 +cell 27 OAI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf3 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n83_1 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$546$n2 layer 1 50 -100 +cell 28 INVX1_1 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<4> layer 1 -80 -540 +pin name Y signal $abc$733$n85_1 layer 1 80 0 +cell 29 INVX1_2 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<1> layer 1 -80 -540 +pin name Y signal $abc$733$n86 layer 1 80 0 +cell 30 INVX1_3 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal start layer 1 -80 -540 +pin name Y signal $abc$733$n87_1 layer 1 80 0 +cell 31 NOR2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal startbuf layer 1 -160 -540 +pin name B signal $abc$733$n87_1 layer 1 160 -61 +pin name Y signal $abc$733$n88 layer 1 0 -300 +cell 32 OAI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n86 layer 1 -160 -330 +pin name B signal $abc$733$n88 layer 1 -80 -140 +pin name C signal $abc$733$n85_1 layer 1 160 300 +pin name Y signal $abc$546$n5 layer 1 50 -100 +cell 33 INVX1_4 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -80 -540 +pin name Y signal $abc$733$n90 layer 1 80 0 +cell 34 NAND3X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<2> layer 1 -240 60 +pin_group +pin name $abc$733$n75_1_bF$pin/B signal $abc$733$n75_1_bF$buf2 layer 1 -40 -100 +end_pin_group +pin_group +pin name $abc$733$n76_bF$pin/C signal $abc$733$n76_bF$buf2 layer 1 80 260 +end_pin_group +pin name Y signal $abc$733$n91_1 layer 1 -80 680 +cell 35 NOR2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n92 layer 1 0 -300 +cell 36 AOI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n90 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n92 layer 1 240 -501 +pin name Y signal dp<1>_FF_INPUT layer 1 80 -680 +cell 37 INVX1_5 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -80 -540 +pin name Y signal $abc$733$n94 layer 1 80 0 +cell 38 INVX1_6 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -80 -540 +pin name Y signal $abc$733$n95_1 layer 1 80 0 +cell 39 MUX2X1_1 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n94 layer 1 240 -61 +pin name B signal $abc$733$n95_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<2>_FF_INPUT layer 1 19 500 +cell 40 INVX1_7 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -80 -540 +pin name Y signal $abc$733$n97_1 layer 1 80 0 +cell 41 INVX1_8 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -80 -540 +pin name Y signal $abc$733$n98_1 layer 1 80 0 +cell 42 MUX2X1_2 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n97_1 layer 1 240 -61 +pin name B signal $abc$733$n98_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<3>_FF_INPUT layer 1 19 500 +cell 43 INVX1_9 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -80 -540 +pin name Y signal $abc$733$n100 layer 1 80 0 +cell 44 INVX1_10 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -80 -540 +pin name Y signal $abc$733$n101_1 layer 1 80 0 +cell 45 MUX2X1_3 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n100 layer 1 240 -61 +pin name B signal $abc$733$n101_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<4>_FF_INPUT layer 1 19 500 +cell 46 INVX1_11 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -80 -540 +pin name Y signal $abc$733$n103_1 layer 1 80 0 +cell 47 INVX1_12 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -80 -540 +pin name Y signal $abc$733$n104 layer 1 80 0 +cell 48 MUX2X1_4 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n103_1 layer 1 240 -61 +pin name B signal $abc$733$n104 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<5>_FF_INPUT layer 1 19 500 +cell 49 INVX1_13 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -80 -540 +pin name Y signal $abc$733$n106_1 layer 1 80 0 +cell 50 INVX1_14 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -80 -540 +pin name Y signal $abc$733$n107 layer 1 80 0 +cell 51 MUX2X1_5 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n106_1 layer 1 240 -61 +pin name B signal $abc$733$n107 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<6>_FF_INPUT layer 1 19 500 +cell 52 INVX1_15 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -80 -540 +pin name Y signal $abc$733$n109 layer 1 80 0 +cell 53 INVX1_16 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -80 -540 +pin name Y signal $abc$733$n110_1 layer 1 80 0 +cell 54 MUX2X1_6 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n109 layer 1 240 -61 +pin name B signal $abc$733$n110_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<7>_FF_INPUT layer 1 19 500 +cell 55 INVX1_17 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -80 -540 +pin name Y signal $abc$733$n112 layer 1 80 0 +cell 56 INVX1_18 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -80 -540 +pin name Y signal $abc$733$n113 layer 1 80 0 +cell 57 MUX2X1_7 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n112 layer 1 240 -61 +pin name B signal $abc$733$n113 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<8>_FF_INPUT layer 1 19 500 +cell 58 INVX1_19 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -80 -540 +pin name Y signal $abc$733$n115 layer 1 80 0 +cell 59 NOR2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n116_1 layer 1 0 -300 +cell 60 AOI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n115 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n116_1 layer 1 240 -501 +pin name Y signal dp<0>_FF_INPUT layer 1 80 -680 +cell 61 XNOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<7> layer 1 439 -300 +pin name Y signal $abc$733$n118_1 layer 1 50 -500 +cell 62 NOR2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -540 +pin name B signal $abc$733$n101_1 layer 1 160 -61 +pin name Y signal $abc$733$n119 layer 1 0 -300 +cell 63 NOR2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -540 +pin name B signal $abc$733$n104 layer 1 160 -61 +pin name Y signal $abc$733$n120 layer 1 0 -300 +cell 64 OAI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n119 layer 1 -160 -330 +pin name B signal $abc$733$n120 layer 1 -80 -140 +pin name C signal $abc$733$n118_1 layer 1 160 300 +pin name Y signal $abc$733$n121 layer 1 50 -100 +cell 65 NOR2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -540 +pin name B signal $abc$733$n107 layer 1 160 -61 +pin name Y signal $abc$733$n122 layer 1 0 -300 +cell 66 NOR2X1_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -540 +pin name B signal $abc$733$n113 layer 1 160 -61 +pin name Y signal $abc$733$n123_1 layer 1 0 -300 +cell 67 XNOR2X1_2 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<4> layer 1 439 -300 +pin name Y signal $abc$733$n124 layer 1 50 -500 +cell 68 OAI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n122 layer 1 -160 -330 +pin name B signal $abc$733$n123_1 layer 1 -80 -140 +pin name C signal $abc$733$n124 layer 1 160 300 +pin name Y signal $abc$733$n125 layer 1 50 -100 +cell 69 NAND2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n121 layer 1 -160 -340 +pin name B signal $abc$733$n125 layer 1 160 140 +pin name Y signal $abc$733$n126 layer 1 100 -680 +cell 70 OAI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<3> layer 1 -160 -330 +pin name B signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n127 layer 1 50 -100 +cell 71 AOI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n126 layer 1 -160 -70 +pin name B signal state<3> layer 1 -80 -261 +pin name C signal $abc$733$n127 layer 1 240 -501 +pin name Y signal sr<0>_FF_INPUT layer 1 80 -680 +cell 72 OAI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n129 layer 1 50 -100 +cell 73 AOI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n98_1 layer 1 -80 -261 +pin name C signal $abc$733$n129 layer 1 240 -501 +pin name Y signal sr<2>_FF_INPUT layer 1 80 -680 +cell 74 OAI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n131 layer 1 50 -100 +cell 75 AOI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n101_1 layer 1 -80 -261 +pin name C signal $abc$733$n131 layer 1 240 -501 +pin name Y signal sr<3>_FF_INPUT layer 1 80 -680 +cell 76 OAI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n133_1 layer 1 50 -100 +cell 77 AOI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n104 layer 1 -80 -261 +pin name C signal $abc$733$n133_1 layer 1 240 -501 +pin name Y signal sr<4>_FF_INPUT layer 1 80 -680 +cell 78 OAI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n135_1 layer 1 50 -100 +cell 79 AOI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n107 layer 1 -80 -261 +pin name C signal $abc$733$n135_1 layer 1 240 -501 +pin name Y signal sr<5>_FF_INPUT layer 1 80 -680 +cell 80 OAI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n137 layer 1 50 -100 +cell 81 AOI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n110_1 layer 1 -80 -261 +pin name C signal $abc$733$n137 layer 1 240 -501 +pin name Y signal sr<6>_FF_INPUT layer 1 80 -680 +cell 82 OAI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n139 layer 1 50 -100 +cell 83 AOI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n113 layer 1 -80 -261 +pin name C signal $abc$733$n139 layer 1 240 -501 +pin name Y signal sr<7>_FF_INPUT layer 1 80 -680 +cell 84 INVX1_20 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<1> layer 1 -80 -540 +pin name Y signal $abc$733$n141 layer 1 80 0 +cell 85 NOR2X1_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -540 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 160 -61 +end_pin_group +pin name Y signal $abc$733$n142 layer 1 0 -300 +cell 86 AND2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -240 -261 +end_pin_group +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -80 -100 +pin name Y signal $abc$733$n143 layer 1 179 -680 +cell 87 OAI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n142 layer 1 -160 -330 +pin name B signal $abc$733$n143 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n144 layer 1 50 -100 +cell 88 OAI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf1 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n141 layer 1 -80 -140 +pin name C signal $abc$733$n144 layer 1 160 300 +pin name Y signal counter<0>_FF_INPUT layer 1 50 -100 +cell 89 NOR2X1_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -540 +pin name B signal N<2> layer 1 160 -61 +pin name Y signal $abc$733$n146 layer 1 0 -300 +cell 90 NAND2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -340 +pin name B signal N<2> layer 1 160 140 +pin name Y signal $abc$733$n147 layer 1 100 -680 +cell 91 INVX1_21 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $abc$733$n147 layer 1 -80 -540 +pin name Y signal $abc$733$n148 layer 1 80 0 +cell 92 OAI21X1_14 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n146 layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n149 layer 1 50 -100 +cell 93 AND2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n81 layer 1 -240 -261 +pin name B signal state<3> layer 1 -80 -100 +pin name Y signal $abc$733$n150 layer 1 179 -680 +cell 94 INVX1_22 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -80 -540 +pin name Y signal $abc$733$n151_1 layer 1 80 0 +cell 95 NOR2X1_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n151_1 layer 1 -160 -540 +pin name B signal $abc$733$n142 layer 1 160 -61 +pin name Y signal $abc$733$n152 layer 1 0 -300 +cell 96 OAI21X1_15 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n150 layer 1 -160 -330 +pin name B signal $abc$733$n152 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n153_1 layer 1 50 -100 +cell 97 NAND2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n149 layer 1 -160 -340 +pin name B signal $abc$733$n153_1 layer 1 160 140 +pin name Y signal counter<1>_FF_INPUT layer 1 100 -680 +cell 98 NAND2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<3> layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n155 layer 1 100 -680 +cell 99 XOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $abc$733$n155 layer 1 -410 -290 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 439 -300 +pin name Y signal $abc$733$n156 layer 1 0 -700 +cell 100 INVX1_23 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<3> layer 1 -80 -540 +pin name Y signal $abc$733$n157 layer 1 80 0 +cell 101 NAND2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n157 layer 1 -160 -340 +pin name B signal $abc$733$n147 layer 1 160 140 +pin name Y signal $abc$733$n158_1 layer 1 100 -680 +cell 102 NAND2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -340 +pin name B signal $abc$733$n148 layer 1 160 140 +pin name Y signal $abc$733$n159 layer 1 100 -680 +cell 103 NAND3X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n158_1 layer 1 -40 -100 +pin name C signal $abc$733$n159 layer 1 80 260 +pin name Y signal $abc$733$n160_1 layer 1 -80 680 +cell 104 OAI21X1_16 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n156 layer 1 -80 -140 +pin name C signal $abc$733$n160_1 layer 1 160 300 +pin name Y signal counter<2>_FF_INPUT layer 1 50 -100 +cell 105 OAI21X1_17 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<3> layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal N<4> layer 1 160 300 +pin name Y signal $abc$733$n162_1 layer 1 50 -100 +cell 106 INVX1_24 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<4> layer 1 -80 -540 +pin name Y signal $abc$733$n163_1 layer 1 80 0 +cell 107 NAND3X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n157 layer 1 -240 60 +pin name B signal $abc$733$n163_1 layer 1 -40 -100 +pin name C signal $abc$733$n147 layer 1 80 260 +pin name Y signal $abc$733$n164_1 layer 1 -80 680 +cell 108 NAND2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -340 +pin name B signal $abc$733$n162_1 layer 1 160 140 +pin name Y signal $abc$733$n165 layer 1 100 -680 +cell 109 OR2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -240 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -40 -221 +pin name Y signal $abc$733$n166 layer 1 240 -100 +cell 110 OAI21X1_18 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<3> layer 1 160 300 +pin name Y signal $abc$733$n167 layer 1 50 -100 +cell 111 OAI21X1_19 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n166 layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $abc$733$n167 layer 1 160 300 +pin name Y signal $abc$733$n168 layer 1 50 -100 +cell 112 NAND2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf3 layer 1 -160 -340 +end_pin_group +pin name B signal $abc$733$n168 layer 1 160 140 +pin name Y signal $abc$733$n169 layer 1 100 -680 +cell 113 OAI21X1_20 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf2 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n165 layer 1 -80 -140 +pin name C signal $abc$733$n169 layer 1 160 300 +pin name Y signal counter<3>_FF_INPUT layer 1 50 -100 +cell 114 INVX1_25 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<5> layer 1 -80 -540 +pin name Y signal $abc$733$n171 layer 1 80 0 +cell 115 NOR2X1_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -540 +pin name B signal N<4> layer 1 160 -61 +pin name Y signal $abc$733$n172 layer 1 0 -300 +cell 116 AOI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n172 layer 1 -160 -70 +pin name B signal $abc$733$n147 layer 1 -80 -261 +pin name C signal $abc$733$n171 layer 1 240 -501 +pin name Y signal $abc$733$n173 layer 1 80 -680 +cell 117 OAI21X1_21 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n174 layer 1 50 -100 +cell 118 NOR2X1_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -540 +pin name B signal $abc$733$n166 layer 1 160 -61 +pin name Y signal $abc$733$n175 layer 1 0 -300 +cell 119 NAND2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n150 layer 1 160 140 +pin name Y signal $abc$733$n176 layer 1 100 -680 +cell 120 AOI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n175 layer 1 -240 -70 +pin name B signal $abc$733$n150 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<4> layer 1 320 -61 +pin name D signal $abc$733$n176 layer 1 140 -180 +pin name Y signal $abc$733$n177 layer 1 10 -431 +cell 121 OAI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n173 layer 1 -240 -330 +pin name B signal $abc$733$n174 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n177 layer 1 160 -140 +pin name Y signal counter<4>_FF_INPUT layer 1 0 -300 +cell 122 OAI21X1_22 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal N<6> layer 1 160 300 +pin name Y signal $abc$733$n179 layer 1 50 -100 +cell 123 OR2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -240 -540 +pin name B signal N<6> layer 1 -40 -221 +pin name Y signal $abc$733$n180 layer 1 240 -100 +cell 124 OAI21X1_23 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -330 +pin name B signal $abc$733$n180 layer 1 -80 -140 +pin name C signal $abc$733$n179 layer 1 160 300 +pin name Y signal $abc$733$n181 layer 1 50 -100 +cell 125 NOR2X1_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n155 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n182 layer 1 0 -300 +cell 126 INVX1_26 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -80 -540 +pin name Y signal $abc$733$n183 layer 1 80 0 +cell 127 AOI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n175 layer 1 -160 -70 +pin name B signal $abc$733$n150 layer 1 -80 -261 +pin name C signal $abc$733$n183 layer 1 240 -501 +pin name Y signal $abc$733$n184 layer 1 80 -680 +cell 128 OAI21X1_24 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -160 -330 +pin name B signal $abc$733$n184 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n185 layer 1 50 -100 +cell 129 OAI21X1_25 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf0 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n181 layer 1 -80 -140 +pin name C signal $abc$733$n185 layer 1 160 300 +pin name Y signal counter<5>_FF_INPUT layer 1 50 -100 +cell 130 INVX1_27 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<7> layer 1 -80 -540 +pin name Y signal $abc$733$n187 layer 1 80 0 +cell 131 NOR2X1_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n180 layer 1 -160 -540 +pin name B signal $abc$733$n164_1 layer 1 160 -61 +pin name Y signal $abc$733$n188 layer 1 0 -300 +cell 132 NOR2X1_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n187 layer 1 -160 -540 +pin name B signal $abc$733$n188 layer 1 160 -61 +pin name Y signal $abc$733$n189 layer 1 0 -300 +cell 133 NOR2X1_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<5> layer 1 -160 -540 +pin name B signal N<6> layer 1 160 -61 +pin name Y signal $abc$733$n190 layer 1 0 -300 +cell 134 NAND3X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n147 layer 1 -240 60 +pin name B signal $abc$733$n172 layer 1 -40 -100 +pin name C signal $abc$733$n190 layer 1 80 260 +pin name Y signal $abc$733$n191 layer 1 -80 680 +cell 135 OAI21X1_26 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n192 layer 1 50 -100 +cell 136 INVX1_28 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -80 -540 +pin name Y signal $abc$733$n193 layer 1 80 0 +cell 137 AND2X2_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n77 layer 1 -240 -261 +pin name B signal $abc$733$n78 layer 1 -80 -100 +pin name Y signal $abc$733$n194 layer 1 179 -680 +cell 138 NAND3X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n193 layer 1 -240 60 +pin name B signal $abc$733$n150 layer 1 -40 -100 +pin name C signal $abc$733$n194 layer 1 80 260 +pin name Y signal $abc$733$n195 layer 1 -80 680 +cell 139 OAI21X1_27 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n155 layer 1 -160 -330 +pin name B signal $abc$733$n79 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 300 +pin name Y signal $abc$733$n196 layer 1 50 -100 +cell 140 AND2X2_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n195 layer 1 -240 -261 +pin name B signal $abc$733$n196 layer 1 -80 -100 +pin name Y signal $abc$733$n197 layer 1 179 -680 +cell 141 OAI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n189 layer 1 -240 -330 +pin name B signal $abc$733$n192 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n197 layer 1 160 -140 +pin name Y signal counter<6>_FF_INPUT layer 1 0 -300 +cell 142 OAI21X1_28 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal N<8> layer 1 160 300 +pin name Y signal $abc$733$n199 layer 1 50 -100 +cell 143 INVX1_29 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<8> layer 1 -80 -540 +pin name Y signal $abc$733$n200 layer 1 80 0 +cell 144 NAND3X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n187 layer 1 -240 60 +pin name B signal $abc$733$n200 layer 1 -40 -100 +pin name C signal $abc$733$n188 layer 1 80 260 +pin name Y signal $abc$733$n201 layer 1 -80 680 +cell 145 NAND3X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n199 layer 1 -40 -100 +pin name C signal $abc$733$n201 layer 1 80 260 +pin name Y signal $abc$733$n202 layer 1 -80 680 +cell 146 AOI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -240 -70 +pin name B signal $abc$733$n83_1 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<7> layer 1 320 -61 +pin name D signal $abc$733$n195 layer 1 140 -180 +pin name Y signal $abc$733$n203 layer 1 10 -431 +cell 147 OAI21X1_29 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n203 layer 1 -80 -140 +pin name C signal $abc$733$n202 layer 1 160 300 +pin name Y signal counter<7>_FF_INPUT layer 1 50 -100 +cell 148 INVX1_30 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -80 -540 +pin name Y signal $abc$733$n205 layer 1 80 0 +cell 149 INVX1_31 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<2> layer 1 -80 -540 +pin name Y signal $abc$733$n206 layer 1 80 0 +cell 150 NAND3X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<4> layer 1 -240 60 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -40 -100 +end_pin_group +pin name C signal $abc$733$n206 layer 1 80 260 +pin name Y signal $abc$733$n207 layer 1 -80 680 +cell 151 AOI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n207 layer 1 -160 -70 +pin name B signal $abc$733$n205 layer 1 -80 -261 +pin name C signal state<0> layer 1 240 -501 +pin name Y signal done_FF_INPUT layer 1 80 -680 +cell 152 OAI21X1_30 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf2 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n209 layer 1 50 -100 +cell 153 AOI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf1 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n95_1 layer 1 -80 -261 +pin name C signal $abc$733$n209 layer 1 240 -501 +pin name Y signal sr<1>_FF_INPUT layer 1 80 -680 +cell 154 AND2X2_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n88 layer 1 -240 -261 +pin name B signal state<1> layer 1 -80 -100 +pin name Y signal $abc$546$n149 layer 1 179 -680 +cell 155 AND2X2_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -240 -261 +pin name B signal $abc$733$n80 layer 1 -80 -100 +pin name Y signal $abc$546$n150 layer 1 179 -680 +cell 156 INVX8_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal reset layer 1 -320 -340 +pin name Y signal $abc$733$n164 layer 1 -160 410 +cell 157 BUFX2_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -140 +pin name Y signal counter<0> layer 1 170 0 +cell 158 BUFX2_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -140 +pin name Y signal counter<1> layer 1 170 0 +cell 159 BUFX2_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -140 +pin name Y signal counter<2> layer 1 170 0 +cell 160 BUFX2_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -140 +pin name Y signal counter<3> layer 1 170 0 +cell 161 BUFX2_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -140 +pin name Y signal counter<4> layer 1 170 0 +cell 162 BUFX2_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -140 +pin name Y signal counter<5> layer 1 170 0 +cell 163 BUFX2_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -160 -140 +pin name Y signal counter<6> layer 1 170 0 +cell 164 BUFX2_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -140 +pin name Y signal counter<7> layer 1 170 0 +cell 165 BUFX2_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -160 -140 +pin name Y signal done layer 1 170 0 +cell 166 BUFX2_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -160 -140 +pin name Y signal dp<0> layer 1 170 0 +cell 167 BUFX2_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -160 -140 +pin name Y signal dp<1> layer 1 170 0 +cell 168 BUFX2_22 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -160 -140 +pin name Y signal dp<2> layer 1 170 0 +cell 169 BUFX2_23 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -160 -140 +pin name Y signal dp<3> layer 1 170 0 +cell 170 BUFX2_24 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -160 -140 +pin name Y signal dp<4> layer 1 170 0 +cell 171 BUFX2_25 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -160 -140 +pin name Y signal dp<5> layer 1 170 0 +cell 172 BUFX2_26 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -160 -140 +pin name Y signal dp<6> layer 1 170 0 +cell 173 BUFX2_27 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -160 -140 +pin name Y signal dp<7> layer 1 170 0 +cell 174 BUFX2_28 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -160 -140 +pin name Y signal dp<8> layer 1 170 0 +cell 175 BUFX2_29 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -140 +pin name Y signal sr<0> layer 1 170 0 +cell 176 BUFX2_30 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -140 +pin name Y signal sr<1> layer 1 170 0 +cell 177 BUFX2_31 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -140 +pin name Y signal sr<2> layer 1 170 0 +cell 178 BUFX2_32 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -140 +pin name Y signal sr<3> layer 1 170 0 +cell 179 BUFX2_33 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -140 +pin name Y signal sr<4> layer 1 170 0 +cell 180 BUFX2_34 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -140 +pin name Y signal sr<5> layer 1 170 0 +cell 181 BUFX2_35 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -140 +pin name Y signal sr<6> layer 1 170 0 +cell 182 BUFX2_36 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -140 +pin name Y signal sr<7> layer 1 170 0 +cell 183 DFFSR_1 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n149 layer 1 -400 -340 +pin name Q signal state<0> layer 1 1520 449 +pin name R signal vdd layer 1 -1040 -90 +pin_group +pin name $abc$733$n164_bF$pin/S signal $abc$733$n164_bF$buf4 layer 1 -1020 59 +end_pin_group +cell 184 DFFSR_2 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n5 layer 1 -400 -340 +pin name Q signal state<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 185 DFFSR_3 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n150 layer 1 -400 -340 +pin name Q signal state<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 186 DFFSR_4 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n2 layer 1 -400 -340 +pin name Q signal state<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 187 DFFSR_5 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal state<2> layer 1 -400 -340 +pin name Q signal state<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 188 DFFSR_6 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 189 DFFSR_7 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 190 DFFSR_8 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 191 DFFSR_9 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 192 DFFSR_10 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal dp<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 193 DFFSR_11 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 194 DFFSR_12 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 195 DFFSR_13 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 196 DFFSR_14 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<8>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<8> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 197 DFFSR_15 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal done_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$882 layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 198 DFFSR_16 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 199 DFFSR_17 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 200 DFFSR_18 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 201 DFFSR_19 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal counter<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 202 DFFSR_20 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal counter<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 203 DFFSR_21 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 204 DFFSR_22 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 205 DFFSR_23 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 206 DFFSR_24 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 207 DFFSR_25 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 208 DFFSR_26 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 209 DFFSR_27 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal sr<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 210 DFFSR_28 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal sr<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 211 DFFSR_29 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 212 DFFSR_30 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 213 DFFSR_31 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 214 DFFSR_32 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal start layer 1 -400 -340 +pin name Q signal startbuf layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 diff -Nru graywolf-0.1.5/tests/mincut/map9v3/expected/map9v3.stat graywolf-0.1.6/tests/mincut/map9v3/expected/map9v3.stat --- graywolf-0.1.5/tests/mincut/map9v3/expected/map9v3.stat 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/mincut/map9v3/expected/map9v3.stat 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,23 @@ +syntax version:v1.1 date:Mon May 25 21:11:10 EDT 1992 +TIMESTAMP:Thu Jul 19 21:21:05 2018 +Statistics for map9v3: +num_stdcells:215 +num_macros:0 +num_instances:0 +num_pads:38 +num_nets:228 +num_pins:735 +num_implicit_feeds:1334 +num_equivs:1334 +num_unequivs:0 +num_ports:38 +macro_area:0.000e+00 +tot_length:213440 +num_soft:1 +cell_height:2000 +tot_length:213440 +num_soft:1 +cell_height:2000 +tot_length:213440 +num_soft:1 +cell_height:2000 diff -Nru graywolf-0.1.5/tests/mincut/map9v3/map9v3.cel graywolf-0.1.6/tests/mincut/map9v3/map9v3.cel --- graywolf-0.1.5/tests/mincut/map9v3/map9v3.cel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/mincut/map9v3/map9v3.cel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,4148 @@ +cell 0 BUFX4_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf3 layer 1 89 -300 +cell 1 BUFX4_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf2 layer 1 89 -300 +cell 2 BUFX4_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf1 layer 1 89 -300 +cell 3 BUFX2_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n76 layer 1 -160 -140 +pin name Y signal $abc$733$n76_bF$buf0 layer 1 170 0 +cell 4 BUFX4_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf4 layer 1 89 -300 +cell 5 BUFX4_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf3 layer 1 89 -300 +cell 6 BUFX4_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf2 layer 1 89 -300 +cell 7 BUFX4_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf1 layer 1 89 -300 +cell 8 BUFX4_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf0 layer 1 89 -300 +cell 9 BUFX2_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf4 layer 1 170 0 +cell 10 BUFX2_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf3 layer 1 170 0 +cell 11 BUFX2_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf2 layer 1 170 0 +cell 12 BUFX2_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf1 layer 1 170 0 +cell 13 BUFX2_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf0 layer 1 170 0 +cell 14 BUFX2_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf3 layer 1 170 0 +cell 15 BUFX2_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf2 layer 1 170 0 +cell 16 BUFX2_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf1 layer 1 170 0 +cell 17 BUFX2_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf0 layer 1 170 0 +cell 18 INVX4_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<0> layer 1 -160 -340 +pin name Y signal $abc$733$n75_1 layer 1 0 0 +cell 19 INVX8_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -320 -340 +pin name Y signal $abc$733$n76 layer 1 -160 410 +cell 20 NOR2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 160 -61 +pin name Y signal $abc$733$n77 layer 1 0 -300 +cell 21 NOR2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<4> layer 1 160 -61 +pin name Y signal $abc$733$n78 layer 1 0 -300 +cell 22 NAND2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n78 layer 1 160 140 +pin name Y signal $abc$733$n79 layer 1 100 -680 +cell 23 NOR2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 -61 +pin name Y signal $abc$733$n80 layer 1 0 -300 +cell 24 NOR2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 160 -61 +pin name Y signal $abc$733$n81 layer 1 0 -300 +cell 25 NAND2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n80 layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n82 layer 1 100 -680 +cell 26 NOR2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n82 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n83_1 layer 1 0 -300 +cell 27 OAI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf3 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n83_1 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$546$n2 layer 1 50 -100 +cell 28 INVX1_1 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<4> layer 1 -80 -540 +pin name Y signal $abc$733$n85_1 layer 1 80 0 +cell 29 INVX1_2 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<1> layer 1 -80 -540 +pin name Y signal $abc$733$n86 layer 1 80 0 +cell 30 INVX1_3 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal start layer 1 -80 -540 +pin name Y signal $abc$733$n87_1 layer 1 80 0 +cell 31 NOR2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal startbuf layer 1 -160 -540 +pin name B signal $abc$733$n87_1 layer 1 160 -61 +pin name Y signal $abc$733$n88 layer 1 0 -300 +cell 32 OAI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n86 layer 1 -160 -330 +pin name B signal $abc$733$n88 layer 1 -80 -140 +pin name C signal $abc$733$n85_1 layer 1 160 300 +pin name Y signal $abc$546$n5 layer 1 50 -100 +cell 33 INVX1_4 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -80 -540 +pin name Y signal $abc$733$n90 layer 1 80 0 +cell 34 NAND3X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<2> layer 1 -240 60 +pin_group +pin name $abc$733$n75_1_bF$pin/B signal $abc$733$n75_1_bF$buf2 layer 1 -40 -100 +end_pin_group +pin_group +pin name $abc$733$n76_bF$pin/C signal $abc$733$n76_bF$buf2 layer 1 80 260 +end_pin_group +pin name Y signal $abc$733$n91_1 layer 1 -80 680 +cell 35 NOR2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n92 layer 1 0 -300 +cell 36 AOI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n90 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n92 layer 1 240 -501 +pin name Y signal dp<1>_FF_INPUT layer 1 80 -680 +cell 37 INVX1_5 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -80 -540 +pin name Y signal $abc$733$n94 layer 1 80 0 +cell 38 INVX1_6 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -80 -540 +pin name Y signal $abc$733$n95_1 layer 1 80 0 +cell 39 MUX2X1_1 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n94 layer 1 240 -61 +pin name B signal $abc$733$n95_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<2>_FF_INPUT layer 1 19 500 +cell 40 INVX1_7 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -80 -540 +pin name Y signal $abc$733$n97_1 layer 1 80 0 +cell 41 INVX1_8 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -80 -540 +pin name Y signal $abc$733$n98_1 layer 1 80 0 +cell 42 MUX2X1_2 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n97_1 layer 1 240 -61 +pin name B signal $abc$733$n98_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<3>_FF_INPUT layer 1 19 500 +cell 43 INVX1_9 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -80 -540 +pin name Y signal $abc$733$n100 layer 1 80 0 +cell 44 INVX1_10 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -80 -540 +pin name Y signal $abc$733$n101_1 layer 1 80 0 +cell 45 MUX2X1_3 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n100 layer 1 240 -61 +pin name B signal $abc$733$n101_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<4>_FF_INPUT layer 1 19 500 +cell 46 INVX1_11 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -80 -540 +pin name Y signal $abc$733$n103_1 layer 1 80 0 +cell 47 INVX1_12 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -80 -540 +pin name Y signal $abc$733$n104 layer 1 80 0 +cell 48 MUX2X1_4 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n103_1 layer 1 240 -61 +pin name B signal $abc$733$n104 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<5>_FF_INPUT layer 1 19 500 +cell 49 INVX1_13 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -80 -540 +pin name Y signal $abc$733$n106_1 layer 1 80 0 +cell 50 INVX1_14 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -80 -540 +pin name Y signal $abc$733$n107 layer 1 80 0 +cell 51 MUX2X1_5 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n106_1 layer 1 240 -61 +pin name B signal $abc$733$n107 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<6>_FF_INPUT layer 1 19 500 +cell 52 INVX1_15 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -80 -540 +pin name Y signal $abc$733$n109 layer 1 80 0 +cell 53 INVX1_16 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -80 -540 +pin name Y signal $abc$733$n110_1 layer 1 80 0 +cell 54 MUX2X1_6 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n109 layer 1 240 -61 +pin name B signal $abc$733$n110_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<7>_FF_INPUT layer 1 19 500 +cell 55 INVX1_17 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -80 -540 +pin name Y signal $abc$733$n112 layer 1 80 0 +cell 56 INVX1_18 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -80 -540 +pin name Y signal $abc$733$n113 layer 1 80 0 +cell 57 MUX2X1_7 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n112 layer 1 240 -61 +pin name B signal $abc$733$n113 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<8>_FF_INPUT layer 1 19 500 +cell 58 INVX1_19 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -80 -540 +pin name Y signal $abc$733$n115 layer 1 80 0 +cell 59 NOR2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n116_1 layer 1 0 -300 +cell 60 AOI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n115 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n116_1 layer 1 240 -501 +pin name Y signal dp<0>_FF_INPUT layer 1 80 -680 +cell 61 XNOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<7> layer 1 439 -300 +pin name Y signal $abc$733$n118_1 layer 1 50 -500 +cell 62 NOR2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -540 +pin name B signal $abc$733$n101_1 layer 1 160 -61 +pin name Y signal $abc$733$n119 layer 1 0 -300 +cell 63 NOR2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -540 +pin name B signal $abc$733$n104 layer 1 160 -61 +pin name Y signal $abc$733$n120 layer 1 0 -300 +cell 64 OAI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n119 layer 1 -160 -330 +pin name B signal $abc$733$n120 layer 1 -80 -140 +pin name C signal $abc$733$n118_1 layer 1 160 300 +pin name Y signal $abc$733$n121 layer 1 50 -100 +cell 65 NOR2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -540 +pin name B signal $abc$733$n107 layer 1 160 -61 +pin name Y signal $abc$733$n122 layer 1 0 -300 +cell 66 NOR2X1_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -540 +pin name B signal $abc$733$n113 layer 1 160 -61 +pin name Y signal $abc$733$n123_1 layer 1 0 -300 +cell 67 XNOR2X1_2 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<4> layer 1 439 -300 +pin name Y signal $abc$733$n124 layer 1 50 -500 +cell 68 OAI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n122 layer 1 -160 -330 +pin name B signal $abc$733$n123_1 layer 1 -80 -140 +pin name C signal $abc$733$n124 layer 1 160 300 +pin name Y signal $abc$733$n125 layer 1 50 -100 +cell 69 NAND2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n121 layer 1 -160 -340 +pin name B signal $abc$733$n125 layer 1 160 140 +pin name Y signal $abc$733$n126 layer 1 100 -680 +cell 70 OAI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<3> layer 1 -160 -330 +pin name B signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n127 layer 1 50 -100 +cell 71 AOI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n126 layer 1 -160 -70 +pin name B signal state<3> layer 1 -80 -261 +pin name C signal $abc$733$n127 layer 1 240 -501 +pin name Y signal sr<0>_FF_INPUT layer 1 80 -680 +cell 72 OAI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n129 layer 1 50 -100 +cell 73 AOI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n98_1 layer 1 -80 -261 +pin name C signal $abc$733$n129 layer 1 240 -501 +pin name Y signal sr<2>_FF_INPUT layer 1 80 -680 +cell 74 OAI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n131 layer 1 50 -100 +cell 75 AOI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n101_1 layer 1 -80 -261 +pin name C signal $abc$733$n131 layer 1 240 -501 +pin name Y signal sr<3>_FF_INPUT layer 1 80 -680 +cell 76 OAI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n133_1 layer 1 50 -100 +cell 77 AOI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n104 layer 1 -80 -261 +pin name C signal $abc$733$n133_1 layer 1 240 -501 +pin name Y signal sr<4>_FF_INPUT layer 1 80 -680 +cell 78 OAI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n135_1 layer 1 50 -100 +cell 79 AOI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n107 layer 1 -80 -261 +pin name C signal $abc$733$n135_1 layer 1 240 -501 +pin name Y signal sr<5>_FF_INPUT layer 1 80 -680 +cell 80 OAI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n137 layer 1 50 -100 +cell 81 AOI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n110_1 layer 1 -80 -261 +pin name C signal $abc$733$n137 layer 1 240 -501 +pin name Y signal sr<6>_FF_INPUT layer 1 80 -680 +cell 82 OAI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n139 layer 1 50 -100 +cell 83 AOI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n113 layer 1 -80 -261 +pin name C signal $abc$733$n139 layer 1 240 -501 +pin name Y signal sr<7>_FF_INPUT layer 1 80 -680 +cell 84 INVX1_20 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<1> layer 1 -80 -540 +pin name Y signal $abc$733$n141 layer 1 80 0 +cell 85 NOR2X1_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -540 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 160 -61 +end_pin_group +pin name Y signal $abc$733$n142 layer 1 0 -300 +cell 86 AND2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -240 -261 +end_pin_group +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -80 -100 +pin name Y signal $abc$733$n143 layer 1 179 -680 +cell 87 OAI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n142 layer 1 -160 -330 +pin name B signal $abc$733$n143 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n144 layer 1 50 -100 +cell 88 OAI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf1 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n141 layer 1 -80 -140 +pin name C signal $abc$733$n144 layer 1 160 300 +pin name Y signal counter<0>_FF_INPUT layer 1 50 -100 +cell 89 NOR2X1_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -540 +pin name B signal N<2> layer 1 160 -61 +pin name Y signal $abc$733$n146 layer 1 0 -300 +cell 90 NAND2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -340 +pin name B signal N<2> layer 1 160 140 +pin name Y signal $abc$733$n147 layer 1 100 -680 +cell 91 INVX1_21 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $abc$733$n147 layer 1 -80 -540 +pin name Y signal $abc$733$n148 layer 1 80 0 +cell 92 OAI21X1_14 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n146 layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n149 layer 1 50 -100 +cell 93 AND2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n81 layer 1 -240 -261 +pin name B signal state<3> layer 1 -80 -100 +pin name Y signal $abc$733$n150 layer 1 179 -680 +cell 94 INVX1_22 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -80 -540 +pin name Y signal $abc$733$n151_1 layer 1 80 0 +cell 95 NOR2X1_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n151_1 layer 1 -160 -540 +pin name B signal $abc$733$n142 layer 1 160 -61 +pin name Y signal $abc$733$n152 layer 1 0 -300 +cell 96 OAI21X1_15 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n150 layer 1 -160 -330 +pin name B signal $abc$733$n152 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n153_1 layer 1 50 -100 +cell 97 NAND2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n149 layer 1 -160 -340 +pin name B signal $abc$733$n153_1 layer 1 160 140 +pin name Y signal counter<1>_FF_INPUT layer 1 100 -680 +cell 98 NAND2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<3> layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n155 layer 1 100 -680 +cell 99 XOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $abc$733$n155 layer 1 -410 -290 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 439 -300 +pin name Y signal $abc$733$n156 layer 1 0 -700 +cell 100 INVX1_23 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<3> layer 1 -80 -540 +pin name Y signal $abc$733$n157 layer 1 80 0 +cell 101 NAND2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n157 layer 1 -160 -340 +pin name B signal $abc$733$n147 layer 1 160 140 +pin name Y signal $abc$733$n158_1 layer 1 100 -680 +cell 102 NAND2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -340 +pin name B signal $abc$733$n148 layer 1 160 140 +pin name Y signal $abc$733$n159 layer 1 100 -680 +cell 103 NAND3X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n158_1 layer 1 -40 -100 +pin name C signal $abc$733$n159 layer 1 80 260 +pin name Y signal $abc$733$n160_1 layer 1 -80 680 +cell 104 OAI21X1_16 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n156 layer 1 -80 -140 +pin name C signal $abc$733$n160_1 layer 1 160 300 +pin name Y signal counter<2>_FF_INPUT layer 1 50 -100 +cell 105 OAI21X1_17 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<3> layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal N<4> layer 1 160 300 +pin name Y signal $abc$733$n162_1 layer 1 50 -100 +cell 106 INVX1_24 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<4> layer 1 -80 -540 +pin name Y signal $abc$733$n163_1 layer 1 80 0 +cell 107 NAND3X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n157 layer 1 -240 60 +pin name B signal $abc$733$n163_1 layer 1 -40 -100 +pin name C signal $abc$733$n147 layer 1 80 260 +pin name Y signal $abc$733$n164_1 layer 1 -80 680 +cell 108 NAND2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -340 +pin name B signal $abc$733$n162_1 layer 1 160 140 +pin name Y signal $abc$733$n165 layer 1 100 -680 +cell 109 OR2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -240 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -40 -221 +pin name Y signal $abc$733$n166 layer 1 240 -100 +cell 110 OAI21X1_18 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<3> layer 1 160 300 +pin name Y signal $abc$733$n167 layer 1 50 -100 +cell 111 OAI21X1_19 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n166 layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $abc$733$n167 layer 1 160 300 +pin name Y signal $abc$733$n168 layer 1 50 -100 +cell 112 NAND2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf3 layer 1 -160 -340 +end_pin_group +pin name B signal $abc$733$n168 layer 1 160 140 +pin name Y signal $abc$733$n169 layer 1 100 -680 +cell 113 OAI21X1_20 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf2 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n165 layer 1 -80 -140 +pin name C signal $abc$733$n169 layer 1 160 300 +pin name Y signal counter<3>_FF_INPUT layer 1 50 -100 +cell 114 INVX1_25 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<5> layer 1 -80 -540 +pin name Y signal $abc$733$n171 layer 1 80 0 +cell 115 NOR2X1_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -540 +pin name B signal N<4> layer 1 160 -61 +pin name Y signal $abc$733$n172 layer 1 0 -300 +cell 116 AOI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n172 layer 1 -160 -70 +pin name B signal $abc$733$n147 layer 1 -80 -261 +pin name C signal $abc$733$n171 layer 1 240 -501 +pin name Y signal $abc$733$n173 layer 1 80 -680 +cell 117 OAI21X1_21 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n174 layer 1 50 -100 +cell 118 NOR2X1_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -540 +pin name B signal $abc$733$n166 layer 1 160 -61 +pin name Y signal $abc$733$n175 layer 1 0 -300 +cell 119 NAND2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n150 layer 1 160 140 +pin name Y signal $abc$733$n176 layer 1 100 -680 +cell 120 AOI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n175 layer 1 -240 -70 +pin name B signal $abc$733$n150 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<4> layer 1 320 -61 +pin name D signal $abc$733$n176 layer 1 140 -180 +pin name Y signal $abc$733$n177 layer 1 10 -431 +cell 121 OAI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n173 layer 1 -240 -330 +pin name B signal $abc$733$n174 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n177 layer 1 160 -140 +pin name Y signal counter<4>_FF_INPUT layer 1 0 -300 +cell 122 OAI21X1_22 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal N<6> layer 1 160 300 +pin name Y signal $abc$733$n179 layer 1 50 -100 +cell 123 OR2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -240 -540 +pin name B signal N<6> layer 1 -40 -221 +pin name Y signal $abc$733$n180 layer 1 240 -100 +cell 124 OAI21X1_23 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -330 +pin name B signal $abc$733$n180 layer 1 -80 -140 +pin name C signal $abc$733$n179 layer 1 160 300 +pin name Y signal $abc$733$n181 layer 1 50 -100 +cell 125 NOR2X1_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n155 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n182 layer 1 0 -300 +cell 126 INVX1_26 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -80 -540 +pin name Y signal $abc$733$n183 layer 1 80 0 +cell 127 AOI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n175 layer 1 -160 -70 +pin name B signal $abc$733$n150 layer 1 -80 -261 +pin name C signal $abc$733$n183 layer 1 240 -501 +pin name Y signal $abc$733$n184 layer 1 80 -680 +cell 128 OAI21X1_24 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -160 -330 +pin name B signal $abc$733$n184 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n185 layer 1 50 -100 +cell 129 OAI21X1_25 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf0 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n181 layer 1 -80 -140 +pin name C signal $abc$733$n185 layer 1 160 300 +pin name Y signal counter<5>_FF_INPUT layer 1 50 -100 +cell 130 INVX1_27 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<7> layer 1 -80 -540 +pin name Y signal $abc$733$n187 layer 1 80 0 +cell 131 NOR2X1_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n180 layer 1 -160 -540 +pin name B signal $abc$733$n164_1 layer 1 160 -61 +pin name Y signal $abc$733$n188 layer 1 0 -300 +cell 132 NOR2X1_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n187 layer 1 -160 -540 +pin name B signal $abc$733$n188 layer 1 160 -61 +pin name Y signal $abc$733$n189 layer 1 0 -300 +cell 133 NOR2X1_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<5> layer 1 -160 -540 +pin name B signal N<6> layer 1 160 -61 +pin name Y signal $abc$733$n190 layer 1 0 -300 +cell 134 NAND3X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n147 layer 1 -240 60 +pin name B signal $abc$733$n172 layer 1 -40 -100 +pin name C signal $abc$733$n190 layer 1 80 260 +pin name Y signal $abc$733$n191 layer 1 -80 680 +cell 135 OAI21X1_26 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n192 layer 1 50 -100 +cell 136 INVX1_28 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -80 -540 +pin name Y signal $abc$733$n193 layer 1 80 0 +cell 137 AND2X2_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n77 layer 1 -240 -261 +pin name B signal $abc$733$n78 layer 1 -80 -100 +pin name Y signal $abc$733$n194 layer 1 179 -680 +cell 138 NAND3X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n193 layer 1 -240 60 +pin name B signal $abc$733$n150 layer 1 -40 -100 +pin name C signal $abc$733$n194 layer 1 80 260 +pin name Y signal $abc$733$n195 layer 1 -80 680 +cell 139 OAI21X1_27 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n155 layer 1 -160 -330 +pin name B signal $abc$733$n79 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 300 +pin name Y signal $abc$733$n196 layer 1 50 -100 +cell 140 AND2X2_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n195 layer 1 -240 -261 +pin name B signal $abc$733$n196 layer 1 -80 -100 +pin name Y signal $abc$733$n197 layer 1 179 -680 +cell 141 OAI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n189 layer 1 -240 -330 +pin name B signal $abc$733$n192 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n197 layer 1 160 -140 +pin name Y signal counter<6>_FF_INPUT layer 1 0 -300 +cell 142 OAI21X1_28 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal N<8> layer 1 160 300 +pin name Y signal $abc$733$n199 layer 1 50 -100 +cell 143 INVX1_29 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<8> layer 1 -80 -540 +pin name Y signal $abc$733$n200 layer 1 80 0 +cell 144 NAND3X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n187 layer 1 -240 60 +pin name B signal $abc$733$n200 layer 1 -40 -100 +pin name C signal $abc$733$n188 layer 1 80 260 +pin name Y signal $abc$733$n201 layer 1 -80 680 +cell 145 NAND3X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n199 layer 1 -40 -100 +pin name C signal $abc$733$n201 layer 1 80 260 +pin name Y signal $abc$733$n202 layer 1 -80 680 +cell 146 AOI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -240 -70 +pin name B signal $abc$733$n83_1 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<7> layer 1 320 -61 +pin name D signal $abc$733$n195 layer 1 140 -180 +pin name Y signal $abc$733$n203 layer 1 10 -431 +cell 147 OAI21X1_29 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n203 layer 1 -80 -140 +pin name C signal $abc$733$n202 layer 1 160 300 +pin name Y signal counter<7>_FF_INPUT layer 1 50 -100 +cell 148 INVX1_30 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -80 -540 +pin name Y signal $abc$733$n205 layer 1 80 0 +cell 149 INVX1_31 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<2> layer 1 -80 -540 +pin name Y signal $abc$733$n206 layer 1 80 0 +cell 150 NAND3X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<4> layer 1 -240 60 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -40 -100 +end_pin_group +pin name C signal $abc$733$n206 layer 1 80 260 +pin name Y signal $abc$733$n207 layer 1 -80 680 +cell 151 AOI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n207 layer 1 -160 -70 +pin name B signal $abc$733$n205 layer 1 -80 -261 +pin name C signal state<0> layer 1 240 -501 +pin name Y signal done_FF_INPUT layer 1 80 -680 +cell 152 OAI21X1_30 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf2 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n209 layer 1 50 -100 +cell 153 AOI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf1 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n95_1 layer 1 -80 -261 +pin name C signal $abc$733$n209 layer 1 240 -501 +pin name Y signal sr<1>_FF_INPUT layer 1 80 -680 +cell 154 AND2X2_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n88 layer 1 -240 -261 +pin name B signal state<1> layer 1 -80 -100 +pin name Y signal $abc$546$n149 layer 1 179 -680 +cell 155 AND2X2_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -240 -261 +pin name B signal $abc$733$n80 layer 1 -80 -100 +pin name Y signal $abc$546$n150 layer 1 179 -680 +cell 156 INVX8_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal reset layer 1 -320 -340 +pin name Y signal $abc$733$n164 layer 1 -160 410 +cell 157 BUFX2_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -140 +pin name Y signal counter<0> layer 1 170 0 +cell 158 BUFX2_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -140 +pin name Y signal counter<1> layer 1 170 0 +cell 159 BUFX2_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -140 +pin name Y signal counter<2> layer 1 170 0 +cell 160 BUFX2_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -140 +pin name Y signal counter<3> layer 1 170 0 +cell 161 BUFX2_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -140 +pin name Y signal counter<4> layer 1 170 0 +cell 162 BUFX2_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -140 +pin name Y signal counter<5> layer 1 170 0 +cell 163 BUFX2_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -160 -140 +pin name Y signal counter<6> layer 1 170 0 +cell 164 BUFX2_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -140 +pin name Y signal counter<7> layer 1 170 0 +cell 165 BUFX2_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -160 -140 +pin name Y signal done layer 1 170 0 +cell 166 BUFX2_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -160 -140 +pin name Y signal dp<0> layer 1 170 0 +cell 167 BUFX2_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -160 -140 +pin name Y signal dp<1> layer 1 170 0 +cell 168 BUFX2_22 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -160 -140 +pin name Y signal dp<2> layer 1 170 0 +cell 169 BUFX2_23 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -160 -140 +pin name Y signal dp<3> layer 1 170 0 +cell 170 BUFX2_24 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -160 -140 +pin name Y signal dp<4> layer 1 170 0 +cell 171 BUFX2_25 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -160 -140 +pin name Y signal dp<5> layer 1 170 0 +cell 172 BUFX2_26 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -160 -140 +pin name Y signal dp<6> layer 1 170 0 +cell 173 BUFX2_27 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -160 -140 +pin name Y signal dp<7> layer 1 170 0 +cell 174 BUFX2_28 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -160 -140 +pin name Y signal dp<8> layer 1 170 0 +cell 175 BUFX2_29 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -140 +pin name Y signal sr<0> layer 1 170 0 +cell 176 BUFX2_30 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -140 +pin name Y signal sr<1> layer 1 170 0 +cell 177 BUFX2_31 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -140 +pin name Y signal sr<2> layer 1 170 0 +cell 178 BUFX2_32 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -140 +pin name Y signal sr<3> layer 1 170 0 +cell 179 BUFX2_33 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -140 +pin name Y signal sr<4> layer 1 170 0 +cell 180 BUFX2_34 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -140 +pin name Y signal sr<5> layer 1 170 0 +cell 181 BUFX2_35 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -140 +pin name Y signal sr<6> layer 1 170 0 +cell 182 BUFX2_36 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -140 +pin name Y signal sr<7> layer 1 170 0 +cell 183 DFFSR_1 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n149 layer 1 -400 -340 +pin name Q signal state<0> layer 1 1520 449 +pin name R signal vdd layer 1 -1040 -90 +pin_group +pin name $abc$733$n164_bF$pin/S signal $abc$733$n164_bF$buf4 layer 1 -1020 59 +end_pin_group +cell 184 DFFSR_2 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n5 layer 1 -400 -340 +pin name Q signal state<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 185 DFFSR_3 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n150 layer 1 -400 -340 +pin name Q signal state<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 186 DFFSR_4 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n2 layer 1 -400 -340 +pin name Q signal state<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 187 DFFSR_5 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal state<2> layer 1 -400 -340 +pin name Q signal state<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 188 DFFSR_6 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 189 DFFSR_7 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 190 DFFSR_8 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 191 DFFSR_9 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 192 DFFSR_10 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal dp<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 193 DFFSR_11 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 194 DFFSR_12 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 195 DFFSR_13 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 196 DFFSR_14 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<8>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<8> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 197 DFFSR_15 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal done_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$882 layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 198 DFFSR_16 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 199 DFFSR_17 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 200 DFFSR_18 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 201 DFFSR_19 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal counter<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 202 DFFSR_20 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal counter<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 203 DFFSR_21 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 204 DFFSR_22 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 205 DFFSR_23 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 206 DFFSR_24 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 207 DFFSR_25 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 208 DFFSR_26 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 209 DFFSR_27 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal sr<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 210 DFFSR_28 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal sr<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 211 DFFSR_29 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 212 DFFSR_30 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 213 DFFSR_31 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 214 DFFSR_32 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal start layer 1 -400 -340 +pin name Q signal startbuf layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +pad 1 name twpin_clock +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name clock signal clock layer 1 0 0 + +pad 2 name twpin_reset +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name reset signal reset layer 1 0 0 + +pad 3 name twpin_start +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name start signal start layer 1 0 0 + +pad 4 name twpin_N<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<0> signal N<0> layer 1 0 0 + +pad 5 name twpin_N<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<1> signal N<1> layer 1 0 0 + +pad 6 name twpin_N<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<2> signal N<2> layer 1 0 0 + +pad 7 name twpin_N<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<3> signal N<3> layer 1 0 0 + +pad 8 name twpin_N<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<4> signal N<4> layer 1 0 0 + +pad 9 name twpin_N<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<5> signal N<5> layer 1 0 0 + +pad 10 name twpin_N<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<6> signal N<6> layer 1 0 0 + +pad 11 name twpin_N<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<7> signal N<7> layer 1 0 0 + +pad 12 name twpin_N<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<8> signal N<8> layer 1 0 0 + +pad 13 name twpin_dp<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<0> signal dp<0> layer 1 0 0 + +pad 14 name twpin_dp<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<1> signal dp<1> layer 1 0 0 + +pad 15 name twpin_dp<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<2> signal dp<2> layer 1 0 0 + +pad 16 name twpin_dp<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<3> signal dp<3> layer 1 0 0 + +pad 17 name twpin_dp<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<4> signal dp<4> layer 1 0 0 + +pad 18 name twpin_dp<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<5> signal dp<5> layer 1 0 0 + +pad 19 name twpin_dp<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<6> signal dp<6> layer 1 0 0 + +pad 20 name twpin_dp<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<7> signal dp<7> layer 1 0 0 + +pad 21 name twpin_dp<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<8> signal dp<8> layer 1 0 0 + +pad 22 name twpin_done +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name done signal done layer 1 0 0 + +pad 23 name twpin_counter<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<0> signal counter<0> layer 1 0 0 + +pad 24 name twpin_counter<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<1> signal counter<1> layer 1 0 0 + +pad 25 name twpin_counter<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<2> signal counter<2> layer 1 0 0 + +pad 26 name twpin_counter<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<3> signal counter<3> layer 1 0 0 + +pad 27 name twpin_counter<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<4> signal counter<4> layer 1 0 0 + +pad 28 name twpin_counter<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<5> signal counter<5> layer 1 0 0 + +pad 29 name twpin_counter<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<6> signal counter<6> layer 1 0 0 + +pad 30 name twpin_counter<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<7> signal counter<7> layer 1 0 0 + +pad 31 name twpin_sr<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<0> signal sr<0> layer 1 0 0 + +pad 32 name twpin_sr<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<1> signal sr<1> layer 1 0 0 + +pad 33 name twpin_sr<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<2> signal sr<2> layer 1 0 0 + +pad 34 name twpin_sr<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<3> signal sr<3> layer 1 0 0 + +pad 35 name twpin_sr<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<4> signal sr<4> layer 1 0 0 + +pad 36 name twpin_sr<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<5> signal sr<5> layer 1 0 0 + +pad 37 name twpin_sr<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<6> signal sr<6> layer 1 0 0 + +pad 38 name twpin_sr<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<7> signal sr<7> layer 1 0 0 + + diff -Nru graywolf-0.1.5/tests/mincut/map9v3/map9v3.par graywolf-0.1.6/tests/mincut/map9v3/map9v3.par --- graywolf-0.1.5/tests/mincut/map9v3/map9v3.par 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/mincut/map9v3/map9v3.par 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,67 @@ +# osu035.par --- Parameter file for GrayWolf +# NOTE: all distance units are in centimicrons unless otherwise stated + +RULES + # values are resistance in ohms/sq and capacitance in fF/um^2 + layer metal1 0.07 0.030 horizontal + layer metal2 0.07 0.017 vertical + layer metal3 0.07 0.006 horizontal + layer metal4 0.04 0.004 vertical + + via via12 metal1 metal2 + via via23 metal2 metal3 + via via34 metal3 metal4 + + width metal1 60 + width metal2 60 + width metal3 60 + width metal4 120 + width via12 60 + width via23 60 + width via34 120 + + # Set spacing = track pitch - width, so that GrayWolf places pins + # on the right pitch. + # Pitches are (in um): + # metal1 = 200, metal2 = 160, metal3 = 200, metal4 = 320 + + spacing metal1 metal1 140 + spacing metal2 metal2 100 + spacing metal3 metal3 140 + spacing metal4 metal4 200 + + # Stacked vias allowed + spacing via12 via23 0 + spacing via23 via34 0 + + overhang via12 metal1 8 + overhang via12 metal2 6 + + overhang via23 metal2 8 + overhang via23 metal3 6 + + overhang via34 metal3 14 + overhang via34 metal4 16 +ENDRULES + +*vertical_wire_weight : 1.0 +*vertical_path_weight : 1.0 +*padspacing : variable +*rowSep : 0.0 0 +*track.pitch : 160 +*graphics.wait : off +*last_chance.wait : off +*random.seed : 12345 + +TWMC*chip.aspect.ratio : 0.75 + +TWSC*feedThruWidth : 160 layer 1 +TWSC*do.global.route : on +TWSC*ignore_feeds : true +TWSC*call_row_evener : true +TWSC*even_rows_maximally : true +# TWSC*no.graphics : on + +GENR*row_to_tile_spacing: 1 +# GENR*numrows : 6 +GENR*flip_alternate_rows : 1 diff -Nru graywolf-0.1.5/tests/mincut/map9v3/map9v3.stat graywolf-0.1.6/tests/mincut/map9v3/map9v3.stat --- graywolf-0.1.5/tests/mincut/map9v3/map9v3.stat 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/mincut/map9v3/map9v3.stat 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,20 @@ +syntax version:v1.1 date:Mon May 25 21:11:10 EDT 1992 +TIMESTAMP:Thu Jul 19 21:21:05 2018 +Statistics for map9v3: +num_stdcells:215 +num_macros:0 +num_instances:0 +num_pads:38 +num_nets:228 +num_pins:735 +num_implicit_feeds:1334 +num_equivs:1334 +num_unequivs:0 +num_ports:38 +macro_area:0.000e+00 +tot_length:213440 +num_soft:1 +cell_height:2000 +tot_length:213440 +num_soft:1 +cell_height:2000 diff -Nru graywolf-0.1.5/tests/mincut/runtest.sh graywolf-0.1.6/tests/mincut/runtest.sh --- graywolf-0.1.5/tests/mincut/runtest.sh 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/mincut/runtest.sh 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,41 @@ +#!/bin/bash + +SOURCEDIR=$1 +BINDIR=$2 +TESTNAME=$3 + +#TWDIR=${BINDIR}/micro_env ${BINDIR}/src/twflow/graywolf +TMPDIR=`mktemp -d` +rsync ${SOURCEDIR}/tests/mincut/${TESTNAME} ${TMPDIR}/ -a --copy-links -v + + +pushd ${TMPDIR}/${TESTNAME} +TWDIR=${BINDIR}/micro_env ${BINDIR}/micro_env/bin/Mincut ${TESTNAME} + +RET=0 +diff ${TESTNAME}.scel expected/${TESTNAME}.scel +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi +diff ${TESTNAME}.mcel expected/${TESTNAME}.mcel +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi +diff ${TESTNAME}.stat expected/${TESTNAME}.stat +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +if [ "$#" = "4" ] && [ "$4" == "1" ] ; then + cp * ${SOURCEDIR}/tests/mincut/${TESTNAME}/expected/ + touch ${SOURCEDIR}/tests/mincut/${TESTNAME}/expected/updated +fi + +popd +rm -rf ${TMPDIR} +#echo ${TMPDIR} + +exit $RET diff -Nru graywolf-0.1.5/tests/picosoc/picosoc.cel graywolf-0.1.6/tests/picosoc/picosoc.cel --- graywolf-0.1.5/tests/picosoc/picosoc.cel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/picosoc/picosoc.cel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,7771 @@ +cell 0 FILL.80.BUFX4_1 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _16_ layer 1 -115 -50 +pin name Y signal _16__bF$buf3 layer 1 44 -150 +cell 1 BUFX4_2 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _16_ layer 1 -115 -50 +pin name Y signal _16__bF$buf2 layer 1 44 -150 +cell 2 FILL.80.BUFX4_3 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _16_ layer 1 -115 -50 +pin name Y signal _16__bF$buf1 layer 1 44 -150 +cell 3 BUFX4_4 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _16_ layer 1 -115 -50 +pin name Y signal _16__bF$buf0 layer 1 44 -150 +cell 4 FILL.80.BUFX4_5 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _24_ layer 1 -115 -50 +pin name Y signal _24__bF$buf4 layer 1 44 -150 +cell 5 BUFX4_6 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _24_ layer 1 -115 -50 +pin name Y signal _24__bF$buf3 layer 1 44 -150 +cell 6 FILL.80.BUFX4_7 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _24_ layer 1 -115 -50 +pin name Y signal _24__bF$buf2 layer 1 44 -150 +cell 7 BUFX4_8 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _24_ layer 1 -115 -50 +pin name Y signal _24__bF$buf1 layer 1 44 -150 +cell 8 BUFX4_9 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _24_ layer 1 -115 -50 +pin name Y signal _24__bF$buf0 layer 1 44 -150 +cell 9 FILL.80.BUFX4_10 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _62_ layer 1 -115 -50 +pin name Y signal _62__bF$buf4 layer 1 44 -150 +cell 10 BUFX4_11 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _62_ layer 1 -115 -50 +pin name Y signal _62__bF$buf3 layer 1 44 -150 +cell 11 FILL.80.BUFX4_12 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _62_ layer 1 -115 -50 +pin name Y signal _62__bF$buf2 layer 1 44 -150 +cell 12 BUFX4_13 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _62_ layer 1 -115 -50 +pin name Y signal _62__bF$buf1 layer 1 44 -150 +cell 13 FILL.80.BUFX4_14 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _62_ layer 1 -115 -50 +pin name Y signal _62__bF$buf0 layer 1 44 -150 +cell 14 BUFX4_15 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _53_ layer 1 -115 -50 +pin name Y signal _53__bF$buf3 layer 1 44 -150 +cell 15 FILL.80.BUFX4_16 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _53_ layer 1 -115 -50 +pin name Y signal _53__bF$buf2 layer 1 44 -150 +cell 16 BUFX4_17 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _53_ layer 1 -115 -50 +pin name Y signal _53__bF$buf1 layer 1 44 -150 +cell 17 BUFX4_18 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _53_ layer 1 -115 -50 +pin name Y signal _53__bF$buf0 layer 1 44 -150 +cell 18 FILL.80.BUFX4_19 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _88_ layer 1 -115 -50 +pin name Y signal _88__bF$buf3 layer 1 44 -150 +cell 19 BUFX4_20 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _88_ layer 1 -115 -50 +pin name Y signal _88__bF$buf2 layer 1 44 -150 +cell 20 FILL.80.BUFX4_21 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _88_ layer 1 -115 -50 +pin name Y signal _88__bF$buf1 layer 1 44 -150 +cell 21 BUFX4_22 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _88_ layer 1 -115 -50 +pin name Y signal _88__bF$buf0 layer 1 44 -150 +cell 22 FILL.80.BUFX4_23 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _76_ layer 1 -115 -50 +pin name Y signal _76__bF$buf3 layer 1 44 -150 +cell 23 BUFX4_24 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _76_ layer 1 -115 -50 +pin name Y signal _76__bF$buf2 layer 1 44 -150 +cell 24 FILL.80.BUFX4_25 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _76_ layer 1 -115 -50 +pin name Y signal _76__bF$buf1 layer 1 44 -150 +cell 25 BUFX4_26 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _76_ layer 1 -115 -50 +pin name Y signal _76__bF$buf0 layer 1 44 -150 +cell 26 BUFX4_27 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _17_ layer 1 -115 -50 +pin name Y signal _17__bF$buf4 layer 1 44 -150 +cell 27 FILL.80.BUFX4_28 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _17_ layer 1 -115 -50 +pin name Y signal _17__bF$buf3 layer 1 44 -150 +cell 28 BUFX4_29 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _17_ layer 1 -115 -50 +pin name Y signal _17__bF$buf2 layer 1 44 -150 +cell 29 FILL.80.BUFX4_30 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _17_ layer 1 -115 -50 +pin name Y signal _17__bF$buf1 layer 1 44 -150 +cell 30 BUFX4_31 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _17_ layer 1 -115 -50 +pin name Y signal _17__bF$buf0 layer 1 44 -150 +cell 31 FILL.80.BUFX4_32 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _84_ layer 1 -115 -50 +pin name Y signal _84__bF$buf4 layer 1 44 -150 +cell 32 BUFX4_33 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _84_ layer 1 -115 -50 +pin name Y signal _84__bF$buf3 layer 1 44 -150 +cell 33 FILL.80.BUFX4_34 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _84_ layer 1 -115 -50 +pin name Y signal _84__bF$buf2 layer 1 44 -150 +cell 34 BUFX4_35 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _84_ layer 1 -115 -50 +pin name Y signal _84__bF$buf1 layer 1 44 -150 +cell 35 BUFX4_36 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _84_ layer 1 -115 -50 +pin name Y signal _84__bF$buf0 layer 1 44 -150 +cell 36 FILL.80.BUFX4_37 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _75_ layer 1 -115 -50 +pin name Y signal _75__bF$buf3 layer 1 44 -150 +cell 37 BUFX4_38 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _75_ layer 1 -115 -50 +pin name Y signal _75__bF$buf2 layer 1 44 -150 +cell 38 FILL.80.BUFX4_39 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _75_ layer 1 -115 -50 +pin name Y signal _75__bF$buf1 layer 1 44 -150 +cell 39 BUFX4_40 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _75_ layer 1 -115 -50 +pin name Y signal _75__bF$buf0 layer 1 44 -150 +cell 40 FILL.80.BUFX4_41 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimem_ready layer 1 -115 -50 +pin name Y signal spimem_ready_bF$buf4 layer 1 44 -150 +cell 41 BUFX4_42 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimem_ready layer 1 -115 -50 +pin name Y signal spimem_ready_bF$buf3 layer 1 44 -150 +cell 42 FILL.80.BUFX4_43 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimem_ready layer 1 -115 -50 +pin name Y signal spimem_ready_bF$buf2 layer 1 44 -150 +cell 43 BUFX4_44 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimem_ready layer 1 -115 -50 +pin name Y signal spimem_ready_bF$buf1 layer 1 44 -150 +cell 44 BUFX4_45 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimem_ready layer 1 -115 -50 +pin name Y signal spimem_ready_bF$buf0 layer 1 44 -150 +cell 45 FILL.80.BUFX4_46 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal ram_ready layer 1 -115 -50 +pin name Y signal ram_ready_bF$buf4 layer 1 44 -150 +cell 46 BUFX4_47 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal ram_ready layer 1 -115 -50 +pin name Y signal ram_ready_bF$buf3 layer 1 44 -150 +cell 47 FILL.80.BUFX4_48 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal ram_ready layer 1 -115 -50 +pin name Y signal ram_ready_bF$buf2 layer 1 44 -150 +cell 48 BUFX4_49 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal ram_ready layer 1 -115 -50 +pin name Y signal ram_ready_bF$buf1 layer 1 44 -150 +cell 49 FILL.80.BUFX4_50 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal ram_ready layer 1 -115 -50 +pin name Y signal ram_ready_bF$buf0 layer 1 44 -150 +cell 50 INVX8_1 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name spimem_ready_bF$pin/A signal spimem_ready_bF$buf4 layer 1 -160 -170 +end_pin_group +pin name Y signal _16_ layer 1 -80 205 +cell 51 FILL.80.INVX8_2 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf4 layer 1 -160 -170 +end_pin_group +pin name Y signal _17_ layer 1 -80 205 +cell 52 INVX1_1 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal mem_valid layer 1 -40 -270 +pin name Y signal _18_ layer 1 40 0 +cell 53 NOR2X1_1 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<31> layer 1 -80 -270 +pin name B signal _356_<30> layer 1 80 -31 +pin name Y signal _19_ layer 1 0 -150 +cell 54 FILL.80.NOR2X1_2 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<29> layer 1 -80 -270 +pin name B signal _356_<28> layer 1 80 -31 +pin name Y signal _20_ layer 1 0 -150 +cell 55 NOR2X1_3 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<27> layer 1 -80 -270 +pin name B signal _356_<26> layer 1 80 -31 +pin name Y signal _21_ layer 1 0 -150 +cell 56 NAND3X1_1 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _19_ layer 1 -120 30 +pin name B signal _20_ layer 1 -20 -50 +pin name C signal _21_ layer 1 40 130 +pin name Y signal _22_ layer 1 -40 340 +cell 57 FILL.80.NOR2X1_4 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<25> layer 1 -80 -270 +pin name B signal _22_ layer 1 80 -31 +pin name Y signal _23_ layer 1 0 -150 +cell 58 NOR2X1_5 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _18_ layer 1 -80 -270 +pin name B signal _23_ layer 1 80 -31 +pin name Y signal _357_ layer 1 0 -150 +cell 59 NAND2X1_1 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_ready layer 1 -80 -170 +pin name B signal _357_ layer 1 80 70 +pin name Y signal _24_ layer 1 50 -340 +cell 60 FILL.80.NAND3X1_2 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf3 layer 1 -120 30 +end_pin_group +pin_group +pin name _17__bF$pin/B signal _17__bF$buf4 layer 1 -20 -50 +end_pin_group +pin_group +pin name _24__bF$pin/C signal _24__bF$buf4 layer 1 40 130 +end_pin_group +pin name Y signal _25_ layer 1 -40 340 +cell 61 NOR2X1_6 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<15> layer 1 -80 -270 +pin name B signal _356_<14> layer 1 80 -31 +pin name Y signal _26_ layer 1 0 -150 +cell 62 FILL.80.NOR2X1_7 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<13> layer 1 -80 -270 +pin name B signal _356_<12> layer 1 80 -31 +pin name Y signal _27_ layer 1 0 -150 +cell 63 AND2X2_1 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _26_ layer 1 -120 -131 +pin name B signal _27_ layer 1 -40 -50 +pin name Y signal _28_ layer 1 89 -340 +cell 64 NOR2X1_8 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<9> layer 1 -80 -270 +pin name B signal _356_<8> layer 1 80 -31 +pin name Y signal _29_ layer 1 0 -150 +cell 65 FILL.80.NOR2X1_9 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<11> layer 1 -80 -270 +pin name B signal _356_<10> layer 1 80 -31 +pin name Y signal _30_ layer 1 0 -150 +cell 66 AND2X2_2 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _30_ layer 1 -120 -131 +pin name B signal mem_valid layer 1 -40 -50 +pin name Y signal _31_ layer 1 89 -340 +cell 67 FILL.80.NAND3X1_3 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _29_ layer 1 -120 30 +pin name B signal _31_ layer 1 -20 -50 +pin name C signal _28_ layer 1 40 130 +pin name Y signal _32_ layer 1 -40 340 +cell 68 NOR2X1_10 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<19> layer 1 -80 -270 +pin name B signal _356_<18> layer 1 80 -31 +pin name Y signal _33_ layer 1 0 -150 +cell 69 NOR2X1_11 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<17> layer 1 -80 -270 +pin name B signal _356_<16> layer 1 80 -31 +pin name Y signal _34_ layer 1 0 -150 +cell 70 FILL.80.NAND2X1_2 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _33_ layer 1 -80 -170 +pin name B signal _34_ layer 1 80 70 +pin name Y signal _35_ layer 1 50 -340 +cell 71 NOR2X1_12 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<23> layer 1 -80 -270 +pin name B signal _356_<22> layer 1 80 -31 +pin name Y signal _36_ layer 1 0 -150 +cell 72 NOR2X1_13 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<21> layer 1 -80 -270 +pin name B signal _356_<20> layer 1 80 -31 +pin name Y signal _37_ layer 1 0 -150 +cell 73 FILL.80.NAND2X1_3 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _36_ layer 1 -80 -170 +pin name B signal _37_ layer 1 80 70 +pin name Y signal _38_ layer 1 50 -340 +cell 74 NOR2X1_14 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _35_ layer 1 -80 -270 +pin name B signal _38_ layer 1 80 -31 +pin name Y signal _39_ layer 1 0 -150 +cell 75 NAND2X1_4 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _19_ layer 1 -80 -170 +pin name B signal _20_ layer 1 80 70 +pin name Y signal _40_ layer 1 50 -340 +cell 76 INVX1_2 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal _356_<24> layer 1 -40 -270 +pin name Y signal _41_ layer 1 40 0 +cell 77 FILL.80.NAND3X1_4 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _356_<25> layer 1 -120 30 +pin name B signal _41_ layer 1 -20 -50 +pin name C signal _21_ layer 1 40 130 +pin name Y signal _42_ layer 1 -40 340 +cell 78 NOR2X1_15 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _40_ layer 1 -80 -270 +pin name B signal _42_ layer 1 80 -31 +pin name Y signal _43_ layer 1 0 -150 +cell 79 FILL.80.NOR2X1_16 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<7> layer 1 -80 -270 +pin name B signal _356_<6> layer 1 80 -31 +pin name Y signal _44_ layer 1 0 -150 +cell 80 NOR2X1_17 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<5> layer 1 -80 -270 +pin name B signal _356_<4> layer 1 80 -31 +pin name Y signal _45_ layer 1 0 -150 +cell 81 NAND2X1_5 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _44_ layer 1 -80 -170 +pin name B signal _45_ layer 1 80 70 +pin name Y signal _46_ layer 1 50 -340 +cell 82 INVX1_3 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal _356_<2> layer 1 -40 -270 +pin name Y signal _47_ layer 1 40 0 +cell 83 FILL.80.INVX1_4 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal _356_<3> layer 1 -40 -270 +pin name Y signal _48_ layer 1 40 0 +cell 84 NOR2X1_18 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<1> layer 1 -80 -270 +pin name B signal _356_<0> layer 1 80 -31 +pin name Y signal _49_ layer 1 0 -150 +cell 85 NAND3X1_5 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _47_ layer 1 -120 30 +pin name B signal _48_ layer 1 -20 -50 +pin name C signal _49_ layer 1 40 130 +pin name Y signal _50_ layer 1 -40 340 +cell 86 FILL.80.NOR2X1_19 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _46_ layer 1 -80 -270 +pin name B signal _50_ layer 1 80 -31 +pin name Y signal _51_ layer 1 0 -150 +cell 87 NAND3X1_6 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _39_ layer 1 -120 30 +pin name B signal _43_ layer 1 -20 -50 +pin name C signal _51_ layer 1 40 130 +pin name Y signal _52_ layer 1 -40 340 +cell 88 FILL.80.OR2X2_1 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _52_ layer 1 -120 -270 +pin name B signal _32_ layer 1 -20 -111 +pin name Y signal _53_ layer 1 120 -50 +cell 89 NAND3X1_7 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _356_<2> layer 1 -120 30 +pin name B signal _48_ layer 1 -20 -50 +pin name C signal _49_ layer 1 40 130 +pin name Y signal _54_ layer 1 -40 340 +cell 90 NOR2X1_20 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _46_ layer 1 -80 -270 +pin name B signal _54_ layer 1 80 -31 +pin name Y signal _55_ layer 1 0 -150 +cell 91 FILL.80.NAND3X1_8 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _39_ layer 1 -120 30 +pin name B signal _43_ layer 1 -20 -50 +pin name C signal _55_ layer 1 40 130 +pin name Y signal _56_ layer 1 -40 340 +cell 92 OAI21X1_1 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _32_ layer 1 -80 -165 +pin name B signal _56_ layer 1 -40 -70 +pin_group +pin name _53__bF$pin/C signal _53__bF$buf3 layer 1 80 150 +end_pin_group +pin name Y signal _57_ layer 1 25 -50 +cell 93 FILL.80.NOR2X1_21 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _25_ layer 1 -80 -270 +pin name B signal _57_ layer 1 80 -31 +pin name Y signal _58_ layer 1 0 -150 +cell 94 NAND3X1_9 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _47_ layer 1 -120 30 +pin name B signal _356_<3> layer 1 -20 -50 +pin name C signal _49_ layer 1 40 130 +pin name Y signal _59_ layer 1 -40 340 +cell 95 NOR2X1_22 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _46_ layer 1 -80 -270 +pin name B signal _59_ layer 1 80 -31 +pin name Y signal _60_ layer 1 0 -150 +cell 96 FILL.80.NAND3X1_10 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _39_ layer 1 -120 30 +pin name B signal _43_ layer 1 -20 -50 +pin name C signal _60_ layer 1 40 130 +pin name Y signal _61_ layer 1 -40 340 +cell 97 NOR2X1_23 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _32_ layer 1 -80 -270 +pin name B signal _61_ layer 1 80 -31 +pin name Y signal _62_ layer 1 0 -150 +cell 98 INVX2_1 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin_group +pin name _62__bF$pin/A signal _62__bF$buf4 layer 1 -40 -170 +end_pin_group +pin name Y signal _63_ layer 1 40 0 +cell 99 FILL.80.OAI21X1_2 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal simpleuart_reg_dat_wait layer 1 -80 -165 +pin name B signal _63_ layer 1 -40 -70 +pin name C signal _58_ layer 1 80 150 +pin name Y signal mem_ready layer 1 25 -50 +cell 100 NAND3X1_11 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _41_ layer 1 -120 30 +pin name B signal _30_ layer 1 -20 -50 +pin name C signal _28_ layer 1 40 130 +pin name Y signal _64_ layer 1 -40 340 +cell 101 FILL.80.NAND2X1_6 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _39_ layer 1 -80 -170 +pin name B signal _23_ layer 1 80 70 +pin name Y signal _65_ layer 1 50 -340 +cell 102 NOR2X1_24 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _64_ layer 1 -80 -270 +pin name B signal _65_ layer 1 80 -31 +pin name Y signal _66_ layer 1 0 -150 +cell 103 NAND2X1_7 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal mem_valid layer 1 -80 -170 +pin name B signal _23_ layer 1 80 70 +pin name Y signal _67_ layer 1 50 -340 +cell 104 FILL.80.NOR2X1_25 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _67_ layer 1 -80 -270 +pin name B signal _66_ layer 1 80 -31 +pin name Y signal _1_ layer 1 0 -150 +cell 105 INVX2_2 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal _359_<3> layer 1 -40 -170 +pin name Y signal _68_ layer 1 40 0 +cell 106 INVX2_3 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal _359_<2> layer 1 -40 -170 +pin name Y signal _69_ layer 1 40 0 +cell 107 NOR2X1_26 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _359_<1> layer 1 -80 -270 +pin name B signal _359_<0> layer 1 80 -31 +pin name Y signal _70_ layer 1 0 -150 +cell 108 FILL.80.NAND3X1_12 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _68_ layer 1 -120 30 +pin name B signal _69_ layer 1 -20 -50 +pin name C signal _70_ layer 1 40 130 +pin name Y signal _71_ layer 1 -40 340 +cell 109 NOR2X1_27 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _71_ layer 1 -80 -270 +pin name B signal _63_ layer 1 80 -31 +pin name Y signal _2_ layer 1 0 -150 +cell 110 FILL.80.NAND2X1_8 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal mem_valid layer 1 -80 -170 +pin name B signal _66_ layer 1 80 70 +pin name Y signal _72_ layer 1 50 -340 +cell 111 NOR2X1_28 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _72_ layer 1 -80 -270 +pin name B signal mem_ready layer 1 80 -31 +pin name Y signal _0_ layer 1 0 -150 +cell 112 NOR2X1_29 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<0> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf3 layer 1 80 -31 +end_pin_group +pin name Y signal _73_ layer 1 0 -150 +cell 113 INVX1_5 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<0> layer 1 -40 -270 +pin name Y signal _74_ layer 1 40 0 +cell 114 FILL.80.NOR2X1_30 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _32_ layer 1 -80 -270 +pin name B signal _56_ layer 1 80 -31 +pin name Y signal _75_ layer 1 0 -150 +cell 115 INVX8_3 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf3 layer 1 -160 -170 +end_pin_group +pin name Y signal _76_ layer 1 -80 205 +cell 116 FILL.80.OAI21X1_3 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal _74_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf3 layer 1 80 150 +end_pin_group +pin name Y signal _77_ layer 1 25 -50 +cell 117 INVX1_6 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<0> layer 1 -40 -270 +pin name Y signal _78_ layer 1 40 0 +cell 118 NAND2X1_9 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<0> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf3 layer 1 80 70 +end_pin_group +pin name Y signal _79_ layer 1 50 -340 +cell 119 FILL.80.OAI21X1_4 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _78_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf2 layer 1 -40 -70 +end_pin_group +pin name C signal _79_ layer 1 80 150 +pin name Y signal _80_ layer 1 25 -50 +cell 120 INVX1_7 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<0> layer 1 -40 -270 +pin name Y signal _81_ layer 1 40 0 +cell 121 AOI21X1_1 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf3 layer 1 -80 -35 +end_pin_group +pin name B signal _81_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf3 layer 1 120 -251 +end_pin_group +pin name Y signal _82_ layer 1 40 -340 +cell 122 FILL.80.OAI21X1_5 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _77_ layer 1 -80 -165 +pin name B signal _80_ layer 1 -40 -70 +pin name C signal _82_ layer 1 80 150 +pin name Y signal _83_ layer 1 25 -50 +cell 123 INVX8_4 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _24__bF$pin/A signal _24__bF$buf2 layer 1 -160 -170 +end_pin_group +pin name Y signal _84_ layer 1 -80 205 +cell 124 FILL.80.NAND2X1_10 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf2 layer 1 -80 -170 +end_pin_group +pin_group +pin name _24__bF$pin/B signal _24__bF$buf1 layer 1 80 70 +end_pin_group +pin name Y signal _85_ layer 1 50 -340 +cell 125 OAI21X1_6 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf4 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<0> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _86_ layer 1 25 -50 +cell 126 FILL.80.AOI21X1_2 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _86_ layer 1 -80 -35 +pin name B signal _83_ layer 1 -40 -131 +pin name C signal _73_ layer 1 120 -251 +pin name Y signal mem_rdata<0> layer 1 40 -340 +cell 127 NAND2X1_11 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<1> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf3 layer 1 80 70 +end_pin_group +pin name Y signal _87_ layer 1 50 -340 +cell 128 NOR2X1_31 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _32_ layer 1 -80 -270 +pin name B signal _52_ layer 1 80 -31 +pin name Y signal _88_ layer 1 0 -150 +cell 129 FILL.80.AOI21X1_3 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<1> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf3 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _89_ layer 1 40 -340 +cell 130 AOI22X1_1 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf2 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<1> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<1> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf2 layer 1 70 -90 +end_pin_group +pin name Y signal _90_ layer 1 5 -216 +cell 131 FILL.80.NAND2X1_12 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _89_ layer 1 -80 -170 +pin name B signal _90_ layer 1 80 70 +pin name Y signal _91_ layer 1 50 -340 +cell 132 OR2X2_2 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf2 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<1> layer 1 -20 -111 +pin name Y signal _92_ layer 1 120 -50 +cell 133 FILL.80.AOI21X1_4 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _92_ layer 1 -80 -35 +pin name B signal _91_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _93_ layer 1 40 -340 +cell 134 OAI21X1_7 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf1 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<1> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf0 layer 1 80 150 +end_pin_group +pin name Y signal _94_ layer 1 25 -50 +cell 135 OAI21X1_8 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _93_ layer 1 -80 -165 +pin name B signal _94_ layer 1 -40 -70 +pin name C signal _87_ layer 1 80 150 +pin name Y signal mem_rdata<1> layer 1 25 -50 +cell 136 FILL.80.NAND2X1_13 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<2> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf2 layer 1 80 70 +end_pin_group +pin name Y signal _95_ layer 1 50 -340 +cell 137 AOI21X1_5 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<2> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf2 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf1 layer 1 120 -251 +end_pin_group +pin name Y signal _96_ layer 1 40 -340 +cell 138 FILL.80.AOI22X1_2 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf1 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<2> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<2> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf1 layer 1 70 -90 +end_pin_group +pin name Y signal _97_ layer 1 5 -216 +cell 139 NAND2X1_14 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _96_ layer 1 -80 -170 +pin name B signal _97_ layer 1 80 70 +pin name Y signal _98_ layer 1 50 -340 +cell 140 FILL.80.OR2X2_3 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf1 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<2> layer 1 -20 -111 +pin name Y signal _99_ layer 1 120 -50 +cell 141 AOI21X1_6 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _99_ layer 1 -80 -35 +pin name B signal _98_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf1 layer 1 120 -251 +end_pin_group +pin name Y signal _100_ layer 1 40 -340 +cell 142 OAI21X1_9 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf0 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<2> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf4 layer 1 80 150 +end_pin_group +pin name Y signal _101_ layer 1 25 -50 +cell 143 FILL.80.OAI21X1_10 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _100_ layer 1 -80 -165 +pin name B signal _101_ layer 1 -40 -70 +pin name C signal _95_ layer 1 80 150 +pin name Y signal mem_rdata<2> layer 1 25 -50 +cell 144 NAND2X1_15 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<3> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf1 layer 1 80 70 +end_pin_group +pin name Y signal _102_ layer 1 50 -340 +cell 145 FILL.80.AOI21X1_7 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<3> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf1 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _103_ layer 1 40 -340 +cell 146 AOI22X1_3 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf0 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<3> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<3> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf0 layer 1 70 -90 +end_pin_group +pin name Y signal _104_ layer 1 5 -216 +cell 147 FILL.80.NAND2X1_16 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _103_ layer 1 -80 -170 +pin name B signal _104_ layer 1 80 70 +pin name Y signal _105_ layer 1 50 -340 +cell 148 OR2X2_4 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf0 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<3> layer 1 -20 -111 +pin name Y signal _106_ layer 1 120 -50 +cell 149 AOI21X1_8 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _106_ layer 1 -80 -35 +pin name B signal _105_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _107_ layer 1 40 -340 +cell 150 FILL.80.OAI21X1_11 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<3> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf3 layer 1 80 150 +end_pin_group +pin name Y signal _108_ layer 1 25 -50 +cell 151 OAI21X1_12 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _107_ layer 1 -80 -165 +pin name B signal _108_ layer 1 -40 -70 +pin name C signal _102_ layer 1 80 150 +pin name Y signal mem_rdata<3> layer 1 25 -50 +cell 152 FILL.80.NAND2X1_17 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<4> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf0 layer 1 80 70 +end_pin_group +pin name Y signal _109_ layer 1 50 -340 +cell 153 AOI21X1_9 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<4> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf0 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf4 layer 1 120 -251 +end_pin_group +pin name Y signal _110_ layer 1 40 -340 +cell 154 FILL.80.AOI22X1_4 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf3 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<4> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<4> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf4 layer 1 70 -90 +end_pin_group +pin name Y signal _111_ layer 1 5 -216 +cell 155 NAND2X1_18 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _110_ layer 1 -80 -170 +pin name B signal _111_ layer 1 80 70 +pin name Y signal _112_ layer 1 50 -340 +cell 156 OR2X2_5 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf4 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<4> layer 1 -20 -111 +pin name Y signal _113_ layer 1 120 -50 +cell 157 FILL.80.AOI21X1_10 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _113_ layer 1 -80 -35 +pin name B signal _112_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf4 layer 1 120 -251 +end_pin_group +pin name Y signal _114_ layer 1 40 -340 +cell 158 OAI21X1_13 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<4> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf2 layer 1 80 150 +end_pin_group +pin name Y signal _115_ layer 1 25 -50 +cell 159 FILL.80.OAI21X1_14 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _114_ layer 1 -80 -165 +pin name B signal _115_ layer 1 -40 -70 +pin name C signal _109_ layer 1 80 150 +pin name Y signal mem_rdata<4> layer 1 25 -50 +cell 160 NOR2X1_32 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<5> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf1 layer 1 80 -31 +end_pin_group +pin name Y signal _116_ layer 1 0 -150 +cell 161 INVX1_8 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<5> layer 1 -40 -270 +pin name Y signal _117_ layer 1 40 0 +cell 162 FILL.80.OAI21X1_15 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal _117_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf3 layer 1 80 150 +end_pin_group +pin name Y signal _118_ layer 1 25 -50 +cell 163 INVX1_9 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<5> layer 1 -40 -270 +pin name Y signal _119_ layer 1 40 0 +cell 164 NAND2X1_19 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<5> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf3 layer 1 80 70 +end_pin_group +pin name Y signal _120_ layer 1 50 -340 +cell 165 FILL.80.OAI21X1_16 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _119_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf1 layer 1 -40 -70 +end_pin_group +pin name C signal _120_ layer 1 80 150 +pin name Y signal _121_ layer 1 25 -50 +cell 166 INVX1_10 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<5> layer 1 -40 -270 +pin name Y signal _122_ layer 1 40 0 +cell 167 AOI21X1_11 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf3 layer 1 -80 -35 +end_pin_group +pin name B signal _122_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf3 layer 1 120 -251 +end_pin_group +pin name Y signal _123_ layer 1 40 -340 +cell 168 FILL.80.OAI21X1_17 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _118_ layer 1 -80 -165 +pin name B signal _121_ layer 1 -40 -70 +pin name C signal _123_ layer 1 80 150 +pin name Y signal _124_ layer 1 25 -50 +cell 169 OAI21X1_18 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf4 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<5> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _125_ layer 1 25 -50 +cell 170 FILL.80.AOI21X1_12 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _125_ layer 1 -80 -35 +pin name B signal _124_ layer 1 -40 -131 +pin name C signal _116_ layer 1 120 -251 +pin name Y signal mem_rdata<5> layer 1 40 -340 +cell 171 NOR2X1_33 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<6> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf0 layer 1 80 -31 +end_pin_group +pin name Y signal _126_ layer 1 0 -150 +cell 172 INVX1_11 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<6> layer 1 -40 -270 +pin name Y signal _127_ layer 1 40 0 +cell 173 FILL.80.OAI21X1_19 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf1 layer 1 -80 -165 +end_pin_group +pin name B signal _127_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf2 layer 1 80 150 +end_pin_group +pin name Y signal _128_ layer 1 25 -50 +cell 174 INVX1_12 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<6> layer 1 -40 -270 +pin name Y signal _129_ layer 1 40 0 +cell 175 NAND2X1_20 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<6> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf2 layer 1 80 70 +end_pin_group +pin name Y signal _130_ layer 1 50 -340 +cell 176 FILL.80.OAI21X1_20 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _129_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf0 layer 1 -40 -70 +end_pin_group +pin name C signal _130_ layer 1 80 150 +pin name Y signal _131_ layer 1 25 -50 +cell 177 INVX1_13 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<6> layer 1 -40 -270 +pin name Y signal _132_ layer 1 40 0 +cell 178 AOI21X1_13 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf2 layer 1 -80 -35 +end_pin_group +pin name B signal _132_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _133_ layer 1 40 -340 +cell 179 FILL.80.OAI21X1_21 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _128_ layer 1 -80 -165 +pin name B signal _131_ layer 1 -40 -70 +pin name C signal _133_ layer 1 80 150 +pin name Y signal _134_ layer 1 25 -50 +cell 180 OAI21X1_22 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<6> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _135_ layer 1 25 -50 +cell 181 FILL.80.AOI21X1_14 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _135_ layer 1 -80 -35 +pin name B signal _134_ layer 1 -40 -131 +pin name C signal _126_ layer 1 120 -251 +pin name Y signal mem_rdata<6> layer 1 40 -340 +cell 182 NAND2X1_21 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<7> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf2 layer 1 80 70 +end_pin_group +pin name Y signal _136_ layer 1 50 -340 +cell 183 FILL.80.AOI21X1_15 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<7> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf3 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf1 layer 1 120 -251 +end_pin_group +pin name Y signal _137_ layer 1 40 -340 +cell 184 AOI22X1_5 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf2 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<7> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<7> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf1 layer 1 70 -90 +end_pin_group +pin name Y signal _138_ layer 1 5 -216 +cell 185 NAND2X1_22 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _137_ layer 1 -80 -170 +pin name B signal _138_ layer 1 80 70 +pin name Y signal _139_ layer 1 50 -340 +cell 186 FILL.80.OR2X2_6 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf1 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<7> layer 1 -20 -111 +pin name Y signal _140_ layer 1 120 -50 +cell 187 AOI21X1_16 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _140_ layer 1 -80 -35 +pin name B signal _139_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf1 layer 1 120 -251 +end_pin_group +pin name Y signal _141_ layer 1 40 -340 +cell 188 FILL.80.OAI21X1_23 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf1 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<7> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf4 layer 1 80 150 +end_pin_group +pin name Y signal _142_ layer 1 25 -50 +cell 189 OAI21X1_24 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _141_ layer 1 -80 -165 +pin name B signal _142_ layer 1 -40 -70 +pin name C signal _136_ layer 1 80 150 +pin name Y signal mem_rdata<7> layer 1 25 -50 +cell 190 FILL.80.NAND2X1_23 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<8> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf1 layer 1 80 70 +end_pin_group +pin name Y signal _143_ layer 1 50 -340 +cell 191 AOI21X1_17 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<8> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf2 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _144_ layer 1 40 -340 +cell 192 FILL.80.AOI22X1_6 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf1 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<8> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<8> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf0 layer 1 70 -90 +end_pin_group +pin name Y signal _145_ layer 1 5 -216 +cell 193 NAND2X1_24 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _144_ layer 1 -80 -170 +pin name B signal _145_ layer 1 80 70 +pin name Y signal _146_ layer 1 50 -340 +cell 194 OR2X2_7 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf0 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<8> layer 1 -20 -111 +pin name Y signal _147_ layer 1 120 -50 +cell 195 FILL.80.AOI21X1_18 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _147_ layer 1 -80 -35 +pin name B signal _146_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _148_ layer 1 40 -340 +cell 196 OAI21X1_25 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf0 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<8> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf3 layer 1 80 150 +end_pin_group +pin name Y signal _149_ layer 1 25 -50 +cell 197 FILL.80.OAI21X1_26 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _148_ layer 1 -80 -165 +pin name B signal _149_ layer 1 -40 -70 +pin name C signal _143_ layer 1 80 150 +pin name Y signal mem_rdata<8> layer 1 25 -50 +cell 198 NAND2X1_25 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<9> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf0 layer 1 80 70 +end_pin_group +pin name Y signal _150_ layer 1 50 -340 +cell 199 AOI21X1_19 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<9> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf1 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf4 layer 1 120 -251 +end_pin_group +pin name Y signal _151_ layer 1 40 -340 +cell 200 FILL.80.AOI22X1_7 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf0 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<9> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<9> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf4 layer 1 70 -90 +end_pin_group +pin name Y signal _152_ layer 1 5 -216 +cell 201 NAND2X1_26 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _151_ layer 1 -80 -170 +pin name B signal _152_ layer 1 80 70 +pin name Y signal _153_ layer 1 50 -340 +cell 202 FILL.80.OR2X2_8 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf4 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<9> layer 1 -20 -111 +pin name Y signal _154_ layer 1 120 -50 +cell 203 AOI21X1_20 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _154_ layer 1 -80 -35 +pin name B signal _153_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf4 layer 1 120 -251 +end_pin_group +pin name Y signal _155_ layer 1 40 -340 +cell 204 FILL.80.OAI21X1_27 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<9> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf2 layer 1 80 150 +end_pin_group +pin name Y signal _156_ layer 1 25 -50 +cell 205 OAI21X1_28 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _155_ layer 1 -80 -165 +pin name B signal _156_ layer 1 -40 -70 +pin name C signal _150_ layer 1 80 150 +pin name Y signal mem_rdata<9> layer 1 25 -50 +cell 206 NOR2X1_34 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<10> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf1 layer 1 80 -31 +end_pin_group +pin name Y signal _157_ layer 1 0 -150 +cell 207 FILL.80.INVX1_14 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<10> layer 1 -40 -270 +pin name Y signal _158_ layer 1 40 0 +cell 208 OAI21X1_29 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf0 layer 1 -80 -165 +end_pin_group +pin name B signal _158_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf3 layer 1 80 150 +end_pin_group +pin name Y signal _159_ layer 1 25 -50 +cell 209 INVX1_15 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<10> layer 1 -40 -270 +pin name Y signal _160_ layer 1 40 0 +cell 210 FILL.80.NAND2X1_27 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<10> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf3 layer 1 80 70 +end_pin_group +pin name Y signal _161_ layer 1 50 -340 +cell 211 OAI21X1_30 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _160_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf3 layer 1 -40 -70 +end_pin_group +pin name C signal _161_ layer 1 80 150 +pin name Y signal _162_ layer 1 25 -50 +cell 212 INVX1_16 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<10> layer 1 -40 -270 +pin name Y signal _163_ layer 1 40 0 +cell 213 FILL.80.AOI21X1_21 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf3 layer 1 -80 -35 +end_pin_group +pin name B signal _163_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf3 layer 1 120 -251 +end_pin_group +pin name Y signal _164_ layer 1 40 -340 +cell 214 OAI21X1_31 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _159_ layer 1 -80 -165 +pin name B signal _162_ layer 1 -40 -70 +pin name C signal _164_ layer 1 80 150 +pin name Y signal _165_ layer 1 25 -50 +cell 215 FILL.80.OAI21X1_32 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf4 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<10> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _166_ layer 1 25 -50 +cell 216 AOI21X1_22 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _166_ layer 1 -80 -35 +pin name B signal _165_ layer 1 -40 -131 +pin name C signal _157_ layer 1 120 -251 +pin name Y signal mem_rdata<10> layer 1 40 -340 +cell 217 NAND2X1_28 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<11> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf3 layer 1 80 70 +end_pin_group +pin name Y signal _167_ layer 1 50 -340 +cell 218 FILL.80.AOI21X1_23 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<11> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf0 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _168_ layer 1 40 -340 +cell 219 AOI22X1_8 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf3 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<11> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<11> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf2 layer 1 70 -90 +end_pin_group +pin name Y signal _169_ layer 1 5 -216 +cell 220 FILL.80.NAND2X1_29 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _168_ layer 1 -80 -170 +pin name B signal _169_ layer 1 80 70 +pin name Y signal _170_ layer 1 50 -340 +cell 221 OR2X2_9 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf2 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<11> layer 1 -20 -111 +pin name Y signal _171_ layer 1 120 -50 +cell 222 FILL.80.AOI21X1_24 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _171_ layer 1 -80 -35 +pin name B signal _170_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _172_ layer 1 40 -340 +cell 223 OAI21X1_33 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<11> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf0 layer 1 80 150 +end_pin_group +pin name Y signal _173_ layer 1 25 -50 +cell 224 FILL.80.OAI21X1_34 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _172_ layer 1 -80 -165 +pin name B signal _173_ layer 1 -40 -70 +pin name C signal _167_ layer 1 80 150 +pin name Y signal mem_rdata<11> layer 1 25 -50 +cell 225 NOR2X1_35 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<12> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf4 layer 1 80 -31 +end_pin_group +pin name Y signal _174_ layer 1 0 -150 +cell 226 INVX1_17 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<12> layer 1 -40 -270 +pin name Y signal _175_ layer 1 40 0 +cell 227 FILL.80.OAI21X1_35 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal _175_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf1 layer 1 80 150 +end_pin_group +pin name Y signal _176_ layer 1 25 -50 +cell 228 INVX1_18 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<12> layer 1 -40 -270 +pin name Y signal _177_ layer 1 40 0 +cell 229 NAND2X1_30 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<12> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf1 layer 1 80 70 +end_pin_group +pin name Y signal _178_ layer 1 50 -340 +cell 230 FILL.80.OAI21X1_36 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _177_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf2 layer 1 -40 -70 +end_pin_group +pin name C signal _178_ layer 1 80 150 +pin name Y signal _179_ layer 1 25 -50 +cell 231 INVX1_19 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<12> layer 1 -40 -270 +pin name Y signal _180_ layer 1 40 0 +cell 232 AOI21X1_25 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf1 layer 1 -80 -35 +end_pin_group +pin name B signal _180_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf1 layer 1 120 -251 +end_pin_group +pin name Y signal _181_ layer 1 40 -340 +cell 233 FILL.80.OAI21X1_37 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _176_ layer 1 -80 -165 +pin name B signal _179_ layer 1 -40 -70 +pin name C signal _181_ layer 1 80 150 +pin name Y signal _182_ layer 1 25 -50 +cell 234 OAI21X1_38 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<12> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _183_ layer 1 25 -50 +cell 235 FILL.80.AOI21X1_26 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _183_ layer 1 -80 -35 +pin name B signal _182_ layer 1 -40 -131 +pin name C signal _174_ layer 1 120 -251 +pin name Y signal mem_rdata<12> layer 1 40 -340 +cell 236 NOR2X1_36 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<13> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf3 layer 1 80 -31 +end_pin_group +pin name Y signal _184_ layer 1 0 -150 +cell 237 INVX1_20 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<13> layer 1 -40 -270 +pin name Y signal _185_ layer 1 40 0 +cell 238 FILL.80.OAI21X1_39 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal _185_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf0 layer 1 80 150 +end_pin_group +pin name Y signal _186_ layer 1 25 -50 +cell 239 INVX1_21 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<13> layer 1 -40 -270 +pin name Y signal _187_ layer 1 40 0 +cell 240 NAND2X1_31 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<13> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf0 layer 1 80 70 +end_pin_group +pin name Y signal _188_ layer 1 50 -340 +cell 241 FILL.80.OAI21X1_40 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _187_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf1 layer 1 -40 -70 +end_pin_group +pin name C signal _188_ layer 1 80 150 +pin name Y signal _189_ layer 1 25 -50 +cell 242 INVX1_22 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<13> layer 1 -40 -270 +pin name Y signal _190_ layer 1 40 0 +cell 243 AOI21X1_27 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf0 layer 1 -80 -35 +end_pin_group +pin name B signal _190_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _191_ layer 1 40 -340 +cell 244 FILL.80.OAI21X1_41 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _186_ layer 1 -80 -165 +pin name B signal _189_ layer 1 -40 -70 +pin name C signal _191_ layer 1 80 150 +pin name Y signal _192_ layer 1 25 -50 +cell 245 OAI21X1_42 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf1 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<13> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _193_ layer 1 25 -50 +cell 246 FILL.80.AOI21X1_28 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _193_ layer 1 -80 -35 +pin name B signal _192_ layer 1 -40 -131 +pin name C signal _184_ layer 1 120 -251 +pin name Y signal mem_rdata<13> layer 1 40 -340 +cell 247 NOR2X1_37 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<14> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf2 layer 1 80 -31 +end_pin_group +pin name Y signal _194_ layer 1 0 -150 +cell 248 INVX1_23 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<14> layer 1 -40 -270 +pin name Y signal _195_ layer 1 40 0 +cell 249 FILL.80.OAI21X1_43 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf1 layer 1 -80 -165 +end_pin_group +pin name B signal _195_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf4 layer 1 80 150 +end_pin_group +pin name Y signal _196_ layer 1 25 -50 +cell 250 INVX1_24 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<14> layer 1 -40 -270 +pin name Y signal _197_ layer 1 40 0 +cell 251 NAND2X1_32 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<14> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf4 layer 1 80 70 +end_pin_group +pin name Y signal _198_ layer 1 50 -340 +cell 252 FILL.80.OAI21X1_44 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _197_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf0 layer 1 -40 -70 +end_pin_group +pin name C signal _198_ layer 1 80 150 +pin name Y signal _199_ layer 1 25 -50 +cell 253 INVX1_25 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<14> layer 1 -40 -270 +pin name Y signal _200_ layer 1 40 0 +cell 254 AOI21X1_29 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf4 layer 1 -80 -35 +end_pin_group +pin name B signal _200_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf4 layer 1 120 -251 +end_pin_group +pin name Y signal _201_ layer 1 40 -340 +cell 255 FILL.80.OAI21X1_45 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _196_ layer 1 -80 -165 +pin name B signal _199_ layer 1 -40 -70 +pin name C signal _201_ layer 1 80 150 +pin name Y signal _202_ layer 1 25 -50 +cell 256 OAI21X1_46 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf0 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<14> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _203_ layer 1 25 -50 +cell 257 FILL.80.AOI21X1_30 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _203_ layer 1 -80 -35 +pin name B signal _202_ layer 1 -40 -131 +pin name C signal _194_ layer 1 120 -251 +pin name Y signal mem_rdata<14> layer 1 40 -340 +cell 258 NAND2X1_33 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<15> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf4 layer 1 80 70 +end_pin_group +pin name Y signal _204_ layer 1 50 -340 +cell 259 AOI21X1_31 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<15> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf3 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf3 layer 1 120 -251 +end_pin_group +pin name Y signal _205_ layer 1 40 -340 +cell 260 FILL.80.AOI22X1_9 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf2 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<15> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<15> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf3 layer 1 70 -90 +end_pin_group +pin name Y signal _206_ layer 1 5 -216 +cell 261 NAND2X1_34 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _205_ layer 1 -80 -170 +pin name B signal _206_ layer 1 80 70 +pin name Y signal _207_ layer 1 50 -340 +cell 262 FILL.80.OR2X2_10 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf3 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<15> layer 1 -20 -111 +pin name Y signal _208_ layer 1 120 -50 +cell 263 AOI21X1_32 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _208_ layer 1 -80 -35 +pin name B signal _207_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf3 layer 1 120 -251 +end_pin_group +pin name Y signal _209_ layer 1 40 -340 +cell 264 FILL.80.OAI21X1_47 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf1 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<15> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf1 layer 1 80 150 +end_pin_group +pin name Y signal _210_ layer 1 25 -50 +cell 265 OAI21X1_48 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _209_ layer 1 -80 -165 +pin name B signal _210_ layer 1 -40 -70 +pin name C signal _204_ layer 1 80 150 +pin name Y signal mem_rdata<15> layer 1 25 -50 +cell 266 NAND2X1_35 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<16> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf3 layer 1 80 70 +end_pin_group +pin name Y signal _211_ layer 1 50 -340 +cell 267 FILL.80.AOI21X1_33 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<16> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf2 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _212_ layer 1 40 -340 +cell 268 AOI22X1_10 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf1 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<16> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<16> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf2 layer 1 70 -90 +end_pin_group +pin name Y signal _213_ layer 1 5 -216 +cell 269 FILL.80.NAND2X1_36 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _212_ layer 1 -80 -170 +pin name B signal _213_ layer 1 80 70 +pin name Y signal _214_ layer 1 50 -340 +cell 270 OR2X2_11 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf2 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<16> layer 1 -20 -111 +pin name Y signal _215_ layer 1 120 -50 +cell 271 FILL.80.AOI21X1_34 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _215_ layer 1 -80 -35 +pin name B signal _214_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _216_ layer 1 40 -340 +cell 272 OAI21X1_49 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf0 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<16> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf0 layer 1 80 150 +end_pin_group +pin name Y signal _217_ layer 1 25 -50 +cell 273 OAI21X1_50 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _216_ layer 1 -80 -165 +pin name B signal _217_ layer 1 -40 -70 +pin name C signal _211_ layer 1 80 150 +pin name Y signal mem_rdata<16> layer 1 25 -50 +cell 274 FILL.80.NOR2X1_38 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<17> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf4 layer 1 80 -31 +end_pin_group +pin name Y signal _218_ layer 1 0 -150 +cell 275 INVX1_26 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<17> layer 1 -40 -270 +pin name Y signal _219_ layer 1 40 0 +cell 276 OAI21X1_51 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf0 layer 1 -80 -165 +end_pin_group +pin name B signal _219_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf1 layer 1 80 150 +end_pin_group +pin name Y signal _220_ layer 1 25 -50 +cell 277 FILL.80.INVX1_27 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<17> layer 1 -40 -270 +pin name Y signal _221_ layer 1 40 0 +cell 278 NAND2X1_37 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<17> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf1 layer 1 80 70 +end_pin_group +pin name Y signal _222_ layer 1 50 -340 +cell 279 OAI21X1_52 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _221_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf3 layer 1 -40 -70 +end_pin_group +pin name C signal _222_ layer 1 80 150 +pin name Y signal _223_ layer 1 25 -50 +cell 280 FILL.80.INVX1_28 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<17> layer 1 -40 -270 +pin name Y signal _224_ layer 1 40 0 +cell 281 AOI21X1_35 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf1 layer 1 -80 -35 +end_pin_group +pin name B signal _224_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf1 layer 1 120 -251 +end_pin_group +pin name Y signal _225_ layer 1 40 -340 +cell 282 FILL.80.OAI21X1_53 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _220_ layer 1 -80 -165 +pin name B signal _223_ layer 1 -40 -70 +pin name C signal _225_ layer 1 80 150 +pin name Y signal _226_ layer 1 25 -50 +cell 283 OAI21X1_54 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<17> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _227_ layer 1 25 -50 +cell 284 AOI21X1_36 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _227_ layer 1 -80 -35 +pin name B signal _226_ layer 1 -40 -131 +pin name C signal _218_ layer 1 120 -251 +pin name Y signal mem_rdata<17> layer 1 40 -340 +cell 285 FILL.80.NAND2X1_38 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<18> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf1 layer 1 80 70 +end_pin_group +pin name Y signal _228_ layer 1 50 -340 +cell 286 AOI21X1_37 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<18> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf1 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _229_ layer 1 40 -340 +cell 287 FILL.80.AOI22X1_11 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf0 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<18> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<18> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf0 layer 1 70 -90 +end_pin_group +pin name Y signal _230_ layer 1 5 -216 +cell 288 NAND2X1_39 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _229_ layer 1 -80 -170 +pin name B signal _230_ layer 1 80 70 +pin name Y signal _231_ layer 1 50 -340 +cell 289 FILL.80.OR2X2_12 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf0 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<18> layer 1 -20 -111 +pin name Y signal _232_ layer 1 120 -50 +cell 290 AOI21X1_38 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _232_ layer 1 -80 -35 +pin name B signal _231_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _233_ layer 1 40 -340 +cell 291 OAI21X1_55 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<18> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf3 layer 1 80 150 +end_pin_group +pin name Y signal _234_ layer 1 25 -50 +cell 292 FILL.80.OAI21X1_56 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _233_ layer 1 -80 -165 +pin name B signal _234_ layer 1 -40 -70 +pin name C signal _228_ layer 1 80 150 +pin name Y signal mem_rdata<18> layer 1 25 -50 +cell 293 NAND2X1_40 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<19> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf0 layer 1 80 70 +end_pin_group +pin name Y signal _235_ layer 1 50 -340 +cell 294 FILL.80.AOI21X1_39 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<19> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf0 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf4 layer 1 120 -251 +end_pin_group +pin name Y signal _236_ layer 1 40 -340 +cell 295 AOI22X1_12 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf3 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<19> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<19> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf4 layer 1 70 -90 +end_pin_group +pin name Y signal _237_ layer 1 5 -216 +cell 296 FILL.80.NAND2X1_41 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _236_ layer 1 -80 -170 +pin name B signal _237_ layer 1 80 70 +pin name Y signal _238_ layer 1 50 -340 +cell 297 OR2X2_13 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf4 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<19> layer 1 -20 -111 +pin name Y signal _239_ layer 1 120 -50 +cell 298 AOI21X1_40 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _239_ layer 1 -80 -35 +pin name B signal _238_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf4 layer 1 120 -251 +end_pin_group +pin name Y signal _240_ layer 1 40 -340 +cell 299 FILL.80.OAI21X1_57 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<19> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf2 layer 1 80 150 +end_pin_group +pin name Y signal _241_ layer 1 25 -50 +cell 300 OAI21X1_58 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _240_ layer 1 -80 -165 +pin name B signal _241_ layer 1 -40 -70 +pin name C signal _235_ layer 1 80 150 +pin name Y signal mem_rdata<19> layer 1 25 -50 +cell 301 FILL.80.NOR2X1_39 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<20> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf1 layer 1 80 -31 +end_pin_group +pin name Y signal _242_ layer 1 0 -150 +cell 302 INVX1_29 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<20> layer 1 -40 -270 +pin name Y signal _243_ layer 1 40 0 +cell 303 OAI21X1_59 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal _243_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf3 layer 1 80 150 +end_pin_group +pin name Y signal _244_ layer 1 25 -50 +cell 304 FILL.80.INVX1_30 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<20> layer 1 -40 -270 +pin name Y signal _245_ layer 1 40 0 +cell 305 NAND2X1_42 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<20> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf3 layer 1 80 70 +end_pin_group +pin name Y signal _246_ layer 1 50 -340 +cell 306 OAI21X1_60 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _245_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf2 layer 1 -40 -70 +end_pin_group +pin name C signal _246_ layer 1 80 150 +pin name Y signal _247_ layer 1 25 -50 +cell 307 FILL.80.INVX1_31 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<20> layer 1 -40 -270 +pin name Y signal _248_ layer 1 40 0 +cell 308 AOI21X1_41 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf3 layer 1 -80 -35 +end_pin_group +pin name B signal _248_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf3 layer 1 120 -251 +end_pin_group +pin name Y signal _249_ layer 1 40 -340 +cell 309 OAI21X1_61 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _244_ layer 1 -80 -165 +pin name B signal _247_ layer 1 -40 -70 +pin name C signal _249_ layer 1 80 150 +pin name Y signal _250_ layer 1 25 -50 +cell 310 FILL.80.OAI21X1_62 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf4 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<20> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _251_ layer 1 25 -50 +cell 311 AOI21X1_42 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _251_ layer 1 -80 -35 +pin name B signal _250_ layer 1 -40 -131 +pin name C signal _242_ layer 1 120 -251 +pin name Y signal mem_rdata<20> layer 1 40 -340 +cell 312 FILL.80.NOR2X1_40 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<21> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf0 layer 1 80 -31 +end_pin_group +pin name Y signal _252_ layer 1 0 -150 +cell 313 INVX1_32 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<21> layer 1 -40 -270 +pin name Y signal _253_ layer 1 40 0 +cell 314 OAI21X1_63 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal _253_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf2 layer 1 80 150 +end_pin_group +pin name Y signal _254_ layer 1 25 -50 +cell 315 FILL.80.INVX1_33 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<21> layer 1 -40 -270 +pin name Y signal _255_ layer 1 40 0 +cell 316 NAND2X1_43 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<21> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf2 layer 1 80 70 +end_pin_group +pin name Y signal _256_ layer 1 50 -340 +cell 317 OAI21X1_64 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _255_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf1 layer 1 -40 -70 +end_pin_group +pin name C signal _256_ layer 1 80 150 +pin name Y signal _257_ layer 1 25 -50 +cell 318 FILL.80.INVX1_34 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<21> layer 1 -40 -270 +pin name Y signal _258_ layer 1 40 0 +cell 319 AOI21X1_43 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf2 layer 1 -80 -35 +end_pin_group +pin name B signal _258_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _259_ layer 1 40 -340 +cell 320 OAI21X1_65 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _254_ layer 1 -80 -165 +pin name B signal _257_ layer 1 -40 -70 +pin name C signal _259_ layer 1 80 150 +pin name Y signal _260_ layer 1 25 -50 +cell 321 FILL.80.OAI21X1_66 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<21> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _261_ layer 1 25 -50 +cell 322 AOI21X1_44 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _261_ layer 1 -80 -35 +pin name B signal _260_ layer 1 -40 -131 +pin name C signal _252_ layer 1 120 -251 +pin name Y signal mem_rdata<21> layer 1 40 -340 +cell 323 FILL.80.NOR2X1_41 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<22> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf4 layer 1 80 -31 +end_pin_group +pin name Y signal _262_ layer 1 0 -150 +cell 324 INVX1_35 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<22> layer 1 -40 -270 +pin name Y signal _263_ layer 1 40 0 +cell 325 OAI21X1_67 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf1 layer 1 -80 -165 +end_pin_group +pin name B signal _263_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf1 layer 1 80 150 +end_pin_group +pin name Y signal _264_ layer 1 25 -50 +cell 326 FILL.80.INVX1_36 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<22> layer 1 -40 -270 +pin name Y signal _265_ layer 1 40 0 +cell 327 NAND2X1_44 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<22> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf1 layer 1 80 70 +end_pin_group +pin name Y signal _266_ layer 1 50 -340 +cell 328 OAI21X1_68 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _265_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf0 layer 1 -40 -70 +end_pin_group +pin name C signal _266_ layer 1 80 150 +pin name Y signal _267_ layer 1 25 -50 +cell 329 FILL.80.INVX1_37 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<22> layer 1 -40 -270 +pin name Y signal _268_ layer 1 40 0 +cell 330 AOI21X1_45 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf1 layer 1 -80 -35 +end_pin_group +pin name B signal _268_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf1 layer 1 120 -251 +end_pin_group +pin name Y signal _269_ layer 1 40 -340 +cell 331 OAI21X1_69 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _264_ layer 1 -80 -165 +pin name B signal _267_ layer 1 -40 -70 +pin name C signal _269_ layer 1 80 150 +pin name Y signal _270_ layer 1 25 -50 +cell 332 FILL.80.OAI21X1_70 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<22> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _271_ layer 1 25 -50 +cell 333 AOI21X1_46 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _271_ layer 1 -80 -35 +pin name B signal _270_ layer 1 -40 -131 +pin name C signal _262_ layer 1 120 -251 +pin name Y signal mem_rdata<22> layer 1 40 -340 +cell 334 FILL.80.NAND2X1_45 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<23> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf1 layer 1 80 70 +end_pin_group +pin name Y signal _272_ layer 1 50 -340 +cell 335 AOI21X1_47 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<23> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf3 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _273_ layer 1 40 -340 +cell 336 FILL.80.AOI22X1_13 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf2 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<23> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<23> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf0 layer 1 70 -90 +end_pin_group +pin name Y signal _274_ layer 1 5 -216 +cell 337 NAND2X1_46 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _273_ layer 1 -80 -170 +pin name B signal _274_ layer 1 80 70 +pin name Y signal _275_ layer 1 50 -340 +cell 338 OR2X2_14 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf0 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<23> layer 1 -20 -111 +pin name Y signal _276_ layer 1 120 -50 +cell 339 FILL.80.AOI21X1_48 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _276_ layer 1 -80 -35 +pin name B signal _275_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _277_ layer 1 40 -340 +cell 340 OAI21X1_71 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf1 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<23> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf3 layer 1 80 150 +end_pin_group +pin name Y signal _278_ layer 1 25 -50 +cell 341 FILL.80.OAI21X1_72 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _277_ layer 1 -80 -165 +pin name B signal _278_ layer 1 -40 -70 +pin name C signal _272_ layer 1 80 150 +pin name Y signal mem_rdata<23> layer 1 25 -50 +cell 342 NAND2X1_47 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<24> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf0 layer 1 80 70 +end_pin_group +pin name Y signal _279_ layer 1 50 -340 +cell 343 FILL.80.AOI21X1_49 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<24> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf2 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf4 layer 1 120 -251 +end_pin_group +pin name Y signal _280_ layer 1 40 -340 +cell 344 AOI22X1_14 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf1 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<24> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<24> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf4 layer 1 70 -90 +end_pin_group +pin name Y signal _281_ layer 1 5 -216 +cell 345 NAND2X1_48 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _280_ layer 1 -80 -170 +pin name B signal _281_ layer 1 80 70 +pin name Y signal _282_ layer 1 50 -340 +cell 346 FILL.80.OR2X2_15 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf4 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<24> layer 1 -20 -111 +pin name Y signal _283_ layer 1 120 -50 +cell 347 AOI21X1_50 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _283_ layer 1 -80 -35 +pin name B signal _282_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf4 layer 1 120 -251 +end_pin_group +pin name Y signal _284_ layer 1 40 -340 +cell 348 FILL.80.OAI21X1_73 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf0 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<24> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf2 layer 1 80 150 +end_pin_group +pin name Y signal _285_ layer 1 25 -50 +cell 349 OAI21X1_74 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _284_ layer 1 -80 -165 +pin name B signal _285_ layer 1 -40 -70 +pin name C signal _279_ layer 1 80 150 +pin name Y signal mem_rdata<24> layer 1 25 -50 +cell 350 FILL.80.NAND2X1_49 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<25> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf4 layer 1 80 70 +end_pin_group +pin name Y signal _286_ layer 1 50 -340 +cell 351 AOI21X1_51 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<25> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf1 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf3 layer 1 120 -251 +end_pin_group +pin name Y signal _287_ layer 1 40 -340 +cell 352 FILL.80.AOI22X1_15 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf0 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<25> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<25> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf3 layer 1 70 -90 +end_pin_group +pin name Y signal _288_ layer 1 5 -216 +cell 353 NAND2X1_50 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _287_ layer 1 -80 -170 +pin name B signal _288_ layer 1 80 70 +pin name Y signal _289_ layer 1 50 -340 +cell 354 OR2X2_16 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf3 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<25> layer 1 -20 -111 +pin name Y signal _290_ layer 1 120 -50 +cell 355 FILL.80.AOI21X1_52 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _290_ layer 1 -80 -35 +pin name B signal _289_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf3 layer 1 120 -251 +end_pin_group +pin name Y signal _291_ layer 1 40 -340 +cell 356 OAI21X1_75 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<25> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf1 layer 1 80 150 +end_pin_group +pin name Y signal _292_ layer 1 25 -50 +cell 357 FILL.80.OAI21X1_76 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _291_ layer 1 -80 -165 +pin name B signal _292_ layer 1 -40 -70 +pin name C signal _286_ layer 1 80 150 +pin name Y signal mem_rdata<25> layer 1 25 -50 +cell 358 NAND2X1_51 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<26> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf3 layer 1 80 70 +end_pin_group +pin name Y signal _293_ layer 1 50 -340 +cell 359 AOI21X1_53 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<26> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf0 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _294_ layer 1 40 -340 +cell 360 FILL.80.AOI22X1_16 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf3 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<26> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<26> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf2 layer 1 70 -90 +end_pin_group +pin name Y signal _295_ layer 1 5 -216 +cell 361 NAND2X1_52 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _294_ layer 1 -80 -170 +pin name B signal _295_ layer 1 80 70 +pin name Y signal _296_ layer 1 50 -340 +cell 362 FILL.80.OR2X2_17 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf2 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<26> layer 1 -20 -111 +pin name Y signal _297_ layer 1 120 -50 +cell 363 AOI21X1_54 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _297_ layer 1 -80 -35 +pin name B signal _296_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _298_ layer 1 40 -340 +cell 364 FILL.80.OAI21X1_77 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<26> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf0 layer 1 80 150 +end_pin_group +pin name Y signal _299_ layer 1 25 -50 +cell 365 OAI21X1_78 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _298_ layer 1 -80 -165 +pin name B signal _299_ layer 1 -40 -70 +pin name C signal _293_ layer 1 80 150 +pin name Y signal mem_rdata<26> layer 1 25 -50 +cell 366 NOR2X1_42 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<27> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf4 layer 1 80 -31 +end_pin_group +pin name Y signal _300_ layer 1 0 -150 +cell 367 FILL.80.INVX1_38 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<27> layer 1 -40 -270 +pin name Y signal _301_ layer 1 40 0 +cell 368 OAI21X1_79 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf0 layer 1 -80 -165 +end_pin_group +pin name B signal _301_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf1 layer 1 80 150 +end_pin_group +pin name Y signal _302_ layer 1 25 -50 +cell 369 INVX1_39 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<27> layer 1 -40 -270 +pin name Y signal _303_ layer 1 40 0 +cell 370 FILL.80.NAND2X1_53 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<27> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf1 layer 1 80 70 +end_pin_group +pin name Y signal _304_ layer 1 50 -340 +cell 371 OAI21X1_80 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _303_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf3 layer 1 -40 -70 +end_pin_group +pin name C signal _304_ layer 1 80 150 +pin name Y signal _305_ layer 1 25 -50 +cell 372 INVX1_40 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<27> layer 1 -40 -270 +pin name Y signal _306_ layer 1 40 0 +cell 373 FILL.80.AOI21X1_55 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf1 layer 1 -80 -35 +end_pin_group +pin name B signal _306_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf1 layer 1 120 -251 +end_pin_group +pin name Y signal _307_ layer 1 40 -340 +cell 374 OAI21X1_81 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _302_ layer 1 -80 -165 +pin name B signal _305_ layer 1 -40 -70 +pin name C signal _307_ layer 1 80 150 +pin name Y signal _308_ layer 1 25 -50 +cell 375 FILL.80.OAI21X1_82 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<27> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _309_ layer 1 25 -50 +cell 376 AOI21X1_56 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _309_ layer 1 -80 -35 +pin name B signal _308_ layer 1 -40 -131 +pin name C signal _300_ layer 1 120 -251 +pin name Y signal mem_rdata<27> layer 1 40 -340 +cell 377 NAND2X1_54 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<28> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf1 layer 1 80 70 +end_pin_group +pin name Y signal _310_ layer 1 50 -340 +cell 378 FILL.80.AOI21X1_57 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<28> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf3 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _311_ layer 1 40 -340 +cell 379 AOI22X1_17 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf2 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<28> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<28> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf0 layer 1 70 -90 +end_pin_group +pin name Y signal _312_ layer 1 5 -216 +cell 380 FILL.80.NAND2X1_55 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _311_ layer 1 -80 -170 +pin name B signal _312_ layer 1 80 70 +pin name Y signal _313_ layer 1 50 -340 +cell 381 OR2X2_18 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf0 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<28> layer 1 -20 -111 +pin name Y signal _314_ layer 1 120 -50 +cell 382 FILL.80.AOI21X1_58 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _314_ layer 1 -80 -35 +pin name B signal _313_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf0 layer 1 120 -251 +end_pin_group +pin name Y signal _315_ layer 1 40 -340 +cell 383 OAI21X1_83 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf1 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<28> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf3 layer 1 80 150 +end_pin_group +pin name Y signal _316_ layer 1 25 -50 +cell 384 FILL.80.OAI21X1_84 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _315_ layer 1 -80 -165 +pin name B signal _316_ layer 1 -40 -70 +pin name C signal _310_ layer 1 80 150 +pin name Y signal mem_rdata<28> layer 1 25 -50 +cell 385 NOR2X1_43 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<29> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf2 layer 1 80 -31 +end_pin_group +pin name Y signal _317_ layer 1 0 -150 +cell 386 INVX1_41 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<29> layer 1 -40 -270 +pin name Y signal _318_ layer 1 40 0 +cell 387 FILL.80.OAI21X1_85 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal _318_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf4 layer 1 80 150 +end_pin_group +pin name Y signal _319_ layer 1 25 -50 +cell 388 INVX1_42 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<29> layer 1 -40 -270 +pin name Y signal _320_ layer 1 40 0 +cell 389 NAND2X1_56 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<29> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf4 layer 1 80 70 +end_pin_group +pin name Y signal _321_ layer 1 50 -340 +cell 390 FILL.80.OAI21X1_86 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _320_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf2 layer 1 -40 -70 +end_pin_group +pin name C signal _321_ layer 1 80 150 +pin name Y signal _322_ layer 1 25 -50 +cell 391 INVX1_43 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<29> layer 1 -40 -270 +pin name Y signal _323_ layer 1 40 0 +cell 392 AOI21X1_59 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf4 layer 1 -80 -35 +end_pin_group +pin name B signal _323_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf4 layer 1 120 -251 +end_pin_group +pin name Y signal _324_ layer 1 40 -340 +cell 393 FILL.80.OAI21X1_87 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _319_ layer 1 -80 -165 +pin name B signal _322_ layer 1 -40 -70 +pin name C signal _324_ layer 1 80 150 +pin name Y signal _325_ layer 1 25 -50 +cell 394 OAI21X1_88 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf0 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<29> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _326_ layer 1 25 -50 +cell 395 FILL.80.AOI21X1_60 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _326_ layer 1 -80 -35 +pin name B signal _325_ layer 1 -40 -131 +pin name C signal _317_ layer 1 120 -251 +pin name Y signal mem_rdata<29> layer 1 40 -340 +cell 396 NAND2X1_57 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<30> layer 1 -80 -170 +pin_group +pin name _84__bF$pin/B signal _84__bF$buf4 layer 1 80 70 +end_pin_group +pin name Y signal _327_ layer 1 50 -340 +cell 397 AOI21X1_61 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal spimemio_cfgreg_do<30> layer 1 -80 -35 +pin_group +pin name _88__bF$pin/B signal _88__bF$buf2 layer 1 -40 -131 +end_pin_group +pin_group +pin name ram_ready_bF$pin/C signal ram_ready_bF$buf3 layer 1 120 -251 +end_pin_group +pin name Y signal _328_ layer 1 40 -340 +cell 398 FILL.80.AOI22X1_18 +left -240 right 240 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -500 + equiv name twfeed1 layer 1 -160 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed2 layer 1 -80 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed3 layer 1 0 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed4 layer 1 80 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -500 + equiv name twfeed5 layer 1 160 500 +pin_group +pin name _75__bF$pin/A signal _75__bF$buf1 layer 1 -120 -35 +end_pin_group +pin name B signal simpleuart_reg_div_do<30> layer 1 -80 -131 +pin name C signal simpleuart_reg_dat_do<30> layer 1 160 -31 +pin_group +pin name _62__bF$pin/D signal _62__bF$buf3 layer 1 70 -90 +end_pin_group +pin name Y signal _329_ layer 1 5 -216 +cell 399 NAND2X1_58 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _328_ layer 1 -80 -170 +pin name B signal _329_ layer 1 80 70 +pin name Y signal _330_ layer 1 50 -340 +cell 400 FILL.80.OR2X2_19 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _17__bF$pin/A signal _17__bF$buf3 layer 1 -120 -270 +end_pin_group +pin name B signal ram_rdata<30> layer 1 -20 -111 +pin name Y signal _331_ layer 1 120 -50 +cell 401 AOI21X1_62 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _331_ layer 1 -80 -35 +pin name B signal _330_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf3 layer 1 120 -251 +end_pin_group +pin name Y signal _332_ layer 1 40 -340 +cell 402 FILL.80.OAI21X1_89 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _16__bF$pin/A signal _16__bF$buf0 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<30> layer 1 -40 -70 +pin_group +pin name _24__bF$pin/C signal _24__bF$buf1 layer 1 80 150 +end_pin_group +pin name Y signal _333_ layer 1 25 -50 +cell 403 OAI21X1_90 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _332_ layer 1 -80 -165 +pin name B signal _333_ layer 1 -40 -70 +pin name C signal _327_ layer 1 80 150 +pin name Y signal mem_rdata<30> layer 1 25 -50 +cell 404 NOR2X1_44 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal iomem_rdata<31> layer 1 -80 -270 +pin_group +pin name _24__bF$pin/B signal _24__bF$buf0 layer 1 80 -31 +end_pin_group +pin name Y signal _334_ layer 1 0 -150 +cell 405 FILL.80.INVX1_44 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal simpleuart_reg_div_do<31> layer 1 -40 -270 +pin name Y signal _335_ layer 1 40 0 +cell 406 OAI21X1_91 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _76__bF$pin/A signal _76__bF$buf2 layer 1 -80 -165 +end_pin_group +pin name B signal _335_ layer 1 -40 -70 +pin_group +pin name _17__bF$pin/C signal _17__bF$buf2 layer 1 80 150 +end_pin_group +pin name Y signal _336_ layer 1 25 -50 +cell 407 INVX1_45 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal spimemio_cfgreg_do<31> layer 1 -40 -270 +pin name Y signal _337_ layer 1 40 0 +cell 408 FILL.80.NAND2X1_59 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal simpleuart_reg_dat_do<31> layer 1 -80 -170 +pin_group +pin name _62__bF$pin/B signal _62__bF$buf2 layer 1 80 70 +end_pin_group +pin name Y signal _338_ layer 1 50 -340 +cell 409 OAI21X1_92 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _337_ layer 1 -80 -165 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf1 layer 1 -40 -70 +end_pin_group +pin name C signal _338_ layer 1 80 150 +pin name Y signal _339_ layer 1 25 -50 +cell 410 INVX1_46 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal ram_rdata<31> layer 1 -40 -270 +pin name Y signal _340_ layer 1 40 0 +cell 411 FILL.80.AOI21X1_63 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name ram_ready_bF$pin/A signal ram_ready_bF$buf2 layer 1 -80 -35 +end_pin_group +pin name B signal _340_ layer 1 -40 -131 +pin_group +pin name spimem_ready_bF$pin/C signal spimem_ready_bF$buf2 layer 1 120 -251 +end_pin_group +pin name Y signal _341_ layer 1 40 -340 +cell 412 OAI21X1_93 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _336_ layer 1 -80 -165 +pin name B signal _339_ layer 1 -40 -70 +pin name C signal _341_ layer 1 80 150 +pin name Y signal _342_ layer 1 25 -50 +cell 413 FILL.80.OAI21X1_94 +left -200 right 200 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin_group +pin name _84__bF$pin/A signal _84__bF$buf3 layer 1 -80 -165 +end_pin_group +pin name B signal spimem_rdata<31> layer 1 -40 -70 +pin name C signal _85_ layer 1 80 150 +pin name Y signal _343_ layer 1 25 -50 +cell 414 AOI21X1_64 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed1 layer 1 -120 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed2 layer 1 -40 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed3 layer 1 40 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed4 layer 1 120 500 +pin name A signal _343_ layer 1 -80 -35 +pin name B signal _342_ layer 1 -40 -131 +pin name C signal _334_ layer 1 120 -251 +pin name Y signal mem_rdata<31> layer 1 40 -340 +cell 415 INVX2_4 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal _359_<0> layer 1 -40 -170 +pin name Y signal _344_ layer 1 40 0 +cell 416 FILL.80.NOR2X1_45 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _344_ layer 1 -80 -270 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf0 layer 1 80 -31 +end_pin_group +pin name Y signal _3_ layer 1 0 -150 +cell 417 INVX2_5 +left -80 right 80 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed1 layer 1 -40 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed2 layer 1 40 500 +pin name A signal _359_<1> layer 1 -40 -170 +pin name Y signal _345_ layer 1 40 0 +cell 418 NOR2X1_46 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _345_ layer 1 -80 -270 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf3 layer 1 80 -31 +end_pin_group +pin name Y signal _4_ layer 1 0 -150 +cell 419 NOR2X1_47 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _69_ layer 1 -80 -270 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf2 layer 1 80 -31 +end_pin_group +pin name Y signal _5_ layer 1 0 -150 +cell 420 FILL.80.NOR2X1_48 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _68_ layer 1 -80 -270 +pin_group +pin name _53__bF$pin/B signal _53__bF$buf1 layer 1 80 -31 +end_pin_group +pin name Y signal _6_ layer 1 0 -150 +cell 421 NOR2X1_49 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _344_ layer 1 -80 -270 +pin_group +pin name _76__bF$pin/B signal _76__bF$buf1 layer 1 80 -31 +end_pin_group +pin name Y signal _7_ layer 1 0 -150 +cell 422 NOR2X1_50 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _345_ layer 1 -80 -270 +pin_group +pin name _76__bF$pin/B signal _76__bF$buf0 layer 1 80 -31 +end_pin_group +pin name Y signal _8_ layer 1 0 -150 +cell 423 FILL.80.NOR2X1_51 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _69_ layer 1 -80 -270 +pin_group +pin name _76__bF$pin/B signal _76__bF$buf3 layer 1 80 -31 +end_pin_group +pin name Y signal _9_ layer 1 0 -150 +cell 424 NOR2X1_52 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _68_ layer 1 -80 -270 +pin_group +pin name _76__bF$pin/B signal _76__bF$buf2 layer 1 80 -31 +end_pin_group +pin name Y signal _10_ layer 1 0 -150 +cell 425 FILL.80.NOR3X1_1 +left -360 right 360 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -280 -500 + equiv name twfeed1 layer 1 -280 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -200 -500 + equiv name twfeed2 layer 1 -200 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed3 layer 1 -120 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed4 layer 1 -40 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed5 layer 1 40 500 +pin name twfeed6 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed6 layer 1 120 500 +pin name twfeed7 signal TW_PASS_THRU layer 1 200 -500 + equiv name twfeed7 layer 1 200 500 +pin name twfeed8 signal TW_PASS_THRU layer 1 280 -500 + equiv name twfeed8 layer 1 280 500 +pin name A signal _344_ layer 1 -175 -251 +pin name B signal _72_ layer 1 -100 -150 +pin name C signal mem_ready layer 1 -20 -50 +pin name Y signal _11_ layer 1 -106 -335 +cell 426 FILL.80.NOR3X1_2 +left -360 right 360 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -280 -500 + equiv name twfeed1 layer 1 -280 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -200 -500 + equiv name twfeed2 layer 1 -200 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed3 layer 1 -120 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed4 layer 1 -40 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed5 layer 1 40 500 +pin name twfeed6 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed6 layer 1 120 500 +pin name twfeed7 signal TW_PASS_THRU layer 1 200 -500 + equiv name twfeed7 layer 1 200 500 +pin name twfeed8 signal TW_PASS_THRU layer 1 280 -500 + equiv name twfeed8 layer 1 280 500 +pin name A signal _345_ layer 1 -175 -251 +pin name B signal _72_ layer 1 -100 -150 +pin name C signal mem_ready layer 1 -20 -50 +pin name Y signal _12_ layer 1 -106 -335 +cell 427 FILL.80.NOR3X1_3 +left -360 right 360 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -280 -500 + equiv name twfeed1 layer 1 -280 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -200 -500 + equiv name twfeed2 layer 1 -200 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed3 layer 1 -120 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed4 layer 1 -40 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed5 layer 1 40 500 +pin name twfeed6 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed6 layer 1 120 500 +pin name twfeed7 signal TW_PASS_THRU layer 1 200 -500 + equiv name twfeed7 layer 1 200 500 +pin name twfeed8 signal TW_PASS_THRU layer 1 280 -500 + equiv name twfeed8 layer 1 280 500 +pin name A signal _69_ layer 1 -175 -251 +pin name B signal _72_ layer 1 -100 -150 +pin name C signal mem_ready layer 1 -20 -50 +pin name Y signal _13_ layer 1 -106 -335 +cell 428 FILL.80.NOR3X1_4 +left -360 right 360 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -280 -500 + equiv name twfeed1 layer 1 -280 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -200 -500 + equiv name twfeed2 layer 1 -200 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed3 layer 1 -120 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed4 layer 1 -40 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed5 layer 1 40 500 +pin name twfeed6 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed6 layer 1 120 500 +pin name twfeed7 signal TW_PASS_THRU layer 1 200 -500 + equiv name twfeed7 layer 1 200 500 +pin name twfeed8 signal TW_PASS_THRU layer 1 280 -500 + equiv name twfeed8 layer 1 280 500 +pin name A signal _68_ layer 1 -175 -251 +pin name B signal _72_ layer 1 -100 -150 +pin name C signal mem_ready layer 1 -20 -50 +pin name Y signal _14_ layer 1 -106 -335 +cell 429 NOR2X1_53 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _344_ layer 1 -80 -270 +pin name B signal _63_ layer 1 80 -31 +pin name Y signal _15_ layer 1 0 -150 +cell 430 BUFX2_1 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _346_ layer 1 -80 -70 +pin name Y signal flash_clk layer 1 85 0 +cell 431 FILL.80.BUFX2_2 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _347_ layer 1 -80 -70 +pin name Y signal flash_csb layer 1 85 0 +cell 432 BUFX2_3 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _348_ layer 1 -80 -70 +pin name Y signal flash_io0_do layer 1 85 0 +cell 433 BUFX2_4 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _349_ layer 1 -80 -70 +pin name Y signal flash_io0_oe layer 1 85 0 +cell 434 FILL.80.BUFX2_5 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _350_ layer 1 -80 -70 +pin name Y signal flash_io1_do layer 1 85 0 +cell 435 BUFX2_6 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _351_ layer 1 -80 -70 +pin name Y signal flash_io1_oe layer 1 85 0 +cell 436 BUFX2_7 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _352_ layer 1 -80 -70 +pin name Y signal flash_io2_do layer 1 85 0 +cell 437 FILL.80.BUFX2_8 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _353_ layer 1 -80 -70 +pin name Y signal flash_io2_oe layer 1 85 0 +cell 438 BUFX2_9 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _354_ layer 1 -80 -70 +pin name Y signal flash_io3_do layer 1 85 0 +cell 439 BUFX2_10 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _355_ layer 1 -80 -70 +pin name Y signal flash_io3_oe layer 1 85 0 +cell 440 FILL.80.BUFX2_11 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<0> layer 1 -80 -70 +pin name Y signal iomem_addr<0> layer 1 85 0 +cell 441 BUFX2_12 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<1> layer 1 -80 -70 +pin name Y signal iomem_addr<1> layer 1 85 0 +cell 442 BUFX2_13 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<2> layer 1 -80 -70 +pin name Y signal iomem_addr<2> layer 1 85 0 +cell 443 FILL.80.BUFX2_14 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<3> layer 1 -80 -70 +pin name Y signal iomem_addr<3> layer 1 85 0 +cell 444 BUFX2_15 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<4> layer 1 -80 -70 +pin name Y signal iomem_addr<4> layer 1 85 0 +cell 445 BUFX2_16 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<5> layer 1 -80 -70 +pin name Y signal iomem_addr<5> layer 1 85 0 +cell 446 FILL.80.BUFX2_17 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<6> layer 1 -80 -70 +pin name Y signal iomem_addr<6> layer 1 85 0 +cell 447 BUFX2_18 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<7> layer 1 -80 -70 +pin name Y signal iomem_addr<7> layer 1 85 0 +cell 448 BUFX2_19 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<8> layer 1 -80 -70 +pin name Y signal iomem_addr<8> layer 1 85 0 +cell 449 FILL.80.BUFX2_20 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<9> layer 1 -80 -70 +pin name Y signal iomem_addr<9> layer 1 85 0 +cell 450 BUFX2_21 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<10> layer 1 -80 -70 +pin name Y signal iomem_addr<10> layer 1 85 0 +cell 451 BUFX2_22 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<11> layer 1 -80 -70 +pin name Y signal iomem_addr<11> layer 1 85 0 +cell 452 FILL.80.BUFX2_23 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<12> layer 1 -80 -70 +pin name Y signal iomem_addr<12> layer 1 85 0 +cell 453 BUFX2_24 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<13> layer 1 -80 -70 +pin name Y signal iomem_addr<13> layer 1 85 0 +cell 454 BUFX2_25 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<14> layer 1 -80 -70 +pin name Y signal iomem_addr<14> layer 1 85 0 +cell 455 FILL.80.BUFX2_26 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<15> layer 1 -80 -70 +pin name Y signal iomem_addr<15> layer 1 85 0 +cell 456 BUFX2_27 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<16> layer 1 -80 -70 +pin name Y signal iomem_addr<16> layer 1 85 0 +cell 457 BUFX2_28 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<17> layer 1 -80 -70 +pin name Y signal iomem_addr<17> layer 1 85 0 +cell 458 FILL.80.BUFX2_29 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<18> layer 1 -80 -70 +pin name Y signal iomem_addr<18> layer 1 85 0 +cell 459 BUFX2_30 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<19> layer 1 -80 -70 +pin name Y signal iomem_addr<19> layer 1 85 0 +cell 460 BUFX2_31 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<20> layer 1 -80 -70 +pin name Y signal iomem_addr<20> layer 1 85 0 +cell 461 FILL.80.BUFX2_32 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<21> layer 1 -80 -70 +pin name Y signal iomem_addr<21> layer 1 85 0 +cell 462 BUFX2_33 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<22> layer 1 -80 -70 +pin name Y signal iomem_addr<22> layer 1 85 0 +cell 463 BUFX2_34 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<23> layer 1 -80 -70 +pin name Y signal iomem_addr<23> layer 1 85 0 +cell 464 FILL.80.BUFX2_35 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<24> layer 1 -80 -70 +pin name Y signal iomem_addr<24> layer 1 85 0 +cell 465 BUFX2_36 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<25> layer 1 -80 -70 +pin name Y signal iomem_addr<25> layer 1 85 0 +cell 466 BUFX2_37 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<26> layer 1 -80 -70 +pin name Y signal iomem_addr<26> layer 1 85 0 +cell 467 FILL.80.BUFX2_38 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<27> layer 1 -80 -70 +pin name Y signal iomem_addr<27> layer 1 85 0 +cell 468 BUFX2_39 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<28> layer 1 -80 -70 +pin name Y signal iomem_addr<28> layer 1 85 0 +cell 469 BUFX2_40 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<29> layer 1 -80 -70 +pin name Y signal iomem_addr<29> layer 1 85 0 +cell 470 FILL.80.BUFX2_41 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<30> layer 1 -80 -70 +pin name Y signal iomem_addr<30> layer 1 85 0 +cell 471 BUFX2_42 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _356_<31> layer 1 -80 -70 +pin name Y signal iomem_addr<31> layer 1 85 0 +cell 472 BUFX2_43 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _357_ layer 1 -80 -70 +pin name Y signal iomem_valid layer 1 85 0 +cell 473 FILL.80.BUFX2_44 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<0> layer 1 -80 -70 +pin name Y signal iomem_wdata<0> layer 1 85 0 +cell 474 BUFX2_45 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<1> layer 1 -80 -70 +pin name Y signal iomem_wdata<1> layer 1 85 0 +cell 475 BUFX2_46 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<2> layer 1 -80 -70 +pin name Y signal iomem_wdata<2> layer 1 85 0 +cell 476 FILL.80.BUFX2_47 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<3> layer 1 -80 -70 +pin name Y signal iomem_wdata<3> layer 1 85 0 +cell 477 BUFX2_48 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<4> layer 1 -80 -70 +pin name Y signal iomem_wdata<4> layer 1 85 0 +cell 478 BUFX2_49 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<5> layer 1 -80 -70 +pin name Y signal iomem_wdata<5> layer 1 85 0 +cell 479 FILL.80.BUFX2_50 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<6> layer 1 -80 -70 +pin name Y signal iomem_wdata<6> layer 1 85 0 +cell 480 BUFX2_51 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<7> layer 1 -80 -70 +pin name Y signal iomem_wdata<7> layer 1 85 0 +cell 481 BUFX2_52 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<8> layer 1 -80 -70 +pin name Y signal iomem_wdata<8> layer 1 85 0 +cell 482 FILL.80.BUFX2_53 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<9> layer 1 -80 -70 +pin name Y signal iomem_wdata<9> layer 1 85 0 +cell 483 BUFX2_54 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<10> layer 1 -80 -70 +pin name Y signal iomem_wdata<10> layer 1 85 0 +cell 484 BUFX2_55 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<11> layer 1 -80 -70 +pin name Y signal iomem_wdata<11> layer 1 85 0 +cell 485 FILL.80.BUFX2_56 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<12> layer 1 -80 -70 +pin name Y signal iomem_wdata<12> layer 1 85 0 +cell 486 BUFX2_57 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<13> layer 1 -80 -70 +pin name Y signal iomem_wdata<13> layer 1 85 0 +cell 487 BUFX2_58 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<14> layer 1 -80 -70 +pin name Y signal iomem_wdata<14> layer 1 85 0 +cell 488 FILL.80.BUFX2_59 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<15> layer 1 -80 -70 +pin name Y signal iomem_wdata<15> layer 1 85 0 +cell 489 BUFX2_60 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<16> layer 1 -80 -70 +pin name Y signal iomem_wdata<16> layer 1 85 0 +cell 490 BUFX2_61 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<17> layer 1 -80 -70 +pin name Y signal iomem_wdata<17> layer 1 85 0 +cell 491 FILL.80.BUFX2_62 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<18> layer 1 -80 -70 +pin name Y signal iomem_wdata<18> layer 1 85 0 +cell 492 BUFX2_63 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<19> layer 1 -80 -70 +pin name Y signal iomem_wdata<19> layer 1 85 0 +cell 493 BUFX2_64 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<20> layer 1 -80 -70 +pin name Y signal iomem_wdata<20> layer 1 85 0 +cell 494 FILL.80.BUFX2_65 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<21> layer 1 -80 -70 +pin name Y signal iomem_wdata<21> layer 1 85 0 +cell 495 BUFX2_66 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<22> layer 1 -80 -70 +pin name Y signal iomem_wdata<22> layer 1 85 0 +cell 496 BUFX2_67 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<23> layer 1 -80 -70 +pin name Y signal iomem_wdata<23> layer 1 85 0 +cell 497 FILL.80.BUFX2_68 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<24> layer 1 -80 -70 +pin name Y signal iomem_wdata<24> layer 1 85 0 +cell 498 BUFX2_69 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<25> layer 1 -80 -70 +pin name Y signal iomem_wdata<25> layer 1 85 0 +cell 499 BUFX2_70 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<26> layer 1 -80 -70 +pin name Y signal iomem_wdata<26> layer 1 85 0 +cell 500 FILL.80.BUFX2_71 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<27> layer 1 -80 -70 +pin name Y signal iomem_wdata<27> layer 1 85 0 +cell 501 BUFX2_72 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<28> layer 1 -80 -70 +pin name Y signal iomem_wdata<28> layer 1 85 0 +cell 502 BUFX2_73 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<29> layer 1 -80 -70 +pin name Y signal iomem_wdata<29> layer 1 85 0 +cell 503 FILL.80.BUFX2_74 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<30> layer 1 -80 -70 +pin name Y signal iomem_wdata<30> layer 1 85 0 +cell 504 BUFX2_75 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _358_<31> layer 1 -80 -70 +pin name Y signal iomem_wdata<31> layer 1 85 0 +cell 505 BUFX2_76 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _359_<0> layer 1 -80 -70 +pin name Y signal iomem_wstrb<0> layer 1 85 0 +cell 506 FILL.80.BUFX2_77 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _359_<1> layer 1 -80 -70 +pin name Y signal iomem_wstrb<1> layer 1 85 0 +cell 507 BUFX2_78 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _359_<2> layer 1 -80 -70 +pin name Y signal iomem_wstrb<2> layer 1 85 0 +cell 508 BUFX2_79 +left -120 right 120 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _359_<3> layer 1 -80 -70 +pin name Y signal iomem_wstrb<3> layer 1 85 0 +cell 509 FILL.80.BUFX2_80 +left -160 right 160 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -500 + equiv name twfeed1 layer 1 -80 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -500 + equiv name twfeed2 layer 1 0 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -500 + equiv name twfeed3 layer 1 80 500 +pin name A signal _360_ layer 1 -80 -70 +pin name Y signal ser_tx layer 1 85 0 +cell 510 FILL.80.DFFPOSX1_1 +left -520 right 520 bottom -500 top 500 +pin name twfeed1 signal TW_PASS_THRU layer 1 -440 -500 + equiv name twfeed1 layer 1 -440 500 +pin name twfeed2 signal TW_PASS_THRU layer 1 -360 -500 + equiv name twfeed2 layer 1 -360 500 +pin name twfeed3 signal TW_PASS_THRU layer 1 -280 -500 + equiv name twfeed3 layer 1 -280 500 +pin name twfeed4 signal TW_PASS_THRU layer 1 -200 -500 + equiv name twfeed4 layer 1 -200 500 +pin name twfeed5 signal TW_PASS_THRU layer 1 -120 -500 + equiv name twfeed5 layer 1 -120 500 +pin name twfeed6 signal TW_PASS_THRU layer 1 -40 -500 + equiv name twfeed6 layer 1 -40 500 +pin name twfeed7 signal TW_PASS_THRU layer 1 40 -500 + equiv name twfeed7 layer 1 40 500 +pin name twfeed8 signal TW_PASS_THRU layer 1 120 -500 + equiv name twfeed8 layer 1 120 500 +pin name twfeed9 signal TW_PASS_THRU layer 1 200 -500 + equiv name twfeed9 layer 1 200 500 +pin name twfeed10 signal TW_PASS_THRU layer 1 280 -500 + equiv name twfeed10 layer 1 280 500 +pin name twfeed11 signal TW_PASS_THRU layer 1 360 -500 + equiv name twfeed11 layer 1 360 500 +pin name twfeed12 signal TW_PASS_THRU layer 1 440 -500 + equiv name twfeed12 layer 1 440 500 +pin name CLK signal clk layer 1 -250 -140 +pin name D signal _0_ layer 1 -225 -56 +pin name Q signal ram_ready layer 1 290 -210 +hardcell 511 name picorv32_1 +corners 4 0 0 0 63320 89220 63320 89220 0 +class 511 orientations 0 1 2 3 +pin name clk signal clk layer 3 62415 20165 +pin name irq[0] signal gnd layer 3 100 20520 +pin name irq[1] signal gnd layer 2 2420 63320 +pin name irq[2] signal gnd layer 3 89220 58319 +pin name irq[3] signal gnd layer 3 100 7620 +pin name irq[4] signal gnd layer 3 100 7420 +pin name irq[5] signal irq_5 layer 3 100 7220 +pin name irq[6] signal irq_6 layer 3 100 7020 +pin name irq[7] signal irq_7 layer 3 100 6820 +pin name irq[8] signal gnd layer 3 100 57119 +pin name irq[9] signal gnd layer 2 15939 63320 +pin name irq[10] signal gnd layer 3 100 8120 +pin name irq[11] signal gnd layer 2 61380 63320 +pin name irq[12] signal gnd layer 2 25060 63320 +pin name irq[13] signal gnd layer 3 89220 36920 +pin name irq[14] signal gnd layer 2 81540 63320 +pin name irq[15] signal gnd layer 3 100 55519 +pin name irq[16] signal gnd layer 2 74980 63320 +pin name irq[17] signal gnd layer 3 100 36720 +pin name irq[18] signal gnd layer 3 100 54919 +pin name irq[19] signal gnd layer 3 89220 21120 +pin name irq[20] signal gnd layer 3 100 10320 +pin name irq[21] signal gnd layer 3 100 55119 +pin name irq[22] signal gnd layer 2 14820 120 +pin name irq[23] signal gnd layer 2 9540 63320 +pin name irq[24] signal gnd layer 3 100 55319 +pin name irq[25] signal gnd layer 3 100 18120 +pin name irq[26] signal gnd layer 3 100 60919 +pin name irq[27] signal gnd layer 3 100 9220 +pin name irq[28] signal gnd layer 3 100 38720 +pin name irq[29] signal gnd layer 2 48260 120 +pin name irq[30] signal gnd layer 2 77540 63320 +pin name irq[31] signal gnd layer 3 100 7820 +pin name mem_addr[0] signal _356_<0> layer 3 88975 51965 +pin name mem_addr[1] signal _356_<1> layer 3 88260 51020 +pin name mem_addr[2] signal _356_<2> layer 3 89220 29165 +pin name mem_addr[3] signal _356_<3> layer 3 87375 51415 +pin name mem_addr[4] signal _356_<4> layer 3 89020 51714 +pin name mem_addr[5] signal _356_<5> layer 3 88140 51914 +pin name mem_addr[6] signal _356_<6> layer 3 89220 52114 +pin name mem_addr[7] signal _356_<7> layer 3 87620 52119 +pin name mem_addr[8] signal _356_<8> layer 3 89140 52514 +pin name mem_addr[9] signal _356_<9> layer 3 88580 52519 +pin name mem_addr[10] signal _356_<10> layer 3 88740 52714 +pin name mem_addr[11] signal _356_<11> layer 3 88940 53114 +pin name mem_addr[12] signal _356_<12> layer 3 88460 53314 +pin name mem_addr[13] signal _356_<13> layer 3 89220 53219 +pin name mem_addr[14] signal _356_<14> layer 3 89140 53719 +pin name mem_addr[15] signal _356_<15> layer 3 88180 52419 +pin name mem_addr[16] signal _356_<16> layer 3 89220 54119 +pin name mem_addr[17] signal _356_<17> layer 3 88340 54314 +pin name mem_addr[18] signal _356_<18> layer 3 89100 54514 +pin name mem_addr[19] signal _356_<19> layer 3 89220 54019 +pin name mem_addr[20] signal _356_<20> layer 3 86535 54814 +pin name mem_addr[21] signal _356_<21> layer 3 89220 55114 +pin name mem_addr[22] signal _356_<22> layer 3 89220 55319 +pin name mem_addr[23] signal _356_<23> layer 3 89220 55514 +pin name mem_addr[24] signal _356_<24> layer 3 88660 55814 +pin name mem_addr[25] signal _356_<25> layer 3 88300 55914 +pin name mem_addr[26] signal _356_<26> layer 3 88215 56014 +pin name mem_addr[27] signal _356_<27> layer 3 88500 56119 +pin name mem_addr[28] signal _356_<28> layer 3 88100 56514 +pin name mem_addr[29] signal _356_<29> layer 3 88335 56614 +pin name mem_addr[30] signal _356_<30> layer 3 88220 56614 +pin name mem_addr[31] signal _356_<31> layer 3 88900 57119 +pin name mem_instr signal mem_instr layer 3 89220 55415 +pin name mem_rdata[0] signal mem_rdata<0> layer 3 85175 415 +pin name mem_rdata[1] signal mem_rdata<1> layer 3 83580 7914 +pin name mem_rdata[2] signal mem_rdata<2> layer 3 83980 814 +pin name mem_rdata[3] signal mem_rdata<3> layer 3 84815 18465 +pin name mem_rdata[4] signal mem_rdata<4> layer 3 81135 13365 +pin name mem_rdata[5] signal mem_rdata<5> layer 3 79695 10515 +pin name mem_rdata[6] signal mem_rdata<6> layer 3 85935 8614 +pin name mem_rdata[7] signal mem_rdata<7> layer 3 82860 24915 +pin name mem_rdata[8] signal mem_rdata<8> layer 3 78895 7114 +pin name mem_rdata[9] signal mem_rdata<9> layer 3 78735 7164 +pin name mem_rdata[10] signal mem_rdata<10> layer 3 79055 8915 +pin name mem_rdata[11] signal mem_rdata<11> layer 3 79420 714 +pin name mem_rdata[12] signal mem_rdata<12> layer 3 78415 10615 +pin name mem_rdata[13] signal mem_rdata<13> layer 3 81420 8815 +pin name mem_rdata[14] signal mem_rdata<14> layer 3 81940 3714 +pin name mem_rdata[15] signal mem_rdata<15> layer 3 77615 2265 +pin name mem_rdata[16] signal mem_rdata<16> layer 3 77455 14015 +pin name mem_rdata[17] signal mem_rdata<17> layer 3 81100 2615 +pin name mem_rdata[18] signal mem_rdata<18> layer 3 77135 1615 +pin name mem_rdata[19] signal mem_rdata<19> layer 3 78060 4214 +pin name mem_rdata[20] signal mem_rdata<20> layer 3 76815 9015 +pin name mem_rdata[21] signal mem_rdata<21> layer 3 76495 14865 +pin name mem_rdata[22] signal mem_rdata<22> layer 3 77775 13465 +pin name mem_rdata[23] signal mem_rdata<23> layer 3 78580 3614 +pin name mem_rdata[24] signal mem_rdata<24> layer 3 75855 5515 +pin name mem_rdata[25] signal mem_rdata<25> layer 3 75695 12065 +pin name mem_rdata[26] signal mem_rdata<26> layer 3 80175 15015 +pin name mem_rdata[27] signal mem_rdata<27> layer 3 75215 7264 +pin name mem_rdata[28] signal mem_rdata<28> layer 3 74735 11515 +pin name mem_rdata[29] signal mem_rdata<29> layer 3 74575 11115 +pin name mem_rdata[30] signal mem_rdata<30> layer 3 74415 8014 +pin name mem_rdata[31] signal mem_rdata<31> layer 3 74095 12265 +pin name mem_ready signal mem_ready layer 3 88975 7014 +pin name mem_valid signal mem_valid layer 3 88420 56419 +pin name mem_wdata[0] signal _358_<0> layer 3 19980 42215 +pin name mem_wdata[1] signal _358_<1> layer 3 16140 39815 +pin name mem_wdata[2] signal _358_<2> layer 3 1220 33420 +pin name mem_wdata[3] signal _358_<3> layer 3 21820 35615 +pin name mem_wdata[4] signal _358_<4> layer 3 22460 36715 +pin name mem_wdata[5] signal _358_<5> layer 3 1860 42120 +pin name mem_wdata[6] signal _358_<6> layer 3 17140 38715 +pin name mem_wdata[7] signal _358_<7> layer 3 860 43215 +pin name mem_wdata[8] signal _358_<8> layer 3 25660 47215 +pin name mem_wdata[9] signal _358_<9> layer 3 660 46920 +pin name mem_wdata[10] signal _358_<10> layer 3 5700 50115 +pin name mem_wdata[11] signal _358_<11> layer 3 375 50015 +pin name mem_wdata[12] signal _358_<12> layer 3 580 46715 +pin name mem_wdata[13] signal _358_<13> layer 3 500 47120 +pin name mem_wdata[14] signal _358_<14> layer 3 420 47520 +pin name mem_wdata[15] signal _358_<15> layer 3 260 50815 +pin name mem_wdata[16] signal _358_<16> layer 3 6020 50815 +pin name mem_wdata[17] signal _358_<17> layer 3 495 48865 +pin name mem_wdata[18] signal _358_<18> layer 3 5140 51215 +pin name mem_wdata[19] signal _358_<19> layer 3 740 49620 +pin name mem_wdata[20] signal _358_<20> layer 3 1139 43620 +pin name mem_wdata[21] signal _358_<21> layer 3 11540 51614 +pin name mem_wdata[22] signal _358_<22> layer 3 2260 52214 +pin name mem_wdata[23] signal _358_<23> layer 3 5660 52114 +pin name mem_wdata[24] signal _358_<24> layer 3 655 47515 +pin name mem_wdata[25] signal _358_<25> layer 3 5340 52814 +pin name mem_wdata[26] signal _358_<26> layer 3 21620 53214 +pin name mem_wdata[27] signal _358_<27> layer 3 20099 50215 +pin name mem_wdata[28] signal _358_<28> layer 3 2380 53414 +pin name mem_wdata[29] signal _358_<29> layer 3 260 53614 +pin name mem_wdata[30] signal _358_<30> layer 3 260 53814 +pin name mem_wdata[31] signal _358_<31> layer 3 980 43820 +pin name mem_wstrb[0] signal _359_<0> layer 3 8375 56114 +pin name mem_wstrb[1] signal _359_<1> layer 3 8294 56214 +pin name mem_wstrb[2] signal _359_<2> layer 3 8420 55914 +pin name mem_wstrb[3] signal _359_<3> layer 3 260 54814 +pin name resetn signal resetn layer 3 71055 33215 +hardcell 512 name picosoc_mem_1 +corners 4 0 0 0 113410 157850 113410 157850 0 +class 512 orientations 0 1 2 3 +pin name addr[0] signal _356_<2> layer 3 116575 37045 +pin name addr[1] signal _356_<3> layer 3 146495 47045 +pin name addr[2] signal _356_<4> layer 3 141775 72095 +pin name addr[3] signal _356_<5> layer 3 143860 71595 +pin name addr[4] signal _356_<6> layer 3 145340 63994 +pin name addr[5] signal _356_<7> layer 3 148060 63694 +pin name addr[6] signal _356_<8> layer 3 147660 62194 +pin name addr[7] signal _356_<9> layer 3 145540 61194 +pin name addr[8] signal _356_<10> layer 2 157850 59499 +pin name addr[9] signal _356_<11> layer 2 157850 59299 +pin name addr[10] signal _356_<12> layer 2 157850 59099 +pin name addr[11] signal _356_<13> layer 2 157850 58899 +pin name addr[12] signal _356_<14> layer 2 157850 58699 +pin name addr[13] signal _356_<15> layer 2 157850 58499 +pin name addr[14] signal _356_<16> layer 2 157850 58299 +pin name addr[15] signal _356_<17> layer 2 157850 58099 +pin name addr[16] signal _356_<18> layer 2 157850 57899 +pin name addr[17] signal _356_<19> layer 2 157850 57699 +pin name addr[18] signal _356_<20> layer 2 157850 57499 +pin name addr[19] signal _356_<21> layer 2 157850 57299 +pin name addr[20] signal _356_<22> layer 2 157850 57099 +pin name addr[21] signal _356_<23> layer 2 157850 56899 +pin name clk signal clk layer 3 44735 36244 +pin name rdata[0] signal ram_rdata<0> layer 3 655 80495 +pin name rdata[1] signal ram_rdata<1> layer 3 300 80295 +pin name rdata[2] signal ram_rdata<2> layer 3 15 80130 +pin name rdata[3] signal ram_rdata<3> layer 3 2380 79895 +pin name rdata[4] signal ram_rdata<4> layer 3 180 79695 +pin name rdata[5] signal ram_rdata<5> layer 3 175 79495 +pin name rdata[6] signal ram_rdata<6> layer 3 2295 79095 +pin name rdata[7] signal ram_rdata<7> layer 3 11260 78895 +pin name rdata[8] signal ram_rdata<8> layer 3 30140 72595 +pin name rdata[9] signal ram_rdata<9> layer 3 340 72300 +pin name rdata[10] signal ram_rdata<10> layer 3 44700 71695 +pin name rdata[11] signal ram_rdata<11> layer 3 66699 72395 +pin name rdata[12] signal ram_rdata<12> layer 3 580 71000 +pin name rdata[13] signal ram_rdata<13> layer 3 180 70895 +pin name rdata[14] signal ram_rdata<14> layer 3 1735 70095 +pin name rdata[15] signal ram_rdata<15> layer 3 2660 69600 +pin name rdata[16] signal ram_rdata<16> layer 3 180 63294 +pin name rdata[17] signal ram_rdata<17> layer 3 300 63094 +pin name rdata[18] signal ram_rdata<18> layer 3 2500 56694 +pin name rdata[19] signal ram_rdata<19> layer 3 380 62694 +pin name rdata[20] signal ram_rdata<20> layer 3 180 62494 +pin name rdata[21] signal ram_rdata<21> layer 3 12500 62194 +pin name rdata[22] signal ram_rdata<22> layer 3 340 60599 +pin name rdata[23] signal ram_rdata<23> layer 3 539 61894 +pin name rdata[24] signal ram_rdata<24> layer 3 340 60094 +pin name rdata[25] signal ram_rdata<25> layer 3 180 59894 +pin name rdata[26] signal ram_rdata<26> layer 3 180 58894 +pin name rdata[27] signal ram_rdata<27> layer 3 175 58094 +pin name rdata[28] signal ram_rdata<28> layer 3 780 57894 +pin name rdata[29] signal ram_rdata<29> layer 3 340 56799 +pin name rdata[30] signal ram_rdata<30> layer 3 180 56894 +pin name rdata[31] signal ram_rdata<31> layer 3 180 53894 +pin name wdata[0] signal _358_<0> layer 3 145855 112745 +pin name wdata[1] signal _358_<1> layer 3 150495 113245 +pin name wdata[2] signal _358_<2> layer 3 132460 112094 +pin name wdata[3] signal _358_<3> layer 3 152420 112194 +pin name wdata[4] signal _358_<4> layer 3 150580 112794 +pin name wdata[5] signal _358_<5> layer 3 150335 112745 +pin name wdata[6] signal _358_<6> layer 3 149420 112694 +pin name wdata[7] signal _358_<7> layer 3 143100 112494 +pin name wdata[8] signal _358_<8> layer 3 153060 111100 +pin name wdata[9] signal _358_<9> layer 3 148460 112994 +pin name wdata[10] signal _358_<10> layer 2 152380 110994 +pin name wdata[11] signal _358_<11> layer 2 134180 113000 +pin name wdata[12] signal _358_<12> layer 2 133380 113000 +pin name wdata[13] signal _358_<13> layer 3 132900 113094 +pin name wdata[14] signal _358_<14> layer 3 132460 113394 +pin name wdata[15] signal _358_<15> layer 3 132500 113094 +pin name wdata[16] signal _358_<16> layer 3 104540 113394 +pin name wdata[17] signal _358_<17> layer 3 101020 113094 +pin name wdata[18] signal _358_<18> layer 2 108020 111000 +pin name wdata[19] signal _358_<19> layer 3 104499 112400 +pin name wdata[20] signal _358_<20> layer 3 106899 99500 +pin name wdata[21] signal _358_<21> layer 2 83060 113000 +pin name wdata[22] signal _358_<22> layer 3 81780 107100 +pin name wdata[23] signal _358_<23> layer 3 80740 105300 +pin name wdata[24] signal _358_<24> layer 3 29700 109000 +pin name wdata[25] signal _358_<25> layer 3 25700 113094 +pin name wdata[26] signal _358_<26> layer 3 25300 113094 +pin name wdata[27] signal _358_<27> layer 3 24900 113094 +pin name wdata[28] signal _358_<28> layer 3 24460 113394 +pin name wdata[29] signal _358_<29> layer 3 24500 113094 +pin name wdata[30] signal _358_<30> layer 3 23700 113094 +pin name wdata[31] signal _358_<31> layer 3 23300 113094 +pin name wen[0] signal _11_ layer 3 79420 43595 +pin name wen[1] signal _12_ layer 3 106100 32995 +pin name wen[2] signal _13_ layer 3 45535 48195 +pin name wen[3] signal _14_ layer 3 33140 97795 +hardcell 513 name simpleuart_1 +corners 4 0 0 0 19320 26580 19320 26580 0 +class 513 orientations 0 1 2 3 +pin name clk signal clk layer 3 5495 1695 +pin name reg_dat_di[0] signal _358_<0> layer 2 16780 95 +pin name reg_dat_di[1] signal _358_<1> layer 3 16620 595 +pin name reg_dat_di[2] signal _358_<2> layer 2 16020 100 +pin name reg_dat_di[3] signal _358_<3> layer 3 16140 694 +pin name reg_dat_di[4] signal _358_<4> layer 3 14179 495 +pin name reg_dat_di[5] signal _358_<5> layer 3 14260 395 +pin name reg_dat_di[6] signal _358_<6> layer 3 13780 600 +pin name reg_dat_di[7] signal _358_<7> layer 2 14180 100 +pin name reg_dat_di[8] signal _358_<8> layer 2 14420 100 +pin name reg_dat_di[9] signal _358_<9> layer 2 14180 100 +pin name reg_dat_di[10] signal _358_<10> layer 2 14020 100 +pin name reg_dat_di[11] signal _358_<11> layer 2 13780 100 +pin name reg_dat_di[12] signal _358_<12> layer 2 13620 100 +pin name reg_dat_di[13] signal _358_<13> layer 2 13380 100 +pin name reg_dat_di[14] signal _358_<14> layer 2 13220 100 +pin name reg_dat_di[15] signal _358_<15> layer 2 12980 100 +pin name reg_dat_di[16] signal _358_<16> layer 2 12820 100 +pin name reg_dat_di[17] signal _358_<17> layer 2 12580 100 +pin name reg_dat_di[18] signal _358_<18> layer 2 12420 100 +pin name reg_dat_di[19] signal _358_<19> layer 2 12180 100 +pin name reg_dat_di[20] signal _358_<20> layer 2 12020 100 +pin name reg_dat_di[21] signal _358_<21> layer 2 11780 100 +pin name reg_dat_di[22] signal _358_<22> layer 2 11620 100 +pin name reg_dat_di[23] signal _358_<23> layer 2 11380 100 +pin name reg_dat_di[24] signal _358_<24> layer 2 11220 100 +pin name reg_dat_di[25] signal _358_<25> layer 2 10980 100 +pin name reg_dat_di[26] signal _358_<26> layer 2 10820 100 +pin name reg_dat_di[27] signal _358_<27> layer 2 10580 100 +pin name reg_dat_di[28] signal _358_<28> layer 2 10260 100 +pin name reg_dat_di[29] signal _358_<29> layer 2 10020 100 +pin name reg_dat_di[30] signal _358_<30> layer 2 9860 100 +pin name reg_dat_di[31] signal _358_<31> layer 2 9620 100 +pin name reg_dat_do[0] signal simpleuart_reg_dat_do<0> layer 3 2260 11395 +pin name reg_dat_do[1] signal simpleuart_reg_dat_do<1> layer 3 660 11595 +pin name reg_dat_do[2] signal simpleuart_reg_dat_do<2> layer 3 340 11800 +pin name reg_dat_do[3] signal simpleuart_reg_dat_do<3> layer 3 580 12000 +pin name reg_dat_do[4] signal simpleuart_reg_dat_do<4> layer 3 220 12195 +pin name reg_dat_do[5] signal simpleuart_reg_dat_do<5> layer 3 420 12400 +pin name reg_dat_do[6] signal simpleuart_reg_dat_do<6> layer 3 2179 12600 +pin name reg_dat_do[7] signal simpleuart_reg_dat_do<7> layer 3 780 12795 +pin name reg_dat_do[8] signal simpleuart_reg_dat_do<8> layer 3 415 12995 +pin name reg_dat_do[9] signal simpleuart_reg_dat_do<9> layer 3 340 13099 +pin name reg_dat_do[10] signal simpleuart_reg_dat_do<10> layer 3 300 13395 +pin name reg_dat_do[11] signal simpleuart_reg_dat_do<11> layer 3 295 13595 +pin name reg_dat_do[12] signal simpleuart_reg_dat_do<12> layer 3 180 13795 +pin name reg_dat_do[13] signal simpleuart_reg_dat_do<13> layer 3 415 13995 +pin name reg_dat_do[14] signal simpleuart_reg_dat_do<14> layer 3 1299 14099 +pin name reg_dat_do[15] signal simpleuart_reg_dat_do<15> layer 3 539 14395 +pin name reg_dat_do[16] signal simpleuart_reg_dat_do<16> layer 3 175 14595 +pin name reg_dat_do[17] signal simpleuart_reg_dat_do<17> layer 3 539 14795 +pin name reg_dat_do[18] signal simpleuart_reg_dat_do<18> layer 3 295 14995 +pin name reg_dat_do[19] signal simpleuart_reg_dat_do<19> layer 3 700 15195 +pin name reg_dat_do[20] signal simpleuart_reg_dat_do<20> layer 3 420 15395 +pin name reg_dat_do[21] signal simpleuart_reg_dat_do<21> layer 3 535 15595 +pin name reg_dat_do[22] signal simpleuart_reg_dat_do<22> layer 3 300 15795 +pin name reg_dat_do[23] signal simpleuart_reg_dat_do<23> layer 3 175 15995 +pin name reg_dat_do[24] signal simpleuart_reg_dat_do<24> layer 3 820 16099 +pin name reg_dat_do[25] signal simpleuart_reg_dat_do<25> layer 3 420 16395 +pin name reg_dat_do[26] signal simpleuart_reg_dat_do<26> layer 3 175 16595 +pin name reg_dat_do[27] signal simpleuart_reg_dat_do<27> layer 3 300 16795 +pin name reg_dat_do[28] signal simpleuart_reg_dat_do<28> layer 3 539 16995 +pin name reg_dat_do[29] signal simpleuart_reg_dat_do<29> layer 3 420 17195 +pin name reg_dat_do[30] signal simpleuart_reg_dat_do<30> layer 3 180 17395 +pin name reg_dat_do[31] signal simpleuart_reg_dat_do<31> layer 3 300 17795 +pin name reg_dat_re signal _2_ layer 3 19939 15695 +pin name reg_dat_wait signal simpleuart_reg_dat_wait layer 3 180 3395 +pin name reg_dat_we signal _15_ layer 3 20339 13795 +pin name reg_div_di[0] signal _358_<0> layer 3 24055 395 +pin name reg_div_di[1] signal _358_<1> layer 3 24180 1199 +pin name reg_div_di[2] signal _358_<2> layer 3 23540 2295 +pin name reg_div_di[3] signal _358_<3> layer 3 23700 400 +pin name reg_div_di[4] signal _358_<4> layer 3 24260 495 +pin name reg_div_di[5] signal _358_<5> layer 3 23980 595 +pin name reg_div_di[6] signal _358_<6> layer 2 22860 95 +pin name reg_div_di[7] signal _358_<7> layer 3 22980 395 +pin name reg_div_di[8] signal _358_<8> layer 3 23140 794 +pin name reg_div_di[9] signal _358_<9> layer 3 23060 794 +pin name reg_div_di[10] signal _358_<10> layer 3 22300 495 +pin name reg_div_di[11] signal _358_<11> layer 3 23060 694 +pin name reg_div_di[12] signal _358_<12> layer 3 22140 995 +pin name reg_div_di[13] signal _358_<13> layer 3 21820 495 +pin name reg_div_di[14] signal _358_<14> layer 3 21535 694 +pin name reg_div_di[15] signal _358_<15> layer 3 22100 595 +pin name reg_div_di[16] signal _358_<16> layer 2 21175 95 +pin name reg_div_di[17] signal _358_<17> layer 3 20340 395 +pin name reg_div_di[18] signal _358_<18> layer 3 20740 595 +pin name reg_div_di[19] signal _358_<19> layer 3 20300 495 +pin name reg_div_di[20] signal _358_<20> layer 3 17940 1495 +pin name reg_div_di[21] signal _358_<21> layer 3 20060 595 +pin name reg_div_di[22] signal _358_<22> layer 3 19420 495 +pin name reg_div_di[23] signal _358_<23> layer 3 19540 395 +pin name reg_div_di[24] signal _358_<24> layer 3 17180 2595 +pin name reg_div_di[25] signal _358_<25> layer 3 17940 500 +pin name reg_div_di[26] signal _358_<26> layer 3 17780 500 +pin name reg_div_di[27] signal _358_<27> layer 3 17300 500 +pin name reg_div_di[28] signal _358_<28> layer 3 17380 600 +pin name reg_div_di[29] signal _358_<29> layer 3 17460 400 +pin name reg_div_di[30] signal _358_<30> layer 3 17095 395 +pin name reg_div_di[31] signal _358_<31> layer 3 14980 500 +pin name reg_div_do[0] signal simpleuart_reg_div_do<0> layer 3 220 3594 +pin name reg_div_do[1] signal simpleuart_reg_div_do<1> layer 3 340 3799 +pin name reg_div_do[2] signal simpleuart_reg_div_do<2> layer 3 420 3994 +pin name reg_div_do[3] signal simpleuart_reg_div_do<3> layer 3 180 4194 +pin name reg_div_do[4] signal simpleuart_reg_div_do<4> layer 3 6540 4495 +pin name reg_div_do[5] signal simpleuart_reg_div_do<5> layer 3 4935 4595 +pin name reg_div_do[6] signal simpleuart_reg_div_do<6> layer 3 539 4795 +pin name reg_div_do[7] signal simpleuart_reg_div_do<7> layer 3 295 4995 +pin name reg_div_do[8] signal simpleuart_reg_div_do<8> layer 3 2260 5195 +pin name reg_div_do[9] signal simpleuart_reg_div_do<9> layer 3 8460 5095 +pin name reg_div_do[10] signal simpleuart_reg_div_do<10> layer 3 4900 5395 +pin name reg_div_do[11] signal simpleuart_reg_div_do<11> layer 3 8660 6195 +pin name reg_div_do[12] signal simpleuart_reg_div_do<12> layer 3 175 5995 +pin name reg_div_do[13] signal simpleuart_reg_div_do<13> layer 3 580 6100 +pin name reg_div_do[14] signal simpleuart_reg_div_do<14> layer 3 420 6395 +pin name reg_div_do[15] signal simpleuart_reg_div_do<15> layer 3 820 6500 +pin name reg_div_do[16] signal simpleuart_reg_div_do<16> layer 3 300 6794 +pin name reg_div_do[17] signal simpleuart_reg_div_do<17> layer 3 4300 6894 +pin name reg_div_do[18] signal simpleuart_reg_div_do<18> layer 3 340 7100 +pin name reg_div_do[19] signal simpleuart_reg_div_do<19> layer 3 420 7394 +pin name reg_div_do[20] signal simpleuart_reg_div_do<20> layer 3 580 7500 +pin name reg_div_do[21] signal simpleuart_reg_div_do<21> layer 3 1540 7694 +pin name reg_div_do[22] signal simpleuart_reg_div_do<22> layer 3 2460 7994 +pin name reg_div_do[23] signal simpleuart_reg_div_do<23> layer 3 420 8200 +pin name reg_div_do[24] signal simpleuart_reg_div_do<24> layer 3 180 8394 +pin name reg_div_do[25] signal simpleuart_reg_div_do<25> layer 3 175 8595 +pin name reg_div_do[26] signal simpleuart_reg_div_do<26> layer 3 420 8795 +pin name reg_div_do[27] signal simpleuart_reg_div_do<27> layer 3 535 8995 +pin name reg_div_do[28] signal simpleuart_reg_div_do<28> layer 3 340 9195 +pin name reg_div_do[29] signal simpleuart_reg_div_do<29> layer 3 420 9395 +pin name reg_div_do[30] signal simpleuart_reg_div_do<30> layer 3 175 9595 +pin name reg_div_do[31] signal simpleuart_reg_div_do<31> layer 3 300 9795 +pin name reg_div_we[0] signal _7_ layer 3 23540 13699 +pin name reg_div_we[1] signal _8_ layer 3 21855 19095 +pin name reg_div_we[2] signal _9_ layer 3 22900 19000 +pin name reg_div_we[3] signal _10_ layer 3 21380 19195 +pin name resetn signal resetn layer 3 19940 6595 +pin name ser_rx signal ser_rx layer 3 21060 13695 +pin name ser_tx signal _360_ layer 3 26580 11795 +hardcell 514 name spimemio_1 +corners 4 0 0 0 20320 28660 20320 28660 0 +class 514 orientations 0 1 2 3 +pin name addr[0] signal _356_<0> layer 3 23660 11795 +pin name addr[1] signal _356_<1> layer 3 26580 11500 +pin name addr[2] signal _356_<2> layer 3 27459 11900 +pin name addr[3] signal _356_<3> layer 3 26100 11895 +pin name addr[4] signal _356_<4> layer 3 20020 8995 +pin name addr[5] signal _356_<5> layer 3 26894 11495 +pin name addr[6] signal _356_<6> layer 3 25060 11295 +pin name addr[7] signal _356_<7> layer 3 28580 8500 +pin name addr[8] signal _356_<8> layer 3 28499 10400 +pin name addr[9] signal _356_<9> layer 3 28660 9345 +pin name addr[10] signal _356_<10> layer 3 27534 8995 +pin name addr[11] signal _356_<11> layer 3 27339 6794 +pin name addr[12] signal _356_<12> layer 3 18740 6600 +pin name addr[13] signal _356_<13> layer 3 28420 7200 +pin name addr[14] signal _356_<14> layer 3 23980 8695 +pin name addr[15] signal _356_<15> layer 3 21100 794 +pin name addr[16] signal _356_<16> layer 3 24820 6500 +pin name addr[17] signal _356_<17> layer 3 25300 8795 +pin name addr[18] signal _356_<18> layer 3 22820 1995 +pin name addr[19] signal _356_<19> layer 3 20740 2895 +pin name addr[20] signal _356_<20> layer 3 25340 6595 +pin name addr[21] signal _356_<21> layer 3 27055 8294 +pin name addr[22] signal _356_<22> layer 3 23660 6694 +pin name addr[23] signal _356_<23> layer 3 24420 7694 +pin name cfgreg_di[0] signal _358_<0> layer 3 260 20295 +pin name cfgreg_di[1] signal _358_<1> layer 3 980 20095 +pin name cfgreg_di[2] signal _358_<2> layer 3 380 19795 +pin name cfgreg_di[3] signal _358_<3> layer 3 580 19595 +pin name cfgreg_di[4] signal _358_<4> layer 3 619 19395 +pin name cfgreg_di[5] signal _358_<5> layer 3 820 18695 +pin name cfgreg_di[6] signal _358_<6> layer 3 100 19100 +pin name cfgreg_di[7] signal _358_<7> layer 3 100 18900 +pin name cfgreg_di[8] signal _358_<8> layer 3 135 18795 +pin name cfgreg_di[9] signal _358_<9> layer 3 260 18495 +pin name cfgreg_di[10] signal _358_<10> layer 3 340 18295 +pin name cfgreg_di[11] signal _358_<11> layer 3 380 17795 +pin name cfgreg_di[12] signal _358_<12> layer 3 100 17900 +pin name cfgreg_di[13] signal _358_<13> layer 3 100 17700 +pin name cfgreg_di[14] signal _358_<14> layer 3 100 17500 +pin name cfgreg_di[15] signal _358_<15> layer 3 100 17300 +pin name cfgreg_di[16] signal _358_<16> layer 3 420 16900 +pin name cfgreg_di[17] signal _358_<17> layer 3 100 16900 +pin name cfgreg_di[18] signal _358_<18> layer 3 460 16695 +pin name cfgreg_di[19] signal _358_<19> layer 3 500 15399 +pin name cfgreg_di[20] signal _358_<20> layer 3 420 15699 +pin name cfgreg_di[21] signal _358_<21> layer 3 100 15999 +pin name cfgreg_di[22] signal _358_<22> layer 3 740 15599 +pin name cfgreg_di[23] signal _358_<23> layer 3 100 15699 +pin name cfgreg_di[24] signal _358_<24> layer 3 100 15499 +pin name cfgreg_di[25] signal _358_<25> layer 3 100 15299 +pin name cfgreg_di[26] signal _358_<26> layer 3 100 15099 +pin name cfgreg_di[27] signal _358_<27> layer 3 100 14899 +pin name cfgreg_di[28] signal _358_<28> layer 3 100 14699 +pin name cfgreg_di[29] signal _358_<29> layer 3 100 14499 +pin name cfgreg_di[30] signal _358_<30> layer 3 100 14299 +pin name cfgreg_di[31] signal _358_<31> layer 3 175 14795 +pin name cfgreg_do[0] signal spimemio_cfgreg_do<0> layer 3 5940 20320 +pin name cfgreg_do[1] signal spimemio_cfgreg_do<1> layer 3 5900 20295 +pin name cfgreg_do[2] signal spimemio_cfgreg_do<2> layer 3 6340 20195 +pin name cfgreg_do[3] signal spimemio_cfgreg_do<3> layer 3 7300 19400 +pin name cfgreg_do[4] signal spimemio_cfgreg_do<4> layer 2 9940 20200 +pin name cfgreg_do[5] signal spimemio_cfgreg_do<5> layer 2 11380 20200 +pin name cfgreg_do[6] signal spimemio_cfgreg_do<6> layer 2 20900 20200 +pin name cfgreg_do[7] signal spimemio_cfgreg_do<7> layer 2 22100 20200 +pin name cfgreg_do[8] signal spimemio_cfgreg_do<8> layer 3 21340 19295 +pin name cfgreg_do[9] signal spimemio_cfgreg_do<9> layer 3 17180 20195 +pin name cfgreg_do[10] signal spimemio_cfgreg_do<10> layer 3 19100 20295 +pin name cfgreg_do[11] signal spimemio_cfgreg_do<11> layer 3 14179 20200 +pin name cfgreg_do[12] signal spimemio_cfgreg_do<12> layer 2 23700 20200 +pin name cfgreg_do[13] signal spimemio_cfgreg_do<13> layer 2 23940 20200 +pin name cfgreg_do[14] signal spimemio_cfgreg_do<14> layer 2 24180 20200 +pin name cfgreg_do[15] signal spimemio_cfgreg_do<15> layer 2 24420 20200 +pin name cfgreg_do[16] signal spimemio_cfgreg_do<16> layer 3 21540 20295 +pin name cfgreg_do[17] signal spimemio_cfgreg_do<17> layer 3 24820 19100 +pin name cfgreg_do[18] signal spimemio_cfgreg_do<18> layer 3 21500 20320 +pin name cfgreg_do[19] signal spimemio_cfgreg_do<19> layer 3 22460 20095 +pin name cfgreg_do[20] signal spimemio_cfgreg_do<20> layer 3 24980 20320 +pin name cfgreg_do[21] signal spimemio_cfgreg_do<21> layer 3 25140 20295 +pin name cfgreg_do[22] signal spimemio_cfgreg_do<22> layer 3 22980 20195 +pin name cfgreg_do[23] signal spimemio_cfgreg_do<23> layer 2 26259 20200 +pin name cfgreg_do[24] signal spimemio_cfgreg_do<24> layer 2 26499 20200 +pin name cfgreg_do[25] signal spimemio_cfgreg_do<25> layer 2 26740 20200 +pin name cfgreg_do[26] signal spimemio_cfgreg_do<26> layer 2 26980 20200 +pin name cfgreg_do[27] signal spimemio_cfgreg_do<27> layer 2 27220 20200 +pin name cfgreg_do[28] signal spimemio_cfgreg_do<28> layer 2 27459 20200 +pin name cfgreg_do[29] signal spimemio_cfgreg_do<29> layer 2 27859 20200 +pin name cfgreg_do[30] signal spimemio_cfgreg_do<30> layer 2 28099 20200 +pin name cfgreg_do[31] signal spimemio_cfgreg_do<31> layer 3 22100 20295 +pin name cfgreg_we[0] signal _3_ layer 3 420 14199 +pin name cfgreg_we[1] signal _4_ layer 3 420 12200 +pin name cfgreg_we[2] signal _5_ layer 3 500 12000 +pin name cfgreg_we[3] signal _6_ layer 3 380 11795 +pin name clk signal clk layer 3 18620 12995 +pin name flash_clk signal _346_ layer 3 15375 3195 +pin name flash_csb signal _347_ layer 3 13339 395 +pin name flash_io0_di signal flash_io0_di layer 3 1260 8795 +pin name flash_io0_do signal _348_ layer 3 11220 800 +pin name flash_io0_oe signal _349_ layer 2 11660 95 +pin name flash_io1_di signal flash_io1_di layer 3 1379 9700 +pin name flash_io1_do signal _350_ layer 3 11060 400 +pin name flash_io1_oe signal _351_ layer 3 12540 495 +pin name flash_io2_di signal flash_io2_di layer 3 740 7700 +pin name flash_io2_do signal _352_ layer 3 11340 694 +pin name flash_io2_oe signal _353_ layer 3 11700 500 +pin name flash_io3_di signal flash_io3_di layer 3 580 7900 +pin name flash_io3_do signal _354_ layer 3 9380 700 +pin name flash_io3_oe signal _355_ layer 3 12660 600 +pin name rdata[0] signal spimem_rdata<0> layer 3 24140 20095 +pin name rdata[1] signal spimem_rdata<1> layer 3 27740 20095 +pin name rdata[2] signal spimem_rdata<2> layer 3 27420 19895 +pin name rdata[3] signal spimem_rdata<3> layer 3 24300 19695 +pin name rdata[4] signal spimem_rdata<4> layer 3 27980 19495 +pin name rdata[5] signal spimem_rdata<5> layer 3 27859 19295 +pin name rdata[6] signal spimem_rdata<6> layer 3 28099 19000 +pin name rdata[7] signal spimem_rdata<7> layer 3 25534 18795 +pin name rdata[8] signal spimem_rdata<8> layer 3 27820 18695 +pin name rdata[9] signal spimem_rdata<9> layer 3 27659 18495 +pin name rdata[10] signal spimem_rdata<10> layer 3 27500 18295 +pin name rdata[11] signal spimem_rdata<11> layer 3 27620 18095 +pin name rdata[12] signal spimem_rdata<12> layer 3 28099 17895 +pin name rdata[13] signal spimem_rdata<13> layer 3 27940 17600 +pin name rdata[14] signal spimem_rdata<14> layer 3 28340 17500 +pin name rdata[15] signal spimem_rdata<15> layer 3 28660 17295 +pin name rdata[16] signal spimem_rdata<16> layer 3 28500 17095 +pin name rdata[17] signal spimem_rdata<17> layer 3 28580 16199 +pin name rdata[18] signal spimem_rdata<18> layer 3 28660 16695 +pin name rdata[19] signal spimem_rdata<19> layer 3 28660 16495 +pin name rdata[20] signal spimem_rdata<20> layer 3 28380 16295 +pin name rdata[21] signal spimem_rdata<21> layer 3 27420 16095 +pin name rdata[22] signal spimem_rdata<22> layer 3 28660 15899 +pin name rdata[23] signal spimem_rdata<23> layer 3 28420 14399 +pin name rdata[24] signal spimem_rdata<24> layer 3 28620 15495 +pin name rdata[25] signal spimem_rdata<25> layer 3 28660 15295 +pin name rdata[26] signal spimem_rdata<26> layer 3 28659 15095 +pin name rdata[27] signal spimem_rdata<27> layer 3 27740 14895 +pin name rdata[28] signal spimem_rdata<28> layer 3 28620 14695 +pin name rdata[29] signal spimem_rdata<29> layer 3 27540 14495 +pin name rdata[30] signal spimem_rdata<30> layer 3 27820 14295 +pin name rdata[31] signal spimem_rdata<31> layer 3 27374 13695 +pin name ready signal spimem_ready layer 3 28660 12895 +pin name resetn signal resetn layer 2 1300 17800 +pin name valid signal _1_ layer 3 25020 12695 +pad 1 name twpin_clk +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name clk signal clk layer 1 0 0 + +pad 2 name twpin_resetn +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name resetn signal resetn layer 1 0 0 + +pad 3 name twpin_iomem_ready +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_ready signal iomem_ready layer 1 0 0 + +pad 4 name twpin_iomem_rdata<0> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<0> signal iomem_rdata<0> layer 1 0 0 + +pad 5 name twpin_iomem_rdata<1> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<1> signal iomem_rdata<1> layer 1 0 0 + +pad 6 name twpin_iomem_rdata<2> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<2> signal iomem_rdata<2> layer 1 0 0 + +pad 7 name twpin_iomem_rdata<3> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<3> signal iomem_rdata<3> layer 1 0 0 + +pad 8 name twpin_iomem_rdata<4> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<4> signal iomem_rdata<4> layer 1 0 0 + +pad 9 name twpin_iomem_rdata<5> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<5> signal iomem_rdata<5> layer 1 0 0 + +pad 10 name twpin_iomem_rdata<6> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<6> signal iomem_rdata<6> layer 1 0 0 + +pad 11 name twpin_iomem_rdata<7> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<7> signal iomem_rdata<7> layer 1 0 0 + +pad 12 name twpin_iomem_rdata<8> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<8> signal iomem_rdata<8> layer 1 0 0 + +pad 13 name twpin_iomem_rdata<9> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<9> signal iomem_rdata<9> layer 1 0 0 + +pad 14 name twpin_iomem_rdata<10> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<10> signal iomem_rdata<10> layer 1 0 0 + +pad 15 name twpin_iomem_rdata<11> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<11> signal iomem_rdata<11> layer 1 0 0 + +pad 16 name twpin_iomem_rdata<12> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<12> signal iomem_rdata<12> layer 1 0 0 + +pad 17 name twpin_iomem_rdata<13> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<13> signal iomem_rdata<13> layer 1 0 0 + +pad 18 name twpin_iomem_rdata<14> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<14> signal iomem_rdata<14> layer 1 0 0 + +pad 19 name twpin_iomem_rdata<15> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<15> signal iomem_rdata<15> layer 1 0 0 + +pad 20 name twpin_iomem_rdata<16> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<16> signal iomem_rdata<16> layer 1 0 0 + +pad 21 name twpin_iomem_rdata<17> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<17> signal iomem_rdata<17> layer 1 0 0 + +pad 22 name twpin_iomem_rdata<18> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<18> signal iomem_rdata<18> layer 1 0 0 + +pad 23 name twpin_iomem_rdata<19> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<19> signal iomem_rdata<19> layer 1 0 0 + +pad 24 name twpin_iomem_rdata<20> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<20> signal iomem_rdata<20> layer 1 0 0 + +pad 25 name twpin_iomem_rdata<21> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<21> signal iomem_rdata<21> layer 1 0 0 + +pad 26 name twpin_iomem_rdata<22> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<22> signal iomem_rdata<22> layer 1 0 0 + +pad 27 name twpin_iomem_rdata<23> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<23> signal iomem_rdata<23> layer 1 0 0 + +pad 28 name twpin_iomem_rdata<24> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<24> signal iomem_rdata<24> layer 1 0 0 + +pad 29 name twpin_iomem_rdata<25> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<25> signal iomem_rdata<25> layer 1 0 0 + +pad 30 name twpin_iomem_rdata<26> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<26> signal iomem_rdata<26> layer 1 0 0 + +pad 31 name twpin_iomem_rdata<27> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<27> signal iomem_rdata<27> layer 1 0 0 + +pad 32 name twpin_iomem_rdata<28> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<28> signal iomem_rdata<28> layer 1 0 0 + +pad 33 name twpin_iomem_rdata<29> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<29> signal iomem_rdata<29> layer 1 0 0 + +pad 34 name twpin_iomem_rdata<30> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<30> signal iomem_rdata<30> layer 1 0 0 + +pad 35 name twpin_iomem_rdata<31> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_rdata<31> signal iomem_rdata<31> layer 1 0 0 + +pad 36 name twpin_irq_5 +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name irq_5 signal irq_5 layer 1 0 0 + +pad 37 name twpin_irq_6 +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name irq_6 signal irq_6 layer 1 0 0 + +pad 38 name twpin_irq_7 +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name irq_7 signal irq_7 layer 1 0 0 + +pad 39 name twpin_ser_rx +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name ser_rx signal ser_rx layer 1 0 0 + +pad 40 name twpin_flash_io0_di +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io0_di signal flash_io0_di layer 1 0 0 + +pad 41 name twpin_flash_io1_di +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io1_di signal flash_io1_di layer 1 0 0 + +pad 42 name twpin_flash_io2_di +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io2_di signal flash_io2_di layer 1 0 0 + +pad 43 name twpin_flash_io3_di +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io3_di signal flash_io3_di layer 1 0 0 + +pad 44 name twpin_iomem_valid +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_valid signal iomem_valid layer 1 0 0 + +pad 45 name twpin_iomem_wstrb<0> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wstrb<0> signal iomem_wstrb<0> layer 1 0 0 + +pad 46 name twpin_iomem_wstrb<1> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wstrb<1> signal iomem_wstrb<1> layer 1 0 0 + +pad 47 name twpin_iomem_wstrb<2> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wstrb<2> signal iomem_wstrb<2> layer 1 0 0 + +pad 48 name twpin_iomem_wstrb<3> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wstrb<3> signal iomem_wstrb<3> layer 1 0 0 + +pad 49 name twpin_iomem_addr<0> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<0> signal iomem_addr<0> layer 1 0 0 + +pad 50 name twpin_iomem_addr<1> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<1> signal iomem_addr<1> layer 1 0 0 + +pad 51 name twpin_iomem_addr<2> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<2> signal iomem_addr<2> layer 1 0 0 + +pad 52 name twpin_iomem_addr<3> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<3> signal iomem_addr<3> layer 1 0 0 + +pad 53 name twpin_iomem_addr<4> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<4> signal iomem_addr<4> layer 1 0 0 + +pad 54 name twpin_iomem_addr<5> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<5> signal iomem_addr<5> layer 1 0 0 + +pad 55 name twpin_iomem_addr<6> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<6> signal iomem_addr<6> layer 1 0 0 + +pad 56 name twpin_iomem_addr<7> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<7> signal iomem_addr<7> layer 1 0 0 + +pad 57 name twpin_iomem_addr<8> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<8> signal iomem_addr<8> layer 1 0 0 + +pad 58 name twpin_iomem_addr<9> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<9> signal iomem_addr<9> layer 1 0 0 + +pad 59 name twpin_iomem_addr<10> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<10> signal iomem_addr<10> layer 1 0 0 + +pad 60 name twpin_iomem_addr<11> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<11> signal iomem_addr<11> layer 1 0 0 + +pad 61 name twpin_iomem_addr<12> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<12> signal iomem_addr<12> layer 1 0 0 + +pad 62 name twpin_iomem_addr<13> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<13> signal iomem_addr<13> layer 1 0 0 + +pad 63 name twpin_iomem_addr<14> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<14> signal iomem_addr<14> layer 1 0 0 + +pad 64 name twpin_iomem_addr<15> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<15> signal iomem_addr<15> layer 1 0 0 + +pad 65 name twpin_iomem_addr<16> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<16> signal iomem_addr<16> layer 1 0 0 + +pad 66 name twpin_iomem_addr<17> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<17> signal iomem_addr<17> layer 1 0 0 + +pad 67 name twpin_iomem_addr<18> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<18> signal iomem_addr<18> layer 1 0 0 + +pad 68 name twpin_iomem_addr<19> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<19> signal iomem_addr<19> layer 1 0 0 + +pad 69 name twpin_iomem_addr<20> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<20> signal iomem_addr<20> layer 1 0 0 + +pad 70 name twpin_iomem_addr<21> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<21> signal iomem_addr<21> layer 1 0 0 + +pad 71 name twpin_iomem_addr<22> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<22> signal iomem_addr<22> layer 1 0 0 + +pad 72 name twpin_iomem_addr<23> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<23> signal iomem_addr<23> layer 1 0 0 + +pad 73 name twpin_iomem_addr<24> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<24> signal iomem_addr<24> layer 1 0 0 + +pad 74 name twpin_iomem_addr<25> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<25> signal iomem_addr<25> layer 1 0 0 + +pad 75 name twpin_iomem_addr<26> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<26> signal iomem_addr<26> layer 1 0 0 + +pad 76 name twpin_iomem_addr<27> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<27> signal iomem_addr<27> layer 1 0 0 + +pad 77 name twpin_iomem_addr<28> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<28> signal iomem_addr<28> layer 1 0 0 + +pad 78 name twpin_iomem_addr<29> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<29> signal iomem_addr<29> layer 1 0 0 + +pad 79 name twpin_iomem_addr<30> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<30> signal iomem_addr<30> layer 1 0 0 + +pad 80 name twpin_iomem_addr<31> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_addr<31> signal iomem_addr<31> layer 1 0 0 + +pad 81 name twpin_iomem_wdata<0> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<0> signal iomem_wdata<0> layer 1 0 0 + +pad 82 name twpin_iomem_wdata<1> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<1> signal iomem_wdata<1> layer 1 0 0 + +pad 83 name twpin_iomem_wdata<2> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<2> signal iomem_wdata<2> layer 1 0 0 + +pad 84 name twpin_iomem_wdata<3> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<3> signal iomem_wdata<3> layer 1 0 0 + +pad 85 name twpin_iomem_wdata<4> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<4> signal iomem_wdata<4> layer 1 0 0 + +pad 86 name twpin_iomem_wdata<5> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<5> signal iomem_wdata<5> layer 1 0 0 + +pad 87 name twpin_iomem_wdata<6> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<6> signal iomem_wdata<6> layer 1 0 0 + +pad 88 name twpin_iomem_wdata<7> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<7> signal iomem_wdata<7> layer 1 0 0 + +pad 89 name twpin_iomem_wdata<8> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<8> signal iomem_wdata<8> layer 1 0 0 + +pad 90 name twpin_iomem_wdata<9> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<9> signal iomem_wdata<9> layer 1 0 0 + +pad 91 name twpin_iomem_wdata<10> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<10> signal iomem_wdata<10> layer 1 0 0 + +pad 92 name twpin_iomem_wdata<11> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<11> signal iomem_wdata<11> layer 1 0 0 + +pad 93 name twpin_iomem_wdata<12> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<12> signal iomem_wdata<12> layer 1 0 0 + +pad 94 name twpin_iomem_wdata<13> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<13> signal iomem_wdata<13> layer 1 0 0 + +pad 95 name twpin_iomem_wdata<14> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<14> signal iomem_wdata<14> layer 1 0 0 + +pad 96 name twpin_iomem_wdata<15> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<15> signal iomem_wdata<15> layer 1 0 0 + +pad 97 name twpin_iomem_wdata<16> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<16> signal iomem_wdata<16> layer 1 0 0 + +pad 98 name twpin_iomem_wdata<17> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<17> signal iomem_wdata<17> layer 1 0 0 + +pad 99 name twpin_iomem_wdata<18> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<18> signal iomem_wdata<18> layer 1 0 0 + +pad 100 name twpin_iomem_wdata<19> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<19> signal iomem_wdata<19> layer 1 0 0 + +pad 101 name twpin_iomem_wdata<20> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<20> signal iomem_wdata<20> layer 1 0 0 + +pad 102 name twpin_iomem_wdata<21> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<21> signal iomem_wdata<21> layer 1 0 0 + +pad 103 name twpin_iomem_wdata<22> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<22> signal iomem_wdata<22> layer 1 0 0 + +pad 104 name twpin_iomem_wdata<23> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<23> signal iomem_wdata<23> layer 1 0 0 + +pad 105 name twpin_iomem_wdata<24> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<24> signal iomem_wdata<24> layer 1 0 0 + +pad 106 name twpin_iomem_wdata<25> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<25> signal iomem_wdata<25> layer 1 0 0 + +pad 107 name twpin_iomem_wdata<26> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<26> signal iomem_wdata<26> layer 1 0 0 + +pad 108 name twpin_iomem_wdata<27> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<27> signal iomem_wdata<27> layer 1 0 0 + +pad 109 name twpin_iomem_wdata<28> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<28> signal iomem_wdata<28> layer 1 0 0 + +pad 110 name twpin_iomem_wdata<29> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<29> signal iomem_wdata<29> layer 1 0 0 + +pad 111 name twpin_iomem_wdata<30> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<30> signal iomem_wdata<30> layer 1 0 0 + +pad 112 name twpin_iomem_wdata<31> +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name iomem_wdata<31> signal iomem_wdata<31> layer 1 0 0 + +pad 113 name twpin_ser_tx +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name ser_tx signal ser_tx layer 1 0 0 + +pad 114 name twpin_flash_csb +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_csb signal flash_csb layer 1 0 0 + +pad 115 name twpin_flash_clk +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_clk signal flash_clk layer 1 0 0 + +pad 116 name twpin_flash_io0_oe +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io0_oe signal flash_io0_oe layer 1 0 0 + +pad 117 name twpin_flash_io1_oe +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io1_oe signal flash_io1_oe layer 1 0 0 + +pad 118 name twpin_flash_io2_oe +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io2_oe signal flash_io2_oe layer 1 0 0 + +pad 119 name twpin_flash_io3_oe +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io3_oe signal flash_io3_oe layer 1 0 0 + +pad 120 name twpin_flash_io0_do +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io0_do signal flash_io0_do layer 1 0 0 + +pad 121 name twpin_flash_io1_do +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io1_do signal flash_io1_do layer 1 0 0 + +pad 122 name twpin_flash_io2_do +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io2_do signal flash_io2_do layer 1 0 0 + +pad 123 name twpin_flash_io3_do +corners 4 -40 -50 -40 50 40 50 40 -50 +pin name flash_io3_do signal flash_io3_do layer 1 0 0 + diff -Nru graywolf-0.1.5/tests/picosoc/picosoc.par graywolf-0.1.6/tests/picosoc/picosoc.par --- graywolf-0.1.5/tests/picosoc/picosoc.par 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/picosoc/picosoc.par 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,72 @@ +# osu018.par --- Parameter file for GrayWolf +# NOTE: all distance units are in centimicrons unless otherwise stated + +RULES + # values are resistance in ohms/sq and capacitance in fF/um^2 + layer metal1 0.07 0.030 horizontal + layer metal2 0.07 0.017 vertical + layer metal3 0.07 0.006 horizontal + layer metal4 0.04 0.004 vertical + + via via12 metal1 metal2 + via via23 metal2 metal3 + via via34 metal3 metal4 + + width metal1 60 + width metal2 60 + width metal3 60 + width metal4 120 + width via12 60 + width via23 60 + width via34 120 + + # Set spacing = track pitch - width, so that GrayWolf places pins + # on the right pitch. + # Pitches are (in um): + # metal1 = 200, metal2 = 160, metal3 = 200, metal4 = 320 + + spacing metal1 metal1 140 + spacing metal2 metal2 100 + spacing metal3 metal3 140 + spacing metal4 metal4 200 + + # Stacked vias allowed + spacing via12 via23 0 + spacing via23 via34 0 + + overhang via12 metal1 8 + overhang via12 metal2 6 + + overhang via23 metal2 8 + overhang via23 metal3 6 + + overhang via34 metal3 14 + overhang via34 metal4 16 +ENDRULES + +*vertical_wire_weight : 1.0 +*vertical_path_weight : 1.0 +*padspacing : variable +*rowSep : 0.0 0 +*track.pitch : 80 +*minimum_pad_space : 120 +*gridX : 80 +*gridY : 100 +*gridOffsetX : 0 +*gridOffsetY : 0 +*graphics.wait : off +*last_chance.wait : off +*random.seed : 12345 + +TWMC*chip.aspect.ratio : 0.75 + +TWSC*feedThruWidth : 80 layer 1 +TWSC*do.global.route : on +TWSC*ignore_feeds : true +TWSC*call_row_evener : true +TWSC*even_rows_maximally : true +# TWSC*no.graphics : on + +GENR*row_to_tile_spacing: 1 +# GENR*numrows : 6 +GENR*flip_alternate_rows : 1 diff -Nru graywolf-0.1.5/tests/runtest.sh graywolf-0.1.6/tests/runtest.sh --- graywolf-0.1.5/tests/runtest.sh 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/runtest.sh 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,37 @@ +#!/bin/bash + +SOURCEDIR=$1 +BINDIR=$2 +TESTNAME=$3 + +#TWDIR=${BINDIR}/micro_env ${BINDIR}/src/twflow/graywolf +TMPDIR=`mktemp -d` +rsync ${SOURCEDIR}/tests/${TESTNAME} ${TMPDIR}/ -a --copy-links -v + +pushd ${TMPDIR}/${TESTNAME} +TWDIR=${BINDIR}/micro_env ${BINDIR}/src/twflow/graywolf -n ${TESTNAME} + +RET=0 + +diff -Nau ${TESTNAME}.pl1 expected/${TESTNAME}.pl1 +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.pl2 expected/${TESTNAME}.pl2 +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + + +if [ "$#" = "4" ] && [ "$4" == "1" ] ; then + cp * ${SOURCEDIR}/tests/${TESTNAME}/expected/ + touch ${SOURCEDIR}/tests/${TESTNAME}/expected/updated +fi + +popd +rm -rf ${TMPDIR} + +exit $RET diff -Nru graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.blk graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.blk --- graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.blk 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.blk 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,19 @@ +rows 9 +row -239 -200 24239 1800 mirror +row -239 1800 24239 3800 +row -239 3800 24239 5800 mirror +row -239 5800 24239 7800 +row -239 7800 24239 9800 mirror +row -239 9800 24239 11800 +row -239 11800 24239 13800 mirror +row -239 13800 24239 15800 +row -239 15800 24239 17800 mirror + +/* + The Tile and Macro Information: + numtiles 1 + -240 -200 24240 27400 + + nummacros 0 + +*/ diff -Nru graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.gen graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.gen --- graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.gen 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.gen 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1 @@ +core -240 -200 24240 18200 diff -Nru graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.gsav graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.gsav --- graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.gsav 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.gsav 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,11 @@ +total_row_length 213440 +actual_row_height 2000 +channel_separation 0 +min_length 4896 +core -240 -200 24240 18200 +grid 0 0 +num_macro 0 +feed_length 0 +spacing 1 +numtiles 1 +0 -240 -200 24240 27400 0 1 0 9 2000 0 0 4896 1 24478 0 diff -Nru graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.mdat graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.mdat --- graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.mdat 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.mdat 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,235 @@ + +stdcell 1 name core +corners 6 +0 0 0 18478 18478 18478 18478 9239 27717 9239 27717 0 +asplb 0.500000 aspub 2.000000 +class 0 orientations 0 1 2 3 4 5 6 7 +orient 0 + +pad 2 name twpin_clock +corners 4 +-440 8280 -440 8440 -240 8440 -240 8280 +orient 7 +pin name clock signal clock layer 1 -340 8360 + +pad 3 name twpin_reset +corners 4 +-440 5860 -440 6020 -240 6020 -240 5860 +orient 7 +pin name reset signal reset layer 1 -340 5940 + +pad 4 name twpin_start +corners 4 +-440 8060 -440 8220 -240 8220 -240 8060 +orient 7 +pin name start signal start layer 1 -340 8140 + +pad 5 name twpin_N<0> +corners 4 +-440 7840 -440 8000 -240 8000 -240 7840 +orient 7 +pin name N<0> signal N<0> layer 1 -340 7920 + +pad 6 name twpin_N<1> +corners 4 +-440 7620 -440 7780 -240 7780 -240 7620 +orient 7 +pin name N<1> signal N<1> layer 1 -340 7700 + +pad 7 name twpin_N<2> +corners 4 +-440 7400 -440 7560 -240 7560 -240 7400 +orient 7 +pin name N<2> signal N<2> layer 1 -340 7480 + +pad 8 name twpin_N<3> +corners 4 +-440 7180 -440 7340 -240 7340 -240 7180 +orient 7 +pin name N<3> signal N<3> layer 1 -340 7260 + +pad 9 name twpin_N<4> +corners 4 +-440 6960 -440 7120 -240 7120 -240 6960 +orient 7 +pin name N<4> signal N<4> layer 1 -340 7040 + +pad 10 name twpin_N<5> +corners 4 +-440 6740 -440 6900 -240 6900 -240 6740 +orient 7 +pin name N<5> signal N<5> layer 1 -340 6820 + +pad 11 name twpin_N<6> +corners 4 +-440 6520 -440 6680 -240 6680 -240 6520 +orient 7 +pin name N<6> signal N<6> layer 1 -340 6600 + +pad 12 name twpin_N<7> +corners 4 +-440 6300 -440 6460 -240 6460 -240 6300 +orient 7 +pin name N<7> signal N<7> layer 1 -340 6380 + +pad 13 name twpin_N<8> +corners 4 +-440 6080 -440 6240 -240 6240 -240 6080 +orient 7 +pin name N<8> signal N<8> layer 1 -340 6160 + +pad 14 name twpin_dp<0> +corners 4 +-440 3660 -440 3820 -240 3820 -240 3660 +orient 7 +pin name dp<0> signal dp<0> layer 1 -340 3740 + +pad 15 name twpin_dp<1> +corners 4 +-440 3440 -440 3600 -240 3600 -240 3440 +orient 7 +pin name dp<1> signal dp<1> layer 1 -340 3520 + +pad 16 name twpin_dp<2> +corners 4 +-440 3220 -440 3380 -240 3380 -240 3220 +orient 7 +pin name dp<2> signal dp<2> layer 1 -340 3300 + +pad 17 name twpin_dp<3> +corners 4 +-440 3000 -440 3160 -240 3160 -240 3000 +orient 7 +pin name dp<3> signal dp<3> layer 1 -340 3080 + +pad 18 name twpin_dp<4> +corners 4 +-440 2780 -440 2940 -240 2940 -240 2780 +orient 7 +pin name dp<4> signal dp<4> layer 1 -340 2860 + +pad 19 name twpin_dp<5> +corners 4 +-440 2560 -440 2720 -240 2720 -240 2560 +orient 7 +pin name dp<5> signal dp<5> layer 1 -340 2640 + +pad 20 name twpin_dp<6> +corners 4 +-440 2340 -440 2500 -240 2500 -240 2340 +orient 7 +pin name dp<6> signal dp<6> layer 1 -340 2420 + +pad 21 name twpin_dp<7> +corners 4 +-440 2120 -440 2280 -240 2280 -240 2120 +orient 7 +pin name dp<7> signal dp<7> layer 1 -340 2200 + +pad 22 name twpin_dp<8> +corners 4 +-440 1900 -440 2060 -240 2060 -240 1900 +orient 7 +pin name dp<8> signal dp<8> layer 1 -340 1980 + +pad 23 name twpin_done +corners 4 +-440 3880 -440 4040 -240 4040 -240 3880 +orient 7 +pin name done signal done layer 1 -340 3960 + +pad 24 name twpin_counter<0> +corners 4 +-440 5640 -440 5800 -240 5800 -240 5640 +orient 7 +pin name counter<0> signal counter<0> layer 1 -340 5720 + +pad 25 name twpin_counter<1> +corners 4 +-440 5420 -440 5580 -240 5580 -240 5420 +orient 7 +pin name counter<1> signal counter<1> layer 1 -340 5500 + +pad 26 name twpin_counter<2> +corners 4 +-440 5200 -440 5360 -240 5360 -240 5200 +orient 7 +pin name counter<2> signal counter<2> layer 1 -340 5280 + +pad 27 name twpin_counter<3> +corners 4 +-440 4980 -440 5140 -240 5140 -240 4980 +orient 7 +pin name counter<3> signal counter<3> layer 1 -340 5060 + +pad 28 name twpin_counter<4> +corners 4 +-440 4760 -440 4920 -240 4920 -240 4760 +orient 7 +pin name counter<4> signal counter<4> layer 1 -340 4840 + +pad 29 name twpin_counter<5> +corners 4 +-440 4540 -440 4700 -240 4700 -240 4540 +orient 7 +pin name counter<5> signal counter<5> layer 1 -340 4620 + +pad 30 name twpin_counter<6> +corners 4 +-440 4320 -440 4480 -240 4480 -240 4320 +orient 7 +pin name counter<6> signal counter<6> layer 1 -340 4400 + +pad 31 name twpin_counter<7> +corners 4 +-440 4100 -440 4260 -240 4260 -240 4100 +orient 7 +pin name counter<7> signal counter<7> layer 1 -340 4180 + +pad 32 name twpin_sr<0> +corners 4 +-440 1680 -440 1840 -240 1840 -240 1680 +orient 7 +pin name sr<0> signal sr<0> layer 1 -340 1760 + +pad 33 name twpin_sr<1> +corners 4 +-440 1460 -440 1620 -240 1620 -240 1460 +orient 7 +pin name sr<1> signal sr<1> layer 1 -340 1540 + +pad 34 name twpin_sr<2> +corners 4 +-440 1240 -440 1400 -240 1400 -240 1240 +orient 7 +pin name sr<2> signal sr<2> layer 1 -340 1320 + +pad 35 name twpin_sr<3> +corners 4 +-440 1020 -440 1180 -240 1180 -240 1020 +orient 7 +pin name sr<3> signal sr<3> layer 1 -340 1100 + +pad 36 name twpin_sr<4> +corners 4 +-440 800 -440 960 -240 960 -240 800 +orient 7 +pin name sr<4> signal sr<4> layer 1 -340 880 + +pad 37 name twpin_sr<5> +corners 4 +-440 580 -440 740 -240 740 -240 580 +orient 7 +pin name sr<5> signal sr<5> layer 1 -340 660 + +pad 38 name twpin_sr<6> +corners 4 +-440 360 -440 520 -240 520 -240 360 +orient 7 +pin name sr<6> signal sr<6> layer 1 -340 440 + +pad 39 name twpin_sr<7> +corners 4 +-440 140 -440 300 -240 300 -240 140 +orient 7 +pin name sr<7> signal sr<7> layer 1 -340 220 diff -Nru graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.mgeo graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.mgeo --- graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.mgeo 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.mgeo 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,10 @@ +cell core +6 vertices 0 0 0 18478 18478 18478 18478 9239 27717 9239 27717 0 +cell pad.macro.l +4 vertices -440 140 -440 8440 -240 8440 -240 140 +cell pad.macro.t +4 vertices 240 18400 240 18600 23760 18600 23760 18400 +cell pad.macro.r +4 vertices 24480 200 24480 17800 24720 17800 24720 200 +cell pad.macro.b +4 vertices 240 -600 240 -400 23760 -400 23760 -600 diff -Nru graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.mpin graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.mpin --- graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.mpin 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.mpin 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,152 @@ +net sr<7> +pin sr<7> x -240 y 220 cell 2 layer 1 PinOrEquiv 1 +pin pin1 x 0 y 220 cell 1 layer 0 PinOrEquiv 1 + +net sr<6> +pin sr<6> x -240 y 440 cell 2 layer 1 PinOrEquiv 1 +pin pin2 x 0 y 440 cell 1 layer 0 PinOrEquiv 1 + +net sr<5> +pin sr<5> x -240 y 660 cell 2 layer 1 PinOrEquiv 1 +pin pin3 x 0 y 660 cell 1 layer 0 PinOrEquiv 1 + +net sr<4> +pin sr<4> x -240 y 880 cell 2 layer 1 PinOrEquiv 1 +pin pin4 x 0 y 880 cell 1 layer 0 PinOrEquiv 1 + +net sr<3> +pin sr<3> x -240 y 1100 cell 2 layer 1 PinOrEquiv 1 +pin pin5 x 0 y 1100 cell 1 layer 0 PinOrEquiv 1 + +net sr<2> +pin sr<2> x -240 y 1320 cell 2 layer 1 PinOrEquiv 1 +pin pin6 x 0 y 1320 cell 1 layer 0 PinOrEquiv 1 + +net sr<1> +pin sr<1> x -240 y 1540 cell 2 layer 1 PinOrEquiv 1 +pin pin7 x 0 y 1540 cell 1 layer 0 PinOrEquiv 1 + +net sr<0> +pin sr<0> x -240 y 1760 cell 2 layer 1 PinOrEquiv 1 +pin pin8 x 0 y 1760 cell 1 layer 0 PinOrEquiv 1 + +net dp<8> +pin dp<8> x -240 y 1980 cell 2 layer 1 PinOrEquiv 1 +pin pin9 x 0 y 1980 cell 1 layer 0 PinOrEquiv 1 + +net dp<7> +pin dp<7> x -240 y 2200 cell 2 layer 1 PinOrEquiv 1 +pin pin10 x 0 y 2200 cell 1 layer 0 PinOrEquiv 1 + +net dp<6> +pin dp<6> x -240 y 2420 cell 2 layer 1 PinOrEquiv 1 +pin pin11 x 0 y 2420 cell 1 layer 0 PinOrEquiv 1 + +net dp<5> +pin dp<5> x -240 y 2640 cell 2 layer 1 PinOrEquiv 1 +pin pin12 x 0 y 2640 cell 1 layer 0 PinOrEquiv 1 + +net dp<4> +pin dp<4> x -240 y 2860 cell 2 layer 1 PinOrEquiv 1 +pin pin13 x 0 y 2860 cell 1 layer 0 PinOrEquiv 1 + +net dp<3> +pin dp<3> x -240 y 3080 cell 2 layer 1 PinOrEquiv 1 +pin pin14 x 0 y 3080 cell 1 layer 0 PinOrEquiv 1 + +net dp<2> +pin dp<2> x -240 y 3300 cell 2 layer 1 PinOrEquiv 1 +pin pin15 x 0 y 3300 cell 1 layer 0 PinOrEquiv 1 + +net dp<1> +pin dp<1> x -240 y 3520 cell 2 layer 1 PinOrEquiv 1 +pin pin16 x 0 y 3520 cell 1 layer 0 PinOrEquiv 1 + +net dp<0> +pin dp<0> x -240 y 3740 cell 2 layer 1 PinOrEquiv 1 +pin pin17 x 0 y 3740 cell 1 layer 0 PinOrEquiv 1 + +net done +pin done x -240 y 3960 cell 2 layer 1 PinOrEquiv 1 +pin pin18 x 0 y 3960 cell 1 layer 0 PinOrEquiv 1 + +net counter<7> +pin counter<7> x -240 y 4180 cell 2 layer 1 PinOrEquiv 1 +pin pin19 x 0 y 4180 cell 1 layer 0 PinOrEquiv 1 + +net counter<6> +pin counter<6> x -240 y 4400 cell 2 layer 1 PinOrEquiv 1 +pin pin20 x 0 y 4400 cell 1 layer 0 PinOrEquiv 1 + +net counter<5> +pin counter<5> x -240 y 4620 cell 2 layer 1 PinOrEquiv 1 +pin pin21 x 0 y 4620 cell 1 layer 0 PinOrEquiv 1 + +net counter<4> +pin counter<4> x -240 y 4840 cell 2 layer 1 PinOrEquiv 1 +pin pin22 x 0 y 4840 cell 1 layer 0 PinOrEquiv 1 + +net counter<3> +pin counter<3> x -240 y 5060 cell 2 layer 1 PinOrEquiv 1 +pin pin23 x 0 y 5060 cell 1 layer 0 PinOrEquiv 1 + +net counter<2> +pin counter<2> x -240 y 5280 cell 2 layer 1 PinOrEquiv 1 +pin pin24 x 0 y 5280 cell 1 layer 0 PinOrEquiv 1 + +net counter<1> +pin counter<1> x -240 y 5500 cell 2 layer 1 PinOrEquiv 1 +pin pin25 x 0 y 5500 cell 1 layer 0 PinOrEquiv 1 + +net counter<0> +pin counter<0> x -240 y 5720 cell 2 layer 1 PinOrEquiv 1 +pin pin26 x 0 y 5720 cell 1 layer 0 PinOrEquiv 1 + +net reset +pin reset x -240 y 5940 cell 2 layer 1 PinOrEquiv 1 +pin pin27 x 0 y 5940 cell 1 layer 0 PinOrEquiv 1 + +net N<8> +pin N<8> x -240 y 6160 cell 2 layer 1 PinOrEquiv 1 +pin pin28 x 0 y 6160 cell 1 layer 0 PinOrEquiv 1 + +net N<7> +pin N<7> x -240 y 6380 cell 2 layer 1 PinOrEquiv 1 +pin pin29 x 0 y 6380 cell 1 layer 0 PinOrEquiv 1 + +net N<6> +pin N<6> x -240 y 6600 cell 2 layer 1 PinOrEquiv 1 +pin pin30 x 0 y 6600 cell 1 layer 0 PinOrEquiv 1 + +net N<5> +pin N<5> x -240 y 6820 cell 2 layer 1 PinOrEquiv 1 +pin pin31 x 0 y 6820 cell 1 layer 0 PinOrEquiv 1 + +net N<4> +pin N<4> x -240 y 7040 cell 2 layer 1 PinOrEquiv 1 +pin pin32 x 0 y 7040 cell 1 layer 0 PinOrEquiv 1 + +net N<3> +pin N<3> x -240 y 7260 cell 2 layer 1 PinOrEquiv 1 +pin pin33 x 0 y 7260 cell 1 layer 0 PinOrEquiv 1 + +net N<2> +pin N<2> x -240 y 7480 cell 2 layer 1 PinOrEquiv 1 +pin pin34 x 0 y 7480 cell 1 layer 0 PinOrEquiv 1 + +net N<1> +pin N<1> x -240 y 7700 cell 2 layer 1 PinOrEquiv 1 +pin pin35 x 0 y 7700 cell 1 layer 0 PinOrEquiv 1 + +net N<0> +pin N<0> x -240 y 7920 cell 2 layer 1 PinOrEquiv 1 +pin pin36 x 0 y 7920 cell 1 layer 0 PinOrEquiv 1 + +net start +pin start x -240 y 8140 cell 2 layer 1 PinOrEquiv 1 +pin pin37 x 0 y 8140 cell 1 layer 0 PinOrEquiv 1 + +net clock +pin clock x -340 y 8360 cell 2 layer 1 PinOrEquiv 1 +pin pin38 x 0 y 8360 cell 1 layer 0 PinOrEquiv 1 + diff -Nru graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.mpth graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.mpth --- graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.mpth 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.mpth 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,43 @@ +The paths: +############################################## + +The nets: +############################################## +net 1:sr<7> xspan:340 yspan:0 length:340 numpins:2 +net 2:sr<6> xspan:340 yspan:0 length:340 numpins:2 +net 3:sr<5> xspan:340 yspan:0 length:340 numpins:2 +net 4:sr<4> xspan:340 yspan:0 length:340 numpins:2 +net 5:sr<3> xspan:340 yspan:0 length:340 numpins:2 +net 6:sr<2> xspan:340 yspan:0 length:340 numpins:2 +net 7:sr<1> xspan:340 yspan:0 length:340 numpins:2 +net 8:sr<0> xspan:340 yspan:0 length:340 numpins:2 +net 9:dp<8> xspan:340 yspan:0 length:340 numpins:2 +net 10:dp<7> xspan:340 yspan:0 length:340 numpins:2 +net 11:dp<6> xspan:340 yspan:0 length:340 numpins:2 +net 12:dp<5> xspan:340 yspan:0 length:340 numpins:2 +net 13:dp<4> xspan:340 yspan:0 length:340 numpins:2 +net 14:dp<3> xspan:340 yspan:0 length:340 numpins:2 +net 15:dp<2> xspan:340 yspan:0 length:340 numpins:2 +net 16:dp<1> xspan:340 yspan:0 length:340 numpins:2 +net 17:dp<0> xspan:340 yspan:0 length:340 numpins:2 +net 18:done xspan:340 yspan:0 length:340 numpins:2 +net 19:counter<7> xspan:340 yspan:0 length:340 numpins:2 +net 20:counter<6> xspan:340 yspan:0 length:340 numpins:2 +net 21:counter<5> xspan:340 yspan:0 length:340 numpins:2 +net 22:counter<4> xspan:340 yspan:0 length:340 numpins:2 +net 23:counter<3> xspan:340 yspan:0 length:340 numpins:2 +net 24:counter<2> xspan:340 yspan:0 length:340 numpins:2 +net 25:counter<1> xspan:340 yspan:0 length:340 numpins:2 +net 26:counter<0> xspan:340 yspan:0 length:340 numpins:2 +net 27:reset xspan:340 yspan:0 length:340 numpins:2 +net 28:N<8> xspan:340 yspan:0 length:340 numpins:2 +net 29:N<7> xspan:340 yspan:0 length:340 numpins:2 +net 30:N<6> xspan:340 yspan:0 length:340 numpins:2 +net 31:N<5> xspan:340 yspan:0 length:340 numpins:2 +net 32:N<4> xspan:340 yspan:0 length:340 numpins:2 +net 33:N<3> xspan:340 yspan:0 length:340 numpins:2 +net 34:N<2> xspan:340 yspan:0 length:340 numpins:2 +net 35:N<1> xspan:340 yspan:0 length:340 numpins:2 +net 36:N<0> xspan:340 yspan:0 length:340 numpins:2 +net 37:start xspan:340 yspan:0 length:340 numpins:2 +net 38:clock xspan:340 yspan:0 length:340 numpins:2 diff -Nru graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.msav graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.msav --- graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.msav 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.msav 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,32 @@ +# uloop parameters: +0 0 0 +1.000000 0.000000 +# window parameters: +0.000000 0.000000 0.000000 +# wireest parameters: +0.00000000000000000000000000000000e+00 +0.00000000000000000000000000000000e+00 +0.00000000000000000000000000000000e+00 +0.00000000000000000000000000000000e+00 +0.00000000000000000000000000000000e+00 +0.00000000000000000000000000000000e+00 +# configuration parameters: +#numcells 1 +12345 +17893 23857 +11928 8946 +7953 -7952 +8947 -8946 +8.38328373223791770661728062208340e-05 +1.11775554686190133741284513657632e-04 +1.00000000000000000000000000000000e+00 +0.00000000000000000000000000000000e+00 +0.00000000000000000000000000000000e+00 +0.00000000000000000000000000000000e+00 +1.00000000000000000000000000000000e+00 +1 0 13858 9239 +3 + 0.666667 +-13858 -9019 -13858 -8799 -13858 -8579 -13858 -8359 -13858 -8139 -13858 -7919 -13858 -7699 -13858 -7479 -13858 -7259 -13858 -7039 -13858 -6819 -13858 -6599 -13858 -6379 -13858 -6159 -13858 -5939 +-13858 -5719 -13858 -5499 -13858 -5279 -13858 -5059 -13858 -4839 -13858 -4619 -13858 -4399 -13858 -4179 -13858 -3959 -13858 -3739 -13858 -3519 -13858 -3299 -13858 -3079 -13858 -2859 -13858 -2639 +-13858 -2419 -13858 -2199 -13858 -1979 -13858 -1759 -13858 -1539 -13858 -1319 -13858 -1099 -13858 -879 diff -Nru graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.mver graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.mver --- graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.mver 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.mver 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,7 @@ +total_row_length 213440 +actual_row_height 2000 +channel_separation 0 +min_length 4896 +core -240 -200 24240 18200 +grid 240 200 +num_macro 0 diff -Nru graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.scel graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.scel --- graywolf-0.1.5/tests/twmc/map9v3/expected/map9v3.scel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/expected/map9v3.scel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,4224 @@ + +cell 0 BUFX4_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf3 layer 1 89 -300 +cell 1 BUFX4_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf2 layer 1 89 -300 +cell 2 BUFX4_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf1 layer 1 89 -300 +cell 3 BUFX2_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n76 layer 1 -160 -140 +pin name Y signal $abc$733$n76_bF$buf0 layer 1 170 0 +cell 4 BUFX4_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf4 layer 1 89 -300 +cell 5 BUFX4_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf3 layer 1 89 -300 +cell 6 BUFX4_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf2 layer 1 89 -300 +cell 7 BUFX4_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf1 layer 1 89 -300 +cell 8 BUFX4_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf0 layer 1 89 -300 +cell 9 BUFX2_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf4 layer 1 170 0 +cell 10 BUFX2_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf3 layer 1 170 0 +cell 11 BUFX2_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf2 layer 1 170 0 +cell 12 BUFX2_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf1 layer 1 170 0 +cell 13 BUFX2_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf0 layer 1 170 0 +cell 14 BUFX2_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf3 layer 1 170 0 +cell 15 BUFX2_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf2 layer 1 170 0 +cell 16 BUFX2_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf1 layer 1 170 0 +cell 17 BUFX2_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf0 layer 1 170 0 +cell 18 INVX4_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<0> layer 1 -160 -340 +pin name Y signal $abc$733$n75_1 layer 1 0 0 +cell 19 INVX8_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -320 -340 +pin name Y signal $abc$733$n76 layer 1 -160 410 +cell 20 NOR2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 160 -61 +pin name Y signal $abc$733$n77 layer 1 0 -300 +cell 21 NOR2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<4> layer 1 160 -61 +pin name Y signal $abc$733$n78 layer 1 0 -300 +cell 22 NAND2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n78 layer 1 160 140 +pin name Y signal $abc$733$n79 layer 1 100 -680 +cell 23 NOR2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 -61 +pin name Y signal $abc$733$n80 layer 1 0 -300 +cell 24 NOR2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 160 -61 +pin name Y signal $abc$733$n81 layer 1 0 -300 +cell 25 NAND2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n80 layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n82 layer 1 100 -680 +cell 26 NOR2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n82 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n83_1 layer 1 0 -300 +cell 27 OAI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf3 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n83_1 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$546$n2 layer 1 50 -100 +cell 28 INVX1_1 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<4> layer 1 -80 -540 +pin name Y signal $abc$733$n85_1 layer 1 80 0 +cell 29 INVX1_2 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<1> layer 1 -80 -540 +pin name Y signal $abc$733$n86 layer 1 80 0 +cell 30 INVX1_3 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal start layer 1 -80 -540 +pin name Y signal $abc$733$n87_1 layer 1 80 0 +cell 31 NOR2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal startbuf layer 1 -160 -540 +pin name B signal $abc$733$n87_1 layer 1 160 -61 +pin name Y signal $abc$733$n88 layer 1 0 -300 +cell 32 OAI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n86 layer 1 -160 -330 +pin name B signal $abc$733$n88 layer 1 -80 -140 +pin name C signal $abc$733$n85_1 layer 1 160 300 +pin name Y signal $abc$546$n5 layer 1 50 -100 +cell 33 INVX1_4 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -80 -540 +pin name Y signal $abc$733$n90 layer 1 80 0 +cell 34 NAND3X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<2> layer 1 -240 60 +pin_group +pin name $abc$733$n75_1_bF$pin/B signal $abc$733$n75_1_bF$buf2 layer 1 -40 -100 +end_pin_group +pin_group +pin name $abc$733$n76_bF$pin/C signal $abc$733$n76_bF$buf2 layer 1 80 260 +end_pin_group +pin name Y signal $abc$733$n91_1 layer 1 -80 680 +cell 35 NOR2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n92 layer 1 0 -300 +cell 36 AOI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n90 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n92 layer 1 240 -501 +pin name Y signal dp<1>_FF_INPUT layer 1 80 -680 +cell 37 INVX1_5 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -80 -540 +pin name Y signal $abc$733$n94 layer 1 80 0 +cell 38 INVX1_6 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -80 -540 +pin name Y signal $abc$733$n95_1 layer 1 80 0 +cell 39 MUX2X1_1 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n94 layer 1 240 -61 +pin name B signal $abc$733$n95_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<2>_FF_INPUT layer 1 19 500 +cell 40 INVX1_7 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -80 -540 +pin name Y signal $abc$733$n97_1 layer 1 80 0 +cell 41 INVX1_8 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -80 -540 +pin name Y signal $abc$733$n98_1 layer 1 80 0 +cell 42 MUX2X1_2 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n97_1 layer 1 240 -61 +pin name B signal $abc$733$n98_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<3>_FF_INPUT layer 1 19 500 +cell 43 INVX1_9 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -80 -540 +pin name Y signal $abc$733$n100 layer 1 80 0 +cell 44 INVX1_10 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -80 -540 +pin name Y signal $abc$733$n101_1 layer 1 80 0 +cell 45 MUX2X1_3 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n100 layer 1 240 -61 +pin name B signal $abc$733$n101_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<4>_FF_INPUT layer 1 19 500 +cell 46 INVX1_11 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -80 -540 +pin name Y signal $abc$733$n103_1 layer 1 80 0 +cell 47 INVX1_12 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -80 -540 +pin name Y signal $abc$733$n104 layer 1 80 0 +cell 48 MUX2X1_4 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n103_1 layer 1 240 -61 +pin name B signal $abc$733$n104 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<5>_FF_INPUT layer 1 19 500 +cell 49 INVX1_13 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -80 -540 +pin name Y signal $abc$733$n106_1 layer 1 80 0 +cell 50 INVX1_14 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -80 -540 +pin name Y signal $abc$733$n107 layer 1 80 0 +cell 51 MUX2X1_5 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n106_1 layer 1 240 -61 +pin name B signal $abc$733$n107 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<6>_FF_INPUT layer 1 19 500 +cell 52 INVX1_15 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -80 -540 +pin name Y signal $abc$733$n109 layer 1 80 0 +cell 53 INVX1_16 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -80 -540 +pin name Y signal $abc$733$n110_1 layer 1 80 0 +cell 54 MUX2X1_6 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n109 layer 1 240 -61 +pin name B signal $abc$733$n110_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<7>_FF_INPUT layer 1 19 500 +cell 55 INVX1_17 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -80 -540 +pin name Y signal $abc$733$n112 layer 1 80 0 +cell 56 INVX1_18 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -80 -540 +pin name Y signal $abc$733$n113 layer 1 80 0 +cell 57 MUX2X1_7 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n112 layer 1 240 -61 +pin name B signal $abc$733$n113 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<8>_FF_INPUT layer 1 19 500 +cell 58 INVX1_19 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -80 -540 +pin name Y signal $abc$733$n115 layer 1 80 0 +cell 59 NOR2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n116_1 layer 1 0 -300 +cell 60 AOI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n115 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n116_1 layer 1 240 -501 +pin name Y signal dp<0>_FF_INPUT layer 1 80 -680 +cell 61 XNOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<7> layer 1 439 -300 +pin name Y signal $abc$733$n118_1 layer 1 50 -500 +cell 62 NOR2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -540 +pin name B signal $abc$733$n101_1 layer 1 160 -61 +pin name Y signal $abc$733$n119 layer 1 0 -300 +cell 63 NOR2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -540 +pin name B signal $abc$733$n104 layer 1 160 -61 +pin name Y signal $abc$733$n120 layer 1 0 -300 +cell 64 OAI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n119 layer 1 -160 -330 +pin name B signal $abc$733$n120 layer 1 -80 -140 +pin name C signal $abc$733$n118_1 layer 1 160 300 +pin name Y signal $abc$733$n121 layer 1 50 -100 +cell 65 NOR2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -540 +pin name B signal $abc$733$n107 layer 1 160 -61 +pin name Y signal $abc$733$n122 layer 1 0 -300 +cell 66 NOR2X1_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -540 +pin name B signal $abc$733$n113 layer 1 160 -61 +pin name Y signal $abc$733$n123_1 layer 1 0 -300 +cell 67 XNOR2X1_2 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<4> layer 1 439 -300 +pin name Y signal $abc$733$n124 layer 1 50 -500 +cell 68 OAI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n122 layer 1 -160 -330 +pin name B signal $abc$733$n123_1 layer 1 -80 -140 +pin name C signal $abc$733$n124 layer 1 160 300 +pin name Y signal $abc$733$n125 layer 1 50 -100 +cell 69 NAND2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n121 layer 1 -160 -340 +pin name B signal $abc$733$n125 layer 1 160 140 +pin name Y signal $abc$733$n126 layer 1 100 -680 +cell 70 OAI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<3> layer 1 -160 -330 +pin name B signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n127 layer 1 50 -100 +cell 71 AOI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n126 layer 1 -160 -70 +pin name B signal state<3> layer 1 -80 -261 +pin name C signal $abc$733$n127 layer 1 240 -501 +pin name Y signal sr<0>_FF_INPUT layer 1 80 -680 +cell 72 OAI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n129 layer 1 50 -100 +cell 73 AOI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n98_1 layer 1 -80 -261 +pin name C signal $abc$733$n129 layer 1 240 -501 +pin name Y signal sr<2>_FF_INPUT layer 1 80 -680 +cell 74 OAI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n131 layer 1 50 -100 +cell 75 AOI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n101_1 layer 1 -80 -261 +pin name C signal $abc$733$n131 layer 1 240 -501 +pin name Y signal sr<3>_FF_INPUT layer 1 80 -680 +cell 76 OAI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n133_1 layer 1 50 -100 +cell 77 AOI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n104 layer 1 -80 -261 +pin name C signal $abc$733$n133_1 layer 1 240 -501 +pin name Y signal sr<4>_FF_INPUT layer 1 80 -680 +cell 78 OAI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n135_1 layer 1 50 -100 +cell 79 AOI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n107 layer 1 -80 -261 +pin name C signal $abc$733$n135_1 layer 1 240 -501 +pin name Y signal sr<5>_FF_INPUT layer 1 80 -680 +cell 80 OAI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n137 layer 1 50 -100 +cell 81 AOI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n110_1 layer 1 -80 -261 +pin name C signal $abc$733$n137 layer 1 240 -501 +pin name Y signal sr<6>_FF_INPUT layer 1 80 -680 +cell 82 OAI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n139 layer 1 50 -100 +cell 83 AOI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n113 layer 1 -80 -261 +pin name C signal $abc$733$n139 layer 1 240 -501 +pin name Y signal sr<7>_FF_INPUT layer 1 80 -680 +cell 84 INVX1_20 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<1> layer 1 -80 -540 +pin name Y signal $abc$733$n141 layer 1 80 0 +cell 85 NOR2X1_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -540 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 160 -61 +end_pin_group +pin name Y signal $abc$733$n142 layer 1 0 -300 +cell 86 AND2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -240 -261 +end_pin_group +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -80 -100 +pin name Y signal $abc$733$n143 layer 1 179 -680 +cell 87 OAI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n142 layer 1 -160 -330 +pin name B signal $abc$733$n143 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n144 layer 1 50 -100 +cell 88 OAI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf1 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n141 layer 1 -80 -140 +pin name C signal $abc$733$n144 layer 1 160 300 +pin name Y signal counter<0>_FF_INPUT layer 1 50 -100 +cell 89 NOR2X1_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -540 +pin name B signal N<2> layer 1 160 -61 +pin name Y signal $abc$733$n146 layer 1 0 -300 +cell 90 NAND2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -340 +pin name B signal N<2> layer 1 160 140 +pin name Y signal $abc$733$n147 layer 1 100 -680 +cell 91 INVX1_21 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $abc$733$n147 layer 1 -80 -540 +pin name Y signal $abc$733$n148 layer 1 80 0 +cell 92 OAI21X1_14 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n146 layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n149 layer 1 50 -100 +cell 93 AND2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n81 layer 1 -240 -261 +pin name B signal state<3> layer 1 -80 -100 +pin name Y signal $abc$733$n150 layer 1 179 -680 +cell 94 INVX1_22 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -80 -540 +pin name Y signal $abc$733$n151_1 layer 1 80 0 +cell 95 NOR2X1_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n151_1 layer 1 -160 -540 +pin name B signal $abc$733$n142 layer 1 160 -61 +pin name Y signal $abc$733$n152 layer 1 0 -300 +cell 96 OAI21X1_15 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n150 layer 1 -160 -330 +pin name B signal $abc$733$n152 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n153_1 layer 1 50 -100 +cell 97 NAND2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n149 layer 1 -160 -340 +pin name B signal $abc$733$n153_1 layer 1 160 140 +pin name Y signal counter<1>_FF_INPUT layer 1 100 -680 +cell 98 NAND2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<3> layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n155 layer 1 100 -680 +cell 99 XOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $abc$733$n155 layer 1 -410 -290 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 439 -300 +pin name Y signal $abc$733$n156 layer 1 0 -700 +cell 100 INVX1_23 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<3> layer 1 -80 -540 +pin name Y signal $abc$733$n157 layer 1 80 0 +cell 101 NAND2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n157 layer 1 -160 -340 +pin name B signal $abc$733$n147 layer 1 160 140 +pin name Y signal $abc$733$n158_1 layer 1 100 -680 +cell 102 NAND2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -340 +pin name B signal $abc$733$n148 layer 1 160 140 +pin name Y signal $abc$733$n159 layer 1 100 -680 +cell 103 NAND3X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n158_1 layer 1 -40 -100 +pin name C signal $abc$733$n159 layer 1 80 260 +pin name Y signal $abc$733$n160_1 layer 1 -80 680 +cell 104 OAI21X1_16 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n156 layer 1 -80 -140 +pin name C signal $abc$733$n160_1 layer 1 160 300 +pin name Y signal counter<2>_FF_INPUT layer 1 50 -100 +cell 105 OAI21X1_17 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<3> layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal N<4> layer 1 160 300 +pin name Y signal $abc$733$n162_1 layer 1 50 -100 +cell 106 INVX1_24 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<4> layer 1 -80 -540 +pin name Y signal $abc$733$n163_1 layer 1 80 0 +cell 107 NAND3X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n157 layer 1 -240 60 +pin name B signal $abc$733$n163_1 layer 1 -40 -100 +pin name C signal $abc$733$n147 layer 1 80 260 +pin name Y signal $abc$733$n164_1 layer 1 -80 680 +cell 108 NAND2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -340 +pin name B signal $abc$733$n162_1 layer 1 160 140 +pin name Y signal $abc$733$n165 layer 1 100 -680 +cell 109 OR2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -240 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -40 -221 +pin name Y signal $abc$733$n166 layer 1 240 -100 +cell 110 OAI21X1_18 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<3> layer 1 160 300 +pin name Y signal $abc$733$n167 layer 1 50 -100 +cell 111 OAI21X1_19 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n166 layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $abc$733$n167 layer 1 160 300 +pin name Y signal $abc$733$n168 layer 1 50 -100 +cell 112 NAND2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf3 layer 1 -160 -340 +end_pin_group +pin name B signal $abc$733$n168 layer 1 160 140 +pin name Y signal $abc$733$n169 layer 1 100 -680 +cell 113 OAI21X1_20 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf2 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n165 layer 1 -80 -140 +pin name C signal $abc$733$n169 layer 1 160 300 +pin name Y signal counter<3>_FF_INPUT layer 1 50 -100 +cell 114 INVX1_25 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<5> layer 1 -80 -540 +pin name Y signal $abc$733$n171 layer 1 80 0 +cell 115 NOR2X1_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -540 +pin name B signal N<4> layer 1 160 -61 +pin name Y signal $abc$733$n172 layer 1 0 -300 +cell 116 AOI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n172 layer 1 -160 -70 +pin name B signal $abc$733$n147 layer 1 -80 -261 +pin name C signal $abc$733$n171 layer 1 240 -501 +pin name Y signal $abc$733$n173 layer 1 80 -680 +cell 117 OAI21X1_21 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n174 layer 1 50 -100 +cell 118 NOR2X1_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -540 +pin name B signal $abc$733$n166 layer 1 160 -61 +pin name Y signal $abc$733$n175 layer 1 0 -300 +cell 119 NAND2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n150 layer 1 160 140 +pin name Y signal $abc$733$n176 layer 1 100 -680 +cell 120 AOI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n175 layer 1 -240 -70 +pin name B signal $abc$733$n150 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<4> layer 1 320 -61 +pin name D signal $abc$733$n176 layer 1 140 -180 +pin name Y signal $abc$733$n177 layer 1 10 -431 +cell 121 OAI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n173 layer 1 -240 -330 +pin name B signal $abc$733$n174 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n177 layer 1 160 -140 +pin name Y signal counter<4>_FF_INPUT layer 1 0 -300 +cell 122 OAI21X1_22 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal N<6> layer 1 160 300 +pin name Y signal $abc$733$n179 layer 1 50 -100 +cell 123 OR2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -240 -540 +pin name B signal N<6> layer 1 -40 -221 +pin name Y signal $abc$733$n180 layer 1 240 -100 +cell 124 OAI21X1_23 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -330 +pin name B signal $abc$733$n180 layer 1 -80 -140 +pin name C signal $abc$733$n179 layer 1 160 300 +pin name Y signal $abc$733$n181 layer 1 50 -100 +cell 125 NOR2X1_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n155 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n182 layer 1 0 -300 +cell 126 INVX1_26 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -80 -540 +pin name Y signal $abc$733$n183 layer 1 80 0 +cell 127 AOI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n175 layer 1 -160 -70 +pin name B signal $abc$733$n150 layer 1 -80 -261 +pin name C signal $abc$733$n183 layer 1 240 -501 +pin name Y signal $abc$733$n184 layer 1 80 -680 +cell 128 OAI21X1_24 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -160 -330 +pin name B signal $abc$733$n184 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n185 layer 1 50 -100 +cell 129 OAI21X1_25 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf0 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n181 layer 1 -80 -140 +pin name C signal $abc$733$n185 layer 1 160 300 +pin name Y signal counter<5>_FF_INPUT layer 1 50 -100 +cell 130 INVX1_27 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<7> layer 1 -80 -540 +pin name Y signal $abc$733$n187 layer 1 80 0 +cell 131 NOR2X1_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n180 layer 1 -160 -540 +pin name B signal $abc$733$n164_1 layer 1 160 -61 +pin name Y signal $abc$733$n188 layer 1 0 -300 +cell 132 NOR2X1_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n187 layer 1 -160 -540 +pin name B signal $abc$733$n188 layer 1 160 -61 +pin name Y signal $abc$733$n189 layer 1 0 -300 +cell 133 NOR2X1_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<5> layer 1 -160 -540 +pin name B signal N<6> layer 1 160 -61 +pin name Y signal $abc$733$n190 layer 1 0 -300 +cell 134 NAND3X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n147 layer 1 -240 60 +pin name B signal $abc$733$n172 layer 1 -40 -100 +pin name C signal $abc$733$n190 layer 1 80 260 +pin name Y signal $abc$733$n191 layer 1 -80 680 +cell 135 OAI21X1_26 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n192 layer 1 50 -100 +cell 136 INVX1_28 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -80 -540 +pin name Y signal $abc$733$n193 layer 1 80 0 +cell 137 AND2X2_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n77 layer 1 -240 -261 +pin name B signal $abc$733$n78 layer 1 -80 -100 +pin name Y signal $abc$733$n194 layer 1 179 -680 +cell 138 NAND3X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n193 layer 1 -240 60 +pin name B signal $abc$733$n150 layer 1 -40 -100 +pin name C signal $abc$733$n194 layer 1 80 260 +pin name Y signal $abc$733$n195 layer 1 -80 680 +cell 139 OAI21X1_27 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n155 layer 1 -160 -330 +pin name B signal $abc$733$n79 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 300 +pin name Y signal $abc$733$n196 layer 1 50 -100 +cell 140 AND2X2_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n195 layer 1 -240 -261 +pin name B signal $abc$733$n196 layer 1 -80 -100 +pin name Y signal $abc$733$n197 layer 1 179 -680 +cell 141 OAI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n189 layer 1 -240 -330 +pin name B signal $abc$733$n192 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n197 layer 1 160 -140 +pin name Y signal counter<6>_FF_INPUT layer 1 0 -300 +cell 142 OAI21X1_28 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal N<8> layer 1 160 300 +pin name Y signal $abc$733$n199 layer 1 50 -100 +cell 143 INVX1_29 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<8> layer 1 -80 -540 +pin name Y signal $abc$733$n200 layer 1 80 0 +cell 144 NAND3X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n187 layer 1 -240 60 +pin name B signal $abc$733$n200 layer 1 -40 -100 +pin name C signal $abc$733$n188 layer 1 80 260 +pin name Y signal $abc$733$n201 layer 1 -80 680 +cell 145 NAND3X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n199 layer 1 -40 -100 +pin name C signal $abc$733$n201 layer 1 80 260 +pin name Y signal $abc$733$n202 layer 1 -80 680 +cell 146 AOI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -240 -70 +pin name B signal $abc$733$n83_1 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<7> layer 1 320 -61 +pin name D signal $abc$733$n195 layer 1 140 -180 +pin name Y signal $abc$733$n203 layer 1 10 -431 +cell 147 OAI21X1_29 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n203 layer 1 -80 -140 +pin name C signal $abc$733$n202 layer 1 160 300 +pin name Y signal counter<7>_FF_INPUT layer 1 50 -100 +cell 148 INVX1_30 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -80 -540 +pin name Y signal $abc$733$n205 layer 1 80 0 +cell 149 INVX1_31 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<2> layer 1 -80 -540 +pin name Y signal $abc$733$n206 layer 1 80 0 +cell 150 NAND3X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<4> layer 1 -240 60 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -40 -100 +end_pin_group +pin name C signal $abc$733$n206 layer 1 80 260 +pin name Y signal $abc$733$n207 layer 1 -80 680 +cell 151 AOI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n207 layer 1 -160 -70 +pin name B signal $abc$733$n205 layer 1 -80 -261 +pin name C signal state<0> layer 1 240 -501 +pin name Y signal done_FF_INPUT layer 1 80 -680 +cell 152 OAI21X1_30 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf2 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n209 layer 1 50 -100 +cell 153 AOI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf1 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n95_1 layer 1 -80 -261 +pin name C signal $abc$733$n209 layer 1 240 -501 +pin name Y signal sr<1>_FF_INPUT layer 1 80 -680 +cell 154 AND2X2_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n88 layer 1 -240 -261 +pin name B signal state<1> layer 1 -80 -100 +pin name Y signal $abc$546$n149 layer 1 179 -680 +cell 155 AND2X2_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -240 -261 +pin name B signal $abc$733$n80 layer 1 -80 -100 +pin name Y signal $abc$546$n150 layer 1 179 -680 +cell 156 INVX8_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal reset layer 1 -320 -340 +pin name Y signal $abc$733$n164 layer 1 -160 410 +cell 157 BUFX2_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -140 +pin name Y signal counter<0> layer 1 170 0 +cell 158 BUFX2_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -140 +pin name Y signal counter<1> layer 1 170 0 +cell 159 BUFX2_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -140 +pin name Y signal counter<2> layer 1 170 0 +cell 160 BUFX2_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -140 +pin name Y signal counter<3> layer 1 170 0 +cell 161 BUFX2_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -140 +pin name Y signal counter<4> layer 1 170 0 +cell 162 BUFX2_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -140 +pin name Y signal counter<5> layer 1 170 0 +cell 163 BUFX2_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -160 -140 +pin name Y signal counter<6> layer 1 170 0 +cell 164 BUFX2_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -140 +pin name Y signal counter<7> layer 1 170 0 +cell 165 BUFX2_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -160 -140 +pin name Y signal done layer 1 170 0 +cell 166 BUFX2_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -160 -140 +pin name Y signal dp<0> layer 1 170 0 +cell 167 BUFX2_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -160 -140 +pin name Y signal dp<1> layer 1 170 0 +cell 168 BUFX2_22 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -160 -140 +pin name Y signal dp<2> layer 1 170 0 +cell 169 BUFX2_23 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -160 -140 +pin name Y signal dp<3> layer 1 170 0 +cell 170 BUFX2_24 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -160 -140 +pin name Y signal dp<4> layer 1 170 0 +cell 171 BUFX2_25 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -160 -140 +pin name Y signal dp<5> layer 1 170 0 +cell 172 BUFX2_26 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -160 -140 +pin name Y signal dp<6> layer 1 170 0 +cell 173 BUFX2_27 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -160 -140 +pin name Y signal dp<7> layer 1 170 0 +cell 174 BUFX2_28 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -160 -140 +pin name Y signal dp<8> layer 1 170 0 +cell 175 BUFX2_29 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -140 +pin name Y signal sr<0> layer 1 170 0 +cell 176 BUFX2_30 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -140 +pin name Y signal sr<1> layer 1 170 0 +cell 177 BUFX2_31 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -140 +pin name Y signal sr<2> layer 1 170 0 +cell 178 BUFX2_32 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -140 +pin name Y signal sr<3> layer 1 170 0 +cell 179 BUFX2_33 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -140 +pin name Y signal sr<4> layer 1 170 0 +cell 180 BUFX2_34 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -140 +pin name Y signal sr<5> layer 1 170 0 +cell 181 BUFX2_35 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -140 +pin name Y signal sr<6> layer 1 170 0 +cell 182 BUFX2_36 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -140 +pin name Y signal sr<7> layer 1 170 0 +cell 183 DFFSR_1 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n149 layer 1 -400 -340 +pin name Q signal state<0> layer 1 1520 449 +pin name R signal vdd layer 1 -1040 -90 +pin_group +pin name $abc$733$n164_bF$pin/S signal $abc$733$n164_bF$buf4 layer 1 -1020 59 +end_pin_group +cell 184 DFFSR_2 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n5 layer 1 -400 -340 +pin name Q signal state<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 185 DFFSR_3 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n150 layer 1 -400 -340 +pin name Q signal state<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 186 DFFSR_4 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n2 layer 1 -400 -340 +pin name Q signal state<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 187 DFFSR_5 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal state<2> layer 1 -400 -340 +pin name Q signal state<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 188 DFFSR_6 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 189 DFFSR_7 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 190 DFFSR_8 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 191 DFFSR_9 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 192 DFFSR_10 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal dp<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 193 DFFSR_11 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 194 DFFSR_12 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 195 DFFSR_13 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 196 DFFSR_14 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<8>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<8> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 197 DFFSR_15 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal done_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$882 layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 198 DFFSR_16 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 199 DFFSR_17 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 200 DFFSR_18 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 201 DFFSR_19 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal counter<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 202 DFFSR_20 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal counter<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 203 DFFSR_21 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 204 DFFSR_22 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 205 DFFSR_23 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 206 DFFSR_24 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 207 DFFSR_25 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 208 DFFSR_26 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 209 DFFSR_27 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal sr<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 210 DFFSR_28 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal sr<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 211 DFFSR_29 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 212 DFFSR_30 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 213 DFFSR_31 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 214 DFFSR_32 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal start layer 1 -400 -340 +pin name Q signal startbuf layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 + +pad 2 name twpin_clock +corners 4 +-440 8280 -440 8440 -240 8440 -240 8280 +orient 7 +pin name clock signal clock layer 1 -340 8360 + +pad 3 name twpin_reset +corners 4 +-440 5860 -440 6020 -240 6020 -240 5860 +orient 7 +pin name reset signal reset layer 1 -340 5940 + +pad 4 name twpin_start +corners 4 +-440 8060 -440 8220 -240 8220 -240 8060 +orient 7 +pin name start signal start layer 1 -340 8140 + +pad 5 name twpin_N<0> +corners 4 +-440 7840 -440 8000 -240 8000 -240 7840 +orient 7 +pin name N<0> signal N<0> layer 1 -340 7920 + +pad 6 name twpin_N<1> +corners 4 +-440 7620 -440 7780 -240 7780 -240 7620 +orient 7 +pin name N<1> signal N<1> layer 1 -340 7700 + +pad 7 name twpin_N<2> +corners 4 +-440 7400 -440 7560 -240 7560 -240 7400 +orient 7 +pin name N<2> signal N<2> layer 1 -340 7480 + +pad 8 name twpin_N<3> +corners 4 +-440 7180 -440 7340 -240 7340 -240 7180 +orient 7 +pin name N<3> signal N<3> layer 1 -340 7260 + +pad 9 name twpin_N<4> +corners 4 +-440 6960 -440 7120 -240 7120 -240 6960 +orient 7 +pin name N<4> signal N<4> layer 1 -340 7040 + +pad 10 name twpin_N<5> +corners 4 +-440 6740 -440 6900 -240 6900 -240 6740 +orient 7 +pin name N<5> signal N<5> layer 1 -340 6820 + +pad 11 name twpin_N<6> +corners 4 +-440 6520 -440 6680 -240 6680 -240 6520 +orient 7 +pin name N<6> signal N<6> layer 1 -340 6600 + +pad 12 name twpin_N<7> +corners 4 +-440 6300 -440 6460 -240 6460 -240 6300 +orient 7 +pin name N<7> signal N<7> layer 1 -340 6380 + +pad 13 name twpin_N<8> +corners 4 +-440 6080 -440 6240 -240 6240 -240 6080 +orient 7 +pin name N<8> signal N<8> layer 1 -340 6160 + +pad 14 name twpin_dp<0> +corners 4 +-440 3660 -440 3820 -240 3820 -240 3660 +orient 7 +pin name dp<0> signal dp<0> layer 1 -340 3740 + +pad 15 name twpin_dp<1> +corners 4 +-440 3440 -440 3600 -240 3600 -240 3440 +orient 7 +pin name dp<1> signal dp<1> layer 1 -340 3520 + +pad 16 name twpin_dp<2> +corners 4 +-440 3220 -440 3380 -240 3380 -240 3220 +orient 7 +pin name dp<2> signal dp<2> layer 1 -340 3300 + +pad 17 name twpin_dp<3> +corners 4 +-440 3000 -440 3160 -240 3160 -240 3000 +orient 7 +pin name dp<3> signal dp<3> layer 1 -340 3080 + +pad 18 name twpin_dp<4> +corners 4 +-440 2780 -440 2940 -240 2940 -240 2780 +orient 7 +pin name dp<4> signal dp<4> layer 1 -340 2860 + +pad 19 name twpin_dp<5> +corners 4 +-440 2560 -440 2720 -240 2720 -240 2560 +orient 7 +pin name dp<5> signal dp<5> layer 1 -340 2640 + +pad 20 name twpin_dp<6> +corners 4 +-440 2340 -440 2500 -240 2500 -240 2340 +orient 7 +pin name dp<6> signal dp<6> layer 1 -340 2420 + +pad 21 name twpin_dp<7> +corners 4 +-440 2120 -440 2280 -240 2280 -240 2120 +orient 7 +pin name dp<7> signal dp<7> layer 1 -340 2200 + +pad 22 name twpin_dp<8> +corners 4 +-440 1900 -440 2060 -240 2060 -240 1900 +orient 7 +pin name dp<8> signal dp<8> layer 1 -340 1980 + +pad 23 name twpin_done +corners 4 +-440 3880 -440 4040 -240 4040 -240 3880 +orient 7 +pin name done signal done layer 1 -340 3960 + +pad 24 name twpin_counter<0> +corners 4 +-440 5640 -440 5800 -240 5800 -240 5640 +orient 7 +pin name counter<0> signal counter<0> layer 1 -340 5720 + +pad 25 name twpin_counter<1> +corners 4 +-440 5420 -440 5580 -240 5580 -240 5420 +orient 7 +pin name counter<1> signal counter<1> layer 1 -340 5500 + +pad 26 name twpin_counter<2> +corners 4 +-440 5200 -440 5360 -240 5360 -240 5200 +orient 7 +pin name counter<2> signal counter<2> layer 1 -340 5280 + +pad 27 name twpin_counter<3> +corners 4 +-440 4980 -440 5140 -240 5140 -240 4980 +orient 7 +pin name counter<3> signal counter<3> layer 1 -340 5060 + +pad 28 name twpin_counter<4> +corners 4 +-440 4760 -440 4920 -240 4920 -240 4760 +orient 7 +pin name counter<4> signal counter<4> layer 1 -340 4840 + +pad 29 name twpin_counter<5> +corners 4 +-440 4540 -440 4700 -240 4700 -240 4540 +orient 7 +pin name counter<5> signal counter<5> layer 1 -340 4620 + +pad 30 name twpin_counter<6> +corners 4 +-440 4320 -440 4480 -240 4480 -240 4320 +orient 7 +pin name counter<6> signal counter<6> layer 1 -340 4400 + +pad 31 name twpin_counter<7> +corners 4 +-440 4100 -440 4260 -240 4260 -240 4100 +orient 7 +pin name counter<7> signal counter<7> layer 1 -340 4180 + +pad 32 name twpin_sr<0> +corners 4 +-440 1680 -440 1840 -240 1840 -240 1680 +orient 7 +pin name sr<0> signal sr<0> layer 1 -340 1760 + +pad 33 name twpin_sr<1> +corners 4 +-440 1460 -440 1620 -240 1620 -240 1460 +orient 7 +pin name sr<1> signal sr<1> layer 1 -340 1540 + +pad 34 name twpin_sr<2> +corners 4 +-440 1240 -440 1400 -240 1400 -240 1240 +orient 7 +pin name sr<2> signal sr<2> layer 1 -340 1320 + +pad 35 name twpin_sr<3> +corners 4 +-440 1020 -440 1180 -240 1180 -240 1020 +orient 7 +pin name sr<3> signal sr<3> layer 1 -340 1100 + +pad 36 name twpin_sr<4> +corners 4 +-440 800 -440 960 -240 960 -240 800 +orient 7 +pin name sr<4> signal sr<4> layer 1 -340 880 + +pad 37 name twpin_sr<5> +corners 4 +-440 580 -440 740 -240 740 -240 580 +orient 7 +pin name sr<5> signal sr<5> layer 1 -340 660 + +pad 38 name twpin_sr<6> +corners 4 +-440 360 -440 520 -240 520 -240 360 +orient 7 +pin name sr<6> signal sr<6> layer 1 -340 440 + +pad 39 name twpin_sr<7> +corners 4 +-440 140 -440 300 -240 300 -240 140 +orient 7 +pin name sr<7> signal sr<7> layer 1 -340 220 diff -Nru graywolf-0.1.5/tests/twmc/map9v3/map9v3.cel graywolf-0.1.6/tests/twmc/map9v3/map9v3.cel --- graywolf-0.1.5/tests/twmc/map9v3/map9v3.cel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/map9v3.cel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,4148 @@ +cell 0 BUFX4_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf3 layer 1 89 -300 +cell 1 BUFX4_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf2 layer 1 89 -300 +cell 2 BUFX4_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf1 layer 1 89 -300 +cell 3 BUFX2_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n76 layer 1 -160 -140 +pin name Y signal $abc$733$n76_bF$buf0 layer 1 170 0 +cell 4 BUFX4_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf4 layer 1 89 -300 +cell 5 BUFX4_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf3 layer 1 89 -300 +cell 6 BUFX4_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf2 layer 1 89 -300 +cell 7 BUFX4_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf1 layer 1 89 -300 +cell 8 BUFX4_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf0 layer 1 89 -300 +cell 9 BUFX2_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf4 layer 1 170 0 +cell 10 BUFX2_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf3 layer 1 170 0 +cell 11 BUFX2_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf2 layer 1 170 0 +cell 12 BUFX2_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf1 layer 1 170 0 +cell 13 BUFX2_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf0 layer 1 170 0 +cell 14 BUFX2_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf3 layer 1 170 0 +cell 15 BUFX2_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf2 layer 1 170 0 +cell 16 BUFX2_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf1 layer 1 170 0 +cell 17 BUFX2_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf0 layer 1 170 0 +cell 18 INVX4_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<0> layer 1 -160 -340 +pin name Y signal $abc$733$n75_1 layer 1 0 0 +cell 19 INVX8_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -320 -340 +pin name Y signal $abc$733$n76 layer 1 -160 410 +cell 20 NOR2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 160 -61 +pin name Y signal $abc$733$n77 layer 1 0 -300 +cell 21 NOR2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<4> layer 1 160 -61 +pin name Y signal $abc$733$n78 layer 1 0 -300 +cell 22 NAND2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n78 layer 1 160 140 +pin name Y signal $abc$733$n79 layer 1 100 -680 +cell 23 NOR2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 -61 +pin name Y signal $abc$733$n80 layer 1 0 -300 +cell 24 NOR2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 160 -61 +pin name Y signal $abc$733$n81 layer 1 0 -300 +cell 25 NAND2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n80 layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n82 layer 1 100 -680 +cell 26 NOR2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n82 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n83_1 layer 1 0 -300 +cell 27 OAI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf3 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n83_1 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$546$n2 layer 1 50 -100 +cell 28 INVX1_1 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<4> layer 1 -80 -540 +pin name Y signal $abc$733$n85_1 layer 1 80 0 +cell 29 INVX1_2 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<1> layer 1 -80 -540 +pin name Y signal $abc$733$n86 layer 1 80 0 +cell 30 INVX1_3 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal start layer 1 -80 -540 +pin name Y signal $abc$733$n87_1 layer 1 80 0 +cell 31 NOR2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal startbuf layer 1 -160 -540 +pin name B signal $abc$733$n87_1 layer 1 160 -61 +pin name Y signal $abc$733$n88 layer 1 0 -300 +cell 32 OAI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n86 layer 1 -160 -330 +pin name B signal $abc$733$n88 layer 1 -80 -140 +pin name C signal $abc$733$n85_1 layer 1 160 300 +pin name Y signal $abc$546$n5 layer 1 50 -100 +cell 33 INVX1_4 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -80 -540 +pin name Y signal $abc$733$n90 layer 1 80 0 +cell 34 NAND3X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<2> layer 1 -240 60 +pin_group +pin name $abc$733$n75_1_bF$pin/B signal $abc$733$n75_1_bF$buf2 layer 1 -40 -100 +end_pin_group +pin_group +pin name $abc$733$n76_bF$pin/C signal $abc$733$n76_bF$buf2 layer 1 80 260 +end_pin_group +pin name Y signal $abc$733$n91_1 layer 1 -80 680 +cell 35 NOR2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n92 layer 1 0 -300 +cell 36 AOI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n90 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n92 layer 1 240 -501 +pin name Y signal dp<1>_FF_INPUT layer 1 80 -680 +cell 37 INVX1_5 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -80 -540 +pin name Y signal $abc$733$n94 layer 1 80 0 +cell 38 INVX1_6 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -80 -540 +pin name Y signal $abc$733$n95_1 layer 1 80 0 +cell 39 MUX2X1_1 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n94 layer 1 240 -61 +pin name B signal $abc$733$n95_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<2>_FF_INPUT layer 1 19 500 +cell 40 INVX1_7 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -80 -540 +pin name Y signal $abc$733$n97_1 layer 1 80 0 +cell 41 INVX1_8 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -80 -540 +pin name Y signal $abc$733$n98_1 layer 1 80 0 +cell 42 MUX2X1_2 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n97_1 layer 1 240 -61 +pin name B signal $abc$733$n98_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<3>_FF_INPUT layer 1 19 500 +cell 43 INVX1_9 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -80 -540 +pin name Y signal $abc$733$n100 layer 1 80 0 +cell 44 INVX1_10 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -80 -540 +pin name Y signal $abc$733$n101_1 layer 1 80 0 +cell 45 MUX2X1_3 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n100 layer 1 240 -61 +pin name B signal $abc$733$n101_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<4>_FF_INPUT layer 1 19 500 +cell 46 INVX1_11 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -80 -540 +pin name Y signal $abc$733$n103_1 layer 1 80 0 +cell 47 INVX1_12 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -80 -540 +pin name Y signal $abc$733$n104 layer 1 80 0 +cell 48 MUX2X1_4 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n103_1 layer 1 240 -61 +pin name B signal $abc$733$n104 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<5>_FF_INPUT layer 1 19 500 +cell 49 INVX1_13 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -80 -540 +pin name Y signal $abc$733$n106_1 layer 1 80 0 +cell 50 INVX1_14 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -80 -540 +pin name Y signal $abc$733$n107 layer 1 80 0 +cell 51 MUX2X1_5 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n106_1 layer 1 240 -61 +pin name B signal $abc$733$n107 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<6>_FF_INPUT layer 1 19 500 +cell 52 INVX1_15 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -80 -540 +pin name Y signal $abc$733$n109 layer 1 80 0 +cell 53 INVX1_16 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -80 -540 +pin name Y signal $abc$733$n110_1 layer 1 80 0 +cell 54 MUX2X1_6 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n109 layer 1 240 -61 +pin name B signal $abc$733$n110_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<7>_FF_INPUT layer 1 19 500 +cell 55 INVX1_17 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -80 -540 +pin name Y signal $abc$733$n112 layer 1 80 0 +cell 56 INVX1_18 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -80 -540 +pin name Y signal $abc$733$n113 layer 1 80 0 +cell 57 MUX2X1_7 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n112 layer 1 240 -61 +pin name B signal $abc$733$n113 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<8>_FF_INPUT layer 1 19 500 +cell 58 INVX1_19 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -80 -540 +pin name Y signal $abc$733$n115 layer 1 80 0 +cell 59 NOR2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n116_1 layer 1 0 -300 +cell 60 AOI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n115 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n116_1 layer 1 240 -501 +pin name Y signal dp<0>_FF_INPUT layer 1 80 -680 +cell 61 XNOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<7> layer 1 439 -300 +pin name Y signal $abc$733$n118_1 layer 1 50 -500 +cell 62 NOR2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -540 +pin name B signal $abc$733$n101_1 layer 1 160 -61 +pin name Y signal $abc$733$n119 layer 1 0 -300 +cell 63 NOR2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -540 +pin name B signal $abc$733$n104 layer 1 160 -61 +pin name Y signal $abc$733$n120 layer 1 0 -300 +cell 64 OAI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n119 layer 1 -160 -330 +pin name B signal $abc$733$n120 layer 1 -80 -140 +pin name C signal $abc$733$n118_1 layer 1 160 300 +pin name Y signal $abc$733$n121 layer 1 50 -100 +cell 65 NOR2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -540 +pin name B signal $abc$733$n107 layer 1 160 -61 +pin name Y signal $abc$733$n122 layer 1 0 -300 +cell 66 NOR2X1_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -540 +pin name B signal $abc$733$n113 layer 1 160 -61 +pin name Y signal $abc$733$n123_1 layer 1 0 -300 +cell 67 XNOR2X1_2 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<4> layer 1 439 -300 +pin name Y signal $abc$733$n124 layer 1 50 -500 +cell 68 OAI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n122 layer 1 -160 -330 +pin name B signal $abc$733$n123_1 layer 1 -80 -140 +pin name C signal $abc$733$n124 layer 1 160 300 +pin name Y signal $abc$733$n125 layer 1 50 -100 +cell 69 NAND2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n121 layer 1 -160 -340 +pin name B signal $abc$733$n125 layer 1 160 140 +pin name Y signal $abc$733$n126 layer 1 100 -680 +cell 70 OAI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<3> layer 1 -160 -330 +pin name B signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n127 layer 1 50 -100 +cell 71 AOI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n126 layer 1 -160 -70 +pin name B signal state<3> layer 1 -80 -261 +pin name C signal $abc$733$n127 layer 1 240 -501 +pin name Y signal sr<0>_FF_INPUT layer 1 80 -680 +cell 72 OAI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n129 layer 1 50 -100 +cell 73 AOI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n98_1 layer 1 -80 -261 +pin name C signal $abc$733$n129 layer 1 240 -501 +pin name Y signal sr<2>_FF_INPUT layer 1 80 -680 +cell 74 OAI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n131 layer 1 50 -100 +cell 75 AOI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n101_1 layer 1 -80 -261 +pin name C signal $abc$733$n131 layer 1 240 -501 +pin name Y signal sr<3>_FF_INPUT layer 1 80 -680 +cell 76 OAI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n133_1 layer 1 50 -100 +cell 77 AOI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n104 layer 1 -80 -261 +pin name C signal $abc$733$n133_1 layer 1 240 -501 +pin name Y signal sr<4>_FF_INPUT layer 1 80 -680 +cell 78 OAI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n135_1 layer 1 50 -100 +cell 79 AOI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n107 layer 1 -80 -261 +pin name C signal $abc$733$n135_1 layer 1 240 -501 +pin name Y signal sr<5>_FF_INPUT layer 1 80 -680 +cell 80 OAI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n137 layer 1 50 -100 +cell 81 AOI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n110_1 layer 1 -80 -261 +pin name C signal $abc$733$n137 layer 1 240 -501 +pin name Y signal sr<6>_FF_INPUT layer 1 80 -680 +cell 82 OAI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n139 layer 1 50 -100 +cell 83 AOI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n113 layer 1 -80 -261 +pin name C signal $abc$733$n139 layer 1 240 -501 +pin name Y signal sr<7>_FF_INPUT layer 1 80 -680 +cell 84 INVX1_20 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<1> layer 1 -80 -540 +pin name Y signal $abc$733$n141 layer 1 80 0 +cell 85 NOR2X1_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -540 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 160 -61 +end_pin_group +pin name Y signal $abc$733$n142 layer 1 0 -300 +cell 86 AND2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -240 -261 +end_pin_group +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -80 -100 +pin name Y signal $abc$733$n143 layer 1 179 -680 +cell 87 OAI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n142 layer 1 -160 -330 +pin name B signal $abc$733$n143 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n144 layer 1 50 -100 +cell 88 OAI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf1 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n141 layer 1 -80 -140 +pin name C signal $abc$733$n144 layer 1 160 300 +pin name Y signal counter<0>_FF_INPUT layer 1 50 -100 +cell 89 NOR2X1_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -540 +pin name B signal N<2> layer 1 160 -61 +pin name Y signal $abc$733$n146 layer 1 0 -300 +cell 90 NAND2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -340 +pin name B signal N<2> layer 1 160 140 +pin name Y signal $abc$733$n147 layer 1 100 -680 +cell 91 INVX1_21 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $abc$733$n147 layer 1 -80 -540 +pin name Y signal $abc$733$n148 layer 1 80 0 +cell 92 OAI21X1_14 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n146 layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n149 layer 1 50 -100 +cell 93 AND2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n81 layer 1 -240 -261 +pin name B signal state<3> layer 1 -80 -100 +pin name Y signal $abc$733$n150 layer 1 179 -680 +cell 94 INVX1_22 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -80 -540 +pin name Y signal $abc$733$n151_1 layer 1 80 0 +cell 95 NOR2X1_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n151_1 layer 1 -160 -540 +pin name B signal $abc$733$n142 layer 1 160 -61 +pin name Y signal $abc$733$n152 layer 1 0 -300 +cell 96 OAI21X1_15 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n150 layer 1 -160 -330 +pin name B signal $abc$733$n152 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n153_1 layer 1 50 -100 +cell 97 NAND2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n149 layer 1 -160 -340 +pin name B signal $abc$733$n153_1 layer 1 160 140 +pin name Y signal counter<1>_FF_INPUT layer 1 100 -680 +cell 98 NAND2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<3> layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n155 layer 1 100 -680 +cell 99 XOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $abc$733$n155 layer 1 -410 -290 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 439 -300 +pin name Y signal $abc$733$n156 layer 1 0 -700 +cell 100 INVX1_23 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<3> layer 1 -80 -540 +pin name Y signal $abc$733$n157 layer 1 80 0 +cell 101 NAND2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n157 layer 1 -160 -340 +pin name B signal $abc$733$n147 layer 1 160 140 +pin name Y signal $abc$733$n158_1 layer 1 100 -680 +cell 102 NAND2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -340 +pin name B signal $abc$733$n148 layer 1 160 140 +pin name Y signal $abc$733$n159 layer 1 100 -680 +cell 103 NAND3X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n158_1 layer 1 -40 -100 +pin name C signal $abc$733$n159 layer 1 80 260 +pin name Y signal $abc$733$n160_1 layer 1 -80 680 +cell 104 OAI21X1_16 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n156 layer 1 -80 -140 +pin name C signal $abc$733$n160_1 layer 1 160 300 +pin name Y signal counter<2>_FF_INPUT layer 1 50 -100 +cell 105 OAI21X1_17 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<3> layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal N<4> layer 1 160 300 +pin name Y signal $abc$733$n162_1 layer 1 50 -100 +cell 106 INVX1_24 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<4> layer 1 -80 -540 +pin name Y signal $abc$733$n163_1 layer 1 80 0 +cell 107 NAND3X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n157 layer 1 -240 60 +pin name B signal $abc$733$n163_1 layer 1 -40 -100 +pin name C signal $abc$733$n147 layer 1 80 260 +pin name Y signal $abc$733$n164_1 layer 1 -80 680 +cell 108 NAND2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -340 +pin name B signal $abc$733$n162_1 layer 1 160 140 +pin name Y signal $abc$733$n165 layer 1 100 -680 +cell 109 OR2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -240 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -40 -221 +pin name Y signal $abc$733$n166 layer 1 240 -100 +cell 110 OAI21X1_18 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<3> layer 1 160 300 +pin name Y signal $abc$733$n167 layer 1 50 -100 +cell 111 OAI21X1_19 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n166 layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $abc$733$n167 layer 1 160 300 +pin name Y signal $abc$733$n168 layer 1 50 -100 +cell 112 NAND2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf3 layer 1 -160 -340 +end_pin_group +pin name B signal $abc$733$n168 layer 1 160 140 +pin name Y signal $abc$733$n169 layer 1 100 -680 +cell 113 OAI21X1_20 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf2 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n165 layer 1 -80 -140 +pin name C signal $abc$733$n169 layer 1 160 300 +pin name Y signal counter<3>_FF_INPUT layer 1 50 -100 +cell 114 INVX1_25 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<5> layer 1 -80 -540 +pin name Y signal $abc$733$n171 layer 1 80 0 +cell 115 NOR2X1_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -540 +pin name B signal N<4> layer 1 160 -61 +pin name Y signal $abc$733$n172 layer 1 0 -300 +cell 116 AOI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n172 layer 1 -160 -70 +pin name B signal $abc$733$n147 layer 1 -80 -261 +pin name C signal $abc$733$n171 layer 1 240 -501 +pin name Y signal $abc$733$n173 layer 1 80 -680 +cell 117 OAI21X1_21 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n174 layer 1 50 -100 +cell 118 NOR2X1_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -540 +pin name B signal $abc$733$n166 layer 1 160 -61 +pin name Y signal $abc$733$n175 layer 1 0 -300 +cell 119 NAND2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n150 layer 1 160 140 +pin name Y signal $abc$733$n176 layer 1 100 -680 +cell 120 AOI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n175 layer 1 -240 -70 +pin name B signal $abc$733$n150 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<4> layer 1 320 -61 +pin name D signal $abc$733$n176 layer 1 140 -180 +pin name Y signal $abc$733$n177 layer 1 10 -431 +cell 121 OAI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n173 layer 1 -240 -330 +pin name B signal $abc$733$n174 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n177 layer 1 160 -140 +pin name Y signal counter<4>_FF_INPUT layer 1 0 -300 +cell 122 OAI21X1_22 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal N<6> layer 1 160 300 +pin name Y signal $abc$733$n179 layer 1 50 -100 +cell 123 OR2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -240 -540 +pin name B signal N<6> layer 1 -40 -221 +pin name Y signal $abc$733$n180 layer 1 240 -100 +cell 124 OAI21X1_23 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -330 +pin name B signal $abc$733$n180 layer 1 -80 -140 +pin name C signal $abc$733$n179 layer 1 160 300 +pin name Y signal $abc$733$n181 layer 1 50 -100 +cell 125 NOR2X1_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n155 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n182 layer 1 0 -300 +cell 126 INVX1_26 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -80 -540 +pin name Y signal $abc$733$n183 layer 1 80 0 +cell 127 AOI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n175 layer 1 -160 -70 +pin name B signal $abc$733$n150 layer 1 -80 -261 +pin name C signal $abc$733$n183 layer 1 240 -501 +pin name Y signal $abc$733$n184 layer 1 80 -680 +cell 128 OAI21X1_24 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -160 -330 +pin name B signal $abc$733$n184 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n185 layer 1 50 -100 +cell 129 OAI21X1_25 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf0 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n181 layer 1 -80 -140 +pin name C signal $abc$733$n185 layer 1 160 300 +pin name Y signal counter<5>_FF_INPUT layer 1 50 -100 +cell 130 INVX1_27 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<7> layer 1 -80 -540 +pin name Y signal $abc$733$n187 layer 1 80 0 +cell 131 NOR2X1_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n180 layer 1 -160 -540 +pin name B signal $abc$733$n164_1 layer 1 160 -61 +pin name Y signal $abc$733$n188 layer 1 0 -300 +cell 132 NOR2X1_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n187 layer 1 -160 -540 +pin name B signal $abc$733$n188 layer 1 160 -61 +pin name Y signal $abc$733$n189 layer 1 0 -300 +cell 133 NOR2X1_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<5> layer 1 -160 -540 +pin name B signal N<6> layer 1 160 -61 +pin name Y signal $abc$733$n190 layer 1 0 -300 +cell 134 NAND3X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n147 layer 1 -240 60 +pin name B signal $abc$733$n172 layer 1 -40 -100 +pin name C signal $abc$733$n190 layer 1 80 260 +pin name Y signal $abc$733$n191 layer 1 -80 680 +cell 135 OAI21X1_26 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n192 layer 1 50 -100 +cell 136 INVX1_28 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -80 -540 +pin name Y signal $abc$733$n193 layer 1 80 0 +cell 137 AND2X2_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n77 layer 1 -240 -261 +pin name B signal $abc$733$n78 layer 1 -80 -100 +pin name Y signal $abc$733$n194 layer 1 179 -680 +cell 138 NAND3X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n193 layer 1 -240 60 +pin name B signal $abc$733$n150 layer 1 -40 -100 +pin name C signal $abc$733$n194 layer 1 80 260 +pin name Y signal $abc$733$n195 layer 1 -80 680 +cell 139 OAI21X1_27 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n155 layer 1 -160 -330 +pin name B signal $abc$733$n79 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 300 +pin name Y signal $abc$733$n196 layer 1 50 -100 +cell 140 AND2X2_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n195 layer 1 -240 -261 +pin name B signal $abc$733$n196 layer 1 -80 -100 +pin name Y signal $abc$733$n197 layer 1 179 -680 +cell 141 OAI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n189 layer 1 -240 -330 +pin name B signal $abc$733$n192 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n197 layer 1 160 -140 +pin name Y signal counter<6>_FF_INPUT layer 1 0 -300 +cell 142 OAI21X1_28 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal N<8> layer 1 160 300 +pin name Y signal $abc$733$n199 layer 1 50 -100 +cell 143 INVX1_29 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<8> layer 1 -80 -540 +pin name Y signal $abc$733$n200 layer 1 80 0 +cell 144 NAND3X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n187 layer 1 -240 60 +pin name B signal $abc$733$n200 layer 1 -40 -100 +pin name C signal $abc$733$n188 layer 1 80 260 +pin name Y signal $abc$733$n201 layer 1 -80 680 +cell 145 NAND3X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n199 layer 1 -40 -100 +pin name C signal $abc$733$n201 layer 1 80 260 +pin name Y signal $abc$733$n202 layer 1 -80 680 +cell 146 AOI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -240 -70 +pin name B signal $abc$733$n83_1 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<7> layer 1 320 -61 +pin name D signal $abc$733$n195 layer 1 140 -180 +pin name Y signal $abc$733$n203 layer 1 10 -431 +cell 147 OAI21X1_29 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n203 layer 1 -80 -140 +pin name C signal $abc$733$n202 layer 1 160 300 +pin name Y signal counter<7>_FF_INPUT layer 1 50 -100 +cell 148 INVX1_30 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -80 -540 +pin name Y signal $abc$733$n205 layer 1 80 0 +cell 149 INVX1_31 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<2> layer 1 -80 -540 +pin name Y signal $abc$733$n206 layer 1 80 0 +cell 150 NAND3X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<4> layer 1 -240 60 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -40 -100 +end_pin_group +pin name C signal $abc$733$n206 layer 1 80 260 +pin name Y signal $abc$733$n207 layer 1 -80 680 +cell 151 AOI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n207 layer 1 -160 -70 +pin name B signal $abc$733$n205 layer 1 -80 -261 +pin name C signal state<0> layer 1 240 -501 +pin name Y signal done_FF_INPUT layer 1 80 -680 +cell 152 OAI21X1_30 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf2 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n209 layer 1 50 -100 +cell 153 AOI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf1 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n95_1 layer 1 -80 -261 +pin name C signal $abc$733$n209 layer 1 240 -501 +pin name Y signal sr<1>_FF_INPUT layer 1 80 -680 +cell 154 AND2X2_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n88 layer 1 -240 -261 +pin name B signal state<1> layer 1 -80 -100 +pin name Y signal $abc$546$n149 layer 1 179 -680 +cell 155 AND2X2_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -240 -261 +pin name B signal $abc$733$n80 layer 1 -80 -100 +pin name Y signal $abc$546$n150 layer 1 179 -680 +cell 156 INVX8_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal reset layer 1 -320 -340 +pin name Y signal $abc$733$n164 layer 1 -160 410 +cell 157 BUFX2_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -140 +pin name Y signal counter<0> layer 1 170 0 +cell 158 BUFX2_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -140 +pin name Y signal counter<1> layer 1 170 0 +cell 159 BUFX2_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -140 +pin name Y signal counter<2> layer 1 170 0 +cell 160 BUFX2_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -140 +pin name Y signal counter<3> layer 1 170 0 +cell 161 BUFX2_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -140 +pin name Y signal counter<4> layer 1 170 0 +cell 162 BUFX2_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -140 +pin name Y signal counter<5> layer 1 170 0 +cell 163 BUFX2_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -160 -140 +pin name Y signal counter<6> layer 1 170 0 +cell 164 BUFX2_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -140 +pin name Y signal counter<7> layer 1 170 0 +cell 165 BUFX2_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -160 -140 +pin name Y signal done layer 1 170 0 +cell 166 BUFX2_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -160 -140 +pin name Y signal dp<0> layer 1 170 0 +cell 167 BUFX2_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -160 -140 +pin name Y signal dp<1> layer 1 170 0 +cell 168 BUFX2_22 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -160 -140 +pin name Y signal dp<2> layer 1 170 0 +cell 169 BUFX2_23 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -160 -140 +pin name Y signal dp<3> layer 1 170 0 +cell 170 BUFX2_24 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -160 -140 +pin name Y signal dp<4> layer 1 170 0 +cell 171 BUFX2_25 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -160 -140 +pin name Y signal dp<5> layer 1 170 0 +cell 172 BUFX2_26 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -160 -140 +pin name Y signal dp<6> layer 1 170 0 +cell 173 BUFX2_27 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -160 -140 +pin name Y signal dp<7> layer 1 170 0 +cell 174 BUFX2_28 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -160 -140 +pin name Y signal dp<8> layer 1 170 0 +cell 175 BUFX2_29 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -140 +pin name Y signal sr<0> layer 1 170 0 +cell 176 BUFX2_30 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -140 +pin name Y signal sr<1> layer 1 170 0 +cell 177 BUFX2_31 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -140 +pin name Y signal sr<2> layer 1 170 0 +cell 178 BUFX2_32 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -140 +pin name Y signal sr<3> layer 1 170 0 +cell 179 BUFX2_33 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -140 +pin name Y signal sr<4> layer 1 170 0 +cell 180 BUFX2_34 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -140 +pin name Y signal sr<5> layer 1 170 0 +cell 181 BUFX2_35 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -140 +pin name Y signal sr<6> layer 1 170 0 +cell 182 BUFX2_36 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -140 +pin name Y signal sr<7> layer 1 170 0 +cell 183 DFFSR_1 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n149 layer 1 -400 -340 +pin name Q signal state<0> layer 1 1520 449 +pin name R signal vdd layer 1 -1040 -90 +pin_group +pin name $abc$733$n164_bF$pin/S signal $abc$733$n164_bF$buf4 layer 1 -1020 59 +end_pin_group +cell 184 DFFSR_2 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n5 layer 1 -400 -340 +pin name Q signal state<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 185 DFFSR_3 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n150 layer 1 -400 -340 +pin name Q signal state<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 186 DFFSR_4 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n2 layer 1 -400 -340 +pin name Q signal state<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 187 DFFSR_5 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal state<2> layer 1 -400 -340 +pin name Q signal state<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 188 DFFSR_6 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 189 DFFSR_7 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 190 DFFSR_8 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 191 DFFSR_9 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 192 DFFSR_10 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal dp<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 193 DFFSR_11 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 194 DFFSR_12 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 195 DFFSR_13 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 196 DFFSR_14 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<8>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<8> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 197 DFFSR_15 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal done_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$882 layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 198 DFFSR_16 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 199 DFFSR_17 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 200 DFFSR_18 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 201 DFFSR_19 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal counter<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 202 DFFSR_20 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal counter<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 203 DFFSR_21 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 204 DFFSR_22 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 205 DFFSR_23 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 206 DFFSR_24 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 207 DFFSR_25 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 208 DFFSR_26 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 209 DFFSR_27 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal sr<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 210 DFFSR_28 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal sr<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 211 DFFSR_29 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 212 DFFSR_30 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 213 DFFSR_31 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 214 DFFSR_32 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal start layer 1 -400 -340 +pin name Q signal startbuf layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +pad 1 name twpin_clock +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name clock signal clock layer 1 0 0 + +pad 2 name twpin_reset +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name reset signal reset layer 1 0 0 + +pad 3 name twpin_start +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name start signal start layer 1 0 0 + +pad 4 name twpin_N<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<0> signal N<0> layer 1 0 0 + +pad 5 name twpin_N<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<1> signal N<1> layer 1 0 0 + +pad 6 name twpin_N<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<2> signal N<2> layer 1 0 0 + +pad 7 name twpin_N<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<3> signal N<3> layer 1 0 0 + +pad 8 name twpin_N<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<4> signal N<4> layer 1 0 0 + +pad 9 name twpin_N<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<5> signal N<5> layer 1 0 0 + +pad 10 name twpin_N<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<6> signal N<6> layer 1 0 0 + +pad 11 name twpin_N<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<7> signal N<7> layer 1 0 0 + +pad 12 name twpin_N<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<8> signal N<8> layer 1 0 0 + +pad 13 name twpin_dp<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<0> signal dp<0> layer 1 0 0 + +pad 14 name twpin_dp<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<1> signal dp<1> layer 1 0 0 + +pad 15 name twpin_dp<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<2> signal dp<2> layer 1 0 0 + +pad 16 name twpin_dp<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<3> signal dp<3> layer 1 0 0 + +pad 17 name twpin_dp<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<4> signal dp<4> layer 1 0 0 + +pad 18 name twpin_dp<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<5> signal dp<5> layer 1 0 0 + +pad 19 name twpin_dp<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<6> signal dp<6> layer 1 0 0 + +pad 20 name twpin_dp<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<7> signal dp<7> layer 1 0 0 + +pad 21 name twpin_dp<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<8> signal dp<8> layer 1 0 0 + +pad 22 name twpin_done +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name done signal done layer 1 0 0 + +pad 23 name twpin_counter<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<0> signal counter<0> layer 1 0 0 + +pad 24 name twpin_counter<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<1> signal counter<1> layer 1 0 0 + +pad 25 name twpin_counter<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<2> signal counter<2> layer 1 0 0 + +pad 26 name twpin_counter<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<3> signal counter<3> layer 1 0 0 + +pad 27 name twpin_counter<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<4> signal counter<4> layer 1 0 0 + +pad 28 name twpin_counter<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<5> signal counter<5> layer 1 0 0 + +pad 29 name twpin_counter<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<6> signal counter<6> layer 1 0 0 + +pad 30 name twpin_counter<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<7> signal counter<7> layer 1 0 0 + +pad 31 name twpin_sr<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<0> signal sr<0> layer 1 0 0 + +pad 32 name twpin_sr<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<1> signal sr<1> layer 1 0 0 + +pad 33 name twpin_sr<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<2> signal sr<2> layer 1 0 0 + +pad 34 name twpin_sr<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<3> signal sr<3> layer 1 0 0 + +pad 35 name twpin_sr<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<4> signal sr<4> layer 1 0 0 + +pad 36 name twpin_sr<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<5> signal sr<5> layer 1 0 0 + +pad 37 name twpin_sr<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<6> signal sr<6> layer 1 0 0 + +pad 38 name twpin_sr<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<7> signal sr<7> layer 1 0 0 + + diff -Nru graywolf-0.1.5/tests/twmc/map9v3/map9v3.mcel graywolf-0.1.6/tests/twmc/map9v3/map9v3.mcel --- graywolf-0.1.5/tests/twmc/map9v3/map9v3.mcel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/map9v3.mcel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,325 @@ +cluster 1 name core +corners 4 0 0 0 20661 20661 20661 20661 0 +asplb 0.5 aspub 2.0 +class 0 orientations 0 1 2 3 4 5 6 7 +softpin name pin1 signal sr<7> +softpin name pin2 signal sr<6> +softpin name pin3 signal sr<5> +softpin name pin4 signal sr<4> +softpin name pin5 signal sr<3> +softpin name pin6 signal sr<2> +softpin name pin7 signal sr<1> +softpin name pin8 signal sr<0> +softpin name pin9 signal dp<8> +softpin name pin10 signal dp<7> +softpin name pin11 signal dp<6> +softpin name pin12 signal dp<5> +softpin name pin13 signal dp<4> +softpin name pin14 signal dp<3> +softpin name pin15 signal dp<2> +softpin name pin16 signal dp<1> +softpin name pin17 signal dp<0> +softpin name pin18 signal done +softpin name pin19 signal counter<7> +softpin name pin20 signal counter<6> +softpin name pin21 signal counter<5> +softpin name pin22 signal counter<4> +softpin name pin23 signal counter<3> +softpin name pin24 signal counter<2> +softpin name pin25 signal counter<1> +softpin name pin26 signal counter<0> +softpin name pin27 signal reset +softpin name pin28 signal N<8> +softpin name pin29 signal N<7> +softpin name pin30 signal N<6> +softpin name pin31 signal N<5> +softpin name pin32 signal N<4> +softpin name pin33 signal N<3> +softpin name pin34 signal N<2> +softpin name pin35 signal N<1> +softpin name pin36 signal N<0> +softpin name pin37 signal start +softpin name pin38 signal clock + +instance core_L +corners 6 0 0 0 23856 11928 23856 11928 11928 23856 11928 23856 0 +asplb 0.5 aspub 2.0 +class 0 orientations 0 1 2 3 4 5 6 7 +softpin name pin1 signal sr<7> +softpin name pin2 signal sr<6> +softpin name pin3 signal sr<5> +softpin name pin4 signal sr<4> +softpin name pin5 signal sr<3> +softpin name pin6 signal sr<2> +softpin name pin7 signal sr<1> +softpin name pin8 signal sr<0> +softpin name pin9 signal dp<8> +softpin name pin10 signal dp<7> +softpin name pin11 signal dp<6> +softpin name pin12 signal dp<5> +softpin name pin13 signal dp<4> +softpin name pin14 signal dp<3> +softpin name pin15 signal dp<2> +softpin name pin16 signal dp<1> +softpin name pin17 signal dp<0> +softpin name pin18 signal done +softpin name pin19 signal counter<7> +softpin name pin20 signal counter<6> +softpin name pin21 signal counter<5> +softpin name pin22 signal counter<4> +softpin name pin23 signal counter<3> +softpin name pin24 signal counter<2> +softpin name pin25 signal counter<1> +softpin name pin26 signal counter<0> +softpin name pin27 signal reset +softpin name pin28 signal N<8> +softpin name pin29 signal N<7> +softpin name pin30 signal N<6> +softpin name pin31 signal N<5> +softpin name pin32 signal N<4> +softpin name pin33 signal N<3> +softpin name pin34 signal N<2> +softpin name pin35 signal N<1> +softpin name pin36 signal N<0> +softpin name pin37 signal start +softpin name pin38 signal clock + +instance core_T +corners 8 10330 0 10330 10330 0 10330 0 20660 30990 20660 30990 10330 20660 10330 20660 0 +asplb 0.5 aspub 2.0 +class 0 orientations 0 1 2 3 4 5 6 7 +softpin name pin1 signal sr<7> +softpin name pin2 signal sr<6> +softpin name pin3 signal sr<5> +softpin name pin4 signal sr<4> +softpin name pin5 signal sr<3> +softpin name pin6 signal sr<2> +softpin name pin7 signal sr<1> +softpin name pin8 signal sr<0> +softpin name pin9 signal dp<8> +softpin name pin10 signal dp<7> +softpin name pin11 signal dp<6> +softpin name pin12 signal dp<5> +softpin name pin13 signal dp<4> +softpin name pin14 signal dp<3> +softpin name pin15 signal dp<2> +softpin name pin16 signal dp<1> +softpin name pin17 signal dp<0> +softpin name pin18 signal done +softpin name pin19 signal counter<7> +softpin name pin20 signal counter<6> +softpin name pin21 signal counter<5> +softpin name pin22 signal counter<4> +softpin name pin23 signal counter<3> +softpin name pin24 signal counter<2> +softpin name pin25 signal counter<1> +softpin name pin26 signal counter<0> +softpin name pin27 signal reset +softpin name pin28 signal N<8> +softpin name pin29 signal N<7> +softpin name pin30 signal N<6> +softpin name pin31 signal N<5> +softpin name pin32 signal N<4> +softpin name pin33 signal N<3> +softpin name pin34 signal N<2> +softpin name pin35 signal N<1> +softpin name pin36 signal N<0> +softpin name pin37 signal start +softpin name pin38 signal clock + +instance core_L2 +corners 6 0 0 0 18478 18478 18478 18478 9239 27717 9239 27717 0 +asplb 0.5 aspub 2.0 +class 0 orientations 0 1 2 3 4 5 6 7 +softpin name pin1 signal sr<7> +softpin name pin2 signal sr<6> +softpin name pin3 signal sr<5> +softpin name pin4 signal sr<4> +softpin name pin5 signal sr<3> +softpin name pin6 signal sr<2> +softpin name pin7 signal sr<1> +softpin name pin8 signal sr<0> +softpin name pin9 signal dp<8> +softpin name pin10 signal dp<7> +softpin name pin11 signal dp<6> +softpin name pin12 signal dp<5> +softpin name pin13 signal dp<4> +softpin name pin14 signal dp<3> +softpin name pin15 signal dp<2> +softpin name pin16 signal dp<1> +softpin name pin17 signal dp<0> +softpin name pin18 signal done +softpin name pin19 signal counter<7> +softpin name pin20 signal counter<6> +softpin name pin21 signal counter<5> +softpin name pin22 signal counter<4> +softpin name pin23 signal counter<3> +softpin name pin24 signal counter<2> +softpin name pin25 signal counter<1> +softpin name pin26 signal counter<0> +softpin name pin27 signal reset +softpin name pin28 signal N<8> +softpin name pin29 signal N<7> +softpin name pin30 signal N<6> +softpin name pin31 signal N<5> +softpin name pin32 signal N<4> +softpin name pin33 signal N<3> +softpin name pin34 signal N<2> +softpin name pin35 signal N<1> +softpin name pin36 signal N<0> +softpin name pin37 signal start +softpin name pin38 signal clock + +pad 1 name twpin_clock +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name clock signal clock layer 1 0 0 + +pad 2 name twpin_reset +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name reset signal reset layer 1 0 0 + +pad 3 name twpin_start +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name start signal start layer 1 0 0 + +pad 4 name twpin_N<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<0> signal N<0> layer 1 0 0 + +pad 5 name twpin_N<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<1> signal N<1> layer 1 0 0 + +pad 6 name twpin_N<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<2> signal N<2> layer 1 0 0 + +pad 7 name twpin_N<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<3> signal N<3> layer 1 0 0 + +pad 8 name twpin_N<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<4> signal N<4> layer 1 0 0 + +pad 9 name twpin_N<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<5> signal N<5> layer 1 0 0 + +pad 10 name twpin_N<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<6> signal N<6> layer 1 0 0 + +pad 11 name twpin_N<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<7> signal N<7> layer 1 0 0 + +pad 12 name twpin_N<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<8> signal N<8> layer 1 0 0 + +pad 13 name twpin_dp<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<0> signal dp<0> layer 1 0 0 + +pad 14 name twpin_dp<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<1> signal dp<1> layer 1 0 0 + +pad 15 name twpin_dp<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<2> signal dp<2> layer 1 0 0 + +pad 16 name twpin_dp<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<3> signal dp<3> layer 1 0 0 + +pad 17 name twpin_dp<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<4> signal dp<4> layer 1 0 0 + +pad 18 name twpin_dp<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<5> signal dp<5> layer 1 0 0 + +pad 19 name twpin_dp<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<6> signal dp<6> layer 1 0 0 + +pad 20 name twpin_dp<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<7> signal dp<7> layer 1 0 0 + +pad 21 name twpin_dp<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<8> signal dp<8> layer 1 0 0 + +pad 22 name twpin_done +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name done signal done layer 1 0 0 + +pad 23 name twpin_counter<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<0> signal counter<0> layer 1 0 0 + +pad 24 name twpin_counter<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<1> signal counter<1> layer 1 0 0 + +pad 25 name twpin_counter<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<2> signal counter<2> layer 1 0 0 + +pad 26 name twpin_counter<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<3> signal counter<3> layer 1 0 0 + +pad 27 name twpin_counter<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<4> signal counter<4> layer 1 0 0 + +pad 28 name twpin_counter<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<5> signal counter<5> layer 1 0 0 + +pad 29 name twpin_counter<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<6> signal counter<6> layer 1 0 0 + +pad 30 name twpin_counter<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<7> signal counter<7> layer 1 0 0 + +pad 31 name twpin_sr<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<0> signal sr<0> layer 1 0 0 + +pad 32 name twpin_sr<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<1> signal sr<1> layer 1 0 0 + +pad 33 name twpin_sr<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<2> signal sr<2> layer 1 0 0 + +pad 34 name twpin_sr<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<3> signal sr<3> layer 1 0 0 + +pad 35 name twpin_sr<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<4> signal sr<4> layer 1 0 0 + +pad 36 name twpin_sr<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<5> signal sr<5> layer 1 0 0 + +pad 37 name twpin_sr<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<6> signal sr<6> layer 1 0 0 + +pad 38 name twpin_sr<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<7> signal sr<7> layer 1 0 0 + + diff -Nru graywolf-0.1.5/tests/twmc/map9v3/map9v3.par graywolf-0.1.6/tests/twmc/map9v3/map9v3.par --- graywolf-0.1.5/tests/twmc/map9v3/map9v3.par 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/map9v3.par 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,67 @@ +# osu035.par --- Parameter file for GrayWolf +# NOTE: all distance units are in centimicrons unless otherwise stated + +RULES + # values are resistance in ohms/sq and capacitance in fF/um^2 + layer metal1 0.07 0.030 horizontal + layer metal2 0.07 0.017 vertical + layer metal3 0.07 0.006 horizontal + layer metal4 0.04 0.004 vertical + + via via12 metal1 metal2 + via via23 metal2 metal3 + via via34 metal3 metal4 + + width metal1 60 + width metal2 60 + width metal3 60 + width metal4 120 + width via12 60 + width via23 60 + width via34 120 + + # Set spacing = track pitch - width, so that GrayWolf places pins + # on the right pitch. + # Pitches are (in um): + # metal1 = 200, metal2 = 160, metal3 = 200, metal4 = 320 + + spacing metal1 metal1 140 + spacing metal2 metal2 100 + spacing metal3 metal3 140 + spacing metal4 metal4 200 + + # Stacked vias allowed + spacing via12 via23 0 + spacing via23 via34 0 + + overhang via12 metal1 8 + overhang via12 metal2 6 + + overhang via23 metal2 8 + overhang via23 metal3 6 + + overhang via34 metal3 14 + overhang via34 metal4 16 +ENDRULES + +*vertical_wire_weight : 1.0 +*vertical_path_weight : 1.0 +*padspacing : variable +*rowSep : 0.0 0 +*track.pitch : 160 +*graphics.wait : off +*last_chance.wait : off +*random.seed : 12345 + +TWMC*chip.aspect.ratio : 0.75 + +TWSC*feedThruWidth : 160 layer 1 +TWSC*do.global.route : on +TWSC*ignore_feeds : true +TWSC*call_row_evener : true +TWSC*even_rows_maximally : true +# TWSC*no.graphics : on + +GENR*row_to_tile_spacing: 1 +# GENR*numrows : 6 +GENR*flip_alternate_rows : 1 diff -Nru graywolf-0.1.5/tests/twmc/map9v3/map9v3.scel graywolf-0.1.6/tests/twmc/map9v3/map9v3.scel --- graywolf-0.1.5/tests/twmc/map9v3/map9v3.scel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/map9v3.scel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,3996 @@ + +cell 0 BUFX4_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf3 layer 1 89 -300 +cell 1 BUFX4_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf2 layer 1 89 -300 +cell 2 BUFX4_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf1 layer 1 89 -300 +cell 3 BUFX2_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n76 layer 1 -160 -140 +pin name Y signal $abc$733$n76_bF$buf0 layer 1 170 0 +cell 4 BUFX4_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf4 layer 1 89 -300 +cell 5 BUFX4_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf3 layer 1 89 -300 +cell 6 BUFX4_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf2 layer 1 89 -300 +cell 7 BUFX4_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf1 layer 1 89 -300 +cell 8 BUFX4_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf0 layer 1 89 -300 +cell 9 BUFX2_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf4 layer 1 170 0 +cell 10 BUFX2_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf3 layer 1 170 0 +cell 11 BUFX2_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf2 layer 1 170 0 +cell 12 BUFX2_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf1 layer 1 170 0 +cell 13 BUFX2_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf0 layer 1 170 0 +cell 14 BUFX2_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf3 layer 1 170 0 +cell 15 BUFX2_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf2 layer 1 170 0 +cell 16 BUFX2_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf1 layer 1 170 0 +cell 17 BUFX2_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf0 layer 1 170 0 +cell 18 INVX4_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<0> layer 1 -160 -340 +pin name Y signal $abc$733$n75_1 layer 1 0 0 +cell 19 INVX8_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -320 -340 +pin name Y signal $abc$733$n76 layer 1 -160 410 +cell 20 NOR2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 160 -61 +pin name Y signal $abc$733$n77 layer 1 0 -300 +cell 21 NOR2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<4> layer 1 160 -61 +pin name Y signal $abc$733$n78 layer 1 0 -300 +cell 22 NAND2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n78 layer 1 160 140 +pin name Y signal $abc$733$n79 layer 1 100 -680 +cell 23 NOR2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 -61 +pin name Y signal $abc$733$n80 layer 1 0 -300 +cell 24 NOR2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 160 -61 +pin name Y signal $abc$733$n81 layer 1 0 -300 +cell 25 NAND2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n80 layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n82 layer 1 100 -680 +cell 26 NOR2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n82 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n83_1 layer 1 0 -300 +cell 27 OAI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf3 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n83_1 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$546$n2 layer 1 50 -100 +cell 28 INVX1_1 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<4> layer 1 -80 -540 +pin name Y signal $abc$733$n85_1 layer 1 80 0 +cell 29 INVX1_2 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<1> layer 1 -80 -540 +pin name Y signal $abc$733$n86 layer 1 80 0 +cell 30 INVX1_3 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal start layer 1 -80 -540 +pin name Y signal $abc$733$n87_1 layer 1 80 0 +cell 31 NOR2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal startbuf layer 1 -160 -540 +pin name B signal $abc$733$n87_1 layer 1 160 -61 +pin name Y signal $abc$733$n88 layer 1 0 -300 +cell 32 OAI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n86 layer 1 -160 -330 +pin name B signal $abc$733$n88 layer 1 -80 -140 +pin name C signal $abc$733$n85_1 layer 1 160 300 +pin name Y signal $abc$546$n5 layer 1 50 -100 +cell 33 INVX1_4 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -80 -540 +pin name Y signal $abc$733$n90 layer 1 80 0 +cell 34 NAND3X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<2> layer 1 -240 60 +pin_group +pin name $abc$733$n75_1_bF$pin/B signal $abc$733$n75_1_bF$buf2 layer 1 -40 -100 +end_pin_group +pin_group +pin name $abc$733$n76_bF$pin/C signal $abc$733$n76_bF$buf2 layer 1 80 260 +end_pin_group +pin name Y signal $abc$733$n91_1 layer 1 -80 680 +cell 35 NOR2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n92 layer 1 0 -300 +cell 36 AOI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n90 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n92 layer 1 240 -501 +pin name Y signal dp<1>_FF_INPUT layer 1 80 -680 +cell 37 INVX1_5 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -80 -540 +pin name Y signal $abc$733$n94 layer 1 80 0 +cell 38 INVX1_6 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -80 -540 +pin name Y signal $abc$733$n95_1 layer 1 80 0 +cell 39 MUX2X1_1 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n94 layer 1 240 -61 +pin name B signal $abc$733$n95_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<2>_FF_INPUT layer 1 19 500 +cell 40 INVX1_7 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -80 -540 +pin name Y signal $abc$733$n97_1 layer 1 80 0 +cell 41 INVX1_8 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -80 -540 +pin name Y signal $abc$733$n98_1 layer 1 80 0 +cell 42 MUX2X1_2 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n97_1 layer 1 240 -61 +pin name B signal $abc$733$n98_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<3>_FF_INPUT layer 1 19 500 +cell 43 INVX1_9 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -80 -540 +pin name Y signal $abc$733$n100 layer 1 80 0 +cell 44 INVX1_10 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -80 -540 +pin name Y signal $abc$733$n101_1 layer 1 80 0 +cell 45 MUX2X1_3 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n100 layer 1 240 -61 +pin name B signal $abc$733$n101_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<4>_FF_INPUT layer 1 19 500 +cell 46 INVX1_11 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -80 -540 +pin name Y signal $abc$733$n103_1 layer 1 80 0 +cell 47 INVX1_12 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -80 -540 +pin name Y signal $abc$733$n104 layer 1 80 0 +cell 48 MUX2X1_4 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n103_1 layer 1 240 -61 +pin name B signal $abc$733$n104 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<5>_FF_INPUT layer 1 19 500 +cell 49 INVX1_13 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -80 -540 +pin name Y signal $abc$733$n106_1 layer 1 80 0 +cell 50 INVX1_14 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -80 -540 +pin name Y signal $abc$733$n107 layer 1 80 0 +cell 51 MUX2X1_5 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n106_1 layer 1 240 -61 +pin name B signal $abc$733$n107 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<6>_FF_INPUT layer 1 19 500 +cell 52 INVX1_15 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -80 -540 +pin name Y signal $abc$733$n109 layer 1 80 0 +cell 53 INVX1_16 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -80 -540 +pin name Y signal $abc$733$n110_1 layer 1 80 0 +cell 54 MUX2X1_6 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n109 layer 1 240 -61 +pin name B signal $abc$733$n110_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<7>_FF_INPUT layer 1 19 500 +cell 55 INVX1_17 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -80 -540 +pin name Y signal $abc$733$n112 layer 1 80 0 +cell 56 INVX1_18 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -80 -540 +pin name Y signal $abc$733$n113 layer 1 80 0 +cell 57 MUX2X1_7 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n112 layer 1 240 -61 +pin name B signal $abc$733$n113 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<8>_FF_INPUT layer 1 19 500 +cell 58 INVX1_19 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -80 -540 +pin name Y signal $abc$733$n115 layer 1 80 0 +cell 59 NOR2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n116_1 layer 1 0 -300 +cell 60 AOI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n115 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n116_1 layer 1 240 -501 +pin name Y signal dp<0>_FF_INPUT layer 1 80 -680 +cell 61 XNOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<7> layer 1 439 -300 +pin name Y signal $abc$733$n118_1 layer 1 50 -500 +cell 62 NOR2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -540 +pin name B signal $abc$733$n101_1 layer 1 160 -61 +pin name Y signal $abc$733$n119 layer 1 0 -300 +cell 63 NOR2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -540 +pin name B signal $abc$733$n104 layer 1 160 -61 +pin name Y signal $abc$733$n120 layer 1 0 -300 +cell 64 OAI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n119 layer 1 -160 -330 +pin name B signal $abc$733$n120 layer 1 -80 -140 +pin name C signal $abc$733$n118_1 layer 1 160 300 +pin name Y signal $abc$733$n121 layer 1 50 -100 +cell 65 NOR2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -540 +pin name B signal $abc$733$n107 layer 1 160 -61 +pin name Y signal $abc$733$n122 layer 1 0 -300 +cell 66 NOR2X1_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -540 +pin name B signal $abc$733$n113 layer 1 160 -61 +pin name Y signal $abc$733$n123_1 layer 1 0 -300 +cell 67 XNOR2X1_2 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<4> layer 1 439 -300 +pin name Y signal $abc$733$n124 layer 1 50 -500 +cell 68 OAI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n122 layer 1 -160 -330 +pin name B signal $abc$733$n123_1 layer 1 -80 -140 +pin name C signal $abc$733$n124 layer 1 160 300 +pin name Y signal $abc$733$n125 layer 1 50 -100 +cell 69 NAND2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n121 layer 1 -160 -340 +pin name B signal $abc$733$n125 layer 1 160 140 +pin name Y signal $abc$733$n126 layer 1 100 -680 +cell 70 OAI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<3> layer 1 -160 -330 +pin name B signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n127 layer 1 50 -100 +cell 71 AOI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n126 layer 1 -160 -70 +pin name B signal state<3> layer 1 -80 -261 +pin name C signal $abc$733$n127 layer 1 240 -501 +pin name Y signal sr<0>_FF_INPUT layer 1 80 -680 +cell 72 OAI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n129 layer 1 50 -100 +cell 73 AOI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n98_1 layer 1 -80 -261 +pin name C signal $abc$733$n129 layer 1 240 -501 +pin name Y signal sr<2>_FF_INPUT layer 1 80 -680 +cell 74 OAI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n131 layer 1 50 -100 +cell 75 AOI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n101_1 layer 1 -80 -261 +pin name C signal $abc$733$n131 layer 1 240 -501 +pin name Y signal sr<3>_FF_INPUT layer 1 80 -680 +cell 76 OAI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n133_1 layer 1 50 -100 +cell 77 AOI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n104 layer 1 -80 -261 +pin name C signal $abc$733$n133_1 layer 1 240 -501 +pin name Y signal sr<4>_FF_INPUT layer 1 80 -680 +cell 78 OAI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n135_1 layer 1 50 -100 +cell 79 AOI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n107 layer 1 -80 -261 +pin name C signal $abc$733$n135_1 layer 1 240 -501 +pin name Y signal sr<5>_FF_INPUT layer 1 80 -680 +cell 80 OAI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n137 layer 1 50 -100 +cell 81 AOI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n110_1 layer 1 -80 -261 +pin name C signal $abc$733$n137 layer 1 240 -501 +pin name Y signal sr<6>_FF_INPUT layer 1 80 -680 +cell 82 OAI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n139 layer 1 50 -100 +cell 83 AOI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n113 layer 1 -80 -261 +pin name C signal $abc$733$n139 layer 1 240 -501 +pin name Y signal sr<7>_FF_INPUT layer 1 80 -680 +cell 84 INVX1_20 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<1> layer 1 -80 -540 +pin name Y signal $abc$733$n141 layer 1 80 0 +cell 85 NOR2X1_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -540 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 160 -61 +end_pin_group +pin name Y signal $abc$733$n142 layer 1 0 -300 +cell 86 AND2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -240 -261 +end_pin_group +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -80 -100 +pin name Y signal $abc$733$n143 layer 1 179 -680 +cell 87 OAI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n142 layer 1 -160 -330 +pin name B signal $abc$733$n143 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n144 layer 1 50 -100 +cell 88 OAI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf1 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n141 layer 1 -80 -140 +pin name C signal $abc$733$n144 layer 1 160 300 +pin name Y signal counter<0>_FF_INPUT layer 1 50 -100 +cell 89 NOR2X1_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -540 +pin name B signal N<2> layer 1 160 -61 +pin name Y signal $abc$733$n146 layer 1 0 -300 +cell 90 NAND2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -340 +pin name B signal N<2> layer 1 160 140 +pin name Y signal $abc$733$n147 layer 1 100 -680 +cell 91 INVX1_21 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $abc$733$n147 layer 1 -80 -540 +pin name Y signal $abc$733$n148 layer 1 80 0 +cell 92 OAI21X1_14 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n146 layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n149 layer 1 50 -100 +cell 93 AND2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n81 layer 1 -240 -261 +pin name B signal state<3> layer 1 -80 -100 +pin name Y signal $abc$733$n150 layer 1 179 -680 +cell 94 INVX1_22 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -80 -540 +pin name Y signal $abc$733$n151_1 layer 1 80 0 +cell 95 NOR2X1_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n151_1 layer 1 -160 -540 +pin name B signal $abc$733$n142 layer 1 160 -61 +pin name Y signal $abc$733$n152 layer 1 0 -300 +cell 96 OAI21X1_15 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n150 layer 1 -160 -330 +pin name B signal $abc$733$n152 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n153_1 layer 1 50 -100 +cell 97 NAND2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n149 layer 1 -160 -340 +pin name B signal $abc$733$n153_1 layer 1 160 140 +pin name Y signal counter<1>_FF_INPUT layer 1 100 -680 +cell 98 NAND2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<3> layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n155 layer 1 100 -680 +cell 99 XOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $abc$733$n155 layer 1 -410 -290 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 439 -300 +pin name Y signal $abc$733$n156 layer 1 0 -700 +cell 100 INVX1_23 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<3> layer 1 -80 -540 +pin name Y signal $abc$733$n157 layer 1 80 0 +cell 101 NAND2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n157 layer 1 -160 -340 +pin name B signal $abc$733$n147 layer 1 160 140 +pin name Y signal $abc$733$n158_1 layer 1 100 -680 +cell 102 NAND2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -340 +pin name B signal $abc$733$n148 layer 1 160 140 +pin name Y signal $abc$733$n159 layer 1 100 -680 +cell 103 NAND3X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n158_1 layer 1 -40 -100 +pin name C signal $abc$733$n159 layer 1 80 260 +pin name Y signal $abc$733$n160_1 layer 1 -80 680 +cell 104 OAI21X1_16 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n156 layer 1 -80 -140 +pin name C signal $abc$733$n160_1 layer 1 160 300 +pin name Y signal counter<2>_FF_INPUT layer 1 50 -100 +cell 105 OAI21X1_17 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<3> layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal N<4> layer 1 160 300 +pin name Y signal $abc$733$n162_1 layer 1 50 -100 +cell 106 INVX1_24 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<4> layer 1 -80 -540 +pin name Y signal $abc$733$n163_1 layer 1 80 0 +cell 107 NAND3X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n157 layer 1 -240 60 +pin name B signal $abc$733$n163_1 layer 1 -40 -100 +pin name C signal $abc$733$n147 layer 1 80 260 +pin name Y signal $abc$733$n164_1 layer 1 -80 680 +cell 108 NAND2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -340 +pin name B signal $abc$733$n162_1 layer 1 160 140 +pin name Y signal $abc$733$n165 layer 1 100 -680 +cell 109 OR2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -240 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -40 -221 +pin name Y signal $abc$733$n166 layer 1 240 -100 +cell 110 OAI21X1_18 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<3> layer 1 160 300 +pin name Y signal $abc$733$n167 layer 1 50 -100 +cell 111 OAI21X1_19 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n166 layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $abc$733$n167 layer 1 160 300 +pin name Y signal $abc$733$n168 layer 1 50 -100 +cell 112 NAND2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf3 layer 1 -160 -340 +end_pin_group +pin name B signal $abc$733$n168 layer 1 160 140 +pin name Y signal $abc$733$n169 layer 1 100 -680 +cell 113 OAI21X1_20 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf2 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n165 layer 1 -80 -140 +pin name C signal $abc$733$n169 layer 1 160 300 +pin name Y signal counter<3>_FF_INPUT layer 1 50 -100 +cell 114 INVX1_25 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<5> layer 1 -80 -540 +pin name Y signal $abc$733$n171 layer 1 80 0 +cell 115 NOR2X1_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -540 +pin name B signal N<4> layer 1 160 -61 +pin name Y signal $abc$733$n172 layer 1 0 -300 +cell 116 AOI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n172 layer 1 -160 -70 +pin name B signal $abc$733$n147 layer 1 -80 -261 +pin name C signal $abc$733$n171 layer 1 240 -501 +pin name Y signal $abc$733$n173 layer 1 80 -680 +cell 117 OAI21X1_21 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n174 layer 1 50 -100 +cell 118 NOR2X1_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -540 +pin name B signal $abc$733$n166 layer 1 160 -61 +pin name Y signal $abc$733$n175 layer 1 0 -300 +cell 119 NAND2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n150 layer 1 160 140 +pin name Y signal $abc$733$n176 layer 1 100 -680 +cell 120 AOI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n175 layer 1 -240 -70 +pin name B signal $abc$733$n150 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<4> layer 1 320 -61 +pin name D signal $abc$733$n176 layer 1 140 -180 +pin name Y signal $abc$733$n177 layer 1 10 -431 +cell 121 OAI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n173 layer 1 -240 -330 +pin name B signal $abc$733$n174 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n177 layer 1 160 -140 +pin name Y signal counter<4>_FF_INPUT layer 1 0 -300 +cell 122 OAI21X1_22 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal N<6> layer 1 160 300 +pin name Y signal $abc$733$n179 layer 1 50 -100 +cell 123 OR2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -240 -540 +pin name B signal N<6> layer 1 -40 -221 +pin name Y signal $abc$733$n180 layer 1 240 -100 +cell 124 OAI21X1_23 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -330 +pin name B signal $abc$733$n180 layer 1 -80 -140 +pin name C signal $abc$733$n179 layer 1 160 300 +pin name Y signal $abc$733$n181 layer 1 50 -100 +cell 125 NOR2X1_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n155 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n182 layer 1 0 -300 +cell 126 INVX1_26 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -80 -540 +pin name Y signal $abc$733$n183 layer 1 80 0 +cell 127 AOI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n175 layer 1 -160 -70 +pin name B signal $abc$733$n150 layer 1 -80 -261 +pin name C signal $abc$733$n183 layer 1 240 -501 +pin name Y signal $abc$733$n184 layer 1 80 -680 +cell 128 OAI21X1_24 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -160 -330 +pin name B signal $abc$733$n184 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n185 layer 1 50 -100 +cell 129 OAI21X1_25 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf0 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n181 layer 1 -80 -140 +pin name C signal $abc$733$n185 layer 1 160 300 +pin name Y signal counter<5>_FF_INPUT layer 1 50 -100 +cell 130 INVX1_27 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<7> layer 1 -80 -540 +pin name Y signal $abc$733$n187 layer 1 80 0 +cell 131 NOR2X1_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n180 layer 1 -160 -540 +pin name B signal $abc$733$n164_1 layer 1 160 -61 +pin name Y signal $abc$733$n188 layer 1 0 -300 +cell 132 NOR2X1_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n187 layer 1 -160 -540 +pin name B signal $abc$733$n188 layer 1 160 -61 +pin name Y signal $abc$733$n189 layer 1 0 -300 +cell 133 NOR2X1_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<5> layer 1 -160 -540 +pin name B signal N<6> layer 1 160 -61 +pin name Y signal $abc$733$n190 layer 1 0 -300 +cell 134 NAND3X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n147 layer 1 -240 60 +pin name B signal $abc$733$n172 layer 1 -40 -100 +pin name C signal $abc$733$n190 layer 1 80 260 +pin name Y signal $abc$733$n191 layer 1 -80 680 +cell 135 OAI21X1_26 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n192 layer 1 50 -100 +cell 136 INVX1_28 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -80 -540 +pin name Y signal $abc$733$n193 layer 1 80 0 +cell 137 AND2X2_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n77 layer 1 -240 -261 +pin name B signal $abc$733$n78 layer 1 -80 -100 +pin name Y signal $abc$733$n194 layer 1 179 -680 +cell 138 NAND3X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n193 layer 1 -240 60 +pin name B signal $abc$733$n150 layer 1 -40 -100 +pin name C signal $abc$733$n194 layer 1 80 260 +pin name Y signal $abc$733$n195 layer 1 -80 680 +cell 139 OAI21X1_27 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n155 layer 1 -160 -330 +pin name B signal $abc$733$n79 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 300 +pin name Y signal $abc$733$n196 layer 1 50 -100 +cell 140 AND2X2_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n195 layer 1 -240 -261 +pin name B signal $abc$733$n196 layer 1 -80 -100 +pin name Y signal $abc$733$n197 layer 1 179 -680 +cell 141 OAI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n189 layer 1 -240 -330 +pin name B signal $abc$733$n192 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n197 layer 1 160 -140 +pin name Y signal counter<6>_FF_INPUT layer 1 0 -300 +cell 142 OAI21X1_28 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal N<8> layer 1 160 300 +pin name Y signal $abc$733$n199 layer 1 50 -100 +cell 143 INVX1_29 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<8> layer 1 -80 -540 +pin name Y signal $abc$733$n200 layer 1 80 0 +cell 144 NAND3X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n187 layer 1 -240 60 +pin name B signal $abc$733$n200 layer 1 -40 -100 +pin name C signal $abc$733$n188 layer 1 80 260 +pin name Y signal $abc$733$n201 layer 1 -80 680 +cell 145 NAND3X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n199 layer 1 -40 -100 +pin name C signal $abc$733$n201 layer 1 80 260 +pin name Y signal $abc$733$n202 layer 1 -80 680 +cell 146 AOI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -240 -70 +pin name B signal $abc$733$n83_1 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<7> layer 1 320 -61 +pin name D signal $abc$733$n195 layer 1 140 -180 +pin name Y signal $abc$733$n203 layer 1 10 -431 +cell 147 OAI21X1_29 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n203 layer 1 -80 -140 +pin name C signal $abc$733$n202 layer 1 160 300 +pin name Y signal counter<7>_FF_INPUT layer 1 50 -100 +cell 148 INVX1_30 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -80 -540 +pin name Y signal $abc$733$n205 layer 1 80 0 +cell 149 INVX1_31 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<2> layer 1 -80 -540 +pin name Y signal $abc$733$n206 layer 1 80 0 +cell 150 NAND3X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<4> layer 1 -240 60 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -40 -100 +end_pin_group +pin name C signal $abc$733$n206 layer 1 80 260 +pin name Y signal $abc$733$n207 layer 1 -80 680 +cell 151 AOI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n207 layer 1 -160 -70 +pin name B signal $abc$733$n205 layer 1 -80 -261 +pin name C signal state<0> layer 1 240 -501 +pin name Y signal done_FF_INPUT layer 1 80 -680 +cell 152 OAI21X1_30 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf2 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n209 layer 1 50 -100 +cell 153 AOI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf1 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n95_1 layer 1 -80 -261 +pin name C signal $abc$733$n209 layer 1 240 -501 +pin name Y signal sr<1>_FF_INPUT layer 1 80 -680 +cell 154 AND2X2_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n88 layer 1 -240 -261 +pin name B signal state<1> layer 1 -80 -100 +pin name Y signal $abc$546$n149 layer 1 179 -680 +cell 155 AND2X2_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -240 -261 +pin name B signal $abc$733$n80 layer 1 -80 -100 +pin name Y signal $abc$546$n150 layer 1 179 -680 +cell 156 INVX8_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal reset layer 1 -320 -340 +pin name Y signal $abc$733$n164 layer 1 -160 410 +cell 157 BUFX2_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -140 +pin name Y signal counter<0> layer 1 170 0 +cell 158 BUFX2_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -140 +pin name Y signal counter<1> layer 1 170 0 +cell 159 BUFX2_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -140 +pin name Y signal counter<2> layer 1 170 0 +cell 160 BUFX2_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -140 +pin name Y signal counter<3> layer 1 170 0 +cell 161 BUFX2_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -140 +pin name Y signal counter<4> layer 1 170 0 +cell 162 BUFX2_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -140 +pin name Y signal counter<5> layer 1 170 0 +cell 163 BUFX2_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -160 -140 +pin name Y signal counter<6> layer 1 170 0 +cell 164 BUFX2_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -140 +pin name Y signal counter<7> layer 1 170 0 +cell 165 BUFX2_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -160 -140 +pin name Y signal done layer 1 170 0 +cell 166 BUFX2_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -160 -140 +pin name Y signal dp<0> layer 1 170 0 +cell 167 BUFX2_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -160 -140 +pin name Y signal dp<1> layer 1 170 0 +cell 168 BUFX2_22 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -160 -140 +pin name Y signal dp<2> layer 1 170 0 +cell 169 BUFX2_23 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -160 -140 +pin name Y signal dp<3> layer 1 170 0 +cell 170 BUFX2_24 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -160 -140 +pin name Y signal dp<4> layer 1 170 0 +cell 171 BUFX2_25 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -160 -140 +pin name Y signal dp<5> layer 1 170 0 +cell 172 BUFX2_26 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -160 -140 +pin name Y signal dp<6> layer 1 170 0 +cell 173 BUFX2_27 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -160 -140 +pin name Y signal dp<7> layer 1 170 0 +cell 174 BUFX2_28 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -160 -140 +pin name Y signal dp<8> layer 1 170 0 +cell 175 BUFX2_29 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -140 +pin name Y signal sr<0> layer 1 170 0 +cell 176 BUFX2_30 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -140 +pin name Y signal sr<1> layer 1 170 0 +cell 177 BUFX2_31 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -140 +pin name Y signal sr<2> layer 1 170 0 +cell 178 BUFX2_32 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -140 +pin name Y signal sr<3> layer 1 170 0 +cell 179 BUFX2_33 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -140 +pin name Y signal sr<4> layer 1 170 0 +cell 180 BUFX2_34 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -140 +pin name Y signal sr<5> layer 1 170 0 +cell 181 BUFX2_35 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -140 +pin name Y signal sr<6> layer 1 170 0 +cell 182 BUFX2_36 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -140 +pin name Y signal sr<7> layer 1 170 0 +cell 183 DFFSR_1 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n149 layer 1 -400 -340 +pin name Q signal state<0> layer 1 1520 449 +pin name R signal vdd layer 1 -1040 -90 +pin_group +pin name $abc$733$n164_bF$pin/S signal $abc$733$n164_bF$buf4 layer 1 -1020 59 +end_pin_group +cell 184 DFFSR_2 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n5 layer 1 -400 -340 +pin name Q signal state<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 185 DFFSR_3 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n150 layer 1 -400 -340 +pin name Q signal state<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 186 DFFSR_4 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n2 layer 1 -400 -340 +pin name Q signal state<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 187 DFFSR_5 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal state<2> layer 1 -400 -340 +pin name Q signal state<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 188 DFFSR_6 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 189 DFFSR_7 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 190 DFFSR_8 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 191 DFFSR_9 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 192 DFFSR_10 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal dp<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 193 DFFSR_11 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 194 DFFSR_12 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 195 DFFSR_13 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 196 DFFSR_14 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<8>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<8> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 197 DFFSR_15 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal done_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$882 layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 198 DFFSR_16 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 199 DFFSR_17 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 200 DFFSR_18 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 201 DFFSR_19 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal counter<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 202 DFFSR_20 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal counter<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 203 DFFSR_21 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 204 DFFSR_22 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 205 DFFSR_23 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 206 DFFSR_24 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 207 DFFSR_25 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 208 DFFSR_26 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 209 DFFSR_27 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal sr<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 210 DFFSR_28 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal sr<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 211 DFFSR_29 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 212 DFFSR_30 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 213 DFFSR_31 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 214 DFFSR_32 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal start layer 1 -400 -340 +pin name Q signal startbuf layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 diff -Nru graywolf-0.1.5/tests/twmc/map9v3/map9v3.stat graywolf-0.1.6/tests/twmc/map9v3/map9v3.stat --- graywolf-0.1.5/tests/twmc/map9v3/map9v3.stat 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/map9v3/map9v3.stat 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,23 @@ +syntax version:v1.1 date:Mon May 25 21:11:10 EDT 1992 +TIMESTAMP:Thu Jul 19 21:21:05 2018 +Statistics for map9v3: +num_stdcells:215 +num_macros:0 +num_instances:0 +num_pads:38 +num_nets:228 +num_pins:735 +num_implicit_feeds:1334 +num_equivs:1334 +num_unequivs:0 +num_ports:38 +macro_area:0.000e+00 +tot_length:213440 +num_soft:1 +cell_height:2000 +tot_length:213440 +num_soft:1 +cell_height:2000 +tot_length:213440 +num_soft:1 +cell_height:2000 diff -Nru graywolf-0.1.5/tests/twmc/runtest.sh graywolf-0.1.6/tests/twmc/runtest.sh --- graywolf-0.1.5/tests/twmc/runtest.sh 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twmc/runtest.sh 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,92 @@ +#!/bin/bash + +SOURCEDIR=$1 +BINDIR=$2 +TESTNAME=$3 + +#TWDIR=${BINDIR}/micro_env ${BINDIR}/src/twflow/graywolf +TMPDIR=`mktemp -d` +rsync ${SOURCEDIR}/tests/twmc/${TESTNAME} ${TMPDIR}/ -a --copy-links -v + + +pushd ${TMPDIR}/${TESTNAME} +TWDIR=${BINDIR}/micro_env ${BINDIR}/micro_env/bin/TimberWolfMC -n ${TESTNAME} + +RET=0 + +diff -Nau ${TESTNAME}.blk expected/${TESTNAME}.blk +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.gen expected/${TESTNAME}.gen +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.gsav expected/${TESTNAME}.gsav +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.mdat expected/${TESTNAME}.mdat +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.mgeo expected/${TESTNAME}.mgeo +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.mpin expected/${TESTNAME}.mpin +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.mpth expected/${TESTNAME}.mpth +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.msav expected/${TESTNAME}.msav +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.mver expected/${TESTNAME}.mver +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.mvio expected/${TESTNAME}.mvio +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.scel expected/${TESTNAME}.scel +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +if [ "$#" = "4" ] && [ "$4" == "1" ] ; then + cp * ${SOURCEDIR}/tests/twmc/${TESTNAME}/expected/ + touch ${SOURCEDIR}/tests/twmc/${TESTNAME}/expected/updated +fi + +popd +rm -rf ${TMPDIR} +#echo ${TMPDIR} + +exit $RET diff -Nru graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.blk graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.blk --- graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.blk 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.blk 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,19 @@ +rows 9 +row -239 -200 24239 1800 mirror +row -239 1800 24239 3800 +row -239 3800 24239 5800 mirror +row -239 5800 24239 7800 +row -239 7800 24239 9800 mirror +row -239 9800 24239 11800 +row -239 11800 24239 13800 mirror +row -239 13800 24239 15800 +row -239 15800 24239 17800 mirror + +/* + The Tile and Macro Information: + numtiles 1 + -240 -200 24240 27400 + + nummacros 0 + +*/ diff -Nru graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.out graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.out --- graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.out 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.out 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,1147 @@ + +TimberWolfSC version:v6.0 date:Mon May 25 21:19:07 EDT 1992 +Row-Based Placement and Global Routing Program +Authors: Carl Sechen, Kai-Win Lee, and Bill Swartz, + Yale University + + + + +TimberWolf will perform a global route step +feedThruWidth: 160 +track.pitch: 200 +route2act was not entered in the .par file +route2act defaulted to track.pitch +route2act: 200 +Directory overriden with 'TWDIR' environment variable + +The random number generator seed is: 12345 + + +rowSep: 0.000000 + +[get_stat_hints]:Found hints in file +[get_stat_hints]:Total cells:253 Number of nets:228 + +[add_swap_group]:Implicit swap group <$abc$733$n76_bF$pin> created +[add_swap_group]:Implicit swap group <$abc$733$n75_1_bF$pin> created +[add_swap_group]:Implicit swap group created +[add_swap_group]:Implicit swap group <$abc$733$n164_bF$pin> created +[add_extra_cells]:Added 114 spacer cells to the gate array +total cell length: 213440 +total block length: 220302 +block x-span:24478 block y-span:18000 + + +TIMING FACTOR (COMPUTED) : 4.000000 +Using default value of bin.penalty.control:1.000000 +Original Average Cell Width:992.000000 +Adjusted Average Cell Width:468.000000 +numBinsG automatically set to:53 +binWidthG = 468 +average_cell_width is:468 +standard deviation of cell length is:1189.83 +TimberWolfSC starting from the beginning + + + +THIS IS THE ROUTE COST OF THE ORIGINAL PLACEMENT: 3476250 + +The number of nets with 2 pins is 134 +The number of nets with 3 pins is 33 +The number of nets with 4 pins is 19 +The number of nets with 5 pins is 13 +The number of nets with 6 pins is 15 +The number of nets with 7 pins is 7 +The number of nets with 8 pins is 4 +The number of nets with 12 pins is 2 +The number of nets with 32 pins is 1 +The number of nets with 100 pins or more is 0 +Average number of pins per net = 3.223684 +The maximum number of pins on a single net is:32 + +Percentage of Nets Connecting to at least 2 cells:1.00 +Percentage of Nets Connecting to at least 3 cells:0.46 +Percentage of Nets Connecting to at least 4 cells:0.28 +Percentage of Nets Connecting to at least 5 cells:0.20 +Percentage of Nets Connecting to at least 6 cells:0.14 + +bdxlen:25280 bdylen:18400 +l:-239 t:17800 r:25041 b:-600 + + + +THIS IS THE ROUTE COST OF THE CURRENT PLACEMENT: 3123651 + + + +THIS IS THE PENALTY OF THE CURRENT PLACEMENT: 101690 +block:1 desire:24478 +block:2 desire:24478 +block:3 desire:24478 +block:4 desire:24478 +block:5 desire:24478 +block:6 desire:24478 +block:7 desire:24478 +block:8 desire:24478 +block:9 desire:24478 +Total Desired Length: 220302 +rowControl: 0.024 expected deviation above minimum: 6.02 +rowControl: 0.023 expected deviation above minimum: 3.21 + +Iter T fds Wire Penal Time P_lim err binC rowC timeC s/p rej. Acc. g_sw Vwt + -1: 0.00e+00 0 4517291 45918 0 999999 0.00 1.00 6.00 3.00 0.00 0.00 0.949 + 0: 1.21e+05 0 4743320 49442 0 999999 0.00 1.00 6.00 3.00 1.11 0.00 0.949 0.99 + 1: 1.16e+05 0 4738524 58078 0 999999 0.00 1.00 6.00 3.00 1.06 0.00 0.952 0.99 + 2: 8.80e+04 0 4672292 58718 0 166201 0.00 1.00 6.00 3.00 1.09 0.00 0.942 0.98 + 3: 6.23e+04 0 4390693 37594 0 127044 0.00 1.00 6.00 3.00 1.12 0.00 0.917 0.98 + 4: 4.23e+04 0 4280096 26390 0 100426 0.00 1.00 6.00 3.00 1.12 0.00 0.890 0.97 + 5: 3.38e+04 0 4332618 26722 0 79708 0.00 1.00 5.96 3.00 1.14 0.00 0.844 0.95 + 6: 2.71e+04 0 4126538 18718 0 68952 0.00 1.00 5.94 3.00 1.14 0.00 0.815 0.94 + 7: 2.33e+04 0 4101353 30558 0 61800 0.00 1.00 5.63 3.00 1.20 0.00 0.780 0.92 + 8: 2.07e+04 0 4021908 16162 0 57371 0.00 1.00 5.77 3.00 1.22 0.00 0.750 0.91 + 9: 1.82e+04 0 4079279 18394 0 52907 0.00 1.00 5.38 3.00 1.23 0.00 0.725 0.91 + 10: 1.59e+04 0 3964203 15826 0 50515 0.00 1.00 5.07 3.00 1.20 0.00 0.701 0.89 + 11: 1.47e+04 0 3828881 25758 0 46756 0.00 1.00 4.67 3.00 1.30 0.00 0.671 0.88 + 12: 1.41e+04 0 3857322 33758 0 43885 0.00 1.00 4.66 3.00 1.28 0.00 0.644 0.85 + 13: 1.34e+04 0 3605396 11998 0 43342 0.00 1.00 4.96 3.00 1.23 0.00 0.623 0.87 + 14: 1.17e+04 0 3725961 17754 0 41915 0.00 1.00 4.42 3.00 1.35 0.00 0.610 0.86 + 15: 1.15e+04 0 3393589 23202 0 39366 0.00 1.00 4.12 3.00 1.36 0.00 0.577 0.84 + 16: 1.07e+04 0 3587073 21274 0 38162 0.00 1.00 4.03 3.00 1.32 0.00 0.562 0.83 + 17: 9.33e+03 0 3512893 14554 0 36722 0.00 1.00 3.87 3.00 1.35 0.00 0.549 0.81 + 18: 8.93e+03 0 3390060 27034 0 35255 0.00 1.00 3.45 3.00 1.41 0.00 0.521 0.81 + 19: 8.70e+03 0 3365439 16478 0 35267 0.00 1.00 3.54 3.00 1.39 0.00 0.501 0.80 + 20: 8.58e+03 0 3244200 12634 0 32782 0.00 1.00 3.54 3.00 1.45 0.00 0.482 0.81 + 21: 7.96e+03 0 3322389 9434 0 32013 0.00 1.00 3.53 3.00 1.45 0.00 0.472 0.77 + 22: 7.68e+03 0 3198014 19034 0 31009 0.00 1.00 3.50 3.00 1.44 0.00 0.452 0.75 + 23: 7.44e+03 0 2893155 18394 0 30539 0.00 1.00 3.48 3.00 1.46 0.00 0.443 0.76 + 24: 7.00e+03 0 3173856 18074 0 29533 0.00 1.00 3.46 3.00 1.45 0.00 0.446 0.76 + 25: 7.42e+03 0 3098174 20006 0 28065 0.00 1.00 3.43 3.00 1.45 0.00 0.434 0.75 + 26: 7.38e+03 0 3094445 15514 0 29847 0.00 1.00 3.41 3.00 1.47 0.00 0.440 0.74 + 27: 7.18e+03 0 3191458 19674 0 28239 0.00 1.00 3.36 3.00 1.42 0.00 0.443 0.75 + 28: 7.72e+03 0 3077790 17758 0 29230 0.00 1.00 3.33 3.00 1.40 0.00 0.433 0.77 + 29: 7.00e+03 0 3098729 18074 0 30480 0.00 1.00 3.29 3.00 1.42 0.00 0.450 0.74 + 30: 6.86e+03 0 3193370 12310 0 29060 0.00 1.00 3.24 3.00 1.45 0.00 0.442 0.71 + 31: 6.96e+03 0 3130129 16162 0 27776 0.00 1.00 3.13 3.00 1.48 0.00 0.439 0.75 + 32: 6.80e+03 0 3178531 10398 0 28143 0.00 1.00 3.06 3.00 1.40 0.00 0.442 0.73 + 33: 6.85e+03 0 3127299 12314 0 28044 0.00 1.00 2.90 3.00 1.45 0.00 0.439 0.74 + 34: 6.63e+03 0 2941924 11358 0 26796 0.00 1.00 2.77 3.00 1.47 0.00 0.443 0.73 + 35: 6.41e+03 0 2984202 16474 0 26539 0.00 1.00 2.61 3.00 1.42 0.00 0.443 0.74 + 36: 7.28e+03 0 2954852 11998 0 26083 0.00 1.00 2.52 3.00 1.43 0.00 0.427 0.75 + 37: 6.69e+03 0 3072857 16482 0 26173 0.00 1.00 2.36 3.00 1.43 0.00 0.448 0.76 + 38: 6.62e+03 0 2880050 21274 0 26179 0.00 1.00 2.27 3.00 1.34 0.00 0.441 0.74 + 39: 7.07e+03 0 2953326 21274 0 25760 0.00 1.02 2.27 3.00 1.50 0.00 0.433 0.74 + 40: 6.86e+03 0 2943723 15510 0 27430 0.00 1.00 2.28 3.00 1.44 0.00 0.443 0.75 + 41: 6.37e+03 0 3030647 14878 0 26387 0.00 1.04 2.16 3.00 1.43 0.00 0.447 0.73 + 42: 6.41e+03 0 2956097 13270 0 25568 0.00 1.07 2.03 3.00 1.43 0.00 0.439 0.74 + 43: 6.12e+03 0 2916215 29594 0 25093 0.00 1.02 1.85 3.00 1.45 0.00 0.444 0.74 + 44: 5.95e+03 0 2836613 18718 0 25296 0.00 1.04 2.09 3.00 1.39 0.00 0.443 0.73 + 45: 6.49e+03 0 2848741 20314 0 23803 0.00 1.10 2.06 3.00 1.47 0.00 0.431 0.73 + 46: 6.37e+03 0 2813841 26394 0 25043 0.00 1.05 2.07 3.00 1.45 0.00 0.442 0.73 + 47: 6.24e+03 0 2776032 23518 0 24883 0.00 1.03 2.27 3.00 1.38 0.00 0.442 0.72 + 48: 5.98e+03 0 2751095 14558 0 24315 0.00 1.08 2.39 3.00 1.38 0.00 0.444 0.71 + 49: 5.84e+03 0 2810288 21918 0 23072 0.00 1.10 2.24 3.00 1.46 0.00 0.442 0.71 + 50: 6.32e+03 0 2763840 20954 0 22864 0.00 1.14 2.33 3.00 1.37 0.00 0.432 0.70 + 51: 5.75e+03 0 2826441 12958 0 23218 0.00 1.20 2.40 3.00 1.44 0.00 0.449 0.72 + 52: 5.67e+03 0 2601377 11674 0 23823 0.00 1.27 2.19 3.00 1.45 0.00 0.441 0.71 + 53: 5.43e+03 0 2781387 28634 0 23600 0.00 1.37 1.92 3.00 1.38 0.00 0.444 0.70 + 54: 5.77e+03 0 2530290 20318 0 21419 0.00 1.45 2.33 3.00 1.39 0.00 0.434 0.70 + 55: 5.53e+03 0 2654425 12314 0 21850 0.02 1.56 2.42 3.00 1.39 0.00 0.444 0.67 + 56: 5.49e+03 0 2656785 11678 0 20821 0.00 1.66 2.17 3.00 1.36 0.00 0.441 0.71 + 57: 5.43e+03 0 2584524 16158 0 21151 0.04 1.74 1.89 3.00 1.32 0.00 0.441 0.68 + 58: 5.08e+03 0 2508733 16474 0 21043 0.06 1.88 1.82 3.00 1.25 0.00 0.447 0.69 + 59: 5.00e+03 0 2616910 14558 0 19760 0.01 2.05 1.77 3.00 1.26 0.00 0.442 0.68 + 60: 5.29e+03 0 2483965 12638 0 20166 0.00 2.11 1.64 3.00 1.25 0.00 0.435 0.67 + 61: 4.69e+03 0 2566086 30874 0 20272 0.00 2.23 1.40 3.00 1.25 0.00 0.452 0.67 + 62: 4.98e+03 0 2521222 12958 0 18580 0.02 2.32 2.16 3.00 1.32 0.01 0.434 0.66 + 63: 4.85e+03 0 2469369 21598 0 18921 0.00 2.40 1.95 3.00 1.22 0.01 0.443 0.66 + 64: 4.78e+03 0 2619499 16790 0 18980 0.01 2.50 2.24 3.00 1.23 0.02 0.441 0.66 + 65: 4.77e+03 0 2443482 11030 0 17420 0.01 2.57 2.26 3.00 1.22 0.03 0.440 0.63 + 66: 4.51e+03 0 2410241 16158 0 17583 0.02 2.65 1.94 3.00 1.29 0.02 0.445 0.65 + 67: 4.65e+03 0 2372266 19682 0 17694 0.01 2.77 1.95 3.00 1.34 0.02 0.437 0.64 + 68: 4.21e+03 0 2364424 10714 0 17823 0.03 2.78 2.20 3.00 1.26 0.03 0.450 0.64 + 69: 4.36e+03 0 2264044 13918 0 17307 0.01 2.89 1.88 3.00 1.30 0.03 0.436 0.59 + 70: 4.23e+03 0 2240521 15830 0 15529 0.01 2.96 1.78 3.00 1.29 0.03 0.443 0.68 + 71: 4.13e+03 0 2254374 19682 0 15624 0.02 2.99 1.82 3.00 1.17 0.04 0.442 0.60 + 72: 4.19e+03 0 2194736 17758 0 16191 0.00 3.12 2.13 3.00 1.23 0.04 0.438 0.60 + 73: 4.31e+03 0 2151203 7506 0 15679 0.00 3.13 2.32 3.00 1.35 0.05 0.437 0.63 + 74: 4.04e+03 0 2210090 14238 0 15467 0.00 3.19 1.83 3.00 1.24 0.05 0.446 0.60 + 75: 4.01e+03 0 2150819 11354 0 16469 0.00 3.22 1.81 3.00 1.22 0.04 0.441 0.59 + 76: 3.91e+03 0 2136210 12954 0 14615 0.00 3.39 1.60 3.00 1.25 0.05 0.443 0.56 + 77: 3.76e+03 0 2114095 21594 0 14646 0.00 3.45 1.51 3.00 1.19 0.04 0.444 0.57 + 78: 3.81e+03 0 2200671 10398 0 13936 0.00 3.49 2.06 3.00 1.24 0.07 0.438 0.55 + 79: 3.81e+03 0 2106950 11674 0 13639 0.00 3.54 1.81 3.00 1.23 0.06 0.440 0.56 + 80: 3.73e+03 0 2003883 13278 0 14473 0.02 3.55 1.67 3.00 1.20 0.05 0.442 0.57 + 81: 3.55e+03 0 2109300 15514 0 13806 0.00 3.63 1.66 3.00 1.06 0.05 0.435 0.58 + 82: 3.33e+03 0 1951257 19674 0 13481 0.01 3.66 1.83 3.00 0.97 0.06 0.418 0.54 + 83: 3.29e+03 0 1851100 6866 0 12708 0.00 3.71 2.34 3.00 1.06 0.08 0.394 0.52 + 84: 3.11e+03 0 1949109 13598 0 12366 0.00 3.73 1.87 3.00 1.07 0.09 0.381 0.50 + 85: 2.88e+03 0 1878320 8794 0 11795 0.00 3.75 1.95 3.00 1.07 0.09 0.366 0.49 + 86: 2.76e+03 0 1834739 12958 0 11198 0.00 3.77 1.65 3.00 1.09 0.08 0.347 0.49 + 87: 2.84e+03 0 1755601 8794 0 11043 0.01 3.78 1.70 3.00 0.98 0.09 0.325 0.48 + 88: 2.73e+03 0 1682685 11354 0 11276 0.00 3.75 1.43 3.00 0.96 0.10 0.317 0.48 + 89: 2.44e+03 0 1658863 9438 0 11051 0.00 3.77 1.38 3.00 0.98 0.10 0.311 0.45 + 90: 2.37e+03 0 1560740 11986 0 10166 0.00 3.75 1.18 3.00 0.97 0.11 0.289 0.43 + 91: 2.35e+03 0 1552494 9110 0 9359 0.00 3.68 1.22 3.00 0.86 0.12 0.274 0.44 + 92: 2.11e+03 0 1504800 8790 0 9083 0.00 3.66 1.01 3.00 1.04 0.12 0.272 0.43 + 93: 2.12e+03 0 1491606 15510 0 8839 0.00 3.62 1.00 3.00 0.89 0.13 0.249 0.41 + 94: 2.05e+03 0 1462872 9750 0 8392 0.00 3.64 1.41 3.00 0.79 0.14 0.242 0.39 + 95: 1.90e+03 0 1412075 10074 0 8937 0.00 3.64 1.31 3.00 0.86 0.13 0.236 0.39 + 96: 1.92e+03 0 1442971 8798 0 8429 0.00 3.63 1.25 3.00 0.91 0.14 0.217 0.40 + 97: 1.81e+03 0 1386287 7834 0 7753 0.00 3.56 1.09 3.00 0.89 0.16 0.214 0.39 + 98: 1.66e+03 0 1425397 11678 0 7738 0.00 3.53 1.00 3.00 0.89 0.16 0.208 0.39 + 99: 1.70e+03 0 1361156 9754 0 7378 0.00 3.46 1.16 3.00 0.83 0.17 0.188 0.38 +100: 1.61e+03 0 1322762 9110 0 6835 0.01 3.40 1.14 3.00 0.85 0.20 0.187 0.35 +101: 1.53e+03 0 1311085 6862 0 7566 0.00 3.37 1.08 3.00 0.86 0.16 0.179 0.38 +102: 1.51e+03 0 1277758 10390 0 6799 0.00 3.32 1.00 3.00 0.81 0.19 0.168 0.38 +103: 1.33e+03 0 1267633 8794 0 6172 0.01 3.29 1.11 3.00 1.00 0.22 0.171 0.38 +104: 1.37e+03 0 1257010 8150 0 6358 0.00 3.23 1.07 3.00 0.75 0.23 0.149 0.36 +105: 1.33e+03 0 1251291 7518 0 5946 0.00 3.11 1.00 3.00 0.75 0.22 0.148 0.37 +106: 1.27e+03 0 1190086 12634 0 6198 0.00 3.05 1.00 3.00 0.72 0.20 0.144 0.35 +107: 1.20e+03 0 1150964 7186 0 5959 0.00 3.01 1.46 3.00 0.70 0.21 0.138 0.35 +108: 1.15e+03 0 1180041 6866 0 5349 0.02 2.95 1.32 3.00 0.64 0.27 0.131 0.35 +109: 1.13e+03 0 1163245 6874 0 5117 0.00 2.89 1.15 3.00 0.62 0.28 0.123 0.35 +110: 1.05e+03 0 1185747 9750 0 5080 0.00 2.78 1.00 3.00 0.62 0.26 0.124 0.36 +111: 1.01e+03 0 1121597 8474 0 4954 0.00 2.71 1.24 3.00 0.64 0.28 0.114 0.34 +112: 1.00e+03 0 1092047 7518 0 4729 0.01 2.64 1.34 3.00 0.82 0.28 0.106 0.36 +113: 9.34e+02 0 1138297 7510 0 4862 0.00 2.60 1.34 3.00 0.75 0.25 0.108 0.33 +114: 9.04e+02 0 1069150 7518 0 4756 0.00 2.57 1.36 3.00 0.76 0.27 0.100 0.34 +115: 9.03e+02 0 1081107 6870 0 4425 0.00 2.53 1.41 3.00 0.62 0.31 0.092 0.33 +116: 8.27e+02 0 1068867 7826 0 4186 0.00 2.53 1.41 3.00 0.67 0.30 0.097 0.33 +117: 8.07e+02 0 1065625 9114 0 4415 0.00 2.53 1.41 3.00 0.63 0.31 0.087 0.33 +118: 8.60e+02 0 1057602 7830 0 3553 0.01 2.53 1.41 3.00 0.54 0.42 0.074 0.32 +119: 8.07e+02 0 1056856 8158 0 4117 0.00 2.53 1.41 3.00 0.60 0.36 0.083 0.33 +120: 7.82e+02 0 1045689 8798 0 3865 0.00 2.53 1.41 3.00 0.54 0.37 0.077 0.35 +121: 7.33e+02 0 1030188 10070 0 4033 0.00 2.53 1.41 3.00 0.58 0.35 0.077 0.34 +122: 7.13e+02 0 1063255 10070 0 3388 0.01 2.53 1.41 3.00 0.49 0.44 0.070 0.33 +123: 7.34e+02 0 1052165 9434 0 3332 0.00 2.53 1.41 3.00 0.45 0.47 0.061 0.33 +124: 7.33e+02 0 1041454 7518 0 3306 0.01 2.53 1.41 3.00 0.51 0.49 0.061 0.34 +125: 7.43e+02 0 1041343 7186 0 3221 0.00 2.53 1.41 3.00 0.59 0.46 0.059 0.33 +126: 5.53e+02 0 1025931 7830 0 3737 0.00 2.53 1.41 3.00 0.55 0.43 0.060 0.34 +127: 6.23e+02 0 1023697 7830 0 3232 0.00 2.53 1.41 3.00 0.47 0.47 0.054 0.33 +128: 5.82e+02 0 1021080 8478 0 3097 0.00 2.53 1.41 3.00 0.60 0.50 0.053 0.35 +129: 6.05e+02 0 1005863 7830 0 3087 0.00 2.53 1.41 3.00 0.48 0.50 0.050 0.35 +130: 5.42e+02 0 998852 7834 0 3094 0.00 2.53 1.41 3.00 0.46 0.50 0.050 0.32 +131: 4.51e+02 0 999669 7194 0 3121 0.00 2.53 1.41 3.00 0.45 0.50 0.049 0.33 +132: 5.26e+02 0 996774 7830 0 2751 0.00 2.53 1.41 3.00 0.48 0.56 0.043 0.33 +133: 4.96e+02 0 1008344 7194 0 2437 0.00 2.53 1.41 3.00 0.45 0.59 0.043 0.34 +134: 4.80e+02 0 994440 7514 0 2776 0.00 2.53 1.41 3.00 0.44 0.55 0.041 0.34 +135: 5.21e+02 0 990007 7198 0 2407 0.00 2.53 1.41 3.00 0.33 0.62 0.038 0.33 +136: 4.33e+02 0 990536 6870 0 2210 0.00 2.53 1.41 3.00 0.41 0.63 0.039 0.35 +137: 3.94e+02 0 984856 7510 0 2468 0.00 2.53 1.41 3.00 0.47 0.60 0.036 0.32 +138: 3.99e+02 0 986451 7186 0 2864 0.00 2.53 1.41 3.00 0.36 0.55 0.033 0.32 +139: 3.62e+02 0 987904 7510 0 2326 0.00 2.53 1.41 3.00 0.34 0.63 0.032 0.33 +140: 3.82e+02 0 973753 6874 0 2262 0.00 2.53 1.41 3.00 0.34 0.64 0.028 0.34 +141: 3.83e+02 0 968287 6878 0 2120 0.00 2.53 1.41 3.00 0.43 0.66 0.027 0.33 +142: 3.40e+02 0 976442 6878 0 2425 0.00 2.53 1.41 3.00 0.34 0.62 0.026 0.34 +143: 3.00e+02 0 963816 7514 0 2114 0.00 2.53 1.41 3.00 0.39 0.65 0.024 0.35 +144: 3.30e+02 0 958082 7190 0 1825 0.00 2.53 1.41 3.00 0.41 0.68 0.020 0.34 +145: 3.14e+02 0 957794 6870 0 1962 0.00 2.53 1.41 3.00 0.48 0.67 0.019 0.34 +146: 2.46e+02 0 951190 6870 0 1771 0.00 2.53 1.41 3.00 0.44 0.67 0.019 0.34 +147: 2.52e+02 0 951470 6870 0 1597 0.00 2.53 1.41 3.00 0.62 0.69 0.015 0.35 +148: 2.24e+02 0 954783 6870 0 1549 0.00 2.53 1.41 3.00 0.41 0.70 0.014 0.34 +149: 1.90e+02 0 944940 6870 0 1485 0.00 2.53 1.41 3.00 0.59 0.70 0.013 0.34 +150: 1.62e+02 0 946130 6870 0 1355 0.00 2.53 1.41 3.00 0.30 0.70 0.011 0.33 +151: 1.32e+02 0 947765 6870 0 1188 0.00 2.53 1.41 3.00 0.47 0.71 0.009 0.32 +152: 1.01e+02 0 943448 6866 0 992 0.00 2.53 1.41 3.00 0.42 0.72 0.008 0.32 +153: 9.15e+01 0 942659 6866 0 814 0.00 2.53 1.41 3.00 0.56 0.73 0.004 0.33 +154: 7.37e+01 0 942350 6866 0 686 0.00 2.53 1.41 3.00 0.50 0.75 0.003 0.34 +155: 5.25e+01 0 939182 6866 0 563 0.00 2.53 1.41 3.00 0.56 0.76 0.003 0.33 +Total Wire Length - X-Component:533838 +Total Wire Length - Y-Component:477908 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23360 -1118 24478 + 2 24000 -478 24478 + 3 24320 -158 24478 + 4 24480 2 24478 + 5 24160 -318 24478 + 6 24160 -318 24478 + 7 24160 -318 24478 + 8 21760 -2718 24478 + 9 23040 -1438 24478 + +LONGEST Block is:4 Its length is:24480 +total penalty is 6866 +Removed the cell overlaps --- Will do neighbor interchanges only now + +TOTAL INTERCONNECT LENGTH: 1011746 +initialRowControl: 0.132 +finalRowControl: 0.024 +iter T Wire accept Time + 157 0.001 983369 5% 0 + 158 0.001 982179 1% 0 + 159 0.001 982009 1% 0 +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 253 + the number of switchable L segment = 151 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 259 + the number of switchable L segment = 200 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 578361 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-28 +reduction: -1058 total_red:-1058 +iterations : 4 +final total global wire : 577303 +final total time penalty: 0 + +Total global wire reduced by: 0.183% + +VERIFICATION +final total global wire : 577303 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 59 + + +no. of accepted flips: 320 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 50 + + +THIS G. ROUTING IS BEING SAVED AS BEST SO FAR + +FINAL NUMBER OF ROUTING TRACKS: 50 + +MAX OF CHANNEL: 1 is: 2 +MAX OF CHANNEL: 2 is: 5 +MAX OF CHANNEL: 3 is: 4 +MAX OF CHANNEL: 4 is: 10 +MAX OF CHANNEL: 5 is: 5 +MAX OF CHANNEL: 6 is: 7 +MAX OF CHANNEL: 7 is: 5 +MAX OF CHANNEL: 8 is: 7 +MAX OF CHANNEL: 9 is: 3 +MAX OF CHANNEL: 10 is: 2 +Confirming number of eliminated feeds:0 +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 257 + the number of switchable L segment = 155 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 257 + the number of switchable L segment = 197 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 574508 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-28 +reduction: -598 total_red:-598 +iterations : 4 +final total global wire : 573910 +final total time penalty: 0 + +Total global wire reduced by: 0.104% + +VERIFICATION +final total global wire : 573910 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 54 + + +no. of accepted flips: 477 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 49 + + +THIS G. ROUTING IS BEING SAVED AS BEST SO FAR + +FINAL NUMBER OF ROUTING TRACKS: 49 + +MAX OF CHANNEL: 1 is: 2 +MAX OF CHANNEL: 2 is: 5 +MAX OF CHANNEL: 3 is: 4 +MAX OF CHANNEL: 4 is: 9 +MAX OF CHANNEL: 5 is: 3 +MAX OF CHANNEL: 6 is: 8 +MAX OF CHANNEL: 7 is: 6 +MAX OF CHANNEL: 8 is: 6 +MAX OF CHANNEL: 9 is: 3 +MAX OF CHANNEL: 10 is: 3 +Confirming number of eliminated feeds:0 +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 257 + the number of switchable L segment = 155 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 256 + the number of switchable L segment = 196 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 577122 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-28 +reduction: -918 total_red:-918 +iterations : 4 +final total global wire : 576204 +final total time penalty: 0 + +Total global wire reduced by: 0.159% + +VERIFICATION +final total global wire : 576204 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 55 + + +no. of accepted flips: 403 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 49 + + +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +TimberWolfSC using absolute_minimum_feeds +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 223 + the number of switchable L segment = 129 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 226 + the number of switchable L segment = 164 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 706896 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-35 +reduction: -2260 total_red:-2260 +iterations : 4 +final total global wire : 704636 +final total time penalty: 0 + +Total global wire reduced by: 0.320% + +VERIFICATION +final total global wire : 704636 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 60 + + +no. of accepted flips: 3 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 60 + + +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 257 + the number of switchable L segment = 155 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 256 + the number of switchable L segment = 197 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 576960 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-28 +reduction: -1018 total_red:-1018 +iterations : 4 +final total global wire : 575942 +final total time penalty: 0 + +Total global wire reduced by: 0.176% + +VERIFICATION +final total global wire : 575942 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 57 + + +no. of accepted flips: 786 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 49 + + +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 257 + the number of switchable L segment = 155 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 256 + the number of switchable L segment = 196 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 582809 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-29 +reduction: -420 total_red:-420 +iterations : 4 +final total global wire : 582389 +final total time penalty: 0 + +Total global wire reduced by: 0.072% + +VERIFICATION +final total global wire : 582389 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 59 + + +no. of accepted flips: 424 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 50 + + +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 257 + the number of switchable L segment = 155 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 256 + the number of switchable L segment = 196 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 579480 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-28 +reduction: -378 total_red:-378 +iterations : 4 +final total global wire : 579102 +final total time penalty: 0 + +Total global wire reduced by: 0.065% + +VERIFICATION +final total global wire : 579102 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 55 + + +no. of accepted flips: 757 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 50 + + +Actual # of Feed Cells Added: 0 + + +TimberWolfSC did call even_the_rows() +TimberWolfSC using absolute_minimum_feeds +Total Wire Length - X-Component:504431 +Total Wire Length - Y-Component:477578 +Time Penalty:0 + the number of net = 228 + the number of tilted segment = 223 + the number of switchable L segment = 129 +Total Wire Length - X-Component:509151 +Total Wire Length - Y-Component:545627 +Time Penalty:0 +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET DESIRE + 1 23840 -638 24478 + 2 23520 -958 24478 + 3 23680 -798 24478 + 4 24000 -478 24478 + 5 23840 -638 24478 + 6 23680 -798 24478 + 7 23680 -798 24478 + 8 23680 -798 24478 + 9 23520 -958 24478 + +LONGEST Block is:4 Its length is:24000 + the number of tilted segment = 226 + the number of switchable L segment = 164 +After Feeds are Added: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Row is:4 Its length is:24000 +Divide-and-Conquer Subdivisions in LA:1 at row:5 +Eliminated 0 unused feeds in the longest row +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 + 2 23520 + 3 23680 + 4 24000 + 5 23840 + 6 23680 + 7 23680 + 8 23680 + 9 23520 + +LONGEST Row is:4 Its length is:24000 + +Actually added 0 gate array spacers + +row lengths after steiner trees: +BLOCK TOTAL CELL LENGTHS OVER/UNDER TARGET + 1 23840 -638 + 2 23520 -958 + 3 23680 -798 + 4 24000 -478 + 5 23840 -638 + 6 23680 -798 + 7 23680 -798 + 8 23680 -798 + 9 23520 -958 + +LONGEST Block is:4 Its length is:24000 +initial total global wire : 707155 +initial total timing penalty: 0 + + + +Steiner cell swap and rotation optimization +swap_limit:-35 +reduction: -2580 total_red:-2580 +iterations : 4 +final total global wire : 704575 +final total time penalty: 0 + +Total global wire reduced by: 0.365% + +VERIFICATION +final total global wire : 704575 +final total time penalty: 0 + + + + +THIS IS THE ORIGINAL NUMBER OF TRACKS: 61 + + +no. of accepted flips: 2 +no. of attempted flips: 5700 +THIS IS THE NUMBER OF TRACKS: 61 + + +Actual # of Feed Cells Added: 0 + + + + +*********************************************** +*ACTUAL* FINAL NUMBER OF ROUTING TRACKS: 49 +*********************************************** + +FINAL TOTAL INTERCONNECT LENGTH: 1054778 +FINAL OVERLAP PENALTY: 0 FINAL VALUE OF TOTAL COST IS: 1054778 +MAX NUMBER OF ATTEMPTED FLIPS PER T: 1075 + +Statistics: +Number of Cells: 329 +Number of Pads: 38 +Number of Nets: 228 +Number of Pins: 2085 +Number of PadGroups: 0 +Number of Implicit Feed Thrus: 1334 +Number of Feed Thrus Added: 0 +Feed Percentage: 0.00% +Average Row Separation: 0.54 + + +Runtime Statistics +------------------------- +Machine name: macbookair +Date : Sat Jul 21 10:52:11 2018 + +User time: 7.3 seconds +System time: 0.0 seconds +Elapsed time: 7.3 seconds + +Average resident text size = 0K +Average resident data+stack size = 0K +Maximum resident size = 2692K +Virtual memory size = -1985762868K +Virtual memory limit = 0K (0K) + +Major page faults = 0 +Minor page faults = 781 +Swaps = 0 + +Input blocks = 0 +Output blocks = 696 + +Context switch (voluntary) = 0 +Context switch (involuntary) = 568 + +TimberWolfSC terminated normally with no errors and 0 warning[s] + diff -Nru graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.pin graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.pin --- graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.pin 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.pin 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,1523 @@ +$abc$733$n76 2 INVX8_1 twfeed2 12321 9800 6 -1 1 +$abc$733$n76 1 INVX8_1 twfeed2 12321 7800 5 1 1 +$abc$733$n76 1 INVX8_1 Y 12321 7800 5 1 1 +$abc$733$n76 2 BUFX2_1 A 13441 9800 6 1 1 +$abc$733$n76 2 BUFX4_3 A 8951 9800 6 -1 1 +$abc$733$n76 2 BUFX4_2 A 8311 9800 6 -1 1 +$abc$733$n76 2 BUFX4_1 A 11191 9800 6 -1 1 +$abc$733$n76_bF$buf3 5 NAND3X1_1 twfeed3 9281 5800 4 -1 1 +$abc$733$n76_bF$buf3 3 NAND3X1_1 twfeed3 9281 3800 3 1 1 +$abc$733$n76_bF$buf3 7 AOI21X1_7 twfeed4 10561 9800 6 -1 1 +$abc$733$n76_bF$buf3 4 AOI21X1_7 twfeed4 10561 7800 5 1 1 +$abc$733$n76_bF$buf3 4 NOR2X1_13 twfeed3 10401 7800 5 -1 1 +$abc$733$n76_bF$buf3 5 NOR2X1_13 twfeed3 10401 5800 4 1 1 +$abc$733$n76_bF$buf3 3 INVX1_1 twfeed2 9281 3800 3 -1 1 +$abc$733$n76_bF$buf3 6 INVX1_1 twfeed2 9281 1800 2 1 1 +$abc$733$n76_bF$buf3 7 AOI21X1_7 $abc$733$n76_bF$pin/A 10161 9800 6 -1 1 +$abc$733$n76_bF$buf3 5 AND2X2_1 $abc$733$n76_bF$pin/A 8961 5800 4 -1 1 +$abc$733$n76_bF$buf3 3 NAND3X1_1 $abc$733$n76_bF$pin/C 9281 3800 3 1 1 +$abc$733$n76_bF$buf3 6 NAND3X1_8 $abc$733$n76_bF$pin/B 9081 1800 2 -1 1 +$abc$733$n76_bF$buf3 5 NOR2X1_13 $abc$733$n76_bF$pin/B 10401 5800 4 1 1 +$abc$733$n76_bF$buf3 7 BUFX4_1 Y 10872 9800 6 -1 1 +$abc$733$n76_bF$buf2 10 OAI21X1_6 twfeed2 6081 9800 6 -1 1 +$abc$733$n76_bF$buf2 8 OAI21X1_6 twfeed2 6081 7800 5 1 1 +$abc$733$n76_bF$buf2 8 OAI21X1_10 twfeed2 6081 7800 5 -1 1 +$abc$733$n76_bF$buf2 9 OAI21X1_10 twfeed2 6081 5800 4 1 1 +$abc$733$n76_bF$buf2 10 OAI21X1_6 $abc$733$n76_bF$pin/B 6081 9800 6 -1 1 +$abc$733$n76_bF$buf2 9 OAI21X1_11 $abc$733$n76_bF$pin/B 5281 5800 4 1 1 +$abc$733$n76_bF$buf2 9 OAI21X1_10 $abc$733$n76_bF$pin/B 6081 5800 4 1 1 +$abc$733$n76_bF$buf2 9 AOI21X1_8 $abc$733$n76_bF$pin/A 3921 5800 4 1 1 +$abc$733$n76_bF$buf2 10 AOI21X1_13 $abc$733$n76_bF$pin/A 6641 9800 6 -1 1 +$abc$733$n76_bF$buf2 10 BUFX4_2 Y 7992 9800 6 -1 1 +$abc$733$n76_bF$buf1 15 OAI21X1_7 twfeed1 8641 13800 8 -1 1 +$abc$733$n76_bF$buf1 11 OAI21X1_7 twfeed1 8641 11800 7 1 1 +$abc$733$n76_bF$buf1 14 DFFSR_26 twfeed11 6721 13800 8 -1 1 +$abc$733$n76_bF$buf1 12 DFFSR_26 twfeed11 6721 11800 7 1 1 +$abc$733$n76_bF$buf1 11 DFFSR_24 twfeed15 8641 11800 7 -1 1 +$abc$733$n76_bF$buf1 13 DFFSR_24 twfeed15 8641 9800 6 1 1 +$abc$733$n76_bF$buf1 12 DFFSR_24 twfeed22 7521 11800 7 -1 1 +$abc$733$n76_bF$buf1 13 DFFSR_24 twfeed22 7521 9800 6 1 1 +$abc$733$n76_bF$buf1 15 OAI21X1_7 $abc$733$n76_bF$pin/B 8801 13800 8 -1 1 +$abc$733$n76_bF$buf1 14 AOI21X1_4 $abc$733$n76_bF$pin/A 6801 13800 8 1 1 +$abc$733$n76_bF$buf1 13 OAI21X1_30 $abc$733$n76_bF$pin/B 7521 9800 6 -1 1 +$abc$733$n76_bF$buf1 13 AOI21X1_9 $abc$733$n76_bF$pin/A 7281 9800 6 1 1 +$abc$733$n76_bF$buf1 15 AOI21X1_5 $abc$733$n76_bF$pin/A 9201 13800 8 1 1 +$abc$733$n76_bF$buf1 13 BUFX4_3 Y 8632 9800 6 -1 1 +$abc$733$n76_bF$buf0 18 OAI21X1_8 twfeed2 13921 13800 8 -1 1 +$abc$733$n76_bF$buf0 16 OAI21X1_8 twfeed2 13921 11800 7 1 1 +$abc$733$n76_bF$buf0 17 OAI21X1_1 $abc$733$n76_bF$pin/A 14961 9800 6 1 1 +$abc$733$n76_bF$buf0 18 AOI21X1_6 $abc$733$n76_bF$pin/A 14801 13800 8 -1 1 +$abc$733$n76_bF$buf0 17 OAI21X1_9 $abc$733$n76_bF$pin/B 14241 9800 6 1 1 +$abc$733$n76_bF$buf0 18 OAI21X1_8 $abc$733$n76_bF$pin/B 13921 13800 8 -1 1 +$abc$733$n76_bF$buf0 16 BUFX2_1 Y 13771 11800 7 -1 1 +$abc$733$n76_bF$buf0 17 BUFX2_1 Y 13771 9800 6 1 1 +$abc$733$n164 28 INVX8_2 twfeed2 4641 17800 10 -1 1 +$abc$733$n164 19 INVX8_2 twfeed2 4641 15800 9 1 1 +$abc$733$n164 19 DFFSR_14 twfeed21 4801 15800 9 -1 1 +$abc$733$n164 20 DFFSR_14 twfeed21 4801 13800 8 1 1 +$abc$733$n164 29 BUFX4_6 twfeed1 13121 13800 8 -1 1 +$abc$733$n164 21 BUFX4_6 twfeed1 13121 11800 7 1 1 +$abc$733$n164 20 MUX2X1_5 twfeed2 4801 13800 8 -1 1 +$abc$733$n164 22 MUX2X1_5 twfeed2 4801 11800 7 1 1 +$abc$733$n164 21 BUFX4_7 twfeed3 13121 11800 7 -1 1 +$abc$733$n164 23 BUFX4_7 twfeed3 13121 9800 6 1 1 +$abc$733$n164 22 DFFSR_31 twfeed10 4801 11800 7 -1 1 +$abc$733$n164 24 DFFSR_31 twfeed10 4801 9800 6 1 1 +$abc$733$n164 23 DFFSR_4 twfeed21 12801 9800 6 -1 1 +$abc$733$n164 25 DFFSR_4 twfeed21 12801 7800 5 1 1 +$abc$733$n164 24 DFFSR_25 twfeed7 4801 9800 6 -1 1 +$abc$733$n164 25 DFFSR_25 twfeed7 4801 7800 5 1 1 +$abc$733$n164 25 BUFX2_8 twfeed2 12801 7800 5 -1 1 +$abc$733$n164 26 BUFX2_8 twfeed2 12801 5800 4 1 1 +$abc$733$n164 25 BUFX4_4 twfeed2 4801 7800 5 -1 1 +$abc$733$n164 27 BUFX4_4 twfeed2 4801 5800 4 1 1 +$abc$733$n164 19 INVX8_2 Y 4641 15800 9 1 1 +$abc$733$n164 26 BUFX4_8 A 11831 5800 4 1 1 +$abc$733$n164 23 BUFX4_7 A 12811 9800 6 1 1 +$abc$733$n164 29 BUFX4_6 A 13131 13800 8 -1 1 +$abc$733$n164 28 BUFX4_5 A 3831 17800 10 -1 1 +$abc$733$n164 27 BUFX4_4 A 4951 5800 4 1 1 +$abc$733$n164_bF$buf4 33 OAI21X1_2 twfeed2 4641 3800 3 -1 1 +$abc$733$n164_bF$buf4 30 OAI21X1_2 twfeed2 4641 1800 2 1 1 +$abc$733$n164_bF$buf4 34 DFFSR_25 twfeed5 5121 9800 6 -1 1 +$abc$733$n164_bF$buf4 31 DFFSR_25 twfeed5 5121 7800 5 1 1 +$abc$733$n164_bF$buf4 31 OAI21X1_11 twfeed1 5121 7800 5 -1 1 +$abc$733$n164_bF$buf4 32 OAI21X1_11 twfeed1 5121 5800 4 1 1 +$abc$733$n164_bF$buf4 32 DFFSR_30 twfeed2 4641 5800 4 -1 1 +$abc$733$n164_bF$buf4 33 DFFSR_30 twfeed2 4641 3800 3 1 1 +$abc$733$n164_bF$buf4 34 DFFSR_25 $abc$733$n164_bF$pin/R 5121 9800 6 -1 1 +$abc$733$n164_bF$buf4 30 DFFSR_32 $abc$733$n164_bF$pin/R 2561 1800 2 -1 1 +$abc$733$n164_bF$buf4 32 DFFSR_30 $abc$733$n164_bF$pin/R 4161 5800 4 -1 1 +$abc$733$n164_bF$buf4 32 DFFSR_13 $abc$733$n164_bF$pin/R 3041 5800 4 1 1 +$abc$733$n164_bF$buf4 33 DFFSR_1 $abc$733$n164_bF$pin/S 6421 3800 3 -1 1 +$abc$733$n164_bF$buf4 30 DFFSR_2 $abc$733$n164_bF$pin/R 3361 1800 2 1 1 +$abc$733$n164_bF$buf4 30 DFFSR_15 $abc$733$n164_bF$pin/R 4481 1800 2 -1 1 +$abc$733$n164_bF$buf4 32 BUFX4_4 Y 4632 5800 4 1 1 +$abc$733$n164_bF$buf3 38 DFFSR_14 twfeed7 2561 15800 9 -1 1 +$abc$733$n164_bF$buf3 35 DFFSR_14 twfeed7 2561 13800 8 1 1 +$abc$733$n164_bF$buf3 35 DFFSR_12 twfeed7 2721 13800 8 -1 1 +$abc$733$n164_bF$buf3 36 DFFSR_12 twfeed7 2721 11800 7 1 1 +$abc$733$n164_bF$buf3 40 DFFSR_27 twfeed4 5761 17800 10 -1 1 +$abc$733$n164_bF$buf3 37 DFFSR_27 twfeed4 5761 15800 9 1 1 +$abc$733$n164_bF$buf3 41 DFFSR_9 twfeed5 2561 17800 10 -1 1 +$abc$733$n164_bF$buf3 38 DFFSR_9 twfeed5 2561 15800 9 1 1 +$abc$733$n164_bF$buf3 37 MUX2X1_7 twfeed4 5761 15800 9 -1 1 +$abc$733$n164_bF$buf3 35 MUX2X1_7 twfeed4 5761 13800 8 1 1 +$abc$733$n164_bF$buf3 36 DFFSR_8 twfeed5 2561 11800 7 -1 1 +$abc$733$n164_bF$buf3 39 DFFSR_8 twfeed5 2561 9800 6 1 1 +$abc$733$n164_bF$buf3 35 DFFSR_26 $abc$733$n164_bF$pin/R 5761 13800 8 -1 1 +$abc$733$n164_bF$buf3 41 DFFSR_9 $abc$733$n164_bF$pin/R 2561 17800 10 -1 1 +$abc$733$n164_bF$buf3 35 DFFSR_14 $abc$733$n164_bF$pin/R 2241 13800 8 1 1 +$abc$733$n164_bF$buf3 39 DFFSR_31 $abc$733$n164_bF$pin/R 4001 9800 6 1 1 +$abc$733$n164_bF$buf3 40 DFFSR_27 $abc$733$n164_bF$pin/R 5921 17800 10 -1 1 +$abc$733$n164_bF$buf3 35 DFFSR_12 $abc$733$n164_bF$pin/R 3041 13800 8 -1 1 +$abc$733$n164_bF$buf3 39 DFFSR_8 $abc$733$n164_bF$pin/R 2561 9800 6 1 1 +$abc$733$n164_bF$buf3 41 BUFX4_5 Y 3512 17800 10 -1 1 +$abc$733$n164_bF$buf2 47 DFFSR_6 twfeed5 19521 17800 10 -1 1 +$abc$733$n164_bF$buf2 42 DFFSR_6 twfeed5 19521 15800 9 1 1 +$abc$733$n164_bF$buf2 48 DFFSR_11 twfeed7 17761 17800 10 -1 1 +$abc$733$n164_bF$buf2 42 DFFSR_11 twfeed7 17761 15800 9 1 1 +$abc$733$n164_bF$buf2 49 DFFSR_10 twfeed4 13441 17800 10 -1 1 +$abc$733$n164_bF$buf2 43 DFFSR_10 twfeed4 13441 15800 9 1 1 +$abc$733$n164_bF$buf2 42 AOI21X1_2 twfeed3 20321 15800 9 -1 1 +$abc$733$n164_bF$buf2 44 AOI21X1_2 twfeed3 20321 13800 8 1 1 +$abc$733$n164_bF$buf2 42 DFFSR_23 twfeed3 19681 15800 9 -1 1 +$abc$733$n164_bF$buf2 45 DFFSR_23 twfeed3 19681 13800 8 1 1 +$abc$733$n164_bF$buf2 42 DFFSR_23 twfeed15 17761 15800 9 -1 1 +$abc$733$n164_bF$buf2 46 DFFSR_23 twfeed15 17761 13800 8 1 1 +$abc$733$n164_bF$buf2 43 BUFX2_33 twfeed3 13441 15800 9 -1 1 +$abc$733$n164_bF$buf2 46 BUFX2_33 twfeed3 13441 13800 8 1 1 +$abc$733$n164_bF$buf2 45 DFFSR_23 $abc$733$n164_bF$pin/R 19361 13800 8 1 1 +$abc$733$n164_bF$buf2 48 DFFSR_11 $abc$733$n164_bF$pin/R 18081 17800 10 -1 1 +$abc$733$n164_bF$buf2 46 DFFSR_28 $abc$733$n164_bF$pin/R 17761 13800 8 -1 1 +$abc$733$n164_bF$buf2 49 DFFSR_10 $abc$733$n164_bF$pin/R 13281 17800 10 -1 1 +$abc$733$n164_bF$buf2 47 DFFSR_6 $abc$733$n164_bF$pin/R 19521 17800 10 -1 1 +$abc$733$n164_bF$buf2 44 DFFSR_7 $abc$733$n164_bF$pin/R 20321 13800 8 -1 1 +$abc$733$n164_bF$buf2 46 BUFX4_6 Y 13450 13800 8 -1 1 +$abc$733$n164_bF$buf1 54 OAI22X1_2 twfeed1 20161 9800 6 -1 1 +$abc$733$n164_bF$buf1 50 OAI22X1_2 twfeed1 20161 7800 5 1 1 +$abc$733$n164_bF$buf1 53 AOI21X1_7 twfeed2 10241 9800 6 -1 1 +$abc$733$n164_bF$buf1 50 AOI21X1_7 twfeed2 10241 7800 5 1 1 +$abc$733$n164_bF$buf1 50 OAI21X1_24 twfeed2 20161 7800 5 -1 1 +$abc$733$n164_bF$buf1 51 OAI21X1_24 twfeed2 20161 5800 4 1 1 +$abc$733$n164_bF$buf1 50 INVX4_1 twfeed1 10241 7800 5 -1 1 +$abc$733$n164_bF$buf1 52 INVX4_1 twfeed1 10241 5800 4 1 1 +$abc$733$n164_bF$buf1 53 DFFSR_24 $abc$733$n164_bF$pin/R 10241 9800 6 1 1 +$abc$733$n164_bF$buf1 54 DFFSR_20 $abc$733$n164_bF$pin/R 20641 9800 6 1 1 +$abc$733$n164_bF$buf1 52 DFFSR_16 $abc$733$n164_bF$pin/R 5601 5800 4 -1 1 +$abc$733$n164_bF$buf1 51 DFFSR_21 $abc$733$n164_bF$pin/R 20001 5800 4 -1 1 +$abc$733$n164_bF$buf1 52 DFFSR_29 $abc$733$n164_bF$pin/R 9121 5800 4 1 1 +$abc$733$n164_bF$buf1 54 DFFSR_22 $abc$733$n164_bF$pin/R 19201 9800 6 1 1 +$abc$733$n164_bF$buf1 53 BUFX4_7 Y 13130 9800 6 1 1 +$abc$733$n164_bF$buf0 58 INVX1_22 twfeed1 12321 5800 4 -1 1 +$abc$733$n164_bF$buf0 55 INVX1_22 twfeed1 12321 3800 3 1 1 +$abc$733$n164_bF$buf0 59 DFFSR_17 twfeed8 15361 3800 3 -1 1 +$abc$733$n164_bF$buf0 56 DFFSR_17 twfeed8 15361 1800 2 1 1 +$abc$733$n164_bF$buf0 61 DFFSR_4 twfeed5 15361 9800 6 -1 1 +$abc$733$n164_bF$buf0 57 DFFSR_4 twfeed5 15361 7800 5 1 1 +$abc$733$n164_bF$buf0 57 NOR2X1_18 twfeed2 15361 7800 5 -1 1 +$abc$733$n164_bF$buf0 58 NOR2X1_18 twfeed2 15361 5800 4 1 1 +$abc$733$n164_bF$buf0 58 DFFSR_19 twfeed16 15361 5800 4 -1 1 +$abc$733$n164_bF$buf0 59 DFFSR_19 twfeed16 15361 3800 3 1 1 +$abc$733$n164_bF$buf0 55 DFFSR_3 twfeed5 12321 3800 3 -1 1 +$abc$733$n164_bF$buf0 60 DFFSR_3 twfeed5 12321 1800 2 1 1 +$abc$733$n164_bF$buf0 56 DFFSR_17 $abc$733$n164_bF$pin/R 15841 1800 2 1 1 +$abc$733$n164_bF$buf0 58 DFFSR_19 $abc$733$n164_bF$pin/R 13601 5800 4 -1 1 +$abc$733$n164_bF$buf0 61 DFFSR_4 $abc$733$n164_bF$pin/R 15361 9800 6 -1 1 +$abc$733$n164_bF$buf0 56 DFFSR_18 $abc$733$n164_bF$pin/R 15361 1800 2 -1 1 +$abc$733$n164_bF$buf0 60 DFFSR_3 $abc$733$n164_bF$pin/R 12321 1800 2 1 1 +$abc$733$n164_bF$buf0 60 DFFSR_5 $abc$733$n164_bF$pin/R 12481 1800 2 -1 1 +$abc$733$n164_bF$buf0 58 BUFX4_8 Y 11512 5800 4 1 1 +clock 67 BUFX2_4 twfeed1 9121 17800 10 -1 1 +clock 62 BUFX2_4 twfeed1 9121 15800 9 1 1 +clock 62 AOI21X1_5 twfeed2 9121 15800 9 -1 1 +clock 63 AOI21X1_5 twfeed2 9121 13800 8 1 1 +clock 68 DFFSR_28 twfeed21 15201 13800 8 -1 1 +clock 64 DFFSR_28 twfeed21 15201 11800 7 1 1 +clock 63 OAI21X1_7 twfeed4 9121 13800 8 -1 1 +clock 65 OAI21X1_7 twfeed4 9121 11800 7 1 1 +clock 64 BUFX2_3 twfeed1 15201 11800 7 -1 1 +clock 66 BUFX2_3 twfeed1 15201 9800 6 1 1 +clock 65 DFFSR_24 twfeed12 9121 11800 7 -1 1 +clock 66 DFFSR_24 twfeed12 9121 9800 6 1 1 +clock 67 twpin_clock clock 9121 18100 -4 1 1 +clock 67 PSEUDO_CELL PSEUDO_PIN 9121 17801 10 1 0 +clock 67 PSEUDO_CELL PSEUDO_PIN 9121 17801 -4 -1 0 +clock 68 BUFX2_6 A 15201 13800 8 1 1 +clock 66 BUFX2_5 A 9441 9800 6 -1 1 +clock 67 BUFX2_4 A 9121 17800 10 -1 1 +clock 66 BUFX2_3 A 15201 9800 6 1 1 +clock 66 BUFX2_2 A 11361 9800 6 -1 1 +clock_bF$buf4 73 DFFSR_2 twfeed11 2401 3800 3 -1 1 +clock_bF$buf4 69 DFFSR_2 twfeed11 2401 1800 2 1 1 +clock_bF$buf4 73 AND2X2_5 twfeed3 5441 3800 3 -1 1 +clock_bF$buf4 70 AND2X2_5 twfeed3 5441 1800 2 1 1 +clock_bF$buf4 76 BUFX4_8 twfeed1 11841 7800 5 -1 1 +clock_bF$buf4 71 BUFX4_8 twfeed1 11841 5800 4 1 1 +clock_bF$buf4 71 NOR2X1_15 twfeed1 11361 5800 4 -1 1 +clock_bF$buf4 72 NOR2X1_15 twfeed1 11361 3800 3 1 1 +clock_bF$buf4 75 DFFSR_30 twfeed18 2081 5800 4 -1 1 +clock_bF$buf4 73 DFFSR_30 twfeed18 2081 3800 3 1 1 +clock_bF$buf4 72 DFFSR_3 twfeed11 11361 3800 3 -1 1 +clock_bF$buf4 70 DFFSR_3 twfeed11 11361 1800 2 1 1 +clock_bF$buf4 73 DFFSR_2 twfeed16 1601 3800 3 -1 1 +clock_bF$buf4 74 DFFSR_2 twfeed16 1601 1800 2 1 1 +clock_bF$buf4 70 DFFSR_15 clock_bF$pin/CLK 5480 1800 2 -1 1 +clock_bF$buf4 70 DFFSR_3 clock_bF$pin/CLK 11322 1800 2 1 1 +clock_bF$buf4 70 DFFSR_1 clock_bF$pin/CLK 7400 1800 2 1 1 +clock_bF$buf4 75 DFFSR_13 clock_bF$pin/CLK 2042 5800 4 1 1 +clock_bF$buf4 69 DFFSR_2 clock_bF$pin/CLK 2362 1800 2 1 1 +clock_bF$buf4 74 DFFSR_32 clock_bF$pin/CLK 1562 1800 2 -1 1 +clock_bF$buf4 70 DFFSR_5 clock_bF$pin/CLK 11482 1800 2 -1 1 +clock_bF$buf4 76 BUFX2_2 Y 11691 7800 5 1 1 +clock_bF$buf3 84 DFFSR_4 twfeed10 14561 9800 6 -1 1 +clock_bF$buf3 77 DFFSR_4 twfeed10 14561 7800 5 1 1 +clock_bF$buf3 85 DFFSR_20 twfeed7 20961 11800 7 -1 1 +clock_bF$buf3 78 DFFSR_20 twfeed7 20961 9800 6 1 1 +clock_bF$buf3 78 NOR2X1_20 twfeed1 20961 9800 6 -1 1 +clock_bF$buf3 79 NOR2X1_20 twfeed1 20961 7800 5 1 1 +clock_bF$buf3 79 OAI21X1_25 twfeed2 20961 7800 5 -1 1 +clock_bF$buf3 80 OAI21X1_25 twfeed2 20961 5800 4 1 1 +clock_bF$buf3 77 NAND2X1_2 twfeed1 14561 7800 5 -1 1 +clock_bF$buf3 81 NAND2X1_2 twfeed1 14561 5800 4 1 1 +clock_bF$buf3 81 DFFSR_19 twfeed13 14881 5800 4 -1 1 +clock_bF$buf3 82 DFFSR_19 twfeed13 14881 3800 3 1 1 +clock_bF$buf3 82 DFFSR_17 twfeed11 14881 3800 3 -1 1 +clock_bF$buf3 83 DFFSR_17 twfeed11 14881 1800 2 1 1 +clock_bF$buf3 80 DFFSR_21 clock_bF$pin/CLK 21000 5800 4 -1 1 +clock_bF$buf3 84 DFFSR_22 clock_bF$pin/CLK 18202 9800 6 1 1 +clock_bF$buf3 83 DFFSR_17 clock_bF$pin/CLK 14842 1800 2 1 1 +clock_bF$buf3 78 DFFSR_20 clock_bF$pin/CLK 21640 9800 6 1 1 +clock_bF$buf3 84 DFFSR_4 clock_bF$pin/CLK 14362 9800 6 -1 1 +clock_bF$buf3 83 DFFSR_18 clock_bF$pin/CLK 16360 1800 2 -1 1 +clock_bF$buf3 81 DFFSR_19 clock_bF$pin/CLK 14600 5800 4 -1 1 +clock_bF$buf3 85 BUFX2_3 Y 15531 11800 7 -1 1 +clock_bF$buf3 84 BUFX2_3 Y 15531 9800 6 1 1 +clock_bF$buf2 89 DFFSR_12 twfeed14 1601 13800 8 -1 1 +clock_bF$buf2 86 DFFSR_12 twfeed14 1601 11800 7 1 1 +clock_bF$buf2 92 DFFSR_27 twfeed11 6881 17800 10 -1 1 +clock_bF$buf2 87 DFFSR_27 twfeed11 6881 15800 9 1 1 +clock_bF$buf2 91 DFFSR_12 twfeed4 3201 13800 8 -1 1 +clock_bF$buf2 86 DFFSR_12 twfeed4 3201 11800 7 1 1 +clock_bF$buf2 93 DFFSR_9 twfeed11 1601 17800 10 -1 1 +clock_bF$buf2 87 DFFSR_9 twfeed11 1601 15800 9 1 1 +clock_bF$buf2 87 AOI21X1_4 twfeed1 6881 15800 9 -1 1 +clock_bF$buf2 88 AOI21X1_4 twfeed1 6881 13800 8 1 1 +clock_bF$buf2 87 DFFSR_14 twfeed1 1601 15800 9 -1 1 +clock_bF$buf2 89 DFFSR_14 twfeed1 1601 13800 8 1 1 +clock_bF$buf2 86 DFFSR_8 twfeed11 1601 11800 7 -1 1 +clock_bF$buf2 90 DFFSR_8 twfeed11 1601 9800 6 1 1 +clock_bF$buf2 93 DFFSR_9 clock_bF$pin/CLK 1562 17800 10 -1 1 +clock_bF$buf2 89 DFFSR_12 clock_bF$pin/CLK 2042 13800 8 -1 1 +clock_bF$buf2 91 DFFSR_14 clock_bF$pin/CLK 3240 13800 8 1 1 +clock_bF$buf2 88 DFFSR_26 clock_bF$pin/CLK 6760 13800 8 -1 1 +clock_bF$buf2 92 DFFSR_27 clock_bF$pin/CLK 6920 17800 10 -1 1 +clock_bF$buf2 90 DFFSR_8 clock_bF$pin/CLK 1562 9800 6 1 1 +clock_bF$buf2 92 BUFX2_4 Y 8791 17800 10 -1 1 +clock_bF$buf1 100 DFFSR_25 twfeed11 4161 9800 6 -1 1 +clock_bF$buf1 94 DFFSR_25 twfeed11 4161 7800 5 1 1 +clock_bF$buf1 97 DFFSR_25 twfeed6 4961 9800 6 -1 1 +clock_bF$buf1 94 DFFSR_25 twfeed6 4961 7800 5 1 1 +clock_bF$buf1 99 DFFSR_29 twfeed5 9121 7800 5 -1 1 +clock_bF$buf1 95 DFFSR_29 twfeed5 9121 5800 4 1 1 +clock_bF$buf1 94 BUFX4_4 twfeed1 4961 7800 5 -1 1 +clock_bF$buf1 95 BUFX4_4 twfeed1 4961 5800 4 1 1 +clock_bF$buf1 94 AOI21X1_8 twfeed2 4001 7800 5 -1 1 +clock_bF$buf1 96 AOI21X1_8 twfeed2 4001 5800 4 1 1 +clock_bF$buf1 95 DFFSR_29 clock_bF$pin/CLK 8122 5800 4 1 1 +clock_bF$buf1 97 DFFSR_31 clock_bF$pin/CLK 5000 9800 6 1 1 +clock_bF$buf1 95 DFFSR_16 clock_bF$pin/CLK 6600 5800 4 -1 1 +clock_bF$buf1 100 DFFSR_25 clock_bF$pin/CLK 4122 9800 6 -1 1 +clock_bF$buf1 96 DFFSR_30 clock_bF$pin/CLK 3162 5800 4 -1 1 +clock_bF$buf1 98 DFFSR_24 clock_bF$pin/CLK 9242 9800 6 1 1 +clock_bF$buf1 98 BUFX2_5 Y 9111 9800 6 -1 1 +clock_bF$buf1 99 BUFX2_5 Y 9111 7800 5 1 1 +clock_bF$buf0 102 AOI21X1_2 twfeed2 20481 15800 9 -1 1 +clock_bF$buf0 101 AOI21X1_2 twfeed2 20481 13800 8 1 1 +clock_bF$buf0 106 DFFSR_6 twfeed11 20481 17800 10 -1 1 +clock_bF$buf0 102 DFFSR_6 twfeed11 20481 15800 9 1 1 +clock_bF$buf0 106 DFFSR_11 twfeed11 17121 17800 10 -1 1 +clock_bF$buf0 103 DFFSR_11 twfeed11 17121 15800 9 1 1 +clock_bF$buf0 107 DFFSR_10 twfeed11 12321 17800 10 -1 1 +clock_bF$buf0 104 DFFSR_10 twfeed11 12321 15800 9 1 1 +clock_bF$buf0 103 DFFSR_23 twfeed19 17121 15800 9 -1 1 +clock_bF$buf0 105 DFFSR_23 twfeed19 17121 13800 8 1 1 +clock_bF$buf0 106 DFFSR_6 clock_bF$pin/CLK 20520 17800 10 -1 1 +clock_bF$buf0 106 DFFSR_11 clock_bF$pin/CLK 17082 17800 10 -1 1 +clock_bF$buf0 105 DFFSR_23 clock_bF$pin/CLK 18362 13800 8 1 1 +clock_bF$buf0 101 DFFSR_7 clock_bF$pin/CLK 21320 13800 8 -1 1 +clock_bF$buf0 107 DFFSR_10 clock_bF$pin/CLK 12282 17800 10 -1 1 +clock_bF$buf0 105 DFFSR_28 clock_bF$pin/CLK 16762 13800 8 -1 1 +clock_bF$buf0 104 BUFX2_6 Y 15531 15800 9 -1 1 +clock_bF$buf0 105 BUFX2_6 Y 15531 13800 8 1 1 +$abc$733$n75_1 111 DFFSR_4 twfeed22 12641 9800 6 -1 1 +$abc$733$n75_1 108 DFFSR_4 twfeed22 12641 7800 5 1 1 +$abc$733$n75_1 112 BUFX2_10 twfeed1 9921 9800 6 -1 1 +$abc$733$n75_1 109 BUFX2_10 twfeed1 9921 7800 5 1 1 +$abc$733$n75_1 108 BUFX2_8 twfeed1 12641 7800 5 -1 1 +$abc$733$n75_1 110 BUFX2_8 twfeed1 12641 5800 4 1 1 +$abc$733$n75_1 109 INVX4_1 Y 10081 7800 5 -1 1 +$abc$733$n75_1 110 INVX4_1 Y 10081 5800 4 1 1 +$abc$733$n75_1 112 BUFX2_10 A 9921 9800 6 -1 1 +$abc$733$n75_1 110 BUFX2_9 A 11201 5800 4 1 1 +$abc$733$n75_1 110 BUFX2_8 A 12641 5800 4 1 1 +$abc$733$n75_1 111 BUFX2_7 A 12641 9800 6 1 1 +$abc$733$n75_1_bF$buf3 113 OAI21X1_8 $abc$733$n75_1_bF$pin/C 14161 11800 7 1 1 +$abc$733$n75_1_bF$buf3 113 OAI21X1_9 $abc$733$n75_1_bF$pin/C 14001 11800 7 -1 1 +$abc$733$n75_1_bF$buf3 113 OAI21X1_1 $abc$733$n75_1_bF$pin/C 14641 11800 7 -1 1 +$abc$733$n75_1_bF$buf3 113 OAI21X1_7 $abc$733$n75_1_bF$pin/C 9041 11800 7 1 1 +$abc$733$n75_1_bF$buf3 113 OAI21X1_5 $abc$733$n75_1_bF$pin/C 11761 11800 7 -1 1 +$abc$733$n75_1_bF$buf3 113 BUFX2_7 Y 12311 11800 7 -1 1 +$abc$733$n75_1_bF$buf2 115 OAI21X1_24 twfeed4 20481 7800 5 -1 1 +$abc$733$n75_1_bF$buf2 114 OAI21X1_24 twfeed4 20481 5800 4 1 1 +$abc$733$n75_1_bF$buf2 114 OAI21X1_25 $abc$733$n75_1_bF$pin/A 21041 5800 4 1 1 +$abc$733$n75_1_bF$buf2 114 OAI21X1_20 $abc$733$n75_1_bF$pin/A 19121 5800 4 -1 1 +$abc$733$n75_1_bF$buf2 114 NAND2X1_10 $abc$733$n75_1_bF$pin/A 18561 5800 4 -1 1 +$abc$733$n75_1_bF$buf2 115 OAI21X1_24 $abc$733$n75_1_bF$pin/C 20401 7800 5 -1 1 +$abc$733$n75_1_bF$buf2 115 BUFX2_8 Y 12971 7800 5 -1 1 +$abc$733$n75_1_bF$buf1 118 OAI21X1_12 twfeed4 9761 5800 4 -1 1 +$abc$733$n75_1_bF$buf1 116 OAI21X1_12 twfeed4 9761 3800 3 1 1 +$abc$733$n75_1_bF$buf1 118 OAI21X1_13 twfeed1 10881 5800 4 -1 1 +$abc$733$n75_1_bF$buf1 117 OAI21X1_13 twfeed1 10881 3800 3 1 1 +$abc$733$n75_1_bF$buf1 116 OAI21X1_12 $abc$733$n75_1_bF$pin/C 9841 3800 3 1 1 +$abc$733$n75_1_bF$buf1 118 OAI21X1_13 $abc$733$n75_1_bF$pin/A 10801 5800 4 -1 1 +$abc$733$n75_1_bF$buf1 117 OAI21X1_15 $abc$733$n75_1_bF$pin/C 11601 3800 3 1 1 +$abc$733$n75_1_bF$buf1 118 NAND3X1_1 $abc$733$n75_1_bF$pin/B 9401 5800 4 -1 1 +$abc$733$n75_1_bF$buf1 118 BUFX2_9 Y 10871 5800 4 1 1 +$abc$733$n75_1_bF$buf0 119 OAI21X1_6 $abc$733$n75_1_bF$pin/C 6321 7800 5 1 1 +$abc$733$n75_1_bF$buf0 119 OAI21X1_11 $abc$733$n75_1_bF$pin/C 5521 7800 5 -1 1 +$abc$733$n75_1_bF$buf0 119 OAI21X1_10 $abc$733$n75_1_bF$pin/C 5841 7800 5 -1 1 +$abc$733$n75_1_bF$buf0 119 OAI21X1_30 $abc$733$n75_1_bF$pin/C 7281 7800 5 1 1 +$abc$733$n75_1_bF$buf0 119 BUFX2_10 Y 9591 7800 5 1 1 +state<0> 124 DFFSR_3 twfeed18 10241 3800 3 -1 1 +state<0> 120 DFFSR_3 twfeed18 10241 1800 2 1 1 +state<0> 128 OAI21X1_16 twfeed4 19201 3800 3 -1 1 +state<0> 120 OAI21X1_16 twfeed4 19201 1800 2 1 1 +state<0> 122 OAI21X1_24 twfeed3 20321 7800 5 -1 1 +state<0> 121 OAI21X1_24 twfeed3 20321 5800 4 1 1 +state<0> 129 OAI22X1_2 twfeed5 19521 9800 6 -1 1 +state<0> 122 OAI22X1_2 twfeed5 19521 7800 5 1 1 +state<0> 126 OAI21X1_21 twfeed2 22401 7800 5 -1 1 +state<0> 121 OAI21X1_21 twfeed2 22401 5800 4 1 1 +state<0> 121 DFFSR_21 twfeed7 20321 5800 4 -1 1 +state<0> 123 DFFSR_21 twfeed7 20321 3800 3 1 1 +state<0> 127 OAI21X1_12 twfeed1 10241 5800 4 -1 1 +state<0> 124 OAI21X1_12 twfeed1 10241 3800 3 1 1 +state<0> 123 NAND2X1_7 twfeed1 20321 3800 3 -1 1 +state<0> 120 NAND2X1_7 twfeed1 20321 1800 2 1 1 +state<0> 130 DFFSR_1 twfeed19 8641 3800 3 -1 1 +state<0> 120 DFFSR_1 twfeed19 8641 1800 2 1 1 +state<0> 120 OAI21X1_14 twfeed4 19201 1800 2 -1 1 +state<0> 125 OAI21X1_14 twfeed4 19201 -200 1 1 1 +state<0> 130 DFFSR_1 Q 8961 3800 3 -1 1 +state<0> 120 AOI21X1_12 C 8641 1800 2 -1 1 +state<0> 129 OAI21X1_29 A 18961 9800 6 -1 1 +state<0> 122 NAND3X1_7 A 20321 7800 5 1 1 +state<0> 129 OAI22X1_2 C 19521 9800 6 -1 1 +state<0> 126 OAI21X1_26 C 22481 7800 5 1 1 +state<0> 121 OAI22X1_1 C 21281 5800 4 1 1 +state<0> 126 OAI21X1_21 C 22161 7800 5 -1 1 +state<0> 120 OAI21X1_16 A 18801 1800 2 1 1 +state<0> 128 NAND3X1_2 A 19361 3800 3 -1 1 +state<0> 125 OAI21X1_14 C 19281 -200 1 1 1 +state<0> 127 INVX4_1 A 10241 5800 4 1 1 +state<3> 135 INVX8_1 twfeed1 12481 9800 6 -1 1 +state<3> 131 INVX8_1 twfeed1 12481 7800 5 1 1 +state<3> 134 DFFSR_4 twfeed15 13761 9800 6 -1 1 +state<3> 131 DFFSR_4 twfeed15 13761 7800 5 1 1 +state<3> 131 NAND2X1_6 twfeed1 13761 7800 5 -1 1 +state<3> 132 NAND2X1_6 twfeed1 13761 5800 4 1 1 +state<3> 131 AND2X2_2 twfeed1 12481 7800 5 -1 1 +state<3> 133 AND2X2_2 twfeed1 12481 5800 4 1 1 +state<3> 131 DFFSR_4 Q 12801 7800 5 1 1 +state<3> 134 AOI22X1_2 A 15761 9800 6 1 1 +state<3> 132 NAND2X1_6 A 13761 5800 4 1 1 +state<3> 133 AND2X2_2 B 12321 5800 4 1 1 +state<3> 135 AOI21X1_3 B 11201 9800 6 1 1 +state<3> 135 OAI21X1_5 A 12081 9800 6 1 1 +state<3> 135 INVX8_1 A 12481 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 139 NOR2X1_1 twfeed1 16481 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 136 NOR2X1_1 twfeed1 16481 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<3> 139 OR2X2_1 twfeed3 17281 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 137 OR2X2_1 twfeed3 17281 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<3> 137 OAI21X1_18 twfeed3 17281 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 138 OAI21X1_18 twfeed3 17281 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<3> 136 DFFSR_19 Q 16161 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<3> 138 BUFX2_14 A 18721 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 137 OAI21X1_18 C 17361 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 139 OR2X2_1 A 16961 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<3> 139 NOR2X1_1 A 16481 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 143 DFFSR_18 twfeed21 17921 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 140 DFFSR_18 twfeed21 17921 -200 1 1 1 +$auto$iopadmap.cc:313:execute$873<2> 145 OR2X2_1 twfeed2 17121 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 141 OR2X2_1 twfeed2 17121 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<2> 141 XOR2X1_1 twfeed5 18241 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 142 XOR2X1_1 twfeed5 18241 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<2> 141 XOR2X1_1 twfeed3 17921 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 143 XOR2X1_1 twfeed3 17921 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<2> 141 OAI21X1_18 twfeed2 17121 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 144 OAI21X1_18 twfeed2 17121 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<2> 140 DFFSR_18 Q 17921 -200 1 1 1 +$auto$iopadmap.cc:313:execute$873<2> 142 BUFX2_13 A 18241 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 144 OAI21X1_18 A 17041 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<2> 145 OR2X2_1 B 17161 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<2> 142 XOR2X1_1 B 18520 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<2> 145 NOR2X1_1 B 16801 5800 4 -1 1 +$abc$733$n77 146 AND2X2_3 A 16161 5800 4 1 1 +$abc$733$n77 146 NAND2X1_11 A 16801 5800 4 1 1 +$abc$733$n77 146 NAND2X1_1 A 16001 5800 4 1 1 +$abc$733$n77 146 NOR2X1_1 Y 16641 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<5> 150 OAI21X1_22 twfeed3 23201 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<5> 147 OAI21X1_22 twfeed3 23201 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<5> 147 NAND3X1_4 twfeed4 23201 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<5> 148 NAND3X1_4 twfeed4 23201 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<5> 148 BUFX2_16 twfeed1 23201 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<5> 149 BUFX2_16 twfeed1 23201 -200 1 1 1 +$auto$iopadmap.cc:313:execute$873<5> 147 DFFSR_21 Q 22561 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<5> 149 BUFX2_16 A 23201 -200 1 1 1 +$auto$iopadmap.cc:313:execute$873<5> 150 INVX1_26 A 19361 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<5> 150 NOR2X1_2 A 19841 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<4> 152 DFFSR_20 twfeed14 22081 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$873<4> 151 DFFSR_20 twfeed14 22081 9800 6 1 1 +$auto$iopadmap.cc:313:execute$873<4> 155 DFFSR_7 twfeed16 22081 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$873<4> 152 DFFSR_7 twfeed16 22081 11800 7 1 1 +$auto$iopadmap.cc:313:execute$873<4> 151 INVX1_27 twfeed2 22081 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<4> 153 INVX1_27 twfeed2 22081 7800 5 1 1 +$auto$iopadmap.cc:313:execute$873<4> 153 OAI21X1_21 twfeed4 22081 7800 5 -1 1 +$auto$iopadmap.cc:313:execute$873<4> 154 OAI21X1_21 twfeed4 22081 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<4> 152 DFFSR_20 Q 23201 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$873<4> 155 BUFX2_15 A 22081 13800 8 1 1 +$auto$iopadmap.cc:313:execute$873<4> 154 AOI22X1_1 C 17281 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<4> 154 NOR2X1_17 A 18401 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<4> 154 NOR2X1_2 B 19521 5800 4 1 1 +$abc$733$n78 157 NAND2X1_1 twfeed3 15681 7800 5 -1 1 +$abc$733$n78 156 NAND2X1_1 twfeed3 15681 5800 4 1 1 +$abc$733$n78 156 AND2X2_3 B 16321 5800 4 1 1 +$abc$733$n78 157 NAND2X1_1 B 15681 7800 5 -1 1 +$abc$733$n78 156 NOR2X1_2 Y 19681 5800 4 1 1 +$abc$733$n79 160 DFFSR_4 twfeed2 15841 9800 6 -1 1 +$abc$733$n79 158 DFFSR_4 twfeed2 15841 7800 5 1 1 +$abc$733$n79 158 NAND2X1_1 twfeed2 15841 7800 5 -1 1 +$abc$733$n79 159 NAND2X1_1 twfeed2 15841 5800 4 1 1 +$abc$733$n79 160 OAI21X1_27 B 17761 9800 6 -1 1 +$abc$733$n79 159 NOR2X1_18 B 15521 5800 4 1 1 +$abc$733$n79 159 NOR2X1_5 B 15041 5800 4 1 1 +$abc$733$n79 159 NAND2X1_1 Y 15741 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<7> 165 BUFX2_17 twfeed2 16321 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 161 BUFX2_17 twfeed2 16321 13800 8 1 1 +$auto$iopadmap.cc:313:execute$873<7> 166 BUFX2_18 twfeed1 14881 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 162 BUFX2_18 twfeed1 14881 15800 9 1 1 +$auto$iopadmap.cc:313:execute$873<7> 162 MUX2X1_4 twfeed5 14881 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 161 MUX2X1_4 twfeed5 14881 13800 8 1 1 +$auto$iopadmap.cc:313:execute$873<7> 161 DFFSR_28 twfeed14 16321 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 163 DFFSR_28 twfeed14 16321 11800 7 1 1 +$auto$iopadmap.cc:313:execute$873<7> 163 AOI22X1_2 twfeed5 16321 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 164 AOI22X1_2 twfeed5 16321 9800 6 1 1 +$auto$iopadmap.cc:313:execute$873<7> 165 DFFSR_23 Q 16801 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 166 BUFX2_18 A 14881 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$873<7> 164 AOI22X1_2 C 16321 9800 6 1 1 +$auto$iopadmap.cc:313:execute$873<7> 164 NOR2X1_3 A 16161 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 170 DFFSR_28 twfeed15 16161 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 167 DFFSR_28 twfeed15 16161 11800 7 1 1 +$auto$iopadmap.cc:313:execute$873<6> 167 DFFSR_22 twfeed21 16641 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 168 DFFSR_22 twfeed21 16641 9800 6 1 1 +$auto$iopadmap.cc:313:execute$873<6> 168 INVX1_28 twfeed1 17441 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 169 INVX1_28 twfeed1 17441 7800 5 1 1 +$auto$iopadmap.cc:313:execute$873<6> 167 DFFSR_22 Q 16641 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 170 BUFX2_17 A 16161 13800 8 1 1 +$auto$iopadmap.cc:313:execute$873<6> 169 OAI21X1_27 C 18001 7800 5 1 1 +$auto$iopadmap.cc:313:execute$873<6> 168 INVX1_28 A 17441 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<6> 168 NOR2X1_3 B 16481 9800 6 -1 1 +$abc$733$n80 173 NOR2X1_3 twfeed2 16321 9800 6 -1 1 +$abc$733$n80 171 NOR2X1_3 twfeed2 16321 7800 5 1 1 +$abc$733$n80 171 AND2X2_3 twfeed2 16321 7800 5 -1 1 +$abc$733$n80 172 AND2X2_3 twfeed2 16321 5800 4 1 1 +$abc$733$n80 172 AND2X2_6 B 13441 5800 4 1 1 +$abc$733$n80 172 NAND2X1_2 A 14561 5800 4 1 1 +$abc$733$n80 173 NOR2X1_3 Y 16321 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 176 DFFSR_19 twfeed4 13441 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 174 DFFSR_19 twfeed4 13441 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<1> 174 DFFSR_17 twfeed20 13441 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 175 DFFSR_17 twfeed20 13441 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<1> 174 DFFSR_17 Q 13281 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 175 BUFX2_12 A 13761 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 176 INVX1_22 A 12321 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<1> 176 NOR2X1_4 A 12801 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 180 DFFSR_19 twfeed3 13281 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 177 DFFSR_19 twfeed3 13281 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<0> 180 AND2X2_1 twfeed2 8801 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 178 AND2X2_1 twfeed2 8801 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<0> 177 DFFSR_17 twfeed21 13281 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 179 DFFSR_17 twfeed21 13281 1800 2 1 1 +$auto$iopadmap.cc:313:execute$873<0> 178 DFFSR_16 Q 8161 3800 3 1 1 +$auto$iopadmap.cc:313:execute$873<0> 179 BUFX2_11 A 13281 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 180 AND2X2_1 B 8801 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$873<0> 180 NOR2X1_13 A 10721 5800 4 1 1 +$auto$iopadmap.cc:313:execute$873<0> 180 NOR2X1_4 B 12481 5800 4 -1 1 +$abc$733$n81 182 NAND2X1_6 twfeed3 14081 7800 5 -1 1 +$abc$733$n81 181 NAND2X1_6 twfeed3 14081 5800 4 1 1 +$abc$733$n81 182 NAND2X1_6 B 14081 7800 5 -1 1 +$abc$733$n81 181 AND2X2_2 A 12481 5800 4 1 1 +$abc$733$n81 182 NAND2X1_2 B 14241 7800 5 -1 1 +$abc$733$n81 181 NOR2X1_4 Y 12641 5800 4 -1 1 +$abc$733$n82 183 NOR2X1_5 A 14721 5800 4 1 1 +$abc$733$n82 183 NAND2X1_2 Y 14301 5800 4 1 1 +$abc$733$n83_1 186 DFFSR_4 twfeed8 14881 9800 6 -1 1 +$abc$733$n83_1 184 DFFSR_4 twfeed8 14881 7800 5 1 1 +$abc$733$n83_1 184 NOR2X1_5 twfeed2 14881 7800 5 -1 1 +$abc$733$n83_1 185 NOR2X1_5 twfeed2 14881 5800 4 1 1 +$abc$733$n83_1 186 AOI22X1_2 B 15841 9800 6 1 1 +$abc$733$n83_1 186 OAI21X1_1 B 14881 9800 6 1 1 +$abc$733$n83_1 185 NOR2X1_5 Y 14881 5800 4 1 1 +$abc$546$n2 187 DFFSR_4 D 14721 9800 6 -1 1 +$abc$546$n2 187 OAI21X1_1 Y 14751 9800 6 1 1 +state<4> 189 INVX1_31 twfeed2 9441 1800 2 -1 1 +state<4> 188 INVX1_31 twfeed2 9441 -200 1 1 1 +state<4> 188 DFFSR_5 Q 9921 -200 1 1 1 +state<4> 188 NAND3X1_8 A 9281 -200 1 1 1 +state<4> 189 INVX1_1 A 9441 1800 2 1 1 +$abc$733$n85_1 190 OAI21X1_2 C 4881 3800 3 -1 1 +$abc$733$n85_1 190 INVX1_1 Y 9281 3800 3 -1 1 +state<1> 192 DFFSR_2 twfeed21 801 3800 3 -1 1 +state<1> 191 DFFSR_2 twfeed21 801 1800 2 1 1 +state<1> 192 DFFSR_2 Q 801 3800 3 -1 1 +state<1> 191 AND2X2_5 B 5281 1800 2 1 1 +state<1> 191 INVX1_2 A 4161 1800 2 1 1 +$abc$733$n86 193 OAI21X1_2 A 4561 1800 2 1 1 +$abc$733$n86 193 INVX1_2 Y 4321 1800 2 1 1 +start 194 twpin_start start -539 2260 -1 1 1 +start 194 PSEUDO_CELL PSEUDO_PIN -239 800 2 -2 0 +start 194 PSEUDO_CELL PSEUDO_PIN -239 800 -1 -1 0 +start 194 DFFSR_32 D 1921 1800 2 -1 1 +start 194 INVX1_3 A -159 1800 2 1 1 +$abc$733$n87_1 195 NOR2X1_6 B 481 1800 2 1 1 +$abc$733$n87_1 195 INVX1_3 Y 1 1800 2 1 1 +startbuf 197 DFFSR_32 twfeed21 1 1800 2 -1 1 +startbuf 196 DFFSR_32 twfeed21 1 -200 1 1 1 +startbuf 196 DFFSR_32 Q 1 -200 1 1 1 +startbuf 197 NOR2X1_6 A 161 1800 2 1 1 +$abc$733$n88 198 AND2X2_5 A 5121 1800 2 1 1 +$abc$733$n88 198 OAI21X1_2 B 4641 1800 2 1 1 +$abc$733$n88 198 NOR2X1_6 Y 321 1800 2 1 1 +$abc$546$n5 199 DFFSR_2 D 2721 1800 2 1 1 +$abc$546$n5 199 OAI21X1_2 Y 4771 1800 2 1 1 +$auto$iopadmap.cc:313:execute$884<1> 202 DFFSR_7 twfeed21 22881 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$884<1> 200 DFFSR_7 twfeed21 22881 11800 7 1 1 +$auto$iopadmap.cc:313:execute$884<1> 203 BUFX2_21 twfeed1 22881 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<1> 201 BUFX2_21 twfeed1 22881 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<1> 201 OR2X2_2 twfeed2 22881 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<1> 202 OR2X2_2 twfeed2 22881 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<1> 200 DFFSR_7 Q 22881 11800 7 1 1 +$auto$iopadmap.cc:313:execute$884<1> 203 BUFX2_21 A 22881 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<1> 202 INVX1_4 A 23361 13800 8 -1 1 +$abc$733$n90 204 AOI21X1_1 A 19441 13800 8 -1 1 +$abc$733$n90 204 INVX1_4 Y 23201 13800 8 -1 1 +state<2> 206 DFFSR_3 twfeed22 9601 3800 3 -1 1 +state<2> 205 DFFSR_3 twfeed22 9601 1800 2 1 1 +state<2> 205 DFFSR_5 D 11841 1800 2 -1 1 +state<2> 206 DFFSR_3 Q 9761 3800 3 -1 1 +state<2> 205 INVX1_31 A 9601 1800 2 -1 1 +state<2> 206 NAND3X1_1 A 9601 3800 3 1 1 +$abc$733$n91_1 216 INVX1_14 twfeed2 9441 13800 8 -1 1 +$abc$733$n91_1 207 INVX1_14 twfeed2 9441 11800 7 1 1 +$abc$733$n91_1 216 DFFSR_12 twfeed15 1441 13800 8 -1 1 +$abc$733$n91_1 208 DFFSR_12 twfeed15 1441 11800 7 1 1 +$abc$733$n91_1 211 MUX2X1_1 twfeed4 1441 9800 6 -1 1 +$abc$733$n91_1 209 MUX2X1_1 twfeed4 1441 7800 5 1 1 +$abc$733$n91_1 207 DFFSR_24 twfeed10 9441 11800 7 -1 1 +$abc$733$n91_1 210 DFFSR_24 twfeed10 9441 9800 6 1 1 +$abc$733$n91_1 208 DFFSR_8 twfeed12 1441 11800 7 -1 1 +$abc$733$n91_1 211 DFFSR_8 twfeed12 1441 9800 6 1 1 +$abc$733$n91_1 210 BUFX2_5 twfeed1 9441 9800 6 -1 1 +$abc$733$n91_1 212 BUFX2_5 twfeed1 9441 7800 5 1 1 +$abc$733$n91_1 212 DFFSR_29 twfeed3 9441 7800 5 -1 1 +$abc$733$n91_1 213 DFFSR_29 twfeed3 9441 5800 4 1 1 +$abc$733$n91_1 209 DFFSR_13 twfeed18 961 7800 5 -1 1 +$abc$733$n91_1 214 DFFSR_13 twfeed18 961 5800 4 1 1 +$abc$733$n91_1 213 NAND3X1_1 twfeed2 9441 5800 4 -1 1 +$abc$733$n91_1 215 NAND3X1_1 twfeed2 9441 3800 3 1 1 +$abc$733$n91_1 216 AOI21X1_2 B 20481 13800 8 1 1 +$abc$733$n91_1 216 NOR2X1_8 B 20801 13800 8 1 1 +$abc$733$n91_1 216 MUX2X1_7 S 6241 13800 8 1 1 +$abc$733$n91_1 214 MUX2X1_6 S 961 5800 4 -1 1 +$abc$733$n91_1 216 MUX2X1_5 S 4961 13800 8 -1 1 +$abc$733$n91_1 216 MUX2X1_4 S 14241 13800 8 1 1 +$abc$733$n91_1 216 MUX2X1_3 S 12001 13800 8 1 1 +$abc$733$n91_1 216 MUX2X1_2 S 1441 13800 8 1 1 +$abc$733$n91_1 211 MUX2X1_1 S 1921 9800 6 -1 1 +$abc$733$n91_1 216 AOI21X1_1 B 19361 13800 8 -1 1 +$abc$733$n91_1 216 NOR2X1_7 B 18881 13800 8 -1 1 +$abc$733$n91_1 215 NAND3X1_1 Y 9441 3800 3 1 1 +$auto$iopadmap.cc:313:execute$894<0> 219 OAI21X1_5 twfeed2 12001 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<0> 217 OAI21X1_5 twfeed2 12001 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<0> 219 DFFSR_24 twfeed21 7681 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<0> 218 DFFSR_24 twfeed21 7681 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<0> 220 XNOR2X1_2 twfeed7 12001 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<0> 219 XNOR2X1_2 twfeed7 12001 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<0> 219 DFFSR_24 Q 7681 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<0> 220 BUFX2_29 A 15681 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<0> 218 OAI21X1_30 A 7601 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<0> 217 OAI21X1_5 B 12001 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<0> 220 NOR2X1_7 A 18561 13800 8 -1 1 +$abc$733$n92 221 AOI21X1_1 C 19041 13800 8 -1 1 +$abc$733$n92 221 NOR2X1_7 Y 18721 13800 8 -1 1 +dp<1>_FF_INPUT 222 DFFSR_7 D 20961 13800 8 -1 1 +dp<1>_FF_INPUT 222 AOI21X1_1 Y 19201 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$884<2> 224 DFFSR_8 twfeed20 161 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$884<2> 223 DFFSR_8 twfeed20 161 9800 6 1 1 +$auto$iopadmap.cc:313:execute$884<2> 224 DFFSR_8 Q 1 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$884<2> 223 BUFX2_22 A 161 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$884<2> 223 INVX1_5 A 801 9800 6 -1 1 +$abc$733$n94 225 MUX2X1_1 A 1281 9800 6 -1 1 +$abc$733$n94 225 INVX1_5 Y 961 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<1> 227 DFFSR_25 twfeed21 2561 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<1> 226 DFFSR_25 twfeed21 2561 7800 5 1 1 +$auto$iopadmap.cc:313:execute$894<1> 226 DFFSR_25 Q 2561 7800 5 1 1 +$auto$iopadmap.cc:313:execute$894<1> 227 BUFX2_30 A 641 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<1> 227 OAI21X1_6 A 6001 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<1> 227 INVX1_6 A 2081 9800 6 -1 1 +$abc$733$n95_1 228 AOI21X1_13 B 6721 9800 6 -1 1 +$abc$733$n95_1 228 MUX2X1_1 B 1761 9800 6 -1 1 +$abc$733$n95_1 228 INVX1_6 Y 2241 9800 6 -1 1 +dp<2>_FF_INPUT 230 MUX2X1_1 twfeed3 1601 9800 6 -1 1 +dp<2>_FF_INPUT 229 MUX2X1_1 twfeed3 1601 7800 5 1 1 +dp<2>_FF_INPUT 230 DFFSR_8 D 1921 9800 6 1 1 +dp<2>_FF_INPUT 229 MUX2X1_1 Y 1502 7800 5 1 1 +$auto$iopadmap.cc:313:execute$884<3> 232 BUFX2_23 twfeed1 161 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<3> 231 BUFX2_23 twfeed1 161 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<3> 232 DFFSR_9 Q 1 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<3> 231 BUFX2_23 A 161 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<3> 231 INVX1_7 A 321 13800 8 1 1 +$abc$733$n97_1 233 MUX2X1_2 A 801 13800 8 1 1 +$abc$733$n97_1 233 INVX1_7 Y 481 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<2> 235 DFFSR_26 twfeed21 8321 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<2> 234 DFFSR_26 twfeed21 8321 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<2> 234 DFFSR_26 Q 8321 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<2> 235 BUFX2_31 A 8321 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<2> 235 OAI21X1_7 A 8721 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<2> 235 INVX1_8 A 7201 13800 8 1 1 +$abc$733$n98_1 236 AOI21X1_4 B 6721 13800 8 1 1 +$abc$733$n98_1 236 MUX2X1_2 B 1281 13800 8 1 1 +$abc$733$n98_1 236 INVX1_8 Y 7041 13800 8 1 1 +dp<3>_FF_INPUT 238 DFFSR_9 twfeed14 1121 17800 10 -1 1 +dp<3>_FF_INPUT 237 DFFSR_9 twfeed14 1121 15800 9 1 1 +dp<3>_FF_INPUT 238 DFFSR_9 D 1921 17800 10 -1 1 +dp<3>_FF_INPUT 237 MUX2X1_2 Y 1022 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<4> 240 DFFSR_10 twfeed21 10721 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<4> 239 DFFSR_10 twfeed21 10721 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<4> 239 DFFSR_10 Q 10721 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<4> 240 BUFX2_24 A 9761 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<4> 240 INVX1_9 A 10241 17800 10 -1 1 +$abc$733$n100 243 DFFSR_10 twfeed9 12641 17800 10 -1 1 +$abc$733$n100 241 DFFSR_10 twfeed9 12641 15800 9 1 1 +$abc$733$n100 241 MUX2X1_3 twfeed5 12641 15800 9 -1 1 +$abc$733$n100 242 MUX2X1_3 twfeed5 12641 13800 8 1 1 +$abc$733$n100 242 MUX2X1_3 A 12641 13800 8 1 1 +$abc$733$n100 243 INVX1_9 Y 10401 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 246 INVX1_10 twfeed1 9441 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 244 INVX1_10 twfeed1 9441 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<3> 246 MUX2X1_3 twfeed6 12801 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 245 MUX2X1_3 twfeed6 12801 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<3> 247 BUFX2_32 twfeed2 9441 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 246 BUFX2_32 twfeed2 9441 15800 9 1 1 +$auto$iopadmap.cc:313:execute$894<3> 246 DFFSR_27 Q 8481 15800 9 1 1 +$auto$iopadmap.cc:313:execute$894<3> 247 BUFX2_32 A 9601 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 245 OAI21X1_8 A 13841 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 245 XNOR2X1_2 A 12691 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<3> 245 NOR2X1_10 A 12961 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<3> 244 INVX1_10 A 9441 13800 8 1 1 +$abc$733$n101_1 249 INVX1_10 twfeed2 9601 15800 9 -1 1 +$abc$733$n101_1 248 INVX1_10 twfeed2 9601 13800 8 1 1 +$abc$733$n101_1 248 AOI21X1_5 B 9121 13800 8 1 1 +$abc$733$n101_1 248 NOR2X1_9 B 11521 13800 8 1 1 +$abc$733$n101_1 248 MUX2X1_3 B 12161 13800 8 1 1 +$abc$733$n101_1 249 INVX1_10 Y 9601 15800 9 -1 1 +dp<4>_FF_INPUT 251 DFFSR_10 twfeed10 12481 17800 10 -1 1 +dp<4>_FF_INPUT 250 DFFSR_10 twfeed10 12481 15800 9 1 1 +dp<4>_FF_INPUT 251 DFFSR_10 D 12641 17800 10 -1 1 +dp<4>_FF_INPUT 250 MUX2X1_3 Y 12420 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<5> 253 INVX1_11 twfeed1 14561 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<5> 252 INVX1_11 twfeed1 14561 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<5> 252 DFFSR_11 Q 15521 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<5> 253 BUFX2_25 A 14401 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<5> 253 INVX1_11 A 14561 17800 10 -1 1 +$abc$733$n103_1 256 BUFX2_18 twfeed2 15041 17800 10 -1 1 +$abc$733$n103_1 254 BUFX2_18 twfeed2 15041 15800 9 1 1 +$abc$733$n103_1 254 MUX2X1_4 twfeed6 15041 15800 9 -1 1 +$abc$733$n103_1 255 MUX2X1_4 twfeed6 15041 13800 8 1 1 +$abc$733$n103_1 255 MUX2X1_4 A 14881 13800 8 1 1 +$abc$733$n103_1 256 INVX1_11 Y 14721 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$894<4> 259 OAI21X1_8 twfeed4 14241 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<4> 257 OAI21X1_8 twfeed4 14241 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<4> 257 OAI21X1_9 twfeed2 14241 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<4> 258 OAI21X1_9 twfeed2 14241 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<4> 257 DFFSR_28 Q 15201 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<4> 259 BUFX2_33 A 13761 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<4> 258 OAI21X1_9 A 14321 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<4> 259 XNOR2X1_2 B 12042 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<4> 259 NOR2X1_9 A 11841 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<4> 259 INVX1_12 A 14081 13800 8 1 1 +$abc$733$n104 261 INVX1_12 twfeed2 13921 15800 9 -1 1 +$abc$733$n104 260 INVX1_12 twfeed2 13921 13800 8 1 1 +$abc$733$n104 260 AOI21X1_6 B 14721 13800 8 -1 1 +$abc$733$n104 260 NOR2X1_10 B 13281 13800 8 1 1 +$abc$733$n104 260 MUX2X1_4 B 14401 13800 8 1 1 +$abc$733$n104 261 INVX1_12 Y 13921 15800 9 -1 1 +dp<5>_FF_INPUT 263 DFFSR_11 twfeed9 17441 17800 10 -1 1 +dp<5>_FF_INPUT 262 DFFSR_11 twfeed9 17441 15800 9 1 1 +dp<5>_FF_INPUT 263 DFFSR_11 D 17441 17800 10 -1 1 +dp<5>_FF_INPUT 262 MUX2X1_4 Y 14660 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<6> 265 DFFSR_12 twfeed21 481 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$884<6> 264 DFFSR_12 twfeed21 481 11800 7 1 1 +$auto$iopadmap.cc:313:execute$884<6> 264 DFFSR_12 Q 481 11800 7 1 1 +$auto$iopadmap.cc:313:execute$884<6> 265 BUFX2_26 A 161 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$884<6> 265 INVX1_13 A 3841 13800 8 -1 1 +$abc$733$n106_1 266 MUX2X1_5 A 4321 13800 8 -1 1 +$abc$733$n106_1 266 INVX1_13 Y 4001 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 272 INVX1_14 twfeed1 9281 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 267 INVX1_14 twfeed1 9281 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<5> 271 DFFSR_26 twfeed20 8161 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 267 DFFSR_26 twfeed20 8161 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<5> 267 DFFSR_31 twfeed21 6561 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 268 DFFSR_31 twfeed21 6561 9800 6 1 1 +$auto$iopadmap.cc:313:execute$894<5> 268 AOI21X1_13 twfeed1 6561 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 269 AOI21X1_13 twfeed1 6561 7800 5 1 1 +$auto$iopadmap.cc:313:execute$894<5> 269 OAI21X1_10 twfeed1 6241 7800 5 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 270 OAI21X1_10 twfeed1 6241 5800 4 1 1 +$auto$iopadmap.cc:313:execute$894<5> 269 DFFSR_29 Q 6561 7800 5 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 271 BUFX2_34 A 8161 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<5> 270 OAI21X1_10 A 6161 5800 4 1 1 +$auto$iopadmap.cc:313:execute$894<5> 272 NOR2X1_12 A 10241 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<5> 272 XNOR2X1_1 A 10031 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<5> 272 INVX1_14 A 9281 13800 8 -1 1 +$abc$733$n107 275 NOR2X1_12 twfeed1 10241 13800 8 -1 1 +$abc$733$n107 273 NOR2X1_12 twfeed1 10241 11800 7 1 1 +$abc$733$n107 273 DFFSR_24 twfeed5 10241 11800 7 -1 1 +$abc$733$n107 274 DFFSR_24 twfeed5 10241 9800 6 1 1 +$abc$733$n107 274 AOI21X1_7 B 10241 9800 6 -1 1 +$abc$733$n107 275 NOR2X1_11 B 10401 13800 8 -1 1 +$abc$733$n107 275 MUX2X1_5 B 4801 13800 8 -1 1 +$abc$733$n107 275 INVX1_14 Y 9441 13800 8 -1 1 +dp<6>_FF_INPUT 277 DFFSR_12 twfeed9 2401 13800 8 -1 1 +dp<6>_FF_INPUT 276 DFFSR_12 twfeed9 2401 11800 7 1 1 +dp<6>_FF_INPUT 277 DFFSR_12 D 2401 13800 8 -1 1 +dp<6>_FF_INPUT 276 MUX2X1_5 Y 4542 11800 7 1 1 +$auto$iopadmap.cc:313:execute$884<7> 279 DFFSR_13 twfeed20 641 7800 5 -1 1 +$auto$iopadmap.cc:313:execute$884<7> 278 DFFSR_13 twfeed20 641 5800 4 1 1 +$auto$iopadmap.cc:313:execute$884<7> 279 DFFSR_13 Q 481 7800 5 -1 1 +$auto$iopadmap.cc:313:execute$884<7> 278 BUFX2_27 A 161 5800 4 1 1 +$auto$iopadmap.cc:313:execute$884<7> 278 INVX1_15 A 1 5800 4 -1 1 +$abc$733$n109 280 MUX2X1_6 A 321 5800 4 -1 1 +$abc$733$n109 280 INVX1_15 Y -159 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$894<6> 284 DFFSR_30 twfeed10 3361 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$894<6> 281 DFFSR_30 twfeed10 3361 3800 3 1 1 +$auto$iopadmap.cc:313:execute$894<6> 284 DFFSR_30 twfeed21 1601 5800 4 -1 1 +$auto$iopadmap.cc:313:execute$894<6> 282 DFFSR_30 twfeed21 1601 3800 3 1 1 +$auto$iopadmap.cc:313:execute$894<6> 281 DFFSR_2 twfeed5 3361 3800 3 -1 1 +$auto$iopadmap.cc:313:execute$894<6> 283 DFFSR_2 twfeed5 3361 1800 2 1 1 +$auto$iopadmap.cc:313:execute$894<6> 282 DFFSR_30 Q 1601 3800 3 1 1 +$auto$iopadmap.cc:313:execute$894<6> 283 BUFX2_35 A 3361 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$894<6> 284 OAI21X1_11 A 5201 5800 4 1 1 +$auto$iopadmap.cc:313:execute$894<6> 284 INVX1_16 A 1281 5800 4 -1 1 +$abc$733$n110_1 285 AOI21X1_8 B 4001 5800 4 1 1 +$abc$733$n110_1 285 MUX2X1_6 B 801 5800 4 -1 1 +$abc$733$n110_1 285 INVX1_16 Y 1121 5800 4 -1 1 +dp<7>_FF_INPUT 287 MUX2X1_6 twfeed4 481 5800 4 -1 1 +dp<7>_FF_INPUT 286 MUX2X1_6 twfeed4 481 3800 3 1 1 +dp<7>_FF_INPUT 287 DFFSR_13 D 2401 5800 4 1 1 +dp<7>_FF_INPUT 286 MUX2X1_6 Y 542 3800 3 1 1 +$auto$iopadmap.cc:313:execute$884<8> 290 BUFX2_28 twfeed1 4321 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<8> 288 BUFX2_28 twfeed1 4321 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<8> 291 DFFSR_14 twfeed22 4961 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<8> 289 DFFSR_14 twfeed22 4961 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<8> 288 DFFSR_14 twfeed18 4321 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<8> 289 DFFSR_14 twfeed18 4321 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<8> 291 DFFSR_14 Q 4801 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<8> 290 BUFX2_28 A 4321 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<8> 289 INVX1_17 A 5121 13800 8 1 1 +$abc$733$n112 292 MUX2X1_7 A 5601 13800 8 1 1 +$abc$733$n112 292 INVX1_17 Y 5281 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<7> 294 DFFSR_26 twfeed15 7361 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<7> 293 DFFSR_26 twfeed15 7361 11800 7 1 1 +$auto$iopadmap.cc:313:execute$894<7> 293 DFFSR_31 Q 6561 11800 7 -1 1 +$auto$iopadmap.cc:313:execute$894<7> 294 BUFX2_36 A 7361 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<7> 294 NOR2X1_11 A 10721 13800 8 -1 1 +$auto$iopadmap.cc:313:execute$894<7> 294 XNOR2X1_1 B 10680 13800 8 1 1 +$auto$iopadmap.cc:313:execute$894<7> 294 INVX1_18 A 9601 13800 8 -1 1 +$abc$733$n113 297 DFFSR_26 twfeed14 7201 13800 8 -1 1 +$abc$733$n113 295 DFFSR_26 twfeed14 7201 11800 7 1 1 +$abc$733$n113 295 AOI21X1_9 twfeed2 7201 11800 7 -1 1 +$abc$733$n113 296 AOI21X1_9 twfeed2 7201 9800 6 1 1 +$abc$733$n113 296 AOI21X1_9 B 7201 9800 6 1 1 +$abc$733$n113 297 NOR2X1_12 B 9921 13800 8 -1 1 +$abc$733$n113 297 MUX2X1_7 B 6081 13800 8 1 1 +$abc$733$n113 297 INVX1_18 Y 9761 13800 8 -1 1 +dp<8>_FF_INPUT 299 MUX2X1_7 twfeed3 5921 15800 9 -1 1 +dp<8>_FF_INPUT 298 MUX2X1_7 twfeed3 5921 13800 8 1 1 +dp<8>_FF_INPUT 298 DFFSR_14 D 2881 13800 8 1 1 +dp<8>_FF_INPUT 299 MUX2X1_7 Y 5822 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<0> 303 BUFX2_20 twfeed1 22401 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<0> 300 BUFX2_20 twfeed1 22401 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<0> 303 DFFSR_6 twfeed17 21441 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<0> 301 DFFSR_6 twfeed17 21441 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<0> 301 INVX1_19 twfeed1 21441 15800 9 -1 1 +$auto$iopadmap.cc:313:execute$884<0> 302 INVX1_19 twfeed1 21441 13800 8 1 1 +$auto$iopadmap.cc:313:execute$884<0> 300 DFFSR_6 Q 22081 15800 9 1 1 +$auto$iopadmap.cc:313:execute$884<0> 303 BUFX2_20 A 22401 17800 10 -1 1 +$auto$iopadmap.cc:313:execute$884<0> 302 INVX1_19 A 21441 13800 8 1 1 +$abc$733$n115 304 AOI21X1_2 A 20561 13800 8 1 1 +$abc$733$n115 304 INVX1_19 Y 21281 13800 8 1 1 +N<0> 305 twpin_N<0> N<0> 24061 14420 -2 1 1 +N<0> 305 PSEUDO_CELL PSEUDO_PIN 23441 12800 8 2 0 +N<0> 305 PSEUDO_CELL PSEUDO_PIN 23441 12800 -2 -1 0 +N<0> 305 NOR2X1_8 A 21121 13800 8 1 1 +$abc$733$n116_1 306 AOI21X1_2 C 20161 13800 8 1 1 +$abc$733$n116_1 306 NOR2X1_8 Y 20961 13800 8 1 1 +dp<0>_FF_INPUT 309 DFFSR_6 twfeed9 20161 17800 10 -1 1 +dp<0>_FF_INPUT 307 DFFSR_6 twfeed9 20161 15800 9 1 1 +dp<0>_FF_INPUT 307 AOI21X1_2 twfeed4 20161 15800 9 -1 1 +dp<0>_FF_INPUT 308 AOI21X1_2 twfeed4 20161 13800 8 1 1 +dp<0>_FF_INPUT 309 DFFSR_6 D 20161 17800 10 -1 1 +dp<0>_FF_INPUT 308 AOI21X1_2 Y 20321 13800 8 1 1 +$abc$733$n118_1 311 OAI21X1_3 twfeed4 10881 15800 9 -1 1 +$abc$733$n118_1 310 OAI21X1_3 twfeed4 10881 13800 8 1 1 +$abc$733$n118_1 311 OAI21X1_3 C 10961 15800 9 -1 1 +$abc$733$n118_1 310 XNOR2X1_1 Y 10291 13800 8 1 1 +$abc$733$n119 312 OAI21X1_3 A 11281 13800 8 1 1 +$abc$733$n119 312 NOR2X1_9 Y 11681 13800 8 1 1 +$abc$733$n120 313 OAI21X1_3 B 11201 13800 8 1 1 +$abc$733$n120 313 NOR2X1_10 Y 13121 13800 8 1 1 +$abc$733$n121 314 NAND2X1_3 A 10881 13800 8 -1 1 +$abc$733$n121 314 OAI21X1_3 Y 11071 13800 8 1 1 +$abc$733$n122 315 OAI21X1_4 A 11441 13800 8 -1 1 +$abc$733$n122 315 NOR2X1_11 Y 10561 13800 8 -1 1 +$abc$733$n123_1 316 OAI21X1_4 B 11521 13800 8 -1 1 +$abc$733$n123_1 316 NOR2X1_12 Y 10081 13800 8 -1 1 +$abc$733$n124 318 XNOR2X1_2 twfeed4 12481 13800 8 -1 1 +$abc$733$n124 317 XNOR2X1_2 twfeed4 12481 11800 7 1 1 +$abc$733$n124 317 OAI21X1_4 C 11761 11800 7 1 1 +$abc$733$n124 318 XNOR2X1_2 Y 12431 13800 8 -1 1 +$abc$733$n125 320 NAND2X1_3 twfeed3 11201 13800 8 -1 1 +$abc$733$n125 319 NAND2X1_3 twfeed3 11201 11800 7 1 1 +$abc$733$n125 319 NAND2X1_3 B 11201 11800 7 1 1 +$abc$733$n125 320 OAI21X1_4 Y 11651 13800 8 -1 1 +$abc$733$n126 323 NAND2X1_3 twfeed2 11041 13800 8 -1 1 +$abc$733$n126 321 NAND2X1_3 twfeed2 11041 11800 7 1 1 +$abc$733$n126 321 AOI21X1_3 twfeed1 11041 11800 7 -1 1 +$abc$733$n126 322 AOI21X1_3 twfeed1 11041 9800 6 1 1 +$abc$733$n126 322 AOI21X1_3 A 11121 9800 6 1 1 +$abc$733$n126 323 NAND2X1_3 Y 11141 13800 8 -1 1 +$abc$733$n127 324 AOI21X1_3 C 11521 9800 6 1 1 +$abc$733$n127 324 OAI21X1_5 Y 11871 9800 6 1 1 +sr<0>_FF_INPUT 325 DFFSR_24 D 9601 9800 6 1 1 +sr<0>_FF_INPUT 325 AOI21X1_3 Y 11361 9800 6 1 1 +$abc$733$n129 328 DFFSR_26 twfeed9 6401 13800 8 -1 1 +$abc$733$n129 326 DFFSR_26 twfeed9 6401 11800 7 1 1 +$abc$733$n129 326 DFFSR_31 twfeed20 6401 11800 7 -1 1 +$abc$733$n129 327 DFFSR_31 twfeed20 6401 9800 6 1 1 +$abc$733$n129 328 AOI21X1_4 C 6401 13800 8 1 1 +$abc$733$n129 327 OAI21X1_6 Y 6211 9800 6 -1 1 +sr<2>_FF_INPUT 329 DFFSR_26 D 6401 13800 8 -1 1 +sr<2>_FF_INPUT 329 AOI21X1_4 Y 6561 13800 8 1 1 +$abc$733$n131 330 AOI21X1_5 C 8801 13800 8 1 1 +$abc$733$n131 330 OAI21X1_7 Y 8931 13800 8 -1 1 +sr<3>_FF_INPUT 333 DFFSR_27 twfeed9 6561 17800 10 -1 1 +sr<3>_FF_INPUT 331 DFFSR_27 twfeed9 6561 15800 9 1 1 +sr<3>_FF_INPUT 331 AOI21X1_4 twfeed3 6561 15800 9 -1 1 +sr<3>_FF_INPUT 332 AOI21X1_4 twfeed3 6561 13800 8 1 1 +sr<3>_FF_INPUT 333 DFFSR_27 D 6561 17800 10 -1 1 +sr<3>_FF_INPUT 332 AOI21X1_5 Y 8961 13800 8 1 1 +$abc$733$n133_1 334 AOI21X1_6 C 14401 13800 8 -1 1 +$abc$733$n133_1 334 OAI21X1_8 Y 14051 13800 8 -1 1 +sr<4>_FF_INPUT 335 DFFSR_28 D 17121 13800 8 -1 1 +sr<4>_FF_INPUT 335 AOI21X1_6 Y 14561 13800 8 -1 1 +$abc$733$n135_1 336 AOI21X1_7 C 10561 9800 6 -1 1 +$abc$733$n135_1 336 OAI21X1_9 Y 14111 9800 6 1 1 +sr<5>_FF_INPUT 339 AOI21X1_7 twfeed3 10401 9800 6 -1 1 +sr<5>_FF_INPUT 337 AOI21X1_7 twfeed3 10401 7800 5 1 1 +sr<5>_FF_INPUT 337 NOR2X1_13 twfeed2 10561 7800 5 -1 1 +sr<5>_FF_INPUT 338 NOR2X1_13 twfeed2 10561 5800 4 1 1 +sr<5>_FF_INPUT 338 DFFSR_29 D 8481 5800 4 1 1 +sr<5>_FF_INPUT 339 AOI21X1_7 Y 10401 9800 6 -1 1 +$abc$733$n137 340 AOI21X1_8 C 4321 5800 4 1 1 +$abc$733$n137 340 OAI21X1_10 Y 5951 5800 4 1 1 +sr<6>_FF_INPUT 341 DFFSR_30 D 3521 5800 4 -1 1 +sr<6>_FF_INPUT 341 AOI21X1_8 Y 4161 5800 4 1 1 +$abc$733$n139 344 DFFSR_25 twfeed3 5441 9800 6 -1 1 +$abc$733$n139 342 DFFSR_25 twfeed3 5441 7800 5 1 1 +$abc$733$n139 342 OAI21X1_11 twfeed3 5441 7800 5 -1 1 +$abc$733$n139 343 OAI21X1_11 twfeed3 5441 5800 4 1 1 +$abc$733$n139 344 AOI21X1_9 C 6881 9800 6 1 1 +$abc$733$n139 343 OAI21X1_11 Y 5411 5800 4 1 1 +sr<7>_FF_INPUT 345 DFFSR_31 D 4641 9800 6 1 1 +sr<7>_FF_INPUT 345 AOI21X1_9 Y 7041 9800 6 1 1 +N<1> 348 NAND2X1_4 twfeed1 20321 1800 2 -1 1 +N<1> 346 NAND2X1_4 twfeed1 20321 -200 1 1 1 +N<1> 347 DFFSR_18 twfeed14 16801 1800 2 -1 1 +N<1> 346 DFFSR_18 twfeed14 16801 -200 1 1 1 +N<1> 346 twpin_N<1> N<1> 20321 -500 -3 -1 1 +N<1> 346 PSEUDO_CELL PSEUDO_PIN 20321 -201 1 -1 0 +N<1> 346 PSEUDO_CELL PSEUDO_PIN 20321 -201 -3 1 0 +N<1> 348 NAND2X1_4 A 20321 1800 2 -1 1 +N<1> 348 NOR2X1_14 A 19841 1800 2 -1 1 +N<1> 347 INVX1_20 A 16801 1800 2 1 1 +$abc$733$n141 350 OAI21X1_13 twfeed2 10721 5800 4 -1 1 +$abc$733$n141 349 OAI21X1_13 twfeed2 10721 3800 3 1 1 +$abc$733$n141 350 OAI21X1_13 B 10721 5800 4 -1 1 +$abc$733$n141 349 INVX1_20 Y 16641 3800 3 -1 1 +$abc$733$n142 351 NOR2X1_15 B 11041 5800 4 -1 1 +$abc$733$n142 351 OAI21X1_12 A 10161 5800 4 -1 1 +$abc$733$n142 351 NOR2X1_13 Y 10561 5800 4 1 1 +$abc$733$n143 352 OAI21X1_12 B 10081 5800 4 -1 1 +$abc$733$n143 352 AND2X2_1 Y 8542 5800 4 -1 1 +$abc$733$n144 354 OAI21X1_12 twfeed3 9921 5800 4 -1 1 +$abc$733$n144 353 OAI21X1_12 twfeed3 9921 3800 3 1 1 +$abc$733$n144 353 OAI21X1_13 C 10481 3800 3 1 1 +$abc$733$n144 354 OAI21X1_12 Y 9951 5800 4 -1 1 +counter<0>_FF_INPUT 355 DFFSR_16 D 6241 5800 4 -1 1 +counter<0>_FF_INPUT 355 OAI21X1_13 Y 10591 5800 4 -1 1 +N<2> 357 NAND2X1_4 twfeed2 20481 1800 2 -1 1 +N<2> 356 NAND2X1_4 twfeed2 20481 -200 1 1 1 +N<2> 356 twpin_N<2> N<2> 20641 -500 -3 -1 1 +N<2> 356 PSEUDO_CELL PSEUDO_PIN 20481 -201 1 -1 0 +N<2> 356 PSEUDO_CELL PSEUDO_PIN 20481 -201 -3 1 0 +N<2> 356 PSEUDO_CELL PSEUDO_PIN 20641 -201 1 -1 0 +N<2> 356 PSEUDO_CELL PSEUDO_PIN 20641 -201 -3 1 0 +N<2> 356 NAND2X1_4 B 20641 -200 1 1 1 +N<2> 357 NOR2X1_14 B 20161 1800 2 -1 1 +$abc$733$n146 358 OAI21X1_14 A 19601 1800 2 -1 1 +$abc$733$n146 358 NOR2X1_14 Y 20001 1800 2 -1 1 +$abc$733$n147 360 NAND3X1_4 twfeed1 22721 3800 3 -1 1 +$abc$733$n147 359 NAND3X1_4 twfeed1 22721 1800 2 1 1 +$abc$733$n147 361 NAND3X1_3 twfeed3 21121 3800 3 -1 1 +$abc$733$n147 359 NAND3X1_3 twfeed3 21121 1800 2 1 1 +$abc$733$n147 360 NAND3X1_4 A 22721 3800 3 -1 1 +$abc$733$n147 359 AOI21X1_10 B 21921 1800 2 1 1 +$abc$733$n147 361 NAND3X1_3 C 21121 3800 3 -1 1 +$abc$733$n147 361 NAND2X1_7 B 20001 3800 3 -1 1 +$abc$733$n147 359 INVX1_21 A 22561 1800 2 -1 1 +$abc$733$n147 359 NAND2X1_4 Y 20581 1800 2 -1 1 +$abc$733$n148 363 NAND2X1_8 twfeed3 20801 1800 2 -1 1 +$abc$733$n148 362 NAND2X1_8 twfeed3 20801 -200 1 1 1 +$abc$733$n148 364 OAI21X1_17 twfeed2 22081 1800 2 -1 1 +$abc$733$n148 362 OAI21X1_17 twfeed2 22081 -200 1 1 1 +$abc$733$n148 364 OAI21X1_17 B 22081 1800 2 -1 1 +$abc$733$n148 362 NAND2X1_8 B 20801 -200 1 1 1 +$abc$733$n148 363 OAI21X1_14 B 19521 1800 2 -1 1 +$abc$733$n148 362 INVX1_21 Y 22401 -200 1 1 1 +$abc$733$n149 365 NAND2X1_5 A 14561 1800 2 -1 1 +$abc$733$n149 365 OAI21X1_14 Y 19391 1800 2 -1 1 +$abc$733$n150 368 NAND2X1_11 twfeed3 17121 7800 5 -1 1 +$abc$733$n150 366 NAND2X1_11 twfeed3 17121 5800 4 1 1 +$abc$733$n150 369 NAND3X1_5 twfeed3 16801 9800 6 -1 1 +$abc$733$n150 367 NAND3X1_5 twfeed3 16801 7800 5 1 1 +$abc$733$n150 367 NAND2X1_11 twfeed2 16961 7800 5 -1 1 +$abc$733$n150 366 NAND2X1_11 twfeed2 16961 5800 4 1 1 +$abc$733$n150 369 NAND3X1_5 B 16921 9800 6 -1 1 +$abc$733$n150 366 AOI21X1_11 B 18721 5800 4 1 1 +$abc$733$n150 366 AOI22X1_1 B 17761 5800 4 1 1 +$abc$733$n150 368 NAND2X1_11 B 17121 7800 5 -1 1 +$abc$733$n150 366 OAI21X1_15 A 11921 5800 4 -1 1 +$abc$733$n150 366 AND2X2_2 Y 12062 5800 4 1 1 +$abc$733$n151_1 370 NOR2X1_15 A 11361 5800 4 -1 1 +$abc$733$n151_1 370 INVX1_22 Y 12161 5800 4 -1 1 +$abc$733$n152 371 OAI21X1_15 B 11841 5800 4 -1 1 +$abc$733$n152 371 NOR2X1_15 Y 11201 5800 4 -1 1 +$abc$733$n153_1 375 OAI21X1_15 twfeed2 11841 5800 4 -1 1 +$abc$733$n153_1 372 OAI21X1_15 twfeed2 11841 3800 3 1 1 +$abc$733$n153_1 372 DFFSR_3 twfeed8 11841 3800 3 -1 1 +$abc$733$n153_1 373 DFFSR_3 twfeed8 11841 1800 2 1 1 +$abc$733$n153_1 373 DFFSR_5 twfeed10 11681 1800 2 -1 1 +$abc$733$n153_1 374 DFFSR_5 twfeed10 11681 -200 1 1 1 +$abc$733$n153_1 374 NAND2X1_5 B 14241 -200 1 1 1 +$abc$733$n153_1 375 OAI21X1_15 Y 11711 5800 4 -1 1 +counter<1>_FF_INPUT 376 DFFSR_17 D 15201 1800 2 1 1 +counter<1>_FF_INPUT 376 NAND2X1_5 Y 14301 1800 2 -1 1 +$abc$733$n155 378 OAI21X1_19 twfeed4 17601 5800 4 -1 1 +$abc$733$n155 377 OAI21X1_19 twfeed4 17601 3800 3 1 1 +$abc$733$n155 379 AOI22X1_1 twfeed3 17601 7800 5 -1 1 +$abc$733$n155 378 AOI22X1_1 twfeed3 17601 5800 4 1 1 +$abc$733$n155 381 OAI21X1_27 twfeed1 17601 9800 6 -1 1 +$abc$733$n155 379 OAI21X1_27 twfeed1 17601 7800 5 1 1 +$abc$733$n155 377 XOR2X1_1 twfeed1 17601 3800 3 -1 1 +$abc$733$n155 380 XOR2X1_1 twfeed1 17601 1800 2 1 1 +$abc$733$n155 381 OAI21X1_27 A 17681 9800 6 -1 1 +$abc$733$n155 378 NOR2X1_18 A 15201 5800 4 1 1 +$abc$733$n155 378 OAI21X1_19 B 17921 5800 4 -1 1 +$abc$733$n155 380 OAI21X1_18 B 17121 1800 2 1 1 +$abc$733$n155 380 XOR2X1_1 A 17671 1800 2 1 1 +$abc$733$n155 378 NAND2X1_6 Y 14021 5800 4 1 1 +$abc$733$n156 382 OAI21X1_16 B 18881 1800 2 1 1 +$abc$733$n156 382 XOR2X1_1 Y 18081 1800 2 1 1 +N<3> 383 twpin_N<3> N<3> 24061 1340 -2 1 1 +N<3> 383 PSEUDO_CELL PSEUDO_PIN 23281 800 2 2 0 +N<3> 383 PSEUDO_CELL PSEUDO_PIN 23281 800 -2 -1 0 +N<3> 383 NOR2X1_16 A 23041 1800 2 -1 1 +N<3> 383 OAI21X1_17 A 22161 1800 2 -1 1 +N<3> 383 NAND2X1_8 A 21121 1800 2 -1 1 +N<3> 383 INVX1_23 A 20641 1800 2 1 1 +$abc$733$n157 385 NAND3X1_3 A 20801 3800 3 -1 1 +$abc$733$n157 384 NAND2X1_7 A 20321 1800 2 1 1 +$abc$733$n157 385 INVX1_23 Y 20481 3800 3 -1 1 +$abc$733$n157 384 INVX1_23 Y 20481 1800 2 1 1 +$abc$733$n158_1 386 NAND3X1_2 B 19561 1800 2 1 1 +$abc$733$n158_1 386 NAND2X1_7 Y 20061 1800 2 1 1 +$abc$733$n159 388 NAND3X1_3 twfeed1 20801 3800 3 -1 1 +$abc$733$n159 387 NAND3X1_3 twfeed1 20801 1800 2 1 1 +$abc$733$n159 388 NAND3X1_2 C 19681 3800 3 -1 1 +$abc$733$n159 387 NAND2X1_8 Y 20861 1800 2 -1 1 +$abc$733$n160_1 389 OAI21X1_16 C 19121 3800 3 -1 1 +$abc$733$n160_1 389 NAND3X1_2 Y 19521 3800 3 -1 1 +counter<2>_FF_INPUT 390 DFFSR_18 D 16001 1800 2 -1 1 +counter<2>_FF_INPUT 390 OAI21X1_16 Y 19011 1800 2 1 1 +N<4> 393 OAI21X1_17 twfeed3 21921 1800 2 -1 1 +N<4> 391 OAI21X1_17 twfeed3 21921 -200 1 1 1 +N<4> 392 OAI21X1_17 twfeed4 21761 1800 2 -1 1 +N<4> 391 OAI21X1_17 twfeed4 21761 -200 1 1 1 +N<4> 391 twpin_N<4> N<4> 21841 -500 -3 -1 1 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21921 -201 1 -1 0 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21921 -201 -3 1 0 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21761 -201 1 -1 0 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21761 -201 -3 1 0 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21841 -201 1 -1 0 +N<4> 391 PSEUDO_CELL PSEUDO_PIN 21841 -201 -3 1 0 +N<4> 393 NOR2X1_16 B 22721 1800 2 -1 1 +N<4> 392 INVX1_24 A 21601 1800 2 1 1 +N<4> 391 OAI21X1_17 C 21841 -200 1 1 1 +$abc$733$n162_1 395 NAND2X1_9 twfeed3 21601 1800 2 -1 1 +$abc$733$n162_1 394 NAND2X1_9 twfeed3 21601 -200 1 1 1 +$abc$733$n162_1 394 NAND2X1_9 B 21601 -200 1 1 1 +$abc$733$n162_1 395 OAI21X1_17 Y 21951 1800 2 -1 1 +$abc$733$n163_1 396 NAND3X1_3 B 21001 1800 2 1 1 +$abc$733$n163_1 396 INVX1_24 Y 21441 1800 2 1 1 +$abc$733$n164_1 398 NAND3X1_3 twfeed4 21281 3800 3 -1 1 +$abc$733$n164_1 397 NAND3X1_3 twfeed4 21281 1800 2 1 1 +$abc$733$n164_1 399 DFFSR_21 twfeed13 21281 5800 4 -1 1 +$abc$733$n164_1 398 DFFSR_21 twfeed13 21281 3800 3 1 1 +$abc$733$n164_1 399 NOR2X1_19 B 22721 5800 4 1 1 +$abc$733$n164_1 399 OAI21X1_23 A 23601 5800 4 1 1 +$abc$733$n164_1 399 OAI21X1_22 B 23041 5800 4 -1 1 +$abc$733$n164_1 399 OAI21X1_21 B 22401 5800 4 1 1 +$abc$733$n164_1 397 NAND2X1_9 A 21281 1800 2 -1 1 +$abc$733$n164_1 398 NAND3X1_3 Y 20961 3800 3 -1 1 +$abc$733$n165 402 DFFSR_21 twfeed15 21601 5800 4 -1 1 +$abc$733$n165 400 DFFSR_21 twfeed15 21601 3800 3 1 1 +$abc$733$n165 400 INVX1_24 twfeed1 21601 3800 3 -1 1 +$abc$733$n165 401 INVX1_24 twfeed1 21601 1800 2 1 1 +$abc$733$n165 402 OAI21X1_20 B 19041 5800 4 -1 1 +$abc$733$n165 401 NAND2X1_9 Y 21541 1800 2 -1 1 +$abc$733$n166 403 NOR2X1_17 B 18081 5800 4 1 1 +$abc$733$n166 403 OAI21X1_19 A 18001 5800 4 -1 1 +$abc$733$n166 403 OR2X2_1 Y 17441 5800 4 -1 1 +$abc$733$n167 405 XOR2X1_1 twfeed2 17761 3800 3 -1 1 +$abc$733$n167 404 XOR2X1_1 twfeed2 17761 1800 2 1 1 +$abc$733$n167 405 OAI21X1_19 C 17681 3800 3 1 1 +$abc$733$n167 404 OAI21X1_18 Y 17251 1800 2 1 1 +$abc$733$n168 407 NAND2X1_10 twfeed3 18241 5800 4 -1 1 +$abc$733$n168 406 NAND2X1_10 twfeed3 18241 3800 3 1 1 +$abc$733$n168 406 NAND2X1_10 B 18241 3800 3 1 1 +$abc$733$n168 407 OAI21X1_19 Y 17791 5800 4 -1 1 +$abc$733$n169 409 NAND2X1_10 twfeed2 18401 5800 4 -1 1 +$abc$733$n169 408 NAND2X1_10 twfeed2 18401 3800 3 1 1 +$abc$733$n169 408 OAI21X1_20 C 18801 3800 3 1 1 +$abc$733$n169 409 NAND2X1_10 Y 18301 5800 4 -1 1 +counter<3>_FF_INPUT 410 DFFSR_19 D 14241 5800 4 -1 1 +counter<3>_FF_INPUT 410 OAI21X1_20 Y 18911 5800 4 -1 1 +N<5> 416 DFFSR_21 twfeed21 22561 5800 4 -1 1 +N<5> 411 DFFSR_21 twfeed21 22561 3800 3 1 1 +N<5> 418 BUFX2_15 twfeed3 22401 15800 9 -1 1 +N<5> 412 BUFX2_15 twfeed3 22401 13800 8 1 1 +N<5> 412 DFFSR_7 twfeed17 22241 13800 8 -1 1 +N<5> 413 DFFSR_7 twfeed17 22241 11800 7 1 1 +N<5> 413 DFFSR_20 twfeed15 22241 11800 7 -1 1 +N<5> 414 DFFSR_20 twfeed15 22241 9800 6 1 1 +N<5> 414 INVX1_27 twfeed1 22241 9800 6 -1 1 +N<5> 415 INVX1_27 twfeed1 22241 7800 5 1 1 +N<5> 415 OAI21X1_21 twfeed3 22241 7800 5 -1 1 +N<5> 416 OAI21X1_21 twfeed3 22241 5800 4 1 1 +N<5> 411 INVX1_25 twfeed1 22561 3800 3 -1 1 +N<5> 417 INVX1_25 twfeed1 22561 1800 2 1 1 +N<5> 418 twpin_N<5> N<5> 24061 14260 -2 1 1 +N<5> 418 PSEUDO_CELL PSEUDO_PIN 23281 14800 9 2 0 +N<5> 418 PSEUDO_CELL PSEUDO_PIN 23281 14800 -2 -1 0 +N<5> 412 NOR2X1_21 A 21921 13800 8 1 1 +N<5> 418 OR2X2_2 A 23041 15800 9 -1 1 +N<5> 416 OAI21X1_22 A 22961 5800 4 -1 1 +N<5> 416 OAI21X1_21 A 22481 5800 4 1 1 +N<5> 417 INVX1_25 A 22561 1800 2 1 1 +$abc$733$n171 419 AOI21X1_10 C 22241 1800 2 1 1 +$abc$733$n171 419 INVX1_25 Y 22401 1800 2 1 1 +$abc$733$n172 420 NAND3X1_4 B 22921 1800 2 1 1 +$abc$733$n172 420 AOI21X1_10 A 21841 1800 2 1 1 +$abc$733$n172 420 NOR2X1_16 Y 22881 1800 2 -1 1 +$abc$733$n173 423 DFFSR_21 twfeed17 21921 5800 4 -1 1 +$abc$733$n173 421 DFFSR_21 twfeed17 21921 3800 3 1 1 +$abc$733$n173 421 AOI21X1_10 twfeed2 21921 3800 3 -1 1 +$abc$733$n173 422 AOI21X1_10 twfeed2 21921 1800 2 1 1 +$abc$733$n173 423 OAI22X1_1 A 21841 5800 4 1 1 +$abc$733$n173 422 AOI21X1_10 Y 22081 1800 2 1 1 +$abc$733$n174 424 OAI22X1_1 B 21761 5800 4 1 1 +$abc$733$n174 424 OAI21X1_21 Y 22271 5800 4 1 1 +$abc$733$n175 425 AOI21X1_11 A 18641 5800 4 1 1 +$abc$733$n175 425 AOI22X1_1 A 17841 5800 4 1 1 +$abc$733$n175 425 NOR2X1_17 Y 18241 5800 4 1 1 +$abc$733$n176 426 AOI22X1_1 D 17461 5800 4 1 1 +$abc$733$n176 426 NAND2X1_11 Y 17061 5800 4 1 1 +$abc$733$n177 427 OAI22X1_1 D 21441 5800 4 1 1 +$abc$733$n177 427 AOI22X1_1 Y 17591 5800 4 1 1 +counter<4>_FF_INPUT 430 NAND3X1_6 twfeed2 21601 9800 6 -1 1 +counter<4>_FF_INPUT 428 NAND3X1_6 twfeed2 21601 7800 5 1 1 +counter<4>_FF_INPUT 428 OAI22X1_1 twfeed3 21601 7800 5 -1 1 +counter<4>_FF_INPUT 429 OAI22X1_1 twfeed3 21601 5800 4 1 1 +counter<4>_FF_INPUT 430 DFFSR_20 D 21281 9800 6 1 1 +counter<4>_FF_INPUT 429 OAI22X1_1 Y 21601 5800 4 1 1 +N<6> 437 OAI21X1_22 twfeed4 23361 5800 4 -1 1 +N<6> 431 OAI21X1_22 twfeed4 23361 3800 3 1 1 +N<6> 438 OR2X2_2 twfeed3 22721 15800 9 -1 1 +N<6> 432 OR2X2_2 twfeed3 22721 13800 8 1 1 +N<6> 438 OR2X2_2 twfeed1 23041 15800 9 -1 1 +N<6> 433 OR2X2_2 twfeed1 23041 13800 8 1 1 +N<6> 433 DFFSR_7 twfeed22 23041 13800 8 -1 1 +N<6> 434 DFFSR_7 twfeed22 23041 11800 7 1 1 +N<6> 434 DFFSR_20 twfeed20 23041 11800 7 -1 1 +N<6> 435 DFFSR_20 twfeed20 23041 9800 6 1 1 +N<6> 435 OAI21X1_28 twfeed3 23361 9800 6 -1 1 +N<6> 436 OAI21X1_28 twfeed3 23361 7800 5 1 1 +N<6> 436 OAI21X1_23 twfeed3 23361 7800 5 -1 1 +N<6> 437 OAI21X1_23 twfeed3 23361 5800 4 1 1 +N<6> 437 twpin_N<6> N<6> 24061 4800 -2 1 1 +N<6> 437 PSEUDO_CELL PSEUDO_PIN 23441 4800 4 2 0 +N<6> 437 PSEUDO_CELL PSEUDO_PIN 23441 4800 -2 -1 0 +N<6> 432 NOR2X1_21 B 21601 13800 8 1 1 +N<6> 438 OR2X2_2 B 22841 15800 9 -1 1 +N<6> 431 OAI21X1_22 C 23281 3800 3 1 1 +$abc$733$n179 440 OAI21X1_23 twfeed4 23201 7800 5 -1 1 +$abc$733$n179 439 OAI21X1_23 twfeed4 23201 5800 4 1 1 +$abc$733$n179 440 OAI21X1_23 C 23281 7800 5 -1 1 +$abc$733$n179 439 OAI21X1_22 Y 23171 5800 4 -1 1 +$abc$733$n180 446 OR2X2_2 twfeed4 22561 15800 9 -1 1 +$abc$733$n180 441 OR2X2_2 twfeed4 22561 13800 8 1 1 +$abc$733$n180 441 DFFSR_7 twfeed19 22561 13800 8 -1 1 +$abc$733$n180 442 DFFSR_7 twfeed19 22561 11800 7 1 1 +$abc$733$n180 442 DFFSR_20 twfeed17 22561 11800 7 -1 1 +$abc$733$n180 443 DFFSR_20 twfeed17 22561 9800 6 1 1 +$abc$733$n180 443 OAI21X1_26 twfeed3 22561 9800 6 -1 1 +$abc$733$n180 444 OAI21X1_26 twfeed3 22561 7800 5 1 1 +$abc$733$n180 444 OAI21X1_21 twfeed1 22561 7800 5 -1 1 +$abc$733$n180 445 OAI21X1_21 twfeed1 22561 5800 4 1 1 +$abc$733$n180 445 NOR2X1_19 A 23041 5800 4 1 1 +$abc$733$n180 445 OAI21X1_23 B 23521 5800 4 1 1 +$abc$733$n180 446 OR2X2_2 Y 22561 15800 9 -1 1 +$abc$733$n181 447 OAI21X1_25 B 20961 5800 4 1 1 +$abc$733$n181 447 OAI21X1_23 Y 23391 5800 4 1 1 +$abc$733$n182 448 AND2X2_6 A 13601 5800 4 1 1 +$abc$733$n182 448 OAI21X1_24 A 20081 5800 4 1 1 +$abc$733$n182 448 NOR2X1_18 Y 15361 5800 4 1 1 +$abc$733$n183 449 AOI21X1_11 C 19041 5800 4 1 1 +$abc$733$n183 449 INVX1_26 Y 19201 5800 4 1 1 +$abc$733$n184 450 OAI21X1_24 B 20161 5800 4 1 1 +$abc$733$n184 450 AOI21X1_11 Y 18881 5800 4 1 1 +$abc$733$n185 452 OAI21X1_25 twfeed4 20641 7800 5 -1 1 +$abc$733$n185 451 OAI21X1_25 twfeed4 20641 5800 4 1 1 +$abc$733$n185 452 OAI21X1_25 C 20721 7800 5 -1 1 +$abc$733$n185 451 OAI21X1_24 Y 20291 5800 4 1 1 +counter<5>_FF_INPUT 453 DFFSR_21 D 20641 5800 4 -1 1 +counter<5>_FF_INPUT 453 OAI21X1_25 Y 20831 5800 4 1 1 +N<7> 454 twpin_N<7> N<7> 24061 9130 -2 1 1 +N<7> 454 PSEUDO_CELL PSEUDO_PIN 23441 8800 6 2 0 +N<7> 454 PSEUDO_CELL PSEUDO_PIN 23441 8800 -2 -1 0 +N<7> 454 OAI21X1_28 A 23121 9800 6 -1 1 +N<7> 454 OAI21X1_26 A 22801 9800 6 -1 1 +N<7> 454 INVX1_27 A 22241 9800 6 -1 1 +$abc$733$n187 456 NAND3X1_6 twfeed1 21441 9800 6 -1 1 +$abc$733$n187 455 NAND3X1_6 twfeed1 21441 7800 5 1 1 +$abc$733$n187 455 NAND3X1_6 A 21441 7800 5 1 1 +$abc$733$n187 456 NOR2X1_20 A 20961 9800 6 -1 1 +$abc$733$n187 456 INVX1_27 Y 22081 9800 6 -1 1 +$abc$733$n188 459 NOR2X1_20 twfeed3 21281 9800 6 -1 1 +$abc$733$n188 457 NOR2X1_20 twfeed3 21281 7800 5 1 1 +$abc$733$n188 457 NOR2X1_19 twfeed2 22881 7800 5 -1 1 +$abc$733$n188 458 NOR2X1_19 twfeed2 22881 5800 4 1 1 +$abc$733$n188 457 NAND3X1_6 C 21761 7800 5 1 1 +$abc$733$n188 459 NOR2X1_20 B 21281 9800 6 -1 1 +$abc$733$n188 458 NOR2X1_19 Y 22881 5800 4 1 1 +$abc$733$n189 460 OAI22X1_2 A 20081 9800 6 -1 1 +$abc$733$n189 460 NOR2X1_20 Y 21121 9800 6 -1 1 +$abc$733$n190 466 DFFSR_7 twfeed14 21761 13800 8 -1 1 +$abc$733$n190 461 DFFSR_7 twfeed14 21761 11800 7 1 1 +$abc$733$n190 461 DFFSR_20 twfeed12 21761 11800 7 -1 1 +$abc$733$n190 462 DFFSR_20 twfeed12 21761 9800 6 1 1 +$abc$733$n190 462 NAND3X1_6 twfeed3 21761 9800 6 -1 1 +$abc$733$n190 463 NAND3X1_6 twfeed3 21761 7800 5 1 1 +$abc$733$n190 463 OAI22X1_1 twfeed2 21761 7800 5 -1 1 +$abc$733$n190 464 OAI22X1_1 twfeed2 21761 5800 4 1 1 +$abc$733$n190 464 DFFSR_21 twfeed16 21761 5800 4 -1 1 +$abc$733$n190 465 DFFSR_21 twfeed16 21761 3800 3 1 1 +$abc$733$n190 465 NAND3X1_4 C 23041 3800 3 -1 1 +$abc$733$n190 466 NOR2X1_21 Y 21761 13800 8 1 1 +$abc$733$n191 470 OAI21X1_26 twfeed2 22721 9800 6 -1 1 +$abc$733$n191 467 OAI21X1_26 twfeed2 22721 7800 5 1 1 +$abc$733$n191 467 NOR2X1_19 twfeed3 22721 7800 5 -1 1 +$abc$733$n191 468 NOR2X1_19 twfeed3 22721 5800 4 1 1 +$abc$733$n191 468 DFFSR_21 twfeed22 22721 5800 4 -1 1 +$abc$733$n191 469 DFFSR_21 twfeed22 22721 3800 3 1 1 +$abc$733$n191 470 OAI21X1_28 B 23201 9800 6 -1 1 +$abc$733$n191 470 OAI21X1_26 B 22721 9800 6 -1 1 +$abc$733$n191 469 NAND3X1_4 Y 22881 3800 3 -1 1 +$abc$733$n192 471 OAI22X1_2 B 20001 9800 6 -1 1 +$abc$733$n192 471 OAI21X1_26 Y 22591 9800 6 -1 1 +$abc$733$n193 472 NAND3X1_5 A 17121 7800 5 1 1 +$abc$733$n193 472 INVX1_28 Y 17281 7800 5 1 1 +$abc$733$n194 474 NAND2X1_11 twfeed1 16801 7800 5 -1 1 +$abc$733$n194 473 NAND2X1_11 twfeed1 16801 5800 4 1 1 +$abc$733$n194 474 NAND3X1_5 C 16801 7800 5 1 1 +$abc$733$n194 473 AND2X2_3 Y 16580 5800 4 1 1 +$abc$733$n195 477 NAND3X1_5 twfeed2 16961 9800 6 -1 1 +$abc$733$n195 475 NAND3X1_5 twfeed2 16961 7800 5 1 1 +$abc$733$n195 476 NOR2X1_3 twfeed1 16161 9800 6 -1 1 +$abc$733$n195 475 NOR2X1_3 twfeed1 16161 7800 5 1 1 +$abc$733$n195 476 AOI22X1_2 D 16141 9800 6 1 1 +$abc$733$n195 477 AND2X2_4 A 18241 9800 6 -1 1 +$abc$733$n195 475 NAND3X1_5 Y 16961 7800 5 1 1 +$abc$733$n196 478 AND2X2_4 B 18401 9800 6 -1 1 +$abc$733$n196 478 OAI21X1_27 Y 17891 9800 6 -1 1 +$abc$733$n197 479 OAI22X1_2 D 19681 9800 6 -1 1 +$abc$733$n197 479 AND2X2_4 Y 18660 9800 6 -1 1 +counter<6>_FF_INPUT 480 DFFSR_22 D 18561 9800 6 1 1 +counter<6>_FF_INPUT 480 OAI22X1_2 Y 19841 9800 6 -1 1 +N<8> 484 OAI21X1_28 twfeed4 23521 9800 6 -1 1 +N<8> 481 OAI21X1_28 twfeed4 23521 7800 5 1 1 +N<8> 485 INVX1_29 twfeed1 23361 15800 9 -1 1 +N<8> 482 INVX1_29 twfeed1 23361 13800 8 1 1 +N<8> 482 INVX1_4 twfeed1 23361 13800 8 -1 1 +N<8> 483 INVX1_4 twfeed1 23361 11800 7 1 1 +N<8> 483 DFFSR_20 twfeed22 23361 11800 7 -1 1 +N<8> 484 DFFSR_20 twfeed22 23361 9800 6 1 1 +N<8> 481 twpin_N<8> N<8> 24061 8800 -2 1 1 +N<8> 481 PSEUDO_CELL PSEUDO_PIN 23601 6800 5 2 0 +N<8> 481 PSEUDO_CELL PSEUDO_PIN 23601 6800 -2 -1 0 +N<8> 485 INVX1_29 A 23361 15800 9 -1 1 +N<8> 481 OAI21X1_28 C 23441 7800 5 1 1 +$abc$733$n199 486 NAND3X1_7 B 20521 9800 6 -1 1 +$abc$733$n199 486 OAI21X1_28 Y 23331 9800 6 -1 1 +$abc$733$n200 489 INVX1_4 twfeed2 23201 13800 8 -1 1 +$abc$733$n200 487 INVX1_4 twfeed2 23201 11800 7 1 1 +$abc$733$n200 487 DFFSR_20 twfeed21 23201 11800 7 -1 1 +$abc$733$n200 488 DFFSR_20 twfeed21 23201 9800 6 1 1 +$abc$733$n200 488 NAND3X1_6 B 21641 9800 6 -1 1 +$abc$733$n200 489 INVX1_29 Y 23201 13800 8 1 1 +$abc$733$n201 490 NAND3X1_7 C 20641 7800 5 1 1 +$abc$733$n201 490 NAND3X1_6 Y 21601 7800 5 1 1 +$abc$733$n202 491 OAI21X1_29 C 19281 7800 5 1 1 +$abc$733$n202 491 NAND3X1_7 Y 20481 7800 5 1 1 +$abc$733$n203 492 OAI21X1_29 B 19041 9800 6 -1 1 +$abc$733$n203 492 AOI22X1_2 Y 16011 9800 6 1 1 +counter<7>_FF_INPUT 495 AOI21X1_1 twfeed3 19201 13800 8 -1 1 +counter<7>_FF_INPUT 493 AOI21X1_1 twfeed3 19201 11800 7 1 1 +counter<7>_FF_INPUT 493 DFFSR_22 twfeed5 19201 11800 7 -1 1 +counter<7>_FF_INPUT 494 DFFSR_22 twfeed5 19201 9800 6 1 1 +counter<7>_FF_INPUT 495 DFFSR_23 D 18721 13800 8 1 1 +counter<7>_FF_INPUT 494 OAI21X1_29 Y 19171 9800 6 -1 1 +$auto$iopadmap.cc:313:execute$882 497 DFFSR_15 twfeed21 7041 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$882 496 DFFSR_15 twfeed21 7041 -200 1 1 1 +$auto$iopadmap.cc:313:execute$882 496 DFFSR_15 Q 7041 -200 1 1 1 +$auto$iopadmap.cc:313:execute$882 497 BUFX2_19 A 7681 1800 2 -1 1 +$auto$iopadmap.cc:313:execute$882 497 INVX1_30 A 7841 1800 2 -1 1 +$abc$733$n205 498 AOI21X1_12 B 8321 1800 2 -1 1 +$abc$733$n205 498 INVX1_30 Y 8001 1800 2 -1 1 +$abc$733$n206 499 NAND3X1_8 C 8961 -200 1 1 1 +$abc$733$n206 499 INVX1_31 Y 9441 -200 1 1 1 +$abc$733$n207 501 NAND3X1_8 twfeed2 9121 1800 2 -1 1 +$abc$733$n207 500 NAND3X1_8 twfeed2 9121 -200 1 1 1 +$abc$733$n207 501 AOI21X1_12 A 8241 1800 2 -1 1 +$abc$733$n207 500 NAND3X1_8 Y 9121 -200 1 1 1 +done_FF_INPUT 502 DFFSR_15 D 5121 1800 2 -1 1 +done_FF_INPUT 502 AOI21X1_12 Y 8481 1800 2 -1 1 +$abc$733$n209 503 AOI21X1_13 C 7041 9800 6 -1 1 +$abc$733$n209 503 OAI21X1_30 Y 7391 9800 6 -1 1 +sr<1>_FF_INPUT 504 DFFSR_25 D 4481 9800 6 -1 1 +sr<1>_FF_INPUT 504 AOI21X1_13 Y 6881 9800 6 -1 1 +$abc$546$n149 505 DFFSR_1 D 7041 1800 2 1 1 +$abc$546$n149 505 AND2X2_5 Y 5540 1800 2 1 1 +$abc$546$n150 508 OAI21X1_15 twfeed3 11681 5800 4 -1 1 +$abc$546$n150 506 OAI21X1_15 twfeed3 11681 3800 3 1 1 +$abc$546$n150 506 DFFSR_3 twfeed9 11681 3800 3 -1 1 +$abc$546$n150 507 DFFSR_3 twfeed9 11681 1800 2 1 1 +$abc$546$n150 507 DFFSR_3 D 11681 1800 2 1 1 +$abc$546$n150 508 AND2X2_6 Y 13182 5800 4 1 1 +reset 509 twpin_reset reset 4481 18100 -4 1 1 +reset 509 PSEUDO_CELL PSEUDO_PIN 4481 17801 10 1 0 +reset 509 PSEUDO_CELL PSEUDO_PIN 4481 17801 -4 -1 0 +reset 509 INVX8_2 A 4481 17800 10 -1 1 +counter<0> 510 twpin_counter<0> counter<0> 13611 -500 -3 -1 1 +counter<0> 510 PSEUDO_CELL PSEUDO_PIN 13611 -201 1 -1 0 +counter<0> 510 PSEUDO_CELL PSEUDO_PIN 13611 -201 -3 1 0 +counter<0> 510 BUFX2_11 Y 13611 -200 1 1 1 +counter<1> 511 twpin_counter<1> counter<1> 14091 -500 -3 -1 1 +counter<1> 511 PSEUDO_CELL PSEUDO_PIN 14091 -201 1 -1 0 +counter<1> 511 PSEUDO_CELL PSEUDO_PIN 14091 -201 -3 1 0 +counter<1> 511 BUFX2_12 Y 14091 -200 1 1 1 +counter<2> 512 twpin_counter<2> counter<2> 18571 -500 -3 -1 1 +counter<2> 512 PSEUDO_CELL PSEUDO_PIN 18571 -201 1 -1 0 +counter<2> 512 PSEUDO_CELL PSEUDO_PIN 18571 -201 -3 1 0 +counter<2> 512 BUFX2_13 Y 18571 -200 1 1 1 +counter<3> 513 twpin_counter<3> counter<3> 19051 -500 -3 -1 1 +counter<3> 513 PSEUDO_CELL PSEUDO_PIN 19051 -201 1 -1 0 +counter<3> 513 PSEUDO_CELL PSEUDO_PIN 19051 -201 -3 1 0 +counter<3> 513 BUFX2_14 Y 19051 -200 1 1 1 +counter<4> 514 twpin_counter<4> counter<4> 24061 14800 -2 1 1 +counter<4> 514 PSEUDO_CELL PSEUDO_PIN 23441 12800 8 2 0 +counter<4> 514 PSEUDO_CELL PSEUDO_PIN 23441 12800 -2 -1 0 +counter<4> 514 BUFX2_15 Y 22411 13800 8 1 1 +counter<5> 515 twpin_counter<5> counter<5> 24061 800 -2 1 1 +counter<5> 515 PSEUDO_CELL PSEUDO_PIN 23281 800 2 2 0 +counter<5> 515 PSEUDO_CELL PSEUDO_PIN 23281 800 -2 -1 0 +counter<5> 515 BUFX2_16 Y 23531 1800 2 -1 1 +counter<6> 517 DFFSR_11 twfeed15 16481 17800 10 -1 1 +counter<6> 516 DFFSR_11 twfeed15 16481 15800 9 1 1 +counter<6> 517 twpin_counter<6> counter<6> 16481 18100 -4 1 1 +counter<6> 517 PSEUDO_CELL PSEUDO_PIN 16481 17801 10 1 0 +counter<6> 517 PSEUDO_CELL PSEUDO_PIN 16481 17801 -4 -1 0 +counter<6> 516 BUFX2_17 Y 16491 15800 9 -1 1 +counter<7> 518 twpin_counter<7> counter<7> 15211 18100 -4 1 1 +counter<7> 518 PSEUDO_CELL PSEUDO_PIN 15211 17801 10 1 0 +counter<7> 518 PSEUDO_CELL PSEUDO_PIN 15211 17801 -4 -1 0 +counter<7> 518 BUFX2_18 Y 15211 17800 10 -1 1 +done 519 twpin_done done 7351 -500 -3 -1 1 +done 519 PSEUDO_CELL PSEUDO_PIN 7351 -201 1 -1 0 +done 519 PSEUDO_CELL PSEUDO_PIN 7351 -201 -3 1 0 +done 519 BUFX2_19 Y 7351 -200 1 1 1 +dp<0> 520 twpin_dp<0> dp<0> 22731 18100 -4 1 1 +dp<0> 520 PSEUDO_CELL PSEUDO_PIN 22731 17801 10 1 0 +dp<0> 520 PSEUDO_CELL PSEUDO_PIN 22731 17801 -4 -1 0 +dp<0> 520 BUFX2_20 Y 22731 17800 10 -1 1 +dp<1> 521 twpin_dp<1> dp<1> 24061 16800 -2 1 1 +dp<1> 521 PSEUDO_CELL PSEUDO_PIN 23281 18800 10 2 0 +dp<1> 521 PSEUDO_CELL PSEUDO_PIN 23281 18800 -2 -1 0 +dp<1> 521 BUFX2_21 Y 23211 17800 10 -1 1 +dp<2> 522 twpin_dp<2> dp<2> -539 8800 -1 1 1 +dp<2> 522 PSEUDO_CELL PSEUDO_PIN -239 6800 5 -2 0 +dp<2> 522 PSEUDO_CELL PSEUDO_PIN -239 6800 -1 -1 0 +dp<2> 522 BUFX2_22 Y -169 7800 5 1 1 +dp<3> 523 twpin_dp<3> dp<3> -539 14800 -1 1 1 +dp<3> 523 PSEUDO_CELL PSEUDO_PIN -239 14800 9 -2 0 +dp<3> 523 PSEUDO_CELL PSEUDO_PIN -239 14800 -1 -1 0 +dp<3> 523 BUFX2_23 Y -169 15800 9 -1 1 +dp<4> 524 twpin_dp<4> dp<4> 10091 18100 -4 1 1 +dp<4> 524 PSEUDO_CELL PSEUDO_PIN 10091 17801 10 1 0 +dp<4> 524 PSEUDO_CELL PSEUDO_PIN 10091 17801 -4 -1 0 +dp<4> 524 BUFX2_24 Y 10091 17800 10 -1 1 +dp<5> 525 twpin_dp<5> dp<5> 14071 18100 -4 1 1 +dp<5> 525 PSEUDO_CELL PSEUDO_PIN 14071 17801 10 1 0 +dp<5> 525 PSEUDO_CELL PSEUDO_PIN 14071 17801 -4 -1 0 +dp<5> 525 BUFX2_25 Y 14071 17800 10 -1 1 +dp<6> 526 twpin_dp<6> dp<6> -539 12800 -1 1 1 +dp<6> 526 PSEUDO_CELL PSEUDO_PIN -239 12800 8 -2 0 +dp<6> 526 PSEUDO_CELL PSEUDO_PIN -239 12800 -1 -1 0 +dp<6> 526 BUFX2_26 Y -169 13800 8 -1 1 +dp<7> 527 twpin_dp<7> dp<7> -539 6800 -1 1 1 +dp<7> 527 PSEUDO_CELL PSEUDO_PIN -239 4800 4 -2 0 +dp<7> 527 PSEUDO_CELL PSEUDO_PIN -239 4800 -1 -1 0 +dp<7> 527 BUFX2_27 Y -169 5800 4 1 1 +dp<8> 528 twpin_dp<8> dp<8> 3991 18100 -4 1 1 +dp<8> 528 PSEUDO_CELL PSEUDO_PIN 3991 17801 10 1 0 +dp<8> 528 PSEUDO_CELL PSEUDO_PIN 3991 17801 -4 -1 0 +dp<8> 528 BUFX2_28 Y 3991 17800 10 -1 1 +sr<0> 530 DFFSR_11 twfeed18 16001 17800 10 -1 1 +sr<0> 529 DFFSR_11 twfeed18 16001 15800 9 1 1 +sr<0> 530 twpin_sr<0> sr<0> 16001 18100 -4 1 1 +sr<0> 530 PSEUDO_CELL PSEUDO_PIN 16001 17801 10 1 0 +sr<0> 530 PSEUDO_CELL PSEUDO_PIN 16001 17801 -4 -1 0 +sr<0> 529 BUFX2_29 Y 16011 15800 9 -1 1 +sr<1> 531 twpin_sr<1> sr<1> -539 8960 -1 1 1 +sr<1> 531 PSEUDO_CELL PSEUDO_PIN -239 6800 5 -2 0 +sr<1> 531 PSEUDO_CELL PSEUDO_PIN -239 6800 -1 -1 0 +sr<1> 531 BUFX2_30 Y 311 7800 5 1 1 +sr<2> 533 DFFSR_27 twfeed22 8641 17800 10 -1 1 +sr<2> 532 DFFSR_27 twfeed22 8641 15800 9 1 1 +sr<2> 533 twpin_sr<2> sr<2> 8641 18100 -4 1 1 +sr<2> 533 PSEUDO_CELL PSEUDO_PIN 8641 17801 10 1 0 +sr<2> 533 PSEUDO_CELL PSEUDO_PIN 8641 17801 -4 -1 0 +sr<2> 532 BUFX2_31 Y 8651 15800 9 -1 1 +sr<3> 534 twpin_sr<3> sr<3> 9281 18100 -4 1 1 +sr<3> 534 PSEUDO_CELL PSEUDO_PIN 9271 17801 10 1 0 +sr<3> 534 PSEUDO_CELL PSEUDO_PIN 9271 17801 -4 -1 0 +sr<3> 534 BUFX2_32 Y 9271 17800 10 -1 1 +sr<4> 536 DFFSR_10 twfeed5 13281 17800 10 -1 1 +sr<4> 535 DFFSR_10 twfeed5 13281 15800 9 1 1 +sr<4> 536 twpin_sr<4> sr<4> 13281 18100 -4 1 1 +sr<4> 536 PSEUDO_CELL PSEUDO_PIN 13281 17801 10 1 0 +sr<4> 536 PSEUDO_CELL PSEUDO_PIN 13281 17801 -4 -1 0 +sr<4> 535 BUFX2_33 Y 13431 15800 9 -1 1 +sr<5> 538 DFFSR_27 twfeed17 7841 17800 10 -1 1 +sr<5> 537 DFFSR_27 twfeed17 7841 15800 9 1 1 +sr<5> 538 twpin_sr<5> sr<5> 7841 18100 -4 1 1 +sr<5> 538 PSEUDO_CELL PSEUDO_PIN 7841 17801 10 1 0 +sr<5> 538 PSEUDO_CELL PSEUDO_PIN 7841 17801 -4 -1 0 +sr<5> 537 BUFX2_34 Y 7831 15800 9 -1 1 +sr<6> 539 twpin_sr<6> sr<6> 3691 -500 -3 -1 1 +sr<6> 539 PSEUDO_CELL PSEUDO_PIN 3691 -201 1 -1 0 +sr<6> 539 PSEUDO_CELL PSEUDO_PIN 3691 -201 -3 1 0 +sr<6> 539 BUFX2_35 Y 3691 -200 1 1 1 +sr<7> 541 DFFSR_27 twfeed16 7681 17800 10 -1 1 +sr<7> 540 DFFSR_27 twfeed16 7681 15800 9 1 1 +sr<7> 541 twpin_sr<7> sr<7> 7681 18100 -4 1 1 +sr<7> 541 PSEUDO_CELL PSEUDO_PIN 7681 17801 10 1 0 +sr<7> 541 PSEUDO_CELL PSEUDO_PIN 7681 17801 -4 -1 0 +sr<7> 540 BUFX2_36 Y 7691 15800 9 -1 1 +vdd 583 DFFSR_2 twfeed6 3201 3800 3 -1 1 +vdd 542 DFFSR_2 twfeed6 3201 1800 2 1 1 +vdd 584 DFFSR_3 twfeed4 12481 3800 3 -1 1 +vdd 543 DFFSR_3 twfeed4 12481 1800 2 1 1 +vdd 579 DFFSR_14 twfeed6 2401 15800 9 -1 1 +vdd 544 DFFSR_14 twfeed6 2401 13800 8 1 1 +vdd 555 DFFSR_8 twfeed2 3041 11800 7 -1 1 +vdd 545 DFFSR_8 twfeed2 3041 9800 6 1 1 +vdd 567 DFFSR_17 twfeed7 15521 3800 3 -1 1 +vdd 546 DFFSR_17 twfeed7 15521 1800 2 1 1 +vdd 568 DFFSR_17 twfeed19 13601 3800 3 -1 1 +vdd 543 DFFSR_17 twfeed19 13601 1800 2 1 1 +vdd 550 AOI21X1_1 twfeed1 19521 13800 8 -1 1 +vdd 547 AOI21X1_1 twfeed1 19521 11800 7 1 1 +vdd 559 DFFSR_25 twfeed1 5761 9800 6 -1 1 +vdd 548 DFFSR_25 twfeed1 5761 7800 5 1 1 +vdd 553 DFFSR_26 twfeed5 5761 13800 8 -1 1 +vdd 549 DFFSR_26 twfeed5 5761 11800 7 1 1 +vdd 558 BUFX4_3 twfeed1 8961 9800 6 -1 1 +vdd 548 BUFX4_3 twfeed1 8961 7800 5 1 1 +vdd 575 INVX1_2 twfeed1 4161 3800 3 -1 1 +vdd 542 INVX1_2 twfeed1 4161 1800 2 1 1 +vdd 544 INVX1_13 twfeed2 4001 13800 8 -1 1 +vdd 549 INVX1_13 twfeed2 4001 11800 7 1 1 +vdd 581 DFFSR_23 twfeed4 19521 15800 9 -1 1 +vdd 550 DFFSR_23 twfeed4 19521 13800 8 1 1 +vdd 577 DFFSR_23 twfeed13 18081 15800 9 -1 1 +vdd 551 DFFSR_23 twfeed13 18081 13800 8 1 1 +vdd 578 NOR2X1_10 twfeed3 13281 15800 9 -1 1 +vdd 552 NOR2X1_10 twfeed3 13281 13800 8 1 1 +vdd 576 MUX2X1_7 twfeed2 6081 15800 9 -1 1 +vdd 553 MUX2X1_7 twfeed2 6081 13800 8 1 1 +vdd 551 AOI21X1_1 twfeed4 19041 13800 8 -1 1 +vdd 547 AOI21X1_1 twfeed4 19041 11800 7 1 1 +vdd 551 DFFSR_28 twfeed3 18081 13800 8 -1 1 +vdd 554 DFFSR_28 twfeed3 18081 11800 7 1 1 +vdd 552 BUFX4_6 twfeed2 13281 13800 8 -1 1 +vdd 554 BUFX4_6 twfeed2 13281 11800 7 1 1 +vdd 544 DFFSR_12 twfeed8 2561 13800 8 -1 1 +vdd 555 DFFSR_12 twfeed8 2561 11800 7 1 1 +vdd 580 DFFSR_20 twfeed2 20161 11800 7 -1 1 +vdd 556 DFFSR_20 twfeed2 20161 9800 6 1 1 +vdd 554 DFFSR_22 twfeed14 17761 11800 7 -1 1 +vdd 556 DFFSR_22 twfeed14 17761 9800 6 1 1 +vdd 554 BUFX2_1 twfeed2 13601 11800 7 -1 1 +vdd 557 BUFX2_1 twfeed2 13601 9800 6 1 1 +vdd 554 DFFSR_24 twfeed6 10081 11800 7 -1 1 +vdd 558 DFFSR_24 twfeed6 10081 9800 6 1 1 +vdd 549 DFFSR_31 twfeed16 5761 11800 7 -1 1 +vdd 559 DFFSR_31 twfeed16 5761 9800 6 1 1 +vdd 556 OAI22X1_2 twfeed2 20001 9800 6 -1 1 +vdd 560 OAI22X1_2 twfeed2 20001 7800 5 1 1 +vdd 557 DFFSR_4 twfeed16 13601 9800 6 -1 1 +vdd 561 DFFSR_4 twfeed16 13601 7800 5 1 1 +vdd 545 DFFSR_25 twfeed18 3041 9800 6 -1 1 +vdd 562 DFFSR_25 twfeed18 3041 7800 5 1 1 +vdd 560 OAI21X1_24 twfeed1 20001 7800 5 -1 1 +vdd 563 OAI21X1_24 twfeed1 20001 5800 4 1 1 +vdd 582 NOR2X1_18 twfeed1 15201 7800 5 -1 1 +vdd 564 NOR2X1_18 twfeed1 15201 5800 4 1 1 +vdd 561 AND2X2_6 twfeed1 13601 7800 5 -1 1 +vdd 564 AND2X2_6 twfeed1 13601 5800 4 1 1 +vdd 548 OAI21X1_11 twfeed4 5601 7800 5 -1 1 +vdd 565 OAI21X1_11 twfeed4 5601 5800 4 1 1 +vdd 563 DFFSR_21 twfeed5 20001 5800 4 -1 1 +vdd 566 DFFSR_21 twfeed5 20001 3800 3 1 1 +vdd 564 DFFSR_19 twfeed15 15201 5800 4 -1 1 +vdd 567 DFFSR_19 twfeed15 15201 3800 3 1 1 +vdd 564 DFFSR_19 twfeed5 13601 5800 4 -1 1 +vdd 568 DFFSR_19 twfeed5 13601 3800 3 1 1 +vdd 565 DFFSR_16 twfeed10 6401 5800 4 -1 1 +vdd 569 DFFSR_16 twfeed10 6401 3800 3 1 1 +vdd 565 DFFSR_16 twfeed5 5601 5800 4 -1 1 +vdd 570 DFFSR_16 twfeed5 5601 3800 3 1 1 +vdd 569 DFFSR_1 twfeed5 6401 3800 3 -1 1 +vdd 542 DFFSR_1 twfeed5 6401 1800 2 1 1 +vdd 546 DFFSR_18 twfeed5 15361 1800 2 -1 1 +vdd 571 DFFSR_18 twfeed5 15361 -200 1 1 1 +vdd 543 DFFSR_5 twfeed5 12481 1800 2 -1 1 +vdd 572 DFFSR_5 twfeed5 12481 -200 1 1 1 +vdd 542 DFFSR_15 twfeed3 4161 1800 2 -1 1 +vdd 573 DFFSR_15 twfeed3 4161 -200 1 1 1 +vdd 542 DFFSR_32 twfeed1 3201 1800 2 -1 1 +vdd 574 DFFSR_32 twfeed1 3201 -200 1 1 1 +vdd 574 DFFSR_32 S 2541 -200 1 1 1 +vdd 549 DFFSR_31 S 4021 11800 7 -1 1 +vdd 575 DFFSR_30 S 4141 3800 3 1 1 +vdd 548 DFFSR_29 S 9101 7800 5 -1 1 +vdd 554 DFFSR_28 S 17741 11800 7 1 1 +vdd 576 DFFSR_27 S 5941 15800 9 1 1 +vdd 549 DFFSR_26 S 5781 11800 7 1 1 +vdd 548 DFFSR_25 S 5101 7800 5 1 1 +vdd 554 DFFSR_24 S 10221 11800 7 -1 1 +vdd 581 DFFSR_23 S 19341 15800 9 -1 1 +vdd 547 DFFSR_22 S 19181 11800 7 -1 1 +vdd 566 DFFSR_21 S 20021 3800 3 1 1 +vdd 580 DFFSR_20 S 20661 11800 7 -1 1 +vdd 568 DFFSR_19 S 13621 3800 3 1 1 +vdd 571 DFFSR_18 S 15381 -200 1 1 1 +vdd 567 DFFSR_17 S 15821 3800 3 -1 1 +vdd 570 DFFSR_16 S 5621 3800 3 1 1 +vdd 573 DFFSR_15 S 4501 -200 1 1 1 +vdd 579 DFFSR_14 S 2261 15800 9 -1 1 +vdd 562 DFFSR_13 S 3021 7800 5 -1 1 +vdd 555 DFFSR_12 S 3021 11800 7 1 1 +vdd 577 DFFSR_11 S 18061 15800 9 1 1 +vdd 578 DFFSR_10 S 13261 15800 9 1 1 +vdd 579 DFFSR_9 S 2541 15800 9 1 1 +vdd 555 DFFSR_8 S 2541 11800 7 -1 1 +vdd 580 DFFSR_7 S 20341 11800 7 1 1 +vdd 581 DFFSR_6 S 19541 15800 9 1 1 +vdd 572 DFFSR_5 S 12461 -200 1 1 1 +vdd 582 DFFSR_4 S 15341 7800 5 1 1 +vdd 584 DFFSR_3 S 12301 3800 3 -1 1 +vdd 583 DFFSR_2 S 3341 3800 3 -1 1 +vdd 542 DFFSR_1 R 6401 1800 2 1 1 diff -Nru graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.pl1 graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.pl1 --- graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.pl1 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.pl1 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,253 @@ +DFFSR_32 -239 -200 3281 1800 3 1 +BUFX2_35 3281 -200 3761 1800 1 1 +DFFSR_15 3761 -200 7281 1800 1 1 +BUFX2_19 7281 -200 7761 1800 3 1 +INVX1_30 7761 -200 8081 1800 1 1 +AOI21X1_12 8081 -200 8721 1800 1 1 +NAND3X1_8 8721 -200 9361 1800 3 1 +INVX1_31 9361 -200 9681 1800 3 1 +DFFSR_5 9681 -200 13201 1800 3 1 +BUFX2_11 13201 -200 13681 1800 1 1 +BUFX2_12 13681 -200 14161 1800 1 1 +NAND2X1_5 14161 -200 14641 1800 3 1 +DFFSR_18 14641 -200 18161 1800 1 1 +BUFX2_13 18161 -200 18641 1800 1 1 +BUFX2_14 18641 -200 19121 1800 1 1 +OAI21X1_14 19121 -200 19761 1800 3 1 +NOR2X1_14 19761 -200 20241 1800 1 1 +NAND2X1_4 20241 -200 20721 1800 1 1 +NAND2X1_8 20721 -200 21201 1800 3 1 +NAND2X1_9 21201 -200 21681 1800 1 1 +OAI21X1_17 21681 -200 22321 1800 3 1 +INVX1_21 22321 -200 22641 1800 3 1 +NOR2X1_16 22641 -200 23121 1800 3 1 +BUFX2_16 23121 -200 23601 1800 1 1 +INVX1_3 -239 1800 81 3800 0 2 +NOR2X1_6 81 1800 561 3800 0 2 +DFFSR_2 561 1800 4081 3800 2 2 +INVX1_2 4081 1800 4401 3800 0 2 +OAI21X1_2 4401 1800 5041 3800 0 2 +AND2X2_5 5041 1800 5681 3800 0 2 +DFFSR_1 5681 1800 9201 3800 0 2 +INVX1_1 9201 1800 9521 3800 2 2 +DFFSR_3 9521 1800 13041 3800 2 2 +DFFSR_17 13041 1800 16561 3800 2 2 +INVX1_20 16561 1800 16881 3800 2 2 +OAI21X1_18 16881 1800 17521 3800 0 2 +XOR2X1_1 17521 1800 18641 3800 0 2 +OAI21X1_16 18641 1800 19281 3800 0 2 +NAND3X1_2 19281 1800 19921 3800 0 2 +NAND2X1_7 19921 1800 20401 3800 2 2 +INVX1_23 20401 1800 20721 3800 2 2 +NAND3X1_3 20721 1800 21361 3800 0 2 +INVX1_24 21361 1800 21681 3800 2 2 +AOI21X1_10 21681 1800 22321 3800 0 2 +INVX1_25 22321 1800 22641 3800 2 2 +NAND3X1_4 22641 1800 23281 3800 0 2 +INVX1_15 -239 3800 81 5800 3 3 +MUX2X1_6 81 3800 1041 5800 3 3 +INVX1_16 1041 3800 1361 5800 3 3 +DFFSR_30 1361 3800 4881 5800 3 3 +DFFSR_16 4881 3800 8401 5800 1 3 +AND2X2_1 8401 3800 9041 5800 3 3 +NAND3X1_1 9041 3800 9681 5800 3 3 +OAI21X1_12 9681 3800 10321 5800 3 3 +OAI21X1_13 10321 3800 10961 5800 3 3 +NOR2X1_15 10961 3800 11441 5800 3 3 +OAI21X1_15 11441 3800 12081 5800 3 3 +INVX1_22 12081 3800 12401 5800 3 3 +NOR2X1_4 12401 3800 12881 5800 3 3 +DFFSR_19 12881 3800 16401 5800 1 3 +NOR2X1_1 16401 3800 16881 5800 1 3 +OR2X2_1 16881 3800 17521 5800 1 3 +OAI21X1_19 17521 3800 18161 5800 3 3 +NAND2X1_10 18161 3800 18641 5800 3 3 +OAI21X1_20 18641 3800 19281 5800 3 3 +DFFSR_21 19281 3800 22801 5800 1 3 +OAI21X1_22 22801 3800 23441 5800 1 3 +BUFX2_27 -239 5800 241 7800 2 4 +DFFSR_13 241 5800 3761 7800 2 4 +AOI21X1_8 3761 5800 4401 7800 0 4 +BUFX4_4 4401 5800 5041 7800 2 4 +OAI21X1_11 5041 5800 5681 7800 0 4 +OAI21X1_10 5681 5800 6321 7800 2 4 +DFFSR_29 6321 5800 9841 7800 2 4 +INVX4_1 9841 5800 10321 7800 2 4 +NOR2X1_13 10321 5800 10801 7800 2 4 +BUFX2_9 10801 5800 11281 7800 2 4 +BUFX4_8 11281 5800 11921 7800 2 4 +AND2X2_2 11921 5800 12561 7800 2 4 +BUFX2_8 12561 5800 13041 7800 0 4 +AND2X2_6 13041 5800 13681 7800 2 4 +NAND2X1_6 13681 5800 14161 7800 0 4 +NAND2X1_2 14161 5800 14641 7800 2 4 +NOR2X1_5 14641 5800 15121 7800 0 4 +NOR2X1_18 15121 5800 15601 7800 0 4 +NAND2X1_1 15601 5800 16081 7800 2 4 +AND2X2_3 16081 5800 16721 7800 0 4 +NAND2X1_11 16721 5800 17201 7800 0 4 +AOI22X1_1 17201 5800 18001 7800 2 4 +NOR2X1_17 18001 5800 18481 7800 2 4 +AOI21X1_11 18481 5800 19121 7800 0 4 +INVX1_26 19121 5800 19441 7800 2 4 +NOR2X1_2 19441 5800 19921 7800 2 4 +OAI21X1_24 19921 5800 20561 7800 0 4 +OAI21X1_25 20561 5800 21201 7800 2 4 +OAI22X1_1 21201 5800 22001 7800 2 4 +OAI21X1_21 22001 5800 22641 7800 2 4 +NOR2X1_19 22641 5800 23121 7800 2 4 +OAI21X1_23 23121 5800 23761 7800 2 4 +BUFX2_22 -239 7800 241 9800 3 5 +BUFX2_30 241 7800 721 9800 3 5 +INVX1_5 721 7800 1041 9800 1 5 +MUX2X1_1 1041 7800 2001 9800 3 5 +INVX1_6 2001 7800 2321 9800 1 5 +DFFSR_25 2321 7800 5841 9800 3 5 +OAI21X1_6 5841 7800 6481 9800 1 5 +AOI21X1_13 6481 7800 7121 9800 1 5 +OAI21X1_30 7121 7800 7761 9800 3 5 +BUFX4_2 7761 7800 8401 9800 3 5 +BUFX4_3 8401 7800 9041 9800 3 5 +BUFX2_5 9041 7800 9521 9800 3 5 +BUFX2_10 9521 7800 10001 9800 3 5 +AOI21X1_7 10001 7800 10641 9800 1 5 +BUFX4_1 10641 7800 11281 9800 3 5 +BUFX2_2 11281 7800 11761 9800 1 5 +INVX8_1 11761 7800 12561 9800 3 5 +DFFSR_4 12561 7800 16081 9800 3 5 +NOR2X1_3 16081 7800 16561 9800 1 5 +NAND3X1_5 16561 7800 17201 9800 3 5 +INVX1_28 17201 7800 17521 9800 3 5 +OAI21X1_27 17521 7800 18161 9800 1 5 +AND2X2_4 18161 7800 18801 9800 1 5 +OAI21X1_29 18801 7800 19441 9800 1 5 +OAI22X1_2 19441 7800 20241 9800 3 5 +NAND3X1_7 20241 7800 20881 9800 1 5 +NOR2X1_20 20881 7800 21361 9800 1 5 +NAND3X1_6 21361 7800 22001 9800 1 5 +INVX1_27 22001 7800 22321 9800 3 5 +OAI21X1_26 22321 7800 22961 9800 3 5 +OAI21X1_28 22961 7800 23601 9800 1 5 +DFFSR_8 -239 9800 3281 11800 2 6 +DFFSR_31 3281 9800 6801 11800 0 6 +AOI21X1_9 6801 9800 7441 11800 2 6 +DFFSR_24 7441 9800 10961 11800 2 6 +AOI21X1_3 10961 9800 11601 11800 0 6 +OAI21X1_5 11601 9800 12241 11800 2 6 +BUFX2_7 12241 9800 12721 11800 2 6 +BUFX4_7 12721 9800 13361 11800 0 6 +BUFX2_1 13361 9800 13841 11800 0 6 +OAI21X1_9 13841 9800 14481 11800 2 6 +OAI21X1_1 14481 9800 15121 11800 2 6 +BUFX2_3 15121 9800 15601 11800 0 6 +AOI22X1_2 15601 9800 16401 11800 0 6 +DFFSR_22 16401 9800 19921 11800 2 6 +DFFSR_20 19921 9800 23441 11800 0 6 +BUFX2_26 -239 11800 241 13800 3 7 +DFFSR_12 241 11800 3761 13800 3 7 +INVX1_13 3761 11800 4081 13800 1 7 +MUX2X1_5 4081 11800 5041 13800 3 7 +DFFSR_26 5041 11800 8561 13800 1 7 +OAI21X1_7 8561 11800 9201 13800 1 7 +INVX1_14 9201 11800 9521 13800 1 7 +INVX1_18 9521 11800 9841 13800 1 7 +NOR2X1_12 9841 11800 10321 13800 3 7 +NOR2X1_11 10321 11800 10801 13800 3 7 +NAND2X1_3 10801 11800 11281 13800 1 7 +OAI21X1_4 11281 11800 11921 13800 1 7 +XNOR2X1_2 11921 11800 13041 13800 3 7 +BUFX4_6 13041 11800 13681 13800 1 7 +OAI21X1_8 13681 11800 14321 13800 1 7 +AOI21X1_6 14321 11800 14961 13800 3 7 +DFFSR_28 14961 11800 18481 13800 3 7 +NOR2X1_7 18481 11800 18961 13800 1 7 +AOI21X1_1 18961 11800 19601 13800 3 7 +DFFSR_7 19601 11800 23121 13800 1 7 +INVX1_4 23121 11800 23441 13800 3 7 +BUFX2_23 -239 13800 241 15800 2 8 +INVX1_7 241 13800 561 15800 0 8 +MUX2X1_2 561 13800 1521 15800 2 8 +DFFSR_14 1521 13800 5041 15800 0 8 +INVX1_17 5041 13800 5361 15800 0 8 +MUX2X1_7 5361 13800 6321 15800 2 8 +AOI21X1_4 6321 13800 6961 15800 2 8 +INVX1_8 6961 13800 7281 15800 2 8 +BUFX2_36 7281 13800 7761 15800 0 8 +BUFX2_34 7761 13800 8241 15800 2 8 +BUFX2_31 8241 13800 8721 15800 0 8 +AOI21X1_5 8721 13800 9361 15800 2 8 +INVX1_10 9361 13800 9681 15800 0 8 +XNOR2X1_1 9681 13800 10801 15800 0 8 +OAI21X1_3 10801 13800 11441 15800 2 8 +NOR2X1_9 11441 13800 11921 15800 2 8 +MUX2X1_3 11921 13800 12881 15800 0 8 +NOR2X1_10 12881 13800 13361 15800 0 8 +BUFX2_33 13361 13800 13841 15800 2 8 +INVX1_12 13841 13800 14161 15800 2 8 +MUX2X1_4 14161 13800 15121 15800 0 8 +BUFX2_6 15121 13800 15601 15800 0 8 +BUFX2_29 15601 13800 16081 15800 0 8 +BUFX2_17 16081 13800 16561 15800 0 8 +DFFSR_23 16561 13800 20081 15800 2 8 +AOI21X1_2 20081 13800 20721 15800 2 8 +NOR2X1_8 20721 13800 21201 15800 2 8 +INVX1_19 21201 13800 21521 15800 2 8 +NOR2X1_21 21521 13800 22001 15800 2 8 +BUFX2_15 22001 13800 22481 15800 0 8 +OR2X2_2 22481 13800 23121 15800 2 8 +INVX1_29 23121 13800 23441 15800 2 8 +DFFSR_9 -239 15800 3281 17800 3 9 +BUFX4_5 3281 15800 3921 17800 3 9 +BUFX2_28 3921 15800 4401 17800 3 9 +INVX8_2 4401 15800 5201 17800 1 9 +DFFSR_27 5201 15800 8721 17800 1 9 +BUFX2_4 8721 15800 9201 17800 3 9 +BUFX2_32 9201 15800 9681 17800 3 9 +BUFX2_24 9681 15800 10161 17800 1 9 +INVX1_9 10161 15800 10481 17800 1 9 +DFFSR_10 10481 15800 14001 17800 3 9 +BUFX2_25 14001 15800 14481 17800 3 9 +INVX1_11 14481 15800 14801 17800 1 9 +BUFX2_18 14801 15800 15281 17800 1 9 +DFFSR_11 15281 15800 18801 17800 3 9 +DFFSR_6 18801 15800 22321 17800 1 9 +BUFX2_20 22321 15800 22801 17800 1 9 +BUFX2_21 22801 15800 23281 17800 1 9 +twpin_clock 9041 18000 9201 18200 3 -4 +twpin_reset 4401 18000 4561 18200 3 -4 +twpin_start -639 2180 -439 2340 7 -1 +twpin_N<0> 23961 14340 24161 14500 6 -2 +twpin_N<1> 20241 -600 20401 -400 0 -3 +twpin_N<2> 20561 -600 20721 -400 0 -3 +twpin_N<3> 23961 1260 24161 1420 6 -2 +twpin_N<4> 21761 -600 21921 -400 0 -3 +twpin_N<5> 23961 14180 24161 14340 6 -2 +twpin_N<6> 23961 4720 24161 4880 6 -2 +twpin_N<7> 23961 9050 24161 9210 6 -2 +twpin_N<8> 23961 8720 24161 8880 6 -2 +twpin_dp<0> 22651 18000 22811 18200 3 -4 +twpin_dp<1> 23961 16720 24161 16880 6 -2 +twpin_dp<2> -639 8720 -439 8880 7 -1 +twpin_dp<3> -639 14720 -439 14880 7 -1 +twpin_dp<4> 10011 18000 10171 18200 3 -4 +twpin_dp<5> 13991 18000 14151 18200 3 -4 +twpin_dp<6> -639 12720 -439 12880 7 -1 +twpin_dp<7> -639 6720 -439 6880 7 -1 +twpin_dp<8> 3911 18000 4071 18200 3 -4 +twpin_done 7271 -600 7431 -400 0 -3 +twpin_counter<0> 13531 -600 13691 -400 0 -3 +twpin_counter<1> 14011 -600 14171 -400 0 -3 +twpin_counter<2> 18491 -600 18651 -400 0 -3 +twpin_counter<3> 18971 -600 19131 -400 0 -3 +twpin_counter<4> 23961 14720 24161 14880 6 -2 +twpin_counter<5> 23961 720 24161 880 6 -2 +twpin_counter<6> 16401 18000 16561 18200 3 -4 +twpin_counter<7> 15131 18000 15291 18200 3 -4 +twpin_sr<0> 15921 18000 16081 18200 3 -4 +twpin_sr<1> -639 8880 -439 9040 7 -1 +twpin_sr<2> 8561 18000 8721 18200 3 -4 +twpin_sr<3> 9201 18000 9361 18200 3 -4 +twpin_sr<4> 13201 18000 13361 18200 3 -4 +twpin_sr<5> 7761 18000 7921 18200 3 -4 +twpin_sr<6> 3611 -600 3771 -400 0 -3 +twpin_sr<7> 7601 18000 7761 18200 3 -4 diff -Nru graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.pl2 graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.pl2 --- graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.pl2 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.pl2 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,47 @@ +1 -239 -200 23601 1800 0 0 +2 -239 1800 23281 3800 0 0 +3 -239 3800 23441 5800 0 0 +4 -239 5800 23761 7800 0 0 +5 -239 7800 23601 9800 0 0 +6 -239 9800 23441 11800 0 0 +7 -239 11800 23441 13800 0 0 +8 -239 13800 23441 15800 0 0 +9 -239 15800 23281 17800 0 0 +twpin_clock 9041 18000 9201 18200 3 -4 +twpin_reset 4401 18000 4561 18200 3 -4 +twpin_start -639 2180 -439 2340 7 -1 +twpin_N<0> 23961 14340 24161 14500 6 -2 +twpin_N<1> 20241 -600 20401 -400 0 -3 +twpin_N<2> 20561 -600 20721 -400 0 -3 +twpin_N<3> 23961 1260 24161 1420 6 -2 +twpin_N<4> 21761 -600 21921 -400 0 -3 +twpin_N<5> 23961 14180 24161 14340 6 -2 +twpin_N<6> 23961 4720 24161 4880 6 -2 +twpin_N<7> 23961 9050 24161 9210 6 -2 +twpin_N<8> 23961 8720 24161 8880 6 -2 +twpin_dp<0> 22651 18000 22811 18200 3 -4 +twpin_dp<1> 23961 16720 24161 16880 6 -2 +twpin_dp<2> -639 8720 -439 8880 7 -1 +twpin_dp<3> -639 14720 -439 14880 7 -1 +twpin_dp<4> 10011 18000 10171 18200 3 -4 +twpin_dp<5> 13991 18000 14151 18200 3 -4 +twpin_dp<6> -639 12720 -439 12880 7 -1 +twpin_dp<7> -639 6720 -439 6880 7 -1 +twpin_dp<8> 3911 18000 4071 18200 3 -4 +twpin_done 7271 -600 7431 -400 0 -3 +twpin_counter<0> 13531 -600 13691 -400 0 -3 +twpin_counter<1> 14011 -600 14171 -400 0 -3 +twpin_counter<2> 18491 -600 18651 -400 0 -3 +twpin_counter<3> 18971 -600 19131 -400 0 -3 +twpin_counter<4> 23961 14720 24161 14880 6 -2 +twpin_counter<5> 23961 720 24161 880 6 -2 +twpin_counter<6> 16401 18000 16561 18200 3 -4 +twpin_counter<7> 15131 18000 15291 18200 3 -4 +twpin_sr<0> 15921 18000 16081 18200 3 -4 +twpin_sr<1> -639 8880 -439 9040 7 -1 +twpin_sr<2> 8561 18000 8721 18200 3 -4 +twpin_sr<3> 9201 18000 9361 18200 3 -4 +twpin_sr<4> 13201 18000 13361 18200 3 -4 +twpin_sr<5> 7761 18000 7921 18200 3 -4 +twpin_sr<6> 3611 -600 3771 -400 0 -3 +twpin_sr<7> 7601 18000 7761 18200 3 -4 diff -Nru graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.pth graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.pth --- graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.pth 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.pth 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,233 @@ +The paths: +############################################## + +The nets: +############################################## +net 1:$abc$733$n76 xspan:5130 yspan:4450 length:9580 numpins:5 +net 2:$abc$733$n76_bF$buf3 xspan:2511 yspan:10332 length:12843 numpins:6 +net 3:$abc$733$n76_bF$buf2 xspan:4071 yspan:2790 length:6861 numpins:6 +net 4:$abc$733$n76_bF$buf1 xspan:2809 yspan:11630 length:14439 numpins:6 +net 5:$abc$733$n76_bF$buf0 xspan:2220 yspan:2540 length:4760 numpins:5 +net 6:$abc$733$n164 xspan:10420 yspan:16810 length:27230 numpins:6 +net 7:$abc$733$n164_bF$buf4 xspan:5949 yspan:17309 length:23258 numpins:8 +net 8:$abc$733$n164_bF$buf3 xspan:6711 yspan:10660 length:17371 numpins:8 +net 9:$abc$733$n164_bF$buf2 xspan:7689 yspan:11880 length:19569 numpins:7 +net 10:$abc$733$n164_bF$buf1 xspan:20169 yspan:14030 length:34199 numpins:7 +net 11:$abc$733$n164_bF$buf0 xspan:5769 yspan:13790 length:19559 numpins:7 +net 12:clock xspan:8320 yspan:17160 length:25480 numpins:6 +net 13:clock_bF$buf4 xspan:12626 yspan:15996 length:28622 numpins:8 +net 14:clock_bF$buf3 xspan:11826 yspan:20000 length:31826 numpins:8 +net 15:clock_bF$buf2 xspan:9508 yspan:14000 length:23508 numpins:7 +net 16:clock_bF$buf1 xspan:7216 yspan:12998 length:20214 numpins:7 +net 17:clock_bF$buf0 xspan:10396 yspan:12004 length:22400 numpins:7 +net 18:$abc$733$n75_1 xspan:3840 yspan:6280 length:10120 numpins:5 +net 19:$abc$733$n75_1_bF$buf3 xspan:6160 yspan:5100 length:11260 numpins:6 +net 20:$abc$733$n75_1_bF$buf2 xspan:10070 yspan:4310 length:14380 numpins:5 +net 21:$abc$733$n75_1_bF$buf1 xspan:2360 yspan:4370 length:6730 numpins:5 +net 22:$abc$733$n75_1_bF$buf0 xspan:4070 yspan:5100 length:9170 numpins:5 +net 23:state<0> xspan:16560 yspan:20430 length:36990 numpins:12 +net 24:state<3> xspan:5040 yspan:8558 length:13598 numpins:7 +net 25:$auto$iopadmap.cc:313:execute$873<3> xspan:2960 yspan:7369 length:10329 numpins:5 +net 26:$auto$iopadmap.cc:313:execute$873<2> xspan:1839 yspan:7221 length:9060 numpins:6 +net 27:$abc$733$n77 xspan:800 yspan:2878 length:3678 numpins:4 +net 28:$auto$iopadmap.cc:313:execute$873<5> xspan:4480 yspan:8611 length:13091 numpins:4 +net 29:$auto$iopadmap.cc:313:execute$873<4> xspan:5920 yspan:10430 length:16350 numpins:5 +net 30:$abc$733$n78 xspan:4000 yspan:440 length:4440 numpins:3 +net 31:$abc$733$n79 xspan:2820 yspan:2881 length:5701 numpins:4 +net 32:$auto$iopadmap.cc:313:execute$873<7> xspan:2080 yspan:8049 length:10129 numpins:4 +net 33:$auto$iopadmap.cc:313:execute$873<6> xspan:2000 yspan:9088 length:11088 numpins:5 +net 34:$abc$733$n80 xspan:2880 yspan:2880 length:5760 numpins:3 +net 35:$auto$iopadmap.cc:313:execute$873<1> xspan:1600 yspan:5951 length:7551 numpins:4 +net 36:$auto$iopadmap.cc:313:execute$873<0> xspan:5440 yspan:5930 length:11370 numpins:5 +net 37:$abc$733$n81 xspan:1760 yspan:3419 length:5179 numpins:4 +net 38:$abc$733$n82 xspan:420 yspan:140 length:560 numpins:2 +net 39:$abc$733$n83_1 xspan:960 yspan:5899 length:6859 numpins:3 +net 40:$abc$546$n2 xspan:30 yspan:1560 length:1590 numpins:2 +net 41:state<4> xspan:640 yspan:1969 length:2609 numpins:3 +net 42:$abc$733$n85_1 xspan:4400 yspan:300 length:4700 numpins:2 +net 43:state<1> xspan:4480 yspan:1429 length:5909 numpins:3 +net 44:$abc$733$n86 xspan:240 yspan:330 length:570 numpins:2 +net 45:start xspan:2780 yspan:2740 length:5520 numpins:3 +net 46:$abc$733$n87_1 xspan:480 yspan:61 length:541 numpins:2 +net 47:startbuf xspan:160 yspan:1909 length:2069 numpins:2 +net 48:$abc$733$n88 xspan:4800 yspan:281 length:5081 numpins:3 +net 49:$abc$546$n5 xspan:2050 yspan:240 length:2290 numpins:2 +net 50:$auto$iopadmap.cc:313:execute$884<1> xspan:480 yspan:6049 length:6529 numpins:3 +net 51:$abc$733$n90 xspan:3760 yspan:70 length:3830 numpins:2 +net 52:state<2> xspan:2400 yspan:6551 length:8951 numpins:4 +net 53:$abc$733$n91_1 xspan:26720 yspan:33578 length:60298 numpins:12 +net 54:$auto$iopadmap.cc:313:execute$894<0> xspan:10960 yspan:6659 length:17619 numpins:5 +net 55:$abc$733$n92 xspan:320 yspan:201 length:521 numpins:2 +net 56:dp<1>_FF_INPUT xspan:1760 yspan:340 length:2100 numpins:2 +net 57:$auto$iopadmap.cc:313:execute$884<2> xspan:800 yspan:3769 length:4569 numpins:3 +net 58:$abc$733$n94 xspan:320 yspan:61 length:381 numpins:2 +net 59:$auto$iopadmap.cc:313:execute$894<1> xspan:5360 yspan:1719 length:7079 numpins:4 +net 60:$abc$733$n95_1 xspan:4960 yspan:401 length:5361 numpins:3 +net 61:dp<2>_FF_INPUT xspan:419 yspan:2840 length:3259 numpins:2 +net 62:$auto$iopadmap.cc:313:execute$884<3> xspan:320 yspan:2091 length:2411 numpins:3 +net 63:$abc$733$n97_1 xspan:320 yspan:61 length:381 numpins:2 +net 64:$auto$iopadmap.cc:313:execute$894<2> xspan:1520 yspan:5299 length:6819 numpins:4 +net 65:$abc$733$n98_1 xspan:5760 yspan:382 length:6142 numpins:3 +net 66:dp<3>_FF_INPUT xspan:899 yspan:1840 length:2739 numpins:2 +net 67:$auto$iopadmap.cc:313:execute$884<4> xspan:960 yspan:1389 length:2349 numpins:3 +net 68:$abc$733$n100 xspan:2240 yspan:2061 length:4301 numpins:2 +net 69:$auto$iopadmap.cc:313:execute$894<3> xspan:5630 yspan:8201 length:13831 numpins:6 +net 70:$abc$733$n101_1 xspan:3040 yspan:401 length:3441 numpins:4 +net 71:dp<4>_FF_INPUT xspan:221 yspan:1840 length:2061 numpins:2 +net 72:$auto$iopadmap.cc:313:execute$884<5> xspan:1120 yspan:1129 length:2249 numpins:3 +net 73:$abc$733$n103_1 xspan:480 yspan:2061 length:2541 numpins:2 +net 74:$auto$iopadmap.cc:313:execute$894<4> xspan:3961 yspan:9981 length:13942 numpins:6 +net 75:$abc$733$n104 xspan:1440 yspan:5520 length:6960 numpins:4 +net 76:dp<5>_FF_INPUT xspan:2781 yspan:1840 length:4621 numpins:2 +net 77:$auto$iopadmap.cc:313:execute$884<6> xspan:3680 yspan:1129 length:4809 numpins:3 +net 78:$abc$733$n106_1 xspan:320 yspan:61 length:381 numpins:2 +net 79:$auto$iopadmap.cc:313:execute$894<5> xspan:4130 yspan:12461 length:16591 numpins:6 +net 80:$abc$733$n107 xspan:5600 yspan:3940 length:9540 numpins:4 +net 81:dp<6>_FF_INPUT xspan:2141 yspan:840 length:2981 numpins:2 +net 82:$auto$iopadmap.cc:313:execute$884<7> xspan:800 yspan:1909 length:2709 numpins:3 +net 83:$abc$733$n109 xspan:480 yspan:61 length:541 numpins:2 +net 84:$auto$iopadmap.cc:313:execute$894<6> xspan:3920 yspan:6519 length:10439 numpins:4 +net 85:$abc$733$n110_1 xspan:3200 yspan:1879 length:5079 numpins:3 +net 86:dp<7>_FF_INPUT xspan:1981 yspan:2160 length:4141 numpins:2 +net 87:$auto$iopadmap.cc:313:execute$884<8> xspan:960 yspan:3129 length:4089 numpins:3 +net 88:$abc$733$n112 xspan:320 yspan:61 length:381 numpins:2 +net 89:$auto$iopadmap.cc:313:execute$894<7> xspan:4160 yspan:7051 length:11211 numpins:5 +net 90:$abc$733$n113 xspan:3840 yspan:4182 length:8022 numpins:4 +net 91:dp<8>_FF_INPUT xspan:3139 yspan:840 length:3979 numpins:2 +net 92:$auto$iopadmap.cc:313:execute$884<0> xspan:1280 yspan:3129 length:4409 numpins:3 +net 93:$abc$733$n115 xspan:720 yspan:70 length:790 numpins:2 +net 94:N<0> xspan:3420 yspan:1080 length:4500 numpins:2 +net 95:$abc$733$n116_1 xspan:800 yspan:201 length:1001 numpins:2 +net 96:dp<0>_FF_INPUT xspan:160 yspan:3020 length:3180 numpins:2 +net 97:$abc$733$n118_1 xspan:670 yspan:800 length:1470 numpins:2 +net 98:$abc$733$n119 xspan:400 yspan:30 length:430 numpins:2 +net 99:$abc$733$n120 xspan:1920 yspan:160 length:2080 numpins:2 +net 100:$abc$733$n121 xspan:190 yspan:1560 length:1750 numpins:2 +net 101:$abc$733$n122 xspan:880 yspan:30 length:910 numpins:2 +net 102:$abc$733$n123_1 xspan:1440 yspan:160 length:1600 numpins:2 +net 103:$abc$733$n124 xspan:770 yspan:800 length:1570 numpins:2 +net 104:$abc$733$n125 xspan:450 yspan:240 length:690 numpins:2 +net 105:$abc$733$n126 xspan:180 yspan:2750 length:2930 numpins:2 +net 106:$abc$733$n127 xspan:350 yspan:401 length:751 numpins:2 +net 107:sr<0>_FF_INPUT xspan:1760 yspan:340 length:2100 numpins:2 +net 108:$abc$733$n129 xspan:190 yspan:5399 length:5589 numpins:2 +net 109:sr<2>_FF_INPUT xspan:160 yspan:980 length:1140 numpins:2 +net 110:$abc$733$n131 xspan:130 yspan:1399 length:1529 numpins:2 +net 111:sr<3>_FF_INPUT xspan:2400 yspan:3020 length:5420 numpins:2 +net 112:$abc$733$n133_1 xspan:350 yspan:401 length:751 numpins:2 +net 113:sr<4>_FF_INPUT xspan:2560 yspan:340 length:2900 numpins:2 +net 114:$abc$733$n135_1 xspan:3550 yspan:2401 length:5951 numpins:2 +net 115:sr<5>_FF_INPUT xspan:2240 yspan:3020 length:5260 numpins:2 +net 116:$abc$733$n137 xspan:1630 yspan:401 length:2031 numpins:2 +net 117:sr<6>_FF_INPUT xspan:640 yspan:980 length:1620 numpins:2 +net 118:$abc$733$n139 xspan:1470 yspan:3599 length:5069 numpins:2 +net 119:sr<7>_FF_INPUT xspan:2400 yspan:340 length:2740 numpins:2 +net 120:N<1> xspan:4000 yspan:3640 length:7640 numpins:4 +net 121:$abc$733$n141 xspan:5920 yspan:2140 length:8060 numpins:2 +net 122:$abc$733$n142 xspan:880 yspan:3009 length:3889 numpins:3 +net 123:$abc$733$n143 xspan:1539 yspan:540 length:2079 numpins:2 +net 124:$abc$733$n144 xspan:590 yspan:400 length:990 numpins:2 +net 125:counter<0>_FF_INPUT xspan:4350 yspan:240 length:4590 numpins:2 +net 126:N<2> xspan:480 yspan:2521 length:3001 numpins:3 +net 127:$abc$733$n146 xspan:400 yspan:30 length:430 numpins:2 +net 128:$abc$733$n147 xspan:4060 yspan:5799 length:9859 numpins:6 +net 129:$abc$733$n148 xspan:2880 yspan:420 length:3300 numpins:4 +net 130:$abc$733$n149 xspan:4830 yspan:240 length:5070 numpins:2 +net 131:$abc$733$n150 xspan:7080 yspan:4171 length:11251 numpins:6 +net 132:$abc$733$n151_1 xspan:800 yspan:540 length:1340 numpins:2 +net 133:$abc$733$n152 xspan:640 yspan:160 length:800 numpins:2 +net 134:$abc$733$n153_1 xspan:2850 yspan:4240 length:7090 numpins:2 +net 135:counter<1>_FF_INPUT xspan:900 yspan:980 length:1880 numpins:2 +net 136:$abc$733$n155 xspan:4530 yspan:8500 length:13030 numpins:6 +net 137:$abc$733$n156 xspan:800 yspan:560 length:1360 numpins:2 +net 138:N<3> xspan:3900 yspan:1340 length:5240 numpins:5 +net 139:$abc$733$n157 xspan:480 yspan:400 length:880 numpins:3 +net 140:$abc$733$n158_1 xspan:500 yspan:580 length:1080 numpins:2 +net 141:$abc$733$n159 xspan:1180 yspan:1580 length:2760 numpins:2 +net 142:$abc$733$n160_1 xspan:400 yspan:380 length:780 numpins:2 +net 143:counter<2>_FF_INPUT xspan:3010 yspan:1560 length:4570 numpins:2 +net 144:N<4> xspan:1120 yspan:5121 length:6241 numpins:4 +net 145:$abc$733$n162_1 xspan:350 yspan:240 length:590 numpins:2 +net 146:$abc$733$n163_1 xspan:440 yspan:100 length:540 numpins:2 +net 147:$abc$733$n164_1 xspan:3280 yspan:11048 length:14328 numpins:6 +net 148:$abc$733$n165 xspan:2620 yspan:3460 length:6080 numpins:2 +net 149:$abc$733$n166 xspan:640 yspan:1839 length:2479 numpins:3 +net 150:$abc$733$n167 xspan:590 yspan:1800 length:2390 numpins:2 +net 151:$abc$733$n168 xspan:450 yspan:240 length:690 numpins:2 +net 152:$abc$733$n169 xspan:500 yspan:980 length:1480 numpins:2 +net 153:counter<3>_FF_INPUT xspan:4670 yspan:240 length:4910 numpins:2 +net 154:N<5> xspan:3340 yspan:23790 length:27130 numpins:6 +net 155:$abc$733$n171 xspan:160 yspan:501 length:661 numpins:2 +net 156:$abc$733$n172 xspan:1080 yspan:3230 length:4310 numpins:3 +net 157:$abc$733$n173 xspan:240 yspan:4350 length:4590 numpins:2 +net 158:$abc$733$n174 xspan:510 yspan:40 length:550 numpins:2 +net 159:$abc$733$n175 xspan:800 yspan:460 length:1260 numpins:3 +net 160:$abc$733$n176 xspan:400 yspan:500 length:900 numpins:2 +net 161:$abc$733$n177 xspan:3850 yspan:291 length:4141 numpins:2 +net 162:counter<4>_FF_INPUT xspan:320 yspan:3960 length:4280 numpins:2 +net 163:N<6> xspan:3140 yspan:10803 length:13943 numpins:4 +net 164:$abc$733$n179 xspan:110 yspan:2200 length:2310 numpins:2 +net 165:$abc$733$n180 xspan:960 yspan:9040 length:10000 numpins:3 +net 166:$abc$733$n181 xspan:2430 yspan:40 length:2470 numpins:2 +net 167:$abc$733$n182 xspan:6480 yspan:69 length:6549 numpins:3 +net 168:$abc$733$n183 xspan:160 yspan:501 length:661 numpins:2 +net 169:$abc$733$n184 xspan:1280 yspan:540 length:1820 numpins:2 +net 170:$abc$733$n185 xspan:430 yspan:400 length:830 numpins:2 +net 171:counter<5>_FF_INPUT xspan:190 yspan:2240 length:2430 numpins:2 +net 172:N<7> xspan:2300 yspan:210 length:2510 numpins:4 +net 173:$abc$733$n187 xspan:1120 yspan:600 length:1720 numpins:3 +net 174:$abc$733$n188 xspan:2080 yspan:2621 length:4701 numpins:3 +net 175:$abc$733$n189 xspan:1040 yspan:30 length:1070 numpins:2 +net 176:$abc$733$n190 xspan:1280 yspan:11440 length:12720 numpins:2 +net 177:$abc$733$n191 xspan:640 yspan:5460 length:6100 numpins:3 +net 178:$abc$733$n192 xspan:2590 yspan:40 length:2630 numpins:2 +net 179:$abc$733$n193 xspan:160 yspan:60 length:220 numpins:2 +net 180:$abc$733$n194 xspan:221 yspan:2420 length:2641 numpins:2 +net 181:$abc$733$n195 xspan:2100 yspan:2761 length:4861 numpins:3 +net 182:$abc$733$n196 xspan:510 yspan:0 length:510 numpins:2 +net 183:$abc$733$n197 xspan:1021 yspan:540 length:1561 numpins:2 +net 184:counter<6>_FF_INPUT xspan:1280 yspan:1360 length:2640 numpins:2 +net 185:N<8> xspan:1260 yspan:7380 length:8640 numpins:3 +net 186:$abc$733$n199 xspan:2810 yspan:0 length:2810 numpins:2 +net 187:$abc$733$n200 xspan:1560 yspan:5900 length:7460 numpins:2 +net 188:$abc$733$n201 xspan:960 yspan:420 length:1380 numpins:2 +net 189:$abc$733$n202 xspan:1200 yspan:380 length:1580 numpins:2 +net 190:$abc$733$n203 xspan:3030 yspan:1429 length:4459 numpins:2 +net 191:counter<7>_FF_INPUT xspan:510 yspan:5560 length:6070 numpins:2 +net 192:$auto$iopadmap.cc:313:execute$882 xspan:800 yspan:989 length:1789 numpins:3 +net 193:$abc$733$n205 xspan:320 yspan:261 length:581 numpins:2 +net 194:$abc$733$n206 xspan:480 yspan:260 length:740 numpins:2 +net 195:$abc$733$n207 xspan:880 yspan:750 length:1630 numpins:2 +net 196:done_FF_INPUT xspan:3360 yspan:340 length:3700 numpins:2 +net 197:$abc$733$n209 xspan:350 yspan:401 length:751 numpins:2 +net 198:sr<1>_FF_INPUT xspan:2400 yspan:340 length:2740 numpins:2 +net 199:$abc$546$n149 xspan:1501 yspan:340 length:1841 numpins:2 +net 200:$abc$546$n150 xspan:1501 yspan:3660 length:5161 numpins:2 +net 201:reset xspan:0 yspan:960 length:960 numpins:2 +net 202:counter<0> xspan:0 yspan:1300 length:1300 numpins:2 +net 203:counter<1> xspan:0 yspan:1300 length:1300 numpins:2 +net 204:counter<2> xspan:0 yspan:1300 length:1300 numpins:2 +net 205:counter<3> xspan:0 yspan:1300 length:1300 numpins:2 +net 206:counter<4> xspan:2130 yspan:4000 length:6130 numpins:2 +net 207:counter<5> xspan:1010 yspan:6000 length:7010 numpins:2 +net 208:counter<6> xspan:20 yspan:3300 length:3320 numpins:2 +net 209:counter<7> xspan:0 yspan:1300 length:1300 numpins:2 +net 210:done xspan:0 yspan:1300 length:1300 numpins:2 +net 211:dp<0> xspan:0 yspan:1300 length:1300 numpins:2 +net 212:dp<1> xspan:1330 yspan:4000 length:5330 numpins:2 +net 213:dp<2> xspan:370 yspan:0 length:370 numpins:2 +net 214:dp<3> xspan:370 yspan:0 length:370 numpins:2 +net 215:dp<4> xspan:0 yspan:1300 length:1300 numpins:2 +net 216:dp<5> xspan:0 yspan:1300 length:1300 numpins:2 +net 217:dp<6> xspan:370 yspan:0 length:370 numpins:2 +net 218:dp<7> xspan:370 yspan:0 length:370 numpins:2 +net 219:dp<8> xspan:0 yspan:1300 length:1300 numpins:2 +net 220:sr<0> xspan:20 yspan:3300 length:3320 numpins:2 +net 221:sr<1> xspan:850 yspan:160 length:1010 numpins:2 +net 222:sr<2> xspan:20 yspan:3300 length:3320 numpins:2 +net 223:sr<3> xspan:10 yspan:1300 length:1310 numpins:2 +net 224:sr<4> xspan:300 yspan:3300 length:3600 numpins:2 +net 225:sr<5> xspan:20 yspan:3300 length:3320 numpins:2 +net 226:sr<6> xspan:0 yspan:1300 length:1300 numpins:2 +net 227:sr<7> xspan:20 yspan:3300 length:3320 numpins:2 +net 228:vdd xspan:31740 yspan:95677 length:127417 numpins:32 diff -Nru graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.sav graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.sav --- graywolf-0.1.5/tests/twsc/map9v3/expected/map9v3.sav 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/expected/map9v3.sav 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,382 @@ +0.001000 +158 +0 +1 +2.529029 +1.410680 +1.000000 +1 +0 +1 0 0 +671373 0 1 1 +0.000000 2018.500000 0.750000 0.000000 +0.003368 0.000000 +99.000000 99.000000 +0.000000 0.000000 3.000000 +1 5 3 10961 8800 +2 5 3 8081 8800 +3 5 3 8721 8800 +4 6 0 13601 10800 +5 4 2 4721 6800 +6 9 3 3601 16800 +7 7 1 13361 12800 +8 6 0 13041 10800 +9 4 0 11601 6800 +10 5 3 11521 8800 +11 6 0 15361 10800 +12 9 3 8961 16800 +13 5 3 9281 8800 +14 8 0 15361 14800 +15 6 2 12481 10800 +16 4 0 12801 6800 +17 4 2 11041 6800 +18 5 3 9761 8800 +19 4 2 10081 6800 +20 5 3 12161 8800 +21 3 1 16641 4800 +22 4 2 19361 6800 +23 4 0 15841 6800 +24 5 1 16321 8800 +25 3 1 12641 4800 +26 4 2 14401 6800 +27 4 0 14881 6800 +28 6 2 14801 10800 +29 2 2 9361 2800 +30 2 0 4241 2800 +31 2 2 401 2800 +32 2 0 1 2800 +33 2 0 4721 2800 +34 7 3 23281 12800 +35 3 3 9361 4800 +36 7 1 18721 12800 +37 7 3 19281 12800 +38 5 1 881 8800 +39 5 3 2161 8800 +40 5 3 1521 8800 +41 8 0 401 14800 +42 8 2 7121 14800 +43 8 2 1041 14800 +44 9 1 10321 16800 +45 8 0 9521 14800 +46 8 0 12401 14800 +47 9 1 14641 16800 +48 8 2 14001 14800 +49 8 0 14641 14800 +50 7 1 3921 12800 +51 7 1 9361 12800 +52 7 3 4561 12800 +53 3 1 -79 4800 +54 3 3 1201 4800 +55 3 3 561 4800 +56 8 0 5201 14800 +57 7 1 9681 12800 +58 8 2 5841 14800 +59 8 2 21361 14800 +60 8 2 20961 14800 +61 8 2 20401 14800 +62 8 0 10241 14800 +63 8 2 11681 14800 +64 8 0 13121 14800 +65 8 2 11121 14800 +66 7 3 10561 12800 +67 7 3 10081 12800 +68 7 3 12481 12800 +69 7 1 11601 12800 +70 7 1 11041 12800 +71 6 2 11921 10800 +72 6 0 11281 10800 +73 5 1 6161 8800 +74 8 2 6641 14800 +75 7 1 8881 12800 +76 8 2 9041 14800 +77 7 1 14001 12800 +78 7 3 14641 12800 +79 6 2 14161 10800 +80 5 1 10321 8800 +81 4 2 6001 6800 +82 4 0 4081 6800 +83 4 0 5361 6800 +84 6 2 7121 10800 +85 2 2 16721 2800 +86 4 2 10561 6800 +87 3 3 8721 4800 +88 3 3 10001 4800 +89 3 3 10641 4800 +90 1 1 20001 800 +91 1 1 20481 800 +92 1 3 22481 800 +93 1 3 19441 800 +94 4 2 12241 6800 +95 3 3 12241 4800 +96 3 3 11201 4800 +97 3 3 11761 4800 +98 1 3 14401 800 +99 4 0 13921 6800 +100 2 0 18081 2800 +101 2 2 20561 2800 +102 2 2 20161 2800 +103 1 3 20961 800 +104 2 0 19601 2800 +105 2 0 18961 2800 +106 1 3 22001 800 +107 2 2 21521 2800 +108 2 0 21041 2800 +109 1 1 21441 800 +110 3 1 17201 4800 +111 2 0 17201 2800 +112 3 3 17841 4800 +113 3 3 18401 4800 +114 3 3 18961 4800 +115 2 2 22481 2800 +116 1 3 22881 800 +117 2 0 22001 2800 +118 4 2 22321 6800 +119 4 2 18241 6800 +120 4 0 16961 6800 +121 4 2 17601 6800 +122 4 2 21601 6800 +123 3 1 23121 4800 +124 3 3 23761 4800 +125 4 2 23441 6800 +126 4 0 15361 6800 +127 4 2 19761 6800 +128 4 0 18801 6800 +129 4 0 20241 6800 +130 4 2 20881 6800 +131 5 3 22161 8800 +132 4 2 22881 6800 +133 5 1 21121 8800 +134 2 0 23521 2800 +135 2 0 22961 2800 +136 5 3 22641 8800 +137 5 3 17361 8800 +138 4 0 16401 6800 +139 5 3 16881 8800 +140 5 1 17841 8800 +141 5 1 18481 8800 +142 5 3 19841 8800 +143 5 1 23281 8800 +144 5 3 23761 8800 +145 5 1 21681 8800 +146 5 1 20561 8800 +147 6 0 16001 10800 +148 5 1 19121 8800 +149 1 1 7921 800 +150 1 3 9521 800 +151 1 3 9041 800 +152 1 1 8401 800 +153 5 3 7441 8800 +154 5 1 6801 8800 +155 2 0 5361 2800 +156 4 2 13361 6800 +157 9 1 4801 16800 +158 1 1 13441 800 +159 1 1 13921 800 +160 1 1 18401 800 +161 1 1 18881 800 +162 6 0 23681 10800 +163 4 0 24001 6800 +164 8 0 16321 14800 +165 9 1 15041 16800 +166 1 3 7521 800 +167 9 1 22561 16800 +168 7 1 23681 12800 +169 5 3 1 8800 +170 8 2 1 14800 +171 9 1 9921 16800 +172 9 3 14241 16800 +173 7 3 1 12800 +174 4 2 1 6800 +175 9 3 4161 16800 +176 8 0 15841 14800 +177 5 3 481 8800 +178 8 0 8481 14800 +179 9 3 9441 16800 +180 8 2 13601 14800 +181 8 2 8001 14800 +182 1 1 3521 800 +183 8 0 7521 14800 +184 2 0 7441 2800 +185 2 2 2321 2800 +186 2 2 11281 2800 +187 5 3 14321 8800 +188 1 3 11441 800 +189 9 1 20561 16800 +190 7 1 21361 12800 +191 6 2 1521 10800 +192 9 3 1521 16800 +193 9 3 12241 16800 +194 9 3 17041 16800 +195 7 3 2001 12800 +196 4 2 2001 6800 +197 8 0 3281 14800 +198 1 1 5521 800 +199 3 1 6641 4800 +200 2 2 14801 2800 +201 1 1 16401 800 +202 3 1 14641 4800 +203 6 0 21681 10800 +204 3 1 21041 4800 +205 6 2 18161 10800 +206 8 2 18321 14800 +207 6 2 9201 10800 +208 5 3 4081 8800 +209 7 1 6801 12800 +210 9 1 6961 16800 +211 7 3 16721 12800 +212 4 2 8081 6800 +213 3 3 3121 4800 +214 6 0 5041 10800 +215 1 3 1521 800 +216 0 0 0 -1000001 +217 0 0 0 -1000001 +218 0 0 0 -1000001 +219 0 0 0 -1000001 +220 0 0 0 -1000001 +221 0 0 0 -1000001 +222 0 0 0 -1000001 +223 0 0 0 -1000001 +224 0 0 0 -1000001 +225 0 0 0 -1000001 +226 0 0 0 -1000001 +227 0 0 0 -1000001 +228 0 0 0 -1000001 +229 0 0 0 -1000001 +230 0 0 0 -1000001 +231 0 0 0 -1000001 +232 0 0 0 -1000001 +233 0 0 0 -1000001 +234 0 0 0 -1000001 +235 0 0 0 -1000001 +236 0 0 0 -1000001 +237 0 0 0 -1000001 +238 0 0 0 -1000001 +239 0 0 0 -1000001 +240 0 0 0 -1000001 +241 0 0 0 -1000001 +242 0 0 0 -1000001 +243 0 0 0 -1000001 +244 0 0 0 -1000001 +245 0 0 0 -1000001 +246 0 0 0 -1000001 +247 0 0 0 -1000001 +248 0 0 0 -1000001 +249 0 0 0 -1000001 +250 0 0 0 -1000001 +251 0 0 0 -1000001 +252 0 0 0 -1000001 +253 0 0 0 -1000001 +254 0 0 0 -1000001 +255 0 0 0 -1000001 +256 0 0 0 -1000001 +257 0 0 0 -1000001 +258 0 0 0 -1000001 +259 0 0 0 -1000001 +260 0 0 0 -1000001 +261 0 0 0 -1000001 +262 0 0 0 -1000001 +263 0 0 0 -1000001 +264 0 0 0 -1000001 +265 0 0 0 -1000001 +266 0 0 0 -1000001 +267 0 0 0 -1000001 +268 0 0 0 -1000001 +269 0 0 0 -1000001 +270 0 0 0 -1000001 +271 0 0 0 -1000001 +272 0 0 0 -1000001 +273 0 0 0 -1000001 +274 0 0 0 -1000001 +275 0 0 0 -1000001 +276 0 0 0 -1000001 +277 0 0 0 -1000001 +278 0 0 0 -1000001 +279 0 0 0 -1000001 +280 0 0 0 -1000001 +281 0 0 0 -1000001 +282 0 0 0 -1000001 +283 0 0 0 -1000001 +284 0 0 0 -1000001 +285 0 0 0 -1000001 +286 0 0 0 -1000001 +287 0 0 0 -1000001 +288 0 0 0 -1000001 +289 0 0 0 -1000001 +290 0 0 0 -1000001 +291 0 0 0 -1000001 +292 0 0 0 -1000001 +293 0 0 0 -1000001 +294 0 0 0 -1000001 +295 0 0 0 -1000001 +296 0 0 0 -1000001 +297 0 0 0 -1000001 +298 0 0 0 -1000001 +299 0 0 0 -1000001 +300 0 0 0 -1000001 +301 0 0 0 -1000001 +302 0 0 0 -1000001 +303 0 0 0 -1000001 +304 0 0 0 -1000001 +305 0 0 0 -1000001 +306 0 0 0 -1000001 +307 0 0 0 -1000001 +308 0 0 0 -1000001 +309 0 0 0 -1000001 +310 0 0 0 -1000001 +311 0 0 0 -1000001 +312 0 0 0 -1000001 +313 0 0 0 -1000001 +314 0 0 0 -1000001 +315 0 0 0 -1000001 +316 0 0 0 -1000001 +317 0 0 0 -1000001 +318 0 0 0 -1000001 +319 0 0 0 -1000001 +320 0 0 0 -1000001 +321 0 0 0 -1000001 +322 0 0 0 -1000001 +323 0 0 0 -1000001 +324 0 0 0 -1000001 +325 0 0 0 -1000001 +326 0 0 0 -1000001 +327 0 0 0 -1000001 +328 0 0 0 -1000001 +329 0 0 0 -1000001 +330 0 3 9121 18100 +331 0 3 4481 18100 +332 0 7 -539 2260 +333 0 6 24541 14260 +334 0 0 20321 -500 +335 0 0 20641 -500 +336 0 6 24541 1340 +337 0 0 21841 -500 +338 0 6 24541 5340 +339 0 6 24541 5021 +340 0 6 24541 9130 +341 0 6 24541 9340 +342 0 3 22731 18100 +343 0 6 24541 12800 +344 0 7 -539 8800 +345 0 7 -539 14800 +346 0 3 10091 18100 +347 0 3 14071 18100 +348 0 7 -539 12800 +349 0 7 -539 6800 +350 0 3 3991 18100 +351 0 0 7351 -500 +352 0 0 13611 -500 +353 0 0 14091 -500 +354 0 0 18571 -500 +355 0 0 19051 -500 +356 0 6 24541 10800 +357 0 6 24541 6800 +358 0 3 16491 18100 +359 0 3 15211 18100 +360 0 3 16011 18100 +361 0 7 -539 8960 +362 0 3 8651 18100 +363 0 3 9281 18100 +364 0 3 13431 18100 +365 0 3 7851 18100 +366 0 0 3691 -500 +367 0 3 7691 18100 diff -Nru graywolf-0.1.5/tests/twsc/map9v3/map9v3.blk graywolf-0.1.6/tests/twsc/map9v3/map9v3.blk --- graywolf-0.1.5/tests/twsc/map9v3/map9v3.blk 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/map9v3.blk 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,19 @@ +rows 9 +row -239 -200 24239 1800 mirror +row -239 1800 24239 3800 +row -239 3800 24239 5800 mirror +row -239 5800 24239 7800 +row -239 7800 24239 9800 mirror +row -239 9800 24239 11800 +row -239 11800 24239 13800 mirror +row -239 13800 24239 15800 +row -239 15800 24239 17800 mirror + +/* + The Tile and Macro Information: + numtiles 1 + -240 -200 24240 27400 + + nummacros 0 + +*/ diff -Nru graywolf-0.1.5/tests/twsc/map9v3/map9v3.cel graywolf-0.1.6/tests/twsc/map9v3/map9v3.cel --- graywolf-0.1.5/tests/twsc/map9v3/map9v3.cel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/map9v3.cel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,4148 @@ +cell 0 BUFX4_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf3 layer 1 89 -300 +cell 1 BUFX4_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf2 layer 1 89 -300 +cell 2 BUFX4_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf1 layer 1 89 -300 +cell 3 BUFX2_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n76 layer 1 -160 -140 +pin name Y signal $abc$733$n76_bF$buf0 layer 1 170 0 +cell 4 BUFX4_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf4 layer 1 89 -300 +cell 5 BUFX4_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf3 layer 1 89 -300 +cell 6 BUFX4_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf2 layer 1 89 -300 +cell 7 BUFX4_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf1 layer 1 89 -300 +cell 8 BUFX4_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf0 layer 1 89 -300 +cell 9 BUFX2_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf4 layer 1 170 0 +cell 10 BUFX2_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf3 layer 1 170 0 +cell 11 BUFX2_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf2 layer 1 170 0 +cell 12 BUFX2_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf1 layer 1 170 0 +cell 13 BUFX2_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf0 layer 1 170 0 +cell 14 BUFX2_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf3 layer 1 170 0 +cell 15 BUFX2_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf2 layer 1 170 0 +cell 16 BUFX2_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf1 layer 1 170 0 +cell 17 BUFX2_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf0 layer 1 170 0 +cell 18 INVX4_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<0> layer 1 -160 -340 +pin name Y signal $abc$733$n75_1 layer 1 0 0 +cell 19 INVX8_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -320 -340 +pin name Y signal $abc$733$n76 layer 1 -160 410 +cell 20 NOR2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 160 -61 +pin name Y signal $abc$733$n77 layer 1 0 -300 +cell 21 NOR2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<4> layer 1 160 -61 +pin name Y signal $abc$733$n78 layer 1 0 -300 +cell 22 NAND2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n78 layer 1 160 140 +pin name Y signal $abc$733$n79 layer 1 100 -680 +cell 23 NOR2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 -61 +pin name Y signal $abc$733$n80 layer 1 0 -300 +cell 24 NOR2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 160 -61 +pin name Y signal $abc$733$n81 layer 1 0 -300 +cell 25 NAND2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n80 layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n82 layer 1 100 -680 +cell 26 NOR2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n82 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n83_1 layer 1 0 -300 +cell 27 OAI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf3 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n83_1 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$546$n2 layer 1 50 -100 +cell 28 INVX1_1 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<4> layer 1 -80 -540 +pin name Y signal $abc$733$n85_1 layer 1 80 0 +cell 29 INVX1_2 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<1> layer 1 -80 -540 +pin name Y signal $abc$733$n86 layer 1 80 0 +cell 30 INVX1_3 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal start layer 1 -80 -540 +pin name Y signal $abc$733$n87_1 layer 1 80 0 +cell 31 NOR2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal startbuf layer 1 -160 -540 +pin name B signal $abc$733$n87_1 layer 1 160 -61 +pin name Y signal $abc$733$n88 layer 1 0 -300 +cell 32 OAI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n86 layer 1 -160 -330 +pin name B signal $abc$733$n88 layer 1 -80 -140 +pin name C signal $abc$733$n85_1 layer 1 160 300 +pin name Y signal $abc$546$n5 layer 1 50 -100 +cell 33 INVX1_4 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -80 -540 +pin name Y signal $abc$733$n90 layer 1 80 0 +cell 34 NAND3X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<2> layer 1 -240 60 +pin_group +pin name $abc$733$n75_1_bF$pin/B signal $abc$733$n75_1_bF$buf2 layer 1 -40 -100 +end_pin_group +pin_group +pin name $abc$733$n76_bF$pin/C signal $abc$733$n76_bF$buf2 layer 1 80 260 +end_pin_group +pin name Y signal $abc$733$n91_1 layer 1 -80 680 +cell 35 NOR2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n92 layer 1 0 -300 +cell 36 AOI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n90 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n92 layer 1 240 -501 +pin name Y signal dp<1>_FF_INPUT layer 1 80 -680 +cell 37 INVX1_5 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -80 -540 +pin name Y signal $abc$733$n94 layer 1 80 0 +cell 38 INVX1_6 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -80 -540 +pin name Y signal $abc$733$n95_1 layer 1 80 0 +cell 39 MUX2X1_1 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n94 layer 1 240 -61 +pin name B signal $abc$733$n95_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<2>_FF_INPUT layer 1 19 500 +cell 40 INVX1_7 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -80 -540 +pin name Y signal $abc$733$n97_1 layer 1 80 0 +cell 41 INVX1_8 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -80 -540 +pin name Y signal $abc$733$n98_1 layer 1 80 0 +cell 42 MUX2X1_2 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n97_1 layer 1 240 -61 +pin name B signal $abc$733$n98_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<3>_FF_INPUT layer 1 19 500 +cell 43 INVX1_9 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -80 -540 +pin name Y signal $abc$733$n100 layer 1 80 0 +cell 44 INVX1_10 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -80 -540 +pin name Y signal $abc$733$n101_1 layer 1 80 0 +cell 45 MUX2X1_3 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n100 layer 1 240 -61 +pin name B signal $abc$733$n101_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<4>_FF_INPUT layer 1 19 500 +cell 46 INVX1_11 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -80 -540 +pin name Y signal $abc$733$n103_1 layer 1 80 0 +cell 47 INVX1_12 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -80 -540 +pin name Y signal $abc$733$n104 layer 1 80 0 +cell 48 MUX2X1_4 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n103_1 layer 1 240 -61 +pin name B signal $abc$733$n104 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<5>_FF_INPUT layer 1 19 500 +cell 49 INVX1_13 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -80 -540 +pin name Y signal $abc$733$n106_1 layer 1 80 0 +cell 50 INVX1_14 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -80 -540 +pin name Y signal $abc$733$n107 layer 1 80 0 +cell 51 MUX2X1_5 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n106_1 layer 1 240 -61 +pin name B signal $abc$733$n107 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<6>_FF_INPUT layer 1 19 500 +cell 52 INVX1_15 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -80 -540 +pin name Y signal $abc$733$n109 layer 1 80 0 +cell 53 INVX1_16 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -80 -540 +pin name Y signal $abc$733$n110_1 layer 1 80 0 +cell 54 MUX2X1_6 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n109 layer 1 240 -61 +pin name B signal $abc$733$n110_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<7>_FF_INPUT layer 1 19 500 +cell 55 INVX1_17 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -80 -540 +pin name Y signal $abc$733$n112 layer 1 80 0 +cell 56 INVX1_18 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -80 -540 +pin name Y signal $abc$733$n113 layer 1 80 0 +cell 57 MUX2X1_7 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n112 layer 1 240 -61 +pin name B signal $abc$733$n113 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<8>_FF_INPUT layer 1 19 500 +cell 58 INVX1_19 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -80 -540 +pin name Y signal $abc$733$n115 layer 1 80 0 +cell 59 NOR2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n116_1 layer 1 0 -300 +cell 60 AOI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n115 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n116_1 layer 1 240 -501 +pin name Y signal dp<0>_FF_INPUT layer 1 80 -680 +cell 61 XNOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<7> layer 1 439 -300 +pin name Y signal $abc$733$n118_1 layer 1 50 -500 +cell 62 NOR2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -540 +pin name B signal $abc$733$n101_1 layer 1 160 -61 +pin name Y signal $abc$733$n119 layer 1 0 -300 +cell 63 NOR2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -540 +pin name B signal $abc$733$n104 layer 1 160 -61 +pin name Y signal $abc$733$n120 layer 1 0 -300 +cell 64 OAI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n119 layer 1 -160 -330 +pin name B signal $abc$733$n120 layer 1 -80 -140 +pin name C signal $abc$733$n118_1 layer 1 160 300 +pin name Y signal $abc$733$n121 layer 1 50 -100 +cell 65 NOR2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -540 +pin name B signal $abc$733$n107 layer 1 160 -61 +pin name Y signal $abc$733$n122 layer 1 0 -300 +cell 66 NOR2X1_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -540 +pin name B signal $abc$733$n113 layer 1 160 -61 +pin name Y signal $abc$733$n123_1 layer 1 0 -300 +cell 67 XNOR2X1_2 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<4> layer 1 439 -300 +pin name Y signal $abc$733$n124 layer 1 50 -500 +cell 68 OAI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n122 layer 1 -160 -330 +pin name B signal $abc$733$n123_1 layer 1 -80 -140 +pin name C signal $abc$733$n124 layer 1 160 300 +pin name Y signal $abc$733$n125 layer 1 50 -100 +cell 69 NAND2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n121 layer 1 -160 -340 +pin name B signal $abc$733$n125 layer 1 160 140 +pin name Y signal $abc$733$n126 layer 1 100 -680 +cell 70 OAI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<3> layer 1 -160 -330 +pin name B signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n127 layer 1 50 -100 +cell 71 AOI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n126 layer 1 -160 -70 +pin name B signal state<3> layer 1 -80 -261 +pin name C signal $abc$733$n127 layer 1 240 -501 +pin name Y signal sr<0>_FF_INPUT layer 1 80 -680 +cell 72 OAI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n129 layer 1 50 -100 +cell 73 AOI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n98_1 layer 1 -80 -261 +pin name C signal $abc$733$n129 layer 1 240 -501 +pin name Y signal sr<2>_FF_INPUT layer 1 80 -680 +cell 74 OAI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n131 layer 1 50 -100 +cell 75 AOI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n101_1 layer 1 -80 -261 +pin name C signal $abc$733$n131 layer 1 240 -501 +pin name Y signal sr<3>_FF_INPUT layer 1 80 -680 +cell 76 OAI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n133_1 layer 1 50 -100 +cell 77 AOI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n104 layer 1 -80 -261 +pin name C signal $abc$733$n133_1 layer 1 240 -501 +pin name Y signal sr<4>_FF_INPUT layer 1 80 -680 +cell 78 OAI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n135_1 layer 1 50 -100 +cell 79 AOI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n107 layer 1 -80 -261 +pin name C signal $abc$733$n135_1 layer 1 240 -501 +pin name Y signal sr<5>_FF_INPUT layer 1 80 -680 +cell 80 OAI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n137 layer 1 50 -100 +cell 81 AOI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n110_1 layer 1 -80 -261 +pin name C signal $abc$733$n137 layer 1 240 -501 +pin name Y signal sr<6>_FF_INPUT layer 1 80 -680 +cell 82 OAI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n139 layer 1 50 -100 +cell 83 AOI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n113 layer 1 -80 -261 +pin name C signal $abc$733$n139 layer 1 240 -501 +pin name Y signal sr<7>_FF_INPUT layer 1 80 -680 +cell 84 INVX1_20 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<1> layer 1 -80 -540 +pin name Y signal $abc$733$n141 layer 1 80 0 +cell 85 NOR2X1_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -540 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 160 -61 +end_pin_group +pin name Y signal $abc$733$n142 layer 1 0 -300 +cell 86 AND2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -240 -261 +end_pin_group +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -80 -100 +pin name Y signal $abc$733$n143 layer 1 179 -680 +cell 87 OAI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n142 layer 1 -160 -330 +pin name B signal $abc$733$n143 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n144 layer 1 50 -100 +cell 88 OAI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf1 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n141 layer 1 -80 -140 +pin name C signal $abc$733$n144 layer 1 160 300 +pin name Y signal counter<0>_FF_INPUT layer 1 50 -100 +cell 89 NOR2X1_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -540 +pin name B signal N<2> layer 1 160 -61 +pin name Y signal $abc$733$n146 layer 1 0 -300 +cell 90 NAND2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -340 +pin name B signal N<2> layer 1 160 140 +pin name Y signal $abc$733$n147 layer 1 100 -680 +cell 91 INVX1_21 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $abc$733$n147 layer 1 -80 -540 +pin name Y signal $abc$733$n148 layer 1 80 0 +cell 92 OAI21X1_14 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n146 layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n149 layer 1 50 -100 +cell 93 AND2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n81 layer 1 -240 -261 +pin name B signal state<3> layer 1 -80 -100 +pin name Y signal $abc$733$n150 layer 1 179 -680 +cell 94 INVX1_22 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -80 -540 +pin name Y signal $abc$733$n151_1 layer 1 80 0 +cell 95 NOR2X1_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n151_1 layer 1 -160 -540 +pin name B signal $abc$733$n142 layer 1 160 -61 +pin name Y signal $abc$733$n152 layer 1 0 -300 +cell 96 OAI21X1_15 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n150 layer 1 -160 -330 +pin name B signal $abc$733$n152 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n153_1 layer 1 50 -100 +cell 97 NAND2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n149 layer 1 -160 -340 +pin name B signal $abc$733$n153_1 layer 1 160 140 +pin name Y signal counter<1>_FF_INPUT layer 1 100 -680 +cell 98 NAND2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<3> layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n155 layer 1 100 -680 +cell 99 XOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $abc$733$n155 layer 1 -410 -290 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 439 -300 +pin name Y signal $abc$733$n156 layer 1 0 -700 +cell 100 INVX1_23 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<3> layer 1 -80 -540 +pin name Y signal $abc$733$n157 layer 1 80 0 +cell 101 NAND2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n157 layer 1 -160 -340 +pin name B signal $abc$733$n147 layer 1 160 140 +pin name Y signal $abc$733$n158_1 layer 1 100 -680 +cell 102 NAND2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -340 +pin name B signal $abc$733$n148 layer 1 160 140 +pin name Y signal $abc$733$n159 layer 1 100 -680 +cell 103 NAND3X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n158_1 layer 1 -40 -100 +pin name C signal $abc$733$n159 layer 1 80 260 +pin name Y signal $abc$733$n160_1 layer 1 -80 680 +cell 104 OAI21X1_16 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n156 layer 1 -80 -140 +pin name C signal $abc$733$n160_1 layer 1 160 300 +pin name Y signal counter<2>_FF_INPUT layer 1 50 -100 +cell 105 OAI21X1_17 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<3> layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal N<4> layer 1 160 300 +pin name Y signal $abc$733$n162_1 layer 1 50 -100 +cell 106 INVX1_24 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<4> layer 1 -80 -540 +pin name Y signal $abc$733$n163_1 layer 1 80 0 +cell 107 NAND3X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n157 layer 1 -240 60 +pin name B signal $abc$733$n163_1 layer 1 -40 -100 +pin name C signal $abc$733$n147 layer 1 80 260 +pin name Y signal $abc$733$n164_1 layer 1 -80 680 +cell 108 NAND2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -340 +pin name B signal $abc$733$n162_1 layer 1 160 140 +pin name Y signal $abc$733$n165 layer 1 100 -680 +cell 109 OR2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -240 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -40 -221 +pin name Y signal $abc$733$n166 layer 1 240 -100 +cell 110 OAI21X1_18 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<3> layer 1 160 300 +pin name Y signal $abc$733$n167 layer 1 50 -100 +cell 111 OAI21X1_19 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n166 layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $abc$733$n167 layer 1 160 300 +pin name Y signal $abc$733$n168 layer 1 50 -100 +cell 112 NAND2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf3 layer 1 -160 -340 +end_pin_group +pin name B signal $abc$733$n168 layer 1 160 140 +pin name Y signal $abc$733$n169 layer 1 100 -680 +cell 113 OAI21X1_20 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf2 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n165 layer 1 -80 -140 +pin name C signal $abc$733$n169 layer 1 160 300 +pin name Y signal counter<3>_FF_INPUT layer 1 50 -100 +cell 114 INVX1_25 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<5> layer 1 -80 -540 +pin name Y signal $abc$733$n171 layer 1 80 0 +cell 115 NOR2X1_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -540 +pin name B signal N<4> layer 1 160 -61 +pin name Y signal $abc$733$n172 layer 1 0 -300 +cell 116 AOI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n172 layer 1 -160 -70 +pin name B signal $abc$733$n147 layer 1 -80 -261 +pin name C signal $abc$733$n171 layer 1 240 -501 +pin name Y signal $abc$733$n173 layer 1 80 -680 +cell 117 OAI21X1_21 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n174 layer 1 50 -100 +cell 118 NOR2X1_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -540 +pin name B signal $abc$733$n166 layer 1 160 -61 +pin name Y signal $abc$733$n175 layer 1 0 -300 +cell 119 NAND2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n150 layer 1 160 140 +pin name Y signal $abc$733$n176 layer 1 100 -680 +cell 120 AOI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n175 layer 1 -240 -70 +pin name B signal $abc$733$n150 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<4> layer 1 320 -61 +pin name D signal $abc$733$n176 layer 1 140 -180 +pin name Y signal $abc$733$n177 layer 1 10 -431 +cell 121 OAI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n173 layer 1 -240 -330 +pin name B signal $abc$733$n174 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n177 layer 1 160 -140 +pin name Y signal counter<4>_FF_INPUT layer 1 0 -300 +cell 122 OAI21X1_22 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal N<6> layer 1 160 300 +pin name Y signal $abc$733$n179 layer 1 50 -100 +cell 123 OR2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -240 -540 +pin name B signal N<6> layer 1 -40 -221 +pin name Y signal $abc$733$n180 layer 1 240 -100 +cell 124 OAI21X1_23 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -330 +pin name B signal $abc$733$n180 layer 1 -80 -140 +pin name C signal $abc$733$n179 layer 1 160 300 +pin name Y signal $abc$733$n181 layer 1 50 -100 +cell 125 NOR2X1_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n155 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n182 layer 1 0 -300 +cell 126 INVX1_26 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -80 -540 +pin name Y signal $abc$733$n183 layer 1 80 0 +cell 127 AOI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n175 layer 1 -160 -70 +pin name B signal $abc$733$n150 layer 1 -80 -261 +pin name C signal $abc$733$n183 layer 1 240 -501 +pin name Y signal $abc$733$n184 layer 1 80 -680 +cell 128 OAI21X1_24 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -160 -330 +pin name B signal $abc$733$n184 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n185 layer 1 50 -100 +cell 129 OAI21X1_25 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf0 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n181 layer 1 -80 -140 +pin name C signal $abc$733$n185 layer 1 160 300 +pin name Y signal counter<5>_FF_INPUT layer 1 50 -100 +cell 130 INVX1_27 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<7> layer 1 -80 -540 +pin name Y signal $abc$733$n187 layer 1 80 0 +cell 131 NOR2X1_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n180 layer 1 -160 -540 +pin name B signal $abc$733$n164_1 layer 1 160 -61 +pin name Y signal $abc$733$n188 layer 1 0 -300 +cell 132 NOR2X1_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n187 layer 1 -160 -540 +pin name B signal $abc$733$n188 layer 1 160 -61 +pin name Y signal $abc$733$n189 layer 1 0 -300 +cell 133 NOR2X1_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<5> layer 1 -160 -540 +pin name B signal N<6> layer 1 160 -61 +pin name Y signal $abc$733$n190 layer 1 0 -300 +cell 134 NAND3X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n147 layer 1 -240 60 +pin name B signal $abc$733$n172 layer 1 -40 -100 +pin name C signal $abc$733$n190 layer 1 80 260 +pin name Y signal $abc$733$n191 layer 1 -80 680 +cell 135 OAI21X1_26 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n192 layer 1 50 -100 +cell 136 INVX1_28 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -80 -540 +pin name Y signal $abc$733$n193 layer 1 80 0 +cell 137 AND2X2_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n77 layer 1 -240 -261 +pin name B signal $abc$733$n78 layer 1 -80 -100 +pin name Y signal $abc$733$n194 layer 1 179 -680 +cell 138 NAND3X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n193 layer 1 -240 60 +pin name B signal $abc$733$n150 layer 1 -40 -100 +pin name C signal $abc$733$n194 layer 1 80 260 +pin name Y signal $abc$733$n195 layer 1 -80 680 +cell 139 OAI21X1_27 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n155 layer 1 -160 -330 +pin name B signal $abc$733$n79 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 300 +pin name Y signal $abc$733$n196 layer 1 50 -100 +cell 140 AND2X2_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n195 layer 1 -240 -261 +pin name B signal $abc$733$n196 layer 1 -80 -100 +pin name Y signal $abc$733$n197 layer 1 179 -680 +cell 141 OAI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n189 layer 1 -240 -330 +pin name B signal $abc$733$n192 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n197 layer 1 160 -140 +pin name Y signal counter<6>_FF_INPUT layer 1 0 -300 +cell 142 OAI21X1_28 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal N<8> layer 1 160 300 +pin name Y signal $abc$733$n199 layer 1 50 -100 +cell 143 INVX1_29 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<8> layer 1 -80 -540 +pin name Y signal $abc$733$n200 layer 1 80 0 +cell 144 NAND3X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n187 layer 1 -240 60 +pin name B signal $abc$733$n200 layer 1 -40 -100 +pin name C signal $abc$733$n188 layer 1 80 260 +pin name Y signal $abc$733$n201 layer 1 -80 680 +cell 145 NAND3X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n199 layer 1 -40 -100 +pin name C signal $abc$733$n201 layer 1 80 260 +pin name Y signal $abc$733$n202 layer 1 -80 680 +cell 146 AOI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -240 -70 +pin name B signal $abc$733$n83_1 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<7> layer 1 320 -61 +pin name D signal $abc$733$n195 layer 1 140 -180 +pin name Y signal $abc$733$n203 layer 1 10 -431 +cell 147 OAI21X1_29 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n203 layer 1 -80 -140 +pin name C signal $abc$733$n202 layer 1 160 300 +pin name Y signal counter<7>_FF_INPUT layer 1 50 -100 +cell 148 INVX1_30 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -80 -540 +pin name Y signal $abc$733$n205 layer 1 80 0 +cell 149 INVX1_31 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<2> layer 1 -80 -540 +pin name Y signal $abc$733$n206 layer 1 80 0 +cell 150 NAND3X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<4> layer 1 -240 60 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -40 -100 +end_pin_group +pin name C signal $abc$733$n206 layer 1 80 260 +pin name Y signal $abc$733$n207 layer 1 -80 680 +cell 151 AOI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n207 layer 1 -160 -70 +pin name B signal $abc$733$n205 layer 1 -80 -261 +pin name C signal state<0> layer 1 240 -501 +pin name Y signal done_FF_INPUT layer 1 80 -680 +cell 152 OAI21X1_30 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf2 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n209 layer 1 50 -100 +cell 153 AOI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf1 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n95_1 layer 1 -80 -261 +pin name C signal $abc$733$n209 layer 1 240 -501 +pin name Y signal sr<1>_FF_INPUT layer 1 80 -680 +cell 154 AND2X2_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n88 layer 1 -240 -261 +pin name B signal state<1> layer 1 -80 -100 +pin name Y signal $abc$546$n149 layer 1 179 -680 +cell 155 AND2X2_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -240 -261 +pin name B signal $abc$733$n80 layer 1 -80 -100 +pin name Y signal $abc$546$n150 layer 1 179 -680 +cell 156 INVX8_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal reset layer 1 -320 -340 +pin name Y signal $abc$733$n164 layer 1 -160 410 +cell 157 BUFX2_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -140 +pin name Y signal counter<0> layer 1 170 0 +cell 158 BUFX2_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -140 +pin name Y signal counter<1> layer 1 170 0 +cell 159 BUFX2_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -140 +pin name Y signal counter<2> layer 1 170 0 +cell 160 BUFX2_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -140 +pin name Y signal counter<3> layer 1 170 0 +cell 161 BUFX2_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -140 +pin name Y signal counter<4> layer 1 170 0 +cell 162 BUFX2_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -140 +pin name Y signal counter<5> layer 1 170 0 +cell 163 BUFX2_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -160 -140 +pin name Y signal counter<6> layer 1 170 0 +cell 164 BUFX2_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -140 +pin name Y signal counter<7> layer 1 170 0 +cell 165 BUFX2_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -160 -140 +pin name Y signal done layer 1 170 0 +cell 166 BUFX2_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -160 -140 +pin name Y signal dp<0> layer 1 170 0 +cell 167 BUFX2_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -160 -140 +pin name Y signal dp<1> layer 1 170 0 +cell 168 BUFX2_22 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -160 -140 +pin name Y signal dp<2> layer 1 170 0 +cell 169 BUFX2_23 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -160 -140 +pin name Y signal dp<3> layer 1 170 0 +cell 170 BUFX2_24 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -160 -140 +pin name Y signal dp<4> layer 1 170 0 +cell 171 BUFX2_25 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -160 -140 +pin name Y signal dp<5> layer 1 170 0 +cell 172 BUFX2_26 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -160 -140 +pin name Y signal dp<6> layer 1 170 0 +cell 173 BUFX2_27 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -160 -140 +pin name Y signal dp<7> layer 1 170 0 +cell 174 BUFX2_28 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -160 -140 +pin name Y signal dp<8> layer 1 170 0 +cell 175 BUFX2_29 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -140 +pin name Y signal sr<0> layer 1 170 0 +cell 176 BUFX2_30 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -140 +pin name Y signal sr<1> layer 1 170 0 +cell 177 BUFX2_31 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -140 +pin name Y signal sr<2> layer 1 170 0 +cell 178 BUFX2_32 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -140 +pin name Y signal sr<3> layer 1 170 0 +cell 179 BUFX2_33 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -140 +pin name Y signal sr<4> layer 1 170 0 +cell 180 BUFX2_34 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -140 +pin name Y signal sr<5> layer 1 170 0 +cell 181 BUFX2_35 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -140 +pin name Y signal sr<6> layer 1 170 0 +cell 182 BUFX2_36 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -140 +pin name Y signal sr<7> layer 1 170 0 +cell 183 DFFSR_1 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n149 layer 1 -400 -340 +pin name Q signal state<0> layer 1 1520 449 +pin name R signal vdd layer 1 -1040 -90 +pin_group +pin name $abc$733$n164_bF$pin/S signal $abc$733$n164_bF$buf4 layer 1 -1020 59 +end_pin_group +cell 184 DFFSR_2 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n5 layer 1 -400 -340 +pin name Q signal state<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 185 DFFSR_3 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n150 layer 1 -400 -340 +pin name Q signal state<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 186 DFFSR_4 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n2 layer 1 -400 -340 +pin name Q signal state<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 187 DFFSR_5 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal state<2> layer 1 -400 -340 +pin name Q signal state<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 188 DFFSR_6 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 189 DFFSR_7 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 190 DFFSR_8 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 191 DFFSR_9 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 192 DFFSR_10 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal dp<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 193 DFFSR_11 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 194 DFFSR_12 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 195 DFFSR_13 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 196 DFFSR_14 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<8>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<8> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 197 DFFSR_15 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal done_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$882 layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 198 DFFSR_16 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 199 DFFSR_17 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 200 DFFSR_18 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 201 DFFSR_19 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal counter<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 202 DFFSR_20 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal counter<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 203 DFFSR_21 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 204 DFFSR_22 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 205 DFFSR_23 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 206 DFFSR_24 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 207 DFFSR_25 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 208 DFFSR_26 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 209 DFFSR_27 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal sr<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 210 DFFSR_28 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal sr<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 211 DFFSR_29 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 212 DFFSR_30 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 213 DFFSR_31 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 214 DFFSR_32 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal start layer 1 -400 -340 +pin name Q signal startbuf layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +pad 1 name twpin_clock +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name clock signal clock layer 1 0 0 + +pad 2 name twpin_reset +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name reset signal reset layer 1 0 0 + +pad 3 name twpin_start +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name start signal start layer 1 0 0 + +pad 4 name twpin_N<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<0> signal N<0> layer 1 0 0 + +pad 5 name twpin_N<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<1> signal N<1> layer 1 0 0 + +pad 6 name twpin_N<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<2> signal N<2> layer 1 0 0 + +pad 7 name twpin_N<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<3> signal N<3> layer 1 0 0 + +pad 8 name twpin_N<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<4> signal N<4> layer 1 0 0 + +pad 9 name twpin_N<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<5> signal N<5> layer 1 0 0 + +pad 10 name twpin_N<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<6> signal N<6> layer 1 0 0 + +pad 11 name twpin_N<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<7> signal N<7> layer 1 0 0 + +pad 12 name twpin_N<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name N<8> signal N<8> layer 1 0 0 + +pad 13 name twpin_dp<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<0> signal dp<0> layer 1 0 0 + +pad 14 name twpin_dp<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<1> signal dp<1> layer 1 0 0 + +pad 15 name twpin_dp<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<2> signal dp<2> layer 1 0 0 + +pad 16 name twpin_dp<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<3> signal dp<3> layer 1 0 0 + +pad 17 name twpin_dp<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<4> signal dp<4> layer 1 0 0 + +pad 18 name twpin_dp<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<5> signal dp<5> layer 1 0 0 + +pad 19 name twpin_dp<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<6> signal dp<6> layer 1 0 0 + +pad 20 name twpin_dp<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<7> signal dp<7> layer 1 0 0 + +pad 21 name twpin_dp<8> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name dp<8> signal dp<8> layer 1 0 0 + +pad 22 name twpin_done +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name done signal done layer 1 0 0 + +pad 23 name twpin_counter<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<0> signal counter<0> layer 1 0 0 + +pad 24 name twpin_counter<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<1> signal counter<1> layer 1 0 0 + +pad 25 name twpin_counter<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<2> signal counter<2> layer 1 0 0 + +pad 26 name twpin_counter<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<3> signal counter<3> layer 1 0 0 + +pad 27 name twpin_counter<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<4> signal counter<4> layer 1 0 0 + +pad 28 name twpin_counter<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<5> signal counter<5> layer 1 0 0 + +pad 29 name twpin_counter<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<6> signal counter<6> layer 1 0 0 + +pad 30 name twpin_counter<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name counter<7> signal counter<7> layer 1 0 0 + +pad 31 name twpin_sr<0> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<0> signal sr<0> layer 1 0 0 + +pad 32 name twpin_sr<1> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<1> signal sr<1> layer 1 0 0 + +pad 33 name twpin_sr<2> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<2> signal sr<2> layer 1 0 0 + +pad 34 name twpin_sr<3> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<3> signal sr<3> layer 1 0 0 + +pad 35 name twpin_sr<4> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<4> signal sr<4> layer 1 0 0 + +pad 36 name twpin_sr<5> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<5> signal sr<5> layer 1 0 0 + +pad 37 name twpin_sr<6> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<6> signal sr<6> layer 1 0 0 + +pad 38 name twpin_sr<7> +corners 4 -80 -100 -80 100 80 100 80 -100 +pin name sr<7> signal sr<7> layer 1 0 0 + + diff -Nru graywolf-0.1.5/tests/twsc/map9v3/map9v3.par graywolf-0.1.6/tests/twsc/map9v3/map9v3.par --- graywolf-0.1.5/tests/twsc/map9v3/map9v3.par 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/map9v3.par 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,67 @@ +# osu035.par --- Parameter file for GrayWolf +# NOTE: all distance units are in centimicrons unless otherwise stated + +RULES + # values are resistance in ohms/sq and capacitance in fF/um^2 + layer metal1 0.07 0.030 horizontal + layer metal2 0.07 0.017 vertical + layer metal3 0.07 0.006 horizontal + layer metal4 0.04 0.004 vertical + + via via12 metal1 metal2 + via via23 metal2 metal3 + via via34 metal3 metal4 + + width metal1 60 + width metal2 60 + width metal3 60 + width metal4 120 + width via12 60 + width via23 60 + width via34 120 + + # Set spacing = track pitch - width, so that GrayWolf places pins + # on the right pitch. + # Pitches are (in um): + # metal1 = 200, metal2 = 160, metal3 = 200, metal4 = 320 + + spacing metal1 metal1 140 + spacing metal2 metal2 100 + spacing metal3 metal3 140 + spacing metal4 metal4 200 + + # Stacked vias allowed + spacing via12 via23 0 + spacing via23 via34 0 + + overhang via12 metal1 8 + overhang via12 metal2 6 + + overhang via23 metal2 8 + overhang via23 metal3 6 + + overhang via34 metal3 14 + overhang via34 metal4 16 +ENDRULES + +*vertical_wire_weight : 1.0 +*vertical_path_weight : 1.0 +*padspacing : variable +*rowSep : 0.0 0 +*track.pitch : 160 +*graphics.wait : off +*last_chance.wait : off +*random.seed : 12345 + +TWMC*chip.aspect.ratio : 0.75 + +TWSC*feedThruWidth : 160 layer 1 +TWSC*do.global.route : on +TWSC*ignore_feeds : true +TWSC*call_row_evener : true +TWSC*even_rows_maximally : true +# TWSC*no.graphics : on + +GENR*row_to_tile_spacing: 1 +# GENR*numrows : 6 +GENR*flip_alternate_rows : 1 diff -Nru graywolf-0.1.5/tests/twsc/map9v3/map9v3.scel graywolf-0.1.6/tests/twsc/map9v3/map9v3.scel --- graywolf-0.1.5/tests/twsc/map9v3/map9v3.scel 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/map9v3.scel 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,4224 @@ + +cell 0 BUFX4_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf3 layer 1 89 -300 +cell 1 BUFX4_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf2 layer 1 89 -300 +cell 2 BUFX4_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n76 layer 1 -230 -100 +pin name Y signal $abc$733$n76_bF$buf1 layer 1 89 -300 +cell 3 BUFX2_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n76 layer 1 -160 -140 +pin name Y signal $abc$733$n76_bF$buf0 layer 1 170 0 +cell 4 BUFX4_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf4 layer 1 89 -300 +cell 5 BUFX4_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf3 layer 1 89 -300 +cell 6 BUFX4_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf2 layer 1 89 -300 +cell 7 BUFX4_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf1 layer 1 89 -300 +cell 8 BUFX4_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164 layer 1 -230 -100 +pin name Y signal $abc$733$n164_bF$buf0 layer 1 89 -300 +cell 9 BUFX2_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf4 layer 1 170 0 +cell 10 BUFX2_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf3 layer 1 170 0 +cell 11 BUFX2_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf2 layer 1 170 0 +cell 12 BUFX2_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf1 layer 1 170 0 +cell 13 BUFX2_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal clock layer 1 -160 -140 +pin name Y signal clock_bF$buf0 layer 1 170 0 +cell 14 BUFX2_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf3 layer 1 170 0 +cell 15 BUFX2_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf2 layer 1 170 0 +cell 16 BUFX2_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf1 layer 1 170 0 +cell 17 BUFX2_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n75_1 layer 1 -160 -140 +pin name Y signal $abc$733$n75_1_bF$buf0 layer 1 170 0 +cell 18 INVX4_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<0> layer 1 -160 -340 +pin name Y signal $abc$733$n75_1 layer 1 0 0 +cell 19 INVX8_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -320 -340 +pin name Y signal $abc$733$n76 layer 1 -160 410 +cell 20 NOR2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 160 -61 +pin name Y signal $abc$733$n77 layer 1 0 -300 +cell 21 NOR2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<4> layer 1 160 -61 +pin name Y signal $abc$733$n78 layer 1 0 -300 +cell 22 NAND2X1_1 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n78 layer 1 160 140 +pin name Y signal $abc$733$n79 layer 1 100 -680 +cell 23 NOR2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 -61 +pin name Y signal $abc$733$n80 layer 1 0 -300 +cell 24 NOR2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 160 -61 +pin name Y signal $abc$733$n81 layer 1 0 -300 +cell 25 NAND2X1_2 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n80 layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n82 layer 1 100 -680 +cell 26 NOR2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n82 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n83_1 layer 1 0 -300 +cell 27 OAI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf3 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n83_1 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$546$n2 layer 1 50 -100 +cell 28 INVX1_1 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<4> layer 1 -80 -540 +pin name Y signal $abc$733$n85_1 layer 1 80 0 +cell 29 INVX1_2 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<1> layer 1 -80 -540 +pin name Y signal $abc$733$n86 layer 1 80 0 +cell 30 INVX1_3 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal start layer 1 -80 -540 +pin name Y signal $abc$733$n87_1 layer 1 80 0 +cell 31 NOR2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal startbuf layer 1 -160 -540 +pin name B signal $abc$733$n87_1 layer 1 160 -61 +pin name Y signal $abc$733$n88 layer 1 0 -300 +cell 32 OAI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n86 layer 1 -160 -330 +pin name B signal $abc$733$n88 layer 1 -80 -140 +pin name C signal $abc$733$n85_1 layer 1 160 300 +pin name Y signal $abc$546$n5 layer 1 50 -100 +cell 33 INVX1_4 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -80 -540 +pin name Y signal $abc$733$n90 layer 1 80 0 +cell 34 NAND3X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<2> layer 1 -240 60 +pin_group +pin name $abc$733$n75_1_bF$pin/B signal $abc$733$n75_1_bF$buf2 layer 1 -40 -100 +end_pin_group +pin_group +pin name $abc$733$n76_bF$pin/C signal $abc$733$n76_bF$buf2 layer 1 80 260 +end_pin_group +pin name Y signal $abc$733$n91_1 layer 1 -80 680 +cell 35 NOR2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n92 layer 1 0 -300 +cell 36 AOI21X1_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n90 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n92 layer 1 240 -501 +pin name Y signal dp<1>_FF_INPUT layer 1 80 -680 +cell 37 INVX1_5 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -80 -540 +pin name Y signal $abc$733$n94 layer 1 80 0 +cell 38 INVX1_6 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -80 -540 +pin name Y signal $abc$733$n95_1 layer 1 80 0 +cell 39 MUX2X1_1 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n94 layer 1 240 -61 +pin name B signal $abc$733$n95_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<2>_FF_INPUT layer 1 19 500 +cell 40 INVX1_7 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -80 -540 +pin name Y signal $abc$733$n97_1 layer 1 80 0 +cell 41 INVX1_8 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -80 -540 +pin name Y signal $abc$733$n98_1 layer 1 80 0 +cell 42 MUX2X1_2 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n97_1 layer 1 240 -61 +pin name B signal $abc$733$n98_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<3>_FF_INPUT layer 1 19 500 +cell 43 INVX1_9 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -80 -540 +pin name Y signal $abc$733$n100 layer 1 80 0 +cell 44 INVX1_10 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -80 -540 +pin name Y signal $abc$733$n101_1 layer 1 80 0 +cell 45 MUX2X1_3 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n100 layer 1 240 -61 +pin name B signal $abc$733$n101_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<4>_FF_INPUT layer 1 19 500 +cell 46 INVX1_11 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -80 -540 +pin name Y signal $abc$733$n103_1 layer 1 80 0 +cell 47 INVX1_12 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -80 -540 +pin name Y signal $abc$733$n104 layer 1 80 0 +cell 48 MUX2X1_4 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n103_1 layer 1 240 -61 +pin name B signal $abc$733$n104 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<5>_FF_INPUT layer 1 19 500 +cell 49 INVX1_13 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -80 -540 +pin name Y signal $abc$733$n106_1 layer 1 80 0 +cell 50 INVX1_14 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -80 -540 +pin name Y signal $abc$733$n107 layer 1 80 0 +cell 51 MUX2X1_5 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n106_1 layer 1 240 -61 +pin name B signal $abc$733$n107 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<6>_FF_INPUT layer 1 19 500 +cell 52 INVX1_15 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -80 -540 +pin name Y signal $abc$733$n109 layer 1 80 0 +cell 53 INVX1_16 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -80 -540 +pin name Y signal $abc$733$n110_1 layer 1 80 0 +cell 54 MUX2X1_6 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n109 layer 1 240 -61 +pin name B signal $abc$733$n110_1 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<7>_FF_INPUT layer 1 19 500 +cell 55 INVX1_17 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -80 -540 +pin name Y signal $abc$733$n112 layer 1 80 0 +cell 56 INVX1_18 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -80 -540 +pin name Y signal $abc$733$n113 layer 1 80 0 +cell 57 MUX2X1_7 +left -480 right 480 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed1 layer 1 -400 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed2 layer 1 -240 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed3 layer 1 -80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed4 layer 1 80 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed5 layer 1 240 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed6 layer 1 400 1000 +pin name A signal $abc$733$n112 layer 1 240 -61 +pin name B signal $abc$733$n113 layer 1 -240 -140 +pin name S signal $abc$733$n91_1 layer 1 -400 -140 +pin name Y signal dp<8>_FF_INPUT layer 1 19 500 +cell 58 INVX1_19 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -80 -540 +pin name Y signal $abc$733$n115 layer 1 80 0 +cell 59 NOR2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<0> layer 1 -160 -540 +pin name B signal $abc$733$n91_1 layer 1 160 -61 +pin name Y signal $abc$733$n116_1 layer 1 0 -300 +cell 60 AOI21X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n115 layer 1 -160 -70 +pin name B signal $abc$733$n91_1 layer 1 -80 -261 +pin name C signal $abc$733$n116_1 layer 1 240 -501 +pin name Y signal dp<0>_FF_INPUT layer 1 80 -680 +cell 61 XNOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<7> layer 1 439 -300 +pin name Y signal $abc$733$n118_1 layer 1 50 -500 +cell 62 NOR2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -540 +pin name B signal $abc$733$n101_1 layer 1 160 -61 +pin name Y signal $abc$733$n119 layer 1 0 -300 +cell 63 NOR2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -540 +pin name B signal $abc$733$n104 layer 1 160 -61 +pin name Y signal $abc$733$n120 layer 1 0 -300 +cell 64 OAI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n119 layer 1 -160 -330 +pin name B signal $abc$733$n120 layer 1 -80 -140 +pin name C signal $abc$733$n118_1 layer 1 160 300 +pin name Y signal $abc$733$n121 layer 1 50 -100 +cell 65 NOR2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -540 +pin name B signal $abc$733$n107 layer 1 160 -61 +pin name Y signal $abc$733$n122 layer 1 0 -300 +cell 66 NOR2X1_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -540 +pin name B signal $abc$733$n113 layer 1 160 -61 +pin name Y signal $abc$733$n123_1 layer 1 0 -300 +cell 67 XNOR2X1_2 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -210 -360 +pin name B signal $auto$iopadmap.cc:313:execute$894<4> layer 1 439 -300 +pin name Y signal $abc$733$n124 layer 1 50 -500 +cell 68 OAI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n122 layer 1 -160 -330 +pin name B signal $abc$733$n123_1 layer 1 -80 -140 +pin name C signal $abc$733$n124 layer 1 160 300 +pin name Y signal $abc$733$n125 layer 1 50 -100 +cell 69 NAND2X1_3 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n121 layer 1 -160 -340 +pin name B signal $abc$733$n125 layer 1 160 140 +pin name Y signal $abc$733$n126 layer 1 100 -680 +cell 70 OAI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<3> layer 1 -160 -330 +pin name B signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n127 layer 1 50 -100 +cell 71 AOI21X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n126 layer 1 -160 -70 +pin name B signal state<3> layer 1 -80 -261 +pin name C signal $abc$733$n127 layer 1 240 -501 +pin name Y signal sr<0>_FF_INPUT layer 1 80 -680 +cell 72 OAI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n129 layer 1 50 -100 +cell 73 AOI21X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n98_1 layer 1 -80 -261 +pin name C signal $abc$733$n129 layer 1 240 -501 +pin name Y signal sr<2>_FF_INPUT layer 1 80 -680 +cell 74 OAI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n131 layer 1 50 -100 +cell 75 AOI21X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n101_1 layer 1 -80 -261 +pin name C signal $abc$733$n131 layer 1 240 -501 +pin name Y signal sr<3>_FF_INPUT layer 1 80 -680 +cell 76 OAI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n133_1 layer 1 50 -100 +cell 77 AOI21X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n104 layer 1 -80 -261 +pin name C signal $abc$733$n133_1 layer 1 240 -501 +pin name Y signal sr<4>_FF_INPUT layer 1 80 -680 +cell 78 OAI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n135_1 layer 1 50 -100 +cell 79 AOI21X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n107 layer 1 -80 -261 +pin name C signal $abc$733$n135_1 layer 1 240 -501 +pin name Y signal sr<5>_FF_INPUT layer 1 80 -680 +cell 80 OAI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n137 layer 1 50 -100 +cell 81 AOI21X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n110_1 layer 1 -80 -261 +pin name C signal $abc$733$n137 layer 1 240 -501 +pin name Y signal sr<6>_FF_INPUT layer 1 80 -680 +cell 82 OAI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n139 layer 1 50 -100 +cell 83 AOI21X1_9 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf2 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n113 layer 1 -80 -261 +pin name C signal $abc$733$n139 layer 1 240 -501 +pin name Y signal sr<7>_FF_INPUT layer 1 80 -680 +cell 84 INVX1_20 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<1> layer 1 -80 -540 +pin name Y signal $abc$733$n141 layer 1 80 0 +cell 85 NOR2X1_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -540 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf1 layer 1 160 -61 +end_pin_group +pin name Y signal $abc$733$n142 layer 1 0 -300 +cell 86 AND2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf0 layer 1 -240 -261 +end_pin_group +pin name B signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -80 -100 +pin name Y signal $abc$733$n143 layer 1 179 -680 +cell 87 OAI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n142 layer 1 -160 -330 +pin name B signal $abc$733$n143 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf2 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n144 layer 1 50 -100 +cell 88 OAI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf1 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n141 layer 1 -80 -140 +pin name C signal $abc$733$n144 layer 1 160 300 +pin name Y signal counter<0>_FF_INPUT layer 1 50 -100 +cell 89 NOR2X1_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -540 +pin name B signal N<2> layer 1 160 -61 +pin name Y signal $abc$733$n146 layer 1 0 -300 +cell 90 NAND2X1_4 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<1> layer 1 -160 -340 +pin name B signal N<2> layer 1 160 140 +pin name Y signal $abc$733$n147 layer 1 100 -680 +cell 91 INVX1_21 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $abc$733$n147 layer 1 -80 -540 +pin name Y signal $abc$733$n148 layer 1 80 0 +cell 92 OAI21X1_14 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n146 layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n149 layer 1 50 -100 +cell 93 AND2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n81 layer 1 -240 -261 +pin name B signal state<3> layer 1 -80 -100 +pin name Y signal $abc$733$n150 layer 1 179 -680 +cell 94 INVX1_22 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -80 -540 +pin name Y signal $abc$733$n151_1 layer 1 80 0 +cell 95 NOR2X1_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n151_1 layer 1 -160 -540 +pin name B signal $abc$733$n142 layer 1 160 -61 +pin name Y signal $abc$733$n152 layer 1 0 -300 +cell 96 OAI21X1_15 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n150 layer 1 -160 -330 +pin name B signal $abc$733$n152 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf0 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n153_1 layer 1 50 -100 +cell 97 NAND2X1_5 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n149 layer 1 -160 -340 +pin name B signal $abc$733$n153_1 layer 1 160 140 +pin name Y signal counter<1>_FF_INPUT layer 1 100 -680 +cell 98 NAND2X1_6 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal state<3> layer 1 -160 -340 +pin name B signal $abc$733$n81 layer 1 160 140 +pin name Y signal $abc$733$n155 layer 1 100 -680 +cell 99 XOR2X1_1 +left -560 right 560 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -480 -1000 + equiv name twfeed1 layer 1 -480 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed2 layer 1 -320 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed3 layer 1 -160 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed4 layer 1 0 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed5 layer 1 160 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed6 layer 1 320 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 480 -1000 + equiv name twfeed7 layer 1 480 1000 +pin name A signal $abc$733$n155 layer 1 -410 -290 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 439 -300 +pin name Y signal $abc$733$n156 layer 1 0 -700 +cell 100 INVX1_23 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<3> layer 1 -80 -540 +pin name Y signal $abc$733$n157 layer 1 80 0 +cell 101 NAND2X1_7 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n157 layer 1 -160 -340 +pin name B signal $abc$733$n147 layer 1 160 140 +pin name Y signal $abc$733$n158_1 layer 1 100 -680 +cell 102 NAND2X1_8 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -340 +pin name B signal $abc$733$n148 layer 1 160 140 +pin name Y signal $abc$733$n159 layer 1 100 -680 +cell 103 NAND3X1_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n158_1 layer 1 -40 -100 +pin name C signal $abc$733$n159 layer 1 80 260 +pin name Y signal $abc$733$n160_1 layer 1 -80 680 +cell 104 OAI21X1_16 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n156 layer 1 -80 -140 +pin name C signal $abc$733$n160_1 layer 1 160 300 +pin name Y signal counter<2>_FF_INPUT layer 1 50 -100 +cell 105 OAI21X1_17 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<3> layer 1 -160 -330 +pin name B signal $abc$733$n148 layer 1 -80 -140 +pin name C signal N<4> layer 1 160 300 +pin name Y signal $abc$733$n162_1 layer 1 50 -100 +cell 106 INVX1_24 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<4> layer 1 -80 -540 +pin name Y signal $abc$733$n163_1 layer 1 80 0 +cell 107 NAND3X1_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n157 layer 1 -240 60 +pin name B signal $abc$733$n163_1 layer 1 -40 -100 +pin name C signal $abc$733$n147 layer 1 80 260 +pin name Y signal $abc$733$n164_1 layer 1 -80 680 +cell 108 NAND2X1_9 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -340 +pin name B signal $abc$733$n162_1 layer 1 160 140 +pin name Y signal $abc$733$n165 layer 1 100 -680 +cell 109 OR2X2_1 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -240 -540 +pin name B signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -40 -221 +pin name Y signal $abc$733$n166 layer 1 240 -100 +cell 110 OAI21X1_18 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<3> layer 1 160 300 +pin name Y signal $abc$733$n167 layer 1 50 -100 +cell 111 OAI21X1_19 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n166 layer 1 -160 -330 +pin name B signal $abc$733$n155 layer 1 -80 -140 +pin name C signal $abc$733$n167 layer 1 160 300 +pin name Y signal $abc$733$n168 layer 1 50 -100 +cell 112 NAND2X1_10 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf3 layer 1 -160 -340 +end_pin_group +pin name B signal $abc$733$n168 layer 1 160 140 +pin name Y signal $abc$733$n169 layer 1 100 -680 +cell 113 OAI21X1_20 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf2 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n165 layer 1 -80 -140 +pin name C signal $abc$733$n169 layer 1 160 300 +pin name Y signal counter<3>_FF_INPUT layer 1 50 -100 +cell 114 INVX1_25 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<5> layer 1 -80 -540 +pin name Y signal $abc$733$n171 layer 1 80 0 +cell 115 NOR2X1_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<3> layer 1 -160 -540 +pin name B signal N<4> layer 1 160 -61 +pin name Y signal $abc$733$n172 layer 1 0 -300 +cell 116 AOI21X1_10 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n172 layer 1 -160 -70 +pin name B signal $abc$733$n147 layer 1 -80 -261 +pin name C signal $abc$733$n171 layer 1 240 -501 +pin name Y signal $abc$733$n173 layer 1 80 -680 +cell 117 OAI21X1_21 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n174 layer 1 50 -100 +cell 118 NOR2X1_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -540 +pin name B signal $abc$733$n166 layer 1 160 -61 +pin name Y signal $abc$733$n175 layer 1 0 -300 +cell 119 NAND2X1_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n77 layer 1 -160 -340 +pin name B signal $abc$733$n150 layer 1 160 140 +pin name Y signal $abc$733$n176 layer 1 100 -680 +cell 120 AOI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n175 layer 1 -240 -70 +pin name B signal $abc$733$n150 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<4> layer 1 320 -61 +pin name D signal $abc$733$n176 layer 1 140 -180 +pin name Y signal $abc$733$n177 layer 1 10 -431 +cell 121 OAI22X1_1 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n173 layer 1 -240 -330 +pin name B signal $abc$733$n174 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n177 layer 1 160 -140 +pin name Y signal counter<4>_FF_INPUT layer 1 0 -300 +cell 122 OAI21X1_22 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -160 -330 +pin name B signal $abc$733$n164_1 layer 1 -80 -140 +pin name C signal N<6> layer 1 160 300 +pin name Y signal $abc$733$n179 layer 1 50 -100 +cell 123 OR2X2_2 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<5> layer 1 -240 -540 +pin name B signal N<6> layer 1 -40 -221 +pin name Y signal $abc$733$n180 layer 1 240 -100 +cell 124 OAI21X1_23 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n164_1 layer 1 -160 -330 +pin name B signal $abc$733$n180 layer 1 -80 -140 +pin name C signal $abc$733$n179 layer 1 160 300 +pin name Y signal $abc$733$n181 layer 1 50 -100 +cell 125 NOR2X1_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n155 layer 1 -160 -540 +pin name B signal $abc$733$n79 layer 1 160 -61 +pin name Y signal $abc$733$n182 layer 1 0 -300 +cell 126 INVX1_26 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -80 -540 +pin name Y signal $abc$733$n183 layer 1 80 0 +cell 127 AOI21X1_11 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n175 layer 1 -160 -70 +pin name B signal $abc$733$n150 layer 1 -80 -261 +pin name C signal $abc$733$n183 layer 1 240 -501 +pin name Y signal $abc$733$n184 layer 1 80 -680 +cell 128 OAI21X1_24 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -160 -330 +pin name B signal $abc$733$n184 layer 1 -80 -140 +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf1 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n185 layer 1 50 -100 +cell 129 OAI21X1_25 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n75_1_bF$pin/A signal $abc$733$n75_1_bF$buf0 layer 1 -160 -330 +end_pin_group +pin name B signal $abc$733$n181 layer 1 -80 -140 +pin name C signal $abc$733$n185 layer 1 160 300 +pin name Y signal counter<5>_FF_INPUT layer 1 50 -100 +cell 130 INVX1_27 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<7> layer 1 -80 -540 +pin name Y signal $abc$733$n187 layer 1 80 0 +cell 131 NOR2X1_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n180 layer 1 -160 -540 +pin name B signal $abc$733$n164_1 layer 1 160 -61 +pin name Y signal $abc$733$n188 layer 1 0 -300 +cell 132 NOR2X1_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $abc$733$n187 layer 1 -160 -540 +pin name B signal $abc$733$n188 layer 1 160 -61 +pin name Y signal $abc$733$n189 layer 1 0 -300 +cell 133 NOR2X1_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal N<5> layer 1 -160 -540 +pin name B signal N<6> layer 1 160 -61 +pin name Y signal $abc$733$n190 layer 1 0 -300 +cell 134 NAND3X1_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n147 layer 1 -240 60 +pin name B signal $abc$733$n172 layer 1 -40 -100 +pin name C signal $abc$733$n190 layer 1 80 260 +pin name Y signal $abc$733$n191 layer 1 -80 680 +cell 135 OAI21X1_26 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal state<0> layer 1 160 300 +pin name Y signal $abc$733$n192 layer 1 50 -100 +cell 136 INVX1_28 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -80 -540 +pin name Y signal $abc$733$n193 layer 1 80 0 +cell 137 AND2X2_3 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n77 layer 1 -240 -261 +pin name B signal $abc$733$n78 layer 1 -80 -100 +pin name Y signal $abc$733$n194 layer 1 179 -680 +cell 138 NAND3X1_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n193 layer 1 -240 60 +pin name B signal $abc$733$n150 layer 1 -40 -100 +pin name C signal $abc$733$n194 layer 1 80 260 +pin name Y signal $abc$733$n195 layer 1 -80 680 +cell 139 OAI21X1_27 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n155 layer 1 -160 -330 +pin name B signal $abc$733$n79 layer 1 -80 -140 +pin name C signal $auto$iopadmap.cc:313:execute$873<6> layer 1 160 300 +pin name Y signal $abc$733$n196 layer 1 50 -100 +cell 140 AND2X2_4 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n195 layer 1 -240 -261 +pin name B signal $abc$733$n196 layer 1 -80 -100 +pin name Y signal $abc$733$n197 layer 1 179 -680 +cell 141 OAI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal $abc$733$n189 layer 1 -240 -330 +pin name B signal $abc$733$n192 layer 1 -160 -140 +pin name C signal state<0> layer 1 320 -261 +pin name D signal $abc$733$n197 layer 1 160 -140 +pin name Y signal counter<6>_FF_INPUT layer 1 0 -300 +cell 142 OAI21X1_28 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal N<7> layer 1 -160 -330 +pin name B signal $abc$733$n191 layer 1 -80 -140 +pin name C signal N<8> layer 1 160 300 +pin name Y signal $abc$733$n199 layer 1 50 -100 +cell 143 INVX1_29 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal N<8> layer 1 -80 -540 +pin name Y signal $abc$733$n200 layer 1 80 0 +cell 144 NAND3X1_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n187 layer 1 -240 60 +pin name B signal $abc$733$n200 layer 1 -40 -100 +pin name C signal $abc$733$n188 layer 1 80 260 +pin name Y signal $abc$733$n201 layer 1 -80 680 +cell 145 NAND3X1_7 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -240 60 +pin name B signal $abc$733$n199 layer 1 -40 -100 +pin name C signal $abc$733$n201 layer 1 80 260 +pin name Y signal $abc$733$n202 layer 1 -80 680 +cell 146 AOI22X1_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal state<3> layer 1 -240 -70 +pin name B signal $abc$733$n83_1 layer 1 -160 -261 +pin name C signal $auto$iopadmap.cc:313:execute$873<7> layer 1 320 -61 +pin name D signal $abc$733$n195 layer 1 140 -180 +pin name Y signal $abc$733$n203 layer 1 10 -431 +cell 147 OAI21X1_29 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<0> layer 1 -160 -330 +pin name B signal $abc$733$n203 layer 1 -80 -140 +pin name C signal $abc$733$n202 layer 1 160 300 +pin name Y signal counter<7>_FF_INPUT layer 1 50 -100 +cell 148 INVX1_30 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -80 -540 +pin name Y signal $abc$733$n205 layer 1 80 0 +cell 149 INVX1_31 +left -160 right 160 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed1 layer 1 -80 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed2 layer 1 80 1000 +pin name A signal state<2> layer 1 -80 -540 +pin name Y signal $abc$733$n206 layer 1 80 0 +cell 150 NAND3X1_8 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal state<4> layer 1 -240 60 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf3 layer 1 -40 -100 +end_pin_group +pin name C signal $abc$733$n206 layer 1 80 260 +pin name Y signal $abc$733$n207 layer 1 -80 680 +cell 151 AOI21X1_12 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n207 layer 1 -160 -70 +pin name B signal $abc$733$n205 layer 1 -80 -261 +pin name C signal state<0> layer 1 240 -501 +pin name Y signal done_FF_INPUT layer 1 80 -680 +cell 152 OAI21X1_30 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -330 +pin_group +pin name $abc$733$n76_bF$pin/B signal $abc$733$n76_bF$buf2 layer 1 -80 -140 +end_pin_group +pin_group +pin name $abc$733$n75_1_bF$pin/C signal $abc$733$n75_1_bF$buf3 layer 1 160 300 +end_pin_group +pin name Y signal $abc$733$n209 layer 1 50 -100 +cell 153 AOI21X1_13 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin_group +pin name $abc$733$n76_bF$pin/A signal $abc$733$n76_bF$buf1 layer 1 -160 -70 +end_pin_group +pin name B signal $abc$733$n95_1 layer 1 -80 -261 +pin name C signal $abc$733$n209 layer 1 240 -501 +pin name Y signal sr<1>_FF_INPUT layer 1 80 -680 +cell 154 AND2X2_5 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n88 layer 1 -240 -261 +pin name B signal state<1> layer 1 -80 -100 +pin name Y signal $abc$546$n149 layer 1 179 -680 +cell 155 AND2X2_6 +left -320 right 320 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed1 layer 1 -240 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed2 layer 1 -80 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed3 layer 1 80 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed4 layer 1 240 1000 +pin name A signal $abc$733$n182 layer 1 -240 -261 +pin name B signal $abc$733$n80 layer 1 -80 -100 +pin name Y signal $abc$546$n150 layer 1 179 -680 +cell 156 INVX8_2 +left -400 right 400 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -320 -1000 + equiv name twfeed1 layer 1 -320 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed2 layer 1 -160 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed3 layer 1 0 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed4 layer 1 160 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 320 -1000 + equiv name twfeed5 layer 1 320 1000 +pin name A signal reset layer 1 -320 -340 +pin name Y signal $abc$733$n164 layer 1 -160 410 +cell 157 BUFX2_11 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<0> layer 1 -160 -140 +pin name Y signal counter<0> layer 1 170 0 +cell 158 BUFX2_12 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<1> layer 1 -160 -140 +pin name Y signal counter<1> layer 1 170 0 +cell 159 BUFX2_13 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<2> layer 1 -160 -140 +pin name Y signal counter<2> layer 1 170 0 +cell 160 BUFX2_14 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<3> layer 1 -160 -140 +pin name Y signal counter<3> layer 1 170 0 +cell 161 BUFX2_15 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<4> layer 1 -160 -140 +pin name Y signal counter<4> layer 1 170 0 +cell 162 BUFX2_16 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<5> layer 1 -160 -140 +pin name Y signal counter<5> layer 1 170 0 +cell 163 BUFX2_17 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<6> layer 1 -160 -140 +pin name Y signal counter<6> layer 1 170 0 +cell 164 BUFX2_18 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$873<7> layer 1 -160 -140 +pin name Y signal counter<7> layer 1 170 0 +cell 165 BUFX2_19 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$882 layer 1 -160 -140 +pin name Y signal done layer 1 170 0 +cell 166 BUFX2_20 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<0> layer 1 -160 -140 +pin name Y signal dp<0> layer 1 170 0 +cell 167 BUFX2_21 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<1> layer 1 -160 -140 +pin name Y signal dp<1> layer 1 170 0 +cell 168 BUFX2_22 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<2> layer 1 -160 -140 +pin name Y signal dp<2> layer 1 170 0 +cell 169 BUFX2_23 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<3> layer 1 -160 -140 +pin name Y signal dp<3> layer 1 170 0 +cell 170 BUFX2_24 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<4> layer 1 -160 -140 +pin name Y signal dp<4> layer 1 170 0 +cell 171 BUFX2_25 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<5> layer 1 -160 -140 +pin name Y signal dp<5> layer 1 170 0 +cell 172 BUFX2_26 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<6> layer 1 -160 -140 +pin name Y signal dp<6> layer 1 170 0 +cell 173 BUFX2_27 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<7> layer 1 -160 -140 +pin name Y signal dp<7> layer 1 170 0 +cell 174 BUFX2_28 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$884<8> layer 1 -160 -140 +pin name Y signal dp<8> layer 1 170 0 +cell 175 BUFX2_29 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<0> layer 1 -160 -140 +pin name Y signal sr<0> layer 1 170 0 +cell 176 BUFX2_30 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<1> layer 1 -160 -140 +pin name Y signal sr<1> layer 1 170 0 +cell 177 BUFX2_31 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<2> layer 1 -160 -140 +pin name Y signal sr<2> layer 1 170 0 +cell 178 BUFX2_32 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<3> layer 1 -160 -140 +pin name Y signal sr<3> layer 1 170 0 +cell 179 BUFX2_33 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<4> layer 1 -160 -140 +pin name Y signal sr<4> layer 1 170 0 +cell 180 BUFX2_34 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<5> layer 1 -160 -140 +pin name Y signal sr<5> layer 1 170 0 +cell 181 BUFX2_35 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<6> layer 1 -160 -140 +pin name Y signal sr<6> layer 1 170 0 +cell 182 BUFX2_36 +left -240 right 240 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -160 -1000 + equiv name twfeed1 layer 1 -160 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 0 -1000 + equiv name twfeed2 layer 1 0 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 160 -1000 + equiv name twfeed3 layer 1 160 1000 +pin name A signal $auto$iopadmap.cc:313:execute$894<7> layer 1 -160 -140 +pin name Y signal sr<7> layer 1 170 0 +cell 183 DFFSR_1 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n149 layer 1 -400 -340 +pin name Q signal state<0> layer 1 1520 449 +pin name R signal vdd layer 1 -1040 -90 +pin_group +pin name $abc$733$n164_bF$pin/S signal $abc$733$n164_bF$buf4 layer 1 -1020 59 +end_pin_group +cell 184 DFFSR_2 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n5 layer 1 -400 -340 +pin name Q signal state<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 185 DFFSR_3 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n150 layer 1 -400 -340 +pin name Q signal state<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 186 DFFSR_4 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal $abc$546$n2 layer 1 -400 -340 +pin name Q signal state<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 187 DFFSR_5 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal state<2> layer 1 -400 -340 +pin name Q signal state<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 188 DFFSR_6 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 189 DFFSR_7 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 190 DFFSR_8 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 191 DFFSR_9 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 192 DFFSR_10 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal dp<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 193 DFFSR_11 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal dp<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 194 DFFSR_12 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal dp<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 195 DFFSR_13 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal dp<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 196 DFFSR_14 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal dp<8>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$884<8> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 197 DFFSR_15 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal done_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$882 layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 198 DFFSR_16 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 199 DFFSR_17 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 200 DFFSR_18 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 201 DFFSR_19 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal counter<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 202 DFFSR_20 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal counter<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 203 DFFSR_21 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal counter<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 204 DFFSR_22 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal counter<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 205 DFFSR_23 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal counter<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$873<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 206 DFFSR_24 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<0>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<0> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 207 DFFSR_25 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<1>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<1> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 208 DFFSR_26 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<2>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<2> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 209 DFFSR_27 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal sr<3>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<3> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 210 DFFSR_28 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf2 layer 1 -41 -501 +end_pin_group +pin name D signal sr<4>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<4> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf2 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 211 DFFSR_29 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf1 layer 1 -41 -501 +end_pin_group +pin name D signal sr<5>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<5> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf1 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 212 DFFSR_30 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf0 layer 1 -41 -501 +end_pin_group +pin name D signal sr<6>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<6> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf0 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 213 DFFSR_31 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf4 layer 1 -41 -501 +end_pin_group +pin name D signal sr<7>_FF_INPUT layer 1 -400 -340 +pin name Q signal $auto$iopadmap.cc:313:execute$894<7> layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf4 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 +cell 214 DFFSR_32 +left -1760 right 1760 bottom -1000 top 1000 +pin name twfeed1 signal TW_PASS_THRU layer 1 -1680 -1000 + equiv name twfeed1 layer 1 -1680 1000 +pin name twfeed2 signal TW_PASS_THRU layer 1 -1520 -1000 + equiv name twfeed2 layer 1 -1520 1000 +pin name twfeed3 signal TW_PASS_THRU layer 1 -1360 -1000 + equiv name twfeed3 layer 1 -1360 1000 +pin name twfeed4 signal TW_PASS_THRU layer 1 -1200 -1000 + equiv name twfeed4 layer 1 -1200 1000 +pin name twfeed5 signal TW_PASS_THRU layer 1 -1040 -1000 + equiv name twfeed5 layer 1 -1040 1000 +pin name twfeed6 signal TW_PASS_THRU layer 1 -880 -1000 + equiv name twfeed6 layer 1 -880 1000 +pin name twfeed7 signal TW_PASS_THRU layer 1 -720 -1000 + equiv name twfeed7 layer 1 -720 1000 +pin name twfeed8 signal TW_PASS_THRU layer 1 -560 -1000 + equiv name twfeed8 layer 1 -560 1000 +pin name twfeed9 signal TW_PASS_THRU layer 1 -400 -1000 + equiv name twfeed9 layer 1 -400 1000 +pin name twfeed10 signal TW_PASS_THRU layer 1 -240 -1000 + equiv name twfeed10 layer 1 -240 1000 +pin name twfeed11 signal TW_PASS_THRU layer 1 -80 -1000 + equiv name twfeed11 layer 1 -80 1000 +pin name twfeed12 signal TW_PASS_THRU layer 1 80 -1000 + equiv name twfeed12 layer 1 80 1000 +pin name twfeed13 signal TW_PASS_THRU layer 1 240 -1000 + equiv name twfeed13 layer 1 240 1000 +pin name twfeed14 signal TW_PASS_THRU layer 1 400 -1000 + equiv name twfeed14 layer 1 400 1000 +pin name twfeed15 signal TW_PASS_THRU layer 1 560 -1000 + equiv name twfeed15 layer 1 560 1000 +pin name twfeed16 signal TW_PASS_THRU layer 1 720 -1000 + equiv name twfeed16 layer 1 720 1000 +pin name twfeed17 signal TW_PASS_THRU layer 1 880 -1000 + equiv name twfeed17 layer 1 880 1000 +pin name twfeed18 signal TW_PASS_THRU layer 1 1040 -1000 + equiv name twfeed18 layer 1 1040 1000 +pin name twfeed19 signal TW_PASS_THRU layer 1 1200 -1000 + equiv name twfeed19 layer 1 1200 1000 +pin name twfeed20 signal TW_PASS_THRU layer 1 1360 -1000 + equiv name twfeed20 layer 1 1360 1000 +pin name twfeed21 signal TW_PASS_THRU layer 1 1520 -1000 + equiv name twfeed21 layer 1 1520 1000 +pin name twfeed22 signal TW_PASS_THRU layer 1 1680 -1000 + equiv name twfeed22 layer 1 1680 1000 +pin_group +pin name clock_bF$pin/CLK signal clock_bF$buf3 layer 1 -41 -501 +end_pin_group +pin name D signal start layer 1 -400 -340 +pin name Q signal startbuf layer 1 1520 449 +pin_group +pin name $abc$733$n164_bF$pin/R signal $abc$733$n164_bF$buf3 layer 1 -1040 -90 +end_pin_group +pin name S signal vdd layer 1 -1020 59 + +pad 2 name twpin_clock +corners 4 +-440 8280 -440 8440 -240 8440 -240 8280 +orient 7 +pin name clock signal clock layer 1 -340 8360 + +pad 3 name twpin_reset +corners 4 +-440 5860 -440 6020 -240 6020 -240 5860 +orient 7 +pin name reset signal reset layer 1 -340 5940 + +pad 4 name twpin_start +corners 4 +-440 8060 -440 8220 -240 8220 -240 8060 +orient 7 +pin name start signal start layer 1 -340 8140 + +pad 5 name twpin_N<0> +corners 4 +-440 7840 -440 8000 -240 8000 -240 7840 +orient 7 +pin name N<0> signal N<0> layer 1 -340 7920 + +pad 6 name twpin_N<1> +corners 4 +-440 7620 -440 7780 -240 7780 -240 7620 +orient 7 +pin name N<1> signal N<1> layer 1 -340 7700 + +pad 7 name twpin_N<2> +corners 4 +-440 7400 -440 7560 -240 7560 -240 7400 +orient 7 +pin name N<2> signal N<2> layer 1 -340 7480 + +pad 8 name twpin_N<3> +corners 4 +-440 7180 -440 7340 -240 7340 -240 7180 +orient 7 +pin name N<3> signal N<3> layer 1 -340 7260 + +pad 9 name twpin_N<4> +corners 4 +-440 6960 -440 7120 -240 7120 -240 6960 +orient 7 +pin name N<4> signal N<4> layer 1 -340 7040 + +pad 10 name twpin_N<5> +corners 4 +-440 6740 -440 6900 -240 6900 -240 6740 +orient 7 +pin name N<5> signal N<5> layer 1 -340 6820 + +pad 11 name twpin_N<6> +corners 4 +-440 6520 -440 6680 -240 6680 -240 6520 +orient 7 +pin name N<6> signal N<6> layer 1 -340 6600 + +pad 12 name twpin_N<7> +corners 4 +-440 6300 -440 6460 -240 6460 -240 6300 +orient 7 +pin name N<7> signal N<7> layer 1 -340 6380 + +pad 13 name twpin_N<8> +corners 4 +-440 6080 -440 6240 -240 6240 -240 6080 +orient 7 +pin name N<8> signal N<8> layer 1 -340 6160 + +pad 14 name twpin_dp<0> +corners 4 +-440 3660 -440 3820 -240 3820 -240 3660 +orient 7 +pin name dp<0> signal dp<0> layer 1 -340 3740 + +pad 15 name twpin_dp<1> +corners 4 +-440 3440 -440 3600 -240 3600 -240 3440 +orient 7 +pin name dp<1> signal dp<1> layer 1 -340 3520 + +pad 16 name twpin_dp<2> +corners 4 +-440 3220 -440 3380 -240 3380 -240 3220 +orient 7 +pin name dp<2> signal dp<2> layer 1 -340 3300 + +pad 17 name twpin_dp<3> +corners 4 +-440 3000 -440 3160 -240 3160 -240 3000 +orient 7 +pin name dp<3> signal dp<3> layer 1 -340 3080 + +pad 18 name twpin_dp<4> +corners 4 +-440 2780 -440 2940 -240 2940 -240 2780 +orient 7 +pin name dp<4> signal dp<4> layer 1 -340 2860 + +pad 19 name twpin_dp<5> +corners 4 +-440 2560 -440 2720 -240 2720 -240 2560 +orient 7 +pin name dp<5> signal dp<5> layer 1 -340 2640 + +pad 20 name twpin_dp<6> +corners 4 +-440 2340 -440 2500 -240 2500 -240 2340 +orient 7 +pin name dp<6> signal dp<6> layer 1 -340 2420 + +pad 21 name twpin_dp<7> +corners 4 +-440 2120 -440 2280 -240 2280 -240 2120 +orient 7 +pin name dp<7> signal dp<7> layer 1 -340 2200 + +pad 22 name twpin_dp<8> +corners 4 +-440 1900 -440 2060 -240 2060 -240 1900 +orient 7 +pin name dp<8> signal dp<8> layer 1 -340 1980 + +pad 23 name twpin_done +corners 4 +-440 3880 -440 4040 -240 4040 -240 3880 +orient 7 +pin name done signal done layer 1 -340 3960 + +pad 24 name twpin_counter<0> +corners 4 +-440 5640 -440 5800 -240 5800 -240 5640 +orient 7 +pin name counter<0> signal counter<0> layer 1 -340 5720 + +pad 25 name twpin_counter<1> +corners 4 +-440 5420 -440 5580 -240 5580 -240 5420 +orient 7 +pin name counter<1> signal counter<1> layer 1 -340 5500 + +pad 26 name twpin_counter<2> +corners 4 +-440 5200 -440 5360 -240 5360 -240 5200 +orient 7 +pin name counter<2> signal counter<2> layer 1 -340 5280 + +pad 27 name twpin_counter<3> +corners 4 +-440 4980 -440 5140 -240 5140 -240 4980 +orient 7 +pin name counter<3> signal counter<3> layer 1 -340 5060 + +pad 28 name twpin_counter<4> +corners 4 +-440 4760 -440 4920 -240 4920 -240 4760 +orient 7 +pin name counter<4> signal counter<4> layer 1 -340 4840 + +pad 29 name twpin_counter<5> +corners 4 +-440 4540 -440 4700 -240 4700 -240 4540 +orient 7 +pin name counter<5> signal counter<5> layer 1 -340 4620 + +pad 30 name twpin_counter<6> +corners 4 +-440 4320 -440 4480 -240 4480 -240 4320 +orient 7 +pin name counter<6> signal counter<6> layer 1 -340 4400 + +pad 31 name twpin_counter<7> +corners 4 +-440 4100 -440 4260 -240 4260 -240 4100 +orient 7 +pin name counter<7> signal counter<7> layer 1 -340 4180 + +pad 32 name twpin_sr<0> +corners 4 +-440 1680 -440 1840 -240 1840 -240 1680 +orient 7 +pin name sr<0> signal sr<0> layer 1 -340 1760 + +pad 33 name twpin_sr<1> +corners 4 +-440 1460 -440 1620 -240 1620 -240 1460 +orient 7 +pin name sr<1> signal sr<1> layer 1 -340 1540 + +pad 34 name twpin_sr<2> +corners 4 +-440 1240 -440 1400 -240 1400 -240 1240 +orient 7 +pin name sr<2> signal sr<2> layer 1 -340 1320 + +pad 35 name twpin_sr<3> +corners 4 +-440 1020 -440 1180 -240 1180 -240 1020 +orient 7 +pin name sr<3> signal sr<3> layer 1 -340 1100 + +pad 36 name twpin_sr<4> +corners 4 +-440 800 -440 960 -240 960 -240 800 +orient 7 +pin name sr<4> signal sr<4> layer 1 -340 880 + +pad 37 name twpin_sr<5> +corners 4 +-440 580 -440 740 -240 740 -240 580 +orient 7 +pin name sr<5> signal sr<5> layer 1 -340 660 + +pad 38 name twpin_sr<6> +corners 4 +-440 360 -440 520 -240 520 -240 360 +orient 7 +pin name sr<6> signal sr<6> layer 1 -340 440 + +pad 39 name twpin_sr<7> +corners 4 +-440 140 -440 300 -240 300 -240 140 +orient 7 +pin name sr<7> signal sr<7> layer 1 -340 220 diff -Nru graywolf-0.1.5/tests/twsc/map9v3/map9v3.stat graywolf-0.1.6/tests/twsc/map9v3/map9v3.stat --- graywolf-0.1.5/tests/twsc/map9v3/map9v3.stat 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/map9v3/map9v3.stat 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,17 @@ +syntax version:v1.1 date:Mon May 25 21:11:10 EDT 1992 +TIMESTAMP:Thu Jul 19 20:55:28 2018 +Statistics for map9v3: +num_stdcells:215 +num_macros:0 +num_instances:0 +num_pads:38 +num_nets:228 +num_pins:735 +num_implicit_feeds:1334 +num_equivs:1334 +num_unequivs:0 +num_ports:38 +macro_area:0.000e+00 +tot_length:213440 +num_soft:1 +cell_height:2000 diff -Nru graywolf-0.1.5/tests/twsc/runtest.sh graywolf-0.1.6/tests/twsc/runtest.sh --- graywolf-0.1.5/tests/twsc/runtest.sh 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/tests/twsc/runtest.sh 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,61 @@ +#!/bin/bash + +SOURCEDIR=$1 +BINDIR=$2 +TESTNAME=$3 + +#TWDIR=${BINDIR}/micro_env ${BINDIR}/src/twflow/graywolf +TMPDIR=`mktemp -d` +rsync ${SOURCEDIR}/tests/twsc/${TESTNAME} ${TMPDIR}/ -a --copy-links -v + + +pushd ${TMPDIR}/${TESTNAME} +TWDIR=${BINDIR}/micro_env ${BINDIR}/micro_env/bin/TimberWolfSC -n ${TESTNAME} + + +RET=0 + +diff -Nau ${TESTNAME}.pl1 expected/${TESTNAME}.pl1 +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.pl2 expected/${TESTNAME}.pl2 +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.pth expected/${TESTNAME}.pth +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.pin expected/${TESTNAME}.pin +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +diff -Nau ${TESTNAME}.sav expected/${TESTNAME}.sav +RETPART=$? +if [ "$RETPART" != "0" ] ; then + RET=-1 +fi + +echo "Just showing diff for. out:" +diff -Nau ${TESTNAME}.out expected/${TESTNAME}.out + + +if [ "$#" = "4" ] && [ "$4" == "1" ] ; then + cp * ${SOURCEDIR}/tests/twsc/${TESTNAME}/expected/ + touch ${SOURCEDIR}/tests/twsc/${TESTNAME}/expected/updated +fi + +popd +rm -rf ${TMPDIR} +#echo ${TMPDIR} + +exit $RET diff -Nru graywolf-0.1.5/.travis.yml graywolf-0.1.6/.travis.yml --- graywolf-0.1.5/.travis.yml 1970-01-01 00:00:00.000000000 +0000 +++ graywolf-0.1.6/.travis.yml 2018-08-11 21:48:56.000000000 +0000 @@ -0,0 +1,12 @@ +language: c + +install: + - sudo apt-get update + - sudo apt-get install -y libgsl0-dev libx11-dev cmake + +script: + - mkdir -p build + - cd build + - cmake .. + - make +