diff -Nru pciutils-3.7.0/ChangeLog pciutils-3.8.0/ChangeLog --- pciutils-3.7.0/ChangeLog 2020-05-30 22:17:11.000000000 +0000 +++ pciutils-3.8.0/ChangeLog 2022-04-18 16:47:17.000000000 +0000 @@ -1,3 +1,44 @@ +2022-04-18 Martin Mares + + * Released as 3.8.0. + + * Filters can now match devices based on partially specified + class code and also on the programming interface. + + * Reporting of link speeds, power limits, and virtual function tags + has been updated to the current PCIe specification. + + * We decode the Data Object Exchange capability. + + * Bus mapping mode works in non-zero domains. + + * pci_fill_info() can fetch more fields: bridge bases, programming + interface, revision, subsystem vendor and device ID, OS driver, + and also parent bridge. Internally, the implementation was rewritten, + significantly reducing the number of corner cases to be handled. + + * The Windows port was revived and greatly improved by Pali Rohár. + It requires less magic to compile. More importantly, it runs on both + old and recent Windows systems (see README.Windows for details). + + * Added a new Windows back-end using the cfgmgr32 interface. + It does not provide direct access to the configuration space, + but basic information about the device is reported via pci_fill_info(). + For back-ends of this type, we now provide an emulated read-only + config space. + + * If the configuration space is not readable for some reason + (e.g., the cfgmgr32 back-end, but also badly implemented sleep mode + of some devices), lspci prints only information provided by the OS. + + * The Hurd back-end was greatly improved thanks to Joan Lledó. + + * Various minor bug fixes and improvements. + + * We officially require a working C99 compiler. Sorry, MSVC. + + * As usually, updated pci.ids to the current snapshot of the database. + 2020-05-31 Martin Mares * Released as 3.7.0. @@ -763,7 +804,7 @@ 2007-08-31 Martin Mares - * Makefile, lib/Makefile: `ar' and `ranlib' can be overriden to allow + * Makefile, lib/Makefile: `ar' and `ranlib' can be overridden to allow cross-compilation. 2007-08-27 Martin Mares @@ -1337,7 +1378,7 @@ is not supported by all C libraries. * Makefile: Always enter the lib directory (remember that we don't have - full dependecies for the library in the top-level Makefile; hmmm, another + full dependencies for the library in the top-level Makefile; hmmm, another thing to rewrite some day). * lib/sysfs.c: Added Linux sysfs access method based on the patch @@ -1860,7 +1901,7 @@ * lspci.c (show_msi): Added dumping of the MSI capability. (show_slotid): The same for SlotID capability. - (show_caps): Seperated capability dumping, because it should + (show_caps): Separated capability dumping, because it should be used for both htype0 and htype1. Even PCI 2.2 doesn't mention layout of htype2, so I'm a bit unsure about it wrt capabilities -- they at least have to live somewhere else since address 0x34 @@ -1975,7 +2016,7 @@ is mainly guesswork based on DEC/Intel 21153 bridge specs since I don't have the PCI Power Management document). - * lspci.c: Replaced numerous occurences of (x & flag) ? '+' : '-' + * lspci.c: Replaced numerous occurrences of (x & flag) ? '+' : '-' by FLAG macro. * lspci.c: Added bridge checks to bus mapping code. @@ -2007,11 +2048,11 @@ * lib/header.h: Until kernel adopts new layout of PCI includes (i.e., separate declaration of header structure, functions and device IDs), which is not going to happen - before 2.3, we'll use our own definiton of the header. + before 2.3, we'll use our own definition of the header. * lspci.c (show_verbose): Display `Cap' flag in device status. - * lspci.c (show_htype0): Display capability lists whereever + * lspci.c (show_htype0): Display capability lists wherever available. The only capability name we recognize now is `AGP'. Unfortunately, capabilities are stored in device-dependent portion of the configuration space and are thus available diff -Nru pciutils-3.7.0/common.c pciutils-3.8.0/common.c --- pciutils-3.7.0/common.c 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/common.c 2022-02-10 12:46:16.000000000 +0000 @@ -10,7 +10,6 @@ #include #include #include -#include #include "pciutils.h" diff -Nru pciutils-3.7.0/compat/getopt.c pciutils-3.8.0/compat/getopt.c --- pciutils-3.7.0/compat/getopt.c 2011-01-07 21:04:28.000000000 +0000 +++ pciutils-3.8.0/compat/getopt.c 2021-12-28 15:26:39.000000000 +0000 @@ -36,7 +36,6 @@ #endif #include -#include /* Comment out all this code if we are using the GNU C Library, and are not actually compiling the library itself. This code is part of the GNU C @@ -163,6 +162,8 @@ #include #define my_index strchr #define my_strlen strlen +#define my_strcmp strcmp +#define my_strncmp strncmp #else /* Avoid depending on library functions or files @@ -170,11 +171,11 @@ #if __STDC__ || defined(PROTO) extern char *getenv(const char *name); -extern int strcmp(const char *s1, const char *s2); -extern int strncmp(const char *s1, const char *s2, int n); static int my_strlen(const char *s); static char *my_index(const char *str, int chr); +static int my_strncmp(const char *s1, const char *s2, int n); +static int my_strcmp(const char *s1, const char *s2); #else extern char *getenv(); #endif @@ -197,6 +198,23 @@ return 0; } +static int my_strncmp(const char *s1, const char *s2, int n) +{ + while (n && *s1 && (*s1 == *s2)) { + ++s1; + ++s2; + --n; + } + if (n == 0) + return 0; + return *(const unsigned char *)s1 - *(const unsigned char *)s2; +} + +static int my_strcmp(const char *s1, const char *s2) +{ + return my_strncmp(s1, s2, -1); +} + #endif /* GNU C library. */ /* Handle permutation of arguments. */ @@ -385,7 +403,7 @@ then exchange with previous non-options as if it were an option, then skip everything else like a non-option. */ - if (optind != argc && !strcmp(argv[optind], "--")) { + if (optind != argc && !my_strcmp(argv[optind], "--")) { optind++; if (first_nonopt != last_nonopt && last_nonopt != optind) @@ -445,7 +463,7 @@ /* Test all options for either exact match or abbreviated matches. */ for (p = longopts, option_index = 0; p->name; p++, option_index++) - if (!strncmp(p->name, nextchar, s - nextchar)) { + if (!my_strncmp(p->name, nextchar, s - nextchar)) { if (s - nextchar == my_strlen(p->name)) { /* Exact match found. */ pfound = p; diff -Nru pciutils-3.7.0/compat/getopt.h pciutils-3.8.0/compat/getopt.h --- pciutils-3.7.0/compat/getopt.h 2006-05-05 12:18:24.000000000 +0000 +++ pciutils-3.8.0/compat/getopt.h 2021-12-28 15:26:39.000000000 +0000 @@ -95,12 +95,7 @@ #define optional_argument 2 #if __STDC__ || defined(PROTO) -#if defined(__GNU_LIBRARY__) -/* Many other libraries have conflicting prototypes for getopt, with - differences in the consts, in stdlib.h. To avoid compilation - errors, only prototype getopt for the GNU C library. */ extern int getopt (int argc, char *const *argv, const char *shortopts); -#endif /* not __GNU_LIBRARY__ */ extern int getopt_long (int argc, char *const *argv, const char *shortopts, const struct option *longopts, int *longind); extern int getopt_long_only (int argc, char *const *argv, diff -Nru pciutils-3.7.0/debian/changelog pciutils-3.8.0/debian/changelog --- pciutils-3.7.0/debian/changelog 2021-08-30 02:45:58.000000000 +0000 +++ pciutils-3.8.0/debian/changelog 2022-07-17 00:35:09.000000000 +0000 @@ -1,3 +1,19 @@ +pciutils (1:3.8.0-1) unstable; urgency=medium + + * New upstream release. + - Remove all patches, merged upstream. + - Add new symbols to symbols file. + - Replace upstream signing key, it had expired. + - Do not ship current upstream tarball signatures, as these were made + with the expired signing key. This was reported upstream when the + release happened, but no new signatures have appeared yet. + - Update copyright years. + * Change Suggests from obsolete lynx-cur to lynx. + * Switch to Standards-Version 4.6.1 (no changes needed). + * Update lintian override to use new square bracket syntax. + + -- Guillem Jover Sun, 17 Jul 2022 02:35:09 +0200 + pciutils (1:3.7.0-6) unstable; urgency=medium * Add support for the noudeb build profile. Closes: #983322 diff -Nru pciutils-3.7.0/debian/control pciutils-3.8.0/debian/control --- pciutils-3.7.0/debian/control 2021-08-30 02:36:45.000000000 +0000 +++ pciutils-3.8.0/debian/control 2022-07-17 00:35:09.000000000 +0000 @@ -10,7 +10,7 @@ libudev-dev (>= 196) [linux-any], zlib1g-dev, Rules-Requires-Root: no -Standards-Version: 4.5.1 +Standards-Version: 4.6.1 Homepage: https://mj.ucw.cz/sw/pciutils/ Vcs-Browser: https://git.hadrons.org/cgit/debian/pkgs/pciutils.git Vcs-Git: https://git.hadrons.org/git/debian/pkgs/pciutils.git @@ -25,7 +25,7 @@ libpci3 (= ${binary:Version}), Suggests: bzip2, - wget | curl | lynx-cur, + wget | curl | lynx, Description: PCI utilities This package contains various utilities for inspecting and setting of devices connected to the PCI bus. diff -Nru pciutils-3.7.0/debian/copyright pciutils-3.8.0/debian/copyright --- pciutils-3.7.0/debian/copyright 2020-06-15 22:58:19.000000000 +0000 +++ pciutils-3.8.0/debian/copyright 2022-07-17 00:35:09.000000000 +0000 @@ -4,7 +4,7 @@ Files: * Copyright: - Copyright © 1997-2020 Martin Mares + Copyright © 1997-2022 Martin Mares Copyright © 1999 Jari Kirma Copyright © 2002 Quentin Garnier Copyright © 2003 Bill Moore @@ -26,7 +26,7 @@ Files: debian/* Copyright: - Copyright © 2020 Guillem Jover + Copyright © 2020-2022 Guillem Jover Copyright © 2020 Collabora Ltd. License: GPL-2+ diff -Nru pciutils-3.7.0/debian/libpci3.lintian-overrides pciutils-3.8.0/debian/libpci3.lintian-overrides --- pciutils-3.7.0/debian/libpci3.lintian-overrides 2020-06-06 04:27:37.000000000 +0000 +++ pciutils-3.8.0/debian/libpci3.lintian-overrides 2022-07-17 00:35:09.000000000 +0000 @@ -1 +1 @@ -libpci3: exit-in-shared-library usr/lib/* +libpci3: exit-in-shared-library [usr/lib/*] diff -Nru pciutils-3.7.0/debian/libpci3.symbols pciutils-3.8.0/debian/libpci3.symbols --- pciutils-3.7.0/debian/libpci3.symbols 2020-06-06 04:13:56.000000000 +0000 +++ pciutils-3.8.0/debian/libpci3.symbols 2022-07-17 00:35:09.000000000 +0000 @@ -8,6 +8,7 @@ LIBPCI_3.5@LIBPCI_3.5 1:3.5.0 LIBPCI_3.6@LIBPCI_3.6 1:3.6.0 LIBPCI_3.7@LIBPCI_3.7 1:3.6.2 + LIBPCI_3.8@LIBPCI_3.8 1:3.8.0 pci_alloc@LIBPCI_3.0 1:3.0.0. pci_cleanup@LIBPCI_3.0 1:3.0.0 pci_fill_info@LIBPCI_3.0 1:3.0.0 @@ -16,14 +17,19 @@ pci_fill_info@LIBPCI_3.3 1:3.3.0 pci_fill_info@LIBPCI_3.4 1:3.4.0 pci_fill_info@LIBPCI_3.5 1:3.5.0 + pci_fill_info@LIBPCI_3.8 1:3.8.0 pci_filter_init@LIBPCI_3.0 1:3.0.0 pci_filter_init@LIBPCI_3.3 1:3.3.0 + pci_filter_init@LIBPCI_3.8 1:3.8.0 pci_filter_match@LIBPCI_3.0 1:3.0.0 pci_filter_match@LIBPCI_3.3 1:3.3.0 + pci_filter_match@LIBPCI_3.8 1:3.8.0 pci_filter_parse_id@LIBPCI_3.0 1:3.0.0 pci_filter_parse_id@LIBPCI_3.3 1:3.3.0 + pci_filter_parse_id@LIBPCI_3.8 1:3.8.0 pci_filter_parse_slot@LIBPCI_3.0 1:3.0.0 pci_filter_parse_slot@LIBPCI_3.3 1:3.3.0 + pci_filter_parse_slot@LIBPCI_3.8 1:3.8.0 pci_find_cap@LIBPCI_3.1 1:3.1.0 pci_find_cap_nr@LIBPCI_3.7 1:3.6.3 pci_free_dev@LIBPCI_3.0 1:3.0.0 diff -Nru pciutils-3.7.0/debian/patches/00-configure-hurd.patch pciutils-3.8.0/debian/patches/00-configure-hurd.patch --- pciutils-3.7.0/debian/patches/00-configure-hurd.patch 2020-09-24 20:10:06.000000000 +0000 +++ pciutils-3.8.0/debian/patches/00-configure-hurd.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,32 +0,0 @@ -From e39a3af22501234a91cf28e8c57b45f9379f9101 Mon Sep 17 00:00:00 2001 -From: Damien Zammit -Date: Fri, 26 Oct 2018 09:24:04 -0400 -Subject: [PATCH 2/2] Add ability to detect GNU/Hurd when configuring -Forwarded: https://github.com/pciutils/pciutils/pull/47 - ---- - lib/configure | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - ---- a/lib/configure -+++ b/lib/configure -@@ -25,7 +25,7 @@ if [ -z "$HOST" ] ; then - proc=`/usr/sbin/lsdev -C -c processor -S available -F name | head -1` - cpu=`/usr/sbin/lsattr -F value -l $proc -a type | sed 's/_.*//'` - else -- cpu=`uname -m | sed 's/^i.86$/i386/;s/^sun4u$/sparc64/;s/^i86pc$/i386/;s/^BePC$/i386/;s/^BeMac$/powerpc/;s/^BeBox$/powerpc/'` -+ cpu=`uname -m | sed 's/^i.86-AT386/i386/;s/^i.86$/i386/;s/^sun4u$/sparc64/;s/^i86pc$/i386/;s/^BePC$/i386/;s/^BeMac$/powerpc/;s/^BeBox$/powerpc/'` - fi - if [ "$sys" = "DragonFly" ] - then -@@ -39,6 +39,10 @@ if [ -z "$HOST" ] ; then - then - sys=cygwin - fi -+ if [ "$sys" = "GNU" ] -+ then -+ sys=gnu -+ fi - HOST=${3:-$cpu-$sys} - fi - [ -n "$RELEASE" ] && rel="${RELEASE}" diff -Nru pciutils-3.7.0/debian/patches/00-configure.patch pciutils-3.8.0/debian/patches/00-configure.patch --- pciutils-3.7.0/debian/patches/00-configure.patch 2020-09-24 20:10:09.000000000 +0000 +++ pciutils-3.8.0/debian/patches/00-configure.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,40 +0,0 @@ -Author: Guillem Jover -Description: Add support for GNU style system names -Forwarded: https://github.com/pciutils/pciutils/pull/47 - ---- - lib/configure | 10 +++++++--- - 1 file changed, 7 insertions(+), 3 deletions(-) - ---- a/lib/configure -+++ b/lib/configure -@@ -27,10 +27,14 @@ if [ -z "$HOST" ] ; then - else - cpu=`uname -m | sed 's/^i.86$/i386/;s/^sun4u$/sparc64/;s/^i86pc$/i386/;s/^BePC$/i386/;s/^BeMac$/powerpc/;s/^BeBox$/powerpc/'` - fi -- if [ "$sys" = "GNU/kFreeBSD" -o "$sys" = "DragonFly" ] -+ if [ "$sys" = "DragonFly" ] - then - sys=freebsd - fi -+ if [ "$sys" = "GNU/kFreeBSD" ] -+ then -+ sys=kfreebsd -+ fi - if [ "$sys" = "CYGWIN_NT-5.1" -o "$sys" = "CYGWIN_NT-6.0" ] - then - sys=cygwin -@@ -82,11 +86,11 @@ case $sys in - esac - echo >>$c '#define PCI_HAVE_STDINT_H' - ;; -- freebsd*) -+ freebsd*|kfreebsd*) - echo_n " fbsd-device" - echo >>$c '#define PCI_HAVE_PM_FBSD_DEVICE' - echo >>$c '#define PCI_PATH_FBSD_DEVICE "/dev/pci"' -- if [ "$realsys" != "GNU/kFreeBSD" ] ; then -+ if [ "$sys" != "kfreebsd" ] ; then - LIBRESOLV= - fi - ;; diff -Nru pciutils-3.7.0/debian/patches/04-update-pciids.sh.patch pciutils-3.8.0/debian/patches/04-update-pciids.sh.patch --- pciutils-3.7.0/debian/patches/04-update-pciids.sh.patch 2021-01-23 22:50:13.000000000 +0000 +++ pciutils-3.8.0/debian/patches/04-update-pciids.sh.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,45 +0,0 @@ -Author: Guillem Jover -Description: Minor tweaks to upstream script -Forwarded: https://github.com/pciutils/pciutils/pull/48 - ---- - update-pciids.sh | 11 ++++++----- - 1 file changed, 6 insertions(+), 5 deletions(-) - ---- a/update-pciids.sh -+++ b/update-pciids.sh -@@ -1,13 +1,14 @@ - #!/bin/sh - --[ "$1" = "-q" ] && quiet=true || quiet=false -- - set -e -+ - SRC="https://pci-ids.ucw.cz/v2.2/pci.ids" - DEST=pci.ids - PCI_COMPRESSED_IDS= - GREP=grep - -+[ "$1" = "-q" ] && quiet=true || quiet=false -+ - # if pci.ids is read-only (because the filesystem is read-only), - # then just skip this whole process. - if ! touch ${DEST} >/dev/null 2>&1 ; then -@@ -31,7 +32,7 @@ fi - - if which curl >/dev/null 2>&1 ; then - DL="curl -o $DEST.new $SRC" -- ${quiet} && DL="$DL -s -S" -+ ${quiet} && DL="$DL -s -S" - elif which wget >/dev/null 2>&1 ; then - DL="wget --no-timestamping -O $DEST.new $SRC" - ${quiet} && DL="$DL -q" -@@ -59,7 +60,7 @@ if ! $GREP >/dev/null "^C " $DEST.neww ; - fi - - if [ -f $DEST ] ; then -- mv $DEST $DEST.old -+ ln -f $DEST $DEST.old - # --reference is supported only by chmod from GNU file, so let's ignore any errors - chmod -f --reference=$DEST.old $DEST.neww 2>/dev/null || true - fi diff -Nru pciutils-3.7.0/debian/patches/07-697383-libpci.pc.in.patch pciutils-3.8.0/debian/patches/07-697383-libpci.pc.in.patch --- pciutils-3.7.0/debian/patches/07-697383-libpci.pc.in.patch 2020-09-24 20:10:21.000000000 +0000 +++ pciutils-3.8.0/debian/patches/07-697383-libpci.pc.in.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,47 +0,0 @@ -From: Brice Goglin -Subject: libpci-dev: libpci.pc misses -lresolv and -lz for static linking -Date: Fri, 04 Jan 2013 17:31:14 +0100 -Debian-Bug: http://bugs.debian.org/697383 -Forwarded: https://github.com/pciutils/pciutils/pull/47 - -libpci.pc doesn't seem to be correct for static linking. - - $ pkg-config --libs --static libpci - -lpci - -It brings no dependencies while -lresolv (and likely -lz) seems needed: - - /usr/lib/gcc/x86_64-linux-gnu/4.7/../../../x86_64-linux-gnu/ - libpci.a(names-net.o):function pci_id_net_lookup: - error: undefined reference to '__res_query' - -Something like: - - Libs.private: -lresolv -lz - ---- - lib/Makefile | 3 ++- - lib/libpci.pc.in | 2 +- - 2 files changed, 3 insertions(+), 2 deletions(-) - ---- a/lib/libpci.pc.in -+++ b/lib/libpci.pc.in -@@ -7,5 +7,5 @@ Name: libpci - Description: libpci - Version: @VERSION@ - Libs: -L${libdir} -lpci --Libs.private: @LDLIBS@ -+Libs.private: @LDLIBS@ @WITH_LIBS@ - Cflags: -I${includedir} ---- a/lib/Makefile -+++ b/lib/Makefile -@@ -77,7 +77,8 @@ $(PCILIBPC): libpci.pc.in - -e 's,@LIBDIR@,$(LIBDIR),' \ - -e 's,@IDSDIR@,$(IDSDIR),' \ - -e 's,@VERSION@,$(VERSION),' \ -- -e 's,@LDLIBS@,$(LDLIBS),' -+ -e 's,@LDLIBS@,$(LDLIBS),' \ -+ -e 's,@WITH_LIBS@,$(WITH_LIBS),' - - init.o: init.c $(INCL) - access.o: access.c $(INCL) diff -Nru pciutils-3.7.0/debian/patches/hurd-flags-arg.patch pciutils-3.8.0/debian/patches/hurd-flags-arg.patch --- pciutils-3.7.0/debian/patches/hurd-flags-arg.patch 2020-06-23 23:16:19.000000000 +0000 +++ pciutils-3.8.0/debian/patches/hurd-flags-arg.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,21 +0,0 @@ -Description: Fix build failure on Hurd -Author: Martin Mareš -Origin: upstream, https://github.com/pciutils/pciutils/commit/053cf6c8b2acafadf828912828336d90fe9b8696 -Last-Update: 2020-06-23 - ---- - lib/hurd.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/lib/hurd.c -+++ b/lib/hurd.c -@@ -307,8 +307,7 @@ hurd_fill_regions(struct pci_dev *d) - d->base_addr[i] |= regions[i].is_64 << 2; - d->base_addr[i] |= regions[i].is_prefetchable << 3; - -- if (flags & PCI_FILL_SIZES) -- d->size[i] = regions[i].size; -+ d->size[i] = regions[i].size; - } - } - diff -Nru pciutils-3.7.0/debian/patches/man-page-typos.patch pciutils-3.8.0/debian/patches/man-page-typos.patch --- pciutils-3.7.0/debian/patches/man-page-typos.patch 2020-09-24 20:10:53.000000000 +0000 +++ pciutils-3.8.0/debian/patches/man-page-typos.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,31 +0,0 @@ -Author: Guillem Jover -Description: Fix man page typos -Forwarded: https://github.com/pciutils/pciutils/pull/46 - ---- - lspci.man | 2 +- - setpci.man | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - ---- a/lspci.man -+++ b/lspci.man -@@ -188,7 +188,7 @@ available methods and their descriptions - .TP - .B -O = - The behavior of the library is controlled by several named parameters. --This option allows to set the value of any of the parameters. Use \fB-O help\fP -+This option allows one to set the value of any of the parameters. Use \fB-O help\fP - for a list of known parameters and their default values. - .TP - .B -H1 ---- a/setpci.man -+++ b/setpci.man -@@ -78,7 +78,7 @@ available methods and their descriptions - .TP - .B -O = - The behavior of the library is controlled by several named parameters. --This option allows to set the value of any of the parameters. Use \fB-O help\fP -+This option allows one to set the value of any of the parameters. Use \fB-O help\fP - for a list of known parameters and their default values. - .TP - .B -H1 diff -Nru pciutils-3.7.0/debian/patches/series pciutils-3.8.0/debian/patches/series --- pciutils-3.7.0/debian/patches/series 2020-09-23 18:08:21.000000000 +0000 +++ pciutils-3.8.0/debian/patches/series 1970-01-01 00:00:00.000000000 +0000 @@ -1,6 +0,0 @@ -00-configure.patch -00-configure-hurd.patch -04-update-pciids.sh.patch -07-697383-libpci.pc.in.patch -man-page-typos.patch -hurd-flags-arg.patch diff -Nru pciutils-3.7.0/debian/upstream/signing-key.asc pciutils-3.8.0/debian/upstream/signing-key.asc --- pciutils-3.7.0/debian/upstream/signing-key.asc 2019-04-11 20:11:03.000000000 +0000 +++ pciutils-3.8.0/debian/upstream/signing-key.asc 2022-07-17 00:35:09.000000000 +0000 @@ -1,85 +1,71 @@ -----BEGIN PGP PUBLIC KEY BLOCK----- -mQINBE6NbZkBEADDNlHfaQgjgydzX3KxB7u5ZNiMFQ9fMxs7alOUVuRJHzIMLVFT -d+4ShrXsFOWrq3LQTKcS03YfRbxgBqEubeuqKo1MebyxtnTtvTddfq2gMC7QBwHn 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pciutils-3.8.0/lib/access.c --- pciutils-3.7.0/lib/access.c 2020-05-26 16:11:35.000000000 +0000 +++ pciutils-3.8.0/lib/access.c 2022-02-10 12:49:39.000000000 +0000 @@ -1,7 +1,7 @@ /* * The PCI Library -- User Access * - * Copyright (c) 1997--2018 Martin Mares + * Copyright (c) 1997--2022 Martin Mares * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -189,7 +189,7 @@ } int -pci_fill_info_v35(struct pci_dev *d, int flags) +pci_fill_info_v38(struct pci_dev *d, int flags) { unsigned int uflags = flags; if (uflags & PCI_FILL_RESCAN) @@ -198,24 +198,26 @@ pci_reset_properties(d); } if (uflags & ~d->known_fields) - d->known_fields |= d->methods->fill_info(d, flags & ~d->known_fields); + d->methods->fill_info(d, uflags); return d->known_fields; } /* In version 3.1, pci_fill_info got new flags => versioned alias */ -/* In versions 3.2, 3.3, 3.4 and 3.5, the same has happened */ -STATIC_ALIAS(int pci_fill_info(struct pci_dev *d, int flags), pci_fill_info_v35(d, flags)); -DEFINE_ALIAS(int pci_fill_info_v30(struct pci_dev *d, int flags), pci_fill_info_v35); -DEFINE_ALIAS(int pci_fill_info_v31(struct pci_dev *d, int flags), pci_fill_info_v35); -DEFINE_ALIAS(int pci_fill_info_v32(struct pci_dev *d, int flags), pci_fill_info_v35); -DEFINE_ALIAS(int pci_fill_info_v33(struct pci_dev *d, int flags), pci_fill_info_v35); -DEFINE_ALIAS(int pci_fill_info_v34(struct pci_dev *d, int flags), pci_fill_info_v35); +/* In versions 3.2, 3.3, 3.4, 3.5 and 3.8, the same has happened */ +STATIC_ALIAS(int pci_fill_info(struct pci_dev *d, int flags), pci_fill_info_v38(d, flags)); +DEFINE_ALIAS(int pci_fill_info_v30(struct pci_dev *d, int flags), pci_fill_info_v38); +DEFINE_ALIAS(int pci_fill_info_v31(struct pci_dev *d, int flags), pci_fill_info_v38); +DEFINE_ALIAS(int pci_fill_info_v32(struct pci_dev *d, int flags), pci_fill_info_v38); +DEFINE_ALIAS(int pci_fill_info_v33(struct pci_dev *d, int flags), pci_fill_info_v38); +DEFINE_ALIAS(int pci_fill_info_v34(struct pci_dev *d, int flags), pci_fill_info_v38); +DEFINE_ALIAS(int pci_fill_info_v35(struct pci_dev *d, int flags), pci_fill_info_v38); SYMBOL_VERSION(pci_fill_info_v30, pci_fill_info@LIBPCI_3.0); SYMBOL_VERSION(pci_fill_info_v31, pci_fill_info@LIBPCI_3.1); SYMBOL_VERSION(pci_fill_info_v32, pci_fill_info@LIBPCI_3.2); SYMBOL_VERSION(pci_fill_info_v33, pci_fill_info@LIBPCI_3.3); SYMBOL_VERSION(pci_fill_info_v34, pci_fill_info@LIBPCI_3.4); -SYMBOL_VERSION(pci_fill_info_v35, pci_fill_info@@LIBPCI_3.5); +SYMBOL_VERSION(pci_fill_info_v35, pci_fill_info@LIBPCI_3.5); +SYMBOL_VERSION(pci_fill_info_v38, pci_fill_info@@LIBPCI_3.8); void pci_setup_cache(struct pci_dev *d, byte *cache, int len) diff -Nru pciutils-3.7.0/lib/caps.c pciutils-3.8.0/lib/caps.c --- pciutils-3.7.0/lib/caps.c 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/caps.c 2022-02-10 12:49:39.000000000 +0000 @@ -80,17 +80,16 @@ while (where); } -unsigned int +void pci_scan_caps(struct pci_dev *d, unsigned int want_fields) { - if ((want_fields & PCI_FILL_EXT_CAPS) && !(d->known_fields & PCI_FILL_CAPS)) + if (want_fields & PCI_FILL_EXT_CAPS) want_fields |= PCI_FILL_CAPS; - if (want_fields & PCI_FILL_CAPS) + if (want_fill(d, want_fields, PCI_FILL_CAPS)) pci_scan_trad_caps(d); - if (want_fields & PCI_FILL_EXT_CAPS) + if (want_fill(d, want_fields, PCI_FILL_EXT_CAPS)) pci_scan_ext_caps(d); - return want_fields; } void @@ -117,8 +116,8 @@ * To select one capability if there are more than one with the same id, you * can provide a pointer to an unsigned int that contains the index which you * want as cap_number. If you don't care and are fine with the first one you - * can supply NULL. The cap_number will be replaced by the acutal number - * of capablities with that id. + * can supply NULL. The cap_number will be replaced by the actual number + * of capabilities with that id. */ struct pci_cap * pci_find_cap_nr(struct pci_dev *d, unsigned int id, unsigned int type, @@ -129,7 +128,7 @@ unsigned int target = (cap_number ? *cap_number : 0); unsigned int index = 0; - pci_fill_info_v35(d, ((type == PCI_CAP_NORMAL) ? PCI_FILL_CAPS : PCI_FILL_EXT_CAPS)); + pci_fill_info_v38(d, ((type == PCI_CAP_NORMAL) ? PCI_FILL_CAPS : PCI_FILL_EXT_CAPS)); for (c=d->first_cap; c; c=c->next) { diff -Nru pciutils-3.7.0/lib/configure pciutils-3.8.0/lib/configure --- pciutils-3.7.0/lib/configure 2020-01-25 19:22:27.000000000 +0000 +++ pciutils-3.8.0/lib/configure 2022-04-15 21:57:59.000000000 +0000 @@ -9,7 +9,7 @@ printf '%s' "$*" } -if [ -z "$VERSION" -o -z "$IDSDIR" ] ; then +if [ -z "$VERSION" ] ; then echo >&2 "Please run the configure script from the top-level Makefile" exit 1 fi @@ -25,12 +25,20 @@ proc=`/usr/sbin/lsdev -C -c processor -S available -F name | head -1` cpu=`/usr/sbin/lsattr -F value -l $proc -a type | sed 's/_.*//'` else - cpu=`uname -m | sed 's/^i.86$/i386/;s/^sun4u$/sparc64/;s/^i86pc$/i386/;s/^BePC$/i386/;s/^BeMac$/powerpc/;s/^BeBox$/powerpc/'` + cpu=`uname -m | sed 's/^i.86-AT386/i386/;s/^i.86$/i386/;s/^sun4u$/sparc64/;s/^i86pc$/i386/;s/^BePC$/i386/;s/^BeMac$/powerpc/;s/^BeBox$/powerpc/'` fi - if [ "$sys" = "GNU/kFreeBSD" -o "$sys" = "DragonFly" ] + if [ "$sys" = "DragonFly" ] then sys=freebsd fi + if [ "$sys" = "GNU/kFreeBSD" ] + then + sys=kfreebsd + fi + if [ "$sys" = "GNU" ] + then + sys=gnu + fi if [ "$sys" = "CYGWIN_NT-5.1" -o "$sys" = "CYGWIN_NT-6.0" ] then sys=cygwin @@ -54,6 +62,9 @@ echo_n "Looking for access methods..." LIBRESOLV=-lresolv LIBEXT=so +EXEEXT= +SYSINCLUDE=/usr/include +LSPCIDIR=SBINDIR case $sys in linux*) @@ -69,6 +80,7 @@ ;; esac echo >>$c '#define PCI_HAVE_64BIT_ADDRESS' + LSPCIDIR=BINDIR ;; sunos) case $cpu in @@ -82,11 +94,11 @@ esac echo >>$c '#define PCI_HAVE_STDINT_H' ;; - freebsd*) + freebsd*|kfreebsd*) echo_n " fbsd-device" echo >>$c '#define PCI_HAVE_PM_FBSD_DEVICE' echo >>$c '#define PCI_PATH_FBSD_DEVICE "/dev/pci"' - if [ "$realsys" != "GNU/kFreeBSD" ] ; then + if [ "$sys" != "kfreebsd" ] ; then LIBRESOLV= fi ;; @@ -104,6 +116,7 @@ echo >>$c '#define PCI_HAVE_64BIT_ADDRESS' LIBRESOLV= LIBEXT=dylib + SYSINCLUDE=$(xcrun --sdk macosx --show-sdk-path)/usr/include ;; aix) echo_n " aix-device" @@ -129,11 +142,29 @@ djgpp) echo_n " i386-ports" echo >>$c '#define PCI_HAVE_PM_INTEL_CONF' + EXEEXT=.exe ;; - cygwin) + cygwin|windows) + echo_n " win32-cfgmgr32" + echo >>$c '#define PCI_HAVE_64BIT_ADDRESS' + echo >>$c '#define PCI_HAVE_PM_WIN32_CFGMGR32' + # Warning: MinGW-w64 (incorrectly) provides cfgmgr32 functions + # also in other import libraries, not only in libcfgmgr32.a. + # So always set -lcfgmgr32 as a first library parameter which + # instruct linker to prefer symbols from cfgmgr32.dll. + echo >>$m 'WITH_LIBS+=-lcfgmgr32' + case $cpu in i?86|x86_64) echo_n " i386-ports" echo >>$c '#define PCI_HAVE_PM_INTEL_CONF' - echo >>$m 'WITH_LIBS+=-lioperm' + if [ "$sys" = "cygwin" ] ; then + # ioperm is cygwin specific library and used only by lib/i386-io-cygwin.h + echo >>$m 'WITH_LIBS+=-lioperm' + elif [ "$sys" = "windows" ] ; then + # advapi32 is windows system library and used only by lib/i386-io-windows.h + echo >>$m 'WITH_LIBS+=-ladvapi32' + fi + ;; esac + EXEEXT=.exe ;; beos|haiku) case $cpu in @@ -157,6 +188,8 @@ esac echo >>$m "LIBEXT="$LIBEXT +echo >>$m "EXEEXT="$EXEEXT +echo >>$m "LSPCIDIR=\$($LSPCIDIR)" echo >>$c '#define PCI_HAVE_PM_DUMP' echo " dump" @@ -164,7 +197,7 @@ if [ "$ZLIB" = yes -o "$ZLIB" = no ] ; then echo "$ZLIB (set manually)" else - if [ -f /usr/include/zlib.h -o -f /usr/local/include/zlib.h ] ; then + if [ -f "$SYSINCLUDE/zlib.h" -o -f /usr/local/include/zlib.h ] ; then ZLIB=yes else ZLIB=no @@ -185,7 +218,7 @@ if [ "$DNS" = yes -o "$DNS" = no ] ; then echo "$DNS (set manually)" else - if [ -f /usr/include/resolv.h ] ; then + if [ "$sys" != "windows" -a -f "$SYSINCLUDE/resolv.h" ] ; then DNS=yes else DNS=no diff -Nru pciutils-3.7.0/lib/dump.c pciutils-3.8.0/lib/dump.c --- pciutils-3.7.0/lib/dump.c 2011-11-14 11:08:39.000000000 +0000 +++ pciutils-3.8.0/lib/dump.c 2022-01-21 20:23:36.000000000 +0000 @@ -80,7 +80,8 @@ len = z - buf + 1; mn = 0; if (dump_validate(buf, "##:##.# ") && sscanf(buf, "%x:%x.%d", &bn, &dn, &fn) == 3 || - dump_validate(buf, "####:##:##.# ") && sscanf(buf, "%x:%x:%x.%d", &mn, &bn, &dn, &fn) == 4) + dump_validate(buf, "####:##:##.# ") && sscanf(buf, "%x:%x:%x.%d", &mn, &bn, &dn, &fn) == 4 || + dump_validate(buf, "#####:##:##.# ") && sscanf(buf, "%x:%x:%x.%d", &mn, &bn, &dn, &fn) == 4) { dev = pci_get_dev(a, mn, bn, dn, fn); dump_alloc_data(dev, 256); @@ -89,7 +90,9 @@ else if (!len) dev = NULL; else if (dev && - (dump_validate(buf, "##: ") || dump_validate(buf, "###: ")) && + (dump_validate(buf, "##: ") || dump_validate(buf, "###: ") || dump_validate(buf, "####: ") || + dump_validate(buf, "#####: ") || dump_validate(buf, "######: ") || + dump_validate(buf, "#######: ") || dump_validate(buf, "########: ")) && sscanf(buf, "%x: ", &i) == 1) { struct dump_data *dd = dev->aux; diff -Nru pciutils-3.7.0/lib/emulated.c pciutils-3.8.0/lib/emulated.c --- pciutils-3.7.0/lib/emulated.c 1970-01-01 00:00:00.000000000 +0000 +++ pciutils-3.8.0/lib/emulated.c 2022-04-15 21:47:48.000000000 +0000 @@ -0,0 +1,299 @@ +/* + * The PCI Library -- Virtual Emulated Config Space Access Functions + * + * Copyright (c) 2022 Pali Rohár + * + * Can be freely distributed and used under the terms of the GNU GPL. + */ + +#include "internal.h" + +static u32 +ioflg_to_pciflg(pciaddr_t ioflg) +{ + u32 flg = 0; + + if ((ioflg & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_IO) + flg = PCI_BASE_ADDRESS_SPACE_IO; + else if ((ioflg & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_MEM) + { + flg = PCI_BASE_ADDRESS_SPACE_MEMORY; + if (ioflg & PCI_IORESOURCE_MEM_64) + flg |= PCI_BASE_ADDRESS_MEM_TYPE_64; + else + flg |= PCI_BASE_ADDRESS_MEM_TYPE_32; + if (ioflg & PCI_IORESOURCE_PREFETCH) + flg |= PCI_BASE_ADDRESS_MEM_PREFETCH; + } + + return flg; +} + +static u32 +baseres_to_pcires(pciaddr_t addr, pciaddr_t ioflg, int *have_sec, u32 *sec_val) +{ + u32 val = ioflg_to_pciflg(ioflg); + + if (have_sec) + *have_sec = 0; + + if ((val & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO && addr <= 0xffffffff) + val |= addr & PCI_BASE_ADDRESS_IO_MASK; + else if ((val & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) + { + val |= addr & PCI_BASE_ADDRESS_MEM_MASK; + if ((val & PCI_BASE_ADDRESS_MEM_TYPE_64) && have_sec) + { + *have_sec = 1; + *sec_val = addr >> 32; + } + } + + return val; +} + +static inline u32 +even_baseres_to_pcires(pciaddr_t addr, pciaddr_t ioflg) +{ + return baseres_to_pcires(addr, ioflg, NULL, NULL); +} + +static inline u32 +odd_baseres_to_pcires(pciaddr_t addr0, pciaddr_t ioflg0, pciaddr_t addr, pciaddr_t ioflg) +{ + int have_sec; + u32 val; + baseres_to_pcires(addr0, ioflg0, &have_sec, &val); + if (!have_sec) + val = baseres_to_pcires(addr, ioflg, NULL, NULL); + return val; +} + +int +pci_emulated_read(struct pci_dev *d, int pos, byte *buf, int len) +{ + u32 ht = PCI_HEADER_TYPE_NORMAL; + u32 val = 0; + int i; + + if (pos >= 64) + return 0; + + if (len > 4) + return pci_generic_block_read(d, pos, buf, len); + + if (d->device_class == PCI_CLASS_BRIDGE_PCI) + ht = PCI_HEADER_TYPE_BRIDGE; + else if (d->device_class == PCI_CLASS_BRIDGE_CARDBUS) + ht = PCI_HEADER_TYPE_CARDBUS; + + switch (pos & ~3) + { + case PCI_COMMAND: + for (i = 0; i < 6; i++) + { + if (!d->size[i]) + continue; + if ((d->flags[i] & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_IO) + val |= PCI_COMMAND_IO; + else if ((d->flags[i] & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_MEM) + val |= PCI_COMMAND_MEMORY; + } + break; + case PCI_VENDOR_ID: + val = (d->device_id << 16) | d->vendor_id; + break; + case PCI_CLASS_REVISION: + val = (d->device_class << 16) | (d->prog_if << 8) | d->rev_id; + break; + case PCI_CACHE_LINE_SIZE: + val = ht << 16; + break; + case PCI_BASE_ADDRESS_0: + val = even_baseres_to_pcires(d->base_addr[0], d->flags[0]); + break; + case PCI_INTERRUPT_LINE: + val = (d->irq >= 0 && d->irq <= 0xff) ? d->irq : 0; + break; + } + + if ((pos & ~3) == PCI_BASE_ADDRESS_1 && (ht == PCI_HEADER_TYPE_NORMAL || ht == PCI_HEADER_TYPE_BRIDGE)) + val = odd_baseres_to_pcires(d->base_addr[0], d->flags[0], d->base_addr[1], d->flags[1]); + + if (ht == PCI_HEADER_TYPE_NORMAL) + switch (pos & ~3) + { + case PCI_BASE_ADDRESS_2: + val = even_baseres_to_pcires(d->base_addr[2], d->flags[2]); + break; + case PCI_BASE_ADDRESS_3: + val = odd_baseres_to_pcires(d->base_addr[2], d->flags[2], d->base_addr[3], d->flags[3]); + break; + case PCI_BASE_ADDRESS_4: + val = even_baseres_to_pcires(d->base_addr[4], d->flags[4]); + break; + case PCI_BASE_ADDRESS_5: + val = odd_baseres_to_pcires(d->base_addr[4], d->flags[4], d->base_addr[5], d->flags[5]); + break; + case PCI_SUBSYSTEM_VENDOR_ID: + val = (d->subsys_id << 16) | d->subsys_vendor_id; + break; + case PCI_ROM_ADDRESS: + val = d->rom_base_addr & PCI_ROM_ADDRESS_MASK; + if (val) + val |= PCI_ROM_ADDRESS_ENABLE; + break; + } + else if (ht == PCI_HEADER_TYPE_BRIDGE) + switch (pos & ~3) + { + case PCI_COMMAND: + if (d->bridge_size[0]) + val |= PCI_COMMAND_IO; + if (d->bridge_size[1] || d->bridge_size[2]) + val |= PCI_COMMAND_MEMORY; + break; + case PCI_PRIMARY_BUS: + val = d->bus; + break; + case PCI_IO_BASE: + if (d->bridge_size[0]) + { + val = (((((d->bridge_base_addr[0] + d->bridge_size[0] - 1) >> 8) & PCI_IO_RANGE_MASK) << 8) & 0xff00) | + (((d->bridge_base_addr[0] >> 8) & PCI_IO_RANGE_MASK) & 0x00ff); + if ((d->bridge_flags[0] & PCI_IORESOURCE_IO_16BIT_ADDR) && + d->bridge_base_addr[0] + d->bridge_size[0] - 1 <= 0xffff) + val |= (PCI_IO_RANGE_TYPE_16 << 8) | PCI_IO_RANGE_TYPE_16; + else + val |= (PCI_IO_RANGE_TYPE_32 << 8) | PCI_IO_RANGE_TYPE_32; + } + else + val = 0xff & PCI_IO_RANGE_MASK; + break; + case PCI_MEMORY_BASE: + if (d->bridge_size[1]) + val = (((((d->bridge_base_addr[1] + d->bridge_size[1] - 1) >> 16) & PCI_MEMORY_RANGE_MASK) << 16) & 0xffff0000) | + (((d->bridge_base_addr[1] >> 16) & PCI_MEMORY_RANGE_MASK) & 0x0000ffff); + else + val = 0xffff & PCI_MEMORY_RANGE_MASK; + break; + case PCI_PREF_MEMORY_BASE: + if (d->bridge_size[2]) + { + val = (((((d->bridge_base_addr[2] + d->bridge_size[2] - 1) >> 16) & PCI_PREF_RANGE_MASK) << 16) & 0xffff0000) | + (((d->bridge_base_addr[2] >> 16) & PCI_PREF_RANGE_MASK) & 0x0000ffff); + if ((d->bridge_flags[2] & PCI_IORESOURCE_MEM_64) || + d->bridge_base_addr[2] + d->bridge_size[2] - 1 > 0xffffffff) + val |= (PCI_PREF_RANGE_TYPE_64 << 16) | PCI_PREF_RANGE_TYPE_64; + else + val |= (PCI_PREF_RANGE_TYPE_32 << 16) | PCI_PREF_RANGE_TYPE_32; + } + else + val = 0xffff & PCI_PREF_RANGE_MASK; + break; + case PCI_PREF_BASE_UPPER32: + if (d->bridge_size[2]) + val = d->bridge_base_addr[2] >> 32; + break; + case PCI_PREF_LIMIT_UPPER32: + if (d->bridge_size[2]) + val = (d->bridge_base_addr[2] + d->bridge_size[2] - 1) >> 32; + break; + case PCI_IO_BASE_UPPER16: + if (d->bridge_size[0]) + val = ((((d->bridge_base_addr[0] + d->bridge_size[0] - 1) >> 16) << 16) & 0xffff0000) | + ((d->bridge_base_addr[0] >> 16) & 0x0000ffff); + break; + case PCI_ROM_ADDRESS1: + val = d->rom_base_addr & PCI_ROM_ADDRESS_MASK; + if (val) + val |= PCI_ROM_ADDRESS_ENABLE; + break; + } + else if (ht == PCI_HEADER_TYPE_CARDBUS) + switch (pos & ~3) + { + case PCI_COMMAND: + if (d->bridge_size[0] || d->bridge_size[1]) + val |= PCI_COMMAND_MEMORY; + if (d->bridge_size[2] || d->bridge_size[3]) + val |= PCI_COMMAND_IO; + break; + case PCI_CB_PRIMARY_BUS: + val = d->bus; + break; + case PCI_CB_MEMORY_BASE_0: + if (d->bridge_size[0]) + val = d->bridge_base_addr[0] & ~0xfff; + else + val = 0xffffffff & ~0xfff; + break; + case PCI_CB_MEMORY_LIMIT_0: + if (d->bridge_size[0]) + val = (d->bridge_base_addr[0] + d->bridge_size[0] - 1) & ~0xfff; + break; + case PCI_CB_MEMORY_BASE_1: + if (d->bridge_size[1]) + val = d->bridge_base_addr[1] & ~0xfff; + else + val = 0xffffffff & ~0xfff; + break; + case PCI_CB_MEMORY_LIMIT_1: + if (d->bridge_size[1]) + val = (d->bridge_base_addr[1] + d->bridge_size[1] - 1) & ~0xfff; + break; + case PCI_CB_IO_BASE_0: + if (d->bridge_size[2]) + { + val = d->bridge_base_addr[2] & PCI_CB_IO_RANGE_MASK; + if ((d->bridge_flags[2] & PCI_IORESOURCE_IO_16BIT_ADDR) || + d->bridge_base_addr[2] + d->bridge_size[2] - 1 <= 0xffff) + val |= PCI_IO_RANGE_TYPE_16; + else + val |= PCI_IO_RANGE_TYPE_32; + } + else + val = 0x0000ffff & PCI_CB_IO_RANGE_MASK; + break; + case PCI_CB_IO_LIMIT_0: + if (d->bridge_size[2]) + val = (d->bridge_base_addr[2] + d->bridge_size[2] - 1) & PCI_CB_IO_RANGE_MASK; + break; + case PCI_CB_IO_BASE_1: + if (d->bridge_size[3]) + { + val = d->bridge_base_addr[3] & PCI_CB_IO_RANGE_MASK; + if ((d->bridge_flags[3] & PCI_IORESOURCE_IO_16BIT_ADDR) || + d->bridge_base_addr[3] + d->bridge_size[3] - 1 <= 0xffff) + val |= PCI_IO_RANGE_TYPE_16; + else + val |= PCI_IO_RANGE_TYPE_32; + } + else + val = 0x0000ffff & PCI_CB_IO_RANGE_MASK; + break; + case PCI_CB_IO_LIMIT_1: + if (d->bridge_size[3]) + val = (d->bridge_base_addr[3] + d->bridge_size[3] - 1) & PCI_CB_IO_RANGE_MASK; + break; + case PCI_CB_BRIDGE_CONTROL: + if (d->bridge_flags[0] & PCI_IORESOURCE_PREFETCH) + val |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0; + if (d->bridge_flags[1] & PCI_IORESOURCE_PREFETCH) + val |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM1; + break; + case PCI_CB_SUBSYSTEM_VENDOR_ID: + val = (d->subsys_id << 16) | d->subsys_vendor_id; + break; + } + + if (len <= 2) + val = (val >> (8 * (pos & 3))) & ((1 << (len * 8)) - 1); + + while (len-- > 0) + { + *(buf++) = val & 0xff; + val >>= 8; + } + return 1; +} diff -Nru pciutils-3.7.0/lib/fbsd-device.c pciutils-3.8.0/lib/fbsd-device.c --- pciutils-3.7.0/lib/fbsd-device.c 2020-05-26 16:11:35.000000000 +0000 +++ pciutils-3.8.0/lib/fbsd-device.c 2022-04-15 21:51:09.000000000 +0000 @@ -159,8 +159,8 @@ free(matches); } -static int -fbsd_fill_info(struct pci_dev *d, int flags) +static void +fbsd_fill_info(struct pci_dev *d, unsigned int flags) { struct pci_conf_io conf; struct pci_bar_io bar; @@ -195,21 +195,19 @@ if (ioctl(d->access->fd, PCIOCGETCONF, &conf) < 0) { - if (errno == ENODEV) - return 0; - d->access->error("fbsd_fill_info: ioctl(PCIOCGETCONF) failed: %s", strerror(errno)); + if (errno != ENODEV) + d->access->error("fbsd_fill_info: ioctl(PCIOCGETCONF) failed: %s", strerror(errno)); + return; } - if (flags & PCI_FILL_IDENT) + if (want_fill(d, flags, PCI_FILL_IDENT)) { d->vendor_id = match.pc_vendor; d->device_id = match.pc_device; } - if (flags & PCI_FILL_CLASS) - { - d->device_class = (match.pc_class << 8) | match.pc_subclass; - } - if (flags & (PCI_FILL_BASES | PCI_FILL_SIZES)) + if (want_fill(d, flags, PCI_FILL_CLASS)) + d->device_class = (match.pc_class << 8) | match.pc_subclass; + if (want_fill(d, flags, PCI_FILL_BASES | PCI_FILL_SIZES)) { d->rom_base_addr = 0; d->rom_size = 0; @@ -226,7 +224,7 @@ if (ioctl(d->access->fd, PCIOCGETBAR, &bar) < 0) { if (errno == ENODEV) - return 0; + return; if (errno == EINVAL) { d->base_addr[i] = 0; @@ -242,9 +240,6 @@ } } } - - return flags & (PCI_FILL_IDENT | PCI_FILL_CLASS | PCI_FILL_BASES | - PCI_FILL_SIZES); } static int diff -Nru pciutils-3.7.0/lib/filter.c pciutils-3.8.0/lib/filter.c --- pciutils-3.7.0/lib/filter.c 2016-05-14 09:58:01.000000000 +0000 +++ pciutils-3.8.0/lib/filter.c 2022-04-18 16:46:38.000000000 +0000 @@ -1,7 +1,7 @@ /* * The PCI Library -- Device Filtering * - * Copyright (c) 1998--2014 Martin Mares + * Copyright (c) 1998--2022 Martin Mares * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -11,116 +11,184 @@ #include "internal.h" -void pci_filter_init_v33(struct pci_access *a UNUSED, struct pci_filter *f) VERSIONED_ABI; -char *pci_filter_parse_slot_v33(struct pci_filter *f, char *str) VERSIONED_ABI; -char *pci_filter_parse_id_v33(struct pci_filter *f, char *str) VERSIONED_ABI; -int pci_filter_match_v33(struct pci_filter *f, struct pci_dev *d) VERSIONED_ABI; +void pci_filter_init_v38(struct pci_access *a UNUSED, struct pci_filter *f) VERSIONED_ABI; +char *pci_filter_parse_slot_v38(struct pci_filter *f, char *str) VERSIONED_ABI; +char *pci_filter_parse_id_v38(struct pci_filter *f, char *str) VERSIONED_ABI; +int pci_filter_match_v38(struct pci_filter *f, struct pci_dev *d) VERSIONED_ABI; void -pci_filter_init_v33(struct pci_access *a UNUSED, struct pci_filter *f) +pci_filter_init_v38(struct pci_access *a UNUSED, struct pci_filter *f) { + memset((byte *) f, 0, sizeof(*f)); f->domain = f->bus = f->slot = f->func = -1; - f->vendor = f->device = f->device_class = -1; + f->vendor = f->device = -1; + f->device_class = -1; + f->device_class_mask = ~0U; + f->prog_if = -1; } -/* Slot filter syntax: [[[domain]:][bus]:][slot][.[func]] */ +#define BUF_SIZE 64 -char * -pci_filter_parse_slot_v33(struct pci_filter *f, char *str) +static char * +split_to_fields(char *str, char *buffer, int sep, char **fields, int num_fields) { - char *colon = strrchr(str, ':'); - char *dot = strchr((colon ? colon + 1 : str), '.'); - char *mid = str; - char *e, *bus, *colon2; - - if (colon) - { - *colon++ = 0; - mid = colon; - colon2 = strchr(str, ':'); - if (colon2) + if (buffer) + { + if (strlen(str) >= BUF_SIZE) + return "Expression too long"; + strcpy(buffer, str); + str = buffer; + } + + int i = 0; + + for (;;) + { + if (i >= num_fields) + return "Too many fields"; + fields[i++] = str; + while (*str && *str != sep) + str++; + if (!*str) + break; + *str++ = 0; + } + + while (i < num_fields) + fields[i++] = NULL; + + return NULL; +} + +static int +field_defined(char *field) +{ + return field && field[0] && strcmp(field, "*"); +} + +static int +parse_hex_field(char *str, int *outp, unsigned int *maskp, unsigned int max) +{ + unsigned int out = 0; + unsigned int mask = ~0U; + unsigned int bound = 0; + + if (!field_defined(str)) + return 1; // and keep the defaults + + while (*str) + { + int c = *str++; + int d; + + if ((c == 'x' || c == 'X') && maskp) { - *colon2++ = 0; - bus = colon2; - if (str[0] && strcmp(str, "*")) - { - long int x = strtol(str, &e, 16); - if ((e && *e) || (x < 0 || x > 0x7fffffff)) - return "Invalid domain number"; - f->domain = x; - } + out = out << 4; + bound = (bound << 4) | 1; + mask = mask << 4; } else - bus = str; - if (bus[0] && strcmp(bus, "*")) { - long int x = strtol(bus, &e, 16); - if ((e && *e) || (x < 0 || x > 0xff)) - return "Invalid bus number"; - f->bus = x; + if (c >= '0' && c <= '9') + d = c - '0'; + else if (c >= 'A' && c <= 'F') + d = c - 'A' + 10; + else if (c >= 'a' && c <= 'f') + d = c - 'a' + 10; + else + return 0; + + out = (out << 4) | d; + bound = (bound << 4) | d; + mask = (mask << 4) | 0xf; } + + if (bound > max) + return 0; } - if (dot) - *dot++ = 0; - if (mid[0] && strcmp(mid, "*")) + + *outp = out; + if (maskp) + *maskp = mask; + return 1; +} + +/* Slot filter syntax: [[[domain]:][bus]:][slot][.[func]] */ + +char * +pci_filter_parse_slot_v38(struct pci_filter *f, char *str) +{ + char buf[BUF_SIZE]; + char *fields[3]; + char *err; + + if (err = split_to_fields(str, buf, ':', fields, 3)) + return err; + + int i = 0; + if (fields[2]) { - long int x = strtol(mid, &e, 16); - if ((e && *e) || (x < 0 || x > 0x1f)) - return "Invalid slot number"; - f->slot = x; + if (!parse_hex_field(fields[0], &f->domain, NULL, 0x7fffffff)) + return "Invalid domain number"; + i++; } - if (dot && dot[0] && strcmp(dot, "*")) + + if (fields[i+1]) + { + if (!parse_hex_field(fields[i], &f->bus, NULL, 0xff)) + return "Invalid bus number"; + i++; + } + + char *fdev = fields[i]; + if (field_defined(fdev)) { - long int x = strtol(dot, &e, 16); - if ((e && *e) || (x < 0 || x > 7)) + char *sfields[2]; + if (split_to_fields(fdev, NULL, '.', sfields, 2)) + return "Invalid slot/function number"; + + if (!parse_hex_field(sfields[0], &f->slot, NULL, 0x1f)) + return "Invalid slot number"; + + if (!parse_hex_field(sfields[1], &f->func, NULL, 7)) return "Invalid function number"; - f->func = x; } + return NULL; } -/* ID filter syntax: [vendor]:[device][:class] */ +/* ID filter syntax: [vendor]:[device][:class[:progif]] */ char * -pci_filter_parse_id_v33(struct pci_filter *f, char *str) +pci_filter_parse_id_v38(struct pci_filter *f, char *str) { - char *s, *c, *e; + char buf[BUF_SIZE]; + char *fields[4]; + char *err; + + if (err = split_to_fields(str, buf, ':', fields, 4)) + return err; + + if (!fields[1]) + return "At least two fields must be given"; + + if (!parse_hex_field(fields[0], &f->vendor, NULL, 0xffff)) + return "Invalid vendor ID"; + + if (!parse_hex_field(fields[1], &f->device, NULL, 0xffff)) + return "Invalid device ID"; + + if (!parse_hex_field(fields[2], &f->device_class, &f->device_class_mask, 0xffff)) + return "Invalid class code"; + + if (!parse_hex_field(fields[3], &f->prog_if, NULL, 0xff)) + return "Invalid programming interface code"; - if (!*str) - return NULL; - s = strchr(str, ':'); - if (!s) - return "':' expected"; - *s++ = 0; - if (str[0] && strcmp(str, "*")) - { - long int x = strtol(str, &e, 16); - if ((e && *e) || (x < 0 || x > 0xffff)) - return "Invalid vendor ID"; - f->vendor = x; - } - c = strchr(s, ':'); - if (c) - *c++ = 0; - if (s[0] && strcmp(s, "*")) - { - long int x = strtol(s, &e, 16); - if ((e && *e) || (x < 0 || x > 0xffff)) - return "Invalid device ID"; - f->device = x; - } - if (c && c[0] && strcmp(s, "*")) - { - long int x = strtol(c, &e, 16); - if ((e && *e) || (x < 0 || x > 0xffff)) - return "Invalid class code"; - f->device_class = x; - } return NULL; } int -pci_filter_match_v33(struct pci_filter *f, struct pci_dev *d) +pci_filter_match_v38(struct pci_filter *f, struct pci_dev *d) { if ((f->domain >= 0 && f->domain != d->domain) || (f->bus >= 0 && f->bus != d->bus) || @@ -129,7 +197,7 @@ return 0; if (f->device >= 0 || f->vendor >= 0) { - pci_fill_info_v35(d, PCI_FILL_IDENT); + pci_fill_info_v38(d, PCI_FILL_IDENT); if ((f->device >= 0 && f->device != d->device_id) || (f->vendor >= 0 && f->vendor != d->vendor_id)) return 0; @@ -137,7 +205,13 @@ if (f->device_class >= 0) { pci_fill_info(d, PCI_FILL_CLASS); - if (f->device_class != d->device_class) + if ((f->device_class ^ d->device_class) & f->device_class_mask) + return 0; + } + if (f->prog_if >= 0) + { + pci_fill_info(d, PCI_FILL_CLASS_EXT); + if (f->prog_if != d->prog_if) return 0; } return 1; @@ -168,6 +242,8 @@ new->vendor = old->vendor; new->device = old->device; new->device_class = -1; + new->device_class_mask = ~0U; + new->prog_if = -1; } static void @@ -185,7 +261,7 @@ pci_filter_init_v30(struct pci_access *a, struct pci_filter_v30 *f) { struct pci_filter new; - pci_filter_init_v33(a, &new); + pci_filter_init_v38(a, &new); pci_filter_export_v30(&new, f); } @@ -195,7 +271,7 @@ struct pci_filter new; char *err; pci_filter_import_v30(f, &new); - if (err = pci_filter_parse_slot_v33(&new, str)) + if (err = pci_filter_parse_slot_v38(&new, str)) return err; pci_filter_export_v30(&new, f); return NULL; @@ -207,10 +283,10 @@ struct pci_filter new; char *err; pci_filter_import_v30(f, &new); - if (err = pci_filter_parse_id_v33(&new, str)) + if (err = pci_filter_parse_id_v38(&new, str)) return err; - if (new.device_class >= 0) - return "Filtering by class not supported in this program"; + if (new.device_class >= 0 || new.prog_if >= 0) + return "Filtering by class or programming interface not supported in this program"; pci_filter_export_v30(&new, f); return NULL; } @@ -220,21 +296,28 @@ { struct pci_filter new; pci_filter_import_v30(f, &new); - return pci_filter_match_v33(&new, d); + return pci_filter_match_v38(&new, d); } -STATIC_ALIAS(void pci_filter_init(struct pci_access *a, struct pci_filter *f), pci_filter_init_v33(a, f)); +// Version 3.3 is the same as version 3.8, only device_class_mask and prog_if were not implemented +// (their positions in struct pci_filter were declared as RFU). + +STATIC_ALIAS(void pci_filter_init(struct pci_access *a, struct pci_filter *f), pci_filter_init_v38(a, f)); SYMBOL_VERSION(pci_filter_init_v30, pci_filter_init@LIBPCI_3.0); -SYMBOL_VERSION(pci_filter_init_v33, pci_filter_init@@LIBPCI_3.3); +SYMBOL_VERSION(pci_filter_init_v38, pci_filter_init@LIBPCI_3.3); +SYMBOL_VERSION(pci_filter_init_v38, pci_filter_init@@LIBPCI_3.8); -STATIC_ALIAS(char *pci_filter_parse_slot(struct pci_filter *f, char *str), pci_filter_parse_slot_v33(f, str)); +STATIC_ALIAS(char *pci_filter_parse_slot(struct pci_filter *f, char *str), pci_filter_parse_slot_v38(f, str)); SYMBOL_VERSION(pci_filter_parse_slot_v30, pci_filter_parse_slot@LIBPCI_3.0); -SYMBOL_VERSION(pci_filter_parse_slot_v33, pci_filter_parse_slot@@LIBPCI_3.3); +SYMBOL_VERSION(pci_filter_parse_slot_v38, pci_filter_parse_slot@LIBPCI_3.3); +SYMBOL_VERSION(pci_filter_parse_slot_v38, pci_filter_parse_slot@@LIBPCI_3.8); -STATIC_ALIAS(char *pci_filter_parse_id(struct pci_filter *f, char *str), pci_filter_parse_id_v33(f, str)); +STATIC_ALIAS(char *pci_filter_parse_id(struct pci_filter *f, char *str), pci_filter_parse_id_v38(f, str)); SYMBOL_VERSION(pci_filter_parse_id_v30, pci_filter_parse_id@LIBPCI_3.0); -SYMBOL_VERSION(pci_filter_parse_id_v33, pci_filter_parse_id@@LIBPCI_3.3); +SYMBOL_VERSION(pci_filter_parse_id_v38, pci_filter_parse_id@LIBPCI_3.3); +SYMBOL_VERSION(pci_filter_parse_id_v38, pci_filter_parse_id@@LIBPCI_3.8); -STATIC_ALIAS(int pci_filter_match(struct pci_filter *f, struct pci_dev *d), pci_filter_match_v33(f, d)); +STATIC_ALIAS(int pci_filter_match(struct pci_filter *f, struct pci_dev *d), pci_filter_match_v38(f, d)); SYMBOL_VERSION(pci_filter_match_v30, pci_filter_match@LIBPCI_3.0); -SYMBOL_VERSION(pci_filter_match_v33, pci_filter_match@@LIBPCI_3.3); +SYMBOL_VERSION(pci_filter_match_v38, pci_filter_match@LIBPCI_3.3); +SYMBOL_VERSION(pci_filter_match_v38, pci_filter_match@@LIBPCI_3.8); diff -Nru pciutils-3.7.0/lib/generic.c pciutils-3.8.0/lib/generic.c --- pciutils-3.7.0/lib/generic.c 2020-05-26 16:11:35.000000000 +0000 +++ pciutils-3.8.0/lib/generic.c 2022-02-10 12:49:39.000000000 +0000 @@ -1,7 +1,7 @@ /* * The PCI Library -- Generic Direct Access Functions * - * Copyright (c) 1997--2000 Martin Mares + * Copyright (c) 1997--2022 Martin Mares * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -74,39 +74,68 @@ pci_generic_scan_bus(a, busmap, 0); } -unsigned int +static int +get_hdr_type(struct pci_dev *d) +{ + if (d->hdrtype < 0) + d->hdrtype = pci_read_byte(d, PCI_HEADER_TYPE) & 0x7f; + return d->hdrtype; +} + +void pci_generic_fill_info(struct pci_dev *d, unsigned int flags) { struct pci_access *a = d->access; - unsigned int done = 0; + struct pci_cap *cap; - if ((flags & (PCI_FILL_BASES | PCI_FILL_ROM_BASE)) && d->hdrtype < 0) - d->hdrtype = pci_read_byte(d, PCI_HEADER_TYPE) & 0x7f; - - if (flags & PCI_FILL_IDENT) + if (want_fill(d, flags, PCI_FILL_IDENT)) { d->vendor_id = pci_read_word(d, PCI_VENDOR_ID); d->device_id = pci_read_word(d, PCI_DEVICE_ID); - done |= PCI_FILL_IDENT; } - if (flags & PCI_FILL_CLASS) + if (want_fill(d, flags, PCI_FILL_CLASS)) + d->device_class = pci_read_word(d, PCI_CLASS_DEVICE); + + if (want_fill(d, flags, PCI_FILL_CLASS_EXT)) { - d->device_class = pci_read_word(d, PCI_CLASS_DEVICE); - done |= PCI_FILL_CLASS; + d->prog_if = pci_read_byte(d, PCI_CLASS_PROG); + d->rev_id = pci_read_byte(d, PCI_REVISION_ID); } - if (flags & PCI_FILL_IRQ) - { - d->irq = pci_read_byte(d, PCI_INTERRUPT_LINE); - done |= PCI_FILL_IRQ; + if (want_fill(d, flags, PCI_FILL_SUBSYS)) + { + switch (get_hdr_type(d)) + { + case PCI_HEADER_TYPE_NORMAL: + d->subsys_vendor_id = pci_read_word(d, PCI_SUBSYSTEM_VENDOR_ID); + d->subsys_id = pci_read_word(d, PCI_SUBSYSTEM_ID); + break; + case PCI_HEADER_TYPE_BRIDGE: + cap = pci_find_cap(d, PCI_CAP_ID_SSVID, PCI_CAP_NORMAL); + if (cap) + { + d->subsys_vendor_id = pci_read_word(d, cap->addr + PCI_SSVID_VENDOR); + d->subsys_id = pci_read_word(d, cap->addr + PCI_SSVID_DEVICE); + } + break; + case PCI_HEADER_TYPE_CARDBUS: + d->subsys_vendor_id = pci_read_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID); + d->subsys_id = pci_read_word(d, PCI_CB_SUBSYSTEM_ID); + break; + default: + clear_fill(d, PCI_FILL_SUBSYS); + } } - if (flags & PCI_FILL_BASES) + if (want_fill(d, flags, PCI_FILL_IRQ)) + d->irq = pci_read_byte(d, PCI_INTERRUPT_LINE); + + if (want_fill(d, flags, PCI_FILL_BASES)) { int cnt = 0, i; memset(d->base_addr, 0, sizeof(d->base_addr)); - switch (d->hdrtype) + switch (get_hdr_type(d)) { case PCI_HEADER_TYPE_NORMAL: cnt = 6; @@ -148,14 +177,13 @@ } } } - done |= PCI_FILL_BASES; } - if (flags & PCI_FILL_ROM_BASE) + if (want_fill(d, flags, PCI_FILL_ROM_BASE)) { int reg = 0; d->rom_base_addr = 0; - switch (d->hdrtype) + switch (get_hdr_type(d)) { case PCI_HEADER_TYPE_NORMAL: reg = PCI_ROM_ADDRESS; @@ -170,13 +198,9 @@ if (u != 0xffffffff) d->rom_base_addr = u; } - done |= PCI_FILL_ROM_BASE; } - if (flags & (PCI_FILL_CAPS | PCI_FILL_EXT_CAPS)) - done |= pci_scan_caps(d, flags); - - return done; + pci_scan_caps(d, flags); } static int diff -Nru pciutils-3.7.0/lib/header.h pciutils-3.8.0/lib/header.h --- pciutils-3.7.0/lib/header.h 2020-05-26 16:11:35.000000000 +0000 +++ pciutils-3.8.0/lib/header.h 2022-04-15 21:37:00.000000000 +0000 @@ -219,7 +219,7 @@ #define PCI_EXT_CAP_ID_PB 0x04 /* Power Budgeting */ #define PCI_EXT_CAP_ID_RCLINK 0x05 /* Root Complex Link Declaration */ #define PCI_EXT_CAP_ID_RCILINK 0x06 /* Root Complex Internal Link Declaration */ -#define PCI_EXT_CAP_ID_RCECOLL 0x07 /* Root Complex Event Collector */ +#define PCI_EXT_CAP_ID_RCEC 0x07 /* Root Complex Event Collector */ #define PCI_EXT_CAP_ID_MFVC 0x08 /* Multi-Function Virtual Channel */ #define PCI_EXT_CAP_ID_VC2 0x09 /* Virtual Channel (2nd ID) */ #define PCI_EXT_CAP_ID_RCRB 0x0a /* Root Complex Register Block */ @@ -252,6 +252,7 @@ #define PCI_EXT_CAP_ID_LMR 0x27 /* Lane Margining at Receiver */ #define PCI_EXT_CAP_ID_HIER_ID 0x28 /* Hierarchy ID */ #define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */ +#define PCI_EXT_CAP_ID_DOE 0x2e /* Data Object Exchange */ /*** Definitions of capabilities ***/ @@ -873,6 +874,13 @@ #define PCI_EXP_RTSTA_PME_STATUS 0x00010000 /* PME Status */ #define PCI_EXP_RTSTA_PME_PENDING 0x00020000 /* PME is Pending */ #define PCI_EXP_DEVCAP2 0x24 /* Device capabilities 2 */ +#define PCI_EXP_DEVCAP2_TIMEOUT_RANGE(x) ((x) & 0xf) /* Completion Timeout Ranges Supported */ +#define PCI_EXP_DEVCAP2_TIMEOUT_DIS 0x0010 /* Completion Timeout Disable Supported */ +#define PCI_EXP_DEVCAP2_ARI 0x0020 /* ARI Forwarding Supported */ +#define PCI_EXP_DEVCAP2_ATOMICOP_ROUTING 0x0040 /* AtomicOp Routing Supported */ +#define PCI_EXP_DEVCAP2_32BIT_ATOMICOP_COMP 0x0080 /* 32bit AtomicOp Completer Supported */ +#define PCI_EXP_DEVCAP2_64BIT_ATOMICOP_COMP 0x0100 /* 64bit AtomicOp Completer Supported */ +#define PCI_EXP_DEVCAP2_128BIT_CAS_COMP 0x0200 /* 128bit CAS Completer Supported */ #define PCI_EXP_DEVCAP2_NROPRPRP 0x0400 /* No RO-enabled PR-PR Passing */ #define PCI_EXP_DEVCAP2_LTR 0x0800 /* LTR supported */ #define PCI_EXP_DEVCAP2_TPH_COMP(x) (((x) >> 12) & 3) /* TPH Completer Supported */ @@ -887,18 +895,14 @@ #define PCI_EXP_DEVCAP2_EPR_INIT 0x04000000 /* Emergency Power Reduction Initialization Required */ #define PCI_EXP_DEVCAP2_FRS 0x80000000 /* FRS supported */ #define PCI_EXP_DEVCTL2 0x28 /* Device Control */ -#define PCI_EXP_DEV2_TIMEOUT_RANGE(x) ((x) & 0xf) /* Completion Timeout Ranges Supported */ -#define PCI_EXP_DEV2_TIMEOUT_VALUE(x) ((x) & 0xf) /* Completion Timeout Value */ -#define PCI_EXP_DEV2_TIMEOUT_DIS 0x0010 /* Completion Timeout Disable Supported */ -#define PCI_EXP_DEV2_ATOMICOP_REQUESTER_EN 0x0040 /* AtomicOp RequesterEnable */ -#define PCI_EXP_DEV2_ATOMICOP_EGRESS_BLOCK 0x0080 /* AtomicOp Egress Blocking */ -#define PCI_EXP_DEV2_ARI 0x0020 /* ARI Forwarding */ -#define PCI_EXP_DEVCAP2_ATOMICOP_ROUTING 0x0040 /* AtomicOp Routing Supported */ -#define PCI_EXP_DEVCAP2_32BIT_ATOMICOP_COMP 0x0080 /* 32bit AtomicOp Completer Supported */ -#define PCI_EXP_DEVCAP2_64BIT_ATOMICOP_COMP 0x0100 /* 64bit AtomicOp Completer Supported */ -#define PCI_EXP_DEVCAP2_128BIT_CAS_COMP 0x0200 /* 128bit CAS Completer Supported */ -#define PCI_EXP_DEV2_LTR 0x0400 /* LTR enabled */ -#define PCI_EXP_DEV2_OBFF(x) (((x) >> 13) & 3) /* OBFF enabled */ +#define PCI_EXP_DEVCTL2_TIMEOUT_VALUE(x) ((x) & 0xf) /* Completion Timeout Value */ +#define PCI_EXP_DEVCTL2_TIMEOUT_DIS 0x0010 /* Completion Timeout Disable */ +#define PCI_EXP_DEVCTL2_ARI 0x0020 /* ARI Forwarding */ +#define PCI_EXP_DEVCTL2_ATOMICOP_REQUESTER_EN 0x0040 /* AtomicOp RequesterEnable */ +#define PCI_EXP_DEVCTL2_ATOMICOP_EGRESS_BLOCK 0x0080 /* AtomicOp Egress Blocking */ +#define PCI_EXP_DEVCTL2_LTR 0x0400 /* LTR enabled */ +#define PCI_EXP_DEVCTL2_10BIT_TAG_REQ 0x1000 /* 10 Bit Tag Requester enabled */ +#define PCI_EXP_DEVCTL2_OBFF(x) (((x) >> 13) & 3) /* OBFF enabled */ #define PCI_EXP_DEVSTA2 0x2a /* Device Status */ #define PCI_EXP_LNKCAP2 0x2c /* Link Capabilities */ #define PCI_EXP_LNKCAP2_SPEED(x) (((x) >> 1) & 0x7f) @@ -914,7 +918,7 @@ #define PCI_EXP_LNKCTL2_MARGIN(x) (((x) >> 7) & 7) /* Transmit Margin */ #define PCI_EXP_LNKCTL2_MOD_CMPLNC 0x0400 /* Enter Modified Compliance */ #define PCI_EXP_LNKCTL2_CMPLNC_SOS 0x0800 /* Compliance SOS */ -#define PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x) (((x) >> 12) & 0xf) /* Compliance De-emphasis */ +#define PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x) (((x) >> 12) & 0xf) /* Compliance Preset/De-emphasis */ #define PCI_EXP_LNKSTA2 0x32 /* Link Status */ #define PCI_EXP_LINKSTA2_DEEMPHASIS(x) ((x) & 1) /* Current De-emphasis Level */ #define PCI_EXP_LINKSTA2_EQU_COMP 0x02 /* Equalization Complete */ @@ -1048,6 +1052,12 @@ #define PCI_RCLINK_LINK_ADDR 8 /* Link Entry: Address (64-bit) */ #define PCI_RCLINK_LINK_SIZE 16 /* Link Entry: sizeof */ +/* Root Complex Event Collector Endpoint Association */ +#define PCI_RCEC_EP_CAP_VER(reg) (((reg) >> 16) & 0xf) +#define PCI_RCEC_BUSN_REG_VER 0x02 /* as per PCIe sec 7.9.10.1 */ +#define PCI_RCEC_RCIEP_BMAP 0x0004 /* as per PCIe sec 7.9.10.2 */ +#define PCI_RCEC_BUSN_REG 0x0008 /* as per PCIe sec 7.9.10.3 */ + /* PCIe Vendor-Specific Capability */ #define PCI_EVNDR_HEADER 4 /* Vendor-Specific Header */ #define PCI_EVNDR_REGISTERS 8 /* Vendor-Specific Registers */ @@ -1063,7 +1073,7 @@ #define PCI_CXL_CAP_CACHE 0x0001 /* CXL.cache Protocol Support */ #define PCI_CXL_CAP_IO 0x0002 /* CXL.io Protocol Support */ #define PCI_CXL_CAP_MEM 0x0004 /* CXL.mem Protocol Support */ -#define PCI_CXL_CAP_MEM_HWINIT 0x0008 /* CXL.mem Initalizes with HW/FW Support */ +#define PCI_CXL_CAP_MEM_HWINIT 0x0008 /* CXL.mem Initializes with HW/FW Support */ #define PCI_CXL_CAP_HDM_CNT(x) (((x) & (3 << 4)) >> 4) /* CXL Number of HDM ranges */ #define PCI_CXL_CAP_VIRAL 0x4000 /* CXL Viral Handling Support */ #define PCI_CXL_CTRL 0x0c /* CXL Control Register */ @@ -1117,6 +1127,7 @@ /* Single Root I/O Virtualization */ #define PCI_IOV_CAP 0x04 /* SR-IOV Capability Register */ #define PCI_IOV_CAP_VFM 0x00000001 /* VF Migration Capable */ +#define PCI_IOV_CAP_VF_10BIT_TAG_REQ 0x00000004 /* VF 10-Bit Tag Requester Supported */ #define PCI_IOV_CAP_IMN(x) ((x) >> 21) /* VF Migration Interrupt Message Number */ #define PCI_IOV_CTRL 0x08 /* SR-IOV Control Register */ #define PCI_IOV_CTRL_VFE 0x0001 /* VF Enable */ @@ -1124,6 +1135,7 @@ #define PCI_IOV_CTRL_VFMIE 0x0004 /* VF Migration Interrupt Enable */ #define PCI_IOV_CTRL_MSE 0x0008 /* VF MSE */ #define PCI_IOV_CTRL_ARI 0x0010 /* ARI Capable Hierarchy */ +#define PCI_IOV_CTRL_VF_10BIT_TAG_REQ_EN 0x0020 /* VF 10-Bit Tag Requester Enable */ #define PCI_IOV_STATUS 0x0a /* SR-IOV Status Register */ #define PCI_IOV_STATUS_MS 0x0001 /* VF Migration Status */ #define PCI_IOV_INITIALVF 0x0c /* Number of VFs that are initially associated */ @@ -1208,7 +1220,7 @@ #define PCI_DPC_CAP 4 /* DPC Capability */ #define PCI_DPC_CAP_INT_MSG(x) ((x) & 0x1f) /* DPC Interrupt Message Number */ -#define PCI_DPC_CAP_RP_EXT 0x20 /* DPC Root Port Extentions */ +#define PCI_DPC_CAP_RP_EXT 0x20 /* DPC Root Port Extensions */ #define PCI_DPC_CAP_TLP_BLOCK 0x40 /* DPC Poisoned TLP Egress Blocking */ #define PCI_DPC_CAP_SW_TRIGGER 0x80 /* DPC Software Trigger */ #define PCI_DPC_CAP_RP_LOG(x) (((x) >> 8) & 0xf) /* DPC RP PIO Log Size */ @@ -1226,7 +1238,7 @@ #define PCI_DPC_STS_REASON(x) (((x) >> 1) & 0x3) /* DPC Trigger Reason */ #define PCI_DPC_STS_INT 0x08 /* DPC Interrupt Status */ #define PCI_DPC_STS_RP_BUSY 0x10 /* DPC Root Port Busy */ -#define PCI_DPC_STS_TRIGGER_EXT(x) (((x) >> 5) & 0x3) /* Trigger Reason Extention */ +#define PCI_DPC_STS_TRIGGER_EXT(x) (((x) >> 5) & 0x3) /* Trigger Reason Extension */ #define PCI_DPC_STS_PIO_FEP(x) (((x) >> 8) & 0x1f) /* DPC PIO First Error Pointer */ #define PCI_DPC_SOURCE 10 /* DPC Source ID */ @@ -1244,6 +1256,20 @@ #define PCI_L1PM_SUBSTAT_CTL1_ASPM_L11 0x8 /* ASPM L1.1 Enable */ #define PCI_L1PM_SUBSTAT_CTL2 0xC /* L1 PM Substate Control 2 */ +/* Data Object Exchange Extended Capability */ +#define PCI_DOE_CAP 0x4 /* DOE Capabilities Register */ +#define PCI_DOE_CAP_INT_SUPP 0x1 /* Interrupt Support */ +#define PCI_DOE_CAP_INT_MSG(x) (((x) >> 1) & 0x7ff) /* DOE Interrupt Message Number */ +#define PCI_DOE_CTL 0x8 /* DOE Control Register */ +#define PCI_DOE_CTL_ABORT 0x1 /* DOE Abort */ +#define PCI_DOE_CTL_INT 0x2 /* DOE Interrupt Enable */ +#define PCI_DOE_CTL_GO 0x80000000 /* DOE Go */ +#define PCI_DOE_STS 0xC /* DOE Status Register */ +#define PCI_DOE_STS_BUSY 0x1 /* DOE Busy */ +#define PCI_DOE_STS_INT 0x2 /* DOE Interrupt Status */ +#define PCI_DOE_STS_ERROR 0x3 /* DOE Error */ +#define PCI_DOE_STS_OBJECT_READY 0x80000000 /* Data Object Ready */ + /* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded @@ -1392,4 +1418,10 @@ /* I/O resource flags, compatible with */ +#define PCI_IORESOURCE_TYPE_BITS 0x00001f00 +#define PCI_IORESOURCE_IO 0x00000100 +#define PCI_IORESOURCE_MEM 0x00000200 +#define PCI_IORESOURCE_PREFETCH 0x00002000 +#define PCI_IORESOURCE_MEM_64 0x00100000 +#define PCI_IORESOURCE_IO_16BIT_ADDR (1<<0) #define PCI_IORESOURCE_PCI_EA_BEI (1<<5) diff -Nru pciutils-3.7.0/lib/hurd.c pciutils-3.8.0/lib/hurd.c --- pciutils-3.7.0/lib/hurd.c 2020-05-26 16:11:35.000000000 +0000 +++ pciutils-3.8.0/lib/hurd.c 2022-02-10 12:49:06.000000000 +0000 @@ -73,6 +73,7 @@ hurd_init_dev(struct pci_dev *d) { d->aux = pci_malloc(d->access, sizeof(mach_port_t)); + *((mach_port_t *) d->aux) = MACH_PORT_NULL; } /* Deallocate the port and free its space */ @@ -87,6 +88,27 @@ pci_mfree(d->aux); } +static mach_port_t +device_port_lookup(struct pci_dev *d) +{ + char server[NAME_MAX]; + mach_port_t device_port = *((mach_port_t *) d->aux); + + if (device_port != MACH_PORT_NULL) + return device_port; + + snprintf(server, NAME_MAX, "%s/%04x/%02x/%02x/%01u/%s", + _SERVERS_BUS_PCI, d->domain, d->bus, d->dev, d->func, + FILE_CONFIG_NAME); + device_port = file_name_lookup(server, 0, 0); + + if (device_port == MACH_PORT_NULL) + d->access->error("Cannot find the PCI arbiter"); + + *((mach_port_t *) d->aux) = device_port; + return device_port; +} + /* Walk through the FS tree to see what is allowed for us */ static void enum_devices(const char *parent, struct pci_access *a, int domain, int bus, @@ -96,10 +118,6 @@ DIR *dir; struct dirent *entry; char path[NAME_MAX]; - char server[NAME_MAX]; - uint32_t vd; - uint8_t ht; - mach_port_t device_port; struct pci_dev *d; dir = opendir(parent); @@ -128,8 +146,8 @@ if (closedir(dir) < 0) a->warning("Cannot close directory: %s (%s)", parent, strerror(errno)); - a->error("Wrong directory name: %s (number expected) probably \ - not connected to an arbiter", entry->d_name); + a->error("Wrong directory name: %s (number expected) probably " + "not connected to an arbiter", entry->d_name); } /* @@ -154,8 +172,7 @@ if (closedir(dir) < 0) a->warning("Cannot close directory: %s (%s)", parent, strerror(errno)); - a->error("Wrong directory tree, probably not connected \ - to an arbiter"); + a->error("Wrong directory tree, probably not connected to an arbiter"); } enum_devices(path, a, domain, bus, dev, func, lev + 1); @@ -167,31 +184,12 @@ continue; /* We found an available virtual device, add it to our list */ - snprintf(server, NAME_MAX, "%s/%04x/%02x/%02x/%01u/%s", - _SERVERS_BUS_PCI, domain, bus, dev, func, entry->d_name); - device_port = file_name_lookup(server, 0, 0); - if (device_port == MACH_PORT_NULL) - { - if (closedir(dir) < 0) - a->warning("Cannot close directory: %s (%s)", parent, - strerror(errno)); - a->error("Cannot open %s", server); - } - d = pci_alloc_dev(a); - *((mach_port_t *) d->aux) = device_port; + d->domain = domain; d->bus = bus; d->dev = dev; d->func = func; pci_link_dev(a, d); - - vd = pci_read_long(d, PCI_VENDOR_ID); - ht = pci_read_byte(d, PCI_HEADER_TYPE); - - d->vendor_id = vd & 0xffff; - d->device_id = vd >> 16U; - d->known_fields = PCI_FILL_IDENT; - d->hdrtype = ht; } } @@ -217,33 +215,27 @@ int err; size_t nread; char *data; - mach_port_t device_port; + mach_port_t device_port = device_port_lookup(d); - nread = len; - device_port = *((mach_port_t *) d->aux); if (len > 4) - err = !pci_generic_block_read(d, pos, buf, nread); - else - { - data = (char *) buf; - err = pci_conf_read(device_port, pos, &data, &nread, len); + return pci_generic_block_read(d, pos, buf, len); - if (data != (char *) buf) - { - if (nread > (size_t) len) /* Sanity check for bogus server. */ - { - vm_deallocate(mach_task_self(), (vm_address_t) data, nread); - return 0; - } + data = (char *) buf; + err = pci_conf_read(device_port, pos, &data, &nread, len); - memcpy(buf, data, nread); + if (data != (char *) buf) + { + if (nread > (size_t) len) /* Sanity check for bogus server. */ + { vm_deallocate(mach_task_self(), (vm_address_t) data, nread); + return 0; } + + memcpy(buf, data, nread); + vm_deallocate(mach_task_self(), (vm_address_t) data, nread); } - if (err) - return 0; - return nread == (size_t) len; + return !err && nread == (size_t) len; } /* @@ -256,18 +248,14 @@ { int err; size_t nwrote; - mach_port_t device_port; + mach_port_t device_port = device_port_lookup(d); - nwrote = len; - device_port = *((mach_port_t *) d->aux); if (len > 4) - err = !pci_generic_block_write(d, pos, buf, len); - else - err = pci_conf_write(device_port, pos, (char *) buf, len, &nwrote); - if (err) - return 0; + return pci_generic_block_write(d, pos, buf, len); - return nwrote == (size_t) len; + err = pci_conf_write(device_port, pos, (char *) buf, len, &nwrote); + + return !err && nwrote == (size_t) len; } /* Get requested info from the server */ @@ -275,7 +263,7 @@ static void hurd_fill_regions(struct pci_dev *d) { - mach_port_t device_port = *((mach_port_t *) d->aux); + mach_port_t device_port = device_port_lookup(d); struct pci_bar regions[6]; char *buf = (char *) ®ions; size_t size = sizeof(regions); @@ -307,8 +295,7 @@ d->base_addr[i] |= regions[i].is_64 << 2; d->base_addr[i] |= regions[i].is_prefetchable << 3; - if (flags & PCI_FILL_SIZES) - d->size[i] = regions[i].size; + d->size[i] = regions[i].size; } } @@ -316,7 +303,7 @@ hurd_fill_rom(struct pci_dev *d) { struct pci_xrom_bar rom; - mach_port_t device_port = *((mach_port_t *) d->aux); + mach_port_t device_port = device_port_lookup(d); char *buf = (char *) &rom; size_t size = sizeof(rom); @@ -341,26 +328,16 @@ d->rom_size = rom.size; } -static unsigned int +static void hurd_fill_info(struct pci_dev *d, unsigned int flags) { - unsigned int done = 0; - if (!d->access->buscentric) { - if (flags & (PCI_FILL_BASES | PCI_FILL_SIZES)) - { - hurd_fill_regions(d); - done |= PCI_FILL_BASES | PCI_FILL_SIZES; - } - if (flags & PCI_FILL_ROM_BASE) - { - hurd_fill_rom(d); - done |= PCI_FILL_ROM_BASE; - } + if (want_fill(d, flags, PCI_FILL_BASES | PCI_FILL_SIZES)) + hurd_fill_regions(d); + if (want_fill(d, flags, PCI_FILL_ROM_BASE)) + hurd_fill_rom(d); } - - return done | pci_generic_fill_info(d, flags & ~done); } struct pci_methods pm_hurd = { diff -Nru pciutils-3.7.0/lib/i386-io-beos.h pciutils-3.8.0/lib/i386-io-beos.h --- pciutils-3.7.0/lib/i386-io-beos.h 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/i386-io-beos.h 2021-12-26 22:01:29.000000000 +0000 @@ -16,10 +16,9 @@ return 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { - return 1; } static inline u8 diff -Nru pciutils-3.7.0/lib/i386-io-cygwin.h pciutils-3.8.0/lib/i386-io-cygwin.h --- pciutils-3.7.0/lib/i386-io-cygwin.h 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/i386-io-cygwin.h 2021-12-26 22:01:34.000000000 +0000 @@ -14,11 +14,10 @@ return (iopl(3) < 0) ? 0 : 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { - iopl(3); - return -1; + iopl(0); } static inline void intel_io_lock(void) diff -Nru pciutils-3.7.0/lib/i386-io-djgpp.h pciutils-3.8.0/lib/i386-io-djgpp.h --- pciutils-3.7.0/lib/i386-io-djgpp.h 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/i386-io-djgpp.h 2021-12-26 22:01:54.000000000 +0000 @@ -24,10 +24,9 @@ return 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { - return 1; } static inline void intel_io_lock(void) diff -Nru pciutils-3.7.0/lib/i386-io-haiku.h pciutils-3.8.0/lib/i386-io-haiku.h --- pciutils-3.7.0/lib/i386-io-haiku.h 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/i386-io-haiku.h 2021-12-26 22:02:00.000000000 +0000 @@ -68,11 +68,10 @@ return (poke_driver_fd < 0) ? 0 : 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { close(poke_driver_fd); - return 1; } static inline u8 diff -Nru pciutils-3.7.0/lib/i386-io-hurd.h pciutils-3.8.0/lib/i386-io-hurd.h --- pciutils-3.7.0/lib/i386-io-hurd.h 2020-01-25 19:21:37.000000000 +0000 +++ pciutils-3.8.0/lib/i386-io-hurd.h 2021-12-26 22:02:04.000000000 +0000 @@ -18,12 +18,10 @@ return (ioperm (0, 65535, 1) == -1) ? 0 : 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { ioperm (0, 65535, 0); - - return -1; } static inline void intel_io_lock(void) diff -Nru pciutils-3.7.0/lib/i386-io-linux.h pciutils-3.8.0/lib/i386-io-linux.h --- pciutils-3.7.0/lib/i386-io-linux.h 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/i386-io-linux.h 2021-12-26 22:02:07.000000000 +0000 @@ -14,11 +14,10 @@ return (iopl(3) < 0) ? 0 : 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { - iopl(3); - return -1; + iopl(0); } static inline void intel_io_lock(void) diff -Nru pciutils-3.7.0/lib/i386-io-sunos.h pciutils-3.8.0/lib/i386-io-sunos.h --- pciutils-3.7.0/lib/i386-io-sunos.h 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/i386-io-sunos.h 2021-12-26 22:02:12.000000000 +0000 @@ -16,11 +16,10 @@ return (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) < 0) ? 0 : 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { /* FIXME: How to switch off I/O port access? */ - return 1; } static inline u8 diff -Nru pciutils-3.7.0/lib/i386-io-windows.h pciutils-3.8.0/lib/i386-io-windows.h --- pciutils-3.7.0/lib/i386-io-windows.h 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/i386-io-windows.h 2022-04-15 21:57:59.000000000 +0000 @@ -3,14 +3,83 @@ * * Copyright (c) 2004 Alexander Stock * Copyright (c) 2006 Martin Mares + * Copyright (c) 2021 Pali Rohár * * Can be freely distributed and used under the terms of the GNU GPL. */ #include #include +#include -#ifndef __GNUC__ +#ifdef _MSC_VER +/* MSVC compiler provides I/O port intrinsics for both 32 and 64-bit modes. */ +#pragma intrinsic(_outp) +#pragma intrinsic(_outpw) +#pragma intrinsic(_outpd) +#pragma intrinsic(_inp) +#pragma intrinsic(_inpw) +#pragma intrinsic(_inpd) +#elif defined(_WIN64) || defined(_UCRT) +/* + * For other compilers I/O port intrinsics are available in header + * file either as inline/external functions or macros. Beware that + * names are different than MSVC intrinsics names and glibc function names. + * Usage of is also the prefered way for 64-bit mode or when using + * new UCRT library. + */ +#include +#define _outp(x,y) __outbyte(x,y) +#define _outpw(x,y) __outword(x,y) +#define _outpd(x,y) __outdword(x,y) +#define _inp(x) __inbyte(x) +#define _inpw(x) __inword(x) +#define _inpd(x) __indword(x) +#elif defined(__CRTDLL__) || (defined(__MSVCRT_VERSION__) && __MSVCRT_VERSION__ < 0x400) +/* + * Old 32-bit CRTDLL library and pre-4.00 MSVCRT library do not provide I/O + * port functions. As these libraries exist only in 32-bit mode variant, + * implement I/O port functions via 32-bit inline assembly. + */ +static inline int _outp(unsigned short port, int databyte) +{ + asm volatile ("outb %b0, %w1" : : "a" (databyte), "Nd" (port)); + return databyte; +} +static inline unsigned short _outpw(unsigned short port, unsigned short dataword) +{ + asm volatile ("outw %w0, %w1" : : "a" (dataword), "Nd" (port)); + return dataword; +} +static inline unsigned long _outpd(unsigned short port, unsigned long dataword) +{ + asm volatile ("outl %0, %w1" : : "a" (dataword), "Nd" (port)); + return dataword; +} +static inline int _inp(unsigned short port) +{ + unsigned char ret; + asm volatile ("inb %w1, %0" : "=a" (ret) : "Nd" (port)); + return ret; +} +static inline unsigned short _inpw(unsigned short port) +{ + unsigned short ret; + asm volatile ("inw %w1, %0" : "=a" (ret) : "Nd" (port)); + return ret; +} +static inline unsigned long _inpd(unsigned short port) +{ + unsigned long ret; + asm volatile ("inl %w1, %0" : "=a" (ret) : "Nd" (port)); + return ret; +} +#elif !defined(__GNUC__) +/* + * Old 32-bit MSVCRT (non-UCRT) library provides I/O port functions. Function + * prototypes are defined in header file but they are missing in + * some MinGW toolchains. So for GCC compiler define them manually. + */ #include #else int _outp(unsigned short port, int databyte); @@ -29,43 +98,1270 @@ #define inw(x) _inpw(x) #define inl(x) _inpd(x) -static int -intel_setup_io(struct pci_access *a) +/* + * Define __readeflags() for MSVC and GCC compilers. + * MSVC since version 14.00 included in WDK 6001 and since version 15.00 + * included in VS 2008 provides __readeflags() intrinsic for both 32 and 64-bit + * modes. WDK 6001 defines macro __BUILDMACHINE__ to value WinDDK. VS 2008 does + * not define this macro at all. MSVC throws error if name of user defined + * function conflicts with some MSVC intrinsic. + * MSVC supports inline assembly via __asm keyword in 32-bit mode only. + * GCC version 4.9.0 and higher provides __builtin_ia32_readeflags_uXX() + * builtin for XX-mode. + */ +#if defined(_MSC_VER) && (_MSC_VER >= 1500 || (_MSC_VER >= 1400 && defined(__BUILDMACHINE__))) +#pragma intrinsic(__readeflags) +#elif defined(__GNUC__) && ((__GNUC__ == 4 && __GNUC_MINOR__ >= 9) || (__GNUC__ > 4)) +#ifdef __x86_64__ +#define __readeflags() __builtin_ia32_readeflags_u64() +#else +#define __readeflags() __builtin_ia32_readeflags_u32() +#endif +#elif defined(_MSC_VER) && defined(_M_IX86) +static inline unsigned int +__readeflags(void) +{ + __asm pushfd; + __asm pop eax; +} +#elif defined(__GNUC__) +static inline unsigned +#ifdef __x86_64__ +long long +#endif +int +__readeflags(void) +{ + unsigned +#ifdef __x86_64__ + long long +#endif + int eflags; + asm volatile ("pushf\n\tpop %0\n" : "=r" (eflags)); + return eflags; +} +#else +#error "Unsupported compiler" +#endif + +/* Read IOPL of the current process, IOPL is stored in eflag bits [13:12]. */ +#define read_iopl() ((__readeflags() >> 12) & 0x3) + +/* Unfortunately i586-mingw32msvc toolchain does not provide this constant. */ +#ifndef PROCESS_QUERY_LIMITED_INFORMATION +#define PROCESS_QUERY_LIMITED_INFORMATION 0x1000 +#endif + +/* Unfortunately some toolchains do not provide this constant. */ +#ifndef SE_IMPERSONATE_NAME +#define SE_IMPERSONATE_NAME TEXT("SeImpersonatePrivilege") +#endif + +/* + * These psapi functions are available in kernel32.dll library with K32 prefix + * on Windows 7 and higher systems. On older Windows systems these functions are + * available in psapi.dll libary without K32 prefix. So resolve pointers to + * these functions dynamically at runtime from the available system library. + * Function GetProcessImageFileNameW() is not available on Windows 2000 and + * older systems. + */ +typedef BOOL (WINAPI *EnumProcessesProt)(DWORD *lpidProcess, DWORD cb, DWORD *cbNeeded); +typedef DWORD (WINAPI *GetProcessImageFileNameWProt)(HANDLE hProcess, LPWSTR lpImageFileName, DWORD nSize); +typedef DWORD (WINAPI *GetModuleFileNameExWProt)(HANDLE hProcess, HMODULE hModule, LPWSTR lpImageFileName, DWORD nSize); + +/* + * These aclapi functions are available in advapi.dll library on Windows NT 4.0 + * and higher systems. + */ +typedef DWORD (WINAPI *GetSecurityInfoProt)(HANDLE handle, SE_OBJECT_TYPE ObjectType, SECURITY_INFORMATION SecurityInfo, PSID *ppsidOwner, PSID *ppsidGroup, PACL *ppDacl, PACL *ppSacl, PSECURITY_DESCRIPTOR *ppSecurityDescriptor); +typedef DWORD (WINAPI *SetSecurityInfoProt)(HANDLE handle, SE_OBJECT_TYPE ObjectType, SECURITY_INFORMATION SecurityInfo, PSID psidOwner, PSID psidGroup, PACL pDacl, PACL pSacl); +typedef DWORD (WINAPI *SetEntriesInAclProt)(ULONG cCountOfExplicitEntries, PEXPLICIT_ACCESS pListOfExplicitEntries, PACL OldAcl, PACL *NewAcl); + +/* + * This errhandlingapi function is available in kernel32.dll library on + * Windows 7 and higher systems. + */ +typedef BOOL (WINAPI *SetThreadErrorModeProt)(DWORD dwNewMode, LPDWORD lpOldMode); + +/* + * Unfortunately NtSetInformationProcess() function, ProcessUserModeIOPL + * constant and all other helpers for its usage are not specified in any + * standard WinAPI header file. So define all of required constants and types. + * Function NtSetInformationProcess() is available in ntdll.dll library on all + * Windows systems but marked as it can be removed in some future version. + */ +#ifndef NTSTATUS +#define NTSTATUS LONG +#endif +#ifndef STATUS_NOT_IMPLEMENTED +#define STATUS_NOT_IMPLEMENTED (NTSTATUS)0xC0000002 +#endif +#ifndef STATUS_PRIVILEGE_NOT_HELD +#define STATUS_PRIVILEGE_NOT_HELD (NTSTATUS)0xC0000061 +#endif +#ifndef PROCESSINFOCLASS +#define PROCESSINFOCLASS DWORD +#endif +#ifndef ProcessUserModeIOPL +#define ProcessUserModeIOPL 16 +#endif +typedef NTSTATUS (NTAPI *NtSetInformationProcessProt)(HANDLE ProcessHandle, PROCESSINFOCLASS ProcessInformationClass, PVOID ProcessInformation, ULONG ProcessInformationLength); + +/* + * Check if the current thread has particular privilege in current active access + * token. Case when it not possible to determinate it (e.g. current thread does + * not have permission to open its own current active access token) is evaluated + * as thread does not have that privilege. + */ +static BOOL +have_privilege(LUID luid_privilege) { - typedef int (*MYPROC)(void); - MYPROC InitializeWinIo; - HMODULE lib; + PRIVILEGE_SET priv; + HANDLE token; + BOOL ret; + + /* + * If the current thread does not have active access token then thread + * uses primary process access token for all permission checks. + */ + if (!OpenThreadToken(GetCurrentThread(), TOKEN_QUERY, TRUE, &token) && + (GetLastError() != ERROR_NO_TOKEN || + !OpenProcessToken(GetCurrentProcess(), TOKEN_QUERY, &token))) + return FALSE; + + priv.PrivilegeCount = 1; + priv.Control = PRIVILEGE_SET_ALL_NECESSARY; + priv.Privilege[0].Luid = luid_privilege; + priv.Privilege[0].Attributes = SE_PRIVILEGE_ENABLED; - lib = LoadLibrary("WinIo.dll"); - if (!lib) + if (!PrivilegeCheck(token, &priv, &ret)) + return FALSE; + + return ret; +} + +/* + * Enable or disable particular privilege in specified access token. + * + * Note that it is not possible to disable privilege in access token with + * SE_PRIVILEGE_ENABLED_BY_DEFAULT attribute. This function does not check + * this case and incorrectly returns no error even when disabling failed. + * Rationale for this decision: Simplification of this function as WinAPI + * call AdjustTokenPrivileges() does not signal error in this case too. + */ +static BOOL +set_privilege(HANDLE token, LUID luid_privilege, BOOL enable) +{ + TOKEN_PRIVILEGES token_privileges; + + token_privileges.PrivilegeCount = 1; + token_privileges.Privileges[0].Luid = luid_privilege; + token_privileges.Privileges[0].Attributes = enable ? SE_PRIVILEGE_ENABLED : 0; + + /* + * WinAPI function AdjustTokenPrivileges() success also when not all + * privileges were enabled. It is always required to check for failure + * via GetLastError() call. AdjustTokenPrivileges() always sets error + * also when it success, as opposite to other WinAPI functions. + */ + if (!AdjustTokenPrivileges(token, FALSE, &token_privileges, sizeof(token_privileges), NULL, NULL) || + GetLastError() != ERROR_SUCCESS) + return FALSE; + + return TRUE; +} + +/* + * Change access token for the current thread to new specified access token. + * Previously active access token is stored in old_token variable and can be + * used for reverting to this access token. It is set to NULL if the current + * thread previously used primary process access token. + */ +static BOOL +change_token(HANDLE new_token, HANDLE *old_token) +{ + HANDLE token; + + if (!OpenThreadToken(GetCurrentThread(), TOKEN_IMPERSONATE, TRUE, &token)) { - a->warning("i386-io-windows: Couldn't load WinIo.dll."); - return 0; + if (GetLastError() != ERROR_NO_TOKEN) + return FALSE; + token = NULL; } - /* XXX: Is this really needed? --mj */ - GetProcAddress(lib, "InitializeWinIo"); - InitializeWinIo = (MYPROC) GetProcAddress(lib, "InitializeWinIo"); - if (!InitializeWinIo) + if (!ImpersonateLoggedOnUser(new_token)) { - a->warning("i386-io-windows: Couldn't find InitializeWinIo function."); - return 0; + if (token) + CloseHandle(token); + return FALSE; + } + + *old_token = token; + return TRUE; +} + +/* + * Change access token for the current thread to the primary process access + * token. This function fails also when the current thread already uses primary + * process access token. + */ +static BOOL +change_token_to_primary(HANDLE *old_token) +{ + HANDLE token; + + if (!OpenThreadToken(GetCurrentThread(), TOKEN_IMPERSONATE, TRUE, &token)) + return FALSE; + + RevertToSelf(); + + *old_token = token; + return TRUE; +} + +/* + * Revert to the specified access token for the current thread. When access + * token is specified as NULL then revert to the primary process access token. + * Use to revert after change_token() or change_token_to_primary() call. + */ +static VOID +revert_to_token(HANDLE token) +{ + /* + * If SetThreadToken() call fails then there is no option to revert to + * the specified previous thread access token. So in this case revert to + * the primary process access token. + */ + if (!token || !SetThreadToken(NULL, token)) + RevertToSelf(); + if (token) + CloseHandle(token); +} + +/* + * Enable particular privilege for the current thread. And set method how to + * revert this privilege (if to revert whole token or only privilege). + */ +static BOOL +enable_privilege(LUID luid_privilege, HANDLE *revert_token, BOOL *revert_only_privilege) +{ + HANDLE thread_token; + HANDLE new_token; + + if (OpenThreadToken(GetCurrentThread(), TOKEN_ADJUST_PRIVILEGES, TRUE, &thread_token)) + { + if (set_privilege(thread_token, luid_privilege, TRUE)) + { + /* + * Indicate that correct revert method is just to + * disable privilege in access token. + */ + if (revert_token && revert_only_privilege) + { + *revert_token = thread_token; + *revert_only_privilege = TRUE; + } + else + { + CloseHandle(thread_token); + } + return TRUE; + } + CloseHandle(thread_token); + /* + * If enabling privilege failed then try to enable it via + * primary process access token. + */ + } + + /* + * If the current thread has already active thread access token then + * open it with just impersonate right as it would be used only for + * future revert. + */ + if (revert_token && revert_only_privilege) + { + if (!OpenThreadToken(GetCurrentThread(), TOKEN_IMPERSONATE, TRUE, &thread_token)) + { + if (GetLastError() != ERROR_NO_TOKEN) + return FALSE; + thread_token = NULL; + } + + /* + * If current thread has no access token (and uses primary + * process access token) or it does not have permission to + * adjust privileges or it does not have specified privilege + * then create a copy of the primary process access token, + * assign it for the current thread (= impersonate self) + * and then try adjusting privilege again. + */ + if (!ImpersonateSelf(SecurityImpersonation)) + { + if (thread_token) + CloseHandle(thread_token); + return FALSE; + } + } + + if (!OpenThreadToken(GetCurrentThread(), TOKEN_ADJUST_PRIVILEGES, TRUE, &new_token)) + { + /* thread_token is set only when we were asked for revert method. */ + if (revert_token && revert_only_privilege) + revert_to_token(thread_token); + return FALSE; + } + + if (!set_privilege(new_token, luid_privilege, TRUE)) + { + CloseHandle(new_token); + /* thread_token is set only when we were asked for revert method. */ + if (revert_token && revert_only_privilege) + revert_to_token(thread_token); + return FALSE; + } + + /* + * Indicate that correct revert method is to change to the previous + * access token. Either to the primary process access token or to the + * previous thread access token. + */ + if (revert_token && revert_only_privilege) + { + *revert_token = thread_token; + *revert_only_privilege = FALSE; + } + return TRUE; +} + +/* + * Revert particular privilege for the current thread was previously enabled by + * enable_privilege() call. Either disable privilege in specified access token + * or revert to previous access token. + */ +static VOID +revert_privilege(LUID luid_privilege, HANDLE revert_token, BOOL revert_only_privilege) +{ + if (revert_only_privilege) + { + set_privilege(revert_token, luid_privilege, FALSE); + CloseHandle(revert_token); + } + else + { + revert_to_token(revert_token); + } +} + +/* + * Return owner of the access token used by the current thread. Buffer for + * returned owner needs to be released by LocalFree() call. + */ +static TOKEN_OWNER * +get_current_token_owner(VOID) +{ + HANDLE token; + DWORD length; + TOKEN_OWNER *owner; + + /* + * If the current thread does not have active access token then thread + * uses primary process access token for all permission checks. + */ + if (!OpenThreadToken(GetCurrentThread(), TOKEN_QUERY, TRUE, &token) && + (GetLastError() != ERROR_NO_TOKEN || + !OpenProcessToken(GetCurrentProcess(), TOKEN_QUERY, &token))) + return NULL; + + if (!GetTokenInformation(token, TokenOwner, NULL, 0, &length) && + GetLastError() != ERROR_INSUFFICIENT_BUFFER) + { + CloseHandle(token); + return NULL; + } + +retry: + owner = (TOKEN_OWNER *)LocalAlloc(LPTR, length); + if (!owner) + { + CloseHandle(token); + return NULL; + } + + if (!GetTokenInformation(token, TokenOwner, owner, length, &length)) + { + /* + * Length of token owner (SID) buffer between two get calls may + * changes (e.g. by another thread of process), so retry. + */ + if (GetLastError() == ERROR_INSUFFICIENT_BUFFER) + { + LocalFree(owner); + goto retry; + } + LocalFree(owner); + CloseHandle(token); + return NULL; + } + + CloseHandle(token); + return owner; +} + +/* + * Grant particular permissions in the primary access token of the specified + * process for the owner of current thread token and set old DACL of the + * process access token for reverting permissions. Security descriptor is + * just memory buffer for old DACL. + */ +static BOOL +grant_process_token_dacl_permissions(HANDLE process, DWORD permissions, HANDLE *token, PACL *old_dacl, PSECURITY_DESCRIPTOR *security_descriptor) +{ + GetSecurityInfoProt MyGetSecurityInfo; + SetSecurityInfoProt MySetSecurityInfo; + SetEntriesInAclProt MySetEntriesInAcl; + EXPLICIT_ACCESS explicit_access; + TOKEN_OWNER *owner; + HMODULE advapi32; + PACL new_dacl; + + /* + * This source file already uses advapi32.dll library, so it is + * linked to executable and automatically loaded when starting + * current running process. + */ + advapi32 = GetModuleHandle(TEXT("advapi32.dll")); + if (!advapi32) + return FALSE; + + /* + * It does not matter if SetEntriesInAclA() or SetEntriesInAclW() is + * called as no string is passed to SetEntriesInAcl function. + */ + MyGetSecurityInfo = (GetSecurityInfoProt)(LPVOID)GetProcAddress(advapi32, "GetSecurityInfo"); + MySetSecurityInfo = (SetSecurityInfoProt)(LPVOID)GetProcAddress(advapi32, "SetSecurityInfo"); + MySetEntriesInAcl = (SetEntriesInAclProt)(LPVOID)GetProcAddress(advapi32, "SetEntriesInAclA"); + if (!MyGetSecurityInfo || !MySetSecurityInfo || !MySetEntriesInAcl) + return FALSE; + + owner = get_current_token_owner(); + if (!owner) + return FALSE; + + /* + * READ_CONTROL is required for GetSecurityInfo(DACL_SECURITY_INFORMATION) + * and WRITE_DAC is required for SetSecurityInfo(DACL_SECURITY_INFORMATION). + */ + if (!OpenProcessToken(process, READ_CONTROL | WRITE_DAC, token)) + { + LocalFree(owner); + return FALSE; + } + + if (MyGetSecurityInfo(*token, SE_KERNEL_OBJECT, DACL_SECURITY_INFORMATION, NULL, NULL, old_dacl, NULL, security_descriptor) != ERROR_SUCCESS) + { + LocalFree(owner); + CloseHandle(*token); + return FALSE; + } + + /* + * Set new explicit access for the owner of the current thread access + * token with non-inherited granting access to specified permissions. + */ + explicit_access.grfAccessPermissions = permissions; + explicit_access.grfAccessMode = GRANT_ACCESS; + explicit_access.grfInheritance = NO_PROPAGATE_INHERIT_ACE; + explicit_access.Trustee.pMultipleTrustee = NULL; + explicit_access.Trustee.MultipleTrusteeOperation = NO_MULTIPLE_TRUSTEE; + explicit_access.Trustee.TrusteeForm = TRUSTEE_IS_SID; + explicit_access.Trustee.TrusteeType = TRUSTEE_IS_USER; + /* + * Unfortunately i586-mingw32msvc toolchain does not have pSid pointer + * member in Trustee union. So assign owner SID to ptstrName pointer + * member which aliases with pSid pointer member in the same union. + */ + explicit_access.Trustee.ptstrName = (PVOID)owner->Owner; + + if (MySetEntriesInAcl(1, &explicit_access, *old_dacl, &new_dacl) != ERROR_SUCCESS) + { + LocalFree(*security_descriptor); + LocalFree(owner); + CloseHandle(*token); + return FALSE; + } + + if (MySetSecurityInfo(*token, SE_KERNEL_OBJECT, DACL_SECURITY_INFORMATION, NULL, NULL, new_dacl, NULL) != ERROR_SUCCESS) + { + LocalFree(*security_descriptor); + LocalFree(owner); + CloseHandle(*token); + return FALSE; + } + + LocalFree(owner); + return TRUE; +} + +/* + * Revert particular granted permissions in specified access token done by + * grant_process_token_dacl_permissions() call. + */ +static VOID +revert_token_dacl_permissions(HANDLE token, PACL old_dacl, PSECURITY_DESCRIPTOR security_descriptor) +{ + SetSecurityInfoProt MySetSecurityInfo; + HMODULE advapi32; + + /* + * This source file already uses advapi32.dll library, so it is + * linked to executable and automatically loaded when starting + * current running process. + */ + advapi32 = GetModuleHandle(TEXT("advapi32.dll")); + if (advapi32) + { + MySetSecurityInfo = (SetSecurityInfoProt)(LPVOID)GetProcAddress(advapi32, "SetSecurityInfo"); + MySetSecurityInfo(token, SE_KERNEL_OBJECT, DACL_SECURITY_INFORMATION, NULL, NULL, old_dacl, NULL); + } + + LocalFree(security_descriptor); + CloseHandle(token); +} + +/* + * Change error mode of the current thread. If it is not possible then change + * error mode of the whole process. Always returns previous error mode. + */ +static UINT +change_error_mode(UINT new_mode) +{ + SetThreadErrorModeProt MySetThreadErrorMode = NULL; + HMODULE kernel32; + DWORD old_mode; + + /* + * Function SetThreadErrorMode() was introduced in Windows 7, so use + * GetProcAddress() for compatibility with older systems. + */ + kernel32 = GetModuleHandle(TEXT("kernel32.dll")); + if (kernel32) + MySetThreadErrorMode = (SetThreadErrorModeProt)(LPVOID)GetProcAddress(kernel32, "SetThreadErrorMode"); + + if (MySetThreadErrorMode && + MySetThreadErrorMode(new_mode, &old_mode)) + return old_mode; + + /* + * Fallback to function SetErrorMode() which modifies error mode of the + * whole process and returns old mode. + */ + return SetErrorMode(new_mode); +} + +/* + * Open process handle specified by the process id with the query right and + * optionally also with vm read right. + */ +static HANDLE +open_process_for_query(DWORD pid, BOOL with_vm_read) +{ + BOOL revert_only_privilege; + LUID luid_debug_privilege; + OSVERSIONINFO version; + DWORD process_right; + HANDLE revert_token; + HANDLE process; + + /* + * Some processes on Windows Vista and higher systems can be opened only + * with PROCESS_QUERY_LIMITED_INFORMATION right. This right is enough + * for accessing primary process token. But this right is not supported + * on older pre-Vista systems. When the current thread on these older + * systems does not have Debug privilege then OpenProcess() fails with + * ERROR_ACCESS_DENIED. If the current thread has Debug privilege then + * OpenProcess() success and returns handle to requested process. + * Problem is that this handle does not have PROCESS_QUERY_INFORMATION + * right and so cannot be used for accessing primary process token + * on those older systems. Moreover it has zero rights and therefore + * such handle is fully useless. So never try to use open process with + * PROCESS_QUERY_LIMITED_INFORMATION right on older systems than + * Windows Vista (NT 6.0). + */ + version.dwOSVersionInfoSize = sizeof(version); + if (GetVersionEx(&version) && + version.dwPlatformId == VER_PLATFORM_WIN32_NT && + version.dwMajorVersion >= 6) + process_right = PROCESS_QUERY_LIMITED_INFORMATION; + else + process_right = PROCESS_QUERY_INFORMATION; + + if (with_vm_read) + process_right |= PROCESS_VM_READ; + + process = OpenProcess(process_right, FALSE, pid); + if (process) + return process; + + /* + * It is possible to open only processes to which owner of the current + * thread access token has permissions. For opening other processing it + * is required to have Debug privilege enabled. By default local + * administrators have this privilege, but it is disabled. So try to + * enable it and then try to open process again. + */ + + if (!LookupPrivilegeValue(NULL, SE_DEBUG_NAME, &luid_debug_privilege)) + return NULL; + + if (!enable_privilege(luid_debug_privilege, &revert_token, &revert_only_privilege)) + return NULL; + + process = OpenProcess(process_right, FALSE, pid); + + revert_privilege(luid_debug_privilege, revert_token, revert_only_privilege); + + return process; +} + +/* + * Check if process image path name (wide string) matches exe file name + * (7-bit ASCII string). Do case-insensitive string comparison. Process + * image path name can be in any namespace format (DOS, Win32, UNC, ...). + */ +static BOOL +check_process_name(LPCWSTR path, DWORD path_length, LPCSTR exe_file) +{ + DWORD exe_file_length; + WCHAR c1; + UCHAR c2; + DWORD i; + + exe_file_length = 0; + while (exe_file[exe_file_length] != '\0') + exe_file_length++; + + /* Path must have backslash before exe file name. */ + if (exe_file_length >= path_length || + path[path_length-exe_file_length-1] != L'\\') + return FALSE; + + for (i = 0; i < exe_file_length; i++) + { + c1 = path[path_length-exe_file_length+i]; + c2 = exe_file[i]; + /* + * Input string for comparison is 7-bit ASCII and file name part + * of path must not contain backslash as it is path separator. + */ + if (c1 >= 0x80 || c2 >= 0x80 || c1 == L'\\') + return FALSE; + if (c1 >= L'a' && c1 <= L'z') + c1 -= L'a' - L'A'; + if (c2 >= 'a' && c2 <= 'z') + c2 -= 'a' - 'A'; + if (c1 != c2) + return FALSE; + } + + return TRUE; +} + +/* Open process handle with the query right specified by process exe file. */ +static HANDLE +find_and_open_process_for_query(LPCSTR exe_file) +{ + GetProcessImageFileNameWProt MyGetProcessImageFileNameW; + GetModuleFileNameExWProt MyGetModuleFileNameExW; + EnumProcessesProt MyEnumProcesses; + HMODULE kernel32, psapi; + UINT prev_error_mode; + DWORD partial_retry; + BOOL found_process; + DWORD size, length; + DWORD *processes; + HANDLE process; + LPWSTR path; + DWORD error; + DWORD count; + DWORD i; + + psapi = NULL; + kernel32 = GetModuleHandle(TEXT("kernel32.dll")); + if (!kernel32) + return NULL; + + /* + * On Windows 7 and higher systems these functions are available in + * kernel32.dll library with K32 prefix. + */ + MyGetModuleFileNameExW = NULL; + MyGetProcessImageFileNameW = (GetProcessImageFileNameWProt)(LPVOID)GetProcAddress(kernel32, "K32GetProcessImageFileNameW"); + MyEnumProcesses = (EnumProcessesProt)(LPVOID)GetProcAddress(kernel32, "K32EnumProcesses"); + if (!MyGetProcessImageFileNameW || !MyEnumProcesses) + { + /* + * On older NT-based systems these functions are available in + * psapi.dll library without K32 prefix. + */ + prev_error_mode = change_error_mode(SEM_FAILCRITICALERRORS); + psapi = LoadLibrary(TEXT("psapi.dll")); + change_error_mode(prev_error_mode); + + if (!psapi) + return NULL; + + /* + * Function GetProcessImageFileNameW() is available in + * Windows XP and higher systems. On older versions is + * available function GetModuleFileNameExW(). + */ + MyGetProcessImageFileNameW = (GetProcessImageFileNameWProt)(LPVOID)GetProcAddress(psapi, "GetProcessImageFileNameW"); + MyGetModuleFileNameExW = (GetModuleFileNameExWProt)(LPVOID)GetProcAddress(psapi, "GetModuleFileNameExW"); + MyEnumProcesses = (EnumProcessesProt)(LPVOID)GetProcAddress(psapi, "EnumProcesses"); + if ((!MyGetProcessImageFileNameW && !MyGetModuleFileNameExW) || !MyEnumProcesses) + { + FreeLibrary(psapi); + return NULL; + } } - if (!InitializeWinIo()) + /* Make initial buffer size for 1024 processes. */ + size = 1024 * sizeof(*processes); + +retry: + processes = (DWORD *)LocalAlloc(LPTR, size); + if (!processes) { - a->warning("i386-io-windows: InitializeWinIo() failed."); + if (psapi) + FreeLibrary(psapi); + return NULL; + } + + if (!MyEnumProcesses(processes, size, &length)) + { + LocalFree(processes); + if (psapi) + FreeLibrary(psapi); + return NULL; + } + else if (size == length) + { + /* + * There is no indication given when the buffer is too small to + * store all process identifiers. Therefore if returned length + * is same as buffer size there can be more processes. Call + * again with larger buffer. + */ + LocalFree(processes); + size *= 2; + goto retry; + } + + process = NULL; + count = length / sizeof(*processes); + + for (i = 0; i < count; i++) + { + /* Skip System Idle Process. */ + if (processes[i] == 0) + continue; + + /* + * Function GetModuleFileNameExW() requires additional + * PROCESS_VM_READ right as opposite to function + * GetProcessImageFileNameW() which does not need it. + */ + process = open_process_for_query(processes[i], MyGetProcessImageFileNameW ? FALSE : TRUE); + if (!process) + continue; + + /* + * Set initial buffer size to 256 (wide) characters. + * Final path length on the modern NT-based systems can be also larger. + */ + size = 256; + found_process = FALSE; + partial_retry = 0; + +retry_path: + path = (LPWSTR)LocalAlloc(LPTR, size * sizeof(*path)); + if (!path) + goto end_path; + + if (MyGetProcessImageFileNameW) + length = MyGetProcessImageFileNameW(process, path, size); + else + length = MyGetModuleFileNameExW(process, NULL, path, size); + + error = GetLastError(); + + /* + * GetModuleFileNameEx() returns zero and signal error ERROR_PARTIAL_COPY + * when remote process is in the middle of updating its module table. + * Sleep 10 ms and try again, max 10 attempts. + */ + if (!MyGetProcessImageFileNameW) + { + if (length == 0 && error == ERROR_PARTIAL_COPY && partial_retry++ < 10) + { + Sleep(10); + goto retry_path; + } + partial_retry = 0; + } + + /* + * When buffer is too small then function GetModuleFileNameEx() returns + * its size argument on older systems (Windows XP) or its size minus + * argument one on new systems (Windows 10) without signalling any error. + * Function GetProcessImageFileNameW() on the other hand returns zero + * value and signals error ERROR_INSUFFICIENT_BUFFER. So in all these + * cases call function again with larger buffer. + */ + + if (MyGetProcessImageFileNameW && length == 0 && error != ERROR_INSUFFICIENT_BUFFER) + goto end_path; + + if ((MyGetProcessImageFileNameW && length == 0) || + (!MyGetProcessImageFileNameW && (length == size || length == size-1))) + { + LocalFree(path); + size *= 2; + goto retry_path; + } + + if (length && check_process_name(path, length, exe_file)) + found_process = TRUE; + +end_path: + if (path) + { + LocalFree(path); + path = NULL; + } + + if (found_process) + break; + + CloseHandle(process); + process = NULL; + } + + LocalFree(processes); + + if (psapi) + FreeLibrary(psapi); + + return process; +} + +/* + * Try to open primary access token of the particular process with specified + * rights. Before opening access token try to adjust DACL permissions of the + * primary process access token, so following open does not fail on error + * related to no open permissions. Revert DACL permissions after open attempt. + * As following steps are not atomic, try to execute them more times in case + * of possible race conditions caused by other threads or processes. + */ +static HANDLE +try_grant_permissions_and_open_process_token(HANDLE process, DWORD rights) +{ + PSECURITY_DESCRIPTOR security_descriptor; + HANDLE grant_token; + PACL old_dacl; + HANDLE token; + DWORD retry; + DWORD error; + + /* + * This code is not atomic. Between grant and open calls can other + * thread or process change or revert permissions. So try to execute + * it more times. + */ + for (retry = 0; retry < 10; retry++) + { + if (!grant_process_token_dacl_permissions(process, rights, &grant_token, &old_dacl, &security_descriptor)) + return NULL; + if (!OpenProcessToken(process, rights, &token)) + { + token = NULL; + error = GetLastError(); + } + revert_token_dacl_permissions(grant_token, old_dacl, security_descriptor); + if (token) + return token; + else if (error != ERROR_ACCESS_DENIED) + return NULL; + } + + return NULL; +} + +/* + * Open primary access token of particular process handle with specified rights. + * If permissions for specified rights are missing then try to grant them. + */ +static HANDLE +open_process_token_with_rights(HANDLE process, DWORD rights) +{ + HANDLE old_token; + HANDLE token; + + /* First try to open primary access token of process handle directly. */ + if (OpenProcessToken(process, rights, &token)) + return token; + + /* + * If opening failed then it means that owner of the current thread + * access token does not have permission for it. Try it again with + * primary process access token. + */ + if (change_token_to_primary(&old_token)) + { + if (!OpenProcessToken(process, rights, &token)) + token = NULL; + revert_to_token(old_token); + if (token) + return token; + } + + /* + * If opening is still failing then try to grant specified permissions + * for the current thread and try to open it again. + */ + token = try_grant_permissions_and_open_process_token(process, rights); + if (token) + return token; + + /* + * And if it is still failing then try it again with granting + * permissions for the primary process token of the current process. + */ + if (change_token_to_primary(&old_token)) + { + token = try_grant_permissions_and_open_process_token(process, rights); + revert_to_token(old_token); + if (token) + return token; + } + + /* + * TODO: Sorry, no other option for now... + * It could be possible to use Take Ownership Name privilege to + * temporary change token owner of specified process to the owner of + * the current thread token, grant permissions for current thread in + * that process token, change ownership back to original one, open + * that process token and revert granted permissions. But this is + * not implemented yet. + */ + return NULL; +} + +/* + * Set x86 I/O Privilege Level to 3 for the whole current NT process. Do it via + * NtSetInformationProcess() call with ProcessUserModeIOPL information class, + * which is supported by 32-bit Windows NT kernel versions and requires Tcb + * privilege. + */ +static BOOL +SetProcessUserModeIOPL(VOID) +{ + NtSetInformationProcessProt MyNtSetInformationProcess; + + LUID luid_tcb_privilege; + LUID luid_impersonate_privilege; + + HANDLE revert_token_tcb_privilege; + BOOL revert_only_tcb_privilege; + + HANDLE revert_token_impersonate_privilege; + BOOL revert_only_impersonate_privilege; + + BOOL impersonate_privilege_enabled; + + BOOL revert_to_old_token; + HANDLE old_token; + + HANDLE lsass_process; + HANDLE lsass_token; + + UINT prev_error_mode; + NTSTATUS nt_status; + HMODULE ntdll; + BOOL ret; + + impersonate_privilege_enabled = FALSE; + revert_to_old_token = FALSE; + lsass_token = NULL; + old_token = NULL; + + /* Fast path when ProcessUserModeIOPL was already called. */ + if (read_iopl() == 3) + return TRUE; + + /* + * Load ntdll.dll library with disabled critical-error-handler message box. + * It means that NT kernel does not show unwanted GUI message box to user + * when LoadLibrary() function fails. + */ + prev_error_mode = change_error_mode(SEM_FAILCRITICALERRORS); + ntdll = LoadLibrary(TEXT("ntdll.dll")); + change_error_mode(prev_error_mode); + if (!ntdll) + goto err_not_implemented; + + /* Retrieve pointer to NtSetInformationProcess() function. */ + MyNtSetInformationProcess = (NtSetInformationProcessProt)(LPVOID)GetProcAddress(ntdll, "NtSetInformationProcess"); + if (!MyNtSetInformationProcess) + goto err_not_implemented; + + /* + * ProcessUserModeIOPL is syscall for NT kernel to change x86 IOPL + * of the current running process to 3. + * + * Process handle argument for ProcessUserModeIOPL is ignored and + * IOPL is always changed for the current running process. So pass + * GetCurrentProcess() handle for documentation purpose. Process + * information buffer and length are unused for ProcessUserModeIOPL. + * + * ProcessUserModeIOPL may success (return value >= 0) or may fail + * because it is not implemented or because of missing privilege. + * Other errors are not defined, so handle them as unknown. + */ + nt_status = MyNtSetInformationProcess(GetCurrentProcess(), ProcessUserModeIOPL, NULL, 0); + if (nt_status >= 0) + goto verify; + else if (nt_status == STATUS_NOT_IMPLEMENTED) + goto err_not_implemented; + else if (nt_status != STATUS_PRIVILEGE_NOT_HELD) + goto err_unknown; + + /* + * If ProcessUserModeIOPL call failed with STATUS_PRIVILEGE_NOT_HELD + * error then it means that the current thread token does not have + * Tcb privilege enabled. Try to enable it. + */ + + if (!LookupPrivilegeValue(NULL, SE_TCB_NAME, &luid_tcb_privilege)) + goto err_not_implemented; + + /* + * If the current thread has already Tcb privilege enabled then there + * is some additional unhanded restriction. + */ + if (have_privilege(luid_tcb_privilege)) + goto err_privilege_not_held; + + /* Try to enable Tcb privilege and try ProcessUserModeIOPL call again. */ + if (enable_privilege(luid_tcb_privilege, &revert_token_tcb_privilege, &revert_only_tcb_privilege)) + { + nt_status = MyNtSetInformationProcess(GetCurrentProcess(), ProcessUserModeIOPL, NULL, 0); + revert_privilege(luid_tcb_privilege, revert_token_tcb_privilege, revert_only_tcb_privilege); + if (nt_status >= 0) + goto verify; + else if (nt_status == STATUS_NOT_IMPLEMENTED) + goto err_not_implemented; + else if (nt_status == STATUS_PRIVILEGE_NOT_HELD) + goto err_privilege_not_held; + else + goto err_unknown; + } + + /* + * If enabling of Tcb privilege failed then it means that current thread + * does not this privilege. But current process may have it. So try it + * again with primary process access token. + */ + + /* + * If system supports Impersonate privilege (Windows 2000 SP4 or higher) then + * all future actions in this function require this Impersonate privilege. + * So try to enable it in case it is currently disabled. + */ + if (LookupPrivilegeValue(NULL, SE_IMPERSONATE_NAME, &luid_impersonate_privilege) && + !have_privilege(luid_impersonate_privilege)) + { + /* + * If current thread does not have Impersonate privilege enabled + * then first try to enable it just for the current thread. If + * it is not possible to enable it just for the current thread + * then try it to enable globally for whole process (which + * affects all process threads). Both actions will be reverted + * at the end of this function. + */ + if (enable_privilege(luid_impersonate_privilege, &revert_token_impersonate_privilege, &revert_only_impersonate_privilege)) + { + impersonate_privilege_enabled = TRUE; + } + else if (enable_privilege(luid_impersonate_privilege, NULL, NULL)) + { + impersonate_privilege_enabled = TRUE; + revert_token_impersonate_privilege = NULL; + revert_only_impersonate_privilege = TRUE; + } + else + { + goto err_privilege_not_held; + } + + /* + * Now when Impersonate privilege is enabled, try to enable Tcb + * privilege again. Enabling other privileges for the current + * thread requires Impersonate privilege, so enabling Tcb again + * could now pass. + */ + if (enable_privilege(luid_tcb_privilege, &revert_token_tcb_privilege, &revert_only_tcb_privilege)) + { + nt_status = MyNtSetInformationProcess(GetCurrentProcess(), ProcessUserModeIOPL, NULL, 0); + revert_privilege(luid_tcb_privilege, revert_token_tcb_privilege, revert_only_tcb_privilege); + if (nt_status >= 0) + goto verify; + else if (nt_status == STATUS_NOT_IMPLEMENTED) + goto err_not_implemented; + else if (nt_status == STATUS_PRIVILEGE_NOT_HELD) + goto err_privilege_not_held; + else + goto err_unknown; + } + } + + /* + * If enabling Tcb privilege failed then it means that the current + * thread access token does not have this privilege or does not + * have permission to adjust privileges. + * + * Try to use more privileged token from Local Security Authority + * Subsystem Service process (lsass.exe) which has Tcb privilege. + * Retrieving this more privileged token is possible for local + * administrators (unless it was disabled by local administrators). + */ + + lsass_process = find_and_open_process_for_query("lsass.exe"); + if (!lsass_process) + goto err_privilege_not_held; + + /* + * Open primary lsass.exe process access token with query and duplicate + * rights. Just these two rights are required for impersonating other + * primary process token (impersonate right is really not required!). + */ + lsass_token = open_process_token_with_rights(lsass_process, TOKEN_QUERY | TOKEN_DUPLICATE); + + CloseHandle(lsass_process); + + if (!lsass_token) + goto err_privilege_not_held; + + /* + * After successful open of the primary lsass.exe process access token, + * assign its copy for the current thread. + */ + if (!change_token(lsass_token, &old_token)) + goto err_privilege_not_held; + + revert_to_old_token = TRUE; + + nt_status = MyNtSetInformationProcess(GetCurrentProcess(), ProcessUserModeIOPL, NULL, 0); + if (nt_status == STATUS_PRIVILEGE_NOT_HELD) + { + /* + * Now current thread is not using primary process token anymore + * but is using custom access token. There is no need to revert + * enabled Tcb privilege as the whole custom access token would + * be reverted. So there is no need to setup revert method for + * enabling privilege. + */ + if (have_privilege(luid_tcb_privilege) || + !enable_privilege(luid_tcb_privilege, NULL, NULL)) + goto err_privilege_not_held; + nt_status = MyNtSetInformationProcess(GetCurrentProcess(), ProcessUserModeIOPL, NULL, 0); + } + if (nt_status >= 0) + goto verify; + else if (nt_status == STATUS_NOT_IMPLEMENTED) + goto err_not_implemented; + else if (nt_status == STATUS_PRIVILEGE_NOT_HELD) + goto err_privilege_not_held; + else + goto err_unknown; + +verify: + /* + * Some Windows NT kernel versions (e.g. Windows 2003 x64) do not + * implement ProcessUserModeIOPL syscall at all but incorrectly + * returns success when it is called by user process. So always + * after this call verify that IOPL is set to 3. + */ + if (read_iopl() != 3) + goto err_not_implemented; + ret = TRUE; + goto ret; + +err_not_implemented: + SetLastError(ERROR_INVALID_FUNCTION); + ret = FALSE; + goto ret; + +err_privilege_not_held: + SetLastError(ERROR_PRIVILEGE_NOT_HELD); + ret = FALSE; + goto ret; + +err_unknown: + SetLastError(ERROR_GEN_FAILURE); + ret = FALSE; + goto ret; + +ret: + if (revert_to_old_token) + revert_to_token(old_token); + + if (impersonate_privilege_enabled) + revert_privilege(luid_impersonate_privilege, revert_token_impersonate_privilege, revert_only_impersonate_privilege); + + if (lsass_token) + CloseHandle(lsass_token); + + if (ntdll) + FreeLibrary(ntdll); + + return ret; +} + +static int +intel_setup_io(struct pci_access *a) +{ +#ifndef _WIN64 + /* 16/32-bit non-NT systems allow applications to access PCI I/O ports without any special setup. */ + OSVERSIONINFOA version; + version.dwOSVersionInfoSize = sizeof(version); + if (GetVersionExA(&version) && version.dwPlatformId < VER_PLATFORM_WIN32_NT) + { + a->debug("Detected 16/32-bit non-NT system, skipping NT setup..."); + return 1; + } +#endif + + /* On NT-based systems issue ProcessUserModeIOPL syscall which changes IOPL to 3. */ + if (!SetProcessUserModeIOPL()) + { + a->warning("NT ProcessUserModeIOPL call failed with error: %lu.", (unsigned long int)GetLastError()); return 0; } + a->debug("NT ProcessUserModeIOPL call succeeded..."); return 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { - //TODO: DeInitializeWinIo! - return 1; + /* + * 16/32-bit non-NT systems do not use any special setup and on NT-based + * systems ProcessUserModeIOPL permanently changes IOPL to 3 for the current + * NT process, no revert for current process is possible. + */ } static inline void intel_io_lock(void) diff -Nru pciutils-3.7.0/lib/i386-ports.c pciutils-3.8.0/lib/i386-ports.c --- pciutils-3.7.0/lib/i386-ports.c 2020-05-26 16:11:35.000000000 +0000 +++ pciutils-3.8.0/lib/i386-ports.c 2022-02-10 12:46:16.000000000 +0000 @@ -10,7 +10,7 @@ #include "internal.h" -#include +#include #if defined(PCI_OS_LINUX) #include "i386-io-linux.h" @@ -50,10 +50,13 @@ } static void -conf12_cleanup(struct pci_access *a UNUSED) +conf12_cleanup(struct pci_access *a) { if (conf12_io_enabled > 0) - conf12_io_enabled = intel_cleanup_io(a); + { + intel_cleanup_io(a); + conf12_io_enabled = -1; + } } /* @@ -72,6 +75,7 @@ { struct pci_dev d; + memset(&d, 0, sizeof(d)); a->debug("...sanity check"); d.bus = 0; d.func = 0; diff -Nru pciutils-3.7.0/lib/init.c pciutils-3.8.0/lib/init.c --- pciutils-3.7.0/lib/init.c 2020-01-25 19:22:27.000000000 +0000 +++ pciutils-3.8.0/lib/init.c 2022-04-15 21:57:59.000000000 +0000 @@ -13,6 +13,10 @@ #include "internal.h" +#ifdef PCI_OS_WINDOWS +#include +#endif + static struct pci_methods *pci_methods[PCI_ACCESS_MAX] = { NULL, #ifdef PCI_HAVE_PM_LINUX_SYSFS @@ -72,6 +76,11 @@ #else NULL, #endif +#ifdef PCI_HAVE_PM_WIN32_CFGMGR32 + &pm_win32_cfgmgr32, +#else + NULL, +#endif }; // If PCI_ACCESS_AUTO is selected, we probe the access methods in this order @@ -86,39 +95,14 @@ PCI_ACCESS_DARWIN, PCI_ACCESS_SYLIXOS_DEVICE, PCI_ACCESS_HURD, + PCI_ACCESS_WIN32_CFGMGR32, // Low-level methods poking the hardware directly PCI_ACCESS_I386_TYPE1, PCI_ACCESS_I386_TYPE2, -1, }; -void * -pci_malloc(struct pci_access *a, int size) -{ - void *x = malloc(size); - - if (!x) - a->error("Out of memory (allocation of %d bytes failed)", size); - return x; -} - -void -pci_mfree(void *x) -{ - if (x) - free(x); -} - -char * -pci_strdup(struct pci_access *a, const char *s) -{ - int len = strlen(s) + 1; - char *t = pci_malloc(a, len); - memcpy(t, s, len); - return t; -} - -static void +static void PCI_NONRET pci_generic_error(char *msg, ...) { va_list args; @@ -158,6 +142,34 @@ { } +// Memory allocation functions are safe to call if pci_access is not fully initalized or even NULL + +void * +pci_malloc(struct pci_access *a, int size) +{ + void *x = malloc(size); + + if (!x) + (a && a->error ? a->error : pci_generic_error)("Out of memory (allocation of %d bytes failed)", size); + return x; +} + +void +pci_mfree(void *x) +{ + if (x) + free(x); +} + +char * +pci_strdup(struct pci_access *a, const char *s) +{ + int len = strlen(s) + 1; + char *t = pci_malloc(a, len); + memcpy(t, s, len); + return t; +} + int pci_lookup_method(char *name) { @@ -180,14 +192,52 @@ return pci_methods[index]->name; } +#ifdef PCI_OS_WINDOWS + +static void +pci_init_name_list_path(struct pci_access *a) +{ + if ((PCI_PATH_IDS_DIR)[0]) + pci_set_name_list_path(a, PCI_PATH_IDS_DIR "\\" PCI_IDS, 0); + else + { + char *path, *sep; + DWORD len; + + path = pci_malloc(a, MAX_PATH+1); + len = GetModuleFileNameA(NULL, path, MAX_PATH+1); + sep = (len > 0) ? strrchr(path, '\\') : NULL; + if (len == 0 || len == MAX_PATH+1 || !sep || MAX_PATH-(size_t)(sep+1-path) < sizeof(PCI_IDS)) + { + free(path); + pci_set_name_list_path(a, PCI_IDS, 0); + } + else + { + memcpy(sep+1, PCI_IDS, sizeof(PCI_IDS)); + pci_set_name_list_path(a, path, 1); + } + } +} + +#else + +static void +pci_init_name_list_path(struct pci_access *a) +{ + pci_set_name_list_path(a, PCI_PATH_IDS_DIR "/" PCI_IDS, 0); +} + +#endif + struct pci_access * pci_alloc(void) { - struct pci_access *a = malloc(sizeof(struct pci_access)); + struct pci_access *a = pci_malloc(NULL, sizeof(struct pci_access)); int i; memset(a, 0, sizeof(*a)); - pci_set_name_list_path(a, PCI_PATH_IDS_DIR "/" PCI_IDS, 0); + pci_init_name_list_path(a); #ifdef PCI_USE_DNS pci_define_param(a, "net.domain", PCI_ID_DOMAIN, "DNS domain used for resolving of ID's"); pci_define_param(a, "net.cache_name", "~/.pciids-cache", "Name of the ID cache file"); diff -Nru pciutils-3.7.0/lib/internal.h pciutils-3.8.0/lib/internal.h --- pciutils-3.7.0/lib/internal.h 2020-05-26 16:11:35.000000000 +0000 +++ pciutils-3.8.0/lib/internal.h 2022-04-15 21:47:48.000000000 +0000 @@ -1,7 +1,7 @@ /* * The PCI Library -- Internal Stuff * - * Copyright (c) 1997--2018 Martin Mares + * Copyright (c) 1997--2022 Martin Mares * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -41,7 +41,7 @@ void (*init)(struct pci_access *); void (*cleanup)(struct pci_access *); void (*scan)(struct pci_access *); - unsigned int (*fill_info)(struct pci_dev *, unsigned int flags); + void (*fill_info)(struct pci_dev *, unsigned int flags); int (*read)(struct pci_dev *, int pos, byte *buf, int len); int (*write)(struct pci_dev *, int pos, byte *buf, int len); int (*read_vpd)(struct pci_dev *, int pos, byte *buf, int len); @@ -52,10 +52,13 @@ /* generic.c */ void pci_generic_scan_bus(struct pci_access *, byte *busmap, int bus); void pci_generic_scan(struct pci_access *); -unsigned int pci_generic_fill_info(struct pci_dev *, unsigned int flags); +void pci_generic_fill_info(struct pci_dev *, unsigned int flags); int pci_generic_block_read(struct pci_dev *, int pos, byte *buf, int len); int pci_generic_block_write(struct pci_dev *, int pos, byte *buf, int len); +/* emulated.c */ +int pci_emulated_read(struct pci_dev *d, int pos, byte *buf, int len); + /* init.c */ void *pci_malloc(struct pci_access *, int); void pci_mfree(void *); @@ -74,6 +77,24 @@ int pci_fill_info_v33(struct pci_dev *, int flags) VERSIONED_ABI; int pci_fill_info_v34(struct pci_dev *, int flags) VERSIONED_ABI; int pci_fill_info_v35(struct pci_dev *, int flags) VERSIONED_ABI; +int pci_fill_info_v38(struct pci_dev *, int flags) VERSIONED_ABI; + +static inline int want_fill(struct pci_dev *d, unsigned want_fields, unsigned int try_fields) +{ + want_fields &= try_fields; + if ((d->known_fields & want_fields) == want_fields) + return 0; + else + { + d->known_fields |= try_fields; + return 1; + } +} + +static inline void clear_fill(struct pci_dev *d, unsigned clear_fields) +{ + d->known_fields &= ~clear_fields; +} struct pci_property { struct pci_property *next; @@ -89,9 +110,10 @@ void pci_free_params(struct pci_access *acc); /* caps.c */ -unsigned int pci_scan_caps(struct pci_dev *, unsigned int want_fields); +void pci_scan_caps(struct pci_dev *, unsigned int want_fields); void pci_free_caps(struct pci_dev *); extern struct pci_methods pm_intel_conf1, pm_intel_conf2, pm_linux_proc, pm_fbsd_device, pm_aix_device, pm_nbsd_libpci, pm_obsd_device, - pm_dump, pm_linux_sysfs, pm_darwin, pm_sylixos_device, pm_hurd; + pm_dump, pm_linux_sysfs, pm_darwin, pm_sylixos_device, pm_hurd, + pm_win32_cfgmgr32; diff -Nru pciutils-3.7.0/lib/libpci.pc.in pciutils-3.8.0/lib/libpci.pc.in --- pciutils-3.7.0/lib/libpci.pc.in 2011-10-02 09:52:11.000000000 +0000 +++ pciutils-3.8.0/lib/libpci.pc.in 2020-12-06 18:17:21.000000000 +0000 @@ -7,5 +7,5 @@ Description: libpci Version: @VERSION@ Libs: -L${libdir} -lpci -Libs.private: @LDLIBS@ +Libs.private: @LDLIBS@ @WITH_LIBS@ Cflags: -I${includedir} diff -Nru pciutils-3.7.0/lib/libpci.ver pciutils-3.8.0/lib/libpci.ver --- pciutils-3.7.0/lib/libpci.ver 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/libpci.ver 2022-04-15 22:31:40.000000000 +0000 @@ -82,3 +82,12 @@ global: pci_find_cap_nr; }; + +LIBPCI_3.8 { + global: + pci_fill_info; + pci_filter_init; + pci_filter_match; + pci_filter_parse_id; + pci_filter_parse_slot; +}; diff -Nru pciutils-3.7.0/lib/Makefile pciutils-3.8.0/lib/Makefile --- pciutils-3.7.0/lib/Makefile 2020-01-25 19:22:27.000000000 +0000 +++ pciutils-3.8.0/lib/Makefile 2022-04-15 21:47:48.000000000 +0000 @@ -54,6 +54,11 @@ OBJS += hurd endif +ifdef PCI_HAVE_PM_WIN32_CFGMGR32 +OBJS += emulated +OBJS += win32-cfgmgr32 +endif + all: $(PCILIB) $(PCILIBPC) ifeq ($(SHARED),no) @@ -77,7 +82,8 @@ -e 's,@LIBDIR@,$(LIBDIR),' \ -e 's,@IDSDIR@,$(IDSDIR),' \ -e 's,@VERSION@,$(VERSION),' \ - -e 's,@LDLIBS@,$(LDLIBS),' + -e 's,@LDLIBS@,$(LDLIBS),' \ + -e 's,@WITH_LIBS@,$(WITH_LIBS),' init.o: init.c $(INCL) access.o: access.c $(INCL) @@ -86,6 +92,7 @@ proc.o: proc.c $(INCL) pread.h sysfs.o: sysfs.c $(INCL) pread.h generic.o: generic.c $(INCL) +emulated.o: emulated.c $(INCL) syscalls.o: syscalls.c $(INCL) obsd-device.o: obsd-device.c $(INCL) fbsd-device.o: fbsd-device.c $(INCL) @@ -100,3 +107,13 @@ filter.o: filter.c $(INCL) nbsd-libpci.o: nbsd-libpci.c $(INCL) hurd.o: hurd.c $(INCL) +win32-cfgmgr32.o: win32-cfgmgr32.c $(INCL) + +# MinGW32 toolchain has some required Win32 header files in /ddk subdirectory. +# But these header files include another header files from /ddk subdirectory +# and expect that build system has already set /ddk subdirectory into includes. +# So include /ddk subdirectory of each system predefined include path via -I. +ifdef PCI_HAVE_PM_WIN32_CFGMGR32 +DDKCFLAGS:=$(shell echo | $(CC) $(CFLAGS) -E -Wp,-v -o /dev/null - 2>&1 | sed -n 's/^ \(.*\)/-I\1\/ddk/p') +win32-cfgmgr32.o: override CFLAGS+=$(DDKCFLAGS) +endif diff -Nru pciutils-3.7.0/lib/names.c pciutils-3.8.0/lib/names.c --- pciutils-3.7.0/lib/names.c 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/names.c 2020-12-06 18:33:02.000000000 +0000 @@ -31,6 +31,7 @@ if (name = pci_id_hwdb_lookup(a, cat, id1, id2, id3, id4)) { pci_id_insert(a, cat, id1, id2, id3, id4, name, SRC_HWDB); + pci_mfree(name); continue; } } diff -Nru pciutils-3.7.0/lib/names-hwdb.c pciutils-3.8.0/lib/names-hwdb.c --- pciutils-3.7.0/lib/names-hwdb.c 2014-11-01 17:35:54.000000000 +0000 +++ pciutils-3.8.0/lib/names-hwdb.c 2021-12-26 20:52:33.000000000 +0000 @@ -71,8 +71,15 @@ struct udev_list_entry *entry; udev_list_entry_foreach(entry, udev_hwdb_get_properties_list_entry(a->id_udev_hwdb, modalias, 0)) - if (strcmp(udev_list_entry_get_name(entry), key) == 0) - return pci_strdup(a, udev_list_entry_get_value(entry)); + { + const char *entry_name = udev_list_entry_get_name(entry); + if (entry_name && !strcmp(entry_name, key)) + { + const char *entry_value = udev_list_entry_get_value(entry); + if (entry_value) + return pci_strdup(a, entry_value); + } + } } return NULL; diff -Nru pciutils-3.7.0/lib/names-parse.c pciutils-3.8.0/lib/names-parse.c --- pciutils-3.7.0/lib/names-parse.c 2014-11-01 17:08:51.000000000 +0000 +++ pciutils-3.8.0/lib/names-parse.c 2020-12-06 18:29:51.000000000 +0000 @@ -42,7 +42,7 @@ #define pci_close(f) gzclose(f) #define PCI_ERROR(f, err) \ if (!err) { \ - int errnum; \ + int errnum = 0; \ gzerror(f, &errnum); \ if (errnum >= 0) err = NULL; \ else if (errnum == Z_ERRNO) err = "I/O error"; \ diff -Nru pciutils-3.7.0/lib/pci.h pciutils-3.8.0/lib/pci.h --- pciutils-3.7.0/lib/pci.h 2020-05-30 22:17:41.000000000 +0000 +++ pciutils-3.8.0/lib/pci.h 2022-04-18 16:48:44.000000000 +0000 @@ -16,7 +16,7 @@ #include "header.h" #include "types.h" -#define PCI_LIB_VERSION 0x030700 +#define PCI_LIB_VERSION 0x030800 #ifndef PCI_ABI #define PCI_ABI @@ -43,6 +43,7 @@ PCI_ACCESS_DARWIN, /* Darwin */ PCI_ACCESS_SYLIXOS_DEVICE, /* SylixOS pci */ PCI_ACCESS_HURD, /* GNU/Hurd */ + PCI_ACCESS_WIN32_CFGMGR32, /* Win32 cfgmgr32.dll */ PCI_ACCESS_MAX }; @@ -62,7 +63,7 @@ int debugging; /* Turn on debugging messages */ /* Functions you can override: */ - void (*error)(char *msg, ...) PCI_PRINTF(1,2); /* Write error message and quit */ + void (*error)(char *msg, ...) PCI_PRINTF(1,2) PCI_NONRET; /* Write error message and quit */ void (*warning)(char *msg, ...) PCI_PRINTF(1,2); /* Write a warning message */ void (*debug)(char *msg, ...) PCI_PRINTF(1,2); /* Write a debugging message */ @@ -142,6 +143,13 @@ pciaddr_t flags[6]; /* PCI_IORESOURCE_* flags for regions */ pciaddr_t rom_flags; /* PCI_IORESOURCE_* flags for expansion ROM */ int domain; /* PCI domain (host bridge) */ + pciaddr_t bridge_base_addr[4]; /* Bridge base addresses (without flags) */ + pciaddr_t bridge_size[4]; /* Bridge sizes */ + pciaddr_t bridge_flags[4]; /* PCI_IORESOURCE_* flags for bridge addresses */ + u8 prog_if, rev_id; /* Programming interface for device_class and revision id */ + u16 subsys_vendor_id, subsys_id; /* Subsystem vendor id and subsystem id */ + struct pci_dev *parent; /* Parent device, does not have to be always accessible */ + int no_config_access; /* No access to config space for this device */ /* Fields used internally */ struct pci_access *access; @@ -205,7 +213,12 @@ #define PCI_FILL_IO_FLAGS 0x1000 #define PCI_FILL_DT_NODE 0x2000 /* Device tree node */ #define PCI_FILL_IOMMU_GROUP 0x4000 +#define PCI_FILL_BRIDGE_BASES 0x8000 #define PCI_FILL_RESCAN 0x00010000 +#define PCI_FILL_CLASS_EXT 0x00020000 /* prog_if and rev_id */ +#define PCI_FILL_SUBSYS 0x00040000 /* subsys_vendor_id and subsys_id */ +#define PCI_FILL_PARENT 0x00080000 +#define PCI_FILL_DRIVER 0x00100000 /* OS driver currently in use (string property) */ void pci_setup_cache(struct pci_dev *, u8 *cache, int len) PCI_ABI; @@ -233,8 +246,11 @@ struct pci_filter { int domain, bus, slot, func; /* -1 = ANY */ - int vendor, device, device_class; - int rfu[3]; + int vendor, device; + int device_class; + unsigned int device_class_mask; /* Which bits of the device_class are compared, default=all */ + int prog_if; + int rfu[1]; }; void pci_filter_init(struct pci_access *, struct pci_filter *) PCI_ABI; diff -Nru pciutils-3.7.0/lib/proc.c pciutils-3.8.0/lib/proc.c --- pciutils-3.7.0/lib/proc.c 2011-01-07 21:04:28.000000000 +0000 +++ pciutils-3.8.0/lib/proc.c 2022-02-10 12:49:39.000000000 +0000 @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -69,9 +70,11 @@ { struct pci_dev *d = pci_alloc_dev(a); unsigned int dfn, vend, cnt, known; + char *driver; + int offset; #define F " " PCIADDR_T_FMT - cnt = sscanf(buf, "%x %x %x" F F F F F F F F F F F F F F, + cnt = sscanf(buf, "%x %x %x" F F F F F F F F F F F F F F "%n", &dfn, &vend, &d->irq, @@ -88,7 +91,8 @@ &d->size[3], &d->size[4], &d->size[5], - &d->rom_size); + &d->rom_size, + &offset); #undef F if (cnt != 9 && cnt != 10 && cnt != 17) a->error("proc: parse error (read only %d items)", cnt); @@ -106,6 +110,20 @@ if (cnt >= 17) known |= PCI_FILL_SIZES; } + if (cnt >= 17) + { + while (buf[offset] && isspace(buf[offset])) + ++offset; + driver = &buf[offset]; + while (buf[offset] && !isspace(buf[offset])) + ++offset; + buf[offset] = '\0'; + if (driver[0]) + { + pci_set_property(d, PCI_FILL_DRIVER, driver); + known |= PCI_FILL_DRIVER; + } + } d->known_fields = known; pci_link_dev(a, d); } diff -Nru pciutils-3.7.0/lib/sysdep.h pciutils-3.8.0/lib/sysdep.h --- pciutils-3.7.0/lib/sysdep.h 2020-01-25 19:21:11.000000000 +0000 +++ pciutils-3.8.0/lib/sysdep.h 2022-02-10 12:46:16.000000000 +0000 @@ -21,7 +21,12 @@ typedef u16 word; #ifdef PCI_OS_WINDOWS -#define strcasecmp strcmpi +#define strcasecmp _strcmpi +#define strncasecmp _strnicmp +#if defined(_MSC_VER) && _MSC_VER < 1900 +#define snprintf _snprintf +#define vsnprintf _vsnprintf +#endif #endif #ifdef PCI_HAVE_LINUX_BYTEORDER_H @@ -66,7 +71,6 @@ #define BIG_ENDIAN 4321 #define LITTLE_ENDIAN 1234 #define BYTE_ORDER LITTLE_ENDIAN - #define snprintf _snprintf #endif #endif diff -Nru pciutils-3.7.0/lib/sysfs.c pciutils-3.8.0/lib/sysfs.c --- pciutils-3.7.0/lib/sysfs.c 2020-05-26 16:13:16.000000000 +0000 +++ pciutils-3.8.0/lib/sysfs.c 2022-02-10 12:49:39.000000000 +0000 @@ -153,14 +153,17 @@ { struct pci_access *a = d->access; char namebuf[OBJNAMELEN], buf[256]; + struct { pciaddr_t flags, base_addr, size; } lines[10]; + int have_bar_bases, have_rom_base, have_bridge_bases; FILE *file; int i; + have_bar_bases = have_rom_base = have_bridge_bases = 0; sysfs_obj_name(d, "resource", namebuf); file = fopen(namebuf, "r"); if (!file) a->error("Cannot open %s: %s", namebuf, strerror(errno)); - for (i = 0; i < 7; i++) + for (i = 0; i < 7+6+4+1; i++) { unsigned long long start, end, size, flags; if (!fgets(buf, sizeof(buf), file)) @@ -177,16 +180,55 @@ flags &= PCI_ADDR_FLAG_MASK; d->base_addr[i] = start | flags; d->size[i] = size; + have_bar_bases = 1; } - else + else if (i == 6) { d->rom_flags = flags; flags &= PCI_ADDR_FLAG_MASK; d->rom_base_addr = start | flags; d->rom_size = size; + have_rom_base = 1; } + else if (i < 7+6+4) + { + /* + * If kernel was compiled without CONFIG_PCI_IOV option then after + * the ROM line for configured bridge device (that which had set + * subordinary bus number to non-zero value) are four additional lines + * which describe resources behind bridge. For PCI-to-PCI bridges they + * are: IO, MEM, PREFMEM and empty. For CardBus bridges they are: IO0, + * IO1, MEM0 and MEM1. For unconfigured bridges and other devices + * there is no additional line after the ROM line. If kernel was + * compiled with CONFIG_PCI_IOV option then after the ROM line and + * before the first bridge resource line are six additional lines + * which describe IOV resources. Read all remaining lines in resource + * file and based on the number of remaining lines (0, 4, 6, 10) parse + * resources behind bridge. + */ + lines[i-7].flags = flags; + lines[i-7].base_addr = start; + lines[i-7].size = size; + } + } + if (i == 7+4 || i == 7+6+4) + { + int offset = (i == 7+6+4) ? 6 : 0; + for (i = 0; i < 4; i++) + { + d->bridge_flags[i] = lines[offset+i].flags; + d->bridge_base_addr[i] = lines[offset+i].base_addr; + d->bridge_size[i] = lines[offset+i].size; + } + have_bridge_bases = 1; } fclose(file); + if (!have_bar_bases) + clear_fill(d, PCI_FILL_BASES | PCI_FILL_SIZES | PCI_FILL_IO_FLAGS); + if (!have_rom_base) + clear_fill(d, PCI_FILL_ROM_BASE); + if (!have_bridge_bases) + clear_fill(d, PCI_FILL_BRIDGE_BASES); } static void sysfs_scan(struct pci_access *a) @@ -288,10 +330,10 @@ closedir(dir); } -static unsigned int +static void sysfs_fill_info(struct pci_dev *d, unsigned int flags) { - unsigned int done = 0; + int value, want_class, want_class_ext; if (!d->access->buscentric) { @@ -300,61 +342,106 @@ * the kernel's view, which has regions and IRQs remapped and other fields * (most importantly classes) possibly fixed if the device is known broken. */ - if (flags & PCI_FILL_IDENT) + if (want_fill(d, flags, PCI_FILL_IDENT)) { d->vendor_id = sysfs_get_value(d, "vendor", 1); d->device_id = sysfs_get_value(d, "device", 1); - done |= PCI_FILL_IDENT; } - if (flags & PCI_FILL_CLASS) - { - d->device_class = sysfs_get_value(d, "class", 1) >> 8; - done |= PCI_FILL_CLASS; + want_class = want_fill(d, flags, PCI_FILL_CLASS); + want_class_ext = want_fill(d, flags, PCI_FILL_CLASS_EXT); + if (want_class || want_class_ext) + { + value = sysfs_get_value(d, "class", 1); + if (want_class) + d->device_class = value >> 8; + if (want_class_ext) + { + d->prog_if = value & 0xff; + value = sysfs_get_value(d, "revision", 0); + if (value < 0) + value = pci_read_byte(d, PCI_REVISION_ID); + if (value >= 0) + d->rev_id = value; + } } - if (flags & PCI_FILL_IRQ) + if (want_fill(d, flags, PCI_FILL_SUBSYS)) { - d->irq = sysfs_get_value(d, "irq", 1); - done |= PCI_FILL_IRQ; + value = sysfs_get_value(d, "subsystem_vendor", 0); + if (value >= 0) + { + d->subsys_vendor_id = value; + value = sysfs_get_value(d, "subsystem_device", 0); + if (value >= 0) + d->subsys_id = value; + } + else + clear_fill(d, PCI_FILL_SUBSYS); } - if (flags & (PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | PCI_FILL_IO_FLAGS)) - { + if (want_fill(d, flags, PCI_FILL_IRQ)) + d->irq = sysfs_get_value(d, "irq", 1); + if (want_fill(d, flags, PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | PCI_FILL_IO_FLAGS | PCI_FILL_BRIDGE_BASES)) sysfs_get_resources(d); - done |= PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | PCI_FILL_IO_FLAGS; + if (want_fill(d, flags, PCI_FILL_PARENT)) + { + unsigned int domain, bus, dev, func; + char *path_abs, *path_canon, *name; + char path_rel[OBJNAMELEN]; + struct pci_dev *parent; + + /* Construct sysfs path for parent device */ + sysfs_obj_name(d, "..", path_rel); + path_abs = realpath(path_rel, NULL); + name = path_abs ? strrchr(path_abs, '/') : NULL; + name = name ? name+1 : name; + parent = NULL; + + if (name && sscanf(name, "%x:%x:%x.%d", &domain, &bus, &dev, &func) == 4 && domain <= 0x7fffffff) + for (parent = d->access->devices; parent; parent = parent->next) + if (parent->domain == (int)domain && parent->bus == bus && parent->dev == dev && parent->func == func) + break; + + if (parent) + { + /* Check if parsed BDF address from parent sysfs device is really expected PCI device */ + sysfs_obj_name(parent, ".", path_rel); + path_canon = realpath(path_rel, NULL); + if (!path_canon || strcmp(path_canon, path_abs) != 0) + parent = NULL; + } + + if (parent) + d->parent = parent; + else + clear_fill(d, PCI_FILL_PARENT); } } - if (flags & PCI_FILL_PHYS_SLOT) + if (want_fill(d, flags, PCI_FILL_PHYS_SLOT)) { struct pci_dev *pd; sysfs_fill_slots(d->access); for (pd = d->access->devices; pd; pd = pd->next) pd->known_fields |= PCI_FILL_PHYS_SLOT; - done |= PCI_FILL_PHYS_SLOT; } - if (flags & PCI_FILL_MODULE_ALIAS) + if (want_fill(d, flags, PCI_FILL_MODULE_ALIAS)) { char buf[OBJBUFSIZE]; if (sysfs_get_string(d, "modalias", buf, 0)) d->module_alias = pci_set_property(d, PCI_FILL_MODULE_ALIAS, buf); - done |= PCI_FILL_MODULE_ALIAS; } - if (flags & PCI_FILL_LABEL) + if (want_fill(d, flags, PCI_FILL_LABEL)) { char buf[OBJBUFSIZE]; if (sysfs_get_string(d, "label", buf, 0)) d->label = pci_set_property(d, PCI_FILL_LABEL, buf); - done |= PCI_FILL_LABEL; } - if (flags & PCI_FILL_NUMA_NODE) - { - d->numa_node = sysfs_get_value(d, "numa_node", 0); - done |= PCI_FILL_NUMA_NODE; - } + if (want_fill(d, flags, PCI_FILL_NUMA_NODE)) + d->numa_node = sysfs_get_value(d, "numa_node", 0); - if (flags & PCI_FILL_IOMMU_GROUP) + if (want_fill(d, flags, PCI_FILL_IOMMU_GROUP)) { char *group_link = sysfs_deref_link(d, "iommu_group"); if (group_link) @@ -362,10 +449,9 @@ pci_set_property(d, PCI_FILL_IOMMU_GROUP, basename(group_link)); free(group_link); } - done |= PCI_FILL_IOMMU_GROUP; } - if (flags & PCI_FILL_DT_NODE) + if (want_fill(d, flags, PCI_FILL_DT_NODE)) { char *node = sysfs_deref_link(d, "of_node"); if (node) @@ -373,10 +459,23 @@ pci_set_property(d, PCI_FILL_DT_NODE, node); free(node); } - done |= PCI_FILL_DT_NODE; } - return done | pci_generic_fill_info(d, flags & ~done); + if (want_fill(d, flags, PCI_FILL_DRIVER)) + { + char *driver_path = sysfs_deref_link(d, "driver"); + if (driver_path) + { + char *driver = strrchr(driver_path, '/'); + driver = driver ? driver+1 : driver_path; + pci_set_property(d, PCI_FILL_DRIVER, driver); + free(driver_path); + } + else + clear_fill(d, PCI_FILL_DRIVER); + } + + pci_generic_fill_info(d, flags); } /* Intent of the sysfs_setup() caller */ diff -Nru pciutils-3.7.0/lib/types.h pciutils-3.8.0/lib/types.h --- pciutils-3.7.0/lib/types.h 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lib/types.h 2022-02-10 12:46:16.000000000 +0000 @@ -1,7 +1,7 @@ /* * The PCI Library -- Types and Format Strings * - * Copyright (c) 1997--2017 Martin Mares + * Copyright (c) 1997--2022 Martin Mares * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -11,13 +11,14 @@ #ifndef PCI_HAVE_Uxx_TYPES #ifdef PCI_OS_WINDOWS -/* On Windows compilers, use */ -#include +/* On Windows compilers, use */ +#include typedef BYTE u8; typedef WORD u16; typedef DWORD u32; typedef unsigned __int64 u64; #define PCI_U64_FMT_X "I64x" +#define PCI_U64_FMT_U "I64u" #elif defined(PCI_HAVE_STDINT_H) || (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) /* Use standard types in C99 and newer */ @@ -28,6 +29,7 @@ typedef uint32_t u32; typedef uint64_t u64; #define PCI_U64_FMT_X PRIx64 +#define PCI_U64_FMT_U PRIu64 #else /* Hope for POSIX types from */ @@ -40,9 +42,11 @@ #if ULONG_MAX > 0xffffffff typedef unsigned long u64; #define PCI_U64_FMT_X "lx" +#define PCI_U64_FMT_U "lu" #else typedef unsigned long long u64; #define PCI_U64_FMT_X "llx" +#define PCI_U64_FMT_U "llu" #endif #endif @@ -70,6 +74,8 @@ #if defined(__GNUC__) && __GNUC__ > 2 #define PCI_PRINTF(x,y) __attribute__((format(printf, x, y))) +#define PCI_NONRET __attribute((noreturn)) #else #define PCI_PRINTF(x,y) +#define PCI_NONRET #endif diff -Nru pciutils-3.7.0/lib/win32-cfgmgr32.c pciutils-3.8.0/lib/win32-cfgmgr32.c --- pciutils-3.7.0/lib/win32-cfgmgr32.c 1970-01-01 00:00:00.000000000 +0000 +++ pciutils-3.8.0/lib/win32-cfgmgr32.c 2022-04-15 21:47:48.000000000 +0000 @@ -0,0 +1,1698 @@ +/* + * The PCI Library -- List PCI devices on Win32 via Configuration Manager + * + * Copyright (c) 2021 Pali Rohár + * + * Can be freely distributed and used under the terms of the GNU GPL. + */ + +#include +#include + +#include /* for isxdigit() */ +#include /* for sprintf() */ +#include /* for strlen(), strchr(), strncmp() */ +#include /* for wcslen(), wcscpy() */ + +#include "internal.h" + +/* Unfortunately MinGW32 toolchain does not provide these cfgmgr32 constants. */ + +#ifndef RegDisposition_OpenExisting +#define RegDisposition_OpenExisting 0x00000001 +#endif + +#ifndef CM_REGISTRY_SOFTWARE +#define CM_REGISTRY_SOFTWARE 0x00000001 +#endif + +#ifndef CM_DRP_HARDWAREID +#define CM_DRP_HARDWAREID 0x00000002 +#endif +#ifndef CM_DRP_SERVICE +#define CM_DRP_SERVICE 0x00000005 +#endif +#ifndef CM_DRP_BUSNUMBER +#define CM_DRP_BUSNUMBER 0x00000016 +#endif +#ifndef CM_DRP_ADDRESS +#define CM_DRP_ADDRESS 0x0000001D +#endif + +#ifndef CR_INVALID_CONFLICT_LIST +#define CR_INVALID_CONFLICT_LIST 0x00000039 +#endif +#ifndef CR_INVALID_INDEX +#define CR_INVALID_INDEX 0x0000003A +#endif +#ifndef CR_INVALID_STRUCTURE_SIZE +#define CR_INVALID_STRUCTURE_SIZE 0x0000003B +#endif + +#ifndef fIOD_10_BIT_DECODE +#define fIOD_10_BIT_DECODE 0x0004 +#endif +#ifndef fIOD_12_BIT_DECODE +#define fIOD_12_BIT_DECODE 0x0008 +#endif +#ifndef fIOD_16_BIT_DECODE +#define fIOD_16_BIT_DECODE 0x0010 +#endif +#ifndef fIOD_POSITIVE_DECODE +#define fIOD_POSITIVE_DECODE 0x0020 +#endif +#ifndef fIOD_PASSIVE_DECODE +#define fIOD_PASSIVE_DECODE 0x0040 +#endif +#ifndef fIOD_WINDOW_DECODE +#define fIOD_WINDOW_DECODE 0x0080 +#endif +#ifndef fIOD_PORT_BAR +#define fIOD_PORT_BAR 0x0100 +#endif + +#ifndef fMD_WINDOW_DECODE +#define fMD_WINDOW_DECODE 0x0040 +#endif +#ifndef fMD_MEMORY_BAR +#define fMD_MEMORY_BAR 0x0080 +#endif + +/* + * Unfortunately MinGW32 toolchain does not provide import library for these + * cfgmgr32.dll functions. So resolve pointers to these functions at runtime. + */ + +#ifdef CM_Get_DevNode_Registry_PropertyA +#undef CM_Get_DevNode_Registry_PropertyA +#endif +static CONFIGRET (WINAPI *MyCM_Get_DevNode_Registry_PropertyA)(DEVINST dnDevInst, ULONG ulProperty, PULONG pulRegDataType, PVOID Buffer, PULONG pulLength, ULONG ulFlags); +#define CM_Get_DevNode_Registry_PropertyA MyCM_Get_DevNode_Registry_PropertyA + +#ifdef CM_Get_DevNode_Registry_PropertyW +#undef CM_Get_DevNode_Registry_PropertyW +#endif +static CONFIGRET (WINAPI *MyCM_Get_DevNode_Registry_PropertyW)(DEVINST dnDevInst, ULONG ulProperty, PULONG pulRegDataType, PVOID Buffer, PULONG pulLength, ULONG ulFlags); +#define CM_Get_DevNode_Registry_PropertyW MyCM_Get_DevNode_Registry_PropertyW + +#ifndef CM_Open_DevNode_Key +#undef CM_Open_DevNode_Key +#endif +static CONFIGRET (WINAPI *MyCM_Open_DevNode_Key)(DEVINST dnDevNode, REGSAM samDesired, ULONG ulHardwareProfile, REGDISPOSITION Disposition, PHKEY phkDevice, ULONG ulFlags); +#define CM_Open_DevNode_Key MyCM_Open_DevNode_Key + +static BOOL +resolve_cfgmgr32_functions(void) +{ + HMODULE cfgmgr32; + + if (CM_Get_DevNode_Registry_PropertyA && CM_Get_DevNode_Registry_PropertyW && CM_Open_DevNode_Key) + return TRUE; + + cfgmgr32 = GetModuleHandleA("cfgmgr32.dll"); + if (!cfgmgr32) + return FALSE; + + CM_Get_DevNode_Registry_PropertyA = (void *)GetProcAddress(cfgmgr32, "CM_Get_DevNode_Registry_PropertyA"); + CM_Get_DevNode_Registry_PropertyW = (void *)GetProcAddress(cfgmgr32, "CM_Get_DevNode_Registry_PropertyW"); + CM_Open_DevNode_Key = (void *)GetProcAddress(cfgmgr32, "CM_Open_DevNode_Key"); + if (!CM_Get_DevNode_Registry_PropertyA || !CM_Get_DevNode_Registry_PropertyW || !CM_Open_DevNode_Key) + return FALSE; + + return TRUE; +} + +/* + * cfgmgr32.dll uses custom non-Win32 error numbers which are unsupported by + * Win32 APIs like GetLastError() and FormatMessage() functions. + * + * Windows 7 instroduced new cfgmgr32.dll function CM_MapCrToWin32Err() for + * translating mapping CR_* errors to Win32 errors but most error codes are + * not mapped. So this function is unusable. + * + * Error strings for CR_* errors are defined in cmapi.rc file which is + * statically linked into some system libraries (e.g. filemgmt.dll, + * acledit.dll, netui0.dll or netui2.dll) but due to static linking it is + * not possible to access these error strings easily at runtime. + * + * So define own function for translating CR_* errors directly to strings. + */ +static const char * +cr_strerror(CONFIGRET cr_error_id) +{ + static char unknown_error[sizeof("Unknown CR error XXXXXXXXXX")]; + static const char *cr_errors[] = { + "The operation completed successfully", + "CR_DEFAULT", + "Not enough memory is available to process this command", + "A required pointer parameter is invalid", + "The ulFlags parameter specified is invalid for this operation", + "The device instance handle parameter is not valid", + "The supplied resource descriptor parameter is invalid", + "The supplied logical configuration parameter is invalid", + "CR_INVALID_ARBITRATOR", + "CR_INVALID_NODELIST", + "CR_DEVNODE_HAS_REQS/CR_DEVINST_HAS_REQS", + "The RESOURCEID parameter does not contain a valid RESOURCEID", + "CR_DLVXD_NOT_FOUND", + "The specified device instance handle does not correspond to a present device", + "There are no more logical configurations available", + "There are no more resource descriptions available", + "This device instance already exists", + "The supplied range list parameter is invalid", + "CR_INVALID_RANGE", + "A general internal error occurred", + "CR_NO_SUCH_LOGICAL_DEV", + "The device is disabled for this configuration", + "CR_NOT_SYSTEM_VM", + "A service or application refused to allow removal of this device", + "CR_APM_VETOED", + "CR_INVALID_LOAD_TYPE", + "An output parameter was too small to hold all the data available", + "CR_NO_ARBITRATOR", + "CR_NO_REGISTRY_HANDLE", + "A required entry in the registry is missing or an attempt to write to the registry failed", + "The specified Device ID is not a valid Device ID", + "One or more parameters were invalid", + "CR_INVALID_API", + "CR_DEVLOADER_NOT_READY", + "CR_NEED_RESTART", + "There are no more hardware profiles available", + "CR_DEVICE_NOT_THERE", + "The specified value does not exist in the registry", + "CR_WRONG_TYPE", + "The specified priority is invalid for this operation", + "This device cannot be disabled", + "CR_FREE_RESOURCES", + "CR_QUERY_VETOED", + "CR_CANT_SHARE_IRQ", + "CR_NO_DEPENDENT", + "CR_SAME_RESOURCES", + "The specified key does not exist in the registry", + "The specified machine name does not meet the UNC naming conventions", + "A general remote communication error occurred", + "The machine selected for remote communication is not available at this time", + "The Plug and Play service or another required service is not available", + "Access denied", + "This routine is not implemented in this version of the operating system", + "The specified property type is invalid for this operation", + "Device interface is active", + "No such device interface", + "Invalid reference string", + "Invalid conflict list", + "Invalid index", + "Invalid structure size" + }; + if (cr_error_id <= 0 || cr_error_id >= sizeof(cr_errors)/sizeof(*cr_errors)) + { + sprintf(unknown_error, "Unknown CR error %lu", cr_error_id); + return unknown_error; + } + return cr_errors[cr_error_id]; +} + +static const char * +win32_strerror(DWORD win32_error_id) +{ + /* + * Use static buffer which is large enough. + * Hopefully no Win32 API error message string is longer than 4 kB. + */ + static char buffer[4096]; + DWORD len; + + len = FormatMessageA(FORMAT_MESSAGE_FROM_SYSTEM | FORMAT_MESSAGE_IGNORE_INSERTS, NULL, win32_error_id, MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), buffer, sizeof(buffer), NULL); + + /* FormatMessage() automatically appends ".\r\n" to the error message. */ + if (len && buffer[len-1] == '\n') + buffer[--len] = '\0'; + if (len && buffer[len-1] == '\r') + buffer[--len] = '\0'; + if (len && buffer[len-1] == '.') + buffer[--len] = '\0'; + + if (!len) + sprintf(buffer, "Unknown Win32 error %lu", win32_error_id); + + return buffer; +} + +static int +fmt_validate(const char *s, int len, const char *fmt) +{ + int i; + + for (i = 0; i < len; i++) + if (!fmt[i] || (fmt[i] == '#' ? !isxdigit(s[i]) : fmt[i] != s[i])) + return 0; + + return 1; +} + +static int +seq_xdigit_validate(const char *s, int mult, int min) +{ + int i, len; + + len = strlen(s); + if (len < min*mult || len % mult) + return 0; + + for (i = 0; i < len; i++) + if (!isxdigit(s[i])) + return 0; + + return 1; +} + +static BOOL +is_non_nt_system(void) +{ + OSVERSIONINFOA version; + version.dwOSVersionInfoSize = sizeof(version); + return GetVersionExA(&version) && version.dwPlatformId < VER_PLATFORM_WIN32_NT; +} + +static BOOL +is_32bit_on_win8_64bit_system(void) +{ +#ifdef _WIN64 + return FALSE; +#else + BOOL (WINAPI *MyIsWow64Process)(HANDLE, PBOOL); + OSVERSIONINFOA version; + HMODULE kernel32; + BOOL is_wow64; + + /* Check for Windows 8 (NT 6.2). */ + version.dwOSVersionInfoSize = sizeof(version); + if (!GetVersionExA(&version) || + version.dwPlatformId != VER_PLATFORM_WIN32_NT || + version.dwMajorVersion < 6 || + (version.dwMajorVersion == 6 && version.dwMinorVersion < 2)) + return FALSE; + + /* + * Check for 64-bit system via IsWow64Process() function exported + * from 32-bit kernel32.dll library available on the 64-bit systems. + * Resolve pointer to this function at runtime as this code path is + * primary running on 32-bit systems where are not available 64-bit + * functions. + */ + + kernel32 = GetModuleHandleA("kernel32.dll"); + if (!kernel32) + return FALSE; + + MyIsWow64Process = (void *)GetProcAddress(kernel32, "IsWow64Process"); + if (!MyIsWow64Process) + return FALSE; + + if (!MyIsWow64Process(GetCurrentProcess(), &is_wow64)) + return FALSE; + + return is_wow64; +#endif +} + +static LPWSTR +get_device_service_name(struct pci_access *a, DEVINST devinst, DEVINSTID_A devinst_id, BOOL *supported) +{ + ULONG reg_type, reg_size, reg_len; + LPWSTR service_name; + CONFIGRET cr; + + /* + * All data are stored as 7-bit ASCII strings in system but service name is + * exception. It can contain UNICODE. Moreover it is passed to other Win32 API + * functions and therefore it cannot be converted to 8-bit ANSI string without + * data loss. So use wide function CM_Get_DevNode_Registry_PropertyW() in this + * case and deal with all wchar_t problems... + */ + + reg_size = 0; + cr = CM_Get_DevNode_Registry_PropertyW(devinst, CM_DRP_SERVICE, ®_type, NULL, ®_size, 0); + if (cr == CR_CALL_NOT_IMPLEMENTED) + { + *supported = FALSE; + return NULL; + } + else if (cr == CR_NO_SUCH_VALUE) + { + *supported = TRUE; + return NULL; + } + else if (cr != CR_SUCCESS && + cr != CR_BUFFER_SMALL) + { + a->warning("Cannot retrieve service name for PCI device %s: %s.", devinst_id, cr_strerror(cr)); + *supported = TRUE; + return NULL; + } + else if (reg_type != REG_SZ) + { + a->warning("Cannot retrieve service name for PCI device %s: Service name is stored as unknown type 0x%lx.", devinst_id, reg_type); + *supported = TRUE; + return NULL; + } + +retry: + /* + * Returned size is on older Windows versions without nul-term char. + * So explicitly increase size and fill nul-term byte. + */ + reg_size += sizeof(service_name[0]); + service_name = pci_malloc(a, reg_size); + reg_len = reg_size; + cr = CM_Get_DevNode_Registry_PropertyW(devinst, CM_DRP_SERVICE, ®_type, service_name, ®_len, 0); + service_name[reg_size/sizeof(service_name[0]) - 1] = 0; + if (reg_len > reg_size) + { + pci_mfree(service_name); + reg_size = reg_len; + goto retry; + } + else if (cr != CR_SUCCESS) + { + a->warning("Cannot retrieve service name for PCI device %s: %s.", devinst_id, cr_strerror(cr)); + pci_mfree(service_name); + *supported = TRUE; + return NULL; + } + else if (reg_type != REG_SZ) + { + a->warning("Cannot retrieve service name for PCI device %s: Service name is stored as unknown type 0x%lx.", devinst_id, reg_type); + pci_mfree(service_name); + *supported = TRUE; + return NULL; + } + + + return service_name; +} + +static char* +get_driver_path_for_service(struct pci_access *a, LPCWSTR service_name, SC_HANDLE manager) +{ + UINT (WINAPI *get_system_root_path)(LPWSTR buffer, UINT size) = NULL; + DWORD service_config_size, service_config_len; + LPQUERY_SERVICE_CONFIGW service_config = NULL; + LPWSTR service_image_path = NULL; + SERVICE_STATUS service_status; + SC_HANDLE service = NULL; + char *driver_path = NULL; + UINT systemroot_len; + int driver_path_len; + HMODULE kernel32; + DWORD error; + + service = OpenServiceW(manager, service_name, SERVICE_QUERY_CONFIG | SERVICE_QUERY_STATUS); + if (!service) + { + error = GetLastError(); + if (error != ERROR_SERVICE_DOES_NOT_EXIST) + a->warning("Cannot open service %ls with query rights: %s.", service_name, win32_strerror(error)); + goto out; + } + + if (!QueryServiceStatus(service, &service_status)) + { + error = GetLastError(); + a->warning("Cannot query status of service %ls: %s.", service_name, win32_strerror(error)); + goto out; + } + + if (service_status.dwCurrentState == SERVICE_STOPPED) + goto out; + + if (service_status.dwServiceType != SERVICE_KERNEL_DRIVER) + goto out; + + if (!QueryServiceConfigW(service, NULL, 0, &service_config_size)) + { + error = GetLastError(); + if (error != ERROR_INSUFFICIENT_BUFFER) + { + a->warning("Cannot query config of service %ls: %s.", service_name, win32_strerror(error)); + goto out; + } + } + +retry_service_config: + service_config = pci_malloc(a, service_config_size); + if (!QueryServiceConfigW(service, service_config, service_config_size, &service_config_len)) + { + error = GetLastError(); + if (error == ERROR_INSUFFICIENT_BUFFER) + { + pci_mfree(service_config); + service_config_size = service_config_len; + goto retry_service_config; + } + a->warning("Cannot query config of service %ls: %s.", service_name, win32_strerror(error)); + goto out; + } + + if (service_config->dwServiceType != SERVICE_KERNEL_DRIVER) + goto out; + + /* + * Despite QueryServiceConfig() is Win32 API, it returns lpBinaryPathName + * (ImagePath registry) in NT format. Unfortunately there is no Win32 + * function for converting NT paths to Win32 paths. So do it manually and + * convert this NT format to human-readable Win32 path format. + */ + + /* + * Old Windows versions return path to NT SystemRoot namespace via + * GetWindowsDirectoryW() function. New Windows versions via + * GetSystemWindowsDirectoryW(). GetSystemWindowsDirectoryW() is not + * provided in old Windows versions, so use GetProcAddress() for + * compatibility with all Windows versions. + */ + kernel32 = GetModuleHandleW(L"kernel32.dll"); + if (kernel32) + get_system_root_path = (void *)GetProcAddress(kernel32, "GetSystemWindowsDirectoryW"); + if (!get_system_root_path) + get_system_root_path = &GetWindowsDirectoryW; + + systemroot_len = get_system_root_path(NULL, 0); + + if (!service_config->lpBinaryPathName || !service_config->lpBinaryPathName[0]) + { + /* No ImagePath is specified, NT kernel assumes implicit kernel driver path by service name. */ + service_image_path = pci_malloc(a, sizeof(WCHAR) * (systemroot_len + sizeof("\\System32\\drivers\\")-1 + wcslen(service_name) + sizeof(".sys")-1 + 1)); + systemroot_len = get_system_root_path(service_image_path, systemroot_len+1); + if (systemroot_len && service_image_path[systemroot_len-1] != L'\\') + service_image_path[systemroot_len++] = L'\\'; + wcscpy(service_image_path + systemroot_len, L"System32\\drivers\\"); + wcscpy(service_image_path + systemroot_len + sizeof("System32\\drivers\\")-1, service_name); + wcscpy(service_image_path + systemroot_len + sizeof("System32\\drivers\\")-1 + wcslen(service_name), L".sys"); + } + else if (wcsncmp(service_config->lpBinaryPathName, L"\\SystemRoot\\", sizeof("\\SystemRoot\\")-1) == 0) + { + /* ImagePath is in NT SystemRoot namespace, convert to Win32 path via GetSystemWindowsDirectoryW()/GetWindowsDirectoryW(). */ + service_image_path = pci_malloc(a, sizeof(WCHAR) * (systemroot_len + wcslen(service_config->lpBinaryPathName) - (sizeof("\\SystemRoot")-1))); + systemroot_len = get_system_root_path(service_image_path, systemroot_len+1); + if (systemroot_len && service_image_path[systemroot_len-1] != L'\\') + service_image_path[systemroot_len++] = L'\\'; + wcscpy(service_image_path + systemroot_len, service_config->lpBinaryPathName + sizeof("\\SystemRoot\\")-1); + } + else if (wcsncmp(service_config->lpBinaryPathName, L"\\??\\UNC\\", sizeof("\\??\\UNC\\")-1) == 0) + { + /* ImagePath is in NT UNC namespace, convert to Win32 UNC path via "\\\\" prefix. */ + service_image_path = pci_malloc(a, sizeof(WCHAR) * (sizeof("\\\\") + wcslen(service_config->lpBinaryPathName) - (sizeof("\\??\\UNC\\")-1))); + wcscpy(service_image_path, L"\\\\"); + wcscpy(service_image_path + sizeof("\\\\")-1, service_config->lpBinaryPathName + sizeof("\\??\\UNC\\")-1); + } + else if (wcsncmp(service_config->lpBinaryPathName, L"\\??\\", sizeof("\\??\\")-1) == 0) + { + /* ImagePath is in NT Global?? namespace, root of the Win32 file namespace, so just remove "\\??\\" prefix to get Win32 path. */ + service_image_path = pci_malloc(a, sizeof(WCHAR) * (wcslen(service_config->lpBinaryPathName) - (sizeof("\\??\\")-1))); + wcscpy(service_image_path, service_config->lpBinaryPathName + sizeof("\\??\\")-1); + } + else if (service_config->lpBinaryPathName[0] != L'\\') + { + /* ImagePath is relative to the NT SystemRoot namespace, convert to Win32 path via GetSystemWindowsDirectoryW()/GetWindowsDirectoryW(). */ + service_image_path = pci_malloc(a, sizeof(WCHAR) * (systemroot_len + sizeof("\\") + wcslen(service_config->lpBinaryPathName))); + systemroot_len = get_system_root_path(service_image_path, systemroot_len+1); + if (systemroot_len && service_image_path[systemroot_len-1] != L'\\') + service_image_path[systemroot_len++] = L'\\'; + wcscpy(service_image_path + systemroot_len, service_config->lpBinaryPathName); + } + else + { + /* ImagePath is in some unhandled NT namespace, copy it as is. It cannot be used in Win32 API but libpci user can be still interested in it. */ + service_image_path = pci_malloc(a, sizeof(WCHAR) * wcslen(service_config->lpBinaryPathName)); + wcscpy(service_image_path, service_config->lpBinaryPathName); + } + + /* Calculate len of buffer needed for conversion from LPWSTR to char*. */ + driver_path_len = WideCharToMultiByte(CP_ACP, 0, service_image_path, -1, NULL, 0, NULL, NULL); + if (driver_path_len <= 0) + { + error = GetLastError(); + a->warning("Cannot convert kernel driver path from wide string to 8-bit string: %s.", win32_strerror(error)); + goto out; + } + + driver_path = pci_malloc(a, driver_path_len); + driver_path_len = WideCharToMultiByte(CP_ACP, 0, service_image_path, -1, driver_path, driver_path_len, NULL, NULL); + if (driver_path_len <= 0) + { + error = GetLastError(); + a->warning("Cannot convert kernel driver path from wide string to 8-bit string: %s.", win32_strerror(error)); + pci_mfree(driver_path); + driver_path = NULL; + goto out; + } + +out: + if (service_image_path) + pci_mfree(service_image_path); + if (service_config) + pci_mfree(service_config); + if (service) + CloseServiceHandle(service); + return driver_path; +} + +static HKEY +get_device_driver_devreg(struct pci_access *a, DEVINST devinst, DEVINSTID_A devinst_id) +{ + CONFIGRET cr; + HKEY key; + + cr = CM_Open_DevNode_Key(devinst, KEY_READ, 0, RegDisposition_OpenExisting, &key, CM_REGISTRY_SOFTWARE); + if (cr != CR_SUCCESS) + { + if (cr != CR_NO_SUCH_VALUE) + a->warning("Cannot retrieve driver key for device %s: %s.", devinst_id, cr_strerror(cr)); + return NULL; + } + + return key; +} + +static char* +read_reg_key_string_value(struct pci_access *a, HKEY key, const char *name, DWORD *unkn_reg_type) +{ + DWORD reg_type, reg_size, reg_len; + char *value; + LONG error; + + reg_size = 0; + error = RegQueryValueExA(key, name, NULL, ®_type, NULL, ®_size); + if (error != ERROR_SUCCESS && + error != ERROR_MORE_DATA) + { + SetLastError(error); + return NULL; + } + else if (reg_type != REG_SZ) + { + SetLastError(0); + *unkn_reg_type = reg_type; + return NULL; + } + +retry: + value = pci_malloc(a, reg_size + 1); + reg_len = reg_size; + error = RegQueryValueExA(key, name, NULL, ®_type, (PBYTE)value, ®_len); + if (error != ERROR_SUCCESS) + { + pci_mfree(value); + if (error == ERROR_MORE_DATA) + { + reg_size = reg_len; + goto retry; + } + SetLastError(error); + return NULL; + } + else if (reg_type != REG_SZ) + { + pci_mfree(value); + SetLastError(0); + *unkn_reg_type = reg_type; + return NULL; + } + value[reg_len] = '\0'; + + return value; +} + +static int +driver_cmp(const char *driver, const char *match) +{ + int len = strlen(driver); + if (driver[0] == '*') + driver++; + if (len >= 4 && strcasecmp(driver + len - 4, ".vxd") == 0) + len -= 4; + return strncasecmp(driver, match, len); +} + +static char* +get_driver_path_for_regkey(struct pci_access *a, DEVINSTID_A devinst_id, HKEY key) +{ + char *driver_list, *driver, *driver_next; + char *subdriver, *subname; + char *driver_ptr; + char *driver_path; + DWORD unkn_reg_type; + UINT systemdir_len; + HKEY subkey; + LONG error; + BOOL vmm32; + BOOL noext; + int len; + + driver_list = read_reg_key_string_value(a, key, "DevLoader", &unkn_reg_type); + if (!driver_list) + { + error = GetLastError(); + if (error == 0) + a->warning("Cannot read driver DevLoader key for PCI device %s: DevLoader key is stored as unknown type 0x%lx.", devinst_id, unkn_reg_type); + else if (error != ERROR_FILE_NOT_FOUND) + a->warning("Cannot read driver DevLoader key for PCI device %s: %s.", devinst_id, win32_strerror(error)); + return NULL; + } + + subdriver = NULL; + driver = driver_list; + while (*driver) + { + driver_next = strchr(driver, ','); + if (driver_next) + *(driver_next++) = '\0'; + + if (driver_cmp(driver, "ios") == 0 || + driver_cmp(driver, "vcomm") == 0) + subname = "PortDriver"; + else if (driver_cmp(driver, "ntkern") == 0) + subname = "NTMPDriver"; + else if (driver_cmp(driver, "ndis") == 0) + subname = "DeviceVxDs"; + else if (driver_cmp(driver, "vdd") == 0) + subname = "minivdd"; + else + subname = NULL; + + subkey = key; + if (subname && strcmp(subname, "minivdd") == 0) + { + error = RegOpenKeyA(key, "Default", &subkey); + if (error != ERROR_SUCCESS) + { + a->warning("Cannot open driver subkey Default for PCI device %s: %s.", devinst_id, win32_strerror(error)); + subkey = NULL; + } + } + + if (!subname) + break; + + if (subkey) + { +retry_subname: + subdriver = read_reg_key_string_value(a, subkey, subname, &unkn_reg_type); + if (!subdriver) + { + error = GetLastError(); + if (error == 0) + a->warning("Cannot read driver %s key for PCI device %s: DevLoader key is stored as unknown type 0x%lx.", subname, devinst_id, unkn_reg_type); + else if (error != ERROR_FILE_NOT_FOUND) + a->warning("Cannot read driver %s key for PCI device %s: %s.", subname, devinst_id, win32_strerror(error)); + else if (strcmp(subname, "minivdd") == 0) + { + subname = "drv"; + goto retry_subname; + } + else if (strcmp(subname, "drv") == 0) + { + subname = "vdd"; + goto retry_subname; + } + } + + if (subkey != key) + RegCloseKey(subkey); + + if (subdriver) + { + char *endptr = strchr(subdriver, ','); + if (endptr) + *endptr = '\0'; + break; + } + } + + driver = driver_next; + } + + if (subdriver && subdriver[0]) + driver_ptr = subdriver; + else if (driver[0]) + driver_ptr = driver; + else + driver_ptr = NULL; + + if (driver_ptr && driver_ptr[0] == '*') + { + vmm32 = TRUE; + driver_ptr++; + } + else + vmm32 = FALSE; + + if (!driver_ptr[0]) + driver_ptr = NULL; + + len = driver_ptr ? strlen(driver_ptr) : 0; + noext = driver_ptr && (len < 4 || driver_ptr[len-4] != '.'); + + if (!driver_ptr) + driver_path = NULL; + else + { + if (tolower(driver_ptr[0]) >= 'a' && tolower(driver_ptr[0]) <= 'z' && driver_ptr[1] == ':') + { + /* Driver is already with absolute path. */ + driver_path = pci_strdup(a, driver_ptr); + } + else if (driver_cmp(driver, "ntkern") == 0 && subdriver) + { + /* Driver is relative to system32\drivers\ directory which is relative to windows directory. */ + systemdir_len = GetWindowsDirectoryA(NULL, 0); + driver_path = pci_malloc(a, systemdir_len + 1 + sizeof("system32\\drivers\\")-1 + strlen(driver_ptr) + 4 + 1); + systemdir_len = GetWindowsDirectoryA(driver_path, systemdir_len + 1); + if (systemdir_len && driver_path[systemdir_len - 1] != '\\') + driver_path[systemdir_len++] = '\\'; + sprintf(driver_path + systemdir_len, "system32\\drivers\\%s%s", driver_ptr, noext ? ".sys" : ""); + } + else if (vmm32) + { + /* Driver is packed in vmm32.vxd which is stored in system directory. */ + systemdir_len = GetSystemDirectoryA(NULL, 0); + driver_path = pci_malloc(a, systemdir_len + 1 + sizeof("vmm32.vxd ()")-1 + strlen(driver_ptr) + 4 + 1); + systemdir_len = GetSystemDirectoryA(driver_path, systemdir_len + 1); + if (systemdir_len && driver_path[systemdir_len - 1] != '\\') + driver_path[systemdir_len++] = '\\'; + sprintf(driver_path + systemdir_len, "vmm32.vxd (%s%s)", driver_ptr, noext ? ".vxd" : ""); + } + else + { + /* Otherwise driver is relative to system directory. */ + systemdir_len = GetSystemDirectoryA(NULL, 0); + driver_path = pci_malloc(a, systemdir_len + 1 + strlen(driver_ptr) + 4 + 1); + systemdir_len = GetSystemDirectoryA(driver_path, systemdir_len + 1); + if (systemdir_len && driver_path[systemdir_len - 1] != '\\') + driver_path[systemdir_len++] = '\\'; + sprintf(driver_path + systemdir_len, "%s%s", driver_ptr, noext ? ".vxd" : ""); + } + } + + if (subdriver) + pci_mfree(subdriver); + pci_mfree(driver_list); + return driver_path; +} + +static char * +get_device_driver_path(struct pci_dev *d, SC_HANDLE manager, BOOL manager_supported) +{ + struct pci_access *a = d->access; + BOOL service_supported = TRUE; + DEVINSTID_A devinst_id = NULL; + LPWSTR service_name = NULL; + ULONG devinst_id_len = 0; + char *driver_path = NULL; + DEVINST devinst = (DEVINST)d->aux; + ULONG problem = 0; + ULONG status = 0; + HKEY key = NULL; + + if (CM_Get_DevNode_Status(&status, &problem, devinst, 0) != CR_SUCCESS || !(status & DN_DRIVER_LOADED)) + return NULL; + + if (CM_Get_Device_ID_Size(&devinst_id_len, devinst, 0) == CR_SUCCESS) + { + devinst_id = pci_malloc(a, devinst_id_len + 1); + if (CM_Get_Device_IDA(devinst, devinst_id, devinst_id_len + 1, 0) != CR_SUCCESS) + { + pci_mfree(devinst_id); + devinst_id = pci_strdup(a, "UNKNOWN"); + } + } + else + devinst_id = pci_strdup(a, "UNKNOWN"); + + service_name = get_device_service_name(d->access, devinst, devinst_id, &service_supported); + if ((!service_name || !manager) && service_supported && manager_supported) + goto out; + else if (service_name && manager) + { + driver_path = get_driver_path_for_service(d->access, service_name, manager); + goto out; + } + + key = get_device_driver_devreg(d->access, devinst, devinst_id); + if (key) + { + driver_path = get_driver_path_for_regkey(d->access, devinst_id, key); + goto out; + } + +out: + if (key) + RegCloseKey(key); + if (service_name) + pci_mfree(service_name); + pci_mfree(devinst_id); + return driver_path; +} + +static void +fill_drivers(struct pci_access *a) +{ + BOOL manager_supported; + SC_HANDLE manager; + struct pci_dev *d; + char *driver; + DWORD error; + + /* ERROR_CALL_NOT_IMPLEMENTED is returned on systems without Service Manager support. */ + manager_supported = TRUE; + manager = OpenSCManagerW(NULL, NULL, SC_MANAGER_CONNECT); + if (!manager) + { + error = GetLastError(); + if (error != ERROR_CALL_NOT_IMPLEMENTED) + a->warning("Cannot open Service Manager with connect right: %s.", win32_strerror(error)); + else + manager_supported = FALSE; + } + + for (d = a->devices; d; d = d->next) + { + driver = get_device_driver_path(d, manager, manager_supported); + if (driver) + { + pci_set_property(d, PCI_FILL_DRIVER, driver); + pci_mfree(driver); + } + d->known_fields |= PCI_FILL_DRIVER; + } + + if (manager) + CloseServiceHandle(manager); +} + +static void +fill_resources(struct pci_dev *d, DEVINST devinst, DEVINSTID_A devinst_id) +{ + struct pci_access *a = d->access; + + CONFIGRET cr; + + LOG_CONF config; + ULONG problem; + ULONG status; + + RES_DES prev_res_des; + RES_DES res_des; + RESOURCEID res_id; + DWORD bar_res_count; + + BOOL is_bar_res; + BOOL non_nt_system; + + int last_irq = -1; + int last_shared_irq = -1; + + cr = CM_Get_DevNode_Status(&status, &problem, devinst, 0); + if (cr != CR_SUCCESS) + { + a->warning("Cannot retrieve status of PCI device %s: %s.", devinst_id, cr_strerror(cr)); + return; + } + + cr = CR_NO_MORE_LOG_CONF; + + /* + * If the device is running then retrieve allocated configuration by PnP + * manager which is currently in use by a device. + */ + if (!(status & DN_HAS_PROBLEM)) + cr = CM_Get_First_Log_Conf(&config, devinst, ALLOC_LOG_CONF); + + /* + * If the device is not running or it does not have allocated configuration by + * PnP manager then retrieve forced configuration which prevents PnP manager + * from assigning resources. + */ + if (cr == CR_NO_MORE_LOG_CONF) + cr = CM_Get_First_Log_Conf(&config, devinst, FORCED_LOG_CONF); + + /* + * If the device does not have neither allocated configuration by PnP manager + * nor forced configuration and it is not disabled in the BIOS then retrieve + * boot configuration supplied by the BIOS. + */ + if (cr == CR_NO_MORE_LOG_CONF && + (!(status & DN_HAS_PROBLEM) || problem != CM_PROB_HARDWARE_DISABLED)) + cr = CM_Get_First_Log_Conf(&config, devinst, BOOT_LOG_CONF); + + if (cr != CR_SUCCESS) + { + /* + * Note: Starting with Windows 8, CM_Get_First_Log_Conf returns + * CR_CALL_NOT_IMPLEMENTED when used in a Wow64 scenario. + * To request information about the hardware resources on a local machine + * it is necessary implement an architecture-native version of the + * application using the hardware resource APIs. For example: An AMD64 + * application for AMD64 systems. + */ + if (cr == CR_CALL_NOT_IMPLEMENTED && is_32bit_on_win8_64bit_system()) + { + static BOOL warn_once = FALSE; + if (!warn_once) + { + warn_once = TRUE; + a->warning("Cannot retrieve resources of PCI devices from 32-bit application on 64-bit system."); + } + } + else if (cr != CR_NO_MORE_LOG_CONF) + a->warning("Cannot retrieve resources of PCI device %s: %s.", devinst_id, cr_strerror(cr)); + return; + } + + bar_res_count = 0; + non_nt_system = is_non_nt_system(); + + is_bar_res = TRUE; + if (non_nt_system) + { + BOOL has_child; + DEVINST child; + ULONG child_name_len; + PSTR child_name; + BOOL is_bridge; + + if (CM_Get_Child(&child, devinst, 0) != CR_SUCCESS) + has_child = FALSE; + else if (CM_Get_Device_ID_Size(&child_name_len, child, 0) != CR_SUCCESS) + has_child = FALSE; + else + { + child_name_len++; + child_name = pci_malloc(a, child_name_len); + if (CM_Get_Device_IDA(child, child_name, child_name_len, 0) != CR_SUCCESS) + has_child = FALSE; + else if (strncmp(child_name, "PCI\\", 4) != 0) + has_child = FALSE; + else + has_child = TRUE; + pci_mfree(child_name); + } + + if (has_child || d->device_class == PCI_CLASS_BRIDGE_PCI || d->device_class == PCI_CLASS_BRIDGE_CARDBUS) + is_bridge = TRUE; + else + is_bridge = FALSE; + + if (is_bridge) + is_bar_res = FALSE; + } + + prev_res_des = (RES_DES)config; + while ((cr = CM_Get_Next_Res_Des(&res_des, prev_res_des, ResType_All, &res_id, 0)) == CR_SUCCESS) + { + pciaddr_t start, end, size, flags; + ULONG res_des_data_size; + PBYTE res_des_data; + + if (prev_res_des != config) + CM_Free_Res_Des_Handle(prev_res_des); + + prev_res_des = res_des; + + cr = CM_Get_Res_Des_Data_Size(&res_des_data_size, res_des, 0); + if (cr != CR_SUCCESS) + { + a->warning("Cannot retrieve resource data of PCI device %s: %s.", devinst_id, cr_strerror(cr)); + continue; + } + + if (!res_des_data_size) + { + a->warning("Cannot retrieve resource data of PCI device %s: %s.", devinst_id, "Empty data"); + continue; + } + + res_des_data = pci_malloc(a, res_des_data_size); + cr = CM_Get_Res_Des_Data(res_des, res_des_data, res_des_data_size, 0); + if (cr != CR_SUCCESS) + { + a->warning("Cannot retrieve resource data of PCI device %s: %s.", devinst_id, cr_strerror(cr)); + pci_mfree(res_des_data); + continue; + } + + /* + * There can be more resources with the same id. In this case we are + * interested in the last one in the list as at the beginning of the list + * can be some virtual resources (which are not set in PCI config space). + */ + + if (res_id == ResType_IO) + { + PIO_RESOURCE io_data = (PIO_RESOURCE)res_des_data; + + start = io_data->IO_Header.IOD_Alloc_Base; + end = io_data->IO_Header.IOD_Alloc_End; + size = (end > start) ? (end - start + 1) : 0; + flags = PCI_IORESOURCE_IO; + + /* + * If neither 10-bit, 12-bit, nor 16-bit support is presented then + * expects that this is 32-bit I/O resource. If resource does not fit + * into 16-bit space then it must be 32-bit. If PCI I/O resource is + * not 32-bit then it is 16-bit. + */ + if (end <= 0xffff && (io_data->IO_Header.IOD_DesFlags & (fIOD_10_BIT_DECODE|fIOD_12_BIT_DECODE|fIOD_16_BIT_DECODE))) + flags |= PCI_IORESOURCE_IO_16BIT_ADDR; + + /* + * 16/32-bit non-NT systems do not support these two flags. + * Most NT-based Windows versions support only the fIOD_WINDOW_DECODE + * flag and put all BAR resources before window resources in this + * resource list. So use this fIOD_WINDOW_DECODE flag as separator + * between IO/MEM windows and IO/MEM BARs of PCI Bridges. + */ + if (io_data->IO_Header.IOD_DesFlags & fIOD_WINDOW_DECODE) + is_bar_res = FALSE; + else if (io_data->IO_Header.IOD_DesFlags & fIOD_PORT_BAR) + is_bar_res = TRUE; + + if (is_bar_res && bar_res_count < 6) + { + d->flags[bar_res_count] = flags; + d->base_addr[bar_res_count] = start; + d->size[bar_res_count] = size; + bar_res_count++; + } + else if (!is_bar_res) + { + d->bridge_flags[0] = flags; + d->bridge_base_addr[0] = start; + d->bridge_size[0] = size; + d->known_fields |= PCI_FILL_BRIDGE_BASES; + } + } + else if (res_id == ResType_Mem) + { + PMEM_RESOURCE mem_data = (PMEM_RESOURCE)res_des_data; + + start = mem_data->MEM_Header.MD_Alloc_Base; + end = mem_data->MEM_Header.MD_Alloc_End; + size = (end > start) ? (end - start + 1) : 0; + flags = PCI_IORESOURCE_MEM; + + /* + * If fMD_PrefetchAllowed flag is set then this is + * PCI Prefetchable Memory resource. + */ + if ((mem_data->MEM_Header.MD_Flags & mMD_Prefetchable) == fMD_PrefetchAllowed) + flags |= PCI_IORESOURCE_PREFETCH; + + /* If resource does not fit into 32-bit space then it must be 64-bit. */ + if (is_bar_res && end > 0xffffffff) + flags |= PCI_IORESOURCE_MEM_64; + + /* + * These two flags (fMD_WINDOW_DECODE and fMD_MEMORY_BAR) are + * unsupported on most Windows versions, so distinguish between + * window and BAR based on previous resource type. + */ + if (mem_data->MEM_Header.MD_Flags & fMD_WINDOW_DECODE) + is_bar_res = FALSE; + else if (mem_data->MEM_Header.MD_Flags & fMD_MEMORY_BAR) + is_bar_res = TRUE; + + /* 64-bit BAR resource must be at even position. */ + if (is_bar_res && (flags & PCI_IORESOURCE_MEM_64) && bar_res_count % 2) + bar_res_count++; + + if (is_bar_res && bar_res_count < 6) + { + d->flags[bar_res_count] = flags; + d->base_addr[bar_res_count] = start; + d->size[bar_res_count] = size; + bar_res_count++; + /* 64-bit BAR resource occupies two slots. */ + if (flags & PCI_IORESOURCE_MEM_64) + bar_res_count++; + } + else if (!is_bar_res && !(flags & PCI_IORESOURCE_PREFETCH)) + { + d->bridge_flags[1] = flags; + d->bridge_base_addr[1] = start; + d->bridge_size[1] = size; + d->known_fields |= PCI_FILL_BRIDGE_BASES; + } + else if (!is_bar_res && (flags & PCI_IORESOURCE_PREFETCH)) + { + d->bridge_flags[2] = flags; + d->bridge_base_addr[2] = start; + d->bridge_size[2] = size; + d->known_fields |= PCI_FILL_BRIDGE_BASES; + } + } + else if (res_id == ResType_IRQ) + { + PIRQ_RESOURCE irq_data = (PIRQ_RESOURCE)res_des_data; + + /* + * libpci's d->irq should be set to the non-MSI PCI IRQ and therefore + * it should be level IRQ which may be shared with other PCI devices + * and drivers in the system. As always we want to retrieve the last + * IRQ number from the resource list. + * + * On 16/32-bit non-NT systems is fIRQD_Level set to 2 but on NT + * systems to 0. Moreover it looks like that different PCI drivers + * on both NT and non-NT systems set bits 0 and 1 to wrong values + * and so reported value in this list may be incorrect. + * + * Therefore take the last level-shared IRQ number from the resource + * list and if there is none of this type then take the last IRQ + * number from the list. + */ + last_irq = irq_data->IRQ_Header.IRQD_Alloc_Num; + if ((irq_data->IRQ_Header.IRQD_Flags & (mIRQD_Share|mIRQD_Edge_Level)) == (fIRQD_Share|fIRQD_Level)) + last_shared_irq = irq_data->IRQ_Header.IRQD_Alloc_Num; + + /* + * IRQ resource on 16/32-bit non-NT systems is separator between + * IO/MEM windows and IO/MEM BARs of PCI Bridges. After the IRQ + * resource are IO/MEM BAR resources. + */ + if (!is_bar_res && non_nt_system) + is_bar_res = TRUE; + } + + pci_mfree(res_des_data); + } + if (cr != CR_NO_MORE_RES_DES) + a->warning("Cannot retrieve resources of PCI device %s: %s.", devinst_id, cr_strerror(cr)); + + if (prev_res_des != config) + CM_Free_Res_Des_Handle(prev_res_des); + + CM_Free_Log_Conf_Handle(config); + + /* Set the last IRQ from the resource list to pci_dev. */ + if (last_shared_irq >= 0) + d->irq = last_shared_irq; + else if (last_irq >= 0) + d->irq = last_irq; + if (last_shared_irq >= 0 || last_irq >= 0) + d->known_fields |= PCI_FILL_IRQ; + + if (bar_res_count > 0) + d->known_fields |= PCI_FILL_BASES | PCI_FILL_SIZES | PCI_FILL_IO_FLAGS; +} + +static BOOL +get_device_location(struct pci_access *a, DEVINST devinst, DEVINSTID_A devinst_id, unsigned int *domain, unsigned int *bus, unsigned int *dev, unsigned int *func) +{ + ULONG reg_type, reg_len; + CONFIGRET cr; + BOOL have_bus, have_devfunc; + DWORD drp_bus_num, drp_address; + + *domain = 0; + have_bus = FALSE; + have_devfunc = FALSE; + + /* + * DRP_BUSNUMBER consists of PCI domain number in high 24 bits + * and PCI bus number in low 8 bits. + */ + reg_len = sizeof(drp_bus_num); + cr = CM_Get_DevNode_Registry_PropertyA(devinst, CM_DRP_BUSNUMBER, ®_type, &drp_bus_num, ®_len, 0); + if (cr == CR_SUCCESS && reg_type == REG_DWORD && reg_len == sizeof(drp_bus_num)) + { + *domain = drp_bus_num >> 8; + *bus = drp_bus_num & 0xff; + have_bus = TRUE; + } + + /* + * DRP_ADDRESS consists of PCI device number in high 16 bits + * and PCI function number in low 16 bits. + */ + reg_len = sizeof(drp_address); + cr = CM_Get_DevNode_Registry_PropertyA(devinst, CM_DRP_ADDRESS, ®_type, &drp_address, ®_len, 0); + if (cr == CR_SUCCESS && reg_type == REG_DWORD && reg_len == sizeof(drp_address)) + { + *dev = drp_address >> 16; + *func = drp_address & 0xffff; + have_devfunc = TRUE; + } + + /* + * Device Instance Id for PCI devices is of format: + * "\\\\" + * where: + * "" is "PCI" + * "" is "VEN_####&DEV_####&SUBSYS_########&REV_##" + * and "" for PCI devices is at least in one of following format: + * "BUS_##&DEV_##&FUNC_##" + * "##.." (sequence of devfn hex bytes, where bytes represents tree path to the root) + * "#..&#..&#..&#.." (four hex numbers separated by "&"; meaning is unknown yet) + * + * First two formats are used only on systems without support for multiple + * domains. The second format uses intel-conf encoding of device and function + * number: Low 3 bits is function number and high 5 bits is device number. + * Bus number is not really encoded in second format! + * + * The third format is used on systems with support for multiple domains but + * format is variable length and currently its meaning is unknown. Apparently + * it looks like that DRP_BUSNUMBER and DRP_ADDRESS registry properties are + * supported on these systems. + * + * If DRP_BUSNUMBER or DRP_ADDRESS failed then try to parse PCI bus, device + * and function numbers from Instance Id part. + */ + if (!have_bus || !have_devfunc) + { + const char *device_id0 = strchr(devinst_id, '\\'); + const char *instance_id0 = device_id0 ? strchr(device_id0 + 1, '\\') : NULL; + const char *instance_id = instance_id0 ? instance_id0 + 1 : NULL; + unsigned int devfn; + + if (instance_id) + { + if (fmt_validate(instance_id, strlen(instance_id), "BUS_##&DEV_##&FUNC_##") && + sscanf(instance_id, "BUS_%x&DEV_%x&FUNC_%x", bus, dev, func) == 3) + { + have_bus = TRUE; + have_devfunc = TRUE; + } + else if (seq_xdigit_validate(instance_id, 2, 2) && + sscanf(instance_id, "%2x", &devfn) == 1) + { + *dev = devfn >> 3; + *func = devfn & 0x7; + have_devfunc = TRUE; + } + } + } + + /* + * Virtual IRQ holder devices do not have assigned any bus/dev/func number and + * have "IRQHOLDER" in their Device Id part. So skip them. + */ + if (!have_bus && !have_devfunc && strncmp(devinst_id, "PCI\\IRQHOLDER\\", 14) == 0) + return FALSE; + + /* + * When some numbers cannot be retrieved via cfgmgr32 then set them to zeros + * to have structure initialized. It makes sense to report via libpci also + * such "incomplete" device as cfgmgr32 can provide additional information + * like device/vendor ids or assigned resources. + */ + if (!have_bus && !have_devfunc) + { + *bus = *dev = *func = 0; + a->warning("Cannot retrieve bus, device and function numbers for PCI device %s: %s.", devinst_id, cr_strerror(cr)); + } + else if (!have_bus) + { + *bus = 0; + a->warning("Cannot retrieve bus number for PCI device %s: %s.", devinst_id, cr_strerror(cr)); + } + else if (!have_devfunc) + { + *dev = *func = 0; + a->warning("Cannot retrieve device and function numbers for PCI device %s: %s.", devinst_id, cr_strerror(cr)); + } + + return TRUE; +} + +static void +fill_data_from_string(struct pci_dev *d, const char *str) +{ + BOOL have_device_id; + BOOL have_vendor_id; + BOOL have_prog_if; + BOOL have_rev_id; + const char *endptr, *endptr2; + unsigned int hex; + int len; + + have_device_id = have_vendor_id = (d->known_fields & PCI_FILL_IDENT); + have_prog_if = have_rev_id = (d->known_fields & PCI_FILL_CLASS_EXT); + + while (1) + { + endptr = strchr(str, '&'); + endptr2 = strchr(str, '\\'); + if (endptr2 && (!endptr || endptr > endptr2)) + endptr = endptr2; + len = endptr ? endptr-str : (int)strlen(str); + + if (!have_vendor_id && + fmt_validate(str, len, "VEN_####") && + sscanf(str, "VEN_%x", &hex) == 1) + { + d->vendor_id = hex; + have_vendor_id = TRUE; + } + else if (!have_device_id && + fmt_validate(str, len, "DEV_####") && + sscanf(str, "DEV_%x", &hex) == 1) + { + d->device_id = hex; + have_device_id = TRUE; + } + else if (!(d->known_fields & PCI_FILL_SUBSYS) && + fmt_validate(str, len, "SUBSYS_########") && + sscanf(str, "SUBSYS_%x", &hex) == 1) + { + d->subsys_vendor_id = hex & 0xffff; + d->subsys_id = hex >> 16; + d->known_fields |= PCI_FILL_SUBSYS; + } + else if (!have_rev_id && + fmt_validate(str, len, "REV_##") && + sscanf(str, "REV_%x", &hex) == 1) + { + d->rev_id = hex; + have_rev_id = TRUE; + } + else if (!((d->known_fields & PCI_FILL_CLASS) && have_prog_if) && + (fmt_validate(str, len, "CC_####") || fmt_validate(str, len, "CC_######")) && + sscanf(str, "CC_%x", &hex) == 1) + { + if (len == 9) + { + if (!have_prog_if) + { + d->prog_if = hex & 0xff; + have_prog_if = TRUE; + } + hex >>= 8; + } + if (!(d->known_fields & PCI_FILL_CLASS)) + { + d->device_class = hex; + d->known_fields |= PCI_FILL_CLASS; + } + } + + if (!endptr || endptr == endptr2) + break; + + str = endptr + 1; + } + + if ((have_device_id || d->device_id) && (have_vendor_id || d->vendor_id)) + d->known_fields |= PCI_FILL_IDENT; + + if ((have_prog_if || d->prog_if) && (have_rev_id || d->rev_id)) + d->known_fields |= PCI_FILL_CLASS_EXT; +} + +static void +fill_data_from_devinst_id(struct pci_dev *d, DEVINSTID_A devinst_id) +{ + const char *device_id; + + device_id = strchr(devinst_id, '\\'); + if (!device_id) + return; + device_id++; + + /* + * Device Id part of Device Instance Id is in format: + * "VEN_####&DEV_####&SUBSYS_########&REV_##" + */ + fill_data_from_string(d, device_id); +} + +static void +fill_data_from_hardware_ids(struct pci_dev *d, DEVINST devinst, DEVINSTID_A devinst_id) +{ + ULONG reg_type, reg_size, reg_len; + struct pci_access *a = d->access; + char *hardware_ids = NULL; + const char *str; + CONFIGRET cr; + + reg_size = 0; + cr = CM_Get_DevNode_Registry_PropertyA(devinst, CM_DRP_HARDWAREID, ®_type, NULL, ®_size, 0); + if (cr != CR_SUCCESS && cr != CR_BUFFER_SMALL) + { + a->warning("Cannot retrieve hardware ids for PCI device %s: %s.", devinst_id, cr_strerror(cr)); + return; + } + else if (reg_type != REG_MULTI_SZ && reg_type != REG_SZ) /* Older Windows versions return REG_SZ and new versions REG_MULTI_SZ. */ + { + a->warning("Cannot retrieve hardware ids for PCI device %s: Hardware ids are stored as unknown type 0x%lx.", devinst_id, reg_type); + return; + } + +retry: + /* + * Returned size is on older Windows versions without nul-term char. + * So explicitly increase size and fill nul-term byte. + */ + reg_size++; + hardware_ids = pci_malloc(a, reg_size); + reg_len = reg_size; + cr = CM_Get_DevNode_Registry_PropertyA(devinst, CM_DRP_HARDWAREID, ®_type, hardware_ids, ®_len, 0); + hardware_ids[reg_size - 1] = 0; + if (reg_len > reg_size) + { + pci_mfree(hardware_ids); + reg_size = reg_len; + goto retry; + } + else if (cr != CR_SUCCESS) + { + a->warning("Cannot retrieve hardware ids for PCI device %s: %s.", devinst_id, cr_strerror(cr)); + pci_mfree(hardware_ids); + return; + } + else if (reg_type != REG_MULTI_SZ && reg_type != REG_SZ) /* Older Windows versions return REG_SZ and new versions REG_MULTI_SZ. */ + { + a->warning("Cannot retrieve hardware ids for PCI device %s: Hardware ids are stored as unknown type 0x%lx.", devinst_id, reg_type); + pci_mfree(hardware_ids); + return; + } + + /* + * Hardware ids is nul-separated nul-term string list where each string has + * one of the following format: + * "PCI\\VEN_####&DEV_####&SUBSYS_########&REV_##" + * "PCI\\VEN_####&DEV_####&SUBSYS_########" + * "PCI\\VEN_####&DEV_####&REV_##&CC_####" + * "PCI\\VEN_####&DEV_####&CC_######" + * "PCI\\VEN_####&DEV_####&CC_####" + * "PCI\\VEN_####&DEV_####&REV_##" + * "PCI\\VEN_####&DEV_####" + */ + for (str = hardware_ids; *str != '\0'; str += strlen(str) + 1) + { + if (strncmp(str, "PCI\\", 4) != 0) + continue; + str += 4; + fill_data_from_string(d, str); + } + + pci_mfree(hardware_ids); +} + +static void +scan_devinst_id(struct pci_access *a, DEVINSTID_A devinst_id) +{ + unsigned int domain, bus, dev, func; + struct pci_dev *d; + DEVINST devinst; + CONFIGRET cr; + + cr = CM_Locate_DevNodeA(&devinst, devinst_id, CM_LOCATE_DEVNODE_NORMAL); + if (cr != CR_SUCCESS) + { + /* Do not show warning when device is not present (= does not match NORMAL flag). */ + if (cr != CR_NO_SUCH_DEVNODE) + a->warning("Cannot retrieve handle for device %s: %s.", devinst_id, cr_strerror(cr)); + return; + } + + /* get_device_location() returns FALSE if devinst is not real PCI device. */ + if (!get_device_location(a, devinst, devinst_id, &domain, &bus, &dev, &func)) + return; + + d = pci_get_dev(a, domain, bus, dev, func); + pci_link_dev(a, d); + d->no_config_access = 1; + d->aux = (void *)devinst; + + /* Parse device id part of devinst id and fill details into pci_dev. */ + if (!a->buscentric) + fill_data_from_devinst_id(d, devinst_id); + + /* Retrieve hardware ids of devinst, parse them and fill details into pci_dev. */ + if (!a->buscentric) + fill_data_from_hardware_ids(d, devinst, devinst_id); + + if (!a->buscentric) + fill_resources(d, devinst, devinst_id); + + /* + * Set parent field to cfgmgr32 parent devinst handle and aux field to current + * devinst handle. At later stage in win32_cfgmgr32_scan() when all pci_dev + * devices are linked, change every devinst handle by pci_dev. + */ + if (!a->buscentric) + { + DEVINST parent_devinst; + if (CM_Get_Parent(&parent_devinst, devinst, 0) != CR_SUCCESS) + { + parent_devinst = 0; + a->warning("Cannot retrieve parent handle for device %s: %s.", devinst_id, cr_strerror(cr)); + } + d->parent = (void *)parent_devinst; + } +} + +static void +win32_cfgmgr32_scan(struct pci_access *a) +{ + ULONG devinst_id_list_size; + PCHAR devinst_id_list; + DEVINSTID_A devinst_id; + struct pci_dev *d; + CONFIGRET cr; + + if (!resolve_cfgmgr32_functions()) + { + a->warning("Required cfgmgr32.dll functions are unavailable."); + return; + } + + /* + * Explicitly initialize size to zero as wine cfgmgr32 implementation does not + * support this API but returns CR_SUCCESS without touching size argument. + */ + devinst_id_list_size = 0; + cr = CM_Get_Device_ID_List_SizeA(&devinst_id_list_size, "PCI", CM_GETIDLIST_FILTER_ENUMERATOR); + if (cr != CR_SUCCESS) + { + a->warning("Cannot retrieve list of PCI devices: %s.", cr_strerror(cr)); + return; + } + else if (devinst_id_list_size <= 1) + { + a->warning("Cannot retrieve list of PCI devices: No device was found."); + return; + } + + devinst_id_list = pci_malloc(a, devinst_id_list_size); + cr = CM_Get_Device_ID_ListA("PCI", devinst_id_list, devinst_id_list_size, CM_GETIDLIST_FILTER_ENUMERATOR); + if (cr != CR_SUCCESS) + { + a->warning("Cannot retrieve list of PCI devices: %s.", cr_strerror(cr)); + pci_mfree(devinst_id_list); + return; + } + + /* Register pci_dev for each cfgmgr32 devinst handle. */ + for (devinst_id = devinst_id_list; *devinst_id; devinst_id += strlen(devinst_id) + 1) + scan_devinst_id(a, devinst_id); + + /* Fill all drivers. */ + if (!a->buscentric) + fill_drivers(a); + + /* Switch parent fields from cfgmgr32 devinst handle to pci_dev. */ + if (!a->buscentric) + { + struct pci_dev *d1, *d2; + for (d1 = a->devices; d1; d1 = d1->next) + { + for (d2 = a->devices; d2; d2 = d2->next) + if ((DEVINST)d1->parent == (DEVINST)d2->aux) + break; + d1->parent = d2; + if (d1->parent) + d1->known_fields |= PCI_FILL_PARENT; + } + } + + /* devinst stored in ->aux is not needed anymore, clear it. */ + for (d = a->devices; d; d = d->next) + d->aux = NULL; + + pci_mfree(devinst_id_list); +} + +static int +win32_cfgmgr32_detect(struct pci_access *a) +{ + ULONG devinst_id_list_size; + CONFIGRET cr; + + if (!resolve_cfgmgr32_functions()) + { + a->debug("Required cfgmgr32.dll functions are unavailable."); + return 0; + } + + /* + * Explicitly initialize size to zero as wine cfgmgr32 implementation does not + * support this API but returns CR_SUCCESS without touching size argument. + */ + devinst_id_list_size = 0; + cr = CM_Get_Device_ID_List_SizeA(&devinst_id_list_size, "PCI", CM_GETIDLIST_FILTER_ENUMERATOR); + if (cr != CR_SUCCESS) + { + a->debug("CM_Get_Device_ID_List_SizeA(\"PCI\"): %s.", cr_strerror(cr)); + return 0; + } + else if (devinst_id_list_size <= 1) + { + a->debug("CM_Get_Device_ID_List_SizeA(\"PCI\"): No device was found."); + return 0; + } + + return 1; +} + +static void +win32_cfgmgr32_fill_info(struct pci_dev *d UNUSED, unsigned int flags UNUSED) +{ + /* + * All available flags were filled by win32_cfgmgr32_scan() + * and reading config space is not supported via cfgmgr32. + */ +} + +static int +win32_cfgmgr32_write(struct pci_dev *d UNUSED, int pos UNUSED, byte *buf UNUSED, int len UNUSED) +{ + /* Writing to config space is not supported via cfgmgr32. */ + return 0; +} + +static void +win32_cfgmgr32_init(struct pci_access *a UNUSED) +{ +} + +static void +win32_cfgmgr32_cleanup(struct pci_access *a UNUSED) +{ +} + +struct pci_methods pm_win32_cfgmgr32 = { + "win32-cfgmgr32", + "Win32 device listing via Configuration Manager", + NULL, /* config */ + win32_cfgmgr32_detect, + win32_cfgmgr32_init, + win32_cfgmgr32_cleanup, + win32_cfgmgr32_scan, + win32_cfgmgr32_fill_info, + pci_emulated_read, /* Reading of config space is not supported via cfgmgr32. */ + win32_cfgmgr32_write, + NULL, /* read_vpd */ + NULL, /* init_dev */ + NULL, /* cleanup_dev */ +}; diff -Nru pciutils-3.7.0/ls-caps.c pciutils-3.8.0/ls-caps.c --- pciutils-3.7.0/ls-caps.c 2020-05-26 16:11:35.000000000 +0000 +++ pciutils-3.8.0/ls-caps.c 2022-04-15 22:08:23.000000000 +0000 @@ -44,8 +44,8 @@ b = get_conf_byte(d, where + PCI_PM_PPB_EXTENSIONS); if (b) printf("\t\tBridge: PM%c B3%c\n", - FLAG(t, PCI_PM_BPCC_ENABLE), - FLAG(~t, PCI_PM_PPB_B2_B3)); + FLAG(b, PCI_PM_BPCC_ENABLE), + FLAG(~b, PCI_PM_PPB_B2_B3)); } static void @@ -578,7 +578,7 @@ break; offl = get_conf_long(d, where + PCI_HT_MSIM_ADDR_LO); offh = get_conf_long(d, where + PCI_HT_MSIM_ADDR_HI); - printf("\t\tMapping Address Base: %016llx\n", ((unsigned long long)offh << 32) | (offl & ~0xfffff)); + printf("\t\tMapping Address Base: %016" PCI_U64_FMT_X "\n", ((u64)offh << 32) | (offl & ~0xfffff)); } break; case PCI_HT_CMD_TYP_DR: @@ -656,10 +656,20 @@ type == PCI_EXP_TYPE_PCIE_BRIDGE; /* PCI/PCI-X to PCIe Bridge */ } -static float power_limit(int value, int scale) +static void show_power_limit(int value, int scale) { static const float scales[4] = { 1.0, 0.1, 0.01, 0.001 }; - return value * scales[scale]; + + if (scale == 0 && value == 0xFF) + { + printf(">600W"); + return; + } + + if (scale == 0 && value >= 0xF0 && value <= 0xFE) + value = 250 + 25 * (value - 0xF0); + + printf("%gW", value * scales[scale]); } static const char *latency_l0s(int value) @@ -701,9 +711,10 @@ FLAG(t, PCI_EXP_DEVCAP_FLRESET)); if ((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_UPSTREAM) || (type == PCI_EXP_TYPE_PCI_BRIDGE)) - printf(" SlotPowerLimit %.3fW", - power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18, - (t & PCI_EXP_DEVCAP_PWR_SCL) >> 26)); + { + printf(" SlotPowerLimit "); + show_power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18, (t & PCI_EXP_DEVCAP_PWR_SCL) >> 26); + } printf("\n"); w = get_conf_word(d, where + PCI_EXP_DEVCTL); @@ -751,18 +762,23 @@ return "16GT/s"; case 5: return "32GT/s"; + case 6: + return "64GT/s"; default: return "unknown"; } } -static char *link_compare(int sta, int cap) +static char *link_compare(int type, int sta, int cap) { - if (sta < cap) - return "downgraded"; if (sta > cap) - return "strange"; - return "ok"; + return " (overdriven)"; + if (sta == cap) + return ""; + if ((type == PCI_EXP_TYPE_ROOT_PORT) || (type == PCI_EXP_TYPE_DOWNSTREAM) || + (type == PCI_EXP_TYPE_PCIE_BRIDGE)) + return ""; + return " (downgraded)"; } static char *aspm_support(int code) @@ -835,11 +851,11 @@ w = get_conf_word(d, where + PCI_EXP_LNKSTA); sta_speed = w & PCI_EXP_LNKSTA_SPEED; sta_width = (w & PCI_EXP_LNKSTA_WIDTH) >> 4; - printf("\t\tLnkSta:\tSpeed %s (%s), Width x%d (%s)\n", + printf("\t\tLnkSta:\tSpeed %s%s, Width x%d%s\n", link_speed(sta_speed), - link_compare(sta_speed, cap_speed), + link_compare(type, sta_speed, cap_speed), sta_width, - link_compare(sta_width, cap_width)); + link_compare(type, sta_width, cap_width)); printf("\t\t\tTrErr%c Train%c SlotClk%c DLActive%c BWMgmt%c ABWMgmt%c\n", FLAG(w, PCI_EXP_LNKSTA_TR_ERR), FLAG(w, PCI_EXP_LNKSTA_TRAIN), @@ -869,9 +885,10 @@ FLAG(t, PCI_EXP_SLTCAP_PWRI), FLAG(t, PCI_EXP_SLTCAP_HPC), FLAG(t, PCI_EXP_SLTCAP_HPS)); - printf("\t\t\tSlot #%d, PowerLimit %.3fW; Interlock%c NoCompl%c\n", - (t & PCI_EXP_SLTCAP_PSN) >> 19, - power_limit((t & PCI_EXP_SLTCAP_PWR_VAL) >> 7, (t & PCI_EXP_SLTCAP_PWR_SCL) >> 15), + printf("\t\t\tSlot #%d, PowerLimit ", + (t & PCI_EXP_SLTCAP_PSN) >> 19); + show_power_limit((t & PCI_EXP_SLTCAP_PWR_VAL) >> 7, (t & PCI_EXP_SLTCAP_PWR_SCL) >> 15); + printf("; Interlock%c NoCompl%c\n", FLAG(t, PCI_EXP_SLTCAP_INTERLOCK), FLAG(t, PCI_EXP_SLTCAP_NOCMDCOMP)); @@ -1066,7 +1083,7 @@ int i, found = 0; for (i=0; i<6; i++) - if (p->base_addr[i] && p->size[i]) + if (p->base_addr[i] || p->size[i]) { if (!(p->base_addr[i] & PCI_BASE_ADDRESS_SPACE_IO)) { @@ -1085,8 +1102,8 @@ l = get_conf_long(d, where + PCI_EXP_DEVCAP2); printf("\t\tDevCap2: Completion Timeout: %s, TimeoutDis%c NROPrPrP%c LTR%c", - cap_express_dev2_timeout_range(PCI_EXP_DEV2_TIMEOUT_RANGE(l)), - FLAG(l, PCI_EXP_DEV2_TIMEOUT_DIS), + cap_express_dev2_timeout_range(PCI_EXP_DEVCAP2_TIMEOUT_RANGE(l)), + FLAG(l, PCI_EXP_DEVCAP2_TIMEOUT_DIS), FLAG(l, PCI_EXP_DEVCAP2_NROPRPRP), FLAG(l, PCI_EXP_DEVCAP2_LTR)); printf("\n\t\t\t 10BitTagComp%c 10BitTagReq%c OBFF %s, ExtFmt%c EETLPPrefix%c", @@ -1115,7 +1132,7 @@ printf(" %s", cap_express_devcap2_tphcomp(PCI_EXP_DEVCAP2_TPH_COMP(l))); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM) - printf(" ARIFwd%c\n", FLAG(l, PCI_EXP_DEV2_ARI)); + printf(" ARIFwd%c\n", FLAG(l, PCI_EXP_DEVCAP2_ARI)); else printf("\n"); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_UPSTREAM || @@ -1134,13 +1151,14 @@ } w = get_conf_word(d, where + PCI_EXP_DEVCTL2); - printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c OBFF %s,", - cap_express_dev2_timeout_value(PCI_EXP_DEV2_TIMEOUT_VALUE(w)), - FLAG(w, PCI_EXP_DEV2_TIMEOUT_DIS), - FLAG(w, PCI_EXP_DEV2_LTR), - cap_express_devctl2_obff(PCI_EXP_DEV2_OBFF(w))); + printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c 10BitTagReq%c OBFF %s,", + cap_express_dev2_timeout_value(PCI_EXP_DEVCTL2_TIMEOUT_VALUE(w)), + FLAG(w, PCI_EXP_DEVCTL2_TIMEOUT_DIS), + FLAG(w, PCI_EXP_DEVCTL2_LTR), + FLAG(w, PCI_EXP_DEVCTL2_10BIT_TAG_REQ), + cap_express_devctl2_obff(PCI_EXP_DEVCTL2_OBFF(w))); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM) - printf(" ARIFwd%c\n", FLAG(w, PCI_EXP_DEV2_ARI)); + printf(" ARIFwd%c\n", FLAG(w, PCI_EXP_DEVCTL2_ARI)); else printf("\n"); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_UPSTREAM || @@ -1150,10 +1168,10 @@ printf("\t\t\t AtomicOpsCtl:"); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_ENDPOINT || type == PCI_EXP_TYPE_ROOT_INT_EP || type == PCI_EXP_TYPE_LEG_END) - printf(" ReqEn%c", FLAG(w, PCI_EXP_DEV2_ATOMICOP_REQUESTER_EN)); + printf(" ReqEn%c", FLAG(w, PCI_EXP_DEVCTL2_ATOMICOP_REQUESTER_EN)); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_UPSTREAM || type == PCI_EXP_TYPE_DOWNSTREAM) - printf(" EgressBlck%c", FLAG(w, PCI_EXP_DEV2_ATOMICOP_EGRESS_BLOCK)); + printf(" EgressBlck%c", FLAG(w, PCI_EXP_DEVCTL2_ATOMICOP_EGRESS_BLOCK)); printf("\n"); } } @@ -1196,6 +1214,8 @@ return "16GT/s"; case 5: return "32GT/s"; + case 6: + return "64GT/s"; default: return "Unknown"; } @@ -1214,6 +1234,35 @@ } } +static const char *cap_express_link2_compliance_preset(int type) +{ + switch (type) + { + case 0: + return "-6dB de-emphasis, 0dB preshoot"; + case 1: + return "-3.5dB de-emphasis, 0dB preshoot"; + case 2: + return "-4.4dB de-emphasis, 0dB preshoot"; + case 3: + return "-2.5dB de-emphasis, 0dB preshoot"; + case 4: + return "0dB de-emphasis, 0dB preshoot"; + case 5: + return "0dB de-emphasis, 1.9dB preshoot"; + case 6: + return "0dB de-emphasis, 2.5dB preshoot"; + case 7: + return "-6.0dB de-emphasis, 3.5dB preshoot"; + case 8: + return "-3.5dB de-emphasis, 3.5dB preshoot"; + case 9: + return "0dB de-emphasis, 3.5dB preshoot"; + default: + return "Unknown"; + } +} + static const char *cap_express_link2_transmargin(int type) { switch (type) @@ -1295,11 +1344,11 @@ cap_express_link2_deemphasis(PCI_EXP_LNKCTL2_DEEMPHASIS(w))); printf("\n" "\t\t\t Transmit Margin: %s, EnterModifiedCompliance%c ComplianceSOS%c\n" - "\t\t\t Compliance De-emphasis: %s\n", + "\t\t\t Compliance Preset/De-emphasis: %s\n", cap_express_link2_transmargin(PCI_EXP_LNKCTL2_MARGIN(w)), FLAG(w, PCI_EXP_LNKCTL2_MOD_CMPLNC), FLAG(w, PCI_EXP_LNKCTL2_CMPLNC_SOS), - cap_express_link2_deemphasis(PCI_EXP_LNKCTL2_COM_DEEMPHASIS(w))); + cap_express_link2_compliance_preset(PCI_EXP_LNKCTL2_COM_DEEMPHASIS(w))); } w = get_conf_word(d, where + PCI_EXP_LNKSTA2); diff -Nru pciutils-3.7.0/ls-ecaps.c pciutils-3.8.0/ls-ecaps.c --- pciutils-3.7.0/ls-ecaps.c 2020-05-26 16:11:35.000000000 +0000 +++ pciutils-3.8.0/ls-ecaps.c 2022-04-15 22:08:23.000000000 +0000 @@ -67,13 +67,13 @@ snoop = get_conf_word(d, where + PCI_LTR_MAX_SNOOP); scale = cap_ltr_scale((snoop >> PCI_LTR_SCALE_SHIFT) & PCI_LTR_SCALE_MASK); - printf("\t\tMax snoop latency: %lldns\n", - ((unsigned long long)snoop & PCI_LTR_VALUE_MASK) * scale); + printf("\t\tMax snoop latency: %" PCI_U64_FMT_U "ns\n", + ((u64)snoop & PCI_LTR_VALUE_MASK) * scale); nosnoop = get_conf_word(d, where + PCI_LTR_MAX_NOSNOOP); scale = cap_ltr_scale((nosnoop >> PCI_LTR_SCALE_SHIFT) & PCI_LTR_SCALE_MASK); - printf("\t\tMax no snoop latency: %lldns\n", - ((unsigned long long)nosnoop & PCI_LTR_VALUE_MASK) * scale); + printf("\t\tMax no snoop latency: %" PCI_U64_FMT_U "ns\n", + ((u64)nosnoop & PCI_LTR_VALUE_MASK) * scale); } static void @@ -369,13 +369,13 @@ return; l = get_conf_long(d, where + PCI_IOV_CAP); - printf("\t\tIOVCap:\tMigration%c, Interrupt Message Number: %03x\n", - FLAG(l, PCI_IOV_CAP_VFM), PCI_IOV_CAP_IMN(l)); + printf("\t\tIOVCap:\tMigration%c 10BitTagReq%c Interrupt Message Number: %03x\n", + FLAG(l, PCI_IOV_CAP_VFM), FLAG(l, PCI_IOV_CAP_VF_10BIT_TAG_REQ), PCI_IOV_CAP_IMN(l)); w = get_conf_word(d, where + PCI_IOV_CTRL); - printf("\t\tIOVCtl:\tEnable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c\n", + printf("\t\tIOVCtl:\tEnable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c 10BitTagReq%c\n", FLAG(w, PCI_IOV_CTRL_VFE), FLAG(w, PCI_IOV_CTRL_VFME), FLAG(w, PCI_IOV_CTRL_VFMIE), FLAG(w, PCI_IOV_CTRL_MSE), - FLAG(w, PCI_IOV_CTRL_ARI)); + FLAG(w, PCI_IOV_CTRL_ARI), FLAG(w, PCI_IOV_CTRL_VF_10BIT_TAG_REQ_EN)); w = get_conf_word(d, where + PCI_IOV_STATUS); printf("\t\tIOVSta:\tMigration%c\n", FLAG(w, PCI_IOV_STATUS_MS)); w = get_conf_word(d, where + PCI_IOV_INITIALVF); @@ -635,6 +635,61 @@ } static void +cap_rcec(struct device *d, int where) +{ + printf("Root Complex Event Collector Endpoint Association\n"); + if (verbose < 2) + return; + + if (!config_fetch(d, where, 12)) + return; + + u32 hdr = get_conf_long(d, where); + byte cap_ver = PCI_RCEC_EP_CAP_VER(hdr); + u32 bmap = get_conf_long(d, where + PCI_RCEC_RCIEP_BMAP); + printf("\t\tRCiEPBitmap: "); + if (bmap) + { + int prevmatched=0; + int adjcount=0; + int prevdev=0; + printf("RCiEP at Device(s):"); + for (int dev=0; dev < 32; dev++) + { + if (BITS(bmap, dev, 1)) + { + if (!adjcount) + printf("%s %u", (prevmatched) ? "," : "", dev); + adjcount++; + prevdev=dev; + prevmatched=1; + } + else + { + if (adjcount > 1) + printf("-%u", prevdev); + adjcount=0; + } + } + } + else + printf("%s", (verbose > 2) ? "00000000 [none]" : "[none]"); + printf("\n"); + + if (cap_ver < PCI_RCEC_BUSN_REG_VER) + return; + + u32 busn = get_conf_long(d, where + PCI_RCEC_BUSN_REG); + u8 lastbusn = BITS(busn, 16, 8); + u8 nextbusn = BITS(busn, 8, 8); + + if ((lastbusn == 0x00) && (nextbusn == 0xff)) + printf("\t\tAssociatedBusNumbers: %s\n", (verbose > 2) ? "ff-00 [none]" : "[none]"); + else + printf("\t\tAssociatedBusNumbers: %02x-%02x\n", nextbusn, lastbusn ); +} + +static void cap_dvsec_cxl(struct device *d, int where) { u16 l; @@ -771,7 +826,7 @@ if (scale > 5) printf(" LTR1.2_Threshold="); else - printf(" LTR1.2_Threshold=%lldns", BITS(val, 16, 10) * (unsigned long long) cap_ltr_scale(scale)); + printf(" LTR1.2_Threshold=%" PCI_U64_FMT_U "ns", BITS(val, 16, 10) * (u64) cap_ltr_scale(scale)); } printf("\n"); } @@ -937,6 +992,41 @@ } } +static void +cap_doe(struct device *d, int where) +{ + u32 l; + + printf("Data Object Exchange\n"); + + if (verbose < 2) + return; + + if (!config_fetch(d, where + PCI_DOE_CAP, 0x14)) + { + printf("\t\t\n"); + return; + } + + l = get_conf_long(d, where + PCI_DOE_CAP); + printf("\t\tDOECap: IntSup%c\n", + FLAG(l, PCI_DOE_CAP_INT_SUPP)); + if (l & PCI_DOE_CAP_INT_SUPP) + printf("\t\t\tInterrupt Message Number %03x\n", + PCI_DOE_CAP_INT_MSG(l)); + + l = get_conf_long(d, where + PCI_DOE_CTL); + printf("\t\tDOECtl: IntEn%c\n", + FLAG(l, PCI_DOE_CTL_INT)); + + l = get_conf_long(d, where + PCI_DOE_STS); + printf("\t\tDOESta: Busy%c IntSta%c Error%c ObjectReady%c\n", + FLAG(l, PCI_DOE_STS_BUSY), + FLAG(l, PCI_DOE_STS_INT), + FLAG(l, PCI_DOE_STS_ERROR), + FLAG(l, PCI_DOE_STS_OBJECT_READY)); +} + void show_ext_caps(struct device *d, int type) { @@ -951,7 +1041,7 @@ if (!config_fetch(d, where, 4)) break; header = get_conf_long(d, where); - if (!header) + if (!header || header == 0xffffffff) break; id = header & 0xffff; version = (header >> 16) & 0xf; @@ -991,8 +1081,8 @@ case PCI_EXT_CAP_ID_RCILINK: printf("Root Complex Internal Link \n"); break; - case PCI_EXT_CAP_ID_RCECOLL: - printf("Root Complex Event Collector \n"); + case PCI_EXT_CAP_ID_RCEC: + cap_rcec(d, where); break; case PCI_EXT_CAP_ID_MFVC: printf("Multi-Function Virtual Channel \n"); @@ -1084,6 +1174,9 @@ case PCI_EXT_CAP_ID_NPEM: printf("Native PCIe Enclosure Management \n"); break; + case PCI_EXT_CAP_ID_DOE: + cap_doe(d, where); + break; default: printf("Extended Capability ID %#02x\n", id); break; diff -Nru pciutils-3.7.0/ls-kernel.c pciutils-3.8.0/ls-kernel.c --- pciutils-3.7.0/ls-kernel.c 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/ls-kernel.c 2022-02-10 12:49:39.000000000 +0000 @@ -8,7 +8,6 @@ #include #include -#include #include "lspci.h" @@ -174,16 +173,14 @@ match_pcimap(struct device *d, struct pcimap_entry *e) { struct pci_dev *dev = d->dev; - unsigned int class = get_conf_long(d, PCI_REVISION_ID) >> 8; - word subv, subd; + unsigned int class = (((unsigned int)dev->device_class << 8) | dev->prog_if); #define MATCH(x, y) ((y) > 0xffff || (x) == (y)) - get_subid(d, &subv, &subd); return MATCH(dev->vendor_id, e->vendor) && MATCH(dev->device_id, e->device) && - MATCH(subv, e->subvendor) && - MATCH(subd, e->subdevice) && + MATCH(dev->subsys_vendor_id, e->subvendor) && + MATCH(dev->subsys_id, e->subdevice) && (class & e->class_mask) == e->class; #undef MATCH } @@ -214,40 +211,6 @@ #endif -#define DRIVER_BUF_SIZE 1024 - -static char * -find_driver(struct device *d, char *buf) -{ - struct pci_dev *dev = d->dev; - char name[1024], *drv, *base; - int n; - - if (dev->access->method != PCI_ACCESS_SYS_BUS_PCI) - return NULL; - - base = pci_get_param(dev->access, "sysfs.path"); - if (!base || !base[0]) - return NULL; - - n = snprintf(name, sizeof(name), "%s/devices/%04x:%02x:%02x.%d/driver", - base, dev->domain, dev->bus, dev->dev, dev->func); - if (n < 0 || n >= (int)sizeof(name)) - die("show_driver: sysfs device name too long, why?"); - - n = readlink(name, buf, DRIVER_BUF_SIZE); - if (n < 0) - return NULL; - if (n >= DRIVER_BUF_SIZE) - return ""; - buf[n] = 0; - - if (drv = strrchr(buf, '/')) - return drv+1; - else - return buf; -} - static const char * next_module_filtered(struct device *d) { @@ -270,10 +233,10 @@ void show_kernel(struct device *d) { - char buf[DRIVER_BUF_SIZE]; const char *driver, *module; - if (driver = find_driver(d, buf)) + pci_fill_info(d->dev, PCI_FILL_DRIVER); + if (driver = pci_get_string_property(d->dev, PCI_FILL_DRIVER)) printf("\tKernel driver in use: %s\n", driver); if (!show_kernel_init()) @@ -289,10 +252,10 @@ void show_kernel_machine(struct device *d) { - char buf[DRIVER_BUF_SIZE]; const char *driver, *module; - if (driver = find_driver(d, buf)) + pci_fill_info(d->dev, PCI_FILL_DRIVER); + if (driver = pci_get_string_property(d->dev, PCI_FILL_DRIVER)) printf("Driver:\t%s\n", driver); if (!show_kernel_init()) @@ -305,13 +268,23 @@ #else void -show_kernel(struct device *d UNUSED) +show_kernel(struct device *d) { + const char *driver; + + pci_fill_info(d->dev, PCI_FILL_DRIVER); + if (driver = pci_get_string_property(d->dev, PCI_FILL_DRIVER)) + printf("\tDriver in use: %s\n", driver); } void -show_kernel_machine(struct device *d UNUSED) +show_kernel_machine(struct device *d) { + const char *driver; + + pci_fill_info(d->dev, PCI_FILL_DRIVER); + if (driver = pci_get_string_property(d->dev, PCI_FILL_DRIVER)) + printf("Driver:\t%s\n", driver); } void diff -Nru pciutils-3.7.0/ls-map.c pciutils-3.8.0/ls-map.c --- pciutils-3.7.0/ls-map.c 2013-12-10 19:54:31.000000000 +0000 +++ pciutils-3.8.0/ls-map.c 2022-04-15 21:47:48.000000000 +0000 @@ -52,13 +52,14 @@ static void do_map_bus(int bus) { + int domain = (filter.domain >= 0 ? filter.domain : 0); int dev, func; int verbose = pacc->debugging; struct bus_info *bi = bus_info + bus; struct device *d; if (verbose) - printf("Mapping bus %02x\n", bus); + printf("Mapping bus %04x:%02x\n", domain, bus); for (dev = 0; dev < 32; dev++) if (filter.slot < 0 || filter.slot == dev) { @@ -66,15 +67,14 @@ for (func = 0; func < func_limit; func++) if (filter.func < 0 || filter.func == func) { - /* XXX: Bus mapping supports only domain 0 */ - struct pci_dev *p = pci_get_dev(pacc, 0, bus, dev, func); + struct pci_dev *p = pci_get_dev(pacc, domain, bus, dev, func); u16 vendor = pci_read_word(p, PCI_VENDOR_ID); if (vendor && vendor != 0xffff) { if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80)) func_limit = 8; if (verbose) - printf("Discovered device %02x:%02x.%d\n", bus, dev, func); + printf("Discovered device %04x:%02x:%02x.%d\n", domain, bus, dev, func); bi->exists = 1; if (d = scan_device(p)) { @@ -165,6 +165,7 @@ { if (pacc->method == PCI_ACCESS_PROC_BUS_PCI || pacc->method == PCI_ACCESS_SYS_BUS_PCI || + pacc->method == PCI_ACCESS_WIN32_CFGMGR32 || pacc->method == PCI_ACCESS_DUMP) printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n"); bus_info = xmalloc(sizeof(struct bus_info) * 256); diff -Nru pciutils-3.7.0/lspci.c pciutils-3.8.0/lspci.c --- pciutils-3.7.0/lspci.c 2020-05-26 16:12:49.000000000 +0000 +++ pciutils-3.8.0/lspci.c 2022-04-15 22:08:23.000000000 +0000 @@ -124,18 +124,18 @@ d = xmalloc(sizeof(struct device)); memset(d, 0, sizeof(*d)); d->dev = p; + d->no_config_access = p->no_config_access; d->config_cached = d->config_bufsize = 64; d->config = xmalloc(64); d->present = xmalloc(64); memset(d->present, 1, 64); - if (!pci_read_block(p, 0, d->config, 64)) + if (!d->no_config_access && !pci_read_block(p, 0, d->config, 64)) { - fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n", - p->domain, p->bus, p->dev, p->func); - seen_errors++; - return NULL; + d->no_config_access = 1; + d->config_cached = d->config_bufsize = 0; + memset(d->present, 0, 64); } - if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS) + if (!d->no_config_access && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS) { /* For cardbus bridges, we need to fetch 64 bytes more to get the * full standard header... */ @@ -143,7 +143,7 @@ d->config_cached += 64; } pci_setup_cache(p, d->config, d->config_cached); - pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS); + pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS | (need_topology ? PCI_FILL_PARENT : 0)); return d; } @@ -285,25 +285,6 @@ show_slot_path(d); } -void -get_subid(struct device *d, word *subvp, word *subdp) -{ - byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f; - - if (htype == PCI_HEADER_TYPE_NORMAL) - { - *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID); - *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID); - } - else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128) - { - *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID); - *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID); - } - else - *subvp = *subdp = 0xffff; -} - static void show_terse(struct device *d) { @@ -319,12 +300,12 @@ pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id)); - if (c = get_conf_byte(d, PCI_REVISION_ID)) - printf(" (rev %02x)", c); + if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) + printf(" (rev %02x)", p->rev_id); if (verbose) { char *x; - c = get_conf_byte(d, PCI_CLASS_PROG); + c = (p->known_fields & PCI_FILL_CLASS_EXT) ? p->prog_if : 0; x = pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS, p->device_class, c); @@ -340,19 +321,18 @@ if (verbose || opt_kernel) { - word subsys_v, subsys_d; char ssnamebuf[256]; pci_fill_info(p, PCI_FILL_LABEL); if (p->label) printf("\tDeviceName: %s", p->label); - get_subid(d, &subsys_v, &subsys_d); - if (subsys_v && subsys_v != 0xffff) + if ((p->known_fields & PCI_FILL_SUBSYS) && + p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) printf("\tSubsystem: %s\n", pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE, - p->vendor_id, p->device_id, subsys_v, subsys_d)); + p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); } } @@ -374,40 +354,60 @@ } static void -show_range(char *prefix, u64 base, u64 limit, int is_64bit) +show_range(const char *prefix, u64 base, u64 limit, int bits, int disabled) { printf("%s:", prefix); if (base <= limit || verbose > 2) - { - if (is_64bit) - printf(" %016" PCI_U64_FMT_X "-%016" PCI_U64_FMT_X, base, limit); - else - printf(" %08x-%08x", (unsigned) base, (unsigned) limit); - } - if (base <= limit) + printf(" %0*" PCI_U64_FMT_X "-%0*" PCI_U64_FMT_X, (bits+3)/4, base, (bits+3)/4, limit); + if (!disabled && base <= limit) show_size(limit - base + 1); else printf(" [disabled]"); + if (bits) + printf(" [%d-bit]", bits); putchar('\n'); } +static u32 +ioflg_to_pciflg(pciaddr_t ioflg) +{ + u32 flg; + + if (ioflg & PCI_IORESOURCE_IO) + flg = PCI_BASE_ADDRESS_SPACE_IO; + else if (!(ioflg & PCI_IORESOURCE_MEM)) + flg = 0; + else + { + flg = PCI_BASE_ADDRESS_SPACE_MEMORY; + if (ioflg & PCI_IORESOURCE_MEM_64) + flg |= PCI_BASE_ADDRESS_MEM_TYPE_64; + else + flg |= PCI_BASE_ADDRESS_MEM_TYPE_32; + if (ioflg & PCI_IORESOURCE_PREFETCH) + flg |= PCI_BASE_ADDRESS_MEM_PREFETCH; + } + + return flg; +} + static void -show_bases(struct device *d, int cnt) +show_bases(struct device *d, int cnt, int without_config_data) { struct pci_dev *p = d->dev; - word cmd = get_conf_word(d, PCI_COMMAND); + word cmd = without_config_data ? (PCI_COMMAND_IO | PCI_COMMAND_MEMORY) : get_conf_word(d, PCI_COMMAND); int i; - int virtual = 0; for (i=0; ibase_addr[i]; pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0; pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0; - u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); - u32 hw_lower; + u32 flg = (p->known_fields & PCI_FILL_IO_FLAGS) ? ioflg_to_pciflg(ioflg) : without_config_data ? 0 : get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); + u32 hw_lower = 0; u32 hw_upper = 0; int broken = 0; + int virtual = 0; if (flg == 0xffffffff) flg = 0; @@ -419,31 +419,26 @@ else putchar('\t'); - /* Read address as seen by the hardware */ - if (flg & PCI_BASE_ADDRESS_SPACE_IO) - hw_lower = flg & PCI_BASE_ADDRESS_IO_MASK; - else + /* Detect virtual regions, which are reported by the OS, but unassigned in the device */ + if ((p->known_fields & PCI_FILL_IO_FLAGS) && !without_config_data) { - hw_lower = flg & PCI_BASE_ADDRESS_MEM_MASK; - if ((flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) + /* Read address as seen by the hardware */ + hw_lower = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); + if ((hw_lower & PCI_BASE_ADDRESS_SPACE) == (ioflg_to_pciflg(ioflg) & PCI_BASE_ADDRESS_SPACE)) { - if (i >= cnt - 1) - broken = 1; - else - { - i++; - hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); + if ((ioflg & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_MEM && + (hw_lower & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) + { + if (i >= cnt - 1) + broken = 1; + else + hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i + 1); } + if (pos && !hw_lower && !hw_upper && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI)) + virtual = 1; } } - /* Detect virtual regions, which are reported by the OS, but unassigned in the device */ - if (pos && !hw_lower && !hw_upper && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI)) - { - flg = pos; - virtual = 1; - } - /* Print base address */ if (flg & PCI_BASE_ADDRESS_SPACE_IO) { @@ -500,14 +495,14 @@ pciaddr_t rom = p->rom_base_addr; pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0; pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0; - u32 flg = get_conf_long(d, reg); - word cmd = get_conf_word(d, PCI_COMMAND); + u32 flg = reg >= 0 ? get_conf_long(d, reg) : ioflg_to_pciflg(ioflg); + word cmd = reg >= 0 ? get_conf_word(d, PCI_COMMAND) : PCI_COMMAND_MEMORY; int virtual = 0; if (!rom && !flg && !len) return; - if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK) && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI)) + if (reg >= 0 && (rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK) && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI)) { flg = rom; virtual = 1; @@ -539,7 +534,7 @@ static void show_htype0(struct device *d) { - show_bases(d, 6); + show_bases(d, 6, 0); show_rom(d, PCI_ROM_ADDRESS); show_caps(d, PCI_CAPABILITY_LIST); } @@ -547,6 +542,7 @@ static void show_htype1(struct device *d) { + struct pci_dev *p = d->dev; u32 io_base = get_conf_byte(d, PCI_IO_BASE); u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT); u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK; @@ -558,15 +554,27 @@ u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK; word sec_stat = get_conf_word(d, PCI_SEC_STATUS); word brc = get_conf_word(d, PCI_BRIDGE_CONTROL); + int io_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[0]; + int mem_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[1]; + int pref_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[2]; + int io_bits, pref_bits; - show_bases(d, 2); + show_bases(d, 2, 0); printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n", get_conf_byte(d, PCI_PRIMARY_BUS), get_conf_byte(d, PCI_SECONDARY_BUS), get_conf_byte(d, PCI_SUBORDINATE_BUS), get_conf_byte(d, PCI_SEC_LATENCY_TIMER)); - if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) || + if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !io_disabled) + { + io_base = p->bridge_base_addr[0] & PCI_IO_RANGE_MASK; + io_limit = io_base + p->bridge_size[0] - 1; + io_type = p->bridge_base_addr[0] & PCI_IO_RANGE_TYPE_MASK; + io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16; + show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled); + } + else if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) || (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32)) printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit); else @@ -578,20 +586,40 @@ io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16); io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16); } - show_range("\tI/O behind bridge", io_base, io_limit+0xfff, 0); + /* I/O is unsupported if both base and limit are zeros and resource is disabled */ + if (!(io_base == 0x0 && io_limit == 0x0 && io_disabled)) + { + io_limit += 0xfff; + io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16; + show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled); + } + } + + if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !mem_disabled) + { + mem_base = p->bridge_base_addr[1] & PCI_MEMORY_RANGE_MASK; + mem_limit = mem_base + p->bridge_size[1] - 1; + show_range("\tMemory behind bridge", mem_base, mem_limit, 32, mem_disabled); } - - if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) || + else if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) || mem_type) printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit); else { mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16; mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16; - show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 0); + show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 32, mem_disabled); } - if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) || + if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !pref_disabled) + { + u64 pref_base_64 = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_MASK; + u64 pref_limit_64 = pref_base_64 + p->bridge_size[2] - 1; + pref_type = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_TYPE_MASK; + pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32; + show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled); + } + else if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) || (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64)) printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit); else @@ -603,7 +631,13 @@ pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32; pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32; } - show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64 + 0xfffff, (pref_type == PCI_PREF_RANGE_TYPE_64)); + /* Prefetchable memory is unsupported if both base and limit are zeros and resource is disabled */ + if (!(pref_base_64 == 0x0 && pref_limit_64 == 0x0 && pref_disabled)) + { + pref_limit_64 += 0xfffff; + pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32; + show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled); + } } if (verbose > 1) @@ -652,7 +686,7 @@ word exca; int verb = verbose > 2; - show_bases(d, 1); + show_bases(d, 1, 0); printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n", get_conf_byte(d, PCI_CB_PRIMARY_BUS), get_conf_byte(d, PCI_CB_CARD_BUS), @@ -712,48 +746,91 @@ } static void +show_htype_unknown(struct device *d) +{ + struct pci_dev *p = d->dev; + u64 base, limit, flags; + const char *str; + int i, bits; + + if (pacc->buscentric) + return; + + show_bases(d, 6, 1); + for (i = 0; i < 4; i++) + { + if (!p->bridge_base_addr[i]) + continue; + base = p->bridge_base_addr[i]; + limit = base + p->bridge_size[i] - 1; + flags = p->bridge_flags[i]; + if (flags & PCI_IORESOURCE_IO) + { + bits = (flags & PCI_IORESOURCE_IO_16BIT_ADDR) ? 16 : 32; + str = "\tI/O behind bridge"; + } + else if (flags & PCI_IORESOURCE_MEM) + { + bits = (flags & PCI_IORESOURCE_MEM_64) ? 64 : 32; + if (flags & PCI_IORESOURCE_PREFETCH) + str = "\tPrefetchable memory behind bridge"; + else + str = "\tMemory behind bridge"; + } + else + { + bits = 0; + str = "\tUnknown resource behind bridge"; + } + show_range(str, base, limit, bits, 0); + } + show_rom(d, -1); +} + +static void show_verbose(struct device *d) { struct pci_dev *p = d->dev; - word status = get_conf_word(d, PCI_STATUS); - word cmd = get_conf_word(d, PCI_COMMAND); + int unknown_config_data = 0; word class = p->device_class; - byte bist = get_conf_byte(d, PCI_BIST); - byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f; - byte latency = get_conf_byte(d, PCI_LATENCY_TIMER); - byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE); + byte htype = d->no_config_access ? -1 : (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f); + byte bist; byte max_lat, min_gnt; - byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN); - unsigned int irq; char *dt_node, *iommu_group; show_terse(d); pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | - PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP); - irq = p->irq; + PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP | + PCI_FILL_BRIDGE_BASES | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS); switch (htype) { case PCI_HEADER_TYPE_NORMAL: if (class == PCI_CLASS_BRIDGE_PCI) printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); + bist = get_conf_byte(d, PCI_BIST); max_lat = get_conf_byte(d, PCI_MAX_LAT); min_gnt = get_conf_byte(d, PCI_MIN_GNT); break; case PCI_HEADER_TYPE_BRIDGE: if ((class >> 8) != PCI_BASE_CLASS_BRIDGE) printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); + bist = get_conf_byte(d, PCI_BIST); min_gnt = max_lat = 0; break; case PCI_HEADER_TYPE_CARDBUS: if ((class >> 8) != PCI_BASE_CLASS_BRIDGE) printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); + bist = get_conf_byte(d, PCI_BIST); min_gnt = max_lat = 0; break; default: + if (!d->no_config_access) printf("\t!!! Unknown header type %02x\n", htype); - return; + bist = 0; + min_gnt = max_lat = 0; + unknown_config_data = 1; } if (p->phy_slot) @@ -762,8 +839,10 @@ if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE)) printf("\tDevice tree node: %s\n", dt_node); - if (verbose > 1) + if (!unknown_config_data && verbose > 1) { + word cmd = get_conf_word(d, PCI_COMMAND); + word status = get_conf_word(d, PCI_STATUS); printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n", FLAG(cmd, PCI_COMMAND_IO), FLAG(cmd, PCI_COMMAND_MEMORY), @@ -793,6 +872,8 @@ FLAG(status, PCI_STATUS_INTx)); if (cmd & PCI_COMMAND_MASTER) { + byte latency = get_conf_byte(d, PCI_LATENCY_TIMER); + byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE); printf("\tLatency: %d", latency); if (min_gnt || max_lat) { @@ -809,16 +890,25 @@ printf(", Cache Line Size: %d bytes", cache_line * 4); putchar('\n'); } - if (int_pin || irq) + } + + if (verbose > 1) + { + byte int_pin = unknown_config_data ? 0 : get_conf_byte(d, PCI_INTERRUPT_PIN); + if (int_pin || p->irq) printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n", - (int_pin ? 'A' + int_pin - 1 : '?'), irq); + (int_pin ? 'A' + int_pin - 1 : '?'), p->irq); if (p->numa_node != -1) printf("\tNUMA node: %d\n", p->numa_node); if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) printf("\tIOMMU group: %s\n", iommu_group); } - else + + if (!unknown_config_data && verbose <= 1) { + word cmd = get_conf_word(d, PCI_COMMAND); + word status = get_conf_word(d, PCI_STATUS); + byte latency = get_conf_byte(d, PCI_LATENCY_TIMER); printf("\tFlags: "); if (cmd & PCI_COMMAND_MASTER) printf("bus master, "); @@ -838,8 +928,8 @@ ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??"); if (cmd & PCI_COMMAND_MASTER) printf(", latency %d", latency); - if (irq) - printf(", IRQ " PCIIRQ_FMT, irq); + if (p->irq) + printf(", IRQ " PCIIRQ_FMT, p->irq); if (p->numa_node != -1) printf(", NUMA node %d", p->numa_node); if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) @@ -866,6 +956,8 @@ case PCI_HEADER_TYPE_CARDBUS: show_htype2(d); break; + default: + show_htype_unknown(d); } } @@ -876,6 +968,12 @@ { unsigned int i, cnt; + if (d->no_config_access) + { + printf("WARNING: Cannot show hex-dump of the config space\n"); + return; + } + cnt = d->config_cached; if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt)) { @@ -911,13 +1009,9 @@ show_machine(struct device *d) { struct pci_dev *p = d->dev; - int c; - word sv_id, sd_id; char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128]; char *dt_node, *iommu_group; - get_subid(d, &sv_id, &sd_id); - if (verbose) { pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP); @@ -930,19 +1024,20 @@ pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id)); printf("Device:\t%s\n", pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id)); - if (sv_id && sv_id != 0xffff) + if ((p->known_fields & PCI_FILL_SUBSYS) && + p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) { printf("SVendor:\t%s\n", - pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id)); + pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->subsys_vendor_id)); printf("SDevice:\t%s\n", - pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id)); + pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); } if (p->phy_slot) printf("PhySlot:\t%s\n", p->phy_slot); - if (c = get_conf_byte(d, PCI_REVISION_ID)) - printf("Rev:\t%02x\n", c); - if (c = get_conf_byte(d, PCI_CLASS_PROG)) - printf("ProgIf:\t%02x\n", c); + if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) + printf("Rev:\t%02x\n", p->rev_id); + if (p->known_fields & PCI_FILL_CLASS_EXT) + printf("ProgIf:\t%02x\n", p->prog_if); if (opt_kernel) show_kernel_machine(d); if (p->numa_node != -1) @@ -958,14 +1053,15 @@ print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class)); print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id)); print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id)); - if (c = get_conf_byte(d, PCI_REVISION_ID)) - printf(" -r%02x", c); - if (c = get_conf_byte(d, PCI_CLASS_PROG)) - printf(" -p%02x", c); - if (sv_id && sv_id != 0xffff) + if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) + printf(" -r%02x", p->rev_id); + if (p->known_fields & PCI_FILL_CLASS_EXT) + printf(" -p%02x", p->prog_if); + if ((p->known_fields & PCI_FILL_SUBSYS) && + p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) { - print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id)); - print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id)); + print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->subsys_vendor_id)); + print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); } else printf(" \"\" \"\""); diff -Nru pciutils-3.7.0/lspci.h pciutils-3.8.0/lspci.h --- pciutils-3.7.0/lspci.h 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/lspci.h 2022-04-15 21:47:48.000000000 +0000 @@ -39,6 +39,7 @@ struct bus *parent_bus; struct bridge *bridge; /* Cache */ + int no_config_access; unsigned int config_cached, config_bufsize; byte *config; /* Cached configuration space data */ byte *present; /* Maps which configuration bytes are present */ @@ -55,8 +56,6 @@ word get_conf_word(struct device *d, unsigned int pos); byte get_conf_byte(struct device *d, unsigned int pos); -void get_subid(struct device *d, word *subvp, word *subdp); - /* Useful macros for decoding of bits and bit fields */ #define FLAG(x,y) ((x & y) ? '+' : '-') @@ -90,7 +89,7 @@ struct bridge { struct bridge *chain; /* Single-linked list of bridges */ struct bridge *next, *child; /* Tree of bridges */ - struct bus *first_bus; /* List of buses connected to this bridge */ + struct bus *first_bus, *last_bus; /* List of buses connected to this bridge */ unsigned int domain; unsigned int primary, secondary, subordinate; /* Bus numbers */ struct device *br_dev; diff -Nru pciutils-3.7.0/lspci.man pciutils-3.8.0/lspci.man --- pciutils-3.7.0/lspci.man 2020-05-26 16:12:49.000000000 +0000 +++ pciutils-3.8.0/lspci.man 2022-04-15 23:24:48.000000000 +0000 @@ -142,10 +142,10 @@ on any bus, "0.3" selects third function of device 0 on all buses and ".4" shows only the fourth function of each device. .TP -.B -d []:[][:] -Show only devices with specified vendor, device and class ID. The ID's are -given in hexadecimal and may be omitted or given as "*", both meaning -"any value". +.B -d []:[][:[:]] +Show only devices with specified vendor, device, class ID, and programming interface. +The ID's are given in hexadecimal and may be omitted or given as "*", both meaning +"any value". The class ID can contain "x" characters which stand for "any digit". .SS Other options .TP @@ -167,7 +167,9 @@ Invoke bus mapping mode which performs a thorough scan of all PCI devices, including those behind misconfigured bridges, etc. This option gives meaningful results only with a direct hardware access mode, which usually requires root privileges. -Please note that the bus mapper only scans PCI domain 0. +By default, the bus mapper scans domain. You can use the +.B -s +option to select a different domain. .TP .B --version Shows @@ -188,7 +190,7 @@ .TP .B -O = The behavior of the library is controlled by several named parameters. -This option allows to set the value of any of the parameters. Use \fB-O help\fP +This option allows one to set the value of any of the parameters. Use \fB-O help\fP for a list of known parameters and their default values. .TP .B -H1 diff -Nru pciutils-3.7.0/ls-tree.c pciutils-3.8.0/ls-tree.c --- pciutils-3.7.0/ls-tree.c 2020-01-25 19:21:11.000000000 +0000 +++ pciutils-3.8.0/ls-tree.c 2022-04-15 22:08:23.000000000 +0000 @@ -1,7 +1,7 @@ /* * The PCI Utilities -- Show Bus Tree * - * Copyright (c) 1997--2020 Martin Mares + * Copyright (c) 1997--2021 Martin Mares * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -12,7 +12,7 @@ #include "lspci.h" -struct bridge host_bridge = { NULL, NULL, NULL, NULL, 0, ~0, 0, ~0, NULL }; +struct bridge host_bridge = { NULL, NULL, NULL, NULL, NULL, 0, ~0, 0, ~0, NULL }; static struct bus * find_bus(struct bridge *b, unsigned int domain, unsigned int n) @@ -25,17 +25,34 @@ return bus; } +static struct device * +find_device(struct pci_dev *dd) +{ + struct device *d; + + if (!dd) + return NULL; + for (d=first_dev; d; d=d->next) + if (d->dev == dd) + break; + return d; +} + static struct bus * new_bus(struct bridge *b, unsigned int domain, unsigned int n) { struct bus *bus = xmalloc(sizeof(struct bus)); bus->domain = domain; bus->number = n; - bus->sibling = b->first_bus; + bus->sibling = NULL; bus->first_dev = NULL; bus->last_dev = &bus->first_dev; bus->parent_bridge = b; - b->first_bus = bus; + if (b->last_bus) + b->last_bus->sibling = bus; + b->last_bus = bus; + if (!b->first_bus) + b->first_bus = bus; return bus; } @@ -43,9 +60,20 @@ insert_dev(struct device *d, struct bridge *b) { struct pci_dev *p = d->dev; - struct bus *bus; + struct device *parent = NULL; + struct bus *bus = NULL; + + if (p->known_fields & PCI_FILL_PARENT) + parent = find_device(p->parent); + + if (parent && parent->bridge) + { + bus = parent->bridge->first_bus; + if (!bus) + bus = new_bus(parent->bridge, p->domain, p->bus); + } - if (! (bus = find_bus(b, p->domain, p->bus))) + if (!bus && ! (bus = find_bus(b, p->domain, p->bus))) { struct bridge *c; for (c=b->child; c; c=c->next) @@ -79,7 +107,7 @@ { struct pci_dev *dd = d->dev; word class = dd->device_class; - byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f; + byte ht = d->no_config_access ? -1 : (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f); if ((class >> 8) == PCI_BASE_CLASS_BRIDGE && (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS)) { @@ -101,6 +129,7 @@ last_br = &b->chain; b->next = b->child = NULL; b->first_bus = NULL; + b->last_bus = NULL; b->br_dev = d; d->bridge = b; pacc->debug("Tree: bridge %04x:%02x:%02x.%d: %02x -> %02x-%02x\n", @@ -108,14 +137,47 @@ b->primary, b->secondary, b->subordinate); } } + + /* Append additional bridges reported by libpci via d->parent */ + + for (d=first_dev; d; d=d->next) + { + struct device *parent = NULL; + if (d->dev->known_fields & PCI_FILL_PARENT) + parent = find_device(d->dev->parent); + if (!parent || parent->bridge) + continue; + b = xmalloc(sizeof(struct bridge)); + b->domain = parent->dev->domain; + b->primary = parent->dev->bus; + b->secondary = d->dev->bus; + /* At this stage subordinate number is unknown, so set it to secondary bus number. */ + b->subordinate = b->secondary; + *last_br = b; + last_br = &b->chain; + b->next = b->child = NULL; + b->first_bus = NULL; + b->last_bus = NULL; + b->br_dev = parent; + parent->bridge = b; + pacc->debug("Tree: bridge %04x:%02x:%02x.%d\n", b->domain, + parent->dev->bus, parent->dev->dev, parent->dev->func); + } *last_br = NULL; /* Create a bridge tree */ for (b=&host_bridge; b; b=b->chain) { - struct bridge *c, *best; - best = NULL; + struct device *br_dev = b->br_dev; + struct bridge *c, *best = NULL; + struct device *parent = NULL; + + if (br_dev && (br_dev->dev->known_fields & PCI_FILL_PARENT)) + parent = find_device(br_dev->dev->parent); + if (parent) + best = parent->bridge; + if (!best) for (c=&host_bridge; c; c=c->chain) if (c != b && (c == &host_bridge || b->domain == c->domain) && b->primary >= c->secondary && b->primary <= c->subordinate && @@ -140,12 +202,16 @@ insert_dev(d, &host_bridge); } +#define LINE_BUF_SIZE 1024 + static void print_it(char *line, char *p) { - *p++ = '\n'; *p = 0; fputs(line, stdout); + if (p >= line + LINE_BUF_SIZE - 1) + fputs("...", stdout); + putchar('\n'); for (p=line; *p; p++) if (*p == '+' || *p == '|') *p = '|'; @@ -155,23 +221,28 @@ static void show_tree_bridge(struct bridge *, char *, char *); -#define LINE_BUF_SIZE 1024 - static char * FORMAT_CHECK(printf, 3, 4) tree_printf(char *line, char *p, char *fmt, ...) { va_list args; - char *end = line + LINE_BUF_SIZE - 2; + int space = line + LINE_BUF_SIZE - 1 - p; - if (p >= end) + if (space <= 0) return p; va_start(args, fmt); - int res = vsnprintf(p, end - p, fmt, args); + int res = vsnprintf(p, space, fmt, args); if (res < 0) { - /* Ancient C libraries return -1 on overflow */ - p += strlen(p); + /* Ancient C libraries return -1 on overflow and they do not truncate the output properly. */ + *p = 0; + p += space; + } + else if (res >= space) + { + /* Ancient C libraries do not truncate the output properly. */ + *(p+space-1) = 0; + p += space; } else p += res; @@ -191,7 +262,9 @@ for (b=&host_bridge; b; b=b->chain) if (b->br_dev == d) { - if (b->secondary == b->subordinate) + if (b->secondary == 0) + p = tree_printf(line, p, "-"); + else if (b->secondary == b->subordinate) p = tree_printf(line, p, "-[%02x]-", b->secondary); else p = tree_printf(line, p, "-[%02x-%02x]-", b->secondary, b->subordinate); diff -Nru pciutils-3.7.0/maint/README pciutils-3.8.0/maint/README --- pciutils-3.7.0/maint/README 1970-01-01 00:00:00.000000000 +0000 +++ pciutils-3.8.0/maint/README 2022-04-18 16:56:49.000000000 +0000 @@ -0,0 +1,18 @@ +How to release pciutils +~~~~~~~~~~~~~~~~~~~~~~~ +(a couple of hints for the forgetful maintainer) + +Update pci.ids. + +Check version numbers in Makefile and lib/pci.h. + +ssh-add ~/.ssh/id_korg + +maint/tag-release vX.Y.Z +git push --tags + +maint/release + +Update progs/pciutils at Jabberwock. + +Check that everything was pushed to both kernel.org and github.com. diff -Nru pciutils-3.7.0/maint/RELEASE pciutils-3.8.0/maint/RELEASE --- pciutils-3.7.0/maint/RELEASE 2018-03-18 17:36:12.000000000 +0000 +++ pciutils-3.8.0/maint/RELEASE 1970-01-01 00:00:00.000000000 +0000 @@ -1,18 +0,0 @@ -How to release pciutils -~~~~~~~~~~~~~~~~~~~~~~~ -(a couple of hints for the forgetful maintainer) - -Update pci.ids. - -Check version numbers in Makefile and lib/pci.h. - -ssh-add ~/.ssh/id_korg - -maint/tag-release vX.Y.Z -git push --tags - -maint/release - -Update progs/pciutils at Jabberwock. - -Check that everything was pushed to both kernel.org and github.com. diff -Nru pciutils-3.7.0/Makefile pciutils-3.8.0/Makefile --- pciutils-3.7.0/Makefile 2020-05-30 22:17:26.000000000 +0000 +++ pciutils-3.8.0/Makefile 2022-04-18 16:47:28.000000000 +0000 @@ -1,11 +1,11 @@ # Makefile for The PCI Utilities -# (c) 1998--2020 Martin Mares +# (c) 1998--2022 Martin Mares OPT=-O2 CFLAGS=$(OPT) -Wall -W -Wno-parentheses -Wstrict-prototypes -Wmissing-prototypes -VERSION=3.7.0 -DATE=2020-05-31 +VERSION=3.8.0 +DATE=2022-04-18 # Host OS and release (override if you are cross-compiling) HOST= @@ -33,6 +33,7 @@ # Installation directories PREFIX=/usr/local +BINDIR=$(PREFIX)/bin SBINDIR=$(PREFIX)/sbin SHAREDIR=$(PREFIX)/share IDSDIR=$(SHAREDIR) @@ -45,11 +46,15 @@ INSTALL=install DIRINSTALL=install -d STRIP=-s +ifdef CROSS_COMPILE CC=$(CROSS_COMPILE)gcc +else +CC=cc +endif AR=$(CROSS_COMPILE)ar RANLIB=$(CROSS_COMPILE)ranlib -# Base name of the library (overriden on NetBSD, which has its own libpci) +# Base name of the library (overridden on NetBSD, which has its own libpci) LIBNAME=libpci -include lib/config.mk @@ -59,7 +64,7 @@ export -all: lib/$(PCILIB) lspci setpci example lspci.8 setpci.8 pcilib.7 pci.ids.5 update-pciids update-pciids.8 $(PCI_IDS) +all: lib/$(PCILIB) lspci$(EXEEXT) setpci$(EXEEXT) example$(EXEEXT) lspci.8 setpci.8 pcilib.7 pci.ids.5 update-pciids update-pciids.8 $(PCI_IDS) lib/$(PCILIB): $(PCIINC) force $(MAKE) -C lib all @@ -69,8 +74,14 @@ lib/config.h lib/config.mk: cd lib && ./configure -lspci: lspci.o ls-vpd.o ls-caps.o ls-caps-vendor.o ls-ecaps.o ls-kernel.o ls-tree.o ls-map.o common.o lib/$(PCILIB) -setpci: setpci.o common.o lib/$(PCILIB) +COMMON=common.o +ifeq ($(COMPAT_GETOPT),yes) +PCIINC+=compat/getopt.h +COMMON+=compat/getopt.o +endif + +lspci$(EXEEXT): lspci.o ls-vpd.o ls-caps.o ls-caps-vendor.o ls-ecaps.o ls-kernel.o ls-tree.o ls-map.o $(COMMON) lib/$(PCILIB) +setpci$(EXEEXT): setpci.o $(COMMON) lib/$(PCILIB) LSPCIINC=lspci.h pciutils.h $(PCIINC) lspci.o: lspci.c $(LSPCIINC) @@ -83,8 +94,9 @@ setpci.o: setpci.c pciutils.h $(PCIINC) common.o: common.c pciutils.h $(PCIINC) +compat/getopt.o: compat/getopt.c -lspci: LDLIBS+=$(LIBKMOD_LIBS) +lspci$(EXEEXT): LDLIBS+=$(LIBKMOD_LIBS) ls-kernel.o: CFLAGS+=$(LIBKMOD_CFLAGS) update-pciids: update-pciids.sh @@ -92,14 +104,14 @@ chmod +x $@ # The example of use of libpci -example: example.o lib/$(PCILIB) +example$(EXEEXT): example.o lib/$(PCILIB) example.o: example.c $(PCIINC) -%: %.o +%$(EXEEXT): %.o $(CC) $(LDFLAGS) $(TARGET_ARCH) $^ $(LDLIBS) -o $@ %.8 %.7 %.5: %.man - M=`echo $(DATE) | sed 's/-01-/-January-/;s/-02-/-February-/;s/-03-/-March-/;s/-04-/-April-/;s/-05-/-May-/;s/-06-/-June-/;s/-07-/-July-/;s/-08-/-August-/;s/-09-/-September-/;s/-10-/-October-/;s/-11-/-November-/;s/-12-/-December-/;s/\(.*\)-\(.*\)-\(.*\)/\3 \2 \1/'` ; sed <$< >$@ "s/@TODAY@/$$M/;s/@VERSION@/pciutils-$(VERSION)/;s#@IDSDIR@#$(IDSDIR)#" + M=`echo $(DATE) | sed 's/-01-/-January-/;s/-02-/-February-/;s/-03-/-March-/;s/-04-/-April-/;s/-05-/-May-/;s/-06-/-June-/;s/-07-/-July-/;s/-08-/-August-/;s/-09-/-September-/;s/-10-/-October-/;s/-11-/-November-/;s/-12-/-December-/;s/\(.*\)-\(.*\)-\(.*\)/\3 \2 \1/'` ; sed <$< >$@ "s/@TODAY@/$$M/;s/@VERSION@/pciutils-$(VERSION)/;s#@IDSDIR@#$(IDSDIR)#;s#@PCI_IDS@#$(PCI_IDS)#" ctags: rm -f tags @@ -111,15 +123,16 @@ clean: rm -f `find . -name "*~" -o -name "*.[oa]" -o -name "\#*\#" -o -name TAGS -o -name core -o -name "*.orig"` - rm -f update-pciids lspci setpci example lib/config.* *.[578] pci.ids.gz lib/*.pc lib/*.so lib/*.so.* tags + rm -f update-pciids lspci$(EXEEXT) setpci$(EXEEXT) example$(EXEEXT) lib/config.* *.[578] pci.ids.gz lib/*.pc lib/*.so lib/*.so.* tags rm -rf maint/dist distclean: clean install: all # -c is ignored on Linux, but required on FreeBSD - $(DIRINSTALL) -m 755 $(DESTDIR)$(SBINDIR) $(DESTDIR)$(IDSDIR) $(DESTDIR)$(MANDIR)/man8 $(DESTDIR)$(MANDIR)/man7 $(DESTDIR)/$(MANDIR)/man5 - $(INSTALL) -c -m 755 $(STRIP) lspci setpci $(DESTDIR)$(SBINDIR) + $(DIRINSTALL) -m 755 $(DESTDIR)$(BINDIR) $(DESTDIR)$(SBINDIR) $(DESTDIR)$(IDSDIR) $(DESTDIR)$(MANDIR)/man8 $(DESTDIR)$(MANDIR)/man7 $(DESTDIR)/$(MANDIR)/man5 + $(INSTALL) -c -m 755 $(STRIP) lspci$(EXEEXT) $(DESTDIR)$(LSPCIDIR) + $(INSTALL) -c -m 755 $(STRIP) setpci$(EXEEXT) $(DESTDIR)$(SBINDIR) $(INSTALL) -c -m 755 update-pciids $(DESTDIR)$(SBINDIR) $(INSTALL) -c -m 644 $(PCI_IDS) $(DESTDIR)$(IDSDIR) $(INSTALL) -c -m 644 lspci.8 setpci.8 update-pciids.8 $(DESTDIR)$(MANDIR)/man8 @@ -141,25 +154,36 @@ $(DIRINSTALL) -m 755 $(DESTDIR)$(LIBDIR) $(INSTALL) -c -m 644 lib/$(PCILIB) $(DESTDIR)$(LIBDIR) -install-lib: $(PCIINC_INS) lib/$(PCILIBPC) install-pcilib +install-lib: $(PCIINC_INS) install-pcilib $(DIRINSTALL) -m 755 $(DESTDIR)$(INCDIR)/pci $(DESTDIR)$(PKGCFDIR) $(INSTALL) -c -m 644 $(PCIINC_INS) $(DESTDIR)$(INCDIR)/pci $(INSTALL) -c -m 644 lib/$(PCILIBPC) $(DESTDIR)$(PKGCFDIR) ifeq ($(SHARED),yes) ifeq ($(LIBEXT),dylib) + ln -sf $(PCILIB) $(DESTDIR)$(LIBDIR)/$(LIBNAME)$(ABI_VERSION).$(LIBEXT) ln -sf $(LIBNAME)$(ABI_VERSION).$(LIBEXT) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT) else + ln -sf $(PCILIB) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT)$(ABI_VERSION) ln -sf $(LIBNAME).$(LIBEXT)$(ABI_VERSION) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT) endif endif uninstall: all - rm -f $(DESTDIR)$(SBINDIR)/lspci $(DESTDIR)$(SBINDIR)/setpci $(DESTDIR)$(SBINDIR)/update-pciids + rm -f $(DESTDIR)$(SBINDIR)/lspci$(EXEEXT) $(DESTDIR)$(SBINDIR)/setpci$(EXEEXT) $(DESTDIR)$(SBINDIR)/update-pciids rm -f $(DESTDIR)$(IDSDIR)/$(PCI_IDS) rm -f $(DESTDIR)$(MANDIR)/man8/lspci.8 $(DESTDIR)$(MANDIR)/man8/setpci.8 $(DESTDIR)$(MANDIR)/man8/update-pciids.8 rm -f $(DESTDIR)$(MANDIR)/man7/pcilib.7 + rm -f $(DESTDIR)$(MANDIR)/man5/pci.ids.5 + rm -f $(DESTDIR)$(LIBDIR)/$(PCILIB) + rm -f $(DESTDIR)$(PKGCFDIR)/$(PCILIBPC) + rm -f $(addprefix $(DESTDIR)$(INCDIR)/pci/,$(notdir $(PCIINC_INS))) ifeq ($(SHARED),yes) - rm -f $(DESTDIR)$(LIBDIR)/$(PCILIB) $(DESTDIR)$(LIBDIR)/$(LIBNAME).so$(ABI_VERSION) + rm -f $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT) +ifeq ($(LIBEXT),dylib) + rm -f $(DESTDIR)$(LIBDIR)/$(LIBNAME)$(ABI_VERSION).$(LIBEXT) +else + rm -f $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT)$(ABI_VERSION) +endif endif pci.ids.gz: pci.ids diff -Nru pciutils-3.7.0/pci.ids pciutils-3.8.0/pci.ids --- pciutils-3.7.0/pci.ids 2020-05-29 01:15:02.000000000 +0000 +++ pciutils-3.8.0/pci.ids 2022-04-15 22:17:00.000000000 +0000 @@ -1,8 +1,8 @@ # # List of PCI ID's # -# Version: 2020.05.29 -# Date: 2020-05-29 03:15:02 +# Version: 2022.04.16 +# Date: 2022-04-16 00:17:00 # # Maintained by Albert Pool, Martin Mares, and other volunteers from # the PCI ID Project at https://pci-ids.ucw.cz/. @@ -42,6 +42,8 @@ 7a0b SPI Controller 7a0c LPC Controller 7a0f DMA (Direct Memory Access) Controller +# Found on some boards with two sockets + 7a10 Hyper Transport Bridge Controller 7a14 EHCI USB Controller 7a15 Vivante GPU (Graphics Processing Unit) 7a19 PCI-to-PCI Bridge @@ -68,6 +70,8 @@ 018a LevelOne 0106 FPC-0106TX misprogrammed [RTL81xx] 01de Oxide Computer Company +# probably misprogrammed Intel Atom C2338 on Dell 0K8Y0N board +0200 Dell (wrong ID) # 021b is not Compaq but there is a board misprogrammed 021b Compaq Computer Corporation 8139 HNE-300 (RealTek RTL8139c) [iPaq Networking] @@ -91,6 +95,42 @@ 1703 ISDN Adapter (PCI Bus, DV, W) 1704 ISDN Adapter (PCI Bus, D, C) 0721 Sapphire, Inc. +0731 Jingjia Microelectronics Co Ltd + 7200 JM7200 Series GPU + 0731 7201 JM7201 + 0731 7202 JM7202 + 0731 7208 JM7200 + 0731 7212 JM7200 + 0731 7214 JM7500 + 0731 7215 JM7200 + 9100 JM9100 + 0731 9101 JM9100 + 0731 9102 JM9100-I + 910a JH910 + 0731 910a JH910 + 0731 910b JH910-I + 0731 910c JH910-M + 9200 JM9200 + 920a JH920 + 0731 920a JH920 + 0731 920b JH920-I + 0731 920c JH920-M + 920b JH920-I + 920c JH920-M + 9210 JM9210 + 0731 9210 JM9210 + 0731 9211 JM9210-I + 9211 JM9210-I + 9230 JM9230 + 0731 9230 JM9230 + 0731 9231 JM9230-I + 9231 JM9231-I + 9250 JM9250 + 0731 9250 JM9250 + 930a JH930-I + 0731 930a JH930-I + 0731 930b JH930-M + 930b JH930-M 0777 Ubiquiti Networks, Inc. 0795 Wired Inc. 6663 Butane II (MPEG2 encoder board) @@ -114,6 +154,7 @@ 0905 R1T3 Single T3 Digital Telephony Card 0906 RCB24FXX 24-channel modular analog telephony card 0a06 RCB672FXX 672-channel modular analog telephony card +0ccd Preferred Networks, Inc. 0e11 Compaq Computer Corporation 0001 PCI to EISA Bridge 0002 PCI to ISA Bridge @@ -270,6 +311,9 @@ 0013 53c875a 1000 1000 LSI53C875A PCI to Ultra SCSI Controller 0014 MegaRAID Tri-Mode SAS3516 + 1000 9460 MegaRAID 9460-16i + 1000 9480 MegaRAID 9480-8i8e + 1000 9481 MegaRAID 9480-8e 1028 1f3a PERC H745 Adapter 1028 1f3b PERC H745 Front 1028 1fd4 PERC H745P MX @@ -281,10 +325,15 @@ 8086 9460 RAID Controller RSP3TD160F 8086 9480 RAID Controller RSP3MD088F 0015 MegaRAID Tri-Mode SAS3416 + 1000 9441 MegaRAID 9440-16i 1028 1f3c PERC H345 Adapter 1028 1f3d PERC H345 Front 1d49 0503 ThinkSystem RAID 530-16i PCIe 12Gb Adapter 0016 MegaRAID Tri-Mode SAS3508 + 1000 9461 MegaRAID 9460-8i + 1000 9462 MegaRAID 9460-4i + 1000 9463 MegaRAID 9365-28i + 1000 9464 MegaRAID 9365-24i 1028 1fc9 PERC H840 Adapter 1028 1fcb PERC H740P Adapter 1028 1fcd PERC H740P Mini @@ -295,6 +344,8 @@ 8086 352f Integrated RAID Module RMSP3HD080E 8086 9461 RAID Controller RSP3DD080F 0017 MegaRAID Tri-Mode SAS3408 + 1000 9440 MegaRAID 9440-8i + 1000 9442 MegaRAID 9440-4i 1d49 0500 ThinkSystem RAID 530-8i PCIe 12Gb Adapter 1d49 0502 ThinkSystem RAID 530-8i Dense Adapter 8086 3528 Integrated RAID RMSP3LD060 @@ -424,6 +475,7 @@ 1000 9363 MegaRAID SAS 9361-4i 1000 9364 MegaRAID SAS 9364-8i 1000 936a MegaRAID SAS 9364-8i + 1000 9380 MegaRAID SAS 9380-8e 1028 1f41 PERC H830 Adapter 1028 1f42 PERC H730P Adapter 1028 1f43 PERC H730 Adapter @@ -505,6 +557,7 @@ 1000 3040 9210-8i 1000 3080 9200-8e [LSI SAS 6Gb/s SAS/SATA PCIe x8 External HBA] 1000 30b0 9200-8e [LSI SAS 6Gb/s SAS/SATA PCIe x8 External HBA] + 1014 03ca IBM 6Gb SAS HBA [9212-4i4e] 1028 1f1c 6Gbps SAS HBA Adapter 1028 1f1d PERC H200 Adapter 1028 1f1e PERC H200 Integrated @@ -622,6 +675,7 @@ 1000 3050 SAS9217-8i 1000 3060 SAS9217-4i4e 1014 0472 N2125 External Host Bus Adapter + 1014 047a N2115 Internal Host Bus Adapter 1590 0041 H220i 1590 0042 H221 / 9207-8e 1590 0044 H220i @@ -665,6 +719,32 @@ 1bd4 0026 12G SAS3008IT RACK 1bd4 0027 12G SAS3008IMR RACK 1bd4 0028 12G SAS3008IR RACK + 00a5 Fusion-MPT 24GSAS/PCIe SAS40xx + 1000 4600 MegaRAID 9670W-16i Tri-Mode Storage Adapter + 1000 4610 MegaRAID 9670-24i Tri-Mode Storage Adapter + 1000 4620 MegaRAID 9660-16i Tri-Mode Storage Adapter + 1000 4630 MegaRAID 9660-8i8e Tri-Mode Storage Adapter + 1000 4640 eHBA 9600W-16i Tri-Mode Storage Adapter + 1000 4650 eHBA 9600W-16e Tri-Mode Storage Adapter + 1000 4660 eHBA 9600-24i Tri-Mode Storage Adapter + 1000 4670 eHBA 9600-16i Tri-Mode Storage Adapter + 1000 4680 eHBA 9600-16e Tri-Mode Storage Adapter + 1000 4690 MegaRAID 9620-16i Tri-Mode Storage Adapter + 1000 46a0 MegaRAID 9660-24i Tri-Mode Storage Adapter + 1000 46c0 eHBA 9680W-16e Tri-Mode Storage Adapter + 1000 46d0 eHBA 9600-8i8e Tri-Mode Storage Adapter + 1028 2114 PERC H965i Adapter + 1028 2115 PERC H965i Front + 1028 2117 PERC H965i MX + 1028 213a PERC H965e Adapter + 1028 213b PERC H765i Adapter + 1028 213c PERC H765i Front + 1028 213d PERC H765N Front + 1028 213e PERC H765i MX + 1028 213f PERC H365i Adapter + 1028 2140 PERC H365i Front + 1028 2141 PERC H360 MX + 1028 2142 HBA 465e Adapter 00ab SAS3516 Fusion-MPT Tri-Mode RAID On Chip (ROC) # 8 Internal and 8 External port channel 9400 HBA 1000 3040 HBA 9400-8i8e @@ -688,6 +768,8 @@ 1d49 0200 ThinkSystem 430-8i SAS/SATA 12Gb HBA 1d49 0202 ThinkSystem 430-8e SAS/SATA 12Gb HBA 1d49 0204 ThinkSystem 430-8i SAS/SATA 12Gb Dense HBA + 00b2 PCIe Switch management endpoint + 1d49 0003 ThinkSystem 1611-8P PCIe Gen4 NVMe Switch Adapter 00be SAS3504 Fusion-MPT Tri-Mode RAID On Chip (ROC) 00bf SAS3404 Fusion-MPT Tri-Mode I/O Controller Chip (IOC) 00c0 SAS3324 PCI-Express Fusion-MPT SAS-3 @@ -695,11 +777,18 @@ 00c2 SAS3324 PCI-Express Fusion-MPT SAS-3 00c3 SAS3324 PCI-Express Fusion-MPT SAS-3 00c4 SAS3224 PCI-Express Fusion-MPT SAS-3 +# SAS 9305 16 internal port HBA + 1000 3190 SAS9305-16i +# SAS 9305 24 internal port HBA + 1000 31a0 SAS9305-24i + 1170 0002 SAS3224 PCI Express to 12Gb HBA MEZZ CARD 00c5 SAS3316 PCI-Express Fusion-MPT SAS-3 00c6 SAS3316 PCI-Express Fusion-MPT SAS-3 00c7 SAS3316 PCI-Express Fusion-MPT SAS-3 00c8 SAS3316 PCI-Express Fusion-MPT SAS-3 00c9 SAS3216 PCI-Express Fusion-MPT SAS-3 +# 9305 16 external port SAS HBA + 1000 3180 SAS9305-16e 00ce MegaRAID SAS-3 3316 [Intruder] 1000 9371 MegaRAID SAS 9361-16i 1000 9390 MegaRAID SAS 9380-8i8e @@ -742,12 +831,24 @@ 1d49 0205 ThinkSystem 440-16i SAS/SATA PCIe Gen4 12Gb Internal HBA 1d49 0206 ThinkSystem 440-16e SAS/SATA PCIe Gen4 12Gb HBA 00e6 Fusion-MPT 12GSAS/PCIe Secure SAS38xx + 1000 4050 9500-16i Tri-Mode HBA + 1000 4060 9500-8i Tri-Mode HBA + 1000 4070 9500-16e Tri-Mode HBA + 1000 4080 9500-8e Tri-Mode HBA 1028 200b HBA355i Adapter 1028 200c HBA355i Front 1028 200d HBA355e Adapter - 1028 200e HBA355i MX + 1028 200e HBA350i MX + 1028 2170 HBA350i MM + 1028 2175 HBA350i Adapter + 1028 2197 HBA350i MM LP 1d49 0205 ThinkSystem 440-16i SAS/SATA PCIe Gen4 12Gb Internal HBA 1d49 0206 ThinkSystem 440-16e SAS/SATA PCIe Gen4 12Gb HBA + 1d49 0207 ThinkSystem 440-8i SAS/SATA PCIe Gen4 12Gb HBA + 1d49 0208 ThinkSystem 440-16i SAS/SATA PCIe Gen4 12Gb HBA + 1d49 0209 ThinkSystem 440-8e SAS/SATA PCIe Gen4 12Gb HBA + 8086 4050 Storage Controller RS3P4QF160J + 8086 4070 Storage Controller RS3P4GF016J 00e7 Fusion-MPT 12GSAS/PCIe Unsupported SAS38xx # Tampered part 1028 200b HBA355i Adapter Tampered @@ -849,16 +950,31 @@ 1d49 060e ThinkSystem RAID 940-32i 8GB Flash PCIe Gen4 12Gb Adapter 1d49 060f ThinkSystem RAID 940-8e 4GB Flash PCIe Gen4 12Gb Adapter 10e2 MegaRAID 12GSAS/PCIe Secure SAS39xx +# 9560 16 internal port RAID controller + 1000 4000 MegaRAID 9560-16i +# 9561 16 internal port RAID controller + 1000 4002 MegaRAID 9561-16i +# 9560 8 internal port RAID controller + 1000 4010 MegaRAID 9560-8i +# 9580 8 internal & 8 external port RAID controller + 1000 4020 MegaRAID 9580-8i8e +# MegaRAID 9562-16i 9562 16 internal port RAID controller + 1000 40b0 MegaRAID 9562-16i 1028 1ae0 PERC H755 Adapter 1028 1ae1 PERC H755 Front 1028 1ae2 PERC H755N Front 1028 1ae3 PERC H755 MX + 1028 2171 PERC H750 Mini + 1028 2176 PERC H750 Adapter 1d49 060a ThinkSystem RAID 940-8i 4GB Flash PCIe Gen4 12Gb Adapter 1d49 060b ThinkSystem RAID 940-8i 8GB Flash PCIe Gen4 12Gb Adapter 1d49 060c ThinkSystem RAID 940-16i 8GB Flash PCIe Gen4 12Gb Adapter 1d49 060d ThinkSystem RAID 940-16i 8GB Flash PCIe Gen4 12Gb Internal Adapter 1d49 060e ThinkSystem RAID 940-32i 8GB Flash PCIe Gen4 12Gb Adapter 1d49 060f ThinkSystem RAID 940-8e 4GB Flash PCIe Gen4 12Gb Adapter + 1d49 0610 ThinkSystem RAID 940-16i 4GB Flash PCIe Gen4 12Gb Adapter + 8086 4000 RAID Controller RS3P4TF160F + 8086 4020 RAID Controller RS3P4MF088F 10e3 MegaRAID 12GSAS/PCIe Unsupported SAS39xx 1028 1ae0 PERC H755 Adapter - Tampered Device 1028 1ae1 PERC H755 Front - Tampered Device @@ -867,6 +983,13 @@ 10e4 MegaRAID 12GSAS/PCIe Unsupported SAS38xx 10e5 MegaRAID 12GSAS/PCIe SAS38xx 10e6 MegaRAID 12GSAS/PCIe Secure SAS38xx + 1028 2172 PERC H355 Adapter + 1028 2173 PERC H355 Front + 1028 2174 PERC H350 Mini + 1028 2177 PERC H350 Adapter + 1028 2199 PERC H350 Mini LP + 1d49 0505 ThinkSystem RAID 540-8i PCIe Gen4 12Gb Adapter + 1d49 0506 ThinkSystem RAID 540-16i PCIe Gen4 12Gb Adapter 10e7 MegaRAID 12GSAS/PCIe Unsupported SAS38xx 1960 MegaRAID 1000 0518 MegaRAID 518 SCSI 320-2 Controller @@ -883,6 +1006,10 @@ 8086 0523 MegaRAID RAID Controller SRCS16 3050 SAS2008 PCI-Express Fusion-MPT SAS-2 6001 DX1 Multiformat Broadcast HD/SD Encoder/Decoder + c010 PEX88048 50 lane, 50 port, PCI Express Gen 4.0 ExpressFabric Platform + c012 PEX880xx PCIe Gen 4 Switch + 1d49 0003 ThinkSystem 1611-8P PCIe Gen4 NVMe Switch Adapter + c030 PEX890xx PCIe Gen 5 Switch 1001 Kolter Electronic 0010 PCI 1616 Measurement card with 32 digital I/O lines 0011 OPTO-PCI Opto-Isolated digital I/O board @@ -923,27 +1050,45 @@ 131c Kaveri [Radeon R7 Graphics] 131d Kaveri [Radeon R6 Graphics] 13e9 Ariel + 13fe Cyan Skillfish 1478 Navi 10 XL Upstream Port of PCI Express Switch 1479 Navi 10 XL Downstream Port of PCI Express Switch - 154c Kryptos + 154c Kryptos [Radeon RX 350] + 1462 7c28 MS-7C28 Motherboard 154e Garfield 1551 Arlene 1552 Pooky 1561 Anubis - 15d8 Picasso + 15d8 Picasso/Raven 2 [Radeon Vega Series / Radeon Vega Mobile Series] 103c 8615 Pavilion Laptop 15-cw1xxx + 17aa 3181 ThinkCentre M75n IoT 17aa 5124 ThinkPad E595 + ea50 cc10 RXi2-BP 15dd Raven Ridge [Radeon Vega Series / Radeon Vega Mobile Series] 103c 83c6 Radeon Vega 8 Mobile + 1043 876b PRIME Motherboard 1458 d000 Radeon RX Vega 11 + ea50 cc10 RXi2-BP 15de Raven/Raven2/Fenghuang HDMI/DP Audio Controller 103c 8615 Pavilion Laptop 15-cw1xxx + 1043 876b PRIME B450M-A Motherboard 17aa 5124 ThinkPad E595 + ea50 cc10 RXi2-BP 15df Raven/Raven2/Fenghuang/Renoir Cryptographic Coprocessor 103c 8615 Pavilion Laptop 15-cw1xxx + ea50 ce19 mCOM10-L1900 + 15e7 Barcelo 15ff Fenghuang [Zhongshan Subor Z+] 1607 Arden 1636 Renoir + 1637 Renoir Radeon High Definition Audio Controller + 1638 Cezanne +# Used in the Steam Deck + 163f VanGogh [AMD Custom GPU 0405] + 1640 Rembrandt Radeon High Definition Audio Controller + 164c Lucienne + 164d Rembrandt + 1681 Rembrandt [Radeon 680M] 1714 BeaverCreek HDMI Audio [Radeon HD 6500D and 6400G-6600G series] 103c 168b ProBook 4535s 3150 RV380/M24 [Mobility Radeon X600] @@ -953,9 +1098,9 @@ 3154 RV380/M24 GL [Mobility FireGL V3200] 3155 RV380 GL [FireMV 2400] 3171 RV380 GL [FireMV 2400] (Secondary) - 3e50 RV380 [Radeon X600] + 3e50 RV380 [Radeon X550/X600] 3e54 RV380 GL [FireGL V3200] - 3e70 RV380 [Radeon X600] (Secondary) + 3e70 RV380 [Radeon X550/X600] (Secondary) 4136 RS100 [Mobility IGP 320M] 4137 RS200 [Radeon IGP 340] 4144 R300 [Radeon 9500] @@ -1126,6 +1271,7 @@ 1179 ff50 Satellite P305D-S8995E 1458 a022 GA-MA770-DS3rev2.0 Motherboard 1458 a102 GA-880GMA-USB3 + 1462 7596 760GM-E51(MS-7596) Motherboard 17f2 5000 KI690-AM2 Motherboard 4384 SBx00 PCI to PCI Bridge 4385 SBx00 SMBus Controller @@ -1138,6 +1284,7 @@ 1179 ff50 Satellite P305D-S8995E 1458 4385 GA-MA770-DS3rev2.0 Motherboard 1462 7368 K9AG Neo2 + 1462 7596 760GM-E51(MS-7596) Motherboard 15d9 a811 H8DGU 174b 1001 PURE Fusion Mini 17f2 5000 KI690-AM2 Motherboard @@ -1188,6 +1335,7 @@ 1043 8389 M4A785TD Motherboard 105b 0e13 N15235/A74MX mainboard / AMD SB700 1458 b002 GA-MA770-DS3rev2.0 Motherboard + 1462 7596 760GM-E51(MS-7596) Motherboard 1849 4390 Motherboard (one of many) 4391 SB7x0/SB8x0/SB9x0 SATA Controller [AHCI mode] 103c 1609 ProLiant MicroServer N36L @@ -1211,6 +1359,7 @@ 1043 8443 M5A88-V EVO 105b 0e13 N15235/A74MX mainboard / AMD SB700 1458 5004 GA-880GMA-USB3 + 1462 7596 760GM-E51(MS-7596) Motherboard 15d9 a811 H8DGU 174b 1001 PURE Fusion Mini 4397 SB7x0/SB8x0/SB9x0 USB OHCI0 Controller @@ -1221,12 +1370,14 @@ 1043 8443 M5A88-V EVO 105b 0e13 N15235/A74MX mainboard / AMD SB700 1458 5004 GA-880GMA-USB3 + 1462 7596 760GM-E51(MS-7596) Motherboard 15d9 a811 H8DGU 174b 1001 PURE Fusion Mini 4398 SB7x0 USB OHCI1 Controller 1019 2120 A785GM-M 1043 82ef M3A78-EH Motherboard 105b 0e13 N15235/A74MX mainboard / AMD SB700 + 1462 7596 760GM-E51(MS-7596) Motherboard 15d9 a811 H8DGU 4399 SB7x0/SB8x0/SB9x0 USB OHCI2 Controller 1019 2120 A785GM-M @@ -1234,6 +1385,7 @@ 1043 8443 M5A88-V EVO 105b 0e13 N15235/A74MX mainboard / AMD SB700 1458 5004 GA-880GMA-USB3 + 1462 7596 760GM-E51(MS-7596) Motherboard 174b 1001 PURE Fusion Mini 439c SB7x0/SB8x0/SB9x0 IDE Controller 1002 4392 MSI MS-7713 motherboard @@ -1241,6 +1393,7 @@ 103c 1609 ProLiant MicroServer N36L 1043 82ef M3A78-EH Motherboard 105b 0e13 N15235/A74MX mainboard / AMD SB700 + 1462 7596 760GM-E51(MS-7596) Motherboard 439d SB7x0/SB8x0/SB9x0 LPC host controller 1019 2120 A785GM-M 103c 1609 ProLiant MicroServer N36L @@ -1248,6 +1401,7 @@ 1043 82ef M3A78-EH Motherboard 1043 8443 M5A88-V EVO 105b 0e13 N15235/A74MX mainboard / AMD SB700 + 1462 7596 760GM-E51(MS-7596) Motherboard 174b 1001 PURE Fusion Mini 43a0 SB700/SB800/SB900 PCI to PCI bridge (PCIE port 0) 43a1 SB700/SB800/SB900 PCI to PCI bridge (PCIE port 1) @@ -1520,7 +1674,7 @@ 5044 All-In-Wonder 128 PCI 1002 0028 Rage 128 AIW 1002 0029 Rage 128 AIW - 5046 Rage 4 [Rage 128 PRO AGP 4X TMDS] + 5046 Rage 4 [Rage 128 PRO AGP 4X] 1002 0004 Rage Fury Pro 1002 0008 Rage Fury Pro/Xpert 2000 Pro 1002 0014 Rage Fury Pro @@ -1530,9 +1684,9 @@ 1002 0048 Rage Fury Pro 1002 2000 Rage Fury MAXX AGP 4x (TMDS) (VGA device) 1002 2001 Rage Fury MAXX AGP 4x (TMDS) (Extra device?!) - 5050 Rage128 [Xpert 128 PCI] + 5050 Rage 4 [Rage 128 PRO PCI / Xpert 128 PCI] 1002 0008 Xpert 128 - 5052 Rage 128 PRO AGP 4X TMDS + 5052 Rage 4 [Rage 128 PRO AGP 4X] 5144 R100 [Radeon 7200 / All-In-Wonder Radeon] 1002 0008 Radeon 7000/Radeon VE 1002 0009 Radeon 7000/Radeon @@ -1631,8 +1785,6 @@ 524c Rage 128 VR AGP 1002 0008 Xpert 99/Xpert 2000 1002 0088 Xpert 99 - 5346 Rage 128 SF/4x AGP 2x - 1002 0048 RAGE 128 16MB VGA TVOUT AMC PAL 534d Rage 128 4X AGP 4x 1002 0008 Xpert 99/Xpert 2000 1002 0018 Xpert 2000 @@ -1659,7 +1811,7 @@ 554a R423 [Radeon X800 XT Platinum Edition] 554b R423 [Radeon X800 GT/SE] 1002 0302 Radeon X800 SE - 554d R430 [Radeon X800 XL] + 554d R480 [Radeon X800 GTO2/XL] 1002 0322 All-In-Wonder X800 XL 1458 2124 GV-R80L256V-B (AGP) 554e R430 [All-In-Wonder X800 GT] @@ -1668,7 +1820,7 @@ 5551 R423 GL [FireGL V5100] 5569 R423 [Radeon X800 PRO] (Secondary) 556b R423 [Radeon X800 GT] (Secondary) - 556d R430 [Radeon X800 XL] (Secondary) + 556d R480 [Radeon X800 GTO2/XL] (Secondary) 1458 2125 GV-R80L256V-B (AGP) 556f R430 [Radeon X800] (Secondary) 5571 R423 GL [FireGL V5100] (Secondary) @@ -1719,7 +1871,7 @@ 5957 RX780/RX790 Host Bridge 1849 5957 A770CrossFire Motherboard 5958 RD780 Host Bridge - 5960 RV280 [Radeon 9200 PRO] + 5960 RV280 [Radeon 9200 PRO / 9250] 17af 2020 Excalibur Radeon 9250 5961 RV280 [Radeon 9200] 1002 2f72 All-in-Wonder 9200 Series @@ -1735,7 +1887,7 @@ 5964 RV280 [Radeon 9200 SE] 1002 5964 Radeon 9200 SE, 64-bit 128MB DDR, 200/166MHz 1043 c006 Radeon 9200 SE / TD / 128M - 1458 4018 Radeon 9200 SE + 1458 4018 R92S128T (Radeon 9200 SE 128MB) 1458 4032 Radeon 9200 SE 128MB 147b 6191 R9200SE-DT 148c 2073 CN-AG92E @@ -1824,7 +1976,7 @@ 1002 5c63 Apple iBook G4 2004 144d c00c P30 notebook 5d44 RV280 [Radeon 9200 SE] (Secondary) - 1458 4019 Radeon 9200 SE (Secondary) + 1458 4019 R92S128T (Radeon 9200 SE 128MB Secondary) 1458 4032 Radeon 9200 SE 128MB 147b 6190 R9200SE-DT (Secondary) 174b 7c12 Radeon 9200 SE (Secondary) @@ -1861,7 +2013,7 @@ 5e6d RV410 [Radeon X700] (Secondary) 148c 2117 Bravo X700 (Secondary) 5f57 R423 [Radeon X800 XT] - 6600 Mars [Radeon HD 8670A/8670M/8750M] + 6600 Mars [Radeon HD 8670A/8670M/8750M / R7 M370] 103c 1952 ProBook 455 G1 6601 Mars [Radeon HD 8730M] 103c 2100 FirePro M4100 @@ -1878,8 +2030,11 @@ 6607 Mars LE [Radeon HD 8530M / R5 M240] 6608 Oland GL [FirePro W2100] 13cc 3d28 MXRT-2600 - 6610 Oland XT [Radeon HD 8670 / R7 250/350] + 6609 Oland GL [FirePro W2100 / Barco MXRT 2600] + 6610 Oland XT [Radeon HD 8670 / R5 340X OEM / R7 250/350/350X OEM] 1019 0030 Radeon HD 8670 + 1028 0081 Radeon R7 350X OEM + 1028 0083 Radeon R5 340X OEM 1028 2120 Radeon R7 250 1028 2322 Radeon R7 250 1462 2910 Radeon HD 8670 @@ -1888,16 +2043,25 @@ 1642 3c81 Radeon HD 8670 1642 3c91 Radeon HD 8670 1642 3f09 Radeon R7 350 - 6611 Oland [Radeon HD 8570 / R7 240/340 / Radeon 520 OEM] + 6611 Oland [Radeon HD 8570 / R5 430 OEM / R7 240/340 / Radeon 520 OEM] + 1028 1001 Radeon R5 430 OEM (1024 MByte) + 1028 1002 Radeon R5 430 OEM (2048 MByte) +# The 'AMD Radeon R5 430' instead of 240/340 is NOT a typo! It's actually correct. + 1028 1711 R5 430 OEM (2048 MByte) 1028 210b Radeon R5 240 OEM +# OEM-card for Dell; verified through AMD's own drivers (*.inf) and a TPU BIOS in database + 1028 2121 Radeon HD 8570 OEM +# OEM-card from Fujitsu; verified through AMD's own drivers (*.inf) + 10cf 1889 Radeon HD 8570 OEM 1642 1869 Radeon 520 OEM 174b 4248 Radeon R7 240 OEM 174b a240 Radeon R7 240 OEM 174b d340 Radeon R7 340 OEM 1b0a 90d3 Radeon R7 240 OEM - 6613 Oland PRO [Radeon R7 240/340] + 6613 Oland PRO [Radeon R7 240/340 / Radeon 520] 148c 7340 Radeon R7 340 1682 7240 R7 240 2048 MB + 1dcf 3000 Oland PRO [Radeon R7 240/340 / Radeon 520] 6631 Oland 6640 Saturn XT [FirePro M6100] 106b 014b Tropo XT [Radeon R9 M380 Mac Edition] @@ -1910,11 +2074,14 @@ 103c 0b0c Bonaire [FirePro W4300] 103c 230c FirePro W5100 13cc 3d2a MXRT-5600 + 664d Bonaire [FirePro W5100 / Barco MXRT-5600] 6650 Bonaire 6651 Bonaire 6658 Bonaire XTX [Radeon R7 260X/360] 1043 048f R7260X-DC2OC-2GD5 1043 04d3 AMD Radeon R7 260X +# GV-R726XOC-1GD + 1458 227b Radeon R7 260X 148c 0907 Radeon R7 360 1682 0907 Radeon R7 360 1682 7360 Radeon R7 360 @@ -1962,9 +2129,9 @@ 6667 Jet ULT [Radeon R5 M230] 666f Sun LE [Radeon HD 8550M / R5 M230] 66a0 Vega 20 [Radeon Instinct] - 66a1 Vega 20 + 66a1 Vega 20 [Radeon Pro VII/Radeon Instinct MI50 32GB] 66a2 Vega 20 - 66a3 Vega 20 + 66a3 Vega 20 [Radeon Pro Vega II/Radeon Pro Vega II Duo] 66a7 Vega 20 [Radeon Pro Vega 20] 66af Vega 20 [Radeon VII] 6704 Cayman PRO GL [FirePro V7900] @@ -2158,7 +2325,7 @@ 8086 2111 Radeon HD 6625M 6743 Whistler [Radeon E6760] 6749 Turks GL [FirePro V4900] - 15c3 2b06 MED-X4900 + 15c3 2b06 MED-X4900 (EIZO) 674a Turks GL [FirePro V3900] 13cc 3d22 MXRT-2500 15c3 0106 MED-X3900 @@ -2187,7 +2354,7 @@ 174b 7670 Radeon HD 7670 174b e181 Radeon HD 6670 1787 2309 Radeon HD 6670 - 6759 Turks PRO [Radeon HD 6570/7570/8550] + 6759 Turks PRO [Radeon HD 6570/7570/8550 / R5 230] 103c 3130 Radeon HD 6570 1043 0403 Radeon HD 6570 1462 2500 Radeon HD 6570 @@ -2196,9 +2363,15 @@ 1642 3a67 Radeon HD 6570 1682 3280 Radeon HD 7570 1682 3530 Radeon HD 8550 + 1682 5230 Radeon R5 230 series + 1682 6450 Radeon HD 6450 series 174b 7570 Radeon HD 7570 + 174b 8550 Radeon HD8550 OEM + 174b 8570 Radeon HD8550 OEM 174b e142 Radeon HD 6570 174b e181 Radeon HD 6570 + 1787 a230 Radeon R5 230 series + 1787 a450 Radeon HD 6450 series 1b0a 908f Radeon HD 6570 1b0a 9090 Radeon HD 6570 1b0a 9091 Radeon HD 6570 @@ -2441,6 +2614,7 @@ 174b e164 Radeon HD 6450 1 GB DDR3 174b e180 Radeon HD 6450 174b e201 Radeon HD 6450 + 1787 2311 Radeon HD 6450 17af 8450 Radeon HD 8450 OEM 1b0a 9096 Radeon HD 6450 1b0a 9097 Radeon HD 6450 @@ -2556,6 +2730,7 @@ 1043 04dd STRIX R9 390 148c 2358 Radeon R9 390 174b e324 Sapphire Nitro R9 390 + 67b8 Hawaii XT [Radeon R9 290X Engineering Sample] 67b9 Vesuvius [Radeon R9 295X2] 67be Hawaii LE 67c0 Ellesmere [Radeon Pro WX 7100 Mobile] @@ -2568,6 +2743,8 @@ 67cc Ellesmere [Polaris10] 67cf Ellesmere [Polaris10] 67d0 Ellesmere [Radeon Pro V7300X / V7350x2] + 67d4 Ellesmere [Radeon Pro WX 7100 / Barco MXRT-8700] + 67d7 Ellesmere [Radeon Pro WX 5100 / Barco MXRT-6700] 67df Ellesmere [Radeon RX 470/480/570/570X/580/580X/590] 1002 0b37 Radeon RX 480 1028 1722 Radeon RX 570X @@ -2588,14 +2765,23 @@ 1462 3413 Radeon RX 480 Gaming X 8GB 1462 3416 Radeon RX 570 1462 3418 Radeon RX 580 Armor 4G OC + 1462 341b Radeon RX 570 Armor 8G OC 1462 341e Radeon RX 570 Armor 4G OC + 1462 809e Radeon RX 480 4GB 1462 8a92 Radeon RX 580 148c 2372 Radeon RX 480 [Red Dragon] 148c 2373 Radeon RX 470 + 148c 2377 Red Devil RX 580 8G Golden +# https://www.techpowerup.com/vgabios/?manufacturer=Powercolor&model=RX+580 + 148c 2378 Radeon RX 580 + 148c 2379 Radeon RX 570 4G [Red Dragon] + 148c 2391 Radeon RX 590 [Red Devil] 1682 9470 Radeon RX 470 1682 9480 Radeon RX 480 + 1682 9587 Radeon RX 590 FATBOY 8GB 1682 9588 Radeon RX 580 XTR 1682 c570 Radeon RX 570 + 1682 c580 Radeon RX 580 174b e347 Radeon RX 470/480 174b e349 Radeon RX 470 1787 a470 Radeon RX 470 @@ -2604,6 +2790,7 @@ 1849 5030 Phantom Gaming D Radeon RX580 8G OC 1da2 e353 Radeon RX 570 Pulse 4GB 1da2 e366 Nitro+ Radeon RX 570/580/590 + 1da2 e387 Radeon RX 580 Pulse 4GB 67e0 Baffin [Radeon Pro WX 4170] 103c 8270 Radeon Pro WX 4170 103c 8272 Radeon Pro WX 4170 @@ -2621,8 +2808,10 @@ 67e9 Baffin [Polaris11] 67eb Baffin [Radeon Pro V5300X] 67ef Baffin [Radeon RX 460/560D / Pro 450/455/460/555/555X/560/560X] + 1025 1367 RX560X 4GB 1028 1703 RX 560D OEM OC 2 GB 103c 3421 Radeon RX 460 + 1043 0561 AREZ Radeon RX 560 106b 0160 Radeon Pro 460 106b 0166 Radeon Pro 455 106b 0167 Radeon Pro 450 @@ -2697,6 +2886,7 @@ 17aa 3643 Radeon R9 A375 17aa 3801 Radeon R9 M275 17aa 3824 Radeon R9 M375 + 1da2 e26a Radeon R7 250 6821 Venus XT [Radeon HD 8870M / R9 M270X/M370X] 1002 031e FirePro SX4000 1028 05cc FirePro M5100 @@ -2860,10 +3050,19 @@ 6864 Vega 10 [Radeon Pro V340] 6867 Vega 10 XL [Radeon Pro Vega 56] 6868 Vega 10 [Radeon PRO WX 8100/8200] + 6869 Vega 10 XGA [Radeon Pro Vega 48] + 686a Vega 10 LEA + 686b Vega 10 XTXA [Radeon Pro Vega 64X] 686c Vega 10 [Radeon Instinct MI25 MxGPU] + 686d Vega 10 GLXTA + 686e Vega 10 GLXLA 687f Vega 10 XL/XT [Radeon RX Vega 56/64] 1002 0b36 RX Vega64 - 1002 6b76 RX Vega56 + 1002 6b76 RX Vega64 +# ROG-STRIX-RXVEGA64-O8G-GAMING + 1043 04c4 Radeon RX Vega 64 + 1458 230c Radeon RX VEGA 56 GAMING OC 8G + 1da2 e376 Radeon RX VEGA 56 Pulse 8GB OC HBM2 6880 Lexington [Radeon HD 6550M] 103c 163c Pavilion dv6 Radeon HD 6550M 6888 Cypress XT [FirePro V8800] @@ -3109,6 +3308,7 @@ 17af 3000 Radeon HD 6510 17af 3010 Radeon HD 5630 68da Redwood LE [Radeon HD 5550/5570/5630/6390/6490/7570] + 1462 8071 VR5550-MD1G (Radeon HD 5550) 148c 3000 Radeon HD 6390 148c 3001 Radeon HD 6490 1545 7570 Radeon HD 7570 @@ -3378,9 +3578,12 @@ 174b e308 Radeon R9 380X Nitro 4G D5 17af 2006 Radeon R9 380X 6939 Tonga PRO [Radeon R9 285/380] + 1462 2015 Radeon R9 380 Gaming 4G 148c 9380 Radeon R9 380 # Make naming scheme consistent 174b e308 Radeon R9 380 Nitro 4G D5 + 174b e315 Radeon R9 285 + 693b Tonga PRO GL [FirePro W7100 / Barco MXRT-7600] 694c Polaris 22 XT [Radeon RX Vega M GH] 694e Polaris 22 XL [Radeon RX Vega M GL] 694f Polaris 22 MGL XL [Radeon Pro WX Vega M GL] @@ -3389,6 +3592,7 @@ 6985 Lexa XT [Radeon PRO WX 3100] 6986 Polaris12 6987 Lexa [Radeon 540X/550X/630 / RX 640 / E9171 MCM] + 698f Lexa XT [Radeon PRO WX 3100 / Barco MXRT 4700] 6995 Lexa XT [Radeon PRO WX 2100] 699f Lexa PRO [Radeon 540/540X/550/550X / RX 540X/550/550X] 1028 1720 Radeon RX 550X @@ -3405,7 +3609,7 @@ 7100 R520 [Radeon X1800 XT] 7101 R520/M58 [Mobility Radeon X1800 XT] 7102 R520/M58 [Mobility Radeon X1800] - 7104 R520 GL [FireGL V7200] + 7104 R520 GL [FireGL V7200 / Barco MXTR-5100] 13cc 3d0a MXRT-5100 7109 R520 [Radeon X1800 XL] 1002 0322 All-in-Wonder X1800XL @@ -3482,6 +3686,7 @@ 71c1 RV535 [Radeon X1650 PRO] 174b 0880 Radeon X1700 FSC 71c2 RV530 [Radeon X1600 PRO] + 71c3 RV530 [Radeon X1600 PRO] 71c4 RV530/M56 GL [Mobility FireGL V5200] 17aa 2007 ThinkPad T60p 71c5 RV530/M56-P [Mobility Radeon X1600] @@ -3544,11 +3749,49 @@ 174b e329 Radeon R9 FURY 7310 Navi 10 [Radeon Pro W5700X] 7312 Navi 10 [Radeon Pro W5700] + 7314 Navi 10 USB 731f Navi 10 [Radeon RX 5600 OEM/5600 XT / 5700/5700 XT] + 1002 0b36 Reference RX 5700 XT + 1458 2313 Radeon RX 5700 XT Gaming OC + 1682 5701 RX 5700 XT RAW II + 1849 5120 Radeon RX 5600 XT + 1da2 e409 Sapphire Technology Limited Navi 10 [Radeon RX 5600 OEM/5600 XT / 5700/5700 XT] + 1da2 e411 Radeon RX 5600 XT 7340 Navi 14 [Radeon RX 5500/5500M / Pro 5500M] 7341 Navi 14 [Radeon Pro W5500] 7347 Navi 14 [Radeon Pro W5500M] 734f Navi 14 [Radeon Pro W5300M] + 7360 Navi 12 [Radeon Pro 5600M / V520] + 7362 Navi 12 [Radeon Pro V520] + 7388 Arcturus GL-XL + 738c Arcturus GL-XL [Instinct MI100] + 738e Arcturus GL-XL [Instinct MI100] + 73a2 Navi 21 Pro-XTA [Radeon Pro W6900X] + 73a3 Navi 21 GL-XL [Radeon PRO W6800] + 73a4 Navi 21 USB + 73a5 Navi 21 [Radeon RX 6950 XT] + 73ab Navi 21 Pro-XLA [Radeon Pro W6800X/Radeon Pro W6800X Duo] + 73af Navi 21 [Radeon RX 6900 XT] + 148c 2414 Navi 21 XTXH [PowerColor Red Devil RX 6900 XT Ultimate] + 73bf Navi 21 [Radeon RX 6800/6800 XT / 6900 XT] + 1002 0e3a Radeon RX 6900 XT + 148c 2408 Red Devil AMD Radeon RX 6900 XT + 1eae 6701 XFX Speedster MERC 319 AMD Radeon RX 6800 XT Black + 73c3 Navi 22 + 73c4 Navi 22 USB + 73df Navi 22 [Radeon RX 6700/6700 XT/6750 XT / 6800M] + 73e0 Navi 23 + 73e1 Navi 23 WKS-XM [Radeon PRO W6600M] + 73e3 Navi 23 WKS-XL [Radeon PRO W6600] + 73e4 Navi 23 USB + 73ef Navi 23 [Radeon RX 6650 XT] + 73ff Navi 23 [Radeon RX 6600/6600 XT/6600M] + 148c 2412 PowerColor Red Devil RX 6600 XT + 7408 Aldebaran + 740c Aldebaran + 740f Aldebaran + 743f Navi 24 [Radeon RX 6400 / 6500 XT] + 1da2 e457 PULSE AMD Radeon RX 6500 XT 7833 RS350 Host Bridge 7834 RS350 [Radeon 9100 PRO/XT IGP] 7835 RS350M [Mobility Radeon 9000 IGP] @@ -3708,7 +3951,7 @@ 17aa 21bb Mobility Radeon HD 545v 9555 RV710/M92 [Mobility Radeon HD 4350/4550] 103c 1411 ProBook 4720s GPU (Mobility Radeon HD 4350) - 9557 RV711 GL [FirePro RG220] + 9557 RV711/M93 GL [FirePro RG220] 955f RV710/M92 [Mobility Radeon HD 4330] 9580 RV630 [Radeon HD 2600 PRO] 9581 RV630/M76 [Mobility Radeon HD 2600] @@ -3756,13 +3999,17 @@ 95cd RV620 GL [FirePro 2450] 95cf RV620 GL [FirePro 2260] 960f RS780 HDMI Audio [Radeon 3000/3100 / HD 3200/3300] + 1462 7596 760GM-E51(MS-7596) Motherboard 9610 RS780 [Radeon HD 3200] 1458 d000 GA-MA78GM-S2H Motherboard 9611 RS780C [Radeon 3100] 9612 RS780M [Mobility Radeon HD 3200] 9613 RS780MC [Mobility Radeon HD 3100] 9614 RS780D [Radeon HD 3300] + 9615 RS780E [Radeon HD 3200] 9616 RS780L [Radeon 3000] +# ID is probably a copy-paste error by a MSI developer from another mainboard, since all other ID numbers on this mainboard including the sub-device of this device has used subsystem ID 1462:7596 + 1462 7501 760GM-E51(MS-7596) Motherboard 9640 Sumo [Radeon HD 6550D] 9641 Sumo [Radeon HD 6620G] 9642 SuperSumo [Radeon HD 6370D] @@ -3802,6 +4049,7 @@ 9809 Wrestler [Radeon HD 7310] 980a Wrestler [Radeon HD 7290] 9830 Kabini [Radeon HD 8400 / R3 Series] + 1043 8623 AM1I-A Motherboard 9831 Kabini [Radeon HD 8400E] 9832 Kabini [Radeon HD 8330] 1849 9832 QC5000-ITX/PH @@ -3814,6 +4062,7 @@ 9839 Kabini [Radeon HD 8180] 983d Temash [Radeon HD 8250/8280G] 9840 Kabini HDMI/DP Audio + 1043 8623 AM1I-A Motherboard 1849 9840 QC5000-ITX/PH 9850 Mullins [Radeon R3 Graphics] 9851 Mullins [Radeon R4/R5 Graphics] @@ -3875,7 +4124,7 @@ 9917 Trinity [Radeon HD 7620G] 9918 Trinity [Radeon HD 7600G] 9919 Trinity [Radeon HD 7500G] - 991e Bishop + 991e Bishop [Xbox One S APU] 9920 Liverpool [Playstation 4 APU] 9921 Liverpool HDMI/DP Audio Controller 9922 Starshp @@ -3945,6 +4194,7 @@ ab10 Lexa HDMI Audio ab18 Vega 12 HDMI Audio ab20 Vega 20 HDMI Audio [Radeon VII] + ab28 Navi 21/23 HDMI/DP Audio Controller ab38 Navi 10 HDMI Audio ac00 Theater 506 World-Wide Analog Decoder ac01 Theater 506 World-Wide Analog Decoder @@ -4095,12 +4345,12 @@ 2646 0001 KNE100TX Fast Ethernet 000a 21230 Video Codec 000d PBXGB [TGA2] - 000f DEFPA FDDI PCI-to-PDQ Interface Chip [PFI] - 1011 def1 FDDI controller (DEFPA) - 103c def1 FDDI controller (3X-DEFPA) + 000f PCI-to-PDQ Interface Chip [PFI] FDDI (DEFPA) + 1011 def1 FDDIcontroller/PCI (DEFPA) + 103c def1 FDDIcontroller/PCI (3X-DEFPA) 0014 DECchip 21041 [Tulip Pass 3] 1186 0100 DE-530+ - 0016 DGLPB [OPPO] + 0016 ATMworks 350 Adapter [OPPO] (DGLPB) 0017 PV-PCI Graphics Controller (ZLXp-L) 0018 Memory Channel interface 0019 DECchip 21142/43 @@ -4335,6 +4585,8 @@ 021b GXT6500P Graphics Adapter 021c GXT4500P Graphics Adapter 0233 GXT135P Graphics Adapter +# Internal debugging card for CELL based systems + 025a Drone card 028c Citrine chipset SCSI controller 1014 028d Dual Channel PCI-X DDR SAS RAID Adapter (572E) 1014 02be Dual Channel PCI-X DDR U320 SCSI RAID Adapter (571B) @@ -4544,14 +4796,14 @@ 1439 Family 16h Processor Functions 5:1 143a Kingston/Clayton/Gladius/Montego Root Complex 143b Kingston/Clayton/Gladius/Montego P2P Bridge for UMI Link - 1440 Matisse Device 24: Function 0 - 1441 Matisse Device 24: Function 1 - 1442 Matisse Device 24: Function 2 - 1443 Matisse Device 24: Function 3 - 1444 Matisse Device 24: Function 4 - 1445 Matisse Device 24: Function 5 - 1446 Matisse Device 24: Function 6 - 1447 Matisse Device 24: Function 7 + 1440 Matisse/Vermeer Data Fabric: Device 18h; Function 0 + 1441 Matisse/Vermeer Data Fabric: Device 18h; Function 1 + 1442 Matisse/Vermeer Data Fabric: Device 18h; Function 2 + 1443 Matisse/Vermeer Data Fabric: Device 18h; Function 3 + 1444 Matisse/Vermeer Data Fabric: Device 18h; Function 4 + 1445 Matisse/Vermeer Data Fabric: Device 18h; Function 5 + 1446 Matisse/Vermeer Data Fabric: Device 18h; Function 6 + 1447 Matisse/Vermeer Data Fabric: Device 18h; Function 7 1448 Renoir Device 24: Function 0 1449 Renoir Device 24: Function 1 144a Renoir Device 24: Function 2 @@ -4563,6 +4815,7 @@ 1450 Family 17h (Models 00h-0fh) Root Complex 1451 Family 17h (Models 00h-0fh) I/O Memory Management Unit 1452 Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge + ea50 ce19 mCOM10-L1900 1453 Family 17h (Models 00h-0fh) PCIe GPP Bridge 1454 Family 17h (Models 00h-0fh) Internal PCIe GPP Bridge 0 to Bus B 1455 Zeppelin/Renoir PCIe Dummy Function @@ -4583,8 +4836,11 @@ 1466 Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 6 1467 Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 7 1468 Zeppelin Cryptographic Coprocessor NTBCCP + 1470 Vega 10 PCIe Bridge + 1471 Vega 10 PCIe Bridge 1480 Starship/Matisse Root Complex 1462 7c37 X570-A PRO motherboard + 15d9 1b95 H12SSL-i 1481 Starship/Matisse IOMMU 1482 Starship/Matisse PCIe Dummy Host Bridge 1483 Starship/Matisse GPP Bridge @@ -4598,6 +4854,7 @@ 148a Starship/Matisse PCIe Dummy Function 148b Starship/Matisse Non-Transparent Bridge 148c Starship USB 3.0 Host Controller + 15d9 145c H12SSL-i 148d Starship/Matisse Switch Upstream (PCIE SW.US) 148e Starship/Matisse Switch Downstream (PCIE SW.DS) 148f Starship Reserved SSP @@ -4615,6 +4872,7 @@ 149b Starship Reserved SSP 149c Matisse USB 3.0 Host Controller 1462 7c37 X570-A PRO motherboard + 149d Vangogh CVIP 1510 Family 14h Processor Root Complex 174b 1001 PURE Fusion Mini 1512 Family 14h Processor Root Port @@ -4629,6 +4887,7 @@ 1534 Family 16h Processor Function 4 1535 Family 16h Processor Function 5 1536 Family 16h Processor Root Complex + 1043 8623 AM1I-A Motherboard 1849 1536 QC5000-ITX/PH 1537 Kabini/Mullins PSP-Platform Security Processor 1538 Family 16h Processor Function 0 @@ -4699,33 +4958,50 @@ 15be Stoney Audio Processor 15d0 Raven/Raven2 Root Complex 103c 8615 Pavilion Laptop 15-cw1xxx + 1043 876b PRIME B450M-A Motherboard + ea50 ce19 mCOM10-L1900 15d1 Raven/Raven2 IOMMU 103c 8615 Pavilion Laptop 15-cw1xxx + 1043 876b PRIME B450M-A Motherboard + ea50 ce19 mCOM10-L1900 15d2 Raven/Raven2 PCIe Dummy Host Bridge 15d3 Raven/Raven2 PCIe GPP Bridge [6:0] + ea50 ce19 mCOM10-L1900 15d4 FireFlight USB 3.1 15d5 FireFlight USB 3.1 15da Raven/Raven2 PCIe Dummy Host Bridge 15db Raven/Raven2 Internal PCIe GPP Bridge 0 to Bus A + ea50 ce19 mCOM10-L1900 15dc Raven/Raven2 Internal PCIe GPP Bridge 0 to Bus B + ea50 ce19 mCOM10-L1900 15de Raven/Raven2/FireFlight HD Audio Controller 15df Family 17h (Models 10h-1fh) Platform Security Processor + 1043 876b PRIME Motherboard 17aa 5124 ThinkPad E595 + ea50 ce19 mCOM10-L1900 15e0 Raven USB 3.1 103c 8615 Pavilion Laptop 15-cw1xxx + 1043 876b PRIME Motherboard 17aa 5124 ThinkPad E595 + ea50 ce19 mCOM10-L1900 15e1 Raven USB 3.1 103c 8615 Pavilion Laptop 15-cw1xxx + 1043 876b PRIME Motherboard 17aa 5124 ThinkPad E595 - 15e2 Raven/Raven2/FireFlight/Renoir Audio Processor + ea50 ce19 mCOM10-L1900 + 15e2 ACP/ACP3X/ACP6x Audio Coprocessor 17aa 5124 ThinkPad E595 - 15e3 Family 17h (Models 10h-1fh) HD Audio Controller + ea50 ce19 mCOM10-L1900 + 15e3 Family 17h/19h HD Audio Controller 103c 8615 Pavilion Laptop 15-cw1xxx + 1043 86c7 PRIME B450M-A Motherboard 17aa 5124 ThinkPad E595 - 15e4 Raven/Raven2/Renoir Sensor Fusion Hub + 15e4 Sensor Fusion Hub 15e5 Raven2 USB 3.1 + ea50 ce19 mCOM10-L1900 15e6 Raven/Raven2/Renoir Non-Sensor Fusion Hub KMDF driver 1022 15e4 Raven/Raven2/Renoir Sensor Fusion Hub + ea50 ce19 mCOM10-L1900 15e8 Raven/Raven2 Device 24: Function 0 15e9 Raven/Raven2 Device 24: Function 1 15ea Raven/Raven2 Device 24: Function 2 @@ -4777,18 +5053,42 @@ 1629 Arden PCIe GPP Bridge 162a Arden Internal PCIe GPP Bridge 0 to bus X 162b Arden PCIe Non-Transparent Bridge - 1630 Renoir Root Complex - 1631 Renoir IOMMU + 1630 Renoir/Cezanne Root Complex + 1631 Renoir/Cezanne IOMMU 1632 Renoir PCIe Dummy Host Bridge 1633 Renoir PCIe GPP Bridge - 1634 Renoir PCIe GPP Bridge + 1634 Renoir/Cezanne PCIe GPP Bridge 1635 Renoir Internal PCIe GPP Bridge to Bus 1637 Renoir HD Audio Controller - 1639 Renoir USB 3.1 + 1639 Renoir/Cezanne USB 3.1 + 163a VanGogh USB0 + 163b VanGogh USB1 + 163c VanGogh SecUSB + 163d VanGogh SecureFunction + 163e VanGogh HSP 1641 Renoir 10GbE Controller Port 0 (XGBE0/1) 1642 Renoir WLAN 1643 Renoir BT 1644 Renoir I2S + 1648 VanGogh Root Complex + 1649 VanGogh PSP/CCP + 164f Milan IOMMU + 1650 Milan Data Fabric; Function 0 + 1651 Milan Data Fabric; Function 1 + 1652 Milan Data Fabric; Function 2 + 1653 Milan Data Fabric; Function 3 + 1654 Milan Data Fabric; Function 4 + 1655 Milan Data Fabric; Function 5 + 1656 Milan Data Fabric; Function 6 + 1657 Milan Data Fabric; Function 7 + 166a Cezanne Data Fabric; Function 0 + 166b Cezanne Data Fabric; Function 1 + 166c Cezanne Data Fabric; Function 2 + 166d Cezanne Data Fabric; Function 3 + 166e Cezanne Data Fabric; Function 4 + 166f Cezanne Data Fabric; Function 5 + 1670 Cezanne Data Fabric; Function 6 + 1671 Cezanne Data Fabric; Function 7 1700 Family 12h/14h Processor Function 0 1701 Family 12h/14h Processor Function 1 1702 Family 12h/14h Processor Function 2 @@ -4829,7 +5129,8 @@ 4c53 1030 PC5 mainboard 4c53 1040 CL7 mainboard 4c53 1060 PC7 mainboard - 2001 79c978 [HomePNA] +# Via AMD's own technical reference on their Am79C978 NICs; https://www.amd.com/system/files/TechDocs/22206.pdf + 2001 Am79C978 PCnet Home (HomePNA) 1/10 PCI Ethernet Adapter [Am79C971 PHY] 1092 0a78 Multimedia Home Network Adapter 1668 0299 ActionLink Home Network Adapter 2003 Am 1771 MBW [Alchemy] @@ -4848,6 +5149,8 @@ 2096 CS5536 [Geode companion] UDC 2097 CS5536 [Geode companion] UOC 209a CS5536 [Geode companion] IDE + 2625 Am79C973 [Lance/PCI PCNet/32] + 2627 Am79C975 [Lance/PCI PCNet/32] 3000 ELanSC520 Microcontroller 43a0 Hudson PCI to PCI bridge (PCIE port 0) 43a1 Hudson PCI to PCI bridge (PCIE port 1) @@ -4869,6 +5172,13 @@ 43c7 400 Series Chipset PCIe Port 43c8 400 Series Chipset SATA Controller 43d5 400 Series Chipset USB 3.1 XHCI Controller + 43e9 500 Series Chipset Switch Upstream Port + 43eb 500 Series Chipset SATA Controller +# or ASM106X Serial ATA Controller + 1b21 1062 ASM1062 Serial ATA Controller + 43ee 500 Series Chipset USB 3.1 XHCI Controller +# maybe + 1b21 1142 ASM1042A USB 3.0 Host Controller 57a3 Matisse PCIe GPP Bridge 57a4 Matisse PCIe GPP Bridge 57ad Matisse Switch Upstream @@ -4930,6 +5240,7 @@ 7801 FCH SATA Controller [AHCI mode] 103c 168b ProBook 4535s Notebook 103c 194e ProBook 455 G1 Notebook + 1043 8623 AM1I-A Motherboard 17aa 3988 Z50-75 1849 7801 QC5000-ITX/PH 7802 FCH SATA Controller [RAID mode] @@ -4941,11 +5252,13 @@ 7807 FCH USB OHCI Controller 103c 194e ProBook 455 G1 Notebook 103c 1985 Pavilion 17-e163sg Notebook PC + 1043 8623 AM1I-A Motherboard 17aa 3988 Z50-75 1849 7807 QC5000-ITX/PH 7808 FCH USB EHCI Controller 103c 194e ProBook 455 G1 Notebook 103c 1985 Pavilion 17-e163sg Notebook PC + 1043 8623 AM1I-A Motherboard 17aa 3988 Z50-75 1849 7808 QC5000-ITX/PH 7809 FCH USB OHCI Controller @@ -4955,6 +5268,7 @@ 780b FCH SMBus Controller 103c 194e ProBook 455 G1 Notebook 103c 1985 Pavilion 17-e163sg Notebook PC + 1043 8623 AM1I-A Motherboard 17aa 3988 Z50-75 1849 780b QC5000-ITX/PH 780c FCH IDE Controller @@ -4962,11 +5276,13 @@ 103c 194e ProBook 455 G1 Notebook 103c 1985 Pavilion 17-e163sg Notebook PC 1043 8444 F2A85-M Series + 1043 8576 AM1I-A Motherboard 17aa 3988 Z50-75 1849 8892 QC5000-ITX/PH 780e FCH LPC Bridge 103c 194e ProBook 455 G1 Notebook 103c 1985 Pavilion 17-e163sg Notebook PC + 1043 8623 AM1I-A Motherboard 17aa 3988 Z50-75 1849 780e QC5000-ITX/PH 780f FCH PCI Bridge @@ -4975,12 +5291,16 @@ 7814 FCH USB XHCI Controller 103c 194e ProBook 455 G1 Notebook 103c 1985 Pavilion 17-e163sg Notebook PC + 1043 8623 AM1I-A Motherboard 17aa 3988 Z50-75 1849 7814 QC5000-ITX/PH 7900 FCH SATA Controller [IDE mode] 7901 FCH SATA Controller [AHCI mode] 103c 8615 Pavilion Laptop 15-cw1xxx + 1043 876b PRIME Motherboard 1462 7c37 X570-A PRO motherboard + 15d9 7901 H12SSL-i + ea50 ce19 mCOM10-L1900 7902 FCH SATA Controller [RAID mode] 7903 FCH SATA Controller [RAID mode] 7904 FCH SATA Controller [AHCI mode] @@ -4988,12 +5308,18 @@ 7908 FCH USB EHCI Controller 790b FCH SMBus Controller 103c 8615 Pavilion Laptop 15-cw1xxx + 1043 876b PRIME Motherboard 1462 7c37 X570-A PRO motherboard + 15d9 790b H12SSL-i 17aa 5124 ThinkPad E595 + ea50 ce19 mCOM10-L1900 790e FCH LPC Bridge 103c 8615 Pavilion Laptop 15-cw1xxx + 1043 876b PRIME B450M-A Motherboard 1462 7c37 X570-A PRO motherboard + 15d9 790e H12SSL-i 17aa 5124 ThinkPad E595 + ea50 ce19 mCOM10-L1900 790f FCH PCI Bridge 7914 FCH USB XHCI Controller 9600 RS780 Host Bridge @@ -5578,6 +5904,7 @@ 1931 000a GlobeTrotter Fusion Quad Lite (PPP data) 1931 000b GlobeTrotter Fusion Quad Lite (GSM data) 807d 0035 PCI-USB2 (OHCI subsystem) + 8086 4d44 D850EMV2 motherboard 003b PCI to C-bus Bridge 003e NAPCCARD Cardbus Controller 0046 PowerVR PCX2 [midas] @@ -5608,6 +5935,7 @@ 14c2 0205 PTI-205N USB 2.0 Host Controller 1799 0002 Root Hub 807d 1043 PCI-USB2 (EHCI subsystem) + 8086 4d44 D850EMV2 motherboard 00e7 uPD72873 [Firewarden] IEEE1394a OHCI 1.1 Link/2-port PHY Controller 00f2 uPD72874 [Firewarden] IEEE1394a OHCI 1.1 Link/3-port PHY Controller 00f3 uPD6113x Multimedia Decoder/Processor [EMMA2] @@ -5663,7 +5991,7 @@ 0325 315PRO PCI/AGP VGA Display Adapter 0330 330 [Xabre] PCI/AGP VGA Display Adapter 0406 85C501/2 - 0496 85C496 + 0496 SiS85C496 PCI & CPU Memory Controller (PCM) 0530 530 Host 0540 540 Host 0550 550 Host @@ -6681,24 +7009,24 @@ 105d 0009 Imagine 128 series 2e 4Mb DRAM 105d 000a Imagine 128 series 2 8Mb VRAM 105d 000b Imagine 128 series 2 8Mb H-VRAM - 11a4 000a Barco Metheus 5 Megapixel - 13cc 0000 Barco Metheus 5 Megapixel - 13cc 0004 Barco Metheus 5 Megapixel - 13cc 0005 Barco Metheus 5 Megapixel - 13cc 0006 Barco Metheus 5 Megapixel - 13cc 0008 Barco Metheus 5 Megapixel - 13cc 0009 Barco Metheus 5 Megapixel - 13cc 000a Barco Metheus 5 Megapixel - 13cc 000c Barco Metheus 5 Megapixel + 11a4 000a Metheus 5 Megapixel + 13cc 0000 Metheus 5 Megapixel + 13cc 0004 Metheus 5 Megapixel + 13cc 0005 Metheus 5 Megapixel + 13cc 0006 Metheus 5 Megapixel + 13cc 0008 Metheus 5 Megapixel + 13cc 0009 Metheus 5 Megapixel + 13cc 000a Metheus 5 Megapixel + 13cc 000c Metheus 5 Megapixel 493d Imagine 128 T2R [Ticket to Ride] - 11a4 000a Barco Metheus 5 Megapixel, Dual Head - 11a4 000b Barco Metheus 5 Megapixel, Dual Head - 13cc 0002 Barco Metheus 4 Megapixel, Dual Head - 13cc 0003 Barco Metheus 5 Megapixel, Dual Head - 13cc 0007 Barco Metheus 5 Megapixel, Dual Head - 13cc 0008 Barco Metheus 5 Megapixel, Dual Head - 13cc 0009 Barco Metheus 5 Megapixel, Dual Head - 13cc 000a Barco Metheus 5 Megapixel, Dual Head + 11a4 000a Metheus 5 Megapixel, Dual Head + 11a4 000b Metheus 5 Megapixel, Dual Head + 13cc 0002 Metheus 4 Megapixel, Dual Head + 13cc 0003 Metheus 5 Megapixel, Dual Head + 13cc 0007 Metheus 5 Megapixel, Dual Head + 13cc 0008 Metheus 5 Megapixel, Dual Head + 13cc 0009 Metheus 5 Megapixel, Dual Head + 13cc 000a Metheus 5 Megapixel, Dual Head 5348 Revolution 4 105d 0037 Revolution IV-FP AGP (For SGI 1600SW) 11a4 0028 PVS5600M @@ -6782,6 +7110,7 @@ 0003 Control Video 0004 PlanB Video-In 0007 O'Hare I/O + 000b Apple Camera 000c DOS on Mac 000e Hydra Mac I/O 0010 Heathrow Mac I/O @@ -6952,6 +7281,7 @@ 103c 17e8 SN1000Q 16Gb Dual Port Fibre Channel Adapter 103c 1939 QMH2672 16Gb Dual Port Fibre Channel Adapter 103c 8002 3830C 16G Fibre Channel Host Bus Adapter + 1077 0241 QLE2670 16Gb Single Port Fibre Channel Adapter 2071 ISP2714-based 16/32Gb Fibre Channel to PCIe Adapter 1077 0283 QLE2764 Quad Port 32Gb Fibre Channel to PCIe Adapter 1077 029e QLE2694 Quad Port 16Gb Fibre Channel to PCIe Adapter @@ -6960,6 +7290,9 @@ 2081 ISP2814-based 64/32G Fibre Channel to PCIe Controller 1077 02e1 QLE2874 Quad Port 64GFC PCIe Gen4 x16 Adapter 1077 02e3 QLE2774 Quad Port 32GFC PCIe Gen4 x16 Adapter + 2089 ISP2854-based 64/32G Fibre Channel to PCIe Controller with StorCryption + 1077 02e8 QLE2884 Quad Port 64GFC PCIe Gen4 x16 Adapter with StorCryption + 1077 02ea QLE2784 Quad Port 32GFC PCIe Gen4 x16 Adapter with StorCryption 2100 QLA2100 64-bit Fibre Channel Adapter 1077 0001 QLA2100 64-bit Fibre Channel Adapter 2200 QLA2200 64-bit Fibre Channel Adapter @@ -6980,6 +7313,7 @@ 1590 0203 StoreFabric SN1600Q 32Gb Single Port Fibre Channel Host Bus Adapter 1590 0204 StoreFabric SN1600Q 32Gb Dual Port Fibre Channel Host Bus Adapter 1590 022d 5830C 32Gb Dual Port Fibre Channel Adapter + 193d 100d NIC-FC680i-Mb-2x16G 2281 ISP2812-based 64/32G Fibre Channel to PCIe Controller 1077 02e2 QLE2872 Dual Port 64GFC PCIe Gen4 x8 Adapter 1077 02e4 QLE2772 Dual Port 32GFC PCIe Gen4 x8 Adapter @@ -6989,6 +7323,11 @@ 1077 02f3 QLogic 2x32Gb QLE2772 FC HBA 1590 02d3 SN1610Q - 1P Enhanced 32GFC Single Port Fibre Channel Host Bus Adapter 1590 02d4 SN1610Q – 2P Enhanced 32GFC Dual Port Fibre Channel Host Bus Adapter + 2289 ISP2852-based 64/32G Fibre Channel to PCIe Controller with StorCryption + 1077 02e9 QLE2882 Dual Port 64GFC PCIe Gen4 x8 Adapter with StorCryption + 1077 02eb QLE2782 Dual Port 32GFC PCIe Gen4 x8 Adapter with StorCryption + 1077 02ef QLE2880 Single Port 64GFC PCIe Gen4 x8 Adapter with StorCryption + 1077 02f1 QLE2780 Single Port 32GFC PCIe Gen4 x8 Adapter with StorCryption 2300 QLA2300 64-bit Fibre Channel Adapter 2312 ISP2312-based 2Gb Fibre Channel to PCI-X HBA 103c 0131 2Gb Fibre Channel - Single port [A7538A] @@ -6999,7 +7338,8 @@ 103c 12dd 4Gb Fibre Channel [AB429A] 2432 ISP2432-based 4Gb Fibre Channel to PCI Express HBA 103c 7040 FC1142SR 4Gb 1-port PCIe Fibre Channel Host Bus Adapter [HPAE311A] - 1077 0137 QLE2460 4 GB PCI-X Host-Bus-Adapter + 1077 0137 QLE2460 Single-Port 4Gbps FC-to-PCI-X/PCIe Host Bus Adapter + 1077 0138 QLE2462 Dual-Port 4Gbps FC-to-PCI-X/PCIe Host Bus Adapter 2532 ISP2532-based 8Gb Fibre Channel to PCI Express HBA 1014 041e FC EN0Y/EN12 PCIe2 LP 8 Gb 4-port Fibre Channel Adapter for POWER 103c 3262 StorageWorks 81Q @@ -7081,6 +7421,8 @@ 1590 021f 10/25GbE 2P QL41262HMCU-HP Adapter 1590 0220 10/25GbE 2P QL41122HLRJ-HP Adapter 1590 02bd 10Gb 2P 524SFP+ NIC + 193d 1030 NIC-ETH681i-Mb-2x25G + 193d 1032 NIC-ETH682i-Mb-2x25G 8080 FastLinQ QL41000 Series 10/25/40/50GbE Controller (FCoE) 1077 0001 10GE 2P QL41162HxRJ-DE Adapter 1077 0002 10GE 2P QL41112HxCU-DE Adapter @@ -8468,13 +8810,18 @@ 8717 PEX 8717 16-lane, 8-Port PCI Express Gen 3 (8.0 GT/s) Switch with DMA 8718 PEX 8718 16-Lane, 5-Port PCI Express Gen 3 (8.0 GT/s) Switch 8724 PEX 8724 24-Lane, 6-Port PCI Express Gen 3 (8 GT/s) Switch, 19 x 19mm FCBGA + 8725 PEX 8725 24-Lane, 10-Port PCI Express Gen 3 (8.0 GT/s) Multi-Root Switch with DMA 8732 PEX 8732 32-lane, 8-Port PCI Express Gen 3 (8.0 GT/s) Switch 8734 PEX 8734 32-lane, 8-Port PCI Express Gen 3 (8.0GT/s) Switch 8747 PEX 8747 48-Lane, 5-Port PCI Express Gen 3 (8.0 GT/s) Switch 8748 PEX 8748 48-Lane, 12-Port PCI Express Gen 3 (8 GT/s) Switch, 27 x 27mm FCBGA -# This is the Non-Transparent-Bridge Virtualized Port as presented by the PLX PEX 8732 chip, the physical bridges show up at 10b5:8732 - 87b0 PEX 8732 32-lane, 8-Port PCI Express Gen 3 (8.0 GT/s) Switch + 8749 PEX 8749 48-Lane, 18-Port PCI Express Gen 3 (8.0 GT/s) Multi-Root Switch with DMA + 87a0 PEX PCI Express Switch NT0 Port Link Interface + 87a1 PEX PCI Express Switch NT1 Port Link Interface + 87b0 PEX PCI Express Switch NT0 Port Virtual Interface 1093 7761 PXIe-8830mc + 87b1 PEX PCI Express Switch NT1 Port Virtual Interface + 87d0 PEX PCI Express Switch DMA interface 9016 PLX 9016 8-port serial controller 9030 PCI9030 32-bit 33MHz PCI <-> IOBus Bridge 10b5 2695 Hilscher CIF50-PB/DPS Profibus @@ -8519,6 +8866,7 @@ 10b5 2905 Alpermann+Velte PCI TS: Time Synchronisation Board 10b5 3196 Goramo PLX200SYN sync serial card 10b5 9050 PCI-I04 PCI Passive PC/CAN Interface + 12fe 0001 CAN-PCI/331 CAN bus controller 1369 8901 PCX11+ PCI 1369 8f01 VX222 1369 9401 PCX924 @@ -8820,7 +9168,7 @@ 1449 M1449 1451 M1451 1461 M1461 - 1489 M1489 + 1489 M1489 Cache-Memory PCI Controller (CMP) [FinALi 486] CPU to PCI bridge 1511 M1511 [Aladdin] 1512 M1512 [Aladdin] 1513 M1513 [Aladdin] @@ -9426,7 +9774,7 @@ 1682 211c GeForce 6600 256MB DDR DUAL DVI TV 00f3 NV43 [GeForce 6200] 00f4 NV43 [GeForce 6600 LE] - 00f5 G71 [GeForce 7800 GS] + 00f5 G70/G71 [GeForce 7800 GS AGP] 00f6 NV43 [GeForce 6800 GS/XT] 1682 217e XFX GeForce 6800 XTreme 256MB DDR3 AGP 00f8 NV45GL [Quadro FX 3400/4400] @@ -9821,15 +10169,16 @@ 02a0 NV2A [XGPU] 02a5 MCPX CPU Bridge 02a6 MCPX Memory Controller - 02e0 G73 [GeForce 7600 GT] + 02e0 G73 [GeForce 7600 GT AGP] 02e0 2249 GF 7600GT 560M 256MB DDR3 DUAL DVI TV - 02e1 G73 [GeForce 7600 GS] + 02e1 G73 [GeForce 7600 GS AGP] 1682 222b PV-T73K-UAL3 (256MB) 1682 2247 GF 7600GS 512MB DDR2 - 02e2 G73 [GeForce 7300 GT] - 02e3 G71 [GeForce 7900 GS] - 02e4 G71 [GeForce 7950 GT] + 02e2 G73 [GeForce 7300 GT AGP] + 02e3 G71 [GeForce 7900 GS AGP] + 02e4 G71 [GeForce 7950 GT AGP] 1682 2271 PV-T71A-YDF7 (512MB) + 02e5 G71 [GeForce 7600 GS AGP] 02f0 C51 Host Bridge 103c 2a34 Pavilion a1677c 103c 30b7 Presario V6133CL @@ -10443,7 +10792,7 @@ 06eb G98M [Quadro NVS 160M] 06ec G98M [GeForce G 105M] 06ed G98 [GeForce 9600 GT / 9800 GT] - 06ee G98 [GeForce 9600 GT / 9800 GT] + 06ee G98 [GeForce 9600 GT / 9800 GT / GT 240] 06ef G98M [GeForce G 103M] 06f1 G98M [GeForce G 105M] 06f8 G98 [Quadro NVS 420] @@ -10688,6 +11037,7 @@ 0a21 GT216M [GeForce GT 330M] 0a22 GT216 [GeForce 315] 0a23 GT216 [GeForce 210] + 0a24 GT216 [GeForce 405] 0a26 GT216 [GeForce 405] 0a27 GT216 [GeForce 405] 0a28 GT216M [GeForce GT 230M] @@ -10710,6 +11060,7 @@ 1043 8334 EN210 SILENT 1458 36a9 GV-N210D3-1GI (rev. 6.0/6.1) 1462 8094 N210 [Geforce 210] PCIe graphics adapter + 19da 7222 GeForce 210 1GB [Synergy Edition] 0a66 GT218 [GeForce 310] 0a67 GT218 [GeForce 315] 0a68 GT218M [GeForce G 105M] @@ -11023,6 +11374,7 @@ 0fd3 GK107M [GeForce GT 640M LE] 0fd4 GK107M [GeForce GTX 660M] 0fd5 GK107M [GeForce GT 650M Mac Edition] + 0fd6 GK107M 0fd8 GK107M [GeForce GT 640M Mac Edition] 0fd9 GK107M [GeForce GT 645M] 0fdb GK107M @@ -11039,6 +11391,7 @@ # GRID K1 USM 0fe7 GK107GL [GRID K100 vGPU] 10de 101e GRID K100 + 0fe8 GK107M 0fe9 GK107M [GeForce GT 750M Mac Edition] 0fea GK107M [GeForce GT 755M Mac Edition] 0fec GK107M [GeForce 710A] @@ -11179,6 +11532,7 @@ 10ef GP102 HDMI Audio Controller 10f0 GP104 High Definition Audio Controller 10f1 GP106 High Definition Audio Controller + 1043 85b6 DUAL-GTX1060-O6G [GeForce GTX 1060 6GB Dual] 10f7 TU102 High Definition Audio Controller 10f8 TU104 HD Audio Controller 10f9 TU106 High Definition Audio Controller @@ -11535,6 +11889,7 @@ 1184 GK104 [GeForce GTX 770] 1185 GK104 [GeForce GTX 660 OEM] 10de 106f GK104 [GeForce GTX 760 OEM] + 1186 GK104 [GeForce GTX 660 Ti] 1187 GK104 [GeForce GTX 760] 1188 GK104 [GeForce GTX 690] 1189 GK104 [GeForce GTX 670] @@ -11656,8 +12011,11 @@ 1287 GK208B [GeForce GT 730] 1288 GK208B [GeForce GT 720] 1289 GK208 [GeForce GT 710] + 128a GK208B 128b GK208B [GeForce GT 710] 1043 85f7 GT710-SL-1GD5 + 1043 8770 GT710-4H-SL-2GD5 + 128c GK208B 1290 GK208M [GeForce GT 730M] 103c 2afa GeForce GT 730A 103c 2b04 GeForce GT 730A @@ -11774,6 +12132,7 @@ 13fb GM204GLM [Quadro M5500] 1401 GM206 [GeForce GTX 960] 1402 GM206 [GeForce GTX 950] + 1404 GM206 [GeForce GTX 960 FAKE] 1406 GM206 [GeForce GTX 960 OEM] 1407 GM206 [GeForce GTX 750 v2] 1427 GM206M [GeForce GTX 965M] @@ -11805,6 +12164,10 @@ 10de 1141 VCA 6000 17f1 GM200GL [Quadro M6000 24GB] 17fd GM200GL [Tesla M40] + 1ad0 Tegra PCIe x8 Endpoint + 1ad1 Tegra PCIe x4/x8 Endpoint/Root Complex + 1ad2 Tegra PCIe x1 Root Complex + 1ad3 Xavier SATA Controller 1ad6 TU102 USB 3.1 Host Controller 1ad7 TU102 USB Type-C UCSI Controller 1ad8 TU104 USB 3.1 Host Controller @@ -11816,6 +12179,7 @@ 1aeb TU116 High Definition Audio Controller 1aec TU116 USB 3.1 Host Controller 1aed TU116 USB Type-C UCSI Controller + 1aef GA102 High Definition Audio Controller 1b00 GP102 [TITAN X] 1b01 GP102 [GeForce GTX 1080 Ti 10GB] 1b02 GP102 [TITAN Xp] @@ -11824,6 +12188,7 @@ 1b07 GP102 [P102-100] 1b30 GP102GL [Quadro P6000] 1b38 GP102GL [Tesla P40] + 1b39 GP102GL [Tesla P10] 1b70 GP102GL 1b78 GP102GL 1b80 GP104 [GeForce GTX 1080] @@ -11865,6 +12230,7 @@ 1c01 GP106 1c02 GP106 [GeForce GTX 1060 3GB] 1c03 GP106 [GeForce GTX 1060 6GB] + 1043 85b6 DUAL-GTX1060-O6G [GeForce GTX 1060 6GB Dual] 1c04 GP106 [GeForce GTX 1060 5GB] 1c06 GP106 [GeForce GTX 1060 6GB Rev. 2] 1c07 GP106 [P106-100] @@ -11878,7 +12244,8 @@ 1c2d GP106M 1c30 GP106GL [Quadro P2000] 1c31 GP106GL [Quadro P2200] - 1c35 GP106 + 1c35 GP106M [Quadro P2000 Mobile] + 1c36 GP106 [P106M] 1c60 GP106BM [GeForce GTX 1060 Mobile 6GB] 103c 8390 GeForce GTX 1060 Max-Q 6GB 1c61 GP106BM [GeForce GTX 1050 Ti Mobile] @@ -11920,6 +12287,7 @@ 1cfa GP107GL [Quadro P2000] 1cfb GP107GL [Quadro P1000] 1d01 GP108 [GeForce GT 1030] + 1d02 GP108 [GeForce GT 1010] 1d10 GP108M [GeForce MX150] 17aa 225e ThinkPad T480 1d11 GP108M [GeForce MX230] @@ -11951,12 +12319,13 @@ 1e04 TU102 [GeForce RTX 2080 Ti] 1e07 TU102 [GeForce RTX 2080 Ti Rev. A] 1462 3715 RTX 2080 Ti GAMING X TRIO - 1e2d TU102B - 1e2e TU102B + 1e09 TU102 [CMP 50HX] + 1e2d TU102 [GeForce RTX 2080 Ti Engineering Sample] + 1e2e TU102 [GeForce RTX 2080 Ti 12GB Engineering Sample] 1e30 TU102GL [Quadro RTX 6000/8000] 10de 129e Quadro RTX 8000 10de 12ba Quadro RTX 6000 - 1e36 TU102GL + 1e36 TU102GL [Quadro RTX 6000] 1e37 TU102GL [GRID RTX T10-4/T10-8/T10-16] 10de 1347 GRID RTX T10-8 10de 1348 GRID RTX T10-4 @@ -11980,6 +12349,7 @@ 1eae TU104M 1eb0 TU104GL [Quadro RTX 5000] 1eb1 TU104GL [Quadro RTX 4000] + 1eb4 TU104GL [T4G] 1eb5 TU104GLM [Quadro RTX 5000 Mobile / Max-Q] 1eb6 TU104GLM [Quadro RTX 4000 Mobile / Max-Q] 1eb8 TU104GL [Tesla T4] @@ -11990,14 +12360,17 @@ 1ed0 TU104BM [GeForce RTX 2080 Mobile] 1ed1 TU104BM [GeForce RTX 2070 SUPER Mobile / Max-Q] 1ed3 TU104BM [GeForce RTX 2080 SUPER Mobile / Max-Q] + 1ef5 TU104GLM [Quadro RTX 5000 Mobile Refresh] 1f02 TU106 [GeForce RTX 2070] 1043 8673 TURBO RTX 2070 + 1f03 TU106 [GeForce RTX 2060 12GB] 1f04 TU106 1f06 TU106 [GeForce RTX 2060 SUPER] 1f07 TU106 [GeForce RTX 2070 Rev. A] 1f08 TU106 [GeForce RTX 2060 Rev. A] 1f09 TU106 [GeForce GTX 1660 SUPER] 1f0a TU106 [GeForce GTX 1650] + 1f0b TU106 [CMP 40HX] 1f10 TU106M [GeForce RTX 2070 Mobile] 1f11 TU106M [GeForce RTX 2060 Mobile] 1f12 TU106M [GeForce RTX 2060 Max-Q] @@ -12011,32 +12384,166 @@ 1f51 TU106BM [GeForce RTX 2060 Mobile] 1f54 TU106BM [GeForce RTX 2070 Mobile] 1f55 TU106BM [GeForce RTX 2060 Mobile] + 1f76 TU106GLM [Quadro RTX 3000 Mobile Refresh] 1f81 TU117 1f82 TU117 [GeForce GTX 1650] 1f91 TU117M [GeForce GTX 1650 Mobile / Max-Q] 1f92 TU117M [GeForce GTX 1650 Mobile] - 1f94 TU117M + 1f94 TU117M [GeForce GTX 1650 Mobile] 1f95 TU117M [GeForce GTX 1650 Ti Mobile] 1f96 TU117M [GeForce GTX 1650 Mobile / Max-Q] + 1f97 TU117M [GeForce MX450] + 1f98 TU117M [GeForce MX450] 1f99 TU117M + 1f9c TU117M [GeForce MX450] + 1f9d TU117M [GeForce GTX 1650 Mobile / Max-Q] +# via Lenovo 496.90 + 1f9f TU117M [GeForce MX550] + 1fa0 TU117M [GeForce MX550] 1fae TU117GL + 1fb0 TU117GLM [Quadro T1000 Mobile] + 1fb1 TU117GL [T600] + 1fb2 TU117GLM [Quadro T400 Mobile] + 1fb6 TU117GLM [T600 Laptop GPU] + 1fb7 TU117GLM [T550 Laptop GPU] 1fb8 TU117GLM [Quadro T2000 Mobile / Max-Q] 1fb9 TU117GLM [Quadro T1000 Mobile] + 1fba TU117GLM [T600 Mobile] + 1fbb TU117GLM [Quadro T500 Mobile] + 1fbc TU117GLM [T1200 Laptop GPU] 1fbf TU117GL - 20b0 GA100 [GRID A100X] + 1fd9 TU117BM [GeForce GTX 1650 Mobile Refresh] + 1fdd TU117BM [GeForce GTX 1650 Mobile Refresh] + 1ff0 TU117GL [T1000 8GB] + 1ff2 TU117GL [T400 4GB] + 1ff9 TU117GLM [Quadro T1000 Mobile] + 2082 GA100 [CMP 170HX] + 20b0 GA100 [A100 SXM4 40GB] + 20b1 GA100 [A100 PCIe 40GB] + 20b2 GA100 [A100 SXM4 80GB] +# 20B3 14A7 10DE PG506-242 / 20B3 14A8 10DE PG506-243 + 20b3 GA100 [PG506-242/243] + 20b5 GA100 [A100 PCIe 80GB] + 20b6 GA100GL [PG506-232] + 20b7 GA100GL [A30 PCIe] + 20b8 GA100 [A100X] + 20b9 GA100 [A30X] + 20bb GA100 [DRIVE A100 PROD] 20be GA100 [GRID A100A] 20bf GA100 [GRID A100B] + 20c2 GA100 [CMP 170HX] + 20f0 GA100 [A100-PG506-207] + 20f1 GA100 [A100 PCIe 40GB] + 20f2 GA100 [A100-PG506-217] 2182 TU116 [GeForce GTX 1660 Ti] 2183 TU116 2184 TU116 [GeForce GTX 1660] 2187 TU116 [GeForce GTX 1650 SUPER] 2188 TU116 [GeForce GTX 1650] + 2189 TU116 [CMP 30HX] 2191 TU116M [GeForce GTX 1660 Ti Mobile] 2192 TU116M [GeForce GTX 1650 Ti Mobile] 21ae TU116GL 21bf TU116GL + 21c2 TU116 21c4 TU116 [GeForce GTX 1660 SUPER] 21d1 TU116BM [GeForce GTX 1660 Ti Mobile] + 2200 GA102 + 2203 GA102 [GeForce RTX 3090 Ti] + 2204 GA102 [GeForce RTX 3090] + 147d 10de NVIDIA Geforce RTX 3090 Founders Edition + 2205 GA102 [GeForce RTX 3080 Ti 20GB] + 2206 GA102 [GeForce RTX 3080] + 10de 1467 GA102 [GeForce RTX 3080] + 10de 146d GA102 [GeForce RTX 3080 20GB] + 1462 3892 RTX 3080 10GB GAMING X TRIO + 2208 GA102 [GeForce RTX 3080 Ti] + 220a GA102 [GeForce RTX 3080 12GB] + 220d GA102 [CMP 90HX] + 2216 GA102 [GeForce RTX 3080 Lite Hash Rate] + 222b GA102 [GeForce RTX 3090 Engineering Sample] + 222f GA102 [GeForce RTX 3080 11GB / 12GB Engineering Sample] + 2230 GA102GL [RTX A6000] + 2231 GA102GL [RTX A5000] + 2232 GA102GL [RTX A4500] + 2233 GA102GL [RTX A5500] + 2235 GA102GL [A40] + 2236 GA102GL [A10] + 2237 GA102GL [A10G] + 2238 GA102GL [A10M] + 223f GA102GL + 228b GA104 High Definition Audio Controller + 2296 Tegra PCIe Endpoint Virtual Network + 2302 GA103 + 2321 GA103 + 2414 GA103 [GeForce RTX 3060 Ti] + 2420 GA103M [GeForce RTX 3080 Ti Mobile] + 2438 GA103GLM [RTX A5500 Laptop GPU] + 2460 GA103M [GeForce RTX 3080 Ti Laptop GPU] + 2482 GA104 [GeForce RTX 3070 Ti] + 2483 GA104 + 2484 GA104 [GeForce RTX 3070] + 10de 146b GA104 [GeForce RTX 3070] + 10de 14ae GA104 [GeForce RTX 3070 16GB] + 2486 GA104 [GeForce RTX 3060 Ti] + 2487 GA104 [GeForce RTX 3060] + 2488 GA104 [GeForce RTX 3070 Lite Hash Rate] + 2489 GA104 [GeForce RTX 3060 Ti Lite Hash Rate] + 248a GA104 [CMP 70HX] + 249c GA104M [GeForce RTX 3080 Mobile / Max-Q 8GB/16GB] + 249d GA104M [GeForce RTX 3070 Mobile / Max-Q] + 249f GA104M + 24a0 GA104 [Geforce RTX 3070 Ti Laptop GPU] + 24ac GA104 [GeForce RTX 30x0 Engineering Sample] + 24ad GA104 [GeForce RTX 3060 Engineering Sample] + 24af GA104 [GeForce RTX 3070 Engineering Sample] + 24b0 GA104GL [RTX A4000] + 24b1 GA104GL [RTX A4000H] + 24b6 GA104GLM [RTX A5000 Mobile] + 24b7 GA104GLM [RTX A4000 Mobile] + 24b8 GA104GLM [RTX A3000 Mobile] + 24b9 GA104GLM [RTX A3000 12GB Laptop GPU] + 24ba GA104GLM [RTX A4500 Laptop GPU] + 24bb GA104GLM [RTX A3000 Laptop GPU] + 24bf GA104 [GeForce RTX 3070 Engineering Sample] + 24dc GA104M [GeForce RTX 3080 Mobile / Max-Q 8GB/16GB] + 24dd GA104M [GeForce RTX 3070 Mobile / Max-Q] + 24e0 GA104M [Geforce RTX 3070 Ti Laptop GPU] + 24fa GA104 [RTX A4500 Embedded GPU ] + 2501 GA106 [GeForce RTX 3060] + 2503 GA106 [GeForce RTX 3060] + 2504 GA106 [GeForce RTX 3060 Lite Hash Rate] + 2505 GA106 + 2507 GA106 [Geforce RTX 3050] + 2520 GA106M [GeForce RTX 3060 Mobile / Max-Q] + 2523 GA106M [GeForce RTX 3050 Ti Mobile / Max-Q] + 252f GA106 [GeForce RTX 3060 Engineering Sample] + 2531 GA106 [RTX A2000] + 2560 GA106M [GeForce RTX 3060 Mobile / Max-Q] + 2563 GA106M [GeForce RTX 3050 Ti Mobile / Max-Q] + 2571 GA106 [RTX A2000 12GB] + 2583 GA107 [GeForce RTX 3050] + 25a0 GA107M [GeForce RTX 3050 Ti Mobile] + 25a2 GA107M [GeForce RTX 3050 Mobile] + 25a3 GA107 + 25a4 GA107 + 25a5 GA107M [GeForce RTX 3050 Mobile] + 25a6 GA107M [GeForce MX570] + 25a7 GA107M [GeForce MX570] + 25a9 GA107M [GeForce RTX 2050] + 25aa GA107M [GeForce MX570 A] + 25af GA107 [GeForce RTX 3050 Engineering Sample] + 25b5 GA107GLM [RTX A4 Mobile] +# A16 - 25B6 10DE 14A9 / A2 - 25B6 10DE 157E + 25b6 GA107GL [A2 / A16] + 25b8 GA107GLM [RTX A2000 Mobile] + 25b9 GA107GLM [RTX A1000 Laptop GPU] + 25ba GA107GLM [RTX A2000 8GB Laptop GPU] + 25e0 GA107BM [GeForce RTX 3050 Ti Mobile] + 25e2 GA107BM [GeForce RTX 3050 Mobile] + 25e5 GA107BM [GeForce RTX 3050 Mobile] + 25f9 GA107 [RTX A1000 Embedded GPU ] + 25fa GA107 [RTX A2000 Embedded GPU] 10df Emulex Corporation 0720 OneConnect NIC (Skyhawk) 103c 1934 FlexFabric 20Gb 2-port 650M Adapter @@ -12077,6 +12584,7 @@ e300 LPe31000/LPe32000 Series 16Gb/32Gb Fibre Channel Adapter 1014 0614 PCIe3 4-Port 16Gb Fibre Channel Adapter for POWER (FC EN1C/EN1D; CCIN 578E) 1014 0615 PCIe3 2-Port 32Gb Fibre Channel Adapter for POWER (FC EN1A/EN1B; CCIN 578F) + 1014 06a0 PCIe3 2-Port 16Gb Fibre Channel Adapter for POWER (FC EN1L/EN1M; CCIN 2CFC) 10df e300 LPe32002-M2 2-Port 32Gb Fibre Channel Adapter 10df e301 LPe32000-M2 1-Port 32Gb Fibre Channel Adapter 10df e310 LPe31002-M6 2-Port 16Gb Fibre Channel Adapter @@ -12097,6 +12605,7 @@ 1590 0213 StoreFabric SN1200E 1-Port 16Gb Fibre Channel Adapter 1590 0214 StoreFabric SN1200E 2-Port 16Gb Fibre Channel Adapter 1590 022e Synergy 5330C 2-Port 32Gb Fibre Channel Mezz Card + 193d 1060 NIC-FC730i-Mb-2P f011 Saturn: LightPulse Fibre Channel Host Adapter f015 Saturn: LightPulse Fibre Channel Host Adapter f085 LP850 Fibre Channel Host Adapter @@ -12129,8 +12638,13 @@ 10df f411 LPe35000-M2-D 1-Port 32Gb Fibre Channel Adapter 10df f418 LPe35000-M2-L 1-Port 32Gb PCIe Fibre Channel Adapter 10df f419 LPe35002-M2-L 2-Port 32Gb PCIe Fibre Channel Adapter + 10df f421 LPe36002-M2-L 2-Port 64Gb PCIe Fibre Channel Adapter + 10df f422 LPe36002-M64-D 2-Port 64Gb Fibre Channel Adapter 1590 02d5 StoreFabric SN1610E 1-Port 32Gb Fibre Channel Adapter 1590 02d6 StoreFabric SN1610E 2-Port 32Gb Fibre Channel Adapter + f500 LPe37000/LPe38000 Series 32Gb/64Gb Fibre Channel Adapter + 1014 06c1 PCIe4 4-Port 32Gb Fibre Channel Adapter for POWER (FC EN1L/EN1M; CCIN 2CFC) + 1014 06c2 PCIe4 2-Port 64Gb Fibre Channel Adapter for POWER (FC EN1N/EN1P; CCIN 2CFD) f700 LP7000 Fibre Channel Host Adapter f701 LP7000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2) f800 LP8000 Fibre Channel Host Adapter @@ -12238,6 +12752,7 @@ 8111 Twist3 Frame Grabber 10ec Realtek Semiconductor Co., Ltd. 0139 RTL-8139/8139C/8139C+ Ethernet Controller + 3000 Killer E3000 2.5GbE Controller 5208 RTS5208 PCI Express Card Reader 5209 RTS5209 PCI Express Card Reader 5227 RTS5227 PCI Express Card Reader @@ -12260,14 +12775,18 @@ 1028 06d6 Latitude 7275 tablet 1028 06dc Latitude E7470 1028 06e4 XPS 15 9550 + 1028 06e6 Latitude 11 5175 2-in-1 + 1028 09be Latitude 7410 17aa 224f ThinkPad X1 Carbon 5th Gen 5260 RTS5260 PCI Express Card Reader + 5261 RTS5261 PCI Express Card Reader 5286 RTS5286 PCI Express Card Reader 5287 RTL8411B PCI Express Card Reader 1025 1094 Acer Aspire E5-575G 5288 RTS5288 PCI Express Card Reader 5289 RTL8411 PCI Express Card Reader 1043 1457 K55A Laptop + 5762 RTS5763DL NVMe SSD Controller 8029 RTL-8029(AS) 10b8 2011 EZ-Card (SMC1208) 10ec 8029 RTL-8029(AS) @@ -12340,6 +12859,8 @@ 8e2e 7000 KF-230TX 8e2e 7100 KF-230TX/2 a0a0 0007 ALN-325C + 8161 RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller + 10ec 8168 TP-Link TG-3468 v4.0 Gigabit PCI Express Network Adapter 8167 RTL-8110SC/8169SC Gigabit Ethernet 105b 0e10 RTL-8110SC-GR on a N15235/A74MX mainboard 1458 e000 GA-MA69G-S3H Motherboard @@ -12351,6 +12872,7 @@ 1028 0283 Vostro 220 1028 04b2 Vostro 3350 1028 04da Vostro 3750 + 1028 05d7 Alienware X51 R2 1028 06f2 Latitude 3470 1028 06f3 Latitude 3570 1028 0869 Vostro 3470 @@ -12359,6 +12881,8 @@ 103c 2a6f Asus IPIBL-LB Motherboard 103c 825b OMEN-17-w001nv 103c 8615 Pavilion Laptop 15-cw1xxx +# Rev 29, uses r8169 Driver on Linux + 103c 8882 HP ProDesk 405 G8 Desktop Mini PC 1043 11f5 Notebook motherboard (one of many models) 1043 16d5 U6V/U31J laptop 1043 81aa P5B @@ -12366,6 +12890,9 @@ 1043 83a3 M4A785/P7P55 Motherboard 1043 8432 P8P67 and other motherboards 1043 8505 P8 series motherboard + 1043 8554 H81M-C Motherboard + 1043 859e AM1I-A Motherboard + 1043 8677 PRIME B450M-A Motherboard 105b 0d7c D270S/D250S Motherboard 10ec 8168 RTL8111/8168 PCI Express Gigabit Ethernet controller 144d c652 RTL8168 on a NP300E5C series laptop @@ -12377,6 +12904,7 @@ 1462 7522 X58 Pro-E 1462 7c37 X570-A PRO motherboard 1775 11cc CC11/CL11 + 17aa 3098 ThinkCentre E73 17aa 3814 Z50-75 17aa 3823 Lenovo V130-15IGM Laptop - Type 81HL 17aa 5124 ThinkPad E595 @@ -12384,6 +12912,7 @@ 7470 3468 TG-3468 Gigabit PCI Express Network Adapter 8086 2055 NUC Kit DN2820FYKH 8086 d615 Desktop Board D510MO/D525MW + ea50 ce19 mCOM10-L1900 8169 RTL8169 PCI Gigabit Ethernet Controller 1025 0079 Aspire 5024WLMi 10bd 3202 EP-320G-TX1 32-bit PCI Gigabit Ethernet Adapter @@ -12400,6 +12929,15 @@ 16ec 011f USR997903 1734 1091 D2030-A1 a0a0 0449 AK86-L motherboard + 816a RTL8111xP UART #1 + ea50 ce19 mCOM10-L1900 + 816b RTL8111xP UART #2 + ea50 ce19 mCOM10-L1900 + 816c RTL8111xP IPMI interface + ea50 ce19 mCOM10-L1900 + 816d RTL811x EHCI host controller + ea50 ce19 mCOM10-L1900 + 816e Realtek RealManage BMC 8171 RTL8191SEvA Wireless LAN Controller 8172 RTL8191SEvB Wireless LAN Controller 8173 RTL8192SE Wireless LAN Controller @@ -12428,6 +12966,7 @@ 8812 RTL8812AE 802.11ac PCIe Wireless Network Adapter 8813 RTL8813AE 802.11ac PCIe Wireless Network Adapter 8821 RTL8821AE 802.11ac PCIe Wireless Network Adapter + 8852 RTL8852AE 802.11ax PCIe Wireless Network Adapter b723 RTL8723BE PCIe Wireless Network Adapter 10ec 8739 Dell Wireless 1801 17aa b736 Z50-75 @@ -12437,6 +12976,7 @@ 17aa b023 ThinkPad E595 c821 RTL8821CE 802.11ac PCIe Wireless Network Adapter c822 RTL8822CE 802.11ac PCIe Wireless Network Adapter + c82f RTL8822CE 802.11ac PCIe Wireless Network Adapter d723 RTL8723DE 802.11b/g/n PCIe Adapter 10ed Ascii Corporation 7310 V7310 @@ -12458,8 +12998,11 @@ 3fc4 RME Digi9652 (Hammerfall) 3fc5 RME Hammerfall DSP 3fc6 RME Hammerfall DSP MADI + 5005 Alveo U250 7038 FPGA Card XC7VX690T 17aa 402f FPGA XC7VX690T-3FFG1157E + 8019 Memory controller + 1eec 0201 VSEC10232X Dual-port 100Gb/s Etherent PCIe 8380 Ellips ProfiXpress Profibus Master 8381 Ellips Santos Frame Grabber d154 Copley Controls CAN card (PCI-CAN-02) @@ -12697,6 +13240,7 @@ 3220 RocketRAID 3220 3320 RocketRAID 3320 4310 RocketRaid 4310 + 7505 SSD7505 PCIe Gen4 x16 4-Port M.2 NVMe RAID Controller 1104 RasterOps Corp. 1105 Sigma Designs, Inc. 1105 REALmagic Xcard MPEG 1/2/3/4 DVD Decoder @@ -12744,12 +13288,12 @@ 0336 K8M890CE Host Bridge 0340 PT900 Host Bridge 0351 K8T890CF Host Bridge - 0353 VX800 Host Bridge + 0353 VX800/820-Series Chipset Host-Bridge Controller 0364 CN896/VN896/P4M900 Host Bridge 1043 81ce P5VD2-VM mothervoard 0391 VT8371 [KX133] 0409 VX855/VX875 Host Bridge: Host Control - 0410 VX900 Host Bridge: Host Control + 0410 VX900 Series Host Bridge: Host Control 0415 VT6415 PATA IDE Host Controller 1043 838f Motherboard 0501 VT8501 [Apollo MVP4] @@ -12776,7 +13320,7 @@ # probably all K7VT2/4*/6 1849 0571 K7VT series Motherboards 0576 VT82C576 3V [Apollo Master] - 0581 CX700/VX700 RAID Controller + 0581 CX700/VX700/VX800/820-Series Serial ATA RAID-Controller # Upgrade bios to get correct ID: 5324 instead of 0581 1106 0581 Wrong IDE ID 0585 VT82C585VP [Apollo VP1/VPX] @@ -12834,7 +13378,7 @@ 1296 P4M800 Host Bridge 1308 PT894 Host Bridge 1314 CN700/VN800/P4M800CE/Pro Host Bridge - 1324 CX700/VX700 Host Bridge + 1324 CX700/VX700-Series Error Reporting 1327 P4M890 Host Bridge 1336 K8M890CE Host Bridge 1340 PT900 Host Bridge @@ -12842,7 +13386,7 @@ 1353 VX800/VX820 Error Reporting 1364 CN896/VN896/P4M900 Host Bridge 1409 VX855/VX875 Error Reporting - 1410 VX900 Error Reporting + 1410 VX900 Series Error Reporting 1571 VT82C576M/VT82C586 1595 VT82C595/97 [Apollo VP2/97] 1732 VT1732 [Envy24 II] PCI Multi-Channel Audio Controller @@ -12859,7 +13403,7 @@ 2296 P4M800 Host Bridge 2308 PT894 Host Bridge 2314 CN700/VN800/P4M800CE/Pro Host Bridge - 2324 CX700/VX700 Host Bridge + 2324 CX700/VX700-Series Host Interface Control 2327 P4M890 Host Bridge 2336 K8M890CE Host Bridge 2340 PT900 Host Bridge @@ -12867,22 +13411,23 @@ 2353 VX800/VX820 Host Bus Control 2364 CN896/VN896/P4M900 Host Bridge 2409 VX855/VX875 Host Bus Control - 2410 VX900 CPU Bus Controller + 2410 VX900 Series CPU Bus Controller 287a VT8251 PCI to PCI Bridge 287b VT8251 Host Bridge 287c VT8251 PCIE Root Port 287d VT8251 PCIE Root Port 287e VT8237/8251 Ultra VLINK Controller 3022 CLE266 - 3038 VT82xx/62xx UHCI USB 1.1 Controller + 3038 VT82xx/62xx/VX700/8x0/900 UHCI USB 1.1 Controller 0925 1234 onboard UHCI USB 1.1 Controller 1019 0985 P6VXA Motherboard 1019 0a81 L7VTA v1.0 Motherboard (KT400-8235) 1043 8080 A7V333 motherboard - 1043 808c VT6202 USB2.0 4 port controller + 1043 808c VT62xx USB1.1 4 port controller 1043 80a1 A7V8X-X motherboard 1043 80ed A7V600/K8V-X/A8V Deluxe motherboard 1179 0001 Magnia Z310 + 1234 0925 MVP3 USB Controller 1458 5004 GA-7VAX Mainboard 1462 5901 KT6 Delta-FIS2R (MS-6590) 1462 7020 K8T NEO 2 motherboard @@ -13000,7 +13545,7 @@ 3101 VT8653 Host Bridge 3102 VT8662 Host Bridge 3103 VT8615 Host Bridge - 3104 USB 2.0 + 3104 USB 2.0 EHCI-Compliant Host-Controller 0925 1234 onboard EHCI USB 2.0 Controller 1019 0a81 L7VTA v1.0 Motherboard (KT400-8235) 1043 808c A7V8X motherboard @@ -13113,11 +13658,11 @@ 3269 KT880 Host Bridge 3282 K8T800Pro Host Bridge 3287 VT8251 PCI to ISA Bridge - 3288 VT8237A/VT8251 HDA Controller + 3288 VX900/VT8xxx High Definition Audio Controller 19da a179 ZBOX VD01 3290 K8M890 Host Bridge 3296 P4M800 Host Bridge - 3324 CX700/VX700 Host Bridge + 3324 CX700/VX700-Series DRAM Bus Control 3327 P4M890 Host Bridge 3336 K8M890CE Host Bridge 3337 VT8237A PCI to ISA Bridge @@ -13126,8 +13671,9 @@ 3344 CN700/P4M800 Pro/P4M800 CE/VN800 Graphics [S3 UniChrome Pro] 3349 VT8251 AHCI/SATA 4-Port Controller 3351 VT3351 Host Bridge - 3353 VX800 PCI to PCI Bridge + 3353 VX800/820 PCI to PCI Bridge 3364 CN896/VN896/P4M900 Host Bridge + 3365 VT630x IEEE 1394 Host Controller [Fire II/M] 3371 CN896/VN896/P4M900 [Chrome 9 HC] 3372 VT8237S PCI to ISA Bridge 337a VT8237A PCI to PCI Bridge @@ -13136,12 +13682,12 @@ 1043 8374 M5A88-V EVO 1043 8384 P8P67 Deluxe Motherboard 3409 VX855/VX875 DRAM Bus Control - 3410 VX900 DRAM Bus Control + 3410 VX900 Series DRAM Bus Control 19da a179 ZBOX nano VD01 - 3432 VL80x xHCI USB 3.0 Controller + 3432 VL800/801 xHCI USB 3.0 Controller 3456 VX11 Standard Host Bridge 345b VX11 Miscellaneous Bus - 3483 VL805 USB 3.0 Host Controller + 3483 VL805/806 xHCI USB 3.0 Controller 3a01 VX11 Graphics [Chrome 645/640] 4149 VIA VT6420 (ATA133) Controller 4204 K8M800 Host Bridge @@ -13156,7 +13702,7 @@ 4296 P4M800 Host Bridge 4308 PT894 Host Bridge 4314 CN700/VN800/P4M800CE/Pro Host Bridge - 4324 CX700/VX700 Host Bridge + 4324 CX700/VX700-Series Power Management and Testing Control 4327 P4M890 Host Bridge 4336 K8M890CE Host Bridge 4340 PT900 Host Bridge @@ -13164,7 +13710,7 @@ 4353 VX800/VX820 Power Management Control 4364 CN896/VN896/P4M900 Host Bridge 4409 VX855/VX875 Power Management Control - 4410 VX900 Power Management and Chip Testing Control + 4410 VX900 Series Power Management and Chip Testing Control 19da a179 ZBOX nano VD01 5030 VT82C596 ACPI [Apollo PRO] 5122 VX855/VX875 Chrome 9 HCM Integrated Graphics @@ -13173,7 +13719,7 @@ 5287 VT8251 Serial ATA Controller 5290 K8M890 I/O APIC Interrupt Controller 5308 PT894 I/O APIC Interrupt Controller - 5324 VX800 Serial ATA and EIDE Controller + 5324 CX700M2/VX700/VX800/820-Series Serial ATA & EIDE-Controller 5327 P4M890 I/O APIC Interrupt Controller 5336 K8M890CE I/O APIC Interrupt Controller 5340 PT900 I/O APIC Interrupt Controller @@ -13182,7 +13728,7 @@ 5364 CN896/VN896/P4M900 I/O APIC Interrupt Controller 5372 VT8237/8251 Serial ATA Controller 5409 VX855/VX875 APIC and Central Traffic Control - 5410 VX900 APIC and Central Traffic Control + 5410 VX900 Series APIC and Central Traffic Control 6100 VT85C100A [Rhine II] 6287 SATA RAID Controller 6290 K8M890CE Host Bridge @@ -13190,7 +13736,7 @@ 6353 VX800/VX820 Scratch Registers 6364 CN896/VN896/P4M900 Security Device 6409 VX855/VX875 Scratch Registers - 6410 VX900 Scratch Registers + 6410 VX900 Series Scratch Registers 19da a179 ZBOX nano VD01 7122 VX900 Graphics [Chrome9 HD] 7204 K8M800 Host Bridge @@ -13208,7 +13754,7 @@ 7296 P4M800 Host Bridge 7308 PT894 Host Bridge 7314 CN700/VN800/P4M800CE/Pro Host Bridge - 7324 CX700/VX700 Host Bridge + 7324 CX700/VX700-Series North-South Module Interface Control 7327 P4M890 Host Bridge 7336 K8M890CE Host Bridge 7340 PT900 Host Bridge @@ -13216,17 +13762,17 @@ 7353 VX800/VX820 North-South Module Interface Control 7364 CN896/VN896/P4M900 Host Bridge 7409 VX855/VX875 North-South Module Interface Control - 7410 VX900 North-South Module Interface Control + 7410 VX900 Series North-South Module Interface Control 19da a179 ZBOX nano VD01 8231 VT8231 [PCI-to-ISA Bridge] 8235 VT8235 ACPI 8305 VT8363/8365 [KT133/KM133 AGP] - 8324 CX700/VX700 PCI to ISA Bridge + 8324 CX700/VX700-Series Bus Control and Power Management 8353 VX800/VX820 Bus Control and Power Management 8391 VT8371 [KX133 AGP] 8400 MVP4 8409 VX855/VX875 Bus Control and Power Management - 8410 VX900 Bus Control and Power Management + 8410 VX900 Series Bus Control and Power Management 19da a179 ZBOX VD01 8500 KLE133/PLE133/PLE133T 8501 VT8501 [Apollo MVP4 AGP] @@ -13242,19 +13788,21 @@ 8a26 KL133/KL133A/KM133/KM133A [S3 ProSavage] 8d01 PN133/PN133T [S3 Twister] 8d04 KM266/P4M266/P4M266A/P4N266 [S3 ProSavageDDR] - 9001 VX900 Serial ATA Controller + 9001 VX900 Series Serial-ATA Controller 9082 Standard AHCI 1.0 SATA Controller 9140 HDMI Audio Device 9201 USB3.0 Controller - 9530 Secure Digital Memory Card Controller - 95d0 SDIO Host Controller +# Centaur CNS Coprocessor + 9380 Ncore Coprocessor + 9530 VX800/820/900 Series Secure Digital Memory Card Controller + 95d0 VX800/820/900 Series SDIO Host Controller a208 PT890 PCI to PCI Bridge Controller a238 K8T890 PCI to PCI Bridge Controller a327 P4M890 PCI to PCI Bridge Controller - a353 VX8xx South-North Module Interface Control + a353 VX8xx/900 Series South-North Module Interface Control a364 CN896/VN896/P4M900 PCI to PCI Bridge Controller - a409 VX855/VX875 USB Device Controller - a410 VX900 PCI Express Root Port 0 + a409 VX855/VX875/VX900 Series USB Device Controller + a410 VX900 Series PCI Express Root Port 0 b091 VT8633 [Apollo Pro266 AGP] b099 VT8366/A/7 [Apollo KT266/A/333 AGP] b101 VT8653 AGP Bridge @@ -13266,34 +13814,35 @@ b168 VT8235 PCI Bridge b188 VT8237/8251 PCI bridge [K8M890/K8T800/K8T890 South] 147b 1407 KV8-MAX3 motherboard - b198 VT8237/VX700 PCI Bridge + b198 VT8237/CX700/VX700-Series PCI to PCI Bridge b213 VPX/VPX2 I/O APIC Interrupt Controller b353 VX855/VX875/VX900 PCI to PCI Bridge - b410 VX900 PCI Express Root Port 1 + b410 VX900 Series PCI Express Root Port 1 b999 [K8T890 North / VT8237 South] PCI Bridge c208 PT890 PCI to PCI Bridge Controller c238 K8T890 PCI to PCI Bridge Controller c327 P4M890 PCI to PCI Bridge Controller c340 PT900 PCI to PCI Bridge Controller - c353 VX800/VX820 PCI Express Root Port + c353 VX800/820-Series PCI-Express Root (PCI-to-PCI Virtual Bridge) c364 CN896/VN896/P4M900 PCI to PCI Bridge Controller c409 VX855/VX875 EIDE Controller - c410 VX900 PCI Express Root Port 2 + c410 VX900 Series PCI Express Root Port 2 d104 VT8237R USB UDCI Controller d208 PT890 PCI to PCI Bridge Controller d213 VPX/VPX2 PCI to PCI Bridge Controller d238 K8T890 PCI to PCI Bridge Controller d340 PT900 PCI to PCI Bridge Controller - d410 VX900 PCI Express Root Port 3 + d410 VX900 Series PCI Express Root Port 3 e208 PT890 PCI to PCI Bridge Controller e238 K8T890 PCI to PCI Bridge Controller e340 PT900 PCI to PCI Bridge Controller - e353 VX800/VX820 PCI Express Root Port - e410 VX900 PCI Express Physical Layer Electrical Sub-block + e353 VX800/820-Series PCI-Express Root Port 0 + e410 VX900 Series PCI Express Physical Layer Electrical Sub-block f208 PT890 PCI to PCI Bridge Controller f238 K8T890 PCI to PCI Bridge Controller f340 PT900 PCI to PCI Bridge Controller - f353 VX800/VX820 PCI Express Root Port + f353 VX800/820-Series PCI-Express Root Port 1 + f410 VX900 Series PCI UART Port 0-3 1107 Stratus Computers 0576 VIA VT82C570MV [Apollo] (Wrong vendor ID!) 1108 Proteon, Inc. @@ -13928,7 +14477,7 @@ 0002 Dual PCI to RapidIO Bridge 000b POET Serial RapidIO Bridge 000d POET PSDMS Device -1135 Fuji Xerox Co Ltd +1135 FUJIFILM Business Innovation Corp. 0001 Printer controller 1136 Momentum Data Systems 0002 PCI-JTAG @@ -13953,6 +14502,8 @@ 1137 00ce VIC 1225T PCIe Management Controller 1137 012e VIC 1227 PCIe Management Controller 1137 014d VIC 1385 PCIe Management Controller + 1137 0217 VIC 1455 PCIe Management Controller + 1137 0218 VIC 1457 PCIe Management Controller 0043 VIC Ethernet NIC 1137 0047 VIC P81E PCIe Ethernet NIC 1137 0048 VIC M81KR Mezzanine Ethernet NIC @@ -14399,6 +14950,7 @@ 1172 Altera Corporation 00a7 Stratix V 0530 Stratix IV + 646c KT-500/KT-521 board 1173 Adobe Systems, Inc 1174 Bridgeport Machines 1175 Mitron Computer Inc. @@ -14409,6 +14961,7 @@ 1179 Toshiba Corporation 0102 Extended IDE Controller 0103 EX-IDE Type-B + 010e PXP04 NVMe SSD 010f NVMe Controller 0110 NVMe SSD Controller Cx5 1028 1ffb Express Flash NVMe 960G (RI) U.2 (CD5) @@ -14420,7 +14973,9 @@ 1d49 4039 Thinksystem U.2 CM5 NVMe SSD 1d49 403a Thinksystem AIC CM5 NVMe SSD 0113 BG3 NVMe SSD Controller + 1179 0001 Toshiba KBG30ZMS128G 128GB NVMe SSD 0115 XG4 NVMe SSD Controller + 011a XG6 NVMe SSD Controller 0404 DVD Decoder card 0406 Tecra Video Capture device 0407 DVD Decoder card (Version 2) @@ -14483,6 +15038,19 @@ 117c 00a2 Celerity FC-321E 117c 00a3 Celerity FC-322E 117c 00ac Celerity FC-324E + 00bb Celerity FC 32/64Gb/s Gen 7 Fibre Channel HBA + 117c 00bc Celerity FC-321P + 117c 00bd Celerity FC-322P + 117c 00be Celerity FC-324P + 00c5 ExpressNVM PCIe Gen4 Switch + 117c 00c6 ExpressNVM S48F PCIe Gen4 + 117c 00c7 ExpressNVM S468 PCIe Gen4 + 00e6 ExpressSAS GT 12Gb/s SAS/SATA HBA + 117c 00c0 ExpressSAS H1280 GT + 117c 00c1 ExpressSAS H1208 GT + 117c 00c2 ExpressSAS H1244 GT + 117c 00c3 ExpressSAS H12F0 GT + 117c 00c4 ExpressSAS H120F GT 8013 ExpressPCI UL4D 8014 ExpressPCI UL4S 8027 ExpressPCI UL5D @@ -14703,6 +15271,7 @@ 0314 Model 14 Road Runner Frame Grabber 0324 Model 24 Road Runner Frame Grabber 0344 Model 44 Road Runner Frame Grabber + b04e Claxon CXP4 CoaXPress frame grabber 118e Hermstedt GmbH 118f Green Logic 1190 Tripace @@ -14769,6 +15338,8 @@ 11aa Actel # Nee Galileo Technology, Inc. 11ab Marvell Technology Group Ltd. + 0100 88F3700 [Armada 3700 Family] ARM SoC + 0110 88F60x0/88F70x0/88F80x0/CN913x ARM SoC 0146 GT-64010/64010A System Controller 0f53 88E6318 Link Street network controller 11ab MV88SE614x SATA II PCI-E controller @@ -14803,6 +15374,7 @@ 2b38 88W8897 [AVASTAR] 802.11ac Wireless 2b40 88W8964 [Avastar] 802.11ac Wireless 4101 OLPC Cafe Controller Secure Digital Controller + 4146 GT-64111 System Controller 4320 88E8001 Gigabit Ethernet Controller 1019 0f38 Marvell 88E8001 Gigabit Ethernet Controller (ECS) 1019 8001 Marvell 88E8001 Gigabit Ethernet Controller (ECS) @@ -14985,12 +15557,17 @@ 6480 MV64460/64461/64462 System Controller 1775 c200 C2K CompactPCI single board computer 6485 MV64460/64461/64462 System Controller, Revision B + 6560 88F6560 [Avanta] ARM SoC + 6710 88F6710 [Armada 370] ARM SoC + 6820 88F6820 [Armada 385] ARM SoC + 6828 88F6828 [Armada 388] ARM SoC + 6920 88F6920 [Armada 390] ARM SoC 7042 88SX7042 PCI-e 4-port SATA-II 16b8 434b Tempo SATA E4P 7810 MV78100 [Discovery Innovation] ARM SoC 7820 MV78200 [Discovery Innovation] ARM SoC 7823 MV78230 [Armada XP] ARM SoC - 7846 88F6820 [Armada 385] ARM SoC + 7846 MV78460 [Armada XP] ARM SoC d40f Bobcat3 Ethernet Switch f003 GT-64010 Primary Image Piranha Image Generator 11ac Canon Information Systems Research Aust. @@ -15000,7 +15577,7 @@ 11ad 0003 LNE100TX 11ad f003 LNE100TX 11ad ffff LNE100TX - 1385 f004 FA310TX + 1385 f004 FA310/TX LAN 10/100 PCI Ethernet Adapter 2646 f002 KNE110TX EtheRx Fast Ethernet c115 LNE100TX [Linksys EtherFast 10/100] 11ad c001 LNE100TX [ver 2.0] @@ -15315,14 +15892,22 @@ 8071 PM8071 Tachyon SPCve 12G eight-port SAS/SATA controller 8072 PM8072 Tachyon SPCv 12G 16-port SAS/SATA controller 8073 PM8073 Tachyon SPCve 12G 16-port SAS/SATA controller - 8531 PM8531 PFX 24xG3 Fanout PCIe Switches + 8531 PM8531 PFX 24xG3 PCIe Fanout Switch + 8532 PM8532 PFX 32xG3 PCIe Fanout Switch + 8533 PM8533 PFX 48xG3 PCIe Fanout Switch + 8534 PM8534 PFX 64xG3 PCIe Fanout Switch + 8535 PM8535 PFX 80xG3 PCIe Fanout Switch + 8536 PM8536 PFX 96xG3 PCIe Fanout Switch + 1bd4 0081 PM8536 PFX 96xG3 PCIe Fanout Switch 8546 PM8546 B-FEIP PSX 96xG3 PCIe Storage Switch + 8562 PM8562 Switchtec PFX-L 32xG3 Fanout-Lite PCIe Gen3 Switch 11f9 I-Cube Inc 11fa Kasan Electronics Company, Ltd. 11fb Datel Inc 11fc Silicon Magic 11fd High Street Consultants -11fe Pepperl+Fuchs Comtrol, Inc. +# nee Comtrol, Inc. +11fe Pepperl+Fuchs 0001 RocketPort PCI 32-port w/external I/F 0002 RocketPort PCI 8-port w/external I/F 0003 RocketPort PCI 16-port w/external I/F @@ -15700,6 +16285,12 @@ 125b Asix Electronics Corporation 1400 AX88141 Fast Ethernet Controller 1186 1100 AX8814X Based PCI Fast Ethernet Adapter + 9100 AX99100 PCIe to Multi I/O Controller + a000 1000 Serial Port + a000 2000 Parallel Port + a000 6000 SPI + a000 7000 Local Bus + ea50 1c10 RXi2-BP 125c Aurora Technologies, Inc. 0101 Saturn 4520P 0640 Aries 16000P @@ -15810,6 +16401,8 @@ 5a4b Telsat Turbo 1268 Tektronix 1269 Thomson-CSF/TTM +# MBIM on top of MHI + 00b3 5G Data Card [Cinterion MV31-W] 126a Lexmark International, Inc. 126b Adax, Inc. 126c Northern Telecom @@ -15830,6 +16423,8 @@ 0811 SM811 LynxE 0820 SM820 Lynx3D 0910 SM910 + 2262 SM2262/SM2262EN SSD Controller + 2263 SM2263EN/SM2263XT SSD Controller 1270 Olympus Optical Co., Ltd. 1271 GW Instruments 1272 Telematics International @@ -16047,9 +16642,9 @@ 1281 Yokogawa Electric Corporation 1282 Davicom Semiconductor, Inc. 6585 DM562P V90 Modem - 9009 Ethernet 100/10 MBit + 9009 DM9009 Ethernet Controller 9100 21x4x DEC-Tulip compatible 10/100 Ethernet - 9102 21x4x DEC-Tulip compatible 10/100 Ethernet + 9102 DM9102 Fast Ethernet Controller # Subsystem ID is main ID reveresed. 0291 8212 DM9102A (DM9102AE, SM9102AF) Ethernet 100/10 MBit 9132 Ethernet 100/10 MBit @@ -16067,6 +16662,7 @@ 8888 IT8888F/G PCI to ISA Bridge with SMB [Golden Gate] 8889 IT8889F PCI to ISA Bridge 8892 IT8892E PCIe to PCI Bridge + 8086 200d DH61CR motherboard 8893 IT8893E PCIe to PCI Bridge e886 IT8330G 1284 Sahara Networks, Inc. @@ -16295,8 +16891,10 @@ # PI7C9X20508GP 5Port-8Lane PCI Express Switch GreenPacket Family 0508 PI7C9X20508GP PCI Express Switch 5Port-8Lane 2304 PI7C9X2G304 EL/SL PCIe2 3-Port/4-Lane Packet Switch + 2308 PI7C9X2G308GP 8-lane PCI Express 2.0 Switch with 3 PCI Express ports 2404 PI7C9X2G404 EL/SL PCIe2 4-Port/4-Lane Packet Switch 2608 PI7C9X2G608GP PCIe2 6-Port/8-Lane Packet Switch + ea50 cc10 RXi2-BP 400a PI7C9X442SL PCI Express Bridge Port 400e PI7C9X442SL USB OHCI Controller 400f PI7C9X442SL USB EHCI Controller @@ -16307,6 +16905,7 @@ 8150 PCI to PCI Bridge 8152 PI7C8152A/PI7C8152B/PI7C8152BI PCI-to-PCI Bridge 8154 PI7C8154A/PI7C8154B/PI7C8154BI PCI-to-PCI Bridge + 8619 PI7C9X2G1616PR PCIe2 16-Port/16-Lane Packet Switch e110 PI7C9X110 PCI Express to PCI bridge 1775 11cc CC11/CL11 CompactPCI Bridge e111 PI7C9X111SL PCIe-to-PCI Reversible Bridge @@ -16341,12 +16940,13 @@ 12ea Zuken 12eb Aureal Semiconductor 0001 Vortex 1 + 0000 0300 Terasound A3D PCI 104d 8036 AU8820 Vortex Digital Audio Processor 1092 2000 Sonic Impact A3D 1092 2100 Sonic Impact A3D 1092 2110 Sonic Impact A3D 1092 2200 Sonic Impact A3D - 122d 1002 AU8820 Vortex Digital Audio Processor + 122d 1002 SC 338-A3D 12eb 0001 AU8820 Vortex Digital Audio Processor 5053 3355 Montego 50b2 1111 XLerate @@ -16609,6 +17209,8 @@ 5190 9200 ECO NVMe SSD 5191 9200 PRO NVMe SSD 5192 9200 MAX NVMe SSD + 51a2 9300 PRO NVMe SSD + 51a3 9300 MAX NVMe SSD 1345 Arescom Inc 1347 Odetics 1349 Sumitomo Electric Industries, Ltd. @@ -16634,12 +17236,14 @@ 134f Algo System Co Ltd 1350 Systec Co. Ltd 1351 Sonix Inc -# nee Thales Idatys -1353 Vierling Communication SAS +# nee Vierling Communication SAS, nee Thales Idatys +1353 dbeeSet Technology 0002 Proserver 0003 PCI-FUT 0004 PCI-S0 0005 PCI-FUT-S0 + 0006 OTDU-1U (FPGA Zynq-7000) + 0007 OTDU-EX 1354 Dwave System Inc 1355 Kratos Analytical Ltd 1356 The Logical Co @@ -16949,6 +17553,8 @@ 13a3 0036 DX1730 Acceleration Card 0037 8204 Acceleration Processor 13a3 0036 DX1740 Acceleration Card + 9240 XR9240 Compression and Security Coprocessor [Panther II] + 13a3 9200 DX2040 Compression and Security Acceleration Card [Panther II] 13a4 Rascom Inc 13a5 Audio Digital Imaging Inc 13a6 Videonics Inc @@ -17023,7 +17629,7 @@ 13c9 Eaton Corporation 13ca Iomega Corporation 13cb Yano Electric Co Ltd -13cc Metheus Corporation +13cc BARCO 13cd Compatible Systems Corporation 13ce Cocom A/S 13cf Studio Audio & Video Ltd @@ -17348,6 +17954,8 @@ 1414 Microsoft Corporation 0001 MN-120 (ADMtek Centaur-C based) 0002 MN-130 (ADMtek Centaur-P based) +# Virtual Video Card Device for Windows Remote Desktop (RDP) + 008c Basic Render Driver 5353 Hyper-V virtual VGA 5801 XMA Decoder (Xenon) 5802 SATA Controller - CdRom (Xenon) @@ -17387,10 +17995,151 @@ 9513 OX16PCI954 (Quad 16950 UART) function 1 (parallel port) 9521 OX16PCI952 (Dual 16950 UART) 9523 OX16PCI952 Integrated Parallel Port - c158 OXPCIe952 Dual 16C950 UART +# Multifunction device with 3 function bits in ID + c000 OXPCIe840 Parallel Port + c004 OXPCIe840 Parallel Port + c006 OXPCIe840 GPIO +# Multifunction device with reset straps and function bits in ID + c100 OXPCIe952 Parallel Port + c101 OXPCIe952 Legacy 950 UART + c104 OXPCIe952 Parallel Port + c105 OXPCIe952 Legacy 950 UART + c106 OXPCIe952 GPIO + c108 OXPCIe952 Parallel Port + c109 OXPCIe952 Legacy 950 UART + c10c OXPCIe952 Parallel Port + c10d OXPCIe952 Legacy 950 UART + c10e OXPCIe952 GPIO + c110 OXPCIe952 Parallel Port + c114 OXPCIe952 Parallel Port + c118 OXPCIe952 Parallel Port + c11b OXPCIe952 Native 950 UART + c11c OXPCIe952 Parallel Port + c11e OXPCIe952 GPIO + c11f OXPCIe952 Native 950 UART + c120 OXPCIe952 Legacy 950 UART + c124 OXPCIe952 Legacy 950 UART + c126 OXPCIe952 GPIO + c128 OXPCIe952 Legacy 950 UART + c12c OXPCIe952 Legacy 950 UART + c12e OXPCIe952 GPIO + c134 OXPCIe952 GPIO + c138 OXPCIe952 Native 950 UART + c13c OXPCIe952 GPIO + c13d OXPCIe952 Native 950 UART + c140 OXPCIe952 Legacy 950 UART #1 + c141 OXPCIe952 Legacy 950 UART #2 + c144 OXPCIe952 Legacy 950 UART #1 + c145 OXPCIe952 Legacy 950 UART #2 + c146 OXPCIe952 GPIO + c148 OXPCIe952 Legacy 950 UART #1 + c149 OXPCIe952 Legacy 950 UART #2 + c14c OXPCIe952 Legacy 950 UART #1 + c14d OXPCIe952 Legacy 950 UART #2 + c14e OXPCIe952 GPIO + c154 OXPCIe952 GPIO + c158 OXPCIe952 Dual Native 950 UART e4bf c504 CP4-SCAT Wireless Technologies Carrier Board e4bf d551 DU1-MUSTANG Dual-Port RS-485 Interface - c308 EX-44016 16-port serial + c15c OXPCIe952 GPIO + c15d OXPCIe952 Dual Native 950 UART +# Multifunction device with 4 function bits in ID + c204 OXPCIe954 GPIO + c208 OXPCIe954 Quad Native 950 UART + c20c OXPCIe954 GPIO + c20d OXPCIe954 Quad Native 950 UART +# Multifunction device with 4 function bits in ID + c304 OXPCIe958 GPIO + c308 OXPCIe958 Quad Native 950 UART + c30c OXPCIe958 GPIO + c30d OXPCIe958 Quad Native 950 UART +# Multifunction device with 8 function bits in ID + c530 OXPCIe200 Dual OHCI USB Controller (ULPI/R-ULPI) + c531 OXPCIe200 Dual EHCI USB Controller (ULPI/R-ULPI) + c534 OXPCIe200 Dual OHCI USB Controller (ULPI/R-ULPI) + c535 OXPCIe200 Dual EHCI USB Controller (ULPI/R-ULPI) + c536 OXPCIe200 GPIO + c538 OXPCIe200 Dual OHCI USB Controller (ULPI/R-ULPI) + c539 OXPCIe200 Dual EHCI USB Controller (ULPI/R-ULPI) + c53b OXPCIe200 Native 950 UART + c53c OXPCIe200 Dual OHCI USB Controller (ULPI/R-ULPI) + c53d OXPCIe200 Dual EHCI USB Controller (ULPI/R-ULPI) + c53e OXPCIe200 GPIO + c53f OXPCIe200 Native 950 UART + c540 OXPCIe200 Dual OHCI USB Controller (R-ULPI) + c541 OXPCIe200 Dual EHCI USB Controller (R-ULPI) + c544 OXPCIe200 Dual OHCI USB Controller (R-ULPI) + c545 OXPCIe200 Dual EHCI USB Controller (R-ULPI) + c546 OXPCIe200 GPIO + c548 OXPCIe200 Dual OHCI USB Controller (R-ULPI) + c549 OXPCIe200 Dual EHCI USB Controller (R-ULPI) + c54b OXPCIe200 Native 950 UART + c54c OXPCIe200 Dual OHCI USB Controller (R-ULPI) + c54d OXPCIe200 Dual EHCI USB Controller (R-ULPI) + c54e OXPCIe200 Dual GPIO + c54f OXPCIe200 Native 950 UART + c560 OXPCIe200 Dual OHCI USB Controller (ULPI/analog) + c561 OXPCIe200 EHCI USB Controller (ULPI) + c564 OXPCIe200 Dual OHCI USB Controller (ULPI/analog) + c565 OXPCIe200 EHCI USB Controller (ULPI) + c566 OXPCIe200 GPIO + c568 OXPCIe200 Dual OHCI USB Controller (ULPI/analog) + c569 OXPCIe200 EHCI USB Controller (ULPI) + c56b OXPCIe200 Native 950 UART + c56c OXPCIe200 Dual OHCI USB Controller (ULPI/analog) + c56d OXPCIe200 EHCI USB Controller (ULPI) + c56e OXPCIe200 GPIO + c56f OXPCIe200 Native 950 UART + c570 OXPCIe200 Dual OHCI USB Controller (R-ULPI/analog) + c571 OXPCIe200 EHCI USB Controller (R-ULPI) + c574 OXPCIe200 Dual OHCI USB Controller (R-ULPI/analog) + c575 OXPCIe200 EHCI USB Controller (R-ULPI) + c576 OXPCIe200 GPIO + c578 OXPCIe200 Dual OHCI USB Controller (R-ULPI/analog) + c579 OXPCIe200 EHCI USB Controller (R-ULPI) + c57b OXPCIe200 Native 950 UART + c57c OXPCIe200 Dual OHCI USB Controller (R-ULPI/analog) + c57d OXPCIe200 EHCI USB Controller (R-ULPI) + c57e OXPCIe200 GPIO + c57f OXPCIe200 Native 950 UART + c5a0 OXPCIe200 OHCI USB Controller (ULPI) + c5a1 OXPCIe200 EHCI USB Controller (ULPI) + c5a2 OXPCIe200 Programmable Memory Interface + c5a4 OXPCIe200 OHCI USB Controller (ULPI) + c5a5 OXPCIe200 EHCI USB Controller (ULPI) + c5a6 OXPCIe200 Programmable Memory Interface & GPIO + c5a8 OXPCIe200 OHCI USB Controller (ULPI) + c5a9 OXPCIe200 EHCI USB Controller (ULPI) + c5aa OXPCIe200 Programmable Memory Interface + c5ab OXPCIe200 Native 950 UART + c5ac OXPCIe200 OHCI USB Controller (ULPI) + c5ad OXPCIe200 EHCI USB Controller (ULPI) + c5ae OXPCIe200 Programmable Memory Interface & GPIO + c5af OXPCIe200 Native 950 UART + c5b0 OXPCIe200 OHCI USB Controller (R-ULPI) + c5b1 OXPCIe200 EHCI USB Controller (R-ULPI) + c5b2 OXPCIe200 Programmable Memory Interface + c5b4 OXPCIe200 OHCI USB Controller (R-ULPI) + c5b5 OXPCIe200 EHCI USB Controller (R-ULPI) + c5b6 OXPCIe200 Programmable Memory Interface & GPIO + c5b8 OXPCIe200 OHCI USB Controller (R-ULPI) + c5b9 OXPCIe200 EHCI USB Controller (R-ULPI) + c5ba OXPCIe200 Programmable Memory Interface + c5bb OXPCIe200 Native 950 UART + c5bc OXPCIe200 OHCI USB Controller (R-ULPI) + c5bd OXPCIe200 EHCI USB Controller (R-ULPI) + c5be OXPCIe200 Programmable Memory Interface & GPIO + c5bf OXPCIe200 Native 950 UART + c5c0 OXPCIe200 OHCI USB Controller (analog) + c5c2 OXPCIe200 Programmable Memory Interface + c5c4 OXPCIe200 OHCI USB Controller (analog) + c5c6 OXPCIe200 Programmable Memory Interface & GPIO + c5c8 OXPCIe200 OHCI USB Controller (analog) + c5ca OXPCIe200 Programmable Memory Interface + c5cb OXPCIe200 Native 950 UART + c5cc OXPCIe200 OHCI USB Controller (analog) + c5ce OXPCIe200 Programmable Memory Interface & GPIO + c5cf OXPCIe200 Native 950 UART 1416 Multiwave Innovation pte Ltd 1417 Convergenet Technologies Inc 1418 Kyushu electronics systems Inc @@ -18144,11 +18893,26 @@ 144c Catalina Research Inc 144d Samsung Electronics Co Ltd 1600 Apple PCIe SSD + a544 Exynos 8890 PCIe Root Complex a800 XP941 PCIe SSD a802 NVMe SSD Controller SM951/PM951 - a804 NVMe SSD Controller SM961/PM961 + 144d a801 PM963 2.5" NVMe PCIe SSD + a804 NVMe SSD Controller SM961/PM961/SM963 + 144d a801 SM963 2.5" NVMe PCIe SSD a808 NVMe SSD Controller SM981/PM981/PM983 + 144d a801 SSD 970 EVO Plus 1TB 1d49 403b Thinksystem U.2 PM983 NVMe SSD + a809 NVMe SSD Controller 980 + a80a NVMe SSD Controller PM9A1/PM9A3/980PRO + 0128 215a DC NVMe PM9A3 RI U.2 960GB + 0128 215b DC NVMe PM9A3 RI U.2 1.92TB + 0128 215c DC NVMe PM9A3 RI U.2 3.84TB + 0128 215d DC NVMe PM9A3 RI U.2 7.68TB + 0128 2166 DC NVMe PM9A3 RI 110M.2 960GB + 0128 2167 DC NVMe PM9A3 RI 110M.2 1.92TB + 0128 2168 DC NVMe PM9A3 RI 80M.2 480GB + 0128 2169 DC NVMe PM9A3 RI 80M.2 960GB + 144d a813 General DC NVMe PM9A3 a820 NVMe SSD Controller 171X 1028 1f95 Express Flash NVMe XS1715 SSD 400GB 1028 1f96 Express Flash NVMe XS1715 SSD 800GB @@ -18212,6 +18976,25 @@ 1028 2097 EMC PowerEdge Express Flash Ent NVMe AGN SED RI U.2 Gen4 1.92TB 1028 2098 EMC PowerEdge Express Flash Ent NVMe AGN SED RI U.2 Gen4 3.84TB 1028 2099 EMC PowerEdge Express Flash Ent NVMe AGN SED RI U.2 Gen4 7.68TB + 1028 2118 Ent NVMe v2 AGN FIPS MU U.2 1.6TB + 1028 2119 Ent NVMe v2 AGN MU U.2 1.6TB + 1028 2120 Ent NVMe v2 AGN FIPS MU U.2 3.2T + 1028 2121 Ent NVMe v2 AGN MU U.2 3.2TB + 1028 2122 Ent NVMe v2 AGN FIPS MU U.2 6.4TB + 1028 2123 Ent NVMe v2 AGN MU U.2 6.4TB + 1028 2124 Ent NVMe v2 AGN FIPS MU U.2 6.4TB + 1028 2125 Ent NVMe v2 AGN MU U.2 12.8TB + 1028 2126 Ent NVMe v2 AGN FIPS RI U.2 1.92TB + 1028 2127 Ent NVMe v2 AGN RI U.2 1.92TB + 1028 2128 Ent NVMe v2 AGN FIPS RI U.2 3.84TB + 1028 2129 Ent NVMe v2 AGN RI U.2 3.84TB + 1028 2130 Ent NVMe v2 AGN FIPS RI U.2 7.68TB + 1028 2131 Ent NVMe v2 AGN RI U.2 7.68TB + 1028 2132 Ent NVMe v2 AGN FIPS RI U.2 15.36TB + 1028 2133 Ent NVMe v2 AGN RI U.2 15.36TB + a825 NVMe SSD Controller PM173Xa + a826 NVMe SSD Controller PM174X + ecec Exynos 8895 PCIe Root Complex 144e OLITEC 144f Askey Computer Corp. 1450 Octave Communications Ind. @@ -18222,6 +19005,8 @@ 1456 Advanced Hardware Architectures 1457 Nuera Communications Inc 1458 Gigabyte Technology Co., Ltd + 22e8 Ellesmere [Radeon RX 480] + 3483 USB 3.0 Controller (VIA VL80x-based xHCI Controller) 1459 DOOIN Electronics 145a Escalate Networks Inc 145b PRAIM SRL @@ -18238,6 +19023,9 @@ e836 M115S Hybrid Analog/DVB PAL/SECAM/NTSC Tuner f436 AVerTV Hybrid+FM 1462 Micro-Star International Co., Ltd. [MSI] +# VIA Driver-inf + 3483 MSI USB 3.0 (VIA VL80x-based xHCI USB Controller) + 7c56 Realtek Ethernet controller RTL8111H aaf0 Radeon RX 580 Gaming X 8G 1463 Fast Corporation 1464 Interactive Circuits & Systems Ltd @@ -18287,6 +19075,7 @@ 148a OPTO 148b INNOMEDIALOGIC Inc. 148c Tul Corporation / PowerColor + 2391 Radeon RX 590 [Red Devil] 148d DIGICOM Systems, Inc. 1003 HCF 56k Data/Fax Modem 148e OSI Plus Corporation @@ -18332,7 +19121,8 @@ 14a8 FEATRON Technologies Corporation 14a9 HIVERTEC Inc 14aa Advanced MOS Technology Inc -14ab Mentor Graphics Corp. +# nee Mentor Graphics Corp. +14ab Siemens Industry Software Inc. 14ac Novaweb Technologies Inc 14ad Time Space Radio AB 14ae CTI, Inc @@ -18388,9 +19178,15 @@ 103c 1240 Myrinet M2L-PCI64/2-3.0 LANai 7.4 (HP OEM) 14c2 DTK Computer 14c3 MEDIATEK Corp. + 0608 RZ608 Wi-Fi 6E 80MHz + 0616 MT7922 802.11ax PCI Express Wireless Network Adapter + 7612 MT7612E 802.11acbgn PCI Express Wireless Network Adapter + 7615 MT7615E 802.11ac PCI Express Wireless Network Adapter 7630 MT7630e 802.11bgn Wireless Network Adapter # MT7612E too? 7662 MT7662E 802.11ac PCI Express Wireless Network Adapter + 7915 MT7915E 802.11ax PCI Express Wireless Network Adapter + 7961 MT7921 802.11ax PCI Express Wireless Network Adapter 14c4 IWASAKI Information Systems Co Ltd 14c5 Automation Products AB 14c6 Data Race Inc @@ -18659,16 +19455,19 @@ 103c 0890 NC6000 laptop 103c 099c NX6110/NC6120 10cf 1279 LifeBook E8010D - 165f NetXtreme BCM5720 2-port Gigabit Ethernet PCIe + 165f NetXtreme BCM5720 Gigabit Ethernet PCIe 1028 04f7 PowerEdge R320 server 1028 08fd PowerEdge R6515/R7515 LOM 1028 08ff PowerEdge Rx5xx LOM Board 1028 0900 PowerEdge C6525 LOM +# Dell 5720 LOM + 1028 0917 PowerEdge C6520 LOM 103c 1786 NC332T Adapter 103c 193d NC332i Adapter 103c 2133 NC332i Adapter 103c 22e8 NC332i Adapter 103c 22eb NC332i Adapter + 15d9 165f H12SSL-i 1662 NetXtreme II BCM57712 10 Gigabit Ethernet 1663 NetXtreme II BCM57712 10 Gigabit Ethernet Multi Function 1665 NetXtreme BCM5717 Gigabit Ethernet PCIe @@ -18730,6 +19529,10 @@ 1259 2708 AT-2712 FX # The Broadcom 57800 device has two 1Gig ports and two 10Gig ports. The subsystem information can be used to differentiate. 168a NetXtreme II BCM57800 1/10 Gigabit Ethernet +# SFP+ ports + 1014 0493 PCIe2 LP 4-Port (10Gb+1GbE) SR+RJ45 Adapter (FC EN0T; CCIN 2CC3) +# RJ-45 ports + 1014 0494 PCIe2 LP 4-Port (10Gb+1GbE) SR+RJ45 Adapter (FC EN0T; CCIN 2CC3) 1028 1f5c BCM57800 10-Gigabit Ethernet 1028 1f5d BCM57800 10-Gigabit Ethernet 1028 1f67 BCM57800 1-Gigabit Ethernet @@ -18749,6 +19552,7 @@ 103c 339d Ethernet 10Gb 2-port 530SFP+ Adapter 193d 1003 530F-B 193d 1006 530F-L + 193d 100f NIC-ETH522i-Mb-2x10G 1690 NetXtreme BCM57760 Gigabit Ethernet PCIe 1691 NetLink BCM57788 Gigabit Ethernet PCIe 1028 04aa XPS 8300 @@ -18775,6 +19579,7 @@ 16a0 NetLink BCM5785 Fast Ethernet 16a1 BCM57840 NetXtreme II 10 Gigabit Ethernet 1043 866e PEB-10G/57840-2T 10GBase-T Network Adapter + 193d 100b NIC-ETH521i-Mb-4x10G 16a2 BCM57840 NetXtreme II 10/20-Gigabit Ethernet 103c 1916 FlexFabric 20Gb 2-port 630FLB Adapter 103c 1917 FlexFabric 20Gb 2-port 630M Adapter @@ -18894,19 +19699,27 @@ 16d4 BCM57402 NetXtreme-E Ethernet Partition 16d5 BCM57407 NetXtreme-E 10GBase-T Ethernet Controller 16d6 BCM57412 NetXtreme-E 10Gb RDMA Ethernet Controller + 14e4 1202 BCM957412M4122C OCP 1x25G Type1 wRoCE 14e4 4120 NetXtreme E-Series Advanced Dual-port 10Gb SFP+ Ethernet Network Daughter Card + 14e4 4126 NetXtreme-E Dual-port 10G SFP+ Ethernet OCP 3.0 Adapter (BCM957412N4120C) 152d 8b20 BCM57412 NetXtreme-E 10Gb RDMA Ethernet Controller 152d 8b22 BCM57412 NetXtreme-E 25Gb RDMA Ethernet Controller +# NIC-ETH531F-LP-2P BCM57412 2 x 10G SFP+ Ethernet PCIe Card + 193d 1024 NIC-ETH531F-LP-2P 16d7 BCM57414 NetXtreme-E 10Gb/25Gb RDMA Ethernet Controller - 14e4 1202 BCM957412M4122C OCP 1x25G Type1 wRoCE 14e4 1402 BCM957414A4142CC 10Gb/25Gb Ethernet PCIe 14e4 1404 BCM957414M4142C OCP 2x25G Type1 wRoCE 14e4 4140 NetXtreme E-Series Advanced Dual-port 25Gb SFP28 Network Daughter Card +# BCM957414M4143C + 14e4 4143 NetXtreme-E Single-port 40Gb/50Gb Ethernet OCP 2.0 Adapter (BCM957414M4143C) + 14e4 4146 NetXtreme-E Dual-port 25G SFP28 Ethernet OCP 3.0 Adapter (BCM957414N4140C) 1590 020e Ethernet 25Gb 2-port 631SFP28 Adapter 1590 0211 Ethernet 25Gb 2-port 631FLR-SFP28 Adapter + 1eec 0101 VSE250231S Dual-port 10Gb/25Gb Ethernet PCIe 16d8 BCM57416 NetXtreme-E Dual-Media 10G RDMA Ethernet Controller 1028 1feb NetXtreme-E 10Gb SFP+ Adapter - 14e4 4163 BCM957416M4163C OCP 2x10GBT Type1 wRoCE + 14e4 4163 NetXtreme-E Dual-port 10GBASE-T Ethernet OCP 2.0 Adapter (BCM957416M4163C) + 14e4 4166 NetXtreme-E Dual-port 10GBASE-T Ethernet OCP 3.0 Adapter (BCM957416N4160C) 1590 020c Ethernet 10Gb 2-port 535T Adapter 1590 0212 Ethernet 10Gb 2-port 535FLR-T Adapter 16d9 BCM57417 NetXtreme-E 10GBASE-T RDMA Ethernet Controller @@ -18923,6 +19736,7 @@ 16e7 BCM57404 NetXtreme-E Ethernet Partition 16e8 BCM57406 NetXtreme-E Ethernet Partition 16e9 BCM57407 NetXtreme-E 25Gb Ethernet Controller + 16eb BCM57412 NetXtreme-E RDMA Partition 16ec BCM57414 NetXtreme-E Ethernet Partition 16ed BCM57414 NetXtreme-E RDMA Partition 16ee BCM57416 NetXtreme-E Ethernet Partition @@ -18955,10 +19769,33 @@ 103c 30c0 Compaq 6710b 17aa 3a23 IdeaPad S10e 1750 BCM57508 NetXtreme-E 10Gb/25Gb/40Gb/50Gb/100Gb/200Gb Ethernet + 14e4 2100 NetXtreme-E Dual-port 100G QSFP56 Ethernet PCIe4.0 x16 Adapter (BCM957508-P2100G) + 14e4 5208 NetXtreme-E Dual-port 100G QSFP56 Ethernet OCP 3.0 Adapter (BCM957508-N2100G) + 14e4 d124 NetXtreme-E P2100D BCM57508 2x100G QSFP PCIE + 14e4 df24 BCM57508 NetXtreme-E NGM2100D 2x100G KR Mezz Ethernet 1751 BCM57504 NetXtreme-E 10Gb/25Gb/40Gb/50Gb/100Gb/200Gb Ethernet + 1028 09d4 PowerEdge XR11/XR12 LOM + 14e4 5045 NetXtreme-E BCM57504 4x25G OCP3.0 + 14e4 5250 NetXtreme-E BCM57504 4x25G KR Mezz + 14e4 d142 NetXtreme-E P425D BCM57504 4x25G SFP28 PCIE 1752 BCM57502 NetXtreme-E 10Gb/25Gb/40Gb/50Gb Ethernet + 1800 BCM57502 NetXtreme-E Ethernet Partition + 1801 BCM57504 NetXtreme-E Ethernet Partition + 1802 BCM57508 NetXtreme-E Ethernet Partition + 14e4 df24 BCM57508 NetXtreme-E NGM2100D 2x100G KR Mezz Ethernet Partition + 1803 BCM57502 NetXtreme-E RDMA Partition + 1804 BCM57504 NetXtreme-E RDMA Partition + 1805 BCM57508 NetXtreme-E RDMA Partition + 14e4 df24 NetXtreme-E NGM2100D BCM57508 2x100G KR Mezz RDMA Partition 1806 BCM5750X NetXtreme-E Ethernet Virtual Function + 14e4 df24 BCM57508 NetXtreme-E NGM2100D 2x100G KR Mezz Ethernet Virtual Function 1807 BCM5750X NetXtreme-E RDMA Virtual Function + 14e4 df24 BCM57508 NetXtreme-E NGM2100D 2x100G KR Mezz RDMA Virtual Function + 1808 BCM5750X NetXtreme-E Ethernet Virtual Function + 14e4 df24 BCM57508 NetXtreme-E NGM2100D 2x100G KR Mezz Ethernet Virtual Function + 1809 BCM5750X NetXtreme-E RDMA Virtual Function + 14e4 df24 BCM57508 NetXtreme-E NGM2100D 2x100G KR Mezz RDMA Virtual Function + 2711 BCM2711 PCIe Bridge 3352 BCM3352 3360 BCM3360 4210 BCM4210 iLine10 HomePNA 2.0 @@ -19134,6 +19971,8 @@ 43a1 BCM4360 802.11ac Wireless Network Adapter 43a2 BCM4360 802.11ac Wireless Network Adapter 43a3 BCM4350 802.11ac Wireless Network Adapter +# Manufactured by Foxconn for Lenovo + 17aa 075a 00JT494 43a9 BCM43217 802.11b/g/n 43aa BCM43131 802.11b/g/n 43ae BCM43162 802.11ac Wireless Network Adapter @@ -19158,6 +19997,11 @@ 4410 BCM4413 iLine32 HomePNA 2.0 4411 BCM4413 V.90 56k modem 4412 BCM4412 10/100BaseT + 4415 BCM4359 802.11ac Dual-Band Wireless Network Controller + 441f BCM4361 802.11ac Dual-Band Wireless Network Controller + 4420 BCM4361 802.11ac 2.4 GHz Wireless Network Controller + 4421 BCM4361 802.11ac 5 GHz Wireless Network Controller + 4425 BRCM4378 Wireless Network Adapter 4430 BCM44xx CardBus iLine32 HomePNA 2.0 4432 BCM4432 CardBus 10/100BaseT 4464 BCM4364 802.11ac Wireless Network Adapter @@ -19215,6 +20059,7 @@ 9027 CN99xx [ThunderX2] Integrated AHCI/SATA 3 Host Controller a8d8 BCM43224/5 Wireless Network Adapter aa52 BCM43602 802.11ac Wireless LAN SoC + b080 BCM56080 Firelight2 Switch ASIC b302 BCM56302 StrataXGS 24x1GE 2x10GE Switch Controller b334 BCM56334 StrataXGS 24x1GE 4x10GE Switch Controller b370 BCM56370 Switch ASIC @@ -19236,6 +20081,13 @@ b960 Broadcom BCM56960 Switch ASIC # Tomahawk4 b990 BCM56990 Switch ASIC +# Tomahawk4G + b996 BCM56996 Tomahawk4G 106G Switch ASIC +# Tomahawk4GT + b998 BCM56998 Tomahawk4GT 106G Switch ASIC +# Tomahawk4D + b999 BCM56999 Tomahawk4D 106G Switch ASIC + c909 BCM78909 Switch ASIC d802 BCM58802 Stingray 50Gb Ethernet SoC 14e4 8021 Stingray Dual-Port 25Gb Ethernet PCIe SmartNIC w16GB DRAM (Part No BCM958802A8046C) 14e4 8023 PS410T-H04 NetXtreme-S 4x10G 10GBaseT PCIe SmartNIC @@ -19412,6 +20264,7 @@ 2f30 SoftV92 SpeakerPhone SoftRing Modem with SmartSP 14f1 2014 Devolo MikroLink 56K Modem PCI 2f50 Conexant SoftK56 Data/Fax Modem + 510f Conexant CX 20751/20752 5b7a CX23418 Single-Chip MPEG-2 Encoder with Integrated Analog Video/Broadcast Audio Decoder 0070 7444 WinTV HVR-1600 107d 6f34 WinFast DVR3100 H @@ -19425,6 +20278,7 @@ 0070 6902 WinTV HVR-4000-HD 0070 7801 WinTV HVR-1800 MCE 0070 9001 Nova-T DVB-T + 0070 9002 Nova-T DVB-T Model 909 0070 9200 Nova-SE2 DVB-S 0070 9202 Nova-S-Plus DVB-S 0070 9402 WinTV-HVR1100 DVB-T/Hybrid @@ -19677,7 +20531,8 @@ 1526 ISS, Inc 1527 SOLECTRON 1528 ACKSYS -1529 AMERICAN MICROSystems Inc +# nee American Microsystems Inc +1529 ON Semiconductor 152a QUICKTURN DESIGN Systems 152b FLYTECH Technology CO Ltd 152c MACRAIGOR Systems LLC @@ -19714,6 +20569,7 @@ 9260 RCIM-II Real-Time Clock & Interrupt Module 9271 RCIM-III Real-Time Clock & Interrupt Module (PCIe) 9272 Pulse Width Modulator Card + 9273 RCIM-IV Real-Time Clock & Interrupt Module (PCIe) 9277 5 Volt Delta Sigma Converter Card 9278 10 Volt Delta Sigma Converter Card 9287 Analog Output Card @@ -19746,7 +20602,12 @@ 1100 PCI Express Core Reference Design 110f PCI Express Core Reference Design Virtual Function 1110 XpressRich Reference Design + 1111 XpressRich-AXI Ref Design + 1112 QuickPCIe 1113 XpressSwitch + 1114 Inspector + 1115 XpressLINK Ref Design + 1116 XpressLINK-SOC Ref Design be00 PCI Express Bridge 1557 MEDIASTAR Co Ltd 1558 CLEVO/KAPOK Computer @@ -19886,6 +20747,7 @@ 07b0 VMXNET3 Ethernet Controller 07c0 PVSCSI SCSI Controller 07e0 SATA AHCI controller + 07f0 NVMe SSD Controller 0801 Virtual Machine Interface 15ad 0800 Hypervisor ROM Interface 0820 Paravirtual RDMA controller @@ -19917,18 +20779,30 @@ 021b MT43162 Family [BlueField-3 Lx Secure Flash Recovery] 021c MT43244 Family [BlueField-3 SoC Flash Recovery] 021d MT43244 Family [BlueField-3 Secure Flash Recovery] + 021e CX8 Family [ConnectX-8 Flash Recovery] + 021f CX8 Family [ConnectX-8 Secure Flash Recovery] + 0220 BF4 Family Flash Recovery [BlueField-4 SoC Flash Recovery] + 0221 BF4 Family Secure Flash Recovery [BlueField-4 Secure Flash Recovery] 024e MT53100 [Spectrum-2, Flash recovery mode] 024f MT53100 [Spectrum-2, Secure Flash recovery mode] 0250 Spectrum-3, Flash recovery mode 0251 Spectrum-3, Secure Flash recovery mode 0252 Amos chiplet + 0253 Amos GearBox Manager 0254 Spectrum-4, Flash recovery mode - 0255 Spectrum-4, Secure Flash recovery mode - 0256 Ofek chiplet + 0255 Spectrum-4 RMA + 0256 Abir GearBox 0257 Quantum-2 in Flash Recovery Mode + 0258 Quantum-2 RMA + 0259 Abir Chiplet 0262 MT27710 [ConnectX-4 Lx Programmable] EN 0263 MT27710 [ConnectX-4 Lx Programmable Virtual Function] EN 0264 Innova-2 Flex Burn image + 0270 Spectrum-4L, Flash recovery mode + 0271 Spectrum-4L, RMA + 0274 Spectrum-4C, Flash recovery mode + 0275 Spectrum-4C RMA + 0277 Spectrum-4TOR RMA 0281 NPS-600 Flash Recovery 1002 MT25400 Family [ConnectX-2 Virtual Function] 1003 MT27500 Family [ConnectX-3] @@ -19999,14 +20873,24 @@ 15b3 0021 MCX4421A-ACQN ConnectX-4 Lx EN OCP,2x25G 15b3 0025 ConnectX-4 Lx 25 GbE Dual Port SFP28 rNDC 193d 100a 620F-B +# NIC-ETH540F-LP-2P SFP+ Ethernet Card + 193d 1023 NIC-ETH540F-LP-2P + 193d 1031 NIC-ETH640i-Mb-2x25G +# NIC-ETH640F-3S-2P OCP3.0 Card + 193d 1083 NIC-ETH640F-3S-2P +# NIC-ETH540F-3S-2P OCP3.0 2x10G Card + 193d 1084 NIC-ETH540F-3S-2P 1016 MT27710 Family [ConnectX-4 Lx Virtual Function] 1017 MT27800 Family [ConnectX-5] 15b3 0006 ConnectX®-5 EN network interface card, 100GbE single-port QSFP28, PCIe3.0 x16, tall bracket; MCX515A-CCAT + 15b3 0007 Mellanox ConnectX®-5 MCX516A-CCAT 15b3 0020 ConnectX®-5 EN network interface card, 10/25GbE dual-port SFP28, PCIe3.0 x8, tall bracket ; MCX512A-ACAT 15b3 0068 ConnectX®-5 EN network interface card for OCP2.0, Type 1, with host management, 25GbE dual-port SFP28, PCIe3.0 x8, no bracket Halogen free ; MCX542B-ACAN + 193d 1051 NIC-IB1040i-Mb-2P 1018 MT27800 Family [ConnectX-5 Virtual Function] 1019 MT28800 Family [ConnectX-5 Ex] 15b3 0008 ConnectX-5 Ex EN network interface card, 100GbE dual-port QSFP28, PCIe4.0 x16, tall bracket; MCX516A-CDAT + 15b3 0125 Tencent ConnectX-5 EN Ex network interface card for OCP 3.0, with host management, 50GbE Dual-port QSFP28, PCIe4.0 x16, Thumbscrew (pull-tab) bracket 101a MT28800 Family [ConnectX-5 Ex Virtual Function] 101b MT28908 Family [ConnectX-6] 101c MT28908 Family [ConnectX-6 Virtual Function] @@ -20015,6 +20899,7 @@ 101f MT2894 Family [ConnectX-6 Lx] 1020 MT28860 1021 MT2910 Family [ConnectX-7] + 1023 CX8 Family [ConnectX-8] 1974 MT28800 Family [ConnectX-5 PCIe Bridge] 1975 MT416842 Family [BlueField SoC PCIe Bridge] 1976 MT28908 Family [ConnectX-6 PCIe Bridge] @@ -20023,6 +20908,12 @@ 1979 MT2910 Family [ConnectX-7 PCIe Bridge] 197a MT43162 Family [BlueField-3 Lx SoC PCIe Bridge] 197b MT43244 Family [BlueField-3 SoC PCIe Bridge] + 197c ConnectX/BlueField Family mlx5Gen PCIe Bridge [PCIe Bridge] + 2020 MT2892 Family [ConnectX-6 Dx Emulated PCIe Bridge] + 2021 MT42822 Family [BlueField-2 SoC Emulated PCIe Bridge] + 2023 MT2910 Family [ConnectX-7 Emulated PCIe Bridge] + 2024 MT43244 Family [BlueField-3 SoC Emulated PCIe Bridge] + 2025 ConnectX/BlueField Family mlx5Gen Emulated PCIe Bridge [Emulated PCIe Bridge] 4117 MT27712A0-FDCF-AE 1bd4 0039 SN10XMP2P25 1bd4 003a 25G SFP28 SP EO251FM9 Adapter @@ -20083,10 +20974,14 @@ a2da MT43244 BlueField-3 SoC Crypto enabled a2db MT43244 BlueField-3 SoC Crypto disabled a2dc MT43244 BlueField-3 integrated ConnectX-7 network controller + a2dd BF4 Family Crypto enabled [BlueField-4 SoC Crypto enabled] + a2de BF4 Family Crypto disabled [BlueField-4 SoC Crypto disabled] + a2df BF4 Family integrated network controller [BlueField-4 integrated network controller] c2d2 MT416842 BlueField SoC management interfac c2d3 MT42822 BlueField-2 SoC Management Interface c2d4 MT43162 BlueField-3 Lx SoC Management Interface c2d5 MT43244 BlueField-3 SoC Management Interface + c2d6 BF4 Family Management Interface [BlueField-4 SoC Management Interface] # SwitchX-2, 40GbE switch c738 MT51136 c739 MT51136 GW @@ -20099,6 +20994,8 @@ cf6c MT53100 [Spectrum-2] cf70 Spectrum-3 cf80 Spectrum-4 + cf82 Spectrum-4L + cf84 Spectrum-4C d2f0 Quantum HDR (200Gbps) switch d2f2 Quantum-2 NDR (400Gbps) switch 15b4 CCI/TRIAD @@ -20123,8 +21020,18 @@ 15b7 Sandisk Corp 2001 Skyhawk Series NVME SSD 5001 WD Black NVMe SSD - 5002 WD Black 2018/PC SN720 NVMe SSD - 5003 WD Black 2018/PC SN520 NVMe SSD + 5002 WD Black 2018/SN750 / PC SN720 NVMe SSD + 5003 WD Blue SN500 / PC SN520 NVMe SSD + 5004 PC SN520 NVMe SSD + 5005 PC SN520 NVMe SSD + 5006 WD Black SN750 / PC SN730 NVMe SSD + 5009 WD Blue SN550 NVMe SSD + 15b7 5009 WD Blue SN550 NVMe SSD + 500b PC SN530 NVMe SSD + 1414 500b Xbox Series X + 500d WD Ultrastar DC SN340 NVMe SSD + 5011 WD PC SN810 / Black SN850 NVMe SSD + 501a WD Blue SN570 NVMe SSD 15b8 ADDI-DATA GmbH 1001 APCI1516 SP controller (16 digi outputs) 1003 APCI1032 SP controller (32 digi inputs w/ opto coupler) @@ -20170,8 +21077,9 @@ 15cc Hotrail Inc 15cd Dreamtech Co Ltd 15ce Genrad Inc -15cf Hilscher GmbH - 0000 CIFX 50E-DP(M/S) +# https://www.hilscher.com/imprint/ +15cf Hilscher Gesellschaft für Systemautomation mbH + 0000 CIFX PCI/PCIe 15d1 Infineon Technologies AG 15d2 FIC (First International Computer Inc) 15d3 NDS Technologies Israel Ltd @@ -20404,7 +21312,7 @@ 0002 SiByte BCM1125H/1250 System-on-a-Chip HyperTransport 0012 SiByte BCM1280/BCM1480 System-on-a-Chip PCI-X 0014 Sibyte BCM1280/BCM1480 System-on-a-Chip HyperTransport -1677 Bernecker + Rainer +1677 B&R Industrial Automation GmbH 104e 5LS172.6 B&R Dual CAN Interface Card 12d7 5LS172.61 B&R Dual CAN Interface Card 20ad 5ACPCI.MFIO-K01 Profibus DP / K-Feldbus / COM @@ -20422,9 +21330,17 @@ 167e ONNTO Corp. 1681 Hercules 1682 XFX Pine Group Inc. + 5701 Radeon 5700 XT Thicc III Ultra c580 Radeon RX 580 1688 CastleNet Technology Inc. 1170 WLAN 802.11b card +168a Utimaco IS GmbH + 2086 CryptoServer Se-Series Hardware Security Module + c040 CryptoServer CSe-Series Hardware Security Module + c051 CryptoServer Se-Series Gen2 Hardware Security Module + c070 u.trust Anchor Hardware Security Module cs7.2 Series + c071 u.trust Anchor Hardware Security Module cs7.3 Series + c072 u.trust Anchor Hardware Security Module cs7.3 Series Virtual Function # nee Atheros Communications, Inc. 168c Qualcomm Atheros 0007 AR5210 Wireless Network Adapter [AR5000 802.11a] @@ -20658,10 +21574,13 @@ 003e QCA6174 802.11ac Wireless Network Adapter 1a56 143a Killer 1435 Wireless-AC 1a56 1525 Killer N1525 Wireless-AC + 1a56 1535 Killer Wireless-n/a/ac 1535 Wireless Network Adapter 0040 QCA9980/9990 802.11ac Wireless Network Adapter 0041 QCA6164 802.11ac Wireless Network Adapter 0042 QCA9377 802.11ac Wireless Network Adapter 11ad 08a6 Qualcomm Atheros QCA9377 802.11ac Wireless Network Adapter +# compatible with Lenovo's BIOS lock + 17aa 0901 Qualcomm Atheros QCA9377 Wireless Network Adapter 0046 QCA9984 802.11ac Wave 2 Wireless Network Adapter 0050 QCA9887 802.11ac Wireless Network Adapter 0207 AR5210 Wireless Network Adapter [AR5000 802.11a] @@ -20808,6 +21727,7 @@ 7029 AP342 14-bit, 12-Channel Isolated Simultaneous Conversion Analog Input Module 702a AP226 12-Bit, 8-Channel Isolated Analog Output Module 702b AP236 16-Bit, 8-Channel Isolated Analog Output Module + 702c AP560A Module 4 Independent isolated CAN bus channels 7031 AP441-1: 32-Channel Isolated Digital Input Module 7032 AP441-2: 32-Channel Isolated Digital Input Module 7033 AP441-3: 32-Channel Isolated Digital Input Module @@ -20818,6 +21738,7 @@ 7052 APA7-502 Reconfigurable Artix-7 52,160 Cell FPGA module 24 RS485 channels 7053 APA7-503 Reconfigurable Artix-7 52,160 Cell FPGA module 24 TTL & 12 RS485 channels 7054 APA7-504 Reconfigurable Artix-7 52,160 Cell FPGA module 24 LVDS channels + 7073 AP730 Multi-function I/O Module 16 Digital I/O 8 Differential Analog In 4 Analog Out 16da Advantech Co., Ltd. 0011 INES GPIB-PCI 16df PIKA Technologies Inc. @@ -20868,6 +21789,7 @@ ab08 21x4x DEC-Tulip compatible 10/100 Ethernet ab09 21x4x DEC-Tulip compatible 10/100 Ethernet 173b Altima (nee Broadcom) + 0001 AC1002 PCI Gigabit Ethernet controller 03e8 AC1000 Gigabit Ethernet 03e9 AC1001 Gigabit Ethernet 03ea AC9100 Gigabit Ethernet @@ -20893,6 +21815,16 @@ 0142 PCA7208AS - Analog inputs/Outputs 0143 PCA7408AL - Analog Inputs/Outputs 0144 PCA7408AS - Analog Inputs/Outputs + 0145 PCA-7228AL Multifunction PCI IO card + 0146 PCA-7228AS Multifunction PCI IO card + 0147 PCA7428AL Multifunction PCI IO card + 0148 PCA7428AS Multifunction PCI IO card + 0149 PCA7228EL Multifunction PCI IO card with isolated analog inputs + 0150 PCA7428EL Multifunction PCI IO card with isolated analog inputs + 0151 PCA7628AL - PCI card with analog inputs, counters and DIO + 0152 PCA7628AS PCI card with analog inputs, outputs, counters and DIO + 0161 PCA7288A PCI card with analog outputs, counters and DIO + 0180 PCI1052 Communication card for MicroUnit network 0214 PCT-7424C (F0) PC card with standard counters 0215 PCT-7424C (F1) PC card with standard counters 0216 PCT-7424E (F0) PC card with standard counters @@ -20905,6 +21837,10 @@ 0245 PCA7428CE_F1 - Analog Inputs isolated 0303 PCD-7006C Digital Input & Output PCI Card 0800 PCD8006 - PCIe digital Inputs/Outputs + 0840 PCA-8428 General-purpose multifunctional PCIe card with 8 analog inputs and 2 analog outputs + 0841 PCA-8429 General-purpose multifunctional PCIe card with 8 analog inputs + 0842 PCA-8438 General-purpose multifunctional PCIe card with 16 analog inputs and 2 analog outputs + 0843 PCA-8439 General-purpose multifunctional PCIe card with 16 analog inputs ff00 CTU CAN FD PCIe Card 1761 Pickering Interfaces Ltd 1771 InnoVISION Multimedia Ltd. @@ -20915,7 +21851,9 @@ 0004 Octeon (and older) FIPS 0005 Octeon CN38XX Network Processor Pass 3.x 0006 RoHS - 0010 Nitrox XL NPX + 0010 CN15XX/CN16XX [Nitrox PX] + 0011 CNN35XX [Nitrox III] + 0012 CNN55XX [Nitrox V] 0020 Octeon CN31XX Network Processor 0030 Octeon CN30XX Network Processor 0040 Octeon CN58XX Network Processor @@ -21003,6 +21941,32 @@ a036 ThunderX RAD (RAID acceleration engine) virtual function a037 THUNDERX ZIP virtual function a040 THUNDERX CPT Cryptographic Accelerator +# MAC found on OcteonTx2 series of silicons + a059 Octeon TX2 CGX (MAC) +# MAC found on Octeon 10 series of silicons + a060 Octeon 10 RPM (MAC) +# Octeon Tx2 Loopback Interface block + a061 Octeon Tx2 Loopback Interface (LBK) +# Octeon Tx2 Resource Virtualization Unit Physical Function + a063 Octeon Tx2 RVU Physical Function +# Octeon Tx2 Resource Virtualization Unit Virtual Function + a064 Octeon Tx2 RVU Virtual Function +# Octeon Tx2 Resource Virtualization Unit Admin Function + a065 Octeon Tx2 RVU Admin Function +# PTP Timestamping unit on Octeon 10 silicon series + a09e Octeon 10 PTP controller +# Cryptographic Accelerator found on Octeon 10 series of silicons + a0f2 Octeon 10 CPT Cryptographic Accelerator, Physical function + a0f3 Octeon 10 CPT Cryptographic Accelerator, Virtual function +# Octeon Tx2 System DPI Interface (SDP) Physical Function + a0f6 Octeon Tx2 SDP Physical Function +# Octeon Tx2 System DPI Interface (SDP) Virtual Function + a0f7 Octeon Tx2 SDP Virtual Function + a0f8 Octeon Tx2 Loopback Interface Virtual Function (LBKVF) +# Cryptographic Accelerator found on OcteonTx2 series of silicons + a0fd Octeon Tx2 CPT Cryptographic Accelerator, Physical function +# Cryptographic Accelerator found on OcteonTx2 series of silicons + a0fe Octeon Tx2 CPT Cryptographic Accelerator, Virtual function a100 THUNDERX CN88XX 48 core SoC a200 OCTEON TX CN81XX/CN80XX a300 OCTEON TX CN83XX @@ -21082,7 +22046,10 @@ 8083 GL880 USB 1.1 UHCI controller 8084 GL880 USB 2.0 EHCI controller 9750 GL9750 SD Host Controller + 9755 GL9755 SD Host Controller + e763 GL9763E eMMC Controller 17aa Lenovo + 3181 ThinkCentre M75n IoT 402b Intel 82599ES 10Gb 2-port Server Adapter X520-2 17ab Phillips Components 17af Hightech Information System Ltd. @@ -21104,8 +22071,18 @@ 0002 AGN300 802.11 a/b/g True MIMO Wireless Card 1385 6d00 WPNT511 RangeMax 240 Mbps Wireless CardBus Adapter 1737 0054 WPC54GX4 v1 802.11g Wireless-G Notebook Adapter with SRX400 + 0105 MSM8998 PCIe Root Complex + 0108 SM8150 PCIe Root Complex + 0109 SA8195P PCIe Root Complex + 0300 MDM9x35 LTE Modem [Snapdragon X7] + 0301 MDM9x45 LTE Modem [Snapdragon X12] + 0302 MDM9x55 LTE Modem [Snapdragon X16] 0400 Datacenter Technologies QDF2432 PCI Express Root Port 0401 Datacenter Technologies QDF2400 PCI Express Root Port + 1000 QCS405 PCIe Root Complex + 1101 QCA6390 Wireless Network Adapter + 1103 QCNFA765 Wireless Network Adapter + 1104 QCN6024/9024/9074 Wireless Network Adapter 17cc NetChip Technology, Inc 2280 USB 2.0 17cd Cadence Design Systems, Inc. @@ -21265,6 +22242,8 @@ 6013 R6013 ISA Bridge 6020 R6020 North Bridge 6021 R6021 Host Bridge +# Integrated in the Vortex86DX2 SoC + 6022 R6022 Host Bridge # Found in the Vortex86DX3 SoC 6023 R6023 Host Bridge # Found in the Vortex86EX SoC @@ -21555,6 +22534,7 @@ 18ec 4200 Flexible FlowMon (szedata2) 1x10G 18ec ff00 Testing design 18ec ff01 Boot design + c400 COMBO-400G1 18ee Chenming Mold Ind. Corp. 18f1 Spectrum GmbH 18f4 Napatech A/S @@ -21586,6 +22566,8 @@ 0185 NT40A01 Network Adapter 01a5 NT200A01 Network Adapter 01c5 NT200A02 Network Adapter + 01d5 NT50B01 Network Adapter + 01e5 NT100A01 Network Adapter 18f6 NextIO 1000 [Nexsis] Switch Virtual P2P PCIe Bridge 1001 [Texsis] Switch Virtual P2P PCIe Bridge @@ -21863,7 +22845,7 @@ 0087 MPC8343 00b4 MPC8315E 00b6 MPC8314E - 1a56 1101 Killer Xeno Pro Gigabit Ethernet Controller + 1a56 1101 Bigfoot Killer Xeno Pro Gigabit Ethernet Controller 00c2 MPC8379E 00c3 MPC8379 00c4 MPC8378E @@ -21902,7 +22884,7 @@ 7011 MPC8641D PCI Host Bridge 7018 MPC8610 c006 MPC8308 - 1a56 1201 Killer E2100 Gigabit Ethernet Controller + 1a56 1201 Bigfoot Killer E2100 Gigabit Ethernet Controller # PCIe interface for emulator fc02 RedStone # CFI device over PCIe @@ -21926,6 +22908,11 @@ 1966 Orad Hi-Tec Systems 1975 DVG64 family 1977 DVG128 family + 1979 3DVG/UHD3 + 1980 HDV2/UHD2 + 1234 3160 UHD2LC + 1234 3300 Legacy UHD2 + 1234 3410 UHD2 # nee Atheros Communications, Inc. nee Attansic Technology Corp. 1969 Qualcomm Atheros 1026 AR8121/AR8113/AR8114 Gigabit or Fast Ethernet @@ -21967,12 +22954,19 @@ 1974 Star Electronics GmbH & Co. KG 0009 FlexCard PMC-II 0011 FlexCard PMC-II Ethernet + 0018 FlexCard PXIe3 + 0019 FlexCard PCIe3 +# IO card for std ethernet and automotive ethernet (ieee 1000Base-T1) + 001a FlexCard PXIe Ethernet +# IO card for std ethernet and automotive ethernet (ieee 1000Base-T1) + 001b FlexCard PCIe Ethernet 1976 TRENDnet 1977 Parsec 197b JMicron Technology Corp. 0250 JMC250 PCI Express Gigabit Ethernet Controller 0260 JMC260 PCI Express Fast Ethernet Controller 0368 JMB368 IDE controller + 0585 JMB58x AHCI SATA controller 2360 JMB360 AHCI Controller 2361 JMB361 AHCI/IDE 1462 7235 P965 Neo MS-7235 mainboard @@ -22008,6 +23002,7 @@ 5012 E12 NVMe Controller 5013 PS5013 E13 NVMe Controller 5016 E16 PCIe4 NVMe Controller + 5018 E18 PCIe4 NVMe Controller 1989 Montilio Inc. 0001 RapidFile Bridge 8001 RapidFile @@ -22117,13 +23112,25 @@ 19e5 d303 Hi1822 SP522 (2*8G FC) 19e5 d306 Hi1822 SP523 (2*8G FC) 1710 iBMA Virtual Network Adapter - 1711 Hi1710 [iBMC Intelligent Management system chip w/VGA support] + 1711 Hi171x Series [iBMC Intelligent Management system chip w/VGA support] 1822 Hi1822 Family (4*25GE) 19e5 d129 Hi1822 SP570 (4*25GE) 19e5 d136 Hi1822 SP580 (4*25GE) 19e5 d141 Hi1822 SP583 (4*25GE) 19e5 d146 Hi1822 SP585 (4*25GE) + 3714 ES3000 V5 NVMe PCIe SSD + 19e5 5312 NVMe SSD ES3500P V5 2000GB 2.5" U.2 371e Hi1822 Family Virtual Bridge + 3754 ES3000 V6 NVMe PCIe SSD + 19e5 6122 NVMe SSD ES3600P V6 1600GB 2.5" U.2 + 19e5 6123 NVMe SSD ES3600P V6 3200GB 2.5" U.2 + 19e5 6124 NVMe SSD ES3600P V6 6400GB 2.5" U.2 + 19e5 6141 NVMe SSD ES3800P V6 800GB 2.5" U.2 + 19e5 6142 NVMe SSD ES3800P V6 1600GB 2.5" U.2 + 19e5 6212 NVMe SSD ES3500P V6 1920GB 2.5" U.2 + 19e5 6213 NVMe SSD ES3500P V6 3840GB 2.5" U.2 + 19e5 6214 NVMe SSD ES3500P V6 7680GB 2.5" U.2 + 19e5 6215 NVMe SSD ES3500P V6 15360GB 2.5" U.2 375e Hi1822 Family Virtual Function 379e Hi1822 Family Virtual Function a120 HiSilicon PCIe Root Port with Gen4 @@ -22173,6 +23180,7 @@ 1150 AST1150 PCI-to-PCI Bridge 2000 ASPEED Graphics Family 15d9 0832 X10SRL-F + 15d9 1b95 H12SSL-i 1a05 deltaww 1a07 Kvaser AB 0006 CAN interface PC104+ HS/HS @@ -22181,6 +23189,7 @@ 0009 CAN interface PCI104 HS/HS 1a08 Sierra semiconductor 0000 SC15064 +1a0d SEAKR Engineering 1a0e DekTec Digital Video B.V. 083f DTA-2111 VHF/UHF Modulator 1a17 Force10 Networks, Inc. @@ -22191,6 +23200,7 @@ 1a22 Ambric Inc. 1a29 Fortinet, Inc. 4338 CP8 Content Processor ASIC + 43a0 CP9 Content Processor ASIC 4e36 NP6 Network Processor 4e37 NP7 Network Processor 1a2b Ascom AG @@ -22217,13 +23227,17 @@ 1a4a SLAC National Accelerator Lab TID-AIR 1000 MCOR Power Supply Controller 1010 AMC EVR - Stockholm Timing Board - 1020 Cluster On Board (COB) Ethernet Switch + 1020 PGPCard - Gen3 Cameralink Interface + 1030 PGPCard - Gen3 GIGe Interface 2000 PGPCard - 4 Lane 2001 PGPCard - 8 Lane Plus EVR 2010 PCI-Express EVR -# PC-260-101-03 - 2020 PGP-GEN3 PCIe + 2011 PCI-Express EVR - TPR Version + 2020 PGP-GEN3 PCIe - 8 Lane Plus EVR 2030 AXI Stream DAQ PCIe card + 2040 EXO PCIe TEM + 3000 COB DTM V1 + 3001 COB DTM V2 1a51 Hectronic AB 1a55 Rohde & Schwarz DVS GmbH 0010 SDStationOEM @@ -22242,7 +23256,8 @@ 0065 Atomix HDMI STAN 0070 RED Rocket 0090 CinePlay -1a56 Bigfoot Networks, Inc. +# nee Bigfoot Networks, now owned by Intel +1a56 Rivet Networks 1a57 Highly Reliable Systems 1a58 Razer USA Ltd. 1a5d Celoxica @@ -22276,6 +23291,11 @@ 1aa8 Ciprico, Inc. 0009 RAIDCore Controller 000a RAIDCore Controller +1aa9 Schweitzer Engineering Laboratories + 000d SEL-3390S8 Serial Adapter + 000e SEL-3390E4 Ethernet Adapter + 0014 SEL-3390T Time and Ethernet Adapter + 0018 SEL-3390E4 Ethernet Adapter 1aae Global Velocity, Inc. 1ab4 Distributed Management Task Force, Inc. (DMTF) 1ab6 CalDigit, Inc. @@ -22300,14 +23320,72 @@ 4254 0552 S952 v3 1ae0 Google, Inc. 0042 Compute Engine Virtual Ethernet [gVNIC] + abcd Airbrush Combined Paintbox IPU/Oscar Edge TPU [Pixel Neural Core] 1ae3 SANBlaze Technology, Inc. 1ae7 First Wise Media GmbH 0520 HFC-S PCI A [X-TENSIONS XC-520] -1ae8 Silicon Software GmbH - 0a40 microEnable IV-BASE x1 - 0a41 microEnable IV-FULL x1 - 0a44 microEnable IV-FULL x4 - 0e44 microEnable IV-GigE x4 +# nee Silicon Software GmbH +1ae8 Basler AG +# CameraLink frame grabber for Visual Applets + 0751 mE5 marathon VCL +# CameraLink HS frame grabber + 0752 mE5 marathon AF2 +# CoaXpress frame grabber + 0753 mE5 marathon ACX QP +# CameraLink frame grabber + 0754 mE5 marathon ACL +# CoaXpress frame grabber + 0755 mE5 marathon ACX SP +# CoaXpress frame grabber + 0756 mE5 marathon ACX DP +# CoaXpress frame grabber for Visual Applets + 0757 mE5 marathon VCX QP +# CameraLink HS frame grabber for Visual Applets + 0758 mE5 marathon VF2 +# CameraLink frame grabber for Visual Applets / AI applications + 0759 mE5 marathon VCLx +# CameraLink frame grabber + 0a40 microEnable IV AD1-CL +# CameraLink frame grabber for Visual Applets + 0a41 microEnable IV VD1-CL +# CameraLink frame grabber + 0a42 microEnable IV AD4-CL +# CameraLink frame grabber for Visual Applets + 0a44 microEnable IV VD4-CL +# CameraLink frame grabber + 0a45 microEnable IV AS1-CL +# CoaXpress frame grabber + 0a53 microEnable 5 AQ8-CXP6B +# CoaXpress frame grabber for Visual Applets + 0a54 microEnable 5 VQ8-CXP6B +# CoaXpress frame grabber for Visual Applets + 0a56 microEnable 5 VQ8-CXP6D +# CoaXpress frame grabber + 0a57 microEnable 5 AQ8-CXP6D +# CameraLink frame grabber for Visual Applets + 0a58 microEnable 5 VD8-CL +# CameraLink frame grabber + 0a5a microEnable 5 AD8-CL +# CoaXpress frame grabber + 0a64 imaWorx CXP-12 Quad +# OEM product + 0b52 mE5 Abacus 4G Base +# OEM product + 0b53 mE5 Abacus 4G Base II +# OEM product + 0b61 mE6 Abacus 4TG +# CoaXpress frame grabber + 0b63 CXP-12 Interface Card 1C +# CoaXpress frame grabber + 0b64 CXP-12 Interface Card 4C +# CoaXpress frame grabber + 0b65 CXP-12 Interface Card 2C +# CoaXpress Thunderbolt frame grabber + 0b66 CXP-12 LightBridge 2C +# GigE Vision frame grabber + 0e42 microEnable IV AQ4-GE +# GigE Vision frame grabber for Visual Applets + 0e44 microEnable IV VQ4-GE 1ae9 Wilocity Ltd. 0101 Wil6200 PCI Express Upstream Port 0200 Wil6200 PCI Express Port @@ -22366,6 +23444,9 @@ 1050 Virtio GPU # virtio 1.0 1052 Virtio input +# virtio 1.0 + 1053 Virtio socket + 105a Virtio file system 1110 Inter-VM shared memory 1af4 1100 QEMU Virtual Machine 1af5 Netezza Corp. @@ -22378,21 +23459,32 @@ 1b13 Jaton Corp 1b1a K&F Computing Research Co. 0e70 GRAPE +1b1c Corsair 1b21 ASMedia Technology Inc. 0611 ASM1061 SATA IDE Controller 0612 ASM1062 Serial ATA Controller 1849 0612 Motherboard + 1040 ASM1040 XHCI Controller 1042 ASM1042 SuperSpeed USB Host Controller + 1043 1059 K53SM motherboard 1043 8488 P8B WS Motherboard 1849 1042 Motherboard 1080 ASM1083/1085 PCIe to PCI Bridge 1849 1080 Motherboard 1142 ASM1042A USB 3.0 Host Controller - 1184 ASM1184e PCIe Switch Port - 1849 1184 ASM1184e PCIe Switch + 1166 ASM1166 Serial ATA Controller + 1182 ASM1182e 2-Port PCIe x1 Gen2 Packet Switch + 1b21 118f ASM1182e 2-Port PCIe x1 Gen2 Packet Switch + 1184 ASM1184e 4-Port PCIe x1 Gen2 Packet Switch + 1849 1184 ASM1184e 4-Port PCIe x1 Gen2 Packet Switch + 1187 ASM1187e 7-Port PCIe x1 Gen2 Packet Switch 1242 ASM1142 USB 3.1 Host Controller 1343 ASM1143 USB 3.1 Host Controller + 1812 ASM1812 6-Port PCIe x4 Gen2 Packet Switch 2142 ASM2142 USB 3.1 Host Controller + 1462 7a72 H270 PC MATE + 2824 ASM2824 PCIe Gen3 Packet Switch + 3242 ASM3242 USB 3.2 Host Controller 1b26 Netcope Technologies, a.s. c132 COMBO-LXT155 c1c0 NFB-100G1-e0 @@ -22423,6 +23515,7 @@ 000b QEMU PCIe Expander bridge 000c QEMU PCIe Root port 000d QEMU XHCI Host Controller + 0010 QEMU NVM Express Controller 0100 QXL paravirtual graphic card 1af4 1100 QEMU Virtual Machine 1b37 Signal Processing Devices Sweden AB @@ -22457,7 +23550,16 @@ 0601 NumaChip N601 0602 NumaChip N602 1b4b Marvell Technology Group Ltd. +# device 1b4b:0100 reports incorrect vendor id due to hw erratum (correct is 11ab) + 0100 88F3700 [Armada 3700 Family] ARM SoC 0640 88SE9128 SATA III 6Gb/s RAID Controller + 2241 88NR2241 Non-Volatile memory controller + 1028 2112 BOSS-N1 Monolithic + 1028 2113 BOSS-N1 Modular + 1028 2151 BOSS-N1 Modular ET + 1028 2196 ROR-N100 + 1d49 0306 ThinkSystem M.2 NVMe 2-Bay RAID Enablement Kit + 1d49 0307 ThinkSystem 7mm NVMe 2-Bay Rear RAID Enablement Kit 9120 88SE9120 SATA 6Gb/s Controller 9123 88SE9123 PCIe SATA 6.0 Gb/s controller dc93 600e DC-6xxe series SATA 6G controller @@ -22465,24 +23567,35 @@ 9128 88SE9128 PCIe SATA 6 Gb/s RAID controller 9130 88SE9128 PCIe SATA 6 Gb/s RAID controller with HyperDuo 1043 8438 P8P67 Deluxe Motherboard + 9170 88SE9170 PCIe 2.0 x1 2-port SATA 6 Gb/s Controller 9172 88SE9172 SATA 6Gb/s Controller 9178 88SE9170 PCIe SATA 6Gb/s Controller 917a 88SE9172 SATA III 6Gb/s RAID Controller + 9182 88SE9182 PCIe 2.0 x2 2-port SATA 6 Gb/s Controller 9183 88SS9183 PCIe SSD Controller 9192 88SE9172 SATA III 6Gb/s RAID Controller 91a0 88SE912x SATA 6Gb/s Controller [IDE mode] 91a4 88SE912x IDE Controller + 9215 88SE9215 PCIe 2.0 x1 4-port SATA 6 Gb/s Controller 9220 88SE9220 PCIe 2.0 x2 2-port SATA 6 Gb/s RAID Controller - 9230 88SE9230 PCIe SATA 6Gb/s Controller + 9230 88SE9230 PCIe 2.0 x2 4-port SATA 6 Gb/s RAID Controller 1028 1fd6 BOSS-S1 Adapter 1028 1fdf BOSS-S1 Modular 1028 1fe2 BOSS-S1 Adapter 1028 2010 BOSS-S2 Adapter +# RS0200L6R2iM2 + 1bd4 0073 RS0200L6R2iM2 1d49 0300 ThinkSystem M.2 with Mirroring Enablement Kit + 1d49 0301 ThinkSystem SR630 x16 PCIE with 4 SATA ports Riser + 1d49 0302 ThinkSystem SE350 M.2 SATA 4-Bay Data RAID Mirroring Enablement Kit + 1d49 0303 ThinkSystem SE350 M.2 SATA 4-Bay Data RAID Mirroring Enablement Kit + 1d49 0304 ThinkSystem M.2 SATA 2-Bay RAID Enablement Kit + 1d49 0305 ThinkSystem 7mm SATA 2-Bay Rear RAID Enablement Kit 9235 88SE9235 PCIe 2.0 x2 4-port SATA 6 Gb/s Controller 9445 88SE9445 PCIe 2.0 x4 4-Port SAS/SATA 6 Gbps RAID Controller 9480 88SE9480 SAS/SATA 6Gb/s RAID controller 9485 88SE9485 SAS/SATA 6Gb/s controller +1b4c GALAX 1b55 NetUP Inc. 18f6 Dual DVB Universal CI card 18f7 Dual DVB Universal CI card rev 1.4 @@ -22519,6 +23632,17 @@ 1b94 Signatec / Dynamic Signals Corp e400 PX14400 Dual Xilinx Virtex5 based Digitizer 1b96 Western Digital + 2200 Ultrastar DC SN630 NVMe SSD + 2201 Ultrastar DC SN630 NVMe SSD + 2300 Ultrastar DC SN840 NVMe SSD + 2400 Ultrastar DC SN640 NVMe SSD + 2401 Ultrastar DC SN640 NVMe SSD + 2402 Ultrastar DC SN640 NVMe SSD + 2404 Ultrastar DC SN640 NVMe SSD + 2500 Ultrastar DC SN840 NVMe SSD + 2600 Ultrastar DC ZN540 ZNS NVMe SSD + 3714 PC SN730 NVMe SSD + 3734 PC SN730 NVMe SSD 1b9a XAVi Technologies Corp. 1baa QNAP Systems, Inc. 1bad ReFLEX CES @@ -22575,7 +23699,54 @@ 1bb1 0151 Nytro 5520 # Kersey 2.5" TCG 1bb1 0152 Nytro 5520 TCG +# Nytro 5050H (Ebonhawk - High Performance) + 1bb1 0153 Nytro 5050H +# Nytro 5050H TCG (Ebonhawk High Performance) + 1bb1 0154 Nytro 5050H TCG +# Nytro 5050M (Ebonhawk Mainstream Performance) + 1bb1 0155 Nytro 5050M +# Nytro 5050M TCG (Ebonhawk Mainstream Performance) + 1bb1 0156 Nytro 5050M TCG +# Nytro 5050M (Ebonhawk Mainstream Performance) - 7mm + 1bb1 0157 Nytro 5050M 7mm +# Nytro 5050M (Ebonhawk Mainstream Performance) TCG - 7mm + 1bb1 0158 Nytro 5050M TCG 7mm +# Nytro 5060M (Rocinante Mainstream Performance) - 15mm + 1bb1 0159 Nytro 5060M +# Nytro 5050M TCG (Rocinante Mainstream Performance) - 15mm + 1bb1 0160 Nytro 5060M TCG +# Nytro 5060M 7mm (Rocinante Mainstream Performance) + 1bb1 0161 Nytro 5060M 7mm +# Nytro 5060M TCG (Rocinante Mainstream Performance) - 7mm + 1bb1 0162 Nytro 5060M TCG 7mm +# Nytro 5060H (Rocinante High Performance) + 1bb1 0163 Nytro 5060H +# Nytro 5060H TCG (Rocinante High Performance) + 1bb1 0164 Nytro 5060H TCG +# Nytro 5060H (Rocinante - High Performance) - E3.S 1T + 1bb1 0165 Nytro 5060H E3.S 1T +# Nytro 5060H (Rocinante - High Performance) - E3.S 1T TCG + 1bb1 0166 Nytro 5060H E3.S 1T TCG +# Nytro 5060H (Rocinante - High Performance) - E3.L 1T + 1bb1 0167 Nytro 5060H E3.L 1T +# Nytro 5060H (Rocinante - High Performance) - E3.L 1T TCG + 1bb1 0168 Nytro 5060H E3.L 1T TCG +# Nytro 5060M (Rocinante Mainstream Performance) - E3.S 1T + 1bb1 0169 Nytro 5060M E3.S 1T +# Nytro 5060M (Rocinante Mainstream Performance) - E3.S 1T TCG + 1bb1 0170 Nytro 5060M E3.S 1T TCG +# Nytro 5060M (Rocinante Mainstream Performance) - E3.L 1T + 1bb1 0171 Nytro 5060M E3.L 1T +# Nytro 5060M (Rocinante Mainstream Performance) - E3.L 1T TCG + 1bb1 0172 Nytro 5060M E3.L 1T TCG +# Nytro 5060M (Rocinante Mainstream Performance) - E1.S + 1bb1 0173 Nytro 5060M E1.S +# Nytro 5060M (Rocinante Mainstream Performance) - E1.S TCG + 1bb1 0174 Nytro 5060M E1.S TCG 1bb1 01a1 Nytro XP7102 + 5012 FireCuda 510 SSD + 5016 FireCuda 520 SSD + 5018 FireCuda 530 SSD 1bb3 Bluecherry 4304 BC-04120A MPEG4 4 port video encoder / decoder 4309 BC-08240A MPEG4 4 port video encoder / decoder @@ -22590,6 +23761,16 @@ 1bbf Maxeler Technologies Ltd. 0003 MAX3 0004 MAX4 +1bc0 Innodisk Corporation + 1001 PCIe 3TG6-P Controller + 1002 PCIe 3TE6 Controller + 1160 PCIe 3TE2 Controller + 1321 PCIe 4TG-P Controller + 1322 PCIe 4TE Controller + 2262 PCIe 3TG3-P Controller + 5208 PCIe 3TE7 Controller + 5216 PCIe 3TE8 Controller + 5236 PCIe 4TG2-P Controller 1bcf NEC Corporation 001c Vector Engine 1.0 1bd0 Astronics Corporation @@ -22597,9 +23778,17 @@ 1002 PM1553-5 (PC/104+ MIL-STD-1553 Interface Card) 1004 AB3000 Series Rugged Computer 1005 PE1000 (Multi-Protocol PCIe/104 Interface Card) + 1006 webCS Wireless Aircraft Communications Server + 1007 AB3000 Series Rugged Computer (Series N) + 1008 ME1000 mPCIe Avionics Interface Card + 100a NG1 Series Avionics Converter 1101 OmniBus II PCIe Multi-Protocol Interface Card 1102 OmniBusBox II Multi-Protocol Interface Core 1103 OmniBus II cPCIe/PXIe Multi-Protocol Interface Card + 1200 NG3 Series Mil-Std-1553 Interface + 1201 NG3 Series ARINC 429 Interface + 1202 NG3 Series Avionics Discrete & Serial Interface + 1203 NG3 Series Avionics Discrete Interface 1bd4 Inspur Electronic Information Industry Co., Ltd. 0911 Arria10_PCIe_F10A1150 1bee IXXAT Automation GmbH @@ -22632,6 +23821,7 @@ 001b FD720 001c FD922 001d Vega + 001f FD940 1c28 Lite-On IT Corp. / Plextor 0122 M6e PCI Express SSD [Marvell 88SS9183] # previously Fiberblaze @@ -22652,6 +23842,8 @@ 00e1 PacketMover 2x100Gb [Tivoli] 00e3 PacketMover 2x10Gb [Tivoli] 00e5 PacketMover 2x10Gb [Corfu] + 1000 SmartNIC N5010 4x100Gb + 1001 SmartNIC N5011 w/2xE810 4x100Gb a000 FBC2CGG3 Capture 2x40Gb [Mango_02] a001 FBC2CGG3 Capture 2x100Gb [Mango_02] a003 FBC2CGG3 Capture 16x10Gb [Mango] @@ -22691,13 +23883,45 @@ 1283 PC300 NVMe Solid State Drive 256GB 1284 PC300 NVMe Solid State Drive 512GB 1285 PC300 NVMe Solid State Drive 1TB - 1327 BC501 NVMe Solid State Drive 512GB + 1327 BC501 NVMe Solid State Drive + 1339 BC511 1504 SC300 512GB M.2 2280 SATA Solid State Drive + 1527 PC401 NVMe Solid State Drive 256GB + 174a Gold P31 SSD + 243b PE6110 NVMe Solid State Drive + 1c5c 0100 PE6110 NVMe Solid State Drive + 2839 PE8000 Series NVMe Solid State Drive + 1028 2143 DC NVMe SED PE8010 RI U.2 960GB + 1028 2144 DC NVMe PE8010 RI U.2 960GB + 1028 2145 DC NVMe SED PE8010 RI U.2 1.92TB + 1028 2146 DC NVMe PE8010 RI U.2 1.92TB + 1028 2147 DC NVMe SED PE8010 RI U.2 3.84TB + 1028 2148 DC NVMe PE8010 RI U.2 3.84TB + 1028 2149 DC NVMe SED PE8010 RI U.2 7.68TB + 1028 214a DC NVMe PE8010 RI U.2 7.68TB + 1c5c 0100 PE8000 Series NVMe Solid State Drive + 2849 PE81x0 U.2/3 NVMe Solid State Drive 1c5f Beijing Memblaze Technology Co. Ltd. - 000d PBlaze5 520/526 AIC - 003d PBlaze5 920/926 AIC - 010d PBlaze5 520/526 U.2 - 013d PBlaze5 920/926 U.2 + 000d PBlaze5 520/526 + 000e PBlaze6 6530 + 1c5f 0b20 NVMe SSD PBlaze6 6530 1920G AIC + 1c5f 0b21 NVMe SSD PBlaze6 6530 1920G 2.5" U.2 + 1c5f 0b30 NVMe SSD PBlaze6 6530 3840G AIC + 1c5f 0b31 NVMe SSD PBlaze6 6530 3840G 2.5" U.2 + 1c5f 0b40 NVMe SSD PBlaze6 6530 7680G AIC + 1c5f 0b41 NVMe SSD PBlaze6 6530 7680G 2.5" U.2 + 1c5f 4b20 NVMe SSD PBlaze6 6530 1600G AIC + 1c5f 4b21 NVMe SSD PBlaze6 6530 1600G 2.5" U.2 + 1c5f 4b30 NVMe SSD PBlaze6 6530 3200G AIC + 1c5f 4b31 NVMe SSD PBlaze6 6530 3200G 2.5" U.2 + 1c5f 4b40 NVMe SSD PBlaze6 6530 6400G AIC + 1c5f 4b41 NVMe SSD PBlaze6 6530 6400G 2.5" U.2 + 003d PBlaze5 920/926 + 003e PBlaze6 6920 + 1c5f 0a31 NVMe SSD PBlaze6 6920 3840GB 2.5" U.2 + 1c5f 0a41 NVMe SSD PBlaze6 6920 7680GB 2.5" U.2 + 1c5f 4a31 NVMe SSD PBlaze6 6920 3200GB 2.5" U.2 + 1c5f 4a41 NVMe SSD PBlaze6 6920 6400GB 2.5" U.2 0540 PBlaze4 NVMe SSD 0550 PBlaze5 700/900 0555 PBlaze5 510/516 @@ -22714,21 +23938,48 @@ 0001 Hunter PCI Express 1c8c Mobiveil, Inc. 1cb0 Shannon Systems + 8266 SP4 Series SSD + 1cb0 2021 SP4 Series OCS U.2 SSD + 1cb0 2121 SP4 Series ZNS U.2 SSD + 1cb0 2f21 SP4E Series NVMe U.2 SSD(1920/3840/7680GB) + 1cb0 2f22 SP4X Series NVMe U.2 SSD(1600/3200/6400GB) d000 Venice NVMe SSD - 1cb0 2f10 Venice-E Series U.2 SSD - 1cb0 2f11 Venice Series U.2 SSD - 1cb0 2f12 Venice-X Series U.2 SSD - 1cb0 af10 Venice-E Series AIC SSD - 1cb0 af11 Venice Series AIC SSD - 1cb0 af12 Venice-X Series AIC SSD + 1cb0 2010 Venice-E Series OCS U.2 + 1cb0 2011 Venice Series OCS U.2 + 1cb0 2012 Venice-X Series OCS U.2 +# Venice-E Series NVMe U.2 SSD(1.92T/3.84T/7.68T) + 1cb0 2f10 Venice-E Series NVMe U.2 +# Venice Series NVMe U.2 SSD(2T/4T/8T) + 1cb0 2f11 Venice Series NVMe U.2 +# Venice-X Series NVMe U.2 SSD(1.6T/3.2T/6.4T) + 1cb0 2f12 Venice-X Series NVMe U.2 + 1cb0 a010 Venice-E Series OCS AIC + 1cb0 a012 Venice-X Series OCS AIC +# Venice-E Series NVMe AIC SSD(1.92T/3.84T/7.68T) + 1cb0 af10 Venice-E Series NVMe AIC +# Venice-X Series NVMe AIC SSD(1.6T/3.2T/6.4T) + 1cb0 af12 Venice-X Series NVMe AIC 1cb1 Collion UG & Co.KG 1cb5 Focusrite Audio Engineering Ltd 0002 Clarett 1cb8 Dawning Information Industry Co., Ltd. 1cc1 ADATA Technology Co., Ltd. +# 256GB NVMe SSD + 5766 ADATA XPG GAMMIXS1 1L Media 8201 XPG SX8200 Pro PCIe Gen3x4 M.2 2280 Solid State Drive 1cc4 Union Memory (Shenzhen) + 1203 NVMe SSD Controller UHXXXa series + 1cc4 a121 NVMe SSD UHXXXa series U.2 960GB + 1cc4 a122 NVMe SSD UHXXXa series U.2 1920GB + 1cc4 a123 NVMe SSD UHXXXa series U.2 3840GB + 1cc4 a124 NVMe SSD UHXXXa series U.2 7680GB + 1cc4 a125 NVMe SSD UHXXXa series U.2 15360GB + 1cc4 a211 NVMe SSD UHXXXa series U.2 800GB + 1cc4 a212 NVMe SSD UHXXXa series U.2 1600GB + 1cc4 a213 NVMe SSD UHXXXa series U.2 3200GB + 1cc4 a214 NVMe SSD UHXXXa series U.2 6400GB 17ab NVMe 256G SSD device + 6303 AM630 PCIe 4.0 x4 NVMe SSD Controller 1cc5 Embedded Intelligence, Inc. 0100 CAN-PCIe-02 1cc7 Radian Memory Systems Inc. @@ -22744,6 +23995,7 @@ 0305 Simulyzer-RT CompactPCI Serial CAN-1 card # supports 8x CAN (-FD) interfaces 0306 Simulyzer-RT CompactPCI Serial CAN-2 card (CAN-FD) + 0307 Simulyzer-RT CompactPCI Serial DIO-2 card [Xilinx Zynq UltraScale+] 1cd7 Nanjing Magewell Electronics Co., Ltd. 0010 Pro Capture Endpoint 0014 PRO CAPTURE AIO 4K PLUS @@ -22765,15 +24017,19 @@ 0009 ExaNIC X25 000a ExaNIC X100 000b ExaNIC V9P + 000c ExaNIC V9P-3 0100 ExaDISK FX1 1cf0 Akitio 1cf7 Subspace Dynamics +1cfa Corsair Memory, Inc 1d00 Pure Storage 1d05 Tongfang Hongkong Limited 1d0f Amazon.com, Inc. + 8061 NVMe EBS Controller cd01 NVMe SSD Controller ec20 Elastic Network Adapter (ENA) efa0 Elastic Fabric Adapter (EFA) + efa1 Elastic Fabric Adapter (EFA) 1d17 Zhaoxin 070f ZX-100 PCI Express Root Port 0710 ZX-100/ZX-200 PCI Express Root Port @@ -22836,6 +24092,12 @@ f410 ZX-100/ZX-D/ZX-E PCI Com Port 1d18 RME 0001 Fireface UFX+ +# acquired by Intel +1d1c Barefoot Networks, Inc. + 0001 Tofino 1 + 0010 Tofino 1 + 0100 Tofino 2 + 0110 Tofino 2 1d1d CNEX Labs 1f1f QEMU NVM Express LightNVM Controller 2807 8800 series NVMe SSD @@ -22843,6 +24105,8 @@ 1d21 Allo 1d22 Baidu Technology 1380 Cloud Storage Device + 3684 Kunlun AI Accelerator + 3685 Kunlun2 AI Accelerator [VF] 1d26 Kalray Inc. 0040 Turbocard2 Accelerator 0080 Open Network Interface Card 80G @@ -22864,14 +24128,23 @@ 1d62 Nebbiolo Technologies 1d65 Imagine Communications Corp. 04de Taurus/McKinley +1d69 Celeno Communications + 2432 CL2432 + 2440 CL2440 1d6a Aquantia Corp. 0001 AQC107 NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] 00b1 AQC100 10G Ethernet MAC controller [AQtion] 07b1 AQC107 NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] +# Older revision of QNAP QM2 M.2 2280 PCIe SSD & 10GbE Expansion Card + 1baa 07b1 QM2-2P10G1TA [QXG 10GbE Network Adapter] +# Newer revision of QNAP QM2 M.2 2280 PCIe SSD & 10GbE Expansion Card + 1baa 07b2 QM2-2P10G1TA [QM2 Expansion Adapter] 08b1 AQC108 NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] 11b1 AQC111 NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] 12b1 AQC112 NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] 87b1 AQC107 NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] + 94c0 AQC113CS NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] + 1043 87f5 ProArt X570-CREATOR WIFI d107 AQC107 NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] 1043 8741 XG-C100C d108 AQC108 NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] @@ -22898,19 +24171,50 @@ 1012 AR-MAN-U200 [Manitou Class Accelerator for U200] 1013 AR-MAN-U250 [Manitou Class Accelerator for U250] 1014 AR-MAN-U280 [Manitou Class Accelerator for U280] + 1015 AR-ARK-BBDEV-FX0 [Arkville 32B DPDK Baseband Device] + 1016 AR-ARK-BBDEV-FX1 [Arkville 64B DPDK Baseband Device] + 1017 AR-ARK-FX1 [Arkville 64B Multi-Homed Primary Endpoint] + 1018 AR-ARK-FX1 [Arkville 64B Multi-Homed Secondary Endpoint] + 1019 AR-ARK-FX1 [Arkville 64B Multi-Homed Tertiary Endpoint] + 101a AR-ARK-SRIOV-FX0 [Arkville 32B Primary Physical Function] + 101b AR-ARK-SRIOV-FX1 [Arkville 64B Primary Physical Function] + 101c AR-ARK-SRIOV-VF [Arkville Virtual Function] + 101d AR-ARK-NIC [Arkville ArkNIC Kernel Path Device] + 101e AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for Agilex R-Tile] + 101f AR-TK242 [2x100GbE Packet Capture Device] 4200 A5PL-E1-10GETI [10 GbE Ethernet Traffic Instrument] 1d72 Xiaomi -1d78 DERA +1d78 DERA Storage + 1512 TAI NVMe Controller + 1d78 2004 D5437 HHHL 2TB NVMe SSD + 1d78 2006 D5437 HHHL 4TB NVMe SSD + 1d78 2008 D5437 HHHL 8TB NVMe SSD + 1d78 2104 D5437 U.2 2TB NVMe SSD + 1d78 2106 D5437 U.2 4TB NVMe SSD + 1d78 2108 D5437 U.2 8TB NVMe SSD + 1d78 3003 D5457 HHHL 1.6TB NVMe SSD + 1d78 3005 D5457 HHHL 3.2TB NVMe SSD + 1d78 3007 D5457 HHHL 6.4TB NVMe SSD + 1d78 3103 D5457 U.2 1.6TB NVMe SSD + 1d78 3105 D5457 U.2 3.2TB NVMe SSD + 1d78 3107 D5457 U.2 6.4TB NVMe SSD 1d7c Aerotech, Inc. +# Fiber-optic HyperWire motion control bus from Aerotech. + 0001 HyperWire Adapter 1d82 NETINT Technologies Inc. 0101 Codensity D400 SSD 0102 Codensity D408 PCIe Gen4 NVMe SSD 0202 Codensity T408 Video Encoding-Decoding Accelerator -1d87 Fuzhou Rockchip Electronics Co., Ltd +# nee Fuzhou Rockchip Electronics Co., Ltd +1d87 Rockchip Electronics Co., Ltd 0100 RK3399 PCI Express Root Port 1808 RK1808 Neural Network Processor Card + 3566 RK3568 Remote Signal Processor +1d89 YEESTOR Microelectronics Co., Ltd + 0280 PCIe NVMe SSD 1d8f Enyx -1d93 YADRO (KNS Group) +1d92 Abaco Systems Inc. +1d93 YADRO 1d94 Chengdu Haiguang IC Design Co., Ltd. 1450 Root Complex 1451 I/O Memory Management Unit @@ -22945,61 +24249,159 @@ 0001 Colossus GC2 [C2] 0002 Colossus GC1 [S1] 1d97 Shenzhen Longsys Electronics Co., Ltd. + 2263 SM2263EN/SM2263XT-based OEM SSD 1d9b Facebook, Inc. 0010 Networking DOM Engine 0011 IO Bridge 1da1 Teko Telecom S.r.l. 1da2 Sapphire Technology Limited + e26a Radeon R7 250 1da3 Habana Labs Ltd. 0001 HL-1000 AI Inference Accelerator [Goya] # PCIe accelerator card for Deep Learning training tasks 1000 HL-2000 AI Training Accelerator [Gaudi] +# PCIe accelerator card for Deep Learning training tasks with secured firmware + 1010 HL-2000 AI Training Accelerator [Gaudi secured] +1dad Fungible +1db2 ATP ELECTRONICS INC +1db7 Phytium Technology Co., Ltd. + dc20 [X100 Series] + dc21 VPU Controller [X100 Series] + dc22 DC Controller [X100 Series] + dc23 I2S/DMA Controller [X100 Series] + dc26 SATA Controller [X100 Series] + dc27 USB Controller [X100 Series] + dc29 NANDFLASH Controller [X100 Series] + dc2b I2S Controller [X100 Series] + dc2c SPIM Controller [X100 Series] + dc2d CAN Controller [X100 Series] + dc2e UART Controller [X100 Series] + dc2f PWM Controller [X100 Series] + dc30 MIO Controller [X100 Series] + dc31 GPIO Controller [X100 Series] + dc32 SMBUS Controller [X100 Series] + dc34 PS2 Controller [X100 Series] + dc35 LPC Controller [X100 Series] + dc36 LDMA Controller [X100 Series] + dc38 LSD_CFG Controller [X100 Series] + dc3a SWITCH Controller [X100 Series] + dc3c GPU_DMA Controller [X100 Series] 1dbb NGD Systems, Inc. 1dbf Guizhou Huaxintong Semiconductor Technology Co., Ltd 0401 StarDragon4800 PCI Express Root Port 1dc5 FADU Inc. 1dcd Liqid Inc. -1dd8 Pensando Systems Inc +1dcf Beijing Sinead Technology Co., Ltd. +1dd3 Sage Microelectronics Corp. +1dd8 Pensando Systems + 0002 DSC2 Elba Upstream Port + 1dd8 5001 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card + 1dd8 5003 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card 1000 DSC Capri Upstream Port 1dd8 4000 Naples 100Gb 2-port QSFP28 x16 8GB 1dd8 4001 Naples 100Gb 2-port QSFP28 x16 4GB 1dd8 4002 Naples 25Gb 2-port SFP28 x8 4GB - 1dd8 4008 DSC-25 10/25G 2-port SFP28 x8 4GB RAM 8GB eMMC + 1dd8 4007 DSP DSC-25 Ent 10/25G OCP3 Card + 1dd8 4008 DSP DSC-25 10/25G 2p SFP28 Card + 1dd8 400a DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 400c DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 400d DSP DSC-100 Ent 100Gb Card + 1dd8 400e DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 4014 DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card 1001 DSC Virtual Downstream Port 1dd8 4000 Naples 100Gb 2-port QSFP28 x16 8GB 1dd8 4001 Naples 100Gb 2-port QSFP28 x16 4GB 1dd8 4002 Naples 25Gb 2-port SFP28 x8 4GB - 1dd8 4008 DSC-25 10/25G 2-port SFP28 x8 4GB RAM 8GB eMMC + 1dd8 4007 DSP DSC-25 Ent 10/25G OCP3 Card + 1dd8 4008 DSP DSC-25 10/25G 2p SFP28 Card + 1dd8 400a DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 400c DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 400d DSP DSC-100 Ent 100Gb Card + 1dd8 400e DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 4014 DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 5001 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card + 1dd8 5003 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card 1002 DSC Ethernet Controller 1dd8 4000 Naples 100Gb 2-port QSFP28 x16 8GB 1dd8 4001 Naples 100Gb 2-port QSFP28 x16 4GB 1dd8 4002 Naples 25Gb 2-port SFP28 x8 4GB - 1dd8 4008 DSC-25 10/25G 2-port SFP28 x8 4GB RAM 8GB eMMC + 1dd8 4007 DSP DSC-25 Ent 10/25G OCP3 Card + 1dd8 4008 DSP DSC-25 10/25G 2p SFP28 Card + 1dd8 400a DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 400c DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 400d DSP DSC-100 Ent 100Gb Card + 1dd8 400e DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 4014 DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 5001 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card + 1dd8 5003 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card 1003 DSC Ethernet Controller VF 1dd8 4000 Naples 100Gb 2-port QSFP28 x16 8GB 1dd8 4001 Naples 100Gb 2-port QSFP28 x16 4GB 1dd8 4002 Naples 25Gb 2-port SFP28 x8 4GB - 1dd8 4008 DSC-25 10/25G 2-port SFP28 x8 4GB RAM 8GB eMMC + 1dd8 4007 DSP DSC-25 Ent 10/25G OCP3 Card + 1dd8 4008 DSP DSC-25 10/25G 2p SFP28 Card + 1dd8 400a DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 400c DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 400d DSP DSC-100 Ent 100Gb Card + 1dd8 400e DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 4014 DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 5001 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card + 1dd8 5003 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card 1004 DSC Management Controller 1dd8 4000 Naples 100Gb 2-port QSFP28 x16 8GB 1dd8 4001 Naples 100Gb 2-port QSFP28 x16 4GB 1dd8 4002 Naples 25Gb 2-port SFP28 x8 4GB - 1dd8 4008 DSC-25 10/25G 2-port SFP28 x8 4GB RAM 8GB eMMC + 1dd8 4007 DSP DSC-25 Ent 10/25G OCP3 Card + 1dd8 4008 DSP DSC-25 10/25G 2p SFP28 Card + 1dd8 400a DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 400c DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 400d DSP DSC-100 Ent 100Gb Card + 1dd8 400e DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 4014 DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 5001 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card + 1dd8 5003 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card + 1005 DSC NVMe Controller + 1dd8 5001 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card + 1dd8 5003 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card + 1006 DSC NVMe Controller VF + 1dd8 5001 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card + 1dd8 5003 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card 1007 DSC Storage Accelerator 1dd8 4000 Naples 100Gb 2-port QSFP28 x16 8GB 1dd8 4001 Naples 100Gb 2-port QSFP28 x16 4GB 1dd8 4002 Naples 25Gb 2-port SFP28 x8 4GB - 1dd8 4008 DSC-25 10/25G 2-port SFP28 x8 4GB RAM 8GB eMMC + 1dd8 4007 DSP DSC-25 Ent 10/25G OCP3 Card + 1dd8 4008 DSP DSC-25 10/25G 2p SFP28 Card + 1dd8 400a DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 400c DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 400d DSP DSC-100 Ent 100Gb Card + 1dd8 400e DSC-25 10/25G 2-port 4G RAM 8G eMMC G1 Services Card + 1dd8 4014 DSC-100 40/100G 2-port 8G RAM 16G eMMC G1 Services Card + 1dd8 5001 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card + 1dd8 5003 DSC2-200 50/100/200G 2-port 32G RAM 64G eMMC G2 Services Card +1ddd Thorlabs 1de0 Groq - 0000 Q100 Tensor Streaming Processor +# rename due to conflict with a term in use by another company for an entirely different product. + 0000 TSP100 Tensor Streaming Processor 1de1 Tekram Technology Co.,Ltd. 0391 TRM-S1040 [DC-315 / DC-395 series] - 2020 DC-390 + 2020 DC-390 Series SCSI Adapter [AMD Am53C974] 690c 690c dc29 DC290 1de5 Eideticom, Inc 1000 IO Memory Controller 2000 NoLoad Hardware Development Kit + 3000 eBPF-based PCIe Accelerator +1ded Alibaba (China) Co., Ltd. +# A RDMA (iWarp) device provided by Alibaba Cloud used in ECS environment + 107f Elastic RDMA Adapter + 5007 Elastic RDMA Adapter + 8000 M1 Root Port + 8001 ACC-RCiEP + 8002 RCiEP VF + 8003 RCEC PF + 8004 RCEC VF +1dee Biwin Storage Technology Co., Ltd. 1def Ampere Computing, LLC e005 eMAG PCI Express Root Port 0 e006 eMAG PCI Express Root Port 1 @@ -23009,6 +24411,42 @@ e00a eMAG PCI Express Root Port 5 e00b eMAG PCI Express Root Port 6 e00c eMAG PCI Express Root Port 7 +# Root Complex A (RCA) + e100 Altra PCI Express Root Complex A +# RCA port 0 + e101 Altra PCI Express Root Port a0 +# RCA port 1 + e102 Altra PCI Express Root Port a1 +# RCA port 2 + e103 Altra PCI Express Root Port a2 +# RAC port 3 + e104 Altra PCI Express Root Port a3 +# RCA port 4 + e105 Altra PCI Express Root Port a4 +# RCA port 5 + e106 Altra PCI Express Root Port a5 +# RCA port 6 + e107 Altra PCI Express Root Port a6 +# RCA port 7 + e108 Altra PCI Express Root Port a7 +# Root Complex B (RCB) + e110 Altra PCI Express Root Complex B +# RCB port 0 + e111 Altra PCI Express Root Port b0 +# RCB port 1 + e112 Altra PCI Express Root Port b1 +# RCB port 2 + e113 Altra PCI Express Root Port b2 +# RCB port 3 + e114 Altra PCI Express Root Port b3 +# RCB port 4 + e115 Altra PCI Express Root Port b4 +# RCB port 5 + e116 Altra PCI Express Root Port b5 +# RCB port 6 + e117 Altra PCI Express Root Port b6 +# RCB port 7 + e118 Altra PCI Express Root Port b7 1df3 Ethernity Networks 0201 ACE-NIC40 Programmable Network Accelerator 1df3 0001 ENA1040 @@ -23026,6 +24464,18 @@ 0204 ACE-NIC-NID Programmable Network Accelerator 1df3 0001 ENA1020Z 1df3 0002 ENA1020ZS + 0205 ACE-NIC250 Programmable Network Accelerator + 1df3 0000 Maintenance Mode + 1df3 0001 ENA2250F + 0206 ACE-NIC200 Programmable Network Accelerator + 1df3 0000 Maintenance Mode + 1df3 0001 ENA2200F + 0207 ACE-NIC50RN Programmable Network Accelerator + 1df3 0000 Maintenance Mode + 1df3 0001 ENA2050RN + 0208 ACE-NIC100RN Programmable Network Accelerator + 1df3 0000 Maintenance Mode + 1df3 0001 ENA2100RN 1df7 opencpi.org 0001 ml605 0002 alst4 @@ -23034,6 +24484,39 @@ 1181 TDM 8 Port E1/T1/J1 Adapter 1e0f KIOXIA Corporation 0007 NVMe SSD Controller Cx6 + 1028 2078 DC NVMe CD6 RI 960GB + 1028 2079 DC NVMe CD6 RI 1.92TB + 1028 207a DC NVMe CD6 RI 3.84TB + 1028 207b DC NVMe CD6 RI 7.68TB + 1028 207c DC NVMe CD6 RI 15.36TB + 1028 207e Dell Ent NVMe CM6 RI 1.92TB + 1028 207f Dell Ent NVMe CM6 RI 3.84TB + 1028 2080 Dell Ent NVMe CM6 RI 7.68TB + 1028 2081 Dell Ent NVMe CM6 RI 15.36TB + 1028 2084 Dell Ent NVMe CM6 MU 1.6TB + 1028 2085 Dell Ent NVMe CM6 MU 3.2TB + 1028 2086 Dell Ent NVMe CM6 MU 6.4TB + 1028 210a Dell Ent NVMe FIPS CM6 RI 1.92TB + 1028 210b Dell Ent NVMe FIPS CM6 RI 3.84TB + 1028 210c Dell Ent NVMe FIPS CM6 RI 7.68TB + 1028 210d Dell Ent NVMe FIPS CM6 RI15.36TB + 1028 210e Dell Ent NVMe FIPS CM6 MU 1.6TB + 1028 210f Dell Ent NVMe FIPS CM6 MU 3.2TB + 1028 2110 Dell Ent NVMe FIPS CM6 MU 6.4TB + 1e0f 0001 Generic NVMe CM6 + 0009 NVMe SSD + 1e0f 0001 Toshiba RC500 NVMe SSD 500GB + 0011 NVMe SSD Controller CD7 + 1028 2189 DC NVMe SED CD7 RI 960GB + 1028 218a DC NVMe CD7 RI 960GB + 1028 218b DC NVMe SED CD7 RI 1.92TB + 1028 218c DC NVMe CD7 RI 1.92TB + 1028 218d DC NVMe SED CD7 RI 3.84TB + 1028 218e DC NVMe CD7 RI 3.84TB + 1028 218f DC NVMe SED CD7 RI 7.68TB + 1028 2190 DC NVMe CD7 RI 7.68TB + 1028 2191 DC NVMe SED CD7 RI 15.36TB + 1028 2192 DC NVMe CD7 RI 15.36TB 1e17 Arnold & Richter Cine Technik GmbH & Co. Betriebs KG 1e24 Squirrels Research Labs 0101 Acorn CLE-101 @@ -23049,18 +24532,123 @@ 1e26 Fujitsu Client Computing Limited 1e36 Shanghai Enflame Technology Co. Ltd 0001 T10 [CloudBlazer] + 0002 T11 [CloudBlazer] + 0003 T10(QSFP-DD) [CloudBlazer] + 0021 T20(32GB) [CloudBlazer] + 0022 T20(64GB) [CloudBlazer] + 0023 T21(32GB) [CloudBlazer] + 0024 T21(64GB) [CloudBlazer] + 8001 I20 [CloudBlazer] + 8011 I10 [CloudBlazer] + 8012 I10L [CloudBlazer] # nee Thinci, Inc 1e38 Blaize, Inc + 0102 Xplorer X1600 +# https://www.medion.com/ +1e39 MEDION AG +1e3b DapuStor Corporation + 0600 NVMe SSD Controller DPU600 + 1e3b 0030 Enterprise NVMe SSD U.2 3.84TB (J5100) + 1e3b 0031 Enterprise NVMe SSD U.2 7.68TB (J5100) + 1e3b 0032 Enterprise NVMe SSD U.2 15.36TB (J5100) + 1e3b 0033 Enterprise NVMe SSD U.2 3.20TB (J5300) + 1e3b 0034 Enterprise NVMe SSD U.2 6.40TB (J5300) + 1e3b 0035 Enterprise NVMe SSD U.2 12.80TB (J5300) + 1e3b 0036 Enterprise NVMe SSD AIC 7.68TB (J5110) + 1e3b 0037 Enterprise NVMe SSD AIC 6.40TB (J5310) + 1e3b 003e Enterprise NVMe SSD AIC 3.84TB (J5110) + 1e3b 003f Enterprise NVMe SSD AIC 3.20TB (J5310) + 1e3b 0050 Enterprise NVMe SSD U.2 3.84TB (R5100) + 1e3b 0051 Enterprise NVMe SSD U.2 7.68TB (R5100) + 1e3b 0052 Enterprise NVMe SSD U.2 15.36TB (R5100) + 1e3b 0053 Enterprise NVMe SSD U.2 3.20TB (R5300) + 1e3b 0054 Enterprise NVMe SSD U.2 6.40TB (R5300) + 1e3b 0055 Enterprise NVMe SSD U.2 12.80TB (R5300) + 1e3b 0056 Enterprise NVMe SSD U.2 3.84TB (R5101) + 1e3b 0059 Enterprise NVMe SSD U.2 3.20TB (R5301) + 1e3b 0060 Enterprise NVMe SSD U.2 3.84TB (R5100D) + 1e3b 0061 Enterprise NVMe SSD U.2 7.68TB (R5100D) + 1e3b 0063 Enterprise NVMe SSD U.2 3.20TB (R5300D) + 1e3b 0064 Enterprise NVMe SSD U.2 6.40TB (R5300D) + 1e3b 00f0 Enterprise NVMe SSD U.2 0.40TB (X2900) + 1e3b 00f1 Enterprise NVMe SSD U.2 0.80TB (X2900) + 1e3b 00f2 Enterprise NVMe SSD U.2 1.60TB (X2900) + 1e3b 00f3 Enterprise NVMe SSD U.2 3.20TB (X2900) + 1e3b 00f5 Enterprise NVMe SSD U.2 0.40TB (X2900P) + 1e3b 00f6 Enterprise NVMe SSD U.2 0.80TB (X2900P) + 1098 Haishen NVMe SSD + 1e3b 0001 Enterprise NVMe SSD U.2 0.8TB (H2100) + 1e3b 0002 Enterprise NVMe SSD U.2 0.96TB (H2200) + 1e3b 0004 Enterprise NVMe SSD U.2 1.6TB (H2100) + 1e3b 0005 Enterprise NVMe SSD U.2 1.92TB (H2200) + 1e3b 0009 Enterprise NVMe SSD U.2 0.8TB (H3100) + 1e3b 000a Enterprise NVMe SSD U.2 0.96TB (H3200) + 1e3b 000c Enterprise NVMe SSD U.2 1.6TB (H3100) + 1e3b 000d Enterprise NVMe SSD U.2 1.92TB (H3200) + 1e3b 0014 Enterprise NVMe SSD U.2 3.2TB (H3100) + 1e3b 0015 Enterprise NVMe SSD U.2 3.84TB (H3200) + 1e3b 0021 Enterprise NVMe SSD U.2 6.4TB (H3100) + 1e3b 0022 Enterprise NVMe SSD U.2 7.68TB (H3200) + 1e3b 0052 Enterprise NVMe SSD U.2 0.8TB (H3900) + 1e3b 0053 Enterprise NVMe SSD U.2 1.6TB (H3900) + 1e3b 0059 Enterprise NVMe SSD U.2 0.75TB (H3900) + 1e3b 0061 Enterprise NVMe SSD HHHL 0.8TB (H2100) + 1e3b 0062 Enterprise NVMe SSD HHHL 0.96TB (H2200) + 1e3b 0064 Enterprise NVMe SSD HHHL 1.6TB (H2100) + 1e3b 0065 Enterprise NVMe SSD HHHL 1.92TB (H2200) + 1e3b 006c Enterprise NVMe SSD HHHL 0.8TB (H3100) + 1e3b 006d Enterprise NVMe SSD HHHL 0.96TB (H3200) + 1e3b 006f Enterprise NVMe SSD HHHL 1.6TB (H3100) + 1e3b 0070 Enterprise NVMe SSD HHHL 1.92TB (H3200) + 1e3b 007c Enterprise NVMe SSD HHHL 3.2TB (H3100) + 1e3b 007d Enterprise NVMe SSD HHHL 3.84TB (H3200) + 1e3b 007f Enterprise NVMe SSD HHHL 6.4TB (H3100) + 1e3b 0080 Enterprise NVMe SSD HHHL 7.68TB (H3200) + 1e3b 008a Enterprise NVMe SSD HHHL 0.8TB (H3900) + 1e3b 008b Enterprise NVMe SSD HHHL 1.6TB (H3900) + 1e3b 0091 Enterprise NVMe SSD HHHL 0.75TB (H3900) 1e3d Burlywood, Inc 1e49 Yangtze Memory Technologies Co.,Ltd + 0041 ZHITAI TiPro7000 +# YMTC PCIe/NVMe SSD + 1013 PC210 +1e4b MAXIO Technology (Hangzhou) Ltd. + 1001 NVMe SSD Controller MAP1001 + 1002 NVMe SSD Controller MAP1002 + 1003 NVMe SSD Controller MAP1003 + 1201 NVMe SSD Controller MAP1201 + 1202 NVMe SSD Controller MAP1202 + 1601 NVMe SSD Controller MAP1601 1e4c GSI Technology -# Associative Processing Unit chip - 0010 Gemini [ Lida ] +# Associative Processing Unit (APU) + 0010 APU [Leda] 1e4c 0120 SE120 1e57 Beijing Panyi Technology Co., Ltd 0100 The device has already been deleted. 0000 0100 PY8800 64GB Accelerator +1e59 Oxford Nanopore Technologies + 0001 MinION Mk1C +1e5d ASR Microelectronics + 7000 AI controller A7000 + 7010 AI controller A7010 +1e60 Hailo Technologies Ltd. + 2864 Hailo-8 AI Processor +1e68 Jiangsu Xinsheng Intelligent Technology Co., Ltd 1e6b Axiado Corp. +1e7b Dataland +1e7c Brainchip Inc + bca1 AKD1000 Neural Network Coprocessor [Akida] +1e81 Ramaxel Technology(Shenzhen) Limited + 1203 NVMe SSD Controller UHXXXa series + 1e81 a121 NVMe SSD UHXXXa series U.2 960GB + 1e81 a122 NVMe SSD UHXXXa series U.2 1920GB + 1e81 a123 NVMe SSD UHXXXa series U.2 3840GB  + 1e81 a124 NVMe SSD UHXXXa series U.2 7680GB  + 1e81 a125 NVMe SSD UHXXXa series U.2 15360GB + 1e81 a211 NVMe SSD UHXXXa series U.2 800GB  + 1e81 a212 NVMe SSD UHXXXa series U.2 1600GB  + 1e81 a213 NVMe SSD UHXXXa series U.2 3200GB  + 1e81 a214 NVMe SSD UHXXXa series U.2 6400GB  1e85 Heitec AG 1e89 ID Quantique SA 0002 Quantis-PCIe-40M @@ -23068,6 +24656,70 @@ # aka SED Systems 1e94 Calian SED 1e95 Solid State Storage Technology Corporation + 1002 NVMe Datacenter LJ1 SSD [3DNAND, Rainier Controller] + 1ea0 5636 TP1500 Series U.2 NVMe Datacenter SSD +1e9f Lynxi Technologies Co., Ltd. +1ea0 Tencent Technology (Shenzhen) Company Limited + 2a16 Cloud Intelligent Inference Controller + 2a18 Video Transcode Controller +1ea7 Intelliprop, Inc + 223a Typhon+ PCIe to Gen-Z Bridge + 224a IPA-PE224A CXL to Gen-Z Bridge [Sphinx] +1eab Hefei DATANG Storage Technology Co.,LTD. + 300a NVMe SSD Controller 300A + 300b NVMe SSD Controller 300B +1eac Quectel Wireless Solutions Co., Ltd. + 1001 EM120R-GL LTE Modem + 1002 EM160R-GL LTE Modem +1eae XFX Limited +1eb1 VeriSilicon Inc + 1001 Video Accelerator +1eb4 Quantum Nebula Microelectronics Technology Co.,Ltd. + 3401 SSD Contoller +1ebd EMERGETECH Company Ltd. + 0101 Seirios 2063 Video Codec +1ed2 FuriosaAI, Inc. + 0000 Warboy +1ed3 Yeston +1ed5 Moore Threads Technology Co.,Ltd + 0100 MTT S10 + 0101 MTT S10 + 0102 MTT S30 + 0105 MTT S50 + 0106 MTT S60 + 0111 MTT S100 + 0121 MTT S1000M + 0122 MTT S1000 + 0123 MTT S2000 +1ed8 Digiteq Automotive + 0101 FG4 PCIe Frame Grabber +1ed9 Myrtle.ai +1ee9 SUSE LLC +1eec Viscore Technologies Ltd + 0102 VSE250231S Dual-port 10Gb/25Gb Ethernet PCIe + 1eec VSE250231S Dual-port 10Gb/25Gb Ethernet PCIe +1eed Xiangdixian Computing Technology (Chongqing) Ltd. + 0100 XDX P100 VGA controller + 0101 XDX P101 High Definition Audio Controller +1efb Flexxon Pte Ltd +1f02 Beijing Dayu Technology +1f03 Shenzhen Shichuangyi Electronics Co., Ltd + 1202 MAP1202-Based NVMe SSD + 2262 SM2262EN-based OEM SSD + 2263 SM2263XT-Base NVMe SSD + 5216 IG5216-based NVMe SSD + 5220 IG5220-Based NVMe SSD + 5236 IG5236-Based NVMe SSD + 5636 IG5636-Based NVMe SSD +1f2f China Mobile (Hangzhou) Information Technology Co.Ltd. + 1513 DERA MENG NVMe Controller + 1f2f 6113 KM660 U.2 1.6TB NVMe SSD + 1f2f 6114 KM560 U.2 1.92TB NVMe SSD + 1f2f 6115 KM660 U.2 3.2TB NVMe SSD + 1f2f 6116 KM560 U.2 3.84TB NVMe SSD + 1f2f 6118 KM560 U.2 7.68TB NVMe SSD +1fab Unifabrix Ltd. + 0000 Nexus Alpha IVPU # nee Tumsan Oy 1fc0 Ascom (Finland) Oy 0300 E2200 Dual E1/Rawpipe Card @@ -23141,6 +24793,7 @@ 2048 Beijing SpaceControl Technology Co.Ltd 20f4 TRENDnet 2116 ZyDAS Technology Corp. +21b4 Hunan Goke Microelectronics Co., Ltd 21c3 21st Century Computer Corp. 22b8 Flex-Logix Technologies 22a0 Flex Logix InferX X1 Inference Accelerator @@ -23149,12 +24802,19 @@ 2348 Racore 2010 8142 100VG/AnyLAN 2646 Kingston Technology Company, Inc. + 0010 HyperX Predator PCIe AHCI SSD + 2262 KC2000 NVMe SSD + 2263 A2000 NVMe SSD + 5008 U-SNS8154P3 NVMe SSD + 500d OM3PDP3 NVMe SSD + 500e SNVS2000G [NV1 NVMe PCIe SSD 2TB] 270b Xantel Corporation 270f Chaintech Computer Co. Ltd 2711 AVID Technology Inc. 2955 Connectix Virtual PC 6e61 OHCI USB 1.1 controller 2a15 3D Vision(???) +2a18 Video Transcode Controller 2bd8 ROPEX Industrie-Elektronik GmbH 3000 Hansol Electronics Inc. 3112 Satelco Ingenieria S.A. @@ -23194,7 +24854,8 @@ 3442 Bihl+Wiedemann GmbH 1783 AS-i 3.0 cPCI Master 1922 AS-i 3.0 PCI Master -3475 Arastra Inc. +3475 Arista Networks, Inc. +34ba Ice Lake-LP PCI Express Root Port #3 3513 ARCOM Control Systems Ltd 37d9 ITD Firm ltd. 1138 SCHD-PH-8 Phase detector @@ -23249,6 +24910,7 @@ 0100 Permedia II 2D+3D 07a1 Wildcat III 6210 07a2 Sun XVR-500 Graphics Accelerator + 3d3d 1047 Sun XVR-600 Graphics Accelerator 07a3 Wildcat IV 7210 1004 Permedia 3d04 Permedia @@ -23302,6 +24964,7 @@ 416c Aladdin Knowledge Systems 0100 AladdinCARD 0200 CPC +4242 Universall Answer Generators 4254 DVBSky 4321 Tata Power Strategic Electronics Division 4348 WCH.CN @@ -23312,7 +24975,7 @@ 7053 CH353 PCI Dual Serial and Parallel Ports Controller 7073 CH356 PCI Quad Serial and Parallel Ports Controller 7173 CH355 PCI Quad Serial Port Controller -434e CAST Navigation LLC +434e Cornelis Networks 4444 Internext Compression Inc 0016 iTVC16 (CX23416) Video Decoder 0070 0003 WinTV PVR 250 @@ -23537,6 +25200,10 @@ 0010 [mvHYPERION-16R16/-32R16] 16 Video Channel PCI Express x4 Frame Grabber 0020 [mvHYPERION-HD-SDI] HD-SDI PCI Express x4 Frame Grabber 0030 [mvHYPERION-HD-SDI-Merger] HD-SDI PCI Express x4 Frame Grabber + 7012 [mvBlueNAOS BVS CA-BN] PCIe Gen1 x2 Camera + 7014 [mvBlueNAOS BVS CA-BN] PCIe Gen1 x4 Camera + 7022 [mvBlueNAOS BVS CA-BN] PCIe Gen2 x2 Camera + 7024 [mvBlueNAOS BVS CA-BN] PCIe Gen2 x4 Camera 4ddc ILC Data Device Corp 0100 DD-42924I5-300 (ARINC 429 Data Bus) 0300 SB-3620 Motion Feedback Device @@ -23564,6 +25231,8 @@ 0d10 SB-365x Motion Feedback Device 2f00 SB-3642 Motion Feedback Device 3000 SB-3644 Motion Feedback Device +4e58 Nutanix, Inc. + 0001 Virtual NVMe Controller 5045 University of Toronto 4243 BLASTbus PCI Interface Card v1 5046 GemTek Technology Corporation @@ -23794,6 +25463,12 @@ 1400 CooVOX TDM GSM Module 1600 CooVOX TDM E1/T1 Module 1800 CooVOX TDM BRI Module +6766 Glenfly Tech Co., Ltd. + 3d00 Arise-GT-10C0 + 3d02 Arise 1020 + 3d40 Arise-GT-10C0 High Definition Audio Controller + 3d41 Arise 1020 High Definition Audio Controller +6899 ZT Systems # nee Qumranet 6900 Red Hat, Inc. 7063 pcHDTV @@ -23806,6 +25481,9 @@ 7401 EndRun Technologies e100 PTP3100 PCIe PTP Slave Clock 7470 TP-LINK Technologies Co., Ltd. +7526 HongQin (Beijing) Technology Co., Ltd. + 0082 HQ SSD 1TB + 0083 HQ SSD 2TB M.2 NVMe 7604 O.N. Electronic Co Ltd. 7bde MIDAC Corporation 7fed PowerTV @@ -23898,6 +25576,7 @@ 0100 2nd Generation Core Processor Family DRAM Controller 1028 04aa XPS 8300 1043 844d P8P67/P8H67 Series Motherboard + 8086 200d DH61CR motherboard 0101 Xeon E3-1200/2nd Generation Core Processor Family PCI Express Root Port 1028 04b2 Vostro 3350 106b 00dc MacBookPro8,2 [Core i7, 15", 2011] @@ -23966,7 +25645,7 @@ 015d Xeon E3-1200 v2/3rd Gen Core processor PCI Express Root Port 1043 844d P8 series motherboard 015e Xeon E3-1200 v2/3rd Gen Core processor Graphics Controller - 0162 Xeon E3-1200 v2/3rd Gen Core processor Graphics Controller + 0162 IvyBridge GT2 [HD Graphics 4000] 1043 84ca P8 series motherboard 1849 0162 Motherboard 0166 3rd Gen Core processor Graphics Controller @@ -23977,15 +25656,46 @@ 1043 844d P8B WS Motherboard 0172 Xeon E3-1200 v2/3rd Gen Core processor Graphics Controller 0176 3rd Gen Core processor Graphics Controller + 0201 Arctic Sound + 0284 Comet Lake PCH-LP LPC Premium Controller/eSPI Controller + 1028 09be Latitude 7410 + 02a3 Comet Lake PCH-LP SMBus Host Controller + 1028 09be Latitude 7410 02a4 Comet Lake SPI (flash) Controller + 1028 09be Latitude 7410 02a6 Comet Lake North Peak + 02b0 Comet Lake PCI Express Root Port #9 + 02b1 Comet Lake PCI Express Root Port #10 + 02b3 Comet Lake PCI Express Root Port #12 + 02b4 Comet Lake PCI Express Root Port #13 + 02b8 Comet Lake PCI Express Root Port #1 + 02bc Comet Lake PCI Express Root Port #5 + 02c5 Comet Lake Serial IO I2C Host Controller + 1028 09be Latitude 7410 + 02c8 Comet Lake PCH-LP cAVS + 1028 09be Latitude 7410 02d3 Comet Lake SATA AHCI Controller 02e0 Comet Lake Management Engine Interface + 1028 09be Latitude 7410 02e8 Serial IO I2C Host Controller + 1028 09be Latitude 7410 02e9 Comet Lake Serial IO I2C Host Controller - 02f0 Wireless-AC 9462 + 1028 09be Latitude 7410 + 02ea Comet Lake PCH-LP LPSS: I2C Controller #2 + 02ed Comet Lake PCH-LP USB 3.1 xHCI Host Controller + 1028 09be Latitude 7410 + 02ef Comet Lake PCH-LP Shared SRAM + 1028 09be Latitude 7410 + 02f0 Comet Lake PCH-LP CNVi WiFi + 8086 0034 Wireless-AC 9560 160MHz + 8086 0070 Wi-Fi 6 AX201 160MHz + 8086 0074 Wi-Fi 6 AX201 160MHz + 8086 4070 Wi-Fi 6 AX201 160MHz + 02f5 Comet Lake PCH-LP SCS3 02f9 Comet Lake Thermal Subsytem + 1028 09be Latitude 7410 02fc Comet Lake Integrated Sensor Solution + 1028 09be Latitude 7410 0309 80303 I/O Processor PCI-to-PCI Bridge 030d 80312 I/O Companion Chip PCI-to-PCI Bridge 0326 6700/6702PXH I/OxAPIC Interrupt Controller A @@ -24015,6 +25725,9 @@ 0406 Haswell Integrated Graphics Controller 040a Xeon E3-1200 v3 Processor Integrated Graphics Controller 0412 Xeon E3-1200 v3/4th Gen Core Processor Integrated Graphics Controller + 1028 05d7 Alienware X51 R2 + 103c 1998 EliteDesk 800 G1 + 17aa 3098 ThinkCentre E73 17aa 309f ThinkCentre M83 0416 4th Gen Core Processor Integrated Graphics Controller 17aa 220e ThinkPad T440p @@ -24065,6 +25778,8 @@ 8086 01f7 SCRU32 # uninitialized SRCU32 RAID Controller 061f 80303 I/O Processor + 0684 H470 Chipset LPC/eSPI Controller + 0687 Q470 Chipset LPC/eSPI Controller 068d Comet Lake LPC Controller 06a3 Comet Lake PCH SMBus Controller 06a4 Comet Lake PCH SPI Controller @@ -24074,16 +25789,24 @@ 06ab Comet Lake PCH Serial IO SPI Controller #1 06ac Comet Lake PCI Express Root Port #21 06b0 Comet Lake PCI Express Root Port #9 + 06bd Comet Lake PCIe Port #6 06c0 Comet Lake PCI Express Root Port #17 06c8 Comet Lake PCH cAVS + 06d2 Comet Lake SATA AHCI Controller + 06d6 Comet Lake PCH-H RAID + 06d7 Comet Lake PCH-H RAID 06e0 Comet Lake HECI Controller + 06e3 Comet Lake Keyboard and Text (KT) Redirection 06e8 Comet Lake PCH Serial IO I2C Controller #0 06e9 Comet Lake PCH Serial IO I2C Controller #1 06ea Comet Lake PCH Serial IO I2C Controller #2 06eb Comet Lake PCH Serial IO I2C Controller #3 06ed Comet Lake USB 3.1 xHCI Host Controller 06ef Comet Lake PCH Shared SRAM - 06f0 Wi-Fi 6 AX201 + 06f0 Comet Lake PCH CNVi WiFi + 8086 0034 Wireless-AC 9560 + 8086 0074 Wi-Fi 6 AX201 160MHz + 8086 02a4 Wireless-AC 9462 06f9 Comet Lake PCH Thermal Controller 06fb Comet Lake PCH Serial IO SPI Controller #2 0700 CE Media Processor A/V Bridge @@ -24091,7 +25814,8 @@ 0703 CE Media Processor Media Control Unit 1 0704 CE Media Processor Video Capture Interface 0707 CE Media Processor SPI Slave - 0708 CE Media Processor 4100 + 0708 Atom Processor CE 4100 + 0709 Atom Processor CE 4200 0800 Moorestown SPI Ctrl 0 0801 Moorestown SPI Ctrl 1 0802 Moorestown I2C 0 @@ -24377,6 +26101,7 @@ 8086 8370 Dual Band Wireless AC 3160 # PowerVR SGX 545 08cf Atom Processor Z2760 Integrated Graphics Controller + 0931 Atom Processor CE 2600 [Puma 6] 0934 Quark SoC X1000 I2C Controller and GPIO Controller 0935 Quark SoC X1000 SPI Controller 0936 Quark SoC X1000 HS-UART @@ -24540,7 +26265,7 @@ 1d49 4714 Thinksystem Intel P4600 NVMe AIC 1d49 4802 Thinksystem U.2 P4510 NVMe SSD 1d49 4812 Thinksystem U.2 P4610 NVMe SSD - 8086 4308 Intel SSD D5-P4320 and D5-P4326 + 8086 4308 SSD D5-P4320 and D5-P4326 8086 4702 NVMe Datacenter SSD [3DNAND] SE 2.5" U.2 (P4500) 8086 4704 NVMe Datacenter SSD [3DNAND] SE AIC (P4500) 8086 4712 NVMe Datacenter SSD [3DNAND] ME 2.5" U.2 (P4600) @@ -24556,7 +26281,9 @@ 1028 1fe7 Express Flash NVMe 3.2TB 2.5" U.2 (P4600) 1028 1fe8 Express Flash NVMe 2.0TB HHHL AIC (P4600) 1028 1fe9 Express Flash NVMe 4.0TB HHHL AIC (P4600) - 0b60 NVMe DC SSD [3DNAND, Beta Rock Controller] + 0b26 Thunderbolt 4 Bridge [Goshen Ridge 2020] + 0b27 Thunderbolt 4 USB Controller [Goshen Ridge 2020] + 0b60 NVMe DC SSD [3DNAND, Sentinel Rock Controller] 1028 2060 NVMe SED MU U.2 1.6TB (P5600) 1028 2061 NVMe SED MU U.2 3.2TB (P5600) 1028 2062 NVMe SED MU U.2 6.4TB (P5600) @@ -24569,6 +26296,18 @@ 1028 2102 NVMe RI U.2 1.92TB (P5500) 1028 2103 NVMe RI U.2 3.84TB (P5500) 1028 2104 NVMe RI U.2 7.68TB (P5500) + 1028 219a NVMe P5316 RI 15.36TB + 1028 219b NVMe P5316 RI 30.72TB + 1028 219c NVMe SED P5316 RI 15.36 + 1028 219d NVMe SED P5316 RI 30.72 + 1028 219e NVMe FIPS P5316 RI 15.36TB + 1028 219f NVMe FIPS P5316 RI 30.72 + 8086 8008 NVMe Datacenter SSD [3DNAND] SE 2.5" U.2 (P5510) + 8086 8d08 NVMe Datacenter SSD [3DNAND] VE 2.5" U.2 (P5316) + 8086 8d1d NVMe Datacenter SSD [3DNAND] VE E1.L 9.5/18mm (P5316) + 8086 c008 NVMe Datacenter SSD [3DNAND] SE U.2 15mm (P5530) + 0bd0 Ponte Vecchio 2T + 0bd5 Ponte Vecchio 1T 0be0 Atom Processor D2xxx/N2xxx Integrated Graphics Controller 0be1 Atom Processor D2xxx/N2xxx Integrated Graphics Controller 105b 0d7c D270S/D250S Motherboard @@ -24596,6 +26335,9 @@ 0bf6 Atom Processor D2xxx/N2xxx DRAM Controller 0bf7 Atom Processor D2xxx/N2xxx DRAM Controller 0c00 4th Gen Core Processor DRAM Controller + 1028 05d7 Alienware X51 R2 + 103c 1998 EliteDesk 800 G1 + 17aa 3098 ThinkCentre E73 17aa 309f ThinkCentre M83 0c01 Xeon E3-1200 v3/4th Gen Core Processor PCI Express x16 Controller 0c04 Xeon E3-1200 v3/4th Gen Core Processor DRAM Controller @@ -24605,8 +26347,10 @@ 0c08 Xeon E3-1200 v3 Processor DRAM Controller 0c09 Xeon E3-1200 v3/4th Gen Core Processor PCI Express x4 Controller 0c0c Xeon E3-1200 v3/4th Gen Core Processor HD Audio Controller + 103c 1998 EliteDesk 800 G1 17aa 220e ThinkPad T440p 17aa 309f ThinkCentre M83 + 0c40 Atom Processor CE 5300 0c46 Atom Processor S1200 PCI Express Root Port 1 0c47 Atom Processor S1200 PCI Express Root Port 2 0c48 Atom Processor S1200 PCI Express Root Port 3 @@ -24665,6 +26409,17 @@ 8086 0000 Ethernet Controller XXV710 Intel(R) FPGA Programmable Acceleration Card N3000 for Networking 8086 0001 Ethernet Controller XXV710 Intel(R) FPGA Programmable Acceleration Card N3000 for Networking 0d9f Ethernet Controller (2) I225-IT + 0dd2 Ethernet Network Adapter I710 + 1137 0000 I710T4LG 4x1 GbE RJ45 PCIe NIC + 1137 02e3 I710T4LG 4x1 GbE RJ45 PCIe NIC + 8086 0000 Ethernet Network Adapter I710-T4L + 8086 000d Ethernet Network Adapter I710-T4L + 8086 0010 Ethernet Network Adapter I710-T4L for OCP 3.0 + 8086 401a Ethernet Network Adapter I710-T4L + 8086 401b Ethernet Network Adapter I710-T4L for OCP 3.0 + 0dd5 Ethernet Adaptive Virtual Function + 0dda Ethernet Connection X722 for 10GbE SFP+ + 1bd4 0076 Ethernet Connection F102IX722 for 10GbE SFP 0e00 Xeon E7 v2/Xeon E5 v2/Core i7 DMI2 1028 04f7 Xeon E5 v2 on PowerEdge R320 server 15d9 066b X9SRL-F @@ -24838,7 +26593,7 @@ 0f0a Atom Processor Z36xxx/Z37xxx Series LPIO1 HSUART Controller #1 0f0c Atom Processor Z36xxx/Z37xxx Series LPIO1 HSUART Controller #2 0f0e Atom Processor Z36xxx/Z37xxx Series LPIO1 SPI Controller - 0f12 Atom Processor E3800 Series SMBus Controller + 0f12 Atom Processor E3800/CE2700 Series SMBus Controller 0f14 Atom Processor Z36xxx/Z37xxx Series SDIO Controller 0f15 Atom Processor Z36xxx/Z37xxx Series SDIO Controller 0f16 Atom Processor Z36xxx/Z37xxx Series SDIO Controller @@ -25345,7 +27100,8 @@ 103c 2159 Ethernet 10Gb 2-port 562i Adapter 108e 7b11 Ethernet Server Adapter X520-2 1170 004c 82599 DP 10G Mezzanine Adapter - 15d9 0611 AOC-STGN-I2S [REV 1.01] + 1374 1a08 PE310G4SPI9/PE310G4SPI9L/PE310G4SPI9LA Quad Port Fiber 10 Gigabit Ethernet PCI Express Server Adapter + 15d9 0611 AOC-STGN-i2S 1734 11a9 10 Gigabit Dual Port Network Connection 17aa 1071 ThinkServer X520-2 AnyFabric 17aa 4007 82599ES 10-Gigabit SFI/SFP+ Network Connection @@ -25356,6 +27112,7 @@ 1bd4 001b 10G SFP+ DP ER102Fi4 Rack Adapter 1bd4 002f 10G SFP+ DP EP102Fi4A Adapter 1bd4 0032 10G SFP+ DP EP102Fi4 Adapter + 1bd4 0067 F102I82599 8086 0002 Ethernet Server Adapter X520-DA2 8086 0003 Ethernet Server Adapter X520-2 8086 0006 Ethernet Server Adapter X520-1 @@ -25382,6 +27139,9 @@ 8086 4532 Desktop Board D815EEA2/D815EFV 8086 4541 D815EEA Motherboard 8086 4557 D815EGEW Mainboard + 1136 Thunderbolt 4 Bridge [Maple Ridge 4C 2020] + 1137 Thunderbolt 4 NHI [Maple Ridge 4C 2020] + 1138 Thunderbolt 4 USB Controller [Maple Ridge 4C 2020] 1161 82806AA PCI64 Hub Advanced Programmable Interrupt Controller 8086 1161 82806AA PCI64 Hub APIC 1162 Xscale 80200 Big Endian Companion Chip @@ -25592,6 +27352,10 @@ 123f 82466GX Integrated Hot-Plug Controller (IHPC) 1240 82752 (752) AGP Graphics Accelerator 124b 82380FB (MPCI2) Mobile Docking Controller + 124c Ethernet Connection E823-L for backplane + 124d Ethernet Connection E823-L for SFP + 124e Ethernet Connection E823-L/X557-AT 10GBASE-T + 124f Ethernet Connection E823-L 1GbE 1250 430HX - 82439HX TXC [Triton II] 1360 82806AA PCI64 Hub PCI Bridge 1361 82806AA PCI64 Hub Controller (HRes) @@ -25611,6 +27375,7 @@ 1503 82579V Gigabit Network Connection 1043 849c P8P67 Deluxe Motherboard 10cf 161c LIFEBOOK E752 + 8086 200d DH61CR motherboard 1507 Ethernet Express Module X520-P2 1508 82598EB Gigabit BX Network Connection 1509 82580 Gigabit Network Connection @@ -25643,6 +27408,7 @@ 151b CVL2510 Thunderbolt Controller [Light Peak 2C 2010] 151c 82599 10 Gigabit TN Network Connection 108e 7b13 Dual 10GBASE-T LP + 151d Ethernet Connection E823-L for QSFP 1520 I350 Ethernet Controller Virtual Function 1521 I350 Gigabit Network Connection 1028 0602 Gigabit 2P I350-t LOM @@ -25671,14 +27437,18 @@ 1093 775b PCIe-8237 Ethernet Adapter 10a9 802a UV2-BaseIO dual-port GbE 1137 023e 1GigE I350 LOM + 15d9 0000 AOC-SGP-i4 15d9 0652 Dual Port i350 GbE MicroLP [AOC-CGP-i2] 17aa 1074 ThinkServer I350-T4 AnyFabric 17aa 4005 I350 Gigabit Network Connection 18d4 0c07 I350 1Gb 2-port RJ45 OCP Mezz Card MOP41-I-1GT2 193d 1005 360T-B 193d 1007 360T-L +# NIC-ETH360T-3S-4P OCP3.0 4x1G Base-T Card + 193d 1080 NIC-ETH360T-3S-4P 1bd4 001d 1G base-T QP EP014Ti1 Adapter 1bd4 0035 1G base-T QP EP014Ti1 Adapter + 1bd4 0066 F014I350 8086 0001 Ethernet Server Adapter I350-T4 8086 0002 Ethernet Server Adapter I350-T2 8086 0003 Ethernet Network Adapter I350-T4 for OCP NIC 3.0 @@ -25686,6 +27456,7 @@ 8086 00a2 Ethernet Server Adapter I350-T2 8086 00a3 Ethernet Network Adapter I350-T4 for OCP NIC 3.0 8086 00aa Ethernet Network Adapter I350-T4 for OCP NIC 3.0 + 8086 4017 Ethernet Network Adapter I350-T4 for OCP NIC 3.0 8086 5001 Ethernet Server Adapter I350-T4 8086 5002 Ethernet Server Adapter I350-T2 8086 5003 Ethernet 1G 4P I350-t OCP @@ -25745,6 +27516,7 @@ 1530 X540 Virtual Function 1531 I210 Gigabit Unprogrammed 1533 I210 Gigabit Network Connection + 1028 0b35 I210 Gigabit Network Connection 103c 0003 Ethernet I210-T1 GbE NIC 1059 0180 RD10019 1GbE interface 1093 7706 Compact Vision System Ethernet Adapter @@ -25766,6 +27538,7 @@ 1539 I211 Gigabit Network Connection 153a Ethernet Connection I217-LM 103c 1909 ZBook 15 + 103c 1998 EliteDesk 800 G1 17aa 220e ThinkPad T440p 17aa 309f ThinkCentre M83 153b Ethernet Connection I217-V @@ -25828,6 +27601,7 @@ 156f Ethernet Connection I219-LM 1028 06dc Latitude E7470 103c 8079 EliteBook 840 G3 + 17aa 2247 ThinkPad T570 1570 Ethernet Connection I219-V 1571 Ethernet Virtual Function 700 Series 1572 Ethernet Controller X710 for 10GbE SFP+ @@ -25846,7 +27620,15 @@ 17aa 0000 ThinkServer X710 AnyFabric for 10GbE SFP+ 17aa 4001 ThinkServer X710-4 AnyFabric for 10GbE SFP+ 17aa 4002 ThinkServer X710-2 AnyFabric for 10GbE SFP+ + 193d 1020 NIC-ETH561F-sL-4x10G + 193d 1021 NIC-ETH561F-sL-2x10G +# NIC-ETH561F-3S-2P OCP3.0 2x10G SFP+ Card + 193d 1081 NIC-ETH561F-3S-2P 19e5 d11c Ethernet 2-port X710 10Gb SFP+ Adapter SP330 + 1bd4 0042 10G SFP+ DP EP102Fi4 Adapter + 1bd4 0056 Ethernet Network Adapter X710-BM2 for OCP NIC 3.0 + 1bd4 0065 F102IX710 + 1bd4 0074 Ethernet Network Adapter X710-BM2 for lldp 8086 0000 Ethernet Converged Network Adapter X710 8086 0001 Ethernet Converged Network Adapter X710-4 8086 0002 Ethernet Converged Network Adapter X710-4 @@ -25878,6 +27660,7 @@ 1577 DSL6540 Thunderbolt 3 NHI [Alpine Ridge 4C 2015] 1578 DSL6540 Thunderbolt 3 Bridge [Alpine Ridge 4C 2015] 157b I210 Gigabit Network Connection + ea50 cc10 RXi2-BP 157c I210 Gigabit Backplane Connection 157d DSL5110 Thunderbolt 2 NHI (Low Power) [Win Ridge 2C 2014] 157e DSL5110 Thunderbolt 2 Bridge (Low Power) [Win Ridge 2C 2014] @@ -25890,6 +27673,7 @@ 1059 0170 RD-01213 10GbE interface 1590 0000 Ethernet 2-port 563i Adapter 1590 00f8 Ethernet 2-port 563i Adapter + 193d 100e NIC-ETH561i-Mb-4x10G 8086 0000 Ethernet Converged Network Adapter XL710-Q2 1583 Ethernet Controller XL710 for 40GbE QSFP+ 1028 0000 Ethernet 40G 2P XL710 QSFP+ rNDC @@ -25970,35 +27754,60 @@ 8086 0008 Ethernet Network Adapter OCP XXV710-1 8086 0009 Ethernet 25G 2P XXV710 Adapter 8086 000a Ethernet 25G 2P XXV710 OCP - 8086 000c Ethernet Network Adapter XXV710-DA2 for OCP 3.0 8086 4001 Ethernet Network Adapter XXV710-2 1591 Ethernet Controller E810-C for backplane 1592 Ethernet Controller E810-C for QSFP 1137 02bf E810CQDA2 2x100 GbE QSFP28 PCIe NIC + 193d 1050 NIC-ETH1060F-LP-2P 2x100GbE Ethernet PCIe Card + 8086 0001 Ethernet Network Adapter E810-C-Q1 8086 0002 Ethernet Network Adapter E810-C-Q2 8086 0004 Ethernet Network Adapter E810-C-Q2 8086 0005 Ethernet Network Adapter E810-C-Q1 for OCP3.0 8086 0006 Ethernet Network Adapter E810-C-Q2 for OCP3.0 8086 0009 Ethernet Network Adapter E810-C-Q1 8086 000a Ethernet Network Adapter E810-C-Q1 for OCP + 8086 000b Ethernet 100G 2P E810-C Adapter + 8086 000c Ethernet 100G 2P E810-C OCP + 8086 000d Ethernet Network Adapter E810-L-Q2 for OCP 3.0 + 8086 000e Ethernet Network Adapter E810-2C-Q2 + 8086 000f Ethernet Network Adapter E810-C-Q2T + 8086 0010 Ethernet 100G 2P E810-C-stg Adapter + 8086 0011 Ethernet Network Adapter E810-C-Q1 for OCP3.0 1593 Ethernet Controller E810-C for SFP 1137 02c3 E810XXVDA4 4x25/10 GbE SFP28 PCIe NIC + 1137 02e9 E810XXVDA4TG 4x25/10 GbE SFP28 PCIe NIC + 1137 02ea E810XXVDA4T 4x25/10 GbE SFP28 PCIe NIC 8086 0002 Ethernet Network Adapter E810-L-2 8086 0005 Ethernet Network Adapter E810-XXV-4 8086 0006 Ethernet Network Adapter E810-XXV-4 8086 0007 Ethernet Network Adapter E810-XXV-4 8086 0008 Ethernet Network Adapter E810-XXV-2 8086 0009 Ethernet Network Adapter E810-XXV-2 for OCP 2.0 + 8086 000a Ethernet 25G 4P E810-XXV Adapter + 8086 000c Ethernet Network Adapter E810-XXV-4 for OCP 3.0 + 8086 000d Ethernet 25G 4P E810-XXV OCP + 8086 000e Ethernet Network Adapter E810-XXV-4T + 8086 000f Ethernet 25G 4P E810-XXV-stg Adapter + 8086 0010 Ethernet 25G 4P E810-XXV-st Adapter + 8086 4010 Ethernet Network Adapter E810-XXV-4 + 8086 4013 Ethernet Network Adapter E810-XXV-4 for OCP 3.0 1599 Ethernet Controller E810-XXV for backplane + 8086 0001 Ethernet 25G 2P E810-XXV-k Mezz 159a Ethernet Controller E810-XXV for QSFP 159b Ethernet Controller E810-XXV for SFP 1137 02be E810XXVDA2 2x25/10 GbE SFP28 PCIe NIC + 1bd4 0057 Ethernet Network Adapter E810-XXVAM2 + 1bd4 0058 Ethernet Network Adapter E810-XXVAM2 for OCP 3.0 + 1bd4 006e Ethernet Network Adapter E810-XXVAM2 for BD + 1eec 0102 VSE250241E Dual-port 10Gb/25Gb Ethernet PCIe 8086 0001 Ethernet 25G 2P E810-XXV OCP 8086 0002 Ethernet 25G 2P E810-XXV Adapter 8086 0003 Ethernet Network Adapter E810-XXV-2 8086 0005 Ethernet Network Adapter E810-XXV-2 for OCP 3.0 8086 4001 Ethernet Network Adapter E810-XXV-2 8086 4002 Ethernet Network Adapter E810-XXV-2 for OCP 3.0 + 8086 4003 Ethernet Network Adapter E810-XXV-2 + 8086 4015 Ethernet Network Adapter E810-XXV-2 for OCP 3.0 15a0 Ethernet Connection (2) I218-LM 15a1 Ethernet Connection (2) I218-V 15a2 Ethernet Connection (3) I218-LM @@ -26022,6 +27831,7 @@ 15b6 DSL6540 USB 3.1 Controller [Alpine Ridge] 15b7 Ethernet Connection (2) I219-LM 15b8 Ethernet Connection (2) I219-V + 1462 7a72 H270 PC MATE 15b9 Ethernet Connection (3) I219-LM 15bb Ethernet Connection (7) I219-LM 15bc Ethernet Connection (7) I219-V @@ -26050,7 +27860,7 @@ 15d3 JHL6540 Thunderbolt 3 Bridge (C step) [Alpine Ridge 4C 2016] 15d4 JHL6540 Thunderbolt 3 USB Controller (C step) [Alpine Ridge 4C 2016] 15d5 Ethernet SDI Adapter FM10420-25GbE-DA2 - 8086 0001 Intel(R) Ethernet SDI Adapter FM10420-25GbE-DA2 + 8086 0001 Ethernet SDI Adapter FM10420-25GbE-DA2 15d6 Ethernet Connection (5) I219-V 15d7 Ethernet Connection (4) I219-LM 15d8 Ethernet Connection (4) I219-V @@ -26072,11 +27882,16 @@ 15e9 JHL7540 Thunderbolt 3 USB Controller [Titan Ridge 2C 2018] 15ea JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] 15eb JHL7540 Thunderbolt 3 NHI [Titan Ridge 4C 2018] + 1028 09be Latitude 7410 15ec JHL7540 Thunderbolt 3 USB Controller [Titan Ridge 4C 2018] + 1028 09be Latitude 7410 15ef JHL7540 Thunderbolt 3 Bridge [Titan Ridge DD 2018] 15f0 JHL7540 Thunderbolt 3 USB Controller [Titan Ridge DD 2018] - 15f2 Intel(R) Ethernet Controller I225-LM - 15f3 Intel(R) Ethernet Controller I225-V + 15f2 Ethernet Controller I225-LM + 8086 0001 Ethernet Network Adapter I225-T1 + 8086 0002 Ethernet Network Adapter I225-T1 + 15f3 Ethernet Controller I225-V + 8086 0003 Intel(R) Ethernet Controller (3) I225-V 15f4 Ethernet Connection (15) I219-LM 15f5 Ethernet Connection (15) I219-V 15f6 I210 Gigabit Ethernet Connection @@ -26088,6 +27903,10 @@ 1137 0000 X710TLG GbE RJ45 PCIe NIC 1137 02c1 X710T2LG 2x10 GbE RJ45 PCIe NIC 1137 02c2 X710T4LG 4x10 GbE RJ45 PCIe NIC + 1137 02d9 Ethernet Network Adapter X710-T2L OCP 3.0 + 1137 02da Ethernet Network Adapter X710-T4L OCP 3.0 +# NIC-ETH565T-3S-2P OCP3.0 2x10G Base-T Card + 193d 1082 NIC-ETH565T-3S-2P 8086 0000 Ethernet Network Adapter X710-TL 8086 0001 Ethernet Network Adapter X710-T4L 8086 0002 Ethernet Network Adapter X710-T4L @@ -26102,6 +27921,10 @@ 8086 000b Ethernet Network Adapter X710-T2L for OCP 3.0 8086 000c Ethernet Network Adapter X710-T2L for OCP 3.0 8086 000f Ethernet Network Adapter X710-T2L for OCP 3.0 + 8086 4009 Ethernet Network Adapter X710-T2L + 8086 4012 Ethernet Network Adapter X710-T4L for OCP 3.0 + 8086 4018 Ethernet Network Adapter X710-T2L for OCP 3.0 + 8086 4019 Ethernet Network Adapter X710-T4L 1600 Broadwell-U Host Bridge -OPI 1601 Broadwell-U PCI Express x16 Controller 1602 Broadwell-U Integrated Graphics @@ -26141,21 +27964,35 @@ 163d Broadwell-U Integrated Graphics 163e Broadwell-U Integrated Graphics 1889 Ethernet Adaptive Virtual Function + 1890 Ethernet Connection E822-C for backplane + 1891 Ethernet Connection E822-C for QSFP + 1892 Ethernet Connection E822-C for SFP + 1893 Ethernet Connection E822-C/X557-AT 10GBASE-T + 1894 Ethernet Connection E822-C 1GbE + 1897 Ethernet Connection E822-L for backplane + 1898 Ethernet Connection E822-L for SFP + 1899 Ethernet Connection E822-L/X557-AT 10GBASE-T + 189a Ethernet Connection E822-L 1GbE 18a0 C4xxx Series QAT 18a1 C4XXX Series QAT Virtual Function + 18ee 200xx Series QAT + 18ef 200xx Series QAT Virtual Function 1900 Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Host Bridge/DRAM Registers - 1901 Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor PCIe Controller (x16) + 1901 6th-10th Gen Core Processor PCIe Controller (x16) 1902 HD Graphics 510 1903 Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Thermal Subsystem 1028 06d6 Latitude 7275 tablet 1028 06dc Latitude E7470 1028 06e4 XPS 15 9550 + 1028 06e6 Latitude 11 5175 2-in-1 + 1028 09be Latitude 7410 103c 825b OMEN-17-w001nv 17aa 225d ThinkPad T480 1904 Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Host Bridge/DRAM Registers 1028 06dc Latitude E7470 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 + 17aa 2247 ThinkPad T570 17aa 382a B51-80 Laptop 1905 Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor PCIe Controller (x8) 1906 HD Graphics 510 @@ -26164,12 +28001,15 @@ 1909 Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor PCIe Controller (x4) 190c Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Host Bridge/DRAM Registers 1028 06d6 Latitude 7275 tablet + 1028 06e6 Latitude 11 5175 2-in-1 190f Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Host Bridge/DRAM Registers 1910 Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Host Bridge/DRAM Registers 1028 06e4 XPS 15 9550 103c 825b OMEN-17-w001nv 1911 Xeon E3-1200 v5/v6 / E3-1500 v5 / 6th/7th/8th Gen Core Processor Gaussian Mixture Model 1028 0869 Vostro 3470 + 1028 09be Latitude 7410 + 1462 7a72 H270 PC MATE 17aa 2247 ThinkPad T570 17aa 224f ThinkPad X1 Carbon 5th Gen 17aa 225d ThinkPad T480 @@ -26178,15 +28018,18 @@ 1028 06dc Latitude E7470 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 + 17aa 2247 ThinkPad T570 1918 Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Host Bridge/DRAM Registers 1919 Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Imaging Unit 1028 06d6 Latitude 7275 tablet + 1028 06e6 Latitude 11 5175 2-in-1 191b HD Graphics 530 1028 06e4 XPS 15 9550 103c 825b OMEN-17-w001nv 191d HD Graphics P530 191e HD Graphics 515 1028 06d6 Latitude 7275 tablet + 1028 06e6 Latitude 11 5175 2-in-1 191f Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Host Bridge/DRAM Registers 1921 HD Graphics 520 1926 Iris Graphics 540 @@ -26272,6 +28115,7 @@ 19df Atom Processor C3000 Series SMBus controller 19e0 Atom Processor C3000 Series SPI Controller 19e2 Atom Processor C3000 Series QuickAssist Technology + 19e3 Atom Processor C3000 Series QuickAssist Technology Virtual Function 1a1c Ethernet Connection (17) I219-LM 1a1d Ethernet Connection (17) I219-V 1a1e Ethernet Connection (16) I219-LM @@ -26298,6 +28142,7 @@ 1c02 6 Series/C200 Series Chipset Family 6 port Desktop SATA AHCI Controller 1028 04aa XPS 8300 1043 844d P8 series motherboard + 8086 200d DH61CR motherboard 8086 7270 Server Board S1200BT Family 1c03 6 Series/C200 Series Chipset Family 6 port Mobile SATA AHCI Controller 1028 04a3 Precision M4600 @@ -26343,11 +28188,14 @@ 1028 04aa XPS 8300 1028 04b2 Vostro 3350 1028 04da Vostro 3750 +# Realtek ALC656 + 103c 2abf HP Pavilion p6-2100 Desktop PC Series 1043 8418 P8P67 Deluxe Motherboard 1043 841b P8H67 Series Motherboard 17aa 21cf ThinkPad T520 # Realtek ALC888 audio codec 8086 2008 DQ67SW board + 8086 200d DH61CR motherboard 8086 7270 Apple MacBookPro8,2 [Core i7, 15", 2011] 1c22 6 Series/C200 Series Chipset Family SMBus Controller 1028 04a3 Precision M4600 @@ -26356,6 +28204,7 @@ 1028 04da Vostro 3750 1043 844d P8 series motherboard 17aa 21cf ThinkPad T520 + 8086 200d DH61CR motherboard 8086 7270 Server Board S1200BT Family / Apple MacBook Pro 8,1/8,2 1c24 6 Series/C200 Series Chipset Family Thermal Management Controller 1c25 6 Series/C200 Series Chipset Family DMI to PCI Bridge @@ -26366,6 +28215,7 @@ 1028 04da Vostro 3750 1043 844d P8 series motherboard 17aa 21cf ThinkPad T520 + 8086 200d DH61CR motherboard 8086 7270 Server Board S1200BT Family / Apple MacBook Pro 8,1/8,2 1c27 6 Series/C200 Series Chipset Family USB Universal Host Controller #1 8086 7270 Apple MacBookPro8,2 [Core i7, 15", 2011] @@ -26378,6 +28228,7 @@ 1028 04da Vostro 3750 1043 844d P8 series motherboard 17aa 21cf ThinkPad T520 + 8086 200d DH61CR motherboard 8086 7270 Server Board S1200BT Family / Apple MacBook Pro 8,1/8,2 1c33 6 Series/C200 Series Chipset Family LAN Controller 1c35 6 Series/C200 Series Chipset Family VECI Controller @@ -26388,6 +28239,7 @@ 1028 04da Vostro 3750 1043 844d P8 series motherboard 17aa 21cf ThinkPad T520 + 8086 200d DH61CR motherboard 8086 7270 Apple MacBookPro8,2 [Core i7, 15", 2011] 1c3b 6 Series/C200 Series Chipset Family MEI Controller #2 1c3c 6 Series/C200 Series Chipset Family IDE-r Controller @@ -26431,6 +28283,7 @@ 1c5a Upgraded Q67 Express Chipset LPC Controller 1c5b 6 Series/C200 Series Chipset Family LPC Controller 1c5c H61 Express Chipset LPC Controller + 8086 200d DH61CR motherboard 1c5d 6 Series/C200 Series Chipset Family LPC Controller 1c5e 6 Series/C200 Series Chipset Family LPC Controller 1c5f 6 Series/C200 Series Chipset Family LPC Controller @@ -26470,6 +28323,7 @@ 15d9 066b X9SRL-F 1d2d C600/X79 series chipset USB2 Enhanced Host Controller #2 1028 04f7 C602J on PowerEdge R320 server + 103c 18a9 HP DL360e G8 15d9 066b X9SRL-F 1d33 C600/X79 series chipset LAN Controller 1d35 C600/X79 series chipset VECI Controller @@ -26696,6 +28550,7 @@ 1f26 Atom processor C2000 RAID SATA2 Controller 1f27 Atom processor C2000 RAID SATA2 Controller 1f2c Atom processor C2000 USB Enhanced Host Controller + 0200 1028 Atom C2338 on Dell 0K8Y0N motherboard 1f2e Atom processor C2000 RAID SATA2 Controller 1f2f Atom processor C2000 RAID SATA2 Controller 1f30 Atom processor C2000 2-Port IDE SATA3 Controller @@ -26893,6 +28748,7 @@ 147b 0507 TH7II-RAID 8086 4532 Desktop Board D815EEA2/D815EFV 8086 4557 D815EGEW Mainboard + 8086 4d44 D850EMV2 motherboard 8086 5744 S845WD1-E mainboard 2443 82801BA/BAM SMBus Controller 1014 01c6 Netvista A40/A40p @@ -26934,6 +28790,7 @@ 147b 0507 TH7II-RAID 8086 4557 D815EGEW Mainboard 8086 4656 Desktop Board D815EFV + 8086 4d44 D850EMV2 motherboard 2446 82801BA/BAM AC'97 Modem Controller 1025 1016 Travelmate 612 TX 104d 80df Vaio PCG-FX403 @@ -27008,6 +28865,7 @@ 15d9 3280 Supermicro P4SBE Mainboard 8086 4532 Desktop Board D815EEA2/D815EFV 8086 4557 D815EGEW Mainboard + 8086 4d44 D850EMV2 motherboard 8086 5744 S845WD1-E mainboard 244c 82801BAM ISA Bridge (LPC) 244e 82801 PCI Bridge @@ -27510,6 +29368,8 @@ 1cb8 0002 Omni-Path HFI Adapter 100 Series, 1 Port, PCIe x16, TC6600 Fixed Port 1cb8 0003 Omni-Path HFI Adapter 100 Series, 2 Port, 2 PCIe x16, Earth Simulation QSFP28 1cb8 0004 Omni-Path HFI Adapter 100 Series, 1 Port, PCIe x16, TC4600E QSFP28 + 434e 0001 Omni-Path HFI Adapter 100 Series, 1 Port, OCP 3.0 + 434e 2628 Omni-Path HFI Adapter 100 Series, 1 Port, PCIe x16 8086 2628 Omni-Path HFI Adapter 100 Series, 1 Port, PCIe x16 8086 2629 Omni-Path HFI Adapter 100 Series, 1 Port, PCIe x8 8086 262a Omni-Path HFI Adapter 100 Series, 2 Ports, Split PCIe x16 @@ -27538,6 +29398,9 @@ 250f 82820 820 (Camino) Chipset AGP Bridge 2520 82805AA MTH Memory Translator Hub 2521 82804AA MRH-S Memory Repeater Hub for SDRAM + 2522 NVMe Optane Memory Series + 8086 3806 Optane Memory 16GB + 8086 3810 Optane Memory M10 16GB 2526 Wireless-AC 9260 2530 82850 850 (Tehama) Chipset Host Bridge (MCH) 1028 00c7 Dimension 8100 @@ -27628,6 +29491,7 @@ 103c 0934 Compaq nw8240/nx8220 103c 0944 Compaq nc6220 Notebook PC 103c 099c NX6110/NC6120 + 1043 82d9 Asus Eee PC 900 104d 81b7 Vaio VGN-S3XP a304 81b7 Vaio VGN-S3XP e4bf 0ccd CCD-CALYPSO @@ -28043,7 +29907,22 @@ 8086 3904 NVMe Datacenter SSD [Optane] x4 AIC (P4800X) 8086 3905 NVMe Datacenter SSD [Optane] 15mm 2.5" U.2 (P4800X) 2723 Wi-Fi 6 AX200 - 8086 2723 Wireless AX200 + 1a56 1654 Killer™ Wi-Fi 6 AX1650x (AX200NGW) + 8086 0084 Wi-Fi 6 AX200NGW + 2725 Wi-Fi 6 AX210/AX211/AX411 160MHz + 8086 0020 Wi-Fi 6 AX210 160MHz + 8086 0024 Wi-Fi 6 AX210 160MHz + 8086 0090 Wi-Fi 6 AX211 160MHz + 8086 00b0 Wi-Fi 6 AX411 160MHz + 8086 0310 Wi-Fi 6 AX210 160MHz + 8086 0510 Wi-Fi 6 AX210 160MHz + 8086 0a10 Wi-Fi 6 AX210 160MHz + 8086 2020 Wi-Fi 6 AX210 160MHz + 8086 4020 Wi-Fi 6 AX210 160MHz + 8086 6020 Wi-Fi 6 AX210 160MHz + 8086 6024 Wi-Fi 6 AX210 160MHz + 8086 e020 Wi-Fi 6 AX210 160MHz + 8086 e024 Wi-Fi 6 AX210 160MHz 2770 82945G/GZ/P/PL Memory Controller Hub 1028 01ad OptiPlex GX620 103c 2a3b Pavilion A1512X @@ -28070,6 +29949,7 @@ 277c 82975X Memory Controller Hub 1043 8178 P5WDG2 WS Professional motherboard 277d 82975X PCI Express Root Port + 2780 82915G/GV/GL/910GL [Grantsdale] Graphics Device 2782 82915G Integrated Graphics Controller 1043 2582 P5GD1-VW Mainboard 1734 105b Scenic W620 @@ -28419,7 +30299,6 @@ 1775 11cc CC11/CL11 27e2 82801GR/GH/GHM (ICH7 Family) PCI Express Port 6 1775 11cc CC11/CL11 - 280b Intel(R) Display Audio 2810 82801HB/HR (ICH8/R) LPC Interface Controller 1043 81ec P5B 2811 82801HEM (ICH8M-E) LPC Interface Controller @@ -29032,6 +30911,7 @@ 1028 022f Inspiron 1525 103c 30c0 Compaq 6710b 103c 30c1 Compaq 6910p + 103c 30c5 Compaq 8510p 103c 30cc Pavilion dv6700 103c 30d9 Presario C700 1043 1017 X58LE @@ -29087,6 +30967,7 @@ 2a41 Mobile 4 Series Chipset PCI Express Graphics Port e4bf cc4d CCM-BOOGIE 2a42 Mobile 4 Series Chipset Integrated Graphics Controller + 1028 02aa Dell Inspiron 1545 17aa 2112 ThinkPad T400 e4bf cc4d CCM-BOOGIE 2a43 Mobile 4 Series Chipset Integrated Graphics Controller @@ -29144,6 +31025,13 @@ 2b66 Xeon Processor E7 Product Family SMI Physical Port 1: Misc control/status 2b68 Xeon Processor E7 Product Family Last Level Cache Coherence Engine 8 2b6c Xeon Processor E7 Product Family Last Level Cache Coherence Engine 9 + 2b80 Atom CE2700 Series [Puma 7] + 2b98 Puma 7 Trusted Execution Engine + 2bb5 Puma 7 xHCI Controller +# Synopsys DesignWare Core SuperSpeed USB 3.0 Controller + 2bb7 Puma 7 USB Device Controller (OTG) + 2bdc Puma 7 Thermal + 2be2 Puma 7 Security Processor 2c01 Xeon 5500/Core i7 QuickPath Architecture System Address Decoder 2c10 Xeon 5500/Core i7 QPI Link 0 2c11 Xeon 5500/Core i7 QPI Physical 0 @@ -29314,6 +31202,7 @@ 2e61 CE Media Processor Video Display Controller 2e62 CE Media Processor Video Processing Unit 2e63 CE Media Processor HDMI Tx Interface + 2e64 Atom CE2600/3100/4100/4200/5300 Security Processor 2e65 CE Media Processor Expansion Bus Interface 2e66 CE Media Processor UART 2e67 CE Media Processor General Purpose I/Os @@ -29494,6 +31383,7 @@ 2ffc Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers 2ffd Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers 2ffe Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers + 3140 Easel/Monette Hill Image Processor [Pixel Visual Core] 3165 Wireless 3165 # Stone Peak 1x1 8086 4010 Dual Band Wireless AC 3165 @@ -29501,16 +31391,19 @@ 8086 4210 Dual Band Wireless AC 3165 3166 Dual Band Wireless-AC 3165 Plus Bluetooth 8086 4210 Dual Band Wireless-AC 3165 - 3184 UHD Graphics 605 - 3185 UHD Graphics 605 + 3184 GeminiLake [UHD Graphics 605] + 3185 GeminiLake [UHD Graphics 600] 318c Celeron/Pentium Silver Processor Dynamic Platform and Thermal Framework Processor Participant 318e Celeron/Pentium Silver Processor NorthPeak + 3190 Celeron/Pentium Silver Processor Gaussian Mixture Model 3192 Gemini Lake P2SB 3197 Celeron/Pentium Silver Processor PCI-default ISA-bridge 3198 Celeron/Pentium Silver Processor High Definition Audio 17aa 380b V130-15IGM Laptop (Lenovo) - Type 81HL 319a Celeron/Pentium Silver Processor Trusted Execution Engine Interface 31a2 Celeron/Pentium Silver Processor Integrated Sensor Solution + 31a8 Celeron/Pentium Silver Processor USB 3.0 xHCI Controller + 1849 31a8 Celeron/Pentium Silver Processor USB 3.0 xHCI Controller 31ac Celeron/Pentium Silver Processor Serial IO I2C Host Controller 31ae Celeron/Pentium Silver Processor Serial IO I2C Host Controller 31bc Celeron/Pentium Silver Processor Serial IO UART Host Controller @@ -29527,6 +31420,11 @@ 31d9 Gemini Lake PCI Express Root Port 31da Gemini Lake PCI Express Root Port 31db Gemini Lake PCI Express Root Port + 31dc Gemini Lake PCH CNVi WiFi + 1a56 1552 Killer(R) Wireless-AC 1550i Wireless Network Adapter (9560NGW) + 8086 0034 Wireless-AC 9560 + 31e3 Celeron/Pentium Silver Processor SATA Controller + 31e8 Celeron/Pentium Silver Processor LPC Controller 31ee Celeron/Pentium Silver Processor Serial IO UART Host Controller 31f0 Gemini Lake Host Bridge 3200 GD31244 PCI-X SATA HBA @@ -29604,6 +31502,7 @@ 3432 5520/5500/X58 Chipset QuickData Technology Device 3433 5520/5500/X58 Chipset QuickData Technology Device 3438 7500/5520/5500/X58 I/O Hub Throttle Registers + 347e Ice Lake Xeon Non-Transparent Bridge 3482 Ice Lake-LP LPC Controller 34a3 Ice Lake-LP SMBus Controller 34a4 Ice Lake-LP SPI Controller @@ -29612,19 +31511,27 @@ 34aa Ice Lake-LP Serial IO SPI Controller #0 34ab Ice Lake-LP Serial IO SPI Controller #1 34b0 Ice Lake-LP PCI Express Root Port #9 + 34b7 Ice Lake-LP PCI Express Root Port #16 + 34ba Ice Lake-LP PCI Express Root Port #3 34bc Ice Lake-LP PCI Express Root Port #5 + 34c4 Ice Lake-LP SD Host Controller 34c5 Ice Lake-LP Serial IO I2c Controller #4 34c6 Ice Lake-LP Serial IO I2c Controller #5 - 34c8 Smart Sound Technology Audio Controller + 34c8 Ice Lake-LP Smart Sound Technology Audio Controller 34d3 Ice Lake-LP SATA Controller [AHCI mode] - 34e0 Management Engine Interface + 34e0 Ice Lake-LP Management Engine 34e8 Ice Lake-LP Serial IO I2C Controller #0 34e9 Ice Lake-LP Serial IO I2C Controller #1 34ea Ice Lake-LP Serial IO I2C Controller #2 34eb Ice Lake-LP Serial IO I2C Controller #3 34ed Ice Lake-LP USB 3.1 xHCI Host Controller - 34f0 Killer Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW) + 34ef Ice Lake-LP DRAM Controller + 34f0 Ice Lake-LP PCH CNVi WiFi + 1a56 1552 Killer(R) Wireless-AC 1550i Wireless Network Adapter (9560NGW) + 8086 0074 Wi-Fi 6 AX201 + 8086 0264 Wireless-AC 9461 34f8 Ice Lake-LP SD Controller + 34fc Ice Lake-LP Integrated Sensor Solution 3500 6311ESB/6321ESB PCI Express Upstream Port 103c 31fe ProLiant DL140 G3 15d9 9680 X7DBN Motherboard @@ -29818,6 +31725,9 @@ 372c Xeon C5500/C3500 Reserved 373f Xeon C5500/C3500 IOxAPIC 37c8 C62x Chipset QuickAssist Technology + 8086 0001 QuickAssist Adapter 8960 + 8086 0002 QuickAssist Adapter 8970 + 37c9 C62x Chipset QuickAssist Technology Virtual Function 37cc Ethernet Connection X722 37cd Ethernet Virtual Function 700 Series 37ce Ethernet Connection X722 for 10GbE backplane @@ -29859,6 +31769,9 @@ 17aa 4025 Ethernet Connection X722 for 10GbE SFP+ 37d4 Ethernet Connection X722 for 10GbE QSFP+ 37d9 X722 Hyper-V Virtual Function + 3882 Ice Lake LPC Controller + 38a4 Ice Lake SPI Controller + 38e0 Ice Lake Management Engine Interface 3a00 82801JD/DO (ICH10 Family) 4-port SATA IDE Controller 3a02 82801JD/DO (ICH10 Family) SATA AHCI Controller 3a05 82801JD/DO (ICH10 Family) SATA RAID Controller @@ -30229,22 +32142,24 @@ 3e18 8th Gen Core 4-core Workstation Processor Host Bridge/DRAM Registers [Coffee Lake S] 3e1f 8th Gen Core 4-core Desktop Processor Host Bridge/DRAM Registers [Coffee Lake S] 1458 5000 Z370 AORUS Gaming K3-CF - 3e30 8th Gen Core 8-core Desktop Processor Host Bridge/DRAM Registers [Coffee Lake S] + 3e30 8th/9th Gen Core 8-core Desktop Processor Host Bridge/DRAM Registers [Coffee Lake S] 3e33 8th/9th Gen Core Processor Host Bridge/DRAM Registers [Coffee Lake] 3e34 Coffee Lake HOST and DRAM Controller + 3e35 Coffee Lake Host Bridge/DRAM Registers 3e81 8th Gen Core Processor PCIe Controller (x16) 3e85 8th Gen Core Processor PCIe Controller (x8) 3e89 8th Gen Core Processor PCIe Controller (x4) - 3e91 8th Gen Core Processor Gaussian Mixture Model - 3e92 UHD Graphics 630 (Desktop) + 3e90 CoffeeLake-S GT1 [UHD Graphics 610] + 3e91 CoffeeLake-S GT2 [UHD Graphics 630] + 3e92 CoffeeLake-S GT2 [UHD Graphics 630] 1028 0869 Vostro 3470 - 3e93 UHD Graphics 610 - 3e96 HD Graphics P630 - 3e98 UHD Graphics 630 (Desktop 9 Series) - 3e9b UHD Graphics 630 (Mobile) - 3ea0 UHD Graphics 620 (Whiskey Lake) + 3e93 CoffeeLake-S GT1 [UHD Graphics 610] + 3e96 CoffeeLake-S GT2 [UHD Graphics P630] + 3e98 CoffeeLake-S GT2 [UHD Graphics 630] + 3e9b CoffeeLake-H GT2 [UHD Graphics 630] + 3ea0 WhiskeyLake-U GT2 [UHD Graphics 620] 1028 089e Inspiron 5482 - 3ea5 Iris Plus Graphics 655 + 3ea5 CoffeeLake-U GT3e [Iris Plus Graphics 655] 3ec2 8th Gen Core Processor Host Bridge/DRAM Registers 1028 0869 Vostro 3470 1043 8694 PRIME H310M-D @@ -30272,6 +32187,7 @@ 4032 5400 Chipset IOxAPIC 4035 5400 Chipset FBD Registers 4036 5400 Chipset FBD Registers + 4041 NVMe Datacenter SSD [Optane] 4100 Moorestown Graphics and Video 4108 Atom Processor E6xx Integrated Graphics Controller 4109 Atom Processor E6xx Integrated Graphics Controller @@ -30285,6 +32201,13 @@ 4115 Atom Processor E6xx PCI Host Bridge #2 4116 Atom Processor E6xx PCI Host Bridge #3 4117 Atom Processor E6xx PCI Host Bridge #4 + 4140 NVMe Datacenter SSD [Optane] + 1028 2134 NVMe Datacenter SSD [Optane] SED 400GB 2.5" U.2 (P5800X) + 1028 2135 NVMe Datacenter SSD [Optane] SED 800GB 2.5" U.2 (P5800X) + 1028 2136 NVMe Datacenter SSD [Optane] SED 1.6TB 2.5" U.2 (P5800X) + 1028 2137 NVMe Datacenter SSD [Optane] 400GB 2.5" U.2 (P5800X) + 1028 2138 NVMe Datacenter SSD [Optane] 800GB 2.5" U.2 (P5800X) + 1028 2139 NVMe Datacenter SSD [Optane] 1.6TB 2.5" U.2 (P5800X) 4220 PRO/Wireless 2200BG [Calexico2] Network Connection 103c 0934 Compaq nw8240/nx8220 103c 12f6 nc6120/nc6220/nw8240/nx8220 @@ -30374,9 +32297,71 @@ 8086 1216 WiMAX/WiFi Link 5150 ABG 8086 1311 WiMAX/WiFi Link 5150 AGN 8086 1316 WiMAX/WiFi Link 5150 ABG + 438b Tiger Lake-H LPC/eSPI Controller + 43a3 Tiger Lake-H SMBus Controller + 43a4 Tiger Lake-H SPI Controller + 43b0 Tiger Lake-H PCI Express Root Port #9 + 43bc Tiger Lake-H PCI Express Root Port #5 + 43c8 Tiger Lake-H HD Audio Controller + 43e0 Tiger Lake-H Management Engine Interface + 43e8 Tiger Lake-H Serial IO I2C Controller #0 + 43ed Tiger Lake-H USB 3.2 Gen 2x1 xHCI Host Controller + 43ef Tiger Lake-H Shared SRAM + 43f0 Tiger Lake PCH CNVi WiFi + 8086 0034 Wireless-AC 9560 + 8086 0074 Wi-Fi 6 AX201 160MHz + 8086 0264 Wireless-AC 9461 + 8086 02a4 Wireless-AC 9462 444e Turbo Memory Controller + 460d 12th Gen Core Processor PCI Express x16 Controller #1 + 461d Alder Lake Innovation Platform Framework Processor Participant + 461e Alder Lake-P Thunderbolt 4 USB Controller + 461f Alder Lake-P Thunderbolt 4 PCI Express Root Port #3 + 4626 Alder Lake-P Integrated Graphics Controller + 4629 12th Gen Core Processor Host Bridge/DRAM Registers + 462f Alder Lake-P Thunderbolt 4 PCI Express Root Port #2 + 463d 12th Gen Core Processor PCI Express x4 Controller #2 + 463e Alder Lake-P Thunderbolt 4 NHI #0 + 463f Alder Lake-P Thunderbolt 4 PCI Express Root Port #1 + 4641 12th Gen Core Processor Host Bridge/DRAM Registers + 464d 12th Gen Core Processor PCI Express x4 Controller #0 + 464f 12th Gen Core Processor Gaussian & Neural Accelerator + 4660 12th Gen Core Processor Host Bridge/DRAM Registers + 466d Alder Lake-P Thunderbolt 4 NHI #1 + 466e Alder Lake-P Thunderbolt 4 PCI Express Root Port #0 + 467d Platform Monitoring Technology 467f Volume Management Device NVMe RAID Controller + 4680 AlderLake-S GT1 + 46a0 AlderLake-P GT2 + 46a1 UHD Graphics + 46a3 Alder Lake-P GT1 [UHD Graphics] + 46a6 Alder Lake-P Integrated Graphics Controller + 46c0 AlderLake-M GT1 + 4905 DG1 [Iris Xe MAX Graphics] + 4906 DG1 [Iris Xe Pod] + 4907 SG1 [Server GPU SG-18M] + 193d 4000 UN-GPU-XG310-32GB-FHFL + 4908 DG1 [Iris Xe Graphics] 4c3d Volume Management Device NVMe RAID Controller + 4c8a RocketLake-S GT1 [UHD Graphics 750] + 4c8b RocketLake-S GT1 [UHD Graphics 730] + 4c90 RocketLake-S GT1 [UHD Graphics P750] + 4c9a RocketLake-S [UHD Graphics] + 4da3 Jasper Lake SMBus + 4da4 Jasper Lake SPI Controller + 4dc8 Jasper Lake HD Audio + 4de0 Management Engine Interface + 4de8 Serial IO I2C Host Controller + 4de9 Serial IO I2C Host Controller + 4df0 Wi-Fi 6 AX201 160MHz + 4e03 Dynamic Tuning service + 4e19 JasperLake IPU + 4e55 JasperLake [UHD Graphics] + 4e61 JasperLake [UHD Graphics] + 4e71 JasperLake [UHD Graphics] + 4f80 DG2 + 4f81 DG2 + 4f82 DG2 5001 LE80578 5002 LE80578 Graphics Processor Unit 5009 LE80578 Video Display Controller @@ -30424,11 +32409,35 @@ 504a EP80579 Reserved 504b EP80579 Reserved 504c EP80579 Integrated Processor with QuickAssist TDM + 5181 Alder Lake PCH-P LPC/eSPI Controller + 5182 Alder Lake PCH eSPI Controller + 51a3 Alder Lake PCH-P SMBus Host Controller + 51a4 Alder Lake-P PCH SPI Controller + 51a8 Alder Lake PCH UART #0 + 51a9 Alder Lake PCH UART #1 + 51bf Alder Lake PCH-P PCI Express Root Port #9 + 51c5 Alder Lake-P Serial IO I2C Controller #0 + 51c6 Alder Lake-P Serial IO I2C Controller #1 + 51c8 Alder Lake PCH-P High Definition Audio Controller + 51d3 Alder Lake-P SATA AHCI Controller + 51e0 Alder Lake PCH HECI Controller + 51e8 Alder Lake PCH Serial IO I2C Controller #0 + 51e9 Alder Lake PCH Serial IO I2C Controller #1 + 51ea Alder Lake PCH Serial IO I2C Controller #2 + 51eb Alder Lake PCH Serial IO I2C Controller #3 + 51ed Alder Lake PCH USB 3.2 xHCI Host Controller + 51ef Alder Lake PCH Shared SRAM + 51f0 Alder Lake-P PCH CNVi WiFi + 8086 0034 Wireless-AC 9560 160MHz + 8086 0070 Wi-Fi 6 AX201 160MHz + 8086 0074 Wi-Fi 6 AX201 160MHz + 8086 4070 Wi-Fi 6 AX201 160MHz 5200 EtherExpress PRO/100 Intelligent Server PCI Bridge 5201 EtherExpress PRO/100 Intelligent Server Fast Ethernet Controller 8086 0001 EtherExpress PRO/100 Server Ethernet Adapter 530d 80310 (IOP) IO Processor 5502 Ethernet Controller (2) I225-LMvP + 5504 Ethernet Controller I226-K 5845 QEMU NVM Express Controller 1af4 1100 QEMU Virtual Machine 5900 Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers @@ -30443,9 +32452,11 @@ 590c Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers 590f Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers 1462 7a68 B250 KRAIT GAMING (MS-7A68) + 1462 7a72 H270 PC MATE 5910 Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers 5911 Xeon E3-1200 v6/7th Gen Core Processor Gaussian Mixture Model 5912 HD Graphics 630 + 1462 7a72 H270 PC MATE 5914 Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers 17aa 225d ThinkPad T480 5916 HD Graphics 620 @@ -30785,6 +32796,20 @@ 10b4 202f Lightspeed 740 8086 0000 Terminator 2x/i 8086 0100 Intel740 Graphics Accelerator +# Unlike other PCH components. The eSPI controller is specific to each chipset model + 7a84 Z690 Chipset LPC/eSPI Controller + 7aa3 Alder Lake-S PCH SMBus Controller + 7aa4 Alder Lake-S PCH SPI Controller + 7aa7 Alder Lake-S PCH Shared SRAM + 7ab4 Alder Lake-S PCH PCI Express Root Port #13 + 7abd Alder Lake-S PCH PCI Express Root Port #6 + 7acc Alder Lake-S PCH I2C Controller #0 + 7ad0 Alder Lake-S HD Audio Controller + 7ae0 Alder Lake-S PCH USB 3.2 Gen 2x2 XHCI Controller + 7ae2 Alder Lake-S PCH SATA Controller [AHCI Mode] + 7ae8 Alder Lake-S PCH HECI Controller #1 + 7af0 Alder Lake-S PCH CNVi WiFi + 8086 0094 Wi-Fi 6 AX201 160MHz 8002 Trusted Execution Technology Registers 8003 Trusted Execution Technology Registers 8100 US15W/US15X SCH [Poulsbo] Host Bridge @@ -30826,6 +32851,7 @@ 1993 0ded mGuard-PCI AV#2 1993 0dee mGuard-PCI AV#1 1993 0def mGuard-PCI AV#0 + 8603 Ice Lake-LP Dynamic Tuning Processor Participant 87c0 UHD Graphics 617 8800 Platform Controller Hub EG20T PCI Express Port 8801 Platform Controller Hub EG20T Packet Hub @@ -30854,20 +32880,27 @@ 8818 Platform Controller Hub EG20T Controller Area Network (CAN) Controller 8819 Platform Controller Hub EG20T IEEE 1588 Hardware Assist 8a0d Ice Lake Thunderbolt 3 NHI #1 + 8a12 Ice Lake-LP Processor Host Bridge/DRAM Registers 8a13 Ice Lake Thunderbolt 3 USB Controller + 8a14 Ice Lake Processor Host Bridge/DRAM Registers 8a17 Ice Lake Thunderbolt 3 NHI #0 + 8a19 Image Signal Processor 8a1d Ice Lake Thunderbolt 3 PCI Express Root Port #0 8a1f Ice Lake Thunderbolt 3 PCI Express Root Port #1 8a21 Ice Lake Thunderbolt 3 PCI Express Root Port #2 8a23 Ice Lake Thunderbolt 3 PCI Express Root Port #3 - 8a51 Intel Iris Plus Graphics G7 (Ice Lake) + 8a51 Iris Plus Graphics G7 (Ice Lake) 8a52 Iris Plus Graphics G7 + 8a53 Iris Plus Graphics G7 8a56 Iris Plus Graphics G1 (Ice Lake) 8a5a Iris Plus Graphics G4 (Ice Lake) - 8a5c Intel Iris Plus Graphics G4 (Ice Lake) + 8a5c Iris Plus Graphics G4 (Ice Lake) 8c00 8 Series/C220 Series Chipset Family 4-port SATA Controller 1 [IDE mode] 8c01 8 Series Chipset Family 4-port SATA Controller 1 [IDE mode] - Mobile 8c02 8 Series/C220 Series Chipset Family 6-port SATA Controller 1 [AHCI mode] + 1028 05d7 Alienware X51 R2 + 103c 1998 EliteDesk 800 G1 + 17aa 3098 ThinkCentre E73 17aa 309f ThinkCentre M83 8c03 8 Series/C220 Series Chipset Family 6-port SATA Controller 1 [AHCI mode] 103c 1909 ZBook 15 @@ -30881,10 +32914,13 @@ 8c0e 8 Series/C220 Series Chipset Family SATA Controller 1 [RAID mode] 8c0f 8 Series/C220 Series Chipset Family SATA Controller 1 [RAID mode] 8c10 8 Series/C220 Series Chipset Family PCI Express Root Port #1 + 103c 1998 EliteDesk 800 G1 1043 8534 ASUS H81I-PLUS 17aa 220e ThinkPad T440p + 17aa 3098 ThinkCentre E73 8c11 8 Series/C220 Series Chipset Family PCI Express Root Port #1 8c12 8 Series/C220 Series Chipset Family PCI Express Root Port #2 + 103c 1998 EliteDesk 800 G1 17aa 220e ThinkPad T440p 8c13 8 Series/C220 Series Chipset Family PCI Express Root Port #2 8c14 8 Series/C220 Series Chipset Family PCI Express Root Port #3 @@ -30894,45 +32930,64 @@ 8c18 8 Series/C220 Series Chipset Family PCI Express Root Port #5 8c19 8 Series/C220 Series Chipset Family PCI Express Root Port #5 8c1a 8 Series/C220 Series Chipset Family PCI Express Root Port #6 + 17aa 3098 ThinkCentre E73 8c1b 8 Series/C220 Series Chipset Family PCI Express Root Port #6 8c1c 8 Series/C220 Series Chipset Family PCI Express Root Port #7 8c1d 8 Series/C220 Series Chipset Family PCI Express Root Port #7 8c1e 8 Series/C220 Series Chipset Family PCI Express Root Port #8 8c1f 8 Series/C220 Series Chipset Family PCI Express Root Port #8 8c20 8 Series/C220 Series Chipset High Definition Audio Controller + 1028 05d7 Alienware X51 R2 103c 1909 ZBook 15 + 103c 1998 EliteDesk 800 G1 17aa 220e ThinkPad T440p 17aa 309f ThinkCentre M83 8c21 8 Series/C220 Series Chipset High Definition Audio Controller 8c22 8 Series/C220 Series Chipset Family SMBus Controller + 1028 05d7 Alienware X51 R2 103c 1909 ZBook 15 + 103c 1998 EliteDesk 800 G1 17aa 220e ThinkPad T440p + 17aa 3098 ThinkCentre E73 17aa 309f ThinkCentre M83 8c23 8 Series Chipset Family CHAP Counters 8c24 8 Series Chipset Family Thermal Management Controller 8c26 8 Series/C220 Series Chipset Family USB EHCI #1 + 1028 05d7 Alienware X51 R2 103c 1909 ZBook 15 + 103c 1998 EliteDesk 800 G1 17aa 220e ThinkPad T440p 17aa 2210 ThinkPad T540p + 17aa 3098 ThinkCentre E73 17aa 309f ThinkCentre M83 2210 17aa ThinkPad T540p 8c2d 8 Series/C220 Series Chipset Family USB EHCI #2 + 1028 05d7 Alienware X51 R2 103c 1909 ZBook 15 + 103c 1998 EliteDesk 800 G1 17aa 220e ThinkPad T440p + 17aa 3098 ThinkCentre E73 17aa 309f ThinkCentre M83 8c31 8 Series/C220 Series Chipset Family USB xHCI + 1028 05d7 Alienware X51 R2 103c 1909 ZBook 15 + 103c 1998 EliteDesk 800 G1 17aa 220e ThinkPad T440p + 17aa 3098 ThinkCentre E73 17aa 309f ThinkCentre M83 8c33 8 Series/C220 Series Chipset Family LAN Controller 8c34 8 Series/C220 Series Chipset Family NAND Controller 8c3a 8 Series/C220 Series Chipset Family MEI Controller #1 + 1028 05d7 Alienware X51 R2 103c 1909 ZBook 15 + 103c 1998 EliteDesk 800 G1 17aa 220e ThinkPad T440p + 17aa 3098 ThinkCentre E73 17aa 309f ThinkCentre M83 8c3b 8 Series/C220 Series Chipset Family MEI Controller #2 8c3c 8 Series/C220 Series Chipset Family IDE-r Controller 8c3d 8 Series/C220 Series Chipset Family KT Controller + 103c 1998 EliteDesk 800 G1 8c40 8 Series/C220 Series Chipset Family LPC Controller 8c41 8 Series Chipset Family Mobile Super SKU LPC Controller 8c42 8 Series/C220 Series Chipset Family Desktop Super SKU LPC Controller @@ -30944,11 +32999,13 @@ 8c48 8 Series/C220 Series Chipset Family LPC Controller 8c49 HM86 Express LPC Controller 8c4a H87 Express LPC Controller + 1028 05d7 Alienware X51 R2 8c4b HM87 Express LPC Controller 8c4c Q85 Express LPC Controller 17aa 309f ThinkCentre M83 8c4d 8 Series/C220 Series Chipset Family LPC Controller 8c4e Q87 Express LPC Controller + 103c 1998 EliteDesk 800 G1 8c4f QM87 Express LPC Controller 103c 1909 ZBook 15 17aa 220e ThinkPad T440p @@ -30965,6 +33022,7 @@ 8c5a 8 Series/C220 Series Chipset Family LPC Controller 8c5b 8 Series/C220 Series Chipset Family LPC Controller 8c5c H81 Express LPC Controller + 17aa 3098 ThinkCentre E73 8c5d 8 Series/C220 Series Chipset Family LPC Controller 8c5e 8 Series/C220 Series Chipset Family LPC Controller 8c5f 8 Series/C220 Series Chipset Family LPC Controller @@ -31083,23 +33141,50 @@ 9622 Integrated RAID 9641 Integrated RAID 96a1 Integrated RAID + 9a01 11th Gen Core Processor PCIe Controller #1 + 9a03 TigerLake-LP Dynamic Tuning Processor Participant 9a09 11th Gen Core Processor PCIe Controller 9a0b Volume Management Device NVMe RAID Controller - 9a13 Tiger Lake-LP Thunderbolt USB Controller + 9a0d Tigerlake Telemetry Aggregator Driver + 9a0f 11th Gen Core Processor PCIe Controller #0 + 9a11 GNA Scoring Accelerator module + 9a13 Tiger Lake-LP Thunderbolt 4 USB Controller 9a14 11th Gen Core Processor Host Bridge/DRAM Registers - 9a1b Tiger Lake-LP Thunderbolt NHI #0 - 9a1d Tiger Lake-LP Thunderbolt NHI #1 - 9a23 Tiger Lake-LP Thunderbolt PCI Express Root Port #0 - 9a25 Tiger Lake-LP Thunderbolt PCI Express Root Port #1 - 9a27 Tiger Lake-LP Thunderbolt PCI Express Root Port #2 - 9a29 Tiger Lake-LP Thunderbolt PCI Express Root Port #3 + 9a17 Tiger Lake-H Thunderbolt 4 USB Controller + 9a1b Tiger Lake-LP Thunderbolt 4 NHI #0 + 9a1d Tiger Lake-LP Thunderbolt 4 NHI #1 + 9a1f Tiger Lake-H Thunderbolt 4 NHI #0 + 9a21 Tiger Lake-H Thunderbolt 4 NHI #1 + 9a23 Tiger Lake-LP Thunderbolt 4 PCI Express Root Port #0 + 9a25 Tiger Lake-LP Thunderbolt 4 PCI Express Root Port #1 + 9a26 11th Gen Core Processor Host Bridge/DRAM Registers + 9a27 Tiger Lake-LP Thunderbolt 4 PCI Express Root Port #2 + 9a29 Tiger Lake-LP Thunderbolt 4 PCI Express Root Port #3 + 9a2b Tiger Lake-H Thunderbolt 4 PCI Express Root Port #0 + 9a2d Tiger Lake-H Thunderbolt 4 PCI Express Root Port #1 + 9a2f Tiger Lake-H Thunderbolt 4 PCI Express Root Port #2 + 9a31 Tiger Lake-H Thunderbolt 4 PCI Express Root Port #3 9a33 Tiger Lake Trace Hub - 9a49 UHD Graphics - 9b41 UHD Graphics + 9a36 11th Gen Core Processor Host Bridge/DRAM Registers + 9a49 TigerLake-LP GT2 [Iris Xe Graphics] + 9a60 TigerLake-H GT1 [UHD Graphics] + 9a68 TigerLake-H GT1 [UHD Graphics] + 9b33 Comet Lake-S 6c Host Bridge/DRAM Controller + 9b41 CometLake-U GT2 [UHD Graphics] + 1028 09bd Latitude 7310 + 1028 09be Latitude 7410 9b44 10th Gen Core Processor Host Bridge/DRAM Registers + 9b53 Comet Lake-S 6c Host Bridge/DRAM Controller 9b54 10th Gen Core Processor Host Bridge/DRAM Registers + 9b61 Comet Lake-U v1 4c Host Bridge/DRAM Controller + 1028 09be Latitude 7410 + 9b63 10th Gen Core Processor Host Bridge/DRAM Registers 9b64 10th Gen Core Processor Host Bridge/DRAM Registers - 9bc4 UHD Graphics + 9ba8 CometLake-S GT1 [UHD Graphics 610] + 9bc4 CometLake-H GT2 [UHD Graphics] + 9bc5 CometLake-S GT2 [UHD Graphics 630] + 9bc8 CometLake-S GT2 [UHD Graphics 630] + 9bca Comet Lake UHD Graphics 9c00 8 Series SATA Controller 1 [IDE mode] 9c01 8 Series SATA Controller 1 [IDE mode] 9c02 8 Series SATA Controller 1 [AHCI mode] @@ -31208,6 +33293,7 @@ 9d03 Sunrise Point-LP SATA Controller [AHCI mode] 1025 115f Acer Aspire E5-575G 1028 06dc Latitude E7470 + 1028 06e6 Latitude 11 5175 2-in-1 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 17aa 225d ThinkPad T480 @@ -31223,6 +33309,7 @@ 9d16 Sunrise Point-LP PCI Express Root Port #7 9d17 Sunrise Point-LP PCI Express Root Port #8 9d18 Sunrise Point-LP PCI Express Root Port #9 + 17aa 2247 ThinkPad T570 17aa 382a B51-80 Laptop 9d19 Sunrise Point-LP PCI Express Root Port #10 9d1a Sunrise Point-LP PCI Express Root Port #11 @@ -31230,8 +33317,10 @@ 1025 115f Acer Aspire E5-575G 1028 06d6 Latitude 7275 tablet 1028 06dc Latitude E7470 + 1028 06e6 Latitude 11 5175 2-in-1 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 + 17aa 2247 ThinkPad T570 17aa 224f ThinkPad X1 Carbon 5th Gen 17aa 225d ThinkPad T480 17aa 382a B51-80 Laptop @@ -31239,6 +33328,7 @@ 1025 115f Acer Aspire E5-575G 1028 06d6 Latitude 7275 tablet 1028 06dc Latitude E7470 + 1028 06e6 Latitude 11 5175 2-in-1 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 17aa 2247 ThinkPad T570 @@ -31254,6 +33344,7 @@ 1025 115f Acer Aspire E5-575G 1028 06d6 Latitude 7275 tablet 1028 06dc Latitude E7470 + 1028 06e6 Latitude 11 5175 2-in-1 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 17aa 2247 ThinkPad T570 @@ -31263,6 +33354,7 @@ 1025 115f Acer Aspire E5-575G 1028 06d6 Latitude 7275 tablet 1028 06dc Latitude E7470 + 1028 06e6 Latitude 11 5175 2-in-1 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 17aa 2247 ThinkPad T570 @@ -31271,12 +33363,15 @@ 17aa 382a B51-80 Laptop 9d32 CSI-2 Host Controller 1028 06d6 Latitude 7275 tablet + 1028 06e6 Latitude 11 5175 2-in-1 9d35 Sunrise Point-LP Integrated Sensor Hub 1028 06d6 Latitude 7275 tablet + 1028 06e6 Latitude 11 5175 2-in-1 9d3a Sunrise Point-LP CSME HECI #1 1025 115f Acer Aspire E5-575G 1028 06d6 Latitude 7275 tablet 1028 06dc Latitude E7470 + 1028 06e6 Latitude 11 5175 2-in-1 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 17aa 2247 ThinkPad T570 @@ -31285,14 +33380,18 @@ 17aa 382a B51-80 Laptop 9d3d Sunrise Point-LP Active Management Technology - SOL 103c 8079 EliteBook 840 G3 + 17aa 2247 ThinkPad T570 + 9d3e iTouch Controller 9d43 Sunrise Point-LP LPC Controller 17aa 382a B51-80 Laptop 9d46 LPC/eSPI Controller 1028 06d6 Latitude 7275 tablet + 1028 06e6 Latitude 11 5175 2-in-1 9d48 Sunrise Point-LP LPC Controller 1028 06dc Latitude E7470 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 + 17aa 2247 ThinkPad T570 9d4e Sunrise Point LPC Controller/eSPI Controller 17aa 225d ThinkPad T480 9d50 Sunrise Point LPC Controller @@ -31304,14 +33403,17 @@ 9d60 Sunrise Point-LP Serial IO I2C Controller #0 1025 115f Acer Aspire E5-575G 1028 06d6 Latitude 7275 tablet + 1028 06e6 Latitude 11 5175 2-in-1 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 17aa 225d ThinkPad T480 8086 9d60 100 Series PCH/Sunrise Point PCH I2C0 [Skylake/Kaby Lake LPSS I2C] 9d61 Sunrise Point-LP Serial IO I2C Controller #1 1028 06d6 Latitude 7275 tablet + 1028 06e6 Latitude 11 5175 2-in-1 9d62 Sunrise Point-LP Serial IO I2C Controller #2 1028 06d6 Latitude 7275 tablet + 1028 06e6 Latitude 11 5175 2-in-1 9d63 Sunrise Point-LP Serial IO I2C Controller #3 9d64 Sunrise Point-LP Serial IO I2C Controller #4 9d65 Sunrise Point-LP Serial IO I2C Controller #5 @@ -31319,8 +33421,10 @@ 9d70 Sunrise Point-LP HD Audio 1028 06d6 Latitude 7275 tablet 1028 06dc Latitude E7470 + 1028 06e6 Latitude 11 5175 2-in-1 1028 06f3 Latitude 3570 103c 8079 EliteBook 840 G3 + 17aa 2247 ThinkPad T570 17aa 382a B51-80 Laptop 9d71 Sunrise Point-LP HD Audio 1025 1094 Acer Aspire E5-575G @@ -31332,6 +33436,7 @@ 9da4 Cannon Point-LP SPI Controller 9da8 Cannon Point-LP Serial IO UART Controller #2 9daa Cannon Point-LP Serial IO SPI Controller + 9dab Cannon Point-LP Serial IO SPI Controller 9db0 Cannon Point-LP PCI Express Root Port #9 9db1 Cannon Point-LP PCI Express Root Port #10 9db2 Cannon Point-LP PCI Express Root Port #1 @@ -31342,6 +33447,7 @@ 9dbc Cannon Point-LP PCI Express Root Port #5 9dbe Cannon Point-LP PCI Express Root Port #7 9dbf Cannon Point PCI Express Root Port #8 + 9dc4 Cannon Point-LP SD Host Controller 9dc5 Cannon Point-LP Serial IO I2C Host Controller 9dc8 Cannon Point-LP High Definition Audio Controller 1028 089e Inspiron 5482 @@ -31386,11 +33492,13 @@ a0a9 Tiger Lake-LP Serial IO UART Controller #1 a0ab Tiger Lake-LP Serial IO SPI Controller #1 a0b0 Tiger Lake-LP PCI Express Root Port #9 + a0bd Tigerlake PCH-LP PCI Express Root Port #6 a0bf Tiger Lake-LP PCI Express Root Port #8 a0c5 Tiger Lake-LP Serial IO I2C Controller #4 a0c6 Tiger Lake-LP Serial IO I2C Controller #5 a0c8 Tiger Lake-LP Smart Sound Technology Audio Controller a0e0 Tiger Lake-LP Management Engine Interface + a0e3 Tiger Lake-LP Active Management Technology - SOL a0e8 Tiger Lake-LP Serial IO I2C Controller #0 a0e9 Tiger Lake-LP Serial IO I2C Controller #1 a0ea Tiger Lake-LP Serial IO I2C Controller #2 @@ -31573,16 +33681,20 @@ a252 Lewisburg SSATA Controller [AHCI mode] a256 Lewisburg SSATA Controller [RAID mode] a282 200 Series PCH SATA controller [AHCI mode] + 1462 7a72 H270 PC MATE a286 200 Series PCH SATA controller [RAID mode] a290 200 Series PCH PCI Express Root Port #1 a291 200 Series PCH PCI Express Root Port #2 a292 200 Series PCH PCI Express Root Port #3 a293 200 Series PCH PCI Express Root Port #4 a294 200 Series PCH PCI Express Root Port #5 + 1462 7a72 H270 PC MATE a295 200 Series PCH PCI Express Root Port #6 a296 200 Series PCH PCI Express Root Port #7 + 1462 7a72 H270 PC MATE a297 200 Series PCH PCI Express Root Port #8 a298 200 Series PCH PCI Express Root Port #9 + 1462 7a72 H270 PC MATE a299 200 Series PCH PCI Express Root Port #10 a29a 200 Series PCH PCI Express Root Port #11 a29b 200 Series PCH PCI Express Root Port #12 @@ -31592,7 +33704,9 @@ a29f 200 Series PCH PCI Express Root Port #16 a2a0 200 Series/Z370 Chipset Family P2SB a2a1 200 Series/Z370 Chipset Family Power Management Controller + 1462 7a72 H270 PC MATE a2a3 200 Series/Z370 Chipset Family SMBus Controller + 1462 7a72 H270 PC MATE a2a4 200 Series/Z370 Chipset Family SPI Controller a2a5 200 Series/Z370 Chipset Family Gigabit Ethernet Controller a2a6 200 Series/Z370 Chipset Family Trace Hub @@ -31601,10 +33715,14 @@ a2a9 200 Series/Z370 Chipset Family Serial IO SPI Controller #0 a2aa 200 Series/Z370 Chipset Family Serial IO SPI Controller #1 a2af 200 Series/Z370 Chipset Family USB 3.0 xHCI Controller + 1462 7a72 H270 PC MATE a2b1 200 Series PCH Thermal Subsystem + 1462 7a72 H270 PC MATE a2ba 200 Series PCH CSME HECI #1 + 1462 7a72 H270 PC MATE a2bb 200 Series PCH CSME HECI #2 a2c4 200 Series PCH LPC Controller (H270) + 1462 7a72 H270 PC MATE a2c5 200 Series PCH LPC Controller (Z270) a2c6 200 Series PCH LPC Controller (Q270) a2c7 200 Series PCH LPC Controller (Q250) @@ -31626,6 +33744,9 @@ a2ed 200 Series PCH PCI Express Root Port #23 a2ee 200 Series PCH PCI Express Root Port #24 a2f0 200 Series PCH HD Audio + 1462 7a72 H270 PC MATE + 1462 fa72 H270 PC MATE + a303 H310 Chipset LPC/eSPI Controller a304 H370 Chipset LPC/eSPI Controller 1028 0869 Vostro 3470 a305 Z390 Chipset LPC/eSPI Controller @@ -31639,6 +33760,7 @@ a324 Cannon Lake PCH SPI Controller 1028 0869 Vostro 3470 a328 Cannon Lake PCH Serial IO UART Host Controller + a32b Cannon Lake PCH SPI Host Controller a32c Cannon Lake PCH PCI Express Root Port #21 a32d Cannon Lake PCH PCI Express Root Port #22 a32e Cannon Lake PCH PCI Express Root Port #23 @@ -31679,9 +33801,25 @@ a36d Cannon Lake PCH USB 3.1 xHCI Host Controller 1028 0869 Vostro 3470 a36f Cannon Lake PCH Shared SRAM - a370 Wireless-AC 9560 [Jefferson Peak] + a370 Cannon Lake PCH CNVi WiFi + 1a56 1552 Killer(R) Wireless-AC 1550i Wireless Network Adapter (9560NGW) + 8086 0034 Wireless-AC 9560 a379 Cannon Lake PCH Thermal Controller 1028 0869 Vostro 3470 + a382 400 Series Chipset Family SATA AHCI Controller + a394 Comet Lake PCI Express Root Port #05 + a397 Comet Lake PCI Express Root Port #08 + a398 Comet Lake PCI Express Root Port 9 + a39a Comet Lake PCI Express Root Port 11 + a3a1 Cannon Lake PCH Power Management Controller + a3a3 Comet Lake PCH-V SMBus Host Controller + a3af Comet Lake PCH-V USB Controller + a3b1 Comet Lake PCH-V Thermal Subsystem + a3ba Comet Lake PCH-V HECI Controller + a3c8 B460 Chipset LPC/eSPI Controller + a3da H410 Chipset LPC/eSPI Controller + a3eb Comet Lake PCI Express Root Port #21 + a3f0 Comet Lake PCH-V cAVS a620 6400/6402 Advanced Memory Buffer (AMB) abc0 Omni-Path Fabric Switch Silicon 100 Series b152 21152 PCI-to-PCI Bridge @@ -31721,29 +33859,61 @@ d157 Core Processor System Control and Status Registers d158 Core Processor Miscellaneous Registers f1a5 SSD 600P Series +# M.2 22 x 80mm, NVMe + 8086 390a SSDPEKKW256G7 256GB f1a6 SSD Pro 7600p/760p/E 6100p Series - 8086 390b Intel Corporation SSD Pro 7600p/760p/E 6100p Series [NVM Express] + 8086 390b SSD Pro 7600p/760p/E 6100p Series [NVM Express] f1a8 SSD 660P Series 8088 Beijing Wangxun Technology Co., Ltd. + 0100 WX1860AL-W Gigabit Ethernet Controller 0101 WX1860A2 Gigabit Ethernet Controller 8088 0201 Dual-Port Ethernet Network Adaptor SF200T + 8088 4201 Dual-Port Ethernet Network Adaptor SF200T (WOL) + 8088 8201 Dual-Port Ethernet Network Adaptor SF200T (NCSI) + 8088 c201 Dual-Port Ethernet Network Adaptor SF200T (WOL, NCSI) 0102 WX1860A2S Gigabit Ethernet Controller 8088 0210 Dual-Port Ethernet Network Adaptor SF200T-S 0103 WX1860A4 Gigabit Ethernet Controller 8088 0401 Qual-Port Ethernet Network Adaptor SF400T 8088 0440 Qual-Port Ethernet Network Adaptor SF400-OCP + 8088 4103 Quad-Port Ethernet Network Adaptor SF400T (WOL) + 8088 8103 Quad-Port Ethernet Network Adaptor SF400T (NCSI) + 8088 c103 Quad-Port Ethernet Network Adaptor SF400T (WOL, NCSI) 0104 WX1860A4S Gigabit Ethernet Controller 8088 0410 Qual-Port Ethernet Network Adaptor SF400T-S 0105 WX1860AL2 Gigabit Ethernet Controller 8088 0202 Dual-Port Ethernet Network Adaptor SF200HT + 8088 4202 Dual-Port Ethernet Network Adaptor SF200HT (WOL) + 8088 8202 Dual-Port Ethernet Network Adaptor SF200HT (NCSI) + 8088 c202 Dual-Port Ethernet Network Adaptor SF200HT (WOL, NCSI) 0106 WX1860AL2S Gigabit Ethernet Controller 8088 0220 Dual-Port Ethernet Network Adaptor SF200HT-S 0107 WX1860AL4 Gigabit Ethernet Controller 8088 0402 Qual-Port Ethernet Network Adaptor SF400HT + 8088 4402 Quad-Port Ethernet Network Adaptor SF400HT (WOL) + 8088 8402 Quad-Port Ethernet Network Adaptor SF400HT (NCSI) + 8088 c402 Quad-Port Ethernet Network Adaptor SF400HT (WOL, NCSI) 0108 WX1860AL4S Gigabit Ethernet Controller 8088 0420 Qual-Port Ethernet Network Adaptor SF400HT-S + 0109 WX1860-LC Gigabit Ethernet Controller + 010a WX1860A1 Gigabit Ethernet Controller +# add new device ID + 010b WX1860AL1 Gigabit Ethernet Controller + 8088 0102 Single-Port Ethernet Network Adaptor SF100HT + 8088 4102 Single-Port Ethernet Network Adaptor SF100HT (WOL) + 8088 8102 Single-Port Ethernet Network Adaptor SF100HT (NCSI) + 8088 c102 Single-Port Ethernet Network Adaptor SF100HT (WOL, NCSI) + 0111 WX1860A2 Ethernet Controller Virtual Function + 0113 WX1860A4 Ethernet Controller Virtual Function + 0115 WX1860AL2 Ethernet Controller Virtual Function + 0117 WX1860AL4 Ethernet Controller Virtual Function + 0119 WX1860-LC Gigabit Ethernet Controller Virtual Function + 011a WX1860A1 Gigabit Ethernet Controller Virtual Function + 011b WX1860AL1 Gigabit Ethernet Controller Virtual Function + 1000 Ethernet Controller RP1000 Virtual Function for 10GbE SFP+ 1001 Ethernet Controller RP1000 for 10GbE SFP+ 8088 0000 Ethernet Network Adaptor RP1000 for 10GbE SFP+ + 2000 Ethernet Controller RP2000 Virtual Function for 10GbE SFP+ 2001 Ethernet Controller RP2000 for 10GbE SFP+ 8088 2000 Ethernet Network Adaptor RP2000 for 10GbE SFP+ 80ee InnoTek Systemberatung GmbH @@ -31752,11 +33922,15 @@ 8322 Sodick America Corp. 8384 SigmaTel 8401 TRENDware International Inc. -8686 ScaleMP +# nee ScaleMP +8686 SAP 1010 vSMP Foundation controller [vSMP CTL] 1011 vSMP Foundation MEX/FLX controller [vSMP CTL] 8800 Trigem Computer Inc. 2008 Video assistant component +8820 Stryker Corporation + 2724 Mako Front Side Motor Controller [cPCI] +8848 Wuxi Micro Innovation Integrated Circuit Design Co.,Ltd 8866 T-Square Design Inc. 8888 Silicon Magic 8912 TRX @@ -32074,7 +34248,7 @@ 9005 0552 Series 8 - ASR-8805 - 8 internal 0 external 12G SAS Port/PCIe 3.0 9005 0553 Series 8 - ASR-8085 - 0 internal 8 external 12G SAS Port/PCIe 3.0 9005 0554 Series 8 - ASR-8885 - 8 internal 8 external 12G SAS Port/PCIe 3.0 - 028f Smart Storage PQI 12G SAS/PCIe 3 + 028f Smart Storage PQI SAS 103c 0600 Smart Array P408i-p SR Gen10 103c 0601 Smart Array P408e-p SR Gen10 103c 0602 Smart Array P408i-a SR Gen10 @@ -32096,6 +34270,12 @@ 152d 8a24 QS-8236-16i 152d 8a36 QS-8240-24i 152d 8a37 QS-8242-24i + 1590 0294 SR932i-p Gen10+ + 1590 02dc SR416i-a Gen10+ + 193d 1104 RAID P2404-Mf-4i-2GB + 193d 1105 RAID P4408-Mf-8i-2GB + 193d 1106 RAID P2404-Mf-4i-1GB + 193d 1107 RAID P4408-Mf-8i-4GB 193d 8460 HBA H460-M1 193d 8461 HBA H460-B1 193d c460 RAID P460-M2 @@ -32116,6 +34296,26 @@ 1bd4 004b RAID PM8204-2GB 1bd4 004c RAID PM8204-4GB 1bd4 004f PM8222-HBA + 1bd4 006b RS0800M5H24I + 1bd4 006c RS0800M5E8i + 1bd4 006d RS0800M5H8i + 1bd4 006f RS0804M5R16i + 1bd4 0070 RS0800M5E24i + 1bd4 0071 RS0800M5H16i + 1bd4 0072 RS0800M5E16i + 1bd4 0077 RS0800M5E16iM + 1bd4 0078 RS0800M5E24iM + 1bd4 0079 RS0800M5H24iM + 1bd4 0080 RS0804M5R16iM + 1cc4 0101 Ramaxel FBGF-RAD PM8204 + 1cc4 0201 Ramaxel FBGF-RAD PM8222 + 1d49 0220 ThinkSystem 4350-8i SAS/SATA 12Gb HBA + 1d49 0221 ThinkSystem 4350-16i SAS/SATA 12Gb HBA + 1d49 0520 ThinkSystem RAID 5350-8i PCIe 12Gb Adapter + 1d49 0620 ThinkSystem RAID 9350-8i 2GB Flash PCIe 12Gb Adapter + 1d49 0621 ThinkSystem RAID 9350-8i 2GB Flash PCIe 12Gb Internal Adapter + 1d49 0622 ThinkSystem RAID 9350-16i 4GB Flash PCIe 12Gb Adapter + 1d49 0623 ThinkSystem RAID 9350-16i 4GB Flash PCIe 12Gb Internal Adapter 9005 0608 SmartRAID 3162-8i /e 9005 0800 SmartRAID 3154-8i 9005 0801 SmartRAID 3152-8i @@ -32125,6 +34325,8 @@ 9005 0805 SmartRAID 3102-8i 9005 0806 SmartRAID 3100 9005 0807 SmartRAID 3162-8i + 9005 0808 SmartRAID 3101E-4i + 9005 0809 SmartRAID 3102E-8i 9005 0900 SmartHBA 2100-8i 9005 0901 SmartHBA 2100-4i 9005 0902 HBA 1100-8i @@ -32140,11 +34342,26 @@ 9005 1202 SmartRAID 3154-8i8e 9005 1280 HBA 1100-16i 9005 1281 HBA 1100-16e + 9005 1282 SmartHBA 2100-16i 9005 1300 HBA 1100-8i8e 9005 1301 HBA 1100-24i 9005 1302 SmartHBA 2100-8i8e 9005 1303 SmartHBA 2100-24i 9005 1380 SmartRAID 3154-16i + 9005 1400 SmartRAID Ultra 3258p-16i /e + 9005 1402 HBA Ultra 1200p-16i + 9005 1410 HBA Ultra 1200-16e + 9005 1430 SmartRAID Ultra 3254-16e /e + 9005 1441 HBA Ultra 1200p-32i + 9005 1450 SmartRAID Ultra 3258p-32i /e + 9005 1462 HBA 1200-8i + 9005 1471 SmartRAID 3254-16i /e + 9005 1472 SmartRAID 3258-16i /e + 9005 14a0 SmartRAID 3254-8i + 9005 14a1 SmartRAID 3204-8i + 9005 14a2 SmartRAID 3252-8i + 9005 14c0 SmartHBA 2200-16i + 9005 14c1 HBA 1200-16i 0410 AIC-9410W SAS (Razor HBA RAID) 9005 0410 ASC-48300(Spirit RAID) 9005 0411 ASC-58300 (Oakmont RAID) @@ -32259,6 +34476,7 @@ 0001 SG2010 PCI over Starfabric Bridge 0002 SG2010 PCI to Starfabric Gateway 0003 SG1010 Starfabric Switch and PCI Bridge +9a11 Tiger Lake-H Gaussian & Neural Accelerator 9d32 Beijing Starblaze Technology Co. Ltd. 0000 STAR1000 PCIe NVMe SSD Controller 1001 STAR1000P PCIe NVMe SSD Controller @@ -32266,6 +34484,7 @@ 1202 STAR1200I NVMe SSD 1203 STAR1200L NVMe SSD 1204 STAR1200E NVMe SSD +a000 Asix Electronics Corporation (Wrong ID) a0a0 AOPEN Inc. a0f1 UNISYS Corporation a200 NEC Corporation @@ -32354,6 +34573,7 @@ c001 TSI Telsys c0a9 Micron/Crucial Technology 2263 P1 NVMe PCIe SSD + 540a P2 NVMe PCIe SSD c0de Motorola c0fe Motion Engineering, Inc. ca3b Cambrionix Ltd. @@ -32375,6 +34595,8 @@ 0101 DeepSea 1 High Speed Stereo Vision Frame Grabber 0200 DeepSea 2 High Speed Stereo Vision Frame Grabber ceba KEBA AG +cf86 Spectrum-4TOR + 0276 Spectrum-4TOR in Flash Recovery Mode d161 Digium, Inc. 0120 Wildcard TE120P single-span T1/E1/J1 card 0205 Wildcard TE205P/TE207P dual-span T1/E1/J1 card 5.0V @@ -32477,7 +34699,7 @@ 4021 MT camera e000 Winbond e000 W89C940 -e159 Tiger Jet Network Inc. +e159 Tiger Jet Network Inc. / ICP DAS 0001 Tiger3XX Modem/ISDN interface 0059 0001 128k ISDN-S/T Adapter 0059 0003 128k ISDN-U Adapter @@ -32508,6 +34730,7 @@ 0046 PCI-766 Analog Output Card 0052 PCI-703 Analog I/O Card 0800 PCI-800 Digital I/O Card +ea50 Emerson Automation Solutions # The main chip of all these devices is by Xilinx -> It could also be a Xilinx ID. ea60 RME 9896 Digi32 @@ -32584,6 +34807,7 @@ f043 ASUSTeK Computer Inc. (Wrong ID) f05b Foxconn International, Inc. (Wrong ID) f15e SiFive, Inc. + 0000 FU740-C000 RISC-V SoC PCI Express x8 to AXI4 Bridge f1d0 AJA Video c0fe Xena HS/HD-R c0ff Kona/Xena 2 @@ -32621,6 +34845,7 @@ eb23 Kona 1 eb24 Kona HDMI eb25 Corvid 44 12g + eb26 T-Tap Pro efac Xena SD-MM/SD-22-MM facd Xena HD-MM f5f5 F5 Networks, Inc. @@ -32654,6 +34879,7 @@ C 00 Unclassified device 00 Non-VGA unclassified device 01 VGA compatible unclassified device + 05 Image coprocessor C 01 Mass storage controller 00 SCSI storage controller 01 IDE interface @@ -32708,6 +34934,9 @@ C 05 Memory controller 00 RAM memory 01 FLASH memory + 02 CXL + 00 CXL Memory Device - vendor specific + 10 CXL Memory Device (CXL 2.x) 80 Memory controller C 06 Bridge 00 Host bridge @@ -32776,6 +35005,9 @@ 05 SD Host controller 06 IOMMU 80 System peripheral + 99 Timing Card +# PTP Grandmaster Source Clock + 01 TAP Timing Card C 09 Input device controller 00 Keyboard controller 01 Digitizer Pen @@ -32819,6 +35051,7 @@ 02 BT (Block Transfer) 08 SERCOS interface 09 CANBUS + 80 Serial bus controller C 0d Wireless controller 00 IRDA controller 01 Consumer IR controller @@ -32847,8 +35080,7 @@ 80 Signal processing controller C 12 Processing accelerators 00 Processing accelerators -# For the class of PCI attached devices which perform a function of Deep Learning Neural Network inference acceleration - 01 AI Inference Accelerator + 01 SNIA Smart Data Accelerator Interface (SDXI) controller C 13 Non-Essential Instrumentation C 40 Coprocessor C ff Unassigned class diff -Nru pciutils-3.7.0/pci.ids.man pciutils-3.8.0/pci.ids.man --- pciutils-3.7.0/pci.ids.man 2020-01-25 19:21:11.000000000 +0000 +++ pciutils-3.8.0/pci.ids.man 2021-12-26 21:17:10.000000000 +0000 @@ -83,6 +83,11 @@ To ensure extensibility of the format, lines starting with an unrecognized letter followed by a single space are ignored and so are all following TAB-indented lines. +.SH FILES +.TP +.B @IDSDIR@/@PCI_IDS@ +Location of the list. + .SH SEE ALSO .BR lspci (8), .BR update-pciids (8), diff -Nru pciutils-3.7.0/pcilib.man pciutils-3.8.0/pcilib.man --- pciutils-3.7.0/pcilib.man 2020-01-25 19:21:11.000000000 +0000 +++ pciutils-3.8.0/pcilib.man 2022-04-15 21:47:48.000000000 +0000 @@ -66,6 +66,16 @@ .B darwin Access method used on Mac OS X / Darwin. Must be run as root and the system must have been booted with debug=0x144. +.TP +.B win32-cfgmgr32 +Device listing on Windows systems using the Windows Configuration Manager +via cfgmgr32.dll system library. This method does not require any special +Administrator rights or privileges. Configuration Manager provides only basic +information about devices, assigned resources and device tree structure. There +is no access to the PCI configuration space but libpci provides read-only +virtual emulation based on information from Configuration Manager. Starting +with Windows 8 (NT 6.2) it is not possible to retrieve resources from 32-bit +application or library on 64-bit system. .SH PARAMETERS diff -Nru pciutils-3.7.0/pciutils.h pciutils-3.8.0/pciutils.h --- pciutils-3.7.0/pciutils.h 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/pciutils.h 2021-12-28 15:26:26.000000000 +0000 @@ -9,7 +9,20 @@ #include "lib/pci.h" #include "lib/sysdep.h" -#ifdef PCI_OS_WINDOWS +/* + * gcc predefines macro __MINGW32__ for all MinGW targets. + * Including some MinGW header (e.g. windef.h) defines additional + * macro __MINGW32_MAJOR_VERSION (available for all MinGW targets). + */ +#if defined(PCI_OS_WINDOWS) && defined(__MINGW32__) +#include +#endif + +/* + * On Windows only MinGW 3.0 and higher versions provides + * header file. Older MinGW versions and MSVC do not have it. + */ +#if defined(PCI_OS_WINDOWS) && !(defined(__MINGW32_MAJOR_VERSION) && __MINGW32_MAJOR_VERSION >= 3) #include "compat/getopt.h" #else #include diff -Nru pciutils-3.7.0/pciutils.lsm pciutils-3.8.0/pciutils.lsm --- pciutils-3.7.0/pciutils.lsm 2020-05-30 22:19:21.000000000 +0000 +++ pciutils-3.8.0/pciutils.lsm 2022-04-18 16:56:49.000000000 +0000 @@ -1,14 +1,13 @@ Begin3 Title: The PCI Utilities -Version: 3.7.0 -Entered-date: 200531 +Version: 3.8.0 +Entered-date: 220418 Description: This package contains various utilities for inspecting and setting of devices connected to the PCI bus. Keywords: kernel, pci, lspci, setpci, libpci Author: mj@ucw.cz (Martin Mares) Maintained-by: mj@ucw.cz (Martin Mares) -Primary-site: ftp.ucw.cz pub/mj/linux/pci/pciutils-3.7.0.tar.gz -Alternate-site: ftp.kernel.org pub/software/utils/pciutils/pciutils-3.7.0.tar.gz -Alternate-site: metalab.unc.edu pub/Linux/hardware/pciutils-3.7.0.tar.gz +Primary-site: ftp.ucw.cz pub/mj/linux/pci/pciutils-3.8.0.tar.gz +Alternate-site: ftp.kernel.org pub/software/utils/pciutils/pciutils-3.8.0.tar.gz Copying-policy: GPL End diff -Nru pciutils-3.7.0/pciutils.spec pciutils-3.8.0/pciutils.spec --- pciutils-3.7.0/pciutils.spec 2020-05-30 22:19:21.000000000 +0000 +++ pciutils-3.8.0/pciutils.spec 2022-04-18 16:56:49.000000000 +0000 @@ -1,5 +1,5 @@ Name: pciutils -Version: 3.7.0 +Version: 3.8.0 Release: 1 Source: http://mj.ucw.cz/download/linux/pci/%{name}-%{version}.tar.gz Copyright: GNU GPL diff -Nru pciutils-3.7.0/README pciutils-3.8.0/README --- pciutils-3.7.0/README 2020-05-30 22:19:21.000000000 +0000 +++ pciutils-3.8.0/README 2022-04-18 16:56:49.000000000 +0000 @@ -1,11 +1,14 @@ -This package contains the PCI Utilities, version 3.7.0. +This package contains the PCI Utilities, version 3.8.0. -Copyright (c) 1997--2020 Martin Mares +Copyright (c) 1997--2022 Martin Mares All files in this package can be freely distributed and used according to the terms of the GNU General Public License, either version 2 or (at your opinion) any newer version. See https://www.gnu.org/ for details. +The author wants to clarify that he does not consider programs which link +dynamically to the libpci to be derived works of the library. + 1. What's that? ~~~~~~~~~~~~~~~ @@ -22,7 +25,7 @@ Solaris/i386 (direct port access) Aix (via /dev/pci and odmget) GNU Hurd (direct port access) - Windows (direct port access, see README.Windows for caveats) + Windows (via cfgmgr32 or direct port access, see README.Windows for caveats) CYGWIN (direct port access) BeOS (via syscalls) Haiku (via /dev/misc/poke) @@ -49,7 +52,8 @@ 2. Compiling and (un)installing ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Just run "make" to compile the package and then "make install" to install it. -Please note that GNU make is needed on most platforms. +Please note that a C compiler supporting the C99 standard is required. +Also, GNU make is needed on most platforms. If you want to change the default installation location, please override the PREFIX variable specified in the Makefile -- e.g., you can use diff -Nru pciutils-3.7.0/README.Windows pciutils-3.8.0/README.Windows --- pciutils-3.7.0/README.Windows 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/README.Windows 2022-04-15 23:29:38.000000000 +0000 @@ -4,20 +4,35 @@ Updated after version 2.2.6 to compile again, and with MinGW, even (only?) cross-compiling. (Hopefully it works with MSVC too.) -To use this port, you need to install WinIO.dll first. You can get it here: +For simple listing PCI devices in system with basic information, there is no +special requirement. To list PCI resources on Windows 8 and higher versions, +it is necessary to have architecture-native version (e.g. AMD64 version on +AMD64 systems). - https://github.com/starofrainnight/winio - https://github.com/vaptu/winio +To access config space on NT-based systems, it is required to have SeTcbPrivilege +(Act as part of the operating system privilege), which can be enabled in User +Accounts settings (take effect after next login). By default this privilege is +not enabled for any non-system user. Or alternatively it is required to be in +local Administrators group and on Windows 2000 SP4 or higher systems to have +SeImpersonatePrivilege (Impersonate a client after authentication privilege) +which is by default enabled for all local Administrators accounts. There is no +special requirement for DOS-based systems. 64-bit systems do not have to allow +users to access config space even with SeTcbPrivilege. -However, you need to use win32/config.{h,mk} instead of the automatically -generated lib/config.{h,mk} as lib/configure does not run on Windows. +To compile this port, run following command: + + make CROSS_COMPILE=i586-mingw32msvc- HOST=i386-windows ZLIB=no IDSDIR="" + +To build 64-bit version, run: + + make CROSS_COMPILE=x86_64-w64-mingw32- HOST=x86_64-windows ZLIB=no IDSDIR="" + +Sometimes compilation may fail due to broken or missing getopt implementation. +In this case try to compile with additional make option: COMPAT_GETOPT=yes ================================================================================ BEWARE: The current implementation pokes I/O ports to access the PCI devices directly. This leads to several problems: some devices are invisible, extended PCIe configuration space is not available, and there are many potential race conditions. Instead, libpci should use the proper Windows drivers. - -Unfortunately, the Windows port currently lacks a maintainer. If you are willing -to step up and fix the issues, please let me know. -- Martin Mares ================================================================================ diff -Nru pciutils-3.7.0/setpci.c pciutils-3.8.0/setpci.c --- pciutils-3.7.0/setpci.c 2020-02-23 15:38:53.000000000 +0000 +++ pciutils-3.8.0/setpci.c 2020-09-02 08:40:22.000000000 +0000 @@ -350,7 +350,7 @@ { 0x20004, 0, 0, "ECAP_PB" }, { 0x20005, 0, 0, "ECAP_RCLINK" }, { 0x20006, 0, 0, "ECAP_RCILINK" }, - { 0x20007, 0, 0, "ECAP_RCECOLL" }, + { 0x20007, 0, 0, "ECAP_RCEC" }, { 0x20008, 0, 0, "ECAP_MFVC" }, { 0x20009, 0, 0, "ECAP_VC2" }, { 0x2000a, 0, 0, "ECAP_RBCB" }, diff -Nru pciutils-3.7.0/setpci.man pciutils-3.8.0/setpci.man --- pciutils-3.7.0/setpci.man 2020-02-23 15:44:15.000000000 +0000 +++ pciutils-3.8.0/setpci.man 2022-04-15 23:26:00.000000000 +0000 @@ -78,7 +78,7 @@ .TP .B -O = The behavior of the library is controlled by several named parameters. -This option allows to set the value of any of the parameters. Use \fB-O help\fP +This option allows one to set the value of any of the parameters. Use \fB-O help\fP for a list of known parameters and their default values. .TP .B -H1 @@ -106,9 +106,10 @@ on any bus, "0.3" selects third function of device 0 on all buses and ".4" matches only the fourth function of each device. .TP -.B -d []:[] -Select devices with specified vendor and device ID. Both ID's are given in -hexadecimal and may be omitted or given as "*", both meaning "any value". +.B -d []:[][:[:]] +Select devices with specified vendor, device, class ID, and programming interface. +The ID's are given in hexadecimal and may be omitted or given as "*", both meaning +"any value". The class ID can contain "x" characters which stand for "any digit". .PP When .B -s diff -Nru pciutils-3.7.0/tests/cap-doe pciutils-3.8.0/tests/cap-doe --- pciutils-3.7.0/tests/cap-doe 1970-01-01 00:00:00.000000000 +0000 +++ pciutils-3.8.0/tests/cap-doe 2022-02-26 12:05:48.000000000 +0000 @@ -0,0 +1,302 @@ +df:00.0 Class 0502: Device 8086:0d93 (rev 01) (prog-if 10) + Subsystem: Device 1af4:1100 + Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV) - IOVCap: Migration-, Interrupt Message Number: 000 - IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy+ + IOVCap: Migration- 10BitTagReq- Interrupt Message Number: 000 + IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy+ 10BitTagReq- IOVSta: Migration- Initial VFs: 128, Total VFs: 128, Number of VFs: 128, Function Dependency Link: 00 VF offset: 1, stride: 1, Device ID: a034 diff -Nru pciutils-3.7.0/tests/cap-pcie-2 pciutils-3.8.0/tests/cap-pcie-2 --- pciutils-3.7.0/tests/cap-pcie-2 2011-01-07 21:04:28.000000000 +0000 +++ pciutils-3.8.0/tests/cap-pcie-2 2022-02-10 11:58:17.000000000 +0000 @@ -48,8 +48,8 @@ ARICap: MFVC- ACS-, Next Function: 1 ARICtl: MFVC- ACS-, Function Group: 0 Capabilities: [160] Single Root I/O Virtualization (SR-IOV) - IOVCap: Migration-, Interrupt Message Number: 000 - IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy- + IOVCap: Migration- 10BitTagReq- Interrupt Message Number: 000 + IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy- 10BitTagReq- IOVSta: Migration- Initial VFs: 8, Total VFs: 8, Number of VFs: 1, Function Dependency Link: 00 VF offset: 384, stride: 2, Device ID: 10ca diff -Nru pciutils-3.7.0/tests/cap-rcec pciutils-3.8.0/tests/cap-rcec --- pciutils-3.7.0/tests/cap-rcec 1970-01-01 00:00:00.000000000 +0000 +++ pciutils-3.8.0/tests/cap-rcec 2020-09-02 08:40:22.000000000 +0000 @@ -0,0 +1,299 @@ +6a:00.4 Generic system peripheral [0807]: Intel Corporation Device 0b23 + Subsystem: Intel Corporation Device 0000 + Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- . diff -Nru pciutils-3.7.0/update-pciids.sh pciutils-3.8.0/update-pciids.sh --- pciutils-3.7.0/update-pciids.sh 2019-02-13 10:05:03.000000000 +0000 +++ pciutils-3.8.0/update-pciids.sh 2020-12-06 18:19:11.000000000 +0000 @@ -1,13 +1,14 @@ #!/bin/sh -[ "$1" = "-q" ] && quiet=true || quiet=false - set -e + SRC="https://pci-ids.ucw.cz/v2.2/pci.ids" DEST=pci.ids PCI_COMPRESSED_IDS= GREP=grep +[ "$1" = "-q" ] && quiet=true || quiet=false + # if pci.ids is read-only (because the filesystem is read-only), # then just skip this whole process. if ! touch ${DEST} >/dev/null 2>&1 ; then @@ -31,7 +32,7 @@ if which curl >/dev/null 2>&1 ; then DL="curl -o $DEST.new $SRC" - ${quiet} && DL="$DL -s -S" + ${quiet} && DL="$DL -s -S" elif which wget >/dev/null 2>&1 ; then DL="wget --no-timestamping -O $DEST.new $SRC" ${quiet} && DL="$DL -q" @@ -59,7 +60,7 @@ fi if [ -f $DEST ] ; then - mv $DEST $DEST.old + ln -f $DEST $DEST.old # --reference is supported only by chmod from GNU file, so let's ignore any errors chmod -f --reference=$DEST.old $DEST.neww 2>/dev/null || true fi diff -Nru pciutils-3.7.0/win32/config.h pciutils-3.8.0/win32/config.h --- pciutils-3.7.0/win32/config.h 2020-05-30 22:19:21.000000000 +0000 +++ pciutils-3.8.0/win32/config.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,6 +0,0 @@ -#define PCI_ARCH_I386 -#define PCI_OS_WINDOWS -#define PCI_HAVE_PM_INTEL_CONF -#define PCI_IDS "pci.ids" -#define PCI_PATH_IDS_DIR "." -#define PCILIB_VERSION "3.7.0" diff -Nru pciutils-3.7.0/win32/config.mk pciutils-3.8.0/win32/config.mk --- pciutils-3.7.0/win32/config.mk 2011-01-07 21:04:28.000000000 +0000 +++ pciutils-3.8.0/win32/config.mk 1970-01-01 00:00:00.000000000 +0000 @@ -1,13 +0,0 @@ -# TOOLPREFIX is for cross compiling - -CC=$(TOOLPREFIX)gcc -LD=$(TOOLPREFIX)ld -AR=$(TOOLPREFIX)ar -RANLIB=$(TOOLPREFIX)ranlib - -PCI_ARCH_I386=yes -PCI_OS_WINDOWS=yes -PCI_HAVE_PM_INTEL_CONF=yes - -PCILIB=$(LIBNAME).a -PCILIBPC=$(LIBNAME).pc