diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/configure.ac xserver-xorg-video-intel-2.99.917+git20180925/configure.ac --- xserver-xorg-video-intel-2.99.917+git20171229/configure.ac 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/configure.ac 2018-09-06 12:00:04.000000000 +0000 @@ -247,32 +247,6 @@ fi if test "x$shm" = "xyes"; then - AC_MSG_CHECKING(whether shmctl IPC_RMID allows subsequent attaches) - AC_TRY_RUN([ - #include - #include - #include - int main() - { - char *shmaddr; - int id = shmget (IPC_PRIVATE, 4, IPC_CREAT | 0600); - if (id == -1) return 2; - shmaddr = shmat (id, 0, 0); - shmctl (id, IPC_RMID, 0); - if ((char*) shmat (id, 0, 0) == (char*) -1) { - shmdt (shmaddr); - return 1; - } - shmdt (shmaddr); - shmdt (shmaddr); - return 0; - } - ], - AC_DEFINE(IPC_RMID_DEFERRED_RELEASE, 1, - [Define to 1 if shared memory segments are released deferred.]) - AC_MSG_RESULT(yes), - AC_MSG_RESULT(no), - AC_MSG_RESULT(assuming no)) AC_DEFINE([HAVE_MIT_SHM], 1, [Define to 1 if MIT-SHM is available]) fi @@ -342,9 +316,9 @@ [DRI=auto]) AC_ARG_ENABLE(dri1, AS_HELP_STRING([--disable-dri1], - [Disable DRI1 support [[default=yes]]]), + [Disable DRI1 support [[default=auto]]]), [DRI1=$enableval], - [DRI1=yes]) + [DRI1=auto]) AC_ARG_ENABLE(dri2, AS_HELP_STRING([--disable-dri2], [Disable DRI2 support [[default=yes]]]), diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/debian/changelog xserver-xorg-video-intel-2.99.917+git20180925/debian/changelog --- xserver-xorg-video-intel-2.99.917+git20171229/debian/changelog 2018-11-22 15:40:51.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/debian/changelog 2018-11-22 15:40:52.000000000 +0000 @@ -1,10 +1,18 @@ -xserver-xorg-video-intel (2:2.99.917+git20171229-1ubuntu1) cosmic; urgency=medium +xserver-xorg-video-intel (2:2.99.917+git20180925-2) unstable; urgency=medium - [ Andreas Boll ] * Add 01_Fix-build-on-i686.diff, fixes FTBFS on i386 with gcc-8 (Closes: #909860). - -- Timo Aaltonen Thu, 11 Oct 2018 11:39:45 +0300 + -- Andreas Boll Tue, 09 Oct 2018 17:42:33 +0200 + +xserver-xorg-video-intel (2:2.99.917+git20180925-1) unstable; urgency=medium + + * New upstream snapshot + * Switch to dbgsym package. + * control: Update VCS urls. + * rules: Fix destdir, use dh_missing. + + -- Timo Aaltonen Tue, 25 Sep 2018 15:28:52 +0300 xserver-xorg-video-intel (2:2.99.917+git20171229-1) unstable; urgency=medium diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/debian/control xserver-xorg-video-intel-2.99.917+git20180925/debian/control --- xserver-xorg-video-intel-2.99.917+git20171229/debian/control 2018-11-22 15:40:51.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/debian/control 2018-11-22 15:40:52.000000000 +0000 @@ -52,8 +52,8 @@ # libcairo2-dev, # libpng12-dev, Standards-Version: 3.9.8 -Vcs-Git: https://anonscm.debian.org/git/pkg-xorg/driver/xserver-xorg-video-intel.git -Vcs-Browser: https://anonscm.debian.org/git/pkg-xorg/driver/xserver-xorg-video-intel.git +Vcs-Git: https://salsa.debian.org/xorg-team/driver/xserver-xorg-video-intel.git +Vcs-Browser: https://salsa.debian.org/xorg-team/driver/xserver-xorg-video-intel Homepage: https://www.x.org/ Package: xserver-xorg-video-intel @@ -77,19 +77,3 @@ The use of this driver is discouraged if your hw is new enough (ca. 2007 and newer). You can try uninstalling this driver and let the server use it's builtin modesetting driver instead. - -Package: xserver-xorg-video-intel-dbg -Architecture: amd64 i386 kfreebsd-amd64 kfreebsd-i386 x32 -Depends: - xserver-xorg-video-intel (= ${binary:Version}), - ${shlibs:Depends}, - ${misc:Depends} -Recommends: - intel-gpu-tools, -Section: debug -Priority: extra -Description: X.Org X server -- Intel i8xx, i9xx display driver (debug symbols) - This driver provides support for the Intel i8xx and i9xx family of chipsets, - including i810, i815, i830, i845, i855, i865, i915, and i945 series chips. - . - This package provides debugging symbols for this Xorg X driver. diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/debian/rules xserver-xorg-video-intel-2.99.917+git20180925/debian/rules --- xserver-xorg-video-intel-2.99.917+git20171229/debian/rules 2018-11-22 15:40:51.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/debian/rules 2018-11-22 15:40:52.000000000 +0000 @@ -22,6 +22,9 @@ --with-builderstring="$(SOURCE_NAME) $(SOURCE_VERSION) ($(BUILDER))" \ $(valgrind) +override_dh_auto_install: + dh_auto_install --destdir debian/tmp + # Kill *.la files, libxvmc symlinks, and forget no-one: override_dh_install: find debian/tmp -name '*.la' -delete @@ -30,11 +33,14 @@ mkdir -p debian/tmp/usr/lib/$(DEB_HOST_MULTIARCH) mv debian/tmp/usr/lib/libI810XvMC.so.* debian/tmp/usr/lib/libIntelXvMC.so.* \ debian/tmp/usr/lib/$(DEB_HOST_MULTIARCH)/. - dh_install --fail-missing + dh_install + +override_dh_missing: + dh_missing --fail-missing # Debug package: override_dh_strip: - dh_strip --dbg-package=xserver-xorg-video-intel-dbg + dh_strip --dbgsym-migration="xserver-xorg-video-intel-dbg (<< 2:2.99.917+git20180925-1~)" # That's a plugin, use appropriate warning level: override_dh_shlibdeps: diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/man/meson.build xserver-xorg-video-intel-2.99.917+git20180925/man/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/man/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/man/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,23 @@ +configure_file(input : 'intel.man', + output : 'intel.4', + command : [ + 'sed', + '-e', + 's/__appmansuffix__/@0@/g'.format(man_config.get('appmansuffix')), + '-e', + 's/__filemansuffix__/@0@/g'.format(man_config.get('filemansuffix')), + '-e', + 's/__drivermansuffix__/@0@/g'.format(man_config.get('drivermansuffix')), + '-e', + 's/__miscmansuffix__/@0@/g'.format(man_config.get('miscmansuffix')), + '-e', + 's/__xservername__/@0@/g'.format(man_config.get('xservername')), + '-e', + 's/__xconfigfile__/@0@/g'.format(man_config.get('xconfigfile')), + '-e', + 's/__vendorversion__/@0@/g'.format(man_config.get('vendorversion')), + '@INPUT@' + ], + capture : true, + install_dir: join_paths(get_option('mandir'), 'man4'), + install : true) diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/meson.build xserver-xorg-video-intel-2.99.917+git20180925/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,208 @@ +project('xf86-video-intel', 'c', + version : '2.99.917', + default_options: [ + 'warning_level=2', + 'c_std=gnu99', + ], + license : 'MIT', + meson_version : '>0.40.0') + +config = configuration_data() + +version = meson.project_version().split('.') +config.set('PACKAGE_VERSION_MAJOR', version[0]) +config.set('PACKAGE_VERSION_MINOR', version[1]) +config.set('PACKAGE_VERSION_PATCHLEVEL', version[2]) + +config.set_quoted('LIBEXEC_PATH', join_paths(get_option('prefix'), + get_option('libexecdir'))) + +cc = meson.get_compiler('c') + +xorg = dependency('xorg-server', version : '>= 1.6', required : true) +pthreads = dependency('threads', required : true) +pciaccess = dependency('pciaccess', version : '>= 0.10', required : true) + +x11 = dependency('x11', required : false) +xfixes = dependency('xfixes', required : false) +png = dependency('libpng', required : false) + +if not cc.has_function('clock_gettime', args : '-lrt') + error('clock_gettime() missing') +endif + +if cc.has_function('getline') + config.set('HAVE_GETLINE', 1) +endif + +if cc.has_function('strndup') + config.set('HAVE_STRNDUP', 1) +endif + +if cc.has_function('strcasecmp') + config.set('HAVE_STRCASECMP', 1) +endif + +dependency('xproto', required : true) +dependency('fontsproto', required : true) +dependency('damageproto', required : true) + +if cc.has_header_symbol('xorg-server.h', 'RANDR', + dependencies : xorg) + dependency('randrproto', required : true) +endif +if cc.has_header_symbol('xorg-server.h', 'RENDER', + dependencies : xorg) + dependency('renderproto', required : true) +endif +if cc.has_header_symbol('xorg-server.h', 'DPMSExtension', + dependencies : xorg) + dependency('xextproto', required : true) +endif + +with_tools = get_option('tools') + +config.set('USE_GIT_DESCRIBE', 1) +config.set('BUILDER_DESCRIPTION', 1) + +atomic_primitives = 'none' + +atomic_primitives_code = ''' +int atomic_add(int i) { + return __sync_fetch_and_add (&i, 1); +} +int atomic_cmpxchg(int i, int j, int k) { + return __sync_val_compare_and_swap (&i, j, k); +} +int main(void) { + return 0; +}''' +if cc.links(atomic_primitives_code, name : 'atomic primitives') + atomic_primitives = 'intel' + config.set('HAVE_ATOMIC_PRIMITIVES', 1) +endif + +if atomic_primitives == 'none' and cc.has_header('atomic_ops.h') + atomic_primitives = 'libatomic-ops' + config.set('HAVE_LIB_ATOMIC_OPS', 1) +endif + +if atomic_primitives == 'none' + error('xf86-video-intel depends upon atomic operations, which were not found for your compiler/cpu. Try compiling with -march=native, or install the libatomics-op-dev package.') +endif + +libudev = dependency('libudev', required : false) +if libudev.found() + config.set('HAVE_UDEV', 1) +endif + +cpuid_code = ''' +#include +#include +int main(void) { + int eax, ebx, ecx, edx; + if (__get_cpuid_max(0, NULL) < 4) + return 0; + __cpuid_count(4, 0, eax, ebx, ecx, edx); + return 0; +}''' +if cc.links(cpuid_code, name : '__cpuid()') + config.set('HAVE_CPUID_H', 1) +endif + +has_shm = (cc.has_header('sys/ipc.h') and + cc.has_header('X11/extensions/XShm.h') and + cc.has_header('X11/extensions/shmproto.h') and + cc.has_header('X11/extensions/shmstr.h')) +if has_shm + config.set('HAVE_MIT_SHM', 1) + config.set('HAVE_X11_EXTENSIONS_SHMPROTO_H', 1) + config.set('HAVE_X11_EXTENSIONS_SHMSTR_H', 1) +endif + +if cc.has_header('X11/extensions/Xinerama.h') + config.set('HAVE_X11_EXTENSIONS_XINERAMA_H', 1) +endif + +if cc.has_header('X11/extensions/dpmsconst.h') + config.set('HAVE_X11_EXTENSIONS_DPMSCONST_H', 1) +endif + +pixman = dependency('pixman-1', version : '>= 0.16.0', required : true) + +if pixman.version() >= '0.24.0' + config.set('HAS_PIXMAN_TRIANGLES', 1) +endif +if pixman.version() >= '0.27.1' + config.set('HAS_PIXMAN_GLYPHS', 1) +endif + +with_kms = get_option('kms') +if with_kms + config.set('KMS', 1) +endif + +with_ums = get_option('ums') +if with_ums + has_ums = cc.has_header('vgaHW.h', + dependencies : xorg) + + # Currently 'required' doesn't work for cc.has_header() & co. + if not has_ums + error('UMS dependencies not met') + endif + + config.set('UMS', 1) +endif + +with_xvmc = get_option('xvmc') +if with_xvmc + dependency('xvmc', required : true) + dependency('dri2proto', required : true) + dependency('x11', required : true) + dependency('x11-xcb', required : true) + dependency('xcb-dri2', required : true) + dependency('xcb-aux', required : true) + dependency('libdrm_intel', required : true) + + config.set('ENABLE_XVMC', 1) +endif + +with_valgrind = get_option('valgrind') +if with_valgrind + message('Checking Valgrind support') + valgrind = dependency('valgrind', required : true) + config.set('HAVE_VALGRIND', 1) +endif + +inc = include_directories([ '.', 'src', 'xvmc', 'src/render_program', ]) + +add_project_arguments('-include', 'config.h', language : 'c') + +man_config = configuration_data() +man_config.set('appmansuffix', '1') +man_config.set('filemansuffix', '5') +man_config.set('drivermansuffix', '4') +man_config.set('miscmansuffix', '7') +man_config.set('xservername', + cc.get_define('__XSERVERNAME__', + prefix : '#include ', + dependencies : xorg)) +man_config.set('xconfigfile', + cc.get_define('__XCONFIGFILE____', + prefix : '#include ', + dependencies : xorg)) +man_config.set('vendorversion', '"@0@ @1@" "@2@"'.format(meson.project_name(), + meson.project_version(), + 'X Version 11')) + +subdir('src') +subdir('tools') + +if with_xvmc + subdir('xvmc') +endif + +subdir('man') + +configure_file(output: 'config.h', install: false, configuration: config) diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/meson_options.txt xserver-xorg-video-intel-2.99.917+git20180925/meson_options.txt --- xserver-xorg-video-intel-2.99.917+git20171229/meson_options.txt 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/meson_options.txt 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,42 @@ +option('sna', type : 'boolean', value : true, + description : 'Build with SNA support') +option('uxa', type : 'boolean', value : true, + description : 'Build with UXA support') +option('xaa', type : 'boolean', value : true, + description : 'Build with XAA support') +option('ums', type : 'boolean', value : true, + description : 'Build with UMS support') +option('kms', type : 'boolean', value : true, + description : 'Build with KMS support') +option('dri1', type : 'boolean', value : true, + description : 'Build DRI1 support') +option('dri2', type : 'boolean', value : true, + description : 'Build with DRI2 support') +option('dri3', type : 'boolean', value : true, + description : 'Build with DRI3 support') +option('present', type : 'boolean', value : true, + description : 'Enable Present support') +option('xvmc', type : 'boolean', value : true, + description : 'Enable XvMC support') +option('valgrind', type : 'boolean', value : true, + description : 'Enable valgrindified ioctls for debugging') +option('default-dri', type : 'combo', value : '2', choices : [ '1', '2', '3' ], + description : 'Select the default maximum DRI level') +option('default-accel', type : 'combo', value : 'sna', choices : [ 'sna', 'uxa', 'none' ], + description : 'Select the default acceleration method') +option('tools', type : 'boolean', value : true, + description : 'Enable building and installing the miscellaneous tools') +option('backlight', type : 'boolean', value : true, + description : 'Enable control of the backlight') +option('backlight-helper', type : 'boolean', value : true, + description : 'Enable building the backlight helper executable for running X under a normal user') +option('tearfree', type : 'boolean', value : false, + description : 'Enable use of TearFree by default') +option('use-create2', type : 'boolean', value : false, + description : 'Enable use of create2 ioctl (experimental)') +option('async-swap', type : 'boolean', value : false, + description : 'Enable use of asynchronous swaps (experimental)') +option('debug', type : 'combo', value : 'no', choices : [ 'no', 'sync', 'memory', 'pixmap', 'full' ], + description : 'Enable internal debugging') +option('xorg-module-dir', type : 'string', value : '@libdir@/xorg/modules', + description : 'Default xorg module directory') diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/i915_pciids.h xserver-xorg-video-intel-2.99.917+git20180925/src/i915_pciids.h --- xserver-xorg-video-intel-2.99.917+git20171229/src/i915_pciids.h 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/i915_pciids.h 2018-09-06 12:00:04.000000000 +0000 @@ -47,6 +47,14 @@ 0x030000, 0xff0000, \ (unsigned long) info } +#define INTEL_I810_IDS(info) \ + INTEL_VGA_DEVICE(0x7121, info), /* I810 */ \ + INTEL_VGA_DEVICE(0x7123, info), /* I810_DC100 */ \ + INTEL_VGA_DEVICE(0x7125, info) /* I810_E */ + +#define INTEL_I815_IDS(info) \ + INTEL_VGA_DEVICE(0x1132, info) /* I815*/ + #define INTEL_I830_IDS(info) \ INTEL_VGA_DEVICE(0x3577, info) @@ -110,92 +118,125 @@ #define INTEL_IRONLAKE_M_IDS(info) \ INTEL_VGA_DEVICE(0x0046, info) -#define INTEL_SNB_D_IDS(info) \ +#define INTEL_SNB_D_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x0102, info), \ - INTEL_VGA_DEVICE(0x0112, info), \ - INTEL_VGA_DEVICE(0x0122, info), \ INTEL_VGA_DEVICE(0x010A, info) -#define INTEL_SNB_M_IDS(info) \ - INTEL_VGA_DEVICE(0x0106, info), \ +#define INTEL_SNB_D_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x0112, info), \ + INTEL_VGA_DEVICE(0x0122, info) + +#define INTEL_SNB_D_IDS(info) \ + INTEL_SNB_D_GT1_IDS(info), \ + INTEL_SNB_D_GT2_IDS(info) + +#define INTEL_SNB_M_GT1_IDS(info) \ + INTEL_VGA_DEVICE(0x0106, info) + +#define INTEL_SNB_M_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x0116, info), \ INTEL_VGA_DEVICE(0x0126, info) +#define INTEL_SNB_M_IDS(info) \ + INTEL_SNB_M_GT1_IDS(info), \ + INTEL_SNB_M_GT2_IDS(info) + +#define INTEL_IVB_M_GT1_IDS(info) \ + INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */ + +#define INTEL_IVB_M_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */ + #define INTEL_IVB_M_IDS(info) \ - INTEL_VGA_DEVICE(0x0156, info), /* GT1 mobile */ \ - INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */ + INTEL_IVB_M_GT1_IDS(info), \ + INTEL_IVB_M_GT2_IDS(info) -#define INTEL_IVB_D_IDS(info) \ +#define INTEL_IVB_D_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \ + INTEL_VGA_DEVICE(0x015a, info) /* GT1 server */ + +#define INTEL_IVB_D_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \ - INTEL_VGA_DEVICE(0x015a, info), /* GT1 server */ \ INTEL_VGA_DEVICE(0x016a, info) /* GT2 server */ +#define INTEL_IVB_D_IDS(info) \ + INTEL_IVB_D_GT1_IDS(info), \ + INTEL_IVB_D_GT2_IDS(info) + #define INTEL_IVB_Q_IDS(info) \ INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */ -#define INTEL_HSW_IDS(info) \ +#define INTEL_HSW_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \ - INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ - INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ - INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ - INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \ - INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ - INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \ - INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ - INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \ - INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ - INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \ - INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ - INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \ INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ + INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ + INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ + INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ + INTEL_VGA_DEVICE(0x0D06, info) /* CRW GT1 mobile */ + +#define INTEL_HSW_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ + INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ + INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ + INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ + INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ + INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ + INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ + INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ + INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ + INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ - INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ - INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \ + INTEL_VGA_DEVICE(0x0D16, info) /* CRW GT2 mobile */ + +#define INTEL_HSW_GT3_IDS(info) \ + INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ + INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ + INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ + INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ + INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ + INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ + INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ + INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ + INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ + INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ + INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ - INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ - INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ +#define INTEL_HSW_IDS(info) \ + INTEL_HSW_GT1_IDS(info), \ + INTEL_HSW_GT2_IDS(info), \ + INTEL_HSW_GT3_IDS(info) + #define INTEL_VLV_IDS(info) \ INTEL_VGA_DEVICE(0x0f30, info), \ INTEL_VGA_DEVICE(0x0f31, info), \ @@ -204,17 +245,19 @@ INTEL_VGA_DEVICE(0x0157, info), \ INTEL_VGA_DEVICE(0x0155, info) -#define INTEL_BDW_GT12_IDS(info) \ +#define INTEL_BDW_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \ INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \ INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \ INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \ - INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \ + INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \ + INTEL_VGA_DEVICE(0x160D, info) /* GT1 Workstation */ + +#define INTEL_BDW_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \ INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \ INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \ - INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \ - INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \ - INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \ + INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \ INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \ INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */ @@ -235,7 +278,8 @@ INTEL_VGA_DEVICE(0x163D, info) /* Workstation */ #define INTEL_BDW_IDS(info) \ - INTEL_BDW_GT12_IDS(info), \ + INTEL_BDW_GT1_IDS(info), \ + INTEL_BDW_GT2_IDS(info), \ INTEL_BDW_GT3_IDS(info), \ INTEL_BDW_RSVD_IDS(info) @@ -295,7 +339,6 @@ #define INTEL_KBL_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \ INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \ - INTEL_VGA_DEVICE(0x5917, info), /* DT GT1.5 */ \ INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \ INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \ INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \ @@ -305,6 +348,7 @@ #define INTEL_KBL_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \ + INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \ INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \ INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \ @@ -320,17 +364,98 @@ #define INTEL_KBL_GT4_IDS(info) \ INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */ +/* AML/KBL Y GT2 */ +#define INTEL_AML_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \ + INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */ + #define INTEL_KBL_IDS(info) \ INTEL_KBL_GT1_IDS(info), \ INTEL_KBL_GT2_IDS(info), \ INTEL_KBL_GT3_IDS(info), \ - INTEL_KBL_GT4_IDS(info) + INTEL_KBL_GT4_IDS(info), \ + INTEL_AML_GT2_IDS(info) -#define INTEL_CFL_S_IDS(info) \ +/* CFL S */ +#define INTEL_CFL_S_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \ INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \ + INTEL_VGA_DEVICE(0x3E99, info) /* SRV GT1 */ + +#define INTEL_CFL_S_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \ INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \ - INTEL_VGA_DEVICE(0x3E96, info) /* SRV GT2 */ + INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \ + INTEL_VGA_DEVICE(0x3E98, info), /* SRV GT2 */ \ + INTEL_VGA_DEVICE(0x3E9A, info) /* SRV GT2 */ + +/* CFL H */ +#define INTEL_CFL_H_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \ + INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */ + +/* CFL U GT2 */ +#define INTEL_CFL_U_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x3EA9, info) + +/* CFL U GT3 */ +#define INTEL_CFL_U_GT3_IDS(info) \ + INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \ + INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \ + INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \ + INTEL_VGA_DEVICE(0x3EA8, info) /* ULT GT3 */ + +/* WHL/CFL U GT1 */ +#define INTEL_WHL_U_GT1_IDS(info) \ + INTEL_VGA_DEVICE(0x3EA1, info) + +/* WHL/CFL U GT2 */ +#define INTEL_WHL_U_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x3EA0, info) + +/* WHL/CFL U GT3 */ +#define INTEL_WHL_U_GT3_IDS(info) \ + INTEL_VGA_DEVICE(0x3EA2, info), \ + INTEL_VGA_DEVICE(0x3EA3, info), \ + INTEL_VGA_DEVICE(0x3EA4, info) + +#define INTEL_CFL_IDS(info) \ + INTEL_CFL_S_GT1_IDS(info), \ + INTEL_CFL_S_GT2_IDS(info), \ + INTEL_CFL_H_GT2_IDS(info), \ + INTEL_CFL_U_GT2_IDS(info), \ + INTEL_CFL_U_GT3_IDS(info), \ + INTEL_WHL_U_GT1_IDS(info), \ + INTEL_WHL_U_GT2_IDS(info), \ + INTEL_WHL_U_GT3_IDS(info) + +/* CNL */ +#define INTEL_CNL_IDS(info) \ + INTEL_VGA_DEVICE(0x5A51, info), \ + INTEL_VGA_DEVICE(0x5A59, info), \ + INTEL_VGA_DEVICE(0x5A41, info), \ + INTEL_VGA_DEVICE(0x5A49, info), \ + INTEL_VGA_DEVICE(0x5A52, info), \ + INTEL_VGA_DEVICE(0x5A5A, info), \ + INTEL_VGA_DEVICE(0x5A42, info), \ + INTEL_VGA_DEVICE(0x5A4A, info), \ + INTEL_VGA_DEVICE(0x5A50, info), \ + INTEL_VGA_DEVICE(0x5A40, info), \ + INTEL_VGA_DEVICE(0x5A54, info), \ + INTEL_VGA_DEVICE(0x5A5C, info), \ + INTEL_VGA_DEVICE(0x5A44, info), \ + INTEL_VGA_DEVICE(0x5A4C, info) + +/* ICL */ +#define INTEL_ICL_11_IDS(info) \ + INTEL_VGA_DEVICE(0x8A50, info), \ + INTEL_VGA_DEVICE(0x8A51, info), \ + INTEL_VGA_DEVICE(0x8A5C, info), \ + INTEL_VGA_DEVICE(0x8A5D, info), \ + INTEL_VGA_DEVICE(0x8A52, info), \ + INTEL_VGA_DEVICE(0x8A5A, info), \ + INTEL_VGA_DEVICE(0x8A5B, info), \ + INTEL_VGA_DEVICE(0x8A71, info), \ + INTEL_VGA_DEVICE(0x8A70, info) #endif /* _I915_PCIIDS_H */ diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/intel_device.c xserver-xorg-video-intel-2.99.917+git20180925/src/intel_device.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/intel_device.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/intel_device.c 2018-09-06 12:00:04.000000000 +0000 @@ -467,7 +467,7 @@ sprintf(buf, "/dev/dri/card%d", (int)(st.st_rdev & 0x7f)); if (stat(buf, &master) == 0 && - st.st_mode == master.st_mode && + S_ISCHR(master.st_mode) && (st.st_rdev & 0x7f) == master.st_rdev) return strdup(buf); @@ -478,10 +478,10 @@ static int is_render_node(int fd, struct stat *st) { if (fstat(fd, st)) - return 0; + return -1; if (!S_ISCHR(st->st_mode)) - return 0; + return -1; return st->st_rdev & 0x80; } @@ -498,7 +498,7 @@ sprintf(buf, "/dev/dri/renderD%d", (int)((master.st_rdev | 0x80) & 0xbf)); if (stat(buf, &render) == 0 && - master.st_mode == render.st_mode && + S_ISCHR(render.st_mode) && render.st_rdev == (master.st_rdev | 0x80)) return strdup(buf); @@ -506,7 +506,7 @@ for (i = 0; i < 16; i++) { sprintf(buf, "/dev/dri/renderD%d", i + 128); if (stat(buf, &render) == 0 && - master.st_mode == render.st_mode && + S_ISCHR(render.st_mode) && render.st_rdev == (master.st_rdev | 0x80)) return strdup(buf); } diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/intel_module.c xserver-xorg-video-intel-2.99.917+git20180925/src/intel_module.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/intel_module.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/intel_module.c 2018-09-06 12:00:04.000000000 +0000 @@ -310,9 +310,23 @@ /*Coffeelake*/ {0x3E90, "HD Graphics"}, {0x3E93, "HD Graphics"}, + {0x3E99, "HD Graphics"}, {0x3E91, "HD Graphics"}, {0x3E92, "HD Graphics"}, {0x3E96, "HD Graphics"}, + {0x3E9A, "HD Graphics"}, + {0x3E9B, "HD Graphics"}, + {0x3E94, "HD Graphics"}, + {0x3EA1, "HD Graphics"}, + {0x3EA4, "HD Graphics"}, + {0x3EA0, "HD Graphics"}, + {0x3EA3, "HD Graphics"}, + {0x3EA9, "HD Graphics"}, + {0x3EA2, "HD Graphics"}, + {0x3EA5, "HD Graphics"}, + {0x3EA6, "HD Graphics"}, + {0x3EA7, "HD Graphics"}, + {0x3EA8, "HD Graphics"}, /* When adding new identifiers, also update: * 1. intel_identify() @@ -369,7 +383,7 @@ INTEL_KBL_IDS(&intel_kabylake_info), INTEL_GLK_IDS(&intel_geminilake_info), - INTEL_CFL_S_IDS(&intel_coffeelake_info), + INTEL_CFL_IDS(&intel_coffeelake_info), INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info), #endif diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/legacy/i810/meson.build xserver-xorg-video-intel-2.99.917+git20180925/src/legacy/i810/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/src/legacy/i810/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/legacy/i810/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,49 @@ +i810_sources = [ + 'i810_accel.c', + 'i810_cursor.c', + 'i810_driver.c', + 'i810_memory.c', + 'i810_video.c', + 'i810_wmark.c', +] + +xorg = dependency('xorg-server', required : true) + +i810_deps = [ + dependency('libdrm', required : true), + dependency('pciaccess', required : true), + xorg, +] + +if cc.has_header('xaa.h', dependencies : xorg) + config.set('HAVE_XAA_H', 1) + i810_sources += 'i810_xaa.c' +endif + +if cc.has_header('dgaproc.h', dependencies : xorg) + config.set('HAVE_DGAPROC_H', 1) + i810_sources += 'i810_dga.c' +endif + +if with_dri1 + i810_sources += 'i810_dri.c' + i810_deps += dependency('xf86driproto', required : true) + + if with_xvmc + i810_sources += 'i810_hwmc.c' + endif +endif + +i810 = static_library('legacy_i810', + sources : i810_sources, + dependencies : i810_deps, + include_directories : inc, + c_args : [ + '-Wno-unused-parameter', + '-Wno-sign-compare', + ], + install : false) + +if with_xvmc + subdir('xvmc') +endif diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/legacy/i810/xvmc/meson.build xserver-xorg-video-intel-2.99.917+git20180925/src/legacy/i810/xvmc/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/src/legacy/i810/xvmc/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/legacy/i810/xvmc/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,15 @@ +shared_library('I810XvMC', + soversion : '1', + version : '1.0.0', + sources : 'I810XvMC.c', + dependencies : [ + dependency('x11', required : true), + dependency('xvmc', required : true), + dependency('xorg-server', required : true), + dependency('libdrm', required : true), + ], + c_args : [ + '-Wno-unused-parameter', + '-Wno-sign-compare', + ], + install : true) diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/meson.build xserver-xorg-video-intel-2.99.917+git20180925/src/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/src/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,157 @@ +xorg = dependency('xorg-server', required : true) +libdrm = dependency('libdrm', required : true) +pixman = dependency('pixman-1', required : true) + +with_dri1 = get_option('dri1') +if with_dri1 + dri1 = dependency('xf86driproto', required : true) + has_dri1 = (cc.has_header('dri.h', dependencies : xorg) and + cc.has_header('sarea.h', dependencies : xorg) and + cc.has_header('dristruct.h', dependencies : xorg)) + + # Currently 'required' doesn't work for cc.has_header() & co. + if not has_dri1 + error('DRI1 dependencies not met') + endif + + config.set('HAVE_DRI1', 1) +endif + +with_dri2 = get_option('dri2') +if with_dri2 + dri2 = dependency('dri2proto', version : '>= 2.6', required : true) + + dri = dependency('dri', required : false) + if dri.found() + dridriverdir = dri.get_pkgconfig_variable('dridriverdir') + else + dridriverdir = join_paths(get_option('libdir'), 'dri') + endif + + config.set('HAVE_DRI2', 1) + config.set_quoted('DRI_DRIVER_PATH', dridriverdir) +endif + +with_dri3 = get_option('dri3') +if with_dri3 + dri3 = dependency('dri3proto', required : true) + has_dri3 = (cc.has_header_symbol('xorg-server.h', 'DRI3', + dependencies : xorg) and + cc.has_header('misyncstr.h', + dependencies : xorg) and + cc.has_header('misyncshm.h', + dependencies : xorg)) + + # Currently 'required' doesn't work for cc.has_header() & co. + if not has_dri3 + error('DRI3 dependencies not met') + endif + + config.set('HAVE_DRI3', 1) +endif + +default_dri = get_option('default-dri') +config.set('DEFAULT_DRI_LEVEL', default_dri) + +present = dependency('presentproto', required : false) +has_present = (present.found() and + cc.has_header('present.h', dependencies : xorg)) +if has_present + config.set('HAVE_PRESENT', 1) +endif + +if get_option('backlight') + config.set('USE_BACKLIGHT', 1) +endif +with_backlight_helper = get_option('backlight-helper') +if with_backlight_helper + config.set('USE_BACKLIGHT_HELPER', 1) +endif + +debug = get_option('debug') +if debug == 'sync' + config.set('DEBUG_SYNC', 1) +endif +if debug == 'memory' or debug == 'full' + config.set('DEBUG_MEMORY', 1) +endif +if debug == 'pixmap' or debug == 'full' + config.set('DEBUG_PIXMAP', 1) +endif +if debug == 'full' + config.set('HAS_DEBUG_FULL', 1) +endif + +intel_drv_sources = [ + 'backlight.c', + 'fd.c', + 'intel_device.c', + 'intel_options.c', + 'intel_module.c', +] + +intel_drv_deps = [ + dependency('pciaccess', version : '>= 0.10', required : true), + libdrm, + xorg, +] + +intel_drv_libs = [] + +if with_ums + subdir('legacy/i810') + intel_drv_libs += i810 +endif + +default_accel = get_option('default-accel') + +with_sna = get_option('sna') +if with_sna + subdir('sna') + intel_drv_libs += sna +elif default_accel == 'sna' + error('SNA not available, so can\'t selected as the default acceleration method') +endif + +with_uxa = get_option('uxa') +if with_uxa + subdir('uxa') + intel_drv_libs += uxa +elif default_accel == 'uxa' + error('UXA not available, so can\'t selected as the default acceleration method') +endif + +if default_accel == 'sna' + config.set('DEFAULT_ACCEL_METHOD', 'SNA') +elif default_accel == 'uxa' + config.set('DEFAULT_ACCEL_METHOD', 'UXA') +else + config.set('DEFAULT_ACCEL_METHOD', 'NOACCEL') +endif + +if with_valgrind + intel_drv_deps += valgrind +endif + +xorg_moduledir = get_option('xorg-module-dir') +moduledir = '' +foreach dir : xorg_moduledir.split('/') + if dir == '@libdir@' + dir = get_option('libdir') + endif + moduledir = join_paths(moduledir, dir) +endforeach + +shared_module('intel_drv', + sources : intel_drv_sources, + dependencies : intel_drv_deps, + link_with : intel_drv_libs, + c_args : [ + '-DMAJOR_IN_SYSMACROS', + '-Wno-unused-parameter', + '-Wno-sign-compare', + '-Wno-missing-field-initializers', + ], + name_prefix : '', + install_dir : join_paths(moduledir, 'drivers'), + install : true) diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g4a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g4a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g4a 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g4a 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,112 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + +define(`Crn', `mask_sample_r') +define(`Crn_01', `mask_sample_r_01') +define(`Crn_23', `mask_sample_r_23') + +define(`Yn', `mask_sample_g') +define(`Yn_01', `mask_sample_g_01') +define(`Yn_23', `mask_sample_g_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * Cy = 255/(235-16) + * R = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kr)(Cr-128/255), 0, 1) + * G = Clamp ( 255/(235-16)(Y-16/255) - + * 255/112(1.0-Kr)Kr/Kg(Cr-128/255) - + * 255/112(1.0-Kb)Kb/Kg(Cb-128/255), 0, 1) + * B = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kb)(Cb-128/255), 0, 1) + * + * BT.601: + * Kr = 0.299 + * Kb = 0.114 + * Kg = (1.0 - Kr - Kb) = 0.587 + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 255/(235-16) + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Yn + + * Crn * 255/112 * (1.0 - Kr) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; + + /* + * G = Yn - + * Crn * 255/112 * (1.0 - Kr) * Kr / Kg - + * Cbn * 255/112 * (1.0 - Kb) * Kb / Kg + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; + + /* + * B = Yn + + * Cbn * 255/112 * (1.0 - Kb) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; + + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g4b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g4b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g4b 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g4b 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,12 @@ + { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, + { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, + { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g4b.gen5 xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g4b.gen5 --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g4b.gen5 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,12 @@ + { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, + { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, + { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g5a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g5a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g5a 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g5a 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,112 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + +define(`Crn', `mask_sample_r') +define(`Crn_01', `mask_sample_r_01') +define(`Crn_23', `mask_sample_r_23') + +define(`Yn', `mask_sample_g') +define(`Yn_01', `mask_sample_g_01') +define(`Yn_23', `mask_sample_g_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * Cy = 255/(235-16) + * R = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kr)(Cr-128/255), 0, 1) + * G = Clamp ( 255/(235-16)(Y-16/255) - + * 255/112(1.0-Kr)Kr/Kg(Cr-128/255) - + * 255/112(1.0-Kb)Kb/Kg(Cb-128/255), 0, 1) + * B = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kb)(Cb-128/255), 0, 1) + * + * BT.601: + * Kr = 0.299 + * Kb = 0.114 + * Kg = (1.0 - Kr - Kb) = 0.587 + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 255/(235-16) + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Yn + + * Crn * 255/112 * (1.0 - Kr) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; + + /* + * G = Yn - + * Crn * 255/112 * (1.0 - Kr) * Kr / Kg - + * Cbn * 255/112 * (1.0 - Kb) * Kb / Kg + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; + + /* + * B = Yn + + * Cbn * 255/112 * (1.0 - Kb) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; + + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g5b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g5b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g5b 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g5b 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,12 @@ + { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, + { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, + { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g6a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g6a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g6a 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g6a 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,112 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + +define(`Crn', `mask_sample_r') +define(`Crn_01', `mask_sample_r_01') +define(`Crn_23', `mask_sample_r_23') + +define(`Yn', `mask_sample_g') +define(`Yn_01', `mask_sample_g_01') +define(`Yn_23', `mask_sample_g_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * Cy = 255/(235-16) + * R = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kr)(Cr-128/255), 0, 1) + * G = Clamp ( 255/(235-16)(Y-16/255) - + * 255/112(1.0-Kr)Kr/Kg(Cr-128/255) - + * 255/112(1.0-Kb)Kb/Kg(Cb-128/255), 0, 1) + * B = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kb)(Cb-128/255), 0, 1) + * + * BT.601: + * Kr = 0.299 + * Kb = 0.114 + * Kg = (1.0 - Kr - Kb) = 0.587 + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 255/(235-16) + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Yn + + * Crn * 255/112 * (1.0 - Kr) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; + + /* + * G = Yn - + * Crn * 255/112 * (1.0 - Kr) * Kr / Kg - + * Cbn * 255/112 * (1.0 - Kb) * Kb / Kg + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; + + /* + * B = Yn + + * Cbn * 255/112 * (1.0 - Kb) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; + + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g6b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g6b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g6b 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g6b 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,12 @@ + { 0x00800040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00800041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00800040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80800048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00800048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, + { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, + { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g7a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g7a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g7a 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g7a 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,112 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + +define(`Crn', `mask_sample_r') +define(`Crn_01', `mask_sample_r_01') +define(`Crn_23', `mask_sample_r_23') + +define(`Yn', `mask_sample_g') +define(`Yn_01', `mask_sample_g_01') +define(`Yn_23', `mask_sample_g_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * Cy = 255/(235-16) + * R = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kr)(Cr-128/255), 0, 1) + * G = Clamp ( 255/(235-16)(Y-16/255) - + * 255/112(1.0-Kr)Kr/Kg(Cr-128/255) - + * 255/112(1.0-Kb)Kb/Kg(Cb-128/255), 0, 1) + * B = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kb)(Cb-128/255), 0, 1) + * + * BT.601: + * Kr = 0.299 + * Kb = 0.114 + * Kg = (1.0 - Kr - Kb) = 0.587 + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 255/(235-16) + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Yn + + * Crn * 255/112 * (1.0 - Kr) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; + + /* + * G = Yn - + * Crn * 255/112 * (1.0 - Kr) * Kr / Kg - + * Cbn * 255/112 * (1.0 - Kb) * Kb / Kg + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; + + /* + * B = Yn + + * Cbn * 255/112 * (1.0 - Kb) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; + + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g7b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g7b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g7b 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g7b 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,12 @@ + { 0x00800040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00800041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00800040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80800048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00800048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, + { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, + { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g8a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g8a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g8a 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g8a 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,118 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + +define(`Crn', `mask_sample_r') +define(`Crn_01', `mask_sample_r_01') +define(`Crn_23', `mask_sample_r_23') + +define(`Yn', `mask_sample_g') +define(`Yn_01', `mask_sample_g_01') +define(`Yn_23', `mask_sample_g_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * R = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kr)(Cr-128/255), 0, 1) + * G = Clamp ( 255/(235-16)(Y-16/255) - + * 255/112(1.0-Kr)Kr/Kg(Cr-128/255) - + * 255/112(1.0-Kb)Kb/Kg(Cb-128/255), 0, 1) + * B = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kb)(Cb-128/255), 0, 1) + * + * BT.601: + * Kr = 0.299 + * Kb = 0.114 + * Kg = (1.0 - Kr - Kb) = 0.587 + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 255/(235-16) + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Yn + + * Crn * 255/112 * (1.0 - Kr) + */ +mov (8) acc0<1>F Yn_01<8,8,1>F { compr align1 }; +mac.sat(8) src_sample_r_01<1>F Crn_01<8,8,1>F 1.596F { compr align1 }; + +mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; +mac.sat(8) src_sample_r_23<1>F Crn_23<8,8,1>F 1.596F { compr align1 }; + /* + * G = Yn - + * Crn * 255/112 * (1.0 - Kr) * Kr / Kg - + * Cbn * 255/112 * (1.0 - Kb) * Kb / Kg + */ +mov (8) acc0<1>F Yn_01<8,8,1>F { compr align1 }; +mac (8) acc0<1>F Crn_01<8,8,1>F -0.813F { compr align1 }; +mac.sat(8) src_sample_g_01<1>F Cbn_01<8,8,1>F -0.392F { compr align1 }; + +mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; +mac (8) acc0<1>F Crn_23<8,8,1>F -0.813F { compr align1 }; +mac.sat(16) src_sample_g_23<1>F Cbn_23<8,8,1>F -0.392F { compr align1 }; + /* + * B = Yn + + * Cbn * 255/112 * (1.0 - Kb) + */ +mov (8) acc0<1>F Yn_01<8,8,1>F { compr align1 }; +mac.sat(8) src_sample_b_01<1>F Cbn_01<8,8,1>F 2.017F { compr align1 }; + +mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; +mac.sat(8) src_sample_b_23<1>F Cbn_23<8,8,1>F 2.017F { compr align1 }; + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g8b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g8b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt601.g8b 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt601.g8b 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,19 @@ + { 0x00800040, 0x23003ae8, 0x3e8d0200, 0xbd808081 }, + { 0x00800041, 0x23003ae8, 0x3e8d0300, 0x3f94fdf4 }, + { 0x00800040, 0x22c03ae8, 0x3e8d01c0, 0xbf008084 }, + { 0x00800040, 0x23403ae8, 0x3e8d0240, 0xbf008084 }, + { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, + { 0x80600048, 0x21c03ae8, 0x3e8d02c0, 0x3fcc49ba }, + { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, + { 0x80600048, 0x21e03ae8, 0x3e8d02e0, 0x3fcc49ba }, + { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, + { 0x00600048, 0x24003ae0, 0x3e8d02c0, 0xbf5020c5 }, + { 0x80600048, 0x22003ae8, 0x3e8d0340, 0xbec8b439 }, + { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, + { 0x00600048, 0x24003ae0, 0x3e8d02e0, 0xbf5020c5 }, + { 0x80800048, 0x22203ae8, 0x3e8d0360, 0xbec8b439 }, + { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, + { 0x80600048, 0x22403ae8, 0x3e8d0340, 0x40011687 }, + { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, + { 0x80600048, 0x22603ae8, 0x3e8d0360, 0x40011687 }, + { 0x00800001, 0x22803ee8, 0x38000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g4a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g4a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g4a 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g4a 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,111 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + +define(`Crn', `mask_sample_r') +define(`Crn_01', `mask_sample_r_01') +define(`Crn_23', `mask_sample_r_23') + +define(`Yn', `mask_sample_g') +define(`Yn_01', `mask_sample_g_01') +define(`Yn_23', `mask_sample_g_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * R = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kr)(Cr-128/255), 0, 1) + * G = Clamp ( 255/(235-16)(Y-16/255) - + * 255/112(1.0-Kr)Kr/Kg(Cr-128/255) - + * 255/112(1.0-Kb)Kb/Kg(Cb-128/255), 0, 1) + * B = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kb)(Cb-128/255), 0, 1) + * + * BT.709: + * Kr = .2126 + * Kb = .0722 + * Kg = (1.0 - Kr - Kb) = 0.7152 + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 255/(235-16) + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Yn + + * Crn * 255/112 * (1.0 - Kr) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.793F { compr align1 }; + + /* + * G = Yn - + * Crn * 255/112 * (1.0 - Kr) * Kr / Kg - + * Cbn * 255/112 * (1.0 - Kb) * Kb / Kg + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.533F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.213F { compr align1 }; + + /* + * B = Yn + + * Cbn * 255/112 * (1.0 - Kb) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.112F { compr align1 }; + + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g4b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g4b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g4b 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g4b 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,12 @@ + { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fe58106 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf0872b0 }, + { 0x80802048, 0x22007fbd, 0x008d0340, 0xbe5a1cac }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x22407fbd, 0x008d0340, 0x40072b02 }, + { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g4b.gen5 xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g4b.gen5 --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g4b.gen5 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,12 @@ + { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fe58106 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf0872b0 }, + { 0x80802048, 0x22007fbd, 0x008d0340, 0xbe5a1cac }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x22407fbd, 0x008d0340, 0x40072b02 }, + { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g5a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g5a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g5a 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g5a 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,111 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + +define(`Crn', `mask_sample_r') +define(`Crn_01', `mask_sample_r_01') +define(`Crn_23', `mask_sample_r_23') + +define(`Yn', `mask_sample_g') +define(`Yn_01', `mask_sample_g_01') +define(`Yn_23', `mask_sample_g_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * R = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kr)(Cr-128/255), 0, 1) + * G = Clamp ( 255/(235-16)(Y-16/255) - + * 255/112(1.0-Kr)Kr/Kg(Cr-128/255) - + * 255/112(1.0-Kb)Kb/Kg(Cb-128/255), 0, 1) + * B = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kb)(Cb-128/255), 0, 1) + * + * BT.709: + * Kr = .2126 + * Kb = .0722 + * Kg = (1.0 - Kr - Kb) = 0.7152 + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 255/(235-16) + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Yn + + * Crn * 255/112 * (1.0 - Kr) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.793F { compr align1 }; + + /* + * G = Yn - + * Crn * 255/112 * (1.0 - Kr) * Kr / Kg - + * Cbn * 255/112 * (1.0 - Kb) * Kb / Kg + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.533F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.213F { compr align1 }; + + /* + * B = Yn + + * Cbn * 255/112 * (1.0 - Kb) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.112F { compr align1 }; + + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g5b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g5b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g5b 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g5b 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,12 @@ + { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fe58106 }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf0872b0 }, + { 0x80802048, 0x22007fbd, 0x008d0340, 0xbe5a1cac }, + { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80802048, 0x22407fbd, 0x008d0340, 0x40072b02 }, + { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g6a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g6a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g6a 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g6a 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,111 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + +define(`Crn', `mask_sample_r') +define(`Crn_01', `mask_sample_r_01') +define(`Crn_23', `mask_sample_r_23') + +define(`Yn', `mask_sample_g') +define(`Yn_01', `mask_sample_g_01') +define(`Yn_23', `mask_sample_g_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * R = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kr)(Cr-128/255), 0, 1) + * G = Clamp ( 255/(235-16)(Y-16/255) - + * 255/112(1.0-Kr)Kr/Kg(Cr-128/255) - + * 255/112(1.0-Kb)Kb/Kg(Cb-128/255), 0, 1) + * B = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kb)(Cb-128/255), 0, 1) + * + * BT.709: + * Kr = .2126 + * Kb = .0722 + * Kg = (1.0 - Kr - Kb) = 0.7152 + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 255/(235-16) + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Yn + + * Crn * 255/112 * (1.0 - Kr) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.793F { compr align1 }; + + /* + * G = Yn - + * Crn * 255/112 * (1.0 - Kr) * Kr / Kg - + * Cbn * 255/112 * (1.0 - Kb) * Kb / Kg + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.533F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.213F { compr align1 }; + + /* + * B = Yn + + * Cbn * 255/112 * (1.0 - Kb) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.112F { compr align1 }; + + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g6b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g6b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g6b 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g6b 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,12 @@ + { 0x00800040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00800041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00800040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80800048, 0x21c07fbd, 0x008d02c0, 0x3fe58106 }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00800048, 0x24007fbc, 0x008d02c0, 0xbf0872b0 }, + { 0x80800048, 0x22007fbd, 0x008d0340, 0xbe5a1cac }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80800048, 0x22407fbd, 0x008d0340, 0x40072b02 }, + { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g7a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g7a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g7a 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g7a 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,111 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + +define(`Crn', `mask_sample_r') +define(`Crn_01', `mask_sample_r_01') +define(`Crn_23', `mask_sample_r_23') + +define(`Yn', `mask_sample_g') +define(`Yn_01', `mask_sample_g_01') +define(`Yn_23', `mask_sample_g_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * R = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kr)(Cr-128/255), 0, 1) + * G = Clamp ( 255/(235-16)(Y-16/255) - + * 255/112(1.0-Kr)Kr/Kg(Cr-128/255) - + * 255/112(1.0-Kb)Kb/Kg(Cb-128/255), 0, 1) + * B = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kb)(Cb-128/255), 0, 1) + * + * BT.709: + * Kr = .2126 + * Kb = .0722 + * Kg = (1.0 - Kr - Kb) = 0.7152 + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 255/(235-16) + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Yn + + * Crn * 255/112 * (1.0 - Kr) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.793F { compr align1 }; + + /* + * G = Yn - + * Crn * 255/112 * (1.0 - Kr) * Kr / Kg - + * Cbn * 255/112 * (1.0 - Kb) * Kb / Kg + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.533F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.213F { compr align1 }; + + /* + * B = Yn + + * Cbn * 255/112 * (1.0 - Kb) + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.112F { compr align1 }; + + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g7b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g7b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g7b 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g7b 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,12 @@ + { 0x00800040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00800041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00800040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80800048, 0x21c07fbd, 0x008d02c0, 0x3fe58106 }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00800048, 0x24007fbc, 0x008d02c0, 0xbf0872b0 }, + { 0x80800048, 0x22007fbd, 0x008d0340, 0xbe5a1cac }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80800048, 0x22407fbd, 0x008d0340, 0x40072b02 }, + { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g8a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g8a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g8a 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g8a 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,118 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + +define(`Crn', `mask_sample_r') +define(`Crn_01', `mask_sample_r_01') +define(`Crn_23', `mask_sample_r_23') + +define(`Yn', `mask_sample_g') +define(`Yn_01', `mask_sample_g_01') +define(`Yn_23', `mask_sample_g_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * R = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kr)(Cr-128/255), 0, 1) + * G = Clamp ( 255/(235-16)(Y-16/255) - + * 255/112(1.0-Kr)Kr/Kg(Cr-128/255) - + * 255/112(1.0-Kb)Kb/Kg(Cb-128/255), 0, 1) + * B = Clamp ( 255/(235-16)(Y-16/255) + + * 255/112(1.0-Kb)(Cb-128/255), 0, 1) + * + * BT.709: + * Kr = .2126 + * Kb = .0722 + * Kg = (1.0 - Kr - Kb) = 0.7152 + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 255/(235-16) + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Yn + + * Crn * 255/112 * (1.0 - Kr) + */ +mov (8) acc0<1>F Yn_01<8,8,1>F { compr align1 }; +mac.sat(8) src_sample_r_01<1>F Crn_01<8,8,1>F 1.793F { compr align1 }; + +mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; +mac.sat(8) src_sample_r_23<1>F Crn_23<8,8,1>F 1.793F { compr align1 }; + /* + * G = Yn - + * Crn * 255/112 * (1.0 - Kr) * Kr / Kg + * Cbn * 255/112 * (1.0 - Kb) * Kb / Kg + */ +mov (8) acc0<1>F Yn_01<8,8,1>F { compr align1 }; +mac (8) acc0<1>F Crn_01<8,8,1>F -0.533F { compr align1 }; +mac.sat(8) src_sample_g_01<1>F Cbn_01<8,8,1>F -0.213F { compr align1 }; + +mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; +mac (8) acc0<1>F Crn_23<8,8,1>F -0.533F { compr align1 }; +mac.sat(16) src_sample_g_23<1>F Cbn_23<8,8,1>F -0.213F { compr align1 }; + /* + * B = Yn + + * Cbn * 255/112 * (1.0 - Kb) + */ +mov (8) acc0<1>F Yn_01<8,8,1>F { compr align1 }; +mac.sat(8) src_sample_b_01<1>F Cbn_01<8,8,1>F 2.112F { compr align1 }; + +mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; +mac.sat(8) src_sample_b_23<1>F Cbn_23<8,8,1>F 2.112F { compr align1 }; + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g8b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g8b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb_bt709.g8b 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb_bt709.g8b 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,19 @@ + { 0x00800040, 0x23003ae8, 0x3e8d0200, 0xbd808081 }, + { 0x00800041, 0x23003ae8, 0x3e8d0300, 0x3f94fdf4 }, + { 0x00800040, 0x22c03ae8, 0x3e8d01c0, 0xbf008084 }, + { 0x00800040, 0x23403ae8, 0x3e8d0240, 0xbf008084 }, + { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, + { 0x80600048, 0x21c03ae8, 0x3e8d02c0, 0x3fe58106 }, + { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, + { 0x80600048, 0x21e03ae8, 0x3e8d02e0, 0x3fe58106 }, + { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, + { 0x00600048, 0x24003ae0, 0x3e8d02c0, 0xbf0872b0 }, + { 0x80600048, 0x22003ae8, 0x3e8d0340, 0xbe5a1cac }, + { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, + { 0x00600048, 0x24003ae0, 0x3e8d02e0, 0xbf0872b0 }, + { 0x80800048, 0x22203ae8, 0x3e8d0360, 0xbe5a1cac }, + { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, + { 0x80600048, 0x22403ae8, 0x3e8d0340, 0x40072b02 }, + { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, + { 0x80600048, 0x22603ae8, 0x3e8d0360, 0x40072b02 }, + { 0x00800001, 0x22803ee8, 0x38000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g4a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g4a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g4a 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g4a 1970-01-01 00:00:00.000000000 +0000 @@ -1,98 +0,0 @@ -/* - * Copyright © 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Keith Packard - * Eric Anholt - * - */ - -include(`exa_wm.g4i') - -define(`YCbCr_base', `src_sample_base') - -define(`Cr', `src_sample_r') -define(`Cr_01', `src_sample_r_01') -define(`Cr_23', `src_sample_r_23') - -define(`Y', `src_sample_g') -define(`Y_01', `src_sample_g_01') -define(`Y_23', `src_sample_g_23') - -define(`Cb', `src_sample_b') -define(`Cb_01', `src_sample_b_01') -define(`Cb_23', `src_sample_b_23') - -define(`Crn', `mask_sample_r') -define(`Crn_01', `mask_sample_r_01') -define(`Crn_23', `mask_sample_r_23') - -define(`Yn', `mask_sample_g') -define(`Yn_01', `mask_sample_g_01') -define(`Yn_23', `mask_sample_g_23') - -define(`Cbn', `mask_sample_b') -define(`Cbn_01', `mask_sample_b_01') -define(`Cbn_23', `mask_sample_b_23') - - /* color space conversion function: - * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) - * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) - * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) - */ - - /* Normalize Y, Cb and Cr: - * - * Yn = (Y - 16/255) * 1.164 - * Crn = Cr - 128 / 255 - * Cbn = Cb - 128 / 255 - */ -add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; -mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; - -add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; - -add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; - - /* - * R = Y + Cr * 1.596 - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; - - /* - * G = Crn * -0.813 + Cbn * -0.392 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; -mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; - - /* - * B = Cbn * 2.017 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; - - /* - * A = 1.0 - */ -mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g4b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g4b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g4b 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g4b 1970-01-01 00:00:00.000000000 +0000 @@ -1,12 +0,0 @@ - { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, - { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, - { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, - { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, - { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, - { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, - { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, - { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, - { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g4b.gen5 xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g4b.gen5 --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g4b.gen5 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 @@ -1,12 +0,0 @@ - { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, - { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, - { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, - { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, - { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, - { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, - { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, - { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, - { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g5a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g5a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g5a 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g5a 1970-01-01 00:00:00.000000000 +0000 @@ -1,98 +0,0 @@ -/* - * Copyright © 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Keith Packard - * Eric Anholt - * - */ - -include(`exa_wm.g4i') - -define(`YCbCr_base', `src_sample_base') - -define(`Cr', `src_sample_r') -define(`Cr_01', `src_sample_r_01') -define(`Cr_23', `src_sample_r_23') - -define(`Y', `src_sample_g') -define(`Y_01', `src_sample_g_01') -define(`Y_23', `src_sample_g_23') - -define(`Cb', `src_sample_b') -define(`Cb_01', `src_sample_b_01') -define(`Cb_23', `src_sample_b_23') - -define(`Crn', `mask_sample_r') -define(`Crn_01', `mask_sample_r_01') -define(`Crn_23', `mask_sample_r_23') - -define(`Yn', `mask_sample_g') -define(`Yn_01', `mask_sample_g_01') -define(`Yn_23', `mask_sample_g_23') - -define(`Cbn', `mask_sample_b') -define(`Cbn_01', `mask_sample_b_01') -define(`Cbn_23', `mask_sample_b_23') - - /* color space conversion function: - * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) - * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) - * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) - */ - - /* Normalize Y, Cb and Cr: - * - * Yn = (Y - 16/255) * 1.164 - * Crn = Cr - 128 / 255 - * Cbn = Cb - 128 / 255 - */ -add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; -mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; - -add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; - -add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; - - /* - * R = Y + Cr * 1.596 - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; - - /* - * G = Crn * -0.813 + Cbn * -0.392 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; -mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; - - /* - * B = Cbn * 2.017 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; - - /* - * A = 1.0 - */ -mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g5b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g5b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g5b 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g5b 1970-01-01 00:00:00.000000000 +0000 @@ -1,12 +0,0 @@ - { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, - { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, - { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, - { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, - { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, - { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, - { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, - { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, - { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g6a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g6a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g6a 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g6a 1970-01-01 00:00:00.000000000 +0000 @@ -1,98 +0,0 @@ -/* - * Copyright © 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Keith Packard - * Eric Anholt - * - */ - -include(`exa_wm.g4i') - -define(`YCbCr_base', `src_sample_base') - -define(`Cr', `src_sample_r') -define(`Cr_01', `src_sample_r_01') -define(`Cr_23', `src_sample_r_23') - -define(`Y', `src_sample_g') -define(`Y_01', `src_sample_g_01') -define(`Y_23', `src_sample_g_23') - -define(`Cb', `src_sample_b') -define(`Cb_01', `src_sample_b_01') -define(`Cb_23', `src_sample_b_23') - -define(`Crn', `mask_sample_r') -define(`Crn_01', `mask_sample_r_01') -define(`Crn_23', `mask_sample_r_23') - -define(`Yn', `mask_sample_g') -define(`Yn_01', `mask_sample_g_01') -define(`Yn_23', `mask_sample_g_23') - -define(`Cbn', `mask_sample_b') -define(`Cbn_01', `mask_sample_b_01') -define(`Cbn_23', `mask_sample_b_23') - - /* color space conversion function: - * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) - * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) - * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) - */ - - /* Normalize Y, Cb and Cr: - * - * Yn = (Y - 16/255) * 1.164 - * Crn = Cr - 128 / 255 - * Cbn = Cb - 128 / 255 - */ -add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; -mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; - -add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; - -add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; - - /* - * R = Y + Cr * 1.596 - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; - - /* - * G = Crn * -0.813 + Cbn * -0.392 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; -mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; - - /* - * B = Cbn * 2.017 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; - - /* - * A = 1.0 - */ -mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g6b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g6b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g6b 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g6b 1970-01-01 00:00:00.000000000 +0000 @@ -1,12 +0,0 @@ - { 0x00800040, 0x23007fbd, 0x008d0200, 0xbd808081 }, - { 0x00800041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, - { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, - { 0x00800040, 0x23407fbd, 0x008d0240, 0xbf008084 }, - { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x80800048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, - { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x00800048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, - { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, - { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, - { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g7a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g7a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g7a 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g7a 1970-01-01 00:00:00.000000000 +0000 @@ -1,98 +0,0 @@ -/* - * Copyright © 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Keith Packard - * Eric Anholt - * - */ - -include(`exa_wm.g4i') - -define(`YCbCr_base', `src_sample_base') - -define(`Cr', `src_sample_r') -define(`Cr_01', `src_sample_r_01') -define(`Cr_23', `src_sample_r_23') - -define(`Y', `src_sample_g') -define(`Y_01', `src_sample_g_01') -define(`Y_23', `src_sample_g_23') - -define(`Cb', `src_sample_b') -define(`Cb_01', `src_sample_b_01') -define(`Cb_23', `src_sample_b_23') - -define(`Crn', `mask_sample_r') -define(`Crn_01', `mask_sample_r_01') -define(`Crn_23', `mask_sample_r_23') - -define(`Yn', `mask_sample_g') -define(`Yn_01', `mask_sample_g_01') -define(`Yn_23', `mask_sample_g_23') - -define(`Cbn', `mask_sample_b') -define(`Cbn_01', `mask_sample_b_01') -define(`Cbn_23', `mask_sample_b_23') - - /* color space conversion function: - * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) - * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) - * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) - */ - - /* Normalize Y, Cb and Cr: - * - * Yn = (Y - 16/255) * 1.164 - * Crn = Cr - 128 / 255 - * Cbn = Cb - 128 / 255 - */ -add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; -mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; - -add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; - -add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; - - /* - * R = Y + Cr * 1.596 - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; - - /* - * G = Crn * -0.813 + Cbn * -0.392 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; -mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; - - /* - * B = Cbn * 2.017 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; - - /* - * A = 1.0 - */ -mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g7b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g7b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g7b 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g7b 1970-01-01 00:00:00.000000000 +0000 @@ -1,12 +0,0 @@ - { 0x00800040, 0x23007fbd, 0x008d0200, 0xbd808081 }, - { 0x00800041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, - { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, - { 0x00800040, 0x23407fbd, 0x008d0240, 0xbf008084 }, - { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x80800048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, - { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x00800048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, - { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, - { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, - { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, - { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g8a xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g8a --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g8a 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g8a 1970-01-01 00:00:00.000000000 +0000 @@ -1,105 +0,0 @@ -/* - * Copyright © 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Keith Packard - * Eric Anholt - * - */ - -include(`exa_wm.g4i') - -define(`YCbCr_base', `src_sample_base') - -define(`Cr', `src_sample_r') -define(`Cr_01', `src_sample_r_01') -define(`Cr_23', `src_sample_r_23') - -define(`Y', `src_sample_g') -define(`Y_01', `src_sample_g_01') -define(`Y_23', `src_sample_g_23') - -define(`Cb', `src_sample_b') -define(`Cb_01', `src_sample_b_01') -define(`Cb_23', `src_sample_b_23') - -define(`Crn', `mask_sample_r') -define(`Crn_01', `mask_sample_r_01') -define(`Crn_23', `mask_sample_r_23') - -define(`Yn', `mask_sample_g') -define(`Yn_01', `mask_sample_g_01') -define(`Yn_23', `mask_sample_g_23') - -define(`Cbn', `mask_sample_b') -define(`Cbn_01', `mask_sample_b_01') -define(`Cbn_23', `mask_sample_b_23') - - /* color space conversion function: - * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) - * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) - * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) - */ - - /* Normalize Y, Cb and Cr: - * - * Yn = (Y - 16/255) * 1.164 - * Crn = Cr - 128 / 255 - * Cbn = Cb - 128 / 255 - */ -add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; -mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; - -add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; - -add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; - - /* - * R = Y + Cr * 1.596 - */ -mov (8) acc0<1>F Yn_01<8,8,1>F { compr align1 }; -mac.sat(8) src_sample_r_01<1>F Crn_01<8,8,1>F 1.596F { compr align1 }; - -mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; -mac.sat(8) src_sample_r_23<1>F Crn_23<8,8,1>F 1.596F { compr align1 }; - /* - * G = Crn * -0.813 + Cbn * -0.392 + Y - */ -mov (8) acc0<1>F Yn_01<8,8,1>F { compr align1 }; -mac (8) acc0<1>F Crn_01<8,8,1>F -0.813F { compr align1 }; -mac.sat(8) src_sample_g_01<1>F Cbn_01<8,8,1>F -0.392F { compr align1 }; - -mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; -mac (8) acc0<1>F Crn_23<8,8,1>F -0.813F { compr align1 }; -mac.sat(16) src_sample_g_23<1>F Cbn_23<8,8,1>F -0.392F { compr align1 }; - /* - * B = Cbn * 2.017 + Y - */ -mov (8) acc0<1>F Yn_01<8,8,1>F { compr align1 }; -mac.sat(8) src_sample_b_01<1>F Cbn_01<8,8,1>F 2.017F { compr align1 }; - -mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; -mac.sat(8) src_sample_b_23<1>F Cbn_23<8,8,1>F 2.017F { compr align1 }; - /* - * A = 1.0 - */ -mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g8b xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g8b --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/exa_wm_yuv_rgb.g8b 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/exa_wm_yuv_rgb.g8b 1970-01-01 00:00:00.000000000 +0000 @@ -1,19 +0,0 @@ - { 0x00800040, 0x23003ae8, 0x3e8d0200, 0xbd808081 }, - { 0x00800041, 0x23003ae8, 0x3e8d0300, 0x3f94fdf4 }, - { 0x00800040, 0x22c03ae8, 0x3e8d01c0, 0xbf008084 }, - { 0x00800040, 0x23403ae8, 0x3e8d0240, 0xbf008084 }, - { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, - { 0x80600048, 0x21c03ae8, 0x3e8d02c0, 0x3fcc49ba }, - { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, - { 0x80600048, 0x21e03ae8, 0x3e8d02e0, 0x3fcc49ba }, - { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, - { 0x00600048, 0x24003ae0, 0x3e8d02c0, 0xbf5020c5 }, - { 0x80600048, 0x22003ae8, 0x3e8d0340, 0xbec8b439 }, - { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, - { 0x00600048, 0x24003ae0, 0x3e8d02e0, 0xbf5020c5 }, - { 0x80800048, 0x22203ae8, 0x3e8d0360, 0xbec8b439 }, - { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, - { 0x80600048, 0x22403ae8, 0x3e8d0340, 0x40011687 }, - { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, - { 0x80600048, 0x22603ae8, 0x3e8d0360, 0x40011687 }, - { 0x00800001, 0x22803ee8, 0x38000000, 0x3f800000 }, diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/Makefile.am xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/Makefile.am --- xserver-xorg-video-intel-2.99.917+git20171229/src/render_program/Makefile.am 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/render_program/Makefile.am 2018-09-06 12:00:04.000000000 +0000 @@ -15,7 +15,8 @@ exa_wm_ca.g4a \ exa_wm_ca_srcalpha.g4a \ exa_wm_write.g4a \ - exa_wm_yuv_rgb.g4a \ + exa_wm_yuv_rgb_bt601.g4a \ + exa_wm_yuv_rgb_bt709.g4a \ exa_wm_xy.g4a \ $(NULL) @@ -45,7 +46,8 @@ exa_wm_ca.g4b \ exa_wm_ca_srcalpha.g4b \ exa_wm_write.g4b \ - exa_wm_yuv_rgb.g4b \ + exa_wm_yuv_rgb_bt601.g4b \ + exa_wm_yuv_rgb_bt709.g4b \ exa_wm_xy.g4b \ $(NULL) @@ -67,7 +69,8 @@ exa_wm_ca.g4b.gen5 \ exa_wm_ca_srcalpha.g4b.gen5 \ exa_wm_write.g4b.gen5 \ - exa_wm_yuv_rgb.g4b.gen5 \ + exa_wm_yuv_rgb_bt601.g4b.gen5 \ + exa_wm_yuv_rgb_bt709.g4b.gen5 \ exa_wm_xy.g4b.gen5 \ $(NULL) @@ -88,7 +91,8 @@ exa_wm_ca.g5a \ exa_wm_ca_srcalpha.g5a \ exa_wm_write.g5a \ - exa_wm_yuv_rgb.g5a \ + exa_wm_yuv_rgb_bt601.g5a \ + exa_wm_yuv_rgb_bt709.g5a \ exa_wm_xy.g5a \ $(NULL) @@ -109,7 +113,8 @@ exa_wm_ca.g5b \ exa_wm_ca_srcalpha.g5b \ exa_wm_write.g5b \ - exa_wm_yuv_rgb.g5b \ + exa_wm_yuv_rgb_bt601.g5b \ + exa_wm_yuv_rgb_bt709.g5b \ exa_wm_xy.g5b \ $(NULL) @@ -133,7 +138,8 @@ exa_wm_ca_srcalpha.g6a \ exa_wm_noca.g6a \ exa_wm_write.g6a \ - exa_wm_yuv_rgb.g6a \ + exa_wm_yuv_rgb_bt601.g6a \ + exa_wm_yuv_rgb_bt709.g6a \ $(NULL) INTEL_G6B = \ @@ -151,7 +157,8 @@ exa_wm_ca_srcalpha.g6b \ exa_wm_noca.g6b \ exa_wm_write.g6b \ - exa_wm_yuv_rgb.g6b \ + exa_wm_yuv_rgb_bt601.g6b \ + exa_wm_yuv_rgb_bt709.g6b \ $(NULL) INTEL_G7A = \ @@ -166,7 +173,8 @@ exa_wm_src_sample_nv12.g7a \ exa_wm_src_sample_planar.g7a \ exa_wm_write.g7a \ - exa_wm_yuv_rgb.g7a \ + exa_wm_yuv_rgb_bt601.g7a \ + exa_wm_yuv_rgb_bt709.g7a \ $(NULL) INTEL_G7B = \ @@ -181,7 +189,8 @@ exa_wm_src_sample_nv12.g7b \ exa_wm_src_sample_planar.g7b \ exa_wm_write.g7b \ - exa_wm_yuv_rgb.g7b \ + exa_wm_yuv_rgb_bt601.g7b \ + exa_wm_yuv_rgb_bt709.g7b \ $(NULL) INTEL_G8A = \ @@ -190,7 +199,8 @@ exa_wm_src_sample_nv12.g8a \ exa_wm_src_sample_planar.g8a \ exa_wm_write.g8a \ - exa_wm_yuv_rgb.g8a \ + exa_wm_yuv_rgb_bt601.g8a \ + exa_wm_yuv_rgb_bt709.g8a \ $(NULL) INTEL_G8B = \ @@ -199,7 +209,8 @@ exa_wm_src_sample_nv12.g8b \ exa_wm_src_sample_planar.g8b \ exa_wm_write.g8b \ - exa_wm_yuv_rgb.g8b \ + exa_wm_yuv_rgb_bt601.g8b \ + exa_wm_yuv_rgb_bt709.g8b \ $(NULL) EXTRA_DIST = \ diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/brw/brw_test_gen4.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/brw/brw_test_gen4.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/brw/brw_test_gen4.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/brw/brw_test_gen4.c 2018-09-06 12:00:04.000000000 +0000 @@ -115,7 +115,7 @@ #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" -#include "exa_wm_yuv_rgb.g4b" +#include "exa_wm_yuv_rgb_bt601.g4b" #include "exa_wm_write.g4b" }; @@ -123,7 +123,7 @@ #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_planar.g4b" -#include "exa_wm_yuv_rgb.g4b" +#include "exa_wm_yuv_rgb_bt601.g4b" #include "exa_wm_write.g4b" }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/brw/brw_test_gen5.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/brw/brw_test_gen5.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/brw/brw_test_gen5.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/brw/brw_test_gen5.c 2018-09-06 12:00:04.000000000 +0000 @@ -115,7 +115,7 @@ #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_argb.g5b" -#include "exa_wm_yuv_rgb.g5b" +#include "exa_wm_yuv_rgb_bt601.g5b" #include "exa_wm_write.g5b" }; @@ -123,7 +123,7 @@ #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_planar.g5b" -#include "exa_wm_yuv_rgb.g5b" +#include "exa_wm_yuv_rgb_bt601.g5b" #include "exa_wm_write.g5b" }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/brw/brw_test_gen6.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/brw/brw_test_gen6.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/brw/brw_test_gen6.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/brw/brw_test_gen6.c 2018-09-06 12:00:04.000000000 +0000 @@ -98,14 +98,14 @@ static const uint32_t ps_kernel_packed[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" -#include "exa_wm_yuv_rgb.g6b" +#include "exa_wm_yuv_rgb_bt601.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_planar[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_planar.g6b" -#include "exa_wm_yuv_rgb.g6b" +#include "exa_wm_yuv_rgb_bt601.g6b" #include "exa_wm_write.g6b" }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/brw/brw_test_gen7.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/brw/brw_test_gen7.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/brw/brw_test_gen7.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/brw/brw_test_gen7.c 2018-09-06 12:00:04.000000000 +0000 @@ -98,14 +98,14 @@ static const uint32_t ps_kernel_packed[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" -#include "exa_wm_yuv_rgb.g7b" +#include "exa_wm_yuv_rgb_bt601.g7b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_planar[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_planar.g7b" -#include "exa_wm_yuv_rgb.g7b" +#include "exa_wm_yuv_rgb_bt601.g7b" #include "exa_wm_write.g7b" }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/brw/meson.build xserver-xorg-video-intel-2.99.917+git20180925/src/sna/brw/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/brw/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/brw/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,41 @@ +brw_deps = [ + xorg, + libudev, + libdrm, +] + +if with_valgrind + brw_deps += valgrind +endif + +brw = static_library('brw', + sources : [ + 'brw_disasm.c', + 'brw_eu.c', + 'brw_eu_emit.c', + 'brw_sf.c', + 'brw_wm.c', + ], + dependencies : brw_deps, + include_directories : inc, + c_args : [ + '-Wno-unused-parameter', + '-Wno-sign-compare', + ], + install : false) + +executable('brw_test', + sources : [ + 'brw_test.c', + 'brw_test_gen4.c', + 'brw_test_gen5.c', + 'brw_test_gen6.c', + 'brw_test_gen7.c', + ], + link_with : brw, + include_directories : inc, + c_args : [ + '-Wno-unused-const-variable', + '-Wno-unused-parameter', + ], + install : false) diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/debug.h xserver-xorg-video-intel-2.99.917+git20180925/src/sna/debug.h --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/debug.h 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/debug.h 2018-09-06 12:00:04.000000000 +0000 @@ -32,13 +32,13 @@ void LogF(const char *f, ...); #define DBG(x) LogF x #else -#define DBG(x) +#define DBG(x) do {} while (0) #endif #if HAS_DEBUG_FULL || !defined(NDEBUG) #define ERR(x) ErrorF x #else -#define ERR(x) +#define ERR(x) do {} while (0) #endif #endif /* _SNA_DEBUG_H_ */ diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/fb/meson.build xserver-xorg-video-intel-2.99.917+git20180925/src/sna/fb/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/fb/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/fb/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,31 @@ +fb = static_library('fb', + sources : [ + 'fbarc.c', + 'fbbitmap.c', + 'fbblt.c', + 'fbbltone.c', + 'fbclip.c', + 'fbcopy.c', + 'fbfill.c', + 'fbgc.c', + 'fbglyph.c', + 'fbimage.c', + 'fbline.c', + 'fbpict.c', + 'fbpoint.c', + 'fbpush.c', + 'fbseg.c', + 'fbspan.c', + 'fbstipple.c', + 'fbtile.c', + 'fbutil.c', + ], + dependencies : [ + xorg, + pixman, + ], + c_args : [ + '-Wno-unused-parameter', + '-Wno-sign-compare', + ], + install : false) diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen3_render.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen3_render.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen3_render.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen3_render.c 2018-09-06 12:00:04.000000000 +0000 @@ -108,7 +108,7 @@ {PICT_x8r8g8b8, 0, MAPSURF_32BIT | MT_32BIT_XRGB8888, false}, {PICT_a8b8g8r8, 0, MAPSURF_32BIT | MT_32BIT_ABGR8888, false}, {PICT_x8b8g8r8, 0, MAPSURF_32BIT | MT_32BIT_XBGR8888, false}, -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) {PICT_a2r10g10b10, PICT_x2r10g10b10, MAPSURF_32BIT | MT_32BIT_ARGB2101010, false}, {PICT_a2b10g10r10, PICT_x2b10g10r10, MAPSURF_32BIT | MT_32BIT_ABGR2101010, false}, #endif @@ -208,7 +208,7 @@ case PICT_x1r5g5b5: case PICT_a1b5g5r5: case PICT_x1b5g5r5: -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: case PICT_x2r10g10b10: case PICT_a2b10g10r10: @@ -233,7 +233,7 @@ case PICT_r5g6b5: case PICT_a1r5g5b5: case PICT_x1r5g5b5: -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: case PICT_x2r10g10b10: #endif @@ -267,7 +267,7 @@ case PICT_a1b5g5r5: case PICT_x1b5g5r5: return BIAS | COLR_BUF_ARGB1555; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: case PICT_x2r10g10b10: case PICT_a2b10g10r10: @@ -322,7 +322,7 @@ case PICT_x1r5g5b5: case PICT_a1b5g5r5: case PICT_x1b5g5r5: -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: case PICT_x2r10g10b10: case PICT_a2b10g10r10: diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen4_render.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen4_render.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen4_render.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen4_render.c 2018-09-06 12:00:04.000000000 +0000 @@ -99,27 +99,51 @@ #define GEN4_MAX_WM_THREADS 32 #define G4X_MAX_WM_THREADS 50 -static const uint32_t ps_kernel_packed_static[][4] = { +static const uint32_t ps_kernel_packed_bt601_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" -#include "exa_wm_yuv_rgb.g4b" +#include "exa_wm_yuv_rgb_bt601.g4b" #include "exa_wm_write.g4b" }; -static const uint32_t ps_kernel_planar_static[][4] = { +static const uint32_t ps_kernel_planar_bt601_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_planar.g4b" -#include "exa_wm_yuv_rgb.g4b" +#include "exa_wm_yuv_rgb_bt601.g4b" #include "exa_wm_write.g4b" }; -static const uint32_t ps_kernel_nv12_static[][4] = { +static const uint32_t ps_kernel_nv12_bt601_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_nv12.g4b" -#include "exa_wm_yuv_rgb.g4b" +#include "exa_wm_yuv_rgb_bt601.g4b" +#include "exa_wm_write.g4b" +}; + +static const uint32_t ps_kernel_packed_bt709_static[][4] = { +#include "exa_wm_xy.g4b" +#include "exa_wm_src_affine.g4b" +#include "exa_wm_src_sample_argb.g4b" +#include "exa_wm_yuv_rgb_bt709.g4b" +#include "exa_wm_write.g4b" +}; + +static const uint32_t ps_kernel_planar_bt709_static[][4] = { +#include "exa_wm_xy.g4b" +#include "exa_wm_src_affine.g4b" +#include "exa_wm_src_sample_planar.g4b" +#include "exa_wm_yuv_rgb_bt709.g4b" +#include "exa_wm_write.g4b" +}; + +static const uint32_t ps_kernel_nv12_bt709_static[][4] = { +#include "exa_wm_xy.g4b" +#include "exa_wm_src_affine.g4b" +#include "exa_wm_src_sample_nv12.g4b" +#include "exa_wm_yuv_rgb_bt709.g4b" #include "exa_wm_write.g4b" }; @@ -147,9 +171,13 @@ NOKERNEL(WM_KERNEL_OPACITY, brw_wm_kernel__affine_opacity, true), NOKERNEL(WM_KERNEL_OPACITY_P, brw_wm_kernel__projective_opacity, true), - KERNEL(WM_KERNEL_VIDEO_PLANAR, ps_kernel_planar_static, false), - KERNEL(WM_KERNEL_VIDEO_NV12, ps_kernel_nv12_static, false), - KERNEL(WM_KERNEL_VIDEO_PACKED, ps_kernel_packed_static, false), + KERNEL(WM_KERNEL_VIDEO_PLANAR_BT601, ps_kernel_planar_bt601_static, false), + KERNEL(WM_KERNEL_VIDEO_NV12_BT601, ps_kernel_nv12_bt601_static, false), + KERNEL(WM_KERNEL_VIDEO_PACKED_BT601, ps_kernel_packed_bt601_static, false), + + KERNEL(WM_KERNEL_VIDEO_PLANAR_BT709, ps_kernel_planar_bt709_static, false), + KERNEL(WM_KERNEL_VIDEO_NV12_BT709, ps_kernel_nv12_bt709_static, false), + KERNEL(WM_KERNEL_VIDEO_PACKED_BT709, ps_kernel_packed_bt709_static, false), }; #undef KERNEL @@ -305,7 +333,7 @@ return GEN4_SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return GEN4_SURFACEFORMAT_R8G8B8X8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: return GEN4_SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: @@ -335,7 +363,7 @@ case PICT_a8b8g8r8: case PICT_x8b8g8r8: return GEN4_SURFACEFORMAT_R8G8B8A8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: case PICT_x2r10g10b10: return GEN4_SURFACEFORMAT_B10G10R10A2_UNORM; @@ -1404,6 +1432,29 @@ gen4_emit_state(sna, op, offset | dirty); } +static unsigned select_video_kernel(const struct sna_video *video, + const struct sna_video_frame *frame) +{ + switch (frame->id) { + case FOURCC_YV12: + case FOURCC_I420: + case FOURCC_XVMC: + return video->colorspace ? + WM_KERNEL_VIDEO_PLANAR_BT709 : + WM_KERNEL_VIDEO_PLANAR_BT601; + + case FOURCC_NV12: + return video->colorspace ? + WM_KERNEL_VIDEO_NV12_BT709 : + WM_KERNEL_VIDEO_NV12_BT601; + + default: + return video->colorspace ? + WM_KERNEL_VIDEO_PACKED_BT709 : + WM_KERNEL_VIDEO_PACKED_BT601; + } +} + static bool gen4_render_video(struct sna *sna, struct sna_video *video, @@ -1442,9 +1493,7 @@ tmp.src.repeat = SAMPLER_EXTEND_PAD; tmp.src.bo = frame->bo; tmp.mask.bo = NULL; - tmp.u.gen4.wm_kernel = - is_nv12_fourcc(frame->id) ? WM_KERNEL_VIDEO_NV12 : - is_planar_fourcc(frame->id) ? WM_KERNEL_VIDEO_PLANAR : WM_KERNEL_VIDEO_PACKED; + tmp.u.gen4.wm_kernel = select_video_kernel(video, frame); tmp.u.gen4.ve_id = 2; tmp.is_affine = true; tmp.floats_per_vertex = 3; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen4_render.h xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen4_render.h --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen4_render.h 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen4_render.h 2018-09-06 12:00:04.000000000 +0000 @@ -2685,9 +2685,14 @@ WM_KERNEL_OPACITY, WM_KERNEL_OPACITY_P, - WM_KERNEL_VIDEO_PLANAR, - WM_KERNEL_VIDEO_NV12, - WM_KERNEL_VIDEO_PACKED, + WM_KERNEL_VIDEO_PLANAR_BT601, + WM_KERNEL_VIDEO_NV12_BT601, + WM_KERNEL_VIDEO_PACKED_BT601, + + WM_KERNEL_VIDEO_PLANAR_BT709, + WM_KERNEL_VIDEO_NV12_BT709, + WM_KERNEL_VIDEO_PACKED_BT709, + KERNEL_COUNT } wm_kernel_t; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen5_render.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen5_render.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen5_render.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen5_render.c 2018-09-06 12:00:04.000000000 +0000 @@ -89,27 +89,51 @@ #define PS_KERNEL_NUM_GRF 32 #define PS_MAX_THREADS 72 -static const uint32_t ps_kernel_packed_static[][4] = { +static const uint32_t ps_kernel_packed_bt601_static[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_argb.g5b" -#include "exa_wm_yuv_rgb.g5b" +#include "exa_wm_yuv_rgb_bt601.g5b" #include "exa_wm_write.g5b" }; -static const uint32_t ps_kernel_planar_static[][4] = { +static const uint32_t ps_kernel_planar_bt601_static[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_planar.g5b" -#include "exa_wm_yuv_rgb.g5b" +#include "exa_wm_yuv_rgb_bt601.g5b" #include "exa_wm_write.g5b" }; -static const uint32_t ps_kernel_nv12_static[][4] = { +static const uint32_t ps_kernel_nv12_bt601_static[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_nv12.g5b" -#include "exa_wm_yuv_rgb.g5b" +#include "exa_wm_yuv_rgb_bt601.g5b" +#include "exa_wm_write.g5b" +}; + +static const uint32_t ps_kernel_packed_bt709_static[][4] = { +#include "exa_wm_xy.g5b" +#include "exa_wm_src_affine.g5b" +#include "exa_wm_src_sample_argb.g5b" +#include "exa_wm_yuv_rgb_bt709.g5b" +#include "exa_wm_write.g5b" +}; + +static const uint32_t ps_kernel_planar_bt709_static[][4] = { +#include "exa_wm_xy.g5b" +#include "exa_wm_src_affine.g5b" +#include "exa_wm_src_sample_planar.g5b" +#include "exa_wm_yuv_rgb_bt709.g5b" +#include "exa_wm_write.g5b" +}; + +static const uint32_t ps_kernel_nv12_bt709_static[][4] = { +#include "exa_wm_xy.g5b" +#include "exa_wm_src_affine.g5b" +#include "exa_wm_src_sample_nv12.g5b" +#include "exa_wm_yuv_rgb_bt709.g5b" #include "exa_wm_write.g5b" }; @@ -137,9 +161,13 @@ NOKERNEL(WM_KERNEL_OPACITY, brw_wm_kernel__affine_opacity, true), NOKERNEL(WM_KERNEL_OPACITY_P, brw_wm_kernel__projective_opacity, true), - KERNEL(WM_KERNEL_VIDEO_PLANAR, ps_kernel_planar_static, false), - KERNEL(WM_KERNEL_VIDEO_NV12, ps_kernel_nv12_static, false), - KERNEL(WM_KERNEL_VIDEO_PACKED, ps_kernel_packed_static, false), + KERNEL(WM_KERNEL_VIDEO_PLANAR_BT601, ps_kernel_planar_bt601_static, false), + KERNEL(WM_KERNEL_VIDEO_NV12_BT601, ps_kernel_nv12_bt601_static, false), + KERNEL(WM_KERNEL_VIDEO_PACKED_BT601, ps_kernel_packed_bt601_static, false), + + KERNEL(WM_KERNEL_VIDEO_PLANAR_BT709, ps_kernel_planar_bt709_static, false), + KERNEL(WM_KERNEL_VIDEO_NV12_BT709, ps_kernel_nv12_bt709_static, false), + KERNEL(WM_KERNEL_VIDEO_PACKED_BT709, ps_kernel_packed_bt709_static, false), }; #undef KERNEL @@ -294,7 +322,7 @@ return GEN5_SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return GEN5_SURFACEFORMAT_R8G8B8X8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: return GEN5_SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: @@ -324,7 +352,7 @@ case PICT_a8b8g8r8: case PICT_x8b8g8r8: return GEN5_SURFACEFORMAT_R8G8B8A8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: case PICT_x2r10g10b10: return GEN5_SURFACEFORMAT_B10G10R10A2_UNORM; @@ -1354,6 +1382,29 @@ gen5_emit_state(sna, op, offset | dirty); } +static unsigned select_video_kernel(const struct sna_video *video, + const struct sna_video_frame *frame) +{ + switch (frame->id) { + case FOURCC_YV12: + case FOURCC_I420: + case FOURCC_XVMC: + return video->colorspace ? + WM_KERNEL_VIDEO_PLANAR_BT709 : + WM_KERNEL_VIDEO_PLANAR_BT601; + + case FOURCC_NV12: + return video->colorspace ? + WM_KERNEL_VIDEO_NV12_BT709 : + WM_KERNEL_VIDEO_NV12_BT601; + + default: + return video->colorspace ? + WM_KERNEL_VIDEO_PACKED_BT709 : + WM_KERNEL_VIDEO_PACKED_BT601; + } +} + static bool gen5_render_video(struct sna *sna, struct sna_video *video, @@ -1392,9 +1443,7 @@ tmp.src.repeat = SAMPLER_EXTEND_PAD; tmp.src.bo = frame->bo; tmp.mask.bo = NULL; - tmp.u.gen5.wm_kernel = - is_nv12_fourcc(frame->id) ? WM_KERNEL_VIDEO_NV12 : - is_planar_fourcc(frame->id) ? WM_KERNEL_VIDEO_PLANAR : WM_KERNEL_VIDEO_PACKED; + tmp.u.gen5.wm_kernel = select_video_kernel(video, frame); tmp.u.gen5.ve_id = 2; tmp.is_affine = true; tmp.floats_per_vertex = 3; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen5_render.h xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen5_render.h --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen5_render.h 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen5_render.h 2018-09-06 12:00:04.000000000 +0000 @@ -2765,9 +2765,14 @@ WM_KERNEL_OPACITY, WM_KERNEL_OPACITY_P, - WM_KERNEL_VIDEO_PLANAR, - WM_KERNEL_VIDEO_NV12, - WM_KERNEL_VIDEO_PACKED, + WM_KERNEL_VIDEO_PLANAR_BT601, + WM_KERNEL_VIDEO_NV12_BT601, + WM_KERNEL_VIDEO_PACKED_BT601, + + WM_KERNEL_VIDEO_PLANAR_BT709, + WM_KERNEL_VIDEO_NV12_BT709, + WM_KERNEL_VIDEO_PACKED_BT709, + KERNEL_COUNT } wm_kernel_t; #endif diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen6_render.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen6_render.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen6_render.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen6_render.c 2018-09-06 12:00:04.000000000 +0000 @@ -101,24 +101,45 @@ .gt = 2, }; -static const uint32_t ps_kernel_packed[][4] = { +static const uint32_t ps_kernel_packed_bt601[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" -#include "exa_wm_yuv_rgb.g6b" +#include "exa_wm_yuv_rgb_bt601.g6b" #include "exa_wm_write.g6b" }; -static const uint32_t ps_kernel_planar[][4] = { +static const uint32_t ps_kernel_planar_bt601[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_planar.g6b" -#include "exa_wm_yuv_rgb.g6b" +#include "exa_wm_yuv_rgb_bt601.g6b" #include "exa_wm_write.g6b" }; -static const uint32_t ps_kernel_nv12[][4] = { +static const uint32_t ps_kernel_nv12_bt601[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_nv12.g6b" -#include "exa_wm_yuv_rgb.g6b" +#include "exa_wm_yuv_rgb_bt601.g6b" +#include "exa_wm_write.g6b" +}; + +static const uint32_t ps_kernel_packed_bt709[][4] = { +#include "exa_wm_src_affine.g6b" +#include "exa_wm_src_sample_argb.g6b" +#include "exa_wm_yuv_rgb_bt709.g6b" +#include "exa_wm_write.g6b" +}; + +static const uint32_t ps_kernel_planar_bt709[][4] = { +#include "exa_wm_src_affine.g6b" +#include "exa_wm_src_sample_planar.g6b" +#include "exa_wm_yuv_rgb_bt709.g6b" +#include "exa_wm_write.g6b" +}; + +static const uint32_t ps_kernel_nv12_bt709[][4] = { +#include "exa_wm_src_affine.g6b" +#include "exa_wm_src_sample_nv12.g6b" +#include "exa_wm_yuv_rgb_bt709.g6b" #include "exa_wm_write.g6b" }; @@ -148,9 +169,14 @@ NOKERNEL(OPACITY, brw_wm_kernel__affine_opacity, 2), NOKERNEL(OPACITY_P, brw_wm_kernel__projective_opacity, 2), - KERNEL(VIDEO_PLANAR, ps_kernel_planar, 7), - KERNEL(VIDEO_NV12, ps_kernel_nv12, 7), - KERNEL(VIDEO_PACKED, ps_kernel_packed, 2), + + KERNEL(VIDEO_PLANAR_BT601, ps_kernel_planar_bt601, 7), + KERNEL(VIDEO_NV12_BT601, ps_kernel_nv12_bt601, 7), + KERNEL(VIDEO_PACKED_BT601, ps_kernel_packed_bt601, 2), + + KERNEL(VIDEO_PLANAR_BT709, ps_kernel_planar_bt709, 7), + KERNEL(VIDEO_NV12_BT709, ps_kernel_nv12_bt709, 7), + KERNEL(VIDEO_PACKED_BT709, ps_kernel_packed_bt709, 2), }; #undef KERNEL @@ -269,7 +295,7 @@ return GEN6_SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return GEN6_SURFACEFORMAT_R8G8B8X8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: return GEN6_SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: @@ -299,7 +325,7 @@ case PICT_a8b8g8r8: case PICT_x8b8g8r8: return GEN6_SURFACEFORMAT_R8G8B8A8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: case PICT_x2r10g10b10: return GEN6_SURFACEFORMAT_B10G10R10A2_UNORM; @@ -1631,6 +1657,29 @@ gen6_emit_state(sna, op, offset | dirty); } +static unsigned select_video_kernel(const struct sna_video *video, + const struct sna_video_frame *frame) +{ + switch (frame->id) { + case FOURCC_YV12: + case FOURCC_I420: + case FOURCC_XVMC: + return video->colorspace ? + GEN6_WM_KERNEL_VIDEO_PLANAR_BT709 : + GEN6_WM_KERNEL_VIDEO_PLANAR_BT601; + + case FOURCC_NV12: + return video->colorspace ? + GEN6_WM_KERNEL_VIDEO_NV12_BT709 : + GEN6_WM_KERNEL_VIDEO_NV12_BT601; + + default: + return video->colorspace ? + GEN6_WM_KERNEL_VIDEO_PACKED_BT709 : + GEN6_WM_KERNEL_VIDEO_PACKED_BT601; + } +} + static bool gen6_render_video(struct sna *sna, struct sna_video *video, @@ -1683,11 +1732,7 @@ GEN6_SET_FLAGS(SAMPLER_OFFSET(filter, SAMPLER_EXTEND_PAD, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE), NO_BLEND, - is_nv12_fourcc(frame->id) ? - GEN6_WM_KERNEL_VIDEO_NV12 : - is_planar_fourcc(frame->id) ? - GEN6_WM_KERNEL_VIDEO_PLANAR : - GEN6_WM_KERNEL_VIDEO_PACKED, + select_video_kernel(video, frame), 2); tmp.priv = frame; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen7_render.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen7_render.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen7_render.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen7_render.c 2018-09-06 12:00:04.000000000 +0000 @@ -193,24 +193,45 @@ return sna->kgem.gen == 075; } -static const uint32_t ps_kernel_packed[][4] = { +static const uint32_t ps_kernel_packed_bt601[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" -#include "exa_wm_yuv_rgb.g7b" +#include "exa_wm_yuv_rgb_bt601.g7b" #include "exa_wm_write.g7b" }; -static const uint32_t ps_kernel_planar[][4] = { +static const uint32_t ps_kernel_planar_bt601[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_planar.g7b" -#include "exa_wm_yuv_rgb.g7b" +#include "exa_wm_yuv_rgb_bt601.g7b" #include "exa_wm_write.g7b" }; -static const uint32_t ps_kernel_nv12[][4] = { +static const uint32_t ps_kernel_nv12_bt601[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_nv12.g7b" -#include "exa_wm_yuv_rgb.g7b" +#include "exa_wm_yuv_rgb_bt601.g7b" +#include "exa_wm_write.g7b" +}; + +static const uint32_t ps_kernel_packed_bt709[][4] = { +#include "exa_wm_src_affine.g7b" +#include "exa_wm_src_sample_argb.g7b" +#include "exa_wm_yuv_rgb_bt709.g7b" +#include "exa_wm_write.g7b" +}; + +static const uint32_t ps_kernel_planar_bt709[][4] = { +#include "exa_wm_src_affine.g7b" +#include "exa_wm_src_sample_planar.g7b" +#include "exa_wm_yuv_rgb_bt709.g7b" +#include "exa_wm_write.g7b" +}; + +static const uint32_t ps_kernel_nv12_bt709[][4] = { +#include "exa_wm_src_affine.g7b" +#include "exa_wm_src_sample_nv12.g7b" +#include "exa_wm_yuv_rgb_bt709.g7b" #include "exa_wm_write.g7b" }; @@ -245,9 +266,12 @@ NOKERNEL(OPACITY, brw_wm_kernel__affine_opacity, 2), NOKERNEL(OPACITY_P, brw_wm_kernel__projective_opacity, 2), - KERNEL(VIDEO_PLANAR, ps_kernel_planar, 7), - KERNEL(VIDEO_NV12, ps_kernel_nv12, 7), - KERNEL(VIDEO_PACKED, ps_kernel_packed, 2), + KERNEL(VIDEO_PLANAR_BT601, ps_kernel_planar_bt601, 7), + KERNEL(VIDEO_NV12_BT601, ps_kernel_nv12_bt601, 7), + KERNEL(VIDEO_PACKED_BT601, ps_kernel_packed_bt601, 2), + KERNEL(VIDEO_PLANAR_BT709, ps_kernel_planar_bt709, 7), + KERNEL(VIDEO_NV12_BT709, ps_kernel_nv12_bt709, 7), + KERNEL(VIDEO_PACKED_BT709, ps_kernel_packed_bt709, 2), KERNEL(VIDEO_RGB, ps_kernel_rgb, 2), }; #undef KERNEL @@ -369,7 +393,7 @@ return GEN7_SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return GEN7_SURFACEFORMAT_R8G8B8X8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: return GEN7_SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: @@ -399,7 +423,7 @@ case PICT_a8b8g8r8: case PICT_x8b8g8r8: return GEN7_SURFACEFORMAT_R8G8B8A8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: case PICT_x2r10g10b10: return GEN7_SURFACEFORMAT_B10G10R10A2_UNORM; @@ -1846,23 +1870,30 @@ gen7_emit_state(sna, op, offset | dirty); } -static unsigned select_video_kernel(const struct sna_video_frame *frame) +static unsigned select_video_kernel(const struct sna_video *video, + const struct sna_video_frame *frame) { switch (frame->id) { case FOURCC_YV12: case FOURCC_I420: case FOURCC_XVMC: - return GEN7_WM_KERNEL_VIDEO_PLANAR; + return video->colorspace ? + GEN7_WM_KERNEL_VIDEO_PLANAR_BT709 : + GEN7_WM_KERNEL_VIDEO_PLANAR_BT601; case FOURCC_NV12: - return GEN7_WM_KERNEL_VIDEO_NV12; + return video->colorspace ? + GEN7_WM_KERNEL_VIDEO_NV12_BT709 : + GEN7_WM_KERNEL_VIDEO_NV12_BT601; case FOURCC_RGB888: case FOURCC_RGB565: return GEN7_WM_KERNEL_VIDEO_RGB; default: - return GEN7_WM_KERNEL_VIDEO_PACKED; + return video->colorspace ? + GEN7_WM_KERNEL_VIDEO_PACKED_BT709 : + GEN7_WM_KERNEL_VIDEO_PACKED_BT601; } } @@ -1918,7 +1949,7 @@ GEN7_SET_FLAGS(SAMPLER_OFFSET(filter, SAMPLER_EXTEND_PAD, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE), NO_BLEND, - select_video_kernel(frame), + select_video_kernel(video, frame), 2); tmp.priv = frame; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen8_render.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen8_render.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen8_render.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen8_render.c 2018-09-06 12:00:04.000000000 +0000 @@ -93,24 +93,45 @@ */ #if !NO_VIDEO -static const uint32_t ps_kernel_packed[][4] = { +static const uint32_t ps_kernel_packed_bt601[][4] = { #include "exa_wm_src_affine.g8b" #include "exa_wm_src_sample_argb.g8b" -#include "exa_wm_yuv_rgb.g8b" +#include "exa_wm_yuv_rgb_bt601.g8b" #include "exa_wm_write.g8b" }; -static const uint32_t ps_kernel_planar[][4] = { +static const uint32_t ps_kernel_planar_bt601[][4] = { #include "exa_wm_src_affine.g8b" #include "exa_wm_src_sample_planar.g8b" -#include "exa_wm_yuv_rgb.g8b" +#include "exa_wm_yuv_rgb_bt601.g8b" #include "exa_wm_write.g8b" }; -static const uint32_t ps_kernel_nv12[][4] = { +static const uint32_t ps_kernel_nv12_bt601[][4] = { #include "exa_wm_src_affine.g8b" #include "exa_wm_src_sample_nv12.g8b" -#include "exa_wm_yuv_rgb.g8b" +#include "exa_wm_yuv_rgb_bt601.g8b" +#include "exa_wm_write.g8b" +}; + +static const uint32_t ps_kernel_packed_bt709[][4] = { +#include "exa_wm_src_affine.g8b" +#include "exa_wm_src_sample_argb.g8b" +#include "exa_wm_yuv_rgb_bt709.g8b" +#include "exa_wm_write.g8b" +}; + +static const uint32_t ps_kernel_planar_bt709[][4] = { +#include "exa_wm_src_affine.g8b" +#include "exa_wm_src_sample_planar.g8b" +#include "exa_wm_yuv_rgb_bt709.g8b" +#include "exa_wm_write.g8b" +}; + +static const uint32_t ps_kernel_nv12_bt709[][4] = { +#include "exa_wm_src_affine.g8b" +#include "exa_wm_src_sample_nv12.g8b" +#include "exa_wm_yuv_rgb_bt709.g8b" #include "exa_wm_write.g8b" }; @@ -149,9 +170,12 @@ NOKERNEL(OPACITY_P, gen8_wm_kernel__projective_opacity, 2), #if !NO_VIDEO - KERNEL(VIDEO_PLANAR, ps_kernel_planar, 7), - KERNEL(VIDEO_NV12, ps_kernel_nv12, 7), - KERNEL(VIDEO_PACKED, ps_kernel_packed, 2), + KERNEL(VIDEO_PLANAR_BT601, ps_kernel_planar_bt601, 7), + KERNEL(VIDEO_NV12_BT601, ps_kernel_nv12_bt601, 7), + KERNEL(VIDEO_PACKED_BT601, ps_kernel_packed_bt601, 2), + KERNEL(VIDEO_PLANAR_BT709, ps_kernel_planar_bt709, 7), + KERNEL(VIDEO_NV12_BT709, ps_kernel_nv12_bt709, 7), + KERNEL(VIDEO_PACKED_BT709, ps_kernel_packed_bt709, 2), KERNEL(VIDEO_RGB, ps_kernel_rgb, 2), #endif }; @@ -338,7 +362,7 @@ return SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return SURFACEFORMAT_R8G8B8X8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: return SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: @@ -368,7 +392,7 @@ case PICT_a8b8g8r8: case PICT_x8b8g8r8: return SURFACEFORMAT_R8G8B8A8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: case PICT_x2r10g10b10: return SURFACEFORMAT_B10G10R10A2_UNORM; @@ -3790,20 +3814,30 @@ gen8_emit_state(sna, op, offset); } -static unsigned select_video_kernel(const struct sna_video_frame *frame) +static unsigned select_video_kernel(const struct sna_video *video, + const struct sna_video_frame *frame) { switch (frame->id) { case FOURCC_YV12: case FOURCC_I420: case FOURCC_XVMC: - return GEN8_WM_KERNEL_VIDEO_PLANAR; + return video->colorspace ? + GEN8_WM_KERNEL_VIDEO_PLANAR_BT709 : + GEN8_WM_KERNEL_VIDEO_PLANAR_BT601; + + case FOURCC_NV12: + return video->colorspace ? + GEN8_WM_KERNEL_VIDEO_NV12_BT709 : + GEN8_WM_KERNEL_VIDEO_NV12_BT601; case FOURCC_RGB888: case FOURCC_RGB565: return GEN8_WM_KERNEL_VIDEO_RGB; default: - return GEN8_WM_KERNEL_VIDEO_PACKED; + return video->colorspace ? + GEN8_WM_KERNEL_VIDEO_PACKED_BT709 : + GEN8_WM_KERNEL_VIDEO_PACKED_BT601; } } @@ -3867,7 +3901,7 @@ GEN8_SET_FLAGS(SAMPLER_OFFSET(filter, SAMPLER_EXTEND_PAD, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE), NO_BLEND, - select_video_kernel(frame), + select_video_kernel(video, frame), 2); tmp.priv = frame; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen9_render.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen9_render.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/gen9_render.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/gen9_render.c 2018-09-06 12:00:04.000000000 +0000 @@ -94,24 +94,45 @@ */ #if !NO_VIDEO -static const uint32_t ps_kernel_packed[][4] = { +static const uint32_t ps_kernel_packed_bt601[][4] = { #include "exa_wm_src_affine.g8b" #include "exa_wm_src_sample_argb.g8b" -#include "exa_wm_yuv_rgb.g8b" +#include "exa_wm_yuv_rgb_bt601.g8b" #include "exa_wm_write.g8b" }; -static const uint32_t ps_kernel_planar[][4] = { +static const uint32_t ps_kernel_planar_bt601[][4] = { #include "exa_wm_src_affine.g8b" #include "exa_wm_src_sample_planar.g8b" -#include "exa_wm_yuv_rgb.g8b" +#include "exa_wm_yuv_rgb_bt601.g8b" #include "exa_wm_write.g8b" }; -static const uint32_t ps_kernel_nv12[][4] = { +static const uint32_t ps_kernel_nv12_bt601[][4] = { #include "exa_wm_src_affine.g8b" #include "exa_wm_src_sample_nv12.g8b" -#include "exa_wm_yuv_rgb.g8b" +#include "exa_wm_yuv_rgb_bt601.g8b" +#include "exa_wm_write.g8b" +}; + +static const uint32_t ps_kernel_packed_bt709[][4] = { +#include "exa_wm_src_affine.g8b" +#include "exa_wm_src_sample_argb.g8b" +#include "exa_wm_yuv_rgb_bt709.g8b" +#include "exa_wm_write.g8b" +}; + +static const uint32_t ps_kernel_planar_bt709[][4] = { +#include "exa_wm_src_affine.g8b" +#include "exa_wm_src_sample_planar.g8b" +#include "exa_wm_yuv_rgb_bt709.g8b" +#include "exa_wm_write.g8b" +}; + +static const uint32_t ps_kernel_nv12_bt709[][4] = { +#include "exa_wm_src_affine.g8b" +#include "exa_wm_src_sample_nv12.g8b" +#include "exa_wm_yuv_rgb_bt709.g8b" #include "exa_wm_write.g8b" }; @@ -150,9 +171,12 @@ NOKERNEL(OPACITY_P, gen8_wm_kernel__projective_opacity, 2), #if !NO_VIDEO - KERNEL(VIDEO_PLANAR, ps_kernel_planar, 7), - KERNEL(VIDEO_NV12, ps_kernel_nv12, 7), - KERNEL(VIDEO_PACKED, ps_kernel_packed, 2), + KERNEL(VIDEO_PLANAR_BT601, ps_kernel_planar_bt601, 7), + KERNEL(VIDEO_NV12_BT601, ps_kernel_nv12_bt601, 7), + KERNEL(VIDEO_PACKED_BT601, ps_kernel_packed_bt601, 2), + KERNEL(VIDEO_PLANAR_BT709, ps_kernel_planar_bt709, 7), + KERNEL(VIDEO_NV12_BT709, ps_kernel_nv12_bt709, 7), + KERNEL(VIDEO_PACKED_BT709, ps_kernel_packed_bt709, 2), KERNEL(VIDEO_RGB, ps_kernel_rgb, 2), #endif }; @@ -374,7 +398,7 @@ return SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return SURFACEFORMAT_R8G8B8X8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: return SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: @@ -404,7 +428,7 @@ case PICT_a8b8g8r8: case PICT_x8b8g8r8: return SURFACEFORMAT_R8G8B8A8_UNORM; -#ifdef PICT_a2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case PICT_a2r10g10b10: case PICT_x2r10g10b10: return SURFACEFORMAT_B10G10R10A2_UNORM; @@ -3853,23 +3877,30 @@ gen9_emit_state(sna, op, offset); } -static unsigned select_video_kernel(const struct sna_video_frame *frame) +static unsigned select_video_kernel(const struct sna_video *video, + const struct sna_video_frame *frame) { switch (frame->id) { case FOURCC_YV12: case FOURCC_I420: case FOURCC_XVMC: - return GEN9_WM_KERNEL_VIDEO_PLANAR; + return video->colorspace ? + GEN9_WM_KERNEL_VIDEO_PLANAR_BT709 : + GEN9_WM_KERNEL_VIDEO_PLANAR_BT601; case FOURCC_NV12: - return GEN9_WM_KERNEL_VIDEO_NV12; + return video->colorspace ? + GEN9_WM_KERNEL_VIDEO_NV12_BT709 : + GEN9_WM_KERNEL_VIDEO_NV12_BT601; case FOURCC_RGB888: case FOURCC_RGB565: return GEN9_WM_KERNEL_VIDEO_RGB; default: - return GEN9_WM_KERNEL_VIDEO_PACKED; + return video->colorspace ? + GEN9_WM_KERNEL_VIDEO_PACKED_BT709 : + GEN9_WM_KERNEL_VIDEO_PACKED_BT601; } } @@ -3933,7 +3964,7 @@ GEN9_SET_FLAGS(SAMPLER_OFFSET(filter, SAMPLER_EXTEND_PAD, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE), NO_BLEND, - select_video_kernel(frame), + select_video_kernel(video, frame), 2); tmp.priv = frame; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/git_version.h.in xserver-xorg-video-intel-2.99.917+git20180925/src/sna/git_version.h.in --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/git_version.h.in 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/git_version.h.in 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1 @@ +static const char git_version[] = "@VCS_TAG@"; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/kgem.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/kgem.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/kgem.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/kgem.c 2018-09-06 12:00:04.000000000 +0000 @@ -70,6 +70,7 @@ #define DBG_NO_CREATE2 0 #define DBG_NO_USERPTR 0 #define DBG_NO_UNSYNCHRONIZED_USERPTR 0 +#define DBG_NO_COHERENT_MMAP_GTT 0 #define DBG_NO_LLC 0 #define DBG_NO_SEMAPHORES 0 #define DBG_NO_MADV 0 @@ -140,6 +141,7 @@ #define LOCAL_I915_PARAM_HAS_HANDLE_LUT 26 #define LOCAL_I915_PARAM_HAS_WT 27 #define LOCAL_I915_PARAM_MMAP_VERSION 30 +#define LOCAL_I915_PARAM_MMAP_GTT_COHERENT 52 #define LOCAL_I915_EXEC_IS_PINNED (1<<10) #define LOCAL_I915_EXEC_NO_RELOC (1<<11) @@ -1283,6 +1285,14 @@ return true; } +static bool test_has_coherent_mmap_gtt(struct kgem *kgem) +{ + if (DBG_NO_COHERENT_MMAP_GTT) + return false; + + return gem_param(kgem, LOCAL_I915_PARAM_MMAP_GTT_COHERENT) > 0; +} + static bool test_has_llc(struct kgem *kgem) { int has_llc = -1; @@ -1528,8 +1538,8 @@ create.width = 32; create.height = 32; create.pitch = 4*32; - create.bpp = 32; - create.depth = 32; + create.bpp = 24; + create.depth = 32; /* {bpp:24, depth:32} -> x8r8g8b8 */ create.handle = gem_create(kgem->fd, 1); if (create.handle == 0) return false; @@ -1987,6 +1997,10 @@ DBG(("%s: has relaxed fencing? %d\n", __FUNCTION__, kgem->has_relaxed_fencing)); + kgem->has_coherent_mmap_gtt = test_has_coherent_mmap_gtt(kgem); + DBG(("%s: has coherent writes into GTT maps? %d\n", __FUNCTION__, + kgem->has_coherent_mmap_gtt)); + kgem->has_llc = test_has_llc(kgem); DBG(("%s: has shared last-level-cache? %d\n", __FUNCTION__, kgem->has_llc)); @@ -7177,7 +7191,9 @@ kgem_bo_submit(kgem, bo); - if (bo->domain != DOMAIN_GTT || FORCE_MMAP_SYNC & (1 << DOMAIN_GTT)) { + if (bo->domain != DOMAIN_GTT || + !kgem->has_coherent_mmap_gtt || + FORCE_MMAP_SYNC & (1 << DOMAIN_GTT)) { struct drm_i915_gem_set_domain set_domain; DBG(("%s: SYNC: handle=%d, needs_flush? %d, domain? %d, busy? %d\n", diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/kgem.h xserver-xorg-video-intel-2.99.917+git20180925/src/sna/kgem.h --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/kgem.h 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/kgem.h 2018-09-06 12:00:04.000000000 +0000 @@ -190,6 +190,7 @@ uint32_t has_secure_batches :1; uint32_t has_pinned_batches :1; uint32_t has_caching :1; + uint32_t has_coherent_mmap_gtt :1; uint32_t has_llc :1; uint32_t has_wt :1; uint32_t has_no_reloc :1; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/meson.build xserver-xorg-video-intel-2.99.917+git20180925/src/sna/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,139 @@ +config.set('USE_SNA', 1) + +if cc.has_member('struct sysinfo', 'totalram', + prefix : '#include ') + config.set('HAVE_STRUCT_SYSINFO_TOTALRAM', 1) +endif + +git_version_h = vcs_tag(input : 'git_version.h.in', output : 'git_version.h', + fallback : 'not compiled from git', + command : [ 'git', 'describe' ] ) + +config.set('HAVE_DOT_GIT', 1) + +if cc.has_header('alloca.h') + config.set('HAVE_ALLOCA_H', 1) +endif + +sna_deps = [ + cc.find_library('m', required : true), + dependency('threads', required : true), + dependency('xorg-server', required : true), + dependency('libdrm', required : true), +] + +sna_sources = [ + 'blt.c', + 'kgem.c', + 'sna_accel.c', + 'sna_acpi.c', + 'sna_blt.c', + 'sna_composite.c', + 'sna_cpu.c', + 'sna_damage.c', + 'sna_display.c', + 'sna_display_fake.c', + 'sna_driver.c', + 'sna_glyphs.c', + 'sna_gradient.c', + 'sna_io.c', + 'sna_render.c', + 'sna_stream.c', + 'sna_trapezoids.c', + 'sna_trapezoids_boxes.c', + 'sna_trapezoids_imprecise.c', + 'sna_trapezoids_mono.c', + 'sna_trapezoids_precise.c', + 'sna_tiling.c', + 'sna_transform.c', + 'sna_threads.c', + 'sna_vertex.c', + 'sna_video.c', + 'sna_video_overlay.c', + 'sna_video_sprite.c', + 'sna_video_textured.c', + 'gen2_render.c', + 'gen3_render.c', + 'gen4_common.c', + 'gen4_render.c', + 'gen4_source.c', + 'gen4_vertex.c', + 'gen5_render.c', + 'gen6_common.c', + 'gen6_render.c', + 'gen7_render.c', + 'gen8_eu.c', + 'gen8_render.c', + 'gen8_vertex.c', + 'gen9_render.c', +] + +if libudev.found() + sna_deps += libudev +endif + +if with_valgrind + sna_deps += valgrind +endif + +if with_dri2 + sna_sources += 'sna_dri2.c' + sna_deps += [ + dependency('dri2proto', required : true), + cc.find_library('rt', required : true), + ] +endif + +if with_dri3 + sna_sources += 'sna_dri3.c' + sna_deps += dri3 +endif + +if has_present + sna_sources += 'sna_present.c' + sna_deps += present +endif + +if with_xvmc + sna_sources += 'sna_video_hwmc.c' +endif + +if debug == 'full' + sna_sources += [ + 'kgem_debug.c', + 'kgem_debug_gen2.c', + 'kgem_debug_gen3.c', + 'kgem_debug_gen4.c', + 'kgem_debug_gen5.c', + 'kgem_debug_gen6.c', + 'kgem_debug_gen7.c', + ] +endif + +if get_option('tearfree') + config.set('TEARFREE', 1) +endif +if get_option('use-create2') + config.set('USE_CREATE2', 1) +endif +if get_option('async-swap') + config.set('USE_ASYNC_SWAP', 1) +endif + +subdir('brw') +subdir('fb') + +sna = static_library('sna', + [ git_version_h, sna_sources ], + dependencies : sna_deps, + link_with : [ brw, fb, ], + include_directories : inc, + c_args : [ + '-Wno-missing-field-initializers', + '-Wno-unused-but-set-variable', + '-Wno-shift-negative-value', + '-Wno-unused-parameter', + '-Wno-sign-compare', + '-Wno-type-limits', + ], + install : false) diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_accel.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_accel.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_accel.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_accel.c 2018-09-06 12:00:04.000000000 +0000 @@ -13732,10 +13732,10 @@ uint8_t *dst, *src; uint32_t *b; - DBG(("%s: rect (%d, %d)x(%d, %d) stipple [%d,%d]\n", + DBG(("%s: rect (%d, %d)x(%d, %d) stipple [%d,%d, src_stride=%d]\n", __FUNCTION__, r->x, r->y, r->width, r->height, - bx1, bx2)); + bx1, bx2, bstride*bh)); src_stride = bstride*bh; assert(src_stride > 0); @@ -13898,6 +13898,12 @@ if (!region_maybe_clip(&clip, gc->pCompositeClip)) return true; + DBG(("%s: clip.extents=[(%d, %d), (%d, %d)] region?=%d\n", + __FUNCTION__, + clip.extents.x1, clip.extents.y1, + clip.extents.x2, clip.extents.y2, + clip.data ? clip.data->numRects : 0)); + pat.x = origin->x + drawable->x; pat.y = origin->y + drawable->y; @@ -13926,11 +13932,11 @@ bh = box.y2 - box.y1; bstride = ALIGN(bw, 2); - DBG(("%s: rect (%d, %d)x(%d, %d), box (%d,%d),(%d,%d) stipple [%d,%d], pitch=%d, stride=%d\n", + DBG(("%s: rect (%d, %d)x(%d, %d), box (%d,%d),(%d,%d) stipple [%d,%d], pitch=%d, stride=%d, len=%d\n", __FUNCTION__, r->x, r->y, r->width, r->height, box.x1, box.y1, box.x2, box.y2, - bx1, bx2, bw, bstride)); + bx1, bx2, bw, bstride, bstride*bh)); src_stride = bstride*bh; assert(src_stride > 0); @@ -14047,7 +14053,7 @@ I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); - *(uint64_t *)(b+5) = + *(uint64_t *)(b+6) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, @@ -17447,11 +17453,15 @@ { struct sna *sna = user_data; +#if 0 /* XXX requires mesa to implement glXWaitX()! */ if (!sna->needs_dri_flush) return; sna_accel_flush(sna); sna->needs_dri_flush = false; +#else + sna_accel_flush(sna); +#endif } static void diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_display.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_display.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_display.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_display.c 2018-09-06 12:00:04.000000000 +0000 @@ -222,6 +222,10 @@ uint32_t supported; uint32_t current; } rotation; + struct { + uint32_t prop; + uint64_t values[2]; + } color_encoding; struct list link; } primary; struct list sprites; @@ -263,7 +267,6 @@ uint32_t edid_blob_id; uint32_t edid_len; void *edid_raw; - xf86MonPtr fake_edid_mon; void *fake_edid_raw; bool has_panel_limits; @@ -1700,8 +1703,8 @@ int flip_active; bool ret = true; - DBG(("%s: enabled? %d waiting? %d, flags=%x, flips=%d, pixmap=%ld [front?=%d], handle=%d, shadow=%d\n", - __FUNCTION__, sna->mode.shadow_enabled, sna->mode.shadow_wait, + DBG(("%s: enabled? %d flags=%x, flips=%d, pixmap=%ld [front?=%d], handle=%d, shadow=%d\n", + __FUNCTION__, sna->mode.shadow_enabled, flags, sna->mode.flip_active, pixmap->drawable.serialNumber, pixmap == sna->front, priv->gpu_bo->handle, sna->mode.shadow->handle)); @@ -1713,7 +1716,6 @@ goto done; assert(sna->mode.shadow_damage); - assert(!sna->mode.shadow_wait); if ((flags & MOVE_WRITE) == 0) { if ((flags & __MOVE_SCANOUT) == 0) { @@ -1755,7 +1757,6 @@ } assert(sna->mode.shadow_active); - sna->mode.shadow_wait = true; flip_active = sna->mode.flip_active; if (flip_active) { @@ -1765,21 +1766,6 @@ DBG(("%s: %d flips still pending, shadow flip_active=%d\n", __FUNCTION__, sna->mode.flip_active, flip_active)); } - if (flip_active) { - /* raw cmd to avoid setting wedged in the middle of an op */ - drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GEM_THROTTLE, 0); - sna->kgem.need_throttle = false; - - while (flip_active && sna_mode_wakeup(sna)) { - struct sna_crtc *crtc; - - flip_active = sna->mode.flip_active; - list_for_each_entry(crtc, &sna->mode.shadow_crtc, shadow_link) - flip_active -= crtc->flip_pending; - } - DBG(("%s: after waiting %d flips outstanding, flip_active=%d\n", - __FUNCTION__, sna->mode.flip_active, flip_active)); - } bo = sna->mode.shadow; if (flip_active) { @@ -1789,26 +1775,19 @@ pixmap->drawable.bitsPerPixel, priv->gpu_bo->tiling, CREATE_EXACT | CREATE_SCANOUT); - if (bo != NULL) { - DBG(("%s: replacing still-attached GPU bo handle=%d, flips=%d\n", - __FUNCTION__, priv->gpu_bo->tiling, sna->mode.flip_active)); + if (bo == NULL) + return false; - RegionUninit(&sna->mode.shadow_region); - sna->mode.shadow_region.extents.x1 = 0; - sna->mode.shadow_region.extents.y1 = 0; - sna->mode.shadow_region.extents.x2 = pixmap->drawable.width; - sna->mode.shadow_region.extents.y2 = pixmap->drawable.height; - sna->mode.shadow_region.data = NULL; - } else { - while (sna->mode.flip_active && - sna_mode_wait_for_event(sna)) - sna_mode_wakeup(sna); + DBG(("%s: replacing still-attached GPU bo handle=%d, flips=%d\n", + __FUNCTION__, priv->gpu_bo->tiling, sna->mode.flip_active)); - bo = sna->mode.shadow; - } + RegionUninit(&sna->mode.shadow_region); + sna->mode.shadow_region.extents.x1 = 0; + sna->mode.shadow_region.extents.y1 = 0; + sna->mode.shadow_region.extents.x2 = pixmap->drawable.width; + sna->mode.shadow_region.extents.y2 = pixmap->drawable.height; + sna->mode.shadow_region.data = NULL; } - assert(sna->mode.shadow_wait); - sna->mode.shadow_wait = false; if (bo->refcnt > 1) { bo = kgem_create_2d(&sna->kgem, @@ -1916,9 +1895,6 @@ priv->move_to_gpu_data = NULL; priv->move_to_gpu = NULL; - assert(!sna->mode.shadow_wait); - flush_events(sna); - assert(sna->mode.shadow->active_scanout); return ret; } @@ -2610,6 +2586,11 @@ } sna_crtc->rotation = RR_Rotate_0; + if (sna_crtc->cache_bo) { + kgem_bo_destroy(&sna->kgem, sna_crtc->cache_bo); + sna_crtc->cache_bo = NULL; + } + if (use_shadow(sna, crtc)) { PixmapPtr front; unsigned long tiled_limit; @@ -3293,17 +3274,125 @@ #endif }; -inline static bool prop_is_rotation(struct drm_mode_get_property *prop) +inline static bool prop_has_type_and_name(const struct drm_mode_get_property *prop, + unsigned int type, const char *name) { - if ((prop->flags & (1 << 5)) == 0) + if ((prop->flags & (1 << type)) == 0) return false; - if (strcmp(prop->name, "rotation")) + if (strcmp(prop->name, name)) return false; return true; } +inline static bool prop_is_rotation(const struct drm_mode_get_property *prop) +{ + return prop_has_type_and_name(prop, 5, "rotation"); +} + +static void parse_rotation_prop(struct sna *sna, struct plane *p, + struct drm_mode_get_property *prop, + uint64_t value) +{ + struct drm_mode_property_enum *enums; + int j; + + p->rotation.prop = prop->prop_id; + p->rotation.current = value; + + DBG(("%s: found rotation property .id=%d, value=%ld, num_enums=%d\n", + __FUNCTION__, prop->prop_id, value, prop->count_enum_blobs)); + + enums = malloc(prop->count_enum_blobs * sizeof(struct drm_mode_property_enum)); + if (!enums) + return; + + prop->count_values = 0; + prop->enum_blob_ptr = (uintptr_t)enums; + + if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETPROPERTY, prop)) { + free(enums); + return; + } + + /* XXX we assume that the mapping between kernel enum and + * RandR remains fixed for our lifetimes. + */ + VG(VALGRIND_MAKE_MEM_DEFINED(enums, sizeof(*enums)*prop->count_enum_blobs)); + for (j = 0; j < prop->count_enum_blobs; j++) { + DBG(("%s: rotation[%d] = %s [%lx]\n", __FUNCTION__, + j, enums[j].name, (long)enums[j].value)); + p->rotation.supported |= 1 << enums[j].value; + } + + free(enums); +} + +inline static bool prop_is_color_encoding(const struct drm_mode_get_property *prop) +{ + return prop_has_type_and_name(prop, 3, "COLOR_ENCODING"); +} + +static void parse_color_encoding_prop(struct sna *sna, struct plane *p, + struct drm_mode_get_property *prop, + uint64_t value) +{ + struct drm_mode_property_enum *enums; + unsigned int supported = 0; + int j; + + DBG(("%s: found color encoding property .id=%d, value=%ld, num_enums=%d\n", + __FUNCTION__, prop->prop_id, (long)value, prop->count_enum_blobs)); + + enums = malloc(prop->count_enum_blobs * sizeof(struct drm_mode_property_enum)); + if (!enums) + return; + + prop->count_values = 0; + prop->enum_blob_ptr = (uintptr_t)enums; + + if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETPROPERTY, prop)) { + free(enums); + return; + } + + VG(VALGRIND_MAKE_MEM_DEFINED(enums, sizeof(*enums)*prop->count_enum_blobs)); + for (j = 0; j < prop->count_enum_blobs; j++) { + if (!strcmp(enums[j].name, "ITU-R BT.601 YCbCr")) { + p->color_encoding.values[0] = enums[j].value; + supported |= 1 << 0; + } else if (!strcmp(enums[j].name, "ITU-R BT.709 YCbCr")) { + p->color_encoding.values[1] = enums[j].value; + supported |= 1 << 1; + } + } + + free(enums); + + if (supported == 3) + p->color_encoding.prop = prop->prop_id; +} + +void sna_crtc_set_sprite_colorspace(xf86CrtcPtr crtc, + unsigned idx, int colorspace) +{ + struct plane *p; + + assert(to_sna_crtc(crtc)); + assert(colorspace < ARRAY_SIZE(p->color_encoding.values)); + + p = lookup_sprite(to_sna_crtc(crtc), idx); + + if (!p->color_encoding.prop) + return; + + drmModeObjectSetProperty(to_sna(crtc->scrn)->kgem.fd, + p->id, DRM_MODE_OBJECT_PLANE, + p->color_encoding.prop, + p->color_encoding.values[colorspace]); +} + static int plane_details(struct sna *sna, struct plane *p) { #define N_STACK_PROPS 32 /* must be a multiple of 2 */ @@ -3360,34 +3449,9 @@ if (strcmp(prop.name, "type") == 0) { type = values[i]; } else if (prop_is_rotation(&prop)) { - struct drm_mode_property_enum *enums; - - p->rotation.prop = props[i]; - p->rotation.current = values[i]; - - DBG(("%s: found rotation property .id=%d, value=%ld, num_enums=%d\n", - __FUNCTION__, prop.prop_id, (long)values[i], prop.count_enum_blobs)); - enums = malloc(prop.count_enum_blobs * sizeof(struct drm_mode_property_enum)); - if (enums != NULL) { - prop.count_values = 0; - prop.enum_blob_ptr = (uintptr_t)enums; - - if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETPROPERTY, &prop) == 0) { - int j; - - /* XXX we assume that the mapping between kernel enum and - * RandR remains fixed for our lifetimes. - */ - VG(VALGRIND_MAKE_MEM_DEFINED(enums, sizeof(*enums)*prop.count_enum_blobs)); - for (j = 0; j < prop.count_enum_blobs; j++) { - DBG(("%s: rotation[%d] = %s [%lx]\n", __FUNCTION__, - j, enums[j].name, (long)enums[j].value)); - p->rotation.supported |= 1 << enums[j].value; - } - } - - free(enums); - } + parse_rotation_prop(sna, p, &prop, values[i]); + } else if (prop_is_color_encoding(&prop)) { + parse_color_encoding_prop(sna, p, &prop, values[i]); } } @@ -3411,7 +3475,7 @@ return; memcpy(sprite, details, sizeof(*sprite)); - list_add(&sprite->link, &crtc->sprites); + list_add_tail(&sprite->link, &crtc->sprites); } static void @@ -3496,6 +3560,82 @@ free(planes); } +static bool plane_has_format(const uint32_t formats[], + int count_formats, + uint32_t format) +{ + int i; + + for (i = 0; i < count_formats; i++) { + if (formats[i] == format) + return true; + } + + return false; +} + +bool sna_has_sprite_format(struct sna *sna, uint32_t format) +{ + xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); + int i; + + if (sna->mode.num_real_crtc == 0) + return false; + + for (i = 0; i < sna->mode.num_real_crtc; i++) { + struct sna_crtc *sna_crtc = to_sna_crtc(config->crtc[i]); + struct plane *plane; + + list_for_each_entry(plane, &sna_crtc->sprites, link) { + struct local_mode_get_plane p; + uint32_t *formats; + int count_formats; + bool has_format; + + VG_CLEAR(p); + p.plane_id = plane->id; + p.count_format_types = 0; + if (drmIoctl(sna->kgem.fd, + LOCAL_IOCTL_MODE_GETPLANE, + &p)) + continue; + count_formats = p.count_format_types; + + formats = calloc(count_formats, sizeof(formats[0])); + if (!formats) + continue; + + p.count_format_types = count_formats; + p.format_type_ptr = (uintptr_t)formats; + if (drmIoctl(sna->kgem.fd, + LOCAL_IOCTL_MODE_GETPLANE, + &p)) { + free(formats); + continue; + } + + assert(p.count_format_types == count_formats); + + has_format = plane_has_format(formats, + count_formats, + format); + + free(formats); + + /* + * As long as one plane supports the + * format we declare it as supported. + * Not all planes may support it, but + * then the GPU fallback will kick in. + */ + if (has_format) + return true; + } + } + + return false; +} + static void sna_crtc_init__rotation(struct sna *sna, struct sna_crtc *crtc) { @@ -4102,13 +4242,21 @@ sna_output_override_edid(xf86OutputPtr output) { struct sna_output *sna_output = output->driver_private; + xf86MonPtr mon = NULL; - if (sna_output->fake_edid_mon == NULL) + if (sna_output->fake_edid_raw == NULL) return NULL; - xf86OutputSetEDID(output, sna_output->fake_edid_mon); - return xf86DDCGetModes(output->scrn->scrnIndex, - sna_output->fake_edid_mon); + mon = xf86InterpretEDID(output->scrn->scrnIndex, sna_output->fake_edid_raw); + if (mon == NULL) { + return NULL; + } + + mon->flags |= MONITOR_EDID_COMPLETE_RAWDATA; + + xf86OutputSetEDID(output, mon); + + return xf86DDCGetModes(output->scrn->scrnIndex, mon); } static DisplayModePtr @@ -4896,7 +5044,6 @@ FILE *file; void *raw; int size; - xf86MonPtr mon; filename = fake_edid_name(output); if (filename == NULL) @@ -4928,16 +5075,6 @@ } fclose(file); - mon = xf86InterpretEDID(output->scrn->scrnIndex, raw); - if (mon == NULL) { - free(raw); - goto err; - } - - if (mon && size > 128) - mon->flags |= MONITOR_EDID_COMPLETE_RAWDATA; - - sna_output->fake_edid_mon = mon; sna_output->fake_edid_raw = raw; xf86DrvMsg(output->scrn->scrnIndex, X_CONFIG, @@ -8755,7 +8892,8 @@ region->extents.x2, region->extents.y2, region_num_rects(region))); - assert(!wedged(sna)); + if (wedged(sna)) + goto fallback; if (priv->clear) { RegionRec whole; @@ -8800,10 +8938,13 @@ return; } - if (can_render(sna)) + if (can_render(sna)) { sna_crtc_redisplay__composite(crtc, region, bo); - else - sna_crtc_redisplay__fallback(crtc, region, bo); + return; + } + +fallback: + sna_crtc_redisplay__fallback(crtc, region, bo); } static void shadow_flip_handler(struct drm_event_vblank *e, @@ -8811,8 +8952,10 @@ { struct sna *sna = data; - if (!sna->mode.shadow_wait) - sna_mode_redisplay(sna); + sna->timer_active |= 1 << FLUSH_TIMER; + sna->timer_expire[FLUSH_TIMER] = + e->tv_sec * 1000 + e->tv_usec / 1000 + + sna->vblank_interval / 2; } void sna_shadow_set_crtc(struct sna *sna, @@ -8965,6 +9108,12 @@ if (sna->mode.dirty) return; + if (sna->mode.flip_active) { + DBG(("%s: %d outstanding flips\n", + __FUNCTION__, sna->mode.flip_active)); + return; + } + region = DamageRegion(sna->mode.shadow_damage); if (RegionNil(region)) return; @@ -8974,23 +9123,6 @@ region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); - if (sna->mode.flip_active) { - DBG(("%s: checking for %d outstanding flip completions\n", - __FUNCTION__, sna->mode.flip_active)); - - sna->mode.dirty = true; - while (sna->mode.flip_active && sna_mode_wakeup(sna)) - ; - sna->mode.dirty = false; - - DBG(("%s: now %d outstanding flip completions (enabled? %d)\n", - __FUNCTION__, - sna->mode.flip_active, - sna->mode.shadow_enabled)); - if (sna->mode.flip_active || !sna->mode.shadow_enabled) - return; - } - if (!move_crtc_to_gpu(sna)) { DBG(("%s: forcing scanout update using the CPU\n", __FUNCTION__)); if (!sna_pixmap_move_to_cpu(sna->front, MOVE_READ)) @@ -9378,6 +9510,7 @@ int sna_mode_wakeup(struct sna *sna) { + bool defer_vblanks = sna->mode.flip_active && sna->mode.shadow_enabled; char buffer[1024]; int len, i; int ret = 0; @@ -9388,14 +9521,14 @@ * event from drm. */ if (!event_pending(sna->kgem.fd)) - return ret; + goto done; /* The DRM read semantics guarantees that we always get only * complete events. */ len = read(sna->kgem.fd, buffer, sizeof (buffer)); if (len < (int)sizeof(struct drm_event)) - return ret; + goto done; /* Note that we cannot rely on the passed in struct sna matching * the struct sna used for the vblank event (in case it was submitted @@ -9410,7 +9543,7 @@ struct drm_event *e = (struct drm_event *)&buffer[i]; switch (e->type) { case DRM_EVENT_VBLANK: - if (sna->mode.shadow_wait) + if (defer_vblanks) defer_event(sna, e); else if (((uintptr_t)((struct drm_event_vblank *)e)->user_data) & 2) sna_present_vblank_handler((struct drm_event_vblank *)e); @@ -9481,4 +9614,8 @@ } goto again; + +done: + flush_events(sna); + return ret; } diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_dri2.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_dri2.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_dri2.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_dri2.c 2018-09-06 12:00:04.000000000 +0000 @@ -1303,7 +1303,7 @@ assert(region == NULL || region == &clip); priv = sna_pixmap_move_area_to_gpu(pixmap, &clip.extents, hint); if (priv) { - damage(pixmap, priv, region); + damage(pixmap, priv, region ?: &clip); dst_bo = priv->gpu_bo; } DBG(("%s: updated FrontLeft dst_bo from handle=%d to handle=%d\n", diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_driver.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_driver.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_driver.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_driver.c 2018-09-06 12:00:04.000000000 +0000 @@ -689,7 +689,6 @@ return FALSE; } -#if !HAVE_NOTIFY_FD static bool has_shadow(struct sna *sna) { if (!sna->mode.shadow_enabled) @@ -702,6 +701,7 @@ return sna->mode.flip_active == 0; } +#if !HAVE_NOTIFY_FD static void sna_block_handler(BLOCKHANDLER_ARGS_DECL) { @@ -712,8 +712,9 @@ #endif struct timeval **tv = timeout; - DBG(("%s (tv=%ld.%06ld)\n", __FUNCTION__, - *tv ? (*tv)->tv_sec : -1, *tv ? (*tv)->tv_usec : 0)); + DBG(("%s (tv=%ld.%06ld), has_shadow?=%d\n", __FUNCTION__, + *tv ? (*tv)->tv_sec : -1, *tv ? (*tv)->tv_usec : 0, + has_shadow(sna))); sna->BlockHandler(BLOCKHANDLER_ARGS); @@ -754,12 +755,18 @@ int *timeout = _timeout; struct timeval tv, *tvp; - DBG(("%s (timeout=%d)\n", __FUNCTION__, *timeout)); - if (*timeout == 0) - return; + DBG(("%s (timeout=%d, has_shadow=%d)\n", __FUNCTION__, + *timeout, has_shadow(sna))); if (*timeout < 0) { tvp = NULL; + } else if (*timeout == 0) { + if (!has_shadow(sna)) + return; + + tv.tv_sec = 0; + tv.tv_usec = 0; + tvp = &tv; } else { tv.tv_sec = *timeout / 1000; tv.tv_usec = (*timeout % 1000) * 1000; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna.h xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna.h --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna.h 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna.h 2018-09-06 12:00:04.000000000 +0000 @@ -310,7 +310,6 @@ unsigned flip_active; unsigned hidden; bool shadow_enabled; - bool shadow_wait; bool dirty; struct drm_event_vblank *shadow_events; @@ -509,7 +508,7 @@ pure static inline ScreenPtr to_screen_from_sna(struct sna *sna) { ScreenPtr screen = xf86ScrnToScreen(sna->scrn); - assert(sna == to_sna_from_screen(screen)); + assert(!screen || sna == to_sna_from_screen(screen)); return screen; } @@ -634,8 +633,10 @@ extern unsigned sna_crtc_count_sprites(xf86CrtcPtr crtc); extern bool sna_crtc_set_sprite_rotation(xf86CrtcPtr crtc, unsigned idx, uint32_t rotation); +extern void sna_crtc_set_sprite_colorspace(xf86CrtcPtr crtc, unsigned idx, int colorspace); extern uint32_t sna_crtc_to_sprite(xf86CrtcPtr crtc, unsigned idx); extern bool sna_crtc_is_transformed(xf86CrtcPtr crtc); +bool sna_has_sprite_format(struct sna *sna, uint32_t format); #define CRTC_VBLANK 0x7 #define CRTC_ON 0x80000000 diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_present.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_present.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_present.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_present.c 2018-09-06 12:00:04.000000000 +0000 @@ -45,7 +45,8 @@ uint64_t *event_id; uint64_t target_msc; int n_event_id; - bool queued; + bool queued:1; + bool active:1; }; static void sna_present_unflip(ScreenPtr screen, uint64_t event_id); @@ -140,31 +141,39 @@ static void vblank_complete(struct sna_present_event *info, uint64_t ust, uint64_t msc) { + struct list * const q = sna_crtc_vblank_queue(info->crtc); int n; - if (msc_before(msc, info->target_msc)) { - DBG(("%s: event=%d too early, now %lld, expected %lld\n", - __FUNCTION__, - info->event_id[0], - (long long)msc, (long long)info->target_msc)); - if (sna_present_queue(info, msc)) - return; - } + do { + assert(sna_crtc_vblank_queue(info->crtc) == q); - DBG(("%s: %d events complete\n", __FUNCTION__, info->n_event_id)); - for (n = 0; n < info->n_event_id; n++) { - DBG(("%s: pipe=%d tv=%d.%06d msc=%lld (target=%lld), event=%lld complete%s\n", __FUNCTION__, - sna_crtc_pipe(info->crtc), - (int)(ust / 1000000), (int)(ust % 1000000), - (long long)msc, (long long)info->target_msc, - (long long)info->event_id[n], - info->target_msc && msc == (uint32_t)info->target_msc ? "" : ": MISS")); - present_event_notify(info->event_id[n], ust, msc); - } - if (info->n_event_id > 1) - free(info->event_id); - list_del(&info->link); - info_free(info); + if (msc_before(msc, info->target_msc)) { + DBG(("%s: event=%d too early, now %lld, expected %lld\n", + __FUNCTION__, + info->event_id[0], + (long long)msc, (long long)info->target_msc)); + if (sna_present_queue(info, msc)) + return; + } + + DBG(("%s: %d events complete\n", __FUNCTION__, info->n_event_id)); + for (n = 0; n < info->n_event_id; n++) { + DBG(("%s: pipe=%d tv=%d.%06d msc=%lld (target=%lld), event=%lld complete%s\n", __FUNCTION__, + sna_crtc_pipe(info->crtc), + (int)(ust / 1000000), (int)(ust % 1000000), + (long long)msc, (long long)info->target_msc, + (long long)info->event_id[n], + info->target_msc && msc == (uint32_t)info->target_msc ? "" : ": MISS")); + present_event_notify(info->event_id[n], ust, msc); + } + if (info->n_event_id > 1) + free(info->event_id); + + _list_del(&info->link); + info_free(info); + + info = list_entry(info->link.next, typeof(*info), link); + } while (q != &info->link && !info->queued); } static uint32_t msc_to_delay(xf86CrtcPtr crtc, uint64_t target) @@ -200,7 +209,7 @@ static void add_to_crtc_vblank(struct sna_present_event *info, int delta) { - info->queued = true; + info->active = true; if (delta == 1 && info->crtc) { sna_crtc_set_vblank(info->crtc); info->crtc = mark_crtc(info->crtc); @@ -214,6 +223,7 @@ uint64_t msc, ust; DBG(("%s(event=%lldx%d, now=%d)\n", __FUNCTION__, (long long)info->event_id[0], info->n_event_id, now)); + assert(info->queued); VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_RELATIVE; @@ -335,6 +345,7 @@ add_to_crtc_vblank(info, delta); } + info->queued = true; return true; } @@ -364,10 +375,11 @@ static void add_keepalive(struct sna *sna, xf86CrtcPtr crtc, uint64_t msc) { + struct list *q = sna_crtc_vblank_queue(crtc); struct sna_present_event *info, *tmp; union drm_wait_vblank vbl; - list_for_each_entry(tmp, sna_crtc_vblank_queue(crtc), link) { + list_for_each_entry(tmp, q, link) { if (tmp->target_msc == msc) { DBG(("%s: vblank already queued for target_msc=%lld\n", __FUNCTION__, (long long)msc)); @@ -396,9 +408,10 @@ vbl.request.sequence = msc; vbl.request.signal = (uintptr_t)MARK_PRESENT(info); - if (sna_wait_vblank(info->sna, &vbl, sna_crtc_pipe(info->crtc)) == 0) { + if (sna_wait_vblank(info->sna, &vbl, sna_crtc_pipe(crtc)) == 0) { list_add_tail(&info->link, &tmp->link); add_to_crtc_vblank(info, 1); + info->queued = true; } else info_free(info); } @@ -446,8 +459,8 @@ struct sna_present_event *info = to_present_event(event->user_data); uint64_t msc; - if (!info->queued) { - DBG(("%s: arrived unexpectedly early (not queued)\n", __FUNCTION__)); + if (!info->active) { + DBG(("%s: arrived unexpectedly early (not active)\n", __FUNCTION__)); assert(!has_vblank(info->crtc)); return; } @@ -460,12 +473,6 @@ msc = sna_crtc_record_event(info->crtc, event); - if (info->sna->mode.shadow_wait) { - DBG(("%s: recursed from TearFree\n", __FUNCTION__)); - if (TimerSet(NULL, 0, 1, sna_fake_vblank_handler, info)) - return; - } - vblank_complete(info, ust64(event->tv_sec, event->tv_usec), msc); } @@ -475,6 +482,7 @@ struct sna *sna = to_sna_from_screen(crtc->pScreen); struct sna_present_event *info, *tmp; const struct ust_msc *swap; + struct list *q; if (!sna_crtc_is_on(crtc->devPrivate)) return BadAlloc; @@ -496,7 +504,8 @@ if (warn_unless(msc - swap->msc < 1ull<<31)) return BadValue; - list_for_each_entry(tmp, sna_crtc_vblank_queue(crtc->devPrivate), link) { + q = sna_crtc_vblank_queue(crtc->devPrivate); + list_for_each_entry(tmp, q, link) { if (tmp->target_msc == msc) { uint64_t *events = tmp->event_id; @@ -538,8 +547,9 @@ info->n_event_id = 1; list_add_tail(&info->link, &tmp->link); info->queued = false; + info->active = false; - if (!sna_present_queue(info, swap->msc)) { + if (info->link.prev == q && !sna_present_queue(info, swap->msc)) { list_del(&info->link); info_free(info); return BadAlloc; @@ -701,8 +711,8 @@ DBG(("%s(sequence=%d): event=%lld\n", __FUNCTION__, event->sequence, (long long)info->event_id[0])); assert(info->n_event_id == 1); - if (!info->queued) { - DBG(("%s: arrived unexpectedly early (not queued)\n", __FUNCTION__)); + if (!info->active) { + DBG(("%s: arrived unexpectedly early (not active)\n", __FUNCTION__)); return; } @@ -762,7 +772,7 @@ info->event_id[0] = event_id; info->n_event_id = 1; info->target_msc = target_msc; - info->queued = false; + info->active = false; if (!sna_page_flip(sna, bo, present_flip_handler, info)) { DBG(("%s: pageflip failed\n", __FUNCTION__)); diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_render.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_render.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_render.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_render.c 2018-09-06 12:00:04.000000000 +0000 @@ -60,7 +60,7 @@ case 16: return PICT_r5g6b5; default: assert(0); case 24: return PICT_x8r8g8b8; -#ifdef PICT_x2r10g10b10 +#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) case 30: return PICT_x2r10g10b10; #endif case 32: return PICT_a8r8g8b8; @@ -2370,6 +2370,9 @@ if (dst == NULL || src == NULL) return false; + kgem_bo_sync__gtt(&sna->kgem, dst_bo); + kgem_bo_sync__gtt(&sna->kgem, src_bo); + detile = NULL; } else { if (dst == dst_bo->map__wc) diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_render.h xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_render.h --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_render.h 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_render.h 2018-09-06 12:00:04.000000000 +0000 @@ -436,9 +436,14 @@ GEN6_WM_KERNEL_OPACITY, GEN6_WM_KERNEL_OPACITY_P, - GEN6_WM_KERNEL_VIDEO_PLANAR, - GEN6_WM_KERNEL_VIDEO_NV12, - GEN6_WM_KERNEL_VIDEO_PACKED, + GEN6_WM_KERNEL_VIDEO_PLANAR_BT601, + GEN6_WM_KERNEL_VIDEO_NV12_BT601, + GEN6_WM_KERNEL_VIDEO_PACKED_BT601, + + GEN6_WM_KERNEL_VIDEO_PLANAR_BT709, + GEN6_WM_KERNEL_VIDEO_NV12_BT709, + GEN6_WM_KERNEL_VIDEO_PACKED_BT709, + GEN6_KERNEL_COUNT }; @@ -487,9 +492,14 @@ GEN7_WM_KERNEL_OPACITY, GEN7_WM_KERNEL_OPACITY_P, - GEN7_WM_KERNEL_VIDEO_PLANAR, - GEN7_WM_KERNEL_VIDEO_NV12, - GEN7_WM_KERNEL_VIDEO_PACKED, + GEN7_WM_KERNEL_VIDEO_PLANAR_BT601, + GEN7_WM_KERNEL_VIDEO_NV12_BT601, + GEN7_WM_KERNEL_VIDEO_PACKED_BT601, + + GEN7_WM_KERNEL_VIDEO_PLANAR_BT709, + GEN7_WM_KERNEL_VIDEO_NV12_BT709, + GEN7_WM_KERNEL_VIDEO_PACKED_BT709, + GEN7_WM_KERNEL_VIDEO_RGB, GEN7_WM_KERNEL_COUNT }; @@ -541,9 +551,14 @@ GEN8_WM_KERNEL_OPACITY, GEN8_WM_KERNEL_OPACITY_P, - GEN8_WM_KERNEL_VIDEO_PLANAR, - GEN8_WM_KERNEL_VIDEO_NV12, - GEN8_WM_KERNEL_VIDEO_PACKED, + GEN8_WM_KERNEL_VIDEO_PLANAR_BT601, + GEN8_WM_KERNEL_VIDEO_NV12_BT601, + GEN8_WM_KERNEL_VIDEO_PACKED_BT601, + + GEN8_WM_KERNEL_VIDEO_PLANAR_BT709, + GEN8_WM_KERNEL_VIDEO_NV12_BT709, + GEN8_WM_KERNEL_VIDEO_PACKED_BT709, + GEN8_WM_KERNEL_VIDEO_RGB, GEN8_WM_KERNEL_COUNT }; @@ -593,9 +608,14 @@ GEN9_WM_KERNEL_OPACITY, GEN9_WM_KERNEL_OPACITY_P, - GEN9_WM_KERNEL_VIDEO_PLANAR, - GEN9_WM_KERNEL_VIDEO_NV12, - GEN9_WM_KERNEL_VIDEO_PACKED, + GEN9_WM_KERNEL_VIDEO_PLANAR_BT601, + GEN9_WM_KERNEL_VIDEO_NV12_BT601, + GEN9_WM_KERNEL_VIDEO_PACKED_BT601, + + GEN9_WM_KERNEL_VIDEO_PLANAR_BT709, + GEN9_WM_KERNEL_VIDEO_NV12_BT709, + GEN9_WM_KERNEL_VIDEO_PACKED_BT709, + GEN9_WM_KERNEL_VIDEO_RGB, GEN9_WM_KERNEL_COUNT }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_video.h xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_video.h --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_video.h 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_video.h 2018-09-06 12:00:04.000000000 +0000 @@ -100,6 +100,9 @@ unsigned color_key_changed; bool has_color_key; + unsigned colorspace; + unsigned colorspace_changed; + /** YUV data buffers */ struct kgem_bo *old_buf[2]; struct kgem_bo *buf; @@ -108,7 +111,6 @@ int alignment; bool tiled; bool textured; - int plane; struct kgem_bo *bo[4]; RegionRec clip; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_video_sprite.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_video_sprite.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_video_sprite.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_video_sprite.c 2018-09-06 12:00:04.000000000 +0000 @@ -46,8 +46,11 @@ #define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian */ #define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */ #define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */ +#define DRM_FORMAT_NV12 fourcc_code('N', 'V', '1', '2') /* 2x2 subsampled Cr:Cb plane */ + +#define has_hw_scaling(sna, video) ((sna)->kgem.gen < 071 || \ + (sna)->kgem.gen >= 0110) -#define has_hw_scaling(sna) ((sna)->kgem.gen < 071) #define LOCAL_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct local_mode_set_plane) struct local_mode_set_plane { @@ -67,11 +70,17 @@ #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, true) -static Atom xvColorKey, xvAlwaysOnTop, xvSyncToVblank; +static Atom xvColorKey, xvAlwaysOnTop, xvSyncToVblank, xvColorspace; static XvFormatRec formats[] = { {15}, {16}, {24} }; -static const XvImageRec images[] = { XVIMAGE_YUY2, XVIMAGE_UYVY, XVMC_RGB888, XVMC_RGB565 }; +static const XvImageRec images[] = { XVIMAGE_YUY2, XVIMAGE_UYVY, + XVMC_RGB888 }; +static const XvImageRec images_rgb565[] = { XVIMAGE_YUY2, XVIMAGE_UYVY, + XVMC_RGB888, XVMC_RGB565 }; +static const XvImageRec images_nv12[] = { XVIMAGE_YUY2, XVIMAGE_UYVY, + XVIMAGE_NV12, XVMC_RGB888, XVMC_RGB565 }; static const XvAttributeRec attribs[] = { + { XvSettable | XvGettable, 0, 1, (char *)"XV_COLORSPACE" }, /* BT.601, BT.709 */ { XvSettable | XvGettable, 0, 0xffffff, (char *)"XV_COLORKEY" }, { XvSettable | XvGettable, 0, 1, (char *)"XV_ALWAYS_ON_TOP" }, }; @@ -117,6 +126,10 @@ video->color_key = value; RegionEmpty(&video->clip); DBG(("COLORKEY = %ld\n", (long)value)); + } else if (attribute == xvColorspace) { + video->colorspace_changed = ~0; + video->colorspace = value; + DBG(("COLORSPACE = %ld\n", (long)value)); } else if (attribute == xvSyncToVblank) { DBG(("%s: SYNC_TO_VBLANK: %d -> %d\n", __FUNCTION__, video->SyncToVblank, !!value)); @@ -138,6 +151,8 @@ if (attribute == xvColorKey) *value = video->color_key; + else if (attribute == xvColorspace) + *value = video->colorspace; else if (attribute == xvAlwaysOnTop) *value = video->AlwaysOnTop; else if (attribute == xvSyncToVblank) @@ -153,7 +168,7 @@ struct sna_video *video = port->devPriv.ptr; struct sna *sna = video->sna; - if (!has_hw_scaling(sna) && !sna->render.video) { + if (!has_hw_scaling(sna, video) && !sna->render.video) { *p_w = vid_w; *p_h = vid_h; } else { @@ -255,14 +270,34 @@ if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_I915_SET_SPRITE_COLORKEY, &set)) { - xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, - "failed to update color key, disabling future updates\n"); - video->has_color_key = false; + memset(&s, 0, sizeof(s)); + s.plane_id = sna_crtc_to_sprite(crtc, video->idx); + + /* try to disable the plane first */ + if (drmIoctl(video->sna->kgem.fd, LOCAL_IOCTL_MODE_SETPLANE, &s)) + xf86DrvMsg(video->sna->scrn->scrnIndex, X_ERROR, + "failed to disable plane\n"); + + if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_I915_SET_SPRITE_COLORKEY, &set)) { + xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, + "failed to update color key, disabling future updates\n"); + video->has_color_key = false; + } } video->color_key_changed &= ~(1 << pipe); } + if (video->colorspace_changed & (1 << pipe)) { + DBG(("%s: updating colorspace: %x\n", + __FUNCTION__, video->colorspace)); + + sna_crtc_set_sprite_colorspace(crtc, video->idx, + video->colorspace); + + video->colorspace_changed &= ~(1 << pipe); + } + update_dst_box_to_crtc_coords(sna, crtc, dstBox); if (frame->rotation & (RR_Rotate_90 | RR_Rotate_270)) { int tmp = frame->width; @@ -288,8 +323,6 @@ f.width = frame->width; f.height = frame->height; f.flags = 1 << 1; /* +modifiers */ - f.handles[0] = frame->bo->handle; - f.pitches[0] = frame->pitch[0]; switch (frame->bo->tiling) { case I915_TILING_NONE: @@ -304,6 +337,18 @@ break; } + if (is_nv12_fourcc(frame->id)) { + f.handles[0] = frame->bo->handle; + f.handles[1] = frame->bo->handle; + f.pitches[0] = frame->pitch[1]; + f.pitches[1] = frame->pitch[0]; + f.offsets[0] = 0; + f.offsets[1] = frame->UBufOffset; + } else { + f.handles[0] = frame->bo->handle; + f.pitches[0] = frame->pitch[0]; + } + switch (frame->id) { case FOURCC_RGB565: f.pixel_format = DRM_FORMAT_RGB565; @@ -313,6 +358,9 @@ f.pixel_format = DRM_FORMAT_XRGB8888; purged = sna->scrn->depth != 24; break; + case FOURCC_NV12: + f.pixel_format = DRM_FORMAT_NV12; + break; case FOURCC_UYVY: f.pixel_format = DRM_FORMAT_UYVY; break; @@ -362,9 +410,6 @@ if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_SETPLANE, &s)) { DBG(("SET_PLANE failed: ret=%d\n", errno)); - memset(&s, 0, sizeof(s)); - s.plane_id = video->plane; - (void)drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_SETPLANE, &s); if (video->bo[pipe]) { kgem_bo_destroy(&sna->kgem, video->bo[pipe]); video->bo[pipe] = NULL; @@ -380,6 +425,15 @@ return true; } +static bool need_scaling(const struct sna_video_frame *frame, + const BoxRec *dst) +{ + /* SKL+ need the plane scaler even for unscaled NV12 */ + return frame->id == FOURCC_NV12 || + frame->src.x2 - frame->src.x1 != dst->x2 - dst->x1 || + frame->src.y2 - frame->src.y1 != dst->y2 - dst->y1; +} + static int sna_video_sprite_put_image(ddPutImage_ARGS) { struct sna_video *video = port->devPriv.ptr; @@ -417,14 +471,16 @@ for (i = 0; i < video->sna->mode.num_real_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; struct sna_video_frame frame; - BoxRec dst = draw_extents; - int pipe; + const int pipe = sna_crtc_pipe(crtc); + bool hw_scaling = has_hw_scaling(sna, video); INT32 x1, x2, y1, y2; - RegionRec reg; Rotation rotation; + RegionRec reg; + BoxRec dst; bool cache_bo; - pipe = sna_crtc_pipe(crtc); +retry: + dst = draw_extents; sna_video_frame_init(video, format->id, width, height, &frame); @@ -524,9 +580,8 @@ cache_bo = true; } - if (!has_hw_scaling(sna) && sna->render.video && - !((frame.src.x2 - frame.src.x1) == (dst.x2 - dst.x1) && - (frame.src.y2 - frame.src.y1) == (dst.y2 - dst.y1))) { + if (!hw_scaling && sna->render.video && + need_scaling(&frame, &dst)) { ScreenPtr screen = to_screen_from_sna(sna); PixmapPtr scaled; RegionRec r; @@ -587,8 +642,14 @@ else kgem_bo_destroy(&sna->kgem, frame.bo); - if (ret != Success) + if (ret != Success) { + /* retry with GPU scaling */ + if (hw_scaling) { + hw_scaling = false; + goto retry; + } goto err; + } } sna_video_fill_colorkey(video, &clip); @@ -609,7 +670,7 @@ { struct sna_video *video = port->devPriv.ptr; struct sna_video_frame frame; - int size; + int size, tmp; if (*w > video->sna->mode.max_crtc_width) *w = video->sna->mode.max_crtc_width; @@ -630,6 +691,21 @@ size = 4; break; + case FOURCC_NV12: + *h = (*h + 1) & ~1; + size = (*w + 3) & ~3; + if (pitches) + pitches[0] = size; + size *= *h; + if (offsets) + offsets[1] = size; + tmp = (*w + 3) & ~3; + if (pitches) + pitches[1] = tmp; + tmp *= (*h >> 1); + size += tmp; + break; + default: *w = (*w + 1) & ~1; *h = (*h + 1) & ~1; @@ -728,10 +804,17 @@ ARRAY_SIZE(formats)); adaptor->nAttributes = ARRAY_SIZE(attribs); adaptor->pAttributes = (XvAttributeRec *)attribs; - adaptor->pImages = (XvImageRec *)images; - adaptor->nImages = 3; - if (sna->kgem.gen == 071) - adaptor->nImages = 4; + + if (sna_has_sprite_format(sna, DRM_FORMAT_NV12)) { + adaptor->pImages = (XvImageRec *)images_nv12; + adaptor->nImages = ARRAY_SIZE(images_nv12); + } else if (sna_has_sprite_format(sna, DRM_FORMAT_RGB565)) { + adaptor->pImages = (XvImageRec *)images_rgb565; + adaptor->nImages = ARRAY_SIZE(images_rgb565); + } else { + adaptor->pImages = (XvImageRec *)images; + adaptor->nImages = ARRAY_SIZE(images); + } #if XORG_XV_VERSION < 2 adaptor->ddAllocatePort = sna_xv_alloc_port; @@ -767,6 +850,8 @@ video->alignment = 64; video->color_key = sna_video_sprite_color_key(sna); video->color_key_changed = ~0; + video->colorspace = 1; /* BT.709 */ + video->colorspace_changed = ~0; video->has_color_key = true; video->brightness = -19; /* (255/219) * -16 */ video->contrast = 75; /* 255/219 * 64 */ @@ -787,6 +872,7 @@ adaptor->base_id = adaptor->pPorts[0].id; xvColorKey = MAKE_ATOM("XV_COLORKEY"); + xvColorspace = MAKE_ATOM("XV_COLORSPACE"); xvAlwaysOnTop = MAKE_ATOM("XV_ALWAYS_ON_TOP"); xvSyncToVblank = MAKE_ATOM("XV_SYNC_TO_VBLANK"); diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_video_textured.c xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_video_textured.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/sna/sna_video_textured.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/sna/sna_video_textured.c 2018-09-06 12:00:04.000000000 +0000 @@ -36,7 +36,7 @@ #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, true) -static Atom xvBrightness, xvContrast, xvSyncToVblank; +static Atom xvBrightness, xvContrast, xvSyncToVblank, xvColorspace; static XvFormatRec Formats[] = { {15}, {16}, {24} @@ -44,6 +44,7 @@ static const XvAttributeRec Attributes[] = { {XvSettable | XvGettable, -1, 1, (char *)"XV_SYNC_TO_VBLANK"}, + {XvSettable | XvGettable, 0, 1, (char *)"XV_COLORSPACE"}, /* BT.601, BT.709 */ //{XvSettable | XvGettable, -128, 127, (char *)"XV_BRIGHTNESS"}, //{XvSettable | XvGettable, 0, 255, (char *)"XV_CONTRAST"}, }; @@ -102,6 +103,11 @@ return BadValue; video->SyncToVblank = value; + } else if (attribute == xvColorspace) { + if (value < 0 || value > 1) + return BadValue; + + video->colorspace = value; } else return BadMatch; @@ -119,6 +125,8 @@ *value = video->contrast; else if (attribute == xvSyncToVblank) *value = video->SyncToVblank; + else if (attribute == xvColorspace) + *value = video->colorspace; else return BadMatch; @@ -426,6 +434,7 @@ v->sna = sna; v->textured = true; v->alignment = 4; + v->colorspace = 1; /* BT.709 */ v->SyncToVblank = (sna->flags & SNA_NO_WAIT) == 0; RegionNull(&v->clip); @@ -446,6 +455,7 @@ xvBrightness = MAKE_ATOM("XV_BRIGHTNESS"); xvContrast = MAKE_ATOM("XV_CONTRAST"); + xvColorspace = MAKE_ATOM("XV_COLORSPACE"); xvSyncToVblank = MAKE_ATOM("XV_SYNC_TO_VBLANK"); DBG(("%s: '%s' initialized %d ports\n", __FUNCTION__, adaptor->name, adaptor->nPorts)); diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/uxa/i965_video.c xserver-xorg-video-intel-2.99.917+git20180925/src/uxa/i965_video.c --- xserver-xorg-video-intel-2.99.917+git20171229/src/uxa/i965_video.c 2018-01-11 07:52:21.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/uxa/i965_video.c 2018-09-06 12:00:04.000000000 +0000 @@ -101,7 +101,7 @@ #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" -#include "exa_wm_yuv_rgb.g4b" +#include "exa_wm_yuv_rgb_bt601.g4b" #include "exa_wm_write.g4b" }; @@ -109,7 +109,7 @@ #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_planar.g4b" -#include "exa_wm_yuv_rgb.g4b" +#include "exa_wm_yuv_rgb_bt601.g4b" #include "exa_wm_write.g4b" }; @@ -122,7 +122,7 @@ #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_affine.g4b.gen5" #include "exa_wm_src_sample_argb.g4b.gen5" -#include "exa_wm_yuv_rgb.g4b.gen5" +#include "exa_wm_yuv_rgb_bt601.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; @@ -130,7 +130,7 @@ #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_affine.g4b.gen5" #include "exa_wm_src_sample_planar.g4b.gen5" -#include "exa_wm_yuv_rgb.g4b.gen5" +#include "exa_wm_yuv_rgb_bt601.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; @@ -138,14 +138,14 @@ static const uint32_t ps_kernel_packed_static_gen6[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" -#include "exa_wm_yuv_rgb.g6b" +#include "exa_wm_yuv_rgb_bt601.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_planar_static_gen6[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_planar.g6b" -#include "exa_wm_yuv_rgb.g6b" +#include "exa_wm_yuv_rgb_bt601.g6b" #include "exa_wm_write.g6b" }; @@ -153,14 +153,14 @@ static const uint32_t ps_kernel_packed_static_gen7[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" -#include "exa_wm_yuv_rgb.g7b" +#include "exa_wm_yuv_rgb_bt601.g7b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_planar_static_gen7[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_planar.g7b" -#include "exa_wm_yuv_rgb.g7b" +#include "exa_wm_yuv_rgb_bt601.g7b" #include "exa_wm_write.g7b" }; diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/src/uxa/meson.build xserver-xorg-video-intel-2.99.917+git20180925/src/uxa/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/src/uxa/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/src/uxa/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,65 @@ +config.set('USE_UXA', 1) + +uxa_sources = [ + 'intel_batchbuffer.c', + 'intel_display.c', + 'intel_driver.c', + 'intel_memory.c', + 'intel_uxa.c', + 'intel_video.c', + 'intel_video_overlay.c', + 'intel_uxa_video.c', + 'i830_3d.c', + 'i830_render.c', + 'i915_3d.c', + 'i915_render.c', + 'i915_video.c', + 'i965_3d.c', + 'i965_video.c', + 'i965_render.c', + 'uxa.c', + 'uxa-accel.c', + 'uxa-glyphs.c', + 'uxa-render.c', + 'uxa-unaccel.c', +] + +uxa_deps = [ + dependency('xorg-server', version : '>= 1.6', required : true), + dependency('pixman-1', version : '>= 0.24.0', required : true), + dependency('libdrm', required : true), + dependency('libdrm_intel', version : '>= 2.4.52', required : true), + dependency('libudev', required : false), +] + +if with_dri2 + uxa_sources += 'intel_dri.c' + uxa_deps += dependency('dri2proto', version : '>= 2.6', required : true) +endif + +if with_dri3 + uxa_sources += [ + 'intel_dri3.c', + 'intel_sync.c', + ] +endif + +if has_present + uxa_sources += 'intel_present.c' +endif + +if with_xvmc + uxa_sources += 'intel_hwmc.c' +endif + +uxa = static_library('uxa', + sources : uxa_sources, + dependencies : uxa_deps, + include_directories : inc, + c_args : [ + '-Wno-deprecated-declarations', + '-Wno-shift-negative-value', + '-Wno-unused-parameter', + '-Wno-sign-compare', + ], + install : false) diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/tools/meson.build xserver-xorg-video-intel-2.99.917+git20180925/tools/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/tools/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/tools/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,98 @@ +if with_tools + executable('intel-virtual-output', + sources : 'virtual.c', + dependencies : [ + dependency('x11', required : true), + dependency('xext', required : true), + dependency('xfixes', required : true), + dependency('xrender', required : true), + dependency('xdamage', required : true), + dependency('xrandr', required : true), + dependency('xrender', required : true), + dependency('xcursor', required : true), + dependency('xscrnsaver', required : true), + dependency('xinerama', required : true), + dependency('xtst', required : true), + dependency('pixman-1', required : true), + ], + c_args : [ + '-Wno-unused-parameter', + '-Wno-sign-compare', + ], + install : true) + + configure_file(input : 'intel-virtual-output.man', + output : 'intel-virtual-output.4', + command : [ + 'sed', + '-e', + 's/__appmansuffix__/@0@/g'.format(man_config.get('appmansuffix')), + '-e', + 's/__filemansuffix__/@0@/g'.format(man_config.get('filemansuffix')), + '-e', + 's/__drivermansuffix__/@0@/g'.format(man_config.get('drivermansuffix')), + '-e', + 's/__miscmansuffix__/@0@/g'.format(man_config.get('miscmansuffix')), + '-e', + 's/__xservername__/@0@/g'.format(man_config.get('xservername')), + '-e', + 's/__xconfigfile__/@0@/g'.format(man_config.get('xconfigfile')), + '-e', + 's/__vendorversion__/@0@/g'.format(man_config.get('vendorversion')), + '@INPUT@' + ], + capture : true, + install_dir: join_paths(get_option('mandir'), 'man4'), + install : true) + + executable('cursor', + sources : 'cursor.c', + dependencies : [ + dependency('x11', required : true), + dependency('xfixes', required : true), + dependency('libpng', required : true), + ], + c_args : [ + '-Wno-unused-parameter', + ], + install : false) +endif + +if with_tools and with_dri3 + executable('dri3info', + sources : 'dri3info.c', + dependencies : [ + dependency('x11-xcb', required : true), + dependency('xcb-dri3', required : true), + dependency('x11', required : true), + dependency('xrandr', required : true), + dependency('xxf86vm', required : true), + dependency('dri3proto', required : true), + dependency('dri', required : true), + dependency('libdrm', required : true), + ], + install : false) +endif + +if with_backlight_helper + executable('xf86-video-intel-backlight-helper', + sources : 'backlight_helper.c', + install_dir : get_option('libexecdir'), + install_mode : [ 'rws--x--x', 'root', 'root' ], + c_args : [ + '-DMAJOR_IN_SYSMACROS', + '-Wno-sign-compare', + ], + install : true) + + polkit_config = configuration_data() + polkit_config.set('LIBEXEC_PATH', + join_paths(get_option('prefix'), + get_option('libexecdir'))) + + configure_file(input : 'org.x.xf86-video-intel.backlight-helper.policy.in', + output : 'org.x.xf86-video-intel.backlight-helper.policy', + configuration : polkit_config, + install_dir : join_paths(get_option('datadir'), 'polkit-1/actions'), + install : true) +endif diff -Nru xserver-xorg-video-intel-2.99.917+git20171229/xvmc/meson.build xserver-xorg-video-intel-2.99.917+git20180925/xvmc/meson.build --- xserver-xorg-video-intel-2.99.917+git20171229/xvmc/meson.build 1970-01-01 00:00:00.000000000 +0000 +++ xserver-xorg-video-intel-2.99.917+git20180925/xvmc/meson.build 2018-09-06 12:00:04.000000000 +0000 @@ -0,0 +1,31 @@ +xvmc_sources = [ + 'intel_xvmc.c', + 'intel_xvmc_dump.c', + 'i915_xvmc.c', + 'i965_xvmc.c', + 'xvmc_vld.c', + 'intel_batchbuffer.c', +] + +shared_library('IntelXvMC', + soversion : '1', + version : '1.0.0', + sources : xvmc_sources, + dependencies : [ + dependency('threads', required : true), + dependency('x11', required : true), + dependency('xvmc', required : true), + dependency('xorg-server', required : true), + dependency('x11-xcb', required : true), + dependency('xcb-aux', required : true), + dependency('xcb-dri2', required : true), + dependency('libdrm_intel', required : true), + ], + c_args : [ + '-DFALSE=0', '-DTRUE=1', + '-Wno-unused-but-set-variable', + '-Wno-unused-parameter', + '-Wno-sign-compare', + '-Wno-pointer-sign', + ], + install : true)