--- gcc-4.8-4.8.5.orig/debian/FAQ.gcj +++ gcc-4.8-4.8.5/debian/FAQ.gcj @@ -0,0 +1,494 @@ +The GCJ FAQ +=========== + + The latest version of this document is always available at + http://gcc.gnu.org/java/faq.html. + + General Questions + + What license is used for libgcj? + How can I report a bug in libgcj? + How can I contribute to libgcj + Is libgcj part of GCC? + Will gcj and libgcj work on my machine? + How can I debug my Java program? + Can I interface byte-compiled and native java code? + + + Java Feature Support + + What Java API's are supported? How complete is + the support? + Does GCJ support using straight C native methods + ala JNI? + Why does GCJ use CNI? + What is the state of AWT support? + How about support for Swing ? + What support is there for RMI ? + Can I use any code from other OpenSource projects + to supplement libgcj's current features ? + What features of the Java language are/arn't supported + + + Build Issues + + I need something more recent than the last release; how + should I build it? + Linker bug on Solaris + Can I configure/build in the source tree? + My libgcj build fails with "invalid use of undefined type + struct sigcontext_struct" + + + Gcj Compile/Link Questions + + Why do I get undefined reference to `main' errors? + Can GCJ only handle source code? + "gcj -C" Doesn't seem to work like javac/jikes. Whats going on? + Where does GCJ look for files? + How does gcj resolve wether to compile .class or .java files? + I'm getting link errors! + I'm getting 'undefined symbol: __dso_handle' + + + Runtime Questions + + My program is dumping core! What's going on? + When I run the debugger I get a SEGV in the GC! What's going on? + I have just compiled and benchmarked my Java application + and it seems to be running slower than than XXX JIT JVM. Is there + anything I can do to make it go faster? + Can I profile Garbage Collection? + How do I increase the runtime's initial and maximum heap sizes? + How can I profile my application? + My program seems to hang and doesn't produce any output + + + Programming Issues + + Are there any examples of how to use CNI? + Is it possible to invoke GCJ compiled Java code from a + C++ application? + +General Questions +================= + + 1.1 What license is used for libgcj? + + libgcj is distributed under the GPL, with the 'libgcc exception'. + This means that linking with libgcj does not by itself cause + your program to fall under the GPL. See LIBGCJ_LICENSE in + the source tree for more details. + + 1.2 How can I report a bug in libgcj? + + libgcj has a corresponding Gnats bug database which you can + browse. You can also submit new bug reports from the Gnats + page. + + 1.3 How can I contribute to libgcj? + + You can send simple bug fixes in as patches. Please follow + the GCC guidelines for submitting patches. For more complex + changes, you must sign copyright over to the Free Software + Foundation. See the contribution page for details. + + 1.4 Is libgcj part of GCC? + + Yes, libgcj is now part of GCC. It can be downloaded, + configured and built as one single tree. + + 1.5 Will gcj and libgcj work on my machine? + + Gcj and libgcj are known to work more or less with IA-32 and + Sparc Solaris, Tru64 Unix, as well as IA-32, IA-64, Alpha, + and PowerPC Linux. They might work on other + systems. Generally speaking, porting to a new system should + not be hard. This would be a good way to volunteer. + + 1.6 How can I debug my Java program? + + gdb 5.0 includes support for debugging gcj-compiled Java + programs. For more information please read Java Debugging + with gdb. + + 1.7 Can I interface byte-compiled and native java code + + libgcj has a bytecode interpreter that allows you to mix + .class files with compiled code. It works pretty + transparently: if a compiled version of a class is not found + in the application binary or linked shared libraries, the + class loader will search for a bytecode version in your + classpath, much like a VM would. Be sure to build libgcj + with the --enable-interpreter option to enable this + functionality. + + The program "gij" provides a front end to the interpreter + that behaves much like a traditional virtual machine. You + can even use "gij" to run a shared library which is compiled + from java code and contains a main method: + + $ gcj -shared -o lib-HelloWorld.so HelloWorld.java + $ gij HelloWorld + + This works because gij uses Class.forName, which knows how + to load shared objects. + +Java Feature Support +==================== + + 2.1 What Java API's are supported? How complete is + the support? + + Matt Welsh writes: + + Just look in the 'libjava' directory of libgcj and see + what classes are there. Most GUI stuff isn't there yet, + that's true, but many of the other classes are easy to add + if they don't yet exist. + + I think it's important to stress that there is a big + difference between Java and the many libraries which Java + supports. Unfortunately, Sun's promise of "write once, run + everywhere" assumes much more than a JVM: you also need + the full set of JDK libraries. Considering that new Java + APIs come out every week, it's going to be impossible to + track everything. + + To make things worse, you can't simply run Sun's JDK + classes on any old JVM -- they assume that a bunch of + native methods are also defined. Since this native method + requirement isn't defined by the JDK specs, you're + effectively constrained to using Sun's JVMs if you want to + use Sun's JDK libraries. Oh yes -- you could also + reimplement all of those native methods yourself, and make + sure they behave exactly as Sun's do. Note that they're + undocumented! + + 2.2 Does GCJ support using straight C native methods + ala JNI? + + Yes. libgcj now has experimental support for JNI, in + addition to its native Compiled Native Interface (CNI). gcjh + will generate JNI stubs and headers using the "-jni" + option. However, we do prefer CNI: it is more efficient, + easier to write, and (at least potentially) easier to debug. + + 2.3 Why does GCJ use CNI? + + Per Bothner explains: + + We use CNI because we think it is a better solution, + especially for a Java implementation that is based on the + idea that Java is just another programming language that + can be implemented using standard compilation + techniques. Given that, and the idea that languages + implemented using Gcc should be compatible where it makes + sense, it follows that the Java calling convention should + be as similar as practical to that used for other + languages, especially C++, since we can think of Java as a + subset of C++. CNI is just a set of helper functions and + conventions built on the idea that C++ and Java have the + *same* calling convention and object layout; they are + binary compatible. (This is a simplification, but close + enough.) + + 2.4 What is the state of AWT support? + + Work is in progress to implement AWT and Java2D. We intend + to support both GTK and xlib peers written using CNI. Some + components are already working atop the xlib peers. + + 2.5 How about support for Swing? + + Once AWT support is working then Swing support can be + considered. There is at least one free-software partial + implementations of Swing that may be usable. + + 2.6 What support is there for RMI? + + RMI code exists on the CVS trunk (aka gcc 3.1), but it has + not been heavily tested. This code was donated by + Transvirtual Technologies. + + 2.7 Can I use any code from other OpenSource + projects to supplement libgcj's current features? + + Certainly. However, in many cases, if you wanted to + contribute the code back into the official libgcj + distribution, we would require that the original author(s) + assign copyright to the Free Software Foundation. As of + March 6, 2000, libgcj has been relicenced, and copyright + has been assigned to the FSF. This allows us to share and + merge much of the libgcj codebase with the Classpath + project. Our eventual goal is for Classpath to be an + upstream source provider for libgcj, however it will be + some time before this becomes reality: libgcj and Classpath + have different implementations of many core java + classes. In order to merge them, we need to select the best + (most efficient, cleanest) implementation of each + method/class/package, resolve any conflicts created by the + merge, and test the final result. Needless to say, this is + a lot of work. If you can help out, please let us know! + + 2.8 What features of the Java language are/aren't supported. + + GCJ supports all Java language constructs as per the Java + language Specification. Recent GCJ snapshots have added + support for most JDK1.1 (and beyond) language features, + including inner classes. + +Build Issues +============ + + 3.1 I need something more recent than the last release. + How should I build it? + + Please read here: http://gcc.gnu.org/java/build-snapshot.html + + 3.2 Linker bug on Solaris + + There is a known problem with the native Solaris linker when + using gcc/gcj. A good indication you've run into this + problem is if you get an error that looks like the following + when building libgcj: + +ld: warning: option -o appears more than once, first setting taken +ld: fatal: file libfoo.so: cannot open file: No such file or directory +ld: fatal: File processing errors. No output written to .libs/libfoo.so +collect2: ld returned 1 exit status + + A known workaround for this and other reported link problems + on the various releases of Solaris is to build gcc/gcj with + the latest GNU binutils instead of the native Solaris + ld. The most straightforward way to do this is to build and + install binutils, and then reference it in the configure for + gcc via --with-ld=/path_to_binutils_install/bin/ld + (--with-as may also be similarly specified but is not + believed to be required). + + Please note, gcc/gcj must be built using GNU ld prior to + doing a clean build of libgcj! + + 3.3 Can I configure/build in the source tree? + + No. You cannot configure/build in the source tree. If you + try, you'll see something like: + + $ ./configure [...] + Configuring for a i686-pc-linux-gnu host. + *** Cannot currently configure in source tree. + + Instead, you must build in another directory. E.g.: + + $ mkdir build + $ cd build + $ ../configure [...] + + 3.4 My libgcj build fails with "invalid use of undefined type + struct sigcontext_struct" + + If you're using Linux, this probably means you need to + upgrade to a newwer, glibc (libc6) based Linux + distribution. libgcj does not support the older linux libc5. + It might be possible to get a working libgcj by changing + occurances of "sigcontext_struct" to "sigcontext", however + this has not been tested. Even if it works, it is likely + that there are other issues with older libc versions that + would prevent libgcj from working correctly (threads bugs, + for example). + +Gcj Compile/Link Questions +========================== + + 4.1 Why do I get undefined reference to `main' errors? + + When using gcj to link a Java program, you must use the --main= + option to indicate the class that has the desired main method. + This is because every Java class can have a main method, thus + you have to tell gcj which one to use. + + 4.2 Can GCJ only handle source code? + + GCJ will compile both source (.java) and bytecode (.class) + files. However, in many cases the native code produced by + compiling from source is better optimized than that compiled + from .class files. + + Per Bothner explains: + + The reason is that when you compile to bytecode you lose a + lot of information about program structure etc. That + information helps in generating better code. We can in + theory recover the information we need by analysing the + structure of the bytecodes, but it is sometimes difficult + - or sometimes it just that no-one has gotten around to + it. Specific examples include loop structure (gcc + generates better code with explicit loops rather than with + the equivalent spaghetti code), array initializers, and + the JDK 1.1 `CLASS.class' syntax, all of which are + represented using more low-level constructs in bytecode. + + 4.3 "gcj -C" Doesn't seem to work like javac/jikes. Whats going on? + + The behavior of "gcj -C" is not at all like javac or jikes, + which will compile (not just scan) all .java's which are out + of date with regard to their .class's. + + 4.4 Where does GCJ look for files? + + GCJ looks for classes to compile based on the CLASSPATH + environment variable. libgcj.jar and other files are found + relative to the path of the compiler itself, so it is safe + to move the entire compiler tree to a different path, and + there is no need to include libgcj.jar in your CLASSPATH. + + 4.5 How does gcj resolve whether to compile .class or .java files? + + GCJ compiles only the files presented to it on the command + line. However, it also needs to scan other files in order to + determine the layout of other classes and check for errors + in your code. For these dependencies, GCJ will favour + .class files if they are available because it is faster to + parse a class file than source code. + + 4.6 I'm getting link errors + + If you get errors at link time that refer to 'undefined + reference to `java::lang::Object type_info function', verify + that you have compiled any CNI C++ files with the -fno-rtti + option. This is only required for versions of GCJ earlier + than 3.0. + + 4.7 I'm getting 'undefined symbol: __dso_handle' + + Some versions of the GNU linker have broken support for the + '.hidden' directive, which results in problems with shared + libraries built with recent versions of gcc. + + There are three solutions: + + - downgrade to binutils that don't support .hidden at all, + - upgrade to a recent binutils, or + - undef the HAVE_GAS_HIDDEN definition in gcc's auto-host.h + (and rebuild gcc). + +Runtime Questions +================= + + 5.1 My program is dumping core! What's going on? + + It could be any number of things. One common mistake is + having your CLASSPATH environment variable pointing at a + third party's java.lang and friends. Either unset CLASSPATH, + or make sure it does not refer to core libraries other than + those found in libgcj.jar.Note that newwer versions of GCJ + will reject the core class library if it wasn't generated by + GCJ itself. + + 5.2 When I run the debugger I get a SEGV in the GC! What's going on? + + This is "normal"; the Garbage Collector (GC) uses it to + determine stack boundaries. It is ordinarily caught and + handled by the GC -- you can see this in the debugger by + using cont to continue to the "real" segv. + + 5.3 I have just compiled and benchmarked my Java application + and it seems to be running slower than than XXX JIT JVM. Is there + anything I can do to make it go faster? + + A few things: + + - If your programs allocate many small, short lived objects, + the heap could be filling and triggering GC too + regularly. Try increasing the initial and maximum heap sizes + as per 5.5 How do I increase the runtime's initial and + maximum heap size? + - RE - array accesses. We have sub-optimal runtime checking + code, and the compiler is still not so smart about + automatically removing array checks. If your code is ready, + and it doesn't rely on them, try compiling with + --no-bounds-check. + - Try static linking. On many platforms, dynamic (PIC) + function calls are more expensive than static ones. In + particular, the interaction with boehm-gc seems to incur + extra overhead when shared libraries are used. + - If your Java application doesn't need threads, try + building libgcj using --enable-threads=none. Portions of the + libgcj runtime are still more efficient when + single-threaded. + + 5.4 Can I profile Garbage Collection? + + It is possible to turn on verbose GC output by supressing + the -DSILENT flag during build. One way to do this is to + comment out the line with #define SILENT 1 from + boehm-gc/configure before configuring libgcj. The GC will + print collection statistics to stdout. (Rebuilding boehm-gc + alone without this flag doesn't seem to work.) + + 5.5 How do I increase the runtime's initial and maximum heap sizes? + + Some programs that allocate many small, short-lived objects + can cause the default-sized heap to fill quickly and GC + often. With the 2.95.1 release there is no means to adjust + the heap at runtime. Recent snapshots provide the -ms and + -mx arguments to gij to specify the initial and maximum heap + sizes, respectively. + + 5.6 How can I profile my application? + + Currently, only single threaded Java code may be used by the + profiler (gprof). POSIX threads seem to be incompatible with + the gmon stuff. A couple of other tools that have been + mentioned on the GCJ mailing list are sprof and cprof. The + former is part of GNU libc. + + 5.7 My program seems to hang and doesn't produce any output + + Some versions had a bug in the iconv support. You can work + around it by setting LANG=en_US.UTF-8 at runtime, or give + the following option during compile time + -Dfile.encoding=UTF-8. This problem should no longer occur + as of November 1, 2000. + +Programming Issues +================== + + 6.1 Are there any examples of how to use CNI? + + Glenn Chambers has created a couple of trivial examples for + version 2.95 and version 3.0. As a comparison, here is the + same example as a JNI application using Kaffe. The same + code will work with GCJ, as shown here. + + Note that for version 2.95, you must compile the C++ files + used for CNI with the -fno-rtti option. This constraint + does not apply in version 3.0 and later. + + The primary source of documentation for CNI is at + http://gcc.gnu.org/java/papers/cni/t1.html + + 6.2 Is it possible to invoke GCJ compiled Java code from a + C++ application? + + Yes, GCJ 3.1 supports a CNI-based invocation interface as + well as the traditional JNI invocation API. See the GCJ + Manual for more details on how to use the CNI interface. + +Please send FSF & GNU inquiries & questions tognu@gnu.org.There are +also other waysto contact the FSF. + +These pages are maintained by The GCC team. + +Please send comments on these web pages and GCC to our publicmailing +list at gcc@gnu.org orgcc@gcc.gnu.org, send other questions to +gnu@gnu.org. + +Copyright (C) Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111, USA. + +Verbatim copying and distribution of this entire article is permitted +in any medium, provided this notice is preserved. + +Last modified 2003-04-30 --- gcc-4.8-4.8.5.orig/debian/NEWS.gcc +++ gcc-4.8-4.8.5/debian/NEWS.gcc @@ -0,0 +1,751 @@ +GCC 4.8 Release Series -- Changes, New Features, and Fixes +========================================================== + + +Caveats +======= + +GCC now uses C++ as its implementation language. This means that to build GCC +from sources, you will need a C++ compiler that understands C++ 2003. For more +details on the rationale and specific changes, please refer to the C++ +conversion page. + +To enable the Graphite framework for loop optimizations you now need CLooG +version 0.18.0 and ISL version 0.11.1. Both can be obtained from the GCC +infrastructure directory. The installation manual contains more information +about requirements to build GCC. + +GCC now uses a more aggressive analysis to derive an upper bound for the +number of iterations of loops using constraints imposed by language standards. +This may cause non-conforming programs to no longer work as expected, such as +SPEC CPU 2006 464.h264ref and 416.gamess. A new option, -fno-aggressive-loop- +optimizations, was added to disable this aggressive analysis. In some loops +that have known constant number of iterations, but undefined behavior is known +to occur in the loop before reaching or during the last iteration, GCC will +warn about the undefined behavior in the loop instead of deriving lower upper +bound of the number of iterations for the loop. The warning can be disabled +with -Wno-aggressive-loop-optimizations. + +On ARM, a bug has been fixed in GCC's implementation of the AAPCS rules for +the layout of vectors that could lead to wrong code being generated. Vectors +larger than 8 bytes in size are now by default aligned to an 8-byte boundary. +This is an ABI change: code that makes explicit use of vector types may be +incompatible with binary objects built with older versions of GCC. Auto- +vectorized code is not affected by this change. + +On AVR, support has been removed for the command-line option -mshort-calls +deprecated in GCC 4.7. + +On AVR, the configure option --with-avrlibc supported since GCC 4.7.2 is +turned on per default for all non-RTEMS configurations. This option arranges +for a better integration of AVR_Libc with avr-gcc. For technical details, see +PR54461. To turn off the option in non-RTEMS configurations, use --with- +avrlibc=no. If the compiler is configured for RTEMS, the option is always +turned off. + +More information on porting to GCC 4.8 from previous versions of GCC can be +found in the porting guide (http://gcc.gnu.org/gcc-4.8/porting_to.html) for +this release. + +General Optimizer Improvements (and Changes) +============================================ + + - DWARF4 is now the default when generating DWARF debug information. When -g + is used on a platform that uses DWARF debugging information, GCC will now + default to -gdwarf-4 -fno-debug-types-section. + GDB 7.5, Valgrind 3.8.0 and elfutils 0.154 debug information consumers + support DWARF4 by default. Before GCC 4.8 the default version used was + DWARF2. To make GCC 4.8 generate an older DWARF version use -g together with + -gdwarf-2 or -gdwarf-3. The default for Darwin and VxWorks is still + -gdwarf-2 -gstrict-dwarf. + + - A new general optimization level, -Og, has been introduced. It addresses the + need for fast compilation and a superior debugging experience while + providing a reasonable level of runtime performance. Overall experience for + development should be better than the default optimization level -O0. + + - A new option -ftree-partial-pre was added to control the partial redundancy + elimination (PRE) optimization. This option is enabled by default at the -O3 + optimization level, and it makes PRE more aggressive. + + - The option -fconserve-space has been removed; it was no longer useful on + most targets since GCC supports putting variables into BSS without making + them common. + + - The struct reorg and matrix reorg optimizations (command-line-options + -fipa-struct-reorg and -fipa-matrix-reorg) have been -removed. They did not + always work correctly, nor did they work -with link-time optimization (LTO), + hence were only applicable to -programs consisting of a single translation + unit. + + - Several scalability bottle-necks have been removed from GCC's optimization + passes. Compilation of extremely large functions, e.g. due to the use of the + flatten attribute in the "Eigen" C++ linear algebra templates library, is + significantly faster than previous releases of GCC. + + - Link-time optimization (LTO) improvements: + + - LTO partitioning has been rewritten for better reliability and + maintanibility. Several important bugs leading to link failures have been + fixed. + + - Interprocedural optimization improvements: + + - A new symbol table has been implemented. It builds on existing callgraph + and varpool modules and provide a new API. Unusual symbol visibilities and + aliases are handled more consistently leading to, for example, more + aggressive unreachable code removal with LTO. + + - The inline heuristic can now bypass limits on the size of of inlined + functions when the inlining is particularly profitable. This happens, for + example, when loop bounds or array strides get propagated. + + - Values passed through aggregates (either by value or reference) are now + propagated at the inter-procedural level leading to better inlining + decisions (for example in the case of Fortran array descriptors) and + devirtualization. + + - AddressSanitizer, a fast memory error detector, has been added and can be + enabled via -fsanitize=address. Memory access instructions will be + instrumented to detect heap-, stack-, and global-buffer overflow as well as + use-after-free bugs. To get nicer stacktraces, use -fno-omit-frame-pointer. + The AddressSanitizer is available on IA-32/x86-64/x32/PowerPC/PowerPC64 GNU/ + Linux and on x86-64 Darwin. + + - ThreadSanitizer has been added and can be enabled via -fsanitize=thread. + Instructions will be instrumented to detect data races. The ThreadSanitizer + is available on x86-64 GNU/Linux. + + +New Languages and Language specific improvements +================================================ + + +C family +-------- + + - Each diagnostic emitted now includes the original source line and a caret + '^' indicating the column. The option -fno-diagnostics-show-caret suppresses + this information. + + - The option -ftrack-macro-expansion=2 is now enabled by default. This allows + the compiler to display the macro expansion stack in diagnostics. Combined + with the caret information, an example diagnostic showing these two features + is: + + t.c:1:94: error: invalid operands to binary < (have ‘struct mystruct’ and ‘float’) + #define MYMAX(A,B) __extension__ ({ __typeof__(A) __a = (A); + __typeof__(B) __b = (B); + __a < __b ? __b : __a; }) + ^ + t.c:7:7: note: in expansion of macro 'MYMAX' + X = MYMAX(P, F); + ^ + + - A new -Wsizeof-pointer-memaccess warning has been added (also enabled by + -Wall) to warn about suspicious length parameters to certain string and + memory built-in functions if the argument uses sizeof. This warning warns + e.g. about memset (ptr, 0, sizeof (ptr)); if ptr is not an array, but a + pointer, and suggests a possible fix, or about + memcpy (&foo, ptr, sizeof (&foo));. + + - The new option -Wpedantic is an alias for -pedantic, which is now + deprecated. The forms -Wno-pedantic, -Werror=pedantic, and -Wno- + error=pedantic work in the same way as for any other -W option. One caveat + is that -Werror=pedantic is not equivalent to -pedantic-errors, since the + latter makes into errors some warnings that are not controlled by + -Wpedantic, and the former only affects diagnostics that are disabled when + using -Wno-pedantic. + + - The option -Wshadow no longer warns if a declaration shadows a function + declaration, unless the former declares a function or pointer to function, + because this is a_common_and_valid_case_in_real-world_code. + + +C++ +--- + + - G++ now implements the C++11 thread_local keyword; this differs from the GNU + __thread keyword primarily in that it allows dynamic initialization and + destruction semantics. Unfortunately, this support requires a run-time + penalty for references to non-function-local thread_local variables defined + in a different translation unit even if they don't need dynamic + initialization, so users may want to continue to use __thread for TLS + variables with static initialization semantics. + + If the programmer can be sure that no use of the variable in a non-defining + TU needs to trigger dynamic initialization (either because the variable is + statically initialized, or a use of the variable in the defining TU will be + executed before any uses in another TU), they can avoid this overhead with + the -fno-extern-tls-init option. + + OpenMP threadprivate variables now also support dynamic initialization and + destruction by the same mechanism. + + - G++ now implements the C++11 attribute syntax, e.g. + + [[noreturn]] void f(); + + and also the alignment specifier, e.g. + + alignas(double) int i; + + - G++ now implements C++11 inheriting constructors, e.g. + + struct A { A(int); }; + struct B: A { using A::A; }; // defines B::B(int) + B b(42); // OK + + - As of GCC 4.8.1, G++ implements the change to decltype semantics from N3276. + + struct A f(); + decltype(f()) g(); // OK, return type of f() is not required + to be complete. + + - G++ now supports a -std=c++1y option for experimentation with features + proposed for the next revision of the standard, expected around 2017. + Currently the only difference from -std=c++11 is support for return type + deduction in normal functions, as proposed in N3386. + + - The G++ namespace association extension, __attribute ((strong)), has been + deprecated. Inline namespaces should be used instead. + + - G++ now supports a -fext-numeric-literal option to control whether GNU + numeric literal suffixes are accepted as extensions or processed as C++11 + user-defined numeric literal suffixes. The flag is on (use suffixes for GNU + literals) by default for -std=gnu++*, and -std=c++98. The flag is off (use + suffixes for user-defined literals) by default for -std=c++11 and later. + + +Runtime Library (libstdc++) +--------------------------- + + - Improved_experimental_support_for_the_new_ISO_C++_standard,_C++11, + including: + + - forward_list meets the allocator-aware container requirements; + + - this_thread::sleep_for(), this_thread::sleep_until() and this_thread:: + yield() are defined without requiring the configure option + --enable-libstdcxx-time; + + - Improvements to : + + - SSE optimized normal_distribution. + + - Use of hardware RNG instruction for random_device on new x86 processors + (requires the assembler to support the instruction.) + + and : + + - New random number engine simd_fast_mersenne_twister_engine with an + optimized SSE implementation. + + - New random number distributions beta_distribution, normal_mv_distribution, + rice_distribution, nakagami_distribution, pareto_distribution, + k_distribution, arcsine_distribution, hoyt_distribution. + + - Added --disable-libstdcxx-verbose configure option to disable diagnostic + messages issued when a process terminates abnormally. This may be useful for + embedded systems to reduce the size of executables that link statically to + the library. + + +Fortran +------- + + - Compatibility notice: + + - Module files: The version of module files (.mod) has been incremented. + Fortran MODULEs compiled by earlier GCC versions have to be recompiled, + when they are USEd by files compiled with GCC 4.8. GCC 4.8 is not able to + read .mod files created by earlier versions; attempting to do so gives an + error message. + Note: The ABI of the produced assembler data itself has not changed; + object files and libraries are fully compatible with older versions except + as noted below. + + - ABI: Some internal names (used in the assembler/object file) have changed + for symbols declared in the specification part of a module. If an affected + module - or a file using it via use association - is recompiled, the + module and all files which directly use such symbols have to be recompiled + as well. This change only affects the following kind of module symbols: + + - Procedure pointers. Note: C-interoperable function pointers (type + (c_funptr)) are not affected nor are procedure-pointer components. + - Deferred-length character strings. + + - The BACKTRACE intrinsic subroutine has been added. It shows a backtrace at + an arbitrary place in user code; program execution continues normally + afterwards. + + - The -Wc-binding-type warning option has been added (disabled by default). It + warns if the a variable might not be C interoperable; in particular, if the + variable has been declared using an intrinsic type with default kind instead + of using a kind parameter defined for C interoperability in the intrinsic + ISO_C_Binding module. Before, this warning was always printed. The + -Wc-binding-type option is enabled by -Wall. + + - The -Wrealloc-lhs and -Wrealloc-lhs-all warning command-line options have + been added, which diagnose when code to is inserted for automatic + (re)allocation of a variable during assignment. This option can be used to + decide whether it is safe to use -fno-realloc-lhs. Additionally, it can be + used to find automatic (re)allocation in hot loops. (For arrays, replacing + var= by var(:)= disables the automatic reallocation.) + + - The -Wcompare-reals command-line option has been added. When this is set, + warnings are issued when comparing REAL or COMPLEX types for equality and + inequality; consider replacing a == b by abs(a-b) < eps with a suitable eps. + -Wcompare-reals is enabled by -Wextra. + + - The -Wtarget-lifetime command-line option has been added (enabled with + -Wall), which warns if the pointer in a pointer assignment might outlive its + target. + + - Reading floating point numbers which use q for the exponential (such as + 4.0q0) is now supported as vendor extension for better compatibility with + old data files. It is strongly recommended to use for I/O the equivalent but + standard conforming e (such as 4.0e0). + (For Fortran source code, consider replacing the q in floating-point + literals by a kind parameter (e.g. 4.0e0_qp with a suitable qp). Note that - + in Fortran source code - replacing q by a simple e is not equivalent.) + + - The GFORTRAN_TMPDIR environment variable for specifying a non-default + directory for files opened with STATUS="SCRATCH", is not used anymore. + Instead gfortran checks the POSIX/GNU standard TMPDIR environment variable. + If TMPDIR is not defined, gfortran falls back to other methods to determine + the directory for temporary files as documented in the user_manual. + + - Fortran_2003: + + - Support for unlimited polymorphic variables (CLASS(*)) has been added. + Nonconstant character lengths are not yet supported. + + - TS_29113: + + - Assumed types (TYPE(*)) are now supported. + + - Experimental support for assumed-rank arrays (dimension(..)) has been + added. Note that currently gfortran's own array descriptor is used, which + is different from the one defined in TS29113, see gfortran's_header_file + or use the Chasm_Language_Interoperability_Tools. + + +Go +-- + + - GCC 4.8.0 implements a preliminary version of the upcoming Go 1.1 release. + The library support is not quite complete, due to release timing. + + - Go has been tested on GNU/Linux and Solaris platforms for various processors + including x86, x86_64, PowerPC, SPARC, and Alpha. It may work on other + platforms as well. + + +New Targets and Target Specific Improvements +============================================ + + +AArch64 +------- + + - A new port has been added to support AArch64, the new 64-bit architecture + from ARM. Note that this is a separate port from the existing 32-bit ARM + port. + - The port provides initial support for the Cortex-A53 and the Cortex-A57 + processors with the command line options -mcpu=cortex-a53 and + -mcpu=cortex-a57. + + +ARM +--- + + - Initial support has been added for the AArch32 extensions defined in the + ARMv8 architecture. + + - Code generation improvements for the Cortex-A7 and Cortex-A15 CPUs. + + - A new option, -mcpu=marvell-pj4, has been added to generate code for the + Marvell PJ4 processor. + + - The compiler can now automatically generate the VFMA, VFMS, REVSH and REV16 + instructions. + + - A new vectorizer cost model for Advanced SIMD configurations to improve the + auto-vectorization strategies used. + + - The scheduler now takes into account the number of live registers to reduce + the amount of spilling that can occur. This should improve code performance + in large functions. The limit can be removed by using the option -fno-sched- + pressure. + + - Improvements have been made to the Marvell iWMMX code generation and support + for the iWMMX2 SIMD unit has been added. The option -mcpu=iwmmxt2 can be + used to enable code generation for the latter. + + - A number of code generation improvements for Thumb2 to reduce code size when + compiling for the M-profile processors. + + - The RTEMS (arm-rtems) port has been updated to use the EABI. + + - Code generation support for the old FPA and Maverick floating-point + architectures has been removed. Ports that previously relied on these + features have also been removed. This includes the targets: + + - arm*-*-linux-gnu (use arm*-*-linux-gnueabi) + - arm*-*-elf (use arm*-*-eabi) + - arm*-*-uclinux* (use arm*-*-uclinux*eabi) + - arm*-*-ecos-elf (no alternative) + - arm*-*-freebsd (no alternative) + - arm*-wince-pe* (no alternative). + + +AVR +--- + + - Support for the "Embedded C" fixed-point has been added. For details, see + the GCC_wiki and the user_manual. The support is not complete. + - A new print modifier %r for register operands in inline assembler is + supported. It will print the raw register number without the register prefix + 'r': + + /* Return the most significant byte of 'val', a 64-bit value. */ + + unsigned char msb (long long val) + { + unsigned char c; + __asm__ ("mov %0, %r1+7" : "=r" (c) : "r" (val)); + return c; + } + + The inline assembler in this example will generate code like + + mov r24, 8+7 + + provided c is allocated to R24 and val is allocated to R8...R15. This works + because the GNU assembler accepts plain register numbers without register + prefix. + + - Static initializers with 3-byte symbols are supported now: + + extern const __memx char foo; + const __memx void *pfoo = &foo; + + This requires at least Binutils 2.23. + + +IA-32/x86-64 +------------ + + - Allow -mpreferred-stack-boundary=3 for the x86-64 architecture with SSE + extensions disabled. Since the x86-64 ABI requires 16 byte stack alignment, + this is ABI incompatible and intended to be used in controlled environments + where stack space is an important limitation. This option will lead to wrong + code when functions compiled with 16 byte stack alignment (such as functions + from a standard library) are called with misaligned stack. In this case, SSE + instructions may lead to misaligned memory access traps. In addition, + variable arguments will be handled incorrectly for 16 byte aligned objects + (including x87 long double and __int128), leading to wrong results. You must + build all modules with -mpreferred-stack-boundary=3, including any + libraries. This includes the system libraries and startup modules. + + - Support for the new Intel processor codename Broadwell with RDSEED, ADCX, + ADOX, PREFETCHW is available through -madx, -mprfchw, -mrdseed command-line + options. + + - Support for the Intel RTM and HLE intrinsics, built-in functions and code + generation is available via -mrtm and -mhle. + + - Support for the Intel FXSR, XSAVE and XSAVEOPT instruction sets. Intrinsics + and built-in functions are available via -mfxsr, -mxsave and -mxsaveopt + respectively. + + - New -maddress-mode=[short|long] options for x32. -maddress-mode=short + overrides default 64-bit addresses to 32-bit by emitting the 0x67 address- + size override prefix. This is the default address mode for x32. + + - New built-in functions to detect run-time CPU type and ISA: + + - A built-in function __builtin_cpu_is has been added to detect if the run- + time CPU is of a particular type. It returns a positive integer on a match + and zero otherwise. It accepts one string literal argument, the CPU name. + For example, __builtin_cpu_is("westmere") returns a positive integer if + the run-time CPU is an Intel Core i7 Westmere processor. Please refer to + the user_manual for the list of valid CPU names recognized. + + - A built-in function __builtin_cpu_supports has been added to detect if the + run-time CPU supports a particular ISA feature. It returns a positive + integer on a match and zero otherwise. It accepts one string literal + argument, the ISA feature. For example, __builtin_cpu_supports("ssse3") + returns a positive integer if the run-time CPU supports SSSE3 + instructions. Please refer to the user_manual for the list of valid ISA + names recognized. + + Caveat: If these built-in functions are called before any static + constructors are invoked, like during IFUNC initialization, then the CPU + detection initialization must be explicitly run using this newly provided + built-in function, __builtin_cpu_init. The initialization needs to be done + only once. For example, this is how the invocation would look like inside an + IFUNC initializer: + + static void (*some_ifunc_resolver(void))(void) + { + __builtin_cpu_init(); + if (__builtin_cpu_is("amdfam10h") ... + if (__builtin_cpu_supports("popcnt") ... + } + + - Function Multiversioning Support with G++: + It is now possible to create multiple function versions each targeting a + specific processor and/or ISA. Function versions have the same signature but + different target attributes. For example, here is a program with function + versions: + + __attribute__ ((target ("default"))) + int foo(void) + { + return 1; + } + + __attribute__ ((target ("sse4.2"))) + int foo(void) + { + return 2; + } + + int main (void) + { + int (*p) = &foo; + assert ((*p)() == foo()); + return 0; + } + + Please refer to this wiki for more information. + + - The x86 backend has been improved to allow option -fschedule-insns to work + reliably. This option can be used to schedule instructions better and leads + to improved performace in certain cases. + + - Windows MinGW-w64 targets (*-w64-mingw*) require at least r5437 from the + Mingw-w64 trunk. + + - Support for new AMD family 15h processors (Steamroller core) is now + available through the -march=bdver3 and -mtune=bdver3 options. + + - Support for new AMD family 16h processors (Jaguar core) is now available + through the -march=btver2 and -mtune=btver2 options. + + +FRV +--- + + - This target now supports the -fstack-usage command-line option. + + +MIPS +---- + + - GCC can now generate code specifically for the R4700, Broadcom XLP and MIPS + 34kn processors. The associated -march options are -march=r4700, -march=xlp + and -march=34kn respectively. + + - GCC now generates better DSP code for MIPS 74k cores thanks to further + scheduling optimizations. + + - The MIPS port now supports the -fstack-check option. + + - GCC now passes the -mmcu and -mno-mcu options to the assembler. + + - Previous versions of GCC would silently accept -fpic and -fPIC for + -mno-abicalls targets like mips*-elf. This combination was not intended or + supported, and did not generate position-independent code. GCC 4.8 now + reports an error when this combination is used. + + +PowerPC / PowerPC64 / RS6000 +---------------------------- + + - SVR4 configurations (GNU/Linux, FreeBSD, NetBSD) no longer save, restore or + update the VRSAVE register by default. The respective operating systems + manage the VRSAVE register directly. + + - Large TOC support has been added for AIX through the command line option + -mcmodel=large. + + - Native Thread-Local Storage support has been added for AIX. + + - VMX (Altivec) and VSX instruction sets now are enabled implicitly when + targetting processors that support those hardware features on AIX 6.1 and + above. + + +RX +-- + + - This target will now issue a warning message whenever multiple fast + interrupt handlers are found in the same cpmpilation unit. This feature can + be turned off by the new -mno-warn-multiple-fast-interrupts command-line + option. + + +S/390, System z +--------------- + + - Support for the IBM zEnterprise zEC12 processor has been added. When using + the -march=zEC12 option, the compiler will generate code making use of the + following new instructions: + + - load and trap instructions + - 2 new compare and trap instructions + - rotate and insert selected bits - without CC clobber + + The -mtune=zEC12 option enables zEC12 specific instruction scheduling + without making use of new instructions. + + - Register pressure sensitive instruction scheduling is enabled by default. + + - The ifunc function attribute is enabled by default. + + - memcpy and memcmp invokations on big memory chunks or with run time lengths + are not generated inline anymore when tuning for z10 or higher. The purpose + is to make use of the IFUNC optimized versions in Glibc. + + +SH +-- + + - The default alignment settings have been reduced to be less aggressive. This + results in more compact code for optimization levels other than -Os. + + - Improved support for the __atomic built-in functions: + + - A new option -matomic-model=model selects the model for the generated + atomic sequences. The following models are supported: + + soft-gusa + Software gUSA sequences (SH3* and SH4* only). On SH4A targets this + will now also partially utilize the movco.l and movli.l + instructions. This is the default when the target is sh3*-*-linux* + or sh4*-*-linux*. + hard-llcs + Hardware movco.l / movli.l sequences (SH4A only). + soft-tcb + Software thread control block sequences. + soft-imask + Software interrupt flipping sequences (privileged mode only). This + is the default when the target is sh1*-*-linux* or sh2*-*-linux*. + none + Generates function calls to the respective __atomic built-in + functions. This is the default for SH64 targets or when the target + is not sh*-*-linux*. + + - The option -msoft-atomic has been deprecated. It is now an alias for + -matomic-model=soft-gusa. + + - A new option -mtas makes the compiler generate the tas.b instruction for + the __atomic_test_and_set built-in function regardless of the selected + atomic model. + + - The __sync functions in libgcc now reflect the selected atomic model when + building the toolchain. + + - Added support for the mov.b and mov.w instructions with displacement + addressing. + + - Added support for the SH2A instructions movu.b and movu.w. + + - Various improvements to code generated for integer arithmetic. + + - Improvements to conditional branches and code that involves the T bit. A new + option -mzdcbranch tells the compiler to favor zero-displacement branches. + This is enabled by default for SH4* targets. + + - The pref instruction will now be emitted by the __builtin_prefetch built-in + function for SH3* targets. + + - The fmac instruction will now be emitted by the fmaf standard function and + the __builtin_fmaf built-in function. + + - The -mfused-madd option has been deprecated in favor of the machine- + independent -ffp-contract option. Notice that the fmac instruction will now + be generated by default for expressions like a * b + c. This is due to the + compiler default setting -ffp-contract=fast. + + - Added new options -mfsrra and -mfsca to allow the compiler using the fsrra + and fsca instructions on targets other than SH4A (where they are already + enabled by default). + + - Added support for the __builtin_bswap32 built-in function. It is now + expanded as a sequence of swap.b and swap.w instructions instead of a + library function call. + + - The behavior of the -mieee option has been fixed and the negative form + -mno-ieee has been added to control the IEEE conformance of floating point + comparisons. By default -mieee is now enabled and the option -ffinite-math- + only implicitly sets -mno-ieee. + + - Added support for the built-in functions __builtin_thread_pointer and + __builtin_set_thread_pointer. This assumes that GBR is used to hold the + thread pointer of the current thread. Memory loads and stores relative to + the address returned by __builtin_thread_pointer will now also utilize GBR + based displacement address modes. + + +SPARC +----- + + - Added optimized instruction scheduling for Niagara4. + + +TILE-Gx +------- + + - Added support for the -mcmodel=MODEL command-line option. The models + supported are small and large. + + +V850 +---- + + - This target now supports the E3V5 architecture via the use of the new + -mv850e3v5 command-line option. It also has experimental support for the e3v5 + LOOP instruction which can be enabled via the new -mloop command-line + option. + + +XStormy16 +--------- + + - This target now supports the -fstack-usage command-line option. + + +Operating Systems +================= + + +Windows (Cygwin) +---------------- + + - Executables are now linked against shared libgcc by default. The previous + default was to link statically, which can still be done by explicitly + specifying -static or -static-libgcc on the command line. However it is + strongly advised against, as it will cause problems for any application that + makes use of DLLs compiled by GCC. It should be alright for a monolithic + stand-alone application that only links against the Windows OS DLLs, but + offers little or no benefit. + + +For questions related to the use of GCC, please consult these web +pages and the GCC manuals. If that fails, the gcc-help@gcc.gnu.org +mailing list might help. Please send comments on these web pages and +the development of GCC to our developer list at gcc@gcc.gnu.org. All +of our lists have public archives. + +Copyright (C) Free Software Foundation, Inc. + +Verbatim copying and distribution of this entire article is +permitted in any medium, provided this notice is preserved. + +These pages are maintained by the GCC team. + +Last modified 2013-03-23. --- gcc-4.8-4.8.5.orig/debian/NEWS.html +++ gcc-4.8-4.8.5/debian/NEWS.html @@ -0,0 +1,926 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + +GCC 4.8 Release Series — Changes, New Features, and Fixes +- GNU Project - Free Software Foundation (FSF) + + + + + + + + + +

GCC 4.8 Release Series
Changes, New Features, and Fixes

+ + +

Caveats

+

GCC now uses C++ as its implementation language. This means that +to build GCC from sources, you will need a C++ compiler that +understands C++ 2003. For more details on the rationale and specific +changes, please refer to the C++ conversion +page.

+ +

To enable the Graphite framework for loop optimizations you now +need CLooG version 0.18.0 and ISL version 0.11.1. Both can be obtained +from the +GCC infrastructure +directory. The installation manual contains +more information about requirements to build GCC.

+ +

GCC now uses a more aggressive analysis to derive an upper bound for +the number of iterations of loops using constraints imposed by language +standards. This may cause non-conforming programs to no longer work as +expected, such as SPEC CPU 2006 464.h264ref and 416.gamess. A new +option, -fno-aggressive-loop-optimizations, was added +to disable this aggressive analysis. In some loops that have known +constant number of iterations, but undefined behavior is known to occur +in the loop before reaching or during the last iteration, GCC will warn +about the undefined behavior in the loop instead of deriving lower upper +bound of the number of iterations for the loop. The warning +can be disabled with -Wno-aggressive-loop-optimizations.

+ +

On ARM, a bug has been fixed in GCC's implementation of the AAPCS +rules for the layout of vectors that could lead to wrong code being +generated. Vectors larger than 8 bytes in size are now by default +aligned to an 8-byte boundary. This is an ABI change: code that makes +explicit use of vector types may be incompatible with binary objects +built with older versions of GCC. Auto-vectorized code is not affected +by this change.

+ +

On AVR, support has been removed for the command-line + option -mshort-calls deprecated in GCC 4.7.

+ +

On AVR, the configure option --with-avrlibc supported since + GCC 4.7.2 is turned on per default for all non-RTEMS configurations. + This option arranges for a better integration of + AVR Libc with avr-gcc. + For technical details, see PR54461. + To turn off the option in non-RTEMS configurations, use + --with-avrlibc=no. If the compiler is configured for + RTEMS, the option is always turned off.

+ +

+ More information on porting to GCC 4.8 from previous versions + of GCC can be found in + the porting + guide for this release. +

+ +

General Optimizer Improvements (and Changes)

+ + + + +

New Languages and Language specific improvements

+ + + + +

C family

+ + + + + + +

C++

+ + +

Runtime Library (libstdc++)

+ + + +

Fortran

+ + +

Go

+ + + + +

New Targets and Target Specific Improvements

+ +

AArch64

+ + +

ARM

+ + +

AVR

+ + +

IA-32/x86-64

+ + +

FRV

+ + + +

MIPS

+ + +

PowerPC / PowerPC64 / RS6000

+ + +

RX

+ + +

S/390, System z

+ + +

SH

+ + +

SPARC

+ + + +

TILE-Gx

+ + + +

V850

+ + + +

XStormy16

+ + + +

Operating Systems

+ +

Windows (Cygwin)

+ + + + + + + + + + + + +
+ +
For questions related to the use of GCC, +please consult these web pages and the +GCC manuals. If that fails, +the gcc-help@gcc.gnu.org +mailing list might help. +Comments on these web pages and the development of GCC are welcome on our +developer list at gcc@gcc.gnu.org. +All of our lists +have public archives. +
+ +

Copyright (C) +Free Software Foundation, Inc. +Verbatim copying and distribution of this entire article is +permitted in any medium, provided this notice is preserved.

+ +

These pages are +maintained by the GCC team. +Last modified 2013-03-23.

+ +
+ + + + + + + --- gcc-4.8-4.8.5.orig/debian/README.Bugs.m4 +++ gcc-4.8-4.8.5/debian/README.Bugs.m4 @@ -0,0 +1,333 @@ +Reporting Bugs in the GNU Compiler Collection for DIST +======================================================== + +Before reporting a bug, please +------------------------------ + +- Check that the behaviour really is a bug. Have a look into some + ANSI standards document. + +- Check the list of well known bugs: http://gcc.gnu.org/bugs.html#known + +- Try to reproduce the bug with a current GCC development snapshot. You + usually can get a recent development snapshot from the gcc-snapshot +ifelse(DIST,`Debian',`dnl + package in the unstable (or experimental) distribution. + + See: http://packages.debian.org/gcc-snapshot +', DIST, `Ubuntu',`dnl + package in the current development distribution. + + See: http://archive.ubuntu.com/ubuntu/pool/universe/g/gcc-snapshot/ +')dnl + +- Try to find out if the bug is a regression (an older GCC version does + not show the bug). + +- Check if the bug is already reported in the bug tracking systems. + +ifelse(DIST,`Debian',`dnl + Debian: http://bugs.debian.org/debian-gcc@lists.debian.org +', DIST, `Ubuntu',`dnl + Ubuntu: https://bugs.launchpad.net/~ubuntu-toolchain/+packagebugs + Debian: http://bugs.debian.org/debian-gcc@lists.debian.org +')dnl + Upstream: http://gcc.gnu.org/bugzilla/ + + +Where to report a bug +--------------------- + +ifelse(DIST,`Debian',`dnl +Please report bugs found in the packaging of GCC to the Debian bug tracking +system. See http://www.debian.org/Bugs/ for instructions (or use the +reportbug script). +', DIST, `Ubuntu',`dnl +Please report bugs found in the packaging of GCC to Launchpad. See below +how issues should be reported. +')dnl + +DIST's current policy is to closely follow the upstream development and +only apply a minimal set of patches (which are summarized in the README.Debian +document). + +ifelse(DIST,`Debian',`dnl +If you think you have found an upstream bug, you did check the section +above ("Before reporting a bug") and are able to provide a complete bug +report (see below "How to report a bug"), then you may help the Debian +GCC package maintainers, if you report the bug upstream and then submit +a bug report to the Debian BTS and tell us the upstream report number. +This way you are able to follow the upstream bug handling as well. If in +doubt, report the bug to the Debian BTS (but read "How to report a bug" +below). +', DIST, `Ubuntu',`dnl +If you think you have found an upstream bug, you did check the section +above ("Before reporting a bug") and are able to provide a complete bug +report (see below "How to report a bug"), then you may help the Ubuntu +GCC package maintainers, if you report the bug upstream and then submit +a bug report to Launchpad and tell us the upstream report number. +This way you are able to follow the upstream bug handling as well. If in +doubt, report the bug to Launchpad (but read "How to report a bug" below). + +Report the issue to https://bugs.launchpad.net/ubuntu/+source/SRCNAME. +')dnl + + +How to report a bug +------------------- + +There are complete instructions in the gcc info manual (found in the +gcc-doc package), section Bugs. + +The manual can be read using `M-x info' in Emacs, or if the GNU info +program is installed on your system by `info --node "(gcc)Bugs"'. Or see +the file BUGS included with the gcc source code. + +Online bug reporting instructions can be found at + + http://gcc.gnu.org/bugs.html + +[Some paragraphs taken from the above URL] + +The main purpose of a bug report is to enable us to fix the bug. The +most important prerequisite for this is that the report must be +complete and self-contained, which we explain in detail below. + +Before you report a bug, please check the list of well-known bugs and, +if possible in any way, try a current development snapshot. + +Summarized bug reporting instructions +------------------------------------- + +What we need + +Please include in your bug report all of the following items, the +first three of which can be obtained from the output of gcc -v: + + * the exact version of GCC; + * the system type; + * the options given when GCC was configured/built; + * the complete command line that triggers the bug; + * the compiler output (error messages, warnings, etc.); and + * the preprocessed file (*.i*) that triggers the bug, generated by + adding -save-temps to the complete compilation command, or, in + the case of a bug report for the GNAT front end, a complete set + of source files (see below). + +What we do not want + + * A source file that #includes header files that are left out + of the bug report (see above) + * That source file and a collection of header files. + * An attached archive (tar, zip, shar, whatever) containing all + (or some :-) of the above. + * A code snippet that won't cause the compiler to produce the + exact output mentioned in the bug report (e.g., a snippet with + just a few lines around the one that apparently triggers the + bug, with some pieces replaced with ellipses or comments for + extra obfuscation :-) + * The location (URL) of the package that failed to build (we won't + download it, anyway, since you've already given us what we need + to duplicate the bug, haven't you? :-) + * An error that occurs only some of the times a certain file is + compiled, such that retrying a sufficient number of times + results in a successful compilation; this is a symptom of a + hardware problem, not of a compiler bug (sorry) + * E-mail messages that complement previous, incomplete bug + reports. Post a new, self-contained, full bug report instead, if + possible as a follow-up to the original bug report + * Assembly files (*.s) produced by the compiler, or any binary files, + such as object files, executables, core files, or precompiled + header files + * Duplicate bug reports, or reports of bugs already fixed in the + development tree, especially those that have already been + reported as fixed last week :-) + * Bugs in the assembler, the linker or the C library. These are + separate projects, with separate mailing lists and different bug + reporting procedures + * Bugs in releases or snapshots of GCC not issued by the GNU + Project. Report them to whoever provided you with the release + * Questions about the correctness or the expected behavior of + certain constructs that are not GCC extensions. Ask them in + forums dedicated to the discussion of the programming language + + +Known Bugs and Non-Bugs +----------------------- + +[Please see /usr/share/doc/gcc/FAQ or http://gcc.gnu.org/faq.html first] + + +C++ exceptions don't work with C libraries +------------------------------------------ + +[Taken from the closed bug report #22769] C++ exceptions don't work +with C libraries, if the C code wasn't designed to be thrown through. +A solution could be to translate all C libraries with -fexceptions. +Mostly trying to throw an exception in a callback function (qsort, +Tcl command callbacks, etc ...). Example: + + #include + #include + + class A {}; + + static + int SortCondition(void const*, void const*) + { + printf("throwing 'sortcondition' exception\n"); + throw A(); + } + + int main(int argc, char *argv[]) + { + int list[2]; + + try { + SortCondition(NULL,NULL); + } catch (A) { + printf("caught test-sortcondition exception\n"); + } + try { + qsort(&list, sizeof(list)/sizeof(list[0]),sizeof(list[0]), + &SortCondition); + } catch (A) { + printf("caught real-sortcondition exception\n"); + } + return 0; +} + +Andrew Macleod responded: + +When compiled with the table driven exception handling, exception can only +be thrown through functions which have been compiled with the table driven EH. +If a function isn't compiled that way, then we do not have the frame +unwinding information required to restore the registers when unwinding. + +I believe the setjmp/longjmp mechanism will throw through things like this, +but its produces much messier code. (-fsjlj-exceptions) + +The C compiler does support exceptions, you just have to turn them on +with -fexceptions. + +Your main options are to: + a) Don't use callbacks, or at least don't throw through them. + b) Get the source and compile the library with -fexceptions (You have to + explicitly turn on exceptions in the C compiler) + c) always use -fsjlj-exceptions (boo, bad choice :-) + + +g++: "undefined reference" to static const array in class +--------------------------------------------------------- + +The following code compiles under GNU C++ 2.7.2 with correct results, +but produces the same linker error with GNU C++ 2.95.2. +Alexandre Oliva responded: + +All of them are correct. A static data member *must* be defined +outside the class body even if it is initialized within the class +body, but no diagnostic is required if the definition is missing. It +turns out that some releases do emit references to the missing symbol, +while others optimize it away. + +#include + +class Test +{ + public: + Test(const char *q); + protected: + static const unsigned char Jam_signature[4] = "JAM"; +}; + +Test::Test(const char *q) +{ + if (memcmp(q, Jam_signature, sizeof(Jam_signature)) != 0) + cerr << "Hello world!\n"; +} + +int main(void) +{ + Test::Test("JAM"); + return 0; +} + +g++: g++ causes passing non const ptr to ptr to a func with const arg + to cause an error (not a bug) +--------------------------------------------------------------------- + +Example: + +#include +void test(const char **b){ + printf ("%s\n",*b); +} +int main(void){ + char *test1="aoeu"; + test(&test1); +} + +make const +g++ const.cc -o const +const.cc: In function `int main()': +const.cc:7: passing `char **' as argument 1 of `test(const char **)' adds cv-quals without intervening `const' +make: *** [const] Error 1 + +Answer from "Martin v. Loewis" : + +> ok... maybe I missed something.. I haven't really kept up with the latest in +> C++ news. But I've never heard anything even remotly close to passing a non +> const var into a const arg being an error before. + +Thanks for your bug report. This is a not a bug in the compiler, but +in your code. The standard, in 4.4/4, puts it that way + +# A conversion can add cv-qualifiers at levels other than the first in +# multi-level pointers, subject to the following rules: +# Two pointer types T1 and T2 are similar if there exists a type T and +# integer n > 0 such that: +# T1 is cv(1,0) pointer to cv(1,1) pointer to ... cv(1,n-1) +# pointer to cv(1,n) T +# and +# T2 is cv(2,0) pointer to cv(2,1) pointer to ... cv(2,n-1) +# pointer to cv(2,n) T +# where each cv(i,j) is const, volatile, const volatile, or +# nothing. The n-tuple of cv-qualifiers after the first in a pointer +# type, e.g., cv(1,1) , cv(1,2) , ... , cv(1,n) in the pointer type +# T1, is called the cv-qualification signature of the pointer type. An +# expression of type T1 can be converted to type T2 if and only if the +# following conditions are satisfied: +# - the pointer types are similar. +# - for every j > 0, if const is in cv(1,j) then const is in cv(2,j) , +# and similarly for volatile. +# - if the cv(1,j) and cv(2,j) are different, then const is in every +# cv(2,k) for 0 < k < j. + +It is the last rule that your code violates. The standard gives then +the following example as a rationale: + +# [Note: if a program could assign a pointer of type T** to a pointer +# of type const T** (that is, if line //1 below was allowed), a +# program could inadvertently modify a const object (as it is done on +# line //2). For example, +# int main() { +# const char c = 'c'; +# char* pc; +# const char** pcc = &pc; //1: not allowed +# *pcc = &c; +# *pc = 'C'; //2: modifies a const object +# } +# - end note] + +If you question this line of reasoning, please discuss it in one of +the public C++ fora first, eg. comp.lang.c++.moderated, or +comp.std.c++. + + +cpp removes blank lines +----------------------- + +With the new cpp, you need to add -traditional to the "cpp -P" args, else +blank lines get removed. + +[EDIT ME: scan Debian bug reports and write some nice summaries ...] --- gcc-4.8-4.8.5.orig/debian/README.C++ +++ gcc-4.8-4.8.5/debian/README.C++ @@ -0,0 +1,35 @@ +libstdc++ is an implementation of the Standard C++ Library, including the +Standard Template Library (i.e. as specified by ANSI and ISO). + +Some notes on porting applications from libstdc++-2.90 (or earlier versions) +to libstdc++-v3 can be found in the libstdc++6-4.3-doc package. After the +installation of the package, look at: + + file:///usr/share/doc/gcc-4.3-base/libstdc++/html/17_intro/porting-howto.html + +On Debian GNU/Linux you find additional documentation in the +libstdc++6-4.3-doc package. After installing these packages, +point your browser to + + file:///usr/share/doc/libstdc++6-4.3-doc/libstdc++/html/index.html + +Other documentation can be found: + + http://www.sgi.com/tech/stl/ + +with a good, recent, book on C++. + +A great deal of useful C++ documentation can be found in the C++ FAQ-Lite, +maintained by Marshall Cline . It can be found at the +mirror sites linked from the following URL (this was last updated on +2010/09/11): + + http://www.parashift.com/c++-faq/ + +or use some search engin site to find it, e.g.: + + http://www.google.com/search?q=c%2B%2B+faq+lite + +Be careful not to use outdated mirors. + +Please send updates to this list as bug report for the g++ package. --- gcc-4.8-4.8.5.orig/debian/README.Debian +++ gcc-4.8-4.8.5/debian/README.Debian @@ -0,0 +1,45 @@ + The Debian GNU Compiler Collection setup + ======================================== + +Please see the README.Debian in /usr/share/doc/gcc, contained in the +gcc package for a description of the setup of the different compiler +versions. + +For general discussion about the Debian toolchain (GCC, glibc, binutils) +please use the mailing list debian-toolchain@lists.debian.org; for GCC +specific things, please use debian-gcc@lists.debian.org. When in doubt +use the debian-toolchain ML. + + +Maintainers of these packages +----------------------------- + +Matthias Klose +Ludovic Brenta (gnat) +Iain Buclaw (gdc) +Aurelien Jarno (mips*-linux) +Aurelien Jarno (s390X*-linux) + +The following ports lack maintenance in Debian: powerpc, ppc64, +sparc, sparc64 (unmentioned ports are usually handled by the Debian +porters). + +Former and/or inactive maintainers of these packages +---------------------------------------------------- + +Falk Hueffner (alpha-linux) +Ray Dassen +Jeff Bailey (hurd-i386) +Joel Baker (netbsd-i386) +Randolph Chung (ia64-linux) +Philip Blundell (arm-linux) +Ben Collins (sparc-linux) +Dan Jacobowitz (powerpc-linux) +Thiemo Seufer (mips*-linux) +Matt Taggart (hppa-linux) +Gerhard Tonn (s390-linux) +Roman Zippel (m68k-linux) +Arthur Loiret (gdc) + +=============================================================================== + --- gcc-4.8-4.8.5.orig/debian/README.Debian.ppc64el +++ gcc-4.8-4.8.5/debian/README.Debian.ppc64el @@ -0,0 +1,368 @@ + The Debian GNU Compiler Collection setup + ======================================== + +Please see the README.Debian in /usr/share/doc/gcc, contained in the +gcc package for a description of the setup of the different compiler +versions. + +For general discussion about the Debian toolchain (GCC, glibc, binutils) +please use the mailing list debian-toolchain@lists.debian.org; for GCC +specific things, please use debian-gcc@lists.debian.org. When in doubt +use the debian-toolchain ML. + + +Maintainers of these packages +----------------------------- + +Matthias Klose +Ludovic Brenta (gnat) +Iain Buclaw (gdc) +Aurelien Jarno (mips*-linux) +Aurelien Jarno (s390X*-linux) + +The following ports lack maintenance in Debian: powerpc, ppc64, +sparc, sparc64 (unmentioned ports are usually handled by the Debian +porters). + +Former and/or inactive maintainers of these packages +---------------------------------------------------- + +Falk Hueffner (alpha-linux) +Ray Dassen +Jeff Bailey (hurd-i386) +Joel Baker (netbsd-i386) +Randolph Chung (ia64-linux) +Philip Blundell (arm-linux) +Ben Collins (sparc-linux) +Dan Jacobowitz (powerpc-linux) +Thiemo Seufer (mips*-linux) +Matt Taggart (hppa-linux) +Gerhard Tonn (s390-linux) +Roman Zippel (m68k-linux) +Arthur Loiret (gdc) + +=============================================================================== + + +svn-updates: + updates from the 4.8 branch upto 20131220 (r206145). + +rename-info-files: + Allow transformations on info file names. Reference the + transformed info file names in the texinfo files. + +gcc-gfdl-build: + Build a dummy s-tm-texi without access to the texinfo sources + +gcc-textdomain: + Set gettext's domain and textdomain to the versioned package name. + +gcc-driver-extra-langs: + Add options and specs for languages that are not built from a source + (but built from separate sources). + +gcc-hash-style-gnu: + Link using --hash-style=gnu (aarch64, alpha, amd64, armel, armhf, ia64, + i386, powerpc, ppc64, s390, sparc) + +libstdc++-pic: + Build and install libstdc++_pic.a library. + +libstdc++-doclink: + adjust hrefs to point to the local documentation + +libstdc++-man-3cxx: + Install libstdc++ man pages with suffix .3cxx instead of .3 + +libstdc++-test-installed: + Add support to run the libstdc++-v3 testsuite using the + installed shared libraries. + +libjava-stacktrace: + libgcj: Lookup source file name and line number in separated + debug files found in /usr/lib/debug + +libjava-jnipath: + - Add /usr/lib/jni and /usr/lib//jni to java.library.path. + - When running the i386 binaries on amd64, look in + - /usr/lib32/gcj-x.y and /usr/lib32/jni instead. + +libjava-sjlj: + Don't try to use _Unwind_Backtrace on SJLJ targets. + See bug #387875, #388505, GCC PR 29206. + +libjava-disable-plugin: + Don't build the gcjwebplugin, even when configured with --enable-plugin + +alpha-no-ev4-directive: + never emit .ev4 directive. + +boehm-gc-getnprocs: + boehm-gc/pthread_support.c (GC_get_nprocs): Use sysconf as fallback. + +note-gnu-stack: + Add .note.GNU-stack sections for gcc's crt files, libffi and boehm-gc + Taken from FC. + +libgomp-omp_h-multilib: + Fix up omp.h for multilibs. + +sparc-force-cpu: + On sparc default to ultrasparc (v9a) in 32bit mode + +gccgo-version: + Omit the subminor number from the go libdir + +pr47818: + Fix PR ada/47818: Pragma Assert is rejected with No_Implementation_Pragmas restriction. + +pr49944: + apply proposed patch for PR ada/49444. + +gcc-base-version: + Set base version to 4.8, introduce full version 4.8.x. + +libgo-testsuite: + Only run the libgo testsuite for flags configured in RUNTESTFLAGS + +gcc-target-include-asm: + Search $(builddir)/sys-include for the asm header files + +libgo-revert-timeout-exp: + +arm-sanitizer: + Enable libsanitizer on ARM. + +libgo-setcontext-config: + libgo: Overwrite the setcontext_clobbers_tls check on mips* + +pr57211: + Fix PR c++/57211, don't warn about unused parameters of defaulted functions. + +gcc-auto-build: + Fix cross building a native compiler. + +kfreebsd-unwind: + DWARF2 EH unwinding support for AMD x86-64 and x86 KFreeBSD. + +libgcc-no-limits-h: + Don't include in libgcc/libgcc2.c. + +kfreebsd-boehm-gc: + boehm-gc: use mmap instead of brk also on kfreebsd-*. + +pr49847: + Proposed patch for PR rtl-optimization/49847 (cc0 targets). + +libffi-m68k: + Apply #660525 fix to in-tree libffi + +m68k-picflag: + backport of trunk r204854 + fixes relocation errors when linking large libs (smokeqt, python-qt4) + +sys-auxv-header: + Check for the sys/auxv.h header file. + +go-use-gold: + Pass -fuse-ld=gold to gccgo on targets supporting -fsplit-stack + +go-testsuite: + Skip Go testcase on AArch64 which hangs on the buildds. + +pr57363: + Fix PR libgcc/57363, taken from the trunk. + +libstdc++-python3: + Make the libstdc++-v3 pretty printer compatible with Python3. + +ada-driver-check: + Simplify Ada driver check (we always build using the required + Ada version. Needed for warnings on alpha. + +ada-gcc-name: + use gcc-4.8 instead of gcc as the command name. + +ada-default-project-path: + - Change the default search path for project files to the one specified + by the Debian Policy for Ada: /usr/share/ada/adainclude. + +ada-symbolic-tracebacks: + - Enable support for symbolic tracebacks in exceptions (delete the dummy + convert_addresses from adaint.c, and provide a real one separately.) + +ada-library-project-files-soname: + - in project files, use the exact Library_Version provided, if any, as + the soname of libraries; do not strip minor version numbers + (PR ada/40025). + +ada-ppc64: + +ada-link-lib: + - Install the shared Ada libraries as '.so.1', not '.so' to conform + to the Debian policy. + - Don't include a runtime link path (-rpath), when linking binaries. + - Build the shared libraries on hppa-linux. + - Instead of building libada as a target library only, build it as + both a host and, if different, target library. + - Build the GNAT tools in their top-level directory; do not use + recursive makefiles. + - Link the GNAT tools dynamically. + +ada-libgnatvsn: + - Introduce a new shared library named libgnatvsn, containing + common components of GNAT under the GNAT-Modified GPL, for + use in GNAT tools, ASIS, GLADE and GPS. Link the gnat tools + against this new library. + +ada-libgnatprj: + - Introduce a new shared library named libgnatprj, containing + the GNAT project file manager licensed under the pure GPL, for + use in GNAT tools, GLADE and GPS. Link the GNAT tools against + this new library. + +ada-acats: + - When running the ACATS, look for the gnat tools in their new + directory (build/gnattools), and for the shared libraries in + build/gcc/ada/rts-shared-zcx, build/libgnatvsn and build/libgnatprj. + +ada-link-shlib: + In gnatlink, pass the options and libraries after objects to the + linker to avoid link failures with --as-needed. Closes: #680292. + +gdc-updates: + gdc updates up to 20130611. + +gdc-4.8: + This implements D language support in the GCC back end, and adds + relevant documentation about the GDC front end (code part). + +gdc-versym-cpu: + Implements D CPU version conditions. + +gdc-versym-os: + Implements D OS version conditions. + +gdc-frontend-posix: + Fix build of the D frontend on the Hurd and KFreeBSD. + +gdc-4.8-doc: + This implements D language support in the GCC back end, and adds + relevant documentation about the GDC front end (documentation part). + +gdc-driver-nophobos: + Modify gdc driver to have no libphobos by default. + +disable-gdc-tests: + Disable D tests, hang on many buildds + +m68k-ada: + +m68k-revert-pr45144: + +pr52714: + Proposed fix for PR rtl-optimization/52714: + Revert gcc 4.8 to gcc the 4.5 version of the PR rtl-optimization/45695 fix: + +pr58369: + backport of trunk r204224 + fixes ICE during building boost 1.54 + + PR rtl-optimization/58369 + * reload1.c (compute_reload_subreg_offset): New function. + (choose_reload_regs): Use it to pass endian-correct + offset to subreg_regno_offset. + +pr52306: + Disable -fauto-inc-dec by default for m68k + since it can generate ICEs in C++ code, + until a fix is found. + +gcc-ppc64el: + Changes from the ibm/gcc-4_8-branch (20131212) + +gcc-ppc64el-doc: + Changes from the ibm/gcc-4_8-branch (documentation) + +gcc-sysroot: + Allow building --with-sysroot=/ + +goarch-aarch64: + Introduce the arm64 goarch. + +libgo-explicit-reservation: + Fix statically linked gccgo binaries on AArch64. + +ada-kfreebsd: + add support for GNU/kFreeBSD. + +arm-multilib-defaults: + Set MULTILIB_DEFAULTS for ARM multilib builds + +cross-fixes: + Fix the linker error when creating an xcc for ia64 + +cross-install-location: + +gcc-ice-hack: + Retry the build on an ice, save the calling options and preprocessed + source when the ice is reproducible. + +gcc-ice-apport: + Report an ICE to apport (if apport is available + and the environment variable GCC_NOAPPORT is not set) + +libjava-fixed-symlinks: + Remove unneed '..' elements from symlinks in JAVA_HOME + +libstdc++-arm-wno-abi: + Temporary work around: + On arm-linux-gnueabi run the libstdc++v3 testsuite with -Wno-abi + +ada-mips: + Improve support for mips. + +libffi-ro-eh_frame_sect: + PR libffi/47248, force a read only eh frame section. + +gcc-multiarch: + - Remaining multiarch patches, not yet submitted upstream. + - Add MULTIARCH_DIRNAME definitions for multilib configurations, + which are used for the non-multilib builds. + +libjava-multiarch: + Install libjava libraries to multiarch location + +libjava-nobiarch-check: + For biarch builds, disable the testsuite for the non-default architecture + for runtime libraries, which are not built by default (libjava). + +config-ml: + - Disable some biarch libraries for biarch builds. + - Fix multilib builds on kernels which don't support all multilibs. + +cross-no-locale-include: + Don't add /usr/local/include for cross compilers. Assume that + /usr/include is ready for multiarch, but not /usr/local/include. + +gcc-multilib-multiarch: + Don't auto-detect multilib osdirnames. + +powerpc64le-multilib-definitions: + +gcc-as-needed: + On linux targets pass --as-needed by default to the linker. + +mips-fix-loongson2f-nop: + On mips, pass -mfix-loongson2f-nop to as, if -mno-fix-loongson2f-nop + is not passed. + +libgomp-kfreebsd-testsuite: + Disable lock-2.c test on kfreebsd-* + +gcc-default-ssp: + Turn on -fstack-protector by default for C, C++, ObjC, ObjC++. + Build libgcc using -fno-stack-protector. + +gcc-default-format-security: + Turn on -Wformat -Wformat-security by default for C, C++, ObjC, ObjC++. --- gcc-4.8-4.8.5.orig/debian/README.cross +++ gcc-4.8-4.8.5/debian/README.cross @@ -0,0 +1,144 @@ +Building cross-compiler Debian packages +--------------------------------------- + +It is possible to build C and C++ cross compilers and support libraries +from gcc-4.0 source package. This document describes how to do so. +Cross-compiler build support is not perfect yet, please send fixes +and improvements to debian-gcc@lists.debian.org and +debian-embedded@lists.debian.org + +Before you start, you should probably check available pre-built +cross-toolchain debs. Available at http://www.emdebian.org + +Old patches could be reached at + http://zigzag.lvk.cs.msu.su/~nikita/debian/ + +If they are no longer there, you may check EmDebian web site at + http://www.emdebian.org/ +or ask debian-embedded@lists.debian.org for newer location. + +Please check http://bugs.debian.org/391445 if you are about building +gcc-4.3 or above. + +Most of them has been merged with gcc debian sources. + +0. What's wrong with toolchain-source approach + +Package toolchain-source contains sources for binutils and gcc, as well as +some support scripts to build cross-compiler packages. They seem to work. + +However, there is one fundamental problem with this approach. +Gcc package is actively maintained and frequently updated. These updates +do contain bug fixes and improvements, especially for non-x86 architectures. +Cross-compilers built using toolchain-source will not get those fixes unless +toolchain-source package is updated after each binutils and gcc update. +The later is not hapenning in real life. For example, toolchain-source +was upgraded from gcc-3.2 to gcc-3.3 half a year later than gcc-3.3 became +Debian default compiler. + +Keeping toolchain-source package up-to-date requires lots of work, and seems +to be a waste of time. It is much better to build cross-compilers directly +from gcc source package. + + +1. What is needed to build a cross-compiler from gcc-4.3 source + +1.1. dpkg-cross package + +Dpkg-cross package contains several tools to manage cross-compile environment. + +It can convert native debian library and lib-dev packages for the target +architecture to binary-all packages that keep libraries and headers under +/usr/$(TARGET)/. + +Also it contains helper tools for cross-compiling debian packages. Some of +these tools are used while building libgcc1 and libstdc++ library packages. +The resulting library packages follow the same convensions as library packages +converted by dpkg-cross. + +Currently, at least version 1.18 of dpkg-cross is needed for cross-gcc +package build. Version 1.32 of dpkg-cross is needed in order to build gcc-4.3. + +1.2. cross-binutils for the target + +You need cross-binutils for your target to build cross-compiler. +Binutils-multiarch package will not work because it does not provide cross- +assemblers. + +If you don't want to use pre-built cross-binutils packages, you may build +your own from binutils debian source package, using patches posted to +bug #231707. Please use the latest of patch versions available there. + +Alternatively, you may use toolchain-source package to build cross-binutils +(but in this case you will probably also want to use toolchain-source +to build cross-compiler itself). However, multilib'ed cross-compilers may +not build or work with these binutils. + +1.3. libc for target + +You also need libc library and development packages for the target +architecture installed. + +To get those, download linux-kernel-headers, libc6, and libc6-dev binary +debs for your target, convert those using dpkg-cross -b, and install +resulting -arch-cross debs. Consult dpkg-cross manual page for more +information. + +Building with/for alternative libc's is not supported yet (but this is in +TODO). + +Note that if you plan to use your cross-toolchain to develop kernel drivers +or similar low-level things, you will probably also need kernel headers +for the exact kernel version that your target hardware uses. + + +2. Building cross-compiler packages + +Get gcc-4.3 source package. + +Unpack it using dpkg-source -x, and cd to the package directory. + +Set GCC_TARGET environment variable to the target architectire name. Note +that currently you should use debian architecture name (i.e 'powerpc' or 'arm'), +not GNU system type (i.e. 'powerpc-linux' or 'arm-linux'). Setting GCC_TARGET +to GNU system type will cause cross-compiler build to fail. + +Instead of setting GCC_TARGET, target architecture name may be put into +debian/target file. If both GCC_TARGET is defined and debian/target file +exists, GCC_TARGET is used. + +Run debian/rules control. This will change debian/control file, +adjusting build-depends. By default, the packages will not depend on the +system -base package. A variable DEB_CROSS_INDEPENDENT has been merged with DEB_CROSS variable. + +You can then build with either + +$ GCC_TARGET=[arch] dpkg-buildpackage -rfakeroot + +3. Using crosshurd + +Jeff Bailey suggests alternate way to setup +environment to build cross-compiler, using 'crosshurd' package. +Crosshurd is like debootstrap but cross-arch, and works on the Hurd, +Linux and FreeBSD. (The name is historical). + +If you setup your environment with crosshurd, you will need to fix symlinks +in lib and usr/lib to be relative instead of absolute. For example: + +lrwxrwxrwx 1 root root 20 2004-05-06 23:02 libcom_err.so -> /lib/libcom_err.so.2 + +Needs to be changed to: + +lrwxrwxrwx 1 root root 20 2004-05-06 23:02 libcom_err.so -> ../../lib/libcom_err.so.2 + +Also, if you choose this method, set the environment variable 'with_sysroot' +to point to the ABSOLUTE PATH where the crosshurd was done. + +Note however that build-depends of cross-gcc and dependencies in generated +libgcc1 and libstdc++ packages assume that you use dpkg-cross to set up +your environment, and may be wrong or incomplete if you use alternate methods. +But probably you don't care. + +-- +Nikita V. Youshchenko - Jun 2004 +Hector Oron Martinez - Oct 2006 --- gcc-4.8-4.8.5.orig/debian/README.gnat +++ gcc-4.8-4.8.5/debian/README.gnat @@ -0,0 +1,22 @@ +If you want to develop Ada programs and libraries on Debian, please +read the Debian Policy for Ada: + +http://people.debian.org/~lbrenta/debian-ada-policy.html + +The default Ada compiler is and always will be the package `gnat'. +Debian contains many programs and libraries compiled with it, which +are all ABI-compatible. + +Starting with gnat-4.2, Debian provides both zero-cost and +setjump/longjump versions of the run-time library. The zero-cost +exception handling mechanism is the default as it provides the best +performance. The setjump/longjump exception handling mechanism is new +and only provided as a static library. It is necessary to use this +exception handling mechanism in distributed (annex E) programs. If +you wish to use the new sjlj library: + +1) call gnatmake with --RTS=sjlj +2) call gnatbind with -static + +Do NOT link your programs with libgnat-4.2.so, because it uses the ZCX +mechanism. --- gcc-4.8-4.8.5.orig/debian/README.libstdc++-baseline.in +++ gcc-4.8-4.8.5/debian/README.libstdc++-baseline.in @@ -0,0 +1,2 @@ +The libstdc++ baseline file is a list of symbols exported by the +libstdc++ library. --- gcc-4.8-4.8.5.orig/debian/README.maintainers +++ gcc-4.8-4.8.5/debian/README.maintainers @@ -0,0 +1,196 @@ +-*- Outline -*- + +Read this file if you are a Debian Developer or would like to become +one, or if you would like to create your own binary packages of GCC. + +* Overview + +From the GCC sources, Debian currently builds 3 source packages and +almost 100 binary packages, using a single set of build scripts. The +3 source packages are: + +gcc-x.y: C, C++, Fortran, Objective-C and Objective-C++, plus many + common libraries like libssp and libgcc. +gcj-x.y: Java. +gnat-x.y: Ada. + +The way we do this is quite peculiar, so listen up :) + +When we build from the gcc-x.y source package, we produce, among many +others, a gcc-x.y-source binary package that contains the pristine +upstream tarball and some Debian-specific patches. Any user can then +install this package on their Debian system, and will have the full +souces in /usr/src/gcc-x.y/gcc-.tar.bz2, along with the +Makefile snippets that unpack and patch them. + +The intended use for this package is twofold: (a) allow users to build +their own cross-compilers, and (b) build the other two packages, +gcj-x.y and gnat-x.y. + +- gcc-x.y requires only a C compiler to build and produces C, C++, + Fortran, Go and Objective-C compilers and libraries. It also + produces the binary package gcc-x.y-source containing all the + sources and patches in a tarball. + +- gcj-x.y build-depends on gcc-x.y-source and C++ and Java compilers. + Its .orig.tar.bz2 file only contains an empty directory; the real + sources from which it builds the binary packages are in + gcc-x.y-source. + +- gnat-x.y build-depends on gcc-x.y-source and an Ada compiler. It + does not even have an .orig.tar.bz2 package; it is a Debian native + package. + +The benefits of this split are many: + +- bootstrapping a subset of languages is much faster than + bootstrapping all languages and libraries (which can take a full + week on slow architectures like mips or arm) + +- the language maintainers don't have to wait for each other + +- for new ports, the absence of a port of, say, gnat-x.y does not + block the porting of gcc-x.y. + +gcc-x.y-source is also intended for interested users to build +cross-compiler packages. Debian cannot provide all possible +cross-compiler packages (i.e. all possible host, target, language and +library combinations), so instead tries to facilitate building them. + +* The build sequence + +As for all other Debian packages, you build GCC by calling +debian/rules. + +The first thing debian/rules does it to look at the top-most entry in +debian/changelog: this tells it which source package it is building. +For example, if the first entry in debian/changelog reads: + +gcj-4.3 (4.3-20070609-1) unstable; urgency=low + + * Upload as gcj-4.3. + + -- Ludovic Brenta Tue, 26 Jun 2007 00:26:42 +0200 + +then, debian/rules will build only the Java binary packages. + +The second step is to build debian/control from debian/control.m4 and +a complex set of rules specified in debian/rules.conf. The resulting +control file contains only the binary packages to be built. + +The third step is to select which patches to apply (this is done in +debian/rules.defs), and then to apply the selected patches (see +debian/rules.patch). The result of this step is a generated +debian/patches/series file for use by quilt. + +The fourth step is to unpack the GCC source tarball. This tarball is +either in the build directory (when building gcc-x.y), or in +/usr/src/gcc-x.y/gcc-x.y.z.tar.xz (when building the other source +packages). + +The fifth step is to apply all patches to the unpacked sources with +quilt. + +The sixth step is to create a "build" directory, cd into it, call +../src/configure, and bootstrap the compiler and libraries selected. +This is in debian/rules2. + +The seventh step is to call "make install" in the build directory: +this installs the compiler and libraries into debian/tmp +(i.e. debian/tmp/usr/bin/gcc, etc.) + +The eighth step is to run the GCC test suite. This actually takes at +least as much time as bootstrapping, and you can disable it by setting +WITHOUT_CHECK to "yes" in the environment. + +The ninth step is to build the binary packages, i.e. the .debs. This +is done by a set of language- and architecture-dependent Makefile +snippets in the debian/rules.d/ directory, which move files from the +debian/tmp tree to the debian/ trees. + +* Making your own packages + +In this example, we will build our own gnat-x.y package. + +1) Install gcc-x.y-source, which contains the real sources: + +# aptitude install gcc-x.y-source + +2) Create a build directory: + +$ mkdir gnat-x.y-x.y.z; cd gnat-x.y-x.y.z + +3) Checkout from Subversion: + +$ svn checkout svn://svn.debian.org/gcccvs/branches/sid/gcc-x.y/debian + +4) Edit the debian/changelog file, adding a new entry at the top that + starts with "gnat-x.y". + +5) Generate the debian/control file, adjusted for gnat: + +$ debian/rules control + +8) Build: + +$ dpkg-buildpackage + +* Hints + +You need a powerful machine to build GCC. The larger, the better. +The build scripts take advantage of as many CPU threads as are +available in your box (for example: 2 threads on a dual-core amd64; 4 +threads on a dual-core POWER5; 32 threads on an 8-core UltraSPARC T1, +etc.). + +If you have 2 GB or more of physical RAM, you can achieve maximum +performance by building in a tmpfs, like this: + +1) as root, create the new tmpfs: + +# mount -t tmpfs -o size=1280m none /home/lbrenta/src/debian/ram + +By default, the tmpfs will be limited to half your physical RAM. The +beauty of it is that it only consumes as much physical RAM as +necessary to hold the files in it; deleting files frees up RAM. + +2) As your regular user, create the working directory in the tmpfs + +$ cp --archive ~/src/debian/gcc-x.y-x.y.z ~/src/debian/ram + +3) Build in there. On my dual-core, 2 GHz amd64, it takes 34 minutes + to build gnat, and the tmpfs takes 992 MiB of physical RAM but + exceeds 1 GiB during the build. + +Note that the build process uses a lot of temporary files. Your $TEMP +directory should therefore also be in a ram disk. You can achieve +that either by mounting it as tmpfs, or by setting TEMP to point to +~/src/debian/ram. + +Also note that each thread in your processor(s) will run a compiler in +it and use up RAM. Therefore your physical memory should be: + +Physical_RAM >= 1.2 + 0.4 * Threads (in GiB) + +(this is an estimate; your mileage may vary). If you have less +physical RAM than recommended, reduce the number of threads allocated +to the build process, or do not use a tmpfs to build. + +* Patching GCC + +Debian applies a large number of patches to GCC as part of the build +process. It uses quilt but the necessary debian/patches/series is not +part of the packaging scripts; instead, "debian/rules patch" generates +this file by looking at debian/control (which is itself generated!), +debian/changelog and other files. Then it applies all the patches. +At this point, you can use quilt as usual: + +$ cd ~/src/debian/gcc-x.y +$ export QUILT_PATCHES=$PWD/debian/patches +$ quilt series + +If you add new patches, remember to add them to the version control +system too. + +-- +Ludovic Brenta, 2012-04-02. --- gcc-4.8-4.8.5.orig/debian/README.snapshot +++ gcc-4.8-4.8.5/debian/README.snapshot @@ -0,0 +1,36 @@ +Debian gcc-snapshot package +=========================== + +This package contains a recent development SNAPSHOT of all files +contained in the GNU Compiler Collection (GCC). + +DO NOT USE THIS SNAPSHOT FOR BUILDING DEBIAN PACKAGES! + +This package will NEVER hit the testing distribution. It's used for +tracking gcc bugs submitted to the Debian BTS in recent development +versions of gcc. + +To use this snapshot, you should set the following environment variables: + + LD_LIBRARY_PATH=/usr/lib/gcc-snapshot/lib:$LD_LIBRARY_PATH + PATH=/usr/lib/gcc-snapshot/bin:$PATH + +You might also like to use a shell script to wrap up this +funcationality, e.g. + +place in /usr/local/bin/gcc-snapshot and chmod +x it + +----------- snip ---------- +#! /bin/sh +LD_LIBRARY_PATH=/usr/lib/gcc-snapshot/lib:$LD_LIBRARY_PATH +PATH=/usr/lib/gcc-snapshot/bin:$PATH +gcc "$@" +----------- snip ---------- + +Make the same for g++, g77, gij, gcj, cpp, ... + +Don't forget the quotes around the $@ or gcc will not parse it's +command line correctly! + +Unset these variables before building Debian packages destined for an +upload to ftp-master.debian.org. --- gcc-4.8-4.8.5.orig/debian/README.source +++ gcc-4.8-4.8.5/debian/README.source @@ -0,0 +1,14 @@ +Patches applied to the Debian version of GCC +-------------------------------------------- + +Debian specific patches can be found in the debian/patches directory. +Quilt is used as the patch system. See /usr/share/doc/quilt/README.source +for details about quilt. + +Patches are applied by calling `debian/rules patch'. The `series' +file is constructed on the fly, configure scripts are regenerated +in the `patch' target. + +The source packages gcj-x.y and gnat-x.y do not contain copies of the +source code but build-depend on the appropriate gcc-x.y-source package +instead. --- gcc-4.8-4.8.5.orig/debian/README.ssp +++ gcc-4.8-4.8.5/debian/README.ssp @@ -0,0 +1,28 @@ +Stack smashing protection is a feature of GCC that enables a program to +detect buffer overflows and immediately terminate execution, rather than +continuing execution with corrupt internal data structures. It uses +"canaries" and local variable reordering to reduce the likelihood of +stack corruption through buffer overflows. + +Options that affect stack smashing protection: + +-fstack-protector + Enables protection for functions that are vulnerable to stack + smashing, such as those that call alloca() or use pointers. + +-fstack-protector-all + Enables protection for all functions. + +-Wstack-protector + Warns about functions that will not be protected. Only active when + -fstack-protector has been used. + +Applications built with stack smashing protection should link with the +ssp library by using the option "-lssp" for systems with glibc-2.3.x or +older; glibc-2.4 and newer versions provide this functionality in libc. + +The Debian architectures alpha, hppa, ia64, m68k, mips, mipsel do not +have support for stack smashing protection. + +More documentation can be found at the project's website: +http://researchweb.watson.ibm.com/trl/projects/security/ssp/ --- gcc-4.8-4.8.5.orig/debian/TODO +++ gcc-4.8-4.8.5/debian/TODO @@ -0,0 +1,50 @@ +(It is recommended to edit this file with emacs' todoo mode) +Last updated: 2008-05-02 + +* General + +- Clean up the sprawl of debian/rules. I'm sure there are neater + ways to do some of it; perhaps split it up into some more files? + Partly done. + +- Make debian/rules control build the control file without unpacking + the sources or applying patches. Currently, it unpacks the sources, + patches them, creates the control file, and a subsequent + dpkg-buildpackage deletes the sources, re-unpacks them, and + re-patches them. + +- Reorganise debian/rules.defs to decide which packages to build in a + more straightforward and less error-prone fashion: (1) start with + all languages; override the list of languages depending on the name + of the source package (gcc-4.3, gnat-4.3, gdc-4.3, gcj-4.3). (2) + filter the list of languages depending on the target platform; (3) + depending on the languages to build, decide on which libraries to + build. + +o [Ludovic Brenta] Ada + +- Done: Link the gnat tools with libgnat.so, instead of statically. + +- Done: Build libgnatvsn containing parts of the compiler (version + string, etc.) under GNAT-Modified GPL. Link the gnat tools with it. + +- Done: Build libgnatprj containing parts of the compiler (the project + manager) under pure GPL. Link the gnat tools with it. + +- Done: Build both the zero-cost and setjump/longjump exceptions + versions of libgnat. In particular, gnat-glade (distributed systems) + works best with SJLJ. + +- Done: Re-enable running the test suite. + +- Add support for building cross-compilers. + +- Add support for multilib (not yet supported upstream). + +* Fortran + +- gfortran man page generation + +* Java + +- build java-gcj-compat from the gcc source? --- gcc-4.8-4.8.5.orig/debian/acats-killer.sh +++ gcc-4.8-4.8.5/debian/acats-killer.sh @@ -0,0 +1,62 @@ +#! /bin/sh + +# on ia64 systems, the acats hangs in unaligned memory accesses. +# kill these testcases. + +pidfile=acats-killer.pid + +usage() +{ + echo >&2 "usage: `basename $0` [-p ] " + exit 1 +} + +while [ $# -gt 0 ]; do + case $1 in + -p) + pidfile=$2 + shift + shift + ;; + -*) + usage + ;; + *) + break + esac +done + +[ $# -eq 2 ] || usage + +logfile=$1 +stopfile=$2 +interval=30 + +echo $$ > $pidfile + +while true; do + if [ -f "$stopfile" ]; then + echo "`basename $0`: finished." + rm -f $pidfile + exit 0 + fi + sleep $interval + if [ ! -f "$logfile" ]; then + continue + fi + pids=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') + if [ -n "$pids" ]; then + sleep $interval + pids2=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') + if [ "$pids" = "$pids2" ]; then + #echo kill: $pids + kill $pids + sleep 1 + pids2=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') + if [ "$pids" = "$pids2" ]; then + #echo kill -9: $pids + kill -9 $pids + fi + fi + fi +done --- gcc-4.8-4.8.5.orig/debian/bin-wrapper.in +++ gcc-4.8-4.8.5/debian/bin-wrapper.in @@ -0,0 +1,11 @@ +#! /bin/sh + +# some build tools are linked with a new libstdc++ and fail to run +# when building libstdc++. + +if [ -n "$LD_LIBRARY_PATH" ]; then + ma=$(dpkg-architecture -qDEB_BUILD_MULTIARCH) + export LD_LIBRARY_PATH="/lib/$ma:/usr/lib/$ma:/lib:/usr/lib:$LD_LIBRARY_PATH" +fi + +exec /usr/bin/$(basename $0) "$@" --- gcc-4.8-4.8.5.orig/debian/changelog +++ gcc-4.8-4.8.5/debian/changelog @@ -0,0 +1,12577 @@ +gcc-4.8 (4.8.5-4ubuntu3) yakkety; urgency=medium + + * Fix libjava testsuite with dejagnu 1.6, taken from the trunk. + * Fix PR rtl-optimization/68955, PR rtl-optimization/64557, taken from 4.9. + LP: #1471949. + * Bump standards version. + + -- Matthias Klose Fri, 06 May 2016 19:03:29 +0200 + +gcc-4.8 (4.8.5-4ubuntu2) xenial; urgency=medium + + * Fix dependencies on target libraries which are not built anymore + from this source. + + -- Matthias Klose Mon, 25 Jan 2016 18:22:13 +0100 + +gcc-4.8 (4.8.5-4ubuntu1) xenial; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Mon, 18 Jan 2016 16:33:00 +0100 + +gcc-4.8 (4.8.5-4) unstable; urgency=medium + + * Fix cross-building without having the common cross libraries installed. + * Fix dependencies on target libraries which are not built anymore + from this source. + * Update binutils-hppa64-linux-gnu dependencies. Closes: #805698. + * Allow building derivatives with rules for derivatives. Closes: #797657. + + -- Matthias Klose Mon, 18 Jan 2016 16:20:41 +0100 + +gcc-4.8 (4.8.5-3ubuntu3) xenial; urgency=medium + + * Fix thinko in last cross-build patch. + + -- Matthias Klose Wed, 16 Dec 2015 06:34:14 +0100 + +gcc-4.8 (4.8.5-3ubuntu2) xenial; urgency=medium + + * Fix cross-building the sanitizer libraries. + + -- Matthias Klose Mon, 14 Dec 2015 22:10:57 +0100 + +gcc-4.8 (4.8.5-3ubuntu1) xenial; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Sun, 13 Dec 2015 18:40:43 +0100 + +gcc-4.8 (4.8.5-3) unstable; urgency=medium + + * Fix setting the explicit libc dependency for cross builds. + * Don't build m4-nofpu multilibs on sh4, install the default multilib + into the standard location. + * gcc-4.8-hppa64: Stop providing unversioned tools using alternatives. + * Fix cross-building without having the common cross libraries installed. + * Define SONAME macros whether the libraries are built or not. + + -- Matthias Klose Sun, 13 Dec 2015 15:37:55 +0100 + +gcc-4.8 (4.8.5-2ubuntu1) xenial; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Wed, 18 Nov 2015 19:57:42 +0100 + +gcc-4.8 (4.8.5-2) unstable; urgency=medium + + * Update the Linaro support to the 4.8-2015.07 release. + * Adjust setting DH_COMPAT for dh_movefiles with updated debhelper supporting + globbing of arguments. Closes: #800248. + * Fix PR libstdc++/56158, taken from the trunk. + Addresses: #804521. LP: #1514309. + * Backport fixes to allow building with cloog-0.18.4 and isl-0.15. + * Backport PR target/67281 from the trunk (HTM fixes). LP: #1517093. + * Fix auto-loading of gdb pretty printers. LP: #1446828. + + -- Matthias Klose Wed, 18 Nov 2015 15:40:25 +0100 + +gcc-4.8 (4.8.5-1ubuntu1) wily; urgency=medium + + * GCC 4.8.5 release. + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Fri, 26 Jun 2015 00:07:51 +0200 + +gcc-4.8 (4.8.5-1) unstable; urgency=medium + + * GCC 4.8.5 release. + * Fix PR target/65711 (ARM32), don't pass '-dynamic-linker' when '-shared' + is used. + + -- Matthias Klose Thu, 25 Jun 2015 23:04:24 +0200 + +gcc-4.8 (4.8.4-4) unstable; urgency=medium + + * GCC 4.8.5 release candidate 2. + * Fix "empty-binary-package" lintian warnings. + + -- Matthias Klose Fri, 19 Jun 2015 16:06:42 +0200 + +gcc-4.8 (4.8.4-3ubuntu1) wily; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Wed, 17 Jun 2015 12:57:06 +0200 + +gcc-4.8 (4.8.4-3) unstable; urgency=medium + + * GCC 4.8.5 release candidate 1. + * Update to SVN 20150615 (r224477) from the gcc-4_8-branch. + * PR libstdc++/62258, fix for std::uncaught_exception, taken from the trunk. + LP: #1439451. + * Remove old CFLAGS/LDFLAGS settings to build gdc. + * Fix building cross compilers with dpkg 1.18. + * Update the Linaro support to the 4.8-2015.04 release. + + -- Matthias Klose Tue, 16 Jun 2015 09:35:07 +0200 + +gcc-4.8 (4.8.4-2) unstable; urgency=medium + + * Update to SVN 20150426 (r222448) from the gcc-4_8-branch. + - Fix PR libstdc++/60966, PR c/61553, PR middle-end/63704, + PR target/61413 (ARM), PR target/64358 (RS6000), PR target/64479 (SH), + PR target/64409 (x86), PR rtl-optimization/64037, PR c++/64487, + PR c++/64251, PR c++/64297, PR fortran/63733, PR fortran/64244, + PR c/64766, PR target/64882, PR rtl-optimization/61058, + PR middle-end/43631, PR tree-optimization/64563, PR target/64513, + PR middle-end/57748, PR middle-end/57748, PR target/64795, + PR fortran/64528, PR fortran/56867, PR fortran/57023, PR c/57653, + PR tree-optimization/63844 (OpenMP), PR middle-end/64199 (ice on valid), + PR tree-optimization/64493 (ice on valid), PR tree-optimization/64495 + (wrong code), PR tree-optimization/56273 (diagnostics), + PR tree-optimization/59124 (diagnostic), PR tree-optimization/64277 + (diagnostic), PR lto/65015, PR target/65163 (SH), PR target/64113 (ALPHA, + link failure), PR rtl-optimization/64557, PR rtl-optimization/63475 + (ALPHA, wrong code), PR rtl-optimization/63483 (ALPHA, wrong code), + PR target/64452 (AVR), PR target/64387 (x86, ice on valid), + PR target/64979 (wrong code), PR target/64580 (rs6000), + PR fortran/63744 (rejects valid), PR lto/65193 (ice on valid), + PR tree-optimization/61634 (ice on valid), PR target/65196 (AVR), + PR tree-optimization/63593 (ice on valid), + PR tree-optimization/65063 (wrong code), PR target/65286 (rs6000), + PR 65138/target (rs6000), PR target/53988 (SH), PR target/59593 (ARM), + PR target/64453 (ARM), PR middle-end/65409 (ice on valid), + PR tree-optimization/65388, PR fortran/65024 (ice), + PR fortran/60898 (ice on valid), PR fortran/61138, PR libgfortran/60956, + PR libstdc++/65279, PR libstdc++/65543, PR target/65849, PR target/65456, + PR target/65787, PR c++/65727, PR c++/65721, PR fortran/56674, + PR fortran/58813, PR fortran/59016, PR fortran/59024, + PR libgfortran/59513. + - s390 hotpatch backport. + - ppc64: Backport little endian swap optimization. + * Allow to build using gettext built with a newer GCC. + * Backport PR c++/62255 (rejects-valid). + * Update the Linaro support to the 4.8-2015.02 release. + * Configure with --enable-targets=powerpcle-linux on ppc64el for + backports to jessie, trusty, utopic and vivid. + * [AArch64] Fix output template for Scalar Neon->Neon register move. + LP: #1435342. + * Limit the omp.h multilib fix to Linux. Addresses: #778440. + * For ICEs, dump the preprocessed source file to stderr when in a + distro build environment. + * Apply the ada-mips patch for mips and mipsel targets only. + + -- Matthias Klose Sun, 26 Apr 2015 17:55:36 +0200 + +gcc-4.8 (4.8.4-1ubuntu15) vivid; urgency=medium + + * Update to SVN 20150327 (r221736) from the gcc-4_8-branch. + - Fix PR libstdc++/65279, PR libstdc++/65543. + - ppc64: Backport little endian swap optimization. + * Limit the omp.h multilib fix to Linux. Addresses: #778440. + * For ICEs, dump the preprocessed source file to stderr when in a + distro build environment. + * Apply the ada-mips patch for mips and mipsel targets only. + + -- Matthias Klose Fri, 27 Mar 2015 16:38:12 +0100 + +gcc-4.8 (4.8.4-1ubuntu14) vivid; urgency=medium + + * [AArch64] Fix output template for Scalar Neon->Neon register move. + LP: #1435342. + + -- Matthias Klose Mon, 23 Mar 2015 21:18:00 +0100 + +gcc-4.8 (4.8.4-1ubuntu11) vivid; urgency=medium + + * Update to SVN 20150323 (r221594) from the gcc-4_8-branch. + - Fix PR fortran/61138, PR libgfortran/60956. + * Configure with --enable-targets=powerpcle-linux on ppc64el for vivid. + + -- Matthias Klose Mon, 23 Mar 2015 16:15:05 +0100 + +gcc-4.8 (4.8.4-1ubuntu10) vivid; urgency=medium + + * Update to SVN 20150319 (r221517) from the gcc-4_8-branch. + - Fix PR middle-end/65409 (ice on valid), PR tree-optimization/65388, + PR fortran/65024 (ice), PR fortran/60898 (ice on valid). + * Configure with --enable-targets=powerpcle-linux on ppc64el for + backports to jessie, trusty and utopic. + + -- Matthias Klose Thu, 19 Mar 2015 22:59:26 +0100 + +gcc-4.8 (4.8.4-1ubuntu8) vivid; urgency=medium + + * Fix ppc64el build. + + -- Matthias Klose Wed, 11 Mar 2015 19:36:22 +0100 + +gcc-4.8 (4.8.4-1ubuntu7) vivid; urgency=medium + + * Update to SVN 20150309 (r221336) from the gcc-4_8-branch. + - Fix PR target/65286 (rs6000), PR 65138/target (rs6000), + PR target/53988 (SH), PR target/59593 (ARM), PR target/64453 (ARM). + * Update the Linaro support to the 4.8-2015.02 release. + + -- Matthias Klose Wed, 11 Mar 2015 00:06:24 +0100 + +gcc-4.8 (4.8.4-1ubuntu5) vivid; urgency=medium + + * Update to SVN 20150228 (r221076) from the gcc-4_8-branch. + - Fix PR lto/65193 (ice on valid), PR tree-optimization/61634 (ice on + valid), PR target/65196 (AVR), PR tree-optimization/63593 (ice on valid), + PR tree-optimization/65063 (wrong code). + * Backport PR c++/62255 (rejects-valid). + + -- Matthias Klose Sat, 28 Feb 2015 14:03:43 +0100 + +gcc-4.8 (4.8.4-1ubuntu4) vivid; urgency=medium + + * Update to SVN 20150225 (r220958) from the gcc-4_8-branch. + - Fix PR c/57653, PR tree-optimization/63844 (OpenMP), PR middle-end/64199 + (ice on valid), PR tree-optimization/64493 (ice on valid), + PR tree-optimization/64495 (wrong code), PR tree-optimization/56273 + (diagnostics), PR tree-optimization/59124 (diagnostic), + PR tree-optimization/64277 (diagnostic), PR lto/65015, + PR target/65163 (SH), PR target/64113 (ALPHA, link failure), + PR rtl-optimization/64557, PR rtl-optimization/63475 (ALPHA, wrong code), + PR rtl-optimization/63483 (ALPHA, wrong code), PR target/64452 (AVR), + PR target/64387 (x86, ice on valid), PR target/64979 (wrong code), + PR target/64580 (rs6000), PR fortran/63744 (rejects valid). + - s390 hotpatch backport. + + -- Matthias Klose Wed, 25 Feb 2015 10:52:46 +0100 + +gcc-4.8 (4.8.4-1ubuntu3) vivid; urgency=medium + + * Update to SVN 20150205 (r220446) from the gcc-4_8-branch. + - Fix PR c/64766, PR target/64882, PR rtl-optimization/61058, + PR middle-end/43631, PR tree-optimization/64563, PR target/64513, + PR middle-end/57748, PR middle-end/57748, PR target/64795, + PR fortran/64528, PR fortran/56867, PR fortran/57023. + * Allow to build using gettext built with a newer GCC. + + -- Matthias Klose Thu, 05 Feb 2015 14:31:53 +0100 + +gcc-4.8 (4.8.4-1ubuntu2) vivid; urgency=medium + + * Update to SVN 20150121 (r219965) from the gcc-4_8-branch. + - Fix PR libstdc++/60966, PR c/61553, PR middle-end/63704, + PR target/61413 (ARM), PR target/64358 (RS6000), PR target/64479 (SH), + PR target/64409 (x86), PR rtl-optimization/64037, PR c++/64487, + PR c++/64251, PR c++/64297, PR fortran/63733, PR fortran/64244. + + -- Matthias Klose Wed, 21 Jan 2015 21:43:20 +0100 + +gcc-4.8 (4.8.4-1ubuntu1) vivid; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Sat, 20 Dec 2014 18:12:38 +0100 + +gcc-4.8 (4.8.4-1) unstable; urgency=medium + + * GCC 4.8.4 release. + - Fix PR target/61407 (darwin), PR middle-end/58624 (ice), + PR sanitizer/64265 (wrong code). + * Require recent binutils to pass go test failures. + + -- Matthias Klose Fri, 19 Dec 2014 19:48:34 +0100 + +gcc-4.8 (4.8.3-18ubuntu2) vivid; urgency=medium + + * Update to SVN 20141211 (r218621) from the gcc-4_8-branch. + - Fix PR middle-end/64225 (missed optimization). + * Disable building the sanitizer libs on powerpc, ppc64 and ppc64. Not + yet completely ported, and causing kernel crashes running the tests. + * Don't build libphobos multilibs, there is no gdc-multilib built. + + -- Matthias Klose Thu, 11 Dec 2014 13:54:11 +0100 + +gcc-4.8 (4.8.3-18ubuntu1) vivid; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Wed, 10 Dec 2014 17:33:02 +0100 + +gcc-4.8 (4.8.3-18) unstable; urgency=medium + + * Update to SVN 20141210 (r218575) from the gcc-4_8-branch. + - Fix PR target/55351 (SH), PR tree-optimization/61686, + PR bootstrap/64213. + * Fix cross builds with dpkg-architecture unconditionally exporting + target variables. For now specify the target architecture + in debian/target. This still needs to work with older dpkg versions, + so don't "simplify" the packaging. Addresses: #768167. + + -- Matthias Klose Wed, 10 Dec 2014 13:44:26 +0100 + +gcc-4.8 (4.8.3-17ubuntu1) vivid; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Tue, 09 Dec 2014 13:19:38 +0100 + +gcc-4.8 (4.8.3-17) unstable; urgency=medium + + * Update to SVN 20141208 (r218508) from the gcc-4_8-branch. + - Fix PR target/59593 (ARM), PR c++/56493 (performance), + PR libstdc++/63840, PR libstdc++/61947, PR libstdc++/59603, + PR target/50751 (SH), PR rtl-optimization/64037i (wrong code). + + -- Matthias Klose Tue, 09 Dec 2014 09:20:49 +0100 + +gcc-4.8 (4.8.3-16) unstable; urgency=medium + + * Update to SVN 20141202 (r218278) from the gcc-4_8-branch. + - Fix PR target/64115 (powerpc), PR middle-end/64111 (ice). + * Move libphobos2.a into the gcc_lib_dir. Closes: #771647. + + -- Matthias Klose Tue, 02 Dec 2014 17:46:26 +0100 + +gcc-4.8 (4.8.3-15) unstable; urgency=medium + + * Update to SVN 20141128 (r218178) from the gcc-4_8-branch. + - Fix PR fortran/63938 (OpenMP), PR libgomp/61200 (OpenMP, ice), + PR middle-end/64067 (ice), PR rtl-optimization/63659 (wrong code), + PR preprocessor/60436 (ice). + - This adds the backports as found in gcc-4.9 4.9.2-4. + + -- Matthias Klose Sat, 29 Nov 2014 01:58:32 +0100 + +gcc-4.8 (4.8.3-14) unstable; urgency=medium + + * Update to SVN 20141128 (r218162) from the gcc-4_8-branch. + - Fix PR target/56846 (ARM), PR tree-optimization/61969 (wrong code), + PR tree-optimization/62031 (wrong code), PR tree-optimization/63379 + (wrong code), PR tree-optimization/63605 (wrong code), PR middle-end/63665 + (wrong code), PR target/60111 (SH), PR target/63673 (rs6000), + PR target/63947 (x86), PR tree-optimization/62167 (wrong code), + PR tree-optimization/63841 (wrong code), PR ipa/63838 (wrong code), + PR c++/63455 (ice), PR c++/63415 (ice), PR c++/56710 (ice), + PR c++/58624 (ice), PR ada/47500, PR libfortran/63589. + - Fixes for Cortex-A53 Erratum 835769 (AArch64). + + [ Matthias Klose ] + * Fix the libphobos cross build. + * Fix typo in the libstdc++ HTML docs. Addresses: #766498. + * Use doxygen's copy of jquery.js for the libstdc++ docs. Addresses: #766499. + * Support building the gcc-4.8 base package only. + + [ Aurelien Jarno ] + * Always configure sh4-linux with --with-multilib-list=m4,m4-nofpu, + even with multilib disabled, as it doesn't produce additional + libraries. + + -- Matthias Klose Fri, 28 Nov 2014 17:31:35 +0100 + +gcc-4.8 (4.8.3-13) unstable; urgency=medium + + * Update to SVN 20141014 (r216202) from the gcc-4_8-branch. + + -- Matthias Klose Tue, 14 Oct 2014 16:20:41 +0200 + +gcc-4.8 (4.8.3-12ubuntu3) utopic; urgency=medium + + * Fix the libphobos cross build. + + -- Matthias Klose Tue, 21 Oct 2014 23:30:00 +0200 + +gcc-4.8 (4.8.3-12ubuntu2) utopic; urgency=medium + + * Update to SVN 20141014 (r216202) from the gcc-4_8-branch. + - Fix PR libstdc++/63449 (docs), PR target/52941 (SH), + PR tree-optimization/63375 (wrong code), PR debug/63342 (ice), + PR target/63428 (wrong code), PR ada/63225 (ice), + PR fortran/59488 (OpenMP). + - x86: Enable reminder{sd,df,xf} and fmod{sf,df,xf} only + for flag_finite_math_only. + - rs6000 updates: + - Generate LE code for vec_lvsl and vec_lvsr that is compatible + with BE code. + - Warn for deprecated use of vec_lvsl and vec_lvsr for little endian. + - libcpp: Revise search_line_fast to avoid old unaligned load sequences. + + -- Matthias Klose Tue, 14 Oct 2014 16:41:31 +0200 + +gcc-4.8 (4.8.3-12ubuntu1) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Wed, 01 Oct 2014 13:47:00 +0200 + +gcc-4.8 (4.8.3-12) unstable; urgency=high + + * Update to SVN 20140930 (r215742) from the gcc-4_8-branch. + + [ Aurelien Jarno ] + * Default to mips64 ISA on mips64el, with tuning for mips64r2. + + [ Matthias Klose ] + * Don't suggest libbacktrace-dbg and binutils-gold. Closes: #762640. + + -- Matthias Klose Sat, 13 Sep 2014 11:16:01 +0200 + +gcc-4.8 (4.8.3-11ubuntu1) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Sat, 13 Sep 2014 11:50:09 +0200 + +gcc-4.8 (4.8.3-11) unstable; urgency=medium + + * Update to SVN 20140913 (r215236) from the gcc-4_8-branch. + * Fix installation of the libstdc++ documentation. Addresses: #760872. + + -- Matthias Klose Sat, 13 Sep 2014 11:16:01 +0200 + +gcc-4.8 (4.8.3-10ubuntu1) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Sun, 31 Aug 2014 23:12:18 +0200 + +gcc-4.8 (4.8.3-10) unstable; urgency=medium + + * Update to SVN 20140831 (r214767) from the gcc-4_8-branch. + + [ Samuel Thibault ] + * boehm-gc: use anonymous mmap instead of brk also on hurd-*. + + -- Matthias Klose Sun, 31 Aug 2014 21:04:10 +0200 + +gcc-4.8 (4.8.3-9ubuntu1) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Wed, 20 Aug 2014 12:15:53 +0200 + +gcc-4.8 (4.8.3-9) unstable; urgency=medium + + * Update to SVN 20140820 (r214213) from the gcc-4_8-branch. + * Backport PR lto/62032. + * Fix PR tree-optimization/59586, graphite segfault, taken from the trunk. + LP: #1227789. + + -- Matthias Klose Wed, 20 Aug 2014 11:25:25 +0200 + +gcc-4.8 (4.8.3-8ubuntu1) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Fri, 15 Aug 2014 01:21:58 +0200 + +gcc-4.8 (4.8.3-8) unstable; urgency=medium + + * Update to SVN 20140814 (r213981) from the gcc-4_8-branch. + * Add build dependency on systemtap-sdt-dev. + * Backport Python3 pretty printer support (Samuel Bronson). + * Proposed backport for PR libstdc++/61841. Closes: #749290. + * Build-depend on dpkg-dev (>= 1.7.11). + + -- Matthias Klose Thu, 14 Aug 2014 21:50:18 +0200 + +gcc-4.8 (4.8.3-7ubuntu1) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Fri, 01 Aug 2014 12:25:27 +0200 + +gcc-4.8 (4.8.3-7) unstable; urgency=medium + + * Update to SVN 20140801 (r213447) from the gcc-4_8-branch. + - CVE-2014-5044, fix integer overflows in array allocation in libgfortran. + Closes: #756325. + - Fix PR tree-optimization/61964. LP: #1347147. + * Fix java.security symlink. Addresses: #756484. + + -- Matthias Klose Fri, 01 Aug 2014 12:07:59 +0200 + +gcc-4.8 (4.8.3-6ubuntu1) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + * Update to SVN 20140728 (r213129) from the gcc-4_8-branch. + - Properly fix PR libobjc/61920 on the 4.8 branch. + + -- Matthias Klose Mon, 28 Jul 2014 17:15:24 +0200 + +gcc-4.8 (4.8.3-6) unstable; urgency=medium + + * Update to SVN 20140725 (r213051) from the gcc-4_8-branch. + * Don't gzip the xz compressed testsuite logs and summaries. + + -- Matthias Klose Fri, 25 Jul 2014 12:25:44 +0200 + +gcc-4.8 (4.8.3-5ubuntu2) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 17 Jul 2014 16:35:44 +0200 + +gcc-4.8 (4.8.3-5) unstable; urgency=medium + + * Update to SVN 20140717 (r212756) from the gcc-4_8-branch. + * Warn about ppc ELFv2 ABI issues, which will change in GCC 4.10. + * Fix installing test logs and summaries. + + -- Matthias Klose Thu, 17 Jul 2014 16:12:10 +0200 + +gcc-4.8 (4.8.3-4ubuntu2) utopic; urgency=medium + + * Update to SVN 20140701 (r212193) from the gcc-4_8-branch. + + -- Matthias Klose Tue, 01 Jul 2014 11:24:46 +0200 + +gcc-4.8 (4.8.3-4ubuntu1) utopic; urgency=medium + + * Update to SVN 20140626 (r212051) from the gcc-4_8-branch. + + -- Matthias Klose Thu, 26 Jun 2014 21:30:17 +0200 + +gcc-4.8 (4.8.3-4) unstable; urgency=medium + + * Update to SVN 20140626 (r212014) from the gcc-4_8-branch. + + [ Aurelien Jarno ] + * Fix PR c++/61336, taken from the trunk. + + [ Matthias Klose ] + * Fix removal of python byte-code files in libstdc++6. Addresses: #751435. + * Fix a segfault in the driver from calling free on non-malloc'd area. + * Remove version requirement for dependency on make. Addresses: #751891. + * Drop versioned build dependency on gdb, and apply the pretty printer + patch for libstdc++ based on the release. + + -- Matthias Klose Thu, 26 Jun 2014 10:59:38 +0200 + +gcc-4.8 (4.8.3-3ubuntu3) utopic; urgency=medium + + * No-change rebuild. + + -- Matthias Klose Wed, 18 Jun 2014 00:31:20 +0200 + +gcc-4.8 (4.8.3-3ubuntu2) utopic; urgency=medium + + * Update to SVN 20140616 (r211693) from the gcc-4_8-branch. + + -- Matthias Klose Mon, 16 Jun 2014 09:46:38 +0200 + +gcc-4.8 (4.8.3-3ubuntu1) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Sat, 07 Jun 2014 10:10:24 +0200 + +gcc-4.8 (4.8.3-3) unstable; urgency=medium + + * Update to SVN 20140606 (r211339) from the gcc-4_8-branch. + * Don't install the libstdc++ pretty printer file into the debug directory, + but into the gdb auto-load directory. + * Fix the removal of the libstdc++6 package, removing byte-compiled pretty + printer files and pycache directories. + * Fix PR c++/61046, taken from the trunk. LP: #1313102. + + -- Matthias Klose Sat, 07 Jun 2014 02:28:40 +0200 + +gcc-4.8 (4.8.3-2ubuntu1) utopic; urgency=medium + + * Update the fix for PR target/61208 for the Linaro branch. + + -- Matthias Klose Tue, 27 May 2014 09:36:52 +0200 + +gcc-4.8 (4.8.3-2) unstable; urgency=medium + + * Update to SVN 20140527 (r210956) from the gcc-4_8-branch. + - Fix PR target/61208. Closes: #748422. + + -- Matthias Klose Tue, 27 May 2014 09:31:55 +0200 + +gcc-4.8 (4.8.3-1ubuntu4) utopic; urgency=medium + + * Update to SVN 20140526 (r210209) from the gcc-4_8-branch. + - Fix PR target/61208 (ARM). Closes: #748422. + - PR target/61231 (powerpc). + - Fix HTM __builtin_ttest rtl expansion. LP: #1322287. + + -- Matthias Klose Mon, 26 May 2014 11:11:27 +0200 + +gcc-4.8 (4.8.3-1ubuntu3) utopic; urgency=medium + + * Update the gcc-linaro-doc patch for GCC 4.8.3. + + -- Matthias Klose Thu, 22 May 2014 15:24:51 +0200 + +gcc-4.8 (4.8.3-1ubuntu2) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 22 May 2014 13:06:23 +0200 + +gcc-4.8 (4.8.3-1) unstable; urgency=medium + + * GCC 4.8.3 release. + * Update the gdc tarball, drop the gdc-updates patch. + * Refresh patches. + * Build libitm on AArch64, patch taken from the trunk. + * Drop the libstdc++-arm-wno-abi patch, not needed anymore in 4.8. + + -- Matthias Klose Tue, 20 May 2014 00:27:51 +0200 + +gcc-4.8 (4.8.2-23ubuntu1) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Sun, 18 May 2014 15:20:05 +0200 + +gcc-4.8 (4.8.2-23) unstable; urgency=medium + + * GCC 4.8.3 release candidate 1. + * Update to SVN 20140516 (r210514) from the gcc-4_8-branch. + * Apply the proposed patch for PR driver/61126. + * Update the libstdc++v-python3 patch. Closes: #748317. + * Update the gcc-default-format-security patch (Steve Beattie). LP: #1317305. + + -- Matthias Klose Sun, 18 May 2014 13:50:27 +0200 + +gcc-4.8 (4.8.2-22) unstable; urgency=medium + + * Update to SVN 20140508 (r210209) from the gcc-4_8-branch. + * Install only versioned gcc-ar gcc-nm gcc-ranlib binaries for the hppa64 + cross compiler, update hppa64 alternatives. Closes: #745967. + * Fix the as and ld symlinks for the hppa64 cross compiler. + * Ensure that the common libs (built from the next GCC version) are + available when building without common libs. + * Fix java.security symlink in libgcj14. Closes: #746786. + * Move the libstdc++ gdb pretty printers into libstdc++6, install the + -gdb.py files into /usr/share/gdb/auto-load. + * Set the 'Multi-Arch: same' attribute for packages, cross built with + with_deps_on_target_arch_pkgs=yes (Helmit Grohne). Closes: #716795. + * Build the gcc-X.Y-base package with with_deps_on_target_arch_pkgs=yes + (Helmit Grohne). Closes: #744782. + * Apply the proposed patch for PR driver/61106. Closes: #747345. + + -- Matthias Klose Thu, 08 May 2014 14:09:04 +0200 + +gcc-4.8 (4.8.2-21ubuntu1) utopic; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 24 Apr 2014 19:07:48 +0200 + +gcc-4.8 (4.8.2-21) unstable; urgency=medium + + * Update to SVN 20140424 (r209749) from the gcc-4_8-branch. + * gcc-4.8: Re-add lost dependency on libgcc-4.8-dev. Closes: #745709. + + -- Matthias Klose Thu, 24 Apr 2014 16:34:10 +0200 + +gcc-4.8 (4.8.2-20) unstable; urgency=medium + + * Update to SVN 20140423 (r209678) from the gcc-4_8-branch. + * Explicitly configure with --disable-multilib on sparc64 when no + multilibs are requested (Helmut Grohne). Closes: #743342. + * Update powerpcspe patches for the branch (Helmut Grohne). Closes: #743718. + * Remove more mudflap left overs. Addresses: #742606. + * Adjust common_libs, libraries common to GCC 4.9. + * Disable running the testsuite on kfreebsd, hangs the buildds. + * Stop build packages built by GCC 4.9. + + -- Matthias Klose Wed, 23 Apr 2014 11:13:07 +0200 + +gcc-4.8 (4.8.2-19ubuntu1) trusty; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + - Don't build the libgcc packages, now built from gcc-4.9. + + -- Matthias Klose Fri, 04 Apr 2014 19:36:41 +0200 + +gcc-4.8 (4.8.2-19) unstable; urgency=medium + + * Update to SVN 20140404 (r209122) from the gcc-4_8-branch. + - Fix PR rtl-optimization/60700 (wrong code on x86), + PR rtl-optimization/57637 (wrong code on ARM in SPEC2000), + PR target/60039 (SH), PR ada/60703. + + [ Matthias Klose ] + * Include include and include-fixed header files into the stage1 + gcc-4.8 package. + * Explicitly configure with --disable-multilib on sparc64 when no + multilibs are requested (Helmut Grohne). Closes: #743342. + * Fix PR target/60034 (AArch64), taken from the trunk. LP: #1270789. + * Update ada-ppc64.diff from the gnat-4.9 package, fixing the gnat build + on powerpc. + * Fix PR target/60609 (ARM), proposed patch (Charles Baylis). LP: #1295653. + * Build libphobos for armel and armhf. + * Include the gnu triplet prefixed gcov and gcc-{ar,nm,ranlib} binaries. + * Stop building ppc64el from the ibm branch, now integrated in the fsf + branch. + + [ Iain Buclaw ] + * Update the GDC frontend (20140401). + + -- Matthias Klose Fri, 04 Apr 2014 19:32:58 +0200 + +gcc-4.8 (4.8.2-17ubuntu2) trusty; urgency=medium + + * Update to SVN 20140329 (r208938) from the gcc-4_8-branch. + - Fix PR libstdc++/60658 (std::atomic is unexpectedly not lock-free), + PR libstdc++/59548 (abort in debug mode), + PR rtl-optimization/60601 (ice), PR tree-optimization/60429 (wrong code + building Qt with -O3), PR rtl-optimization/60452 (wrong code with -O1 + and large offsets in the frame), + PR ipa/60419 (ice-on-valid-code with -O3, LP: #1286343), + PR fortran/60522 (ice-on-valid-code), PR fortran/60576 (wrong code), + PR fortran/60677 (wrong code). + * Don't ignore DEB_CROSS_NO_BIARCH=yes ignored for DEB_TARGET_ARCH=x32. + (Helmut Grohne). Closes: #742358. + * debian/patches/ada-ppc64.diff: Fix for ppc64el (Ulrich Weigand). + * Avoid clobbering stack pointer via P8 fusion peephole. fixing Ada build + on ppc64el (Ulrich Weigand). + * Fix cross building targeting x32 (Helmut Grohne). Closes: #742539. + + -- Matthias Klose Sat, 29 Mar 2014 16:32:05 +0100 + +gcc-4.8 (4.8.2-17ubuntu1) trusty; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Fri, 21 Mar 2014 17:46:46 +0100 + +gcc-4.8 (4.8.2-17) unstable; urgency=medium + + * Update to SVN 20140320 (r208738) from the gcc-4_8-branch. + * Update the Linaro support to the 4.8-2014.03 release. + * Update the ibm branch to SVN 20140320 (r208622). + * Fix PR target/58595, ARM TLS handling. Taken from the trunk. + * Create a dummy arm-acle-intrinsics.texi exists for AArch64 builds + (Wookey). Closes: #742165. + + -- Matthias Klose Fri, 21 Mar 2014 10:47:08 +0100 + +gcc-4.8 (4.8.2-16ubuntu6) trusty; urgency=medium + + * Update to SVN 20140306 (r208384) from the gcc-4_8-branch. + * Update the ibm branch to SVN 20140306 (r208322). + * Fix PR target/58595, ARM TLS handling. Taken from the trunk. + + -- Matthias Klose Thu, 06 Mar 2014 15:30:27 +0100 + +gcc-4.8 (4.8.2-16ubuntu5) trusty; urgency=medium + + * Update to SVN 20140303 (r208303) from the gcc-4_8-branch. + * Update the ibm branch to SVN 20140304 (r208291). + + -- Matthias Klose Tue, 04 Mar 2014 10:28:21 +0100 + +gcc-4.8 (4.8.2-16ubuntu4) trusty; urgency=medium + + * Update to SVN 20140226 (r208166) from the gcc-4_8-branch. + * Update the ibm branch to SVN 20140226 (r208166). + + -- Matthias Klose Wed, 26 Feb 2014 08:53:56 +0100 + +gcc-4.8 (4.8.2-16ubuntu3) trusty; urgency=medium + + * Update the ibm branch to SVN 20140224 (r208054). + * Re-add gcc-4.8 dependency on libgcc-4.8-dev. LP: #1283850. + + -- Matthias Klose Mon, 24 Feb 2014 11:40:55 +0100 + +gcc-4.8 (4.8.2-16ubuntu2) trusty; urgency=medium + + * Update to SVN 20140221 (r208010) from the gcc-4_8-branch. + * Update the ibm branch to SVN 20140221 (r207920). + * Enable SSP by default on AArch64. + * Build libgcc packages for cross builds in trusty. + + -- Matthias Klose Fri, 21 Feb 2014 19:42:07 +0100 + +gcc-4.8 (4.8.2-16ubuntu1) trusty; urgency=medium + + * Stop building the libgcc1 packages, now built by gccgo-4.9. + + -- Matthias Klose Tue, 18 Feb 2014 12:17:00 +0100 + +gcc-4.8 (4.8.2-16) unstable; urgency=medium + + * Update to SVN 20140217 (r207828) from the gcc-4_8-branch. + * Update the ibm branch to SVN 20140211 (r207700). + * Update the Linaro support to the 4.8-2014.02 release. + * Fix gij wrapper script on hppa. Closes: #739224. + + -- Matthias Klose Mon, 17 Feb 2014 21:46:34 +0100 + +gcc-4.8 (4.8.2-15ubuntu3) trusty; urgency=medium + + * Only build using the ibm branch on ppc64el. + + -- Matthias Klose Wed, 12 Feb 2014 00:16:44 +0100 + +gcc-4.8 (4.8.2-15ubuntu2) trusty; urgency=medium + + * Update to SVN 20140211 (r207700) from the gcc-4_8-branch. + * Update the ibm branch to SVN 20140211 (r207700). + + -- Matthias Klose Tue, 11 Feb 2014 23:41:13 +0100 + +gcc-4.8 (4.8.2-15ubuntu1) trusty; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Sun, 09 Feb 2014 12:36:11 +0100 + +gcc-4.8 (4.8.2-15) unstable; urgency=medium + + * Update to SVN 20140209 (r207641) from the gcc-4_8-branch. + - Fix inconsistent install paths between gccgo and go tool. LP: #1271340. + * Update the ibm branch to SVN 20140207 (r207580). + * armhf: Fix ffi_call_VFP with no VFP arguments (Will Newton). + * Apply proposed patch for PR target/59799, allow passing arrays in + registers on AArch64 (Michael Hudson). + * gcc-4.8-base: Update gcc-4.7-base breaks for updates from wheezy. + Closes: #736607. + + -- Matthias Klose Sun, 09 Feb 2014 11:18:55 +0100 + +gcc-4.8 (4.8.2-14ubuntu4) trusty; urgency=medium + + * Re-upload with the testsuite disabled (hangs on the AArch64 buildds). + + -- Matthias Klose Sat, 25 Jan 2014 00:24:02 +0100 + +gcc-4.8 (4.8.2-14ubuntu3) trusty; urgency=medium + + * Update to SVN 20140124 (r207027) from the gcc-4_8-branch. + - Fix inconsistent install paths between gccgo and go tool. LP: #1271340. + * armhf: Fix ffi_call_VFP with no VFP arguments (Will Newton). + * Apply proposed patch for PR target/59799, allow passing arrays in + registers on AArch64 (Michael Hudson). + + -- Matthias Klose Fri, 24 Jan 2014 14:03:17 +0100 + +gcc-4.8 (4.8.2-14ubuntu2) trusty; urgency=medium + + * Update to SVN 20140117 (r206726) from the gcc-4_8-branch. + * Update the ibm branch to SVN 20140117 (r206670). + + -- Matthias Klose Fri, 17 Jan 2014 19:58:09 +0100 + +gcc-4.8 (4.8.2-14ubuntu1) trusty; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Wed, 15 Jan 2014 15:44:15 +0100 + +gcc-4.8 (4.8.2-14) unstable; urgency=medium + + * Update to SVN 20140115 (r206629) from the gcc-4_8-branch. + * Fix call frame information in ffi_closure_SYSV on AArch64. + * Update powerpcspe patches (Roland Stigge). Closes: #735316. + + -- Matthias Klose Wed, 15 Jan 2014 14:12:09 +0100 + +gcc-4.8 (4.8.2-13ubuntu1) trusty; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Sun, 12 Jan 2014 14:16:19 +0100 + +gcc-4.8 (4.8.2-13) unstable; urgency=medium + + * Update to SVN 20140112 (r206564) from the gcc-4_8-branch. + - Fix miscompilation due to wrong RTL-optimization (see + PR rtl-optimization/59137). Closes: #716635. + + [ Aurelien Jarno ] + * Reenable the testsuite on mips. + + [ Matthias Klose ] + * Add libgcc, libstdc++, libgfortran symbols files for ppc64el. + * Update libitm symbols for non-default multilibs. + * Add libgcc, libstdc++, libgfortran symbols files for arm64. + * Fix PR target/59588 (AArch64), backport proposed patch. LP: #1263576. + * Fix PR target/59744 (AArch64), taken from the trunk. LP: #1267761. + + -- Matthias Klose Sun, 12 Jan 2014 14:14:42 +0100 + +gcc-4.8 (4.8.2-12ubuntu2) trusty; urgency=medium + + * Remove gnat build dependency. + + -- Matthias Klose Mon, 06 Jan 2014 03:00:48 +0100 + +gcc-4.8 (4.8.2-12ubuntu1) trusty; urgency=medium + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Mon, 06 Jan 2014 02:47:29 +0100 + +gcc-4.8 (4.8.2-12) unstable; urgency=medium + + * Update to SVN 20140106 (r206351) from the gcc-4_8-branch. + * Only apply m68k specific backports when targeting m68k. + + -- Matthias Klose Mon, 06 Jan 2014 02:35:00 +0100 + +gcc-4.8 (4.8.2-11) unstable; urgency=low + + * Update to SVN 20131230 (r206241) from the gcc-4_8-branch. + * Don't build x32 multilibs for wheezy backports. + * Set the goarch to arm64 for aarch64-linux-gnu. + * Fix statically linked gccgo binaries on AArch64 (Michael Hudson). + LP: #1261604. + * Merge accumulated Ada changes from gnat-4.8. + * Update gnat build dependencies when not built from a separate source. + * Default to -mieee on alpha again (Michael Cree). Closes: #733291. + * Prepare gnat package for cross builds. + + -- Matthias Klose Mon, 30 Dec 2013 08:52:29 +0100 + +gcc-4.8 (4.8.2-10ubuntu2) trusty; urgency=low + + * Update to SVN 20131220 (r206145) from the gcc-4_8-branch. + * Set the goarch to arm64 for aarch64-linux-gnu. + * Fix statically linked gccgo binaries on AArch64 (Michael Hudson). + LP: #1261604. + * Merge accumulated Ada changes from gnat-4.8. + * Update gnat build dependencies when not built from a separate source. + + -- Matthias Klose Fri, 20 Dec 2013 18:24:08 +0100 + +gcc-4.8 (4.8.2-10ubuntu1) trusty; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + * Re-enable running the testsuite. + + -- Matthias Klose Fri, 13 Dec 2013 01:22:20 +0100 + +gcc-4.8 (4.8.2-10) unstable; urgency=low + + * Update to SVN 20131213 (r205948) from the gcc-4_8-branch. + * Add missing commit in libjava for gcc-linaro. + + -- Matthias Klose Fri, 13 Dec 2013 01:01:47 +0100 + +gcc-4.8 (4.8.2-9ubuntu2) trusty; urgency=low + + * Add missing commit in libjava for gcc-linaro. + + -- Matthias Klose Thu, 12 Dec 2013 16:54:27 +0100 + +gcc-4.8 (4.8.2-9ubuntu1) trusty; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 12 Dec 2013 12:31:04 +0100 + +gcc-4.8 (4.8.2-9) unstable; urgency=low + + * Update to SVN 20131212 (r205924) from the gcc-4_8-branch. + + [ Matthias Klose ] + * Fix libitm symbols files for ppc64. + * Update libatomic symbol file for arm64 and ppc64. + * libgcj-dev: Drop dependencies on gcj-jre-lib and gcj-jdk. + * Fix permissions of some override files. + * Let cross compilers conflict with gcc-multilib (providing + /usr/include/asm for the non-default multilib). + * Configure --with-long-double-128 on powerpcspe (Roland Stigge). + Closes: #731941. + * Update the Linaro support to the 4.8-2013.12 release. + * Update the ibm branch to 20131212. + + [ Aurelien Jarno ] + * patches/note-gnu-stack.diff: restore and rebase lost parts. + + -- Matthias Klose Thu, 12 Dec 2013 12:34:55 +0100 + +gcc-4.8 (4.8.2-8ubuntu1) trusty; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Wed, 04 Dec 2013 01:22:24 +0100 + +gcc-4.8 (4.8.2-8) unstable; urgency=medium + + * Update to SVN 20131203 (r205647) from the gcc-4_8-branch. + * Fix PR libgcc/57363, taken from the trunk. + + -- Matthias Klose Wed, 04 Dec 2013 01:21:10 +0100 + +gcc-4.8 (4.8.2-7ubuntu1) trusty; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Fri, 29 Nov 2013 19:09:33 +0100 + +gcc-4.8 (4.8.2-7) unstable; urgency=low + + * Update to SVN 20131129 (r205535) from the gcc-4_8-branch. + * Introduce aarch64 goarch. + * libgo: Backport fix for calling a function or method that takes or returns + an empty struct via reflection. + * go frontend: Backport fix for the generated hash functions of types that + are aliases for structures containing unexported fields. + * Skip Go testcase on AArch64 which hangs on the buildds. + * Fix freetype includes in libjava/classpath. + + -- Matthias Klose Fri, 29 Nov 2013 18:19:12 +0100 + +gcc-4.8 (4.8.2-6ubuntu2) trusty; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 28 Nov 2013 15:41:43 +0100 + +gcc-4.8 (4.8.2-6) unstable; urgency=low + + * Update to SVN 20131128 (r205478) from the gcc-4_8-branch. + + [ Matthias Klose ] + * gcc-4.8-base: Breaks gcc-4.4-base (<< 4.4.7). Closes: #729963. + * Update the gcc-as-needed patch for mips*. Closes: #722067. + * Use dpkg-vendor information for distribution specific settings. + Closes: #697805. + * Check for the sys/auxv.h header file. + * On AArch64, make the frame grow downwards, taken from the trunk. + Enable ssp on AArch64. + * Pass -fuse-ld=gold to gccgo on targets supporting split-stack. + + [ Aurelien Jarno ] + * Update README.Debian for s390 and s390x. + + [ Thorsten Glaser ] + * m68k-ada.diff: Add gcc-4.8.0-m68k-ada-pr48835-2.patch and + gcc-4.8.0-m68k-ada-pr51483.patch by Mikael Pettersson, to + fix more CC0-specific and m68k/Ada-specific problems. + * m68k-picflag.diff: New, backport from trunk, by Andreas Schwab, + to avoid relocation errors when linking big shared objects. + * pr58369.diff: New, backport from trunk, by Jeffrey A. Law, + to fix ICE while building boost 1.54 on m68k. + * pr52306.diff: Disables -fauto-inc-dec by default on m68k to + work around ICE when building C++ code (e.g. Qt-related). + + -- Matthias Klose Thu, 28 Nov 2013 10:29:09 +0100 + +gcc-4.8 (4.8.2-5ubuntu3) trusty; urgency=low + + * Update to SVN 20131119 (r205005) from the gcc-4_8-branch. + + -- Matthias Klose Tue, 19 Nov 2013 08:12:38 +0100 + +gcc-4.8 (4.8.2-5ubuntu2) trusty; urgency=low + + * Fix build failure on powerpc. + + -- Matthias Klose Mon, 18 Nov 2013 08:14:00 +0100 + +gcc-4.8 (4.8.2-5ubuntu1) trusty; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Mon, 18 Nov 2013 06:29:52 +0100 + +gcc-4.8 (4.8.2-5) unstable; urgency=low + + * Update to SVN 20131115 (r204839) from the gcc-4_8-branch. + * Update the Linaro support to the 4.8-2013.11 release. + * Add missing replaces in libgcj14. Closes: #729022. + + -- Matthias Klose Sat, 16 Nov 2013 20:15:09 +0100 + +gcc-4.8 (4.8.2-4ubuntu1) trusty; urgency=low + + * Fix LP #1243656, miscompilation of tar on armhf. + + -- Matthias Klose Wed, 13 Nov 2013 10:12:35 +0100 + +gcc-4.8 (4.8.2-4) unstable; urgency=low + + * Really fix disabling the gdc tests. + + -- Matthias Klose Wed, 13 Nov 2013 00:44:35 +0100 + +gcc-4.8 (4.8.2-3) unstable; urgency=low + + * Update to SVN 20131112 (r204704) from the gcc-4_8-branch. + * Don't ship java.security in both libgcj14 and gcj-4.8-headless. + Closes: #729022. + * Disable gdc tests on architectures without libphobos port. + + -- Matthias Klose Tue, 12 Nov 2013 18:08:44 +0100 + +gcc-4.8 (4.8.2-2ubuntu1) trusty; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 07 Nov 2013 16:27:04 +0100 + +gcc-4.8 (4.8.2-2) unstable; urgency=low + + * Update to SVN 20131017 (r204496) from the gcc-4_8-branch. + * Build ObjC, Obj-C++ and Go for AArch64. + * Fix some gcj symlinks. Closes: #726792, #728403. + * Stop building libmudflap (removed in GCC 4.9). + + -- Matthias Klose Thu, 07 Nov 2013 01:40:15 +0100 + +gcc-4.8 (4.8.2-1ubuntu2) trusty; urgency=low + + * Build ObjC, Obj-C++ and Go for AArch64. + + -- Matthias Klose Mon, 21 Oct 2013 00:07:57 +0200 + +gcc-4.8 (4.8.2-1ubuntu1) trusty; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Wed, 16 Oct 2013 13:43:20 +0200 + +gcc-4.8 (4.8.2-1) unstable; urgency=low + + * GCC 4.8.2 release. + + * Update to SVN 20131017 (r203751) from the gcc-4_8-branch. + * Update the Linaro support to the 4.8-2013.10 release. + * Fix PR c++/57850, option -fdump-translation-unit not working. + * Don't run the testsuite on aarch64. + * Fix PR target/58578, wrong-code regression on ARM. LP: #1232017. + * [ARM] Fix bug in add patterns due to commutativity modifier, + backport from trunk. LP: #1234060. + * Build libatomic on AArch64. + * Fix dependency generation for the cross gcc-4.8 package. + * Make the libstdc++ pretty printers compatible with Python3, if + gdb is built with Python3 support. + * Fix loading of libstdc++ pretty printers. Closes: #701935. + * Don't let gcc-snapshot build-depend on gnat on AArch64. + + -- Matthias Klose Thu, 17 Oct 2013 14:37:55 +0200 + +gcc-4.8 (4.8.1-10ubuntu7) saucy; urgency=low + + * Update to SVN 20131008 (r203273) from the gcc-4_8-branch. + - Fix PR libstdc++/57641, PR libstdc++/57465, PR libstdc++/58569. + - S390 updates, fix PR target/58460 (AArch64). + - Fix PR c++/58535 (ice on invalid), PR fortran/57697, PR fortran/58469. + - Go updates. + * Fix dependency generation for the cross gcc-4.8 package. + * Re-enable gcj on AArch64. + + -- Matthias Klose Tue, 08 Oct 2013 14:51:58 +0200 + +gcc-4.8 (4.8.1-10ubuntu6) saucy; urgency=low + + * [ARM] Fix bug in add patterns due to commutativity modifier, + backport from trunk. LP: #1234060. + * Build libatomic on AArch64. + + -- Matthias Klose Wed, 02 Oct 2013 14:57:31 +0200 + +gcc-4.8 (4.8.1-10ubuntu5) saucy; urgency=low + + * Update to SVN 20131001 (r203063) from the gcc-4_8-branch. + - Fix PR libstdc++/58437, PR middle-end/58463, PR tree-optimization/56716, + PR middle-end/58564, PR target/58574 (s390). + - Go updates. + * Fix PR target/58578, wrong-code regression on ARM. LP: #1232017. + + -- Matthias Klose Tue, 01 Oct 2013 18:48:31 +0200 + +gcc-4.8 (4.8.1-10ubuntu4) saucy; urgency=low + + * Update to SVN 20130927 (r202974) from the gcc-4_8-branch. + * Fix PR c++/57850, option -fdump-translation-unit not working. + * For a first arm64 build in launchpad, disable the testsuite + and don't build gcj packages. + + -- Matthias Klose Fri, 27 Sep 2013 19:00:06 +0200 + +gcc-4.8 (4.8.1-10ubuntu3) saucy; urgency=low + + * Update to SVN 20130915 (r202601) from the gcc-4_8-branch. + * Update the Linaro support to the 4.8-2013.09 release. + + -- Matthias Klose Mon, 16 Sep 2013 10:43:58 +0200 + +gcc-4.8 (4.8.1-10ubuntu2) saucy; urgency=low + + * Disable gcc-default-format-security on non-ssp arches, as it + appears to depend on the SSP patch also being applied to work. + + -- Adam Conrad Fri, 13 Sep 2013 21:19:05 -0400 + +gcc-4.8 (4.8.1-10ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 05 Sep 2013 00:36:37 +0200 + +gcc-4.8 (4.8.1-10) unstable; urgency=low + + * Update to SVN 20130904 (r202243) from the gcc-4_8-branch. + + [ Matthias Klose ] + * Don't rely on the most recent Debian release name for configuration + of the package. Addresses: #720263. Closes: #711824. + * Fix a cross build issue without DEB_* env vars set (Eleanor Chen). + Closes: #718614. + * Add packaging support for mips64(el) and mipsn32(el) including multilib + configurations (YunQiang Su). Addresses: #708143. + * Fix gcc dependencies for stage1 builds (YunQiang Su). Closes: #710240. + * Fix boehm-gc test failures with a linker defaulting to + --no-copy-dt-needed-entries. + * Fix libstdc++ and libjava test failures with a linker defaulting + to --as-needed. + * Mark the libjava/sourcelocation test as expected to fail on amd64 cpus. + * Fix some gcc and g++ test failures for a compiler with hardening + defaults enabled. + * Fix gcc-default-format-security.diff for GCC 4.8. + * Run the testsuite again on armel and armhf. + * Disable running the testsuite on mips. Fails on the buildds, preventing + migration to testing for three months. No feedback from the mips porters. + + [ Thorsten Glaser ] + * Merge several old m68k-specific patches from gcc-4.6 package: + - libffi-m68k: Rebased against gcc-4.8 and libffi 3.0.13-4. + - m68k-revert-pr45144: Needed for Ada. + - pr52714: Revert optimisation that breaks CC0 arch. + * Fix PR49847 (Mikael Pettersson). Closes: #711558. + * Use -fno-auto-inc-dec for PR52306 (Mikael Pettersson). + + -- Matthias Klose Wed, 04 Sep 2013 21:30:07 +0200 + +gcc-4.8 (4.8.1-9ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + * Re-enable running the testsuite on armhf. + + -- Matthias Klose Thu, 15 Aug 2013 14:40:11 +0200 + +gcc-4.8 (4.8.1-9) unstable; urgency=low + + * Update to SVN 20130815 (r201764) from the gcc-4_8-branch. + * Enable gomp on AArch64. + * Update the Linaro support to the 4.8-2013.08 release. + + -- Matthias Klose Thu, 15 Aug 2013 10:47:38 +0200 + +gcc-4.8 (4.8.1-8ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Tue, 23 Jul 2013 01:24:54 +0200 + +gcc-4.8 (4.8.1-8) unstable; urgency=low + + * Fix PR rtl-optimization/57878, taken from the 4.8 branch. + * Fix PR target/57909 (ARM), Linaro only. + + -- Matthias Klose Mon, 22 Jul 2013 13:03:57 +0200 + +gcc-4.8 (4.8.1-7ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 18 Jul 2013 02:12:56 +0200 + +gcc-4.8 (4.8.1-7) unstable; urgency=low + + * Update to SVN 20130717 (r200995) from the gcc-4_8-branch. + - Go 1.1.1 updates. + * Define CPP_SPEC for aarch64. + * Don't include in libgcc/libgcc2.c, taken from the trunk. + Closes: #696267. + * boehm-gc: use mmap instead of brk also on kfreebsd-* (Petr Salinger). + Closes: #717024. + + -- Matthias Klose Thu, 18 Jul 2013 02:02:13 +0200 + +gcc-4.8 (4.8.1-6ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Mon, 08 Jul 2013 18:19:02 +0200 + +gcc-4.8 (4.8.1-6) unstable; urgency=low + + * Update to SVN 20130709 (r200810) from the gcc-4_8-branch. + + [ Aurelien Jarno ] + * Add 32-bit biarch packages on sparc64. + + [ Matthias Klose ] + * Fix multiarch include path for aarch64. + * Update the Linaro support to the 4.8-2013.07 release. + * Revert the proposed fix for PR target/57637 (ARM only). + * Let gfortran-4.8 provide gfortran-mod-10. Addresses #714730. + + [ Iain Buclaw ] + * Avoid compiler warnings redefining D builtin macros. + + -- Matthias Klose Tue, 09 Jul 2013 16:18:16 +0200 + +gcc-4.8 (4.8.1-5ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Sat, 29 Jun 2013 20:16:01 +0200 + +gcc-4.8 (4.8.1-5) unstable; urgency=low + + * Update to SVN 20130629 (r200565) from the gcc-4_8-branch. + + [ Aurelien Jarno ] + * Don't pass --with-mips-plt on mips/mipsel. + + [ Matthias Klose ] + * Fix documentation builds with texinfo-5.1. + * Update the ARM libsanitizer backport from the 4.8 Linaro branch. + * libphobos-4.8-dev provides libphobos-dev (Peter de Wachter). + * The gdc cross compiler doesn't depend on libphobos-4.8-dev. + * Work around libgo build failure on ia64. PR 57689. #714090. + * Apply proposed fix for PR target/57637 (ARM only). + + -- Matthias Klose Sat, 29 Jun 2013 14:59:45 +0200 + +gcc-4.8 (4.8.1-4ubuntu2) saucy; urgency=low + + * Update to SVN 20130621 (r200293) from the gcc-4_8-branch. + * Fix documentation builds with texinfo-5.1. + + -- Matthias Klose Fri, 21 Jun 2013 13:50:16 +0200 + +gcc-4.8 (4.8.1-4ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 20 Jun 2013 00:09:01 +0200 + +gcc-4.8 (4.8.1-4) unstable; urgency=low + + * Update to SVN 20130619 (r200219) from the gcc-4_8-branch. + - Bump the libgo soname (change in type layout for functions that take + function arguments). + - Fix finding the liblto_plugin.so without x permissions set (see + PR driver/57651). Closes: #712704. + * Update maintainer list. + * Fall back to the binutils version of the binutils build dependency + if the binutils version used for the build cannot be determined. + * For ARM multilib builds, use libsf/libhf system directories to lookup + files for the non-default multilib (for now, only for the cross compilers). + * Split out a gcj-4.8 package, allow to build a gcj cross compiler. + * Allow to cross build gcj. + * Don't include object.di in the D cross compiler, but depend on gdc instead. + * Allow to cross build gdc. + * Pass --hash-style=gnu instead of --hash-style=both to the linker. + + -- Matthias Klose Wed, 19 Jun 2013 23:48:02 +0200 + +gcc-4.8 (4.8.1-3ubuntu3) saucy; urgency=low + + * Fix gcj cross build. + + -- Matthias Klose Wed, 19 Jun 2013 12:26:23 +0200 + +gcc-4.8 (4.8.1-3ubuntu2) saucy; urgency=low + + * Fall back to the binutils version of the binutils build dependency + if the binutils version used for the build cannot be determined. + * For ARM multilib builds, use libsf/libhf system directories to lookup + files for the non-default multilib (for now, only for the cross compilers). + * Split out a gcj-4.8 package, allow to build a gcj cross compiler. + * Allow to cross build gcj. + * Don't include object.di in the D cross compiler, but depend on gdc instead. + * Allow to cross build gdc. + + -- Matthias Klose Tue, 18 Jun 2013 12:07:04 +0200 + +gcc-4.8 (4.8.1-3ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Wed, 12 Jun 2013 17:21:50 +0200 + +gcc-4.8 (4.8.1-3) unstable; urgency=low + + * Update to SVN 20130612 (r200018) from the gcc-4_8-branch. + + [ Matthias Klose ] + * Prepare gdc for cross builds, and multiarch installation. + * Prepare gnat to build out of the gcc-4.8 source package, not + building the gnat-4.8-base package anymore. + * Don't build a gcj cross compiler by default (not yet tested). + * Disable D on s390 (doesn't terminate the D testsuite). + * Build libphobos on x32. + * Fix build with DEB_BUILD_OPTIONS="nolang=d". + * Disable D for arm64. + * Update the Linaro support to the 4.8-2013.06 release. + * Fix cross building a native compiler. + * Work around dh_shlibdeps not working on target libraries (see #698881). + * Add build dependency on kfreebsd-kernel-headers (>= 0.84) [kfreebsd-any]. + * Add handling for unwind inside signal trampoline for kfreebsd (Petr + Salinger). Closes: #712016. + * Let gcc depend on the binutils upstream version it was built with. + Addresses #710142. + * Force a build using binutils 2.23.52 in unstable. + + [ Iain Buclaw ] + * Update gdc to 20130610. + * Build libphobos on kFreeBSD. + + -- Matthias Klose Wed, 12 Jun 2013 16:47:25 +0200 + +gcc-4.8 (4.8.1-2ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Tue, 04 Jun 2013 17:30:35 +0200 + +gcc-4.8 (4.8.1-2) unstable; urgency=low + + * Update to SVN 20130643 (r199596) from the gcc-4_8-branch. + * Force arm mode for libjava on armhf. + * Fix gdc build failure on kFreeBSD and the Hurd. + + -- Matthias Klose Tue, 04 Jun 2013 17:28:06 +0200 + +gcc-4.8 (4.8.1-1ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Mon, 03 Jun 2013 18:01:09 +0200 + +gcc-4.8 (4.8.1-1) unstable; urgency=low + + * GCC 4.8.1 release. + Support for C++11 ref-qualifiers has been added to GCC 4.8.1, making G++ + the first C++ compiler to implement all the major language features of + the C++11 standard. + * Update to SVN 20130603 (r199596) from the gcc-4_8-branch. + * Build java packages from this source package. Works aroud ftp-master's + overly strict interpretation of the Built-Using attribute. + * Build D and libphobos packages from this source package. + * Disable the non-default multilib test runs for libjava and gnat. + + -- Matthias Klose Mon, 03 Jun 2013 09:28:11 +0200 + +gcc-4.8 (4.8.0-8ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Mon, 27 May 2013 20:07:08 +0200 + +gcc-4.8 (4.8.0-8) unstable; urgency=medium + + * Update to SVN 20130527 (r199350) from the gcc-4_8-branch (4.8.1 rc2). + - Fix PR tree-optimization/57230 (closes: #707118). + + * Remove gdc-doc.diff. + * libgo: Overwrite the setcontext_clobbers_tls check on mips*, fails + on some buildds. + * Update the Linaro support to the 4.8-2013.05 release. + * Use the %I spec when building the object file for the gcj main function. + * Fix PR c++/57211, don't warn about unused parameters of defaulted + functions. Taken from the trunk. Closes: #705066. + * Update symbols files for powerpcspe (Roland Stigge). Closes: #709383. + * Build zh_TW.UTF-8 locale to fix libstdc++ test failures. + * Keep prev-* symlinks to fix plugin.exp test failures. + + -- Matthias Klose Mon, 27 May 2013 15:43:08 +0200 + +gcc-4.8 (4.8.0-7ubuntu1) saucy; urgency=low + + * Update to SVN 20130517 (r199023) from the gcc-4_8-branch. + * Update the Linaro support to the 4.8-2013.05 release. + + -- Matthias Klose Sat, 18 May 2013 17:40:49 +0200 + +gcc-4.8 (4.8.0-7) unstable; urgency=medium + + * Update to SVN 20130512 (r198804) from the gcc-4_8-branch. + + [ Matthias Klose ] + * Revert the r195826 patch, backported for the 4.8 branch. + * Tighten build dependency on libmpc-dev to ensure using libmpc3. + * Re-add build dependency on locales. + * Enable multilib build for gdc. + * Add build-deps on libn32gcc1 and lib64gcc1 on mips/mipsel. + * Fix libgcc-dbg dependencies on hppa and m68k. Closes: #707745. + * Install host specific libstdc++ headers into the host include dir. + Closes: #707753. + * Enable Go for sparc64. + * Fix host specific c++ include dir on kfreebsd-amd64. Closes: #707957. + + [ Thorsten Glaser ] + * Regenerate m68k patches. Closes: #707766. + + [ Aurelien Jarno ] + * Fix libgcc1 symbols file for sparc64. + + -- Matthias Klose Sun, 12 May 2013 19:26:50 +0200 + +gcc-4.8 (4.8.0-6ubuntu1) saucy; urgency=low + + * Update to SVN 20130508 (r198714) from the gcc-4_8-branch. + + -- Matthias Klose Wed, 08 May 2013 18:39:15 +0200 + +gcc-4.8 (4.8.0-6) unstable; urgency=low + + * Update to SVN 20130507 (r198699) from the gcc-4_8-branch. + + [ Samuel Thibault ] + * Backport r195826 to fix gdb build on hurd-i386. + + [ Matthias Klose ] + * Drop build dependency on locales for this upload. + + -- Matthias Klose Wed, 08 May 2013 01:17:15 +0200 + +gcc-4.8 (4.8.0-5) unstable; urgency=low + + * Update to SVN 20130506 (r198641) from the gcc-4_8-branch. + + [ Matthias Klose ] + * Stop building the spu cross compilers on powerpc and ppc64. + * Merge back changes from gnat-4.8 4.8.0-1~exp2. + + [Ludovic Brenta] + * debian/patches/ada-libgnatprj.diff: do not include indepsw.o in the + library, it is used only in the gnattools. + + -- Matthias Klose Mon, 06 May 2013 21:49:44 +0200 + +gcc-4.8 (4.8.0-4ubuntu4) saucy; urgency=low + + * Update to SVN 20130503 (r198582) from the gcc-4_8-branch. + + -- Matthias Klose Fri, 03 May 2013 20:49:45 +0200 + +gcc-4.8 (4.8.0-4ubuntu3) saucy; urgency=low + + * Update to SVN 20130501 (r198500) from the gcc-4_8-branch. + + -- Matthias Klose Wed, 01 May 2013 19:12:39 +0200 + +gcc-4.8 (4.8.0-4ubuntu2) saucy; urgency=low + + * Update to SVN 20130426 (r198340) from the gcc-4_8-branch. + * Stop building the spu cross compilers on powerpc and ppc64. + * Merge back changes from gnat-4.8 4.8.0-1~exp2. + + -- Matthias Klose Fri, 26 Apr 2013 16:59:06 +0200 + +gcc-4.8 (4.8.0-4ubuntu1) saucy; urgency=low + + * Merge with Debian, remaining changes: + - Build from the upstream source. + + -- Matthias Klose Sun, 21 Apr 2013 19:11:42 +0200 + +gcc-4.8 (4.8.0-4) experimental; urgency=low + + * Update to SVN 20130421 (r198115) from the gcc-4_8-branch. + * Ignore the return value for dh_shlibdeps for builds on precise/ARM. + * Use target specific names for libstdc++ baseline files. LP: #1168267. + * Update gcc-d-lang.diff for GDC port. + * Don't use extended libstdc++-doc build dependencies for older releases. + * In gnatlink, pass the options and libraries after objects to the + linker to avoid link failures with --as-needed. Addresses: #680292. + * Build gcj for aarch64-linux-gnu. + * Update the Linaro support to the 4.8-2013.04 release. + + -- Matthias Klose Sun, 21 Apr 2013 15:38:07 +0200 + +gcc-4.8 (4.8.0-3ubuntu2) raring; urgency=low + + * Update to SVN 20130413 (r197943) from the gcc-4_8-branch. + * Use target specific names for libstdc++ baseline files. LP: #1168267. + * Update gcc-d-lang.diff for GDC port. + * Don't use extended libstdc++-doc build dependencies for older releases. + * In gnatlink, pass the options and libraries after objects to the + linker to avoid link failures with --as-needed. Closes: #680292. + * Build gcj for aarch64-linux-gnu. + + -- Matthias Klose Sat, 13 Apr 2013 16:05:13 +0200 + +gcc-4.8 (4.8.0-3ubuntu1) raring; urgency=low + + * Update to SVN 20130411 (r197832) from the gcc-4_8-branch. + * Ignore the return value for dh_shlibdeps for builds on precise/ARM. + + -- Matthias Klose Fri, 12 Apr 2013 01:27:34 +0200 + +gcc-4.8 (4.8.0-3) experimental; urgency=low + + * Update to SVN 20130411 (r197813) from the gcc-4_8-branch. + + [ Iain Buclaw ] + * Port GDC to GCC 4.8.0 release. + + -- Matthias Klose Thu, 11 Apr 2013 19:18:24 +0200 + +gcc-4.8 (4.8.0-2ubuntu1) raring; urgency=low + + * Merge with Debian; remaing changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 28 Mar 2013 12:09:17 +0100 + +gcc-4.8 (4.8.0-2) experimental; urgency=low + + * Update to SVN 20130328 (r197185) from the gcc-4_8-branch. + * Update NEWS files. + * Apply proposed patch for PR c++/55951. Closes: #703945. + * Configure with --disable-libatomic for hppa64. Closes: #704020. + + -- Matthias Klose Thu, 28 Mar 2013 06:10:29 +0100 + +gcc-4.8 (4.8.0-1ubuntu1) raring; urgency=low + + * Merge with Debian; remaing changes: + - Build from the upstream source. + + -- Matthias Klose Fri, 22 Mar 2013 16:08:16 +0100 + +gcc-4.8 (4.8-20130319-0ubuntu1) raring; urgency=low + + * GCC snapshot 20130319, taken from the trunk. + - Fix the build failures on ARM. + * Install the libasan_preinit.o files. Closes: #703229. + + -- Matthias Klose Mon, 18 Mar 2013 16:18:25 -0700 + +gcc-4.8 (4.8-20130315-1ubuntu1) raring; urgency=low + + * GCC snapshot 20130315, taken from the trunk. + + -- Matthias Klose Fri, 15 Mar 2013 18:51:15 -0700 + +gcc-4.8 (4.8-20130308-1) experimental; urgency=low + + * GCC snapshot 20130308, taken from the trunk. + + -- Matthias Klose Fri, 08 Mar 2013 12:08:12 +0800 + +gcc-4.8 (4.8-20130222-1) experimental; urgency=low + + * GCC snapshot 20130222, taken from the trunk. + * Update libasan symbols files. + + -- Matthias Klose Sat, 23 Feb 2013 04:47:15 +0100 + +gcc-4.8 (4.8-20130217-1) experimental; urgency=low + + * GCC snapshot 20130217, taken from the trunk. + + * Update libasan symbols files. + * On alpha, link with --no-relax. Update libgcc1 symbols files (Michael + Cree). Closes: #699220. + + -- Matthias Klose Mon, 18 Feb 2013 03:12:31 +0100 + +gcc-4.8 (4.8-20130209-1) experimental; urgency=low + + * GCC snapshot 20130209, taken from the trunk. + + [ Matthias Klose ] + * Add a Build-Using attribute for each binary package, which can be + built from the gcc-4.7-source package (patch derived from a proposal by + Ansgar Burchardt). + - Use it for cross-compiler packages. + - Not yet used when building gcj, gdc or gnat using the gcc-source package. + These packages don't require an exact version of the gcc-source package, + but just a versions which is specified by the build dependencies. + * Fix dh_shlibdeps calls for the libgo packages. + * libstdc-doc: Depend on libjs-jquery. + * Update libstdc++ symbols files. + * Downgrade the priority of the non-default multilib libasan packages. + + [ Thibaut Girka ] + * Fix dh_shlibdeps and dh_gencontrol cross-build mangling for + libgfortran-dev packages. + + -- Matthias Klose Sat, 09 Feb 2013 17:00:06 +0100 + +gcc-4.8 (4.8-20130127-1) experimental; urgency=low + + * GCC snapshot 20130127, taken from the trunk. + + [ Matthias Klose ] + * Fix MULTILIB_OS_DIRNAME for the default multilib on x32. + + [ Thibaut Girka ] + * Fix installation path for libatomic and libsanitizer when building a + cross-compiler with with_deps_on_target_arch_pkgs. + * Fix regexp used to list patched autotools files. + + -- Matthias Klose Sun, 27 Jan 2013 21:02:34 +0100 + +gcc-4.8 (4.8-20130113-1) experimental; urgency=low + + * GCC snapshot 20130113, taken from the trunk. + * Always configure --with-system-zlib. + * Search library dependencies in the build-sysroot too. + * Don't complain about missing .substvars files when trying to mangle + these files. + * Add ARM multilib packages to the control file for staged cross builds. + * Fix ARM multilib shlibs dependency generation for cross builds. + * Don't call dh_shlibdeps for staged cross builds. These packages + are never shipped, and the information is irrelevant. + * Build the libasan and libtsan packages before libstdc++. + * Bump build dependencies on isl and cloog. + * Don't ship libiberty.a in gcc-4.8-hppa64. Closes: #659556. + + -- Matthias Klose Sun, 13 Jan 2013 16:42:33 +0100 + +gcc-4.8 (4.8-20130105-1) experimental; urgency=low + + * GCC snapshot 20130105, taken from the trunk. + * Keep the debug link for libstdc++6. Closes: #696854. + * Update libgfortran symbols file for the trunk. + * Fix libstdc++ symbols files for sparc 128bit symbols. + * Update libgcc and libstdc++ symbols files for s390. + * Keep the rt.jar symlink in the gcj-jre-headless package. + * Explicitly search multiarch and multilib system directories when + calling dh_shlibdeps. + * Let gjdoc accept -source 1.5|1.6|1.7. Addresses: #678945. + * Fix build configured with --enable-java-maintainer-mode. + * Don't ship .md5 files in the libstdc++-doc package. + + -- Matthias Klose Sat, 05 Jan 2013 13:47:51 +0100 + +gcc-4.8 (4.8-20130102-1) experimental; urgency=low + + * GCC snapshot 20130102, taken from the trunk. + + [ Matthias Klose ] + * Resolve libgo dependencies with the built runtime libraries. + * Fix g++-4.8-multilib dependencies. + + [ Thibaut Girka ] + * Prepare for optional dependencies on the packages built on the + target architecture. + * When using the above, + - use the same settings for gcc_lib_dir, sysroot, header and C++ header + locations as for the native build. + - install libraries into the multiarch directories. + - use cpp-4.x- instead of gcc-4.x-base to collect doc files. + + -- Matthias Klose Wed, 02 Jan 2013 14:51:59 +0100 + +gcc-4.8 (4.8-20121218-1) experimental; urgency=low + + * GCC snapshot 20121217, taken from the trunk. + * Fix dependency generation for asan and atomic multilibs. + * Fix libobjc-dbg dependencies on libgcc-dbg packages. + * Fix MULTIARCH_DIRNAME definition for powerpcspe (Roland Stigge). + Closes: #695661. + * Move .jar symlinks from the -jre-lib into the -jre-headless package. + + -- Matthias Klose Tue, 18 Dec 2012 16:44:42 +0100 + +gcc-4.8 (4.8-20121217-1) experimental; urgency=low + + * GCC snapshot 20121217, taken from the trunk. + * Fix package builds with the common libraries provided by a newer + gcc-X.Y package. + * Drop build-dependency on libelf. + * Drop the g++-multilib build dependency, use the built compiler to + check which multilib variants can be run. Provide an asm symlink for + the build. + * Stop configuring cross compilers --with-headers --with-libs. + * Always call dh_shlibdeps with -l, pointing to the correct dependency + packages. + * Fix cross build stage1 package installation, only including the target + files in the gcc package. + * Explicitly configure with --enable-multiarch when doing builds + supporting the multiarch layout. + * Only configure --with-sysroot, --with-build-sysroot when values are set. + * Revert: For stage1 builds, include gcc_lib_dir files in the gcc package. + * Allow multilib enabled stage1 and stage2 cross builds. + * Don't check glibc version to configure --with-long-double-128. + * Don't auto-detect multilib osdirnames. + * Don't set a LD_LIBRARY_PATH when calling dh_shlibdeps in cross builds. + * Allow building a gcj cross compiler. + * Pretend that wheezy has x32 support (sid is now known as wheezy :-/). + + -- Matthias Klose Mon, 17 Dec 2012 18:37:14 +0100 + +gcc-4.8 (4.8-20121211-1) experimental; urgency=low + + * GCC snapshot 20121211, taken from the trunk. + * Fix build failure on multilib configurations. + + -- Matthias Klose Tue, 11 Dec 2012 08:04:30 +0100 + +gcc-4.8 (4.8-20121210-1) experimental; urgency=low + + * GCC snapshot 20121210, taken from the trunk. + * For cross builds, don't use the multiarch location for the C++ headers. + * For cross builds, fix multilib inter package dependencies. + * For cross builds, fix libc6 dependencies for non-default multilib packages. + * Build libasan packages on powerpc, ppc64. + * Only run the libgo testsuite for flags configured in RUNTESTFLAGS. + * Remove the cross-includes patch, not needed anymore with --with-sysroot=/. + * For cross builds, install into /usr/lib/gcc-cross to avoid file conflicts + with the native compiler for the target architecture. + * For cross builds, don't add /usr/local/include to the standard include + path, however /usr/local/include/ is still on the path. + * For cross builds, provide symbols files based on the symbols files for + the native build. Not picked up by dh_makeshlibs yet. + * Drop the g++-multilib build dependency, use the built compiler to + check which multilib variants can be run. + * Fix spu cross build on powerpc/ppc64. + * Make libgcj packages Multi-Arch: same, append the Debian architecture + name to the gcj java home. + * Don't encode versioned build dependencies on binutils and dpkg-dev in + the control file (makes the package cross-buildable). + * Only include gengtype for native builds. Needs upstream changes. + See #645018. + * Fix cross build failure with --enable-libstdcxx-debug. + * Only install libbacktrace if it is built. + * When cross building the native compiler, configure --with-sysroot=/ + and without --without-isl. + + -- Matthias Klose Mon, 10 Dec 2012 14:40:14 +0100 + +gcc-4.8 (4.8-20121128-1) experimental; urgency=low + + [ Matthias Klose ] + * Update patches for GCC 4.8. + * Update debian/copyright for libatomic, libbacktrace, libsanitizer. + * Remove the soversion from the libstdc++*-dev packages. + * Build libatomic and libasan packages. + * Install the static libbacktrace library and header files. + * Update build-indep dependencies for building the libstdc++ docs. + * Fix build failure in libatomic with x32 multilibs, handle -mx32 like -m64. + * Apply proposed fix for PR fortran/55395, supposed to fix the build + failure on armhf and powerpc. + * For hardened builds, disable gcc-default-format-security for now, causing + build failure building the target libstdc++ library. + * Drop the gcc-no-add-needed patch, depend on binutils 2.22 instead. + * Fix gnat build failure on kfreebsd. + * Rename the gccgo info to gccgo-4.8 on installation. + * Install the libitm documentation (if built). + * Rename the gccgo info to gccgo-4.8 on installation, install into gccgo-4.8. + * Include libquadmath documentation in the gcc-4.8-doc package. + * Build libtsan packages. + * Add weak __aeabi symbols to the libgcc1 ARM symbol files. Closes: #677139. + * For stage1 builds, include gcc_lib_dir files in the gcc package. + * Point to gcc's README.Bugs when building gcj packages. Addresses: #623987. + + [ Thibaut Girka ] + * Fix libstdc++ multiarch include path for cross builds. + + -- Matthias Klose Sun, 28 Nov 2012 12:55:27 +0100 + +gcc-4.7 (4.7.2-12) experimental; urgency=low + + * Update to SVN 20121127 (r193840) from the gcc-4_7-branch. + - Fix PR middle-end/55331 (ice on valid), PR tree-optimization/54976 (ice + on valid), PR tree-optimization/54894 (ice on valid), + PR middle-end/54735 (ice on valid), PR c++/55446 (wrong code), + PR fortran/55314 (rejects valid). + + [ Matthias Klose ] + * Fix x32 multiarch name (x86_64-linux-gnux32). + * gcc-4.7-base: Add break to gcc-4.4-base (<< 4.4.7). Closes: #690172. + * Add weak __aeabi symbols to the libgcc1 ARM symbol files. Closes: #677139. + * For stage1 builds, include gcc_lib_dir files in the gcc package. + + [ Thibaut Girka ] + * Fix libstdc++ multiarch include path for cross builds. + + -- Matthias Klose Tue, 27 Nov 2012 11:02:10 +0100 + +gcc-4.7 (4.7.2-11) experimental; urgency=low + + * Update to SVN 20121124 (r193776) from the gcc-4_7-branch. + - Fix PR libgomp/55411, PR libstdc++/55413, PR middle-end/55142, + PR fortran/55352. + + * Update build-indep dependencies for building the libstdc++ docs. + * Drop the gcc-no-add-needed patch, depend on binutils 2.22 instead. + * Pass --hash-style=gnu instead of --hash-style=both. + * Link using --hash-style=gnu on arm64 by default. + * Split multiarch patches into local and upstreamed parts. + * Fix PR54974: Thumb literal pools don't handle PC rounding (Matthew + Gretton-Dann). LP: #1049614, #1065509. + * Rename the gccgo info to gccgo-4.7 on installation, install into gccgo-4.7. + * Include libquadmath documentation in the gcc-4.7-doc package. + * Don't pretend to understand .d files, no D frontend available for 4.7. + * Fix the multiarch c++ include path for multilib'd targets. LP: #1082344. + * Make explicit --{en,dis}able-multiarch options effecitive (Thorsten Glaser). + + -- Matthias Klose Sat, 24 Nov 2012 03:57:00 +0100 + +gcc-4.7 (4.7.2-10) experimental; urgency=low + + * Update to SVN 20121118 (r193598) from the gcc-4_7-branch. + - Fix PR target/54892 (ARM, LP: #1065122), PR rtl-optimization/54870, + PR rtl-optimization/53701, PR target/53975 (ia64), + PR tree-optimization/54902 (LP: #1065559), PR middle-end/54945, + PR target/55019 (ARM), PR c++/54984, PR target/55175, + PR tree-optimization/53708, PR tree-optimization/54985, + PR libstdc++/55169, PR libstdc++/55047, PR libstdc++/55123, + PR libstdc++/54075, PR libstdc++/28811, PR libstdc++/54482, + PR libstdc++/55028, PR libstdc++/55215, PR middle-end/55219, + PR tree-optimization/54986, PR target/55204, PR debug/54828, + PR tree-optimization/54877, PR c++/54988, PR other/52438, + PR fortran/54917, PR libstdc++/55320, PR libstdc++/53841. + + [ Matthias Klose ] + * Update the Linaro support to the 4.7-2012.11 release. + * Define MULTIARCH_DIRNAME for arm64 (Wookey). + * Let the lib*objc-dev packages depend on the lib*gcc-dev packages. + * Let the libstdc++-dev package depend on the libgcc-dev package. + * Drop the dependency of the libstdc++-dev package on g++, make + libstdc++-dev and libstdc++-pic Multi-Arch: same. Closes: #678623. + * Install override files before calling dh_fixperms. + * Backport the libffi arm64 port. + * Build libx32gcc-dev, libx32objc-dev and libx32gfortran-dev packages. + * Allow conditional building of the x32 multilibs. + * Fix libmudflap build failure for x32 multilibs. + * Fix dependency on glibc for triarch builds. + * Add build-{arch,indep} targets. + * Fix libquadmath x32 multilib builds on kernels which don't support x32. + * Fix location of x32 specific C++ header files. + * Turn on -D_FORTIFY_SOURCE=2 by default for C, C++, ObjC, ObjC++, + only if the optimization level is > 0. + * Keep the host alias when building multilib libraries which need to + be cross-built on some architectures/buildds. + * Update arm64 from the aarch64 branch 20121105. + * Fix PR other/54411, libiberty: objalloc_alloc integer overflows + (CVE-2012-3509). + * Use /usr/include//c++/4.x as the include directory + for host dependent c++ header files. + * Add alternative libelf-dev build dependency. Closes: #690952. + * Always build the aarch64-linux-gnu target from the Linaro branch. + * Add __gnu_* symbols to the libgcc1 symbols file for armel and armhf. + * For powerpcspe prevent floating point register handling when there + are none available (Roland Stigge). Closes: #693328. + * Don't apply hurd-pthread.diff for trunk builds, integrated + upstream (Samuel Thibault). Addresses: #692538. + * Again, suggest graphite runtime dependencies. + * Clean up libstdc++ man pages. Closes: #692445. + + [ Thibaut Girka ] + * Split out lib*gcc-dev packages. + * Split out lib*objc-dev packages. + * Split out lib*gfortran-dev packages. + + [ Daniel Schepler ] + * Add support for x32. Closes: #667005. + * New patch hjl-x32-gcc-4_7-branch.diff to incorporate changes from + that branch, including --with-abi=mx32 option. + * Split out lib*stdc++-dev packages. + + [ Marcin Juszkiewicz ] + * lib*-dev packages for cross builds are not Multi-Arch: same. LP: #1070694. + * Remove conflicts for armhf/armel cross packages. + + -- Matthias Klose Sun, 18 Nov 2012 17:54:15 +0100 + +gcc-4.7 (4.7.2-4) unstable; urgency=low + + * Fix PR c++/54858 (ice on valid), taken from the branch. + * Build again Go on armel and armhf. + + -- Matthias Klose Tue, 09 Oct 2012 12:00:59 +0200 + +gcc-4.7 (4.7.2-3) unstable; urgency=low + + * Revert the fix PR c/33763, and just disable the sorry message, + taken from the branch. Closes: #678589. LP: #1062343. + * Update libgo to 1.0.3. + * Go fixes: + - Fix a, b, c := b, a, 1 when a and b already exist. + - Fix some type reflection strings. + - Fix parse of (<- chan <- chan <- int)(x). + - Fix handling of omitted expression in switch. + - Better error for switch on non-comparable type. + * Fix PR debug/53135 (ice on valid), PR target/54703 (x86, wrong code), + PR c++/54777 (c++11, rejects valid), taken from the 4.7 branch. + * gcc-4.7-base: ensure smooth upgrades from squeeze by adding + Breaks: gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~) + as in gcc-4.4-base (multiarch patches re-worked in 4.6.1-8/4.4.6-9). + Fixes some squeeze->wheezy upgrade paths where apt chooses to hold back + gcc-4.4-base and keep gcj-4.4-base installed instead of upgrading + gcc-4.4-base and removing the obsolete gcj-4.4-base (Andreas Beckmann). + Closes: #677582. + * Add arm64 support, partly based on Wookey's patches (only applied for + arm64). Disabled for arm64 are ssp, gomp, mudflap, boehm-gc, Ada, ObjC, + Obj-C++ and Java). + + -- Matthias Klose Fri, 05 Oct 2012 20:00:30 +0200 + +gcc-4.7 (4.7.2-2) unstable; urgency=low + + * Fix PR tree-optimization/54563 (ice on valid), PR target/54564 (fma builtin + fix), PR c/54552 (ice on valid), PR lto/54312 (memory hog), PR c/54103 (ice + on valid), PR middle-end/54638 (memory corruption), taken from the 4.7 + branch. + * Go fixes, taken from the 4.7 branch. + * On ARM, don't warn anymore that 4.4 has changed the `va_list' mangling, + taken from the trunk. + * Mention the NEWS changes for all uploads. Closes: #688278. + + -- Matthias Klose Fri, 21 Sep 2012 11:58:10 +0200 + +gcc-4.7 (4.7.2-1) unstable; urgency=low + + * GCC 4.7.2 release. + * Issues addressed after the release candidate: + - PR c++/53661 (wrong warning), LTO backport from trunk, documentation fix. + * Update NEWS files. + + -- Matthias Klose Thu, 20 Sep 2012 12:19:07 +0200 + +gcc-4.7 (4.7.1-9) unstable; urgency=low + + * GCC 4.7.2 release candidate 1. + * Update to SVN 20120914 (r191306) from the gcc-4_7-branch. + - Fix PR libstdc++/54388, PR libstdc++/54172, PR libstdc++/54172, + PR debug/54534, PR target/54536 (AVR), PR middle-end/54515 (ice on valid), + PR c++/54506 (rejects valid), PR c++/54341 (ice on valid), + PR c++/54253 (ice on valid), PR c/54559 (closes: #687496), + PR gcov-profile/54487, PR c++/53839, PR c++/54511, PR c++/53836, + PR fortran/54556. + * Update the Linaro support to the 4.7-2012.09 release. + - Adds support for the NEON vext instruction when shuffling. + - Backports improvements to scheduling transfers between VFP and core + registers. + - Backports support for the UBFX instruction on certain bit extract idioms. + + -- Matthias Klose Fri, 14 Sep 2012 19:12:47 +0200 + +gcc-4.7 (4.7.1-8) unstable; urgency=low + + * Update to SVN 20120908 (r191092) from the gcc-4_7-branch. + - Fix PR libstdc++/54376, PR libstdc++/54297, PR libstdc++/54351, + PR libstdc++/54297, PR target/54461 (AVR), PR target/54476 (AVR), + PR target/54220 (AVR), PR fortran/54208 (rejects valid), + PR middle-end/53667 (wrong code), PR target/54252 (ARM, wrong code), + PR rtl-optimization/54455 (ice on valid), PR driver/54335 (docs), + PR tree-optimization/54498 (wrong code), PR target/45070 (wrong code), + PR tree-optimization/54494 (wrong code), PR target/54436 (x86), + PR c/54428 (ice on valid), PR c/54363 (ice on valid, closes: #684635), + PR rtl-optimization/54369 (mips, sparc, wrong code), PR middle-end/54146, + PR target/46254 (ice on valid), PR rtl-optimization/54088 (ice on valid), + PR target/54212 (ARM, wrong code), PR c++/54197 (wrong code), + PR lto/53572, PR tree-optimization/53922 (wrong code). + - Go fixes. + + [ Nobuhiro Iwamatsu ] + * Remove sh4-enable-ieee.diff, -mieee enabled by default. Closes: #685975. + + [ Matthias Klose ] + * Fix PR c++/54341, PR c++/54253, taken from the trunk. Closes: #685430. + * Update libitm package description. Closes: #686802. + + -- Matthias Klose Fri, 07 Sep 2012 22:16:55 +0200 + +gcc-4.7 (4.7.1-7) unstable; urgency=low + + * Update to SVN 20120814 (r190380) from the gcc-4_7-branch. + - Fix PR libstdc++/54036, PR target/53961 (x86), PR libstdc++/54185, + PR rtl-optimization/53942, PR rtl-optimization/54157. + + [ Thibaut Girka ] + * Fix cross compilers for 64bit architectures when using + DEB_CROSS_NO_BIARCH. + * Fix glibc dependency for multiarch enabled builds for architectures + with a different libc-dev package name. + + [ Aurelien Jarno ] + * powerpc64: Fix non-multilib builds. + + [ Matthias Klose ] + * Fix syntax error generating the control file for cross builds. + Closes: #682104. + * spu build: Move static libraries to version specific directories. + Closes: #680022. + * Don't run the libstdc++ tests on mipsel, times out on the buildds. + * Update the Linaro support to the 4.7-2012.08 release. + + -- Matthias Klose Tue, 14 Aug 2012 13:58:03 +0200 + +gcc-4.7 (4.7.1-6) unstable; urgency=low + + * Update to SVN 20120731 (r190015) from the gcc-4_7-branch. + - Fix PR libstdc++/54075, PR libstdc++/53270, PR libstdc++/53978, + PR target/33135 (SH), PR target/53877 (x86), PR rtl-optimization/52250, + PR middle-end/54017, PR target/54029, PR target/53961 (x86), + PR target/53110 (x86), PR rtl-optimization/53908, PR c++/54038, + PR c++/54026, PR c++/53995, PR c++/53989, PR c++/53549 (closes: #680931), + PR c++/53953. + + -- Matthias Klose Tue, 31 Jul 2012 20:00:56 +0200 + +gcc-4.7 (4.7.1-5) unstable; urgency=high + + * Update to SVN 20120713 (r189464) from the gcc-4_7-branch. + - Fix PR libstdc++/53657, PR c++/53733 (DR 1402), PR target/53811, + PR target/53853. + + -- Matthias Klose Fri, 13 Jul 2012 16:59:59 +0200 + +gcc-4.7 (4.7.1-4) unstable; urgency=medium + + * Update to SVN 20120709 (r189388) from the gcc-4_7-branch. + - Fix PR libstdc++/53872, PR libstdc++/53830, PR bootstrap/52947, + PR middle-end/52786, PR middle-end/50708, PR tree-optimization/53693, + PR middle-end/52621, PR middle-end/53433, PR fortran/53732, + PR libstdc++/53578, PR c++/53882 (closes: #680521), PR c++/53826. + * Update the Linaro support to the 4.7-2012.07 release. + * Fix build on pre-multiarch releases (based on a patch from Chip Salzenberg). + Closes: #680590. + + -- Matthias Klose Mon, 09 Jul 2012 18:58:47 +0200 + +gcc-4.7 (4.7.1-3) unstable; urgency=low + + * Update to SVN 20120703 (r189219) from the gcc-4_7-branch. + - Fix PR preprocessor/37215, PR middle-end/38474, PR target/53595 (AVR), + PR middle-end/53790, PR debug/53682, PR target/53759 (x86), + PR c++/53816, PR c++/53821, PR c++/51214, PR c++/53498, PR c++/53305, + PR c++/52988 (wrong code), PR c++/53202 (wrong code), PR c++/53594. + - The change for PR libstdc++/49561 was reverted. The std::list size is + now the same again in c++98 and c++11 mode. + * Revert the local std::list work around. + * Build using isl instead of ppl for snapshot builds. + + -- Matthias Klose Tue, 03 Jul 2012 15:07:14 +0200 + +gcc-4.7 (4.7.1-2) unstable; urgency=medium + + * Update to SVN 20120623 (r188906) from the gcc-4_7-branch. + - Fix PR rtl-optimization/53700 (closes: #677678), PR target/52908, + PR libstdc++/53270, PR libstdc++/53678, PR gcov-profile/53744, + PR c++/52637, PR middle-end/53470, PR c++/53651, PR c++/53137, + PR c++/53599, PR fortran/53691, PR fortran/53685, PR ada/53592. + * Update NEWS files for 4.7.1. + * Bump gcc/FULL-VERSION to 4.7.1. + * Update the Linaro support to the 4.7-2012.06 release. + * Restore std::list ABI compatibility in c++11 mode. The upstream behaviour + can be enabled defining __CXX0X_STD_LIST_ABI_INCOMPAT__. This work around + will be replaced with an upstream solution. + * Fix PR debug/53682, taken from the trunk. Closes: #677606. + * Use $(with_gccbase) and $(with_gccxbase) to determine whether to enable it + in the control file (Thibaut Girka). + * When building a cross-compiler, runtime libraries for the target + architecture may be cross-built. Tell debhelper/dpkg-dev those packages + are indeed for a foreign architecture (Thibaut Girka). + + -- Matthias Klose Sat, 23 Jun 2012 11:58:35 +0200 + +gcc-4.7 (4.7.1-1) unstable; urgency=low + + * GCC 4.7.1 release. + + -- Matthias Klose Fri, 15 Jun 2012 00:38:27 +0200 + +gcc-4.7 (4.7.0-13) unstable; urgency=low + + * Update to SVN 20120612 (r188457) from the gcc-4_7-branch. + - Fix PR c++/53602 (LP: #1007616). + + * Document the changed ssp-buffer-size default in Ubuntu 10.10 and + later (Kees Cook). LP: #990141. + * Fix PR c++/26155, ICE after error with namespace alias. LP: #321883. + * Fix PR c++/53599 (reverting the fix for PR c++/53137). + Closes: #676729. LP: #1010896. + * Fix manual page names for cross builds (Thibaut Girka). Closes: #675516. + * Remove dpkg-cross build dependency for cross builds (Thibaut Girka). + Closes: #675511. + + -- Matthias Klose Tue, 12 Jun 2012 15:47:57 +0200 + +gcc-4.7 (4.7.0-12) unstable; urgency=low + + * Update to SVN 20120606 (r188261) from the gcc-4_7-branch (release + candidate 1 or 4.7.1). + - Fix PR libstdc++/52007, PR c++/53524, PR target/53559, + PR middle-end/47530, PR middle-end/53471, PR middle-end/52979, + PR target/46261, PR tree-optimization/53550, PR middle-end/52080, + PR middle-end/52097, PR middle-end/48124, PR middle-end/53501, + PR target/52667, PR target/52642, PR middle-end/48493, PR c++/53524, + PR c++/52973, PR c++/52725, PR c++/53137, PR c++/53484, PR c++/53500, + PR c++/52905, PR fortran/53521. + - Go and libgo updates. + * Include README.Debian in README.Debian.. + * Fix PR c/33763, proposed patch from the issue. Closes: #672411. + * Fix build failure in libgo with hardening defaults. + + -- Matthias Klose Wed, 06 Jun 2012 13:22:27 +0200 + +gcc-4.7 (4.7.0-11) unstable; urgency=low + + * Update to SVN 20120530 (r188035) from the gcc-4_7-branch. + - Fix PR c++/53356, PR c++/53491, PR c++/53503, PR c++/53220, + PR middle-end/53501, PR rtl-optimization/53519, + PR tree-optimization/53516, PR tree-optimization/53438, + PR target/52999, PR middle-end/53008. + + [ Matthias Klose ] + * Build-depend on netbase when building Go. Closes: #674306. + + [ Marcin Juszkiewicz ] + * Use the multiarch default for staged builds. + + -- Matthias Klose Thu, 31 May 2012 08:25:08 +0800 + +gcc-4.7 (4.7.0-10) unstable; urgency=low + + * Update to SVN 20120528 (r187927) from the gcc-4_7-branch. + - Fix PR rtl-optimization/52528, PR lto/52178, PR target/53435, + PR ada/52362, PR target/53385, PR middle-end/53460, + PR tree-optimization/53465, PR target/53448, PR tree-optimization/53408, + PR ada/52362, PR fortran/53389. + * Fix warning building libiberty/md5.c. PR other/53285. Closes: #674830. + + -- Matthias Klose Mon, 28 May 2012 11:30:36 +0800 + +gcc-4.7 (4.7.0-9) unstable; urgency=low + + * Update to SVN 20120522 (r187756) from the gcc-4_7-branch. + - Fix PR bootstrap/53183, PR tree-optimization/53436, + PR tree-optimization/53366, PR tree-optimization/53409, + PR tree-optimization/53410, PR c/53418, PR target/53416, + PR middle-end/52584, PR debug/52727, PR tree-optimization/53364, + PR target/53358, PR rtl-optimization/52804, PR target/46098, + PR target/53256, PR c++/53209, PR c++/53301, PR ada/52494, + PR fortran/53310 + * Update the Linaro support to the 4.7-2012.05 release. + + -- Matthias Klose Tue, 22 May 2012 13:01:33 +0800 + +gcc-4.7 (4.7.0-8) unstable; urgency=low + + * Update to SVN 20120509 (r187339) from the gcc-4_7-branch. + - Fix PR libstdc++/53193, PR target/53272, PR tree-optimization/53239, + PR tree-optimization/53195, PR target/52999, PR target/53228, + PR tree-optimization/52633, PR tree-optimization/52870, PR target/48496, + PR target/53199, PR target/52684, PR lto/52605, PR plugins/53126, + PR debug/53174, PR target/53187, PR tree-optimization/53144, + PR c++/53186, PR fortran/53255, PR fortran/53111, PR fortran/52864. + - Fix plugin check in gcc-{ar,nm,ranlib}-4.7. + * Install man pages for gcc-{ar,nm,ranlib}-4.7. + + -- Matthias Klose Mon, 07 May 2012 21:56:42 +0200 + +gcc-4.7 (4.7.0-7) unstable; urgency=low + + * Update to SVN 20120502 (r187039) from the gcc-4_7-branch. + - Fix PR libstdc++/53115, PR tree-optimization/53163, + PR rtl-optimization/53160, PR middle-end/53136, PR fortran/53148. + - libgo fix for mips. + * Fix setting MULTILIB_DEFAULTS for ARM multilib builds. + * Build Go on mips. + * Revert: Don't build multilib gnat on armel and armhf. + * Fix multiarch patch for alpha (Michael Cree). Closes: #670571. + * Fix Go multilib packaging issue for mips and mipsel. + + -- Matthias Klose Wed, 02 May 2012 12:42:01 +0200 + +gcc-4.7 (4.7.0-6) unstable; urgency=low + + * Update to SVN 20120430 (r186964) from the gcc-4_7-branch. + - Fix PR target/53138. + * Build Go on ARM. + * Treat wheezy the same as sid in more places (Peter Green). + Addresses: #670821. + + -- Matthias Klose Mon, 30 Apr 2012 13:06:21 +0200 + +gcc-4.7 (4.7.0-5) unstable; urgency=medium + + * Update to SVN 20120428 (r186932) from the gcc-4_7-branch. + - Fix PR c/52880, PR target/53065, PR tree-optimization/53085, + PR c/51527, PR target/53120. + + [ Matthias Klose ] + * Don't build multilib gnat on armel and armhf. + * Don't try to run the libstdc++ testsuite if the C++ frontend isn't built. + * Install the unwind-arm-common.h header file. + * Fix ARM biarch package builds. + + [ Aurelien Jarno ] + * Reenable parallel builds on GNU/kFreeBSD. + * Fix libgcc building on MIPS N32/64. Closes: #669858. + * Add libn32gcc1 and lib64gcc1 symbols files on mips and mipsel. + + -- Matthias Klose Sat, 28 Apr 2012 11:59:36 +0200 + +gcc-4.7 (4.7.0-4) unstable; urgency=low + + * Update to SVN 20120424 (r186746) from the gcc-4_7-branch. + - Fix PR libstdc++/52924, PR libstdc++/52591, PR middle-end/52894, + PR testsuite/53046, PR libstdc++/53067, PR libstdc++/53027, + PR libstdc++/52839, PR bootstrap/52840, PR libstdc++/52689, + PR libstdc++/52699, PR libstdc++/52822, PR libstdc++/52942, + PR middle-end/53084, PR middle-end/52999, PR c/53060, + PR tree-optimizations/52891, PR target/53033, PR target/53020, + PR target/52932, PR middle-end/52939, PR tree-optimization/52969, + PR c/52862, PR target/52775, PR tree-optimization/52943, PR c++/53003, + PR c++/38543, PR c++/50830, PR c++/50303, PR c++/52292, PR c++/52380, + PR c++/52465, PR c++/52824, PR c++/52906. + + [ Matthias Klose ] + * Update the Linaro support to the 4.7-2012.04 release. + * Set the ARM hard-float linker path according to the consensus: + http://lists.linaro.org/pipermail/cross-distro/2012-April/000261.html + * Reenable the spu build on ppc64. Closes: #668272. + * Update and reenable the gcc-cloog-dl patch. + + [ Samuel Thibault ] + * ada-s-osinte-gnu.adb.diff, ada-s-osinte-gnu.ads.diff, + ada-s-taprop-gnu.adb.diff, gcc_ada_gcc-interface_Makefile.in.diff: + Add ada support for GNU/Hurd, thanks Svante Signell for the patches + and bootstrap! (Closes: #668426). + + -- Matthias Klose Tue, 24 Apr 2012 08:44:15 +0200 + +gcc-4.7 (4.7.0-3) unstable; urgency=low + + * Update to SVN 20120409 (r186249) from the gcc-4_7-branch. + - Fix PR libitm/52854, PR libstdc++/52476, PR target/52717, + PR tree-optimization/52406, PR c++/52596, PR c++/52796, + PR fortran/52893, PR fortran/52668. + + [ Matthias Klose ] + * Re-add missing dependency on libgcc in gcc-multilib. Closes: #667519. + * Add support for GNU locales for GNU/Hurd (Svante Signell). + Closes: #667662. + * Reenable the spu build on ppc64. Closes: #664617. + * Apply proposed patch for PR52894, stage1 bootstrap failure on hppa + (John David Anglin). Closes: #667969. + + [ Nobuhiro Iwamatsu ] + * Fix cross build targeting sh4. Closes: #663028. + * Enable -mieee by default on sh4. Closes: #665328. + + -- Matthias Klose Mon, 09 Apr 2012 22:24:14 +0200 + +gcc-4.7 (4.7.0-2) unstable; urgency=low + + * Update to SVN 20120403 (r186107) from the gcc-4_7-branch. + - Fix PR middle-end/52547, PR libstdc++/52540, PR libstdc++/52433, + PR target/52507, PR target/52505, PR target/52461, PR target/52508, + PR c/52682, PR target/52610, PR middle-end/52640, PR target/50310, + PR target/48596, PR target/48806, PR middle-end/52547, R target/52496, + PR rtl-optimization/52543, PR target/52461, PR target/52488, + PR target/52499, PR target/52148, PR target/52496, PR target/52484, + PR target/52506, PR target/52505, PR target/52461, PR other/52545, + PR c/52577, PR c++/52487, PR c++/52671, PR c++/52582, PR c++/52521, + PR fortran/52452, PR target/52737, PR target/52698, PR middle-end/52693, + PR middle-end/52691, PR middle-end/52750, PR target/52692, + PR middle-end/51893, PR target/52737, PR target/52736, PR middle-end/52720, + PR c++/52672, PR c++/52718, PR c++/52685, PR c++/52759, PR c++/52743, + PR c++/52746, PR libstdc++/52799, PR libgfortran/52758, + PR middle-end/52580, PR middle-end/52493, PR tree-optimization/52678, + PR tree-optimization/52701, PR tree-optimization/52754, + PR tree-optimization/52835. + + [ Matthias Klose ] + * Update NEWS files for 4.7. + * Include -print-multiarch option in gcc --help output. Closes: #656998. + * Don't build Go on MIPS. + * Update alpha-ieee.diff for 4.7. + * Update gcc-multiarch.diff for sh4 (untested). Closes: #665935. + * Update gcc-multiarch.diff for hppa (untested). Closes: #666162. + * Re-add build dependency on doxygen. + + [ Samuel Thibault ] + * debian/patches/ada-bug564232.diff: Enable on hurd too. + * debian/patches/ada-libgnatprj.diff: Add hurd configuration. + + -- Matthias Klose Tue, 03 Apr 2012 16:30:58 +0200 + +gcc-4.7 (4.7.0-1) unstable; urgency=low + + * GCC 4.7.0 release. + + -- Matthias Klose Fri, 23 Mar 2012 05:44:37 +0100 + +gcc-4.7 (4.7.0~rc2-1) experimental; urgency=low + + * GCC-4.7 release candidate 2 (r185376). + * libgo: Work around parse error of struct timex_ on ARM. + * Update libstdc++6 symbols files. + * Allow building Go from a separate source package. + * Don't configure with --enable-gnu-unique-object on kfreebsd and hurd. + * Include -print-multiarch option in gcc --help output. Closes: #656998. + * Disable Go on mips* (PR go/52586). + + -- Matthias Klose Wed, 14 Mar 2012 15:49:39 +0100 + +gcc-4.7 (4.7.0~rc1-2) experimental; urgency=low + + * Update to SVN 20120310 (r185183) from the gcc-4_6-branch. + * Always configure with --enable-gnu-unique-object. LP: #949805. + * Enable Go for ARM on releases with working getcontext/setcontext. + + -- Matthias Klose Sat, 10 Mar 2012 23:29:45 +0100 + +gcc-4.7 (4.7.0~rc1-1) experimental; urgency=low + + * GCC-4.7 release candidate 1 (r184777). + + [ Marcin Juszkiewicz ] + * Fix ARM sf/hf multilib dpkg-shlibdeps dependency generation. + + [ Matthias Klose ] + * PR go/52218, don't build Go on ARM, getcontext/setcontext exists, + but return ENOSYS. + * Fix multiarch build on ia64. + * Fix path calculation for the libstdc++ -gdb.py file when installed into + multiarch locations. Closes: #661385. LP: #908163. + * Disable Go on sparc (libgo getcontext/setcontext check failing). + + [ Thorsten Glaser ] + * Apply patch from Alan Hourihane to fix err_bad_abi testcase on m68k. + + [ Jonathan Nieder ] + * libstdc++6: Depends on libc (>= 2.11) for STB_GNU_UNIQUE support + (Eugene V. Lyubimkin). Closes: #584572. + * libstdc++6, libobjc2, libgfortran3, libmudflap0, libgomp1: Breaks + pre-multiarch gcc. Closes: #651550. + * libstdc++6: Lower priority from required to important. Closes: #661118. + + [Samuel Thibault] + * Remove local patch, integrated upstream. Closes: ##661859. + + -- Matthias Klose Fri, 02 Mar 2012 18:42:56 +0100 + +gcc-4.7 (4.7-20120210-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120210 (r184114). + * kbsd-gnu.diff: Remove, integrated upstream. + * Strip whitespace from with_libssp definition. Closes: #653255. + * Remove soft-float symbols from 64bit powerpc libgcc1 symbols files. + * Fix control file generation for cross packages. LP: #913734. + + -- Matthias Klose Fri, 10 Feb 2012 21:38:12 +0100 + +gcc-4.7 (4.7-20120205-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120205 (r183903). + * Enable Go on arm*, ia64, mips*, powerpc, s390*, sparc*. + * libgo: Fix ioctl macro extracton. + * Fix PR middle-end/52074, ICE in libgo on powerpc. + * Revert: * Install static libc++{98,11} libraries. + * Don't strip a `/' sysroot from the C++ include directories. + Closes: #658442. + + -- Matthias Klose Sun, 05 Feb 2012 09:16:03 +0100 + +gcc-4.7 (4.7-20120129-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120129 (r183674). + * Configure --with-sysroot for wheezy and sid. + * Install static libc++{98,11} libraries. + * Install libstdc++ gdb.py file into /usr/lib/debug. + * Just copy libstdc++convenience.a for the libstdc++_pic installation. + * Remove trailing dir separator from system root. + + -- Matthias Klose Sun, 29 Jan 2012 08:19:27 +0100 + +gcc-4.7 (4.7-20120121-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120121 (r183370). + + [ Matthias Klose ] + * Fix C++ include paths when configured --with-system-root. + + [ Marcin Juszkiewicz ] + * Fix control file generation for ARM multiarch cross builds. + + -- Matthias Klose Sat, 21 Jan 2012 20:24:29 +0100 + +gcc-4.7 (4.7-20120107-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120107 (r182981). + + * On armel/armhf, allow g*-multilib installation using the runtime + libraries of the corresponding multiarch architecture. + * Fix location of .jinfo files. Addresses: #654579. + * Replace Fortran 95 with Fortran in package descriptions. + + -- Matthias Klose Sat, 07 Jan 2012 21:24:56 +0100 + +gcc-4.7 (4.7-20111231-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20111231 (r182754). + + [ Aurelien Jarno ] + * Re-enable parallel builds on kfreebsd-i386, as the problem from bug + #637236 only affects kfreebsd-amd64. + + [ Matthias Klose ] + * Fix generating libphobos dependency for gdc. Addresses: #653078. + * Link libmudflapth.so with -lpthread. + + -- Matthias Klose Sat, 31 Dec 2011 09:42:13 +0100 + +gcc-4.7 (4.7-20111222-1) experimental; urgency=low + + * Update to SVN 20111222 (r182617) from the trunk. + + [Matthias Klose] + * Remove obsolete ARM patch. + * Install loongson.h header. + * Update libgcc and libstdc++ symbols files. + + [Samuel Thibault] + * Update hurd patch for 4.7, fixing build failure. Closes: #652693. + + [Robert Millan] + * Update kbsd-gnu.diff for the trunk. + + -- Matthias Klose Thu, 22 Dec 2011 10:52:01 +0100 + +gcc-4.7 (4.7-20111217-2) experimental; urgency=low + + * Don't provide 4.6.x symlinks. + * Disable multilib for armhf. + * Fix spu installation. + + -- Matthias Klose Sun, 18 Dec 2011 17:22:10 +0100 + +gcc-4.7 (4.7-20111217-1) experimental; urgency=low + + * GCC-4.7 snapshot build. + - Including the GFDL documentation; will stay in experimental + until the 4.7.0 release sometime next year. + * Update patches for the trunk. + * Update symbols files. + * Build libitm packages. + + -- Matthias Klose Sat, 17 Dec 2011 23:19:46 +0100 + +gcc-4.6 (4.6.2-9) unstable; urgency=medium + + * Update to SVN 20111217 (r182430) from the gcc-4_6-branch. + - Fix PR c++/51331. + * Fix build dependencies for armel/armhf. + + -- Matthias Klose Sat, 17 Dec 2011 10:40:26 +0100 + +gcc-4.6 (4.6.2-8) unstable; urgency=low + + * Update to SVN 20111216 (r182407) from the gcc-4_6-branch. + - Fix PR tree-optimization/51485, PR tree-optimization/50569, PR c++/51248, + PR c++/51406, PR c++/51161, PR rtl-optimization/49720, PR fortran/50923, + PR fortran/51338, PR fortran/51550, PR fortran/47545, PR fortran/49050, + PR fortran/51075. + + [ Matthias Klose ] + * gdc-4.6: Provide -{gdc,gdmd}-4.6 symlinks. + + [Ludovic Brenta] + Merge from gnat-4.6 (4.6.2-2) unstable; urgency=low + [Євгеній Мещеряков] + * debian/patches/pr47818.diff: new. Fixes: #614402. + * debian/rules.patch: apply it. + + Merge from gnat-4.6 (4.6.2-1) unstable; urgency=low + [Ludovic Brenta] + * Suggest ada-reference-manual-{html,info,pdf,text} instead of just + ada-reference-manual which no longer exists. + * Do not suggest gnat-gdb, superseded by gdb. + * Downgrade libgnat{vsn,prj}4.6-dev to priority extra; they conflict + with their 4.4 counterparts and priority optional packages may not + conflict with one another, per Policy 2.5. + + -- Matthias Klose Fri, 16 Dec 2011 16:59:30 +0100 + +gcc-4.6 (4.6.2-7) unstable; urgency=medium + + * Update to SVN 20111210 (r182189) from the gcc-4_6-branch. + - Fix PR rtl-optimization/51469, PR tree-optimization/51466, + PR tree-optimization/50078, PR target/51408, PR fortran/51310, + PR fortran/51448. + + -- Matthias Klose Sat, 10 Dec 2011 20:12:33 +0100 + +gcc-4.6 (4.6.2-6) unstable; urgency=low + + * Update to SVN 20111208 (r182120) from the gcc-4_6-branch. + - Fix PR c++/51265, PR bootstrap/50888, PR target/51393 (ix86), + PR target/51002 (AVR), PR target/51345 (AVR), PR debug/48190, + PR fortran/50684, PR fortran/51218, PR target/50906 (closes: #650318), + PR tree-optimization/51315 (closes: #635126), PR tree-optimization/50622, + PR fortran/51435, PR debug/51410, PR c/51339, PR rtl-optimization/48721, + PR middle-end/51323 (LP: #897583), PR middle-end/50074, + PR middle-end/50074. + + [ Matthias Klose ] + * Run the libstdc++ testsuite on all architectures again. Closes: #622699. + * Apply proposed patch for PR target/50906 (powerpcspe only). Closes: #650318. + * Fix PR target/49030 (ARM), taken from Linaro. Closes: #633479. + * Fix PR target/50193 (ARM), taken from Linaro. Closes: #642127. + * Install the libstdc++.so-gdb.py file. LP: #883269. + * Fix PR c++/50114, backport from trunk. LP: #827806. + * Merge changes to allow gcc-snapshot cross builds, taken from Linaro. + * Update the Linaro support to the 4.6 branch. + + [ Marcin Juszkiewicz ] + * Fix issues with gcc-snapshot cross builds. + * Allow building Linaro binary packages in a single package. + * Apply hardening patches for cross builds when enabled for native builds. + + -- Matthias Klose Thu, 08 Dec 2011 17:14:35 +0100 + +gcc-4.6 (4.6.2-5) unstable; urgency=low + + * Update to SVN 20111121 (r181596) from the gcc-4_6-branch. + - Fix PR c++/50870, PR c++/50608, PR target/47997, PR target/48108, + PR target/45233, PR middle-end/51077, PR target/30282, PR c++/50608, + PR target/50979, PR target/4810, PR rtl-optimization/51187, + PR target/50493, PR target/49992, PR target/49641, PR c++/51150, + PR target/50678, PR libstdc++/51142, PR libstdc++/51133. + + [ Matthias Klose ] + * Use the default gcc as stage1 compiler for all architectures. + + [ Marcin Juszkiewicz ] + * debian/control.m4: Use BASEDEP in more places. + * Work around debhelper not calling the correct strip for cross builds. + * Drop dpkg-cross build dependency for cross builds. + + -- Matthias Klose Mon, 21 Nov 2011 22:26:49 +0100 + +gcc-4.6 (4.6.2-4) unstable; urgency=low + + * Update to SVN 20111103 (r180830) from the gcc-4_6-branch. + - Fix PR target/50691, PR c++/50901, PR target/50945, + PR rtl-optimization/47918, PR libstdc++/50880. + + * Configure the armel build by explicitly passing --with-arch=armv4t + --with-float=soft. + * libffi: Simplify PowerPC assembly and avoid CPU-specific string + instructions (Kyle Moffett). + * Fix MULTIARCH_DIRNAME on powerpcspe (Kyle Moffett). Closes: #647324. + + -- Matthias Klose Thu, 03 Nov 2011 12:03:41 -0400 + +gcc-4.6 (4.6.2-3) unstable; urgency=low + + * disable parallel builds on kfreebsd-* even if DEB_BUILD_OPTIONS + enables them (continued investigation for #637236). + + -- Ludovic Brenta Sat, 29 Oct 2011 00:42:46 +0200 + +gcc-4.6 (4.6.2-2) unstable; urgency=low + + * Update to SVN 20111028 (r180603) from the gcc-4_6-branch. + - Fix PR target/50875. + + * Fix gcj, gdc and gnat builds, broken by the stage1 cross-compiler + package dependency fixes. + * Update the Linaro support to the 4.6 branch. + * Fix gcc-4.6-hppa64 installation. Closes: #646805. + * For ARM hard float, set the dynamic linker to + /lib/arm-linux-gnueabihf/ld-linux.so.3. + * Don't use parallel builds on kfreebsd. + + -- Matthias Klose Fri, 28 Oct 2011 16:36:55 +0200 + +gcc-4.6 (4.6.2-1) unstable; urgency=low + + * GCC 4.6.2 release. + + * Fix libgcc installation into /usr/lib/gcc//4.6. Closes: #645021. + * Fix stage1 cross-compiler package dependencies (Kyle Moffett). + Closes: #644439. + + -- Matthias Klose Wed, 26 Oct 2011 13:10:44 +0200 + +gcc-4.6 (4.6.1-16) unstable; urgency=medium + + * Update to SVN 20111019 (r180208) from the gcc-4_6-branch. + - Fix PR target/49967 (ia64), PR tree-optimization/50189, PR fortran/50273, + PR tree-optimization/50700, PR c/50565 (closes: #642144), + PR target/49965 (sparc), PR middle-end/49801, PR c++/49216, + PR c++/49855, PR c++/49896, PR c++/44473, PR c++/50611, PR fortran/50659, + PR tree-optimization/50723, PR tree-optimization/50712, PR obj-c++/48275, + PR c++/50618, PR fortran/47023, PR fortran/50570, PR fortran/50718, + PR libobjc/49883, PR libobjc/50002, PR target/50350, PR middle-end/50386, + PR middle-end/50326, PR target/50737, PR c++/50787, PR c++/50531, + PR fortran/50016, PR target/50737. + + [ Matthias Klose ] + * Fix libjava installation into /usr/lib/gcc//4.6. + * Fix powerpc and ppc64 libffi builds (Kyle Moffett). + * Apply proposed patch for PR target/50350. Closes: #642313. + * Re-apply the fix for PR tree-optimization/49911 on ia64. + * Apply proposed patch for PR target/50106 (ARM). + + [Xavier Grave] + * debian/patches/address-clauses-timed-entry-calls.diff: new; backport + bug fix about address clauses and timed entry calls. + + [Ludovic Brenta] + * debian/patches/ada-kfreebsd-gnu.diff: new; provide dummy + implementations of some optional POSIX Threads functions missing in + GNU/kFreeBSD. Closes: #642128. + + -- Matthias Klose Thu, 20 Oct 2011 00:24:13 +0200 + +gcc-4.6 (4.6.1-15) unstable; urgency=low + + * Update to SVN 20111010 (r179753) from the gcc-4_6-branch. + - Fix PR target/50652. + * Update the Linaro support to the 4.6-2011.10-1 release. + * Fix gcc-spu installation. + * Restore symlink for subminor GCC version. Closes: #644849. + + -- Matthias Klose Mon, 10 Oct 2011 17:10:40 +0200 + +gcc-4.6 (4.6.1-14) unstable; urgency=low + + * Update to SVN 20111008 (r179710) from the gcc-4_6-branch. + - Fix PR inline-asm/50571, PR c++/46105, PR c++/50508, PR libstdc++/50529, + PR libstdc++/49559, PR c++/40831, PR fortran/48706, PR target/49049, + PR tree-optimization/49279, PR fortran/50585, PR fortran/50625, + PR libstdc++/48698. + + [ Matthias Klose ] + * Configure and build to install into /usr/lib/gcc//4.6. + Closes: #643891. + * libgcc1: Versioned break to gcc-4.3. + * Fix gcc-multiarch for i386-linux-gnu with disabled multilibs. + * libffi: Fix PowerPC soft-floating-point support (Kyle Moffett). + + [ Marcin Juszkiewicz ] + * Enable gcc-snapshot cross builds. + + [ Iain Buclaw ] + * Port gdc to GCC-4.6. + + [ Aurelien Jarno ] + * Backport fix for PR target/49696 from the trunk (Closes: #633443). + + -- Matthias Klose Sat, 08 Oct 2011 14:40:49 +0200 + +gcc-4.6 (4.6.1-13) unstable; urgency=low + + * Update to SVN 20110926 (r179207) from the gcc-4_6-branch. + - Fix PR tree-optimization/50472, PR tree-optimization/50413, + PR tree-optimization/50412, PR c++/20039, PR c++/42844, + PR libstdc++/50510, PR libstdc++/50509. + * Revert the fix for PR tree-optimization/49911, bootstrap error on ia64. + * libffi: Define FFI_MMAP_EXEC_WRIT on kfreebsd-* (Petr Salinger). + + -- Matthias Klose Mon, 26 Sep 2011 19:59:55 +0200 + +gcc-4.6 (4.6.1-12) unstable; urgency=low + + * Update to SVN 20110924 (r179140) from the gcc-4_6-branch. + - Fix PR target/50464, PR target/50341, PR middle-end/49886, + PR target/50091, PR c++/50491, PR c++/50442 (Closes: #642176). + + -- Matthias Klose Sat, 24 Sep 2011 10:39:32 +0200 + +gcc-4.6 (4.6.1-11) unstable; urgency=low + + * Update to SVN 20110917 (r178926) from the gcc-4_6-branch. + - Fix PR c++/50424, PR c++/48320, PR fortran/49479. + + [ Matthias Klose ] + * Update the Linaro support to the 4.6-2011.09-1 release. + + [ Aurelien Jarno ] + * gcc.c (for_each_path): Allocate memory for multiarch suffix. + + -- Matthias Klose Sat, 17 Sep 2011 10:53:36 +0200 + +gcc-4.6 (4.6.1-10) unstable; urgency=medium + + * Update to SVN 20110910 (r178746) from the gcc-4_6-branch. + - Fix PR middle-end/50266, PR tree-optimization/49911, + PR tree-optimization/49518, PR tree-optimization/49628, + PR tree-optimization/49628, PR target/50310, PR target/50289, + PR c++/50255, PR c++/50309, PR c++/49267, PR libffi/49594. + - Revert fix for PR middle-end/49886, causing PR middle-end/50295. + + -- Matthias Klose Sat, 10 Sep 2011 03:38:48 +0200 + +gcc-4.6 (4.6.1-9) unstable; urgency=low + + * Update to SVN 20110903 (r178501) from the gcc-4_6-branch. + - Fix PR target/50090, PR middle-end/50116, PR target/50202, PR c/50179, + PR c++/50157, PR fortran/50163, PR libfortran/50192, + PR middle-end/49886, PR tree-optimization/50178, PR c++/50207, + PR c++/50089, PR c++/50220, PR c++/50234, PR c++/50224, + PR libstdc++/50268. + + [ Matthias Klose ] + * Fix gcc --print-multilib-osdir for non-biarch architectures. + * Fix multiarch for non-biarch builds. Closes: #635860. + * Move the lto plugin to the cpp packge. Closes: #639531. + + [ Thorsten Glaser ] + * [m68k] Disable multilib. Closes: #639303. + + -- Matthias Klose Sat, 03 Sep 2011 20:11:50 +0200 + +gcc-4.6 (4.6.1-8) unstable; urgency=low + + * Update to SVN 20110824 (r178027) from the gcc-4_6-branch. + Fix PR fortran/49792, PR tree-optimization/48739, PR target/50092, + PR c++/50086, PR c++/50054, PR fortran/50050, PR fortran/50130, + PR fortran/50129, PR fortran/49792, PR fortran/50109, PR c++/50024, + PR c++/46862. + + * Properly disable multilib builds for selected libraries on armel and armhf. + * Update and re-enable the gcc-ice patch. + * Update and re-enable the gcc-cloog-dl patch. + * Fix [ARM] PR target/50090: aliases in libgcc.a with default visibility, + taken from the trunk. + * Re-work the multiarch patches. + * Break older gcj-4.6 and gnat-4.6 versions, changed gcc_lib_dir. + * Omit the target alias from the go libdir. + * Linaro updates from the 4.6-2011.07-stable branch. + * Revert: + - libjava: Build with the system libffi PIC library. + * For native builds, gcc -print-file-name now resolve . and .., + and removes the subminor version number. + + -- Matthias Klose Wed, 24 Aug 2011 10:22:42 +0200 + +gcc-4.6 (4.6.1-7) unstable; urgency=low + + * Update to SVN 20110816 (r177780) from the gcc-4_6-branch. + - Fix PR middle-end/49923. + + [ Matthias Klose ] + * gcc-4.6-multilib: Depend on biarch quadmath library. Closes: #637174. + * Don't hard-code build dependency on gcc-multilib. + * Build-depends on python when building java. + * Fix thinko in java::lang::Class::finalize (taken from the trunk). + * Add support for ARM 64bit sync intrinsics (David Gilbert). Only + enable for armv7 or better. + * libjava: Build with the system libffi PIC library. + * Disable gnat multilib builds on armel and armhf. + + Merge from gnat-4.6 (4.6.1-4) unstable; urgency=low + + [Ludovic Brenta] + * debian/patches/ada-symbolic-tracebacks.diff + (src/gcc/ada/gcc-interface/Makefile.in): pass -iquote instead of -I- + to gnatgcc; fixes FTBFS on i386 and closes: #637418. + + Merge from gnat-4.6 (4.6.1-3) unstable; urgency=low + + [Євгеній Мещеряков] + * debian/patches/ada-mips.diff: do not use the alternate stack on mips, + as on mipsel. Closes: #566234. + + [Ludovic Brenta] + * debian/patches/pr49940.diff: new; copy the definition of function + lwp_self from s-osinte-freebsd.ads to s-osinte-kfreebsd-gnu.ads. + Closes: #636291. + * debian/patches/pr49944.diff: new. Closes: #636692. + * debian/patches/pr49819.diff: drop, merged upstream. + + -- Matthias Klose Tue, 16 Aug 2011 13:11:25 +0200 + +gcc-4.6 (4.6.1-6) unstable; urgency=low + + * Update to SVN 20110807 (r177547) from the gcc-4_6-branch. + - Fix PR rtl-optimization/49799, PR debug/49871, PR target/47364, + PR target/49866, PR tree-optimization/49671, PR target/39386, + PR ada/4981, PR fortran/45586, PR fortran/49791, PR middle-end/49897, + PR middle-end/49898, PR target/49920, PR target/47908 (closes: #635919), + PR c++/43886, PR c++/49593, PR c++/49803, PR c++/49924, PR c++/49260, + PR fortran/49885, PR fortran/48876, PR libstdc++/49925, PR target/50001, + PR tree-optimization/49948, PR c++/48993, PR c++/49921, PR c++/49669, + PR c++/49988, PR fortran/49112. + + [ Aurelien Jarno ] + * Update patches/kbsd-gnu.diff for recent changes. Closes: #635195. + * Add s390x support. + + [ Marcin Juszkiewicz ] + * Fixes for multilib cross builds. LP: #816852, #819147. + + [ Matthias Klose ] + * Fix libgo installation for cross builds. + * Only apply arm-multilib when building for multilib. + + -- Matthias Klose Sun, 07 Aug 2011 18:20:00 +0200 + +gcc-4.6 (4.6.1-5) unstable; urgency=low + + * Update to SVN 20110723 (r176672) from the gcc-4_6-branch. + - Fix PR target/49541, PR tree-optimization/49768, PR middle-end/49675, + PR target/49746, PR middle-end/49732, PR tree-optimization/49725, + PR target/49723, PR target/49541, PR tree-opt/49309, PR c++/49785, + PR ada/48711, PR ada/46350, PR fortran/49648, PR testsuite/49753, + PR tree-optimization/49309, PR tree-optimization/45819, PR target/49600, + PR fortran/49708, PR libstdc++/49293. + * Update the Linaro support to the 4.6-2011.07-0 release. + - Fix PR target/49335. LP: #791327. + * Update gcc-multiarch: + - Add -print-multiarch option. + - Fix library path for non-default multilib(s). + - Handle `.' in MULTILIB_DIRNAMES. + * Add support to build multilib on armel and armhf, only enable it for + Ubuntu/oneiric. LP: #810360. + * cpp-4.6: Add empty multiarch directories for the non-default multilibs, + needed for relative lookups from startfile_prefixes. + * Fix PR c++/49756, backport from trunk. LP: #721378. + * libgcc1: Add breaks to gcc-4.1 and gcc-4.3. Closes: #634821. + * Configure for DEB_TARGET_MULTIARCH defaults. + + -- Matthias Klose Sat, 23 Jul 2011 08:15:50 +0200 + +gcc-4.6 (4.6.1-4) unstable; urgency=low + + * Update to SVN 20110714 (r176280) from the gcc-4_6-branch. + - Fix PR tree-optimization/49094, PR target/39633, PR c++/49672, + PR fortran/49698, PR fortran/49690, PR fortran/49562, PR libfortran/49296, + PR target/49487, PR tree-optimization/49651, PR ada/48711. + + [ Matthias Klose ] + * Build Go on alpha for gcc-snapshot builds. + * For multicore ARM, clear both caches, not just the dcache (proposed + patch by Andrew Haley). + * Fix for PR rtl-optimization/{48830,48808,48792}, taken from the trunk. + LP: #807573. + * Fix PR tree-optimization/49169, optimisations strip the Thumb/ARM mode bit + off function pointers (Richard Sandiford). LP: #721531. + + [ Marcin Juszkiewicz ] + * Define DEB_TARGET_MULTIARCH macro. + * debian/rules2: Macro and configuration consolidation. + + -- Matthias Klose Thu, 14 Jul 2011 19:38:49 +0200 + +gcc-4.6 (4.6.1-3) unstable; urgency=medium + + * Update to SVN 20110709 (r176108) from the gcc-4_6-branch. + - Fix PR target/49335, PR tree-optimization/49618, PR c++/49598, + PR fortran/49479, PR target/49621, PR target/46779, PR target/49660, + PR c/49644, PR debug/49522, PR debug/49522, PR middle-end/49640, + PR c++/48157, PR c/49644, PR fortran/48926. + - Apparently fixes a boost issue. Closes: #632938. + * Apply proposed patch for PR fortran/49690. Closes: #631204. + + * README.Debian: New section 'Former and/or inactive maintainers'. + + -- Matthias Klose Sun, 10 Jul 2011 00:04:34 +0200 + +gcc-4.6 (4.6.1-2) unstable; urgency=medium + + * Update to SVN 20110705 (r175840) from the gcc-4_6-branch. + - Fix PR target/47997, PR c++/49528, PR c++/49440, PR c++/49418, + PR target/44643, PR tree-optimization/49615, PR tree-optimization/49572, + PR target/34734, PR tree-optimization/49539, PR tree-optimizations/49516, + PR target/49089, PR rtl-optimization/49014, PR target/48273, + PR fortran/49466, PR libfortran/49296, PR libffi/46660, PR debug/49262, + PR rtl-optimization/49472, PR rtl-optimization/49619, PR fortran/49623, + PR fortran/49540. + + [Ludovic Brenta, Євгеній Мещеряков, Xavier Grave] + * Adjust patches to GCC 4.6. + * Remove patches merged upstream: + - debian/patches/ada-arm-eabi.diff + - debian/patches/ada-bug589164.diff + - debian/patches/ada-bug601133.diff + - debian/patches/ada-gnatvsn.diff + - debian/patches/ada-mips.diff + - debian/patches/ada-polyorb-dsa.diff + + [Ludovic Brenta] + * debian/patches/ada-acats.diff: set LD_LIBRARY_PATH, ADA_INCLUDE_PATH + and ADA_OBJECTS_PATH so that the GNAT testsuite runs. + * debian/patches/adalibgnat{vsn,prj}.diff, + debian/rules.d/binary-ada.mk: install libgnat{vsn,prj}.so.* in the correct + multiarch directory. + * debian/control.m4, debian/rules.d/binary-ada.mk: move the SJLJ version + of the Ada run-time library to a new package, gnat-4.6-sjlj. + * debian/control.m4 (libgnatvsn4.6, libgnatvsn4.6-dbg, libgnatprj4.6, + libgnatprj4.6-dbg): pre-depend on multiarch-support and add + Multi-Arch: same. + + [Nicolas Boulenguez] + * debian/rules.d/binary-ada.mk: add gnathtml to the package gnat-4.6. + * debian/gnat.1: remove the version number of GCC. Mention gnathtml. + + [ Matthias Klose ] + * Do not install the spu and hppa64 cross compilers into the multiarch path. + * Update the Linaro support to 20110704. + + [ Thorsten Glaser ] + * Apply changes from src:gcc-4.4 for m68k support. Closes: #632380. + - debian/rules.defs: Remove m68k from locale_no_cpus. + - debian/patches/gcc-multiarch.diff: Add m68k multiarch_mappings. + - debian/patches/pr43804.diff: Fix backported from SVN. + - debian/rules.patch: Add pr43804. + + -- Matthias Klose Tue, 05 Jul 2011 10:45:56 +0200 + +gcc-4.6 (4.6.1-1) unstable; urgency=low + + * GCC 4.6.1 release. + + [Ludovic Brenta] + * debian/patches/ada-gnatvsn.diff, + debian/patches/ada-polyorb-dsa.diff: remove backports, no longer + needed. + + [ Matthias Klose ] + * Fix plugin header installation. Closes: #631082. + * Stop passing -Wno-error=unused-but-set-parameter and + -Wno-error=unused-but-set-variable if -Werror is present. + This was a temporary workaround introduced in 4.6.0~rc1-2. Closes: #615157. + * gcc-4.6-spu: Install the lto plugin. Closes: #631772. + + -- Matthias Klose Mon, 27 Jun 2011 13:54:04 +0200 + +gcc-4.6 (4.6.0-14) unstable; urgency=low + + * Update to SVN 20110616 (r175102) from the gcc-4_6-branch. + - Fix PR debug/48459, PR fortran/49103, PR rtl-optimization/49390, + PR c++/49117, PR c++/49369, PR c++/49290, PR target/44618, + PR tree-optimization/49419 (closes: #630567). + * Update the Linaro support to the 4.6-2011.06-0 release. + + -- Matthias Klose Thu, 16 Jun 2011 16:10:33 +0200 + +gcc-4.6 (4.6.0-13) unstable; urgency=low + + * Update to SVN 20110611 (r174958) from the gcc-4_6-branch. + * Extend multiarch support for mips/mipsel. + * Fix control files for gcj multiarch builds. + * Update libstdc++ symbols files. + + -- Matthias Klose Sat, 11 Jun 2011 20:49:42 +0200 + +gcc-4.6 (4.6.0-12) unstable; urgency=medium + + * Update to SVN 20110608 (r174800) from the gcc-4_6-branch. + - PR target/49186, PR rtl-optimization/49235, PR tree-optimization/48702, + PR tree-optimization/49243, PR c++/49134, PR target/49238, + PR gcov-profile/49299, PR c++/48780, PR c++/49298, PR fortran/49268. + * Fix c++ biarch header installation on i386. LP: #793411. + * Enable multiarch. + * Add multiarch attributes for gnat and libgnat packages. + * Add multiarch attributes for libgcj* packages. + * Adjust build dependency on multiarch glibc. + + -- Matthias Klose Wed, 08 Jun 2011 11:26:52 +0200 + +gcc-4.6 (4.6.0-11) unstable; urgency=low + + * Update to SVN 20110604 (r174637) from the gcc-4_6-branch. + - Fix PR c++/49165, PR tree-optimization/49218, PR target/45263, + PR target/43700, PR target/43995, PR tree-optimization/49217, + PR c++/49223, PR c++/47049, PR c++/47277, PR c++/48284, PR c++/48657, + PR c++/49176, PR fortran/48955, PR tree-optimization/49038, + PR tree-optimization/49093, PR middle-end/48985, PR middle-end/48953, + PR c++/49276, PR fortran/49265, PR fortran/45786. + * Configure the hppa64 and spu cross builds with --enable-plugin. + + -- Matthias Klose Sat, 04 Jun 2011 16:12:27 +0200 + +gcc-4.6 (4.6.0-10) unstable; urgency=high + + * Update to SVN 20110526 (r174290) from the gcc-4_6-branch. + - Fix PR target/44643, PR c++/49165, PR tree-optimization/49161, + PR target/49128, PR tree-optimization/44897, PR target/49133, + PR c++/44994, PR c++/49156, PR c++/45401, PR c++/44311, PR c++/44311, + PR c++/45698, PR c++/46145, PR c++/46245, PR c++/46696, PR c++/47184, + PR c++/48935, PR c++/45418, PR c++/45080, PR c++/48292, PR c++/49136, + PR c++/49042, PR c++/48884, PR c++/49105, PR c++/47263, PR c++/47336, + PR c++/47544, PR c++/48617, PR c++/48424, PR libstdc++/49141, + PR libobjc/48177. + * Proposed fix for PR tree-optimization/48702, PR tree-optimization/49144. + Closes: #627795. + * Proposed fix for PR fortran/PR48955. + * Add some conditionals to build the package on older releases. + + -- Matthias Klose Thu, 26 May 2011 16:00:49 +0200 + +gcc-4.6 (4.6.0-9) unstable; urgency=low + + * Update to SVN 20110524 (r174102) from the gcc-4_6-branch. + - Fix PR lto/49123, PR debug/49032, PR c/49120, PR middle-end/48973, + PR target/49104, PR middle-end/49029, PR c++/48647, PR c++/48945, + PR c++/48780, PR c++/49066, PR libstdc++/49058, PR target/49104. + * Use gcc-4.4 as the bootstrap compiler for kfreebsd to work around + a bootstrap issue. + + -- Matthias Klose Tue, 24 May 2011 09:41:35 +0200 + +gcc-4.6 (4.6.0-8) unstable; urgency=low + + * Update to SVN 20110521 (r173994) from the gcc-4_6-branch. + - Fix PR target/48986, PR preprocessor/48677, PR tree-optimization/48975, + PR tree-optimization/48822, PR debug/48967, PR debug/48159, + PR target/48857, PR target/48495, PR tree-optimization/48837, + PR tree-optimization/48611, PR tree-optimization/48794, PR c++/48859, + PR c++/48574, PR fortran/48889, PR target/49002, PR lto/48207, + PR tree-optimization/49039, PR tree-optimization/49018, PR lto/48703, + PR tree-optimization/48172, PR tree-optimization/48172, PR c++/48873, + PR tree-optimization/49000, PR c++/48869, PR c++/49043, PR c++/49082, + PR c++/48948, PR c++/48745, PR c++/48736, PR bootstrap/49086, + PR tree-optimization/49079, PR tree-optimization/49073. + * Update the Linaro support to the 4.6-2011.05-0 release. + * pr45979.diff: Update to the version from the trunk. + + -- Matthias Klose Sat, 21 May 2011 12:19:10 +0200 + +gcc-4.6 (4.6.0-7) unstable; urgency=low + + * Update to SVN 20110507 (r173528) from the gcc-4_6-branch. + - Fix PR middle-end/48597, PR c++/48656, PR fortran/48112, + PR fortran/48279, PR fortran/48788, PR tree-optimization/48809, + PR target/48262, PR fortran/48462, PR fortran/48746, + PR fortran/48810, PR fortran/48800, PR libstdc++/48760, + PR libgfortran/48030, PR preprocessor/48192, PR lto/48846, + PR target/48723, PR fortran/48894, PR target/48900, PR target/48252, + PR c++/40975, PR target/48252, PR target/48774, PR c++/48838, + PR c++/48749, PR ada/48844, PR fortran/48720, PR libstdc++/48750, + PR c++/48909, PR c++/48911, PR c++/48446, PR c++/48089. + + * Fix issue with volatile bitfields vs. inline asm memory constraints, + taken from the trunk, apply for ARM only. Addresses: #625825. + + -- Matthias Klose Sat, 07 May 2011 14:54:51 +0200 + +gcc-4.6 (4.6.0-6) unstable; urgency=low + + * Update to SVN 20110428 (r173059) from the gcc-4_6-branch. + - Fix PR c/48685 (closes: #623161), PR tree-optimization/48717, PR c/48716, + PR c/48742, PR debug/48768, PR tree-optimization/48734, + PR tree-optimization/48731, PR other/48748, PR c++/42687, PR c++/48726, + PR c++/48707, PR fortran/48588, PR libstdc++/48521, PR c++/48046, + PR preprocessor/48740. + * Update the ibm/gcc-4_6-branch to 20110428. + * Use gcc-4.6 as bootstrap compiler on kfreebsd-*. + + -- Matthias Klose Thu, 28 Apr 2011 10:33:52 +0200 + +gcc-4.6 (4.6.0-5) unstable; urgency=low + + * Update to SVN 20110421 (r172845) from the gcc-4_6-branch. + - Fix PR target/48288, PR tree-optimization/48611, PR lto/48148, + PR lto/48492, PR fortran/47976, PR c++/48594, PR c++/48657, + PR c++/46304, PR target/48708, PR middle-end/48695. + + * Update the Linaro support to the 4.6-2011.04-0 release. + + -- Matthias Klose Thu, 21 Apr 2011 22:50:25 +0200 + +gcc-4.6 (4.6.0-4) unstable; urgency=medium + + * Update to SVN 20110419 (r172584) from the gcc-4_6-branch. + - Fix PR target/48678, PR middle-end/48661, PR tree-optimization/48616, + PR lto/48538, PR c++/48537, PR c++/48632, PR testsuite/48675, + PR libstdc++/48635, PR libfortran/47571. + + [ Aurelien Jarno ] + * Enable SSP on mips/mipsel. + + [ Matthias Klose ] + * (Build-)depend on binutils 2.21.51. + + -- Matthias Klose Tue, 19 Apr 2011 23:45:16 +0200 + +gcc-4.6 (4.6.0-3) unstable; urgency=high + + * Update to SVN 20110416 (r172584) from the gcc-4_6-branch. + - Fix PR rtl-optimization/48143, PR target/48142, PR target/48349, + PR debug/48253, PR fortran/48291, PR target/16292, PR c++/48280, + PR c++/48212, PR c++/48369, PR c++/48281, PR c++/48265, PR lto/48246, + PR libstdc++/48398, PR bootstrap/48431, PR tree-optimization/48377, + PR debug/48343, PR rtl-optimization/48144, PR debug/48466, PR c/48517, + PR middle-end/48335, PR c++/48450, PR target/47829, PR c++/48534, + PR c++/48523, PR libstdc++/48566, PR libstdc++/48541, PR target/48366, + PR libstdc++/48465, PR middle-end/48591, PR target/48605, + PR middle-end/48591, PR target/48090, PR tree-optimization/48195, + PR rtl-optimization/48549, PR c++/48594, PR c++/48570, PR c++/48574, + PR fortran/48360, PR fortran/48456, PR libstdc++/48631, + PR libstdc++/48635, PR libstdc++/48476. + + [ Matthias Klose ] + * libjava-jnipath.diff: Add /usr/lib//jni as jnipath too. + * Add mudflap support for varargs (patch taken from the trunk). + * gcc-4.6-plugin-dev: Install gtype.state. + * Bootstrap with gcc-4.4 -g -O2 on armel. + * Fix linker plugin configuration. Closes: #620661. + * Update the Linaro support for GCC-4.6. + * gcc-snapshot builds: + - Fix build with multiarch changes. + - Use gcc-snapshot as the bootstrap compiler on armel. + - Re-enable building java in the gcc-snapshot package. + * Build supporting multiarch on wheezy/sid. + * Adjust (build)-dependency to new libgmp-dev name. + + [ Marcin Juszkiewicz ] + * Configure stage1 cross builds with --disable-libquadmath. + + -- Matthias Klose Sat, 16 Apr 2011 17:02:30 +0200 + +gcc-4.6 (4.6.0-2) unstable; urgency=low + + * Update to SVN 20110329 (r171700) from the gcc-4_6-branch. + - Fix PR bootstrap/48135, PR target/47553, PR middle-end/48269, + PR tree-optimization/48228, PR middle-end/48134, PR middle-end/48031, + PR other/48179, PR other/48221, PR other/48234, PR target/48237, + PR debug/48204, PR c/42544, PR c/48197, PR rtl-optimization/48141, + PR rtl-optimization/48141, PR c++/48166, PR c++/48296, PR c++/48289, + PR c++/47999, PR c++/48313, Core 1232, Core 1148, PR c++/47504, + PR c++/47570, PR preprocessor/48248, PR c++/48319. + + [ Matthias Klose ] + * Update NEWS files. + * Configure the hppa64 cross build with --disable-libquadmath. + * Don't build armhf from the Linaro branch. + * Don't try to build Go on sh4. + + [ Marcin Juszkiewicz ] + * Fixes issues with staged cross builds. LP: #741855, #741853. + * Fix libdir setting for multiarch enabled cross builds. LP: #741846. + * Drop alternatives for cross builds. LP: #676454. + + -- Matthias Klose Tue, 29 Mar 2011 23:22:07 +0200 + +gcc-4.6 (4.6.0-1) unstable; urgency=low + + * GCC 4.6.0 release. + + * Build the gold LTO plugin for ppc64 (Hiroyuki Yamamoto). Closes: #618865. + * Fix PR target/48226, Allow Iterator::vector vector on powerpc with VSX, + taken from the trunk. + * Fix PR target/47487 ICE building libgo, taken from the trunk. + * Merge multiarch changes from the gcc-4.5 package. + * Apply proposed patch to reduce the overhead of dwarf2 location tracking. + Addresses: #618748. + + -- Matthias Klose Sat, 26 Mar 2011 03:03:21 +0100 + +gcc-4.6 (4.6.0~rc1-3) experimental; urgency=low + + * GCC 4.6.0 release candidate 2. + + -- Matthias Klose Tue, 22 Mar 2011 22:11:42 +0100 + +gcc-4.6 (4.6.0~rc1-2) experimental; urgency=low + + [ Loic Minier ] + * Rework config/vxworks-dummy.h installation snippet to test + DEB_TARGET_GNU_CPU against patterns close to the upstream ones (arm% mips% + sh% sparc%) as to also install this header on other ports targetting the + relevant upstream CPUs such as armhf. Add a comment pointing at the + upstream bug. + * Update __aeabi symbol handling to test whether DEB_TARGET_GNU_TYPE matches + arm-linux-gnueabi% instead of testing whether DEB_TARGET_ARCH equals + armel. Add a comment pointing at the Debian bug and indicating that this + is only useful for older dpkg-dev versions. + * debian/rules.def: fix "armel" entry to "arm" in list of + DEB_TARGET_ARCH_CPUs for Debian experimental GCC 4.5/4.6 libraries. + * debian/rules2: drop commented out GCC #42509 workaround as this was fixed + upstream in 4.4+. + * Change bogus DEB_TARGET_GNU_CPU test on armel and armhf to just test for + arm as ths is what the Debian arm, armel and armhf port use. + * Rework snippet setting armv7 on Debian armhf / Ubuntu to avoid + duplication, as a comment called out for. + * Use "arm" instead of armel/armhf in DEB_TARGET_GNU_CPU test when deciding + whether to enable profiledbootstrap. + * Set DEJAGNU_TIMEOUT=600 on Ubuntu armhf as well. + * Fix a couple more uses of armel or armhf against DEB_TARGET_GNU_CPU. + * Patched a couple of comments mentioning armel to also mention armhf. + * Add patch armhf-triplet-backport, support for arm-linux-*eabi* backported + from a patch sent on the upstream mailing-list. + + [ Matthias Klose ] + * Update libstdc++ symbols files. + * Update libgfortran symbols files. + + -- Matthias Klose Sun, 20 Mar 2011 13:53:48 +0100 + +gcc-4.6 (4.6.0~rc1-2) experimental; urgency=low + + * Update to SVN 20110320 (r171192) from the gcc-4_6-branch. + + [ Matthias Klose ] + * Update gcc-default-ssp* patches for the release candidate. + * Pass -Wno-error=unused-but-set-parameter if -Werror is present (temporary + for rebuild tests). + * Always configure --with-plugin-ld, always install liblto_plugin.so. + + [ Marcin Juszkiewicz ] + * Add conflicts with -4.5-*dev packages. Closes: #618450. + + [ Petr Salinger] + * Disable lock-2.c test on kfreebsd-*. Closes: #618988. + * Re-enable parallel builds on kfreebsd. + * Package lto_plugin for kfreebsd-* and Hurd. + + -- Matthias Klose Sun, 20 Mar 2011 13:53:48 +0100 + +gcc-4.6 (4.6.0~rc1-1) experimental; urgency=low + + * Build from the GCC 4.6.0 release candidate tarball. + + [ Matthias Klose ] + * Disable Go on powerpc. Closes: #615827. + * Fix lintian errors for the -plugin-dev package. + * Update kbsd-gnu.diff (Petr Salinger). Closes: #615826. + * Disable parallel builds on kfreebsd (Petr Salinger). + * Update gmp (build) dependencies. + * Update GFDL compliant builds. Closes: #609161. + * For GFDL compliant builds, build a dummy s-tm-texi without access + to the texinfo sources. + + [ Aurelien Jarno ] + * Import symbol files for kfreebsd-amd64, kfreebsd-i386, sh4 and + sparc64 from gcc-4.5. + + -- Matthias Klose Mon, 14 Mar 2011 19:01:08 +0100 + +gcc-4.6 (4.6-20110227-1) experimental; urgency=low + + [ Matthias Klose ] + * Update libquadmath symbols file. + * gcc-4.6-plugin-dev: Install gengtype. + + [ Sebastian Andrzej Siewior ] + * Remove -many on powerpcspe (__SPE__). + * Remove classic FPU opcodes from libgcc if target has no support for them + (powerpcspe). + + -- Matthias Klose Sun, 27 Feb 2011 22:33:45 +0100 + +gcc-4.6 (4.6-20110216-1) experimental; urgency=low + + * GCC snapshot, taken from the trunk. + * Pass --no-add-needed by default to the linker. See + http://wiki.debian.org/ToolChain/DSOLinking, section "Not resolving symbols + in indirect dependent shared libraries" for more information. + + -- Matthias Klose Wed, 16 Feb 2011 23:55:32 +0100 + +gcc-4.6 (4.6-20110125-1) experimental; urgency=low + + * debian/copyright: Add unicode copyright for + libjava/classpath/resource/gnu/java/locale/* files. Addresses: #609161. + + -- Matthias Klose Wed, 26 Jan 2011 03:42:10 +0100 + +gcc-4.6 (4.6-20110123-1) experimental; urgency=low + + * GCC snapshot, taken from the trunk. + * Don't run the libstdc++ testsuite on mipsel, times out on the buildd. + + [ Marcin Juszkiewicz ] + * Fix biarch/triarch cross builds. + - dpkg-shlibdeps failed to find libraries for 64 or n32 builds + - LD_LIBRARY_PATH for dpkg-shlibdeps lacked host dirs. + + -- Matthias Klose Sun, 23 Jan 2011 12:14:49 +0100 + +gcc-4.6 (4.6-20110116-1) experimental; urgency=low + + * GCC snapshot, taken from the trunk. + * Update patches for the trunk. + * Pass -Wno-error=unused-but-set-variable if -Werror is present (temporary + for rebuild tests). + * Work around PR libffi/47248, force a read only eh frame section. + + -- Matthias Klose Sun, 16 Jan 2011 23:28:28 +0100 + +gcc-4.6 (4.6-20110105-1) experimental; urgency=low + + [ Matthias Klose ] + * Rename and update libobjc symbols files. + * Update cloog/ppl build dependencies. + * Adjust libstdc++ configure and paths for stylesheets and dtds. + * Update copyright for libquadmath, libgo, gcc/go/gofrontend. + * Enable Go for more architectures. + * DP: libgo: Fix GOARCH for i386 biarch, add GOARCH for powerpc + + [ Kees Cook ] + * Update hardening patches for GCC-4.6. LP: #696990. + + -- Matthias Klose Wed, 05 Jan 2011 22:29:57 +0100 + +gcc-4.6 (4.6-20101220-1) maverick; urgency=low + + * GCC snapshot, taken from the trunk. + + -- Matthias Klose Tue, 21 Dec 2010 00:16:19 +0100 + +gcc-4.5 (4.5.2-7) unstable; urgency=low + + * Update to SVN 20110323 (r171351) from the gcc-4_5-branch. + - Fix PR c++/47125, PR fortran/47348, PR libstdc++/48114, + PR libfortran/48066, PR target/48171, PR target/47862. + PR preprocessor/48192. + + [ Steve Langasek ] + * Make dpkg-dev versioned build-dependency conditional on whether we want + to build for multiarch. + * Add a new patch, gcc-multiarch+biarch.diff, used only when building for + multiarch to set our multilib paths to the correct relative directories. + * debian/rules.defs: support turning on multiarch build by architecture; + but don't enable this yet, we still need to wait for dpkg-dev. + * When DEB_HOST_MULTIARCH is available (i.e., with the next dpkg upload), + use it as our multiarch path. + * debian/rules.d/binary-java.mk: jvm-exports path is /usr/lib/jvm-exports, + not $(libdir)/jvm-exports. + * OTOH, libgcj_bc *is* in $(libdir). + * the spu build is not a multiarch build; look in the correct + non-multiarch directory. + * debian/rules2: pass --libdir also for stageX builds, needed in order to + successfully build for multiarch. + * debian/rules2: $(usr_lib) for a cross-build should not include the + multiarch dir as part of the path. + * debian/patches/gcc-multiarch+biarch.diff: restore the original intent of + the patch, namely, that the multilib dir for the default variant is + always equal to libdir (the multiarch dir), and we walk up the tree + to find lib for the secondary variant. + * debian/patches/gcc-multiarch+biarch32.diff: apply the same multilib + directory rewriting for biarch paths with multiarch as we do without; + still needed in the near term. + * Put our list of patches in README.Debian.$(DEB_TARGET_ARCH) instead of + in README.Debian, so that the individual files are architecture-neutral + and play nicely with multiarch. LP: #737846. + * Add a comment at the bottom of README.Debian with a pointer to the new + file listing the patches. + + [ Loic Minier ] + * Rework config/vxworks-dummy.h installation snippet to test + DEB_TARGET_GNU_CPU against patterns close to the upstream ones (arm% mips% + sh% sparc%) as to also install this header on other ports targetting the + relevant upstream CPUs such as armhf. Add a comment pointing at the + upstream bug. + * Update __aeabi symbol handling to test whether DEB_TARGET_GNU_TYPE matches + arm-linux-gnueabi% instead of testing whether DEB_TARGET_ARCH equals + armel. Add a comment pointing at the Debian bug and indicating that this + is only useful for older dpkg-dev versions. + * debian/rules.def: fix "armel" entry to "arm" in list of + DEB_TARGET_ARCH_CPUs for Debian experimental GCC 4.5/4.6 libraries. + * debian/rules2: drop commented out GCC #42509 workaround as this was fixed + upstream in 4.4+. + * Change bogus DEB_TARGET_GNU_CPU test on armel and armhf to just test for + arm as ths is what the Debian arm, armel and armhf port use. + * Rework snippet setting armv7 on Debian armhf / Ubuntu to avoid + duplication, as a comment called out for. + * Use "arm" instead of armel/armhf in DEB_TARGET_GNU_CPU test when deciding + whether to enable profiledbootstrap. + * Set DEJAGNU_TIMEOUT=600 on Ubuntu armhf as well. + * Fix a couple more uses of armel or armhf against DEB_TARGET_GNU_CPU. + * Patched a couple of comments mentioning armel to also mention armhf. + * Add patch armhf-triplet-backport, support for arm-linux-*eabi* backported + from a patch sent on the upstream mailing-list. + + [ Matthias Klose ] + * Fix PR target/48226, Allow Iterator::vector vector on powerpc with VSX, + taken from the trunk. + * Fix PR preprocessor/48192, make conditional macros not defined for + #ifdef, proposed patch. + * Build the gold LTO plugin for ppc64 (Hiroyuki Yamamoto). Closes: #618864. + * Fix issue with volatile bitfields, default to -fstrict-volatile-bitfields + again on armel for Linaro builds. LP: #675347. + + -- Matthias Klose Wed, 23 Mar 2011 15:44:01 +0100 + +gcc-4.5 (4.5.2-6) unstable; urgency=low + + * Update to SVN 20110312 (r170895) from the gcc-4_5-branch. + - Fix PR tree-optimization/45967, PR tree-optimization/47278, + PR target/47862, PR c++/44629, PR c++/45651, PR c++/47289, PR c++/47705, + PR c++/47488, PR libgfortran/47778, PR c++/48029. + + [ Steve Langasek ] + * Make sure our libs Pre-Depend on 'multiarch-support' when building for + multiarch. + * debian/patches/gcc-multiarch*, debian/rules.patch: use i386 in the + multiarch path for amd64 / kfreebsd-amd64, not i486 or i686. This lets + us use a common set of paths on both Debian and Ubuntu, regardless of + the target default optimization level. + * debian/rules.conf: when building for multiarch, we need to be sure we + are building against a libc-dev that supports the corresponding paths. + (the referenced version number for this needs to be bumped once this is + officially in the archive.) + + [ Matthias Klose ] + * Don't run the libmudflap testsuite on hppa; times out on the buildd. + * Don't run the libstdc++ testsuite on mipsel; times out on the buildd. + * Post Linaro 4.5-2011.03-0 release changes (up to 20110313). + * Undefine LINK_EH_SPEC before redefining it to turn off warnings on + powerpc. + * Update gmp (build) dependencies. + + [ Aurelien Jarno ] + * Add symbol files on kfreebsd-i386. + * Add symbol files on kfreebsd-amd64. + * Add symbol files on sparc64. + * Add symbol files on sh4. + + -- Matthias Klose Sun, 13 Mar 2011 17:30:48 +0100 + +gcc-4.5 (4.5.2-5) unstable; urgency=low + + * Update to SVN 20110305 (r170696) from the gcc-4_5-branch. + - Fix PR target/43810, PR fortran/47886, PR tree-optimization/47615, + PR middle-end/47639, PR tree-optimization/47890, PR libfortran/47830, + PR tree-optimization/46723, PR target/45261, PR target/45808, + PR c++/46159, PR c++/47904, PR fortran/47886, PR libstdc++/47433, + PR target/42240, PR fortran/47878, PR libfortran/47694. + * Update the Linaro support to the 4.5-2011.03-0 release. + - Fix LP: #705689, LP: #695302, LP: #710652, LP: #710623, LP: #721021, + LP: #721021, LP: #709453. + + -- Matthias Klose Sun, 06 Mar 2011 02:58:01 +0100 + +gcc-4.5 (4.5.2-4) unstable; urgency=low + + * Update to SVN 20110222 (r170382) from the gcc-4_5-branch. + - Fix PR target/43653, PR fortran/47775, PR target/47840, + PR libfortran/47830. + + [ Matthias Klose ] + * Don't apply a patch twice. + * Build libgcc_s with -fno-stack-protector, when not building from the + Linaro branch. + * Backport proposed fix for PR tree-optimization/46723 from the trunk. + + [ Steve Langasek ] + * debian/control.m4: add missing Multi-Arch: same for libgcc4; make sure + Multi-Arch: same doesn't get set for libmudflap when building an + Architecture: all cross-compiler package. + * debian/rules2: use $libdir for libiberty.a. + * debian/patches/gcc-multiarch-*.diff: make sure we're using the same + set_multiarch_path definition for all variants. + + [ Sebastian Andrzej Siewior ] + * PR target/44364 + * Remove -many on powerpcspe (__SPE__) + * Remove classic FPU opcodes from libgcc if target has no support for them + (powerpcspe) + + -- Matthias Klose Wed, 23 Feb 2011 00:35:54 +0100 + +gcc-4.5 (4.5.2-3) experimental; urgency=low + + * Update to SVN 20110215 (r170181) from the gcc-4_5-branch. + - Fix PR rtl-optimization/44469, PR tree-optimization/47411, + PR bootstrap/44699, PR target/44392, PR fortran/47331, PR fortran/47448, + PR pch/14940, PR rtl-optimization/47166, PR target/47272, PR target/47580, + PR tree-optimization/47541, PR target/44606, PR boehm-gc/34544, + PR fortran/47569, PR libstdc++/47709, PR libstdc++/46914, PR libffi/46661. + * Update the Linaro support to the 4.5 2011.02-0 release. + * Pass --no-add-needed by default to the linker. See + http://wiki.debian.org/ToolChain/DSOLinking, section "Not resolving symbols + in indirect dependent shared libraries" for more information. + + -- Matthias Klose Wed, 16 Feb 2011 15:29:26 +0100 + +gcc-4.5 (4.5.2-2) experimental; urgency=low + + * Update to SVN 20110123 (r169142) from the gcc-4_5-branch. + - Fix PR target/46915, PR target/46729, PR libgcj/46774, PR target/47038, + PR target/46685, PR target/45447, PR tree-optimization/46758, + PR tree-optimization/45552, PR tree-optimization/43023, + PR middle-end/46734, PR fortran/45338, PR preprocessor/39213, + PR target/43309, PR fortran/46874, PR tree-optimization/47286, + PR tree-optimization/44592, PR target/47201, PR c/47150, PR target/46880, + PR middle-end/45852, PR tree-optimization/43655, PR debug/46893, + PR rtl-optimization/46804, PR rtl-optimization/46865, PR target/41082, + PR tree-optimization/46864, PR fortran/45777, PR tree-optimization/47365, + PR tree-optimization/47167, PR target/47318, PR target/46655, + PR fortran/47394, PR libstdc++/47354. + + [ Matthias Klose ] + * Update the Linaro support to the 4.5 2011.01-1 release. + * Don't build packages now built from the gcc-4.6 package for architectures + with a sucessful gcc-4.6 build. + + [ Kees Cook ] + * debian/patches/gcc-default-ssp.patch: do not ignore -fstack-protector-all + (LP: #691722). + + [ Marcin Juszkiewicz ] + * Fix biarch/triarch cross builds. + - dpkg-shlibdeps failed to find libraries for 64 or n32 builds + - LD_LIBRARY_PATH for dpkg-shlibdeps lacked host dirs. + + -- Matthias Klose Sun, 23 Jan 2011 11:54:52 +0100 + +gcc-4.5 (4.5.2-1) experimental; urgency=low + + * GCC 4.5.2 release. + + -- Matthias Klose Sat, 18 Dec 2010 14:14:38 +0100 + +gcc-4.5 (4.5.1-12) experimental; urgency=low + + * Update to SVN 20101129 (r167272) from the gcc-4_5-branch. + - Fix PR fortran/45742, PR tree-optimization/46498, PR target/45807, + PR target/44266, PR rtl-optimization/46315, PR tree-optimization/44545, + PR tree-optimization/46491, PR rtl-optimization/46571, PR target/31100, + PR c/46547, PR fortran/46638, PR tree-optimization/46675, PR debug/46258, + PR ada/40777. + + [ Matthias Klose ] + * Use lib instead of lib64 as the 64bit system dir on biarch + architectures defaulting to 64bit. Closes: #603597. + * Fix powerpc and s390 builds when biarch is disabled. + * Backport PR bootstrap/44768, miscompilation of dpkg on ARM + with -O2 (Chung-Lin Tang). LP: #674146. + * Update libgcc2 symbols file. Closes: #602099. + + [ Marcin Juszkiewicz ] + * Do not depend on target mpfr and zlib -dev packages for cross builds. + LP: #676027. + + [ Konstantinos Margaritis ] + * Add support for new target architecture `armhf'. Closes: #603948. + + -- Matthias Klose Mon, 22 Nov 2010 08:12:08 +0100 + +gcc-4.5 (4.5.1-11) experimental; urgency=low + + * Update to SVN 20101114 (r166728) from the gcc-4_5-branch. + - Fix PR fortran/45742. + * Don't hardcode debian/patches when referencing patches. Closes: #600502. + + -- Matthias Klose Sun, 14 Nov 2010 08:36:27 +0100 + +gcc-4.5 (4.5.1-10) experimental; urgency=low + + * Update to SVN 20101112 (r166653) from the gcc-4_5-branch. + - Fix PR rtl-optimization/44691, PR tree-optimization/46355, + PR tree-optimization/46177, PR c/44772, PR tree-optimization/46099, + PR middle-end/43690, PR tree-optimization/46165, PR middle-end/46419, + PR tree-optimization/46107, PR tree-optimization/45314, PR debug/45939, + PR rtl-optimization/46237, PR middle-end/44569, PR middle-end/44569, + PR tree-optimization/45902, PR target/46153, PR rtl-optimization/46226, + PR tree-optimization/46167, PR target/46098, PR target/45946, + PR fortran/42169, PR middle-end/46019, PR c/45969, PR c++/45894, + PR c++/46160, PR c++/45983, PR fortran/46152, PR fortran/46140, + PR libstdc++/45999, PR libgfortran/46373, PR libgfortran/46010, + PR fortran/46007, PR c++/46024. + * Update the Linaro support to the 4.5 2010.11 release. + * Update gcc-4.5 source dependencies. Closes: #600503. + * ARM: Fix Thumb-1 reload ICE with nested functions (Julian Brown), + taken from the trunk. + * Fix earlyclobbers on some arm.md DImode shifts (may miscompile "x >> 1"), + taken from the trunk. Closes: #600888. + + -- Matthias Klose Fri, 12 Nov 2010 18:34:47 +0100 + +gcc-4.5 (4.5.1-9) experimental; urgency=low + + * Update to SVN 20101014 (r165474) from the gcc-4_5-branch. + - Fix PR target/45820, PR tree-optimization/45854, PR target/45843, + PR target/43764, PR rtl-optimization/43358, PR bootstrap/44621, + PR libffi/45677, PR middle-end/45869, PR middle-end/45569, + PR tree-optimization/45752, PR fortran/45748, PR libstdc++/45403, + PR libstdc++/45924, PR libfortran/45710, PR bootstrap/44455, + PR java/43839, PR debug/45656, PR debug/44832, PR libstdc++/45711, + PR tree-optimization/45982. + + [ Matthias Klose ] + * Update the Linaro support to the 4.5 2010.10 release. + * Just try to build java on mips/mipsel (was disabled in 4.5.0-9, when + java was built from the same source package). Addresses: #599976. + * Remove the gpc packaging support. + * Fix libmudflap.so symlink. Addresses: #600161. + * Fix pch test failures with heap randomization on armel (PR pch/45979). + + [ Kees Cook ] + * Don't enable -fstack-protector with -ffreestanding. + + -- Matthias Klose Thu, 14 Oct 2010 19:17:41 +0200 + +gcc-4.5 (4.5.1-8) experimental; urgency=low + + * Update to SVN 20100925 (r164618) from the gcc-4_5-branch. + - Fix PR middle-end/44763, PR java/44095, PR target/35664, + PR rtl-optimization/41085, PR rtl-optimization/45051, + PR target/45694, PR middle-end/45678, PR middle-end/45678, + PR middle-end/45704, PR rtl-optimization/45728, PR libfortran/45532, + PR rtl-optimization/45695, PR rtl-optimization/42775, PR target/45726, + PR tree-optimization/45623, PR tree-optimization/45709, PR debug/43628, + PR tree-optimization/45709, PR rtl-optimization/45593, PR fortran/45081, + * Find 32bit system libraries on sparc64, s390x. + * Remove README.Debian from the source package to avoid confusion for + readers of the packaging. + * Don't include info files and man pages in hppa64 and spu builds. + Closes: #597435. + * Apply proposed patch for PR mudflap/24619 (instrumentation of dlopen) + (Brian M. Carlson) Closes: #507514. + + -- Matthias Klose Sat, 25 Sep 2010 14:11:39 +0200 + +gcc-4.5 (4.5.1-7) experimental; urgency=low + + * Update to SVN 20100914 (r164279) from the gcc-4_5-branch. + - Fix PR target/40959, PR middle-end/45567, PR debug/45660, + PR rtl-optimization/41087, PR rtl-optimization/44919, PR target/36502, + PR target/42313, PR target/44651. + * Add support to build from the Linaro 4.5 2010.09 release. + * gcc-4.5-plugin-dev: Install config/arm/arm-cores.def. + * Remove non-existing URL's in README.c++ (Osamu Aoki). Closes: #596406. + * Don't provide c++abi2-dev for g++ cross builds. + * Don't pass -mimplicit-it=thumb if -mthumb to as on ARM, rejected upstream. + + -- Matthias Klose Tue, 14 Sep 2010 12:52:34 +0200 + +gcc-4.5 (4.5.1-6) experimental; urgency=low + + * Update to SVN 20100909 (r164132) from the gcc-4_5-branch. + - Fix PR middle-end/45312, PR bootstrap/43847, PR middle-end/44554, + PR middle-end/40386, PR other/45443, PR c++/45200, PR c++/45293, + PR c++/45558, PR fortran/45595, PR fortran/45530, PR fortran/45489, + PR fortran/45019, PR libstdc++/45398. + + [ Matthias Klose ] + * Tighten binutils dependencies to 2.20.1-14. + + [ Marcin Juszkiewicz ] + * Fix the gcc-4.5-plugin-dev package name for cross builds. LP: #631474. + * Build the gcc-4.5-plugin-dev for stage1 cross builds. + * Fix priorities and sections for some cross packages. + + [ Al Viro ] + * Fix installation of libgcc_s.so as a linker script for biarch builds. + + [ Kees Cook ] + * Push glibc stack traces into stderr when building the package. + * debian/patches/gcc-default-ssp.patch: Lower ssp-buffer-size to 4. + + -- Matthias Klose Fri, 10 Sep 2010 21:25:37 +0200 + +gcc-4.5 (4.5.1-5) experimental; urgency=low + + * Always add dependencies on multilib library packages in *-multilib + packages. + * Fix installation of libgcc_s.so on architectures when libgcc_s.so is + a linker script, not a symlink (Steve Langasek). Closes: #595474. + * Remove the lib32gcc1 preinst script. Closes: #595495. + + -- Matthias Klose Sat, 04 Sep 2010 12:41:40 +0200 + +gcc-4.5 (4.5.1-4) experimental; urgency=low + + * Update to SVN 20100903 (r163833) from the gcc-4_5-branch. + - Fix PR target/45070, PR middle-end/45458, PR rtl-optimization/45353, + PR middle-end/45423, PR c/45079, PR tree-optimization/45393, + PR c++/44991, PR middle-end/45484, PR debug/45500, PR lto/45496. + + [ Matthias Klose ] + * Install config/vxworks-dummy.h in the gcc-4.5-plugin-dev package + on armel, mipsel and sparc64 too. + * Cleanup packaging files in gcc-source package. + * [ARM] Provide __builtin_expect() hints in linux-atomic.c (backport). + + [ Al Viro ] + * Fix builds with disabled biarch library packages. + * New variables {usr_lib,gcc_lib_dir,libgcc_dir}{,32,64,n32}, and switch + to using them in rules.d/*; as the result, most of the explicit pathnames + in there are gone _and_ we get uniformity across different flavours. + * New variables {usr_lib,gcc_lib_dir,libgcc_dir}{,32,64,n32}, and switch + to using them in rules.d/*; as the result, most of the explicit pathnames + in there are gone _and_ we get uniformity across different flavours. + * Merge bi-/tri-arch stuff in binary-gcc.mk. + * Merge rules for libgcc biarch variants. + * Merge rules for libstdc++ biarch variants. Fix n32 variant of + libstdc++-dbg removing _pic.a from the wrong place. + * Merge libgfortran rules. + * Merge rules for cxx-multi and objc-multi packages. + * Enable gcc-hppa64 in cross-gcc-to-hppa build. + + [ Marcin Juszkiewicz ] + * Create libgcc1 and gcc-*-base packages for stage2 cross builds. + LP: #628855. + + -- Matthias Klose Fri, 03 Sep 2010 18:09:40 +0200 + +gcc-4.5 (4.5.1-3) experimental; urgency=low + + * Update to SVN 20100829 (r163627) from the gcc-4_5-branch. + - Fix PR target/45327, PR middle-end/45292, PR fortran/45344, + PR target/41484, PR rtl-optimization/44858, PR rtl-optimization/45400, + PR tree-optimization/45260, PR c++/45315. + + [ Matthias Klose ] + * Don't run the libstdc++ testsuite on armel on the buildds. + * Integrate and extend bi/tri-arch cross builds patches. + * Fix dependencies for mips* triarch library packages depend on *both* lib64* + and libn32* packages. Closes: #594540. + * Tighten binutils dependencies to 2.20.1-13. + * Update LAST_UPDATED file when applying upstream updates. + + [ Al Viro ] + * Bi/tri-arch cross builds patches. + * Fix installation paths in bi/tri-arch libobjc and libmudflap packages. + * Merge rules for all flavours of libgomp, libmudflap, libobjc. + * Crossbuild fix for lib32gomp (use $(PFL)/lib32 instead of $(lib32)). + * gcc-4.5: libgcc_s.so.1 symlink creation on cross-builds. + * Enable gcc-multilib for cross-builds and fix what needs fixing. + * Enable g++-multilib for cross-builds, fix pathnames. + * Enable gobjc/gobjc++ multilib for cross-builds, fixes. + * Enable gfortran multilib for cross-builds, fix paths. + * Multilib dependency fixes for cross-builds. + + -- Matthias Klose Sun, 29 Aug 2010 18:24:37 +0200 + +gcc-4.5 (4.5.1-2) experimental; urgency=low + + * Update to SVN 20100818 (r163323) from the gcc-4_5-branch. + - Fix PR target/41089, PR tree-optimization/44914, PR c++/45112, + PR fortran/44929, PR middle-end/45262, PR debug/45259, PR debug/45055, + PR target/44805, PR middle-end/45034, PR tree-optimization/45109, + PR target/44942, PR fortran/31588, PR fortran/43954, PR fortran/44660, + PR fortran/42051, PR fortran/44064, PR fortran/45151, PR libstdc++/44963, + PR tree-optimization/45241, PR middle-end/44632 (closes: #585925), + PR libstdc++/45283, PR target/45296. + + [ Matthias Klose ] + * Allow overwriting of the PF macro used in the build from the environment + (Jim Heck). Closes: #588381. + * Fix libc-dbg build dependency for java enabled builds. Addresses: #591424. + * gcj: Align data in .rodata.jutf8.* sections, patch taken from the trunk. + * Configure with --enable-checking+release. LP: #612822. + * Add the complete packaging to the -source package. LP: #608650. + * Drop the gcc-ix86-asm-generic32.diff patch. + * Tighten (build-) dependency on cloog-ppl (>= 0.15.9-2). + * Apply proposed patch for PR middle-end/45292. + * Re-enable running the libstdc++ testsuite on armel and ia64 on the buildds. + + [ Steve Langasek ] + * s,/lib/,/$(libdir)/, throughout debian/rules*; a no-op in the current + case, but required for us to find the libraries when building for + multiarch + * Don't append multiarch paths to any multilib paths except for the default; + our biarch (multilib) builds need to remain independent of multiarch in + the near term, so we want to make sure we can find /usr/lib32 without + /usr/lib/i486-linux-gnu being available. + * debian/control.m4, debian/rules.conf: conditionally set packages to be + Multi-Arch: yes when MULTIARCH is defined. + + [ Marcin Juszkiewicz ] + * Allow building intermediate stages for cross builds. LP: #603497. + + -- Matthias Klose Wed, 18 Aug 2010 07:00:12 +0200 + +gcc-4.5 (4.5.1-1) experimental; urgency=low + + * GCC-4.5.1 release. + * Update to SVN 20100731 (r162781) from the gcc-4_5-branch. + - Fix PR tree-optimization/45052, PR target/43698. + * Apply proposed fixes for PR c++/45112, PR c/45079. + * Install config/vxworks-dummy.h in the gcc-4.5-plugin-dev package + on armel, mips, mipsel, sh4, sparc, sparc64. Closes: #590054. + * Link executables statically when `static' is passed in DEB_BUILD_OPTIONS + (Jim Heck). Closes: #590102. + * Stop building java packages from the gcc-4.5 source package. + + -- Matthias Klose Sat, 31 Jul 2010 16:30:20 +0200 + +gcc-4.5 (4.5.0-10) experimental; urgency=low + + * Update to SVN 20100725 (r162508) from the gcc-4_5-branch. + - Fix PR tree-optimization/45047, PR c++/43016, PR c++/45008. + * Disable building gcj/libjava on mips/mipsel (fails to link libgcj). + * Update libstdc++6 symbols files. + + -- Matthias Klose Sun, 25 Jul 2010 16:39:11 +0200 + +gcc-4.5 (4.5.0-9) experimental; urgency=low + + * Update to SVN 20100723 (r162448) from the gcc-4_5-branch (post + GCC-4.5.1 release candidate 1). + - Fix PR debug/45015, PR target/44942, PR tree-optimization/44900, + PR tree-optimization/44977, PR c++/44996, PR fortran/44929, + PR fortran/30668, PR fortran/31346, PR fortran/34260, + PR fortran/40011. + + [ Marcin Juszkiewicz ] + * Fix dependencies on cross library packages. + * Copy all debian/rules* files to the -source package. + + [ Matthias Klose ] + * Fix versioned build dependency on gcc-4.x-source package for cross builds. + LP: #609060. + * Set Vcs attributes in control file. + + -- Matthias Klose Fri, 23 Jul 2010 13:08:07 +0200 + +gcc-4.5 (4.5.0-8) experimental; urgency=low + + * Update to SVN 20100718 (r161892) from the gcc-4_5-branch. + - Fixes: PR target/44531, PR bootstrap/44820, PR target/44597, + PR target/44705, PR middle-end/44777, PR debug/44694, PR c++/44039, + PR tree-optimization/43801, PR target/44575, PR debug/44104, + PR middle-end/44671, PR middle-end/44686, PR tree-optimization/44357, + PR debug/44694, PR middle-end/43866, PR debug/42278, PR c++/44059, + PR tree-optimization/43905, PR middle-end/44133, PR tree-optimize/44063, + PR tree-optimization/44683, PR rtl-optimization/43332, PR debug/44610, + PR middle-end/44684, PR tree-optimization/44393, PR middle-end/44674, + PR c++/44628, PR c++/44587, PR fortran/44582, PR fortran/43841, + PR fortran/43843, PR libstdc++/44708, PR tree-optimization/44886, + PR target/43888, PR tree-optimization/44284, PR middle-end/44828, + PR middle-end/41355, PR c++/44703, PR ada/43731, PR fortran/44773, + PR fortran/44847. + + [ Marcin Juszkiewicz ] + * debian/rules2: Merge rules.d includes. + * Properly -name -dbg packages for cross builds. + * Various cross build fixes. + * Build libmudflap packages for cross builds. + * Fix generation of maintainer scripts for cross packages. + * Build a gcc-base package for cross builds. + + [ Kees Cook ] + * Fix additional libstdc++ testsuite failures for hardening defaults. + + [ Samuel Thibault ] + * Update hurd patch for 4.5, fixing build failure. Closes: #584819. + + [ Matthias Klose ] + * gcc-arm-implicit-it.diff: Only pass -mimplicit-it=thumb when in + thumb mode (Andrew Stubbs). + + -- Matthias Klose Sun, 18 Jul 2010 10:53:51 +0200 + +gcc-4.5 (4.5.0-7) experimental; urgency=low + + * Update to SVN 20100625 (r161383) from the gcc-4_5-branch. + - Fixes: PR bootstrap/44426, PR target/44546, PR target/44261, + PR target/43740, PR libstdc++/44630 (closes: #577458), + PR c++/44627 (LP: #503668), PR target/39690, PR target/44615, + PR fortran/44556, PR c/44555. + - Update libstdc++'s pretty printer for python2.6. Closes: #585202. + + [ Matthias Klose ] + * Fix libstdc++ symbols files for powerpc and sparc. + * Add maintainer scripts for cross packages. + + [ Samuel Thibault ] + * Update hurd patch for 4.5, fixing build failure. Closes: #584454, + #584819. + + [ Marcin Juszkiewicz ] + * Merge the rules.d/binary-*-cross.mk files into rules.d/binary-*.mk. + + -- Matthias Klose Fri, 25 Jun 2010 15:57:38 +0200 + +gcc-4.5 (4.5.0-6) experimental; urgency=low + + [ Matthias Klose ] + + * Update to SVN 20100617 (r161901) from the gcc-4_5-branch. Fixes: + PR target/44169, PR bootstrap/43170, PR objc/35996, PR objc++/32052, + PR objc++/23716, PR lto/44464, PR rtl-optimization/42461, PR fortran/44536, + PR tree-optimization/44258, PR tree-optimization/44423, PR target/44534, + PR bootstrap/44426, PR tree-optimization/44508, PR tree-optimization/44507, + PR lto/42776, PR target/44481, PR debug/41371, PR bootstrap/37304, + PR target/44067, PR debug/41371, PR debug/41371, PR target/44075, + PR c++/44366, PR c++/44401, PR fortran/44347, PR fortran/44430, + PR lto/42776, PR libstdc++/44487, PR other/43838, PR libgcj/44216. + * debian/patches/cross-fixes.diff: Update for 4.5 (Marcin Juszkiewicz). + * debian/patches/libstdc++-pic.diff: Fix installation for cross builds. + * Fix PR bootstrap/43847, --enable-plugin for cross builds. + * Export long double versions of "C" math library for arm-linux-gnueabi, + m68k-linux-gnu (ColdFire), mips*-linux-gnu (o32 ABI), sh*-linux-gnu + (not 32 bit). Merge the libstdc++-*-ldbl-compat.diff patches. + * Merge binary-libgcc.mk packaging changes into binary-libgcc-cross.mk + (Loic Minier). + * Update libgcc and libstdc++ symbols files. + + [ Aurelien Jarno ] + + * libstdc++-mips-ldbl-compat.diff: On MIPS provide the long double + versions of "C" math functions in libstdc++ as we need to keep the + ABI. Closes: #584610. + + -- Matthias Klose Thu, 17 Jun 2010 14:56:14 +0200 + +gcc-4.5 (4.5.0-5) experimental; urgency=low + + * Update to SVN 20100602 (r160097) from the gcc-4_5-branch. Fixes: + PR target/44338, PR middle-end/44337, PR tree-optimization/44182, + PR target/44161, PR c++/44358, PR fortran/44360, PR lto/44385. + * Fix PR target/44261, taken from the trunk. Closes: #582787. + * Fix passing the expanded -iplugindir option. + * Disable broken profiled bootstrap on alpha. + * On ix86, pass -mtune=generic32 in 32bit mode to the assembler, when + configured for i586-linux-gnu or i686-linux-gnu. + + -- Matthias Klose Thu, 03 Jun 2010 00:44:37 +0200 + +gcc-4.5 (4.5.0-4) experimental; urgency=low + + * Update to SVN 20100527 (r160047) from the gcc-4_5-branch. Fixes: + PR rtl-optimization/44164, PR middle-end/44069, PR target/44199, + PR lto/44196, PR target/43733, PR target/44245, PR target/43869, + PR debug/44223, PR tree-optimization/44038, PR tree-optimization/43949, + PR debug/44205, PR debug/44178, PR bootstrap/43870, PR target/44202, + PR target/44074, PR lto/43455, PR lto/42653, PR lto/42425, PR lto/43080, + PR lto/43946, PR c++/43382, PR c++/41510, PR c++/44193, PR c++/44157, + PR c++/44158, PR lto/44256, PR libstdc++/44190, PR lto/44312, + PR target/43636, PR target/43726, PR c++/43555PR libstdc++/40497. + + [ Matthias Klose ] + + * Enable multilibs again on powerpcspe. Closes: #579780. + * Fix setting CC for REVERSE_CROSS build (host == target,host != build). + Closes: #579779. + * Fix setting biarch_cpu macro. + * Don't bother with un-normalized paths in .la files, just remove them. + * debian/locale-gen: Update locales needed for the libstdc++-v3 testsuite. + * If libstdc++6 is built from newer gcc-4.x source, run the libstdc++-v3 + testsuite against the installed lib too. + * Configure with --enable-secureplt on powerpcspe. + + [ Aurelien Jarno ] + + * Fix $(distrelease) on non-official archives. Fix powerpcspe, sh4 and + sparc64 builds. + + -- Matthias Klose Sun, 30 May 2010 12:52:02 +0200 + +gcc-4.5 (4.5.0-3) experimental; urgency=low + + * Update to SVN 20100519 (r159556) from the gcc-4_5-branch. Fixes: + PR c++/43704, PR fortran/43339, PR middle-end/43337, PR target/43635, + PR tree-optimization/43783, PR tree-optimization/43796, PR middle-end/43570, + PR libgomp/43706, PR libgomp/43569, PR middle-end/43835, PR c/43893, + PR tree-optimization/43572, PR tree-optimization/43845, PR libgcj/40860, + PR target/43744, PR debug/43370, PR c++/43880, PR middle-end/43671, + PR debug/43972, PR target/43921, PR c++/38064, PR c++/43953, + PR fortran/43985, PR fortran/43592, PR fortran/40539, PR c++/43787, + PR middle-end/44085, PR middle-end/44071, PR middle-end/43812, + PR debug/44028, PR rtl-optimization/44012, PR target/44046, + PR documentation/44016, PR fortran/44036, PR fortran/40728, + PR libstdc++/44014, PR lto/44184, PR bootstrap/42347, PR middle-end/44102, + PR c++/44127, PR debug/44136, PR target/44088, PR tree-optimization/44124, + PR fortran/43591, PR fortran/44135, PR libstdc++/43259. + + [ Matthias Klose ] + * Revert gcj-arm-no-merge-exidx-entries patch, fixed by PR libgcj/40860. + * Don't run the libstdc++-v3 testsuite on the ia64 buildds. Timeouts. + * Backport two libjava fixes from the trunk to run josm with gcj. + * Ubuntu only: + - Pass --hash-style=gnu instead of --hash-style=both to the linker. + * Preliminary architecture port for powerpcspe (Kyle Moffett). + Closes: #579780. + * Update configury to be able to target i686 instead of i486 on i386. + + [ Aurelien Jarno] + * Don't link with --hash-style=both on mips/mipsel as GNU hash is not + compatible with the MIPS ABI. + * Default to -mplt on mips(el), -march=mips2 and -mtune=mips32 on 32-bit + mips(el), -march=mips3 and -mtune=mips64 on 64-bit mips(el). + + -- Matthias Klose Wed, 19 May 2010 09:48:20 +0200 + +gcc-4.5 (4.5.0-2) experimental; urgency=low + + * Update to SVN 20100419 from the gcc-4_5-branch. + - Fix PR tree-optimization/43627, c++/43641, PR c++/43621, PR c++/43611, + PR fortran/31538, PR fortran/30073, PR target/43662, + PR tree-optimization/43572, PR tree-optimization/43771. + * Install the linker plugin. + * Search the linker plugin as a readable, not an executable file. + * Link with --hash-style=both on mips/mipsel. + * On mips, pass -mfix-loongson2f-nop to as, if -mno-fix-loongson2f-nop + is not passed. + * Sequel to PR40521, fix -g to generate .eh_frame on ARM. + * On ARM, let gcj pass --no-merge-exidx-entries to the linker. + * Build-depend/depend on binutils snapshot. + * Update NEWS.html and NEWS.gcc. + + -- Matthias Klose Mon, 19 Apr 2010 15:22:55 +0200 + +gcc-4.5 (4.5.0-1) experimental; urgency=low + + * GCC 4.5.0 release. + * Always apply biarch patches. + * Build the lto-linker plugin again. Closes: #575448. + * Run the libstdc++v3 testsuite on armel again. + * Fix --enable-libstdcxx-time documentation, show configure result. + * On linux targets always pass --no-add-needed to the linker. + * Update the patch to search for plugins in a default plugin directory. + * Fix java installations in snapshot builds. + * Configure --with-plugin-ld=ld.gold. + * Linker selection: ld is used by default, to use the gold linker, + pass -fuse-linker-plugin (no other side effects if -flto/-fwhopr + is not passed). To force ld.bfd or ld.gold, pass -B/usr/lib/compat-ld + for ld.bfd or /usr/lib/gold-ld for ld.gold. + * Don't apply the gold-and-ld patch for now. + * Stop building the documentation for dfsg compliant builds. Closes: #571759. + + -- Matthias Klose Wed, 14 Apr 2010 13:29:20 +0200 + +gcc-4.5 (4.5-20100404-1) experimental; urgency=low + + * Update to SVN 20100404 from the trunk. + * Fix build failures building cross compilers configure --with-ld. + * lib32gcc1: Set priority to `extra'. + * Apply proposed patch to search for plugins in a default plugin directory. + * In snapshot builds, use for javac/ecj1 the jvm provided by the package. + * libstdc++-arm-ldbl-compat.diff: On ARM provide the long double versions + of "C" math functions in libstdc++; these are dropped when built + against glibc-2.11. + + -- Matthias Klose Sun, 04 Apr 2010 15:51:25 +0200 + +gcc-4.5 (4.5-20100321-1) experimental; urgency=low + + * Update to SVN 20100321 from the trunk. + * gcj-4.5-jre-headless: Stop providing java-virtual-machine. + * gcj-4.5-plugin-dev: Don't suggest mudflap packages. + * Apply proposed patch to enable both gold and ld in a single toolchain. + New option -fuse-ld=ld.bfd, -fuse-ld=gold. + + -- Matthias Klose Sun, 21 Mar 2010 11:45:48 +0100 + +gcc-4.5 (4.5-20100227-1) experimental; urgency=low + + * Update to SVN 20100227 from the trunk. + * Don't run the libstdc++-v3 testsuite on arm*-*-linux-gnueabi, when + defaulting to thumb mode (Timeouts on the Ubuntu buildd). + + -- Matthias Klose Sat, 27 Feb 2010 08:29:55 +0100 + +gcc-4.5 (4.5-20100222-1) experimental; urgency=low + + * Update to SVN 20100222 from the trunk. + - Install additional header files needed by plugins. Closes: #562881. + * gcc-4.5-plugin-dev: Should depend on libgmp3-dev. Closes: #566366. + * Update libstdc++6 symbols files. + + -- Matthias Klose Tue, 23 Feb 2010 02:16:22 +0100 + +gcc-4.5 (4.5-20100216-0ubuntu1~ppa1) lucid; urgency=low + + * Update to SVN 20100216 from the trunk. + * Don't call dh_makeshlibs with -V for shared libraries with + symbol files. + * Don't run the libstdc++-v3 testsuite in thumb mode on armel + to work around buildd timeout (see PR target/42509). + + -- Matthias Klose Wed, 17 Feb 2010 02:06:02 +0100 + +gcc-4.5 (4.5-20100204-1) experimental; urgency=low + + * Update to SVN 20100204 from the trunk. + + -- Matthias Klose Thu, 04 Feb 2010 19:44:19 +0100 + +gcc-4.5 (4.5-20100202-1) experimental; urgency=low + + * Update to SVN 20100202 from the trunk. + - gcc-stack_chk_fail-check.diff: Remove, applied upstream. + * Update libstdc++6 symbol files. + * Build gnat in snapshot builds on arm. + * Configure with --enable-checking=yes for snapshot builds, and for + 4.5 builds before the release. + * Temporary workaround: On arm-linux-gnueabi run the libstdc++v3 testsuite + with -Wno-abi. + * When building the hppa64 cross compiler, add $(builddir)/gcc to + LD_LIBRARY_PATH to find the just built libgcc6. Closes: #565862. + * On sh4-linux, use sh as java architecture name instead of sh4. + * On armel, build gnat-4.5 using gcc-snapshot. + * Revert the bump of the libgcc soversion on hppa (6 -> 4). + + -- Matthias Klose Tue, 02 Feb 2010 19:35:25 +0100 + +gcc-4.5 (4.5-20100107-1) experimental; urgency=low + + [ Matthias Klose ] + * Update to SVN 20100107 from the trunk. + * Revert the workaround for the alpha build (PR bootstrap/42511 is fixed). + * testsuite-hardening-format.diff: Add a fix for the libstdc++ testsuite. + * Build-depend again on autogen. + * Work around PR lto/41569 (installation bug when configured with + --enabled-gold). + * On armel run the testsuite both in arm and thumb mode, when the + distribution is supporthing tumb processors. + * Work around PR target/42509 (armel), not setting BOOT_CFLAGS, but + applying libcpp-arm-workaround.diff. + + [ Nobuhiro Iwamatsu ] + * Update gcc-multiarch patch for sh4. + + -- Matthias Klose Thu, 07 Jan 2010 16:34:57 +0100 + +gcc-4.5 (4.5-20100106-0ubuntu1) lucid; urgency=low + + * Update to SVN 20100106 from the trunk. + * gcj-4.5-jdk: Include /usr/lib/jvm-exports. + * Rename libgcc symbols file for hppa. + * On alpha and armel, set BOOT_CFLAGS to -g -O1 to work around bootstrap + failures (see PR target/42509 (armel) and PR bootstrap/42511 (alpha)). + * Base the source build-dependency on the package version instead of the + gcc version. + + -- Matthias Klose Wed, 06 Jan 2010 14:17:29 +0100 + +gcc-4.5 (4.5-20100103-1) experimental; urgency=low + + * Update to SVN 20100103 from the trunk. + + [ Samuel Thibault ] + * Update hurd patch for 4.5. Closes: #562802. + + [ Aurelien Jarno ] + * Remove patches/kbsd-gnu-ada.diff (merged upstream). + + [ Matthias Klose ] + * libgcj11: Move .so symlinks into gcj-4.5-jdk. Addresses: #563280. + * gcc-snapshot: On sparc64, use gcc-snapshot as bootstrap compiler. + * Don't use expect-tcl8.3 on hppa anymore. + * Merge gnat-4.4 changes back from 4.4.2-5. + * Bump libgcc soversion on hppa (4 -> 6). + * Default to v9a (ultrasparc) on sparc*-linux. + + -- Matthias Klose Sun, 03 Jan 2010 17:25:27 +0100 + +gcc-4.5 (4.5-20091226-1) experimental; urgency=low + + * Update to SVN 20091226 from the trunk. + * Fix powerpc spu installation. + * Enable multiarch for sh4. + * Fix libffi multilib test runs. + * Configure the hppa -> hppa64 cross compiler --with-system-zlib. + * gcc-4.5-hppa64: Don't ship info dir file. + * lib32stdc++6{,-dbg}: Add dependency on 32bit glibc. + + -- Matthias Klose Sat, 26 Dec 2009 15:38:23 +0100 + +gcc-4.5 (4.5-20091223-1) experimental; urgency=low + + * Update to SVN 20091223 from the trunk. + + [ Matthias Klose ] + * Update hardening patches for 4.5. + * Don't call install-info directly, depend on dpkg | install-info instead. + * Add conflicts with packages built from GCC 4.4 sources. + * On ARM, pass --hash-style=both to ld. + * Update libgfortran3 symbols file. + * Update libstdc++6 symbols file. + + [ Arthur Loiret ] + * debian/rules.conf (gen_no_archs): Handle multiple arm ports. + + -- Matthias Klose Wed, 23 Dec 2009 18:02:24 +0100 + +gcc-4.5 (4.5-20091220-1) experimental; urgency=low + + * Update to SVN 20091220 from the trunk. + - Remove patches applied upstream: arm-boehm-gc-locks.diff, + arm-gcc-gcse.diff, deb-protoize.diff, gcc-arm-thumb2-sched.diff, + gcc-atom-doc.diff, gcc-atom.diff, gcc-build-id.diff, + gcc-unwind-debug-hook.diff, gcj-use-atomic-builtins-doc.diff, + gcj-use-atomic-builtins.diff, libjava-atomic-builtins-eabi.diff, + libjava-nobiarch-check-snap.diff, lp432222.diff, pr25509-doc.diff, + pr25509.diff, pr39429.diff, pr40133.diff, pr40134.diff, rev146451.diff, + s390-biarch-snap.diff, sh4-scheduling.diff, sh4_atomic_update.diff. + - Update patches: gcc-multiarch.diff, gcc-textdomain.diff, + libjava-nobiarch-check.diff, libjava-subdir.diff, libstdc++-doclink.diff, + libstdc++-man-3cxx.diff, libstdc++-pic.diff, note-gnu-stack.diff, + rename-info-files.diff, s390-biarch.diff. + * Stop building the protoize package, removed from the GCC 4.5 sources. + * gcc-4.5: Install lto1, lto-wrapper, and new header files for intrinsics. + * libstdc++6-4.5-dbg: Install the python files for use with gdb. + * Build java packages from the gcc-4.5 source package. + + -- Matthias Klose Sun, 20 Dec 2009 10:56:56 +0100 + +gcc-4.4 (4.4.2-6) unstable; urgency=low + + * Update to SVN 20091220 from the gcc-4_4-branch (r155367). + Fix PR c++/42387, PR c++/41183. + + [ Matthias Klose ] + * Apply svn-doc-updates.diff for non DFSG builds. + * gcc-snapshot: + - Remove patches integrated upstream: pr40133.diff. Closes: #561550. + + [ Nobuhiro Iwamatsu ] + * Backport linux atomic ops changes for sh4 from the trunk. Closes: #561550. + * Backport from trunk: [SH] Not run scheduling before reload as default. + Closes: #561429. + + [ Arthur Loiret ] + * Apply spu patches independently of the hardening patches; fix build + failure on powerpc. + + -- Matthias Klose Sun, 20 Dec 2009 10:20:19 +0100 + +gcc-4.4 (4.4.2-5) unstable; urgency=low + + * Update to SVN 20091212 from the gcc-4_4-branch (r155122). + Revert the fix for PR libstdc++/42261, fix PR fortran/42268, + PR target/42263, PR target/42263, PR target/41196, PR target/41939, + PR rtl-optimization/41574. + + [ Matthias Klose ] + * Regenerate svn-updates.diff. + * Disable biarch testsuite runs for libffi (broken and unused). + * Support xz compression of source tarballs. + * Fix typo in PR libstdc++/40133 to do the link tests. + * gcc-snapshot: + - Remove patches integrated upstream: pr40134-snap.diff. + - Update s390-biarch.diff for trunk. + + [ Aurelien Jarno ] + * Add sparc64 support: disable multilib and install the libraries + in /lib. + + -- Matthias Klose Sun, 13 Dec 2009 10:28:19 +0100 + +gcc-4.4 (4.4.2-4) unstable; urgency=low + + * Update to SVN 20091210 from the gcc-4_4-branch (r155122), Fixes: + PR target/42165, PR target/42113, PR libgfortran/42090, + PR middle-end/42049, PR c++/42234, PR fortran/41278, PR libstdc++/42261, + PR libstdc++/42273 PR java/41991. + + [ Matthias Klose ] + * gcc-arm-thumb2-sched.diff: Don't restrict reloads to LO_REGS for Thumb-2. + * PR target/40134: Don't redefine LIB_SPEC on hppa. + * PR target/42263, fix wrong code bugs in SMP support on ARM, backport from + the trunk. + * Pass -mimplicit-it=thumb to as by default on ARM, when configured + --with-mode=thumb. + * Fix boehm-gc build on ARM --with-mode=thumb. + * ARM: Don't copy uncopyable instructions in gcse.c (backport from trunk). + * Build the spu cross compiler for powerpc from the cell-4_4-branch. + * gcj: add option -fuse-atomic-builtins (backport from the trunk). + + [ Arthur Loiret ] + * Make svn update interdiffs more readable. + + -- Matthias Klose Thu, 10 Dec 2009 04:29:36 +0100 + +gcc-4.4 (4.4.2-3) unstable; urgency=low + + * Update to SVN 20091118 from the gcc-4_4-branch (r154294). + Fix PR PR c++/9381, PR c++/21008, PR c++/35067, PR c++/36912, PR c++/37037, + PR c++/37093, PR c++/38699, PR c++/39786, c++/36959, PR c++/41754, + PR c++/41876, PR c++/41967, PR c++/41972, PR c++/41994, PR c++/42059, + PR c++/42061, + PR fortran/41772, PR fortran/41850, PR fortran/41909, + PR middle-end/40946, PR middle-end/41317, R tree-optimization/41643, + PR target/41900, PR rtl-optimization/41917, PR middle-end/41963, + PR middle-end/42029. + * Snapshot builds: + - Patch updates. + - Configure with --disable-browser-plugin. + * Configure with --disable-libstdcxx-pch on hppa. + * Backport armel patches form the trunk: + - Fix PR objc/41848 - workaround ObjC and -fsection-anchors. + - Enable scheduling for Thumb-2, including the fix for PR target/42031. + - Fix PR target/41939, EABI violation in accessing values below the stack. + + -- Matthias Klose Wed, 18 Nov 2009 08:37:18 -0600 + +gcc-4.4 (4.4.2-2) unstable; urgency=low + + * Update to SVN 20091031 from the gcc-4_4-branch (r153603). + - Fix PR debug/40521, PR target/40913, PR middle-end/22072, + PR target/41665, PR c++/38798, PR c++/40092, PR c++/37875, + PR c++/37204, PR fortran/41755, PR libstdc++/40654, PR libstdc++/40826, + PR target/41702, PR c/41842, PR target/41762, PR c++/40808, + PR fortran/41777, PR libstdc++/40852. + * Snapshot builds: + - Configure with --enable-plugin, disable the gcjwebplugin by a patch. + Addresses: #551200. + - Proposed patch for PR lto/41652, compile lto-plugin with + -D_FILE_OFFSET_BITS=64 + - Allow disabling the ada build via DEB_BUILD_OPTIONS nolang=ada. + * Fixes for reverse cross builds. + * On sparc default to v9 in 32bit mode. + * Fix __stack_chk_fail check for cross builds configured --with-headers. + * Apply some fixes for uClibc cross builds (Jonas Meyer, Hector Oron). + + -- Matthias Klose Sat, 31 Oct 2009 14:16:03 +0100 + +gcc-4.4 (4.4.2-1) unstable; urgency=low + + * GCC 4.4.2 release. + - Fixes PR target/26515, PR target/41680, PR rtl-optimization/41646, + PR c++/39863, PR c++/41038. + * Fix setting timeout for testsuite runs. + * gcj-4.4/gcc-snapshot: Drop build-dependency on libgconf2-dev, disabled + by default. + * gcj-4.4: Run the libffi testsuite as well. + * Add explicit build dependency on zlib1g-dev. + * Fix cross builds, add support for gomp and gfortran (only tested for + non-biarch targets). + * (Build-)depend on binutils-2.20. + * Fix up omp.h for multilibs (taken from Fedora). + + -- Matthias Klose Sun, 18 Oct 2009 02:31:32 +0200 + +gcc-4.4 (4.4.1-6) unstable; urgency=low + + * Snapshot builds: + - Add build dependency on libelfg0-dev (>= 0.8.12). + - Add build dependency on binutils-gold where available. + - Suggest binutils-gold; not perfect, it is required when using + -use-linker-plugin. + - Work around installation failure in the lto-plugin (PR lto/41569). + - Install java home symlinks in /usr/lib/jvm. + - Revert the dwarf2cfi_asm workaround, obsoleted by PR debug/40521. + * PR debug/40521: + - Apply patch for PR debug/40521, taken from the trunk. + - Revert the dwarf2cfi_asm workaround, obsoleted by PR debug/40521. + - Depend on binutils (>= 2.19.91.20091005). + * Update to SVN 20091005 from the gcc-4_4-branch (r152450). + - Fixes PR fortran/41479. + * In the test summary, add more information about package versions + used for the build. + + -- Matthias Klose Wed, 07 Oct 2009 02:12:56 +0200 + +gcc-4.4 (4.4.1-5) unstable; urgency=medium + + * Update to SVN 20091003 from the gcc-4_4-branch (r152174). + - Fixes PR target/22093, PR c/39779, PR libffi/40242, PR target/40473, + PR debug/40521, PR c/41049, PR debug/41065, PR ada/41100, + PR tree-optimization/41101, PR libgfortran/41328, PR libffi/41443, + PR fortran/41515. + * Updates for snapshot builds: + - Fix build dependency on automake for snapshot builds. + - Update patches pr40134-snap and libjava-nobiarch-check-snap. + * Fix lintian errors in libstdc++ packages and lintian warnings in the + source package. + * Add debian/README.source. + * Don't apply PR libstdc++/39491 for the trunk anymore. + * Install java home symlinks for snapshot builds in /usr/lib/jvm, + including javac. Depend on ecj. Addresses #536102. + * Fix build failure on armel with -mfloat-abi=softfp. + * Don't pessimize the code for newer armv6 and armv7 processors. + * libjava: Use atomic builtins For Linux ARM/EABI, backported from the + trunk. + * Proposed patch to fix wrong-code on powerpc (Alan Modra). LP: #432222. + * Link against -ldl instead of -lcloog -lppl. Exit with an error when using + the Graphite loop transformation infrastructure without having the + libcloog-ppl0 package installed (patch taken from Fedora). Packages + using these optimizations should build-depend on libcloog-ppl0. + gcc-4.4: Suggest the cloog runtime libraries. + * Install a hook _Unwind_DebugHook, called during unwinding. Intended as + a hook for a debugger to intercept exceptions. CFA is the CFA of the + target frame. HANDLER is the PC to which control will be transferred + (patch taken from Fedora). + + -- Matthias Klose Sat, 03 Oct 2009 13:33:05 +0100 + +gcc-4.4 (4.4.1-4) unstable; urgency=low + + * Update to SVN 20090911 from the gcc-4_4-branch (r151649). + - Fixes PR target/34412, PR middle-end/41094, PR target/40718, + PR fortran/41062, PR libstdc++/41005, PR target/41184, + PR bootstrap/41180, PR c++/41127, PR fortran/41258, + PR rtl-optimization/40861, PR target/41315, PR fortran/39876. + + [ Matthias Klose ] + * Avoid underscores in doc-base document id's to workaround a + dh_installdocs bug. + * Update file names for the Ada user's guide. + * Set Homepage attribute for packages. + * Update the patch for gnat on armel. + * gcj-4.4-jdk: Depend on libantlr-java. Addresses: #546062. + * Backport patch for PR tree-optimization/41101 from the trunk. + Closes: #541816. + * Update libstdc++6.symbols for symbols introduced with the fix + for PR libstdc++/41005. + * Apply proposed patches for PR libstdc++/40133 and PR target/40134. + Add symbols exception propagation support in libstdc++ on armel + to the libstdc++6 symbols. + + [ Ludovic Brenta] + Merge from gnat-4.4 (4.4.1-3) unstable; urgency=low + * debian/rules.defs, debian/rules.d/binary-ada.mk, debian/rules.patch: + better support for architectures that support only one exception + handling mechanism (SJLJ or ZCX). + + -- Matthias Klose Sat, 12 Sep 2009 03:18:17 +0200 + +gcc-4.4 (4.4.1-3) unstable; urgency=low + + * Update to SVN 20090822 from the gcc-4_4-branch (r151011). + - Fixes PR tree-optimization/41016, PR tree-optimization/41011, + PR tree-optimization/41008, PR tree-optimization/40991, + PR tree-optimization/40964, PR target/8603 (closes: #161432), + PR target/41019, PR target/41015, PR target/40957, PR target/40934, + PR rtl-optimization/41033, PR middle-end/41047, PR middle-end/41006, + PR fortran/41070, PR fortran/40995, PR fortran/40847, PR debug/40990, + PR debug/37801, PR c/41046, PR c/40948, PR c/40866, PR bootstrap/41018, + PR middle-end/41123,PR target/40971, PR c++/41131, PR fortran/41102, + PR libfortran/40962. + + [ Arthur Loiret ] + * Only use -fno-stack-protector when known to the stage1 compiler. + + [ Aurelien Jarno ] + * lib32* packages: remove the Pre-Depends: libc6-i386 (>= 2.9-18) and + upgrade the Conflicts: libc6-i386 from (<< 2.9-18) to (<< 2.9-22). + Closes: #537466. + * kbsd-gnu-ada.dpatch: add support for kfreebsd-amd64. + + [ Matthias Klose ] + * Build gnat on armel, the gnat-4.4 build still failing, gcc-snapshot + builds good enough to build itself. + * Merge enough of the gnat-4.4 changes back to allow a combined build + from the gcc-4.4 source. + * Build libgnatprj for armel. + * On armel build just one version of the ada run-time library. + * Update auto* build dependencies for snapshot builds. + * Apply proposed patch for PR target/40718. + + -- Matthias Klose Sun, 23 Aug 2009 11:50:38 +0200 + +gcc-4.4 (4.4.1-2) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20090808 from the gcc-4_4-branch (r150577). + - Fixes PR target/40832, PR rtl-optimization/40710, + PR tree-optimization/40321, PR build/40010, PR fortran/40727, + PR build/40010, PR rtl-optimization/40924, PR c/39902, + PR middle-end/40943, PR target/40577, PR c++/39987, PR debug/39706, + PR c++/40948, PR c++/40749, PR fortran/40851, PR fortran/40878, + PR target/40906. + * Bump GCC version required in dependencies to 4.4.1. + * Enable Ada for snapshot builds on all archs with a gnat package + available in the archive. + * Build-depend on binutils 2.19.51.20090805, needed at least for armel. + + [ Aurelien Jarno ] + * kbsd-gnu-ada.dpatch: new patch to fix build on GNU/kFreeBSD. + + -- Matthias Klose Sat, 08 Aug 2009 10:17:39 +0200 + +gcc-4.4 (4.4.1-1) unstable; urgency=low + + * GCC 4.4.1 release. + - Fixes PR target/39943, PR tree-optimization/40792, PR c++/40780, + PR middle-end/40747, PR libstdc++/40691, PR libfortran/40714, + PR tree-optimization/40813 (ICE in OpenJDK build on sparc). + * Apply proposed patch for PR target/39429, an ARM wrong-code error. + * Fix a typo in the arm back-end (proposed patch). + * Build-depend on libmpc-dev for snapshot builds. + * Fix build failure in cross builds (Hector Oron). Closes: #522597. + * Run the testsuite as part of the build target, not the install target. + + -- Matthias Klose Wed, 22 Jul 2009 13:24:39 +0200 + +gcc-4.4 (4.4.0-11) unstable; urgency=medium + + [ Matthias Klose ] + * Update to SVN 20090715 from the gcc-4_4-branch (r149690). + - Corresponds to the 4.4.1 release candidate. + - Fixes PR target/38900, PR debug/40666, PR middle-end/40669, + PR middle-end/40328, PR target/40587, PR middle-end/40585, + PR c++/40566, PR tree-optimization/40542, PR c/39902, + PR tree-optimization/40579, PR tree-optimization/40550, PR c++/40684, + PR c++/35828, PR c++/37816, PR c++/40639, PR c++/40633, PR c++/40619, + PR c++/40595, PR fortran/40440, PR fortran/40551, PR fortran/40638, + PR fortran/40443, PR libstdc++/40600, PR rtl-optimization/40667, PR c++/40740, + PR c++/36628, PR c++/37206, PR c++/40689, PR c++/40502, PR middle-end/40747. + * Backport of PR c/25509, new option -Wno-unused-result. LP: #305176. + * gcc-4.4: Depend on libgomp1, even if not building the libgomp1 package. + * Add proposed patches for PR libstdc++/40133, PR target/40134; don't apply + yet. + + [Emilio Pozuelo Monfort] + * Backport build-id support, configure with --enable-linker-build-id. + + -- Matthias Klose Tue, 14 Jul 2009 16:09:33 -0400 + +gcc-4.4 (4.4.0-10) unstable; urgency=low + + [ Arthur Loiret ] + * debian/rules.patch: Record the auto* calls to run them once only. + + [ Matthias Klose ] + * Update to SVN 20090627 from the gcc-4_4-branch (r149023). + - Fixes PR other/40024. + * Fix typo, adding blacklisted symbols to the libgcc1 symbols file on armel. + * On mips/mipsel use -O2 in STAGE1_CFLAGS until binutils is updated. + + -- Matthias Klose Sun, 28 Jun 2009 10:13:08 +0200 + +gcc-4.4 (4.4.0-9) unstable; urgency=high + + * Update to SVN 20090624 from the gcc-4_4-branch (r148821). + - Fix PR objc/28050 (LP: #362217), PR libstdc++/40297, PR c++/40342. + * Continue the well planned lib32 transition on amd64, adding pre-dependencies + on libc6-i386 (>= 2.9-18) on Debian. Closes: #533767. + * Enable SSP on arm and armel, run the testsuite with -fstack-protector. + LP: #375189. + * Fix spu fortran build in gcc-snapshot builds. + * Add missing symbols for 64bit libgfortran library. + * Update libstdc++ symbol files for sparc 64bit, adding symbols + for exception propagation support. + * Explicitely add __aeabi symbols to the libgcc1 symbols file on armel. + Closes: #533843. + + -- Matthias Klose Wed, 24 Jun 2009 23:46:02 +0200 + +gcc-4.4 (4.4.0-8) unstable; urgency=medium + + * Let all 32bit libs conflict with libc6-i386 (<< 2.9-17). Closes: #533767. + * Update to SVN 20090620 from the gcc-4_4-branch (r148747). + - Fixes PR fortran/39800, PR fortran/40402. + * Work around tar bug on kfreebsd unpacking java class file updates (#533356). + + -- Matthias Klose Sat, 20 Jun 2009 15:15:22 +0200 + +gcc-4.4 (4.4.0-7) unstable; urgency=medium + + * Update to SVN 20090618 from the gcc-4_4-branch (r148685). + - Fixes PR middle-end/40446, PR middle-end/40389, PR middle-end/40460, + PR fortran/40168, PR target/40470. + * On amd64, install 32bit libraries into /lib32 and /usr/lib32. + * lib32gcc1, lib32gomp1, lib32stdc++6: Conflict with libc6-i386 (= 2.9-15), + libc6-i386 (= 2.9-16). + * Handle serialver alternative in -jdk install scripts, not in -jre-headless. + + -- Matthias Klose Fri, 19 Jun 2009 01:36:00 +0200 + +gcc-4.4 (4.4.0-6) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20090612 from the gcc-4_4-branch (r148433). + - Fixes PR c++/38064, PR c++/40139, PR target/40017, PR target/40266, + PR bootstrap/40027, PR tree-optimization/40087, PR target/39856, + PR rtl-optimization/40105, PR target/39942, PR middle-end/40204, + PR debug/40109, PR tree-optimization/39999, PR libfortran/37754, + PR fortran/22423, PR libfortran/39667, PR libfortran/39782, + PR libfortran/38668, PR libfortran/39665, PR libfortran/39702, + PR libfortran/39709, PR libfortran/39665i, PR libgfortran/39664, + PR fortran/38654, PR libfortran/37754, PR libfortran/37754, + PR libfortran/25561, PR libfortran/37754, PR middle-end/40291, + PR target/40017, PR middle-end/40340, PR c++/40308, PR c++/40311, + PR c++/40306, PR c++/40307, PR c++/40370, PR c++/40372, PR c++/40373, + PR c++/40381, PR fortran/40019, PR fortran/39893. + * gcj-4.4-jdk: Depend on libecj-java-gcj instead of libecj-java. + * Let gjdoc --version use the Configuration class instead of + version.properties (Alexander Sack). LP: #385682. + * Preserve libgcc_s.so linker scripts. Closes: #532263. + + [Ludovic Brenta] + * debian/patches/ppc64-ada.dpatch, + debian/patches/ada-mips.dpatch, + debian/patches/ada-mipsel.dpatch: remove, merged upstream. + * debian/patches/*ada*.dpatch: + - rename to *.diff; + - remove the dpatch prologue shell script + - refresh with quilt -p ab and without time stamps + - adjust to GCC 4.4 + * debian/patches/ada-library-project-files-soname.diff, + debian/patches/ada-polyorb-dsa.diff, + debian/patches/pr39856.diff: new. + * debian/rules.patch: adjust accordingly. + * debian/rules.defs: re-enable Ada. + * debian/rules2: do a lean bootstrap when building Ada. + * debian/rules.d/binary-ada.mk: do not build gnatbl or gprmake anymore, + removed upstream. + + -- Matthias Klose Fri, 12 Jun 2009 18:34:13 +0200 + +gcc-4.4 (4.4.0-5) unstable; urgency=medium + + * Update to SVN 20090517 from the gcc-4_4-branch (r147630). + - Fixes PR tree-optimization/40062, PR middle-end/39986, + PR middle-end/40057, PR fortran/39879, PR libstdc++/40038, + PR middle-end/40035, PR target/37179, PR middle-end/39666, + PR tree-optimization/40074, PR fortran/40018, PR fortran/38863, + PR middle-end/40147, PR fortran/40018, PR target/40153. + + [ Matthias Klose ] + * Update libstdc++ symbols files. + * Update libgcc, libobjc, libstdc++ symbols files for armel. + * Fix version symlink in gcc_lib_dir. Closes: #527837. + * Fix symlinks for javac and header files in /usr/lib/jvm. + Closes: #528084. + * Don't build the stage1 compiler with -O with recent binutils (trunk). + * Revert doing link tests to check for the atomic builtins, disabling + exception propagation support in libstdc++ on armel. See PR40133, PR40134. + * On mips/mipsel don't run the java testsuite with -mabi=64. + * Default to armv4 for the gcc-snapshot package as well. Closes: #523936. + * Mention GCC trunk in the gcc-snapshot package description. Closes: #526309. + * Remove unneed '..' elements from symlinks in JAVA_HOME. + * Fix some lintian warnings for gcc-snapshot. + + [ Arthur Loiret ] + * Add missing dir separator to multiarch path. Closes: #527537. + + -- Matthias Klose Sun, 17 May 2009 11:15:52 +0200 + +gcc-4.4 (4.4.0-4) unstable; urgency=medium + + * Update to SVN 20090506 from the gcc-4_4-branch (r147161). + - Fixes PR rtl-optimization/39914, PR testsuite/39776, + PR tree-optimization/40022, PR libstdc++/39909. + + [ Matthias Klose ] + * gcc-4.4-source: Don't depend on gcc-4.4-base, depend on quilt + and patchutils. + * On armel, link the shared libstdc++ with both -lgcc_s and -lgcc. + * Update libgcc and libstdc++ symbol files for mips and mipsel. + * Update libstdc++ symbol files for armel and hppa, adding symbols + for exception propagation support. + * Add ARM EABI symbols to libstdc++ symbol files for armel. + * Add libobjc symbols file for armel. + * Fix PR libstdc++/40038, missing ceill/tanhl symbols in libstdc++. + + [ Aurelien Jarno ] + * Fix libc name for biarch packages on kfreebsd-amd64. + + -- Matthias Klose Wed, 06 May 2009 15:10:36 +0200 + +gcc-4.4 (4.4.0-3) unstable; urgency=low + + * libstdc++-doc: Install the man pages again. + * Fix build configuration for the GC enabled ObjC runtime library. + * Fix thinko in autotools_files, resulting in autoconf not run in + some cases. + * Do link tests to check for the atomic builtins, enables exception + propagation support in libstdc++ on armel and hppa. + + -- Matthias Klose Sun, 03 May 2009 23:38:56 +0200 + +gcc-4.4 (4.4.0-2) unstable; urgency=low + + [ Samuel Thibault ] + * Enable java build on the hurd. + + [ Matthias Klose ] + * libobjc2.symbols.armel: Remove, use the default one. + * Address PR libstdc++/39491, removing __signbitl from the libstdc++6 + symbols file on hppa. + * libstdc++6.symbols.armel: Fix error introduced with copy from the + arm symbols file. + * libstdc++6.symbols.*: Don't assume exception propagation support + enabled for all architectures (although it should on armel, hppa, + sparc). + * Disable the build of the ObjC garbage collection library on mips*, + working around a build failure. + + -- Matthias Klose Sat, 02 May 2009 14:22:35 +0200 + +gcc-4.4 (4.4.0-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20090429 from the gcc-4_4-branch (r146989). + * Configure java enabled builds with --enable-java-home. + * Integrate the bits previously found in java-gcj-compat. + * Rename the packages using the naming schema used for OpenJDK: + gcj-X.Y-{jre-headless,jre,jre-lib,jdk,source}. The packages + {gij,gcj,gappletviewer}-X.Y and libgcjN-{jar,source} are gone. + * Build the libgcj documentation with the just built gjdoc. + * Don't use profiled bootstrap when building the gcj source. + * Apply proposed patch for PR target/39856. + * Fix some lintian warnings. + * Don't include debug symbols for libstdc++.so.6, if the library is + built by a newer GCC version. + * Adjust hrefs to point to the local libstdc++ documentation. LP: #365414. + * Update libgcc, libgfortran, libobjc, libstdc++ symbol files. + * gcc-4.4: Include libssp_nonshared.a. + * For ix86, set the java architecture directory to i386. + + [ Samuel Thibault ] + * Update Hurd changes. + * Configure with --enable-clocale=gnu on hurd-i386. + * debian/patches/hurd-pthread.diff: Reapply. + + -- Matthias Klose Thu, 30 Apr 2009 00:30:20 +0200 + +gcc-4.4 (4.4.0-1~exp2) experimental; urgency=low + + * Update to SVN 20090423 from the gcc-4_4-branch. + + [ Aurelien Jarno ] + * kbsd-gnu.diff: remove parts merged upstream. + + [ Matthias Klose ] + * Remove conflicts/replaces for *-spu packages. + * Configure the spu cross compiler without --with-sysroot and + --enable-multiarch. + * Fix and reenable the gfortran-spu build. + * Work around build failures with missing libstdc++ baseline files. + * Install gjdoc man page. + * Fix java configuration with --enable-java-home and include symlinks + for JAVA_HOME in /usr/lib/jvm. + * Apply proposed fix for PR middle-end/39794. + * Install libstdc++ man pages with suffix .3cxx instead of .3. + Closes: #525244. + * lib*stdc++6-{dbg,doc}: Add conflicts to the corresponding 4.3 packages. + + -- Matthias Klose Thu, 23 Apr 2009 18:11:49 +0200 + +gcc-4.4 (4.4.0-1~exp1) experimental; urgency=low + + * Final GCC 4.4.0 release. + + * Don't build the Fortran SPU cross compiler, currently broken. + * spu cross build: Build without spucache and spumea64. + * Configure --with-arch-32=i486 on amd64, i386, and kfreebsd-{amd64,i386}, + --with-arch-32=i586 on hurd-i386, --with-cpu=atom on lpia. + * Build using profiled bootstrap. + * Remove the gcc-4.4-base.postinst. Addresses: #524708. + * Update debian/copyright: Include runtime library exception, remove + D and Phobas license. + * Apply proposed patch for PR libstdc++/39491, missing symbol in libstdc++ + on hppa. + * Remove unsused soft-fp functions in the 64bit libgcc on powerpc (PR39828). + * Update NEWS files for 4.4. + * Build again libgfortran for the non-default multilib configuration. + * Restore missing chunks in note-gnu-stack.diff, lost during the conversion + to quilt. + + -- Matthias Klose Wed, 22 Apr 2009 00:53:16 +0200 + +gcc-4.4 (4.4-20090418-1) experimental; urgency=low + + * Update to SVN 20090418 from the gcc-4_4-branch. + + [ Arthur Loiret ] + * Update patches: + - boehm-gc-nocheck, cross-include, libjava-rpath, link-libs: + Rebase on trunk. + - gcc-m68k-pch, libjava-debuginfo, libjava-loading-constraints: + Remove, merged in trunk. + - cell-branch, cell-branch-doc: Remove, there is no upstream cell 4.4 + branch yet. + - gdc-fix-build-kbsd-gnu, svn-gdc-updates, gpc-4.1, gpc-gcc-4.x, + gpc-names: Remove, gpc and gdc are not ported to GCC 4.4 yet. + - svn-class-updates, svn-doc-updates, svn-updates: Make empty. + - Refresh all others, and convert them all to quilt. + + * Build system improvements: + - Partial rewrite/refactor of rules files. + - Switch patch system to quilt. + - Autogenerate debian/copyright. + - Use the autoconf2.59 package. + + * multilib/multiarch support improvements: Closes: #369064, #484589. + - mips-triarch.diff: Replace with a newer version (approved upstream). + - s390-biarch.diff: Ditto. + - debian/rules2: Configure with --enable-targets=all on mips-linux, + mipsel-linux and s390-linux. + - gcc-multiarch.diff: New, add multiarch include directories and + libraries path to the system paths. + - debian/rules2: Configure with --enable-multiarch. Configure spu build + with --with-multiarch-defaults=spu-elf. + - multiarch-include.diff: Remove. + - debian/multiarch.inc: Ditto. + + * cross-compilers changes: + - Never build a separated -base package, don't symlink any doc dir. + - Build gobjc again. + + * Run the 64-bit tests with -mabi=64 instead of -m64 on mips/mipsel to + hopefully fix the massive failure. + * Always set $(distribution) to "Debian" on mips/mipsel, workarounds FTBFS + on those archs due to a kernel bug triggered by lsb_release call. + Adresses: #524416. + * debian/rules.patch: Only apply the ada-nobiarch-check patch when ada is + enabled. Remove gpc and gdc patches. + * debian/rules.unpack (install_autotools_stamp): Remove. + * debian/rules.defs (configure_dependencies): Remove autotools dependency. + * debian/rules.conf: Add a copyright-file target. + * debian/control.m4: Build-Depends on autoconf2.59 and patchutils. + Make gcc-4.4-source Depends on autoconf2.59. + Add myself to Uploaders. + * debian/rules.d/binary-source.mk: Don't build and install an embedded + copy or autoconf2.59 in gcc-4.4-source. + * debian/copyright.in: New. + + [ Matthias Klose ] + * Build gcj on hppa. + * Add support to build vfp optimized runtime libraries on armel. + * gcc-4.4-spu: Depend on newlib-spu. + * Fix sections of -dbg and java packages. + * gcc-default-ssp.dpatch: Set the default as well, when calling the + preprocessor. LP: #346126. + * Build-depend on quilt. + * Keep the copyright file in the archive. + * Remove conflict of the gcc-X.Y-source packages. + * Update removal of gfdl doc files for 4.4. + * Don't re-run the autotools (introduced with the switch to quilt). + * On arm and armel, install the arm_neon.h header. LP: #360819. + * When hardening options are turned on by default, patch the testsuite + to handle the hardening defaults (Kees Cook). + * Only run the patch target once. Avoids multiple autotool runs, but + doesn't reflect changes in the series file anymore. + * libgcj-doc: Fix documentation title. + * Fix gcj source build with recent build changes. + * Don't check for libraries in DEB_BUILD_OPTIONS/nolang. + * gappletviewer: Include missing binary. + + [ Aurelien Jarno ] + * Remove: patches/kbsd-gnu-ada.dpatch (merged upstream). + * kbsd-gnu.diff: add fix for stuff broken by upstream. + + -- Matthias Klose Mon, 20 Apr 2009 01:34:26 +0200 + +gcc-4.4 (4.4-20090317-1) experimental; urgency=low + + * Initial upload of GCC-4.4, based on trunk 20090317 (r144904). + + [Matthias Klose] + * Branch from the gcc-4.3 packaging. + * Remove *-trunk patches, update remaining patches for the trunk. + * Remove patches integrated upstream: libobjc-gc-link, libjava-file-support, + libjava-realloc-leak, libjava-armel-ldflags, libstdc++-symbols-hppa, + gcc-m68k-pch, libjava-extra-cflags, libjava-javah-bridge-tgts, + hppa-atomic-builtins, armel-atomic-builtins, libssp-gnu, libobjc-armel, + gfortran-armel-updates, sparc-biarch, libjava-xulrunner-1.9. + * Update patches for 4.4, mostly using the patches converted for quilt by + Arthur Loiret. + * debian/patches/libjava-soname.dpatch: Remove, unmodifed upstream library. + * debian/patches/gcc-driver-extra-langs.dpatch: Search Ada files in subdir. + * debian/rules.unpack, debian/rules.d/binary-source.mk: Update for included + autoconf tarball. + * debian/rules.d/binary-{gcc,java}.mk: Install new header files. + * debian/libgfortran3.symbols.common: Remove symbol not generated by + gfortran (__iso_c_binding_c_f_procpointer@GFORTRAN_1.0), PR38871. + * debian/rules.conf: Update for 4.4. + * Fix build dependencies and configure options for 4.4, which were applied + for snapshot builds only. + + [Arthur Loiret] + * Update patches from debian/patches: + - Remove backported fixes: + PR ada: pr10768.dpatch, pr15808.dpatch, pr15915.dpatch, pr16086.dpatch, + pr16087.dpatch, pr16098.dpatch, pr17985.dpatch, pr18680.dpatch, + pr22255.dpatch, pr22387.dpatch, pr28305.dpatch, pr28733.dpatch, + pr29015.dpatch, pr30740.dpatch, pr30827.dpatch pr33688.dpatch, + pr34466.dpatch, pr35050.dpatch, pr35792.dpatch. + PR target: pr27880.dpatch, pr28102.dpatch, pr30961.dpatch, + pr35965.dpatch, pr37661.dpatch. + PR libgcj: pr24170.dpatch, pr35020.dpatch. + PR gcov-profile: pr38292.dpatch. + PR other: pr28322.dpatch. + * debian/rules.patch: Update. + * debian/symbols/libgomp1.symbols.common: Add new symbols from OpenMP 3.0. + + -- Matthias Klose Tue, 17 Mar 2009 02:28:01 +0100 + +gcc-4.3 (4.3.3-5) unstable; urgency=low + + Merge from gnat-4.3 (4.3.3-1): + + [Petr Salinger] + * debian/patches/ada-libgnatprj.dpatch: enable support for GNU/kFreeBSD. + Fixes: #512277. + + [Ludovic Brenta] + * debian/patches/ada-acats.dpatch: attempt to fix ACATS tests (not entirely + successful yet). + * New upstream version. Fixes: #514565. + + [Matthias Klose] + * Update to SVN 20090301 from the gcc-4_3-branch. + - Fix PR c/35446, PR c++/38950, PR fortran/38852, PR fortran/39006, + PR c++/39225 (closes: #516727), PR c++/38950, PR target/38056, + PR target/39228, PR middle-end/36578, PR inline-asm/39058, + PR middle-end/37861. + * Don't provide the 4.3.2 symlink in gcc_lib_dir anymore. + * Require binutils-2.19.1. + + -- Matthias Klose Sun, 01 Mar 2009 14:18:09 +0100 + +gcc-4.3 (4.3.3-4) unstable; urgency=low + + * Fix Fix PR gcov-profile/38292 (wrong profile information), taken + from the trunk. + * Update to SVN 20090215 from the gcc-4_3-branch. + Fix PR c/35435, PR tree-optimization/39100, PR rtl-optimization/39076, + PR c/35433, PR tree-optimization/39041, PR target/38988, + PR middle-end/38969, PR c++/36897, PR c++/39054, PR c/39035, PR c/35434, + PR c/36432, PR target/38991, PR c/39084, PR target/39118. + * Reapply the fix for PR middle-end/38615. + * Include autoconf-2.59 sources into the source package, and install as + part of the gcc-4.3-source package. + * Explicitely use autoconf-1.9. + * Disable building the gcjwebplugin. + * Don't configure with --enable-cld on amd64 and i386. + + -- Matthias Klose Sun, 15 Feb 2009 23:40:09 +0100 + +gcc-4.3 (4.3.3-3) unstable; urgency=medium + + * Revert fix for PR middle-end/38615. Closes: #513420. + + -- Matthias Klose Thu, 29 Jan 2009 07:05:15 +0100 + +gcc-4.3 (4.3.3-2) unstable; urgency=low + + * Update to SVN 20090127 from the gcc-4_3-branch. + - Fix PR tree-optimization/38359. Closes: #492505. + - Fix PR tree-optimization/38932 (ice-on-valid-code), PR target/38931 + (ice-on-valid-code), PR rtl-optimization/38879 (wrong-code), + PR c++/23287 (rejects-valid), PR fortran/38907 (ice-on-valid-code), + PR fortran/38859 (wrong-code), PR fortran/38657 (rejects-valid), + PR fortran/38672 (ice-on-valid-code). + * Fix PR middle-end/38969, taken from the trunk. Closes: #513007. + + -- Matthias Klose Tue, 27 Jan 2009 23:42:45 +0100 + +gcc-4.3 (4.3.3-1) unstable; urgency=low + + * GCC-4.3.3 release (no changes compared to the 4.3.2-4 upload). + * Fix PR middle-end/38615 (wrong code, taken from the trunk). + + -- Matthias Klose Sat, 24 Jan 2009 14:43:09 +0100 + +gcc-4.3 (4.3.2-4) unstable; urgency=medium + + * Update to SVN 20090119 from the gcc-4_3-branch. + - Fix PR tree-optimization/36765 (wrong code). + * Remove patch for PR 34571, applied upstream (fix build failure on alpha). + * Apply proposed patch for PR middle-end/38902 (wrong code). + + -- Matthias Klose Tue, 20 Jan 2009 00:22:41 +0100 + +gcc-4.3 (4.3.2-3) unstable; urgency=low + + * Update to SVN 20090117 from the gcc-4_3-branch (4.3.3 release candidate). + - Fix PR target/34571, PR debug/7055, PR tree-optimization/37194, + PR tree-optimization/38529, PR fortran/38763, PR fortran/38765, + PR fortran/38669, PR fortran/38487, PR fortran/35681, PR fortran/38657, + PR c++/36019, PR c++/31488, PR c++/37646, PR c++/36334, PR c++/38357, + PR c++/31260, PR c++/38877, PR libstdc++/36801, PR libgcj/38396. + - debian/patches/libgcj-bc.dpatch: Remove, applied upstream. + * Fix PR middle-end/38616 (wrong code with -fstack-protector). + * Update backport for PR28322 (Gunther Nikl). + + -- Matthias Klose Sat, 17 Jan 2009 21:09:35 +0100 + +gcc-4.3 (4.3.2-2) unstable; urgency=low + + * Update to SVN 20090110 from the gcc-4_3-branch. + - Fix PR target/36654, PR tree-optimization/38752, PR fortran/38675, + PR fortran/37469, PR libstdc++/38000. + + -- Matthias Klose Sat, 10 Jan 2009 18:32:34 +0100 + +gcc-4.3 (4.3.2-2~exp5) experimental; urgency=low + + * Adjust build-dependencies for cross builds. Closes: #499998. + * Update to SVN 20081231 from the gcc-4_3-branch. + - Fix PR middle-end/38565, PR target/38062, PR bootstrap/38383, + PR target/38402, PR testsuite/35677, PR tree-optimization/38478, + PR target/38054, PR middle-end/29056, PR testsuite/28870, + PR target/38254. + - Fix PR libstdc++/37144, PR c++/37582, PR libstdc++/38080. + - Fix PR fortran/38602, PR fortran/38602, PR fortran/38487, + PR fortran/38113, PR fortran/35983, PR fortran/35937, PR testsuite/36889. + * Update the spu cross compiler from the cell-gcc-4_3-branch 20081217. + * debian/patches/libobjc-armel.dpatch: Don't define EH_USES. + * Apply the Atomic builtins patch for PARISC. + + -- Matthias Klose Thu, 18 Dec 2008 00:34:46 +0100 + +gcc-4.3 (4.3.2-2~exp4) experimental; urgency=low + + * Update to SVN 20081130 from the gcc-4_3-branch. + - Fix PR bootstrap/33304, PR middle-end/37807, PR middle-end/37809, + PR rtl-optimization/37489, PR target/35574, PR c/37924, + PR tree-optimization/37879, PR middle-end/37858, PR middle-end/37870, + PR target/38016, PR target/37939, PR rtl-optimization/37769, + PR target/37909, PR fortran/37597, PR fortran/35820, PR fortran/37445, + PR fortran/PR35769, PR fortran/37903, PR fortran/37749. + - Fix PR target/37640, PR tree-optimization/37868, PR bootstrap/33100, + PR other/38214, PR c++/37142, PR c++/35405, PR c++/37563, PR c++/38030, + PR c++/37932, PR c++/38007. + - Fix PR fortran/37836, PR fortran/38171, PR fortran/35681, + PR fortran/37792, PR fortran/37926, PR fortran/38033, PR fortran/36526. + - Fix PR target/38287. Closes: #506713. + * Atomic builtins using kernel helpers for PARISC and ARM Linux/EABI, taken + from the trunk. + + -- Matthias Klose Mon, 01 Dec 2008 01:29:51 +0100 + +gcc-4.3 (4.3.2-2~exp3) experimental; urgency=low + + * Update to SVN 20081117 from the gcc-4_3-branch. + * Add build dependencies on spu packages for snapshot builds. + * Add build dependency on libantlr-java for snapshot builds. + * Disable fortran on spu for snapshot builds. + * Add dependency on binutils-{hppa64,spu} for snapshot builds. + + -- Matthias Klose Mon, 17 Nov 2008 21:57:51 +0100 + +gcc-4.3 (4.3.2-2~exp2) experimental; urgency=low + + * Update to SVN 20081023 from the gcc-4_3-branch. + - General regression fixes: PR rtl-optimization/37882 (wrong code), + - Fortran regression fixes: PR fortran/37787, PR fortran/37723. + * Use gij-4.3 for builds in java maintainer mode. + * Don't run the testsuite with -fstack-protector for snapshot builds. + * Update the spu cross compiler from the cell-gcc-4_3-branch 20081023. + Don't disable multilibs, install additional components in the gcc-4.3-spu + package. + * Enable building the spu cross compiler for powerpc and ppc64 snapshot + builds. + * Apply proposed patch for PR tree-optimization/37868 (wrong code). + * Apply proposed patch to parallelize make check. + * For biarch builds, disable the gnat testsuite for the non-default + architecture (no biarch support in gnat yet). + + -- Matthias Klose Thu, 23 Oct 2008 22:06:38 +0200 + +gcc-4.3 (4.3.2-2~exp1) experimental; urgency=low + + * Update to SVN 20081017 from the gcc-4_3-branch. + - General regression fixes: PR rtl-optimization/37408 (wrong code), + PR tree-optimization/36630, PR tree-optimization/37102 (wrong code), + PR c/35437 (ice on invalid code), PR middle-end/37731 (wrong code), + PR target/37603 (wrong code, hppa), PR tree-optimization/35737 (ice on + valid code), PR middle-end/36575 (wrong code), PR c/37645 (ice on valid + code), PR tree-optimization/37539 (compile time hog), PR middle-end/37236 + (ice on invalid code), PR tree-optimization/36343 (wrong code), + PR rtl-optimization/37544 (wrong code), PR target/35620 (ice on valid + code), PR target/35713 (ice on valid code, wrong code), PR c/35712 (wrong + code), PR target/37466 (wrong code, AVR). + - C++ regression fixes: PR c++/37389 (LP: #252301), PR c++/37555 (ice on + invalid code). + - Fortran regression fixes: PR fortran/37199, PR fortran/36214, + PR fortran/35770, PR fortran/36454, PR fortran/36374, PR fortran/37274, + PR fortran/37583, PR fortran/36700, PR fortran/35945, PR fortran/37626, + PR fortran/37504, PR fortran/37580, PR fortran/37706, PR fortran/35680, + PR fortran/37794. + * Remove obsolete patches: ada-driver.dpatch, pr33148.dpatch. + * Fix naming of bridge targets in gjavah (wrong header generation). + * Fix PR target/37661, SPARC64 int-to-TFmode conversions. + * Include the complete test summaries in a binary package, to allow + regression checking from the previous build. + * Tighten inter-package dependencies to (>= 4.3.2-1). + * Drop the 4.3.1 symlink in gcc_lib_dir, add a 4.3.3 symlink to 4.3. + + -- Matthias Klose Fri, 17 Oct 2008 23:26:50 +0200 + +gcc-4.3 (4.3.2-1) unstable; urgency=medium + + [Matthias Klose] + * Final gcc-4.3.2 release (regression fixes). + - Remove the generated install docs from the tarball (GFDL licensed). + - C++ regression fixes: PR debug/37156. + - general regression fixes: PR debug/37156, PR target/37101. + - Java regression fixes: PR libgcj/8995. + * Update to SVN 20080905 from the gcc-4_3-branch. + - C++ regression fixes: PR c++/36741 (wrong diagnostic), + - general regression fixes: PR target/37184 (ice on valid code), + PR target/37191 (ice on valid code), PR target/37197 (ice on valid code), + PR middle-end/36817 (ice on valid code), PR middle-end/36548 (wrong code), + PR middle-end/37125 (wrong code), PR c/37261 (wrong diagnostic), + PR target/37168 (ice on valid code), PR middle-end/36449 (wrong code), + PR middle-end/37248 (missed optimization), PR target/36332 (wrong code). + - Fortran regression fixes: PR fortran/37193 (rejects valid code). + * Move symlinks in gcc_lib_dir from cpp-4.3 to gcc-4.3-base. Closes: #497369. + * Don't build-depend on autogen on architectures where it is not installable + (needed for the fixincludes testsuite only); don't build-depend on it for + source packages not running the fixincludes testsuite. + + [Ludovic Brenta] + * Add sdefault.ads to libgnatprj4.3-dev. Fixes: #492866. + * turn gnatvsn.gpr and gnatprj.gpr into proper library project files. + * Unconditionally build-depend on gnat when building gnat-4.3. + Fixes: #487564. + * (debian/rules.d/binary-ada.mk): Add a symlink libgnat.so to + /usr/lib/libgnat-4.3.so in the adalib directory. Fixes: #493814. + * (debian/patches/ada-sjlj.dpatch): remove dangling symlinks from all + adalib directories. + * debian/patches/ada-alpha.dpatch: remove, applied upstream. + + [Samuel Tardieu, Ludovic Brenta] + * debian/patches/pr16086.dpatch: new; backport from GCC 4.4. + Closes: #248172. + * debian/patches/pr35792.dpatch: new; backport from GCC 4.4. + * debian/patches/pr15808.dpatch (fixes: #246392), + debian/patches/pr30827.dpatch: new; backport from the trunk. + + -- Matthias Klose Fri, 05 Sep 2008 22:52:58 +0200 + +gcc-4.3 (4.3.1-9) unstable; urgency=low + + * Update to SVN 20080814 from the gcc-4_3-branch. + - C++/libstdc++ regression fixes: PR c++/36688, PR c++/37016, PR c++/36999, + PR c++/36405, PR c++/36767, PR c++/36852. + - general regression fixes: PR target/36613, PR rtl-optimization/36998, + PR middle-end/37042, PR middle-end/35432, PR target/35659, + PR middle-end/37026, PR middle-end/36691, PR tree-optimization/36991, + PR rtl-optimization/35542, PR bootstrap/35752, PR rtl-optimization/36419, + PR debug/36278, PR preprocessor/36649, PR rtl-optimization/36929, + PR tree-optimization/36830, PR c/35746, PR middle-end/37014, + PR middle-end/37103. + - Fortran regression fixes: PR fortran/36132. + - Java regression fixes: PR libgcj/31890. + - Fixes PR middle-end/37090. Closes: #494815. + + -- Matthias Klose Thu, 14 Aug 2008 18:02:52 +0000 + +gcc-4.3 (4.3.1-8) unstable; urgency=low + + * Undo Revert PR tree-optimization/36262 on i386 (PR 36917 is invalid). + + -- Matthias Klose Fri, 25 Jul 2008 21:47:52 +0200 + +gcc-4.3 (4.3.1-7) unstable; urgency=low + + * Update to SVN 20080722 from the gcc-4_3-branch. + - Fix PR middle-end/36811, infinite loop building with -O3. + - C++/libstdc++ regression fixes: PR c++/36407, PR c++/34963, + PR libstdc++/36832, PR libstdc++/36552, PR libstdc++/36729. + - Fortran regression fixes: PR fortran/36366, PR fortran/36824. + - general regression fixes: PR middle-end/36877, PR target/36780, + PR target/36827, PR rtl-optimization/35281, PR rtl-optimization/36753, + PR target/36827, PR target/36784, PR target/36782, PR middle-end/36369, + PR target/36780, PR target/35492, PR middle-end/36811, + PR rtl-optimization/36419, PR target/35802, PR target/36736, + PR target/34780. + * Revert PR tree-optimization/36262 on i386, causing miscompilation of + OpenJDK hotspot. + * gij/gcj: Don't remove alternatives on upgrade. Addresses: #479950. + + -- Matthias Klose Tue, 22 Jul 2008 23:55:54 +0200 + +gcc-4.3 (4.3.1-6) unstable; urgency=low + + * Start the logwatch script on alpha as well to avoid timeouts in + the testsuite. + + -- Matthias Klose Mon, 07 Jul 2008 11:31:58 +0200 + +gcc-4.3 (4.3.1-5) unstable; urgency=low + + * Update to SVN 20080705 from the gcc-4_3-branch. + - Fix PR target/36634, wrong-code on powerpc with -msecure-plt. + * Fix PR target/35965, PIC + -fstack-protector on arm/armel. Closes: #469517. + * Don't run the libjava testsuite with -mabi=n32. + * Update patch for PR other/28322, that unknown -Wno-* options do not + cause errors, but warnings instead. + * On m68k, add -fgnu89-inline when in gnu99 mode (requested by Michael + Casadeval for the m68k port). Closes: #489234. + + -- Matthias Klose Sun, 06 Jul 2008 01:39:30 +0200 + +gcc-4.3 (4.3.1-4) unstable; urgency=low + + * Revert: debian/patches/gcc-multilib64dir.dpatch: Remove obsolete patch. + * Remove obsolete multiarch-lib patch. + + -- Matthias Klose Mon, 30 Jun 2008 23:05:17 +0200 + +gcc-4.3 (4.3.1-3) unstable; urgency=medium + + [Arthur Loiret] + * debian/rules2: + - configure sh4-linux with --with-multilib-list=m4,m4-nofpu + and --with-cpu=sh4. + - configure sparc-linux with --enable-targets=all on snapshot builds + (change already in 4.3.1-1). + * debian/rules.patch: Don't apply sh4-multilib.dpatch. + + [Matthias Klose] + * Update to SVN 20080628 from the gcc-4_3-branch. + - Fix PR target/36533, wrong-code with incorrectly assumed aligned_operand. + Closes: #487115. + * debian/rules.defs: Remove hurd-i386 from ssp_no_archs (Samuel Thibault). + Closes: #483613. + * Do not create a /usr/lib/gcc//4.3.0 symlink. + * debian/patches/gcc-multilib64dir.dpatch: Remove obsolete patch. + * libjava/classpath: Set and use EXTRA_CFLAGS (taken from the trunk). + + -- Matthias Klose Sat, 28 Jun 2008 16:00:38 +0200 + +gcc-4.3 (4.3.1-2) unstable; urgency=low + + * Update to SVN 20080610 from the gcc-4_3-branch. + - config.gcc: Fix quoting for in the enable_cld test. + * Use GNU locales on hurd-i386 (Samuel Thibault). Closes: #485395. + * libstdc++-doc: Fix URL's for locally installed docs. Closes: #485133. + * libjava: On armel apply kludge to fix unwinder infinitely looping 'til + it runs out of memory. + * Adjust dependencies to require GCC 4.3.1. + + -- Matthias Klose Wed, 11 Jun 2008 00:35:38 +0200 + +gcc-4.3 (4.3.1-1) unstable; urgency=high + + [Samuel Tardieu, Ludovic Brenta] + * debian/patches/pr16087.dpatch: new. Fixes: #248173. + * Correct the patches from the previous upload. + + [Ludovic Brenta] + * debian/patches/ada-acats.dpatch: really run the just-built gnat, not the + bootstrap gnat. + * debian/rules2: when running the Ada test suite, do not run the multilib + tests as gnat does not support multilib yet. + * Run the ACATS testsuite again (patch it so it correctly finds gnatmake). + + [Thiemo Seufer] + * debian/patches/ada-libgnatprj.dpatch, + debian/patches/ada-mips{,el}.dpatch: complete support for mips and mipsel. + Fixes: #482433. + + [Matthias Klose] + * GCC-4.3.1 release. + * Do not include standard system paths in libgcj pkgconfig file. + * Suggest the correct libmudflap0-dbg package. + * Fix PR libjava/35020, taken from the trunk. + * Apply proposed patch for PR tree-optimization/36343. + * On hurd-i386 with -fstack-protector do not link with libssp_nonshared + (Samuel Thibault). Closes: #483613. + * Apply proposed patch for PR tree-optimization/34244. + * Remove debian-revision in symbols files. + * Fix installation of all biarch -multilib packages which are not triarch. + * Fix some lintian warnings. + * Include library symlinks in gobjc and gfortran multilib packages, when + not building the library packages. + * Fix sections in doc-base files. + * Don't apply the sparc-biarch patch when building the gcc-snapshot package. + * libjava: Add @file support for gjavah & gjar. + * Apply patch for PR rtl-optimization/36111, taken from the trunk. + + * Closing reports reported against gcc-4.0 and fixed in gcc-4.3: + - General + + Fix PR optimization/3511, inlined strlen() could be smarter. + Close: #86251. + - C + + Fix PR c/9072, Split of -Wconversion in two different flags. + Closes: #128950, #226952. + - C++/libstdc++ + + PR libstdc++/24660, implement versioning weak symbols in libstdc++. + Closes: #328421. + - Architecture specific: + - mips + + PR target/26560, unable to find a register to spill in class + 'FP_REGS'. Closes: #354439. + - sparc + + Fix PR rtl-optimization/23454, ICE in invert_exp_1. Closes: #340951. + * Closing reports reported against gcc-4.1 and fixed in gcc-4.2: + - General + + PR tree-optimization/30132, ICE in find_lattice_value. Closes: #400484. + + PR other/29534, ICE in "gcc -O -ftrapv" with decreasing array index. + Closes: #405065. + + Incorrect SSE2 code generation for vector initialization. + Closes: #406442. + + Fix segfault in cc1 due to infinite loop in error() when using -ftrapv. + Closes: #458072. + + Fix regression in code size with -Os compared to GCC-3.3. + Closes: #348298. + - C++ + + Fix initialization of global variables with non-constant initializer. + Closes: #446067. + + Fix ICE building muse. Closes: #429385. + * Closing reports reported against gcc-4.1 and fixed in gcc-4.3: + - C++ + + PR c++/28705, ICE: in type_dependent_expression_p. Closes: #406324. + + PR c++/7302, -Wnon-virtual-dtor should't complain of protected dtor. + Closes: #356316. + + PR c++/28316, PR c++/24791, PR c++/20133, ICE in instantiate_decl. + Closes: #327346, #355909. + - Fortran + + PR fortran/31639, ICE in gfc_conv_constant. Closes: #401496. + - Java + + Fix ICE using gcj with --coverage. Closes: #416326. + + PR libgcj/29869, LogManager class loading failure. Closes: #399251 + + PR swing/29547 setText (String) of JButton does not work + with HTML code. Closes: #392791. + + PR libgcj/29178, CharsetEncoder.canEncode() gives different results + than Sun version. Closes: #388596. + + PR java/8923, ICE when modifying a variable decleared "final static". + Closes: #351512. + + PR java/22507, segfault building Apache Cocoon. Closes: #318534. + + PR java/2499, class members should be inherited from implemented + interfaces. Closes: #225434. + + PR java/10581, ICE compiling freenet. Closes: #186922. + + PR libgcj/28340, gij ignores -Djava.security.manager. Closes: #421098. + + PR java/32846, build failure on GNU/Hurd. Closes: #408888. + + PR java/29194, fails to import package from project. Closes: #369873. + + PR libgcj/31700, -X options not recognised by JNI_CreateJavaVM. + Closes: #426742. + + java.util.Calendar.setTimeZone fails to set ZONE_OFFSET. + Closes: #433636. + - Architecture specific: + - alpha + + C++, fix segfault in constructor with -Os. Closes: #438436. + - hppa + + PR target/30131, ICE in propagate_one_insn. Closes: #397341. + - m32r + + PR target/28508, assembler error (operand out of range). + Closes: #417542. + - m68k + + PR target/34688, ICE in output_operand. Closes: #459429. + * Closing reports reported against gcc-4.2 and fixed in gcc-4.3: + - General + + PR tree-optimization/33826, wrong code generation for infinitely + recursive functions. Closes: #445536. + - C++ + + PR c++/24791, ICE on invalid instantiation of template's static member. + Closes: #446698. + + [Aurelien Jarno] + * Really apply arm-funroll-loops.dpatch on arm and armel. Closes: #476460. + + -- Matthias Klose Sat, 07 Jun 2008 23:16:21 +0200 + +gcc-4.3 (4.3.0-5) unstable; urgency=medium + + * Update to SVN 20080523 from the gcc-4_3-branch. + - Remove gcc-i386-emit-cld patch. + - On Debian amd64 and i386 configure with --enable-cld. + * Fix PR tree-optimization/36129, ICE with -fprofile-use. + * Add spu build dependencies independent of the architecture. + * Move arm -funroll-loops fix to arm-funroll-loops from + gfortran-armel-updates. Apply it on both arm and armel. + Closes: #476460. + * Use iceape-dev as a build dependency for Java enabled builds. + * Build the sru cross compiler from a separate source dir without applying + the hardening patches. + + -- Matthias Klose Fri, 23 May 2008 10:12:02 +0200 + +gcc-4.3 (4.3.0-4) unstable; urgency=low + + [ Aurelien Jarno ] + * Fix gnat-4.3 build on mips/mipsel. + * Update libgcc1 symbols for hurd-i386. + + [ Arthur Loiret ] + * Make gcc-4.3-spu Recommends newlib-spu. Closes: #476088 + * Build depend on spu build dependencies only when building + as gcc-4.x source package. + * Disable spu for snapshot builds. + * Support sh4 targets: + - sh4-multilib.dpatch: Add, fix multilib (m4/m4-nofpu) for sh4-linux + - multiarch-include.dpatch: Don't apply on sh4. + + [ Matthias Klose ] + * Stop building libffi packages. + * Update to SVN 20080501 from the gcc-4_3-branch. + - Fix PR target/35662, wrong gfortran code on mips/mipsel. Closes: #476427. + - Fixes mplayer build on powerpc. Closes: #475153. + * Stop building gij/gcj on alpha, arm and hppa. Closes: #459560. + * libstdc++6-4.3-doc: Fix file location in doc-base file. Closes: #476253. + * debian/patches/template.dpatch: Remove the `exit 0' line. + * Fix alternative names for amd64 cross builds. Addresses: #466422. + * debian/copyright: Update to GPLv3, remove the text of the GFDL + and reference the copy in common-licenses. + * Generate the locale data for the testsuite, if the locales package + is installed (not a dependency on all archs). + * Update libgcc2 symbols for m68k, libstdc++6 symbols for arm, m68k, mips + and mipsel. + * Do not include a symbols file for libobjc_gc.so. + * Add four more symbols to libgcj_bc, patch taken from the trunk. + * Adjust names of manual pages in the spu build on powerpc. + * ARM EABI (armel) updates (Andrew Jenner, Julian Brown): + - Add Objective-C support. + - Fortran support patches. + - Fix ICE in gfortran.dg/vector_subscript_1.f90 for -Os -mthumb reload. + * Build ObjC and Obj-C++ packages on armel. + * Reenable running the testsuite on m68k. + + [Samuel Tardieu, Ludovic Brenta] + * debian/patches/gnalasup_to_lapack.dpatch: new. + * debian/patches/pr34466.dpatch, + debian/patches/pr22255.dpatch, + debian/patches/pr33688.dpatch, + debian/patches/pr10768.dpatch, + debian/patches/pr28305.dpatch, + debian/patches/pr17985.dpatch (#278685) + debian/patches/pr15915.dpatch, + debian/patches/pr16098.dpatch, + debian/patches/pr18680.dpatch, + debian/patches/pr28733.dpatch, + debian/patches/pr22387.dpatch, + debian/patches/pr29015.dpatch: new; backport Ada bug fixes from GCC 4.4. + * debian/patches/rules.patch: apply them. + * debian/patches/pr35050.dpatch: update. + + [Andreas Jochens] + * debian/patches/ppc64-ada.dpatch: update, adding support for ppc64. + (#476868). + + [Ludovic Brenta] + * Apply ppc64-ada.dpatch whenever we build libgnat, not just on ppc64. + * debian/patches/pr28322.dpatch: never pass -Wno-overlength-strings to + the bootstrap compiler, as the patch breaks the detection of whether + the bootstrap compiler supports this option or not. + Fixes: #471192. Works around #471767. + * Merge Aurélien Jarno's mips patch. Fixes: #472854. + + [ Samuel Tardieu ] + * debian/patches/pr30740.dpatch: new Ada bug fix. + * debian/patches/pr35050.dpatch: new Ada bug fix. + + [ Xavier Grave ] + * debian/patches/ada-mips{,el}.dpatch: new; split mips/mipsel support + into new patches, out of ada-sjlj.dpatch. + * debian/rules.d/binary-ada.mk: fix the version number of libgnarl-4.3.a. + + [Roman Zippel] + * PR target/25343, fix gcc.dg/pch/pch for m68k. + + -- Matthias Klose Thu, 01 May 2008 21:08:09 +0200 + +gcc-4.3 (4.3.0-3) unstable; urgency=medium + + [ Matthias Klose ] + * Update to SVN 20080401 from the gcc-4_3-branch. + - Fix PR middle-end/35705 (hppa only). + * Update libstdc++6 symbols for hurd-i386. Closes: #472334. + * Update symbol files for libgomp (ppc64). + * Only apply the gcc-i386-emit-cld patch on amd64 and i386 architectures. + * Update libstdc++ baseline symbols for hppa. + * Install powerpc specific header files new in 4.3. + * gcc-4.3-hppa64: Don't include the install tools in the package. + + [ Aurelien Jarno ] + * Fix gobjc-4.3-multilib dependencies. Closes: #473455. + * Fix gnat-4.3 build on mips/mipsel. + * patches/ada-alpha.dpatch: new patch to fix gnat-4.3 build on alpha. + Closes: #472852. + * patches/config-ml.dpatch: also check for n32 multidir. + + [ Arthur Loiret ] + * Build-Depends on binutils (>= 2.18.1~cvs20080103-2) on mips and mipsel, + required for triarch. + * libstdc++-pic.dpatch: Update, don't fail anymore if shared lib is disabled. + + [ Andreas Jochens ] + * Fix build failures on ppc64. Closes: #472917. + - gcc-multilib64dir.dpatch: Remove "msoft-float" and "nof" from MULTILIB + variables. + - Removed ppc64-biarch.dpatch. + - Add debian/lib32gfortan3.symbols.ppc64. + + [ Arthur Loiret, Matthias Klose ] + * Build compilers for spu-elf target on powerpc and ppc64. + - Add gcc-4.3-spu, g++-4.3-spu and gfortran-4.3-spu packages. + - Partly based on the work in Ubuntu on the spu toolchain. + + -- Matthias Klose Tue, 01 Apr 2008 23:29:21 +0000 + +gcc-4.3 (4.3.0-2) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20080321 from the gcc-4_3-branch. + - Remove some broken code that attempts to enforce linker + constraints. Closes: #432541. + * Temporary fix, will be removed once a fixed kernel is available + in testing: Emit cld instruction when stringops are used (i386). + Do not expose the -mcld option until added upstream. Closes: #469567. + * Update NEWS files. + * libjava: Don't leak upon failed realloc (taken from the trunk). + * debian/rules2: The build is not yet prepared to take variables from + the environment; unexport and unset those. + + [Arthur Loiret/Aurelien Jarno] + * MIPS tri-arch support: + - mips-triarch.dpatch: new patch to default to o32 and follow the + glibc convention for n32 & 64 bit names. + - Rename $(biarch) and related vars into $(biarch64). + - Fix biarchsubdir to allow triarch. + - Add biarchn32 support. + - Add mips and mipsel to biarch64 and biarchn32 archs. + - Update binary rules for biarchn32 and libn32 targets. + - Fix multilib deps for triarch. + - control.m4: Add libn32 packages. + + -- Matthias Klose Sat, 22 Mar 2008 00:06:33 +0100 + +gcc-4.3 (4.3.0-1) unstable; urgency=low + + [Matthias Klose] + * GCC-4.3.0, final release. + * Update to SVN 20080309 from the gcc-4_3-branch. + * Build from a modified tarball, without GFDL documentation with + invariant sections and cover texts. + * debian/rules.unpack: Avoid make warnings. + * debian/rules.d/binary-cpp.mk: Add 4.3.0 symlink in gcclibdir. + * Stop building treelang (removed upstream). + * gcj-4.3: Hardcode libgcj-bc dependency, don't run dh_shlibdeps on ecj1. + + [Aurelien Jarno] + * Update libssp-gnu.dpatch and reenable it. + + -- Matthias Klose Sun, 09 Mar 2008 15:18:08 +0100 + +gcc-4.3 (4.3.0~rc2-1) unstable; urgency=medium + + * Update to SVN 20080301 from the gcc-4_3-branch. + * Include the biarch libobjc_gc library in the packages. + * Link libobjc_gc with libgcjgc_convenience.la. + * Add new symbols to libstdc++6 symbol files, remove the symbols for + support (reverted upstream for the 4.3 branch). + * Disable running the testsuite on m68k. + * Update PR other/28322, ignore only unknown -W* options. + + -- Matthias Klose Sat, 01 Mar 2008 15:09:16 +0100 + +gcc-4.3 (4.3-20080227-1) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20080227 from the gcc-4_3-branch. + * Fix PR other/28322, GCC new warnings and compatibility. + Addresses: #367657. + + [Hector Oron] + * Fix cross-compile builds. Closes: #467471. + + -- Matthias Klose Thu, 28 Feb 2008 00:30:38 +0100 + +gcc-4.3 (4.3-20080219-1) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20080219 from the gcc-4_3-branch. + * Apply proposed patch for PR target/34571 (alpha). + * libgcj9-dev: Don't claim that the package contains the static + libraries. + * libjava-xulrunner1.9.dpatch: Add configure check for xulrunner-1.9. + Name the alternative xulrunner-1.9-javaplugin.so. + * libgcj-doc: Don't include the examples; these cannot be built + with the existing Makefile anyway. Addresses: #449608. + * Manpages for gc-analyze and grmic are GFDL. Don't include these when + building DFSG compliant packages. + * Fix build failure building amd64 cross-target libstdc++ packages + (Tim Bagot). Addresses: #464365. + * Fix typos in rename-info-files patch (Richard Guenther). + * Fix PR libgcj/24170. + + [Aurelien Jarno] + * kbsd-gnu-ada.dpatch: new patch to fix build on GNU/kFreeBSD. + + [Ludovic Brenta] + * debian/rules.defs: Temporarily disable the testsuite when building gnat. + * debian/patches/libffi-configure.dpatch: run autoconf in the top-level + directory, where we've changed configure.ac; not in src/gcc. + * debian/patches/ada-sjlj.dpatch: do not run autoconf since we don't + change configure.ac. + * debian/control.m4 (gnat-4.3-doc): conflict with gnat-4.[12]-doc. + Closes: #464801. + + -- Matthias Klose Tue, 19 Feb 2008 23:20:45 +0000 + +gcc-4.3 (4.3-20080202-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20080202 from the trunk. + - Fix PR c/35017, pedwarns about valid code. Closes: #450506. + - Fix PR target/35045, wrong code generation with -O3 on i386. + Closes: #463478. + * gcj-4.3: On armel depend on g++-4.3. + * Re-enable build of libobjc_gc, using the internal version of boehm-gc. + Closes: #212248. + + [Ludovic Brenta] + * debian/patches/ada-default-project-path.dpatch, + debian/patches/ada-gcc-name.dpatch, + debian/patches/ada-symbolic-tracebacks.dpatch, + debian/patches/ada-link-lib.dpatch, + debian/patches/ada-libgnatvsn.dpatch, + debian/patches/ada-libgnatprj.dpatch, + debian/patches/ada-sjlj.dpatch: adjust to GCC 4.3. + * debian/README.gnat, debian/TODO, + debian/rules.d/binary-ada.mk: merge from gnat-4.2. + * debian/README.maintainers: add instructions for patching GCC. + * debian/patches/ada-driver.dpatch: remove, no longer used. + * debian/patches/libffi-configure.dpatch: do not patch the top-level + configure anymore; instead, rerun autoconf. This allows removing the + patch cleanly. + * debian/rules2: use gnatgcc as the bootstrap compiler, not gcc-4.2. + + -- Matthias Klose Sat, 02 Feb 2008 19:58:48 +0100 + +gcc-4.3 (4.3-20080127-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20080126 from the trunk. + * Tighten build dependency on doxygen. + * Update libstdc++ patches to current svn. + * gij-4.3: Provide java*-runtime-headless instead of java*-runtime. + + [ Aurelien Jarno] + * debian/multiarch.inc: change mipsel64 into mips64el. + + -- Matthias Klose Sun, 27 Jan 2008 01:33:35 +0100 + +gcc-4.3 (4.3-20080116-1) unstable; urgency=medium + + * Update to SVN 20080116 from the trunk. + * Update debian/watch. + * Build libgomp documentation without building libgomp. Addresses: #460660. + * Handle lzma compressed tarballs. + * Fix dependency generation for the gcc-snapshot package: Addresses: #454667. + * Restore lost chunk in libjava-subdir.dpatch. + + -- Matthias Klose Wed, 16 Jan 2008 20:33:50 +0100 + +gcc-4.3 (4.3-20080112-1) unstable; urgency=low + + * Update to SVN 20080112 from the trunk. + * Tighten build-dependency on dpkg-dev (closes: #458894). + * Update symbol definitions for alpha. + * Build-depend on libmpfr-dev for all source packages. + + -- Matthias Klose Sun, 13 Jan 2008 00:40:28 +0100 + +gcc-4.3 (4.3-20080104-1) unstable; urgency=low + + * Update to SVN 20080104 from the trunk. + * Update symbol definitions for alpha, hppa, ia64, mips, mipsel, powerpc, + s390, sparc. + + -- Matthias Klose Fri, 04 Jan 2008 07:34:15 +0100 + +gcc-4.3 (4.3-20080102-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20080102 from the trunk. + - Fix 64bit biarch builds (addresses: #447443). + * debian/rules.d/binary-java.mk: Reorder packaging to get shlibs + dependencies right. + * Use lib instead of lib64 as multilibdir on amd64 and ppc64. + * Build the java plugin always using libxul-dev. + * Add libgcj_bc to the libgcj9-0 shlibs file. + * Add symbol files for libgcc1, lib32gcc1, lib64gcc1, libstdc++6, + lib32stdc++6, lib64stdc++6, libgomp1, lib32gomp1, lib64gomp1, libffi4, + lib32ffi4, lib64ffi4, libobjc2, lib32objc2, lib64objc2, libgfortran3, + lib32gfortran3, lib64gfortran3. + Adjust build dependencies on dpkg-dev and debhelper. + * Do not build the java packages from the gcc-4.3 source package. + + [ Aurelien Jarno ] + * Disable amd64-biarch patch on kfreebsd-amd64. + + -- Matthias Klose Wed, 02 Jan 2008 23:48:14 +0100 + +gcc-4.3 (4.3-20071124-1) experimental; urgency=low + + [ Matthias Klose ] + * Update to SVN 20071124 from the trunk. + * Fix dependencies of lib*gcc1-dbg packages. + * gcjwebplugin: Fix path of the gcj subdirectory. LP: #149792. + * gij-hppa: Call gij-4.2, not gij-4.1. Addresses: #446282. + * Don't run the testsuite on hppa when expect-tcl8.3 is not available. + * Fix libgcc1-dbg doc directory symlink. Closes: #447969. + + [ Aurelien Jarno ] + * Update kbsd-gnu patch. + * Remove kbsd-gnu-ada patch (merged upstream). + + -- Matthias Klose Sat, 24 Nov 2007 13:14:29 +0100 + +gcc-4.3 (4.3-20070930-1) experimental; urgency=low + + [Matthias Klose] + * Update to SVN 20070929 from the trunk. + * Update debian patches to the current trunk. + * Regenerate the control file. + * On powerpc-linux-gnu and i486-linux-gnu cross-compile the 64bit + multilib libraries to allow a sucessful build on 32bit kernels + (our buildds). Although we won't get 64bit test results this way ... + * Remove the build dependency on expect-tcl8.3. + * Fix MULTILIB_OSDIRNAMES for cross builds targeted for amd64 and ppc64. + * When -fstack-protector is the default (Ubuntu), do not enable + -fstack-protector when -nostdlib is specified. LP: #77865. + * Always set STAGE1_CFLAGS to -g -O2, only pass other settings + when configuring when required. + * Configure --with-bugurl, adjust the bug reporting instructions. + * gcc-4.3: Install new cpuid.h header. + * Fix installation of the s390 libstdc++ biarch headers. + * Install new bmmintrin.h, mmintrin-common.h headers. + * Build -dbg packages for libgcc, libgomp, libmudflap, libffi, libobjc, + libgfortran. + * Downgrade libmudflap-dev recommendation to a suggestion. Closes: #443929. + + [Riku Voipio] + * Configure armeabi with --disable-sjlj-exceptions. + * armel testsuite takes ages, adjust build accordingly. + + -- Matthias Klose Sun, 30 Sep 2007 12:06:02 +0200 + +gcc-4.3 (4.3-20070902-1) experimental; urgency=low + + * Upload to experimental. + + -- Matthias Klose Sun, 2 Sep 2007 20:51:16 +0200 + +gcc-4.3 (4.3-20070902-0ubuntu1) gutsy; urgency=low + + * Update to SVN 20070902 from the trunk. + * Fix the build logic for the Ubuntu i386 buildd; we can't build biarch. + * Only remove libgcj9's classmap db if no other libgcj9* library is + installed. + * A lot more updates for 4.3 packaging. + + -- Matthias Klose Sat, 01 Sep 2007 21:01:43 +0200 + +gcc-4.3 (4.3-20070901-0ubuntu1) gutsy; urgency=low + + * Update to SVN 20070901 from the trunk. + * First gcc-4.3 package build. + - Update patches for the *-linux-gnu builds. + - Update build files for 4.3. + * Add proposed patch for PR middle-end/33029. + * gcj-4.3: Install gc-analyze. + + -- Matthias Klose Sat, 1 Sep 2007 20:52:16 +0200 + +gcc-4.2 (4.2.2-7) unstable; urgency=low + + * Update to SVN 20080114 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/34762. LP: #182412. + * Update debian/watch. Closes: #459259. Addresses: #459391, #459392. + * Build libgomp documentation without building libgomp. Closes: #460660. + * Restore gomp development files. Closes: #460736. + + -- Matthias Klose Mon, 14 Jan 2008 23:20:04 +0100 + +gcc-4.2 (4.2.2-6) unstable; urgency=low + + * Update to SVN 20080113 from the ubuntu/gcc-4_2-branch. + * Adjust build-dependency on debhelper, dpkg-dev. + * Fix gnat-4.2 build failure (addresses: #456867). + * Do not build packages built from the gcc-4.3 source. + + -- Matthias Klose Sun, 13 Jan 2008 13:48:49 +0100 + +gcc-4.2 (4.2.2-5) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20080102 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/32889, ICE in delete_output_reload. + Closes: #444873, #445336, #451047. + - Fix PR target/34215, ICE in assign_386_stack_local. + Closes: #446714, #452451. + - Fix PR target/33848, reference to non-existent label at -O1 on + mips/mipsel. Closes: #441633. + * debian/rules.d/binary-java.mk: dpkg-shlibsdeps can't handle the dangling + symlink to libgcj_bc.so.1. Remove it temporarily. + * Add libgcj_bc to the libgcj8-1 shlibs file. + * Fix build failures for gnat-4.2, gpc-4.2, gdc-4.2 introduced by recent + gdc changes. + * Add symbol files for libgcc1, lib32gcc1, lib64gcc1, libstdc++6, + lib32stdc++6, lib64stdc++6, libgomp1, lib32gomp1, lib64gomp1, libffi4, + lib32ffi4, lib64ffi4, libobjc2, lib32objc2, lib64objc2. Adjust build + dependencies on dpkg-dev and debhelper. + Adjust build-dependency on dpkg-dev. + + [Arthur Loiret] + * Fix gdc-4.2 build failure. + * Update gdc to upstream SVN 20071124. + - d-bi-attrs: Support attributes on declarations in other modules. + - d-codegen.cc (IRState::attributes): Support constant declarations as + string arguments. + * Enable libphobos: + - gdc-4.2.dpatch: Fix ICEs. + - gdc-4.2-build.dpatch: Update, make it cleaner. + * Install libphobos in the private gcc lib dir. + * gdc-4.2.dpatch: Update from gdc-4.1.dpatch. + - gcc/tree-sra.c: Do not use SRA on structs with aliased fields created + for anonymous unions. + - gcc/predict.c: Add null-pointer check. + * debian/rules.defs: Disable phobos on hurd-i386. + - gdc-hurd-proc_maps.dpatch: Remove. + + -- Matthias Klose Wed, 02 Jan 2008 15:49:30 +0100 + +gcc-4.2 (4.2.2-4) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20071123 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/34130, wrong code with some __builtin_abs expressions. + Closes: #452108. + * Don't run the testsuite on hppa when expect-tcl8.3 is not available. + * Fix libgcc1-dbg doc directory symlink. Closes: #447969. + * Use gcc-multilib as build-dependency instead of gcc-4.1-mulitlib. + * Support for fast-math on hurd-i386 (Michael Banck). Closes: #451520. + * Fix again profiling support on the Hurd (Thomas Schwinge). Closes: #434937. + + [Arthur Loiret] + * Merge gdc-4.1 patches and build infrastructure: + - gdc-4.2.dpatch: Add, setup gcc-4.2.x for D. + - gdc-4.2-build.dpatch: Add, update gdc builtins and driver objs. + - gdc-driver-zlib.dpatch: Add, use up-to-date system zlib. + - gdc-driver-defaultlib.dpatch: Add, add -defaultlib/-debuglib switches. + - gdc-driver-nophobos.dpatch: Add, disable libphobos when unsupported. + - gdc-libphobos-build.dpatch: Add, enable libphobos build when supported. + - gdc-fix-build.dpatch: Add, fix build on non-biarched 64bits targets. + - gdc-libphobos-std-format.dpatch: Add, replace assert when formating a + struct on non-x86_64 archs by a FormatError. + - gdc-arm-unwind_ptr.dpatch: Add, fix build on arm. + - gdc-mips-gcc-config.dpatch: Add, fix build on mips. + - gdc-hurd-proc_maps.dpatch: Add, fix build on hurd. + + -- Matthias Klose Sat, 24 Nov 2007 12:01:06 +0100 + +gcc-4.2 (4.2.2-3) unstable; urgency=low + + * Update to SVN 20071014 from the ubuntu/gcc-4_2-branch. + - Fix build failure in libjava on mips/mipsel. + * Make 4.2.2-2 a requirement for frontends built from separate sources. + Addresses: #446596. + + -- Matthias Klose Sun, 14 Oct 2007 14:13:00 +0200 + +gcc-4.2 (4.2.2-2) unstable; urgency=low + + * Update to SVN 20071011 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/33448, ICE in create_tmp_var. Closes: #439687. + - Remove debian/patches/pr31899.dpatch, applied upstream. + - Remove debian/patches/pr33381.dpatch, applied upstream. + * gij-hppa: Call gij-4.2, not gij-4.1. Addresses: #446282. + + -- Matthias Klose Thu, 11 Oct 2007 23:41:52 +0200 + +gcc-4.2 (4.2.2-1) unstable; urgency=low + + * Update to SVN 20071008 from the ubuntu/gcc-4_2-branch, corresponding + to the GCC-4.2.2 release. + * Fix dependencies of lib*gcc1-dbg packages. Closes: #445190. + * Remove libjava-armeabi patch integrated upstream. + * gcjwebplugin: Fix path of the gcj subdirectory. LP: #149792. + * Apply proposed patch for PR debug/31899. Closes: #445268. + + * Add niagara2 optimization support (David Miller). + + -- Matthias Klose Mon, 08 Oct 2007 21:12:41 +0200 + +gcc-4.2 (4.2.1-6) unstable; urgency=high + + [Matthias Klose] + * Update to SVN 20070929 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/33382, ICE (closes: #441481). + - Fix PR tree-optimization/28544 (4.2.1, closes: #380482). + - Fix PR libffi/28313, port to mips64 (closes: #358235). + * Fix PR tree-optimization/33099, PR tree-optimization/33381, + wrong code generation with VRP/SCEV. Closes: #440545, #443576. + * Update Hurd fixes (Samuel Thibault). + * When -fstack-protector is the default (Ubuntu), do not enable + -fstack-protector when -nostdlib is specified. LP: #77865. + * Add -g to BOOT_CFLAGS, set STAGE1_CFLAGS to -g -O, only pass + other settings when required. + * Fix installation of the s390 libstdc++ biarch headers. + * Allow the powerpc build on a 32bit machine (without running the + biarch testsuite). + * Build -dbg packages for libgcc, libgomp, libmudflap, libffi, libobjc, + libgfortran. + * Drop the build dependency on expect-tcl8.3 (the hppa testsuite seems + to complete sucessfully with the expect package). + * Downgrade libmudflap-dev recommendation to a suggestion. Closes: #443929. + + * Closing reports reported against gcc-4.1 and fixed in gcc-4.2: + - General + + PR rtl-optimization/21299, error in invalid asm statement. + Closes: #380121. + - C++ + + PR libstdc++/19664, libstdc++ headers have pop/push of the visibility + around the declarations (closes: #307207, #324290, #423547). + + PR c++/21581, functions in anonymous namespaces default to "hidden" + visibility (closes: #278310). + + PR c++/4882, specialization of inner template using outer template + argument (closes: #269513). + + PR c++/6634, wrong parsing of "long long double" (closes: #247112). + + PR c++/10891, code using dynamic_cast causes segfaults when -fno-rtti + is used (closes: #188943). + + PR libstdc++/14991, stream::attach(int fd) porting entry out-of-date. + Closes: #178561. + + PR libstdc++/31638, string usage leads to warning with -Wcast-align. + Closes: #382153. + + Fix memory hog seen with g++-4.1. Closes: #411234. + - Fortran + + PR fortran/29228, ICE in gfc_trans_deferred_array (closes: #387222). + + PR fortran/24285, allow dollars everywhere in format (closes: #324600). + + PR libfortran/28354, 0.99999 printed as 0. instead of 1. by + format(f3.0). Closes: #397671. + + Fix ICE in gfc_get_extern_function_decl (closes: #396292). + - Architecture specific: + - i386 + + Fix error with -m64 (unable to find a register to spill in class + 'DIREG'). Closes: #430049. + - mips + + Fix ICE in tsubst (closes: #422303). + - s390 + + Fix ICE (segmentation fault) building dcmtk (closes: #435736). + + [Roman Zippel] + * Update the m68k patches. + + [Riku Voipio] + * Configure armeabi with --disable-sjlj-exceptions. + * armel testsuite takes ages, adjust build accordingly. + + [Ludovic Brenta and Xavier Grave] + * Add a version of the Ada run-time library using the setjump/longjump + exception handling mechanism (static library only). Use with + gnatmake --RTS=sjlj. Particularly useful for distributed (Annex E) + programs. + * Restore building libgnatvsn-dev and libgnatprj-dev. + + -- Matthias Klose Sat, 29 Sep 2007 11:19:40 +0200 + +gcc-4.2 (4.2.1-5) unstable; urgency=low + + * Update to SVN 20070825 from the ubuntu/gcc-4_2-branch. + - Fix PR debug/32610, LP: #121911. + * Apply proposed patches: + - Improve debug info for packed arrays with constant bounds + (PR fortran/22244). + - Fix ICE in rtl_for_decl_init on const vector initializers + (PR debug/32914). + - Fix (neg (lt X 0)) optimization (PR rtl-optimization/33148). + - Fix libgcc.a(tramp.o) on ppc32. + - Fix redundant reg/mem stores/moves (PR target/30961). + * Update the -fdirectives-only backport. + * gappletviewer-4.2: Include the gcjwebplugin binary. LP: #131114. + * Update gpc patches and build support (not yet enabled). + * Fix gcc-snapshot hppa64 install target. + * Set the priority of the source package to optional. + * Remove .la files from the biarch libstdc++ debug packages, + conflict with the 3.4 package. Closes: #440490. + + [Arthur Loiret] + * Add build support for GDC. + + -- Matthias Klose Mon, 27 Aug 2007 01:39:32 +0200 + +gcc-4.2 (4.2.1-4) unstable; urgency=medium + + * gcc-4.2: Include missing std*.h header files. + + -- Matthias Klose Tue, 14 Aug 2007 11:14:35 +0200 + +gcc-4.2 (4.2.1-3) unstable; urgency=low + + * Update to SVN 20070812 from the ubuntu/gcc-4_2-branch. + * debian/rules.defs: Fix typo, run the checks in biarch mode too. + * libgcj8-awt: Loosen dependency on gcj-4.2-base. + * Build only needed multilib libraries when building as gcj or gnat. + * Always build biarch libgomp in biarch builds. + * debian/rules2: Adjust testsuite logs files for logwatch.sh. + * Include header files from $/gcc_lib_dir)/include-fixed. + * Backport from trunk: -fdirectives-only (when preprocessing, handle + directives, but do not expand macros). + * Report an ICE to apport (if apport is available and the environment + variable GCC_NOAPPORT is not set) + * Fix gcj build failure on the Hurd (Samuel Thibault). Closes: #437470. + + -- Matthias Klose Sun, 12 Aug 2007 21:11:00 +0200 + +gcc-4.2 (4.2.1-2) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20070804 from the ubuntu/gcc-4_2-branch (20070804): + - Merge gcc-4_2-branch SVN 20070804. + - Imported classpath CVS 20070727. + - Bump the libgcj soname, add conflict with java-gcj-compat (<< 1.0.76-4). + - Remove patches integrated in the branches: pr32862. + - Update patches: libjava-subdir, libjava-jar. + - Add regenerated class files: svn-class-updates. + + * Fix profiling support on the Hurd (Michael Casadeval). Closes: #434937. + * Fix build on kfreebsd-amd64 (Aurelien Jarno). Closes: #435053. + * Period of grace is over, run the testsuite on m68k-linux again. + * Update infrastructure for the gcc-source package (Bastian Blank). + * Update profiling on the Hurd (Samuel Thibault, Michael Casadevall). + Closes: #433539. + * debian/rules2: Allow DEB_BUILD_OPTIONS=parallel= to overwrite NJOBS. + * Allow lang=, nolang= in DEB_BUILD_OPTIONS; deprecating + WITHOUT_LANG, and WITHOUT_CHECK. + * debian/rules.defs, debian/rules.conf: Cache some often used macros. + + * Preliminary work: Enable Java for ARM EABI (Andrew Haley), build + libffi for armel. + * gcj: Don't build the browser plugin in gcc-snapshot builds to get + rid of the xulrunner dependency. + * gcjwebplugin: Register for more browsers (package currently not built). + * gij/boehm-gc: Use sysconf as fallback, if reading /proc/stat fails. + Closes: #422469. + * libjava: Avoid dependency on MAXHOSTNAMELEN (Samuel Thibault). + * gcj: On arm and armel, use the ecj1 binary built from the ecj package. + * gcj: Don't require javac without java maintainer mode, remove build + dependencies on gcj and ecj, add build dependency on libecj-java. + + -- Matthias Klose Sun, 05 Aug 2007 15:56:07 +0200 + +gcc-4.2 (4.2.1-1) unstable; urgency=medium + + [Ludovic Brenta] + * debian/patches/ada-symbolic-tracebacks.c: remove all trace of + the function convert_addresses from adaint.c. Fixes FTBFS on alpha, + s390 and possibly other platforms. Closes: #433633. + * debian/control.m4: list myself as uploader if the source package name + is gnat. Relax build-dependency on gnat-4.2-source. + * debian/control.m4, debian/rules.conf: Build-depend on libmpfr-dev only + if building Fortran. + + [Matthias Klose] + * debian/rules.conf: Fix breakage of Fortran build dependencies introduced + by merge of the Ada bits. + * Don't include the gccbug binary anymore in the gcc package; upstream bug + reports should be reported to the upstream bug tracker at + http://gcc.gnu.org/bugzilla. + * Don't build and test libjava for the biarch architecture. + * Install gappletviewer man page. Addresses: #423094. + * debian/patches/m68k-java.dpatch: Readd. + * gjar: support @ arguments. + * Update to SVN 20070726 from the ubuntu/gcc-4_2-branch. + - Fix mips/mipsel builds. + * libmudflap0: Fix update leaving an empty doc dir. Closes: #428306. + * arm/armel doesn't have ssp support. Closes: #433172. + * Update kbsd-gnu-ada patch (Aurelien Jarno): Addresses: #434754. + * gcj-4.2: Build depend on gcj-4.2 to build the classpath examples files + for the binary-indep target. + * Fix PR java/32862, bugs in EnumMap implementation. Addresses: #423160. + + [Arthur Loiret] + * Fix cross builds targeting x86_64. Closes: LP: #121834. + + -- Matthias Klose Thu, 26 Jul 2007 21:46:03 +0200 + +gcc-4.2 (4.2.1-0) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20070719 from the ubuntu/gcc-4_2-branch, corresponding + to the GCC-4.2.1 release. + - debian/patches/arm-gij.dpatch: Remove. Closes: #433714. + * Apply proposed patch for PR tree-optimization/32723. + * Tighten build dependency on libmpfr-dev. + * On ia64, apply proposed patch for PR target/27880. Closes: #433719. + + [Hector Oron] + * Fix cross and reverse-cross builds. Closes: #432356. + + -- Matthias Klose Thu, 19 Jul 2007 17:59:37 +0200 + +gnat-4.2 (4.2-20070712-1) unstable; urgency=low + + * debian/rules.d/binary-ada.mk, debian/control.m4: + disable building libgnatvsn-dev and libgnatprj-dev, as they conflict + with packages from gnat-4.1. Will reenable them for the transition to + gnat-4.2. + * Upload as gnat-4.2. Closes: #432525. + + -- Ludovic Brenta Sat, 14 Jul 2007 15:12:34 +0200 + +gcc-4.2 (4.2-20070712-1) unstable; urgency=high + + [Matthias Klose] + * Update to SVN 20070712 from the ubuntu/gcc-4_2-branch. + - 4.2.1 RC2, built from SVN. + - same as gcc-4_2-branch, plus backport of gcc/java, boehm-gc, libffi, + libjava, zlib from the trunk. + - debian/patches/arm-libffi.dpatch: Remove. + - Fixes ICE in update_equiv_regs. Closes: #432604. + * debian/control.m4: Restore build dependency on dejagnu. + * debian/patches/arm-gij.dpatch: Update. + * i386-biarch.dpatch: Update for the backport for PR target/31868. + Closes: #432599. + + -- Matthias Klose Fri, 13 Jul 2007 08:07:51 +0200 + +gcc-4.2 (4.2-20070707-1) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20070707 from the ubuntu/gcc-4_2-branch. + - debian/patches/libjava-soname.dpatch: Remove. + - debian/patches/disable-configure-run-check.dpatch: Update. + * Only suggest multilib packages on multilib architectures. + * Point ICE messages to the 4.2 docdir. + * Explicitely use fastjar to build gcj-4.1. Addresses: #416001. + * Configure with --enable-libgcj on m32r (Kazuhiro Inaoka). + * Include the hppa64 cross compiler on hppa snapshot builds. + * debian/patches/arm-libffi.dpatch: Update. + * libgcj-doc: Include the generated documentation. + * Fix building the libjava/classpath examples. + * Support reverse cross builds (Neil Williams). Closes: #431086. + + -- Matthias Klose Sat, 07 Jul 2007 10:59:26 +0200 + +gcc-4.2 (4.2-20070627-1) unstable; urgency=high + + [Matthias Klose] + * Update to SVN gcc-4_2-branch/20070626. + * Update to SVN trunk/20070626 (gcc/java, libjava, libffi, boehm-gc). + * On mips*-linux, always imply -lpthread for -pthread (Thiemo Seufer). + Addresses: #428741. + * Fix libstdc++ cross builds (Arthur Loiret). Closes: #430395. + * README.Debian: Point to debian-toolchain for general toolchain topics. + * Use the generated locales for the libstdc++ build to fix the setting + of the gnu locale model. Closes: #428926, #429660. + * For ix86 lpia targets, configure --with-tune=i586. + * Make build dependency on gcc-4.1-multilib architecture specific. + * Do not ignore bootstrap comparision failure on ia64. + + [Ludovic Brenta] + * ada-link-lib.dpatch: update to apply cleanly on GCC 4.2. + * ada-libgnat{vsn,prj}.dpatch: adjust to GCC 4.2. Reenable in rules.patch. + * rules.conf: do not build libgomp as part of gnat-4.2. + * rules.conf, control.m4: build-depend on libz-dev, lib32z-dev or + lib64-dev only when building Java. + * rules2, rules.defs: $(with_mudflap): remove, use $(with_libmudflap) only. + * config.m4, binary-ada.mk: tighten dependencies; no Ada package depends + on gcc-4.2-base anymore. + * TODO: rewrite. + * README.gnat: include in gnat-4.2-base. Remove outdated information. + * README.maintainers: new. Include in gnat-4.2-base. + + [Hector Oron] + * Merge DEB_CROSS_INDEPENDENT with DEB_CROSS. + * Disables libssp0 for arm and armel targets when cross compiling. + * Updates README.cross. + * Fixes linker mapping problem on binary-libstdcxx-cross.mk. Closes: #430688. + + -- Matthias Klose Wed, 27 Jun 2007 21:54:08 +0200 + +gcc-4.2 (4.2-20070609-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070609. + - Remove patches integrated upstream: pr30052, hppa-caller-save-pic-tls. + * Update to SVN trunk/20070609 (gcc/java, libjava, libffi, boehm-gc). + - Remove patches integrated upstream: libjava-qt-peer, + classpath-config-guess. + * Do not build with --enable-java-maintainer-mode. + * debian/rules.patch: Comment out m68k-peephole, requires m68k-split_shift. + * Add target to apply patches up to a specific patch (Wouter Verhelst). + Closes: #424855. + * libstdc++6-4.2-*: Add conflicts with 4.1 packages. Closes: #419511. + * Apply proposed fix for PR target/28102. Closes: #426905. + * Fix build failure for cross compiler builds (Jiri Palecek). Closes: #393897. + * Update build macros for kfreebsd-amd64. Closes: #424693. + + -- Matthias Klose Sat, 9 Jun 2007 06:54:13 +0200 + +gcc-4.2 (4.2-20070528-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070528. + * Add backport for PR middle-end/20218. + * Add proposed PTA solver backport, PR tree-optimization/30052. + * Add backport for PR target/31868. + * Reenable the testsuite for arm, mips, mipsel. + + -- Matthias Klose Mon, 28 May 2007 09:03:04 +0200 + +gcc-4.2 (4.2-20070525-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070525. + * Update to SVN trunk/20070520 (gcc/java, libjava, libffi, boehm-gc). + * Do not explicitely configure for __cxa_atexit. + * libstdc++6-4.2-doc: Conflict with libstdc++6-4.1-doc. Closes: #424896. + * Update m68k patches: + - Remove patches applied upstream: m68k-jumptable, m68k-gc, + - Reenable patches: m68k-save_pic, m68k-dwarf, m68k-limit_reload, + m68k-prevent-qipush, m68k-peephole, m68k-return, m68k-sig-unwind, + m68k-align-code m68k-align-stack, m68k-symbolic-operand, + m68k-bitfield-offset. + - Update: m68k-return, m68k-secondary-addr-reload, m68k-notice-move + m68k-secondary-addr-reload, m68k-notice-move. + - TODO: m68k-split_shift, m68k-dwarf3, m68k-fpcompare. + * Update the kfreebsd and arm patches (Aurelien Jarno). Closes: #425011. + * Temporarily disable the testsuite on slow architectures to get the + package built soon. + + -- Matthias Klose Fri, 25 May 2007 07:14:36 +0200 + +gcc-4.2 (4.2-20070516-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070516. + * Update to SVN trunk/20070516 (gcc/java, libjava, libffi, boehm-gc). + * Merge changes from gcc-4.1_4.1.2-7. + * Update NEWS files. + + -- Matthias Klose Wed, 16 May 2007 02:33:57 +0200 + +gcc-4.2 (4.2-20070502-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070502. + - Remove pr11953 patch, integrated upstream. + * Update to SVN trunk/20070502 (gcc/java, libjava, libffi, boehm-gc). + * Adjust tetex/tex-live build dependency. + * Fix gobjc-4.2's, gobjc++-4.2's dependency on libobjc2. + * Tighten (build) dependency on binutils. Addresses: #421197. + * gfortran-4.2: Depend on libgfortran2, provide the libgfortran.so + symlink. Adresses: #421362. + * Build-depend on gcc-multilib [amd64 i386 powerpc ppc64 s390 sparc]. + * (Build-) depend on glibc (>= 2.5) for all architectures. + * Remove libssp packages from the control file. + + -- Matthias Klose Wed, 2 May 2007 18:46:57 +0200 + +gcc-4.2 (4.2-20070405-1) experimental; urgency=low + + * Update to SVN gcc-4_2-branch/20070405. + * Update to SVN trunk/20070405 (gcc/java, libjava, libffi, boehm-gc). + * gcc-4.2-hppa64: Don't depend on libc6-dev. + * Robustify setting of make's -j flag. Closes: #410919. + * gcc-snapshot: Use the install_snap_stamp target for installation. + + -- Matthias Klose Thu, 5 Apr 2007 23:56:35 +0200 + +gcc-4.2 (4.2-20070307-1) experimental; urgency=low + + * Update to SVN gcc-4_2-branch/20070307. + * Update to SVN trunk/20070307 (gcc/java, libjava, libffi, boehm-gc). + * Build gnat from separate sources. + * Merge changes from gcc-4.1-4.1.2-1. + * Install into /usr/lib/gcc//4.2, to ease upgrades + between subminor versions. + * Configure --with-gxx-include-dir=/usr/include/c++/4.2 + + -- Matthias Klose Thu, 8 Mar 2007 02:52:00 +0100 + +gcc-4.2 (4.2-20070210-1) experimental; urgency=low + + * Merge Java backport from Ubuntu: + - Update to SVN gcc-4_2-branch/20070210. + - Update to SVN trunk/20070210 (gcc/java, libjava). + - Backout trunk specific gcc/java changes. + - Build-depend on gcj-4.1 and ecj-bootstrap. + - gcj-4.2: Depend on ecj-bootstrap, recommend ecj-bootstrap-gcj. + - Merge libgcj8-awt-gtk back into libgcj8-awt; the Qt peers + are disabled by upstream again. + - Generate manual pages for the classpath tools from the classpath + documentation. + - Adopt packaging for the merged libjava. + - Update patches for the merged libjava: libjava-lib32-properties, + i386-biarch, reporting, libjava-soname, libjava-subdir, + libjava-lib32subdir. + - Remove obsolete patches: libjava-plugin-binary, libjava-ia32fix, + libstdc++-docfixes. + + * Set priority of development packages to optional. + * debian/libgcjGCJ.postrm: Don't fail on purge when directories + don't exist anymore. Closes: #406017. + * debian/patches/gcc-textdomain.dpatch: Update for 4.2. + * Generate and install libgomp docs into gcc-4.2-doc. + + -- Matthias Klose Sat, 10 Feb 2007 16:53:11 +0100 + +gcc-4.2 (4.2-20070105-1) experimental; urgency=low + + * Update to SVN 20070105. + * Add tetex-extra to Build-Depend-Indep (libstd++ doxygen docs), + fix doxygen build (libstdc++-docfixes.dpatch). + * Enable parallel build by default on SMP machines. + + -- Matthias Klose Fri, 5 Jan 2007 22:42:18 +0100 + +gcc-4.2 (4.2-20061217-1) experimental; urgency=low + + * Update to SVN 20061217. + * Merge changes from gcc-4.1_4.1.1-16 to gcc-4.1_4.1.1-21. + * Update patches to the current branch. + * Add multilib packages for gcc, g++, gobjc, gobjc++, gfortran. + * Link using --hash-style=gnu (alpha, amd64, ia64, i386, powerpc, ppc64, + s390, sparc). + + -- Matthias Klose Sun, 17 Dec 2006 15:54:54 +0100 + +gcc-4.2 (4.2-20061003-1) experimental; urgency=low + + * libgcj.postinst: Remove /var/lib/gcj-4.2 on package removal. + * Don't install backup files in the doc directory, only one gcc-4.1 + upgrade was broken. Closes: #389366. + * Merge gcc-biarch-generic.dpatch into i386-biarch.dpatch. + * Update link-libs.dpatch. + * Merge libgfortran2-dev into gfortran-4.2. + + -- Matthias Klose Tue, 3 Oct 2006 16:26:38 +0000 + +gcc-4.2 (4.2-20060923-1) experimental; urgency=low + + * Update to SVN 20060923. + * Remove patches applied upstream: kbsd-gnu-java, kbsd-gnu. + + -- Matthias Klose Sat, 23 Sep 2006 15:11:36 +0200 + +gcc-4.2 (4.2-20060905-1) experimental; urgency=low + + * Update to SVN 20060905. + * Merge changes from gcc-4.1 (4.1.1-10 - 4.1.1-12). + * Move gomp development files into gcc and gfortran. + * Build-depend on binutils (>= 2.17). + + -- Matthias Klose Tue, 5 Sep 2006 03:33:00 +0200 + +gcc-4.2 (4.2-20060818-1) experimental; urgency=low + + * Update to SVN 20060818. + - libjava-libgcjbc.dpatch: Remove, applied upstream. + * Merge changes from the Ubuntu gcj-4.2 package: + - libjava-soname.dpatch: Remove, applied upstream. + - libjava-native-libdir.dpatch: update. + - libffi-without-libgcj.dpatch: Remove, new libffi-configure to + enable --disable-libffi. + - Changes required for the classpath-0.92 update: + - New packages gappletviewer-4.2, gcjwebplugin-4.2. + - gij-4.2: Add keytool alternative. + - gcj-4.2: Add jarsigner alternative. + - libgcj8-dev: Remove conflicts with older libgcjX-dev packages. + - lib32gcj8: Populate the /usr/lib32/gcj-4.2 directory. + - libjava-library-path.dpatch: + - When running the i386 binaries on amd64, look in + /usr/lib32/gcj-x.y and /usr/lib32/jni instead. + - Add /usr/lib/jni to java.library.path. Adresses: #364820. + - Add more debugging symbols to libgcj8-dbg. Adresses: #383705. + - Fix and renable the biarch build for sparc. + * Disable gnat for alpha, fails to build. + * Configure without --enable-objc-gc, fails to build. + + -- Matthias Klose Sat, 19 Aug 2006 18:25:50 +0200 + +gcc-4.2 (4.2-20060709-1) experimental; urgency=low + + * Test build, SVN trunk 20060709. + * Merge libssp0-dev into gcc-4.1 (-fstack-protector is a common option). + * Rename libmudflap0-dev to libmudflap0-4.2-dev. + * Ignore compiler warnings when checking whether compiler driver understands + Ada fails. + * Merge changes from the gcc-4.1 package. + + -- Matthias Klose Sun, 9 Jul 2006 14:28:03 +0200 + +gcc-4.2 (4.2-20060617-1) experimental; urgency=low + + * Test build, SVN trunk 20060617. + + [Matthias Klose] + * Configure using --enable-objc-gc, using the internal boehm-gc. + * Build-depend on bison (>= 1:2.3). + * Build the QT based awt peer library, not yet the same functionality + as the GTK based peer library. + * Update libjava-* patches. + + [Ludovic Brenta] + * Do not provide the symbolic link /usr/bin/gnatgcc; this will now + be provided by package gnat from the source package gcc-defaults. + * debian/control.m4, debian/control (gnat): conflict with gnat (<< 4.1), + not all versions of gnat, since gcc-defaults will now provide gnat (= 4.1) + which depends on gnat-4.1. + + [Bastian Blank] + * Make it possible to overwrite arch per DEB_TARGET_ARCH and + DEB_TARGET_GNU_TYPE. + * Disable biarch only on request for cross builds. + * Use correct source directory for tarballs. + * Produce correct multiarch.inc for source builds. + + -- Matthias Klose Sat, 17 Jun 2006 19:02:01 +0200 + +gcc-4.2 (4.2-20060606-1) experimental; urgency=low + + * Test build, SVN trunk 20060606. + * Remove obsolete patches, update patches for 4.2. + * Update the biarch-include patches to work with mips-triarch. + * Disable Ada, not yet updated. + * New packages: libgomp*. + * Remove fastjar, not included upstream anymore. + + -- Matthias Klose Tue, 6 Jun 2006 10:52:28 +0200 + +gcc-4.1 (4.1.2-12) unstable; urgency=high + + * i386-biarch.dpatch: Update for the backport for PR target/31868. + Closes: #427185. + * m68k-libffi2.dpatch: Update. Closes: #425399. + + -- Matthias Klose Mon, 4 Jun 2007 23:53:23 +0200 + +gcc-4.1 (4.1.2-11) unstable; urgency=low + + * Update to SVN 20070601. + * Build the libmudflap0-dev package again. + * Don't build libffi, when the packages are not built. + + -- Matthias Klose Fri, 1 Jun 2007 23:55:22 +0200 + +gcc-4.1 (4.1.2-10) unstable; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Wed, 30 May 2007 00:29:29 +0200 + +gcc-4.1 (4.1.2-9) unstable; urgency=low + + * Update to SVN 20070528. + * Don't build packages now built from the gcc-4.2 source (arm, m68k, + mips, mipsel). + * Add backport for PR middle-end/20218. + * Add backport for PR target/31868. + + -- Matthias Klose Tue, 29 May 2007 00:01:12 +0200 + +gcc-4.1 (4.1.2-8) unstable; urgency=low + + * Update to SVN 20070518. + * Don't build packages now built from the gcc-4.2 source. + + [ Aurelian Jarno ] + * Update libffi patch for ARM. Closes: #425011. + * arm-pr30486, arm-pr28516, arm-unbreak-eabi-armv4t: New. + * Disable FFI, Java, ObjC for armel. + + -- Matthias Klose Sun, 20 May 2007 10:31:24 +0200 + +gcc-4.1 (4.1.2-7) unstable; urgency=low + + * Update to SVN 20070514. + * Link using --hash-style=both on supported architectures. Addresses: #421790. + * On hppa, build ecjx as a native binary. + * note-gnu-stack.dpatch: Fix ARM comment marker (Daniel Jacobowitz). + Closes: #422978. + * Add build dependency on libxul-dev for *-freebsd. Closes: #422995. + * Update config.guess/config.sub and build gcjwebplugin on GNU/kFreeBSD + (Aurelian Jarno). Closes: #422995. + * Disable ssp on hurd-i386. Closes: #423757. + + -- Matthias Klose Mon, 14 May 2007 08:40:08 +0200 + +gcc-4.1 (4.1.2-6) unstable; urgency=low + + * Update libjava from the gcc-4.1 Fedora branch 20070504. + * gfortran-4.1: Fix the target of the libgfortran.so symlink. + Closes: #421362. + * Build-depend on gcc-multilib [amd64 i386 powerpc ppc64 s390 sparc]. + * Readd build dependency on binutils on arm. + * (Build-) depend on glibc (>= 2.5) for all architectures. + * Remove libssp packages from the control file. + * Fix wrong code generation on hppa when TLS variables are used. + Closes: #422421. + + -- Matthias Klose Sun, 6 May 2007 10:00:23 +0200 + +gcc-4.1 (4.1.2-5) unstable; urgency=low + + * Update to SVN 20070429. + * Update libjava from the gcc-4.1 Fedora branch 20070428. + * Update m68k patches: + - Remove pr25514, pr27736, applied upstream. + - Update m68k-java. + * Link using --hash-style=gnu/both. + * Tighten (build) dependency on binutils. Closes: #421197. + * gij-4.1: Add a conflict with java-gcj-compat (<< 1.0.69). + * gfortran-4.1: Depend on libgfortran1, provide the libgfortran.so + symlink. Closes: #421362. + * gcc-4.1, gcc-4.1-multilib: Fix compatibility symlinks. Closes: #421382. + * Temporarily remove build dependency on locales on arm, hppa, m68k, mipsel. + * Temporarily remove build dependency on binutils on arm. + * Fix FTBFS on GNU/kFreeBSD (Aurelian Jarno). Closes: #421423. + * gij-4.1 postinst: Create /var/lib/gcj-4.1. Closes: #421526. + + -- Matthias Klose Mon, 30 Apr 2007 08:13:32 +0200 + +gcc-4.1 (4.1.2-4) unstable; urgency=medium + + * Update to SVN 20070423. + - Remove pr11953, applied upstream. + - Fix ld version detection in libstdc++v3. + * Update libjava from the gcc-4.1 Fedora branch 20070423. + * Merge libgfortran1-dev into gfortran-4.1. + * Add multilib packages for gcc, g++, gobjc, gobjc++, gfortran. + * Don't link using --hash-style=gnu/both; loosen dependency on binutils. + * Don't revert the patch to fix PR c++/27227. + + -- Matthias Klose Mon, 23 Apr 2007 23:13:14 +0200 + +gcc-4.1 (4.1.2-3) experimental; urgency=low + + * Update to SVN 20070405. + * Update libjava from the gcc-4.1 Fedora branch 20070405. + * Robustify setting of make's -j flag. Closes: #414316. + * Only build the libssp packages, when building the common libraries. + * gcc-4.1-hppa64: Don't depend on libc6-dev. + + -- Matthias Klose Fri, 6 Apr 2007 00:28:29 +0200 + +gcc-4.1 (4.1.2-2) experimental; urgency=low + + * Update to SVN 20070306. + * Update libjava from the gcc-4.1 Fedora branch 20070306. + + [Matthias Klose] + * Don't install gij-wrapper anymore, directly register gij as a java + alternative. + * Don't install gcjh-wrapper anymore. + * Don't use exact versioned dependencies on gcj-base for libgcj and + libgcj-awt. + * Fix glibc build dependency for alpha. + * Support -ffast-math on hurd-i386 (Samuel Thibault). Closes: #413342. + * Update kfreebsd-amd64 patches (Aurelien Jarno). Closes: #406015. + * gij: Consistently use $(dbexecdir) to reference the gcj sub dir. + * Install into /usr/lib/gcc//4.1, to ease upgrades + between minor versions. + Add compatibility symlinks in /4.1.2 to build gnat-4.1 + and gcj-4.1 from separate sources. + + -- Matthias Klose Wed, 7 Mar 2007 03:51:47 +0100 + +gcc-4.1 (4.1.2-1) experimental; urgency=low + + [Matthias Klose] + * Update to gcc-4.1.2. + * Update libjava backport patches, split out boehm-gc-backport patch. + * Enable the cpu-default-generic patch (i386, amd64), backport from 4.2. + * Correct mfctl instruction syntax (hppa), backport from the trunk. + * Backport PR java/9861 (name mangling updates). + * gcc.c (main): Call expandargv (backport from 4.2). + * Apply gcc dwarf2 unwinding patches from the trunk. + * Apply backport for PR 20208 on amd64 i386 powerpc ppc64 sparc s390. + * Apply patches from the 4.1 branch for PR rtl-optimization/28772, + PR middle-end/30313, PR middle-end/30473, PR c++/30536, PR debug/30189, + PR fortran/30478, PR rtl-optimization/30787, PR tree-optimization/30823, + PR rtl-optimization/28173, PR ada/30684, bug in pointer dependency test, + PR rtl-optimization/30931, PR fortran/25392, PR fortran/30400, + PR libgfortran/30910, PR libgfortran/30918, PR fortran/29441, + PR target/30634. + * Update NEWS files. + * Include a backport of the ecj+generics java updates as + gcj-ecj-20070215.tar.bz2. Install it into the gcc-4.1-source package. + * Do not build fastjar anymore from this source. + * debian/control.m4: Move expect-tcl8.3 before dejagnu. + * Work around firefox/icewhatever dropping plugin dependencies on xpcom. + * Refactor naming of libgcj packages in the build files. + * Make libstdc++-doc's build dependencies depending on the source package. + * Do not build packages on architectures, which are already built by gcc-4.2. + + * Merge the gcj generics backport from Ubuntu: + + - Merge the Java bits (eclipse based compiler, 1.5 compatibility, + classpath generics) from the gcc-4.1 Fedora branch. + - Drop all previous patches from the classpath-0.93 merge, keep + the boehm-gc backport (splitted out as a separate patch). + - Add a gcj-ecj-generics.tar.bz2 tarball, containing gcc/java, libjava, + config/unwind_ipinfo.m4, taken from the Fedora branch. + - Drop the libjava-hppa, libjava-plugin-binary, pr29362, pr29805 patches + integrated in the backport. + - Update patches for the merge: reporting, libjava-subdir, i386-biarch, + classpath-tooldoc, pr26885 + - Add libjava-dropped, libjava-install; dropped chunks from the merge. + - Add pr9861-nojava mangling changes, non-java parts for PR 9861. + - Add gcc-expandv, expand `@' parameters on the commandline; backport + from the trunk. + - Disable the m68k-gc patch, needs update for the merge. + - Configure --with-java-home set for 1.5.0. + - Configure with --enable-java-maintainer-mode to build the header + and class files on the fly. + - Add build dependency on ecj-bootstrap, configure --with-ecj-jar. + - Build an empty libgcj-doc package; gjdoc currently cannot handle + generics. + - Apply gcc dwarf2 unwinding patches from the trunk, allowing the Events + testcase to pass. + - Tighten dependencies on shared libraries. + - Use /usr/lib/gcj-4-1-71 as private gcj subdir. + - Bump the libgcj soversion to 71, rename the libgcj7-0 package + to libgcj7-1, rename the libgcj7-awt package to libgcj7-1-awt. + - gij-4.1: Add and provide alternatives for gorbd, grmid, gserialver. + - gcj-4.1: Remove gcjh, gcjh-wrapper, gjnih. + - gcj-4.1: Add and provide alternatives for jar, javah, native2ascii, + tnameserv. + - gcj-4.1: Add dependency on ecj-bootstrap, recommend fastjar, + ecj-bootstrap-gcj. + - Add build dependency on ecj-bootstrap version providing the GCCMain + class. + - libgcj7-1: Recommend libgcj7-1-awt. + - Add build dependency on libmagic-dev. + - Build-depend on gcj-4.1; build our own ecj1 and gjdoc before + starting the build. + - Make ecj1 available when running the testsuite. + - Fix build failure on sparc-linux. + - Fix gjavah compatibility problems (PR cp-tools/3070[67]). + - Fixed driver issue source files (PR driver/30714). + - Add (rudimentary) manual pages for classpath tools. + + [Kevin Brown] + * debian/control.m4, debian/rules.d/binary-ada.mk: provide new packages + containing debugging symbols for Ada libraries: libgnat-4.1-dbg, + libgnatprj4.1-dbg, and libgnatvsn4.1-dbg. Adresses: #401385. + + -- Matthias Klose Sat, 3 Mar 2007 23:12:08 +0100 + +gcc-4.1 (4.1.1ds2-30) experimental; urgency=low + + * Update to SVN 20070106. + * Do not revert the fixes for PR 25878, PR 29138, PR 29408. + * Don't build the packages built by gcc-4.2 source. + * debian/patches/note-gnu-stack.dpatch: Add .note.GNU-stack sections + for gcc's crt files, libffi and boehm-gc. Taken from FC. Closes: #382741. + * Merge from Ubuntu: + - Backport g++ visibility patches from the FC gcc-4_1-branch. + - Update the long-double patches; require glibc-2.4 as a build dependency + on alpha, powerpc, sparc, s390. Bump the shlibs dependencies to + require 4.1.1-21. + - On powerpc-linux configure using --enable-secureplt. Closes: #382748. + - When using the cpu-default-generic patch, build for generic x86-64 + on amd64 and i386 biarch. + - Link using --hash-style=both (alpha, amd64, ia64, i386, powerpc, ppc64, + s390, sparc). + * gij-4.1: Recommends libgcj7-awt instead of suggesting it. Closes: #394917. + * Split the gcc-long-double patch into a code and doc part. + * Set priority of development packages to optional. + * Add support for kfreebsd-amd64 (Aurelian Jarno). Closes: #406015. + + -- Matthias Klose Sat, 6 Jan 2007 10:35:42 +0100 + +gcc-4.1 (4.1.1ds2-22) unstable; urgency=high + + * Enable -pthread for GNU/Hurd (Michael Banck). Closes: #400031. + * Update the m68k-fpcompare patch (Roman Zippel). Closes: #401585. + + -- Matthias Klose Sun, 10 Dec 2006 12:35:06 +0100 + +gcc-4.1 (4.1.1ds2-20) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20061115. + - Fix PR tree-optimization/27891, ICE in tree_split_edge. + Closes: #370248, #391657, #394630. + - Fix PR tree-optimization/9814, duplicate of PR tree-optimization/29797. + Closes: #181096. + * Apply the libjava/net backport from the redhat/gcc-4_1-branch. + * Apply proposed patch for PR java/29805. + + [Roman Zippel] + * Build the ObjC and ObjC++ compilers in cross builds. + * debian/patches/m68k-symbolic-operand.dpatch: Better recognize + symbolic operands in addresses. + * debian/patches/m68k-bitfield-offset.dpatch: Only use constant offset + for register bitfields (combine expects shifts, but does a rotate). + * debian/patches/m68k-bitfield-offset.dpatch: Update and apply. + + [Daniel Jacobowitz] + * Don't try to use _Unwind_Backtrace on SJLJ targets. + See bug #387875, #388505, GCC PR 29206. + + -- Matthias Klose Wed, 15 Nov 2006 08:59:53 -0800 + +gcc-4.1 (4.1.1ds2-19) unstable; urgency=low + + * Fix typo in arm-pragma-pack.dpatch. + + -- Matthias Klose Sat, 28 Oct 2006 11:04:00 +0200 + +gcc-4.1 (4.1.1ds2-18) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20061028. + * Fix #pragma pack on ARM (Paul Brook). Closes: #394703. + * Revert PR c++/29138, PR c++/29408. Closes: #392559. + * Revert PR c++/25878. Addresses: #387989. + * fastjar: Provide jar. Closes: #395397. + + [Ludovic Brenta] + * debian/control.m4 (libgnatprj-dev): depend on libgnatvsn-dev. + debian/gnatprj.gpr: with gnatvsn.gpr. Closes: #395000. + + -- Matthias Klose Thu, 26 Oct 2006 23:51:10 +0200 + +gcc-4.1 (4.1.1ds2-17) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20061020. + - Fix PR debug/26881, ICE in dwarf2out_finish. Closes: #377613. + - Fix PR PR c++/29408, parse error for valid code. Closes: #392327, #393010. + - Fix PR c++/29435, segfault with sizeof and templates. Closes: #393071. + - Fix PR target/29338, segfault with -finline-limit on arm. Closes: 390620. + - Fix 3.4/4.0 backwards compatibility problem in libstdc++. + * Fix PR classpath/29362, taken from the redhat/gcc-4_1-branch. + * Remove the INSTALL directory from the source tarball. Closes: #392974. + * Disable building the static libgcj; non-functional, and cutting + down build times. + * libgcj7-0: Tighten dependency on libgcj-common. + * libgcj7-dev: Install .pc file as libgcj-4.1.pc. + * README.cross: Updated (Hector Oron). Addresses: #380251. + * config-ml.dpatch: Use *-linux-gnu as *_GNU_TYPE. Closes: #394034. + + [Nikita V. Youshchenko] + * Fix typo in the cross build scripts. Closes: #391445. + + [Falk Hueffner] + * alpha-no-ev4-directive.dpatch: Fix kernel build failure. + + [Roman Zippel] + * debian/patches/m68k-align-code.dpatch: Use "move.l %a4,%a4" to advance + within code. + * debian/patches/m68k-align-stack.dpatch: Try to keep the stack word aligned. + * debian/patches/m68k-dwarf3.dpatch: Emit correct dwarf info for cfa offset + and register with -fomit-frame-pointer. + * debian/patches/m68k-fpcompare.dpatch: Bring fp compare early to its + desired form to relieve reload. Closes: #390879. + * debian/patches/m68k-prevent-swap.dpatch: Don't swap operands + during reloads. + * debian/patches/m68k-reg-inc.dpatch: Reinsert REG_INC notes after splitting + an instruction. + * debian/patches/m68k-secondary-addr-reload.dpatch: Add secondary reloads + to allow reload to get byte values into addr regs. Closes: #385327. + * debian/patches/m68k-symbolic-operand.dpatch: Better recognize symbolic + operands in addresses. + * debian/patches/m68k-limit_reload.dpatch: Remove, superseded by + m68k-secondary-addr-reload.dpatch. + * debian/patches/m68k-notice-move.dpatch: Apply, was checked in in -16. + * debian/patches/m68k-autoinc.dpatch: Updated, don't attempt to increment + the register, if it's used multiple times in the instruction . + + -- Matthias Klose Sat, 21 Oct 2006 00:25:05 +0200 + +gcc-4.1 (4.1.1ds1-16) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20061008. + - Fix PR c++/29226, ICE in make_decl_rtl. Closes: #388263. + * libgcj7-0: Fix package removal. Closes: #390874. + * Configure with --disable-libssp on architectures that don't + support it (alpha, hppa, ia64, m68k, mips, mipsel). + * On hppa, remove build-dependency on dash. + * gij/gcj: Do not install slave links for the non DFSG manpages. + Closes: #390425, #390532. + * libgcj-common: rebuild-gcj-db: Don't do anything, if no classmap + files are found. Closes: #390966. + * Fix PR libstdc++/11953, extended for all linux architectures. + Closes: #391268. + * libffi4-dev: Conflict with libffi. Closes: #387561. + * Backport PR target/27880 to the gcc-4_1-branch. Patch by Steve Ellcey. + Closes: #390693. + * On ia64, don't use _Unwind_GetIPInfo in libjava and libstdc++. + * Add a README.ssp with minimal documentation about stack smashing + protection. Closes: #366094. + * Do not build libgcj-common from the gcc-4.1/gcj-4.1 sources anymore. + + [Roman Zippel] + * debian/patches/m68k-notice-move.dpatch: Don't set cc_status + for fp move without fp register. + + -- Matthias Klose Sun, 8 Oct 2006 02:21:49 +0200 + +gcc-4.1 (4.1.1ds1-15) unstable; urgency=medium + + * Update to SVN 20060927. + - Fix PR debug/29132, exception handling on mips. Closes: #389468, #390042. + - Fix typo in gcc documentation. Closes: #386180. + - Fix PR target/29230, wrong code generation on arm. Closes: #385505. + * libgcj-common: Ignore exit value of gcj-dbtool in rebuild-gcj-db on + arm, m68k, hppa. Adresses: #388505. + * libgcj-common: Replaces java-gcj-compat-dev and java-gcj-compat. + Closes: #389539. + * libgcj-common: /usr/share/gcj/debian_defaults: Define gcj_native_archs. + * Update the java backport from the redhat/gcc-4_1-branch upto 2006-09-27; + remove libjava-str2double.dpatch, pr28661.dpatch. + * Disable ssp on hppa, not supported. + * i386-biarch.dpatch: Avoid warnings about macro redefinitions. + + -- Matthias Klose Fri, 29 Sep 2006 22:32:41 +0200 + +gcc-4.1 (4.1.1ds1-14) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20060920. + - Fix PR c++/26957. Closes: #373257, #386910. + - Fix PR rtl-optimization/28243. Closes: #378325. + * Remove patch for PR rtl-optimization/28634, applied upstream. + * Fix FTBFS on GNU/kFreeBSD (fallout from the backport of classpath-0.92). + (Petr Salinger). Closes: #385974. + * Merge from Ubuntu: + - Do not encode the subminor version in the jar files. + - Fix typo for the versioned gcj subdirectory in lib32gcj-0. + - When running the i386 binaries on amd64, adjust the properties + java.home, gnu.classpath.home.url, sun.boot.class.path, + gnu.gcj.precompiled.db.path. + - Configure the 32bit build on amd64 + --with-java-home=/usr/lib32/jvm/java-1.4.2-gcj-4.1-1.4.2.0/jre. + - Configure --with-long-double-128 for glibc-2.4 on alpha, powerpc, ppc64, + s390, s390x, sparc, sparc64. + - Update the java backport from the redhat/gcc-4_1-branch upto 2006-09-20. + - Fix PR java/29013, invalid byte code generation. Closes: #386926. + - debian/patches/gcc-pfrs-2.dpatch: Apply a fix for a regression in the + backport of PR 28946 from the trunk (H.J. Lu). + * Backport PR classpath/28661 from the trunk. + * Don't ship the .la files for the java modules. Closes: #386228. + * gcj-4.1: Remove dangling symlink. Closes: #386430. + * gij: Suggest java-gcj-compat, gcj: Suggest java-gcj-compat-dev. + Closes: #361942. + * Fix infinite loop in string-to-double conversion on 64bit targets. + Closes: #348792. + * gij-4.1: Ignore exit value of gcj-dbtool in postinst. Adresses: #388505. + * libgcj-common: Move rebuild-gcj-db from java-gcj-compat into libgcj-common. + * On hppa, install a wrapper around gij-4.1 to ignore unaligned memory + accesses. Works around buildd configurations enabling this check by + default. Addresses: #364819. + + [Ludovic Brenta] + * debian/patches/ada-libgnatprj.dpatch: Build mlib-tgt-linux.adb instead of + mlib-tgt.adb. Closes: #387826. + * debian/patches/ada-pr15802.dpatch: Backport from the trunk. + Closes: #246384. + * debian/control.m4 (gnat-4.1): do not provide gnat (supplied by + gcc-defaults instead); conflict with gnat-4.2 which will soon be in + unstable. + + [Roman Zippel] + * debian/patches/m68k-dwarf2.dpatch: Recognize stack adjustments also + in the src of an instruction. + * debian/patches/m68k-jumptable.dpatch: Don't force byte offset when + accessing the jumptable, gas can generate the correct offset size instead. + * debian/patches/m68k-peephole.dpatch: Convert some text peepholes to rtl + peepholes, so the correct DWARF2 information can be generated for stack + manipulations (Keep a few peepholes temporarily disabled). + * debian/patches/m68k-peephole-note.dpatch: Don't choke on notes while + reinserting REG_EH_REGION notes. + * debian/patches/m68k-return.dpatch: Don't use single return if fp register + have to be restored. Closes: #386864. + * debian/patches/m68k-sig-unwind.dpatch: Add support for unwinding over + signal frames. + * Fix PR rtl-optimization/27736, backport from the trunk. + * Add java support for m68k. Closes: #312830, #340874, #381022. + + -- Matthias Klose Sun, 24 Sep 2006 19:36:31 +0200 + +gcc-4.1 (4.1.1ds1-13) unstable; urgency=medium + + * Update to SVN 20060901; remove patches applied upstream: + - PR target/24367. + - PR c++/26670. + * Apply proposed patch for PR fortran/28908. + * Fix biarch symlinks in lib64stdc++ for cross builds. + * Fix biarch symlinks in lib32objc on amd64. + + -- Matthias Klose Fri, 1 Sep 2006 00:04:05 +0200 + +gcc-4.1 (4.1.1ds1-12) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20060830. + * Add backport of PR other/26208, bump libgcc1 shlibs dependency. + * Add backport of PR c++/26670. Closes: #356548. + * Apply proposed patch for PR target/24367 (s390). + * Add /usr/lib/jni to the libjava dlsearch path. Closes: #364820. + * Build without GFDL licensed docs. Closes: #384036. + - debian/patches/{svn-doc-updates,pr25524-doc,pr26885-doc}.dpatch: + Split out -doc specific patches. + - debian/*.texi, debian/porting.html: Add dummy documentation. + - debian/rules.unpack, debian/rules.patch: Update for non-gfdl build. + - fastjar.texi: Directly define the gcctabopt and gccoptlist macros. + + * Merge from Ubuntu: + - Backport the classpath-0.92, libjava, gcc/java merge from the + redhat/gcc-4_1-branch branch. + - Apply the proposed patch for PR libgcj/28698. + - Change the libgcj/libgij sonames. Rename libgcj7 to libgcj7-0. + - Do not remove the rpath from libjvm.so and libjawt.so. Some + configure scripts rely on being able to link that libraries + directly. + - When running the i386 binaries on amd64, look in + /usr/lib32/gcj-x.y and /usr/lib32/jni instead. + - Add /usr/lib/jni to java.library.path. Closes: #364820. + - Add debugging symbols for more binary packages to libgcj7-dbg. + Closes: #383705. + - libgcj7-dev: Remove conflicts with older libgcjX-dev packages. + - Do not build the libgcj-bc and lib32gcj-bc packages anymore from + the gcj-4.1 source. + + [Roman Zippel] + * debian/patches/m68k-limit_reload.dpatch: Correctly limit reload class. + Closes: #375522. + * debian/patches/m68k-split_shift.dpatch: Use correct predicates for long long + shifts and use more splits. Closes: #381572. + * debian/patches/m68k-prevent-qipush.dpatch: Prevent combine from creating + a byte push on the stack (invalid on m68k). Closes: #385021. + * debian/patches/m68k-autoinc.dpatch: Recognize a few more autoinc possibilities. + * debian/patches/pr25514.dpatch: Backport from the trunk. + * debian/patches/m68k-gc.dpatch: Change STACKBOTTOM to LINUX_STACKBOTTOM + so it works with 2.6 kernels. + * Other m68k bug reports fixed in 4.1.1-11 and 4.1.1-12: + Closes: #378599, #345574, #344041, #323426, #340293. + * Build the stage1 compiler using -g -O2; saves a few hours build time + and apparently is working at the moment. + + -- Matthias Klose Tue, 29 Aug 2006 21:37:28 +0200 + +gcc-4.1 (4.1.1-11) unstable; urgency=low + + * The "Our priority are our users, remove the documentation!" release. + + [Matthias Klose] + * Fix build failure building the hppa->hppa64 cross compiler. + * Update to SVN 20060814. + - Fix directory traversal vulnerability in fastjar. Closes: #368397. + CVE-2006-3619. + - Fix PR rtl-optimization/23454, ICE in invert_exp_1 on sparc. + Closes: #321215. + - Fix PR c++/26757, C++ front-end producing two DECLs with the same UID. + Closes: #356569. + * Remove patch for PR rtl-optimization/28075, applied upstream. + * Apply proposed patch for PR rtl-optimization/28634, rounding problem with + -fdelayed-branch on hppa/mips. Closes: #381710. + * Fixed at least in 4.1.1-10: boost::date_time build failure. + Closes: #382352. + * Build-depend on make (>= 3.81), add make (>= 3.81) as dependency to + gcc-4.1-source. Closes: #381117. + * Backport of libffi from the trunk; needed for the java backport in + experimental. + * libffi4-dev: Install the libffi_convenience library as libffi_pic.a. + * When building a package without the GFDL'd documentation, don't create + the alternative's slave links for manual pages for the java tools. + * Do not build the -doc packages and derived manual pages licensed under + the GFDL with invariant sections or cover texts. + * Only build the libssp package, if the target libc doesn't provide + ssp support. + * Run the complete testsuite, when building a standalone gcj package. + + [Roman Zippel] + * debian/patches/m68k-fjump.dpatch: + Always use as fjcc pseudo op, we rely heavily on as to generate the + right size for the jump instructions. Closes: #359281. + * debian/patches/m68k-gc.dpatch: + The thread suspend handler has to save all registers. + Reenable MPROTECT_VDB, it should work, otherwise it's probably a kernel bug. + * debian/patches/m68k-save_pic.dpatch: + Correctly save the pic register, when not done by reload(). + (fixes _Unwind_RaiseException and thus exception handling). + * debian/patches/m68k-libffi.dpatch: Add support for closures. + * debian/patches/m68k-bitfield.dpatch: Avoid propagation of mem expression + past a zero_extract lvalue. + * debian/patches/m68k-dwarf.dpatch: Correct the dwarf frame information, + but preserve compatibility. + + [Christian Aichinger] + * Fix building a cross compiler targeted for ia64. Closes: #382627. + + -- Matthias Klose Tue, 15 Aug 2006 00:41:00 +0200 + +gcc-4.1 (4.1.1-10) unstable; urgency=low + + * Update to SVN 20060729. + - Fix PR c++/28225, segfault in type_dependent_expression_p. + Closes: #376148. + * Apply proposed patch for PR rtl-optimization/28075. + Closes: #373820. + * Apply proposed backport and proposed patch for PR rtl-optimization/28221. + Closes: #376084. + * libgcj7-jar: Loosen dependency on gcj-4.1-base. + * Add ssp header files to the private gcc includedir. + * Do not build the Ada packages from the gcc-4.1 source, introducing + a new gnat-4.1 source package. + * Build libgnat on alpha and s390 as well. + * Do not build the gnat-4.1-doc package (GFDL with invariant sections or + cover texts). + * Remove references to the stl-manual package. Closes: #378698. + + -- Matthias Klose Sat, 29 Jul 2006 22:08:59 +0200 + +gcc-4.1 (4.1.1-9) unstable; urgency=low + + * Update to SVN 20060715. + - Fix PR c++/28016, do not emit uninstantiated static data members. + Closes: #373895, #376871. + * Revert the patch to fix PR c++/27227. Closes: #378321. + * multiarch-include.dpatch: Renamed from biarch-include.dpatch; + apply for all architectures. + * Do not build the java compiler in gcc-4.1 package, just include the + options and specs in the gcc driver. + * Remove gnat-4.0 as an alternative build dependency. + * Add a patch to enable -fstack-protector by default for C, C++, ObjC, ObjC++. + The patch is disabled by default. + + -- Matthias Klose Sat, 15 Jul 2006 17:07:29 +0200 + +gcc-4.1 (4.1.1-8) unstable; urgency=medium + + * Update to SVN 20060708. + - Fix typo in gcov documentation. Closes: #375140. + - Fix typo in gccint documentation. Closes: #376412. + - [alpha], Fix -fvisibility-inlines-hidden segfaults on reference to + static method. PR target/27082. Closes: #369642. + + * Fix ppc64 architecture string in debian/multiarch.inc. Closes: #374535. + * Fix conflict, replace and provide libssp0-dev for cross compilers. + Closes: #377012. + * Ignore compiler warnings when checking whether compiler driver understands + Ada fails. Closes: #376660. + * Backport fix for PR libmudflap/26864 from the trunk. Closes: #26864. + * README.C++: Remove non-existing URL. Closes: #347601. + * gij-4.1: Provide java2-runtime. Closes: #360906. + + * Closed reports reported against gcc-3.0 and fixed in gcc-4.1: + - C++ + + PR libstdc++/13943, call of overloaded `llabs(int)' is ambiguous. + Closes: #228645. + - Java + + Fixed segmentation fault on compiling bad program. Closes: #165635 + * Closed reports reported against gcc-3.3 and fixed in gcc-4.1: + - Stack protector available. Closes: #213994, #233208. + - Better documentation of -finline-limit option. Closes: #296047. + * Closed reports reported against gcc-3.4 and fixed in gcc-4.1: + - General + + Fixed [unit-at-a-time] Using -O2 cannot detect missing return + statement in a function. Closes: #276843. + - C++ + + PR13943, call of overloaded `llabs(int)' is ambiguous. Closes: #228645. + + PR c++/21280, #pragma interface, templates, and "inline function used + but never defined". Closes: #364412. + - Architecture specific: + - m68k + + Segfault building glibc. Closes: #353618. + + ICE when trying to build boost. Closes: #321486. + * Closed reports reported against gcc-4.0 and fixed in gcc-4.1: + - General + + Handling of #pragma GCC visibility for builtin functions. + Closes: #330279. + + gettext interpretation the two conditional strings as one. + Closes: #227193. + + ICE due to if-conversion. Closes: #335078. + + Fix unaligned accesses with __attribute__(packed) and memcpy. + Closes: #355297. + + Fix ICE in expand_expr_real_1, at expr.c. Closes: #369817. + - Ada + + Link error not finding -laddr2line. Closes: #322849. + + ICE on invalid code. Closes: #333564. + - C++ + + libstdc++: bad thousand separator with fr_FR.UTF-8. Closes: #351786. + + The Compiler uses less memory than 4.0. Closes: #336225. + + Fix "fails to compare reverse map iterators". Closes: #362840. + + Fix "fail to generate code for base destructor defined inline with + pragma interface". Closes: #356435. + + Fix ICE in cp_expr_size, at cp/cp-objcp-common.c. Closes: #317455. + + Fix wrong warning: control may reach end of non-void function. + Closes: #319309. + + Fix bogus warning "statement has no effect" with template and + statement-expression. Closes: #336915. + + Fixed segfault on syntax error. Closes: #349087. + + Fix ICE with __builtin_constant_p in template argument. + Closes: #353366. + + Implement DR280 (fixing "no operator!= for const_reverse_iterator"). + Closes: #244894. + - Fortran + + Fix wrong behaviour in unformatted writing. Closes: #369547. + - Java + + Fixed segfault on -fdump-tree-all-all. Closes: #344265. + + Fixed ant code completion in eclipse generating a nullpointer + exception. Closes: #337510. + + Fixed abort in gnu_java_awt_peer_gtk_GtkImage.c. Closes: #343112. + + Fixed assertion failure in gij with rhdb-explain. Closes: #335650. + + Fixed assertion failure when calling JTabbedPane.addTab(null, ...). + Closes: #314704. + + Fixed error when displaying empty window with bound larger than the + displayed content. Closes: #324502. + + Fixed: Exception in JComboBox.removeAllItems(). Closes: #314706. + + Fixed assertian error in gnu_java_awt_peer_gtk_GtkImage.c. + Closes: #333733. + - libmudflap + + PR libmudflap/23170, libmudflap should not use functions marked + obsolescent by POSIX/SUS. Closes: #320398. + - Architecture specific: + - m68k + + FTBFS building tin. Closes: #323016. + + ICE with -g -fomit-frame-pointer. Closes: #331150. + + ICE in instantiate_virtual_regs_lossage. Closes: #333536. + + Wrong code generation with loop unrolling. Closes: #342121. + + ICEs while building gst-ffmpeg. Closes: #343692. + - mips + + Fix gjdoc build failure. Closes: #344986. + + Fix link failure for static libs and object files when xgot + needs to be used. Closes: #274942. + * gnat bug reports fixed since gnat-3.15p: + - GNAT miscounts UTF8 characters in string with -gnaty. Closes: #66175. + - Bug box from "with Text_IO" when compiling optimized. Closes: #243795. + - Nonconforming parameter lists not detected. Closes: #243796. + - Illegal use clause not detected. Closes: #243797. + - Compiler enters infinite loop on illegal program with tagged records. + Closes: #243799. + - Compiler crashes on illegal program (missing discriminant, unconstrained + parent). Closes: #243800. + - Bug box at sinfo.adb:1215 on illegal program. Closes: #243801. + - Bug box at sinfo.adb:1651 on illegal program. Closes: #243802. + - Illegal program not detected (entry families). Closes: #243803. + - Illegal program not detected, RM 10.1.1(14). Closes: #243807. + - Bug box at exp_ch9.adb:7254 on illegal code. Closes: #243812. + - Illegal program not detected, RM 4.1.4(14). Closes: #243816. + - Bug box in Gigi, code=116, on legal program. Closes: #244225. + - Illegal program not detected, 12.7(10) (generic parameter is visible, + shouldn't be). Closes: #244483. + - Illegal program not detected, ambiguous aggregate. Closes: #244496. + - Bug box at sem_ch3.adb:8003. Closes: #244940. + - Bug box in Gigi, code=103, on illegal program. Closes: #244945. + - Legal program rejected, overloaded procedures. Closes: #246188. + - Bug box in Gigi, code=999, on legal program. Closes: #246388. + - Illegal program not detected, RM 10.1.6(3). Closes: #246389. + - Illegal program not detected, RM 3.10.2(24). Closes: #247014. + - Illegal program not detected, RM 3.9(17). Closes: #247015. + - Legal program rejected. Closes: #247016. + - Legal program rejected. Closes: #247021. + - Illegal program not detected, RM 4.7(3). Closes: #247022. + - Illegal program not detected, RM 3.10.2(27). Closes: #247562. + - Legal program rejected, "limited type has no stream attributes". + Closes: #247563. + - Wrong output from legal program. Closes: #247565. + - Compiler enters infinite loop on illegal program. Closes: #247567. + - Illegal program not detected, RM 8.6(31). Closes: #247568. + - Legal program rejected, visible declaration not seen. Closes: #247572. + - Illegal program not detected, RM 8.2(9). Closes: #247573. + - Wrong output from legal program, dereferencing access all T'Class. + Closes: #248171. + - Compiler crashes on illegal program, RM 5.2(6). Closes: #248174. + - Cannot find generic package body, RM 1.1.3(4). Closes: #248677. + - Illegal program not detected, RM 3.4.1(5). Closes: #248679. + - Compiler ignores legal override of abstract subprogram. Closes: #248686. + - Bug box, Assert_Failure at sinfo.adb:2365 on illegal program. + Closes: #251266. + - Ada.Numerics.Generic_Elementary_Functions.Log erroneout with -gnatN. + Closes: #263498. + - Bug box, Assert_Failure at atree.adb:2906 or Gigi abort, code=102 + with -gnat -gnatc. Closes: #267788. + - Bug box in Gigi, code=116, 'Unrestricted_Access of a protected + subprogram. Closes: #269775. + - Stack overflow on illegal program, AI-306. Closes: #276225. + - Illegal program not detected, RM B.1(24). Closes: #276226. + - Wrong code generated with -O -fPIC. Closes: #306833. + - Obsolete: bashism's in debian/rules file. Closes: #370681. + - Supports more debian architectures. Closes: #171477. + + -- Matthias Klose Sat, 8 Jul 2006 16:24:47 +0200 + +gcc-4.1 (4.1.1-7) unstable; urgency=low + + * Prefer gnat-4.1 over gnat-4.0 as a build dependency. + * libssp0: Set priority to standard. + + -- Matthias Klose Sun, 2 Jul 2006 10:22:50 +0000 + +gcc-4.1 (4.1.1-6) unstable; urgency=low + + [Ludovic Brenta] + * Do not provide the symbolic link /usr/bin/gnatgcc; this will now + be provided by package gnat from the source package gcc-defaults. + * debian/control.m4, debian/control (gnat): conflict with gnat (<< 4.1), + not all versions of gnat, since gcc-defaults will now provide gnat (= 4.1) + which depends on gnat-4.1. + + [Matthias Klose] + * libjava: Change the default for enable_hash_synchronization_default + on PA-RISC. Tighten the libgcj7 shlibs version on hppa. + * Update to SVN 20060630. + * Apply proposed patch for PR 26991. + * Don't use the version for the libstdc++ shlibs dependency for the libgcj + shlibs dependency. + * Merge from Ubuntu edgy: + - Fix %g7 usage in TLS, add patch sparc-g7.dpatch, fixes glibc-2.4 build + failure on sparc (Fabio M. Di Nitto). + - Merge libssp0-dev into gcc-4.1 (-fstack-protector is a common option). + - Run the testsuite with -fstack-protector as well. + + [Bastian Blank] + * Make it possible to overwrite arch per DEB_TARGET_ARCH and DEB_TARGET_GNU_TYPE. + * Disable biarch only on request for cross builds. + * Use correct source directory for tarballs. + * Produce correct multiarch.inc for source builds. + + -- Matthias Klose Sat, 1 Jul 2006 01:49:55 +0200 + +gcc-4.1 (4.1.1-5) unstable; urgency=low + + * Fix build error running with dpkg-buildpackage -rsudo. + + -- Matthias Klose Wed, 14 Jun 2006 01:54:13 +0200 + +gcc-4.1 (4.1.1-4) unstable; urgency=low + + * Really do not backout the fix for PR c++/26068. + Closes: #372152, #372559. + * Update fastjar version string to 4.1. + * Disable pascal again. + + -- Matthias Klose Mon, 12 Jun 2006 20:29:57 +0200 + +gcc-4.1 (4.1.1-3) unstable; urgency=low + + * Update to SVN 20060608, do not revert the fix for PR c++/26068. + Closes: #372152, #372559. + * Fix build failures for Pascal, enable Pascal on all architectures. + * Fix another build failure on GNU/kFreeBSD (Aurelien Jarno). + Closes: #370661. + * Fix build fauilure in gcc/p with parallel make. + * Remove cross-configure patch (Kazuhiro Inaoka). Closes: #370649. + * Only build the gcc-4.1-source package, when building from the gcc-4.1 + source. + * Fix upgrade problem from standalone gcj-4.1. + * Fix build error using bison-2.2, build-depend on bison (>= 2.3). + Closes: #372605. + * Backport PR libstdc++/25524 from the trunk, update the biarch-include + patch. mips triarch support can be added more easily. + + -- Matthias Klose Mon, 12 Jun 2006 00:23:45 +0200 + +gcc-4.1 (4.1.1-2) unstable; urgency=low + + * Update to SVN 20060604. + - Fix PR c++/26757, C++ front-end producing two DECLs with the same UID. + Closes: #356569. + - Fix PR target/27158, ICE in extract_insn with -maltivec. + Closes: #362307. + * Revert PR c++/26068 to work around PR c++/27884 (Martin Michlmayr). + Closes: #370308. + * Mention Ada in copyright, update copyright file (Ludovic Brenta). + Closes: #366744. + * Fix kbsd-gnu-java.dpatch (Petr Salinger). Closes: #370320. + * Don't include version control files in gcc-4.1-source. + + -- Matthias Klose Sun, 4 Jun 2006 19:13:37 +0000 + +gcc-4.1 (4.1.1-1) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20060601. + * Reenable the gpc build. + * PR libgcj/26483, libffi patch for IA-64 denorms, taken from trunk. + * Disable Ada for m32r targets. Closes: #367595. + * lib32gfortran1: Do not create empty directory /usr/lib32. Closes: #367999. + * gcc-4.1: Add a conflict to the gcj-4.1 version with a different + gcc_libdir. + * Build gij/gcj for GNU/k*BSD. Closes: #367166. + * Update hurd-changes patch (Michael Banck). Closes: #369690. + * debian/copyright: Add exception for the gpc runtime library. + * Update gpc/gpc-doc package descriptions. + + [Ludovic Brenta] + * patches/ada-libgnatprj.dpatch: add prj-pars.ad[bs] and sfn_scan.ad[bs] + to libgnatprj; remove them from gnatmake. + + -- Matthias Klose Thu, 1 Jun 2006 20:35:54 +0200 + +gcc-4.1 (4.1.0-4) unstable; urgency=low + + [Ludovic Brenta] + * Fix a stupid bug whereby fname.ad{b,s} would be included in both + libgnatvsn-dev and libgnatprj-dev, preventing use of gnatprj.gpr. + Closes: #366733. + + -- Matthias Klose Thu, 11 May 2006 04:34:50 +0200 + +gcc-4.1 (4.1.0-3) unstable; urgency=low + + * Update to SVN 20060507. + * debian/rules.d/binary-java.mk: Use $(lib32) everywhere. Closes: #365388. + * Always configure hppa64-linux-gnu with + --includedir=/usr/hppa64-linux-gnu/include. + * Make libgnatvsn4.1 and libgnatprj4.1 priority optional. Closes: #365900. + * Call autoconf2.13 explicitely in the Ada patches, build-depend on + autoconf2.13. Closes: #365780. + * Fix libgnatprj-dev and libgnatvsn-dev dependencies on their shared + libraries. + * Deduce softfloat and vfp (ARM) configure options (Pjotr Kourzanov). + * Update proposed patch for PR26885 (May 2 version). + * Build the libxxstdc++-dbg packages, when not building the library pacakges. + * Do not include the _pic library in the libxxstdc++-dbg packages. + + -- Matthias Klose Sun, 7 May 2006 15:29:53 +0200 + +gcc-4.1 (4.1.0-2) unstable; urgency=medium + + * Update to SVN 20060428. + * Apply proposed patches for PR26885. + + * Keep libffi doc files in its own directory. Closes: #360466. + * Update ppc64 patches for 4.1 (Andreas Jochens). Closes: #360498. + * Fix PR tree-optimization/26763, wrong-code, taken from the 4.1 branch. + Closes: #356896. CVE-2006-1902. + * hppa-cbranch, hppa-cbranch2 patches: Fix for PR target/26743, + PR target/11254, PR target/10274, backport from trunk (Randolph Chung). + * Let libgccN provide -dcv1 when cross-compiling (Pjotr Kourzanov). + Closes: #363289. + * (Build-)depend on glibc-2.3.6-7. Closes: #360895, #361904. + * Fix a pedantic report about a package description. Add a hint that + we do not like bug reports with locales other than "C". Closes: #361409. + * Enable the libjava interpreter on mips/mipsel. + * gcc-4.1-source: Depend on gcc-4.1-base. + * gnat-4.1: Fix permissions of .ali files. + * Build lib32gcj7 on amd64. + * debian/patches/ada-gnatvsn.dpatch: New. Apply proposed fix for + PR27194. + + [Ludovic Brenta] + * debian/patches/ada-default-project-path.dpatch: new. Change the + default search path for project files to the one specified + by the Debian Policy for Ada: /usr/share/ada/adainclude. + * debian/patches/ada-symbolic-tracebacks.dpatch: new. Enable support for + symbolic tracebacks in exceptions. + * debian/patches/ada-missing-lib.dpatch: remove, superseded by the above. + * debian/patches/ada-link-lib.dpatch: changed. + - Instead of building libada as a target library only, build it as + both a host and, if different, target library. + - Build the GNAT tools in their top-level directory; do not use + recursive makefiles. + - Link the GNAT tools dynamically against libgnat. + - Apply proposed fix for PR27300. + - Rerun autoconf (Matthias Klose). + * debian/patches/ada-libgnatvsn.dpatch: new. + - Introduce a new shared library named libgnatvsn, containing + common components of GNAT under the GNAT-Modified GPL, for + use in GNAT tools, ASIS, GLADE and GPS. + - Link the gnat tools against this new library. + - Rerun autoconf (Matthias Klose). + * debian/patches/ada-libgnatprj.dpatch: new. + - Introduce a new shared library named libgnatprj, containing the + GNAT Project Manager, i.e. the parts of GNAT that parses project + files (*.gpr). Licensed under pure GPL; for use in GLADE and GPS. + - Link the gnat tools against this new library. + - Rerun autoconf (Matthias Klose). + * debian/patches/ada-acats.dpatch: new. + - When running the ACATS, look for the gnat tools in their new + directory (build/gnattools), and for the shared libraries in + build/gcc/ada/rts, build/libgnatvsn and build/libgnatprj. + * debian/gnatvsn.gpr, debian/gnatprj.gpr: new. + * debian/rules.d/binary-ada.mk, debian/control.m4: new binary packages: + libgnatvsn-dev, libgnatvsn4.1, libgnatprj-dev, libgnatprj4.1. Place + the *.gpr files in their respective -dev packages. + + -- Matthias Klose Sat, 29 Apr 2006 00:32:09 +0200 + +gcc-4.1 (4.1.0-1) unstable; urgency=low + + * libstdc++CXX-BV-dev.preinst: Remove (handling of c++ include dir for 4.0). + * libgcj-common: Move removal of docdir from preinst into postinst. + * libgcj7: Move removal of docdir from preinst into postinst. + * Drop alternative build dependency on gnat-3.4, not built anymore. + * Fix PR libgcj/26103, wrong exception thrown (4.1 branch). + * debian/patches/libjava-stacktrace.dpatch: Add support to print file names + and line numbers in stacktraces. + * Add debugging symbols for libgcjawt and lib-gnu-java-awt-peer-gtk + in the libgcj7-dbg and lib32gcj7-dbg packages. + * Remove dependency of the libgcj-dbg packages on the libgcj-dev packages, + add recommendations on binutils and libgcj-dev. Mention the requirement + of binutils for the stacktraces. + * Fix upgrade from version 4.0.2-9, loosing the Debian changelog. + Closes: #355439. + * gij/gcj: Install one alternative for each command, do not use slave + links for rmiregistry, javah, rmic. Ubuntu #26781. Closes: #342557. + * Fix for PR tree-optimization/26587, taken from the 4.1 branch. + * Fix PR libstdc++/26526 (link failure when _GLIBCXX_DEBUG is defined). + * Configure with --enable-clocale=gnu, even if not building C++ packages. + * Remove runtime path from biarch libraries as well. + * PR middle-end/26557 (ice-on-vaild-code, regression), taken from + the gcc-4_1-branch. Closes: #349083. + * PR tree-optimization/26672 (ice-on-vaild-code, regression), taken from + the gcc-4_1-branch. Closes: #356231. + * PR middle-end/26004 (rejects-vaild-code, regression), taken from + the gcc-4_1-branch. + * When building as standalone gcj, build libgcc4 (hppa only) and fastjar. + * Configure --with-cpu=v8 on sparc. + * debian/patches/libjava-hppa.dpatch: pa/pa32-linux.h + (CRT_CALL_STATIC_FUNCTION): Define when CRTSTUFFS_O is defined. + (John David Anglin). Closes: #353346. + * Point to the 4.1 version of README.Bugs (closes: #356230). + * Disable the libmudflap testsuite on alpha (getting killed). + + -- Matthias Klose Sat, 18 Mar 2006 23:00:39 +0100 + +gcc-4.1 (4.1.0-0) experimental; urgency=low + + * GCC 4.1.0 final release. + * Build the packages for the Java language from a separate source. + * Update NEWS.html, NEWS.gcc. + * libgcj-doc: Auto generated API documentation for libgcj7, classpath + example programs. + * Add gjdoc to Build-Depends-Indep. + * On amd64, build-depend on libc6-dev-i386 instead of ia32-libs-dev. + * Internal ssp headers now installed in the gcc libdir. + * Do not build gcj-4.1-base when building the gcc-4.1 packages. + * When building as gcj-4.1, use the tarball from the gcc-4.1-source + package. + + [Ludovic Brenta] + * Allow to enable and disable NLS and bootstrapping from the environment. + - Adding "nls" to WITHOUT_LANG disables NLS support. + - If WITH_BOOTSTRAP is set, debian/rules2 calls configure + --enable-bootstrap=$(WITH_BOOTSTRAP) and just "make". If + WITH_BOOTSTRAP is unset, it calls configure without a bootstrapping + option and calls "make profiledbootstrap" or "make bootstrap-lean" + depending on the target CPU. + Currently overwritten to default to "bootstrap". + + -- Matthias Klose Thu, 2 Mar 2006 00:03:45 +0100 + +gcc-4.1 (4.1ds9-0exp9) experimental; urgency=low + + * Update to GCC 4.1.0 release candidate 1 (gcc-4.1.0-20060219 tarball). + * Update gcc-version patch for gcc-4.1. + * libgccN, libstdc++N*: Fix upgrade of /usr/share/doc symlinks. + * libjava awt & swing update, taken from trunk 2006-02-16. + * libgcj7-dev: Suggest libgcj-doc, built from a separate source package. + * Shorten build-dependency line (work around buildd problems + on arm* and mips*). + * New patch gcc-ice-hack (saving the preprocessed source on an ICE), + taken from Fedora. + + -- Matthias Klose Mon, 20 Feb 2006 10:07:23 +0100 + +gcc-4.1 (4.1ds8-0exp8) experimental; urgency=low + + * Update to SVN 20060212, taken from the 4.1 release branch. + * libgccN: Fix upgrade of /usr/share/doc/libgccN symlink. + + -- Matthias Klose Sun, 12 Feb 2006 19:48:31 +0000 + +gcc-4.1 (4.1ds7-0exp7) experimental; urgency=low + + * Update to SVN 20060127, taken from the 4.1 release branch. + - On hppa, bump the libgcc soversion to 4. + * Add an option not to depend on the system -base package for cross compiler + (Ian Wienand). Closes: #347484. + * Remove workaround increasing the stack size limit for some architectures, + not needed anymore on ia64. + * On amd64, build-depend on libc6-dev-i386, depend on libc6-i386, where + available. + * libstdc++6: Properly upgrade the doc directory. Closes: #346171. + * libstdc++6: Add a conflict to scim (<< 1.4.2-1). Closes: #343313. + * Set default 32bit ix86 architecture to i486. + + -- Matthias Klose Fri, 27 Jan 2006 22:23:22 +0100 + +gcc-4.1 (4.1ds6-0ubuntu6) experimental; urgency=low + + * Update to SVN 20060107, taken from the 4.1 release branch. + - Remove fix for PR ada/22533, fixed by patch for PR c++/23171. + * Remove binary packages from the control file, which aren't built + yet on any architecture. + * gcc-hppa64: Use /usr/hppa64-linux-gnu/include as location for the glibc + headers, tighten glibc (build-)dependency. + * libffi [arm]: Add support for closures, libjava [arm]: enable the gij + interpreter (Phil Blundell). Addresses: #337263. + * For the gcj standalone build, include cc1 into the gcj-4.1 package, + needed for linking java programs compiled to native code. + + -- Matthias Klose Sat, 7 Jan 2006 03:36:33 +0100 + +gcc-4.1 (4.1ds4-0exp4) experimental; urgency=low + + * Update to SVN 20051210, taken from the 4.1 release branch. + * Prepare to build the java packages from it's own source (merged + from Ubuntu). + - Build the java packages from the gcc-4.1 source, as long as packages + are prepared for experimental. + - When built as gcj, run only the libjava testsuite, don't build the + libstdc++ debug packages, don't package the gcc source. + - Loosen package dependencies, when java packages are built from + separate sources. + - Fix gcj hppa build, when java packages are built from separate sources. + - gij-4.1: Install test-summary, when doing separate builds. + - Allow java packages be installed independent from other packages built + from the source package. + - Rename libgcj7-common to libgcj7-jar. + - Introduce a gcj-4.1-base package to completely separate the two and not + duplicate the changelog in each gcj/gij package. + * Java related changes: + - libjava-xml-transform: Update from classpath trunk, needed for + eclipse (Michael Koch), applied upstream. + - Fix java wrapper scripts to point to 4.1 (closes: #341710). + - Reenable java on mips and mipsel. + - Fix libgcj6 dependency. Ubuntu #19935. + - Add libxt-dev as a java build dependency. autoconf explicitely checks + for X11/Intrinsic.h. + * Ada related changes: + - Apply proposed fix for PR ada/22533, reenable ada on alpha, powerpc, + mips, mipsel and s390. + - Add Ada support for GNU/kFreeBSD (Aurelien Jarno). Closes: #341356. + - Remove ada bootstrap workaround for alpha. + * Build a separate gcc-4.1-source package (Bastian Blank). Closes: #333922. + * Remove obsolete patch: libstdc++-automake. + * Remove patch integrated upstream: libffi-mips. + * Fix the installation of the hppa64 compiler in snapshot builds. + * Rename libgfortran0* to libgfortran1* (upstream soversion change). + * Add a dependency on libc-dev for all compilers / -dev packages except + gcc (which can be used for kernel builds without libc-dev). + * libffi4-dev: Fix package description. + * On amd64, install 32bit libraries into /emul/ia32-linux/usr/lib. + Addresses: #341147. + * Fix installation of biarch libstdc++ headers on amd64. + * Configure --with-tune=i686 on ix86 architectures (on Ubuntu with + -mtune=pentium4). Remove the cpu-default-* patches. + * debian/control.m4: Fix libxxgcc package names. + * Update the build infrastructure to build cross compilers + (Nikita V. Youshchenko). + * Tighten binutils (build-)dependency. Closes: #342484. + * Symlink more doc directories. + * debian/control.m4: Explicitely set Architecture for biarch packages. + + -- Matthias Klose Sat, 10 Dec 2005 16:56:45 +0100 + +gcc-4.1 (4.1ds1-0ubuntu1) UNRELEASED; urgency=low + + * Build Java packages only. + * Update to SVN 20051121, taken from the 4.1 release branch. + - Remove libjava-saxdriver-fix patch, applied upstream. + - Remove ada-gnat-version patch, applied upstream. + * Fix FTBFS in biarch builds on 32bit kernels. + * Update libstdc++-doc doc-base file (closes: #339046). + * Remove obsolete patch: gcc-alpha-ada_fix. + * Fix installation of biarch libstdc++ headers (Ubuntu #19655). + * Fix sparc and s390 biarch patches to build the 64bit libffi. + * Work around biarch build failure in libjava/classpath/native/jni/midi-alsa. + * Install spe.h header on powerpc. + * Add libasound build dependencies. + * libgcj: Fix installation of libgjsmalsa library. + * Remove patches not used anymore: libjava-no-rpath, i386-config-ml-nomf, + libobjc, multiarch-include, disable-biarch-check-mf, gpc-profiled, + gpc-no-gpidump, libgpc-shared, acats-expect. + * Fix references to manuals in gnat(1). Ubuntu #19772. + * Remove build dependency on xlibs-dev, add libxtst-dev. + * Do not configure with --disable-werror. + * Merge *-config-ml patches into one config-ml patch, configure the biarch + libs in debian/rules.defs. + * debian/gcj-wrapper: Accept -Xss. + * Do not build biarch java on Debian (missing biarch libasound). + * Do not build the java packages from this source package, avoiding + dependencies on X. + + -- Matthias Klose Mon, 21 Nov 2005 20:29:43 +0100 + +gcc-4.1 (4.1ds0-0exp0) experimental; urgency=low + + * Configure libstdc++ using the default allocator. + * Update to 20051112, taken from the svn trunk. + + -- Matthias Klose Sat, 12 Nov 2005 23:47:01 +0100 + +gcc-4.1 (4.1ds0-0ubuntu0) breezy; urgency=low + + * UNRELEASED + * First snapshot of gcc-4.1 (CVS 20051019). + - adds SSP support (closes: #213994, #233208). + * Remove patches applied upstream/not needed anymore. + * Update patches for 4.1: link-libs, gcc-textdomain, libjava-dlsearch-path, + rename-info-files, reporting, classmap-path, i386-biarch, sparc-biarch, + libjava-biarch-awt, ada-gcc-name. + * Disable patches: + - 323016, m68k, necessary for 4.1? + * debian/copyright: Update for 4.1. + * debian/control, debian/control.m4, debian/rules.defs, debian/rules.conf: + Update for 4.1, add support for Obj-C++ and SSP. + * Fix generation of Ada docs in info format. + * Set Ada library version to 4.1. + * Drop gnat-3.3 as an alternative build dependency. + * Use fortran instead of f95 for the build files. + * Update build support for awt peer libs. + * Add packaging support for SSP library. + * Add packaging support for Obj-C++. + * Run the testsuite for -march=i686 on i386 and amd64 as well. + * Fix generation of Pascal docs in html format. + * Update config-ml patches to build libssp biarch. + * Disable libssp for hppa64 build. + * libgcj7-dev: Install jni_md.h. + * Disable gnat for powerpc, currently fails to build. + * Add biarch runtime lib packages for ssp, mudflap, ffi. + * Do not explicitely configure with --enable-java-gc=boehm, which is the + default. + * libjava-saxdriver-fix: Fix a problem in the Aelfred2 SAX parser. + * libstdc++6-4.0-dev: Depend on the libc-dev package. Ubuntu #18885. + * Build-depend on expect-tcl8.3 on all architectures. + * Build-depend on lib32z1-dev on amd64 and ppc64, drop build dependency on + amd64-libs. + * Disable ada on alpha mips mipsel powerpc s390, currently broken. + + -- Matthias Klose Wed, 19 Oct 2005 11:02:31 +0200 + +gcc-4.0 (4.0.2-3) unstable; urgency=low + + * Update to CVS 20051015, taken from the gcc-4_0-branch. + - gcc man page fixes (closes: #327254, #330099). + - PR java/19870, PR java/20338, PR java/21844, PR java/21540: + Remove Debian patches. + - Applied libjava-echo-fix patch. + - Fix PR target/24284, ICE (Segmentation fault) on sparc-linux. + Closes: #329840. + - Fix PR c++/23797, ICE on typename outside template. Closes: #325545. + - Fix PR c++/22551, ICE in tree_low_cst. Closes: #318932. + * libstdc++6: Tighten libstdc++ shlibs version to 4.0.2-3 (new symbol). + * Update generated Ada files. + * Fix logic to disable mudflap and Obj-C++ via the environment. + * Remove f77 build bits. + * gij-4.0: Remove /var/lib/gcj-4.0/classmap.db on purge (closes: #330800). + * Let gcj-4.0 depend on libgcj6-dev, instead of recommending it. This is + not necessary for byte-code compilations, but for compilations to native + code. For compilations to byte-code, use a better compiler like ecj + for now (found in the ecj-bootstrap package). + * Disable biarch setup in cross compilers (Josh Triplett). Closes: #333952. + * Fix with_libnof logic for cross-compilations (Josh Triplett). + Closes: #333951. + * Depend on binutils (>= 2.16.1cvs20050902-1) on the alpha architecture. + Closes: #333954. + * On i386, build-depend on libc6-dev-amd64. Closes: #329108. + * (Build-)depend on glibc 2.3.5-5. + + -- Matthias Klose Sun, 2 Oct 2005 14:25:54 +0200 + +gcc-4.0 (4.0.2-2) unstable; urgency=low + + * Update to CVS 20051001, taken from the gcc-4_0-branch. Includes the + changes between 4.0.2 RC3 and the final 4.0.2 release, missing from + the upstream tarball. Remove patches applied upstream (gcc-c-decl, + pr23182, pr23043, pr23367, pr23891, pr21418, pr24018). + * On ix86 architectures run the testsuite for -march=i686 as well. + * Build libffi on the Hurd (closes: #328705). + * Add big-endian arm (armeb) support (Lennert Buytenhek). Closes: #330730. + * Update libjava xml to classpath CVS HEAD 20050930 (Michael Koch). + * Reapply patch to make -mieee the default on alpha-linux. Closes: #330826. + * Add workaround not to make libmudflap _start/_end not small data on + mips/mipsel, taken from CVS HEAD. + * Don't build the nof libraries on powerpc. + * Number crunching time on m68k, reenable gfortran on m68k-linux-gnu. + + -- Matthias Klose Sat, 1 Oct 2005 15:42:10 +0200 + +gcc-4.0 (4.0.2-1) unstable; urgency=low + + * GCC 4.0.2 release. + * lib64stdc++6: Set priority to optional. + * Fix bug in StreamSerializer, seen with eclipse-3.1 (Ubuntu 12744). + Backport from CVS HEAD, Michael Koch. + * Apply java patches, proposed for the 4.0 branch: PR java/24018, + PR libgcj/23182, PR java/19870, PR java/21844, PR libgcj/23367, + PR java/20338. + * Update the expect/pty test to actually call expect directly, rather + than test for the existence of PTYs, since a working expect is what + we really care about, not random device files (Adam Conrad). + Closes: #329715. + * Add build dependencies on lib64z1-dev. + * gcc-c-decl.dpatch: Fix C global decl handling regression in 4.0.2 from + 4.0.1 + + -- Matthias Klose Thu, 29 Sep 2005 19:50:08 +0200 + +gcc-4.0 (4.0.1-9) unstable; urgency=low + + * Update to CVS 20050922, taken from the gcc-4_0-branch (4.0.2 RC3). + * Apply patches: + - Fix PR java/21418: Order of source files matters when compiling, + backported from mainline. + - Fix for PR 23043, backported form mainline. + - Proposed patch for #323016 (m68k only). Patch by Roman Zippel. + * libstdc++6: Tighten libstdc++ shlibs version to 4.0.1-9 (new symbol). + * Fail the build early, if the system doesn't have any pty devices + created in /dev. Needed for running the testsuite. + * Update hurd changes again (closes: #328973). + + -- Matthias Klose Thu, 22 Sep 2005 07:28:18 +0200 + +gcc-4.0 (4.0.1-8) unstable; urgency=medium + + * Update to CVS 20050917, taken from the gcc-4_0-branch. + - Fix FTBFS for boost, introduced in 4.0.1-7 (closes: #328684). + * Fix PR java/23891, eclipse bootstrap. + * Set priority of gcc-4.0-hppa64 package to standard. + * Bump standards version to 3.6.2. + * Fix java wrapper script, mishandles command line options with arguments. + Patch from Olly Betts. Closes: #296456. + * Bump epoch of the lib32gcc1 package to the same epoch as for the the + libgcc1 and lib64gcc1 packages. + * Fix some lintian warnings. + * Build libffi on the Hurd (closes: #328705). + * For biarch builds, disable the testsuite for the non-default architecture + for runtime libraries, which are not built by default (libjava). + * Add gsfonts-x11 to Build-Depends-Indep to avoid warnings from doxygen. + * Install Ada .ali files read-only. + + -- Matthias Klose Sat, 17 Sep 2005 10:35:23 +0200 + +gcc-4.0 (4.0.1-7) unstable; urgency=low + + * Update to CVS 20050913, taken from the gcc-4_0-branch. + - Fix PR c++/19004, ICE in uses_template_parms (closes: #284777). + - Fix PR rtl-optimization/23454, ICE in invert_exp_1 on sparc. + Closes: #321215. + - Fix PR libstdc++/23417, make bits/stl_{list,tree}.h -Weffc++ clean. + Closes: ##322170. + * Install 'altivec.h' on ppc64 (closes: #323945). + * Install locale data with the versioned package name (closes: #321591). + * Fix fastjar build without building libjava. + * On hppa, don't build using gcc-3.3 when ada is disabled. + * On m68k, don't build the stage1 compiler using -O. + + * Ludovic Brenta + - Allow the choice whether or not to build with NLS. + - Fix a typo whereby libffi was always enabled on i386. + + -- Matthias Klose Tue, 13 Sep 2005 23:23:11 +0200 + +gcc-4.0 (4.0.1-6) unstable; urgency=low + + * Update to CVS 20050821, taken from the gcc-4_0-branch. + - debian/patches/pr21562.dpatch: Removed, applied upstream. + - debian/patches/libjava-awt-name.dpatch: Updated. + - debian/patches/classpath-20050618.dpatch: Updated. + * Use all available CPU's for the check target, unless USE_NJOBS == no. + * debian/patches/biarch-include.dpatch: Include + /usr/local/include/-linux-gnu before including /usr/local/include. + * Fix biarch system include directories for the non-default architecture. + * Prefer gnat-4.0 over gnat-3.4 over gnat-3.3 as a build-dependency. + + -- Matthias Klose Thu, 18 Aug 2005 18:36:23 +0200 + +gcc-4.0 (4.0.1-5) unstable; urgency=low + + * Update to CVS 20050816, taken from the gcc-4_0-branch. + - Fix PR middle-end/23369, wrong code generation for funcptr comparison + on hppa. Closes: #321785. + - Fix PR fortran/23368 ICE with NAG routines (closes: #322912). + * Build-depend on libcairo2-dev (they say, that's the final package name ...) + * libgcj: Search /usr/lib/gcj-4.0 for dlopened libraries, place a copy + of the .la files in the libgcj6 package into this directory. + Closes: #322576. + * Tighten the dependencies between the compiler packages to the same + version and release. Use some substitution variables for control file + generation. + * Remove build dependencies for gpc. + * Don't use '/emul/ia32-linux' on ppc64 (closes: #322890). + * Synchronize with Ubuntu. + + -- Matthias Klose Tue, 16 Aug 2005 22:45:47 +0200 + +gcc-4.0 (4.0.1-4ubuntu1) breezy; urgency=low + + * Jeff Bailey + + Enable i386 biarch using biarch glibc (not yet enabled for unstable). + - debian/rules.d/binary-libgcc.mk: Make i386 lib64gcc1 depend on + libc6-amd64 + - debian/control.m4: Suggest libc6-amd64 rather than amd64-libs. + - debian/rules.conf: Build-Dep on libc6-dev-amd64 [i386] + Build-Dep on binutils >= 2.16.1-2ubuntu3 + - debian/rules2: Enable biarch build in Ubuntu. + + * Matthias Klose + + - Add shlibs file and dependency information for the lib32gcc1 package. + - debian/patches/gcc-textdomain.dpatch: Update (closes: #321591). + - Set priority of gcc-4.0-base and libstdc++6 packages to `required'. + Closes: #321016. + - libffi-hppa.dpatch: Remove, applied upstream. + + -- Matthias Klose Mon, 8 Aug 2005 19:39:02 +0200 + +gcc-4.0 (4.0.1-4) unstable; urgency=low + + * Enable the biarch compiler for powerpc (closes: #268023). + * Update to CVS 20050806, taken from the gcc-4_0-branch. + * Build depend on libcairo0.6.0-dev (closes: #321540). + * Fix Ada build on the hurd (closes: #321350). + * Update libffi for mips (Thiemo Seufer). Closes: #321100. + * Fix segfault on 64bit archs in the AWT Gtk peer library (Dan Frazier). + Closes: #320915. + * Add libXXgcc1 build dependencies for biarch builds. + + -- Matthias Klose Sun, 7 Aug 2005 07:01:59 +0000 + +gcc-4.0 (4.0.1-3) unstable; urgency=medium + + * Update to CVS 20050725, taken from the gcc-4_0-branch. + - Fix ICE with -O and -mno-ieee-fp/-ffast-math (closes: #319087). + * Synchronize with Ubuntu. + * Fix applying hurd specific patches for the hurd build (closes: #318443). + * Do not build-depend on libmpfr-dev on architectures, where fortran + is not built. + * Apply biarch include patch on ppc64 as well (closes: #318603). + * Correct libstdc++-dev package description (closes: #319082). + * debian/rules.defs: Replace DEB_TARGET_GNU_CPU with DEB_TARGET_ARCH_CPU. + * gcc-4.0-hppa64: Rename hppa64-linux-gcc to hppa64-linux-gnu-gcc. + Closes: #319818. + + -- Matthias Klose Mon, 25 Jul 2005 10:43:06 +0200 + +gcc-4.0 (4.0.1-2ubuntu3) breezy; urgency=low + + * Update to CVS 20050720, taken from the gcc-4_0-branch. + - Fix PR22278, volatile issues, seen when building xorg. + * Build against new libcairo1-dev (0.5.2). + + -- Matthias Klose Wed, 20 Jul 2005 12:29:50 +0200 + +gcc-4.0 (4.0.1-2ubuntu2) breezy; urgency=low + + * Acknowledge that i386 biarch builds still need to be fixed for glibc-2.3.5. + + -- Matthias Klose Tue, 19 Jul 2005 08:29:30 +0000 + +gcc-4.0 (4.0.1-2ubuntu1) breezy; urgency=low + + * Synchronize with Debian. + * Update to CVS 20050718, taken from the gcc-4_0-branch. + - Fix PR c++/22132 (closes: #318488), upcasting a const class pointer + to struct the class derives from generates wrong code. + * Build biarch runtime libraries for Fortran and ObjC. + * Apply proposed patch for PR22309 (crash with mt_allocator if libstdc++ + is dlclosed). Closes: #293466. + + -- Matthias Klose Mon, 18 Jul 2005 17:10:18 +0200 + +gcc-4.0 (4.0.1-2) unstable; urgency=low + + * Don't apply the patch to make -mieee the default on alpha-linux-gnu. + Causes the bootstrap to fail on alpha-linux-gnu. + + -- Matthias Klose Tue, 12 Jul 2005 00:14:12 +0200 + +gcc-4.0 (4.0.1-1) unstable; urgency=high + + * GCC 4.0.1 final release. See /usr/share/doc/gcc-4.0/NEWS.{gcc,html}. + * Build fastjar on mips/mipsel, fix fastjar build without building java. + * Disable the comparision check on unstable/ia64. adaint.o differs, + currently cannot be reproduced with glibc-2.3.5 and binutils-2.16.1. + * libffi/hppa: Fix handling of 3 and 5-7 byte struct returns. + * amd64: Fix libgcc symlinks to point to /usr/lib32, instead of /lib32. + * On powerpc, don't build with -j >1, apparently doesn't succeeds + on the Debian buildd. + * Apply revised patch to make -mieee the default on alpha-linux, + and add -mieee-disable switch to turn the default off (Tyson Whitehead). + * Disable multiarch-includes; redo biarch-includes to include the paths + for the non-default biarch, when called with -m32/-m64. + * Move new java headers from libstdc++-dev to libgcj-dev, add replaces + line. + * Update classpath patch to work with cairo-0.5.1. Patch provided by + Michael Koch. + * Further classpath updates for gnu.xml and javax.swing.text.html. + Patch provided by Michael Koch. + * Require binutils (>= 2.16.1) as a build dependency and a dependency. + * On i386, require amd64-libs-dev (>= 1.2). + * Update debian/NEWS.{html,gcc}. + + * Closing bug reports reported against older gcc versions (some of them + still present in Debian, but not anymore as the default compiler). + Usually, forwarded bug reports are linked to + http://gcc.gnu.org/PR + The upstream bug number usually can be found in the Debian reports. + + * Closed reports reported against gcc-3.3 and fixed in gcc-3.4: + - General: + + PR rtl-optimization/2960: Duplicate loop conditions even with -Os + Closes: #94701. + + PR optimization/3995: i386 optimisation: joining tests. + Closes: #105309. + + PR rtl-optimization/11635: Unnecessary store onto stack, more + curefully expand union cast (closes: #202016). + + PR target/7618: vararg disallowed in virtual function. Closes: #205404. + + Large array problem on 64 bit platforms (closes: #209152). + + Mark more strings as translatable (closes: #227129). + + PR gcc/14711: ICE when compiling a huge source file Closes: #234711. + + Better code generation for if(!p) return NULL;return p; + Closes: #242318. + + PR rtl-optimization/16152: Perl ftbfs on {ia64,arm,m68k}-linux. + Closes: #255801. + + ICE (segfault) while compiling Linux 2.6.9 (closes: #277206). + + Link error building memtest (closes: #281445). + - Ada: + + PR ada/12450: Constraint error for valid input (closes: #210844). + + PR ada/13620: miscompilation of array initializer with + -O3 -fprofile-arcs. Closes: #226244. + - C: + + PR c/6897: Code produced with -fPIC reserves EBX, but compiles + bad __asm__ anyway (closes: #73065). + + PR c/9209: On i386, gcc-3.0 allows $ in indentifiers but not the asm. + Closes: #121282. + + PR c/11943: Accepts invalid declaration "int x[2, 3];" in C99 mode. + Closes: #177303. + + PR c/11942: restrict keyword broken in C99 mode. Closes: #187091. + + PR other/11370: -Wunreachable-code gives false complaints. + Closes: #196600. + + PR c/11369: Too relaxed checking with -Wstrict-prototypes. + Closes: #197504. + + PR c/11445: False positive warning with -Wunreachable-code. + Closes: #200140. + + PR c/11459: -stdc=c90 -pedantic warns about C90's non long-long + support when in C99 mode. Closes: #200392. + + PR c/456: Handling of constant expressions. Closes: #225935. + + ICE on invalid #define with -traditional (closes: #242916). + + No warning when initializing a variable with itself, new option + -Winit-self (closes: #293957). + - C++: + + C++ parse error (closes: #42946). + + PR libstdc++/9073: Replacement for __STL_ASSERTIONS (libstdc++v3 + debug mode). Closes: #128993. + + Parse errors in nested constructor calls (closes: #138561). + + PR optimization/1823: -ftrapv aborts with pointer difference due to + division optimization. Closes: #169862. + + ICE on invalid code (closes: #176101). + + PR c++/10199: ICE handling method parametrized by template. + Closes: #185604. + + High memory usage building packages OpenOffice.org and MythTV. + Closes: #194345, #194513. + + Improved documentation of std::lower_bound (closes: #196380). + + ICE in regenerate_decl_from_template (closes: #197674). + + PR c++/11444: Function fails to propagate up class tree + (template-related). Closes: #198042. + + ICE when using namespaced typedef of primitive type as struct. + Closes: #198261. + + Bug using streambuf / iostream to read from a named pipe. + Closes: #216105. + + PR c++/11437: ICE in lookup_name_real (closes: #200011). + + Add large file support (LFS) in libstdc++ (closes: #220000). + + PR c++/13621: ICE compiling a statement expression returning type + string (closes: #224413). + + g++ doesn't find inherited inner class after template instantiation. + Closes: #227518. + + PR libstdc++/13928: Add whatis info in man pages generated by doxygen. + Closes: #229642. + + Missing symbol _M_setstate in libstdc++ (closes: #232709). + + Unable to parse declaration of inline constructor explicit + specialization (closes: #234709). + + ICE (segfault) on invalid C++ code (closes: #246031). + + ICE in lookup_tempate_function (closes: #262441). + + Undefined symbols in libstdc++, when using specials char_traits. + Closes: #266110. + + PR libstdc++/16011: Outputting numbers with ostream in the locale fr_BE + causes infinite recursion (closes: #270795). + + ICE in tree_low_cst (closes: #276291). + + ICE in in expand_call (closes: #283503). + + typeof operator is misparsed in a template function (closes: #288555). + + ICE in tree_low_cs (closes: #291374). + + Improve uninformative error messages (closes: #292961, #293076). + + ICE on array initialization (closes: #294560). + + Failure to build xine-lib with -finline-functions (closes: #306854). + - Java: + + Fix error finding files in subdirectories (closes: #195480). + + Implement java.text.CollationElementIterator lacks getOffset(). + Closes: #259789. + - Treelang: + + Pointer truncation on 64bit architectures (closes: #308367). + - Architecture specific: + - alpha + + PR debug/10695: ICE on alpha while building agistudio. + Closes: #192568. + + ICE when building fceu (closes: #228018, #252764). + - amd64 + + Miscompilation of Objective-C code (closes: #250174). + + g++ hangs compiling k3d on amd64 (closes: #285364). + - arm + + PR target/19008: gcc -O3 -fPIC produces wrong code via auto inlining. + Closes: #285238. + - i386 + + PR target/4106: i386 -fPIC asm ebx clobber no error. + Closes: #153472. + + PR target/10984: x86/sse2 ICEs on vector intrinsics. Closes: #166940. + + Wrong code generation on at least ix86 (closes: #275655). + - m68k + + PR target/9201: ICE compiling octave-2.1 (closes: #175478). + + ICE in verify_initial_elim_offsets (closes: #204407, #257012). + + g77 generates invalid assembly code (closes: #225621). + + ICE in verify_local_live_at_start (closes #245584). + - powerpc + + PR optimization/12828: -floop-optimize is unstable on PowerPC (float + to int conversion problem). Closes: #218219. + + PR target/13619: ICE building altivec code in ffmpeg. + Closes: #226148. + + PR target/20046: Miscompilation of bind 9.3.0. Closes: #292958. + - sparc + + ICE (segfault) while building atlas3 on sparc32 (closes: #249108). + + Wrong optimization on sparc32 when building linux kernel. + Closes: #254626. + + * Closed reports reported against gcc-3.3 or gcc-3.4 and fixed in gcc-4.0: + - General: + + PR rtl-optimization/6901: Optimizer improvement (removing unused + local variables). Closes: #67206. + + PR middle-end/179: Failure to detect use of unitialized variable + with -O -Wall. Closes: #117765. + + ICE building glibc's nptl on amd64 (closes: #260710, #307993). + + PR middle-end/17827: ICE in make_decl_rtl. Closes: #270854. + + PR middle-end/21709: ICE on compile-time complex NaN. Closes: #305344. + - Ada: + + PR ada/10889: Convention Fortran matrices mishandled in generics. + Closes: #192135. + + PR ada/13897: Implement tasking on powerpc. Closes: #225346. + - C: + + PR c/13072: Bogus warning with VLA in switch. Closes: #218803. + + PR c/13519: typeof(nonconst+const) is const. Closes: #208981. + + PR c/12867: Incorrect warning message (void format, should be void* + format). Closes: #217360. + + PR c/16066: PR 16066] i386 loop strength reduction bug. + Closes: #254659. + - C++: + + PR c++/13518: -Wnon-virtual-dtor doesn't always work. Closes: #212260. + + PR translation/16025: ICE with unsupported locale(closes: #242158). + + PR c++/15125: -Wformat doesn't warn for different types in fprintf. + Closes: #243507. + + PR c++/15214: Warn only if the dtor is non-private or the class has + friends. (closes: #246639). + + PR libstdc++/17218: Unknown subjects in generated libstdc++ manpages. + Closes: #262934. + + PR libstdc++/17223: Missing .so references in generated libstdc++ + manpages. Closes: #262956. + + libstdc++-doc: Improve man pages (closes: #280910). + + PR c++/19006: ICE in tree_low_cst. Closes: #285692. + + g++ does not check arguments to fprintf. Closes: #281847. + - Java: + + PR java/7304: gcj ICE (closes: #152501). + + PR libgcj/7305: Installation of headers not directly in /usr/include. + Closes: #195483. + + PR libgcj/11941: libgcj timezone handling (closes: #203212). + + PR java/14709: gcj fails to wait for its child processes on exec(). + Closes: #238432. + + PR libgcj/21703: gcj hangs when rapidly calling String.intern(). + Closes: #275547. + + SocketChannel.get(ByteBuffer) returns 0 at EOF. Closes: #281602. + + PR java/19711: gcj segfaults instead of reporting the ambiguous + expression. Closes: #286715. + + Static libgcj contains repeated archive members (closes: #298263). + - Architecture specific: + - alpha + + Unaligned accesses with ?-operator (closes: #301983). + - arm + + Compilation error of glibc-2.3.4 on arm (closes: #298508). + - m68k + + ICE in add_insn_before (closes: #248432). + - mips + + Fix o32 ABI breakage in gcc 3.3/3.4 (closes: #270620). + - powerpc + + ICE in extract_insn (closes: #311128). + + * Closing bug reports as wontfix: + - g++ defines _GNU_SOURCE when using the libstdc++ header files. + Behaviour did change since 3.0. Closes: #126703, #164872. + + -- Matthias Klose Sat, 9 Jul 2005 17:10:54 +0000 + +gcc-4.0 (4.0.0ds2-12) unstable; urgency=high + + * Update to CVS 20050701, taken from the gcc-4_0-branch. + * Apply proposed patch for MMAP configure fix; aka PR 19877. Backport + from mainline. + * Disable Fortran on m68k. Currently FTBFS. + * Split multiarch-include/lib patches. Update multiarch-include patch. + * Fix FTBFS of the hppa64-linux cross compiler. Don't add the + multiarch include dirs when cross compiling. + * Configure --with-java-home, as used by java-gcj-compat. + Closes: #315646. + * Make libgcj-dbg packages priority extra. + * Set the path of classmap.db to /var/lib/gcj-@gcc_version@. + * On m68k, do not create the default classmap.db in the gcj postinst. + See #312830. + * On amd64, install the 32bit libraries into /emul/ia32-linux/usr/lib. + Restore the /usr/lib32 symlink. + * On amd64, don't reference lib64, but instead lib (lib64 is a symlink + to lib). Closes: #293050. + * Remove references to build directories from the .la files. + * Make cpp-X.Y conflict with earlier versions of gcc-X.Y, g++-X.Y, gobjc-X.Y, + gcj-X.Y, gfortran-X.Y, gnat-X.Y, treelang-X.Y, if a path component in + the gcc library path changes (i.e. version or target alias). + * Disable Ada for sh3 sh3eb sh4 sh4eb. + * For gcj-4.0, add a conflict to libgcj4-dev and libgcj5-dev. + Closes: #316499. + + -- Matthias Klose Sat, 2 Jul 2005 11:04:35 +0200 + +gcc-4.0 (4.0.0ds1-11) unstable; urgency=low + + * debian/rules.defs: Disable Ada for alpha. + * debian/rules.conf: Fix typo in type-handling replacement code. + * Don't ship an empty libgcj6-dbg package. + + -- Matthias Klose Thu, 23 Jun 2005 09:03:21 +0200 + +gcc-4.0 (4.0.0ds1-10) unstable; urgency=medium + + * debian/patches/libstdc++-api-compat.dpatch: Apply proposed patch + to fix libstdc++ 3.4.5/4.0 compatibility. + * type-handling output became insane. Don't use it anymore. + * Drop the reference to the stl-manual package (closes: #314983). + * Disable java on GNU/kFreeBSD targets, requested by Robert Millan. + Closes: #315140. + * Terminate the acats-killer process, even if the build is aborted + by the user (closes: #314405). + * debian/rules.defs: Define DEB_TARGET_ARCH_{OS,CPU}. + * Start converting the use of DEB_*_GNU_* to DEB_*_ARCH_* in the build + files. + * Do not configure with --enable-gtk-cairo. Needs newer gtk. Drop + build dependency on libcairo-dev. + * Fix setting of the system header directory for the hurd (Michael Banck). + Closes: #315386. + * Fix FTBFS on hurd-i386: MAXPATHLEN issue (Michael Banck). Closes: #315384. + + -- Matthias Klose Wed, 22 Jun 2005 19:45:50 +0200 + +gcc-4.0 (4.0.0ds1-9ubuntu2) breezy; urgency=low + + * Fix version number in libgcj shlibs file. + + -- Matthias Klose Sun, 19 Jun 2005 10:34:02 +0200 + +gcc-4.0 (4.0.0ds1-9ubuntu1) breezy; urgency=low + + * Update to 4.0.1, release candidate 2. + * libstdc++ shlibs file: Require 4.0.0ds1-9ubuntu1 as minimum version. + * Rename libawt to libgcjawt to avoid conflicts with other + libawt implementations (backport from HEAD). + * Update classpath awt, swing and xml parser for HTML support in swing. + Taken from classpath CVS HEAD 2005-06-18. Patch provided by Michael Koch. + * Remove the libgcj-buffer-strategy path, part of the classpath update. + * libgcj shlibs file: Require 4.0.0ds1-9ubuntu1 as minimum version. + * Require cairo-0.5 as build dependency. + * gij-4.0: Provide java1-runtime. + * gij-4.0: Provide an rmiregistry alternative (using grmiregistry-4.0). + * gcj-4.0: Provide an rmic alternative (using grmic-4.0). + * libgcj6-dev conflicts with libgcj5-dev, libgcj4-dev, not libgcj6. + Closes: #312741. + * libmudflap-entry-point.dpatch: Correct name of entry point on mips/mipsel. + * Apply proposed patch for PR 18421 and PR 18719 (m68k only). + * Apply proposed path for PR 21562. + * Add build dependency on dpkg (>= 1.13.7). + * On linux systems, configure for -linux-gnu. + * Configure the hppa64 cross compiler to target hppa64-linux-gnu. + * (Build-)depend on binutils-2.16.1. + * libstdc{32,64}++6-4.0-dbg: Depend on libstdc++6-4.0-dev. + * gnat-4.0: only depend on libgnat, when a shared libgnat is built. + * gfortran-4.0: Depend on libgmp3c2 | libgmp3. + * On hppa, explicitely use gcc-3.3 as a build dependency in the case + that Ada is disabled. + * libmudflap: Always build the library for the non-default biarch + architecture, or else the test results show link failures. + + -- Matthias Klose Sat, 18 Jun 2005 00:42:55 +0000 + +gcc-4.0 (4.0.0-9) unstable; urgency=low + + * Upload to unstable. + + -- Matthias Klose Wed, 25 May 2005 19:02:20 +0200 + +gcc-4.0 (4.0.0-8ubuntu3) breezy; urgency=low + + * debian/control: Regenerate. + + -- Matthias Klose Sat, 4 Jun 2005 10:56:27 +0200 + +gcc-4.0 (4.0.0-8ubuntu2) breezy; urgency=low + + * Fix powerpc-config-ml patch. + + -- Matthias Klose Fri, 3 Jun 2005 15:47:52 +0200 + +gcc-4.0 (4.0.0-8ubuntu1) breezy; urgency=low + + * powerpc biarch support: + - Enable powerpc biarch support, build lib64gcc1 on powerpc. + - Add patch to disable libstdc++'s configure checking, if it can't run + 64bit binaries on 32bit kernels (Sven Luther). + - Apply the same patch to the other runtime librararies as well. + - Run the testsuite with -m64, if we can execute 64bit binaries. + - Add libc6-dev-ppc64 as build dependency for powerpc. + * 32bit gcj libs for amd64. + * debian/logwatch.sh: Don't remove logwatch pid file on exit (suggested + by Ryan Murray). + * Update to CVS 20050603, taken from the gcc-4_0-branch. + * g++-4.0 provides c++abi2-dev. + * Loosen dependencies on packages of architecture `all' to not break + binary only uploads. + * Build libgfortran for biarch as well, else the testsuite will fail. + + -- Matthias Klose Fri, 3 Jun 2005 13:38:19 +0200 + +gcc-4.0 (4.0.0-8) experimental; urgency=low + + * Synchronize with Ubuntu. + + -- Matthias Klose Mon, 23 May 2005 01:56:28 +0000 + +gcc-4.0 (4.0.0-7ubuntu7) breezy; urgency=low + + * Fix build failures for builds with disabled testsuite. + * Adjust debian/rules conditionals to work with all dpkg versions. + * Build separate lib32stdc6-4.0-dbg/lib64stdc6-4.0-dbg packages. + * Add the debugging symbols of the optimzed libstdc++ build in the + lib*stdc++6-dbg packages as well. + * Build a libgcj6-dbg package. + * Update to CVS 20050522, taken from the gcc-4_0-branch. + * Add Ada support for the ppc64 architecture (Andreas Jochens): + * debian/patches/ppc64-ada.dpatch + - Add gcc/ada/system-linux-ppc64.ads, which has been copied from + gcc/ada/system-linux-ppc.ads and changed to use 'Word_Size' 64 + instead of 32. + - gcc/ada/Makefile.in: Use gcc/ada/system-linux-ppc64.ads on powerpc64. + * debian/rules.patch + - Use ppc64-ada patch on ppc64. + * debian/rules.d/binary-ada.mk + Place the symlinks libgnat.so, libgnat-4.0.so, libgnarl.so, + libgnarl-4.0.so in '/usr/lib' instead of '/adalib'. + Closes: #308948. + * Add libc6-dev-i386 as an alternative build dependency for amd64. + Closes: #305690. + + -- Matthias Klose Sun, 22 May 2005 22:14:20 +0200 + +gcc-4.0 (4.0.0-7ubuntu6) breezy; urgency=low + + * Don't trust dpkg-architecture (1.13.4), it "hurds" ... + + -- Matthias Klose Wed, 18 May 2005 11:36:38 +0200 + +gcc-4.0 (4.0.0-7ubuntu5) breezy; urgency=low + + * libgcj6-dev: Don't provide libgcj-dev. + + -- Matthias Klose Wed, 18 May 2005 00:30:32 +0000 + +gcc-4.0 (4.0.0-7ubuntu4) breezy; urgency=low + + * Update to CVS 20050517, taken from the gcc-4_0-branch. + * Apply proposed patch for PR21293. + + -- Matthias Klose Tue, 17 May 2005 23:05:40 +0000 + +gcc-4.0 (4.0.0-7ubuntu2) breezy; urgency=low + + * Update to CVS 20050515, taken from the gcc-4_0-branch. + + -- Matthias Klose Sun, 15 May 2005 23:48:00 +0200 + +gcc-4.0 (4.0.0-7ubuntu1) breezy; urgency=low + + * Synchronize with Debian. + + -- Matthias Klose Mon, 9 May 2005 19:35:29 +0200 + +gcc-4.0 (4.0.0-7) experimental; urgency=low + + * Update to CVS 20050509, taken from the gcc-4_0-branch. + * Remove the note from the fastjar package description, stating, that + fastjar is incomplete compared to the "standard" jar utility. + * Fix typo in build depends. dpkg-checkbuilddeps doesn't like a comma + inside []. + * Tighten shlibs dependencies to require the current version. + + -- Matthias Klose Mon, 9 May 2005 19:02:03 +0200 + +gcc-4.0 (4.0.0-6) experimental; urgency=low + + * Update to CVS 20050508, taken from the gcc-4_0-branch. + + -- Matthias Klose Sun, 8 May 2005 14:08:28 +0200 + +gcc-4.0 (4.0.0-5ubuntu1) breezy; urgency=low + + * Temporarily disable the i386 biarch build. Remove the amd64-libs-dev + build dependency, add (build-)conflict (<= 1.1ubuntu1). + + -- Matthias Klose Sat, 7 May 2005 16:56:21 +0200 + +gcc-4.0 (4.0.0-5) breezy; urgency=low + + * gnat-3.3 and gnat-4.0 are alternative build dependencies (closes: #308002). + * Update to CVS 20050507, taken from the gcc-4_0-branch. + * gcj-4.0: Install gjnih. + * Add libgcj buffer strategy framework (Thomas Fitzsimmons), needed for OOo2. + Backport from 4.1. + * Fix all lintian errors and most of the warnings. + + -- Matthias Klose Sat, 7 May 2005 12:26:15 +0200 + +gcc-4.0 (4.0.0-4) breezy; urgency=low + + * Still prefer gnat-3.3 over gnat-4.0 as a build dependency. + + -- Matthias Klose Fri, 6 May 2005 22:30:43 +0200 + +gcc-4.0 (4.0.0-3) breezy; urgency=low + + * Update to CVS 20050506, taken from the gcc-4_0-branch. + * Update priority of java alternatives to 40. + * Move gcj-dbtool to gij package, move the default classmap.db to + /var/lib/gcj-4.0/classmap.db. Create it in the postinst. + * Fix gcc-4.0-hppa64 postinst (closes: #307762). + * Fix gcc-4.0-hppa64, gij-4.0 and gcj-4.0 postinst, to not ignore errors + from update-alternatives. + * Fix gcc-4.0-hppa64, fastjar, gij-4.0 and gcj-4.0 prerm, + to not ignore errors from update-alternatives. + + -- Matthias Klose Fri, 6 May 2005 17:50:58 +0200 + +gcc-4.0 (4.0.0-2) experimental; urgency=low + + * GCC 4.0.0 release. + * Update to CVS 20050503, taken from the gcc-4_0-branch. + * Add gnat-4.0 as an alternative build dependency (closes: #305690). + + -- Matthias Klose Tue, 3 May 2005 15:41:26 +0200 + +gcc-4.0 (4.0.0-1) experimental; urgency=low + + * GCC 4.0.0 release. + + -- Matthias Klose Sun, 24 Apr 2005 11:28:42 +0200 + +gcc-4.0 (4.0ds11-0pre11) breezy; urgency=low + + * CVS 20050413, taken from the gcc-4_0-branch. + * Add proposed patches for PR20126, PR20490, PR20929. + + -- Matthias Klose Wed, 13 Apr 2005 09:43:00 +0200 + +gcc-4.0 (4.0ds10-0pre10) experimental; urgency=low + + * gcc-4.0.0-20050410 release candidate 1, built from the prerelease tarball. + - C++ fix for "optimizer breaks function inlining". Closes: #302989. + * Append the GCC version to the fastjar/grepjar version string. + * Use short file names in the libstdc++ docs (closes: #301140). + * Fix libstdc++-dbg dependencies (closes: #303866). + + -- Matthias Klose Mon, 11 Apr 2005 13:16:01 +0200 + +gcc-4.0 (4.0ds9-0pre9) experimental; urgency=low + + * CVS 20050326, taken from the gcc-4_0-branch. + * Reenable Ada on ia64. + * Build libgnat on hppa, sparc, s390 again. + * ppc64 support (Andreas Jochens): + * debian/control.m4 + - Add libc6-dev-powerpc [ppc64] to the Build-Depends. + - Change the Description for lib32gcc1: s/ia32/32 bit Version/ + * debian/rules.defs + - Define 'biarch_ia32' for ppc64 to use the same 32 bit multilib + facilities as amd64. + * debian/rules.d/binary-gcc.mk + - Correct an error in the 'files_gcc' definition for biarch_ia32 + (replace '64' by '32'). + * debian/rules2 + - Do not use '--disable-multilib' on powerpc64-linux. + Use '--disable-nof --disable-softfloat' instead. + * debian/rules.d/binary-libstdcxx.mk + - Put the 32 bit libstdc++ files in '/usr/lib32'. + * debian/rules.patch + - Apply 'ppc64-biarch' patch on ppc64. + * debian/patches/ppc64-biarch.dpatch + - MULTILIB_OSDIRNAMES: Use /lib for native 64 bit libraries and + /lib32 for 32 bit libraries. + - Add multilib handling to src/config-ml.in (taken from + amd64-biarch.dpatch). + * Rename biarch_ia32 to biarch32, as suggsted by Andreas. + * Use /bin/dash on hppa. + * Reenable the build of the hppa64 compiler. + * Enable parallel builds by defaults (set environment variale USE_NJOBS=no + or USE_NJOBS= to modify the default, which is to use the + number of available processors). + + -- Matthias Klose Sat, 26 Mar 2005 19:07:30 +0100 + +gcc-4.0 (4.0ds8-0pre8) experimental; urgency=low + + * CVS 20050322, taken from the gcc-4_0-branch. + - Add proposed fix for PR19406. + * Configure --with-gtk-cairo only if version 0.3.0 is found. + * Split out gcc-4.0-locales package. Better chance of getting + bug reports in english language. + + -- Matthias Klose Tue, 22 Mar 2005 14:20:24 +0100 + +gcc-4.0 (4.0ds7-0pre7) experimental; urgency=low + + * CVS 20050304, taken from the gcc-4_0-branch. + * Build the treelang compiler. + + -- Matthias Klose Fri, 4 Mar 2005 21:29:56 +0100 + +gcc-4.0 (4.0ds6-0pre6ubuntu6) hoary; urgency=low + + * Fix lib32gcc1 symlink on amd64. Ubuntu #7099. + + -- Matthias Klose Thu, 3 Mar 2005 00:17:26 +0100 + +gcc-4.0 (4.0ds6-0pre6ubuntu5) hoary; urgency=low + + * Add patch from PR20160, avoid creating archives with components + that have duplicate basenames. + + -- Matthias Klose Wed, 2 Mar 2005 14:22:04 +0100 + +gcc-4.0 (4.0ds6-0pre6ubuntu4) hoary; urgency=low + + * CVS 20050301, taken from the gcc-4_0-branch. + Test builds on i386, amd64, powerpc, ia64, check libgcc_s.so.1. + * Add fastjar-4.0 binary and manpage. Some java packages append it + for all java related tools. + * Add libgcj6-src package for source code availability in IDE's. + * On hppa, disable the build of the hppa64 cross compiler, disable + java, disable running the testsuite (request by Lamont). + * On amd64, lib32gcc1 replaces ia32-libs.openoffice.org (<< 1ubuntu3). + * Build-Depend on libcairo1-dev, configure with --enable-gtk-cairo. + Work around libtool problems install libjawt. + Install jawt header files in libgcj6-dev. + * Add workaround for PR debug/19769. + + -- Matthias Klose Tue, 1 Mar 2005 11:26:19 +0100 + +gcc-4.0 (4.0ds5-0pre6ubuntu3) hoary; urgency=low + + * Drop libgmp3-dev (<< 4.1.4-3) as an alterntative build dependency. + + -- Matthias Klose Thu, 10 Feb 2005 15:16:27 +0100 + +gcc-4.0 (4.0ds5-0pre6ubuntu2) hoary; urgency=low + + * Disable Ada for powerpc. + + -- Matthias Klose Wed, 9 Feb 2005 16:47:07 +0100 + +gcc-4.0 (4.0ds5-0pre6ubuntu1) hoary; urgency=low + + * Avoid build dependency on type-handling. + * Install 32bit libs on amd64 in /lib32 and /usr/lib32. + + -- Matthias Klose Wed, 9 Feb 2005 08:27:21 +0100 + +gcc-4.0 (4.0ds5-0pre6) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050208. + * Build-depend on graphviz (moved to main), remove the pregenerated + libstdc++ docs from the diff. + * Fix PR19162, libobjc build failure on arm-linux (closes: #291497). + + -- Matthias Klose Tue, 8 Feb 2005 11:47:31 +0000 + +gcc-4.0 (4.0ds4-0pre5) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050125. + * Call the 4.0 gcx versions in the java wrappers (closes: #291075). + * Correctly install libgij (closes: #291077). + * libgcj6-dev: Add conflicts to other libgcj-dev packages (closes: #290950). + + -- Matthias Klose Mon, 24 Jan 2005 23:59:54 +0100 + +gcc-4.0 (4.0ds3-0pre4) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050115. + * Update cross build patches (Nikita V. Youshchenko). + * Enable Ada on i386, amd64, mips, mipsel, powerpc, sparc, s390. + Doesn't yet bootstrap on alpha, hppa, ia64. + + -- Matthias Klose Sat, 15 Jan 2005 18:44:03 +0100 + +gcc-4.0 (4.0ds2-0pre3) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041224. + + -- Matthias Klose Wed, 22 Dec 2004 00:31:44 +0100 + +gcc-4.0 (4.0ds1-0pre2) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041205. + * Lot's of merges and updates from the gcc-3.4 packages. + + -- Matthias Klose Sat, 04 Dec 2004 12:14:51 +0100 + +gcc-4.0 (4.0ds0-0pre1) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041114. + - Addresses many issues with the libstdc++ man pages (closes: #278549). + * Disable Ada on hppa, ia64, mips, mipsel, powerpc, s390 and sparc, at least + these are known to be broken at the time of the snapshot. + * Minor kbsd.gnu build fixes (Robert Millan). Closes: #273004. + * For amd64, add missing libstdc++ files to 'libstdc++6-dev' package. + (Andreas Jochens). Fixes: #274362. + * Update libffi-mips patch (closes: #274096). + * Updated i386-biarch patch. Don't build 64bit libstdc++, ICE. + * Update sparc biarch patch. + * Fix symlinks for gfortran manpage (closes: #278548). + * Update cross build patches (Nikita V. Youshchenko). + * Update Ada patches (Ludovic Brenta). + + -- Matthias Klose Sat, 13 Nov 2004 10:38:25 +0100 + +gcc-4.0 (4.0-0pre0) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20040912. + + * Matthias Klose + + - Integrate accumulated packaging patches from gcc-3.4. + - Rename libstdc++6-* packages to libstdc++6-4-* (closes: #261693). + - libffi4-dev: conflict with libffi3-dev (closes: #265939). + + * Robert Millan + + * control.m4: + - s/locale_no_archs !hurd-i386/locale_no_archs/g + (This is now handled in rules.defs. [1]) + - s/procps [check_no_archs]/procps [linux_gnu_archs]/g [2] + - Add type-handling to build-deps. [3] + * rules.conf: + - Don't require (>= $(libc_ver)) for libc0.1-dev. [4] + - Generate *_no_archs variables with type-handling and use them for + for m4's -D parameters. [3] + * rules.defs: + - use filter instead of findstring [1]. + - s/netbsd-elf-gnu/netbsdelf-gnu/g [5]. + - enable java for kfreebsd-gnu [6] + - enable ffi for kfreebsd-gnu and knetbsd-gnu [6] + - enable libgc for kfreebsd-gnu [6] + - enable checks for kfreebsd-gnu and knetbsd-gnu [7] + - enable locales for kfreebsd-gnu and gnu [1] [8]. + * Closes: #264025. + + -- Matthias Klose Sun, 12 Sep 2004 12:52:56 +0200 + +gcc-3.5 (3.5ds1-0pre1) experimental; urgency=low + + * gcc-3.5 snapshot, taken from the HEAD branch CVS 20040724. + * Install locale data with versioned package name (closes: #260497). + * Fix libgnat symlinks. + + -- Matthias Klose Sat, 24 Jul 2004 21:26:23 +0200 + +gcc-3.5 (3.5-0pre0) experimental; urgency=low + + * gcc-3.5 snapshot, taken from the HEAD branch CVS 20040718. + + -- Matthias Klose Sun, 18 Jul 2004 12:26:00 +0200 + +gcc-3.4 (3.4.1-1) experimental; urgency=low + + * gcc-3.4.1 final release. + - configured wth --enable-libstdcxx-allocator=mt. + * Fixes for generating cross compiler packages (Jeff Bailey). + + -- Matthias Klose Fri, 2 Jul 2004 22:49:05 +0200 + +gcc-3.4 (3.4.0-4) experimental; urgency=low + + * gcc-3.4.1 release candidate 1. + * Add logic to build biarch compiler on powerpc (disabled, needs lib64c). + * Don't build the libg2c0 package on mipsel-linux (no clear answer on + debian-mips, if the libg2c0's built by gcc-3.3 and gcc-3.4 are compatible + (post-sarge issue). + * Don't use gcc-2.95 as bootstrap compiler on m68k anymore. + + -- Matthias Klose Sat, 26 Jun 2004 22:40:20 +0200 + +gcc-3.4 (3.4.0-3) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040613. + * On sparc, set the the build target to sparc64-linux, build with + switch defaulting to code generation for v7. To generate code for + sparc64, use the -m64 switch. + * Add missing doc-base files to -doc packages. + * Add portability patches and kbsd-gnu patch (Robert Millan). + Closes: #251293, #251294. + * Apply fixes for cross build (Nikita V. Youshchenko). + * Do not include the precompiled libstdc++ header files into the -dev + package (still experimental). Closes: #251707. + * Reflect renaming of Ada user's guide. + * Move AWT peer libraries for libgcj into it's own package (fixes: #247791). + + -- Matthias Klose Mon, 14 Jun 2004 00:03:18 +0200 + +gcc-3.4 (3.4.0-2) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040516. + * Do not provide the /usr/hppa64-linux/include in the gcc-hppa64 package, + migrated to libc6-dev. Adjust dependencies. + * Integrate gpc test results into the GCC test summary. + * gnatchop calls gcc-3.4 (closes: #245438). + * debian/locale-gen.sh: Update for recent libstdc+++ testsuite. + * debian/copyright: Add libstdc++-v3's exception clause. + * Add libffi update for mips (Thiemo Seufer). + * Reference Debian specific bug reporting instructions. + * Update README.Bugs. + * Fix FTBFS for libstdc++-doc. + * Update libjava patch for hppa (Randolph Chung). + * Fix installation of ffitarget.h header file. + * On amd64-linux, configure --without-multilib, disable Ada. + + -- Matthias Klose Sun, 16 May 2004 07:53:39 +0200 + +gcc-3.4 (3.4.0-1) experimental; urgency=low + + * gcc-3.4.0 final release. + + * Why experimental? + - Do not interfer with packages currently built from gcc-3.3 sources, + i.e. libgcc1, libobjc1, libffi2, libffi2-dev, libg2c0. + - Biarch sparc compiler doesn't built yet. + - Use of configure flags affecting binary ABI's not yet determined. + - Several ABI bugs have been fixed. Unfortunately, these changes will break + binary compatibility with earlier releases on several architectures: + alpha, mips, sparc, + - hppa and m68k changed sjlj based exception handling to dwarf2 based + exception handling. + + See NEWS.html or http://gcc.gnu.org/gcc-3.4/changes.html for more + specific information. + + -- Matthias Klose Tue, 20 Apr 2004 20:54:56 +0200 + +gcc-3.4 (3.4ds3-0pre4) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040403. + * Add gpc tarball, gpc patches for 3.4 (Waldek Hebisch). + * Reenable sparc-biarch patches (closes: #239856). + * Build the shared libgnat library, needed to fix FTBFS for some + Ada library packages (Ludovic Brenta). + Currently enabled for hppa, i386, ia64. + + -- Matthias Klose Sat, 3 Apr 2004 08:47:55 +0200 + +gcc-3.4 (3.4ds1-0pre2) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040320. + * For libstdc++6-doc, add a conflict to libstdc++5-3.3-doc (closes: #236560). + * For libstdc++6-dbg, add a conflict to libstdc++5-3.3-dbg (closes: #236798). + * Reenable s390-biarch patches. + * Update the cross compiler build files (Nikita V. Youshchenko). + + -- Matthias Klose Sat, 20 Mar 2004 09:15:10 +0100 + +gcc-3.4 (3.4ds0-0pre1) experimental; urgency=low + + * Start gcc-3.4 packaging, get rid of the epoch for most of the + packages. + + -- Matthias Klose Sun, 22 Feb 2004 16:00:03 +0100 + +gcc-3.3 (1:3.3.3ds6-6) unstable; urgency=medium + + * Update to gcc-3_3-branch CVS 20040401. + - Fixed ICE in emit_move_insn_1 on legal code (closed: #223215). + - Fix PR 14755, miscompilation of loops with bitfield counter. + Closes: #241255. + - Fix PR 16040, crash in function initializing const data with + reinterpret_cast-ed pointer-to-member function crashes (closes: #238621). + - Remove patches integrated upstream. + * Reenable build of gpidump on powerpc and s390. + + -- Matthias Klose Thu, 1 Apr 2004 23:51:54 +0200 + +gcc-3.3 (1:3.3.3ds6-5) unstable; urgency=medium + + * Update to gcc-3_3-branch CVS 20040321. + - Fix PR target/13889 (ICE on valid code on m68k). + * Fix FTFBS on s390. Do not build gpc's gpidump on s390. + * Reenable gpc on arm. + + -- Matthias Klose Mon, 22 Mar 2004 07:37:26 +0100 + +gcc-3.3 (1:3.3.3ds6-4) unstable; urgency=low + + * Update to gcc-3_3-branch CVS 20040320. + - Revert patch for PR14640 (with this, at least mozilla-firefox was + miscompiled on x86 (closes: #238621). + * Update the gpc tarball (there were two releases with the same name ...). + * Reenable gpc on alpha and ia64. + + -- Matthias Klose Sat, 20 Mar 2004 07:39:24 +0100 + +gcc-3.3 (1:3.3.3ds5-3) unstable; urgency=low + + * Update to gcc-3_3-branch CVS 20040314. + - Fixes miscompilation with -O -funroll-loops on powerpc (closes: #229567). + - Fix ICE in dwarf-2 on code using altivec (closes: #203835). + * Update hurd-changes patch. + * Add libgcj4-dev as a recommendation for gcj (closes: #236547). + * debian/copyright: Added exemption to static linking of libgcc. + + * Phil Blundell: + - debian/patches/arm-ldm.dpatch, debian/patches/arm-gotoff.dpatch: Update. + + -- Matthias Klose Sun, 14 Mar 2004 09:56:06 +0100 + +gcc-3.3 (1:3.3.3ds5-2) unstable; urgency=low + + * Update to gcc-3_3-branch CVS 20040306. + - Fixes bootstrap comparision error on ia64. + - Allows ghc build with gcc-3.3. + - On amd64, don't imply 3DNow! for -m64 by default. + - Some arm specific changes + - Fix C++/13944: exception in constructor of a class to be thrown is not + caught. Closes: #228099. + * Enable the build of gcc-3.3-hppa64 on hppa. + Add symlinks for as and ld to point to hppa64-linux-{as,ld}. + * gcj-3.3 depends on g++-3.3, recommends gij-3.3. gij-3.3 suggests gcj-3.3. + * Fix libgc2c-pic compatibility links (closes: #234333). + The link will be removed for gcc-3.4. + * g77-3.3: Conflict with other g77-x.y packages. + * Tighten shlibs dependencies to latest released versions. + + * Phil Blundell: + - debian/patches/arm-233633.dpatch: New Fixes problems with half-word + loads on ARMv3 architecture. (Closes: #233633) + - debian/patches/arm-ldm.dpatch: New. Avoids inefficient epilogue for + leaf functions in PIC code on ARM. + + -- Matthias Klose Sat, 6 Mar 2004 10:57:14 +0100 + +gcc-3.3 (1:3.3.3ds5-1) unstable; urgency=medium + + * gcc-3.3.3 final release. + See /usr/share/doc/gcc-3.3/NEWS.{gcc,html}. + + -- Matthias Klose Mon, 16 Feb 2004 08:59:52 +0100 + +gcc-3.3 (1:3.3.3ds4-0pre4) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20040214 (2nd gcc-3.3.3 prerelease). + * Fix title of libstdc++'s html main index (closes: #196381). + * Move libg2c libraray files out of the gcc specific libdir to /usr/lib. + For g77-3.3 add conflicts to other g77 packages. Closes: #224848. + * Update the stack protector patch to 3.3-7, but don't apply it by default. + Closes: #230338. + * On arm, use arm6 as the cpu default (backport from mainline, PR12527). + * Add libffi and libjava support for hppa (Randolph Chung). Closes: #232615. + + -- Matthias Klose Sat, 14 Feb 2004 09:26:15 +0100 + +gcc-3.3 (1:3.3.3ds3-0pre3) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20040125. + - Fixed PR11350, undefined labels with -Os -fPIC (closes: #195911). + - Fixed PR11793, ICE in extract_insn, at recog.c (closes: #203835). + - Fixed PR13544, removed backport for PR12862. + - Integrated backport for PR12441. + * Fixed since 3.3: java: not implemented interface methods of abstract + classes not found (closes: #225438). + * Disable pascal on arm architecture (currently broken). + * Update the build files to build a cross compiler (Nikita V. Youshchenko). + See debian/README.cross in the source package. + * Apply revised patch to make -mieee the default on alpha-linux, + and add -mieee-disable switch to turn the default off (closes: #212912). + (Tyson Whitehead) + + -- Matthias Klose Sun, 25 Jan 2004 17:41:04 +0100 + +gcc-3.3 (1:3.3.3ds2-0pre2) unstable; urgency=medium + + * Update to gcc-3.3.3 CVS 20040110. + - Fixes compilation not terminating at -O1 on hppa (closes: #207516). + * Add backport to fix PR12441 (closes: #224576). + * Revert backport to 3.3 branch to fix PR12862, which introduced another + regression (PR13544). Closes: #225663. + * Tighten dependency of gnat-3.3 on gcc-3.3 (closes: #226273). + * Disable treelang build for cross compiler build. + * Disable pascal on alpha and ia64 architectures (currently broken). + + -- Matthias Klose Sat, 10 Jan 2004 12:33:59 +0100 + +gcc-3.3 (1:3.3.3ds1-0pre1) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20031229. + - Fixes bootstrap error on ia64-linux. + - Fix -pthread on mips{,el}-linux (closes: #224875). + - Fix -Wformat for C++ (closes: #217075). + * Backport from mainline: Preserve inline-ness when redeclaring + a function template (closes: #195264). + * Add missing intrinsics headers on ix86 (closes: #224593). + * Fix location of libg2c libdir in libg2c.la file (closes: #224848). + + -- Matthias Klose Mon, 29 Dec 2003 10:36:29 +0100 + +gcc-3.3 (1:3.3.3ds0-0pre0.1) unstable; urgency=high + + * NMU + * Fixed mips(el) spec file for -pthread: (Closes: #224875) + * [debian/patches/mips-pthread.dpatch] New. + * [debian/rules.patch] Added it to debian_patches. + + -- J.H.M. Dassen (Ray) Sat, 27 Dec 2003 15:51:47 +0100 + +gcc-3.3 (1:3.3.3ds0-0pre0) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20031206. + - Fixes ICE in verify_local_live_at_start (hppa). Closes: #201550. + - Fixes miscompilation of linux-2.6/sound/core/oss/rate.c. + Closes: #219949. + * Add missing unwind.h to gcc package (closes: #220846). + * Regenerate control file to fix build dependencies for m68k. + * More gpc only patches to fix test failures on m68k. + * Reenable gpc for the Hurd (closes: #189851). + + -- Matthias Klose Sat, 6 Dec 2003 10:29:07 +0100 + +gcc-3.3 (1:3.3.2ds5-4) unstable; urgency=low + + * Update libffi-dev package description (closes: #219508). + * For gij and libgcj fix dependency on the libstdc++ package, if + the latter isn't installed during the build. + * Apply patch to emit .note.GNU-stack section on linux arches + which by default need executable stack. + * Prefer gnat-3.3 over gnat-3.2 as a build dependency. + * Update the pascal tarball (different version released with the + same name). + * Add pascal patches to address various gpc testsuite failures. + On alpha and ia64, build gpc from the 20030830 version. Reenable + the build on m68k. + Remove the 20030507 gpc version from the tarball. + * Apply patch to build the shared ada libs and link the ada tools + against the shared libs. Not enabled by default, because gnat + and gnatlib are rebuilt during install. (Ludovic Brenta) + + -- Matthias Klose Sun, 9 Nov 2003 22:34:33 +0100 + +gcc-3.3 (1:3.3.2ds4-3) unstable; urgency=low + + * Fix rules to omit inclusion of gnatpsta in mips(el) gnat package. + + -- Matthias Klose Sun, 2 Nov 2003 14:29:59 +0100 + +gcc-3.3 (1:3.3.2ds4-2) unstable; urgency=medium + + * s390-ifcvt patch added. Fixes gcl miscompilation (closes: #217240). + (Gerhard Tonn) + * Fix an infinite loop in g++ compiling lufs, regression from 3.3.1. + * Fix a wrong code generation bug on alpha. + (Falk Hueffner) + * Update NEWS files. + * Add Falk Hueffner to the Debian GCC maintainers. + * Enable ada on mips and mipsel, but don't build the gnatpsta tool. + + -- Matthias Klose Wed, 29 Oct 2003 00:12:37 +0100 + +gcc-3.3 (1:3.3.2ds4-1) unstable; urgency=medium + + * Update to gcc-3.3.2. + * Update NEWS files. + * Miscompilation in the pari package at -O3 fixed (closes: #198172). + * On alpha-linux, revert -mieee as the default (Falk Hueffner). + Reopens: #212912. + * Add ia64-unwind patch (Jeff Bailey). + * Closed reports reported against gcc-2.96 (ia64), fixed at least in gcc-3.3: + - ICE in verify_local_live_at_start, at flow.c:2733 (closes: #135404). + - Compilation failure of stlport (closes: #135224). + - Infinite loop compiling cssc's pfile.cc with -O2 (closes: #115390). + - Added missing some string::compare() members (closes: #141199). + - header declares std::pow (closes: #161853). + - does have at() method (closes: #59776). + - Fixed error in stl_deque.h (closes: #69530). + - Fixed problem with bastring (closes: #75759, #96539). + - bad_alloc and std:: namespace problem (closes: #75120). + - Excessive warnings from headers with -Weffc++ (closes: #76827). + + -- Matthias Klose Fri, 17 Oct 2003 08:07:01 +0200 + +gcc-3.3 (1:3.3.2ds3-0pre5) unstable; urgency=low + + * Update to gcc-3.3.2 CVS 20031005. + - Fixes cpp inserting a spurious newline (closes: #210478, #210482). + - Fixes generation of unrecognizable insn compiling kernel source + on alpha (closes: #202762). + - Fixes ICE in add_abstract_origin_attribute (closes: #212406). + - Fixes forward declaration in libstdc++ (closes: #209386). + - Fixes ICE in in extract_insn, at recog.c on alpha (closes: #207564). + * Make libgcj-common architecture all (closes: #211909). + * Build depend on: flex-old | flex (<< 2.5.31). + * Fix spec linking libraries with -pthread on powerpc (closes: #211054). + * debian/patches/arm-gotoff.dpatch: fix two kinds of PIC lossage. + (Phil Blundell) + * debian/patches/arm-common.dpatch: fix excessive alignment of common + blocks causing binutils testsuite failures. + (Phil Blundell) + * Update priorities in debian/control to match the archive. + (Ryan Murray) + * s390-nonlocal-goto patch added. Fixes some pascal testcase failures. + (Gerhard Tonn) + * On alpha-linux, make -mieee default and add -mieee-disable switch + to turn default off (closes: #212912). + (Tyson Whitehead) + * Add gpc upstream patch for memory corruption fix. + + -- Matthias Klose Sun, 5 Oct 2003 19:53:49 +0200 + +gcc-3.3 (1:3.3.2ds2-0pre4) unstable; urgency=low + + * Add gcc-unsharing_lhs patch (closes: #210848) + + -- Ryan Murray Fri, 19 Sep 2003 22:51:19 -0600 + +gcc-3.3 (1:3.3.2ds2-0pre3) unstable; urgency=low + + * Update to gcc-3.3.2 CVS 20030908. + * PR11716 (Michael Eager, Dan Jacobowitz): + Make GCC think that the maximum length of a short branch is + 64K instead of 128K. It's a big hammer, but it works. + Closes: #207915. + * Downgrade gpc to 20030507 on alpha and ia64 (closes: #208717). + + -- Matthias Klose Mon, 8 Sep 2003 21:49:52 +0200 + +gcc-3.3 (1:3.3.2ds1-0pre2) unstable; urgency=low + + * Update to gcc-3.3.2 CVS 20030831. + - Fix java NullPointerException detection with 2.6 kernels. + Closes: #206377. + - Fix bug in C++ typedef handling (closes: #205402). + - Fix -Wunreachable-code giving false complaints (closes: #196600). + * Update to gpc-20030830. + * Don't include /usr/share/java/repository into the class path according + to the new version of th Debian Java policy (closes: #205643). + * Build-Depend/Depend on libgc-dev. + + -- Matthias Klose Sun, 31 Aug 2003 08:56:53 +0200 + +gcc-3.3 (1:3.3.2ds0-0pre1) unstable; urgency=low + + * Remove the build dependency on locales for now. + + -- Matthias Klose Fri, 15 Aug 2003 07:48:18 +0200 + +gcc-3.3 (1:3.3.2ds0-0pre0) unstable; urgency=medium + + * Update to gcc-3.3.2 CVS 20030812. + - Fixes generation of wrong code for XDM-AUTHORIZATION-1 key generation + and/or validation. Closes: #196090. + * Update NEWS files. + * Change ix86 default CPU type for code generation: + - i386-linux -> i486-linux + - i386-gnu -> i586-gnu + - i386-freebsd-gnu -> i486-freebsd-gnu + Use -march=i386 to target i386 CPUs. + + -- Matthias Klose Tue, 12 Aug 2003 10:31:28 +0200 + +gcc-3.3 (1:3.3.1ds3-1) unstable; urgency=low + + * gcc-3.3.1 (taken from CVS 20030805). + - C++: Fix declaration conflicts (closes: #203351). + - Fix ICE on ia64 (closes: #203840). + + -- Matthias Klose Tue, 5 Aug 2003 20:38:02 +0200 + +gcc-3.3 (1:3.3.1ds2-0rc2) unstable; urgency=low + + * Update to gcc-3.3.1 CVS 20030728. + - Fix ICE in extract_insn, at recog.c:2148 on m68k. + Closes: #177840, #180375, #190818. + - Fix ICE while building libquicktime on alpha (closes: #192576). + - Fix failure to deal with using and private inheritance (closes: #202696). + * On sparc, /usr/lib was added to the library search path. Fix it. + * Closed reports reported against gcc-3.2.x and fixed in gcc-3.3: + - Fix error building the gcl package on arm (closes: #199835). + + -- Matthias Klose Mon, 28 Jul 2003 20:39:07 +0200 + +gcc-3.3 (1:3.3.1ds1-0rc1) unstable; urgency=low + + * Update to gcc-3.3.1 CVS 20030722 (3.3.1 release candidate 1). + - Fix ICE in copy_to_mode_reg on 64-bit targets (closes: #189365). + - Remove documentation about multi-line strings (closes: #194391). + - Correctly document -falign-* parameters (closes: #198269). + - out-of-class specialization of a private nested template class. + Closes: #193830. + - Tighten shlibs dependency due to new symbols in libgcc. + * README.Debian for libg2c0, describing the need for g77-x.y when + working with the g2c header and library (closes: #189059). + * Call make with -j, if USE_NJOBS is set and non-empty + in the environment. + * Add another two m68k patches, partly replacing the workarounds provided + by Roman Zippel. + * Add the stack protector patch, but don't apply it by default. Edit + debian/rules.patch to apply it (closes: #171699, #189494). + * Remove wrong symlinks from gnat package (closes: #201882). + * Closed reports reported against gcc-2.95 and fixed in newer versions: + - SMP kernel compilation on alpha (closes: #134197, #146883). + - ICE on arm while building imagemagick (closes: #173475). + * Closed reports reported against gcc-3.2.x and fixed in gcc-3.3: + - Miscompilation of octave2.1 on hppa (closes: #192296, #193804). + + -- Matthias Klose Sun, 13 Jul 2003 10:26:30 +0200 + +gcc-3.3 (1:3.3.1ds0-0pre0) unstable; urgency=medium + + * Update to gcc-3.3.1 CVS 20030626. + - Fix ICE on arm compiling xfree86 (closes: #195424). + - Fix ICE on arm compiling fftw (closes: #186185). + - Fix ICE on arm in change_address_1, affecting a few packages. + Closes: #197099. + - Fix ICE in merge_assigned_reloads building Linux 2.4.2x sched.c. + Closes: #195237. + - Do not warn about failing to inline functions declared in system headers. + Closes: #193049. + - Fix ICE on mips{,el} in propagate_one_insn (closes: #194330, #196091). + - Fix ICE on m68k in reg_overlap_mentioned_p (closes: #194749). + - Build crtbeginT.o on m68k (closes: #197613). + * Fix g++ man page symlink (closes: #196271). + * mips/mipsel: Depend on binutils (>= 2.14.90.0.4). Closes: #196744. + * Disable treelang on powerpc (again). Closes: #196915. + * Pass -encoding in gcj-wrapper. + + -- Matthias Klose Fri, 27 Jun 2003 00:14:43 +0200 + +gcc-3.3 (1:3.3ds9-3) unstable; urgency=low + + * Closing more reports, fixed in 3.2/3.3: + - ICE building texmacs on m68k (closes: #177433). + - libstdc++: doesn't define trunc(...) (closes: #105285). + - libstdc++: setw is ignored for strings output (closes: #52382, #76645). + * Add build support to omit the manual pages and info docs from the + packages, disabled by default. Wait for a Debian statement, which can + be cited. Adresses: #193787. + * Reenable the m68k-const patch, don't run the g77 testsuite on m68k. + Addresses ICEs (#177840, #190818). + * Update arm-xscale patch. + * libstdc++: use __attribute__(__unknown__), instead of (unknown). + Closes: #195796. + * Build-Depend on glibc (>= 2.3.1) to prevent incorrect builds on woody. + Request from Adrian Bunk. + * Add treelang-update patch (Tim Josling), reenable treelang on powerpc. + * Add -{cpp,gcc,g++,gcj,g77} symlinks (addresses: #189466). + * Make sure not to build using binutils-2.14.90.0.[12]. + + -- Matthias Klose Mon, 2 Jun 2003 22:35:45 +0200 + +gcc-3.3 (1:3.3ds9-2) unstable; urgency=medium + + * Correct autoconf-related snafu in newly added ARM patches (Phil Blundell). + * Correct libgcc1 dependency (closes: #193689). + * Work around ldd/dpkg-shlibs failure on s390x. + + -- Matthias Klose Sun, 18 May 2003 09:40:15 +0200 + +gcc-3.3 (1:3.3ds9-1) unstable; urgency=low + + * gcc-3.3 final release. + See /usr/share/doc/gcc-3.3/NEWS.{gcc,html}. + * First merge of i386/x86-64 biarch support (Arnd Bergmann). + Disabled by default. Closes: #190066. + * New gpc-20030507 version. + * Upstream gpc update to fix netbsd build failure (closes: #191407). + * Add arm-xscale.dpatch, arm-10730.dpatch, arm-tune.dpatch, copied + from gcc-3.2 (Phil Blundell). + * Closing bug reports reported against older gcc versions (some of them + still present in Debian, but not anymore as the default compiler). + Usually, forwarded bug reports are linked to + http://gcc.gnu.org/PR + The upstream bug number usually can be found in the Debian reports. + + * Closed reports reported against gcc-3.1.x, gcc-3.2.x and fixed in gcc-3.3: + - General: + + GCC accepts multi-line strings without \ or " " &c (closes: #2910). + + -print-file-name sometimes fails (closes: #161615). + + ICE: reporting routines re-entered (closes: #179597, #180937). + + Misplaced paragraph in gcc documentation (closes: #179363). + + Error: suffix or operands invalid for `div' (closes: #150558). + + builtin memcmp() could be optimised (closes: #85535). + - Ada: + + Preelaborate, exceptions, and -gnatN (closes: #181679). + - C: + + Duplicate loop conditions even with -Os (closes: #94701). + + ICE (signal 11) (closes: #65686). + - C++: + + C++ error on virtual function which uses ... (closes: #165829). + + ICE when warning about cleanup nastiness in switch statements + (closes: #184108). + + Fails to compile virtual inheritance with variable number of + argument method (closes: #151357). + + xmmintrin.h broken for c++ (closes: #168310). + + Stack corruption with variable-length automatic arrays and virtual + destructors (closes: #188527). + + ICE on illegal code (closes: #184862). + + _attribute__((unused)) is ignored in C++ (closes: #45440). + + g++ handles &(void *)foo bizzarely (closes: #79225). + + ICE (with wrong code, though) (closes: #81122). + - Java: + + Broken zip file handling (closes: #180567). + - ObjC: + + @protocol forward definitions do not work (closes: #80468). + - Architecture specific: + - alpha + + va_start is off by one (closes: #186139). + + ICE while building kseg/ddd (closes: #184753). + + g++ -O2 optimization error (closes: #70743). + - arm + + ICE with -O2 in change_address_1 (closes: #180750). + + gcc optimization error with -O2, affecting bison (closes: #185903). + - hppa + + ICE in insn_default_length (closes: #186447). + - ia64 + + gcc-3.2 fails w/ optimization (closes: #178830). + - i386 + + unnecessary generation of instruction cwtl (closes: #95318). + + {athlon} ICE building mplayer (closes: #184800). + + {pentium4} ICE while compiling mozilla with -march=pentium4 + (closes: #187910). + + i386 optimisation: joining tests (closes: #105309). + - m68k + + ICE in instantiate_virtual_regs_1 (closes: #180493). + + gcc optimizer bug on m68k (closes: #64832). + - powerpc + + ICE in extract_insn, at recog.c:2175 building php3 (closes: #186299). + + ICE with -O -Wunreachable-code (closes: #189702). + - s390 + + Operand out of range at assembly time when using -O2 + (closes: #178596). + - sparc + + gcc-3.2 regression (wrong code) (closes: #176387). + + ICE in mem_loc_descriptor when optimizing (closes: #178909). + + ICE in gen_reg_rtx when optimizing (closes: #178965). + + Optimisation leads to unaligned access in memcpy (closes: #136659). + + * Closed reports reported against gcc-3.0 and fixed in gcc-3.2.x: + - General: + + Use mkstemp instead of mktemp (closed: #127802). + - Preprocessor: + + Fix redundant error message from cpp (closed: #100722). + - C: + + Optimization issue on ix86 (pointless moving) (closed: #97904). + + Miscompilation of allegro on ix86 (closed: #105741). + + Fix generation of ..ng references for static aliases (alpha-linux). + (closed: #108036). + + ICE compiling pari on hppa (closed: #111613). + + ICE on ia64 in instantiate_virtual_regs_1 (closed: #121668). + + ICE in c-typeck.c (closed: #123687). + + ICE in gen_subprogram_die on alpha (closed: #127890). + + SEGV in initialization of flexible char array member (closed: #131399). + + ICE on arm compiling lapack (closed: #135967). + + ICE in incomplete_type_error (closed: #140606). + + Fix -Wswitch (also part of -Wall) (closed: #140995). + + Wrong code in mke2fs on hppa (closed: #150232). + + sin(a) * sin(b) gives wrong result (closed: #164135). + - C++: + + Error in std library headers on arm (closed: #107633). + + ICE nr. 19970302 (closed: #119635). + + std::wcout does not perform encoding conversions (closed: #128026). + + SEGV, when compiling iostream.h with -fPIC (closed: #134315). + + Fixed segmentation fault in included code for (closed: #137017). + + Fix with exception handling and -O (closed: #144232). + + Fix octave-2.1 build failure on ia64 (closed: #144584). + + nonstandard overloads in num_get facet (closed: #155900). + + ICE in expand_end_loop with -O (closed: #158371). + - Fortran: + + Fix blas build failure on arm (closed: #137959). + - Java: + + Interface members are public by default (closed: #94974). + + Strange message with -fno-bounds-check in combination with -W. + (closed: #102353). + + Crash in FileWriter using IOException (closed: #116128). + + Fix ObjectInputStream.readObject() calling constructors. + (closed: #121636). + + gij: better error reporting on `class not found' (closed: #125649). + + Lockup during .java->.class compilation (closed: #141899). + + Compile breaks using temporary inner class instance (closed: #141900). + + Default constructor for inner class causes broken bytecode. + (closed: #141902). + + gij-3.2 linked against libgcc1 (closed: #165180). + + gij-wrapper understands -classpath parameter (closed: #146634). + + gij-3.2 doesn't ignore -jar when run as "java" (closed: #167673). + - ObjC: + + ICE on alpha (closed: #172353). + + * Closed reports reported against gcc-2.95 and fixed in newer versions: + - General: + + Undocumented option -pthread (closes: #165110). + + stdbool.h broken (closes: #167439). + + regparm/profiling breakage (closes: #20695). + + another gcc optimization error (closes: #51456). + + ICE in `output_fix_trunc' (closes: #55967). + + Fix "Unable to generate reloads for" (closes: #58219, #131890). + + gcc -c -MD x/y.c -o x/y.o leaves y.d in cwd (closes: #59232). + + Compiler error with -O2 (closes: #67631). + + ICE (unrecognizable insn) compiling php4 (closes: #83550, #84969). + + Another ICE (closes: #90666). + + man versus info inconsistency (-W and -Wall) (closes: #93708). + + ICE on invalid extended asm (closes: #136630). + + ICE in `emit_no_conflict_block' compiling perl (closes: #154599). + + ICE in `gen_tagged_type_instantiation_die'(closes: #166766). + + ICE on __builtin_memset(s, 0, -1) (closes: #170994). + + -Q option to gcc appears twice in the documentation (closes: #137382). + + New options for specifying targets:- -MQ and -MT (closes: #27878). + + Configure using --enable-nls (closes: #51651). + + gcc -dumpspecs undocumented (closes: #65406). + - Preprocessor: + + cpp fails to parse macros with varargs correctly(closes: #154767). + + __VA_ARGS__ stringification crashes preprocessor if __VA_ARGS__ is + empty (closes: #152709). + + gcc doesn't handle empty args in macro function if there is only + one arg(closes: #156450). + - C: + + Uncaught floating point exception causes ICE (closes: #33786). + + gcc -fpack-struct doesn't pack structs (closes: #64628). + + ICE in kernel (matroxfb) code (closes: #151196). + + gcc doesn't warn about unreachable code (closes: #158704). + + Fix docs for __builtin_return_address(closes: #165992). + + C99 symbols in limits.h not defined (closes: #168346). + + %zd printf spec generates warning, even in c9x mode (closes: #94891). + + Update GCC attribute syntax (closes: #12253, #43119). + - C++ & libstdc++-v3: + + template and virtual inheritance bug (closes: #152315). + + g++ has some troubles with nested templates (closes: #21255). + + vtable thunks implementation is broken (closes: #34876, #35477). + + ICE for templated friend (closes: #42662). + + ICE compiling mnemonic (closes: #42989). + + Deprecated: result naming doesn't work for functions defined in a + class (closes: #43170). + + volatile undefined ... (closes: #50529). + + ICE concerning templates (closes: #53698). + + Program compiled -O3 -malign-double segfaults in ofstream::~ofstream + (closes: #56867). + + __attribute__ ((constructor)) doesn't work with C++ (closes: #61806). + + Another ICE (closes: #65687). + + ICE in `const_hash' (closes: #72933). + + ICE on illegal code (closes: #83221). + + Wrong code with -O2 (closes: #83363). + + ICE on template class (closes: #85934). + + No warning for missing return in non-void member func (closes: #88260). + + Not a bug/fixed in libgcc1: libgcc.a symbols end up exported by + shared libraries (closes: #118670). + + ICE using nested templates (closes: #118781). + + Another ICE with templates (closes: #127489). + + More ICEs (closes: #140427, #141797). + + ICE when template declared after use(closes: #148603). + + template function default arguments are not handled (closes: #157292). + + Warning when including stl.h (closes: #162074). + + g++ -pedantic-errors -D_GNU_SOURCE cannot #include + (closes: #151671). + + c++ error message improvement suggestion (closes: #46181). + + Compilation error in stl_alloc.h with -fhonor-std (closes: #59005). + + libstdc++ has no method at() in stl_= (closes: #68963). + - Fortran: + + g77 crash (closes: #130415). + - ObjC: + + ICE: program cc1obj got fatal signal 11 (closes: #62309). + + Interface to garbage collector is undocumented. (closes: #68987). + - Architecture specific: + - alpha + + Can't compile with define gnu_source with stdio and curses + (closes: #97603). + + Header conflicts on alpha (closes: #134558). + + lapack-dev: cannot link on alpha (closes: #144602). + + ICE `fixup_var_refs_1' (closes: #43001). + + Mutt segv on viewing list of attachments (closes: #47981). + + ICE building open-amulet (closes: #48530). + + ICE compiling hatman (closes: #55291). + + dead code removal in switch() broken (closes: #142844). + - arm + + Miscompilation using -fPIC on arm (closes: #90363). + + infinite loop with -O on arm (closes: #151675). + - i386 + + ICE when using -mno-ieee-fp and -march=i686 (closes: #87540). + - m68k + + Optimization (-O2) broken on m68k (closes: #146006). + - mips + + g++ exception catching does not work... (closes: #105569). + + update-menus gets Bus Error (closes: #120333). + - mipsel + + aspell: triggers ICE on mipsel (closes: #128367). + - powerpc + + -O2 produces wrong code (gnuchess example) (closes: #131454). + - sparc + + Misleading documentation for -malign-{jump,loop,function}s + (closes: #114029). + + Sparc GCC issue with -mcpu=ultrasparc (closes: #172956). + + flightgear: build failure on sparc (closes: #88694). + + -- Matthias Klose Fri, 16 May 2003 07:13:57 +0200 + +gcc-3.3 (1:3.3ds8-0pre9) unstable; urgency=high + + * gcc-3.3 second prerelease. + - Fixing exception handling on s390 (urgency high). + * Reenabled gpc build (I had it disabled ...). Closes: #192347. + + -- Matthias Klose Fri, 9 May 2003 07:32:14 +0200 + +gcc-3.3 (1:3.3ds8-0pre8) unstable; urgency=low + + * gcc-3.3 prerelease. + - Fixes gcj ICE (closes: #189545). + * For libstdc++ use the i486 atomicity implementation, introduced with + 0pre6, left out in 0pre7 (closes: #191684). + * Add README.Debian for treelang (closes: #190812). + * Apply NetBSD changes (Joel Baker). Closes: #191551. + * New symbols in libgcc1, tighten the shlibs dependency. + * Disable testsuite run on mips/mipsel because of an outdated libc-dev + package. + * Do not build libffi with debug information, although configuring + with --enable-debug. + + -- Matthias Klose Tue, 6 May 2003 06:53:49 +0200 + +gcc-3.3 (1:3.3ds7-0pre7) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030429). + * Revert upstream libstdc++ change (closes: #191145, #191147, #191148, + #191149, #149159, #149151, and other reports). + Sorry for not detecting this before the upload, seems to be + broken on i386 "only". + * hurd-i386: Use /usr/include, not /include. + * Disable gpc on hurd-i386 (closes: #189851). + * Disable building the debug version of libstdc++ on powerpc-linux + (fixes about 200 java test cases). + * Install libstdc++v3 man pages (closes: #127263). + + -- Matthias Klose Tue, 29 Apr 2003 23:28:44 +0200 + +gcc-3.3 (1:3.3ds6-0pre6) unstable; urgency=high + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030426). + * libstdc++-doc: Fix index.html link (closes: #189424). + * Revert back to the i486 atomicity implementation, that was used + for gcc-3.2 as well. Reopens: #184446, #185662. Closes: #189983. + For this reason, tighten the libstdc++5 shlibs dependency. See + http://lists.debian.org/debian-devel/2003/debian-devel-200304/msg01895.html + Don't build the ix86 specfic libstdc++ libs anymore. + + -- Matthias Klose Sun, 27 Apr 2003 19:47:54 +0200 + +gcc-3.3 (1:3.3ds5-0pre5) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030415). + * Disable treelang on powerpc. + * Disable gpc on m68k. + * Install locale data. Conflict with gcc-3.2 (<= 1:3.2.3-0pre8). + * Fix generated bits/atomicity.h (closes: #189183). + * Tighten libgcc1 shlibs dependency (new symbol _Unwind_Backtrace). + + -- Matthias Klose Wed, 16 Apr 2003 00:37:05 +0200 + +gcc-3.3 (1:3.3ds4-0pre4) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030412). + * Avoid sparc64 dependencies for libgcc1 on sparc (Clint Adams). + * Make the default sparc 32bit target v8 instead of v7. This mainly + enables hardmul, which should speed up v8 and v9 systems by a large + margin (Ben Collins). + * Tighten binutils dependency for sparc. + * On i386, build libstdc++ optimized for i486 and above. The library + in /usr/lib is built for i386. Closes: #184446, #185662. + * Add gpc build (from gcc-snapshot package). + * debian/control: Include all packages, that _can_ be built from + this source package (except the cross packages). + * Add m68k patches: m68k-const, m68k-subreg, m68k-loop. + * Run the 3.3 testsuite a second time with the installed gcc-3.2 + to check for regressions (promised, only this time, and for the + final release ;). Add build dependencies (gobjc-3.2, g77-3.2, g++-3.2). + + -- Matthias Klose Sat, 12 Apr 2003 10:11:11 +0200 + +gcc-3.3 (1:3.3ds3-0pre3) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030331). + * Reenable java on arm. + * Build-Depend on binutils-2.13.90.0.18-1.3 on m68k. Fixes all + bprob/gcov testsuite failures. + * Enable C++ build on arm. + * Enable the sparc64 build. + + -- Matthias Klose Mon, 31 Mar 2003 23:24:54 +0200 + +gcc-3.3 (1:3.3ds2-0pre2) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030317). + * Disable building the gcc-3.3-nof package. + * Disable Ada on mips and mipsel. + * Remove the workaround to build Ada on powerpc. + * Add GNU Free documentation license to copyright file. + * Update the sparc64 build patches (Clint Adams). Not yet enabled. + * Disable C++ on arm (Not yet tested). + * Add fix for ICE on powerpc (see: #184684). + + -- Matthias Klose Sun, 16 Mar 2003 21:40:57 +0100 + +gcc-3.3 (1:3.3ds1-0pre1) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030310). + * Add gccbug manpage. + * Don't build libgnat package (no shared library). + * Configure with --enable-sjlj-exceptions on hppa and m68k for + binary compatibility with libstdc++ built with gcc-3.2. + * Disable Java on arm-linux (never seen it sucessfully bootstrap). + * Install non-conflicting baseline README. + * multilib *.so and *.a moved to /usr/lib/gcc-lib/... , so that several + compiler versions can be installed concurrently. + * Remove libstdc++-incdir patch applied upstream. + * libstdc++ 64 bit development files now handled in -dev target. + (Gerhard Tonn) + * Drop build dependencies for gpc (tetex-bin, help2man, libncurses5-dev). + * Add libstdc++5-3.3-dev confict to libstdc++5-dev (<= 1:3.2.3-0pre3). + * Enable builds on m68k (all but C++ for the moment). gcc-3.3 bootstraps, + while gcc-3.2 doesn't. + + -- Matthias Klose Mon, 10 Mar 2003 23:41:00 +0100 + +gcc-3.3 (1:3.3ds0-0pre0) unstable; urgency=low + + * First gcc-3.3 package, built for s390 only. All other architectures + build the gcc-3.3-base package only. + To build the package on other architectures, edit debian/rules.defs + (macro no_dummy_archs). + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030301). + * Don't include the gcc locale files (would conflict with 3.2). + * Remove libffi-install-fix patch. + * Fix netbsd-i386 patches. + * Change priority of libstdc++5 and gcc-3.2-base to important. + * Install gcjh-wrapper for javah. + * gij suggests fastjar, gcj recommends fastjar. + * Allow builds using automake1.4 | automake (<< 1.5). + * Backport fix for to output more correct line numbers. + * Add help2man to build dependencies needed for some gpc man pages. + * gpc: Install binobj and gpidump binaries and man pages. + * Apply cross compilation patches submitted by Bastian Blank. + * Replace s390-biarch patch and copy s390-config-ml patch from 3.2 + (Gerhard Tonn). + * Configure using --enable-debug. + * Add infrastructure to only build a subset of binary packages. + * Rename libstdc++-{dev,dbg,pic,doc} packages. + * Build treelang compiler. + + -- Matthias Klose Sat, 1 Mar 2003 12:56:42 +0100 + +gcc-3.2 (1:3.2.3ds2-0pre3) unstable; urgency=low + + * gcc-3.2.3 prerelease (CVS 20030228) + - Fixes bootstrap failure on alpha-linux. + - Fixes ICE on m68k (closes: #177016). + * Build Pascal with -O1 on powerpc, disable Pascal on arm, m68k and + sparc (due to wrong code generation for fwrite in glibc, + see PR optimization/9279). + * Apply cross compilation patches submitted by Bastian Blank. + + -- Matthias Klose Fri, 28 Feb 2003 20:26:30 +0100 + +gcc-3.2 (1:3.2.3ds1-0pre2) unstable; urgency=medium + + * gcc-3.2.3 prerelease (CVS 20030221) + - Fixes ICE on hppa (closes: #181813). + * Patch for ffitest in s390-java.dpatch deleted, since already fixed + upstream. (Gerhard Tonn) + * Build crtbeginT.o on m68k-linux (closes: #179807). + * Install gcjh-wrapper for javah (closes: #180218). + * gij suggests fastjar, gcj recommends fastjar (closes: #179298). + * Allow builds using automake1.4 | automake (<< 1.5) (closes: #180048). + * Backport fix for to output more correct line numbers (closes: #153965). + * Add help2man to build dependencies needed for some gpc man pages. + * gpc: Install binobj and gpidump binaries and man pages. + * Disable gpc on arm due to wrong code generation for fwrite in + glibc (see PR optimization/9279). + + -- Matthias Klose Sat, 22 Feb 2003 19:58:20 +0100 + +gcc-3.2 (1:3.2.3ds0-0pre1) unstable; urgency=low + + * gcc-3.2.3 prerelease (CVS 20030210) + - Fixes long millicode calls on hppa (closes: #180520) + * New gpc-20030209 version. Remove gpc-update.dpatch and gpc-testsuite.dptch + as they are no longer needed. + * Fix netbsd-i386 patches (closes: #180129, #179931) + * m68k-bootstrap.dpatch: backport gcse.c changes from 3.3/MAIN to 3.2 + * Change priority of libstdc++5 and gcc-3.2-base to important. + + -- Ryan Murray Tue, 11 Feb 2003 06:18:09 -0700 + +gcc-3.2 (1:3.2.2ds8-1) unstable; urgency=low + + * gcc-3.2.2 release. + - Fixes ICE, regression from 2.95 (closes: #176117). + - Fixes ICE, regression from 2.95 (closes: #179161). + * libstdc++ for biarch installs now upstream to usr/lib64, + therefore mv usr/lib/64 usr/lib64 no longer necessary. (Gerhard Tonn) + + -- Ryan Murray Wed, 5 Feb 2003 01:35:29 -0700 + +gcc-3.2 (1:3.2.2ds7-0pre8) unstable; urgency=low + + * gcc-3.2.2 prerelease (CVS 20030130). + * update s390 libffi patch + * debian/control: add myself to uploaders and change libc12-dev depends to + libc-dev on i386 (closes: #179128) + * Build-Depend on procps so that ps is available for logwatch + + -- Ryan Murray Fri, 31 Jan 2003 04:00:15 -0700 + +gcc-3.2 (1:3.2.2ds6-0pre7) unstable; urgency=low + + * gcc-3.2.2 prerelease (CVS 20030128). + - Update needed for hppa. + - Fixes ICE on arm, regression from 2.95.x (closes: #168086). + - Can use default bison (1.875). + * Apply netbsd build patches (closes: #177674, #178328, #178325, + #178326, #178327). + * Run the logwatch script on "slow" architectures (arm, m68k) only. + * autoreconf.dpatch: Only update libtool.m4, which is newer conceptually + than libtool 1.4 (Ryan Murray). + * Apply autoreconf patch universally (Ryan Murray). + * More robust gij/gcj wrapper scripts, include /usr/lib/jni in default + JNI search path (Ben Burton). Closes: #167932. + * Build crtbeginT.o on m68k (closes: #177036). + * Fixed libc-dev source dependency (closes: #178602). + * Tighten shlib dependency to the current package version; should be + 1:3.2.2-1 for the final release (closes: #178867). + + -- Matthias Klose Tue, 28 Jan 2003 21:59:30 +0100 + +gcc-3.2 (1:3.2.2ds5-0pre6) unstable; urgency=low + + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20030123). + * Build locales needed by the libstdc++ testsuite. + * Update config.{guess,sub} files from autotools-dev (closes: #177674). + * Disable Ada and Java on netbsd-i386 (closes: #177679). + * gnat: Add suggests for gnat-doc and ada-reference-manual. + + -- Matthias Klose Thu, 23 Jan 2003 22:16:53 +0100 + +gcc-3.2 (1:3.2.2ds4-0pre5.1) unstable; urgency=low + + * Readd build dependency `locales' on arm. locales is now installable + * Add autoreconf patch for mips{,el}. (closes: #176311) + + -- Ryan Murray Wed, 22 Jan 2003 14:31:14 -0800 + +gcc-3.2 (1:3.2.2ds4-0pre5) unstable; urgency=low + + * Remove build dependency `libc6-dev-sparc64 [sparc]' for now. + * Remove build dependency `locales' on arm. locales is uninstallable + on arm due to the missing glibc-2.3. + * Use bison-1.35. bison-1.875 causes an hard error on the reduce/reduce + conflict in objc-parse.y. + + -- Matthias Klose Fri, 10 Jan 2003 10:10:43 +0100 + +gcc-3.2 (1:3.2.2ds4-0pre4) unstable; urgency=low + + * Try building with gcc-2.95 on m68k-linux. Building gcc-3.2 with gcc-3.2 + does not work for me. m68k-linux doesn't look good at all ... + * Fix s390 build error. + * Add locales to build dependencies. A still unsolved issue is the + presence of the locales de_DE, en_PH, en_US, es_MX, fr_FR and it_IT, + or else some tests in the libstdc++ testsuite will fail. + * Put all -nof files in the -nof package (closes: #175253). + * Correctly exit logwatch script (closes: #175251). + * Install linker-map.gnu file for libstdc++_pic (closes: #175144). + * Install versioned gpcs docs only (closes: #173844). + * Include gpc test results in gpc package. + * Link local libstdc++ documentation to local source-level documentation. + * Clarify libstdc++ description (so version and library version). + Closes: #175799. + * Include library in libstdc++-dbg package (closes: #176005). + + -- Matthias Klose Wed, 8 Jan 2003 23:39:50 +0100 + +gcc-3.2 (1:3.2.2ds3-0pre3) unstable; urgency=low + + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021231). + - Fix loop count computation for preconditioned unrolled loops. + Closes: #162919. + - Fix xmmintrin.h (_MM_TRANSPOSE4_PS) CVS 20021027 (closes: #163647). + - Fix [PR 8601] strlen/template interaction causes ICE CVS 20021201. + Closes: #166143. + * Watch the log files, which are written during the testsuite runs and print + out a message, if there is still activity. No more buildd timeouts on arm + and m68k ... + * Remove gpc's reference to librx1g-dev package (closes: #172953). + * Remove trailing dots on package descriptions. + * Fix external reference to cpp.info in gcc.info (closes: #174598). + + -- Matthias Klose Tue, 31 Dec 2002 13:47:52 +0100 + +gcc-3.2 (1:3.2.2ds2-0pre2) unstable; urgency=medium + + * Friday, 13th upload, so what do you expect ... + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021212). + * Fix gnat build (autobuild maintainers: please revert back to gnat-3.2 + (<= 1:3.2.1ds6-1) for building gnat-3.2, if the build fails building + gnatlib and gnattools). + * Really disable sparc64 support. + + -- Matthias Klose Fri, 13 Dec 2002 00:26:37 +0100 + +gcc-3.2 (1:3.2.2ds1-0pre1) unstable; urgency=low + + * A candidate for the transition ... + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021210). + - doc/invoke.texi: Remove last reference to -a (closes: #171748). + * Disable sparc64 support. For now please use egcs64 to build sparc64 + kernels. + * Disable Pascal on the sparc architecture (doesn't bootstrap). + + -- Matthias Klose Tue, 10 Dec 2002 22:33:13 +0100 + +gcc-3.2 (1:3.2.2ds0-0pre0) unstable; urgency=low + + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021202). + - Should fix _Pragma expansion within macros (closes: #157416). + * New gpc-20021128 version. Run check using EXTRA_TEST_PFLAGS=-g0 + * Add tetex-bin to build dependencies (gpc needs it). Closes: #171203. + + -- Matthias Klose Tue, 3 Dec 2002 08:22:33 +0100 + +gcc-3.2 (1:3.2.1ds6-1) unstable; urgency=low + + * gcc-3.2.1 final release. + * Build gpc-20021111 for all architectures. hppa and i386 are + known to work. For the other architectures, send the usual FTBFS ... + WARNING: this gpc version is an alpha version, especially debug info + doesn't work well, so use -g0 for compiling. If you need a stable + gpc compiler, use gpc-2.95. + * Encode the gpc upstream version in the package name, the gpc release + date in the version number (requested by gpc upstream). + * Added libncurses5-dev and libgmp3-dev as build dependencies for the + gpc tests and runtime. + * Clean CVS files as well (closes: #169101). + * s390-biarch.dpatch added, backported from CVS (Gerhard Tonn). + * s390-config-ml.dpatch added, disables biarch for java, + libffi and boehm-gc on s390. They need a 64 bit runtime + during build which is not yet available on s390 (Gerhard Tonn). + * Biarch support for packaging adapted (Gerhard Tonn). + biarch variable added and with-sparc64 variable substituted in + most places by biarch. + dh_shlibdeps is applied only to 32 bit libraries on s390, since + ldd for 64 bit libraries don't work on 32 bit runtime. + Build dependency to libc6-dev-s390x added. + + -- Matthias Klose Wed, 20 Nov 2002 00:20:58 +0100 + +gcc-3.2 (1:3.2.1ds5-0pre6) unstable; urgency=medium + + * gcc-3.2.1 prerelease. + * Removed arm patch integrated upstream. + * Adjust gnat build dependency (closes: #167116). + * Always configure with --enable-clocale=gnu. The autobuilders do have + locales installed, but not generated the "de_DE" locale needed for + the autoconf test in libstdcc++-v3/aclocal.m4. + * libstdc++ documentaion: Don't compresss '*.txt' referenced by html pages. + + -- Matthias Klose Tue, 12 Nov 2002 07:19:44 +0100 + +gcc-3.2 (1:3.2.1ds4-0pre5) unstable; urgency=medium + + * gcc-3.2.1 snapshot (CVS 20021103). + * sparc64-build.dpatch: Updated. Lets sparc boostrap again. + * s390-loop.dpatch removed, already fixed upstream (Gerhard Tonn). + * bison.dpatch: Removed, patch submitted upstream. + * backport-java-6865.dpatch: Apply again during build. + * Tighten glibc dependency (closes: #166703). + + -- Matthias Klose Sun, 3 Nov 2002 12:22:02 +0100 + +gcc-3.2 (1:3.2.1ds3-0pre4) unstable; urgency=high + + * gcc-3.2.1 snapshot (CVS 20021020). + - Expansion of _Pragma within macros fixed (closes: #157416). + * FTBFS: With the switch to bison-1.50 (and 1.75), gcc-3.2 fails to build from + source on Debian unstable systems. This is fixed in gcc HEAD, but not on + the current release branch. + HELP NEEDED: + - check what is missing from the patches in debian/patches/bison.dpatch. + This is a backport of the bison related patches, but showing regressions + in the gcc testsuite, so it cannot be applied. + - build gcc using byacc (bootstrap currently fails using byacc). + - build bison-1.35 in it's own package (the current 1.35-3 package fails + to build form source). + - and finally ask upstream to backport the patch to the branch. It's not + helpful not beeing able to follow the stable branch. Maybe we should + just switch to gcc HEAD as BSD does ... + As a terrible workaround, build the sources from CVS first on a machine, + with bison-1.35 installed, then package the tarball, so the bison + generated files are not rebuilt. + + * re-add lost patch: configure with --enable-__cxa_atexit (closes: #163422), + Therefore urgency high. + * gcj-wrapper, gij-wrapper: Accept names starting with `.' (closes: #163172, + #164009). + * Point g++ manpage to correct g++ version (closes: #162843). + * Support for i386-freebsd-gnu (closes: #163883). + * s390-java.dpatch replaced with backport from cvs head (Gerhard Tonn). + * Disable the testsuite run on the Hurd (closes: #159650). + * s390-loop.dpatch added, fixes runtime problem (Gerhard Tonn). + * debian/patches/bison.dpatch: Backport for bison-1.75 compatibility. + Don't use it due to regressions. + * debian/patches/backport-java-6865.dpatch: Directly applied in the + included tarball because of bison problems. + * Make fixincludes priority optional, so linda can depend on it. + * Tighten binutils dependency. + + -- Matthias Klose Sun, 20 Oct 2002 10:52:49 +0200 + +gcc-3.2 (1:3.2.1ds2-0pre3) unstable; urgency=low + + * gcc-3.2.1 snapshot (CVS 20020923). + * Run the libstdc++ check-abi script. Results are put into the file + /usr/share/doc/libstdc++5/README.libstdc++-baseline in the libstdc++5-dev + package. This file contains a new baseline, if no baseline for this + architecture is included in the gcc sources. + * gcj-wrapper: Accept files starting with an underscore, accept + path names (closes: #160859, #161517). + * Explicitely call automake-1.4 when rebuilding Makefiles (closes: #161438). + * Let installed fixincludes script find files in /usr/lib/fixincludes. + * debian/rules.patch: Add .NOTPARALLEL as target, so that patches are + applied sequentially (closes: #159395). + + -- Matthias Klose Tue, 24 Sep 2002 07:36:56 +0200 + +gcc-3.2 (1:3.2.1ds1-0pre2) unstable; urgency=low + + * gcc-3.2.1 snapshot (CVS 20020913). Welcome back m68k in bootstrap land! + * Fix arm-tune.dpatch (closes: #159354). + * Don't overwrite LD_LIBRARY_PATH in build (closes: #158459). + * --disable-__cxa_atexit on NetBSD (closes: #159620). + * Reenable installation of message catalogs (disabled in 3.2-0pre2). + Closes: #160175. + * Ben Collins + - Re-enable sparc64 build. This time, it's part of the default compiler. + I have disabled 64/alt libraries as they are too much overhead. All + libraries build 64bit, but currently only libgcc/libstdc++ include the + 64bit libraries. + Closes: #160404. + * Depend on autoconf2.13, instead of autoconf. + * Phil Blundell + - debian/patches/arm-update.dpatch: Fix python2.2 build failure. + + -- Matthias Klose Sat, 7 Sep 2002 08:05:02 +0200 + +gcc-3.2 (1:3.2.1ds0-0pre1) unstable; urgency=medium + + * gcc-3.2.1 snapshot (CVS 20020829). + New g++ option -Wabi: + Warn when G++ generates code that is probably not compatible with the + vendor-neutral C++ ABI. Although an effort has been made to warn about + all such cases, there are probably some cases that are not warned about, + even though G++ is generating incompatible code. There may also be + cases where warnings are emitted even though the code that is generated + will be compatible. + The current version of the ABI is 102, defined by the __GXX_ABI_VERSION + macro. + * debian/NEWS.*: Updated. + * Fix libstdc++-dev dependency on libc-dev for the Hurd (closes: #157004). + * Add versioned expect build dependency. + * Tighten binutils dependency to 2.13.90.0.4. + * debian/patches/arm-tune.dpatch: Increase stack limit for configure. + * 3.2-0pre4 did build gnat-3.2 compilers for all architectures. Build-Depend + on gnat-3.2 now (closes: #156734). + * Remove bashism's in gcj-wrapper (closes: #157982). + * Add -cp and -classpath options to gij(1). Backport from HEAD (#146634). + * Add fastjar documentation. + + -- Matthias Klose Fri, 30 Aug 2002 10:35:00 +0200 + +gcc-3.2 (1:3.2ds0-0pre4) unstable; urgency=low + + * Correct build dependency on gnat-3.1. + + -- Matthias Klose Mon, 12 Aug 2002 01:21:58 +0200 + +gcc-3.2 (1:3.2ds0-0pre3) unstable; urgency=low + + * gcc-3.2 upstream prerelease. + * Disable all configure options, which are standard: + --enable-threads=posix --enable-long-long, --enable-clocale=gnu + + -- Matthias Klose Fri, 9 Aug 2002 21:59:08 +0200 + +gcc-3.2 (1:3.2ds0-0pre2) unstable; urgency=low + + * gcc-3.2 snapshot (CVS 20020802). + * Fix g++-include dir. + * Don't install the locale files (temporarily, until we don't build + gcc-3.1 anymore). + * New package libgcj-common to avoid conflict with classpath package. + + -- Matthias Klose Sat, 3 Aug 2002 09:08:34 +0200 + +gcc-3.2 (1:3.2ds0-0pre1) unstable; urgency=low + + * gcc-3.2 snapshot (CVS 20020729). + + -- Matthias Klose Mon, 29 Jul 2002 20:36:54 +0200 + +gcc-3.1 (1:3.1.1ds3-1) unstable; urgency=low + + * gcc-3.1.1 release. Following this release we will have a gcc-3.2 + release soon, which is gcc-3.1.1 plus some C++ ABI changes. Once + gcc-3.2 hits the archives, gcc-3.1.1 will go away. + * Don't build the sparc64 compiler. The packaging/patches are + currently broken. + * Add missing headers on m68k and powerpc. + * Install libgcc_s_nof on powerpc. + * Install libffi's copyright and doc files (closes: #152198). + * Remove dangling symlink (closes: #149002). + * libgcj3: Add a conflict to the classpath package (closes: #148664). + * README.C++: Fix URLs. + * libstdc++-dbg: Install into /usr/lib/debug, document it. + * backport-java-6865.dpatch: backport from HEAD. + * Fix typo in gcj docs (closes: #148890). + * Change libstdc++ include dir: /usr/include/c++/3.1. + * libstdc++-codecvt.dpatch: New patch (closes: #149776). + * Build libstdc++-pic package. + * Move 64bit libgcc in its own package libgcc1-64 (closes: #147249). + * Tighten glibc dependency. + + -- Matthias Klose Mon, 29 Jul 2002 00:34:49 +0200 + +gcc-3.1 (1:3.1.1ds2-0pre3) unstable; urgency=low + + * Updated to CVS 2002-06-06 (gcc-3_1-branch). + * Updated s390-java patch (Gerhard Tonn). + * Don't use -O in STAGE1_FLAGS on m68k. + * Fix `-classpath' option in gcj-wrapper script (closes: #150142). + * Remove g++-cxa-atexit patch, use --enable-__cxa_atexit configure option. + + -- Matthias Klose Wed, 3 Jul 2002 23:52:58 +0200 + +gcc-3.1 (1:3.1.1ds1-0pre2) unstable; urgency=low + + * Updated to CVS 2002-06-06 (gcc-3_1-branch), fixing an ObjC regression. + * Welcome m68k to bootstrap land (thanks to Andreas Schwab). + * Add javac wrapper for gcj-3.1 (Michael Koch). + * Remove dangling symlink in /usr/share/doc/gcc-3.1 (closes: #149002). + + -- Matthias Klose Fri, 7 Jun 2002 00:26:05 +0200 + +gcc-3.1 (1:3.1.1ds0-0pre1) unstable; urgency=low + + * Updated to CVS 2002-05-31 (gcc-3_1-branch). + * Change priorities from fastjar and gij-wrapper-3.1 from 30 to 31. + * Update arm-tune patch. + * Install xmmintrin.h header on i386 (closes: #148181). + * Install altivec.h header on powerpc. + * Call correct gij in gij-wrapper (closes: #148662, #148682). + + -- Matthias Klose Wed, 29 May 2002 22:47:40 +0200 + +gcc-3.1 (1:3.1ds2-2) unstable; urgency=low + + * Tighten binutils dependency. + * Fix libstdc include dir for multilibs (Dan Jacobowitz). + + -- Matthias Klose Tue, 21 May 2002 08:03:49 +0200 + +gcc-3.1 (1:3.1ds2-1) unstable; urgency=low + + * GCC 3.1 release. + * Ada cannot be built by the autobuilders for the first time. Do it by hand. + gnatgcc and gnatbind need to be in the PATH. + * Build with CC=gnatgcc, when building the Ada compiler. + * Hurd fixes. + * Don't build the sparc64 compiler; the hack isn't up to date and glibc + isn't converted to use /lib64 and /usr/lib64. + * m68k-linux shows bootstrap comparision failures. If you want to build + the compiler anyway and ignore the bootstrap comparision failure, edit + debian/rules.patch and uncomment the patch to ignore the failure. See + /usr/share/doc/gcc-3.1/BOOTSTRAP_COMPARISION_FAILURE for the differences. + + -- Matthias Klose Wed, 15 May 2002 09:53:00 +0200 + +gcc-3.1 (1:3.1ds1-0pre6) unstable; urgency=low + + * Build from the "final prerelease" tarball (gcc-3.1-20020508.tar.gz). + * Build gnat-3.1-doc package. + * Build fastjar package without building java packages. + * Hurd fixes. + * Updated sparc64-build patch. + * Add s390-ada patch (Gerhard Tonn). + * Undo the dwarf2 support for hppa from -0pre5. + + -- Matthias Klose Thu, 9 May 2002 17:21:09 +0200 + +gcc-3.1 (1:3.1ds0-0pre5) unstable; urgency=low + + * Use /usr/include/g++-v3-3.1 as C++ include dir. + * Update s390-java patch (Gerhard Tonn). + * Tighten binutils dependency (gas patch for m68k-linux). + * Use gnat-3.1 as the gnat package name (as found in gcc/ada/gnatvsn.ads). + * dwarf2 support hppa: a snapshot of the gcc/config/pa directory + from the trunk dated 2002-05-02. + + -- Matthias Klose Fri, 3 May 2002 22:51:37 +0200 + +gcc-3.1 (1:3.1ds0-0pre4) unstable; urgency=low + + * Use gnat-5.00w as the gnat package name (as found in gcc/ada/gnatvsn.ads). + * Don't build the shared libgnat library. It assumes an existing shared + libiberty library. + * Don't install the libgcjgc library. + + -- Matthias Klose Thu, 25 Apr 2002 08:48:04 +0200 + +gcc-3.1 (1:3.1ds0-0pre3) unstable; urgency=low + + * Build fastjar on all architectures. + * Update m68k patches. + * Update s390-java patch (Gerhard Tonn). + + -- Matthias Klose Sun, 14 Apr 2002 15:34:47 +0200 + +gcc-3.1 (1:3.1ds0-0pre2) unstable; urgency=low + + * Add Ada support. To successfully build, a working gnatbind and gcc + driver with Ada support is needed. + * Apply needed arm patches from 3.0.4. + + -- Matthias Klose Sat, 6 Apr 2002 13:17:08 +0200 + +gcc-3.1 (1:3.1ds0-0pre1) unstable; urgency=low + + * First try for gcc-3.1. + + -- Matthias Klose Mon, 1 Apr 2002 23:39:30 +0200 + +gcc-3.0 (1:3.0.4ds3-6) unstable; urgency=medium + + * Second try at fixing sparc build problems. + + -- Phil Blundell Sun, 24 Mar 2002 14:49:26 +0000 + +gcc-3.0 (1:3.0.4ds3-5) unstable; urgency=medium + + * Enable java on ARM. + * Create missing directory to fix sparc build. + + -- Phil Blundell Fri, 22 Mar 2002 20:21:59 +0000 + +gcc-3.0 (1:3.0.4ds3-4) unstable; urgency=low + + * Link with system zlib (closes: #136359). + + -- Matthias Klose Tue, 12 Mar 2002 20:47:59 +0100 + +gcc-3.0 (1:3.0.4ds3-3) unstable; urgency=low + + * Build libf2c (pic and non-pic) with -mieee on alpha-linux. + + -- Matthias Klose Sun, 10 Mar 2002 00:37:24 +0100 + +gcc-3.0 (1:3.0.4ds3-2) unstable; urgency=medium + + * Apply hppa-build patch (Randolph Chung). Closes: #136731. + * Make libgcc1 conflict/replace with libgcc1-sparc64. Closes: #135709. + * gij-3.0 provides the `java' command. Closes: #128947. + * Depend on binutils (>= 2.11.93.0.2-2), allows stripping of libgcj.a + again. Closes: #99307. + * Update README.cross pointing to the README of the toolchain-source + package. + + -- Matthias Klose Wed, 6 Mar 2002 21:53:34 +0100 + +gcc-3.0 (1:3.0.4ds3-1) unstable; urgency=low + + * Final gcc-3.0.4 release. + * debian/rules.d/binary-java.mk: Fix dormant typo, exposed by removing the + duplicate libgcj dependency and adding the gij-3.0 package. + Closes: #134005. + * New patch by Phil Blundell to fix scalapack build error on m68k. + + -- Matthias Klose Wed, 20 Feb 2002 23:59:43 +0100 + +gcc-3.0 (1:3.0.4ds2-0pre020210) unstable; urgency=low + + * Make the base package dependent on the binary-arch target. Closes: #133433. + * Get libstdc++ on arm woring (define _GNU_SOURCE). Closes: #133435. + + -- Matthias Klose Mon, 11 Feb 2002 20:31:12 +0100 + +gcc-3.0 (1:3.0.4ds2-0pre020209) unstable; urgency=high + + * Update to CVS sources (20020209 gcc-3_0-branch). + * Apply patch to fix bootstrap error on arm-linux (submitted upstream + by Phil Blundell). Closes: #130422. + * Make base package architecture any. + * Decouple versioned shlib dependencies from release number for + libobjc as well. + + -- Matthias Klose Sat, 9 Feb 2002 01:30:11 +0100 + +gcc-3.0 (1:3.0.4ds1-0pre020203) unstable; urgency=medium + + * One release critical bug outstanding: + - bootstrap error on arm. + * Update to CVS sources (20020203 gcc-3_0-branch). + * Fixed upstream: PR c/3504: Correct documentation of __alignof__. + Closes: #85445. + * Remove libgcc-powerpc patch, integrated upstream (closes: #131977). + * Tighten binutils build dependency (to address #126162). + * Move jv-convert to gcj package (closes: #131985). + + -- Matthias Klose Sun, 3 Feb 2002 14:47:14 +0100 + +gcc-3.0 (1:3.0.4ds0-0pre020127) unstable; urgency=low + + * Two release critical bugs outstanding: + - bootstrap error on arm. + - bus errors for C++ and java executables on sparc (see the testsuite + results). + * Update to CVS sources (20020125 gcc-3_0-branch). + * Enable java support for s390 architecture (patch from Gerhard Tonn). + * Updated NEWS file for 3.0.3. + * Disable building the gcc-sparc64, but build a multilibbed compiler + for sparc as the default. + * Disabled the subreg-byte patch for sparc (request from Ben Collins). + * Fixed reference to libgcc1 package in README (closes: #126218). + * Do recommend libc-dev, not depend on it. For low-end or embedded systems + the dependency on libc-dev can make the difference between + having enough or having too little space to build a kernel. + * README.cross: Updated by Hakan Ardo. + * Decouple versioned shlib dependencies from release number. Closes: #118391. + * Fix diversions for gcc-3.0-sparc64 package (closes: #128178), + unconditionally remove `sparc64-linux-gcc' alternative. + * g77/README.libg2c.Debian: New file mentioning `libg2c-pic'. The next + g77 version (3.1) does build a static and shared library (closes: #104250). + * Fix formatting errors in the synopsis of the java man pages. Maybe the + reason for #127571. Closes: #127571. + * fastjar: Fail for the (currently incorrect) -u option. Addresses: #116145. + Add alternative for `jar' using priority 30 (closes: #118648). + * jv-convert: Add --help option and man page. Backport from HEAD branch. + * libgcj2-dev: Remove duplicate dependency (closes: #127805). + * Giving up and make just another new package gij-X.Y with only the gij-X.Y + binary for policy conformance (closes: #127111). + * gij: Provides an alternative for `java' (priority 30) using a wrapper + script (Stephen Zander) (closes: #128974). Added simple manpage. + + -- Matthias Klose Sun, 27 Jan 2002 13:33:41 +0100 + +gcc-3.0 (1:3.0.3ds3-1) unstable; urgency=low + + * Final gcc-3.0.3 release. + * Do not compress .txt files in libstdc++ docs referenced from html + pages (closes: #124136). + * libstdc++-dev suggests libstdc++-doc. + * debian/patches/gcc-ia64-NaT.dpatch: Update (closes: #123685). + + -- Matthias Klose Fri, 21 Dec 2001 02:54:11 +0100 + +gcc-3.0 (1:3.0.3ds2-0pre011215) unstable; urgency=low + + * Update to CVS sources (011215). + * libstdc++ documentation updated upstream (closes: #123790). + * debian/patches/gcc-ia64-NaT.dpatch: Disable. Fixes bootstrap error + on ia64 (#123685). + + -- Matthias Klose Sat, 15 Dec 2001 14:43:21 +0100 + +gcc-3.0 (1:3.0.3ds1-0pre011210) unstable; urgency=medium + + * Update to CVS sources (011208). + * Supposed to fix powerpc build error (closes: #123155). + + -- Matthias Klose Thu, 13 Dec 2001 07:26:05 +0100 + +gcc-3.0 (1:3.0.3ds0-0pre011209) unstable; urgency=medium + + * Update to CVS sources (011208). Frozen for upstream 3.0.3 release. + * Apply contrib/PR3145.patch, a backport of Nathan Sidwell's patch to + fix PR c++/3145, the infamous "virtual inheritance" bug. This affected + especially KDE2 (eg. artsd). Franz Sirl + * cc1plus segfault in strength reduction fixed upstream. Closes: #122547. + * debian/patches/gcc-ia64-NaT.dpatch: Add patch to avoid a bug that can + cause miscompiled userapps to crash the kernel. Closes: #121924. + * Reenable shared libgcc for powerpc. Fixed upstream. + http://gcc.gnu.org/ml/gcc-patches/2001-11/msg00340.html + debian/patches/libgcc-powerpc.dpatch: New patch. + * Add upstream changelogs. + * Remove gij alternative. Move to gij package. + + -- Matthias Klose Sun, 9 Dec 2001 09:36:48 +0100 + +gcc-3.0 (1:3.0.2ds4-4) unstable; urgency=medium + + * Disable building of libffi on mips and mipsel. + (closes: #117503). + * Enable building of shared libgcc on s390 + (closes: #120452). + + -- Christopher C. Chimelis Sat, 1 Dec 2001 06:15:29 -0500 + +gcc-3.0 (1:3.0.2ds4-3) unstable; urgency=medium + + * Fix logic to build libffi without java (closes: #117503). + + -- Matthias Klose Sun, 4 Nov 2001 14:34:50 +0100 + +gcc-3.0 (1:3.0.2ds4-2) unstable; urgency=medium + + * Enable java for ia64 (Jeff Licquia). Closes: #116798. + * Allow building of libffi without gcj (Jeff Licquia). + New libffi packages for arm hurd-i386 mips mipsel, + still missing: hppa, s390. + * debian/NEWS.gcc: Add 3.0.2 release notes. + * debian/patches/hppa-align.dpatch: New patch from Alan Modra, + submitted by Randolph Tausq. + + -- Matthias Klose Thu, 25 Oct 2001 23:59:31 +0200 + +gcc-3.0 (1:3.0.2ds4-1) unstable; urgency=medium + + * Final gcc-3.0.2 release. The source tarball is not the released + tarball, but taken from CVS 011024). + * Remove patch for s390, included upstream. + + -- Matthias Klose Wed, 24 Oct 2001 00:49:40 +0200 + +gcc-3.0 (1:3.0.2ds3-0pre011014) unstable; urgency=low + + * Update to CVS sources (011014). Frozen for upstream 3.0.2 release. + Closes: #109351, #114099, #114216, #105741 (allegro3938). + * Added debian/patches/fastjar.dpatch, which makes fastjar extract + filenames correctly (previously, some had incorrect names on extract). + Closes: #113236. + * Priorities fixed in the past (closes: #94404). + + -- Matthias Klose Sun, 14 Oct 2001 13:19:43 +0200 + +gcc-3.0 (1:3.0.2ds2-0pre010923) unstable; urgency=low + + * Bootstraps on powerpc again (closes: #112777). + + -- Matthias Klose Sun, 23 Sep 2001 01:32:11 +0200 + +gcc-3.0 (1:3.0.2ds2-0pre010922) unstable; urgency=low + + * Update to CVS sources (010922). + * Fixed upstream (closes: #111801). #105569 on hppa. + * Update hppa patch (Matt Taggart). + * Fix libstdc++-dev package description (closes: #112758). + * debian/rules.d/binary-objc.mk: Fix build error (closes: #112462). + * Make gobjc-3.0 conflict with gcc-3.0-sparc64 (closes: #111772). + + -- Matthias Klose Sat, 22 Sep 2001 09:34:49 +0200 + +gcc-3.0 (1:3.0.2ds1-0pre010908) unstable; urgency=low + + * Update to CVS sources (010908). + * Update hppa patch (Matt Taggart). + * Depend on libgc6-dev, not libgc5-dev, which got obsolete (during + the freeze ...). However adds s390 support (closes: #110189). + * debian/patches/m68k-reload.dpatch: New patch (Roman Zippel). + Fixes #89023. + * debian/patches/gcc-sparc.dpatch: New patch ("David S. Miller"). + Fixes libstdc++ testsuite failures on sparc. + + -- Matthias Klose Sat, 8 Sep 2001 14:26:20 +0200 + +gcc-3.0 (1:3.0.2ds0-0pre010826) unstable; urgency=low + + * gcc-3.0-nof: Fix symlink to gcc-3.0-base doc directory. + * debian/patches/gcj-without-rpath: New patch. + * Remove self dependency on libgcj package. + * Handle diversions for upgrades from 3.0 and 3.0.1 -> 3.0.2 + in gcc-3.0-sparc64 package. + * Build libg2c.a with -fPIC -DPIC and name the result libg2c-pic.a. + Link with this library to avoid linking with non-pic code. + Use this library when building dynamically loadable objects (python + modules, gimp plugins, ...), which need to be linked against g2c or + a library which is linked against g2c (i.e. lapack). + Packages needing '-lg2c-pic' must have a build dependency on + 'g77-3.0 (>= 1:3.0.2-0pre010826). + + -- Matthias Klose Sun, 26 Aug 2001 13:59:03 +0200 + +gcc-3.0 (1:3.0.2ds0-0pre010825) unstable; urgency=low + + * Update to CVS sources (010825). + * Add libc6-dev-sparc64 to gcc-3.0-sparc64 and to sparc build dependencies. + * Remove conflicts on egcc package (closes: #109718). + * Fix gcc-3.0-nof dependency. + * s390 patches against gcc-3.0.1 (Gerhard Tonn). + * debian/control: Require binutils (>= 2.11.90.0.27) + + -- Matthias Klose Sat, 25 Aug 2001 10:59:15 +0200 + +gcc-3.0 (1:3.0.1ds3-1) unstable; urgency=low + + * Final gcc-3.0.1 release. + * Changed upstream: default of -flimit-inline is 600 (closes: #106716). + * Add fastjar man page (submitted by "The Missing Man Pages Project", + http://www.netmeister.org/misc/m2p2i/) (closes: #103051). + * Fixed in last upload as well: #105246. + * debian/patches/cpp-memory-leak.dpatch: New patch + * Disable installation of shared libgcc on s390 (Gerhard Tonn). + + -- Matthias Klose Mon, 20 Aug 2001 20:47:13 +0200 + +gcc-3.0 (1:3.0.1ds2-0pre010811) unstable; urgency=high + + * Update to CVS sources (010811). Includes s390 support. + * Add xlibs-dev to Build-Depends (libgcj). + * Enable java for powerpc, disable java for ia64. + * Enable ObjC garbage collection for all archs, which have a libgc5-dev + package. + * New patch libstdc++-codecvt (Michael Piefel) (closes: #104614). + * Don't strip static libgcj library (work around binutils bug #107812). + * Handle diversions for upgrade 3.0 -> 3.0.1 in gcc-3.0-sparc64 package + (closes: #107569). + + -- Matthias Klose Sat, 11 Aug 2001 20:42:15 +0200 + +gcc-3.0 (1:3.0.1ds1-0pre010801) unstable; urgency=high + + * Update to CVS sources (010801). (closes: #107012). + * Remove build dependency on non-free graphviz and include pregenerated + docs (closes: #107124). + * Fixed in 3.0.1 (closes: #99307). + * Updated m68k-updates patch (Roman Zippel). + * Another fix for ia64 packaging bits (Randolph Chung). + + -- Matthias Klose Tue, 31 Jul 2001 21:52:55 +0200 + +gcc-3.0 (1:3.0.1ds0-0pre010727) unstable; urgency=high + + * Update to CVS sources (010727). + * Add epoch to source version. Change '.dsx' to 'dsx', so that + 3.1.1ds0 gt 3.1ds7 (closes: #106538). + + -- Matthias Klose Sat, 28 Jul 2001 09:56:29 +0200 + +gcc-3.0 (3.0.1.ds0-0pre010723) unstable; urgency=high + + * ia64 packaging bits (Randolph Chung) (closes: #106252). + + -- Matthias Klose Mon, 23 Jul 2001 23:02:03 +0200 + +gcc-3.0 (3.0.1.ds0-0pre010721) unstable; urgency=high + + * Update to CVS sources (010721). + - Remove patches applied upstream: libstdc++-limits.dpatch, + objc-data-references + - Updated other patches. + * Fix gij alternative (closes: #103468, #103883). + * Patch to fix bootstrap on sparc (closes: #103568). + * Corrected (closes: #105371) and updated README.Debian. + * m68k patches for sucessful bootstrap (Roman Zippel). + * Add libstdc++v3 porting hints to README.Debian and README.C++. + * m68k md fix (#105622) (Roman Zippel). + * debian/rules2: Disable non-functional ulimit on Hurd (#105884). + * debian/control: Require binutils (>= 2.11.90.0.24) + * Java is enabled for alpha (closes: #87300). + + -- Matthias Klose Sun, 22 Jul 2001 08:24:04 +0200 + +gcc-3.0 (3.0.ds9-4) unstable; urgency=high + + * Move this version to testing ASAP. testing still has a prerelease + version with now incompatible ABI's. If sparc doesn't build, + then IMHO it's better to remove it from testing. + * debian/control.m4: Set uploaders field. Adjust description of + gcc-3.0 (binary) package (closes: #102271, #102620). + * Separate gij.1 in it's own pseudo man page (closes: #99523). + * debian/patches/java-manpages.dpatch: New patch. + * libgcj: Install unversioned gij. + + -- Matthias Klose Tue, 3 Jul 2001 07:38:08 +0200 + +gcc-3.0 (3.0.ds9-3) unstable; urgency=high + + * Reenable configuration with posix threads on i386 (lost in hurd-i386 + merge). + + -- Matthias Klose Sun, 24 Jun 2001 22:21:45 +0200 + +gcc-3.0 (3.0.ds9-2) unstable; urgency=medium + + * Move this version to testing ASAP. testing still has a prerelease + version with now incompatible ABI's. + * Add libgcc0 and libgcc300 to the build conflicts (#102041). + * debian/README.FIRST: Removed (#101534). + * Updated subreg-byte patch (doc files). + * Disable java for the Hurd, mips and mipsel (#101570). + * Patch for building on the Hurd (#101708) (Jeff Bailey ). + * Packaging fixes for the Hurd (#101711) (Jeff Bailey ). + * Include pregenerated doxygen (1.2.6) docs for libstdc++-v3 (#101557). + The current doxygen-1.2.8.1 segaults. + * C++: Enable -fuse-cxa-atexit by default (#101901). + * Correct mail address in gccbug (#101743). + * Make rules resumable after failure in binary-xxx targets (#101637). + + -- Matthias Klose Sun, 24 Jun 2001 16:04:53 +0200 + +gcc-3.0 (3.0.ds9-1) unstable; urgency=low + + * Final 3.0 release. + * Update libgcc version number (#100983, #100988, #101069, #101115, #101328). + * Updated hppa-build patch (Matt Taggart ). + * Disable java for hppa. + * Updated subreg-byte patch for sparc (Ben Collins). + + -- Matthias Klose Mon, 18 Jun 2001 18:26:04 +0200 + +gcc-3.0 (3.0.ds8-0pre010613) unstable; urgency=low + + * Update patches for recent (010613 23:13 +0200) CVS sources. + * Fix packaging bugs (#100459, #100447, #100483). + * Build-Depend on gawk, mawk doesn't work well with test_summary. + + -- Matthias Klose Wed, 13 Jun 2001 23:13:38 +0200 + +gcc-3.0 (3.0.ds7-0pre010609) unstable; urgency=low + + * Fix build dependency for the hurd (#99164). + * Update patches for recent (010609) CVS sources. + * Disable java on powerpc (link error in libjava). + * gcc-3.0-base.postinst: Don't prompt for non-interactive installs (#100110). + + -- Matthias Klose Sun, 10 Jun 2001 09:45:57 +0200 + +gcc-3.0 (3.0.ds6-0pre010526) unstable; urgency=high + + * Urgency "high" for replacing the gcc-3.0 snapshots in testing, which + now are incompatile due to the changed ABIs. + * Upstream begins tagging with "gcc-3_0_pre_2001mmdd". + * Tighten dependencies to install only binary packages derived from + one source (#98851). Tighten libc6-dev dependency to match libc6. + + -- Matthias Klose Sun, 27 May 2001 11:35:31 +0200 + +gcc-3.0 (3.0.ds6-0pre010525) unstable; urgency=low + + * ATTENTION: The ABI (exception handling) changed. No upgrade path from + earlier snapshots (you had been warned in the postinst ...) + Closing #93597, #94576, #96448, #96461. + You have to rebuild + * HELP is appreciated for scanning the Debian BTS and sending followups + to bug reports!!! + * Should we name debian gcc uploads? What about a "still seeking + g++ maintainer" upload? + * Fixed in gcc-3.0: #97030 + * Update patches for recent (010525) CVS sources. + * Make check depend on build target (fakeroot problmes). + * debian/rules.d/binary-libgcc.mk: new file, build first. + * Free memory detection on the hurd for running the testsuite. + * Update debhelper build dependency. + * libstdc++-doc: Include doxygen generated docs. + * Fix boring packaging bugs, too tired for appropriate changelogs ... + #93343, #96348, #96262, #97134, #97905, #96451, #95812, #93157 + * Fixed bugs: #87000. + + -- Matthias Klose Sat, 26 May 2001 23:10:42 +0200 + +gcc-3.0 (3.0.ds5-0pre010510) unstable; urgency=low + + * Update patches for recent (010506) CVS sources. + * New version of source, as of 2001-05-10 + * New version of gpc source, as of 2001-05-06 (disabled by default). + * Make gcc-3.0-sparc64 provide an alternative for sparc64-linux-gcc, + since it can build kernels just fine (it seems) + * Add hppa patch from Matt Taggart + * Fix objc info inclusion...now merged with gcc info + * Do not install the .la for libstdc++, since it confuses libtool linked + applications when libstdc++3-dev and libstdc++2.10-dev are both + installed (closes #97905). + * Fixed gcc-base and libgcc section/prio to match overrides + + -- Ben Collins Mon, 7 May 2001 00:08:52 +0200 + +gcc-3.0 (3.0.ds5-0pre010427) unstable; urgency=low + + * Fixed priority for fastjar from optional to extra + * New version of source, as of 2001-04-27 + * Fix description of libgcj-dev + * libffi-install: Make libffi installable + * Add libffi and libffi-dev packages. libffi is only enabled for java + targets right now. Perhaps more will be enabled later. + * Fixes to build cross compiler package (for avr) + (Hakan Ardo ). + * Better fixincludes description (#93157). + * Remove all remnants of libg++ + * Remove all hacks around libstdc++ version. Since we are strictly v3 now, + we can treat it like a normal shared lib, and not worry about all those + ABI changes. + * Remove all cruft control scripts. Note, debhelper will create scripts + that it needs to. It will do the doc link stuff and the ldconfig stuff + explicitly. + * Clean up the SONAME parsing stuff, make it a little more cleaner over + all the lib packages + * Make libffi install when built (IOW, whenever java is enabled). This + should obsolete the libffi package, which is old and broken + * Revert to normal sonames, except for ia64 (for now) + * Remove all references to dh_testversion, since they are deprecated for + Build-Depends + * Fix powerpc nof build + * Remove all references to the MULTILIB stuff, since the arches are + using specialized builds anyway (nof, softfloat). + * Added 64bit sparc64 package (gcc-3.0-sparc64, libgcc0-sparc64) + * Removed obsolete shlibs.local file + + -- Ben Collins Sun, 15 Apr 2001 21:33:15 -0400 + +gcc-3.0 (3.0.ds4-0pre010403) unstable; urgency=low + + * debian/README: Updated for gcc-3.0 + * debian/rules.patch: Added subreg-byte patch for sparc + * debian/rules.unpack: Update to current CVS for gcc tarball name + * debian/patches/subreg-byte.dpatch: sparc subreg-byte support + * debian/patches/gcc-rawhide.dpatch: Removed + debian/patches/gpc-2.95.dpatch: Removed + debian/patches/sparc32-rfi.dpatch: Removed + debian/patches/temporary.dpatch: Removed + * Moving to unstable now + * debian/patches/gcc-ppc-disable-shared-libgcc.dpatch: New patch, + disables shared libgcc for powerpc target, since it isn't compatible + with the EABI objects. + * Create $(with_shared_libgcc) var + * debian/rules.d/binary-gcc.mk: Use this new variable to determine if + the libgcc package actually has any files + + -- Ben Collins Tue, 3 Apr 2001 23:00:55 -0400 + +gcc-3.0 (3.0.ds2-0pre010223) experimental; urgency=low + + * New snapshot. Use distinct shared object names for shared libraries: + we don't know if binary API's still change until the final release. + * Versioned package names. + * debian/control.m4: New file. Add gcc-base, libgcc0, libobjc1, + libstdc++-doc, libgcj1, libgcj1-dev, fastjar, fixincludes packages. + Remove gcc-docs package. + * debian/gcov.1: Remove. + * debian/*: Remove 2.95.x support. Prepare for 3.0. + * debian/patches: Remove 2.95.x patches. + * Changed source package name. It's not allowed anymore to overwrite + source packages with different content. Introducing a 'debian source + element' (.ds), which is stripped again from the version number + for the binary packages. + * Fixed bugs and added functionality: + #26436, #27878, #33786, #34876, #35477, #42662, #46181, #42989, + #47981, #48530, #50529, #51227, #51456, #51651, #52382, #53698, + #55291, #55967, #56867, #58219, #59005, #59232, #59776, #64628, + #65687, #67631, #68632, #68963, #68987, #69530, #72933, #75120, + #75759, #76645, #76827, #83221, #87540 + * libgcj fixes: 42894, #51266, #68560, #71187, #79984 + + -- Matthias Klose Sat, 24 Feb 2001 13:41:11 +0100 + +gcc-2.95 (2.95.3-2.001222) experimental; urgency=low + + * New upstream version 2.95.3 experimental (CVS 20001222). + * debian/control.in: Versioned package names, removal of snapshot logic. + Remove fake gcc-docs package. + * Reserve -1 release numbers for woody. + * Updated to gpc-20001218. + + -- Matthias Klose Fri, 22 Dec 2000 19:53:03 +0100 + +gcc (2.95.2-20) unstable; urgency=low + + * Apply patch from gcc-2_95-branch; remove ulimit for make check. + + -- Matthias Klose Sun, 10 Dec 2000 17:01:13 +0100 + +gcc (2.95.2-19) unstable; urgency=low + + * Added testsuite-20001207 from current snapshots. We'll need results + for 2.95.2 to make sure there are no regressions against that release. + Dear build daemons and porters to other architectures, please send an + email to gcc-testresults@gcc.gnu.org. + You can do this by running "debian/rules mail-summary". + * Updated to gpc-20001206. + * Added S/390 patch prepared by Chu-yeon Park (#78983). + * debian/patches/libio.dpatch: Fix iostream doc (fixes #77647). + * debian/patches/gcc-doc.dpatch: Update URL (fixes #77542). + * debian/patches/gcc-reload1.dpatch Patch from the gcc-bug list which + fixes a problem in "long long" on i[345]86 (i686 was not affected). + + -- Matthias Klose Sat, 9 Dec 2000 12:30:32 +0100 + +gcc (2.95.2-18) unstable; urgency=low + + * debian/control.in: Fix syntax errors (fixes #76146, #76458). + Disable gpc on the hurd by request (#75686). + * debian/patches/arm-various.dpatch: Patches from Philip Blundell + for ARM arch (fixes #75801). + * debian/patches/gcc-alpha-mi-thunk.dpatch: Patches from Chris Chimelis + for alpha arch. + * debian/patches/g77-docs.dpatch: Adjust g77 docs (fixes #72594). + * Update gpc to gpc-20001118. + * Reenable gpc for alpha. + * debian/README.C++: Merge debian/README.libstdc++ and C++ FAQ information + provided by Matt Zimmermann. + * Build gcj only on architectures, where libgcj-2.95.1 can be built as well. + Probably needs some adjustments ... + * Conditionalize for chill, fortran, java, objc and chill. + + * NOT APPLIED: + debian/patches/libstdc++-bastring.dpatch: Apply fix (fixes #75759). + + -- Matthias Klose Sun, 19 Nov 2000 10:40:41 +0100 + +gcc (2.95.2-17) unstable; urgency=low + + * Disable gpc for alpha. + * Include gpc-cpp in gpc package (fixes #74492). + * Don't build gcc-docs compatibility package anymore. + + -- Matthias Klose Wed, 11 Oct 2000 06:16:53 +0200 + +gcc (2.95.2-16) unstable; urgency=low + + * Applied the emdebian/cross compiler patch and documentation + (Frank Smith ). + * Applied patch for avr target (Hakan Ardo ). + * debian/control.in: Add awk to Build-Depends. + Tighten libc6-dev dependency for libstdc++-dev (fixes #73031, + #72531, #72534). + * Disable libobjc_gc for m68k again (fixes #74380). + * debian/patches/arm-namespace.dpatch: Apply patch from Philip + Blundell to fix name space pollution on arm + (fixes #70937). + * Fix more warnings in STL headers (fixes #69352, #71943). + + -- Matthias Klose Mon, 9 Oct 2000 21:51:41 +0200 + +gcc (2.95.2-15) unstable; urgency=low + + * debian/control.in: Add libgc5-dev to build depends (fixes #67015). + * debian/rules.def: Build GC enabled ObjC runtime for sparc. + * Bug #58741 fixed (in some version since 2.95.2-5). + * debian/control.in: Recommend librx1g-dev, libgmp2-dev, libncurses5-dev + (unit dependencies). + * Patches from Marcus Brinkmann for the hurd (fixes #67763): + - debian/rules.defs: Disable objc_gc on hurd-i386. + Disable libg++ on GNU systems. + - debian/rules2: Set correct names of libstdc++/libg++ + libraries on GNU systems. + Write out correct shlibs and shlibs.local file content. + - Keep _G_config.h for the Hurd. + * Apply patch for ObjC linker warnings. + * Don't apply gcj backport patch for sparc. + * Apply libio compatability patch + * debian/glibcver.sh: generate appropriate version for glibc + * debian/rules.conf: for everything after glibc 2.1, we always append + "-glibc$(ver)" to the C++ libs for linux. + * Back down gpc to -13 version (-14 wont compile on anything but i386 + and m68k becuase of gpc). + * Remove extraneous and obsolete sparc64 patches/files from debian/* + + -- Ben Collins Thu, 21 Sep 2000 08:08:35 -0400 + +gcc-snapshot (20000901-2.2) experimental; urgency=low + + * New snapshot. + * debian/rules2: Move tradcpp0 to cpp package. + + -- Matthias Klose Sat, 2 Sep 2000 01:14:28 +0200 + +gcc-snapshot (20000802-2.1) experimental; urgency=low + + * New snapshot. + * debian/rules2: Fixes. tradcpp0 is in gcc package, not cpp. + + -- Matthias Klose Thu, 3 Aug 2000 07:40:05 +0200 + +gcc-snapshot (20000720-2) experimental; urgency=low + + * New snapshot. + * Enable libstdc++-v3. + * debian/rules2: Don't use -D for /usr/bin/install. + + -- Matthias Klose Thu, 20 Jul 2000 22:33:37 +0200 + +gcc (2.95.2-14) unstable; urgency=low + + * Update gpc patch. + + -- Matthias Klose Wed, 5 Jul 2000 20:51:16 +0200 + +gcc (2.95.2-13) frozen unstable; urgency=low + + * Update debian/README: document how to compile 2.0.xx kernels; don't + register gcc272 as an alternative for gcc (closes #62419). + Clarify compiler setup (closes #65548). + * debian/control.in: Make libstdc++-dev depend on current version of g++. + * Undo CVS update from release -8 (problems on alpha, #55263). + + -- Matthias Klose Mon, 19 Jun 2000 23:06:48 +0200 + +gcc (2.95.2-12) frozen unstable; urgency=low + + * debian/gpc.postinst: Correct typo introduced with -11 (fixes #64193). + * debian/patches/gcc-rs600.dpatch: ppc codegen fix (fixes #63933). + + -- Matthias Klose Sun, 21 May 2000 15:56:05 +0200 + +gcc (2.95.2-11) frozen unstable; urgency=medium + + * Upload to unstable again (fixes critical #63784). + * Fix doc-base files (fixes important #63810). + * gpc wasn't built in -10 (fixes #63977). + * Make /usr/bin/pc an alternative (fixes #63888). + * Add SYSCALLS.c.X to gcc package. + + -- Matthias Klose Sun, 14 May 2000 22:17:44 +0200 + +gcc (2.95.2-10) frozen; urgency=low + + * debian/control.in: make gcc conflict on any version of egcc + (slink to potato upgrade problem, fixes grave #62084). + * Build protoize programs, separate out in new package (fixes #59436, + #62911). + * Create dummy gcc-docs package for smooth update from slink (fixes #62537). + * Add doc-base support for all -doc packages (fixes #63380). + + -- Matthias Klose Mon, 1 May 2000 22:24:28 +0200 + +gcc (2.95.2-9) frozen unstable; urgency=low + + * Disable the sparc-bi-arch.dpatch (patch from Ben Collins, built + for sparc as NMU 8.1) (fixes critical #61529 and #61511). + "Seems that when you compile gcc 2.95.x for sparc64-linux and compile + sparc32 programs, the code is not the same as sparc-linux compile for + sparc32 (this is a bug, and is fixed in gcc 2.96 CVS)." + * debian/patches/gcj-vs-iconv.dpatch: Option '--encoding' for + encoding of input files. Patch from Tom Tromey + backported to 2.95.2 (fixes #42895). + Compile a Latin-1 encoded file with `gcj --encoding=Latin1 ...'. + * debian/control.in: gcc, g++ and gobjc suggest their corresponding + task packages (fixes #59623). + + -- Matthias Klose Sat, 8 Apr 2000 20:19:15 +0200 + +gcc (2.95.2-8) frozen unstable; urgency=low + + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000313. + * debian/rules2: configure with --enable-java-gc=no for sparc. Fixes + gcj side of #60535. + * debian/rules.patch: Disable gcc-emit-rtl patch for all archs but + alpha. Disable g++-is-tree patch ("just for 2.95.1"). + * debian/README: Update for gcc-2.95. + + -- Matthias Klose Mon, 27 Mar 2000 00:03:16 +0200 + +gcc (2.95.2-7) frozen unstable; urgency=low + + * debian/patches/gcc-empty-struct-init.dpatch; Apply patch from + http://gcc.gnu.org/ml/gcc-patches/2000-02/msg00637.html. Fixes + compilation of 2.3.4x kernels. + * debian/patches/gcc-emit-rtl.dpatch: Apply patch from David Huggins-Daines + (backport from 2.96 CVS to fix #55263). + * debian/patches/gcc-pointer-arith.dpatch: Apply patch from Jim Kingdon + (backport from 2.96 CVS to fix #54951). + + -- Matthias Klose Thu, 2 Mar 2000 23:16:43 +0100 + +gcc (2.95.2-6) frozen unstable; urgency=low + + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000220. + * Remove dangling symlink probably left over from libstdc++2.9 + package (fixes #53661). + * debian/patches/gcc-alpha-complex-float.dpatch: Fixed patch by + David Huggins-Daines (fixes #58486). + * debian/g++.{postinst,prerm}: Remove outdated g++FAQ registration + (fixes #58253). + * debian/control.in: gcc-doc replaces gcc-docs (fixes #58108). + * debian/rules2: Include some fixed headers (asm, bits, linux, ...). + * debian/patches/{gcc-alpha-ev5-fix,libstdc++-valarray}.dpatch: Remove. + Applied upstream. + * debian/patches/libstdc++-bastring.dpatch: Add patch from + sicard@bigruth.solsoft.fr (fixes #56715). + + -- Matthias Klose Sun, 20 Feb 2000 15:08:13 +0100 + +gcc (2.95.2-5) frozen unstable; urgency=low + + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000116. + * Add more build dependencies (fixes #53204). + * debian/patches/gcc-alpha-complex-float.dpatch: Patch from + Joel Klecker to compile glibc correctly on alpha. + "Should fix the g77 problems too." + * debian/patches/{libio,libstdc++-wall2}.dpatch. Remove patches + applied upstream. + + -- Matthias Klose Sun, 16 Jan 2000 19:16:54 +0100 + +gcc (2.95.2-4) unstable; urgency=low + + * debian/patches/libio.dpatch: Patch from Martin v. Loewis. + (fixes: #35628). + * debian/patches/libstdc++-deque.dpatch: Patch from Martin v. Loewis. + (fixes: #52689). + * debian/control.in: Updated Build-Depends, removed outdated README.build. + Fixes #51246. + * Tighten dependencies to cpp (>= 2.95.2-4) (closes: #50294). + * debian/rules.patch: Really do not apply patches/gcj-backport.dpatch. + Fixes #51636. + * Apply updated sparc-bi-arch.dpatch from Ben Collins. + * libstdc++: Define wstring type, if __ENABLE_WSTRING is defined. Request + from the author of the War FTP Daemon for Linux ("Jarle Aase" + ). + * debain/g++.preinst: Remove dangling sysmlinks (fixes #52359). + + -- Matthias Klose Sun, 19 Dec 1999 21:53:48 +0100 + +gcc (2.95.2-3) unstable; urgency=low + + * debian/rules2: Don't install $(gcc_lib_dir)/include/asm; these are + headers fixed for glibc-1.x (closes: #49434). + * debian/patches/cpp-dos-newlines.dpatch: Keep CR's without + following LF (closes: #49186). + * Bug #37358 (internal compiler errors when building vdk_0.6.0-5) + fixed in gcc-2.95.? (closes: #37358). + * Apply patch gcc-alpha-ev5-fix from Richard Henderson + (should fix #48527 and #46963). + * debian/README.Bugs: Documented non bug #44554. + * Applied patch from Alexandre Oliva to fix gpc boostrap on alpha. + Reenabled gpc on all architectures. + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 19991108. + * Explicitely generate postinst/prerm chunks for usr/doc transition. + debhelper currently doesn't handle generation for packages with + symlinked directories. + * debian/patches/libstdc++-wall3.dpatch: Fix warnings in stl_deque.h + and stl_rope.h (closes: #46444, #46720). + * debian/patches/gcj-backport.dpatch: Add file, don't apply (yet). + + -- Matthias Klose Wed, 10 Nov 1999 18:58:45 +0100 + +gcc (2.95.2-2) unstable; urgency=low + + * New gpc-19991030 snapshot. + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 19991103. + * Reintegrated sparc patches (bcollins@debian.org), which were lost + in 2.95.2-1. + * debian/rules2: Only install $(gcc_lib_dir)/include/asm, when existing. + * debian/patches/gpc-2.95.{dpatch,diff}: updated patch to drop + initialization in stor-layout.c. + * debian/NEWS.gcc: Updated for gcc-2.95.2. + * debian/bugs/bug-...: Removed testcases for fixed bugs. + * debian/patches/...dpatch: Removed patches applied upstream. + * debian/{rules2,g++.postinst,g++.prerm}: Handle c++ alternative. + * debian/changelog: Merged gcc272, egcs and snapshot changelogs. + + -- Matthias Klose Tue, 2 Nov 1999 23:09:23 +0200 + +gcc (2.95.2-1.1) unstable; urgency=low + + * Most of the powerpc patches have been applied upstream. Remove all + but ppc-ice, ppc-andrew-dwarf-eh, and ppc-descriptions. + * mulilib-install.dpatch was definitely a bad idea. Fix it properly + by using install -D. + * Also, don't make directories before installing any more. Simplifies + rules a (tiny) bit. + * Do not build with LDFLAGS=-s. Everything gets stripped out anyway by + dh_strip -a -X_debug; so leave the binaries in the build tree with + debugging symbols for simplified debugging of the packages. + + -- Daniel Jacobowitz Sat, 30 Oct 1999 12:40:12 -0400 + +gcc (2.95.2-1) unstable; urgency=low + + * gcc-2.95.2 release (taken from the CVS archive). -fstrict-aliasing + is disabled upstream. + + -- Matthias Klose Mon, 25 Oct 1999 10:26:19 +0200 + +gcc (2.95.2-0pre4) unstable; urgency=low + + * Updated to cvs updates of the gcc-2_95-branch until 19991021. + * Updated gpc to gpc-19991018 snapshot (closes: #33037, #47453). + Enable gpc for all architectures ... + * Document gcc exit codes (closes: #43863). + * According to the bug submitter (Sergey V Kovalyov ) + the original source of these CERN librarties is outdated now. The latest + version of cernlibs compiles and works fine with slink (closes #31546). + * According to the bug submitter (Gergely Madarasz ), + the problem triggered on i386 cannot be reproduced with the current + jade and php3 versions anymore (closes: #35215). + * Replace corrupted m68k-pic.dpatch (from Roman Hodek and Andreas Schwab + and apply to + all architectures (closes: #48011). + * According to the bug submitter (Herbert Xu ) + this bug "probably has been fixed". Setting it to severity "fixed" + (fixes: #39616), will close it later ... + * debian/README.Bugs: Document throwing C++ exceptions "through" C + libraries (closes: #22769). + + -- Matthias Klose Fri, 22 Oct 1999 20:33:00 +0200 + +gcc (2.95.2-0pre3) unstable; urgency=low + + * Updated to cvs updates of the gcc-2_95-branch until 19991019. + * Apply NMU patches (closes: #46217). + * debian/control.in: Fix egcs64 conflict-dependency for sparc + architecture (closes: #47088). + * debian/rules2: dbg-packages share doc dir with lib packages + (closes #45067). + * debian/patches/gcj-debian-policy.dpatch: Patch from Stephane + Bortzmeyer to conform to Debian policy (closes: #44463). + * debian/bugs/bug-*: Added test cases for new bug reports. + * debian/patches/libstdc++-bastring.dpatch: Patch by Richard Kettlewell + (closes #46550). + * debian/rules.patch: Apply libstdc++-wall2 patch (closes #46609). + * debian/README: Fix typo (closes: #45253). + * debian/control.in: Remove primary/secondary distinction; + dbg-packages don't provide their normal counterparts (closes #45206). + * debian/rules.patch: gcc-combine patch applied upstream. + * debian/rules2: Only use mail if with_check is set (off by default). + * debian/rules.conf: Tighten binutils dependency to 2.9.5.0.12. + + -- Matthias Klose Tue, 19 Oct 1999 20:33:00 +0200 + +gcc (2.95.2-0pre2.0.2) unstable; urgency=HIGH (for m68k) + + * Binary-only NMU for m68k as quick fix for another bug; the patch + is in CVS already, too. + * Applied another patch by Andreas Schwab to fix %a5 restauration in + some cases. + + -- Roman Hodek Thu, 30 Sep 1999 16:09:15 +0200 + +gcc (2.95.2-0pre2.0.1) unstable; urgency=HIGH (for m68k) + + * Binary-only NMU for m68k as quick fix for serious bugs; the patches + are already checked into gcc CVS and should be in the next official + version, too. + * Applied two patches by Andreas Schwab to fix -fpic and loop optimization. + + -- Roman Hodek Mon, 27 Sep 1999 15:32:49 +0200 + +gcc (2.95.2-0pre2) unstable; urgency=low + + * Fixed in 2.95.2 (closes: #43478). + * Previous version had Pascal examples missing in doc directory. + + -- Matthias Klose Wed, 8 Sep 1999 22:18:17 +0200 + +gcc (2.95.2-0pre1) unstable; urgency=low + + * Updated to cvs updates of the gcc-2_95-branch until 19990828. + * Apply work around memory corruption (just for 2.95.1) by + Daniel Jacobowitz . + * debian/patches/libstdc++-wall2.dpatch: Patch from Franck Sicard + to fix some warnings (closes: #44670). + * debian/patches/libstdc++-valarray.dpatch: Patch from Hideaki Fujitani + to fix a bug in valarray_array.h. + * Applied NMU from Jim Pick minus the jump.c and fold-const.c patches + already in the gcc-2_95-branch (closes: #44690). + * Conform to debian-java policy (closes: #44463). + * Move docs to /usr/share/doc (closes: #44782). + * Remove debian/patches/gcc-align.dpatch applied upstream. + * debian/*.postinst: Call install-info only, when configuring. + * debian/*.{postinst,prerm}: Add #DEBHELPER# comments to handle + /usr/doc -> /usr/share/doc transition. + + -- Matthias Klose Wed, 8 Sep 1999 22:18:17 +0200 + +gcc (2.95.1-2.1) unstable; urgency=low + + * Non-maintainer upload. + * ARM platform no longer needs library-prefix patch. + * Updated patches from Philip Blundell. + + -- Jim Pick Wed, 8 Sep 1999 20:14:07 -0700 + +gcc (2.95.1-2) unstable; urgency=low + + * debian/gcc.{postinst,prerm}: gcc provides an alternative for + sparc64-linux-gcc. + * Applied patch from Ben Collins to enable bi-architecture (32/64) + support for sparc. + * Rebuild debian/control and debian/rules.parameters after unpacking. + * debian/rules2: binary-indep. Conditionalize on with_pascal. + + -- Matthias Klose Sat, 4 Sep 1999 13:47:30 +0200 + +gcc (2.95.1-1) unstable; urgency=low + + * Updated to release gcc-2.95.1 and cvs updates of the gcc-2_95-branch + until 19990828. + * debian/README.gcc: Updated NEWS file to include 2.95 and 2.95.1 news. + * debian/README.java: New file. + * debian/rules.defs: Disabled gpc for alpha, arm. Disabled ObjC-GC + for alpha. + * debian/rules [clean]: Remove debian/rules.parameters. + * debian/rules2 [binary-arch]: Call dh_shlibdeps with LD_LIBRARY_PATH set + to installation dir of libstdc++. Why isn't this the default? + * debian/control.in: *-dev packages do not longer conflict with + libg++272-dev package. + * Apply http://egcs.cygnus.com/ml/gcc-patches/1999-08/msg00599.html. + * Only define BAD_THROW_ALLOC, when using exceptions (fixes #43462). + * For ObjC (when configured with GC) recommend libgc4-dev, not libgc4. + * New version of 68060 build patch. + * debian/rules.conf: For m68k, depend on binutils version 2.9.1. + + -- Matthias Klose Sat, 28 Aug 1999 18:16:31 +0200 + +gcc (2.95.1-0pre2) unstable; urgency=medium + + * gpc is back again (fixes grave #43022). + * debian/patches/gpc-updates.dpatch: Patches sent to upstream authors. + * Work around the fatal dependtry assertion failure bug in dpkg (hint + from "Antti-Juhani Kaijanaho" , fixes important #43072). + + -- Matthias Klose Mon, 16 Aug 1999 19:34:14 +0200 + +gcc (2.95.1-0pre1) unstable; urgency=low + + * Updated to cvs 19990815 gcc-2_95-branch; included install docs and + FAQ from 2.95 release; upload source package as well. + * Source package contains tarballs only (gcc, libg++, installdocs). + * debian/rules: Splitted into debian/rules{,.unpack,.patch,.conf,2}. + * debian/gcc.postinst: s/any key/RETURN; warn only when upgrading from + pre 2.95 version; reference /usr/doc, not /usr/share/doc. + * Checked syntax for attributes of functions; checked for #35068; + checked for bad gmon.out files (at least with libc6 2.1.2-0pre5 and + binutils 2.9.1.0.25-2 the problem doesn't show up anymore). + * debian/patches/cpp-macro-doc.dpatch: Document macro varargs in cpp.texi. + * gcc is primary compiler for all platforms but m68k. Setting + severity of #22513 to fixed. + * debian/patches/gcc-default-arch.dpatch: New patch to enable generation + of i386 instruction as default (fixes #42743). + * debian/rules: Removed outdated gcc NEWS file (fixes #42742). + * debian/patches/libstdc++-out-of-mem.dpatch: Throw exception instead + of aborting when out of memory (fixes #42622). + * debian/patches/cpp-dos-newlines.dpatch: Handle ibackslashes after + DOS newlines (fixes #29240). + * Fixed in gcc-2.95.1: #43001. + * Bugs closed in this version: + Closes: #11525, #12253, #22513, #29240, #35068, #36182, #42584, #42585, + #42602, #42622, #42742 #42743, #43001, #43002. + + -- Matthias Klose Sun, 15 Aug 1999 10:31:50 +0200 + +gcc (2.95-3) unstable; urgency=high + + * Provide /lib/cpp again (fixes important bug #42524). + * Updated to cvs 19990805 gcc-2_95-branch. + * Build with the default scheduler. + * Apply install-multilib patch from Dan Jacobowitz. + * Apply revised cpp-A- patch from Dan Jacobowitz. + + -- Matthias Klose Fri, 6 Aug 1999 07:25:19 +0200 + +gcc (2.95-2) unstable; urgency=low + + * Remove /lib/cpp. This driver uses files from /usr/lib/gcc-lib anyway. + * The following bugs are fixed (compared to egcs-1.1.2). + Closes: #4429, #20889, #21122, #26369, #28417, #28261, #31416, #35261, + #35900, #35906, #38246, #38872, #39098, #39526, #40659, #40991, #41117, + #41290, #41302, #41313. + * The following by Joel Klecker: + - Adopt dpkg-architecture variables. + - Go back to SHELL = bash -e or it breaks where /bin/sh is not bash. + - Disabled the testsuite, it is not included in the gcc 2.95 release. + + -- Matthias Klose Sat, 31 Jul 1999 18:00:42 +0200 + +gcc (2.95-1) unstable; urgency=low + + * Update for official gcc-2.95 release. + * Built without gpc. + * debian/rules: Remove g++FAQ from rules, which is outdated. + For ix86, build for i386, not i486. + * Apply patch from Jim Pick for building multilib package on arm. + + -- Matthias Klose Sat, 31 Jul 1999 16:38:21 +0200 + +gcc (2.95-0pre10) unstable; urgency=low + + * Use ../builddir-gcc-$(VER) by default instead of ./builddir; upstream + strongly advises configuring outside of the source tree, and it makes + some things much easier. + * Add patch to prevent @local branches to weak symbols on powerpc (fixes + apt compilation). + * Add patch to make cpp -A- work as expected. + * Renamed debian/patches/ppc-library-prefix.dpatch to library-prefix.dpatch; + apply on all architectures. + * debian/control.in: Remove snapshot dependencies. + * debian/*.postinst: Reflect use of /usr/share/{info,man}. + + -- Daniel Jacobowitz Thu, 22 Jul 1999 19:27:12 -0400 + +gcc (2.95-0pre9) unstable; urgency=low + + * The following bugs are fixed (compared to egcs-1.1.2): #4429, #20889, + #21122, #26369, #28417, #28261, #35261, #38246, #38872, #39526, #40659, + #40991, #41117, #41290. + * Updated to CVS gcc-19990718 snapshot. + * debian/control.in: Removed references to egcs in descriptions. + Changed gcj's Recommends libgcj-dev to Depends. + * debian/rules: Apply ppc-library-prefix for alpha as well. + * debian/patches/arm-config.dpatch: Updated patch sent by Jim Pick. + + -- Matthias Klose Sun, 18 Jul 1999 12:21:07 +0200 + +gcc (2.95-0pre8) unstable; urgency=low + + * Updated CVS. + * debian/copyright: s%doc/copyright%share/common-licenses% + * debian/README.Bugs: s/egcs.cygnus.com/gcc.gnu.org/ s/egcs-bugs/gcc-bugs/ + * debian/patches/reporting.dpatch: Remake diff for current sources. + * debian/libstdc++-dev.postinst: It's /usr/share/info/iostream.info. + * debian/rules: Current dejagnu snapshot reports a framework version + of 1.3.1. + + -- Joel Klecker Sun, 18 Jul 1999 02:09:57 -0700 + +gcc-snapshot (19990714-0pre6) experimental; urgency=low + + * Updated to CVS gcc-19990714 snapshot. + * Applied ARM patch (#40515). + * Converted DOS style linefeeds in debian/patches/ppc-* files. + * debian/rules: Reflect change in gcc/version.c; use sh -e as shell: + for some obscure reason, bash -e doesn't work. + * Reflect version change for libstdc++ (2.10). Remove libg++-name + patch; libg++ now has version 2.8.1.3. Removed libc version from + the package name. + + -- Matthias Klose Wed, 14 Jul 1999 18:43:57 +0200 + +gcc-snapshot (19990625-0pre5.1) experimental; urgency=low + + * Non-maintainer upload. + * Added ARM specific patch. + + -- Jim Pick Tue, 29 Jun 1999 22:36:08 -0700 + +gcc-snapshot (19990625-0pre5) experimental; urgency=low + + * Updated to CVS gcc-19990625 snapshot. + + -- Matthias Klose Fri, 25 Jun 1999 16:11:53 +0200 + +gcc-snapshot (19990609-0pre4.1) experimental; urgency=low + + * Added and re-added a few last PPC patches. + + -- Daniel Jacobowitz Sat, 12 Jun 1999 16:48:01 -0500 + +gcc-snapshot (19990609-0pre4) experimental; urgency=low + + * Updated to CVS egcs-19990611 snapshot. + + -- Matthias Klose Fri, 11 Jun 1999 10:20:09 +0200 + +gcc-snapshot (19990609-0pre3) experimental; urgency=low + + * CVS gcc-19990609 snapshot. + * New gpc-19990607 snapshot. + + -- Matthias Klose Wed, 9 Jun 1999 19:40:44 +0200 + +gcc-snapshot (19990524-0pre1) experimental; urgency=low + + * egcs-19990524 snapshot. + * First snapshot of the gcc-2_95-branch. egcs-1.2 is renamed to gcc-2.95, + which is now the "official" successor to gcc-2.8.1. The full version + name is: gcc-2.95 19990521 (prerelease). + * debian/control.in: Changed maintainers to `Debian GCC maintainers'. + * Moved all version numbers to epoch 1. + * debian/rules: Major changes. The support for secondary compilers + was already removed for the egcs-1.2 snapshots. Many fixes by + Joel Klecker . + - Send mail to Debian maintainers for successful builds. + - Fix VER and VERNO sed expressions. + - Replace remaining GNUARCH occurrences. + * New gpc snapshot (but don't build). + * debian/patches/valarray.dpatch: Backport from libstdc++-v3. + * debian/gcc-doc.*: Info is now gcc.info* (Joel Klecker ). + * Use cpp driver provided by the package. + * New script c89 (fixes #28261). + + -- Matthias Klose Sat, 22 May 1999 16:10:36 +0200 + +egcs (1.1.2-2) unstable; urgency=low + + * Integrate NMU's for arm and sparc (fixes #37582, #36857). + * Apply patch for the Hurd (fixes #37753). + * Describe open bugs in TODO.Debian. Please have a look if you can help. + * Update README / math functions section (fixes #35906). + * Done by J.H.M. Dassen (Ray) : + - At Richard Braakman's request, made -dbg packages for libstdc++ + and libg++. + - Provide egcc(1) (fixes lintian error). + + -- Matthias Klose Sun, 16 May 1999 14:30:56 +0200 + +egcs-snapshot (19990502-1) experimental; urgency=low + + * New snapshot. + + -- Matthias Klose Thu, 6 May 1999 11:51:02 +0200 + +egcs-snapshot (19990418-2) experimental; urgency=low + + * Merged Rays changes to build debug packages. + + -- Matthias Klose Wed, 21 Apr 1999 16:54:56 +0200 + +egcs-snapshot (19990418-1) experimental; urgency=low + + * New snapshot. + * Disable cpplib. + + -- Matthias Klose Mon, 19 Apr 1999 11:32:19 +0200 + +egcs (1.1.2-1.2) unstable; urgency=low + + * NMU for arm + * Added arm-optimizer.dpatch with optimizer workaround for ARM + + -- Jim Pick Mon, 19 Apr 1999 06:17:13 -0700 + +egcs (1.1.2-1.1) unstable; urgency=low + + * NMU for sparc + * Included dpatch to modify the references to gcc/crtstuff.c so that + __register_frame_info is not a weak reference. This allows potato to + remain binary compatible with slink, while still retaining compatibility + with other sparc/egcs1.1.2 distributions. Diff in .dpatch format has + been sent to the maintainer with a note it may not be needed for 1.1.3. + + -- Ben Collins Tue, 27 Apr 1999 10:15:03 -0600 + +egcs (1.1.2-1) unstable; urgency=low + + * Final egcs-1.1.2 release built for potato as primary compiler + for all architectures except m68k. + + -- J.H.M. Dassen (Ray) Thu, 8 Apr 1999 13:14:29 +0200 + +egcs-snapshot (19990321-1) experimental; urgency=low + + * New snapshot. + * Disable gpc. + * debian/rules: Simplified (no secondary compiler, bumped all versions + to same epoch, libapi patch is included upstream). + * Separated out cpp documentation to cpp-doc package. + * Fixed in this version: #28417. + + -- Matthias Klose Tue, 23 Mar 1999 02:11:18 +0100 + +egcs (1.1.2-0slink2) stable; urgency=low + + * Applied H.J.Lu's egcs-19990315.linux patch. + * Install faq.html and egcs-1.1.2 announcment. + + -- Matthias Klose Tue, 23 Mar 1999 01:14:54 +0100 + +egcs (1.1.2-0slink1) stable; urgency=low + + * Final egcs-1.1.2 release; compiled with glibc-2.0 for slink on i386. + * debian/control.in: gcc provides egcc, when FIRST_PRIMARY defined. + * Fixes #30767, #32278, #34252, #34352. + * Don't build the libstdc++.so.2.9 library on architectures, which have + switched to glibc-2.1. + + -- Matthias Klose Wed, 17 Mar 1999 12:55:59 +0100 + +egcs (1.1.1.63-2.2) unstable; urgency=low + + * Non-maintainer upload. + * Incorporate patch from Joel Klecker to fix snapshot packages + by moving/removing the application of libapi. + * Disable the new libstdc++-dev-config and the postinst message in + glibc 2.1 versions. + + -- Daniel Jacobowitz Mon, 12 Mar 1999 14:16:02 -0500 + +egcs (1.1.1.63-2.1) unstable; urgency=low + + * Non-maintainer upload. + * Compile with glibc 2.1 release version. + * New upstream version egcs-1.1.2 pre3. + * Miscellaneous rules updates (see changelog.snapshot). + * New set of powerpc-related patches from Franz Sirl, + . + * Disable libgcc.dpatch (new solution implemented upstream). Remove it. + * Also pass $target to config.if. + * Enable Dwarf2 EH for powerpc. Bump the C++ binary version. No + loss in -backwards- compatibility as far as I can tell, so add a + compatibility symlink, and add to shlibs file. + * Add --no-backup-if-mismatch to the debian/patches/*.dpatch files, + to prevent bogus .orig's in diffs. + * Merged with (unreleased) 1.1.1.62-1 and 1.1.1.63-{1,2} packages from + Matthias Klose . + * Stop adding a backwards compatibility link for egcs-nof on powerpc. + To my knowledge, nothing uses it. Do add the libstdc++ API change + link, though. + + -- Daniel Jacobowitz Mon, 8 Mar 1999 14:24:01 -0500 + +egcs (1.1.1.63-2) stable; urgency=low + + * Provide a libstdc++ with a shared object name, which is compatible + to other distributions. Documented the change in README.Debian, + the libstdc++-2.9.postinst and the libstdc++-dev-config script. + + -- Matthias Klose Fri, 12 Mar 1999 00:36:20 +0100 + +egcs (1.1.1.63-1.1) unstable; urgency=low + + * Non-Maintainer release. + * Build against glibc 2.1. + * Make egcs the primary compiler on i386. + * Also confilct with egcc (<< FIRST_PRIMARY) + if FIRST_PRIMARY is defined. + (this tells dpkg that gcc completely obsoletes egcc) + * Remove hjl-12 patch again, HJL says it should not be + necessary with egcs 1.1.2. + (as per forwarded reply from Christopher Chimelis) + * Apply libapi patch in clean target before regenerating debian/control + and remove the patch afterward. Otherwise, the libstdc++ and libg++ + package names are generated wrong on a glibc 2.1 system. + + -- Joel Klecker Tue, 9 Mar 1999 15:31:02 -0800 + +egcs (1.1.1.63-1) unstable; urgency=low + + * New upstream version egcs-1.1.1-pre3. + * Applied improved libstdc++ warning patch from Rob Browning. + + -- Matthias Klose Tue, 9 Mar 1999 16:14:07 +0100 + +egcs (1.1.1.62-1) unstable; urgency=low + + * New upstream version egcs-1.1.1-pre2. + * New upstream version libg++-2.8.1.3. + * Readded ARM support + * Readded hjl-12 per request from Christopher C Chimelis + + + -- Matthias Klose Fri, 26 Feb 1999 09:54:01 +0100 + +egcs-snapshot (19990224-0.1) experimental; urgency=low + + * New snapshot. + * Add the ability to disable CPPLIB by setting CPPLIB=no in + the environment. + * Disable gpc for powerpc; I spent a long time getting it to + make correctly, and then it goes and ICEs. + + -- Daniel Jacobowitz Tue, 24 Feb 1999 23:34:12 -0500 + +egcs (1.1.1.61-1) unstable; urgency=low + + * New upstream version egcs-1.1.1-pre1. + * debian/control.in: Applied patch from bug report #32987. + * Split up H.J.Lu's hjl-19990115-linux patch into several small + chunks: libapi, arm-mips, libgcc, hjl-other. The changelog.Linux + aren't included in the separate chunks. Please refer to the + unmodified hjl-19990115-linux patch file in the egcs source pkg. + * Apply warning patch to fix the annoying spew you get if you try to + use ropes or deques with -Wall (which makes -Wall mostly useless for + spotting errors in your own code). Fixes #32996. + * debian/rules: Unapply patches in the exact reverse order they were + applied. + + -- Matthias Klose Sat, 20 Feb 1999 22:06:21 +0100 + +egcs (1.1.1-5) frozen unstable; urgency=medium + + * Move libgcc.map file to g++ package, where gcc is the secondary + compiler (fixes #32329, #32605, #32631). + * Prepare to rename libstdc++2.9 package for glibc-2.1 (fixes #32148). + * Apply NMU patch for arm architecure (fixes #32367). + * Don't apply hjl-12 patch for alpha architectures (requested by the + alpha developers, Christopher C Chimelis ). + * Call makeinfo with --no-validate to fix obscure build failure on alpha. + * Build gpc info files in doc subdirectory. + * Remove c++filt diversion (C++ name demangling patch is now in binutils, + fixes #30820 and #32502). + + -- Matthias Klose Sun, 31 Jan 1999 23:19:35 +0100 + +egcs (1.1.1-4.1) unstable; urgency=low + + * Non-maintainer upload. + * Pascal doesn't build for ARM. + + -- Jim Pick Sun, 24 Jan 1999 16:13:34 -0800 + +egcs (1.1.1-4) frozen unstable; urgency=high + + * Don't strip compiler libraries libgcc.a libobjc.a libg2c.a libgpc.a + * Move Pascal examples to the right place (fixes #32149, part 1). + * Add dependencies for switching from secondary to primary compiler, + if FIRST_PRIMARY is defined (fixes #32149, part 2). + + -- Matthias Klose Wed, 20 Jan 1999 16:51:30 +0100 + +egcs (1.1.1-3) frozen unstable; urgency=low + + * Updated with the H.J.Lu's hjl-19990115-linux patch (fixes the + __register_frame_info problems, mips and arm port included). + * Update gpc to 19990118 (beta release candidate). + * Strip static libraries (fixes #31247 and #31248). + * Changed maintainer address. + + -- Matthias Klose Tue, 19 Jan 1999 16:34:28 +0100 + +egcs (1.1.1-2) frozen unstable; urgency=low + + * Moved egcs-docs, g77-doc and gpc-doc packages to doc section. + * Downgraded Recommends: egcs-docs to Suggests: egcs-docs dependencies + (for archs, where egcs is the primary compiler). + * Add 'Suggests: stl-manual' dependency to libstdc++2.9-dev. + * Applied one more alpha patch: + ftp://ftp.yggdrasil.com/private/hjl/egcs/1.1.1/egcs-1.1.1.diff.12.gz + * Applied PPro optimization patch. + * Apply emit-rtl-nan patch. + * Upgraded to libg++-2.8.1.2a-19981218.tar.gz. + * Upgraded to gpc-19981218. + * Make symlinks for gobjc, libstdc++2.9-dev and libg++2.8.2 doc directories. + + -- Matthias Klose Wed, 23 Dec 1998 18:04:53 +0200 + +egcs-snapshot (19981211-1) experimental; urgency=low + + * New snapshot. + * Adapted gpc to egcs-2.92.x (BOOT_CFLAGS must include -g). + * New libg++-2.8.1.2a-19981209.tar.gz. + * debian/rules: new target mail-summary. + + -- Matthias Klose Fri, 11 Dec 1998 18:14:53 +0200 + +egcs (1.1.1-1) frozen unstable; urgency=high + + * Final egcs-1.1.1 release. + * The last version depended on a versioned libc6 again. + * Add lost dependency for libg++ on libstdc++. + * Added debian-libstdc++.sh script to generate a libstdc++ on a Linux + system, which doesn't use the libapi patch. + + -- Matthias Klose Wed, 2 Dec 1998 12:06:15 +0200 + +egcs (1.1.0.91.59-2) frozen unstable; urgency=high + + * Fixes bugs from libc6 2.0.7u-6 upload without dependency line + Conflicts: libstdc++-2.9 (<< 2.91.59): #30019, #30066, #30078. + * debian/copyright: Updated URLs. + * gcc --help now mentions /usr/doc/debian/bug-reporting.txt. + * Install README.Debian and include information about patches applied. + * Depend on unversioned libc6 on i386, such that libstdc++2.9 can be used + on a hamm system. + + -- Matthias Klose Fri, 27 Nov 1998 18:32:02 +0200 + +egcs (1.1.0.91.59-1) frozen unstable; urgency=low + + * This is egcs-1.1.1 prerelease #3, compiled with libc6 2.0.7u-6. + * Added dependency for libstdc++2.9-dev on g++ (fixes #29631). + * Package g77 provides f77 (fixes #29817). + * Already fixed in earlier egcs-1.1 releases: #2493, #25271, #10620. + * Bugs reported for gcc-2.7.x and fixed in the egcs version of gcc: + #2493, #4430, #4954, #5367, #6047, #10612, #12375, #20606, #24788, #26100. + * Upgraded libg++ to libg++-2.8.1.2a-19981114. + * Upgraded gpc to gpc-19981124. + * Close #25869: egcs and splay maintainers are unable to reproduce this + bug with the current Debian packages. Bug submitter doesn't respond. + * Close #25407: egcs maintainer cannot reproduce this bug with the current + Debian compiler. Bug submitter doesn't respond. + * Use debhelper 1.2.7 for building. + * Replace the libstdc++ and libg++ compatibility links with fake libraries. + + -- Matthias Klose Wed, 25 Nov 1998 12:11:42 +0200 + +egcs (1.1.0.91.58-5) frozen unstable; urgency=low + + * Applied patch to build on the m68060. + * Added c++filt and c++filt.1 to the g++ package. + * Updated gpc to gpc-981105; fixes some regressions compared to egcs-1.1. + * Separated out g77 and gpc doumentation to new packages g77-doc and gpc-doc. + * Closed bugs (#22158). + * Close #20248; on platforms where gas and gld are the default versions, + it makes no difference to configure with or without enable-ld. + * Close #24349. The bugs are in the amulet source. + See http://www.cs.cmu.edu/afs/cs/project/amulet/www/FAQ.html#GCC28x + * Rename gcc.info* files to egcs.info* (fixes #24088). + * Documented known bugs (and workarounds) in BUGS.Debian. + * Fixed demangling of C++ names (fixes #28787). + * Applied patch form aspell to libstdc++/stl/stl_rope.h. + * Updated from cvs 16 Nov 1998. + + -- Matthias Klose Tue, 17 Nov 1998 09:41:24 +0200 + +egcs-snapshot (19981115-2) experimental; urgency=low + + * New snapshot. Disabled gpc. + * New packages g77-doc and gpc-doc. + + -- Matthias Klose Mon, 16 Nov 1998 12:48:09 +0200 + +egcs (1.1.0.91.58-3) frozen unstable; urgency=low + + * Previous version installed in potato, not slink. + * Updated from cvs 3 Nov 1998. + + -- Matthias Klose Tue, 3 Nov 1998 18:34:44 +0200 + +egcs (1.1.0.91.58-2) unstable; urgency=low + + * [debian/rules]: added targets to apply and unapply patches. + * [debian/README.patches]: New file. + * Moved patches dir to debian/patches. debian/rules has to select + the patches to apply. + * Manual pages for genclass and gcov (fixes #5995, #20950, #22196). + * Apply egcs-1.1-reload patch needed for powerpc architecture. + * Fixed bugs (#17768, #20252, #25508, #27788). + * Reapplied alpha patch (#20875). + * Fixes first part of #22513, extended README.Debian (combining C & C++). + * Already fixed in earlier egcs-1.1 releases: #17963, #20252, #20524, + #20640, #22450, #24244, #24288, #28520. + + -- Matthias Klose Fri, 30 Oct 1998 13:41:45 +0200 + +egcs (1.1.0.91.58-1) experimental; urgency=low + + * New upstream version. That's the egcs-1.1.1 prerelease plus patches from + the cvs archive upto 29 Oct 1998. + * Merged files from the egcs and snapshot packages. + * Updated libg++ to libg++-2.8.1.2 (although the Debian package name is still + 2.8.2). + * Moved patches dir to patches-1.1. + * Dan Jacobowitz: + * This is a snapshot from the egcs_1_1_branch, with + libapi, reload, builtin-apply, and egcs patches from + the debian/patches/ dir applied, along with the egcs-gpc-patches + and gcc/p/diffs/gcc-egcs-2.91.55.diff. + * Conditionalize gcj and chill (since they aren't in this branch). + * Fake snapshots drop the -snap-main. + + -- Matthias Klose Thu, 29 Oct 1998 15:15:19 +0200 + +egcs-snapshot (1.1-19981019-5.1) experimental; urgency=low + + * This is a snapshot from the egcs_1_1_branch, with + libapi, reload, builtin-apply, and egcs patches from + the debian/patches/ dir applied, along with the egcs-gpc-patches + and gcc/p/diffs/gcc-egcs-2.91.55.diff. + * Conditionalize gcj and chill (since they aren't in this + branch). + * Fake snapshots drop the -snap-main. + + -- Daniel Jacobowitz Mon, 19 Oct 1998 22:19:23 -0400 + +egcs (1.1b-5) unstable; urgency=low + + * [debian/control.in] Fixed typo in dependencies (#28076, #28087, #28092). + + -- J.H.M. Dassen (Ray) Sun, 18 Oct 1998 22:56:51 +0200 + +egcs (1.1b-4) unstable; urgency=low + + * Strengthened g++ dependency on libstdc++_LIB_SO_-dev from + `Recommends' to `Depends'. + * Updated README.Debian for egcs-1.1. + * Updated TODO. + + -- Matthias Klose Thu, 15 Oct 1998 12:38:47 +0200 + +egcs-snapshot (19981005-0.1) experimental; urgency=low + + * Make libstdc++2.9-snap-main and libg++-snap-main provide + their mainstream equivalents and put those equivalents into + their shlibs file. + * Package gcj, the GNU Compiler for Java(TM). + + * New upstream version of egcs (The -regcs_latest_snapshot branch). + * Build without libg++ entirely. + * Leave out gpc for now - the internals are sufficiently different + that it does not trivially compile. + * Include an experimental reload patch for powerpc - this is, + in the words of its author, not release quality, but it allows + powerpc linuxthreads to function. + * On architectures where we are the primary compiler, let snapshots + build with --prefix=/usr and conflict with the stable versions. + * Package chill, a front end for the language Chill. + * Other applied patches from debian/patches/: egcs-patches and + builtin-apply-patch. + * Use reload.c revision 1.43 to avoid a nasty bug. + + -- Daniel Jacobowitz Wed, 7 Oct 1998 00:27:42 -0400 + +egcs (1.1b-3.1) unstable; urgency=low + + * NMU to fix the egcc -> gcc link once and for all + + -- Christopher C. Chimelis Tue, 22 Sep 1998 16:11:19 -0500 + +egcs (1.1b-3) unstable; urgency=low + + * Oops. The egcc -> gcc link on archs where gcc is egcc was broken. + Thanks to Chris Chimelis for pointing this out. + + -- J.H.M. Dassen (Ray) Mon, 21 Sep 1998 20:51:35 +0200 + +egcs (1.1b-2) unstable; urgency=low + + * New upstream spellfix release (Debian revision is 2 as the internal + version numbers didn't change). + * Added egcc -> gcc symlink on architectures where egcc is the primary C + compiler. Thus, maintainers of packages that require egcc, can now + simply use "egcc" without conditionals. + * Porters: we hope/plan to make egcs's gcc the default C compiler on all + platforms once the 2.2.x kernels are available. Please test this version + thoroughly, and give us a GO / NO GO for your architecture. + * Some symbols cpp used to predefine were removed upstream in order to clean + up the cpp namespace, but imake requires them for determining the proper + settings for LinuxMachineDefines (see /usr/X11R6/lib/X11/{Imake,linux}.cf), + thus we put them back. Thanks to Paul Slootman for reporting his imake + problems on Alpha. + * [gcc/config/alpha/linux.h] Added -D__alpha to CPP_PREDEFINES . + Thanks to Chris Chimelis for the alpha-only 1.1a-1.1 NMU which fixed + this already. + * [gcc/config/i386/linux.h] Added -D__i386__ to CPP_PREDEFINES . + * [gcc/config/sparc/linux.h] Has -Dsparc in CPP_PREDEFINES . + * [gcc/config/sparc/linux64.h] Has -Dsparc in CPP_PREDEFINES . + * [gcc/config/m68k/linux.h] Has -Dmc68000 in CPP_PREDEFINES . + * [gcc/config/rs6000/linux.h] Has -Dpowerpc in CPP_PREDEFINES . + * [gcc/config/arm/linux.h] Has -Darm in CPP_PREDEFINES . + * [gcc/config/i386/gnu.h] Has -Di386 in CPP_PREDEFINES . + * Small fixes and updates in README. + * Changes affecting the source package only: + * [gcc/Makefile.in, gcc/cp/Make-lang.in, gcc/p/Make-lang.in] + Daniel Jacobowitz: Ugly hacks of various kinds to make cplib2.txt get + properly regenerated with multilib. + * [debian/TODO] Created. + * [INSTALL/index.html] Fixed broken link. + + -- J.H.M. Dassen (Ray) Sun, 20 Sep 1998 14:05:15 +0200 + +egcs (1.1a-1) unstable; urgency=low + + * New upstream release. + * Added README.libstdc++ . + * Updated Standards-Version. + * Matthias: + * Downgraded gobjc dependency on egcs-docs from Recommends: to Suggests: . + * [libg++/Makefile.in] Patched not to rely on a `-f' flag of `ln'. + + -- J.H.M. Dassen (Ray) Wed, 2 Sep 1998 19:57:43 +0200 + +egcs (1.1-1) unstable; urgency=low + + * egcs-1.1 prerelease (from the last Debian package only the version file + changed). + * "Final" gpc Beta 2.1 gpc-19980830. + * Included libg++ and gpc in the .orig tarball. so that diffs are getting + smaller. + * debian/control.in: Changed maintainer address to galenh-egcs@debian.org. + * debian/copyright: Updated URLs. + + -- Matthias Klose Mon, 31 Aug 1998 12:43:13 +0200 + +egcs (1.0.99.56-0.1) unstable; urgency=low + + * New upstream snapshot 19980830 from CVS (called egcs-1.1 19980830). + * New libg++ snapshot 980828. + * Put all patches patches subdirectory; see patches/README in the source. + * debian/control.in: readded for libg++2.8.2-dev: + Replaces: libstdc++2.8-dev (<= 2.90.29-0.5) + * Renamed libg++2.9 package to libg++2.8.2. + * gcc/p/gpc-decl.c: Fix from Peter@Gerwinski.de; fixes optimization errors. + * patches/gpc-patch2: Fix from Peter@Gerwinski.de; fixes alpha errors. + * debian/rules: New configuration flag for building with and without + libstdc++api patch; untested without ... + + -- Matthias Klose Sun, 30 Aug 1998 12:04:22 +0200 + +egcs (1.0.99-0.6) unstable; urgency=low + + * PowerPC fixes. + * On powerpc, generate the -msoft-float libs and package them + as egcs-nof. + * Fix signed char error in gpc. + * Create a libg++.so.2.9 compatibility symlink. + + -- Daniel Jacobowitz Tue, 25 Aug 1998 11:44:09 -0400 + +egcs (1.0.99-0.5) unstable; urgency=low + + * New upstream snapshot 19980824. + * New gpc snapshot gpc-980822; reenabled gpc for alpha. + + -- Matthias Klose Tue, 25 Aug 1998 01:21:08 +0200 + +egcs (1.0.99-0.4) unstable; urgency=low + + * New upstream snapshot 19980819. Should build glibc 2.0.9x on PPC. + + -- Matthias Klose Wed, 19 Aug 1998 14:18:07 +0200 + +egcs (1.0.99-0.3) unstable; urgency=low + + * New upstream snapshot 19980816. + * debian/rules: build correct debian/control and debian/*.shlibs + * Enabled Haifa scheduler for ix86. + + -- Matthias Klose Mon, 17 Aug 1998 16:29:35 +0200 + +egcs (1.0.99-0.2) unstable; urgency=low + + * New upstream snapshot: egcs-19980812, minor changes only. + * Fixes for building on `primary' targets. + * Disabled gpc on `alpha' architecture. + * Uses debhelper 1.1.6 + * debian/control.in: Replace older snapshot versions in favor of newer + normal versions. + * debian/rules: Fixes building of binary-arch target only. + + -- Matthias Klose Thu, 13 Aug 1998 11:59:41 +0200 + +egcs (1.0.99-0.1) unstable; urgency=low + + * New upstream version: pre egcs-1.1 version. + * Many changes ... for details see debian/changelog.snapshot in the + source package. + * New packages libstdc++2.9 and libstdc++2.9-dev. + * New libg++ snapshot 980731: new packages libg++2.9 and libg++2.9-dev. + * New gpc snapshot gpc-980729: new package gpc. + * Uses debhelper 1.1 + + -- Matthias Klose Mon, 10 Aug 1998 13:00:27 +0200 + +egcs-snapshot (19980803-4) experimental; urgency=low + + * rebuilt debian/control. + + -- Matthias Klose Wed, 5 Aug 1998 08:51:47 +0200 + +egcs-snapshot (19980803-3) experimental; urgency=low + + * debian/rules: fix installation locations of NEWS, header and + `undocumented' files. + * man pages aren't compressed for the snapshot package. + + -- Matthias Klose Tue, 4 Aug 1998 17:34:31 +0200 + +egcs-snapshot (19980803-2) experimental; urgency=low + + * debian/rules: Uses debhelper. Old in debian/rules.old. + renamed postinst, prerm files for use with debhelper. + * debian/{libg++2.9,libstdc++2.9}/postinst: call ldconfig only, + when called for configure. + * egcs-docs is architecture independent package. + * new libg++ snapshot 980731. + * installed libstdc++ api patch (still buggy). + + -- Matthias Klose Mon, 3 Aug 1998 13:20:59 +0200 + +egcs-snapshot (19980729-1) experimental; urgency=low + + * New snapshot version 19980729 from CVS archive. + * New gpc snapshot gpc-980729. + * Let gcc/configure decide about using the Haifa scheduler. + * Remove -DDEBIAN. That was needed for the security improvements with + regard to the /tmp problem. egcs-1.1 chooses another approach. + * Save test-protocol and extract gpc errors to gpc-test-summary. + * Tighten binutils dependency to 2.9.1. + * debian/rules: new build-info target + * debian/{control.in,rules}: _SO_ and BINUTILSV substitution. + * debian/rules: add dependency for debian/control. + * debian/rules: remove bin/c++filt + * TODO: next version will use debhelper; the unorganized moving of + files becomes unmanageable ... + * TODO: g++ headers in stdc++ package? check! + + -- Matthias Klose Thu, 30 Jul 1998 12:10:20 +0200 + +egcs-snapshot (19980721-1) experimental; urgency=low + + * Unreleased. Infinite loops in executables made by gpc. + + -- Matthias Klose Wed, 22 Jul 1998 18:07:20 +0200 + +egcs-snapshot (19980715-1) experimental; urgency=low + + * New snapshot version from CVS archive. + * New gpc snapshot gpc-980715. + * New libg++ version libg++-2.8.2-980708. Changed versioning + schema for library. The major versions of libc, libstdc++ and the + g++ interface are coded in the library name. Use this new schema, + but provide a symlink to our previous schema, since the library + seems to be binary compatible. + * [debian/rules]: Fixed bug in build target, when bootstrap returns + with an error + + -- Matthias Klose Wed, 15 Jul 1998 10:55:05 +0200 + +egcs-snapshot (19980701-1) experimental; urgency=low + + * New snapshot version from CVS archive. + Two check programs in libg++ had to be manually killed to finish the + testsuite (tBag and tSet). + * New gpc snapshot gpc-980629. + * Incorporated debian/rules changes from egcs-1.0.3a-0.5 (but don't remove + gcc/cp/parse.c gcc/c-parse.c gcc/c-parse.y gcc/objc/objc-parse.c + gcc/objc/objc-parse.y, since these files are part of the release). + * Disable the -DMKTEMP_EACH_FILE -DHAVE_MKSTEMP -DDEBIAN flags for the + snapshot. egcs-1.1 will have another solution. + * Don't bootstrap the snapshot with -fno-force-mem. Internal compiler + error :-( + * libf2c.a and f2c.h have changed names to libg2c.a and g2c.h and + have moved again into the gcc-lib dir. They are installed under + libg2c.a and g2c.h. Is it necessary to provide links f2c -> g2c ? + * debian/rules: reflect change of build dir of libraries. + + -- Matthias Klose Wed, 2 Jul 1998 13:15:28 +0200 + +egcs-snapshot (19980628-0.1) experimental; urgency=low + + * New upstream snapshot version. + * Non-maintainer upload; Matthias appears to be absent currently. + * Updated shlibs. + * Merged changes from regular egcs: + * [debian/control] Tightened dependency on binutils to 2.8.1.0.23 or + newer, as according to INSTALL/SPECIFIC PowerPC (and possibly Sparc) + need this. + * [debian/rules] Clean up some generated files outside builddir, + so the .diff.gz becomes smaller. + * [debian/rules] Partial sync/update with the one for the regular egcs + version. + * [debian/rules] Make gcc/p/configure executable. + + -- J.H.M. Dassen (Ray) Wed, 1 Jul 1998 07:12:15 +0200 + +egcs (1.0.3a-0.6) frozen unstable; urgency=low + + * Some libg++ development files were in libstdc++2.8-dev rather than + libg++2.8-dev. Fixed this and dealt with upgrading from the earlier + versions (fixes #23908; this bug is not marked release-critical, but + is annoying and can be quite confusing for users. Therefore, I think + this fix should go in 2.0). + + -- J.H.M. Dassen (Ray) Tue, 30 Jun 1998 11:10:14 +0200 + +egcs (1.0.3a-0.5) frozen unstable; urgency=low + + * Fixed location of .hP files (Fixes #23448). + * [debian/rules] simplified extraction of the files for libg++2.8-dev. + + -- J.H.M. Dassen (Ray) Wed, 17 Jun 1998 09:33:41 +0200 + +egcs (1.0.3a-0.4) frozen unstable; urgency=low + + * [gcc/gcc.c] There is one call to choose_temp_base for determining the + tempdir to be used only; #ifdef HAVE_MKSTEMP delete the tempfile created + as a side effect. (fixes #23123 for egcs). + * [gcc/collect2.c] There's still a vulnerability here; I don't see how + I can fix it without leaving behind tempfiles though. + * [debian/control] Tightened dependency on binutils to 2.8.1.0.23 or + newer, as according to INSTALL/SPECIFIC PowerPC (and possibly Sparc) + need this. + * [debian/rules] Clean up some generated files outside builddir, so the + .diff.gz becomes smaller. + + -- J.H.M. Dassen (Ray) Sat, 13 Jun 1998 09:06:52 +0200 + +egcs-snapshot (19980608-1) experimental; urgency=low + + * New snapshot version. + + -- Matthias Klose Tue, 9 Jun 1998 14:07:44 +0200 + +egcs (1.0.3a-0.3) frozen unstable; urgency=high (security fixes) + + * [gcc/toplev.c] set flag_force_mem to 1 at optimisation level 3 or higher. + This works around #17768 which is considered release-critical. + * Changes by Matthias: + * [debian/README] Documentation of the compiler situation for Objective C. + * [debian/rules, debian/control.*] Generate control file from a master + file. + * [debian/rules] Updates for Pascal and Fortran parts; brings it in sync + with the one for the egcs snapshots. + * Use the recommended settings LDFLAGS=-s CFLAGS= BOOT_CFLAGS='-O2'. + * Really compile -DMKTEMP_EACH_FILE -DHAVE_MKSTEMP (really fixes #19453 + for egcs). + * [gcc/gcc.c] A couple of temp files weren't marked for deletion. + + -- J.H.M. Dassen (Ray) Sun, 31 May 1998 22:56:22 +0200 + +egcs (1.0.3a-0.2) frozen unstable; urgency=high (security fixes) + + * Security improvements with regard to the /tmp problem + (gcc opens predictably named files in TMPDIR which can be abused via + symlinks) (Fixes #19453 for egcs). + * Compile -DMKTEMP_EACH_FILE to ensure the %u name is generated randomly + every time; affects gcc/gcc.c . + * [gcc/choose-temp.c, libiberty/choose-temp.c]: use mktemp(3) if compiled + -DUSE_MKSTEMP . + * Security improvements: don't use the result of choose_temp_base in a + predictable fashion. + [gcc/gcc.c]: + * @c, @objective-c: use random name rather then tempbasename.i for + intermediate preprocessor output (%g.i -> %d%u). + * @c, @objective-c: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @c, @objective-c, @cpp-output, @assembler-with-cpp: switched + "as [-o output file] " to + "as [-o output file]". + * @c, @objective-c, @assembler-with-cpp: use previous random name + (cc1|cpp output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U) + [gcc/f/lang-specs.h]: + * @f77-cpp-input: use random name rather then tempbasename.i for + intermediate cpp output (%g.i -> %d%u). + * @f77-cpp-input: use previous random name (cpp output) rather than + tempbasename.i for f771 input (%g.i -> %U). + * @f77-cpp-input: switched + "as [-o output file] " to + "as [-o output file]". + * @f77-cpp-input: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: use random name rather then tempbasename.i for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @f77: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %U). + * Run the testsuite (this requires the dejagnu package in experimental; + unfortunately, it is difficult to distinguish this version from the one + in frozen). + if possible, and log the results in warn_summary and bootstrap-summary. + * [gcc/choose-temp.c, libiberty/choose-temp.c]: s|returh|return| in + comment. + * Added notes on the Debian compiler setup [debian/README] to the + development packages. + * Matthias: + * [libg++/etc/lf/Makefile.in] Replaced "-ltermcap" by "-lncurses". + * [debian/rules] Updated so it can be used for both egcs releases and + snapshots easily; added support for the GNU Pascal Compiler gpc. + * [contrib/test_summary, contrib/warn_summary] Added from CVS. + * Run compiler checks and include results in /usr/doc/. + * Updates to the README. + * [debian/rules] Use assignments to speed up startup. + * [debian/rules] Show the important variables at the start of the build + process. + * [debian/control.secondary] Added a dependency of gobjc on egcc on + architectures where egcs provides the secondary compiler, as + /usr/bin/egcc is the compiler driver for gobjc. (Fixes #22829). + * [debian/control.*] Bumped Standards-Version; used shorter version + numbers in the dependency relationships (esthetic difference only); + fixed typo. + + -- J.H.M. Dassen (Ray) Tue, 26 May 1998 21:47:41 +0200 + +egcs-snapshot (19980525-1) experimental; urgency=low + + * New snapshot version. + + -- Matthias Klose Tue, 26 May 1998 18:04:06 +0200 + +egcs-snapshot (19980517-1) experimental; urgency=low + + * "Initial" release of the egcs-snapshot package; many debian/* files + derived from the egcs-1.0.3a-0.1 package (maintained by Galen Hazelwood + , NMU's by J.H.M. Dassen (Ray) ) + * The egcs-snapshot packages can coexist with the packages of the + egcs release. Package names have a '-ss' appended. + * All packages are installed in a separate tree (/usr/lib/egcs-ss following + the FHSS). + * Made all snapshot packages extra, all snapshot packages conflict + with correspondent egcs packages, which are newer than the snapshot. + * Included libg++-2.8.1-980505. + * Included GNU Pascal (gpc-980511). + * Haifa scheduler enabled for all snapshot packages. + * Run compiler checks and include results in /usr/doc/. + * Further information in /usr/doc//README.snapshot. + + -- Matthias Klose Wed, 20 May 1998 11:14:06 +0200 + +egcs (1.0.3a-0.1) frozen unstable; urgency=low + + * New upstream release egcs-2.90.29 980515 (egcs-1.0.3 release) + (we were using 1.0.3-prerelease). This includes the Haifa patches + we had since 1.0.3-0.2 and the gcc/objc/thr-posix.c patch we had + since 1.0.3-0.1; the differences with 1.0.3-prerelease + patches + we had is negligable. + * iostream info documentation was in the wrong package (libg++2.8-dev). + Now it's in libstdc++2.8-dev. (Thanks to Jens Rosenboom for bringing + this to my attention). As 1.0.3-0.3 didn't make it out of Incoming, + I'm not adding "Replaces:" for this; folks who had 1.0.3-0.3 installed + already know enough to use --force-overwrite. + * [gcc/objc/objc-act.c] Applied patch Matthias Klose supplied me with that + demangles Objective C method names in gcc error messages. + * Explicitly disable Haifa scheduling on Alpha, to make it easier to use + this package's diff with egcs snapshots, which may turn on Haifa + scheduling even though it is still unstable. (Requested by Chris Chimelis) + * Don't run "configure" again if builddir already exists (makes it faster + to restart builds in case one is hacking internals). Requested by + Johnnie Ingram. + * [gcc/gbl-ctors.h] Don't use extern declaration for atexit on glibc 2.1 + and higher (the prototype has probably changed; having the declaration + broke Sparc compiles). + * [debian/rules] Determine all version number automatically (from the + version string in gcc/version.c). + * [debian/copyright] Updated FTP locations; added text about libg++ (fixes + #22465). + + -- J.H.M. Dassen (Ray) Sat, 16 May 1998 17:41:44 +0200 + +egcs (1.0.3-0.3) frozen unstable; urgency=low + + * Made an "egcs-doc" package containing documentation for egcs (e)gcc, + g++, gobjc, so that administrators can choose whether to have this + documenation or the documentation that comes with the GNU gcc package. + Dependency on this is Recommends: on architectures where egcs provides + the primary C compiler; Suggests: on the others (where GNU gcc is still + the primary C compiler). + * Use the g++ FAQ from gcc/cp rather than libg++, as that version is more + up to date. + * Added iostream info documentation to libstdc++2.8-dev. + + -- J.H.M. Dassen (Ray) Wed, 13 May 1998 08:46:10 +0200 + +egcs (1.0.3-0.2) frozen unstable; urgency=low + + * Added libg++ that works with egcs, found at + ftp://ftp.yggdrasil.com/private/hjl/libg++-2.8.1-980505.tar.gz + (fixes #20587 (Severity: important)). + * The "libg++" and "libg++-dev" virtual packages now refer to the GNU + extensions. + * Added the g++ FAQ that comes with libg++ to the g++ package. + * libg++/Makefile.in: added $(srcdir) to rule for g++FAQ.info so that it + builds OK in builddir. + * Added -D__i386__ to the cpp predefines on intel. + * Patches Matthias supplied me with: + * Further 1.0.3 prerelease patches from CVS. + This includes patches to the Haifa scheduler. Alpha porters, please + check if this makes the Haifa scheduler OK again. + * Objective C patches from CVS. + + -- J.H.M. Dassen (Ray) Fri, 8 May 1998 14:43:20 +0200 + +egcs (1.0.3-0.1) frozen unstable; urgency=low (high for maintainers that use objc) + + * bug fixes only in new upstream version + * Applied patches from egcs CVS archive (egcs_1_03_prerelease) + (see gcc/ChangeLog in the egcs source package). + * libstdc++2.8-dev no longer Provides: libg++-dev (fixes #21153). + * libstdc++2.8-dev now Conflicts: libg++27-dev (bo), + libg++272-dev (hamm) [regular packages] rather than + Conflicts: libg++-dev [virtual package] to prepare the way for "libg++" + to be used as a virtual package for a new libg++ package (i.e. an up to + date one, which not longer contains libstdc++, but only the GNU + extensions) that is compatible with the egcs g++ packages. Such a package + isn't available yet. Joel Klecker tried building libg++2.8.1.1a within + egcs's libstdc++ setup, but it appears to need true gcc 2.8.1 . + * Filed Severity: important bugs against wxxt1-dev (#21707) because these + still depend on libg++-dev, which is removed in this version. + A fixed libsidplay1-dev has already been uploaded. + * libstdc++2.8 is now Section: base and Priority: required (as dselect is + linked against it). + * Disabled Haifa scheduling on Alpha again; Chris Chimelis reported + that this caused problems on some machines. + * [gcc/extend.texi] + ftp://maya.idiap.ch/pub/tmb/usenix88-lexic.ps.Z is no longer available; + use http://master.debian.org/~karlheg/Usenix88-lexic.pdf . + (fixes the egcs part of #20002). + * Updated Standards-Version. + * Changed chmod in debian/rules at Johnie Ingram's request. + * Rather than hardwire the Debian part of the packages' version number, + extract it from debian/changelog . + * Use gcc/objc/thr-posix.c from 980418 egcs snapshot to make objc work. + (Fixes #21192). + * Applied workaround for the GNUstep packages on sparc systems. + See README.sparc (on sparc packages only) in the doc directory. + This affects the other compilers as well. + * Already done in 1.0.2-0.7: the gobjc package now provides a virtual + package objc-compiler. + + -- J.H.M. Dassen (Ray) Tue, 28 Apr 1998 12:05:28 +0200 + +egcs (1.0.2-0.7) frozen unstable; urgency=low + + * Separated out Objective-C compiler. + * Applied patch from http://www.cygnus.com/ml/egcs/1998-Apr/0614.html + + -- Matthias Klose Fri, 17 Apr 1998 10:25:48 +0200 + +egcs (1.0.2-0.6) frozen unstable; urgency=low + + * Due to upstream changes (libg++ is now only the GNU specific C++ + classes, and is no longer maintained; libstdc++ contains the C++ + standard library, including STL), the virtual "libg++-dev" + package's meaning has become confusing. Therefore, new or updated + packages should no longer use the virtual "libg++-dev" package. + * Corrected g++'s Recommends to libstdc++2.8-dev (>=2.90.27-0.1). + The previous version had Recommends: libstdc++-dev (>=2.90.27-0.1) + which doesn't work, as libstc++-dev is a virtual package. + * Bumped Standards-Version. + + -- J.H.M. Dassen (Ray) Tue, 14 Apr 1998 11:52:08 +0200 + +egcs (1.0.2-0.5) frozen unstable; urgency=low (high for maintainers of packages that use libstdc++) + + * Modified shlibs file for libstdc++ to generate versioned dependencies, + as it is not link compatible with the 1.0.1-x versions in + project/experimental. (Fixes #20247, #20033) + Packages depending on libstd++ should be recompiled to fix their + dependencies. + * Strenghtened g++'s Recommends: libstdc++-dev to the 1.0.2 version or + newer. + * Fixed problems with the unknown(7) symlink for gcov. + * Reordering links now works. + + -- Adam Heath Sun, 12 Apr 1998 13:09:30 -0400 + +egcs (1.0.2-0.4) frozen unstable; urgency=low + + * Unreleased. This is the version Adam Heath received from me. + * Replaces: gcc (<= 2.7.2.3-3) so that the overlap with the older gcc + packages (including bo's gcc_2.7.2.1-8) is handled properly + (fixes #19931, #19672, #20217, #20593). + * Alpha architecture (fixes #20875): + * Patched gcc/config/alpha/linux.h for the gmon functions to operate + properly. + * Made egcs the primary C compiler. + * Enabled Hafia scheduling. + * Lintian-detected problems: + * E: libstdc++2.8: ldconfig-symlink-before-shlib-in-deb usr/lib/libstdc++.so.2.8 + * E: egcc: binary-without-manpage gcov + Reported as wishlist bug; added link to undocumented(7). + * W: libstdc++2.8: non-standard-executable-perm usr/lib/libstdc++.so.2.8.0 0555 + * E: libstdc++2.8: shlib-with-executable-bit usr/lib/libstdc++.so.2.8.0 0555 + + -- J.H.M. Dassen (Ray) Fri, 10 Apr 1998 14:46:46 +0200 + +egcs (1.0.2-0.3) frozen unstable; urgency=low + + * Really fixed dependencies. + + -- J.H.M. Dassen (Ray) Mon, 30 Mar 1998 11:30:26 +0200 + +egcs (1.0.2-0.2) frozen unstable; urgency=low + + * Fixed dependencies. + + -- J.H.M. Dassen (Ray) Sat, 28 Mar 1998 13:58:58 +0100 + +egcs (1.0.2-0.1) frozen unstable; urgency=low + + * New upstream version; it now has -Di386 in CPP_PREDEFINES. + * Only used the debian/* patches from 1.0.1-2; the rest of it appears + to be in 1.0.2 already. + + -- J.H.M. Dassen (Ray) Fri, 27 Mar 1998 11:47:14 +0100 + +egcs (1.0.1-2) unstable; urgency=low + + * Integrated pre-release 1.0.2 patches + * Split out g++ + * egcs may now provide either the primary or secondary C compiler + + -- Galen Hazelwood Sat, 14 Mar 1998 14:15:32 -0700 + +egcs (1.0.1-1) unstable; urgency=low + + * New upstream version + * egcs is now the standard Debian gcc! + * gcc now provides c-compiler (#15248 et al.) + * g77 now provides fortran77-compiler + * g77 dependencies now correct (#16991) + * /usr/doc/gcc/changelog.gz now has correct permissions (#16139) + + -- Galen Hazelwood Sat, 7 Feb 1998 19:22:30 -0700 + +egcs (1.0-1) experimental; urgency=low + + * First official release + + -- Galen Hazelwood Thu, 4 Dec 1997 16:30:11 -0700 + +egcs (970917-1) experimental; urgency=low + + * New upstream snapshot (There's a lot of stuff here as well, including + a new libstdc++, but it _still_ won't build...) + * eg77 driver now works properly + + -- Galen Hazelwood Wed, 17 Sep 1997 20:44:29 -0600 + +egcs (970904-1) experimental; urgency=low + + * New upstream snapshot + + -- Galen Hazelwood Sun, 7 Sep 1997 18:25:06 -0600 + +egcs (ss-970814-1) experimental; urgency=low + + * Initial packaging (of initial snapshot!) + + -- Galen Hazelwood Wed, 20 Aug 1997 00:36:28 +0000 + +gcc272 (2.7.2.3-12) unstable; urgency=low + + * Compiled on a glibc-2.0 based system. + * Reflect move of manpage to /usr/share in gcc.postinst as well. + * Moved gcc272-docs to section doc, priority optional. + + -- Matthias Klose Sat, 28 Aug 1999 13:42:13 +0200 + +gcc272 (2.7.2.3-11) unstable; urgency=low + + * Follow Debian policy for GNU system type (fixes #42657). + * config/i386/linux.h: Remove %[cpp_cpu] from CPP_SPEC. Stops gcc-2.95 + complaining about obsolete spec operators (using gcc -V 2.7.2.3). + Patch suggested by Zack Weinberg . + + -- Matthias Klose Sun, 15 Aug 1999 20:12:21 +0200 + +gcc272 (2.7.2.3-10) unstable; urgency=low + + * Renamed source package to gcc272. The egcs source package is renamed + to gcc, because it's now the "official" GNU C compiler. + * Changed maintainer address to "Debian GCC maintainers". + * Install info and man stuff to /usr/share. + + -- Matthias Klose Thu, 27 May 1999 12:29:23 +0200 + +gcc (2.7.2.3-9) unstable; urgency=low + + * debian/{postinst,prerm}-doc: handle gcc272.info, not gcc.info. + Fixes #36306. + + -- Matthias Klose Tue, 20 Apr 1999 07:32:58 +0200 + +gcc (2.7.2.3-8) unstable; urgency=low + + * Make gcc-2.7 the secondary compiler. Rename gcc package to gcc272. + On i386, sparc and m68k, this package is compiled against glibc2.0. + * The cpp package is built from the egcs source package. + + -- Matthias Klose Mon, 29 Mar 1999 22:48:50 +0200 + +gcc (2.7.2.3-7) frozen unstable; urgency=low + + * Separated out ObjC compiler to gobjc27 package. + * Changed maintainer address. + * Synchronized README.Debian with egcs-1.1.1-3. + + -- Matthias Klose Tue, 29 Dec 1998 19:05:26 +0100 + +gcc (2.7.2.3-6) frozen unstable; urgency=low + + * Link with -lc on i386, m68k, sparc, when building shared libraries + (fixes #25122). + + -- Matthias Klose Thu, 3 Dec 1998 12:12:12 +0200 + +gcc (2.7.2.3-5) frozen unstable; urgency=low + + * Updated maintainer info. + * Updated Standards-Version; made lintian-clean. + * gcc-docs can coexist with the latest egcs-docs, so added (<= version) to + the Conflicts. + * Updated the README and renamed it to README.Debian . + * Put a reference to /usr/doc/gcc/README.Debian in the info docs. + * Updated description of g++272 . + * Clean up generated info files, to keep the diff small. + + -- J.H.M. Dassen (Ray) Tue, 17 Nov 1998 20:05:59 +0100 + +gcc (2.7.2.3-4.8) frozen unstable; urgency=high + + * Non-maintainer release + * Fix type in extended description + * Removed wrong test in postinst + * Add preinst to clean up some stuff from an older gcc package properly + and stop man complaining about dangling symlinks + + -- Wichert Akkerman Fri, 17 Jul 1998 18:48:32 +0200 + +gcc (2.7.2.3-4.7) frozen unstable; urgency=high + + * Really fixed gcc-docs postinst (Fixes #23470), so that `gcc-docs' + becomes installable. + + -- J.H.M. Dassen (Ray) Mon, 15 Jun 1998 07:53:40 +0200 + +gcc (2.7.2.3-4.6) frozen unstable; urgency=high + + * [gcc.c] There is one call to choose_temp_base for determining the + tempdir to be used only; + #ifdef HAVE_MKSTEMP delete the tempfile created as a side effect. + (fixes #23123 for gcc). + * gcc-docs postinst was broken (due to a broken line) (fixes #23391, #23401). + * [debian/control] description for gcc-docs said `egcs' where it should have + said `gcc' (fixes #23396). + + -- J.H.M. Dassen (Ray) Thu, 11 Jun 1998 12:48:50 +0200 + +gcc (2.7.2.3-4.5) frozen unstable; urgency=high + + * The previous version left temporary files behind, as they were not + marked for deletion afterwards. + + -- J.H.M. Dassen (Ray) Sun, 31 May 1998 22:49:14 +0200 + +gcc (2.7.2.3-4.4) frozen unstable; urgency=high (security fixes) + + * Security improvements with regard to the /tmp problem + (gcc opens predictably named files in TMPDIR which can be abused via + symlinks) (Fixes #19453 for gcc): + * Compile -DMKTEMP_EACH_FILE to ensure the %u name is generated randomly + every time; affects gcc/gcc.c . + * [cp/g++.c, collect2.c, gcc.c] If compiled -DHAVE_MKSTEMP use mkstemp(3) + rather than mktemp(3). + * Security improvements: don't use the result of choose_temp_base in a + predictable fashion. + [gcc.c]: + * @c, @objective-c: use random name rather then tempbasename.i for + intermediate preprocessor output (%g.i -> %d%u). + * @c, @objective-c: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @c, @objective-c, @cpp-output, @assembler-with-cpp: switched + "as [-o output file] " to + "as [-o output file]". + * @c, @objective-c, @assembler-with-cpp: use previous random name + (cc1|cpp output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U) + [f/lang-specs.h]: + * @f77-cpp-input: use random name rather then tempbasename.i for + intermediate cpp output (%g.i -> %d%u). + * @f77-cpp-input: use previous random name (cpp output) rather than + tempbasename.i for f771 input (%g.i -> %U). + * @f77-cpp-input: switched + "as [-o output file] " to + "as [-o output file]". + * @f77-cpp-input: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: use random name rather then tempbasename.i for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @f77: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %U). + + -- J.H.M. Dassen (Ray) Sat, 30 May 1998 17:27:03 +0200 + +gcc (2.7.2.3-4.3) frozen unstable; urgency=high + + * The "alpha" patches from -4 affected a lot more than alpha support, + and in all likeliness broke compilation of libc6 2.0.7pre3-1 + and 2.0.7pre1-4 . I removed them by selective application of the + diff between -4 and -4. (should fix #22292). + * Fixed reference to the trampolines paper (fixes #20002 for Debian; + this still needs to be forwarded). + * This is for frozen too. (obsoletes #22390 (request to move -4.2 to + frozen)). + * Split of gcc-docs package, so that the gcc can be succesfully installed + on systems that have egcs-docs installed. + * Added the README on the compiler situation that's already in the egcs + packages. + * Use the recommended settings LDFLAGS=-s CFLAGS= BOOT_CFLAGS='-O2'. + + -- J.H.M. Dassen (Ray) Thu, 28 May 1998 20:03:59 +0200 + +gcc (2.7.2.3-4.2) unstable; urgency=low + + * Still for unstable, as I have received no feedback about the g++272 + package yet. + * gcc now Provides: objc-compiler . + * Clean up /etc/alternatives/{g++,g++.1.gz} if they are dangling. + (fixes #19765, #20563) + + -- J.H.M. Dassen (Ray) Wed, 22 Apr 1998 12:40:45 +0200 + +gcc (2.7.2.3-4.1) unstable; urgency=low + + * Bumped Standards-Version. + * Forked off a g++272 package (e.g. for code that uses the GNU extensions + in libg++); for now this is in "unstable" only; feedback appreciated. + * Some cleanup (lintian): permissions, absolute link, gzip manpage. + + -- J.H.M. Dassen (Ray) Fri, 17 Apr 1998 13:05:25 +0200 + +gcc (2.7.2.3-4) unstable; urgency=low + + * Added alpha patches + * Only build C and objective-c compilers, split off g++ + + -- Galen Hazelwood Sun, 8 Mar 1998 21:16:39 -0700 + +gcc (2.7.2.3-3) unstable; urgency=low + + * Added patches for m68k + * Added patches for sparc (#13968) + + -- Galen Hazelwood Fri, 17 Oct 1997 18:25:21 -0600 + +gcc (2.7.2.3-2) unstable; urgency=low + + * Added g77 support (g77 0.5.21) + + -- Galen Hazelwood Wed, 10 Sep 1997 18:44:54 -0600 + +gcc (2.7.2.3-1) unstable; urgency=low + + * New upstream version + * Now using pristine source + * Removed misplaced paragraph in cpp.texi (#10877) + * Fix security bug for temporary files (#5298) + * Added Suggests: libg++-dev (#12335) + * Patched objc/thr-posix.c to support conditions (#12502) + + -- Galen Hazelwood Mon, 8 Sep 1997 12:20:07 -0600 + +gcc (2.7.2.2-7) unstable; urgency=low + + * Made cc and c++ managed through alternates mechanism (for egcs) + + -- Galen Hazelwood Tue, 19 Aug 1997 22:37:03 +0000 + +gcc (2.7.2.2-6) unstable; urgency=low + + * Tweaked Objective-C thread support (#11069) + + -- Galen Hazelwood Wed, 9 Jul 1997 11:56:57 -0600 + +gcc (2.7.2.2-5) unstable; urgency=low + + * More updated m68k patches + * Now conflicts with libc5-dev (#10006, #10112) + * More strict Depends: cpp, prevents version mismatch (#9954) + + -- Galen Hazelwood Thu, 19 Jun 1997 01:29:02 -0600 + +gcc (2.7.2.2-4) unstable; urgency=low + + * Moved to unstable + * Temporarily removed fortran support (waiting for new g77) + * Updated m68k patches + + -- Galen Hazelwood Fri, 9 May 1997 13:35:14 -0600 + +gcc (2.7.2.2-3) experimental; urgency=low + + * Built against libc6 (fixes bug #8511) + + -- Galen Hazelwood Fri, 4 Apr 1997 13:30:10 -0700 + +gcc (2.7.2.2-2) experimental; urgency=low + + * Fixed configure to build crt{begin,end}S.o on i386 + + -- Galen Hazelwood Tue, 11 Mar 1997 16:15:02 -0700 + +gcc (2.7.2.2-1) experimental; urgency=low + + * Built for use with libc6-dev (experimental purposes only!) + * Added m68k patches from Andreas Schwab + + -- Galen Hazelwood Fri, 7 Mar 1997 12:44:17 -0700 + +gcc (2.7.2.1-7) unstable; urgency=low + + * Patched to support g77 0.5.20 + + -- Galen Hazelwood Thu, 6 Mar 1997 22:20:23 -0700 + +gcc (2.7.2.1-6) unstable; urgency=low + + * Added (small) manpage for protoize/unprotoize (fixes bug #6904) + * Removed -lieee from specs file (fixes bug #7741) + * No longer builds aout-gcc + + -- Galen Hazelwood Mon, 3 Mar 1997 11:10:20 -0700 + +gcc (2.7.2.1-5) unstable; urgency=low + + * debian/control now lists cpp in section "interpreters" + * Re-added Objective-c patches for unstable + + -- Galen Hazelwood Wed, 22 Jan 1997 10:27:52 -0700 + +gcc (2.7.2.1-4) stable unstable; urgency=low + + * Changed original source file so dpkg-source -x works + * Removed Objective-c patches (unsafe for stable) + * Built against rex's libc, so fixes placed in -3 are available to + those still using rex + + -- Galen Hazelwood Tue, 21 Jan 1997 11:11:53 -0700 + +gcc (2.7.2.1-3) unstable; urgency=low + + * New (temporary) maintainer + * Updated to new standards and source format + * Integrated aout-gcc into gcc source package + * Demoted aout-gcc to Priority "extra" + * cpp package description more clear (fixes bug #5428) + * Removed cpp "Replaces: gcc" (fixes bug #5762) + * Minor fix to invoke.texi (fixes bug #2909) + * Added latest Objective-C patches for GNUstep people (fixes bug #4657) + + -- Galen Hazelwood Sun, 5 Jan 1997 09:57:36 -0700 --- gcc-4.8-4.8.5.orig/debian/compat +++ gcc-4.8-4.8.5/debian/compat @@ -0,0 +1 @@ +5 --- gcc-4.8-4.8.5.orig/debian/control +++ gcc-4.8-4.8.5/debian/control @@ -0,0 +1,1118 @@ +Source: gcc-4.8 +Section: devel +Priority: optional +Maintainer: Ubuntu Core developers +XSBC-Original-Maintainer: Debian GCC Maintainers +Uploaders: Matthias Klose +Standards-Version: 3.9.8 +Build-Depends: debhelper (>= 5.0.62), dpkg-dev (>= 1.17.11), g++-multilib [amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32], + libc6.1-dev (>= 2.13-0ubuntu6) [alpha ia64] | libc0.3-dev (>= 2.13-0ubuntu6) [hurd-i386] | libc0.1-dev (>= 2.13-0ubuntu6) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= 2.13-0ubuntu6), libc6-dev (>= 2.13-31) [armel armhf], libc6-dev-amd64 [i386 x32], libc6-dev-sparc64 [sparc], libc6-dev-sparc [sparc64], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64 x32], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc1 [amd64 ppc64 kfreebsd-amd64 mipsn32 mipsn32el mips64 mips64el s390x sparc64 x32], libn32gcc1 [mips mipsel mips64 mips64el], lib64gcc1 [i386 mips mipsel mipsn32 mipsn32el powerpc sparc s390 x32], libc6-dev-mips64 [mips mipsel mipsn32 mipsn32el], libc6-dev-mipsn32 [mips mipsel mips64 mips64el], libc6-dev-mips32 [mipsn32 mipsn32el mips64 mips64el], libc6-dev-x32 [amd64 i386], libx32gcc1 [amd64 i386], libc6-dev-armhf [armel], libhfgcc1 [armel], libc6-dev-armel [armhf], libsfgcc1 [armhf], + kfreebsd-kernel-headers (>= 0.84) [kfreebsd-any], + m4, libtool, autoconf2.64, gcc-4.9-base, + libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], + gawk, lzma, xz-utils, patchutils, + zlib1g-dev, systemtap-sdt-dev [linux-any kfreebsd-any hurd-any], + binutils (>= 2.22) | binutils-multiarch (>= 2.22), binutils-hppa64-linux-gnu [hppa], + gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, + texinfo (>= 4.3), locales, sharutils, + procps, zlib1g-dev, libantlr-java, python, libffi-dev, fastjar, libmagic-dev, libecj-java (>= 3.3.0-2), zip, libasound2-dev [ !hurd-any !kfreebsd-any], libxtst-dev, libxt-dev, libgtk2.0-dev (>= 2.4.4-2), libart-2.0-dev, libcairo2-dev, g++-4.8 [armel armhf], netbase, + libcloog-isl-dev (>= 0.18), libmpc-dev (>= 1.0), libmpfr-dev (>= 3.0.0-9~), libgmp-dev (>= 2:5.0.1~), + dejagnu [!m68k !hurd-amd64 !hurd-i386 !hurd-alpha !kfreebsd-amd64 !kfreebsd-i386 !kfreebsd-alpha], autogen, realpath (>= 1.9.12), chrpath, lsb-release, quilt +Build-Depends-Indep: doxygen (>= 1.7.2), graphviz (>= 2.2), ghostscript, texlive-latex-base, xsltproc, libxml2-utils, docbook-xsl-ns, +Homepage: http://gcc.gnu.org/ +XS-Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc-4.8/ +XS-Vcs-Svn: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.8 + +Package: gcc-4.8-base +Architecture: any +Multi-Arch: same +Section: libs +Priority: required +Depends: ${misc:Depends} +Replaces: ${base:Replaces} +Breaks: gcc-4.4-base (<< 4.4.7), gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~), gcj-4.6-base (<< 4.6.1-4~), gnat-4.6 (<< 4.6.1-5~), gcc-4.7-base (<< 4.7.3), dehydra (<= 0.9.hg20110609-2) +Description: GCC, the GNU Compiler Collection (base package) + This package contains files common to all languages and libraries + contained in the GNU Compiler Collection (GCC). + +Package: libgcc-4.8-dev +Architecture: any +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm}, ${dep:libatomic}, ${dep:libbtrace}, ${dep:libasan}, ${dep:libtsan}, ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} +Multi-Arch: same +Description: GCC support library (development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: lib64gcc-4.8-dev +Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32 +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC support library (64bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: lib32gcc-4.8-dev +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC support library (32 bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libhfgcc-4.8-dev +Architecture: armel +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC support library (hard float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libsfgcc-4.8-dev +Architecture: armhf +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC support library (soft float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libn32gcc-4.8-dev +Architecture: mips mipsel mips64 mips64el +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC support library (n32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libx32gcc-4.8-dev +Architecture: amd64 i386 +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC support library (x32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: gcc-4.8 +Architecture: any +Section: devel +Priority: optional +Depends: cpp-4.8 (= ${gcc:Version}), gcc-4.8-base (= ${gcc:Version}), + binutils (>= ${binutils:Version}), + ${dep:libgccdev}, ${shlibs:Depends}, ${misc:Depends} +Recommends: ${dep:libcdev} +Suggests: ${gcc:multilib}, gcc-4.8-doc (>= ${gcc:SoftVersion}), gcc-4.8-locales (>= ${gcc:SoftVersion}), libgcc1-dbg (>= ${libgcc:Version}), libgomp1-dbg (>= ${gcc:Version}), libitm1-dbg (>= ${gcc:Version}), libatomic1-dbg (>= ${gcc:Version}), libasan0-dbg (>= ${gcc:Version}), libtsan0-dbg (>= ${gcc:Version}), libquadmath0-dbg (>= ${gcc:Version}), ${dep:libcloog} +Provides: c-compiler +Description: GNU C compiler + This is the GNU C compiler, a fairly portable optimizing compiler for C. + +Package: gcc-4.8-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gcc-4.8 (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU C compiler (multilib support) + This is the GNU C compiler, a fairly portable optimizing compiler for C. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). + +Package: gcc-4.8-plugin-dev +Architecture: any +Section: devel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gcc-4.8 (= ${gcc:Version}), libgmp-dev (>= 2:5.0.1~), ${shlibs:Depends}, ${misc:Depends} +Description: Files for GNU GCC plugin development. + This package contains (header) files for GNU GCC plugin development. It + is only used for the development of GCC plugins, but not needed to run + plugins. + +Package: gcc-4.8-hppa64 +Architecture: hppa +Section: devel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-3.3-hppa64 (<= 1:3.3.4-5), gcc-3.4-hppa64 (<= 3.4.1-3), gcc-4.7-hppa64 (<< 4.7.3-13), gcc-4.9-hppa64 (<< 4.9.0-2) +Description: GNU C compiler (cross compiler for hppa64) + This is the GNU C compiler, a fairly portable optimizing compiler for C. + +Package: cpp-4.8 +Architecture: any +Section: interpreters +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Suggests: gcc-4.8-locales (>= ${gcc:SoftVersion}) +Replaces: gcc-4.6 (<< 4.6.1-9) +Description: GNU C preprocessor + A macro processor that is used automatically by the GNU C compiler + to transform programs before actual compilation. + . + This package has been separated from gcc for the benefit of those who + require the preprocessor but not the compiler. + +Package: cpp-4.8-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU C preprocessor (cpp) + Documentation for the GNU C preprocessor in info format. + +Package: gcc-4.8-locales +Architecture: all +Section: devel +Priority: optional +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), cpp-4.8 (>= ${gcc:SoftVersion}), ${misc:Depends} +Recommends: gcc-4.8 (>= ${gcc:SoftVersion}) +Description: GCC, the GNU compiler collection (native language support files) + Native language support for GCC. Lets GCC speak your language, + if translations are available. + . + Please do NOT submit bug reports in other languages than "C". + Always reset your language settings to use the "C" locales. + +Package: g++-4.8 +Architecture: any +Section: devel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gcc-4.8 (= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: c++-compiler, c++abi2-dev +Suggests: ${gxx:multilib}, gcc-4.8-doc (>= ${gcc:SoftVersion}), libstdc++6-4.8-dbg (>= ${gcc:Version}) +Description: GNU C++ compiler + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. + +Package: g++-4.8-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), g++-4.8 (= ${gcc:Version}), gcc-4.8-multilib (= ${gcc:Version}), ${dep:libcxxbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libcxxbiarchdbg} +Description: GNU C++ compiler (multilib support) + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). + +Package: libasan0 +Section: libs +Architecture: any +Provides: libasan0-armel [armel], libasan0-armhf [armhf] +Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: AddressSanitizer -- a fast memory error detector + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libasan0-dbg +Architecture: any +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libasan0 (= ${gcc:Version}), ${misc:Depends} +Provides: libasan0-dbg-armel [armel], libasan0-dbg-armhf [armhf] +Multi-Arch: same +Description: AddressSanitizer -- a fast memory error detector (debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: lib32asan0 +Section: libs +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: AddressSanitizer -- a fast memory error detector (32bit) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: lib32asan0-dbg +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), lib32asan0 (= ${gcc:Version}), ${misc:Depends} +Description: AddressSanitizer -- a fast memory error detector (32 bit debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: lib64asan0 +Section: libs +Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32 +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: AddressSanitizer -- a fast memory error detector (64bit) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: lib64asan0-dbg +Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32 +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), lib64asan0 (= ${gcc:Version}), ${misc:Depends} +Description: AddressSanitizer -- a fast memory error detector (64bit debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +#Package: libn32asan`'ASAN_SO`'LS +#Section: ifdef(`TARGET',`devel',`libs') +#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +#Priority: ifdef(`TARGET',`extra',`PRI(extra)') +#Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +#BUILT_USING`'dnl +#Description: AddressSanitizer -- a fast memory error detector (n32) +# AddressSanitizer (ASan) is a fast memory error detector. It finds +# use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +#Package: libn32asan`'ASAN_SO-dbg`'LS +#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +#Section: debug +#Priority: extra +#Depends: BASEDEP, libdep(asan`'ASAN_SO,n32,=), ${misc:Depends} +#BUILT_USING`'dnl +#Description: AddressSanitizer -- a fast memory error detector (n32 debug symbols) +# AddressSanitizer (ASan) is a fast memory error detector. It finds +# use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libx32asan0 +Section: libs +Architecture: amd64 i386 +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: AddressSanitizer -- a fast memory error detector (x32) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libx32asan0-dbg +Architecture: amd64 i386 +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libx32asan0 (= ${gcc:Version}), ${misc:Depends} +Description: AddressSanitizer -- a fast memory error detector (x32 debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libhfasan0 +Section: libs +Architecture: armel +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libasan0-armhf [armel] +Description: AddressSanitizer -- a fast memory error detector (hard float ABI) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libhfasan0-dbg +Architecture: armel +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libhfasan0 (= ${gcc:Version}), ${misc:Depends} +Conflicts: libasan0-armel [armhf] +Description: AddressSanitizer -- a fast memory error detector (hard float ABI debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libsfasan0 +Section: libs +Architecture: armhf +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: AddressSanitizer -- a fast memory error detector (soft float ABI) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libsfasan0-dbg +Architecture: armhf +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libsfasan0 (= ${gcc:Version}), ${misc:Depends} +Description: AddressSanitizer -- a fast memory error detector (soft float ABI debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libtsan0 +Section: libs +Architecture: any +Provides: libtsan0-armel [armel], libtsan0-armhf [armhf] +Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: ThreadSanitizer -- a Valgrind-based detector of data races (runtime) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + +Package: libtsan0-dbg +Architecture: any +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libtsan0 (= ${gcc:Version}), ${misc:Depends} +Provides: libtsan0-dbg-armel [armel], libtsan0-dbg-armhf [armhf] +Multi-Arch: same +Description: ThreadSanitizer -- a Valgrind-based detector of data races (debug symbols) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + +Package: gobjc++-4.8 +Architecture: any +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gobjc-4.8 (= ${gcc:Version}), g++-4.8 (= ${gcc:Version}), ${shlibs:Depends}, libobjc-4.8-dev (= ${gcc:Version}), ${misc:Depends} +Suggests: ${gobjcxx:multilib}, gcc-4.8-doc (>= ${gcc:SoftVersion}) +Provides: objc++-compiler +Description: GNU Objective-C++ compiler + This is the GNU Objective-C++ compiler, which compiles + Objective-C++ on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +Package: gobjc++-4.8-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gobjc++-4.8 (= ${gcc:Version}), g++-4.8-multilib (= ${gcc:Version}), gobjc-4.8-multilib (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: GNU Objective-C++ compiler (multilib support) + This is the GNU Objective-C++ compiler, which compiles Objective-C++ on + platforms supported by the gcc compiler. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). + +Package: gobjc-4.8 +Architecture: any +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gcc-4.8 (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libobjc-4.8-dev (= ${gcc:Version}), ${misc:Depends} +Suggests: ${gobjc:multilib}, gcc-4.8-doc (>= ${gcc:SoftVersion}), libobjc4-dbg (>= ${gcc:Version}) +Provides: objc-compiler +Description: GNU Objective-C compiler + This is the GNU Objective-C compiler, which compiles + Objective-C on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +Package: gobjc-4.8-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gobjc-4.8 (= ${gcc:Version}), gcc-4.8-multilib (= ${gcc:Version}), ${dep:libobjcbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Objective-C compiler (multilib support) + This is the GNU Objective-C compiler, which compiles Objective-C on platforms + supported by the gcc compiler. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). + +Package: libobjc-4.8-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libgcc-4.8-dev (= ${gcc:Version}), libobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Multi-Arch: same +Description: Runtime library for GNU Objective-C applications (development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib64objc-4.8-dev +Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32 +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), lib64gcc-4.8-dev (= ${gcc:Version}), lib64objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (64bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib32objc-4.8-dev +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), lib32gcc-4.8-dev (= ${gcc:Version}), lib32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (32bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libn32objc-4.8-dev +Architecture: mips mipsel mips64 mips64el +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libn32gcc-4.8-dev (= ${gcc:Version}), libn32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (n32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libx32objc-4.8-dev +Architecture: amd64 i386 +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libx32gcc-4.8-dev (= ${gcc:Version}), libx32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (x32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libhfobjc-4.8-dev +Architecture: armel +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libhfgcc-4.8-dev (= ${gcc:Version}), libhfobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libsfobjc-4.8-dev +Architecture: armhf +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libsfgcc-4.8-dev (= ${gcc:Version}), libsfobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (soft float development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: gfortran-4.8 +Architecture: any +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gcc-4.8 (= ${gcc:Version}), libgfortran-4.8-dev (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: fortran95-compiler, ${fortran:mod-version} +Suggests: ${gfortran:multilib}, gfortran-4.8-doc, libgfortran3-dbg (>= ${gcc:Version}) +Description: GNU Fortran compiler + This is the GNU Fortran compiler, which compiles + Fortran on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +Package: gfortran-4.8-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gfortran-4.8 (= ${gcc:Version}), gcc-4.8-multilib (= ${gcc:Version}), ${dep:libgfortranbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Fortran compiler (multilib support) + This is the GNU Fortran compiler, which compiles Fortran on platforms + supported by the gcc compiler. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). + +Package: gfortran-4.8-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Fortran compiler (gfortran) + Documentation for the GNU Fortran compiler in info format. + +Package: libgfortran-4.8-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libgcc-4.8-dev (= ${gcc:Version}), libgfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Multi-Arch: same +Description: Runtime library for GNU Fortran applications (development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib64gfortran-4.8-dev +Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32 +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), lib64gcc-4.8-dev (= ${gcc:Version}), lib64gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (64bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib32gfortran-4.8-dev +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), lib32gcc-4.8-dev (= ${gcc:Version}), lib32gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (32bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libn32gfortran-4.8-dev +Architecture: mips mipsel mips64 mips64el +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libn32gcc-4.8-dev (= ${gcc:Version}), libn32gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (n32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libx32gfortran-4.8-dev +Architecture: amd64 i386 +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libx32gcc-4.8-dev (= ${gcc:Version}), libx32gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (x32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libhfgfortran-4.8-dev +Architecture: armel +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libhfgcc-4.8-dev (= ${gcc:Version}), libhfgfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libsfgfortran-4.8-dev +Architecture: armhf +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libsfgcc-4.8-dev (= ${gcc:Version}), libsfgfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (soft float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: gccgo-4.8 +Architecture: any +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gcc-4.8 (= ${gcc:Version}), libgo4 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: go-compiler +Suggests: ${go:multilib}, gccgo-4.8-doc, libgo4-dbg (>= ${gcc:Version}) +Description: GNU Go compiler + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. It uses the gcc backend to generate optimized code. + +Package: gccgo-4.8-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gccgo-4.8 (= ${gcc:Version}), gcc-4.8-multilib (= ${gcc:Version}), ${dep:libgobiarch}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libgobiarchdbg} +Description: GNU Go compiler (multilib support) + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). + +Package: gccgo-4.8-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Go compiler (gccgo) + Documentation for the GNU Go compiler in info format. + +Package: libgo4 +Section: libs +Architecture: any +Provides: libgo4-armel [armel], libgo4-armhf [armhf] +Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: libgo3 +Description: Runtime library for GNU Go applications + Library needed for GNU Go applications linked against the + shared library. + +Package: libgo4-dbg +Section: debug +Architecture: any +Provides: libgo4-dbg-armel [armel], libgo4-dbg-armhf [armhf] +Multi-Arch: same +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libgo4 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (debug symbols) + Library needed for GNU Go applications linked against the + shared library. This currently is an empty package, because the + library is completely unstripped. + +Package: lib64go4 +Section: libs +Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32 +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: lib64go3 +Description: Runtime library for GNU Go applications (64bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib64go4-dbg +Section: debug +Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32 +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), lib64go4 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (64bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. This currently is an empty package, because the + library is completely unstripped. + +Package: lib32go4 +Section: libs +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Replaces: lib32go3 +Description: Runtime library for GNU Go applications (32bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib32go4-dbg +Section: debug +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), lib32go4 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (32 bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. This currently is an empty package, because the + library is completely unstripped. + +Package: libn32go4 +Section: libs +Architecture: mips mipsel mips64 mips64el +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libn32go3 +Description: Runtime library for GNU Go applications (n32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libn32go4-dbg +Section: debug +Architecture: mips mipsel mips64 mips64el +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libn32go4 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (n32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. This currently is an empty package, because the + library is completely unstripped. + +Package: libx32go4 +Section: libs +Architecture: amd64 i386 +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libx32go3 +Description: Runtime library for GNU Go applications (x32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libx32go4-dbg +Section: debug +Architecture: amd64 i386 +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libx32go4 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (x32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. This currently is an empty package, because the + library is completely unstripped. + +Package: gcj-4.8 +Section: java +Architecture: any +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:gcj}, ${dep:gcjcross}, ${dep:libcdev}, ${dep:ecj}, ${shlibs:Depends}, dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Recommends: libecj-java-gcj +Conflicts: gcj-4.4, cpp-4.1 (<< 4.1.1), gcc-4.1 (<< 4.1.1) +Replaces: libgcj11 (<< 4.5-20100101-1), gcj-4.8-jdk (<< 4.8.1-4) +Description: GCJ byte code and native compiler for Java(TM) + GCJ is a front end to the GCC compiler which can natively compile both + Java(tm) source and bytecode files. The compiler can also generate class + files. + +Package: gcj-4.8-jdk +Section: java +Architecture: any +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), ${dep:gcj}, ${dep:libcdev}, gcj-4.8 (= ${gcj:Version}), gcj-4.8-jre (= ${gcj:Version}), libgcj14-dev (= ${gcj:Version}), fastjar, libgcj-bc, java-common, libantlr-java, ${shlibs:Depends}, dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Recommends: libecj-java-gcj +Suggests: gcj-4.8-source (>= ${gcj:SoftVersion}), libgcj14-dbg (>= ${gcc:Version}) +Provides: java-compiler, java-sdk, java2-sdk, java5-sdk +Conflicts: gcj-4.4, cpp-4.1 (<< 4.1.1), gcc-4.1 (<< 4.1.1) +Replaces: libgcj11 (<< 4.5-20100101-1) +Description: GCJ and Classpath development tools for Java(TM) + GCJ is a front end to the GCC compiler which can natively compile both + Java(tm) source and bytecode files. The compiler can also generate class + files. Other java development tools from classpath are included in this + package. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-SDK-like interface to the GCJ tool set. + +Package: gcj-4.8-jre-headless +Priority: optional +Section: java +Architecture: any +Depends: gcc-4.8-base (= ${gcc:Version}), gcj-4.8-jre-lib (>= ${gcj:SoftVersion}), libgcj14 (= ${gcj:Version}), ${dep:prctl}, ${shlibs:Depends}, ${misc:Depends} +Suggests: fastjar, gcj-4.8-jdk (= ${gcj:Version}), libgcj14-awt (= ${gcj:Version}) +Conflicts: gij-4.4, java-gcj-compat (<< 1.0.76-4) +Replaces: gcj-4.8-jre-lib (<< 4.8-20121219-0) +Provides: java5-runtime-headless, java2-runtime-headless, java1-runtime-headless, java-runtime-headless +Description: Java runtime environment using GIJ/Classpath (headless version) + GIJ is a Java bytecode interpreter, not limited to interpreting bytecode. + It includes a class loader which can dynamically load shared objects, so + it is possible to give it the name of a class which has been compiled and + put into a shared library on the class path. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set, + limited to the headless tools and libraries. + +Package: gcj-4.8-jre +Section: java +Architecture: any +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), gcj-4.8-jre-headless (= ${gcj:Version}), libgcj14-awt (= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: java5-runtime, java2-runtime, java1-runtime, java-runtime +Replaces: gcj-4.8-jre-headless (<< 4.8.2-2) +Description: Java runtime environment using GIJ/Classpath + GIJ is a Java bytecode interpreter, not limited to interpreting bytecode. + It includes a class loader which can dynamically load shared objects, so + it is possible to give it the name of a class which has been compiled and + put into a shared library on the class path. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set. + +Package: libgcj14 +Section: libs +Architecture: any +Priority: optional +Pre-Depends: ${misc:Pre-Depends} +Multi-Arch: same +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), libgcj-common (>= 1:4.1.1-21), ${shlibs:Depends}, ${misc:Depends} +Recommends: gcj-4.8-jre-lib (>= ${gcj:SoftVersion}) +Suggests: libgcj14-dbg (>= ${gcc:Version}), libgcj14-awt (= ${gcj:Version}) +Replaces: gij-4.4 (<< 4.4.0-1), gcj-4.8-jre-headless (<< 4.8.2-5) +Description: Java runtime library for use with gcj + This is the runtime that goes along with the gcj front end to + gcc. libgcj includes parts of the Java Class Libraries, plus glue to + connect the libraries to the compiler and the underlying OS. + . + To show file names and line numbers in stack traces, the packages + libgcj14-dbg and binutils are required. + +Package: gcj-4.8-jre-lib +Section: java +Architecture: all +Priority: optional +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), libgcj14 (>= ${gcj:SoftVersion}), ${misc:Depends} +Description: Java runtime library for use with gcj (jar files) + This is the jar file that goes along with the gcj front end to gcc. + +Package: libgcj14-awt +Section: libs +Architecture: any +Priority: optional +Pre-Depends: ${misc:Pre-Depends} +Multi-Arch: same +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), libgcj14 (= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +Suggests: ${pkg:gcjqt} +Description: AWT peer runtime libraries for use with gcj + These are runtime libraries holding the AWT peer implementations + for libgcj (currently the GTK+ based peer library is required, the + QT bases library is not built). + +Package: libgcj14-dev +Section: libdevel +Architecture: any +Multi-Arch: same +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libgcj14-awt (= ${gcj:Version}), libgcj-bc, ${pkg:gcjgtk}, ${pkg:gcjqt}, zlib1g-dev, ${shlibs:Depends}, ${misc:Depends} +Suggests: libgcj-doc +Description: Java development headers for use with gcj + These are the development headers that go along with the gcj front end + to gcc. libgcj includes parts of the Java Class Libraries, plus glue + to connect the libraries to the compiler and the underlying OS. + +Package: libgcj14-dbg +Section: debug +Architecture: any +Priority: extra +Pre-Depends: ${misc:Pre-Depends} +Multi-Arch: same +Depends: gcc-4.8-base (= ${gcc:Version}), libgcj14 (= ${gcj:Version}), ${misc:Depends} +Recommends: binutils, libc6-dbg | libc-dbg +Description: Debugging symbols for libraries provided in libgcj14-dev + The package provides debugging symbols for the libraries provided + in libgcj14-dev. + . + binutils is required to show file names and line numbers in stack traces. + +Package: gcj-4.8-source +Section: java +Architecture: all +Priority: optional +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), gcj-4.8-jdk (>= ${gcj:SoftVersion}), ${misc:Depends} +Description: GCJ java sources for use in IDEs like eclipse and netbeans + These are the java source files packaged as a zip file for use in development + environments like eclipse and netbeans. + +Package: libgcj-doc +Section: doc +Architecture: all +Priority: optional +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), ${misc:Depends} +Enhances: libgcj14-dev +Provides: classpath-doc +Description: libgcj API documentation and example programs + Autogenerated documentation describing the API of the libgcj library. + Sources and precompiled example programs from the Classpath library. + +Package: libstdc++-4.8-dev +Architecture: any +Multi-Arch: same +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libgcc-4.8-dev (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), ${dep:libcdev}, ${misc:Depends} +Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev, libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev, libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev +Suggests: libstdc++-4.8-doc +Provides: libstdc++-dev +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libstdc++-4.8-pic +Architecture: any +Multi-Arch: same +Section: libdevel +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), ${misc:Depends} +Description: GNU Standard C++ Library v3 (shared library subset kit) + This is used to develop subsets of the libstdc++ shared libraries for + use on custom installation floppies and in embedded systems. + . + Unless you are making one of those, you will not need this package. + +Package: libstdc++6-4.8-dbg +Architecture: any +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libgcc1-dbg (>= ${libgcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: libstdc++6-4.8-dbg-armel [armel], libstdc++6-4.8-dbg-armhf [armhf] +Multi-Arch: same +Recommends: libstdc++-4.8-dev (= ${gcc:Version}) +Conflicts: libstdc++5-dbg, libstdc++5-3.3-dbg, libstdc++6-dbg, libstdc++6-4.0-dbg, libstdc++6-4.1-dbg, libstdc++6-4.2-dbg, libstdc++6-4.3-dbg, libstdc++6-4.4-dbg, libstdc++6-4.5-dbg, libstdc++6-4.6-dbg, libstdc++6-4.7-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: lib32stdc++-4.8-dev +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), lib32gcc-4.8-dev (= ${gcc:Version}), lib32stdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), ${misc:Depends} +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: lib32stdc++6-4.8-dbg +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), lib32stdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), lib32gcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: lib32stdc++6-dbg, lib32stdc++6-4.0-dbg, lib32stdc++6-4.1-dbg, lib32stdc++6-4.2-dbg, lib32stdc++6-4.3-dbg, lib32stdc++6-4.4-dbg, lib32stdc++6-4.5-dbg, lib32stdc++6-4.6-dbg, lib32stdc++6-4.7-dbg, +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: lib64stdc++-4.8-dev +Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32 +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), lib64gcc-4.8-dev (= ${gcc:Version}), lib64stdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), ${misc:Depends} +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: lib64stdc++6-4.8-dbg +Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32 +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), lib64stdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), lib64gcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: lib64stdc++6-dbg, lib64stdc++6-4.0-dbg, lib64stdc++6-4.1-dbg, lib64stdc++6-4.2-dbg, lib64stdc++6-4.3-dbg, lib64stdc++6-4.4-dbg, lib64stdc++6-4.5-dbg, lib64stdc++6-4.6-dbg, lib64stdc++6-4.7-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libn32stdc++-4.8-dev +Architecture: mips mipsel mips64 mips64el +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libn32gcc-4.8-dev (= ${gcc:Version}), libn32stdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), ${misc:Depends} +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libn32stdc++6-4.8-dbg +Architecture: mips mipsel mips64 mips64el +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libn32stdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), libn32gcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: libn32stdc++6-dbg, libn32stdc++6-4.0-dbg, libn32stdc++6-4.1-dbg, libn32stdc++6-4.2-dbg, libn32stdc++6-4.3-dbg, libn32stdc++6-4.4-dbg, libn32stdc++6-4.5-dbg, libn32stdc++6-4.6-dbg, libn32stdc++6-4.7-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libx32stdc++-4.8-dev +Architecture: amd64 i386 +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libx32gcc-4.8-dev (= ${gcc:Version}), libx32stdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), ${misc:Depends} +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libx32stdc++6-4.8-dbg +Architecture: amd64 i386 +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libx32stdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), libx32gcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: libx32stdc++6-dbg, libx32stdc++6-4.6-dbg, libx32stdc++6-4.7-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libhfstdc++-4.8-dev +Architecture: armel +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libhfgcc-4.8-dev (= ${gcc:Version}), libhfstdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), ${misc:Depends} +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libhfstdc++6-4.8-dbg +Architecture: armel +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libhfstdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), libhfgcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: libhfstdc++6-dbg, libhfstdc++6-4.3-dbg, libhfstdc++6-4.4-dbg, libhfstdc++6-4.5-dbg, libhfstdc++6-4.6-dbg, libhfstdc++6-4.7-dbg, libstdc++6-armhf [armel] +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libsfstdc++-4.8-dev +Architecture: armhf +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), libsfgcc-4.8-dev (= ${gcc:Version}), libsfstdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), ${misc:Depends} +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libsfstdc++6-4.8-dbg +Architecture: armhf +Section: debug +Priority: extra +Depends: gcc-4.8-base (= ${gcc:Version}), libsfstdc++6 (>= ${gcc:Version}), libstdc++-4.8-dev (= ${gcc:Version}), libsfgcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: libsfstdc++6-dbg, libsfstdc++6-4.3-dbg, libsfstdc++6-4.4-dbg, libsfstdc++6-4.5-dbg, libsfstdc++6-4.6-dbg, libsfstdc++6-4.7-dbg, libstdc++6-armel [armhf] +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libstdc++-4.8-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), ${misc:Depends} +Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc, libstdc++6-4.7-doc +Description: GNU Standard C++ Library v3 (documentation files) + This package contains documentation files for the GNU stdc++ library. + . + One set is the distribution documentation, the other set is the + source documentation including a namespace list, class hierarchy, + alphabetical list, compound list, file list, namespace members, + compound members and file members. + +Package: gdc-4.8 +Architecture: any +Priority: optional +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), g++-4.8 (>= ${gcc:SoftVersion}), ${dep:gdccross}, ${dep:phobosdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: gdc, d-compiler, d-v2-compiler +Replaces: gdc (<< 4.4.6-5) +Description: GNU D compiler (version 2), based on the GCC backend + This is the GNU D compiler, which compiles D on platforms supported by gcc. + It uses the gcc backend to generate optimised code. + . + This compiler supports D language version 2. + +Package: libphobos-4.8-dev +Architecture: armel armhf amd64 i386 x32 kfreebsd-amd64 kfreebsd-i386 +Section: libdevel +Priority: optional +Depends: gcc-4.8-base (= ${gcc:Version}), zlib1g-dev, ${shlibs:Depends}, ${misc:Depends} +Provides: libphobos-dev +Replaces: gdc-4.8 (<< 4.8.2-19) +Description: Phobos D standard library + This is the Phobos standard library that comes with the D2 compiler. + . + For more information check http://www.dlang.org/phobos/ + +#Package: libphobos`'PHOBOS_V`'PV`'TS-dbg +#Section: debug +#Architecture: ifdef(`TARGET',`CROSS_ARCH',`libphobos_archs') +#Priority: extra +#Depends: BASEDEP, libphobos`'PHOBOS_V`'PV-dev (= ${gdc:Version}), ${misc:Depends} +#Provides: libphobos`'PHOBOS_V`'TS-dbg +#BUILT_USING`'dnl +#Description: The Phobos D standard library (debug symbols) +# This is the Phobos standard library that comes with the D2 compiler. +# . +# For more information check http://www.dlang.org/phobos/ + +#Package: gcc`'PV-soft-float +#Architecture: arm armel armhf +#Priority: PRI(optional) +#Depends: BASEDEP, depifenabled(`cdev',`gcc`'PV (= ${gcc:Version}),') ${shlibs:Depends}, ${misc:Depends} +#Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float +#BUILT_USING`'dnl +#Description: GCC soft-floating-point gcc libraries (ARM) +# These are versions of basic static libraries such as libgcc.a compiled +# with the -msoft-float option, for CPUs without a floating-point unit. + +Package: gcc-4.8-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.8-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Conflicts: gcc-docs (<< 2.95.2) +Replaces: gcc (<=2.7.2.3-4.3), gcc-docs (<< 2.95.2) +Description: Documentation for the GNU compilers (gcc, gobjc, g++) + Documentation for the GNU compilers in info format. + +Package: gcc-4.8-source +Architecture: all +Priority: optional +Depends: make, autoconf2.64, quilt, patchutils, gawk, ${misc:Depends} +Description: Source of the GNU Compiler Collection + This package contains the sources and patches which are needed to + build the GNU Compiler Collection (GCC). --- gcc-4.8-4.8.5.orig/debian/control.m4 +++ gcc-4.8-4.8.5/debian/control.m4 @@ -0,0 +1,4032 @@ +divert(-1) + +define(`checkdef',`ifdef($1, , `errprint(`error: undefined macro $1 +')m4exit(1)')') +define(`errexit',`errprint(`error: undefined macro `$1' +')m4exit(1)') + +dnl The following macros must be defined, when called: +dnl ifdef(`SRCNAME', , errexit(`SRCNAME')) +dnl ifdef(`PV', , errexit(`PV')) +dnl ifdef(`ARCH', , errexit(`ARCH')) + +dnl The architecture will also be defined (-D__i386__, -D__powerpc__, etc.) + +define(`PN', `$1') +ifdef(`PRI', `', ` + define(`PRI', `$1') +') +define(`MAINTAINER', `Debian GCC Maintainers ') + +define(`depifenabled', `ifelse(index(enabled_languages, `$1'), -1, `', `$2')') +define(`ifenabled', `ifelse(index(enabled_languages, `$1'), -1, `dnl', `$2')') + +ifdef(`TARGET',`ifdef(`CROSS_ARCH',`',`undefine(`MULTIARCH')')') +define(`CROSS_ARCH', ifdef(`CROSS_ARCH', CROSS_ARCH, `all')) +define(`libdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`>=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))') +define(`libdevdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))') +define(`libdbgdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`>=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))') + +define(`BUILT_USING', ifelse(add_built_using,yes,`Built-Using: ${Built-Using} +')) + +divert`'dnl +dnl -------------------------------------------------------------------------- +Source: SRCNAME +Section: devel +Priority: PRI(optional) +ifelse(DIST,`Ubuntu',`dnl +ifelse(regexp(SRCNAME, `gnat\|gdc-'),0,`dnl +Maintainer: Ubuntu MOTU Developers +', `dnl +Maintainer: Ubuntu Core developers +')dnl SRCNAME +XSBC-Original-Maintainer: MAINTAINER +', `dnl +Maintainer: MAINTAINER +')dnl DIST +ifelse(regexp(SRCNAME, `gnat'),0,`dnl +Uploaders: Ludovic Brenta +', regexp(SRCNAME, `gdc'),0,`dnl +Uploaders: Iain Buclaw , Matthias Klose +', `dnl +Uploaders: Matthias Klose +')dnl SRCNAME +Standards-Version: 3.9.8 +ifdef(`TARGET',`dnl cross +Build-Depends: debhelper (>= 5.0.62), DPKG_BUILD_DEP + LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP + LIBUNWIND_BUILD_DEP LIBATOMIC_OPS_BUILD_DEP AUTOGEN_BUILD_DEP AUTO_BUILD_DEP + SOURCE_BUILD_DEP CROSS_BUILD_DEP + CLOOG_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP, + gawk, lzma, xz-utils, patchutils, + zlib1g-dev, SDT_BUILD_DEP + bison (>= 1:2.3), flex, realpath (>= 1.9.12), lsb-release, quilt +',`dnl native +Build-Depends: debhelper (>= 5.0.62), DPKG_BUILD_DEP GCC_MULTILIB_BUILD_DEP + LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP LIBC_DBG_DEP + kfreebsd-kernel-headers (>= 0.84) [kfreebsd-any], + AUTO_BUILD_DEP AUTOGEN_BUILD_DEP BASE_BUILD_DEP + libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], + gawk, lzma, xz-utils, patchutils, + zlib1g-dev, SDT_BUILD_DEP + BINUTILS_BUILD_DEP, binutils-hppa64-linux-gnu [hppa], + gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, + texinfo (>= 4.3), locales, sharutils, + procps, FORTRAN_BUILD_DEP JAVA_BUILD_DEP GNAT_BUILD_DEP GO_BUILD_DEP GDC_BUILD_DEP + CLOOG_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP + CHECK_BUILD_DEP realpath (>= 1.9.12), chrpath, lsb-release, quilt +Build-Depends-Indep: LIBSTDCXX_BUILD_INDEP JAVA_BUILD_INDEP +')dnl +ifelse(regexp(SRCNAME, `gnat'),0,`dnl +Homepage: http://gcc.gnu.org/ +', regexp(SRCNAME, `gdc'),0,`dnl +Homepage: http://gdcproject.org/ +', `dnl +Homepage: http://gcc.gnu.org/ +')dnl SRCNAME +XS-Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc`'PV/ +XS-Vcs-Svn: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc`'PV + +ifelse(regexp(SRCNAME, `gcc-snapshot'),0,`dnl +Package: gcc-snapshot`'TS +Architecture: any +Section: devel +Priority: extra +Depends: binutils`'TS (>= ${binutils:Version}), ${dep:libcbiarchdev}, ${dep:libcdev}, ${dep:libunwinddev}, ${snap:depends}, ${shlibs:Depends}, ${dep:ecj}, python, ${misc:Depends} +Recommends: ${snap:recommends} +Suggests: ${dep:gold} +Provides: c++-compiler`'TS`'ifdef(`TARGET',`',`, c++abi2-dev') +BUILT_USING`'dnl +Description: A SNAPSHOT of the GNU Compiler Collection + This package contains a recent development SNAPSHOT of all files + contained in the GNU Compiler Collection (GCC). + . + The source code for this package has been exported from SVN trunk. + . + DO NOT USE THIS SNAPSHOT FOR BUILDING DEBIAN PACKAGES! + . + This package will NEVER hit the testing distribution. It is used for + tracking gcc bugs submitted to the Debian BTS in recent development + versions of gcc. +',`dnl gcc-X.Y + +dnl default base package dependencies +define(`BASETARGET', `') +define(`BASEDEP', `gcc`'PV-base (= ${gcc:Version})') +define(`SOFTBASEDEP', `gcc`'PV-base (>= ${gcc:SoftVersion})') + +dnl base, when building libgcc out of the gcj source; needed if new symbols +dnl in libgcc are used in libgcj. +ifelse(index(SRCNAME, `gcj'), 0, ` +define(`BASEDEP', `gcj`'PV-base (= ${gcj:Version})') +define(`SOFTBASEDEP', `gcj`'PV-base (>= ${gcj:SoftVersion})') +') + +ifelse(index(SRCNAME, `gnat'), 0, ` +define(`BASEDEP', `gnat`'PV-base (= ${gnat:Version})') +define(`SOFTBASEDEP', `gnat`'PV-base (>= ${gnat:SoftVersion})') +') + +ifenabled(`gccbase',` + +Package: gcc`'PV-base +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Section: libs +Priority: PRI(required) +Depends: ${misc:Depends} +Replaces: ${base:Replaces} +Breaks: gcc-4.4-base (<< 4.4.7), gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~), gcj-4.6-base (<< 4.6.1-4~), gnat-4.6 (<< 4.6.1-5~), gcc-4.7-base (<< 4.7.3), dehydra (<= 0.9.hg20110609-2) +BUILT_USING`'dnl +Description: GCC, the GNU Compiler Collection (base package) + This package contains files common to all languages and libraries + contained in the GNU Compiler Collection (GCC). +ifdef(`BASE_ONLY', `dnl + . + This version of GCC is not yet available for this architecture. + Please use the compilers from the gcc-snapshot package for testing. +')`'dnl +')`'dnl gccbase + +ifenabled(`gccxbase',` +dnl override default base package dependencies to cross version +dnl This creates a toolchain that doesnt depend on the system -base packages +define(`BASETARGET', `PV`'TS') +define(`BASEDEP', `gcc`'BASETARGET-base (= ${gcc:Version})') +define(`SOFTBASEDEP', `gcc`'BASETARGET-base (>= ${gcc:SoftVersion})') + +Package: gcc`'BASETARGET-base +Architecture: any +Section: devel +Priority: PRI(extra) +Depends: ${misc:Depends} +BUILT_USING`'dnl +Description: GCC, the GNU Compiler Collection (base package) + This package contains files common to all languages and libraries + contained in the GNU Compiler Collection (GCC). +')`'dnl + +ifenabled(`java',` +ifdef(`TARGET', `', ` +ifenabled(`gcjbase',` +Package: gcj`'PV-base +Architecture: any +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Section: libs +Priority: PRI(optional) +Depends: ${misc:Depends} +BUILT_USING`'dnl +Description: GCC, the GNU Compiler Collection (gcj base package) + This package contains files common to all java related packages + built from the GNU Compiler Collection (GCC). +')`'dnl gccbase +')`'dnl native + +ifenabled(`gcjxbase',` +dnl override default base package dependencies to cross version +dnl This creates a toolchain that doesnt depend on the system -base packages +define(`BASETARGET', `PV`'TS') +define(`BASEDEP', `gcj`'BASETARGET-base (= ${gcc:Version})') +define(`SOFTBASEDEP', `gcj`'BASETARGET-base (>= ${gcc:SoftVersion})') + +Package: gcj`'BASETARGET-base +Architecture: any +Section: devel +Priority: PRI(extra) +Depends: ${misc:Depends} +BUILT_USING`'dnl +Description: GCC, the GNU Compiler Collection (gcj base package) + This package contains files common to all java related packages + built from the GNU Compiler Collection (GCC). +')`'dnl +')`'dnl java + +ifenabled(`ada',` +Package: gnat`'PV-base`'TS +Architecture: any +Section: libs +Priority: PRI(optional) +Depends: ${misc:Depends} +Breaks: gcc-4.6 (<< 4.6.1-8~) +BUILT_USING`'dnl +Description: GNU Ada compiler (common files) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + This package contains files common to all GNAT related packages. +')`'dnl ada + +ifenabled(`libgcc',` +Package: libgcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',required) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libgcc1-TARGET-dcv1',`Provides: libgcc1-armel [armel], libgcc1-armhf [armhf]') +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +Breaks: ${multiarch:breaks} +')`'dnl +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,,=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`',`Provides: libgcc1-dbg-armel [armel], libgcc1-dbg-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH',`Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc2`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`m68k') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',required) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libgcc2-TARGET-dcv1 +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +Breaks: ${multiarch:breaks} +')`'dnl +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc2-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`m68k') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc2,,=,${gcc:Version}), ${misc:Depends} +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libgcc + +ifenabled(`cdev',` +Package: libgcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm}, ${dep:libatomic}, ${dep:libbtrace}, ${dep:libasan}, ${dep:libtsan}, ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: GCC support library (development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl libgcc + +ifenabled(`lib4gcc',` +Package: libgcc4`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`hppa') +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +Breaks: ${multiarch:breaks} +')`'dnl +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',required) +Depends: ifdef(`STANDALONEJAVA',`gcj`'PV-base (>= ${gcj:Version})',`BASEDEP'), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc4-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`hppa') +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc4,,=,${gcc:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib4gcc + +ifenabled(`lib64gcc',` +Package: lib64gcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib64gcc1-TARGET-dcv1 +',`')`'dnl +Conflicts: libdep(gcc`'GCC_SO,,<=,1:3.3-0pre9) +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (64bit) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib64gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,64,=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib64gcc + +ifenabled(`cdev',` +Package: lib64gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (64bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl cdev + +ifenabled(`lib32gcc',` +Package: lib32gcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: extra +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +Conflicts: ${confl:lib32} +ifdef(`TARGET',`Provides: lib32gcc1-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GCC support library (32 bit Version) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib32gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,32,=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib32gcc1 + +ifenabled(`cdev',` +Package: lib32gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (32 bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl cdev + +ifenabled(`libneongcc',` +Package: libgcc1-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library [neon optimized] + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneongcc1 + +ifenabled(`libhfgcc',` +Package: libhfgcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libhfgcc1-TARGET-dcv1 +',`Conflicts: libgcc1-armhf [biarchhf_archs] +')`'dnl +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (hard float ABI) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libhfgcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,hf,=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libhfgcc + +ifenabled(`cdev',` +ifenabled(`armml',` +Package: libhfgcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (hard float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl armml +')`'dnl cdev + +ifenabled(`libsfgcc',` +Package: libsfgcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libsfgcc1-TARGET-dcv1 +',`Conflicts: libgcc1-armel [biarchsf_archs] +')`'dnl +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (soft float ABI) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libsfgcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,sf,=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libsfgcc + +ifenabled(`cdev',` +ifenabled(`armml',` +Package: libsfgcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (soft float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl armml +')`'dnl cdev + +ifenabled(`libn32gcc',` +Package: libn32gcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +Conflicts: libdep(gcc`'GCC_SO,,<=,1:3.3-0pre9) +ifdef(`TARGET',`Provides: libn32gcc1-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (n32) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libn32gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,n32,=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libn32gcc + +ifenabled(`cdev',` +Package: libn32gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (n32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl cdev + +ifenabled(`libx32gcc',` +Package: libx32gcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libx32gcc1-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (x32) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libx32gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,x32,=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libx32gcc + +ifenabled(`cdev',` +ifenabled(`x32dev',` +Package: libx32gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:libtsanbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (x32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl x32dev +')`'dnl cdev + +ifdef(`TARGET', `', ` +ifenabled(`libgmath',` +Package: libgccmath`'GCCMATH_SO`'LS +Architecture: i386 +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC math support library + Support library for GCC. + +Package: lib32gccmath`'GCCMATH_SO`'LS +Architecture: amd64 +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC math support library (32bit) + Support library for GCC. + +Package: lib64gccmath`'GCCMATH_SO`'LS +Architecture: i386 +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC math support library (64bit) + Support library for GCC. +')`'dnl +')`'dnl native + +ifenabled(`cdev',` +Package: gcc`'PV`'TS +Architecture: any +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: cpp`'PV`'TS (= ${gcc:Version}),ifenabled(`gccbase',` BASEDEP,') + binutils`'TS (>= ${binutils:Version}), + ${dep:libgccdev}, ${shlibs:Depends}, ${misc:Depends} +Recommends: ${dep:libcdev} +Suggests: ${gcc:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), gcc`'PV-locales (>= ${gcc:SoftVersion}), libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), libdbgdep(gomp`'GOMP_SO-dbg,), libdbgdep(itm`'ITM_SO-dbg,), libdbgdep(atomic`'ATOMIC_SO-dbg,), libdbgdep(asan`'ASAN_SO-dbg,), libdbgdep(tsan`'TSAN_SO-dbg,), libdbgdep(quadmath`'QMATH_SO-dbg,), ${dep:libcloog} +Provides: c-compiler`'TS +ifdef(`TARGET',`Conflicts: gcc-multilib +')`'dnl +BUILT_USING`'dnl +Description: GNU C compiler`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C compiler, a fairly portable optimizing compiler for C. +ifdef(`TARGET', `dnl + . + This package contains C cross-compiler for TARGET architecture. +')`'dnl + +ifenabled(`multilib',` +Package: gcc`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU C compiler (multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C compiler, a fairly portable optimizing compiler for C. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). +')`'dnl multilib + +ifenabled(`plugindev',` +Package: gcc`'PV-plugin-dev`'TS +Architecture: any +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), GMP_BUILD_DEP ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Files for GNU GCC plugin development. + This package contains (header) files for GNU GCC plugin development. It + is only used for the development of GCC plugins, but not needed to run + plugins. +')`'dnl plugindev +')`'dnl cdev + +ifenabled(`cdev',` +Package: gcc`'PV-hppa64 +Architecture: ifdef(`TARGET',`any',hppa) +Section: devel +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-3.3-hppa64 (<= 1:3.3.4-5), gcc-3.4-hppa64 (<= 3.4.1-3), gcc-4.7-hppa64 (<< 4.7.3-13), gcc-4.9-hppa64 (<< 4.9.0-2) +BUILT_USING`'dnl +Description: GNU C compiler (cross compiler for hppa64) + This is the GNU C compiler, a fairly portable optimizing compiler for C. +')`'dnl cdev + +ifenabled(`cdev',` +Package: cpp`'PV`'TS +Architecture: any +Section: ifdef(`TARGET',`devel',`interpreters') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Suggests: gcc`'PV-locales (>= ${gcc:SoftVersion}) +Replaces: gcc-4.6 (<< 4.6.1-9) +BUILT_USING`'dnl +Description: GNU C preprocessor + A macro processor that is used automatically by the GNU C compiler + to transform programs before actual compilation. + . + This package has been separated from gcc for the benefit of those who + require the preprocessor but not the compiler. +ifdef(`TARGET', `dnl + . + This package contains preprocessor configured for TARGET architecture. +')`'dnl + +ifdef(`TARGET', `', ` +ifenabled(`gfdldoc',` +Package: cpp`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU C preprocessor (cpp) + Documentation for the GNU C preprocessor in info `format'. +')`'dnl gfdldoc +')`'dnl native + +ifdef(`TARGET', `', ` +Package: gcc`'PV-locales +Architecture: all +Section: devel +Priority: PRI(optional) +Depends: SOFTBASEDEP, cpp`'PV (>= ${gcc:SoftVersion}), ${misc:Depends} +Recommends: gcc`'PV (>= ${gcc:SoftVersion}) +Description: GCC, the GNU compiler collection (native language support files) + Native language support for GCC. Lets GCC speak your language, + if translations are available. + . + Please do NOT submit bug reports in other languages than "C". + Always reset your language settings to use the "C" locales. +')`'dnl native +')`'dnl cdev + +ifenabled(`c++',` +ifenabled(`c++dev',` +Package: g++`'PV`'TS +Architecture: any +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), libdevdep(stdc++`'PV-dev,,=), ${shlibs:Depends}, ${misc:Depends} +Provides: c++-compiler`'TS`'ifdef(`TARGET)',`',`, c++abi2-dev') +Suggests: ${gxx:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), libdbgdep(stdc++CXX_SO`'PV-dbg,) +BUILT_USING`'dnl +Description: GNU C++ compiler`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. +ifdef(`TARGET', `dnl + . + This package contains C++ cross-compiler for TARGET architecture. +')`'dnl + +ifenabled(`multilib',` +Package: g++`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, g++`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libcxxbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libcxxbiarchdbg} +BUILT_USING`'dnl +Description: GNU C++ compiler (multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). +')`'dnl multilib +')`'dnl c++dev +')`'dnl c++ + +ifdef(`TARGET', `', ` +ifenabled(`ssp',` +Package: libssp`'SSP_SO`'LS +Architecture: any +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC stack smashing protection library + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: lib32ssp`'SSP_SO`'LS +Architecture: biarch32_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: GCC stack smashing protection library (32bit) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: lib64ssp`'SSP_SO`'LS +Architecture: biarch64_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +BUILT_USING`'dnl +Description: GCC stack smashing protection library (64bit) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libn32ssp`'SSP_SO`'LS +Architecture: biarchn32_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +BUILT_USING`'dnl +Description: GCC stack smashing protection library (n32) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libx32ssp`'SSP_SO`'LS +Architecture: biarchx32_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +BUILT_USING`'dnl +Description: GCC stack smashing protection library (x32) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libhfssp`'SSP_SO`'LS +Architecture: biarchhf_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC stack smashing protection library (hard float ABI) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libsfssp`'SSP_SO`'LS +Architecture: biarchsf_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC stack smashing protection library (soft float ABI) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. +')`'dnl +')`'dnl native + +ifenabled(`libgomp',` +Package: libgomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libgomp'GOMP_SO`-armel [armel], libgomp'GOMP_SO`-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +Breaks: ${multiarch:breaks} +')`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libgomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,,=), ${misc:Depends} +ifdef(`TARGET',`',`Provides: libgomp'GOMP_SO`-dbg-armel [armel], libgomp'GOMP_SO`-dbg-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib32gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (32bit) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib32gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (32 bit debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib64gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (64bit) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib64gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (64bit debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libn32gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (n32) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libn32gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (n32 debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + +ifenabled(`libx32gomp',` +Package: libx32gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (x32) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libx32gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (x32 debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers +')`'dnl libx32gomp + +ifenabled(`libhfgomp',` +Package: libhfgomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (hard float ABI) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libhfgomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,hf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-dbg-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (hard float ABI debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers +')`'dnl libhfgomp + +ifenabled(`libsfgomp',` +Package: libsfgomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (soft float ABI) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libsfgomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,sf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-dbg-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (soft float ABI debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers +')`'dnl libsfgomp + +ifenabled(`libneongomp',` +Package: libgomp`'GOMP_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library [neon optimized] + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneongomp +')`'dnl libgomp + +ifenabled(`libitm',` +Package: libitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libitm'ITM_SO`-armel [armel], libitm'ITM_SO`-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,,=), ${misc:Depends} +ifdef(`TARGET',`',`Provides: libitm'ITM_SO`-dbg-armel [armel], libitm'ITM_SO`-dbg-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (32bit) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (32 bit debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib64itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (64bit) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib64itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (64bit debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libn32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (n32) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libn32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (n32 debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +ifenabled(`libx32itm',` +Package: libx32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (x32) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libx32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (x32 debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. +')`'dnl libx32itm + +ifenabled(`libhfitm',` +Package: libhfitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libitm'ITM_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (hard float ABI) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libhfitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,hf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libitm'ITM_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (hard float ABI debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. +')`'dnl libhfitm + +ifenabled(`libsfitm',` +Package: libsfitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (soft float ABI) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libsfitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,sf,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (soft float ABI debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. +')`'dnl libsfitm + +ifenabled(`libneonitm',` +Package: libitm`'ITM_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library [neon optimized] + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneonitm +')`'dnl libitm + +ifenabled(`libatomic',` +Package: libatomic`'ATOMIC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libatomic'ATOMIC_SO`-armel [armel], libatomic'ATOMIC_SO`-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +Package: libatomic`'ATOMIC_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(atomic`'ATOMIC_SO,,=), ${misc:Depends} +ifdef(`TARGET',`',`Provides: libatomic'ATOMIC_SO`-dbg-armel [armel], libatomic'ATOMIC_SO`-dbg-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (debug symbols) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +Package: lib32atomic`'ATOMIC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (32bit) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +Package: lib32atomic`'ATOMIC_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(atomic`'ATOMIC_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (32 bit debug symbols) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +Package: lib64atomic`'ATOMIC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (64bit) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +Package: lib64atomic`'ATOMIC_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(atomic`'ATOMIC_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (64bit debug symbols) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +Package: libn32atomic`'ATOMIC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (n32) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +Package: libn32atomic`'ATOMIC_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(atomic`'ATOMIC_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (n32 debug symbols) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +ifenabled(`libx32atomic',` +Package: libx32atomic`'ATOMIC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (x32) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +Package: libx32atomic`'ATOMIC_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(atomic`'ATOMIC_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (x32 debug symbols) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. +')`'dnl libx32atomic + +ifenabled(`libhfatomic',` +Package: libhfatomic`'ATOMIC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libatomic'ATOMIC_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (hard float ABI) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +Package: libhfatomic`'ATOMIC_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(atomic`'ATOMIC_SO,hf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libatomic'ATOMIC_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (hard float ABI debug symbols) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. +')`'dnl libhfatomic + +ifenabled(`libsfatomic',` +Package: libsfatomic`'ATOMIC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (soft float ABI) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + +Package: libsfatomic`'ATOMIC_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(atomic`'ATOMIC_SO,sf,=), ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions (soft float ABI debug symbols) + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. +')`'dnl libsfatomic + +ifenabled(`libneonatomic',` +Package: libatomic`'ATOMIC_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: support library providing __atomic built-in functions [neon optimized] + library providing __atomic built-in functions. When an atomic call cannot + be turned into lock-free instructions, GCC will make calls into this library. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneonatomic +')`'dnl libatomic + +ifenabled(`libasan',` +Package: libasan`'ASAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libasan'ASAN_SO`-armel [armel], libasan'ASAN_SO`-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libasan`'ASAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(asan`'ASAN_SO,,=), ${misc:Depends} +ifdef(`TARGET',`',`Provides: libasan'ASAN_SO`-dbg-armel [armel], libasan'ASAN_SO`-dbg-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: lib32asan`'ASAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (32bit) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: lib32asan`'ASAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(asan`'ASAN_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (32 bit debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: lib64asan`'ASAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (64bit) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: lib64asan`'ASAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(asan`'ASAN_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (64bit debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +#Package: libn32asan`'ASAN_SO`'LS +#Section: ifdef(`TARGET',`devel',`libs') +#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +#Priority: ifdef(`TARGET',`extra',`PRI(extra)') +#Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +#BUILT_USING`'dnl +#Description: AddressSanitizer -- a fast memory error detector (n32) +# AddressSanitizer (ASan) is a fast memory error detector. It finds +# use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +#Package: libn32asan`'ASAN_SO-dbg`'LS +#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +#Section: debug +#Priority: extra +#Depends: BASEDEP, libdep(asan`'ASAN_SO,n32,=), ${misc:Depends} +#BUILT_USING`'dnl +#Description: AddressSanitizer -- a fast memory error detector (n32 debug symbols) +# AddressSanitizer (ASan) is a fast memory error detector. It finds +# use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +ifenabled(`libx32asan',` +Package: libx32asan`'ASAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (x32) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libx32asan`'ASAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(asan`'ASAN_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (x32 debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. +')`'dnl libx32asan + +ifenabled(`libhfasan',` +Package: libhfasan`'ASAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(extra)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libasan'ASAN_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (hard float ABI) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libhfasan`'ASAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(asan`'ASAN_SO,hf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libasan'ASAN_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (hard float ABI debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. +')`'dnl libhfasan + +ifenabled(`libsfasan',` +Package: libsfasan`'ASAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(extra)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (soft float ABI) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + +Package: libsfasan`'ASAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(asan`'ASAN_SO,sf,=), ${misc:Depends} +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector (soft float ABI debug symbols) + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. +')`'dnl libsfasan + +ifenabled(`libneonasan',` +Package: libasan`'ASAN_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: AddressSanitizer -- a fast memory error detector [neon optimized] + AddressSanitizer (ASan) is a fast memory error detector. It finds + use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneonasan +')`'dnl libasan + +ifenabled(`libtsan',` +Package: libtsan`'TSAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libtsan'TSAN_SO`-armel [armel], libtsan'TSAN_SO`-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (runtime) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + +Package: libtsan`'TSAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(tsan`'TSAN_SO,,=), ${misc:Depends} +ifdef(`TARGET',`',`Provides: libtsan'TSAN_SO`-dbg-armel [armel], libtsan'TSAN_SO`-dbg-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (debug symbols) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + +ifenabled(`lib32tsan',` +Package: lib32tsan`'TSAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (32bit) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + +Package: lib32tsan`'TSAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(tsan`'TSAN_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (32 bit debug symbols) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. +')`'dnl lib32tsan + +ifenabled(`lib64tsan',` +Package: lib64tsan`'TSAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (64bit) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + +Package: lib64tsan`'TSAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(tsan`'TSAN_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (64bit debug symbols) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. +')`'dnl lib64tsan + +ifenabled(`libn32tsan',` +Package: libn32tsan`'TSAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (n32) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + +Package: libn32tsan`'TSAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(tsan`'TSAN_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (n32 debug symbols) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. +')`'dnl libn32tsan + +ifenabled(`libx32tsan',` +Package: libx32tsan`'TSAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (x32) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + +Package: libx32tsan`'TSAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(tsan`'TSAN_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (x32 debug symbols) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. +')`'dnl libx32tsan + +ifenabled(`libhftsan',` +Package: libhftsan`'TSAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libtsan'TSAN_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (hard float ABI) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + +Package: libhftsan`'TSAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(tsan`'TSAN_SO,hf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libtsan'TSAN_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (hard float ABI debug symbols) +')`'dnl libhftsan + +ifenabled(`libsftsan',` +Package: libsftsan`'TSAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (soft float ABI) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + +Package: libsftsan`'TSAN_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(tsan`'TSAN_SO,sf,=), ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races (soft float ABI debug symbols) + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. +')`'dnl libsftsan + +ifenabled(`libneontsan',` +Package: libtsan`'TSAN_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: ThreadSanitizer -- a Valgrind-based detector of data races [neon optimized] + ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. + The Linux and Mac versions are based on Valgrind. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneontsan +')`'dnl libtsan + +ifenabled(`libbacktrace',` +Package: libbacktrace`'BTRACE_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libbacktrace'BTRACE_SO`-armel [armel], libbacktrace'BTRACE_SO`-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +Package: libbacktrace`'BTRACE_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(backtrace`'BTRACE_SO,,=), ${misc:Depends} +ifdef(`TARGET',`',`Provides: libbacktrace'BTRACE_SO`-dbg-armel [armel], libbacktrace'BTRACE_SO`-dbg-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: stack backtrace library (debug symbols) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +Package: lib32backtrace`'BTRACE_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: stack backtrace library (32bit) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +Package: lib32backtrace`'BTRACE_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(backtrace`'BTRACE_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library (32 bit debug symbols) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +Package: lib64backtrace`'BTRACE_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library (64bit) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +Package: lib64backtrace`'BTRACE_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(backtrace`'BTRACE_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library (64bit debug symbols) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +Package: libn32backtrace`'BTRACE_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library (n32) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +Package: libn32backtrace`'BTRACE_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(backtrace`'BTRACE_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library (n32 debug symbols) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +ifenabled(`libx32backtrace',` +Package: libx32backtrace`'BTRACE_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library (x32) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +Package: libx32backtrace`'BTRACE_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(backtrace`'BTRACE_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library (x32 debug symbols) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. +')`'dnl libx32backtrace + +ifenabled(`libhfbacktrace',` +Package: libhfbacktrace`'BTRACE_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libbacktrace'BTRACE_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: stack backtrace library (hard float ABI) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +Package: libhfbacktrace`'BTRACE_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(backtrace`'BTRACE_SO,hf,=), ${misc:Depends} +wifdef(`TARGET',`dnl',`Conflicts: libbacktrace'BTRACE_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: stack backtrace library (hard float ABI debug symbols) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. +')`'dnl libhfbacktrace + +ifenabled(`libsfbacktrace',` +Package: libsfbacktrace`'BTRACE_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library (soft float ABI) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + +Package: libsfbacktrace`'BTRACE_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(backtrace`'BTRACE_SO,sf,=), ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library (soft float ABI debug symbols) + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. +')`'dnl libsfbacktrace + +ifenabled(`libneonbacktrace',` +Package: libbacktrace`'BTRACE_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: stack backtrace library [neon optimized] + libbacktrace uses the GCC unwind interface to collect a stack trace, + and parses DWARF debug info to get file/line/function information. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneonbacktrace +')`'dnl libbacktrace + + +ifenabled(`libqmath',` +Package: libquadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libquadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,,=), ${misc:Depends} +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: lib32quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (32bit) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: lib32quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (32 bit debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: lib64quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (64bit) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: lib64quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (64bit debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: libn32quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (n32) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libn32quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (n32 debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +ifenabled(`libx32qmath',` +Package: libx32quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (x32) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libx32quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (x32 debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. +')`'dnl libx32qmath + +ifenabled(`libhfqmath',` +Package: libhfquadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (hard float ABI) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libhfquadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,hf,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (hard float ABI debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. +')`'dnl libhfqmath + +ifenabled(`libsfqmath',` +Package: libsfquadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (soft float ABI) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libsfquadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,sf,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (hard float ABI debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. +')`'dnl libsfqmath +')`'dnl libqmath + +ifenabled(`objpp',` +ifenabled(`objppdev',` +Package: gobjc++`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gobjc`'PV`'TS (= ${gcc:Version}), g++`'PV`'TS (= ${gcc:Version}), ${shlibs:Depends}, libdevdep(objc`'PV-dev,,=), ${misc:Depends} +Suggests: ${gobjcxx:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}) +Provides: objc++-compiler`'TS +BUILT_USING`'dnl +Description: GNU Objective-C++ compiler + This is the GNU Objective-C++ compiler, which compiles + Objective-C++ on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. +')`'dnl obcppdev + +ifenabled(`multilib',` +Package: gobjc++`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gobjc++`'PV`'TS (= ${gcc:Version}), g++`'PV-multilib`'TS (= ${gcc:Version}), gobjc`'PV-multilib`'TS (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Objective-C++ compiler (multilib support) + This is the GNU Objective-C++ compiler, which compiles Objective-C++ on + platforms supported by the gcc compiler. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). +')`'dnl multilib +')`'dnl obcpp + +ifenabled(`objc',` +ifenabled(`objcdev',` +Package: gobjc`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libdevdep(objc`'PV-dev,,=), ${misc:Depends} +Suggests: ${gobjc:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), libdbgdep(objc`'OBJC_SO-dbg,) +Provides: objc-compiler`'TS +ifdef(`__sparc__',`Conflicts: gcc`'PV-sparc64', `dnl') +BUILT_USING`'dnl +Description: GNU Objective-C compiler + This is the GNU Objective-C compiler, which compiles + Objective-C on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +ifenabled(`multilib',` +Package: gobjc`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gobjc`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libobjcbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Objective-C compiler (multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU Objective-C compiler, which compiles Objective-C on platforms + supported by the gcc compiler. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). +')`'dnl multilib + +Package: libobjc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,), libdep(objc`'OBJC_SO,), ${shlibs:Depends}, ${misc:Depends} +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib64objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,64), libdep(objc`'OBJC_SO,64), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (64bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib32objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,32), libdep(objc`'OBJC_SO,32), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (32bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libn32objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,n32), libdep(objc`'OBJC_SO,n32), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (n32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +ifenabled(`x32dev',` +Package: libx32objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,x32), libdep(objc`'OBJC_SO,x32), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (x32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. +')`'dnl libx32objc + +ifenabled(`armml',` +Package: libhfobjc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,hf), libdep(objc`'OBJC_SO,hf), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. +')`'dnl armml + +ifenabled(`armml',` +Package: libsfobjc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,sf), libdep(objc`'OBJC_SO,sf), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (soft float development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. +')`'dnl armml +')`'dnl objcdev + +ifenabled(`libobjc',` +Package: libobjc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libobjc'OBJC_SO`-armel [armel], libobjc'OBJC_SO`-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +ifelse(OBJC_SO,`2',`Breaks: ${multiarch:breaks} +',`')')`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications + Library needed for GNU ObjC applications linked against the shared library. + +Package: libobjc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libobjc'OBJC_SO`-dbg-armel [armel], libobjc'OBJC_SO`-dbg-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,,=), libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libobjc + +ifenabled(`lib64objc',` +Package: lib64objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (64bit) + Library needed for GNU ObjC applications linked against the shared library. + +Package: lib64objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,64,=), libdbgdep(gcc`'GCC_SO-dbg,64,>=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (64 bit debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl lib64objc + +ifenabled(`lib32objc',` +Package: lib32objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (32bit) + Library needed for GNU ObjC applications linked against the shared library. + +Package: lib32objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,32,=), libdbgdep(gcc`'GCC_SO-dbg,32,>=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (32 bit debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl lib32objc + +ifenabled(`libn32objc',` +Package: libn32objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (n32) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libn32objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,n32,=), libdbgdep(gcc`'GCC_SO-dbg,n32,>=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (n32 debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libn32objc + +ifenabled(`libx32objc',` +Package: libx32objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (x32) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libx32objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,x32,=), libdbgdep(gcc`'GCC_SO-dbg,x32,>=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (x32 debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libx32objc + +ifenabled(`libhfobjc',` +Package: libhfobjc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (hard float ABI) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libhfobjc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,hf,=), libdbgdep(gcc`'GCC_SO-dbg,hf,>=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-dbg-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (hard float ABI debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libhfobjc + +ifenabled(`libsfobjc',` +Package: libsfobjc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (soft float ABI) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libsfobjc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,sf,=), libdbgdep(gcc`'GCC_SO-dbg,sf,>=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-dbg-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (soft float ABI debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libsfobjc + +ifenabled(`libneonobjc',` +Package: libobjc`'OBJC_SO-neon`'LS +Section: libs +Architecture: NEON_ARCHS +Priority: PRI(optional) +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications [NEON version] + Library needed for GNU ObjC applications linked against the shared library. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneonobjc +')`'dnl objc + +ifenabled(`fortran',` +ifenabled(`fdev',` +Package: gfortran`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), libdevdep(gfortran`'PV-dev,,=), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: fortran95-compiler, ${fortran:mod-version} +Suggests: ${gfortran:multilib}, gfortran`'PV-doc, libdbgdep(gfortran`'FORTRAN_SO-dbg,) +BUILT_USING`'dnl +Description: GNU Fortran compiler + This is the GNU Fortran compiler, which compiles + Fortran on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +ifenabled(`multilib',` +Package: gfortran`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gfortran`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libgfortranbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Fortran compiler (multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU Fortran compiler, which compiles Fortran on platforms + supported by the gcc compiler. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). +')`'dnl multilib + +ifenabled(`gfdldoc',` +Package: gfortran`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Fortran compiler (gfortran) + Documentation for the GNU Fortran compiler in info `format'. +')`'dnl gfdldoc + +Package: libgfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev`',), libdep(gfortran`'FORTRAN_SO,), ${shlibs:Depends}, ${misc:Depends} +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib64gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev`',64), libdep(gfortran`'FORTRAN_SO,64), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (64bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib32gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev`',32), libdep(gfortran`'FORTRAN_SO,32), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (32bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libn32gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev`',n32), libdep(gfortran`'FORTRAN_SO,n32), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (n32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +ifenabled(`x32dev',` +Package: libx32gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev`',x32), libdep(gfortran`'FORTRAN_SO,x32), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (x32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. +')`'dnl libx32gfortran + +ifenabled(`armml',` +Package: libhfgfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev`',hf), libdep(gfortran`'FORTRAN_SO,hf), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. +')`'dnl armml + +ifenabled(`armml',` +Package: libsfgfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev`',sf), libdep(gfortran`'FORTRAN_SO,sf), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (soft float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. +')`'dnl armml +')`'dnl fdev + +ifenabled(`libgfortran',` +Package: libgfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libgfortran'FORTRAN_SO`-armel [armel], libgfortran'FORTRAN_SO`-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +Breaks: ${multiarch:breaks} +')`'dnl +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libgfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libgfortran'FORTRAN_SO`-dbg-armel [armel], libgfortran'FORTRAN_SO`-dbg-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,,=), libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libgfortran + +ifenabled(`lib64gfortran',` +Package: lib64gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (64bit) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: lib64gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (64bit debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl lib64gfortran + +ifenabled(`lib32gfortran',` +Package: lib32gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (32bit) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: lib32gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (32 bit debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl lib32gfortran + +ifenabled(`libn32gfortran',` +Package: libn32gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (n32) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libn32gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (n32 debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libn32gfortran + +ifenabled(`libx32gfortran',` +Package: libx32gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (x32) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libx32gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (x32 debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libx32gfortran + +ifenabled(`libhfgfortran',` +Package: libhfgfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (hard float ABI) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libhfgfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,hf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-dbg-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libhfgfortran + +ifenabled(`libsfgfortran',` +Package: libsfgfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (soft float ABI) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libsfgfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,sf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-dbg-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libsfgfortran + +ifenabled(`libneongfortran',` +Package: libgfortran`'FORTRAN_SO-neon`'LS +Section: libs +Architecture: NEON_ARCHS +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +Breaks: ${multiarch:breaks} +')`'dnl +Priority: extra +Depends: BASEDEP, libgcc1-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications [NEON version] + Library needed for GNU Fortran applications linked against the + shared library. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneongfortran +')`'dnl fortran + +ifenabled(`ggo',` +ifenabled(`godev',` +Package: gccgo`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ifdef(`STANDALONEGO',,`gcc`'PV`'TS (= ${gcc:Version}), ')libdep(go`'GO_SO,), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: go-compiler +Suggests: ${go:multilib}, gccgo`'PV-doc, libdbgdep(go`'GO_SO-dbg,) +BUILT_USING`'dnl +Description: GNU Go compiler + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. It uses the gcc backend to generate optimized code. + +ifenabled(`multilib',` +Package: gccgo`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gccgo`'PV`'TS (= ${gcc:Version}), ifdef(`STANDALONEGO',,`gcc`'PV-multilib`'TS (= ${gcc:Version}), ')${dep:libgobiarch}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libgobiarchdbg} +BUILT_USING`'dnl +Description: GNU Go compiler (multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. + . + This is a dependency package, depending on development packages + for the non-default multilib architecture(s). +')`'dnl multilib + +ifenabled(`gfdldoc',` +Package: gccgo`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +BUILT_USING`'dnl +Description: Documentation for the GNU Go compiler (gccgo) + Documentation for the GNU Go compiler in info `format'. +')`'dnl gfdldoc +')`'dnl fdev + +ifenabled(`libggo',` +Package: libgo`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libgo'GO_SO`-armel [armel], libgo'GO_SO`-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Replaces: libgo3`'LS +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications + Library needed for GNU Go applications linked against the + shared library. + +Package: libgo`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',`Provides: libgo'GO_SO`-dbg-armel [armel], libgo'GO_SO`-dbg-armhf [armhf] +')`'dnl +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Priority: extra +Depends: BASEDEP, libdep(go`'GO_SO,,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (debug symbols) + Library needed for GNU Go applications linked against the + shared library. This currently is an empty package, because the + library is completely unstripped. +')`'dnl libgo + +ifenabled(`lib64ggo',` +Package: lib64go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: lib64go3`'LS +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (64bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib64go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: extra +Depends: BASEDEP, libdep(go`'GO_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (64bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. This currently is an empty package, because the + library is completely unstripped. +')`'dnl lib64go + +ifenabled(`lib32ggo',` +Package: lib32go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Replaces: lib32go3`'LS +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (32bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib32go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: extra +Depends: BASEDEP, libdep(go`'GO_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (32 bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. This currently is an empty package, because the + library is completely unstripped. +')`'dnl lib32go + +ifenabled(`libn32ggo',` +Package: libn32go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libn32go3`'LS +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (n32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libn32go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: extra +Depends: BASEDEP, libdep(go`'GO_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (n32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. This currently is an empty package, because the + library is completely unstripped. +')`'dnl libn32go + +ifenabled(`libx32ggo',` +Package: libx32go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libx32go3`'LS +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (x32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libx32go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: extra +Depends: BASEDEP, libdep(go`'GO_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (x32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. This currently is an empty package, because the + library is completely unstripped. +')`'dnl libx32go +')`'dnl ggo + +ifenabled(`java',` +ifenabled(`gcj',` +Package: gcj`'PV`'TS +Section: java +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:gcj}, ${dep:gcjcross}, ${dep:libcdev}, ${dep:ecj}, ${shlibs:Depends}, dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Recommends: libecj-java-gcj +Conflicts: gcj-4.4, cpp-4.1 (<< 4.1.1), gcc-4.1 (<< 4.1.1) +Replaces: libgcj11 (<< 4.5-20100101-1), gcj`'PV-jdk`'TS (<< 4.8.1-4) +BUILT_USING`'dnl +Description: GCJ byte code and native compiler for Java(TM) + GCJ is a front end to the GCC compiler which can natively compile both + Java(tm) source and bytecode files. The compiler can also generate class + files. +')`'dnl gcj + +ifenabled(`libgcj',` +ifenabled(`libgcjcommon',` +Package: libgcj-common +Section: java +Architecture: all +Priority: PRI(optional) +Depends: BASEDEP, ${misc:Depends} +Conflicts: classpath (<= 0.04-4) +Replaces: java-gcj-compat (<< 1.0.65-3), java-gcj-compat-dev (<< 1.0.65-3) +BUILT_USING`'dnl +Description: Java runtime library (common files) + This package contains files shared by Classpath and libgcj libraries. +')`'dnl libgcjcommon + + +Package: gcj`'PV-jdk`'TS +Section: java +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:gcj}, ${dep:libcdev}, gcj`'PV`'TS (= ${gcj:Version}), gcj`'PV-jre`'TS (= ${gcj:Version}), libdevdep(gcj`'GCJ_SO-dev,,=,${gcj:Version}), fastjar, libgcj-bc`'LS, java-common, libantlr-java, ${shlibs:Depends}, dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Recommends: libecj-java-gcj +Suggests: gcj`'PV-source (>= ${gcj:SoftVersion}), libdbgdep(gcj`'GCJ_SO-dbg,) +Provides: java-compiler, java-sdk, java2-sdk, java5-sdk +Conflicts: gcj-4.4, cpp-4.1 (<< 4.1.1), gcc-4.1 (<< 4.1.1) +Replaces: libgcj11 (<< 4.5-20100101-1) +BUILT_USING`'dnl +Description: GCJ and Classpath development tools for Java(TM) + GCJ is a front end to the GCC compiler which can natively compile both + Java(tm) source and bytecode files. The compiler can also generate class + files. Other java development tools from classpath are included in this + package. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-SDK-like interface to the GCJ tool set. + +Package: gcj`'PV-jre-headless`'TS +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Section: java +Architecture: any +Depends: BASEDEP, gcj`'PV-jre-lib`'TS (>= ${gcj:SoftVersion}), libdep(gcj`'LIBGCJ_EXT,,=,${gcj:Version}), ${dep:prctl}, ${shlibs:Depends}, ${misc:Depends} +Suggests: fastjar, gcj`'PV-jdk`'TS (= ${gcj:Version}), libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}) +Conflicts: gij-4.4, java-gcj-compat (<< 1.0.76-4) +Replaces: gcj-4.8-jre-lib`'TS (<< 4.8-20121219-0) +Provides: java5-runtime-headless, java2-runtime-headless, java1-runtime-headless, java-runtime-headless +BUILT_USING`'dnl +Description: Java runtime environment using GIJ/Classpath (headless version) + GIJ is a Java bytecode interpreter, not limited to interpreting bytecode. + It includes a class loader which can dynamically load shared objects, so + it is possible to give it the name of a class which has been compiled and + put into a shared library on the class path. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set, + limited to the headless tools and libraries. + +Package: gcj`'PV-jre`'TS +Section: java +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcj`'PV-jre-headless`'TS (= ${gcj:Version}), libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: java5-runtime, java2-runtime, java1-runtime, java-runtime +Replaces: gcj-4.8-jre-headless`'TS (<< 4.8.2-2) +BUILT_USING`'dnl +Description: Java runtime environment using GIJ/Classpath + GIJ is a Java bytecode interpreter, not limited to interpreting bytecode. + It includes a class loader which can dynamically load shared objects, so + it is possible to give it the name of a class which has been compiled and + put into a shared library on the class path. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set. + +Package: libgcj`'LIBGCJ_EXT`'LS +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends} +Multi-Arch: same +')`'dnl +Depends: SOFTBASEDEP, libgcj-common (>= 1:4.1.1-21), ${shlibs:Depends}, ${misc:Depends} +Recommends: gcj`'PV-jre-lib`'TS (>= ${gcj:SoftVersion}) +Suggests: libdbgdep(gcj`'GCJ_SO-dbg,), libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}) +Replaces: gij-4.4 (<< 4.4.0-1), gcj-4.8-jre-headless`'TS (<< 4.8.2-5) +BUILT_USING`'dnl +Description: Java runtime library for use with gcj + This is the runtime that goes along with the gcj front end to + gcc. libgcj includes parts of the Java Class Libraries, plus glue to + connect the libraries to the compiler and the underlying OS. + . + To show file names and line numbers in stack traces, the packages + libgcj`'GCJ_SO-dbg and binutils are required. + +Package: gcj`'PV-jre-lib`'TS +Section: java +Architecture: all +Priority: PRI(optional) +Depends: SOFTBASEDEP, libdep(gcj`'LIBGCJ_EXT,,>=,${gcj:SoftVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: Java runtime library for use with gcj (jar files) + This is the jar file that goes along with the gcj front end to gcc. + +ifenabled(`gcjbc',` +Package: libgcj-bc +Section: java +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends} +Multi-Arch: same +')`'dnl +Depends: BASEDEP, libdep(gcj`'LIBGCJ_EXT,,>=,${gcj:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: Link time only library for use with gcj + A fake library that is used at link time only. It ensures that + binaries built with the BC-ABI link against a constant SONAME. + This way, BC-ABI binaries continue to work if the SONAME underlying + libgcj.so changes. +')`'dnl gcjbc + +Package: libgcj`'LIBGCJ_EXT-awt`'LS +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends} +Multi-Arch: same +')`'dnl +Depends: SOFTBASEDEP, libdep(gcj`'LIBGCJ_EXT,,=,${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +Suggests: ${pkg:gcjqt} +BUILT_USING`'dnl +Description: AWT peer runtime libraries for use with gcj + These are runtime libraries holding the AWT peer implementations + for libgcj (currently the GTK+ based peer library is required, the + QT bases library is not built). + +ifenabled(`gtkpeer',` +Package: libgcj`'GCJ_SO-awt-gtk`'LS +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends} +Multi-Arch: same +')`'dnl +Depends: SOFTBASEDEP, libgcj`'LIBGCJ_EXT-awt`'LS (= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: AWT GTK+ peer runtime library for use with libgcj + This is the runtime library holding the GTK+ based AWT peer + implementation for libgcj. +')`'dnl gtkpeer + +ifenabled(`qtpeer',` +Package: libgcj`'GCJ_SO-awt-qt`'LS +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends} +Multi-Arch: same +')`'dnl +Depends: SOFTBASEDEP, libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: AWT QT peer runtime library for use with libgcj + This is the runtime library holding the QT based AWT peer + implementation for libgcj. +')`'dnl qtpeer +')`'dnl libgcj + +ifenabled(`libgcjdev',` +Package: libgcj`'GCJ_SO-dev`'LS +Section: libdevel +Architecture: any +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Priority: PRI(optional) +Depends: BASEDEP, libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}), libgcj-bc`'LS, ${pkg:gcjgtk}, ${pkg:gcjqt}, zlib1g-dev, ${shlibs:Depends}, ${misc:Depends} +Suggests: libgcj-doc +BUILT_USING`'dnl +Description: Java development headers for use with gcj + These are the development headers that go along with the gcj front end + to gcc. libgcj includes parts of the Java Class Libraries, plus glue + to connect the libraries to the compiler and the underlying OS. + +Package: libgcj`'GCJ_SO-dbg`'LS +Section: debug +Architecture: any +Priority: extra +ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends} +Multi-Arch: same +')`'dnl +Depends: BASEDEP, libdep(gcj`'LIBGCJ_EXT,,=,${gcj:Version}), ${misc:Depends} +Recommends: binutils, libc6-dbg | libc-dbg +BUILT_USING`'dnl +Description: Debugging symbols for libraries provided in libgcj`'GCJ_SO-dev + The package provides debugging symbols for the libraries provided + in libgcj`'GCJ_SO-dev. + . + binutils is required to show file names and line numbers in stack traces. + +ifenabled(`gcjsrc',` +Package: gcj`'PV-source +Section: java +Architecture: all +Priority: PRI(optional) +Depends: SOFTBASEDEP, gcj`'PV-jdk (>= ${gcj:SoftVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCJ java sources for use in IDEs like eclipse and netbeans + These are the java source files packaged as a zip file for use in development + environments like eclipse and netbeans. +')`'dnl + +ifenabled(`gcjdoc',` +Package: libgcj-doc +Section: doc +Architecture: all +Priority: PRI(optional) +Depends: SOFTBASEDEP, ${misc:Depends} +Enhances: libgcj`'GCJ_SO-dev +Provides: classpath-doc +BUILT_USING`'dnl +Description: libgcj API documentation and example programs + Autogenerated documentation describing the API of the libgcj library. + Sources and precompiled example programs from the Classpath library. +')`'dnl gcjdoc +')`'dnl libgcjdev +')`'dnl java + +ifenabled(`c++',` +ifenabled(`libcxx',` +Package: libstdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(important)) +Depends: BASEDEP, ${dep:libc}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libstdc++CXX_SO-TARGET-dcv1',`Provides: libstdc++'CXX_SO`-armel [armel], libstdc++'CXX_SO`-armhf [armhf]') +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +Breaks: ${multiarch:breaks} +')`'dnl +Conflicts: scim (<< 1.4.2-1) +Replaces: libstdc++CXX_SO`'PV-dbg`'LS (<< 4.8.2-22) +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libcxx + +ifenabled(`lib32cxx',` +Package: lib32stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: extra +Depends: BASEDEP, libdep(gcc1,32), ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (32 bit Version) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib32cxx + +ifenabled(`lib64cxx',` +Package: lib64stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdep(gcc1,64), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (64bit) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib64cxx + +ifenabled(`libn32cxx',` +Package: libn32stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdep(gcc1,n32), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (n32) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libn32cxx + +ifenabled(`libx32cxx',` +Package: libx32stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdep(gcc1,x32), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libx32stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (x32) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libx32cxx + +ifenabled(`libhfcxx',` +Package: libhfstdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdep(gcc1,hf), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libstdc++'CXX_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (hard float ABI) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libhfcxx + +ifenabled(`libsfcxx',` +Package: libsfstdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdep(gcc1,sf), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libstdc++'CXX_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (soft float ABI) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libsfcxx + +ifenabled(`libneoncxx',` +Package: libstdc++CXX_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, libgcc1-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 [NEON version] + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl + +ifenabled(`c++dev',` +Package: libstdc++`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,,=), libdep(stdc++CXX_SO,,>=), ${dep:libcdev}, ${misc:Depends} +ifdef(`TARGET',`',`dnl native +Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev, libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev, libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev +Suggests: libstdc++`'PV-doc +')`'dnl native +Provides: libstdc++-dev`'LS`'ifdef(`TARGET',`, libstdc++-dev-TARGET-dcv1') +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libstdc++`'PV-pic`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,), libdevdep(stdc++`'PV-dev,), ${misc:Depends} +ifdef(`TARGET',`Provides: libstdc++-pic-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (shared library subset kit)`'ifdef(`TARGET)',` (TARGET)', `') + This is used to develop subsets of the libstdc++ shared libraries for + use on custom installation floppies and in embedded systems. + . + Unless you are making one of those, you will not need this package. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libstdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,), libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libstdc++CXX_SO-dbg-TARGET-dcv1',`Provides: libstdc++'CXX_SO`'PV`-dbg-armel [armel], libstdc++'CXX_SO`'PV`-dbg-armhf [armhf]') +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Recommends: libdevdep(stdc++`'PV-dev,) +Conflicts: libstdc++5-dbg`'LS, libstdc++5-3.3-dbg`'LS, libstdc++6-dbg`'LS, libstdc++6-4.0-dbg`'LS, libstdc++6-4.1-dbg`'LS, libstdc++6-4.2-dbg`'LS, libstdc++6-4.3-dbg`'LS, libstdc++6-4.4-dbg`'LS, libstdc++6-4.5-dbg`'LS, libstdc++6-4.6-dbg`'LS, libstdc++6-4.7-dbg`'LS +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib32stdc++`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,32), libdep(stdc++CXX_SO,32), libdevdep(stdc++`'PV-dev,), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib32stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,32), libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,32,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: lib32stdc++6-dbg`'LS, lib32stdc++6-4.0-dbg`'LS, lib32stdc++6-4.1-dbg`'LS, lib32stdc++6-4.2-dbg`'LS, lib32stdc++6-4.3-dbg`'LS, lib32stdc++6-4.4-dbg`'LS, lib32stdc++6-4.5-dbg`'LS, lib32stdc++6-4.6-dbg`'LS, lib32stdc++6-4.7-dbg`'LS, +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib64stdc++`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,64), libdep(stdc++CXX_SO,64), libdevdep(stdc++`'PV-dev,), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib64stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,64), libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,64,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: lib64stdc++6-dbg`'LS, lib64stdc++6-4.0-dbg`'LS, lib64stdc++6-4.1-dbg`'LS, lib64stdc++6-4.2-dbg`'LS, lib64stdc++6-4.3-dbg`'LS, lib64stdc++6-4.4-dbg`'LS, lib64stdc++6-4.5-dbg`'LS, lib64stdc++6-4.6-dbg`'LS, lib64stdc++6-4.7-dbg`'LS +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libn32stdc++`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,n32), libdep(stdc++CXX_SO,n32), libdevdep(stdc++`'PV-dev,), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libn32stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,n32), libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,n32,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: libn32stdc++6-dbg`'LS, libn32stdc++6-4.0-dbg`'LS, libn32stdc++6-4.1-dbg`'LS, libn32stdc++6-4.2-dbg`'LS, libn32stdc++6-4.3-dbg`'LS, libn32stdc++6-4.4-dbg`'LS, libn32stdc++6-4.5-dbg`'LS, libn32stdc++6-4.6-dbg`'LS, libn32stdc++6-4.7-dbg`'LS +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +ifenabled(`x32dev',` +Package: libx32stdc++`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,x32), libdep(stdc++CXX_SO,x32), libdevdep(stdc++`'PV-dev,), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl x32dev + +ifenabled(`libx32dbgcxx',` +Package: libx32stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,x32), libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,x32,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libx32stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: libx32stdc++6-dbg`'LS, libx32stdc++6-4.6-dbg`'LS, libx32stdc++6-4.7-dbg`'LS +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libx32dbgcxx + +ifenabled(`libhfdbgcxx',` +Package: libhfstdc++`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,hf), libdep(stdc++CXX_SO,hf), libdevdep(stdc++`'PV-dev,), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libhfstdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,hf), libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,hf,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libhfstdc++6-dbg`'LS, libhfstdc++6-4.3-dbg`'LS, libhfstdc++6-4.4-dbg`'LS, libhfstdc++6-4.5-dbg`'LS, libhfstdc++6-4.6-dbg`'LS, libhfstdc++6-4.7-dbg`'LS, libstdc++'CXX_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libhfdbgcxx + +ifenabled(`libsfdbgcxx',` +Package: libsfstdc++`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,sf), libdep(stdc++CXX_SO,sf), libdevdep(stdc++`'PV-dev,), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libsfstdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,sf), libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,sf,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libsfstdc++6-dbg`'LS, libsfstdc++6-4.3-dbg`'LS, libsfstdc++6-4.4-dbg`'LS, libsfstdc++6-4.5-dbg`'LS, libsfstdc++6-4.6-dbg`'LS, libsfstdc++6-4.7-dbg`'LS, libstdc++'CXX_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libsfdbgcxx + +ifdef(`TARGET', `', ` +Package: libstdc++`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} +Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc, libstdc++6-4.7-doc +Description: GNU Standard C++ Library v3 (documentation files) + This package contains documentation files for the GNU stdc++ library. + . + One set is the distribution documentation, the other set is the + source documentation including a namespace list, class hierarchy, + alphabetical list, compound list, file list, namespace members, + compound members and file members. +')`'dnl native +')`'dnl c++dev +')`'dnl c++ + +ifenabled(`ada',` +Package: gnat`'-GNAT_V`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Depends: BASEDEP, gcc`'PV`'TS (>= ${gcc:SoftVersion}), ${dep:libgnat}, ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: gnat`'PV-doc, ada-reference-manual-html, ada-reference-manual-info, ada-reference-manual-pdf, ada-reference-manual-text, gnat`'-GNAT_V-sjlj +Conflicts: gnat (<< 4.1), gnat-3.1, gnat-3.2, gnat-3.3, gnat-3.4, gnat-3.5, gnat-4.0, gnat-4.1, gnat-4.2, gnat-4.3, gnat-4.4, gnat-4.6 +BUILT_USING`'dnl +Description: GNU Ada compiler + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + This package provides the compiler, tools and runtime library that handles + exceptions using the default zero-cost mechanism. + +Package: gnat`'-GNAT_V-sjlj`'TS +Architecture: any +Priority: extra +ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Depends: BASEDEP, gnat`'-GNAT_V`'TS (= ${gnat:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Ada compiler (setjump/longjump runtime library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + This package provides an alternative runtime library that handles + exceptions using the setjump/longjump mechanism (as a static library + only). You can install it to supplement the normal compiler. + +ifenabled(`libgnat',` +Package: libgnat`'-GNAT_V`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: runtime for applications compiled with GNAT (shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the runtime shared library. + +Package: libgnat`'-GNAT_V-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: extra +Depends: BASEDEP, libgnat`'-GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: runtime for applications compiled with GNAT (debugging symbols) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the debugging symbols. + +Package: libgnatvsn`'GNAT_V-dev`'LS +Section: libdevel +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Priority: extra +Depends: BASEDEP, gnat`'PV`'LS (= ${gnat:Version}), + libgnatvsn`'GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends} +Conflicts: libgnatvsn-dev (<< `'GNAT_V), libgnatvsn4.1-dev, libgnatvsn4.3-dev, libgnatvsn4.4-dev, libgnatvsn4.5-dev, libgnatvsn4.6-dev +BUILT_USING`'dnl +Description: GNU Ada compiler selected components (development files) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnatvsn library exports selected GNAT components for use in other + packages, most notably ASIS tools. It is licensed under the GNAT-Modified + GPL, allowing to link proprietary programs with it. + . + This package contains the development files and static library. + +Package: libgnatvsn`'GNAT_V`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: PRI(optional) +Section: ifdef(`TARGET',`devel',`libs') +Depends: BASEDEP, libgnat`'-GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Ada compiler selected components (shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnatvsn library exports selected GNAT components for use in other + packages, most notably ASIS tools. It is licensed under the GNAT-Modified + GPL, allowing to link proprietary programs with it. + . + This package contains the runtime shared library. + +Package: libgnatvsn`'GNAT_V-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: extra +Section: debug +Depends: BASEDEP, libgnatvsn`'GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends} +Suggests: gnat +BUILT_USING`'dnl +Description: GNU Ada compiler selected components (debugging symbols) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnatvsn library exports selected GNAT components for use in other + packages, most notably ASIS tools. It is licensed under the GNAT-Modified + GPL, allowing to link proprietary programs with it. + . + This package contains the debugging symbols. + +Package: libgnatprj`'GNAT_V-dev`'LS +Section: libdevel +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Priority: extra +Depends: BASEDEP, gnat`'PV`'TS (= ${gnat:Version}), + libgnatprj`'GNAT_V`'LS (= ${gnat:Version}), + libgnatvsn`'GNAT_V-dev`'LS (= ${gnat:Version}), ${misc:Depends} +Conflicts: libgnatprj-dev (<< `'GNAT_V), libgnatprj4.1-dev, libgnatprj4.3-dev, libgnatprj4.4-dev, libgnatprj4.5-dev, libgnatprj4.6-dev +BUILT_USING`'dnl +Description: GNU Ada compiler Project Manager (development files) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + GNAT uses project files to organise source and object files in large-scale + development efforts. The libgnatprj library exports GNAT project files + management for use in other packages, most notably ASIS tools (package + asis-programs) and GNAT Programming Studio (package gnat-gps). It is + licensed under the pure GPL; all programs that use it must also be + distributed under the GPL, or not distributed at all. + . + This package contains the development files and static library. + +Package: libgnatprj`'GNAT_V`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: PRI(optional) +Section: ifdef(`TARGET',`devel',`libs') +Depends: BASEDEP, libgnat`'-GNAT_V`'LS (= ${gnat:Version}), libgnatvsn`'GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Ada compiler Project Manager (shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + GNAT uses project files to organise source and object files in large-scale + development efforts. The libgnatprj library exports GNAT project files + management for use in other packages, most notably ASIS tools (package + asis-programs) and GNAT Programming Studio (package gnat-gps). It is + licensed under the pure GPL; all programs that use it must also be + distributed under the GPL, or not distributed at all. + . + This package contains the runtime shared library. + +Package: libgnatprj`'GNAT_V-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} +')`'dnl +Priority: extra +Section: debug +Depends: BASEDEP, libgnatprj`'GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends} +Suggests: gnat +BUILT_USING`'dnl +Description: GNU Ada compiler Project Manager (debugging symbols) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + GNAT uses project files to organise source and object files in large-scale + development efforts. The libgnatprj library exports GNAT project files + management for use in other packages, most notably ASIS tools (package + asis-programs) and GNAT Programming Studio (package gnat-gps). It is + licensed under the pure GPL; all programs that use it must also be + distributed under the GPL, or not distributed at all. + . + This package contains the debugging symbols. +')`'dnl libgnat + +ifenabled(`lib64gnat',` +Package: lib64gnat`'-GNAT_V +Section: libs +Architecture: biarch64_archs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: runtime for applications compiled with GNAT (64 bits shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the runtime shared library for 64 bits architectures. +')`'dnl libgnat + +ifenabled(`gfdldoc',` +Package: gnat`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Suggests: gnat`'PV +Conflicts: gnat-4.1-doc, gnat-4.2-doc, gnat-4.3-doc, gnat-4.4-doc, gnat-4.6-doc +BUILT_USING`'dnl +Description: GNU Ada compiler (documentation) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the documentation in info `format'. +')`'dnl gfdldoc +')`'dnl ada + +ifenabled(`d ',` +Package: gdc`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: SOFTBASEDEP, g++`'PV`'TS (>= ${gcc:SoftVersion}), ${dep:gdccross}, ${dep:phobosdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: gdc, d-compiler, d-v2-compiler +Replaces: gdc (<< 4.4.6-5) +BUILT_USING`'dnl +Description: GNU D compiler (version 2), based on the GCC backend + This is the GNU D compiler, which compiles D on platforms supported by gcc. + It uses the gcc backend to generate optimised code. + . + This compiler supports D language version 2. + +ifenabled(`libphobos',` +Package: libphobos`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`libphobos_archs') +Section: libdevel +Priority: PRI(optional) +Depends: BASEDEP, zlib1g-dev, ${shlibs:Depends}, ${misc:Depends} +Provides: libphobos-dev +Replaces: gdc`'PV`'TS (<< 4.8.2-19) +BUILT_USING`'dnl +Description: Phobos D standard library + This is the Phobos standard library that comes with the D2 compiler. + . + For more information check http://www.dlang.org/phobos/ + +#Package: libphobos`'PHOBOS_V`'PV`'TS-dbg +#Section: debug +#Architecture: ifdef(`TARGET',`CROSS_ARCH',`libphobos_archs') +#Priority: extra +#Depends: BASEDEP, libphobos`'PHOBOS_V`'PV-dev (= ${gdc:Version}), ${misc:Depends} +#Provides: libphobos`'PHOBOS_V`'TS-dbg +#BUILT_USING`'dnl +#Description: The Phobos D standard library (debug symbols) +# This is the Phobos standard library that comes with the D2 compiler. +# . +# For more information check http://www.dlang.org/phobos/ +')`'dnl libphobos +')`'dnl d + +ifdef(`TARGET',`',`dnl +ifenabled(`libs',` +#Package: gcc`'PV-soft-float +#Architecture: arm armel armhf +#Priority: PRI(optional) +#Depends: BASEDEP, depifenabled(`cdev',`gcc`'PV (= ${gcc:Version}),') ${shlibs:Depends}, ${misc:Depends} +#Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float +#BUILT_USING`'dnl +#Description: GCC soft-floating-point gcc libraries (ARM) +# These are versions of basic static libraries such as libgcc.a compiled +# with the -msoft-float option, for CPUs without a floating-point unit. +')`'dnl commonlibs +')`'dnl + +ifenabled(`fixincl',` +Package: fixincludes +Architecture: any +Priority: PRI(optional) +Depends: BASEDEP, gcc`'PV (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Fix non-ANSI header files + FixIncludes was created to fix non-ANSI system header files. Many + system manufacturers supply proprietary headers that are not ANSI compliant. + The GNU compilers cannot compile non-ANSI headers. Consequently, the + FixIncludes shell script was written to fix the header files. + . + Not all packages with header files are installed on the system, when the + package is built, so we make fixincludes available at build time of other + packages, such that checking tools like lintian can make use of it. +')`'dnl fixincl + +ifenabled(`cdev',` +ifdef(`TARGET', `', ` +ifenabled(`gfdldoc',` +Package: gcc`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Conflicts: gcc-docs (<< 2.95.2) +Replaces: gcc (<=2.7.2.3-4.3), gcc-docs (<< 2.95.2) +Description: Documentation for the GNU compilers (gcc, gobjc, g++) + Documentation for the GNU compilers in info `format'. +')`'dnl gfdldoc +')`'dnl native +')`'dnl cdev + +ifdef(`TARGET',`',`dnl +ifenabled(`libnof',` +Package: gcc`'PV-nof +Architecture: powerpc +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}ifenabled(`cdev',`, gcc`'PV (= ${gcc:Version})'), ${misc:Depends} +Conflicts: gcc-3.2-nof +BUILT_USING`'dnl +Description: GCC no-floating-point gcc libraries (powerpc) + These are versions of basic static libraries such as libgcc.a compiled + with the -msoft-float option, for CPUs without a floating-point unit. +')`'dnl libnof +')`'dnl + +ifenabled(`source',` +Package: gcc`'PV-source +Architecture: all +Priority: PRI(optional) +Depends: make, autoconf2.64, quilt, patchutils, gawk, ${misc:Depends} +Description: Source of the GNU Compiler Collection + This package contains the sources and patches which are needed to + build the GNU Compiler Collection (GCC). +')`'dnl source +dnl +')`'dnl gcc-X.Y +dnl last line in file --- gcc-4.8-4.8.5.orig/debian/copyright +++ gcc-4.8-4.8.5/debian/copyright @@ -0,0 +1,661 @@ +This is the Debian GNU/Linux prepackaged version of the GNU compiler +collection, containing Ada, C, C++, Fortran 95, Java, Objective-C, +Objective-C++, and Treelang compilers, documentation, and support +libraries. In addition, Debian provides the gdc compiler, either in +the same source package, or built from a separate same source package. +Packaging is done by the Debian GCC Maintainers +, with sources obtained from: + + ftp://gcc.gnu.org/pub/gcc/releases/ (for full releases) + svn://gcc.gnu.org/svn/gcc/ (for prereleases) + http://bitbucket.org/goshawk/gdc (for D) + +The current gcc-4.8 source package is taken from the SVN gcc-4_8-branch. + +Changes: See changelog.Debian.gz + +Debian splits the GNU Compiler Collection into packages for each language, +library, and documentation as follows: + +Language Compiler package Library package Documentation +--------------------------------------------------------------------------- +Ada gnat-4.8 libgnat-4.8 gnat-4.8-doc +C gcc-4.8 gcc-4.8-doc +C++ g++-4.8 libstdc++6 libstdc++6-4.8-doc +D gdc-4.8 +Fortran 95 gfortran-4.8 libgfortran3 gfortran-4.8-doc +Go gccgo-4.8 libgo0 +Java gcj-4.8 libgcj10 libgcj-doc +Objective C gobjc-4.8 libobjc2 +Objective C++ gobjc++-4.8 + +For some language run-time libraries, Debian provides source files, +development files, debugging symbols and libraries containing position- +independent code in separate packages: + +Language Sources Development Debugging Position-Independent +------------------------------------------------------------------------------ +C++ libstdc++6-4.8-dbg libstdc++6-4.8-pic +D libphobos-4.8-dev +Java libgcj10-src libgcj10-dev libgcj10-dbg + +Additional packages include: + +All languages: +libgcc1, libgcc2, libgcc4 GCC intrinsics (platform-dependent) +gcc-4.8-base Base files common to all compilers +gcc-4.8-soft-float Software floating point (ARM only) +gcc-4.8-source The sources with patches + +Ada: +libgnatvsn-dev, libgnatvsn4.8 GNAT version library +libgnatprj-dev, libgnatprj4.8 GNAT Project Manager library + +C: +cpp-4.8, cpp-4.8-doc GNU C Preprocessor +libmudflap0-dev, libmudflap0 Library for instrumenting pointers +libssp0-dev, libssp0 GCC stack smashing protection library +libquadmath0 Math routines for the __float128 type +fixincludes Fix non-ANSI header files +protoize Create/remove ANSI prototypes from C code + +Java: +gij The Java bytecode interpreter and VM +libgcj-common Common files for the Java run-time +libgcj10-awt The Abstract Windowing Toolkit +libgcj10-jar Java ARchive for the Java run-time + +C, C++ and Fortran 95: +libgomp1-dev, libgomp1 GCC OpenMP (GOMP) support library +libitm1-dev, libitm1 GNU Transactional Memory Library + +Biarch support: On some 64-bit platforms which can also run 32-bit code, +Debian provides additional packages containing 32-bit versions of some +libraries. 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Gay. + +Copyright (C) 1998, 1999, 2000, 2001 by Lucent Technologies +All Rights Reserved + +Permission to use, copy, modify, and distribute this software and +its documentation for any purpose and without fee is hereby +granted, provided that the above copyright notice appear in all +copies and that both that the copyright notice and this +permission notice and warranty disclaimer appear in supporting +documentation, and that the name of Lucent or any of its entities +not be used in advertising or publicity pertaining to +distribution of the software without specific, written prior +permission. + +LUCENT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, +INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. +IN NO EVENT SHALL LUCENT OR ANY OF ITS ENTITIES BE LIABLE FOR ANY +SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER +IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, +ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF +THIS SOFTWARE. + +libquadmath/math: + +atanq.c, expm1q.c, j0q.c, j1q.c, log1pq.c, logq.c: + Copyright 2001 by Stephen L. Moshier + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +coshq.c, erfq.c, jnq.c, lgammaq.c, powq.c, roundq.c: + Changes for 128-bit __float128 are + Copyright (C) 2001 Stephen L. Moshier + and are incorporated herein by permission of the author. The author + reserves the right to distribute this material elsewhere under different + copying permissions. These modifications are distributed here under + the following terms: + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +ldexpq.c: + * Conversion to long double by Ulrich Drepper, + * Cygnus Support, drepper@cygnus.com. + +cosq_kernel.c, expq.c, sincos_table.c, sincosq.c, sincosq_kernel.c, +sinq_kernel.c, truncq.c: + Copyright (C) 1997, 1999 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +isinfq.c: + * Written by J.T. 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Gay. + +Copyright (C) 1998, 1999, 2000, 2001 by Lucent Technologies +All Rights Reserved + +Permission to use, copy, modify, and distribute this software and +its documentation for any purpose and without fee is hereby +granted, provided that the above copyright notice appear in all +copies and that both that the copyright notice and this +permission notice and warranty disclaimer appear in supporting +documentation, and that the name of Lucent or any of its entities +not be used in advertising or publicity pertaining to +distribution of the software without specific, written prior +permission. + +LUCENT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, +INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. +IN NO EVENT SHALL LUCENT OR ANY OF ITS ENTITIES BE LIABLE FOR ANY +SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER +IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, +ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF +THIS SOFTWARE. + +libquadmath/math: + +atanq.c, expm1q.c, j0q.c, j1q.c, log1pq.c, logq.c: + Copyright 2001 by Stephen L. Moshier + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +coshq.c, erfq.c, jnq.c, lgammaq.c, powq.c, roundq.c: + Changes for 128-bit __float128 are + Copyright (C) 2001 Stephen L. Moshier + and are incorporated herein by permission of the author. The author + reserves the right to distribute this material elsewhere under different + copying permissions. These modifications are distributed here under + the following terms: + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +ldexpq.c: + * Conversion to long double by Ulrich Drepper, + * Cygnus Support, drepper@cygnus.com. + +cosq_kernel.c, expq.c, sincos_table.c, sincosq.c, sincosq_kernel.c, +sinq_kernel.c, truncq.c: + Copyright (C) 1997, 1999 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +isinfq.c: + * Written by J.T. Conklin . + * Change for long double by Jakub Jelinek + * Public domain. + +llroundq.c, lroundq.c, tgammaq.c: + Copyright (C) 1997, 1999, 2002, 2004 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Ulrich Drepper , 1997 and + Jakub Jelinek , 1999. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +log10q.c: + Cephes Math Library Release 2.2: January, 1991 + Copyright 1984, 1991 by Stephen L. Moshier + Adapted for glibc November, 2001 + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +remaining files: + + * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. + * + * Developed at SunPro, a Sun Microsystems, Inc. business. + * Permission to use, copy, modify, and distribute this + * software is freely granted, provided that this notice + * is preserved. + + +libjava/classpath/resource/gnu/java/locale/* + +They are copyrighted and covered by the terms of use: +http://www.unicode.org/copyright.html + +EXHIBIT 1 +UNICODE, INC. LICENSE AGREEMENT - DATA FILES AND SOFTWARE + + Unicode Data Files include all data files under the directories +http://www.unicode.org/Public/ and http://www.unicode.org/reports/. +Unicode Software includes any source code published in the Unicode Standard or +under the directories http://www.unicode.org/Public/ and +http://www.unicode.org/reports/. + +NOTICE TO USER: Carefully read the following legal agreement. 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All other trademarks and registered trademarks mentioned +herein are the property of their respective owners. + + +gcc/go/gofrontend, libgo: + +Copyright (c) 2009 The Go Authors. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright +notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above +copyright notice, this list of conditions and the following disclaimer +in the documentation and/or other materials provided with the +distribution. + * Neither the name of Google Inc. nor the names of its +contributors may be used to endorse or promote products derived from +this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +D: +gdc-@BV@ GNU D Compiler +libphobos-@BV@-dev D standard runtime library + +The D source package is made up of the following components. + +The D front-end for GCC: + - d/* + +Copyright (C) 2004-2007 David Friedman +Modified by Vincenzo Ampolo, Michael Parrot, Iain Buclaw, (C) 2009, 2010 + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +On Debian GNU/Linux systems, the complete text of the GNU General +Public License is in `/usr/share/common-licenses/GPL', version 2 of this +license in `/usr/share/common-licenses/GPL-2'. + + +The DMD Compiler implementation of the D programming language: + - d/dmd/* + +Copyright (c) 1999-2010 by Digital Mars +All Rights Reserved +written by Walter Bright +http://www.digitalmars.com +License for redistribution is by either the Artistic License or +the GNU General Public License (v1). + +On Debian GNU/Linux systems, the complete text of the GNU General +Public License is in `/usr/share/common-licenses/GPL', the Artistic +license in `/usr/share/common-licenses/Artistic'. + + +The Zlib data compression library: + - d/phobos/etc/c/zlib/* + + (C) 1995-2004 Jean-loup Gailly and Mark Adler + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + +The Phobos standard runtime library: + - d/phobos/* + +Unless otherwise marked within the file, each file in the source +is under the following licenses: + +Copyright (C) 2004-2005 by Digital Mars, www.digitalmars.com +Written by Walter Bright + +This software is provided 'as-is', without any express or implied +warranty. In no event will the authors be held liable for any damages +arising from the use of this software. + +Permission is granted to anyone to use this software for any purpose, +including commercial applications, and to alter it and redistribute it +freely, in both source and binary form, subject to the following +restrictions: + + o The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + o Altered source versions must be plainly marked as such, and must not + be misrepresented as being the original software. + o This notice may not be removed or altered from any source + distribution. + +By plainly marking modifications, something along the lines of adding to each +file that has been changed a "Modified by Foo Bar" line +underneath the "Written by" line would be adequate. + --- gcc-4.8-4.8.5.orig/debian/cpp-4.8-powerpc64le-linux-gnu.preinst +++ gcc-4.8-4.8.5/debian/cpp-4.8-powerpc64le-linux-gnu.preinst @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove powerpc64le-linux-gnu-cpp /usr/bin/powerpc64le-linux-gnu-cpp-4.8 +fi + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/cpp-BV-CRB.preinst.in +++ gcc-4.8-4.8.5/debian/cpp-BV-CRB.preinst.in @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-cpp /usr/bin/@TARGET@-cpp-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/cpp-BV-doc.doc-base.cpp +++ gcc-4.8-4.8.5/debian/cpp-BV-doc.doc-base.cpp @@ -0,0 +1,16 @@ +Document: cpp-@BV@ +Title: The GNU C preprocessor +Author: Various +Abstract: The C preprocessor is a "macro processor" that is used automatically + by the C compiler to transform your program before actual compilation. + It is called a macro processor because it allows you to define "macros", + which are brief abbreviations for longer constructs. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/cpp.html +Files: /usr/share/doc/gcc-@BV@-base/cpp.html + +Format: info +Index: /usr/share/info/cpp-@BV@.info.gz +Files: /usr/share/info/cpp-@BV@* --- gcc-4.8-4.8.5.orig/debian/cpp-BV-doc.doc-base.cppint +++ gcc-4.8-4.8.5/debian/cpp-BV-doc.doc-base.cppint @@ -0,0 +1,17 @@ +Document: cppinternals-@BV@ +Title: The GNU C preprocessor (internals) +Author: Various +Abstract: This brief manual documents the internals of cpplib, and + explains some of the tricky issues. It is intended that, along with + the comments in the source code, a reasonably competent C programmer + should be able to figure out what the code is doing, and why things + have been implemented the way they have. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/cppinternals.html +Files: /usr/share/doc/gcc-@BV@-base/cppinternals.html + +Format: info +Index: /usr/share/info/cppinternals-@BV@.info.gz +Files: /usr/share/info/cppinternals-@BV@* --- gcc-4.8-4.8.5.orig/debian/dh_doclink +++ gcc-4.8-4.8.5/debian/dh_doclink @@ -0,0 +1,12 @@ +#! /bin/sh + +pkg=`echo $1 | sed 's/^-p//'` +target=$2 + +[ -d debian/$pkg/usr/share/doc ] || mkdir -p debian/$pkg/usr/share/doc +if [ -d debian/$pkg/usr/share/doc/$p -a ! -h debian/$pkg/usr/share/doc/$p ] +then + echo "WARNING: removing doc directory $pkg" + rm -rf debian/$pkg/usr/share/doc/$pkg +fi +ln -sf $target debian/$pkg/usr/share/doc/$pkg --- gcc-4.8-4.8.5.orig/debian/dh_rmemptydirs +++ gcc-4.8-4.8.5/debian/dh_rmemptydirs @@ -0,0 +1,10 @@ +#! /bin/sh -e + +pkg=`echo $1 | sed 's/^-p//'` + +: # remove empty directories, when all components are in place +for d in `find debian/$pkg -depth -type d -empty 2> /dev/null`; do \ + while rmdir $d 2> /dev/null; do d=`dirname $d`; done; \ +done + +exit 0 --- gcc-4.8-4.8.5.orig/debian/dummy-man.1 +++ gcc-4.8-4.8.5/debian/dummy-man.1 @@ -0,0 +1,29 @@ +.TH @NAME@ 1 "May 24, 2003" @name@ "Debian Free Documentation" +.SH NAME +@name@ \- A program with a man page covered by the GFDL with invariant sections +.SH SYNOPSIS +@name@ [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fB@name@\fR is documented by a man page, which is covered by the "GNU +Free Documentation License" (GFDL) containing invariant sections. +.P +In November 2002, version 1.2 of the GNU Free Documentation License (GNU +FDL) was released by the Free Software Foundation after a long period +of consultation. Unfortunately, some concerns raised by members of the +Debian Project were not addressed, and as such the GNU FDL can apply +to works that do not pass the Debian Free Software Guidelines (DFSG), +and may thus only be included in the non-free component of the Debian +archive, not the Debian distribution itself. + +.SH "SEE ALSO" +.BR http://gcc.gnu.org/onlinedocs/ +for the complete documentation, +.BR http://lists.debian.org/debian-legal/2003/debian-legal-200304/msg00307.html +for a proposed statement of Debian with respect to the GFDL, +.BR gfdl(7) + +.SH AUTHOR +This manual page was written by the Debian GCC maintainers, +for the Debian GNU/Linux system. --- gcc-4.8-4.8.5.orig/debian/dummy.texi +++ gcc-4.8-4.8.5/debian/dummy.texi @@ -0,0 +1 @@ +@c This file is empty because the original one has a non DFSG free license (GFDL) --- gcc-4.8-4.8.5.orig/debian/fixincludes.in +++ gcc-4.8-4.8.5/debian/fixincludes.in @@ -0,0 +1,8 @@ +#! /bin/sh + +PATH="/@LIBEXECDIR@/install-tools:$PATH" + +TARGET_MACHINE=`dpkg-architecture -qDEB_HOST_GNU_TYPE` +export TARGET_MACHINE + +exec fixinc.sh "$@" --- gcc-4.8-4.8.5.orig/debian/g++-4.8-powerpc64le-linux-gnu.preinst +++ gcc-4.8-4.8.5/debian/g++-4.8-powerpc64le-linux-gnu.preinst @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove powerpc64le-linux-gnu-g++ /usr/bin/powerpc64le-linux-gnu-g++-4.8 +fi + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/g++-BV-CRB.preinst.in +++ gcc-4.8-4.8.5/debian/g++-BV-CRB.preinst.in @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-g++ /usr/bin/@TARGET@-g++-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/gcc-4.8-powerpc64le-linux-gnu.preinst +++ gcc-4.8-4.8.5/debian/gcc-4.8-powerpc64le-linux-gnu.preinst @@ -0,0 +1,12 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove powerpc64le-linux-gnu-gcc /usr/bin/powerpc64le-linux-gnu-gcc-4.8 + update-alternatives --quiet --remove powerpc64le-linux-gnu-gcov /usr/bin/powerpc64le-linux-gnu-gcov-4.8 +fi + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/gcc-BV-CRB.preinst.in +++ gcc-4.8-4.8.5/debian/gcc-BV-CRB.preinst.in @@ -0,0 +1,12 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-gcc /usr/bin/@TARGET@-gcc-@BV@ + update-alternatives --quiet --remove @TARGET@-gcov /usr/bin/@TARGET@-gcov-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/gcc-BV-doc.doc-base.gcc +++ gcc-4.8-4.8.5/debian/gcc-BV-doc.doc-base.gcc @@ -0,0 +1,14 @@ +Document: gcc-@BV@ +Title: The GNU C and C++ compiler +Author: Various +Abstract: This manual documents how to run, install and port the GNU compiler, + as well as its new features and incompatibilities, and how to report bugs. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/gcc.html +Files: /usr/share/doc/gcc-@BV@-base/gcc.html + +Format: info +Index: /usr/share/info/gcc-@BV@.info.gz +Files: /usr/share/info/gcc-@BV@* --- gcc-4.8-4.8.5.orig/debian/gcc-BV-doc.doc-base.gccint +++ gcc-4.8-4.8.5/debian/gcc-BV-doc.doc-base.gccint @@ -0,0 +1,17 @@ +Document: gccint-@BV@ +Title: Internals of the GNU C and C++ compiler +Author: Various +Abstract: This manual documents the internals of the GNU compilers, + including how to port them to new targets and some information about + how to write front ends for new languages. It corresponds to GCC + version @BV@.x. The use of the GNU compilers is documented in a + separate manual. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/gccint.html +Files: /usr/share/doc/gcc-@BV@-base/gccint.html + +Format: info +Index: /usr/share/info/gccint-@BV@.info.gz +Files: /usr/share/info/gccint-@BV@* --- gcc-4.8-4.8.5.orig/debian/gcc-BV-doc.doc-base.gomp +++ gcc-4.8-4.8.5/debian/gcc-BV-doc.doc-base.gomp @@ -0,0 +1,15 @@ +Document: gcc-@BV@-gomp +Title: The GNU OpenMP Implementation (for GCC @BV@) +Author: Various +Abstract: This manual documents the usage of libgomp, the GNU implementation + of the OpenMP Application Programming Interface (API) for multi-platform + shared-memory parallel programming in C/C++ and Fortran. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/libgomp.html +Files: /usr/share/doc/gcc-@BV@-base/libgomp.html + +Format: info +Index: /usr/share/info/libgomp-@BV@.info.gz +Files: /usr/share/info/libgomp-@BV@* --- gcc-4.8-4.8.5.orig/debian/gcc-BV-doc.doc-base.itm +++ gcc-4.8-4.8.5/debian/gcc-BV-doc.doc-base.itm @@ -0,0 +1,32 @@ +Document: gcc-@BV@-itm +Title: The GNU Transactional Memory Library (for GCC @BV@) +Author: Various +Abstract: This manual documents the usage and internals of libitm, + the GNU Transactional Memory Library. It provides transaction support + for accesses to a process' memory, enabling easy-to-use synchronization + of accesses to shared memory by several threads. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/libitm.html +Files: /usr/share/doc/gcc-@BV@-base/libitm.html + +Format: info +Index: /usr/share/info/libitm-@BV@.info.gz +Files: /usr/share/info/libitm-@BV@* +Document: gcc-@BV@-itm +Title: The GNU Transactional Memory Library (for GCC @BV@) +Author: Various +Abstract: This manual documents the usage and internals of libitm, + the GNU Transactional Memory Library. It provides transaction support + for accesses to a process' memory, enabling easy-to-use synchronization + of accesses to shared memory by several threads. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/libitm.html +Files: /usr/share/doc/gcc-@BV@-base/libitm.html + +Format: info +Index: /usr/share/info/libitm-@BV@.info.gz +Files: /usr/share/info/libitm-@BV@* --- gcc-4.8-4.8.5.orig/debian/gcc-BV-doc.doc-base.qmath +++ gcc-4.8-4.8.5/debian/gcc-BV-doc.doc-base.qmath @@ -0,0 +1,14 @@ +Document: gcc-@BV@-qmath +Title: The GCC Quad-Precision Math Library (for GCC @BV@) +Author: Various +Abstract: This manual documents the usage of libquadmath, the GCC + Quad-Precision Math Library Application Programming Interface (API). +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/libquadmath.html +Files: /usr/share/doc/gcc-@BV@-base/libquadmath.html + +Format: info +Index: /usr/share/info/libquadmath-@BV@.info.gz +Files: /usr/share/info/libquadmath-@BV@* --- gcc-4.8-4.8.5.orig/debian/gcc-BV-multilib.overrides +++ gcc-4.8-4.8.5/debian/gcc-BV-multilib.overrides @@ -0,0 +1 @@ +gcc-@BV@-multilib binary: binary-from-other-architecture --- gcc-4.8-4.8.5.orig/debian/gcc-BV-source.overrides +++ gcc-4.8-4.8.5/debian/gcc-BV-source.overrides @@ -0,0 +1,5 @@ +gcc-@BV@-source: changelog-file-not-compressed + +# these are patches taken over unmodified from 4.3 +gcc-@BV@-source: script-not-executable +gcc-@BV@-source: shell-script-fails-syntax-check --- gcc-4.8-4.8.5.orig/debian/gcc-XX-BV.1 +++ gcc-4.8-4.8.5/debian/gcc-XX-BV.1 @@ -0,0 +1,17 @@ +.TH GCC-@TOOL@-@BV@ 1 "May 8, 2012" gcc-@TOOL@-@BV@ "" +.SH NAME +gcc-@TOOL@ \- a wrapper around @TOOL@ adding the --plugin option + +.SH SYNOPSIS +gcc-@TOOL@ [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgcc-@TOOL@\fR is a wrapper around @TOOL@(1) adding the appropriate +\fB\-\-plugin\fR option for the GCC @BV@ compiler. + +.SH OPTIONS +See @TOOL@(1) for a list of options that @TOOL@ understands. + +.SH "SEE ALSO" +.BR @TOOL@(1) --- gcc-4.8-4.8.5.orig/debian/gcc-dummy.texi +++ gcc-4.8-4.8.5/debian/gcc-dummy.texi @@ -0,0 +1,41 @@ +\input texinfo @c -*-texinfo-*- +@c %**start of header + +@settitle The GNU Compiler Collection (GCC) + +@c Create a separate index for command line options. +@defcodeindex op +@c Merge the standard indexes into a single one. +@syncodeindex fn cp +@syncodeindex vr cp +@syncodeindex ky cp +@syncodeindex pg cp +@syncodeindex tp cp + +@paragraphindent 1 + +@c %**end of header + +@copying +The current documentation is licensed under the same terms as the Debian packaging. +@end copying +@ifnottex +@dircategory Programming +@direntry +* @name@: (@name@). The GNU Compiler Collection (@name@). +@end direntry +@sp 1 +@end ifnottex + +@summarycontents +@contents +@page + +@node Top +@top Introduction +@cindex introduction +The official GNU compilers' documentation is released under the terms +of the GNU Free Documentation License with cover texts. This has been +considered non free by the Debian Project. Thus you will find it in the +non-free section of the Debian archive. +@bye --- gcc-4.8-4.8.5.orig/debian/gcc-snapshot.overrides +++ gcc-4.8-4.8.5/debian/gcc-snapshot.overrides @@ -0,0 +1,4 @@ +gcc-snapshot binary: bad-permissions-for-ali-file + +# keep patched ltdl copy +gcc-snapshot binary: embedded-library --- gcc-4.8-4.8.5.orig/debian/gcc-snapshot.prerm +++ gcc-4.8-4.8.5/debian/gcc-snapshot.prerm @@ -0,0 +1,5 @@ +#! /bin/sh -e + +rm -f /usr/lib/gcc-snapshot/share/python/*.py[co] + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/gccgo-BV-doc.doc-base +++ gcc-4.8-4.8.5/debian/gccgo-BV-doc.doc-base @@ -0,0 +1,17 @@ +Document: gccgo-@BV@ +Title: The GNU Go compiler (version @BV@) +Author: Various +Abstract: This manual describes how to use gccgo, the GNU compiler for + the Go programming language. This manual is specifically about + gccgo. For more information about the Go programming + language in general, including language specifications and standard + package documentation, see http://golang.org/. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/gccgo.html +Files: /usr/share/doc/gcc-@BV@-base/gccgo.html + +Format: info +Index: /usr/share/info/gccgo-@BV@.info.gz +Files: /usr/share/info/gccgo-@BV@* --- gcc-4.8-4.8.5.orig/debian/gcj-BV-jdk.doc-base +++ gcc-4.8-4.8.5/debian/gcj-BV-jdk.doc-base @@ -0,0 +1,15 @@ +Document: gcj-@BV@ +Title: The GNU Ahead-of-time Compiler for the Java Language +Author: Various +Abstract: This manual describes how to use gcj, the GNU compiler for + the Java programming language. gcj can generate both .class files and + object files, and it can read both Java source code and .class files. +Section: Programming/Java + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/java/gcj.html +Files: /usr/share/doc/gcc-@BV@-base/java/gcj.html + +Format: info +Index: /usr/share/info/gcj-@BV@.info.gz +Files: /usr/share/info/gcj-@BV@* --- gcc-4.8-4.8.5.orig/debian/gcj-BV-jdk.overrides +++ gcc-4.8-4.8.5/debian/gcj-BV-jdk.overrides @@ -0,0 +1 @@ +gcj-@BV@-jdk binary: wrong-name-for-upstream-changelog --- gcc-4.8-4.8.5.orig/debian/gcj-BV-jdk.postinst +++ gcc-4.8-4.8.5/debian/gcj-BV-jdk.postinst @@ -0,0 +1,45 @@ +#! /bin/sh -e + +if [ -d /usr/share/doc/gcc-@BV@-base/java ] && [ ! -h /usr/share/doc/gcc-@BV@-base/java ]; then + rm -rf /usr/share/doc/gcc-@BV@-base/java + ln -s ../gcj-@BV@-base /usr/share/doc/gcc-@BV@-base/java +fi + +prio=@java_priority@ +update-alternatives --quiet \ + --install /usr/bin/javac javac /usr/bin/gcj-wrapper-@BV@ $prio \ + @GFDL@--slave /usr/share/man/man1/javac.1.gz javac.1.gz /usr/share/man/man1/gcj-wrapper-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/jar jar /usr/bin/gjar-@BV@ $prio \ + --slave /usr/share/man/man1/jar.1.gz jar.1.gz /usr/share/man/man1/gjar-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/jarsigner jarsigner /usr/bin/gjarsigner-@BV@ $prio \ + --slave /usr/share/man/man1/jarsigner.1.gz jarsigner.1.gz /usr/share/man/man1/gjarsigner-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/javah javah /usr/bin/gjavah-@BV@ $prio \ + --slave /usr/share/man/man1/javah.1.gz javah.1.gz /usr/share/man/man1/gjavah-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/javadoc javadoc /usr/bin/gjdoc-@BV@ $prio \ + --slave /usr/share/man/man1/javadoc.1.gz javadoc.1.gz /usr/share/man/man1/gjdoc-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/native2ascii native2ascii /usr/bin/gnative2ascii-@BV@ $prio \ + --slave /usr/share/man/man1/native2ascii.1.gz native2ascii.1.gz /usr/share/man/man1/gnative2ascii-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/rmic rmic /usr/bin/grmic-@BV@ $prio \ + @GFDL@--slave /usr/share/man/man1/rmic.1.gz rmic.1.gz /usr/share/man/man1/grmic-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/serialver serialver /usr/bin/gserialver-@BV@ $prio \ + --slave /usr/share/man/man1/serialver.1.gz serialver.1.gz /usr/share/man/man1/gserialver-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/tnameserv tnameserv /usr/bin/gtnameserv-@BV@ $prio \ + --slave /usr/share/man/man1/tnameserv.1.gz tnameserv.1.gz /usr/share/man/man1/gtnameserv-@BV@.1.gz + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/gcj-BV-jdk.prerm +++ gcc-4.8-4.8.5/debian/gcj-BV-jdk.prerm @@ -0,0 +1,15 @@ +#! /bin/sh -e + +if [ "$1" = "remove" ] || [ "$1" = "deconfigure" ]; then + update-alternatives --quiet --remove javac /usr/bin/gcj-wrapper-@BV@ + update-alternatives --quiet --remove jar /usr/bin/gjar-@BV@ + update-alternatives --quiet --remove jarsigner /usr/bin/gjarsigner-@BV@ + update-alternatives --quiet --remove javah /usr/bin/gjavah-@BV@ + update-alternatives --quiet --remove javadoc /usr/bin/gjdoc-@BV@ + update-alternatives --quiet --remove native2ascii /usr/bin/gnative2ascii-@BV@ + update-alternatives --quiet --remove rmic /usr/bin/grmic-@BV@ + update-alternatives --quiet --remove serialver /usr/bin/gserialver-@BV@ + update-alternatives --quiet --remove tnameserv /usr/bin/gtnameserv-@BV@ +fi + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/gcj-BV-jre-headless.overrides +++ gcc-4.8-4.8.5/debian/gcj-BV-jre-headless.overrides @@ -0,0 +1,5 @@ +# pick up the exact version, in case another gcj version is installed +gcj-@BV@-jre-headless binary: binary-or-shlib-defines-rpath + +# don't strip the binaries, keep the libgcj13-dbg package Multi-Arch: same +gcj-@BV@-jre-headless binary: unstripped-binary-or-object --- gcc-4.8-4.8.5.orig/debian/gcj-BV-jre-headless.postinst +++ gcc-4.8-4.8.5/debian/gcj-BV-jre-headless.postinst @@ -0,0 +1,48 @@ +#! /bin/sh -e + +prio=@java_priority@ + +update-alternatives --quiet \ + --install /usr/bin/java java /usr/bin/gij-@BV@ $prio \ + @GFDL@--slave /usr/share/man/man1/java.1.gz java.1.gz /usr/share/man/man1/gij-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/rmiregistry rmiregistry /usr/bin/grmiregistry-@BV@ $prio \ + --slave /usr/share/man/man1/rmiregistry.1.gz rmiregistry.1.gz /usr/share/man/man1/grmiregistry-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/keytool keytool /usr/bin/gkeytool-@BV@ $prio \ + --slave /usr/share/man/man1/keytool.1.gz keytool.1.gz /usr/share/man/man1/gkeytool-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/orbd orbd /usr/bin/gorbd-@BV@ $prio \ + --slave /usr/share/man/man1/orbd.1.gz orbd.1.gz /usr/share/man/man1/gorbd-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/rmid rmid /usr/bin/grmid-@BV@ $prio \ + --slave /usr/share/man/man1/rmid.1.gz rmid.1.gz /usr/share/man/man1/grmid-@BV@.1.gz + +case "$1" in +configure) + if [ ! -f /var/lib/gcj-@BV@/classmap.db ]; then + uname=$(uname -m) + mkdir -p /var/lib/gcj-@BV@ + if gcj-dbtool-@BV@ -n /var/lib/gcj-@BV@/classmap.db; then + case "$uname" in arm*|m68k|parisc*) + echo >&2 "gcj-dbtool succeeded unexpectedly" + esac + else + case "$uname" in + arm*|m68k|parisc*) + echo >&2 "ERROR: gcj-dbtool did fail; known problem on $uname";; + *) + exit 2 + esac + touch /var/lib/gcj-@BV@/classmap.db + fi + fi +esac + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/gcj-BV-jre-headless.postrm +++ gcc-4.8-4.8.5/debian/gcj-BV-jre-headless.postrm @@ -0,0 +1,10 @@ +#! /bin/sh -e + +case "$1" in + purge) + rm -f /var/lib/gcj-@BV@/classmap.db +esac + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/gcj-BV-jre-headless.prerm +++ gcc-4.8-4.8.5/debian/gcj-BV-jre-headless.prerm @@ -0,0 +1,13 @@ +#! /bin/sh -e + +if [ "$1" = "remove" ] || [ "$1" = "deconfigure" ]; then + update-alternatives --quiet --remove java /usr/bin/gij-@BV@ + update-alternatives --quiet --remove rmiregistry /usr/bin/grmiregistry-@BV@ + update-alternatives --quiet --remove keytool /usr/bin/gkeytool-@BV@ + update-alternatives --quiet --remove orbd /usr/bin/gorbd-@BV@ + update-alternatives --quiet --remove rmid /usr/bin/grmid-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/gcj-wrapper-BV +++ gcc-4.8-4.8.5/debian/gcj-wrapper-BV @@ -0,0 +1,91 @@ +#!/usr/bin/perl -w +# +# Starts the GNU Java compiler. +# +# Command-line arguments should be in the style of Sun's Java compiler; +# these will be converted to gcj arguments before being passed to the +# gcj itself. +# +# Copyright (C) 2002-2003 by Ben Burton +# Based on the original gcj-wrapper-3.2 shell script. + +use strict; + +# The real Java compiler: +my $javaCompiler = '/usr/bin/gcj-@BV@'; + +# The command-line arguments to pass to the real Java compiler: +my @commandLine; + +# The warning flags to pass to the GNU Java compiler: +my $warnings = '-Wall'; + +# Build the command-line from the arguments given. +my $parsingOptions = 1; +my $copyNextArg = 0; +my $ignoreNextArg = 0; +my $appendNextArg = ''; +foreach my $arg (@ARGV) { + # See if we already know what to do with this argument. + if ($ignoreNextArg) { + # Throw it away. + $ignoreNextArg = 0; + next; + } elsif ($copyNextArg or not $parsingOptions) { + # Copy it directly. + push @commandLine, $arg; + $copyNextArg = 0; + next; + } elsif ($appendNextArg) { + # Append it to $appendNextArg and then copy directly. + push @commandLine, ($appendNextArg . $arg); + $appendNextArg = ''; + next; + } + + # Try to interpret Sun-style options. + if ($arg eq '-version') { + push @commandLine, '--version'; + } elsif ($arg eq '-h' or $arg eq '-help') { + push @commandLine, '--help'; + } elsif ($arg eq '-classpath' or $arg eq '--classpath' or $arg eq '--cp') { + $appendNextArg = '--classpath='; + } elsif ($arg eq '-encoding' or $arg eq '-bootclasspath' or + $arg eq '-extdirs') { + $appendNextArg = '-' . $arg . '='; + } elsif ($arg eq '-d') { + push @commandLine, '-d'; + $copyNextArg = 1; + } elsif ($arg eq '-nowarn') { + $warnings = ''; + } elsif ($arg =~ /^-g/) { + # Some kind of debugging option - just switch debugging on. + push @commandLine, '-g' if ($arg ne '-g:none'); + } elsif ($arg eq '-O') { + push @commandLine, '-O2'; + } elsif ($arg eq '-Xss') { + push @commandLine, $arg; + } elsif ($arg =~ /^-X/) { + # An extended Sun option (which we don't support). + push @commandLine, '--help' if ($arg eq '-X'); + } elsif ($arg eq '-source' or $arg eq '-sourcepath' or $arg eq '-target') { + # An unsupported option with a following argument. + $ignoreNextArg = 1; + } elsif ($arg =~ /^-/) { + # An unsupported standalone option. + } else { + # Some non-option argument has been given. + # Stop parsing options at this point. + push @commandLine, $arg; + $parsingOptions = 0; + } +} + +# Was there a partial argument that was never completed? +push @commandLine, $appendNextArg if ($appendNextArg); + +# Call the real Java compiler. +my @fullCommandLine = ( $javaCompiler, '-C' ); +push @fullCommandLine, $warnings if ($warnings); +push @fullCommandLine, @commandLine; +exec @fullCommandLine or exit(1); --- gcc-4.8-4.8.5.orig/debian/gcj-wrapper-BV.1 +++ gcc-4.8-4.8.5/debian/gcj-wrapper-BV.1 @@ -0,0 +1,20 @@ +.TH GCJ-WRAPPER 1 "June 6, 2002" gcj-wrapper "Java User's Manual" +.SH NAME +gcj-wrapper \- a wrapper around gcj + +.SH SYNOPSIS +gcj-wrapper [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgcj-wrapper\fR is a wrapper around gcj(1) to be called as the java +compiler. Options different for javac(1) and gcj(1) are translated, +options unknown to gcj(1) are silently ignored. + +.SH OPTIONS +See gcj-@BV@(1) for a list of options that gcj understands. + +.SH "SEE ALSO" +.BR gcj-@BV@(1) +, +.BR javac(1) --- gcc-4.8-4.8.5.orig/debian/gcjh-wrapper-BV +++ gcc-4.8-4.8.5/debian/gcjh-wrapper-BV @@ -0,0 +1,86 @@ +#!/usr/bin/perl -w +# +# Starts the GNU Java header generator. +# +# Command-line arguments should be in the style of Sun's javah command; +# these will be converted to gcjh arguments before being passed to the +# gcjh itself. +# +# Copyright (C) 2003 by Peter Hawkins +# Haphazardly hacked up based on the gcj-wrapper perl script. +# Copyright (C) 2002-2003 by Ben Burton +# Based on the original gcj-wrapper-3.2 shell script. + +use strict; + +# The real Java header generator: +my $javaHeaderGen = '/usr/bin/gcjh-@BV@'; + +# The command-line arguments to pass to the real Java compiler: +my @commandLine; + +# Build the command-line from the arguments given. +my $parsingOptions = 1; +my $copyNextArg = 0; +my $ignoreNextArg = 0; +my $appendNextArg = ''; +foreach my $arg (@ARGV) { + # See if we already know what to do with this argument. + if ($ignoreNextArg) { + # Throw it away. + $ignoreNextArg = 0; + next; + } elsif ($copyNextArg or not $parsingOptions) { + # Copy it directly. + push @commandLine, $arg; + $copyNextArg = 0; + next; + } elsif ($appendNextArg) { + # Append it to $appendNextArg and then copy directly. + push @commandLine, ($appendNextArg . $arg); + $appendNextArg = ''; + next; + } + + # Try to interpret Sun-style options. + if ($arg eq '-version') { + push @commandLine, '--version'; + } elsif ($arg eq '-h' or $arg eq '-help') { + push @commandLine, '--help'; + } elsif ($arg eq '-verbose') { + push @commandLine, '--verbose'; + } elsif ($arg eq '-classpath' or $arg eq '--classpath' or $arg eq '--cp') { + $appendNextArg = '--classpath='; + } elsif ($arg eq '-encoding' or $arg eq '-bootclasspath' or + $arg eq '-extdirs') { + $appendNextArg = "-".$arg . '='; + } elsif ($arg eq '-d') { + push @commandLine, '-d'; + $copyNextArg = 1; + } elsif ($arg eq '-o') { + push @commandLine, '-o'; + $copyNextArg = 1; + } elsif ($arg eq '-stubs') { + push @commandLine, '-stubs'; + } elsif ($arg eq '-jni') { + push @commandLine, '-jni'; + } elsif ($arg =~ /^-old/) { + # An extended Sun option (which we don't support). + push @commandLine, '--help' if ($arg eq '-old'); + } elsif ($arg =~ /^-/) { + # An unsupported standalone option. + } else { + # Some non-option argument has been given. + # Stop parsing options at this point. + push @commandLine, $arg; + $parsingOptions = 0; + } +} + +# Was there a partial argument that was never completed? +push @commandLine, $appendNextArg if ($appendNextArg); + +# Call the real Java header generator. +my @fullCommandLine = ( $javaHeaderGen ); +push @fullCommandLine, @commandLine; +exec @fullCommandLine or exit(1); --- gcc-4.8-4.8.5.orig/debian/gcjh-wrapper-BV.1 +++ gcc-4.8-4.8.5/debian/gcjh-wrapper-BV.1 @@ -0,0 +1,20 @@ +.TH GCJH-WRAPPER 1 "June 6, 2002" gcjh-wrapper "Java User's Manual" +.SH NAME +gcjh-wrapper \- a wrapper around gcjh + +.SH SYNOPSIS +gcjh-wrapper [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgcjh-wrapper\fR is a wrapper around gcjh(1) to be called as the java header +compiler. Options different for javah(1) and gcjh(1) are translated, +options unknown to gcjh(1) are silently ignored. + +.SH OPTIONS +See gcjh-@BV@(1) for a list of options that gcj understands. + +.SH "SEE ALSO" +.BR gcjh-@BV@(1) +, +.BR javah(1) --- gcc-4.8-4.8.5.orig/debian/gfortran-4.8-powerpc64le-linux-gnu.preinst +++ gcc-4.8-4.8.5/debian/gfortran-4.8-powerpc64le-linux-gnu.preinst @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove powerpc64le-linux-gnu-gfortran /usr/bin/powerpc64le-linux-gnu-gfortran-4.8 +fi + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/gfortran-BV-CRB.preinst.in +++ gcc-4.8-4.8.5/debian/gfortran-BV-CRB.preinst.in @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-gfortran /usr/bin/@TARGET@-gfortran-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.8-4.8.5.orig/debian/gfortran-BV-doc.doc-base +++ gcc-4.8-4.8.5/debian/gfortran-BV-doc.doc-base @@ -0,0 +1,14 @@ +Document: gfortran-@BV@ +Title: The GNU Fortran Compiler +Author: Various +Abstract: This manual documents how to run, install and port `gfortran', + as well as its new features and incompatibilities, and how to report bugs. +Section: Programming/Fortran + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/fortran/gfortran.html +Files: /usr/share/doc/gcc-@BV@-base/fortran/gfortran.html + +Format: info +Index: /usr/share/info/gfortran-@BV@.info.gz +Files: /usr/share/info/gfortran-@BV@* --- gcc-4.8-4.8.5.orig/debian/gij-hppa +++ gcc-4.8-4.8.5/debian/gij-hppa @@ -0,0 +1,10 @@ +#! /bin/sh + +prctl= + +case "$(prctl --unaligned=)" in *signal) + echo >&2 "$(basename $0): ignore unaligned memory accesses" + prctl="prctl --unaligned=default" +esac + +exec $prctl /usr/bin/gij-4.8.bin "$@" --- gcc-4.8-4.8.5.orig/debian/gij-wrapper-BV +++ gcc-4.8-4.8.5/debian/gij-wrapper-BV @@ -0,0 +1,98 @@ +#!/usr/bin/perl -w +# +# Starts the GNU Java interpreter. +# +# Command-line arguments should be in the style of Sun's Java runtime; +# these will be converted to gij arguments before being passed to the +# gij itself. +# +# The Debian JNI module directory and any other specified JNI +# directories will be included on the JNI search path. +# +# Copyright (C) 2002-2003 by Ben Burton +# Based on the original gij-wrapper-3.2 shell script. + +use strict; + +# The real Java runtime: +my $javaRuntime = '/usr/bin/gij-@BV@'; + +# The debian JNI module directory: +my $debianJNIDir = '/usr/lib/jni'; + +# The command-line arguments to pass to the real Java runtime: +my @commandLine; + +# The full JNI search path to use: +my $JNIPath = ''; + +# Build the command-line from the arguments given. +my $parsingOptions = 1; + +# Flag used to copy argument to -classpath or -cp. +my $copyNext = 0; +foreach my $arg (@ARGV) { + if (not $parsingOptions) { + # We're done parsing options; just copy all remaining arguments directly. + push @commandLine, $arg; + next; + } + if ($copyNext) { + push @commandLine, $arg; + $copyNext = 0; + next; + } + + # Try to interpret Sun-style options. + if ($arg eq '-version') { + push @commandLine, '--version'; + } elsif ($arg eq '-h' or $arg eq '-help') { + push @commandLine, '--help'; + } elsif ($arg eq '-cp' or $arg eq '--cp') { + push @commandLine, '-cp'; + $copyNext = 1; + } elsif ($arg eq '-classpath' or $arg eq '--classpath') { + push @commandLine, '-classpath'; + $copyNext = 1; + } elsif ($arg =~ /^-Djava.library.path=(.+)$/) { + # A component of the JNI search path has been given. + if ($JNIPath) { + $JNIPath = $JNIPath . ':' . $1; + } else { + $JNIPath = $1; + } + } elsif ($arg eq '-jar' or $arg =~ /^-D/) { + # Copy the argument directly. + push @commandLine, $arg; + } elsif ($arg =~ /^-/) { + # An unrecognised option has been passed - just drop it. + } else { + # Some non-option argument has been given. + # Stop parsing options at this point. + push @commandLine, $arg; + $parsingOptions = 0; + } +} + +# Add the debian JNI module directory to the JNI search path if it's not +# already there. +if ($JNIPath !~ /(^|:)$debianJNIDir($|:)/) { + if ($JNIPath) { + $JNIPath = $JNIPath . ':' . $debianJNIDir; + } else { + $JNIPath = $debianJNIDir; + } +} + +# Use environment variable $LTDL_LIBRARY_PATH to store the JNI path, +# since gij uses libltdl to dlopen JNI modules. +if ($ENV{LTDL_LIBRARY_PATH}) { + $ENV{LTDL_LIBRARY_PATH} = $ENV{LTDL_LIBRARY_PATH} . ':' . $JNIPath; +} else { + $ENV{LTDL_LIBRARY_PATH} = $JNIPath; +} + +# Call the real Java runtime. +my @fullCommandLine = ( $javaRuntime ); +push @fullCommandLine, @commandLine; +exec @fullCommandLine or exit(1); --- gcc-4.8-4.8.5.orig/debian/gij-wrapper-BV.1 +++ gcc-4.8-4.8.5/debian/gij-wrapper-BV.1 @@ -0,0 +1,22 @@ +.TH GIJ-WRAPPER 1 "August 11, 2001" gij-wrapper "Java User's Manual" +.SH NAME +gij-wrapper \- a wrapper around gij + +.SH SYNOPSIS +gij-wrapper [\fB\s-1OPTION\s0\fR] ... \fI\s-1JARFILE\s0\fR [\fI\s-1ARGS\s0\fR...] +.PP +gij-wrapper [\fB\-jar\fR] [\fB\s-1OPTION\s0\fR] ... \fI\s-1CLASS\s0\fR [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgij-wrapper\fR is a wrapper around gij(1) to be called as the java +interpreter. Options different for java(1) and gij(1) are translated, +options unknown to gij(1) are silently ignored. + +.SH OPTIONS +See gij-@BV@(1) for a list of options that gij understands. + +.SH "SEE ALSO" +.BR gij-@BV@(1) +, +.BR java(1) --- gcc-4.8-4.8.5.orig/debian/gnat-BV-doc.doc-base.rm +++ gcc-4.8-4.8.5/debian/gnat-BV-doc.doc-base.rm @@ -0,0 +1,16 @@ +Document: gnat-rm-@BV@ +Title: GNAT (GNU Ada) Reference Manual +Author: Various +Abstract: This manual contains useful information in writing programs + using the GNAT compiler. It includes information on implementation + dependent characteristics of GNAT, including all the information + required by Annex M of the standard. +Section: Programming/Ada + +Format: html +Index: /usr/share/doc/gnat-@BV@-doc/gnat_rm.html +Files: /usr/share/doc/gnat-@BV@-doc/gnat_rm.html + +Format: info +Index: /usr/share/info/gnat_rm-@BV@.info.gz +Files: /usr/share/info/gnat_rm-@BV@* --- gcc-4.8-4.8.5.orig/debian/gnat-BV-doc.doc-base.style +++ gcc-4.8-4.8.5/debian/gnat-BV-doc.doc-base.style @@ -0,0 +1,16 @@ +Document: gnat-style-@BV@ +Title: GNAT Coding Style +Author: Various +Abstract: Most of GNAT is written in Ada using a consistent style to + ensure readability of the code. This document has been written to + help maintain this consistent style, while having a large group of + developers work on the compiler. +Section: Programming/Ada + +Format: html +Index: /usr/share/doc/gnat-@BV@-doc/gnat-style.html +Files: /usr/share/doc/gnat-@BV@-doc/gnat-style.html + +Format: info +Index: /usr/share/info/gnat-style-@BV@.info.gz +Files: /usr/share/info/gnat-style-@BV@* --- gcc-4.8-4.8.5.orig/debian/gnat-BV-doc.doc-base.ug +++ gcc-4.8-4.8.5/debian/gnat-BV-doc.doc-base.ug @@ -0,0 +1,16 @@ +Document: gnat-ugn-@BV@ +Title: GNAT User's Guide for Unix Platforms +Author: Various +Abstract: This guide describes the use of GNAT, a compiler and + software development toolset for the full Ada 95 programming language. + It describes the features of the compiler and tools, and details how + to use them to build Ada 95 applications. +Section: Programming/Ada + +Format: html +Index: /usr/share/doc/gnat-@BV@-doc/gnat_ugn.html +Files: /usr/share/doc/gnat-@BV@-doc/gnat_ugn.html + +Format: info +Index: /usr/share/info/gnat_ugn-@BV@.info.gz +Files: /usr/share/info/gnat_ugn-@BV@* --- gcc-4.8-4.8.5.orig/debian/gnat-BV.overrides +++ gcc-4.8-4.8.5/debian/gnat-BV.overrides @@ -0,0 +1 @@ +gnat-@BV@ binary: quilt-build-dep-but-no-series-file --- gcc-4.8-4.8.5.orig/debian/gnat.1 +++ gcc-4.8-4.8.5/debian/gnat.1 @@ -0,0 +1,43 @@ +.\" Hey, Emacs! This is an -*- nroff -*- source file. +.\" +.\" Copyright (C) 1996 Erick Branderhorst +.\" Copyright (C) 2011 Nicolas Boulenguez +.\" +.\" This is free software; you can redistribute it and/or modify it under +.\" the terms of the GNU General Public License as published by the Free +.\" Software Foundation; either version 2, or (at your option) any later +.\" version. +.\" +.\" This is distributed in the hope that it will be useful, but WITHOUT +.\" ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +.\" FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +.\" for more details. +.\" +.\" You should have received a copy of the GNU General Public License with +.\" your Debian GNU/Linux system, in /usr/doc/copyright/GPL, or with the +.\" dpkg source package as the file COPYING. If not, write to the Free +.\" Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +.\" +.\" +.TH "GNAT TOOLBOX" 1 "Jun 2002" "Debian Project" "Debian Linux" +.SH NAME +gnat, gnatbind, gnatbl, gnatchop, gnatfind, gnathtml, gnatkr, gnatlink, +gnatls, gnatmake, gnatprep, gnatpsta, gnatpsys, gnatxref \- +GNAT toolbox +.SH DESCRIPTION +Those programs are part of GNU GNAT, a freely available Ada 95 compiler. +.PP +For accessing the full GNAT manuals, use +.B info gnat-ug-4.8 +and +.B info gnat-rm-4.8 +for the sections related to the reference manual. +If those sections cannot be found, you will have to install the +gnat-4.4-doc package as well (since these manuals contain invariant parts, +the package is located in the non-free part of the Debian archive). +You may also browse +.B http://gcc.gnu.org/onlinedocs +which provides the GCC online documentation. +.SH AUTHOR +This manpage has been written by Samuel Tardieu , for the +Debian GNU/Linux project. --- gcc-4.8-4.8.5.orig/debian/gnatprj.gpr +++ gcc-4.8-4.8.5/debian/gnatprj.gpr @@ -0,0 +1,32 @@ +-- Project file for use with GNAT +-- Copyright (c) 2005, 2008 Ludovic Brenta +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- This project file is designed to help build applications that use +-- GNAT project files. Here is an example of how to use this project file: +-- +-- with "gnatprj"; +-- project Example is +-- for Object_Dir use "obj"; +-- for Exec_Dir use "."; +-- for Main use ("example"); +-- end Example; + +with "gnatvsn.gpr"; +project Gnatprj is + for Library_Name use "gnatprj"; + for Library_Dir use "/usr/lib"; + for Library_Kind use "dynamic"; + for Source_Dirs use ("/usr/share/ada/adainclude/gnatprj"); + for Library_ALI_Dir use "/usr/lib/ada/adalib/gnatprj"; + for Externally_Built use "true"; +end Gnatprj; --- gcc-4.8-4.8.5.orig/debian/gnatvsn.gpr +++ gcc-4.8-4.8.5/debian/gnatvsn.gpr @@ -0,0 +1,31 @@ +-- Project file for use with GNAT +-- Copyright (c) 2005, 2008 Ludovic Brenta +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- This project file is designed to help build applications that use +-- GNAT project files. Here is an example of how to use this project file: +-- +-- with "gnatvsn"; +-- project Example is +-- for Object_Dir use "obj"; +-- for Exec_Dir use "."; +-- for Main use ("example"); +-- end Example; + +project Gnatvsn is + for Library_Name use "gnatvsn"; + for Library_Dir use "/usr/lib"; + for Library_Kind use "dynamic"; + for Source_Dirs use ("/usr/share/ada/adainclude/gnatvsn"); + for Library_ALI_Dir use "/usr/lib/ada/adalib/gnatvsn"; + for Externally_Built use "true"; +end Gnatvsn; --- gcc-4.8-4.8.5.orig/debian/jdb.sh +++ gcc-4.8-4.8.5/debian/jdb.sh @@ -0,0 +1,9 @@ +#!/bin/sh + +# Placeholder script to fake a +# JDK compatible JAVA_HOME directory. + +echo >&2 "This script is only a placeholder." +echo >&2 "Some programs need a JDK rather than only a JRE to work." +echo >&2 "They test for this tool to detect a JDK installation, but" +echo >&2 "don't really need its functionality to work correctly." --- gcc-4.8-4.8.5.orig/debian/lib32asan0.overrides +++ gcc-4.8-4.8.5/debian/lib32asan0.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +lib32asan0 binary: binary-or-shlib-defines-rpath --- gcc-4.8-4.8.5.orig/debian/lib32asan0.symbols +++ gcc-4.8-4.8.5/debian/lib32asan0.symbols @@ -0,0 +1,3 @@ +libasan.so.0 lib32asan0 #MINVER# +#include "libasan0.symbols.common" +#include "libasan0.symbols.32" --- gcc-4.8-4.8.5.orig/debian/lib32atomic1.symbols +++ gcc-4.8-4.8.5/debian/lib32atomic1.symbols @@ -0,0 +1,2 @@ +libatomic.so.1 lib32atomic1 #MINVER# +#include "libatomic1.symbols.common" --- gcc-4.8-4.8.5.orig/debian/lib32gcc1.symbols.amd64 +++ gcc-4.8-4.8.5/debian/lib32gcc1.symbols.amd64 @@ -0,0 +1,140 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_4.8.0@GCC_4.8.0 1:4.8 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __cpu_indicator_init@GCC_4.8.0 1:4.8 + __cpu_model@GCC_4.8.0 1:4.8 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.8-4.8.5.orig/debian/lib32gcc1.symbols.kfreebsd-amd64 +++ gcc-4.8-4.8.5/debian/lib32gcc1.symbols.kfreebsd-amd64 @@ -0,0 +1,140 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_4.8.0@GCC_4.8.0 1:4.8 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __cpu_indicator_init@GCC_4.8.0 1:4.8 + __cpu_model@GCC_4.8.0 1:4.8 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.8-4.8.5.orig/debian/lib32gcc1.symbols.ppc64 +++ gcc-4.8-4.8.5/debian/lib32gcc1.symbols.ppc64 @@ -0,0 +1,142 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_4.1.0 1:4.1.1 + __gcc_qdiv@GCC_4.1.0 1:4.1.1 + __gcc_qmul@GCC_4.1.0 1:4.1.1 + __gcc_qsub@GCC_4.1.0 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trampoline_setup@GCC_3.4.2 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/lib32gcc1.symbols.s390x +++ gcc-4.8-4.8.5/debian/lib32gcc1.symbols.s390x @@ -0,0 +1,104 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/lib32gcc1.symbols.sparc64 +++ gcc-4.8-4.8.5/debian/lib32gcc1.symbols.sparc64 @@ -0,0 +1,96 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/lib32gccLC.postinst +++ gcc-4.8-4.8.5/debian/lib32gccLC.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib32gcc@LC@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.overrides +++ gcc-4.8-4.8.5/debian/lib32gfortran3.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +lib32gfortran3 binary: binary-or-shlib-defines-rpath --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.symbols +++ gcc-4.8-4.8.5/debian/lib32gfortran3.symbols @@ -0,0 +1,3 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.symbols.amd64 +++ gcc-4.8-4.8.5/debian/lib32gfortran3.symbols.amd64 @@ -0,0 +1,9 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16.powerpc" + _gfortran_norm2_r10@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128_write@GFORTRAN_1.4 4.6 --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.symbols.mips64 +++ gcc-4.8-4.8.5/debian/lib32gfortran3.symbols.mips64 @@ -0,0 +1,2 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.symbols.mips64el +++ gcc-4.8-4.8.5/debian/lib32gfortran3.symbols.mips64el @@ -0,0 +1,2 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.symbols.mipsn32 +++ gcc-4.8-4.8.5/debian/lib32gfortran3.symbols.mipsn32 @@ -0,0 +1,2 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.symbols.mipsn32el +++ gcc-4.8-4.8.5/debian/lib32gfortran3.symbols.mipsn32el @@ -0,0 +1,2 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.symbols.ppc64 +++ gcc-4.8-4.8.5/debian/lib32gfortran3.symbols.ppc64 @@ -0,0 +1,3 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.symbols.s390x +++ gcc-4.8-4.8.5/debian/lib32gfortran3.symbols.s390x @@ -0,0 +1,3 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.symbols.sparc64 +++ gcc-4.8-4.8.5/debian/lib32gfortran3.symbols.sparc64 @@ -0,0 +1,2 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/lib32gfortran3.symbols.x32 +++ gcc-4.8-4.8.5/debian/lib32gfortran3.symbols.x32 @@ -0,0 +1,4 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.8-4.8.5.orig/debian/lib32gomp1.symbols +++ gcc-4.8-4.8.5/debian/lib32gomp1.symbols @@ -0,0 +1,4 @@ +libgomp.so.1 lib32gomp1 #MINVER# +#include "libgomp1.symbols.common" + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 --- gcc-4.8-4.8.5.orig/debian/lib32itm1.symbols +++ gcc-4.8-4.8.5/debian/lib32itm1.symbols @@ -0,0 +1,4 @@ +libitm.so.1 lib32itm1 #MINVER# +#include "libitm1.symbols.common" +#include "libitm1.symbols.32bit" +(arch=amd64 i386 x32)#include "libitm1.symbols.x86" --- gcc-4.8-4.8.5.orig/debian/lib32objc4.symbols +++ gcc-4.8-4.8.5/debian/lib32objc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 lib32objc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 --- gcc-4.8-4.8.5.orig/debian/lib32quadmath0.symbols +++ gcc-4.8-4.8.5/debian/lib32quadmath0.symbols @@ -0,0 +1,2 @@ +libquadmath.so.0 lib32quadmath0 #MINVER# +#include "libquadmath0.symbols.common" --- gcc-4.8-4.8.5.orig/debian/lib32stdc++6.symbols.amd64 +++ gcc-4.8-4.8.5/debian/lib32stdc++6.symbols.amd64 @@ -0,0 +1,6 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/lib32stdc++6.symbols.kfreebsd-amd64 +++ gcc-4.8-4.8.5/debian/lib32stdc++6.symbols.kfreebsd-amd64 @@ -0,0 +1,6 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/lib32stdc++6.symbols.ppc64 +++ gcc-4.8-4.8.5/debian/lib32stdc++6.symbols.ppc64 @@ -0,0 +1,8 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.8-4.8.5.orig/debian/lib32stdc++6.symbols.s390x +++ gcc-4.8-4.8.5/debian/lib32stdc++6.symbols.s390x @@ -0,0 +1,557 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.common" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + 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_ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _Znam@GLIBCXX_3.4 4.1.1 + _ZnamRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _Znwm@GLIBCXX_3.4 4.1.1 + _ZnwmRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit.s390" + _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 --- gcc-4.8-4.8.5.orig/debian/lib32stdc++6.symbols.sparc64 +++ gcc-4.8-4.8.5/debian/lib32stdc++6.symbols.sparc64 @@ -0,0 +1,8 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.8-4.8.5.orig/debian/lib32stdc++CXX.postinst +++ gcc-4.8-4.8.5/debian/lib32stdc++CXX.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib32stdc++@CXX@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/lib64asan0.overrides +++ gcc-4.8-4.8.5/debian/lib64asan0.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +lib64asan0 binary: binary-or-shlib-defines-rpath --- gcc-4.8-4.8.5.orig/debian/lib64asan0.symbols +++ gcc-4.8-4.8.5/debian/lib64asan0.symbols @@ -0,0 +1,3 @@ +libasan.so.0 lib64asan0 #MINVER# +#include "libasan0.symbols.common" +#include "libasan0.symbols.64" --- gcc-4.8-4.8.5.orig/debian/lib64atomic1.symbols +++ gcc-4.8-4.8.5/debian/lib64atomic1.symbols @@ -0,0 +1,3 @@ +libatomic.so.1 lib64atomic1 #MINVER# +#include "libatomic1.symbols.common" +#include "libatomic1.symbols.64" --- gcc-4.8-4.8.5.orig/debian/lib64gcc1.symbols.i386 +++ gcc-4.8-4.8.5/debian/lib64gcc1.symbols.i386 @@ -0,0 +1,150 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_4.8.0@GCC_4.8.0 1:4.8 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __cpu_indicator_init@GCC_4.8.0 1:4.8 + __cpu_model@GCC_4.8.0 1:4.8 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GCC_3.0 1:4.1.1 + __deregister_frame_info@GCC_3.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.3 + __divtc3@GCC_4.3.0 1:4.4.0 + __divtf3@GCC_4.3.0 1:4.3 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.3.0 1:4.3 + __extenddftf2@GCC_4.3.0 1:4.3 + __extendsftf2@GCC_4.3.0 1:4.3 + __extendxftf2@GCC_4.3.0 1:4.3 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.3.0 1:4.3 + __fixtfsi@GCC_4.3.0 1:4.3 + __fixtfti@GCC_4.3.0 1:4.3 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.3.0 1:4.3 + __fixunstfsi@GCC_4.3.0 1:4.3 + __fixunstfti@GCC_4.3.0 1:4.3 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.3.0 1:4.3 + __floatsitf@GCC_4.3.0 1:4.3 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.3.0 1:4.3 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.3.0 1:4.3 + __floatunsitf@GCC_4.3.0 1:4.3 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.3.0 1:4.3 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.3.0 1:4.3 + __gttf2@GCC_3.0 1:4.3 + __gttf2@GCC_4.3.0 1:4.4.0 + __letf2@GCC_4.3.0 1:4.3 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_3.0 1:4.3 + __lttf2@GCC_4.3.0 1:4.4.0 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.3 + __multc3@GCC_4.3.0 1:4.4.0 + __multf3@GCC_4.3.0 1:4.3 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.3.0 1:4.3 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_3.0 1:4.3 + __netf2@GCC_4.3.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.3 + __powitf2@GCC_4.3.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GCC_3.0 1:4.1.1 + __register_frame_info@GCC_3.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GCC_3.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GCC_3.0 1:4.1.1 + __subtf3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.3.0 1:4.3 + __trunctfsf2@GCC_4.3.0 1:4.3 + __trunctfxf2@GCC_4.3.0 1:4.3 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.3.0 1:4.3 --- gcc-4.8-4.8.5.orig/debian/lib64gcc1.symbols.mips +++ gcc-4.8-4.8.5/debian/lib64gcc1.symbols.mips @@ -0,0 +1,1749 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.2.0 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4 + GCC_4.5.0@GCC_4.5.0 1:4.5 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addda3@GCC_4.3.0 1:4.3 + __adddf3@GCC_3.0 1:4.1.1 + __adddq3@GCC_4.3.0 1:4.3 + __addha3@GCC_4.3.0 1:4.3 + __addhq3@GCC_4.3.0 1:4.3 + __addqq3@GCC_4.3.0 1:4.3 + __addsa3@GCC_4.3.0 1:4.3 + __addsf3@GCC_3.0 1:4.1.1 + __addsq3@GCC_4.3.0 1:4.3 + __addta3@GCC_4.3.0 1:4.3 + __addtf3@GCC_3.0 1:4.1.1 + __addtq3@GCC_4.3.0 1:4.3 + __adduda3@GCC_4.3.0 1:4.3 + __addudq3@GCC_4.3.0 1:4.3 + __adduha3@GCC_4.3.0 1:4.3 + __adduhq3@GCC_4.3.0 1:4.3 + __adduqq3@GCC_4.3.0 1:4.3 + __addusa3@GCC_4.3.0 1:4.3 + __addusq3@GCC_4.3.0 1:4.3 + __adduta3@GCC_4.3.0 1:4.3 + __addutq3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlda3@GCC_4.3.0 1:4.3 + __ashldq3@GCC_4.3.0 1:4.3 + __ashlha3@GCC_4.3.0 1:4.3 + __ashlhq3@GCC_4.3.0 1:4.3 + __ashlqq3@GCC_4.3.0 1:4.3 + __ashlsa3@GCC_4.3.0 1:4.3 + __ashlsq3@GCC_4.3.0 1:4.3 + __ashlta3@GCC_4.3.0 1:4.3 + __ashlti3@GCC_3.0 1:4.1.1 + __ashltq3@GCC_4.3.0 1:4.3 + __ashluda3@GCC_4.3.0 1:4.3 + __ashludq3@GCC_4.3.0 1:4.3 + __ashluha3@GCC_4.3.0 1:4.3 + __ashluhq3@GCC_4.3.0 1:4.3 + __ashluqq3@GCC_4.3.0 1:4.3 + __ashlusa3@GCC_4.3.0 1:4.3 + __ashlusq3@GCC_4.3.0 1:4.3 + __ashluta3@GCC_4.3.0 1:4.3 + __ashlutq3@GCC_4.3.0 1:4.3 + __ashrda3@GCC_4.3.0 1:4.3 + __ashrdq3@GCC_4.3.0 1:4.3 + __ashrha3@GCC_4.3.0 1:4.3 + __ashrhq3@GCC_4.3.0 1:4.3 + __ashrqq3@GCC_4.3.0 1:4.3 + __ashrsa3@GCC_4.3.0 1:4.3 + __ashrsq3@GCC_4.3.0 1:4.3 + __ashrta3@GCC_4.3.0 1:4.3 + __ashrti3@GCC_3.0 1:4.1.1 + __ashrtq3@GCC_4.3.0 1:4.3 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpda2@GCC_4.3.0 1:4.3 + __cmpdq2@GCC_4.3.0 1:4.3 + __cmpha2@GCC_4.3.0 1:4.3 + __cmphq2@GCC_4.3.0 1:4.3 + __cmpqq2@GCC_4.3.0 1:4.3 + __cmpsa2@GCC_4.3.0 1:4.3 + __cmpsq2@GCC_4.3.0 1:4.3 + __cmpta2@GCC_4.3.0 1:4.3 + __cmpti2@GCC_3.0 1:4.1.1 + __cmptq2@GCC_4.3.0 1:4.3 + __cmpuda2@GCC_4.3.0 1:4.3 + __cmpudq2@GCC_4.3.0 1:4.3 + __cmpuha2@GCC_4.3.0 1:4.3 + __cmpuhq2@GCC_4.3.0 1:4.3 + __cmpuqq2@GCC_4.3.0 1:4.3 + __cmpusa2@GCC_4.3.0 1:4.3 + __cmpusq2@GCC_4.3.0 1:4.3 + __cmputa2@GCC_4.3.0 1:4.3 + __cmputq2@GCC_4.3.0 1:4.3 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divda3@GCC_4.3.0 1:4.3 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdq3@GCC_4.3.0 1:4.3 + __divha3@GCC_4.3.0 1:4.3 + __divhq3@GCC_4.3.0 1:4.3 + __divqq3@GCC_4.3.0 1:4.3 + __divsa3@GCC_4.3.0 1:4.3 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divsq3@GCC_4.3.0 1:4.3 + __divta3@GCC_4.3.0 1:4.3 + __divtc3@GCC_4.0.0 1:4.1.1 + __divtf3@GCC_3.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __divtq3@GCC_4.3.0 1:4.3 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __eqtf2@GCC_3.0 1:4.1.1 + __extenddftf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __extendsftf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 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+ __satfractsiuda@GCC_4.3.0 1:4.3 + __satfractsiudq@GCC_4.3.0 1:4.3 + __satfractsiuha@GCC_4.3.0 1:4.3 + __satfractsiuhq@GCC_4.3.0 1:4.3 + __satfractsiuqq@GCC_4.3.0 1:4.3 + __satfractsiusa@GCC_4.3.0 1:4.3 + __satfractsiusq@GCC_4.3.0 1:4.3 + __satfractsiuta@GCC_4.3.0 1:4.3 + __satfractsiutq@GCC_4.3.0 1:4.3 + __satfractsqda@GCC_4.3.0 1:4.3 + __satfractsqdq2@GCC_4.3.0 1:4.3 + __satfractsqha@GCC_4.3.0 1:4.3 + __satfractsqhq2@GCC_4.3.0 1:4.3 + __satfractsqqq2@GCC_4.3.0 1:4.3 + __satfractsqsa@GCC_4.3.0 1:4.3 + __satfractsqta@GCC_4.3.0 1:4.3 + __satfractsqtq2@GCC_4.3.0 1:4.3 + __satfractsquda@GCC_4.3.0 1:4.3 + __satfractsqudq@GCC_4.3.0 1:4.3 + __satfractsquha@GCC_4.3.0 1:4.3 + __satfractsquhq@GCC_4.3.0 1:4.3 + __satfractsquqq@GCC_4.3.0 1:4.3 + __satfractsqusa@GCC_4.3.0 1:4.3 + __satfractsqusq@GCC_4.3.0 1:4.3 + __satfractsquta@GCC_4.3.0 1:4.3 + __satfractsqutq@GCC_4.3.0 1:4.3 + __satfracttada2@GCC_4.3.0 1:4.3 + __satfracttadq@GCC_4.3.0 1:4.3 + __satfracttaha2@GCC_4.3.0 1:4.3 + __satfracttahq@GCC_4.3.0 1:4.3 + __satfracttaqq@GCC_4.3.0 1:4.3 + __satfracttasa2@GCC_4.3.0 1:4.3 + __satfracttasq@GCC_4.3.0 1:4.3 + __satfracttatq@GCC_4.3.0 1:4.3 + __satfracttauda@GCC_4.3.0 1:4.3 + __satfracttaudq@GCC_4.3.0 1:4.3 + __satfracttauha@GCC_4.3.0 1:4.3 + __satfracttauhq@GCC_4.3.0 1:4.3 + __satfracttauqq@GCC_4.3.0 1:4.3 + __satfracttausa@GCC_4.3.0 1:4.3 + __satfracttausq@GCC_4.3.0 1:4.3 + __satfracttauta@GCC_4.3.0 1:4.3 + __satfracttautq@GCC_4.3.0 1:4.3 + __satfracttida@GCC_4.3.0 1:4.3 + __satfracttidq@GCC_4.3.0 1:4.3 + __satfracttiha@GCC_4.3.0 1:4.3 + __satfracttihq@GCC_4.3.0 1:4.3 + __satfracttiqq@GCC_4.3.0 1:4.3 + __satfracttisa@GCC_4.3.0 1:4.3 + __satfracttisq@GCC_4.3.0 1:4.3 + __satfracttita@GCC_4.3.0 1:4.3 + __satfracttitq@GCC_4.3.0 1:4.3 + __satfracttiuda@GCC_4.3.0 1:4.3 + __satfracttiudq@GCC_4.3.0 1:4.3 + __satfracttiuha@GCC_4.3.0 1:4.3 + __satfracttiuhq@GCC_4.3.0 1:4.3 + __satfracttiuqq@GCC_4.3.0 1:4.3 + __satfracttiusa@GCC_4.3.0 1:4.3 + __satfracttiusq@GCC_4.3.0 1:4.3 + __satfracttiuta@GCC_4.3.0 1:4.3 + __satfracttiutq@GCC_4.3.0 1:4.3 + __satfracttqda@GCC_4.3.0 1:4.3 + __satfracttqdq2@GCC_4.3.0 1:4.3 + __satfracttqha@GCC_4.3.0 1:4.3 + __satfracttqhq2@GCC_4.3.0 1:4.3 + __satfracttqqq2@GCC_4.3.0 1:4.3 + __satfracttqsa@GCC_4.3.0 1:4.3 + __satfracttqsq2@GCC_4.3.0 1:4.3 + __satfracttqta@GCC_4.3.0 1:4.3 + __satfracttquda@GCC_4.3.0 1:4.3 + __satfracttqudq@GCC_4.3.0 1:4.3 + __satfracttquha@GCC_4.3.0 1:4.3 + __satfracttquhq@GCC_4.3.0 1:4.3 + __satfracttquqq@GCC_4.3.0 1:4.3 + __satfracttqusa@GCC_4.3.0 1:4.3 + __satfracttqusq@GCC_4.3.0 1:4.3 + __satfracttquta@GCC_4.3.0 1:4.3 + __satfracttqutq@GCC_4.3.0 1:4.3 + __satfractudada@GCC_4.3.0 1:4.3 + __satfractudadq@GCC_4.3.0 1:4.3 + __satfractudaha@GCC_4.3.0 1:4.3 + __satfractudahq@GCC_4.3.0 1:4.3 + __satfractudaqq@GCC_4.3.0 1:4.3 + __satfractudasa@GCC_4.3.0 1:4.3 + __satfractudasq@GCC_4.3.0 1:4.3 + __satfractudata@GCC_4.3.0 1:4.3 + __satfractudatq@GCC_4.3.0 1:4.3 + __satfractudaudq@GCC_4.3.0 1:4.3 + __satfractudauha2@GCC_4.3.0 1:4.3 + __satfractudauhq@GCC_4.3.0 1:4.3 + __satfractudauqq@GCC_4.3.0 1:4.3 + __satfractudausa2@GCC_4.3.0 1:4.3 + __satfractudausq@GCC_4.3.0 1:4.3 + __satfractudauta2@GCC_4.3.0 1:4.3 + __satfractudautq@GCC_4.3.0 1:4.3 + __satfractudqda@GCC_4.3.0 1:4.3 + __satfractudqdq@GCC_4.3.0 1:4.3 + __satfractudqha@GCC_4.3.0 1:4.3 + __satfractudqhq@GCC_4.3.0 1:4.3 + __satfractudqqq@GCC_4.3.0 1:4.3 + __satfractudqsa@GCC_4.3.0 1:4.3 + __satfractudqsq@GCC_4.3.0 1:4.3 + __satfractudqta@GCC_4.3.0 1:4.3 + __satfractudqtq@GCC_4.3.0 1:4.3 + __satfractudquda@GCC_4.3.0 1:4.3 + __satfractudquha@GCC_4.3.0 1:4.3 + __satfractudquhq2@GCC_4.3.0 1:4.3 + __satfractudquqq2@GCC_4.3.0 1:4.3 + __satfractudqusa@GCC_4.3.0 1:4.3 + __satfractudqusq2@GCC_4.3.0 1:4.3 + __satfractudquta@GCC_4.3.0 1:4.3 + __satfractudqutq2@GCC_4.3.0 1:4.3 + __satfractuhada@GCC_4.3.0 1:4.3 + __satfractuhadq@GCC_4.3.0 1:4.3 + __satfractuhaha@GCC_4.3.0 1:4.3 + __satfractuhahq@GCC_4.3.0 1:4.3 + __satfractuhaqq@GCC_4.3.0 1:4.3 + __satfractuhasa@GCC_4.3.0 1:4.3 + __satfractuhasq@GCC_4.3.0 1:4.3 + __satfractuhata@GCC_4.3.0 1:4.3 + __satfractuhatq@GCC_4.3.0 1:4.3 + __satfractuhauda2@GCC_4.3.0 1:4.3 + __satfractuhaudq@GCC_4.3.0 1:4.3 + __satfractuhauhq@GCC_4.3.0 1:4.3 + __satfractuhauqq@GCC_4.3.0 1:4.3 + __satfractuhausa2@GCC_4.3.0 1:4.3 + __satfractuhausq@GCC_4.3.0 1:4.3 + __satfractuhauta2@GCC_4.3.0 1:4.3 + __satfractuhautq@GCC_4.3.0 1:4.3 + __satfractuhqda@GCC_4.3.0 1:4.3 + __satfractuhqdq@GCC_4.3.0 1:4.3 + __satfractuhqha@GCC_4.3.0 1:4.3 + __satfractuhqhq@GCC_4.3.0 1:4.3 + __satfractuhqqq@GCC_4.3.0 1:4.3 + __satfractuhqsa@GCC_4.3.0 1:4.3 + __satfractuhqsq@GCC_4.3.0 1:4.3 + __satfractuhqta@GCC_4.3.0 1:4.3 + __satfractuhqtq@GCC_4.3.0 1:4.3 + __satfractuhquda@GCC_4.3.0 1:4.3 + __satfractuhqudq2@GCC_4.3.0 1:4.3 + __satfractuhquha@GCC_4.3.0 1:4.3 + __satfractuhquqq2@GCC_4.3.0 1:4.3 + __satfractuhqusa@GCC_4.3.0 1:4.3 + __satfractuhqusq2@GCC_4.3.0 1:4.3 + __satfractuhquta@GCC_4.3.0 1:4.3 + __satfractuhqutq2@GCC_4.3.0 1:4.3 + __satfractunsdida@GCC_4.3.0 1:4.3 + __satfractunsdidq@GCC_4.3.0 1:4.3 + __satfractunsdiha@GCC_4.3.0 1:4.3 + __satfractunsdihq@GCC_4.3.0 1:4.3 + __satfractunsdiqq@GCC_4.3.0 1:4.3 + __satfractunsdisa@GCC_4.3.0 1:4.3 + __satfractunsdisq@GCC_4.3.0 1:4.3 + __satfractunsdita@GCC_4.3.0 1:4.3 + __satfractunsditq@GCC_4.3.0 1:4.3 + __satfractunsdiuda@GCC_4.3.0 1:4.3 + __satfractunsdiudq@GCC_4.3.0 1:4.3 + __satfractunsdiuha@GCC_4.3.0 1:4.3 + __satfractunsdiuhq@GCC_4.3.0 1:4.3 + __satfractunsdiuqq@GCC_4.3.0 1:4.3 + __satfractunsdiusa@GCC_4.3.0 1:4.3 + __satfractunsdiusq@GCC_4.3.0 1:4.3 + __satfractunsdiuta@GCC_4.3.0 1:4.3 + __satfractunsdiutq@GCC_4.3.0 1:4.3 + __satfractunshida@GCC_4.3.0 1:4.3 + __satfractunshidq@GCC_4.3.0 1:4.3 + __satfractunshiha@GCC_4.3.0 1:4.3 + __satfractunshihq@GCC_4.3.0 1:4.3 + __satfractunshiqq@GCC_4.3.0 1:4.3 + __satfractunshisa@GCC_4.3.0 1:4.3 + __satfractunshisq@GCC_4.3.0 1:4.3 + __satfractunshita@GCC_4.3.0 1:4.3 + __satfractunshitq@GCC_4.3.0 1:4.3 + __satfractunshiuda@GCC_4.3.0 1:4.3 + __satfractunshiudq@GCC_4.3.0 1:4.3 + __satfractunshiuha@GCC_4.3.0 1:4.3 + __satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunshiuta@GCC_4.3.0 1:4.3 + __satfractunshiutq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqita@GCC_4.3.0 1:4.3 + __satfractunsqitq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunsqiuta@GCC_4.3.0 1:4.3 + __satfractunsqiutq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssita@GCC_4.3.0 1:4.3 + __satfractunssitq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractunssiuta@GCC_4.3.0 1:4.3 + __satfractunssiutq@GCC_4.3.0 1:4.3 + __satfractunstida@GCC_4.3.0 1:4.3 + __satfractunstidq@GCC_4.3.0 1:4.3 + __satfractunstiha@GCC_4.3.0 1:4.3 + __satfractunstihq@GCC_4.3.0 1:4.3 + __satfractunstiqq@GCC_4.3.0 1:4.3 + __satfractunstisa@GCC_4.3.0 1:4.3 + __satfractunstisq@GCC_4.3.0 1:4.3 + __satfractunstita@GCC_4.3.0 1:4.3 + __satfractunstitq@GCC_4.3.0 1:4.3 + __satfractunstiuda@GCC_4.3.0 1:4.3 + __satfractunstiudq@GCC_4.3.0 1:4.3 + __satfractunstiuha@GCC_4.3.0 1:4.3 + __satfractunstiuhq@GCC_4.3.0 1:4.3 + __satfractunstiuqq@GCC_4.3.0 1:4.3 + __satfractunstiusa@GCC_4.3.0 1:4.3 + __satfractunstiusq@GCC_4.3.0 1:4.3 + __satfractunstiuta@GCC_4.3.0 1:4.3 + __satfractunstiutq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqqta@GCC_4.3.0 1:4.3 + __satfractuqqtq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractuqquta@GCC_4.3.0 1:4.3 + __satfractuqqutq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusata@GCC_4.3.0 1:4.3 + __satfractusatq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusauta2@GCC_4.3.0 1:4.3 + __satfractusautq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusqta@GCC_4.3.0 1:4.3 + __satfractusqtq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __satfractusquta@GCC_4.3.0 1:4.3 + __satfractusqutq2@GCC_4.3.0 1:4.3 + __satfractutada@GCC_4.3.0 1:4.3 + __satfractutadq@GCC_4.3.0 1:4.3 + __satfractutaha@GCC_4.3.0 1:4.3 + __satfractutahq@GCC_4.3.0 1:4.3 + __satfractutaqq@GCC_4.3.0 1:4.3 + __satfractutasa@GCC_4.3.0 1:4.3 + __satfractutasq@GCC_4.3.0 1:4.3 + __satfractutata@GCC_4.3.0 1:4.3 + __satfractutatq@GCC_4.3.0 1:4.3 + __satfractutauda2@GCC_4.3.0 1:4.3 + __satfractutaudq@GCC_4.3.0 1:4.3 + __satfractutauha2@GCC_4.3.0 1:4.3 + __satfractutauhq@GCC_4.3.0 1:4.3 + __satfractutauqq@GCC_4.3.0 1:4.3 + __satfractutausa2@GCC_4.3.0 1:4.3 + __satfractutausq@GCC_4.3.0 1:4.3 + __satfractutautq@GCC_4.3.0 1:4.3 + __satfractutqda@GCC_4.3.0 1:4.3 + __satfractutqdq@GCC_4.3.0 1:4.3 + __satfractutqha@GCC_4.3.0 1:4.3 + __satfractutqhq@GCC_4.3.0 1:4.3 + __satfractutqqq@GCC_4.3.0 1:4.3 + __satfractutqsa@GCC_4.3.0 1:4.3 + __satfractutqsq@GCC_4.3.0 1:4.3 + __satfractutqta@GCC_4.3.0 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__usnegusq2@GCC_4.3.0 1:4.3 + __usneguta2@GCC_4.3.0 1:4.3 + __usnegutq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 + __ussubuta3@GCC_4.3.0 1:4.3 + __ussubutq3@GCC_4.3.0 1:4.3 --- gcc-4.8-4.8.5.orig/debian/lib64gcc1.symbols.mipsel +++ gcc-4.8-4.8.5/debian/lib64gcc1.symbols.mipsel @@ -0,0 +1,1749 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.2.0 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4 + GCC_4.5.0@GCC_4.5.0 1:4.5 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + 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__satfracthauhq@GCC_4.3.0 1:4.3 + __satfracthauqq@GCC_4.3.0 1:4.3 + __satfracthausa@GCC_4.3.0 1:4.3 + __satfracthausq@GCC_4.3.0 1:4.3 + __satfracthauta@GCC_4.3.0 1:4.3 + __satfracthautq@GCC_4.3.0 1:4.3 + __satfracthida@GCC_4.3.0 1:4.3 + __satfracthidq@GCC_4.3.0 1:4.3 + __satfracthiha@GCC_4.3.0 1:4.3 + __satfracthihq@GCC_4.3.0 1:4.3 + __satfracthiqq@GCC_4.3.0 1:4.3 + __satfracthisa@GCC_4.3.0 1:4.3 + __satfracthisq@GCC_4.3.0 1:4.3 + __satfracthita@GCC_4.3.0 1:4.3 + __satfracthitq@GCC_4.3.0 1:4.3 + __satfracthiuda@GCC_4.3.0 1:4.3 + __satfracthiudq@GCC_4.3.0 1:4.3 + __satfracthiuha@GCC_4.3.0 1:4.3 + __satfracthiuhq@GCC_4.3.0 1:4.3 + __satfracthiuqq@GCC_4.3.0 1:4.3 + __satfracthiusa@GCC_4.3.0 1:4.3 + __satfracthiusq@GCC_4.3.0 1:4.3 + __satfracthiuta@GCC_4.3.0 1:4.3 + __satfracthiutq@GCC_4.3.0 1:4.3 + __satfracthqda@GCC_4.3.0 1:4.3 + __satfracthqdq2@GCC_4.3.0 1:4.3 + __satfracthqha@GCC_4.3.0 1:4.3 + __satfracthqqq2@GCC_4.3.0 1:4.3 + __satfracthqsa@GCC_4.3.0 1:4.3 + __satfracthqsq2@GCC_4.3.0 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__satfractqqda@GCC_4.3.0 1:4.3 + __satfractqqdq2@GCC_4.3.0 1:4.3 + __satfractqqha@GCC_4.3.0 1:4.3 + __satfractqqhq2@GCC_4.3.0 1:4.3 + __satfractqqsa@GCC_4.3.0 1:4.3 + __satfractqqsq2@GCC_4.3.0 1:4.3 + __satfractqqta@GCC_4.3.0 1:4.3 + __satfractqqtq2@GCC_4.3.0 1:4.3 + __satfractqquda@GCC_4.3.0 1:4.3 + __satfractqqudq@GCC_4.3.0 1:4.3 + __satfractqquha@GCC_4.3.0 1:4.3 + __satfractqquhq@GCC_4.3.0 1:4.3 + __satfractqquqq@GCC_4.3.0 1:4.3 + __satfractqqusa@GCC_4.3.0 1:4.3 + __satfractqqusq@GCC_4.3.0 1:4.3 + __satfractqquta@GCC_4.3.0 1:4.3 + __satfractqqutq@GCC_4.3.0 1:4.3 + __satfractsada2@GCC_4.3.0 1:4.3 + __satfractsadq@GCC_4.3.0 1:4.3 + __satfractsaha2@GCC_4.3.0 1:4.3 + __satfractsahq@GCC_4.3.0 1:4.3 + __satfractsaqq@GCC_4.3.0 1:4.3 + __satfractsasq@GCC_4.3.0 1:4.3 + __satfractsata2@GCC_4.3.0 1:4.3 + __satfractsatq@GCC_4.3.0 1:4.3 + __satfractsauda@GCC_4.3.0 1:4.3 + __satfractsaudq@GCC_4.3.0 1:4.3 + __satfractsauha@GCC_4.3.0 1:4.3 + __satfractsauhq@GCC_4.3.0 1:4.3 + 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1:4.3 + __satfractsita@GCC_4.3.0 1:4.3 + __satfractsitq@GCC_4.3.0 1:4.3 + __satfractsiuda@GCC_4.3.0 1:4.3 + __satfractsiudq@GCC_4.3.0 1:4.3 + __satfractsiuha@GCC_4.3.0 1:4.3 + __satfractsiuhq@GCC_4.3.0 1:4.3 + __satfractsiuqq@GCC_4.3.0 1:4.3 + __satfractsiusa@GCC_4.3.0 1:4.3 + __satfractsiusq@GCC_4.3.0 1:4.3 + __satfractsiuta@GCC_4.3.0 1:4.3 + __satfractsiutq@GCC_4.3.0 1:4.3 + __satfractsqda@GCC_4.3.0 1:4.3 + __satfractsqdq2@GCC_4.3.0 1:4.3 + __satfractsqha@GCC_4.3.0 1:4.3 + __satfractsqhq2@GCC_4.3.0 1:4.3 + __satfractsqqq2@GCC_4.3.0 1:4.3 + __satfractsqsa@GCC_4.3.0 1:4.3 + __satfractsqta@GCC_4.3.0 1:4.3 + __satfractsqtq2@GCC_4.3.0 1:4.3 + __satfractsquda@GCC_4.3.0 1:4.3 + __satfractsqudq@GCC_4.3.0 1:4.3 + __satfractsquha@GCC_4.3.0 1:4.3 + __satfractsquhq@GCC_4.3.0 1:4.3 + __satfractsquqq@GCC_4.3.0 1:4.3 + __satfractsqusa@GCC_4.3.0 1:4.3 + __satfractsqusq@GCC_4.3.0 1:4.3 + __satfractsquta@GCC_4.3.0 1:4.3 + __satfractsqutq@GCC_4.3.0 1:4.3 + __satfracttada2@GCC_4.3.0 1:4.3 + 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1:4.3 + __satfracttiusa@GCC_4.3.0 1:4.3 + __satfracttiusq@GCC_4.3.0 1:4.3 + __satfracttiuta@GCC_4.3.0 1:4.3 + __satfracttiutq@GCC_4.3.0 1:4.3 + __satfracttqda@GCC_4.3.0 1:4.3 + __satfracttqdq2@GCC_4.3.0 1:4.3 + __satfracttqha@GCC_4.3.0 1:4.3 + __satfracttqhq2@GCC_4.3.0 1:4.3 + __satfracttqqq2@GCC_4.3.0 1:4.3 + __satfracttqsa@GCC_4.3.0 1:4.3 + __satfracttqsq2@GCC_4.3.0 1:4.3 + __satfracttqta@GCC_4.3.0 1:4.3 + __satfracttquda@GCC_4.3.0 1:4.3 + __satfracttqudq@GCC_4.3.0 1:4.3 + __satfracttquha@GCC_4.3.0 1:4.3 + __satfracttquhq@GCC_4.3.0 1:4.3 + __satfracttquqq@GCC_4.3.0 1:4.3 + __satfracttqusa@GCC_4.3.0 1:4.3 + __satfracttqusq@GCC_4.3.0 1:4.3 + __satfracttquta@GCC_4.3.0 1:4.3 + __satfracttqutq@GCC_4.3.0 1:4.3 + __satfractudada@GCC_4.3.0 1:4.3 + __satfractudadq@GCC_4.3.0 1:4.3 + __satfractudaha@GCC_4.3.0 1:4.3 + __satfractudahq@GCC_4.3.0 1:4.3 + __satfractudaqq@GCC_4.3.0 1:4.3 + __satfractudasa@GCC_4.3.0 1:4.3 + __satfractudasq@GCC_4.3.0 1:4.3 + __satfractudata@GCC_4.3.0 1:4.3 + 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__satfractunshisq@GCC_4.3.0 1:4.3 + __satfractunshita@GCC_4.3.0 1:4.3 + __satfractunshitq@GCC_4.3.0 1:4.3 + __satfractunshiuda@GCC_4.3.0 1:4.3 + __satfractunshiudq@GCC_4.3.0 1:4.3 + __satfractunshiuha@GCC_4.3.0 1:4.3 + __satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunshiuta@GCC_4.3.0 1:4.3 + __satfractunshiutq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqita@GCC_4.3.0 1:4.3 + __satfractunsqitq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunsqiuta@GCC_4.3.0 1:4.3 + __satfractunsqiutq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssita@GCC_4.3.0 1:4.3 + __satfractunssitq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractunssiuta@GCC_4.3.0 1:4.3 + __satfractunssiutq@GCC_4.3.0 1:4.3 + __satfractunstida@GCC_4.3.0 1:4.3 + __satfractunstidq@GCC_4.3.0 1:4.3 + __satfractunstiha@GCC_4.3.0 1:4.3 + __satfractunstihq@GCC_4.3.0 1:4.3 + __satfractunstiqq@GCC_4.3.0 1:4.3 + __satfractunstisa@GCC_4.3.0 1:4.3 + __satfractunstisq@GCC_4.3.0 1:4.3 + __satfractunstita@GCC_4.3.0 1:4.3 + __satfractunstitq@GCC_4.3.0 1:4.3 + __satfractunstiuda@GCC_4.3.0 1:4.3 + __satfractunstiudq@GCC_4.3.0 1:4.3 + __satfractunstiuha@GCC_4.3.0 1:4.3 + __satfractunstiuhq@GCC_4.3.0 1:4.3 + __satfractunstiuqq@GCC_4.3.0 1:4.3 + __satfractunstiusa@GCC_4.3.0 1:4.3 + __satfractunstiusq@GCC_4.3.0 1:4.3 + __satfractunstiuta@GCC_4.3.0 1:4.3 + __satfractunstiutq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqqta@GCC_4.3.0 1:4.3 + __satfractuqqtq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractuqquta@GCC_4.3.0 1:4.3 + __satfractuqqutq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusata@GCC_4.3.0 1:4.3 + __satfractusatq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusauta2@GCC_4.3.0 1:4.3 + __satfractusautq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusqta@GCC_4.3.0 1:4.3 + __satfractusqtq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __satfractusquta@GCC_4.3.0 1:4.3 + __satfractusqutq2@GCC_4.3.0 1:4.3 + __satfractutada@GCC_4.3.0 1:4.3 + __satfractutadq@GCC_4.3.0 1:4.3 + __satfractutaha@GCC_4.3.0 1:4.3 + __satfractutahq@GCC_4.3.0 1:4.3 + __satfractutaqq@GCC_4.3.0 1:4.3 + __satfractutasa@GCC_4.3.0 1:4.3 + __satfractutasq@GCC_4.3.0 1:4.3 + __satfractutata@GCC_4.3.0 1:4.3 + __satfractutatq@GCC_4.3.0 1:4.3 + __satfractutauda2@GCC_4.3.0 1:4.3 + __satfractutaudq@GCC_4.3.0 1:4.3 + __satfractutauha2@GCC_4.3.0 1:4.3 + __satfractutauhq@GCC_4.3.0 1:4.3 + __satfractutauqq@GCC_4.3.0 1:4.3 + __satfractutausa2@GCC_4.3.0 1:4.3 + __satfractutausq@GCC_4.3.0 1:4.3 + __satfractutautq@GCC_4.3.0 1:4.3 + __satfractutqda@GCC_4.3.0 1:4.3 + __satfractutqdq@GCC_4.3.0 1:4.3 + __satfractutqha@GCC_4.3.0 1:4.3 + __satfractutqhq@GCC_4.3.0 1:4.3 + __satfractutqqq@GCC_4.3.0 1:4.3 + __satfractutqsa@GCC_4.3.0 1:4.3 + __satfractutqsq@GCC_4.3.0 1:4.3 + __satfractutqta@GCC_4.3.0 1:4.3 + __satfractutqtq@GCC_4.3.0 1:4.3 + __satfractutquda@GCC_4.3.0 1:4.3 + __satfractutqudq2@GCC_4.3.0 1:4.3 + __satfractutquha@GCC_4.3.0 1:4.3 + __satfractutquhq2@GCC_4.3.0 1:4.3 + __satfractutquqq2@GCC_4.3.0 1:4.3 + __satfractutqusa@GCC_4.3.0 1:4.3 + __satfractutqusq2@GCC_4.3.0 1:4.3 + __satfractutquta@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssaddta3@GCC_4.3.0 1:4.3 + __ssaddtq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssashlta3@GCC_4.3.0 1:4.3 + __ssashltq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssdivta3@GCC_4.3.0 1:4.3 + __ssdivtq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 1:4.3 + __ssmulsq3@GCC_4.3.0 1:4.3 + __ssmulta3@GCC_4.3.0 1:4.3 + __ssmultq3@GCC_4.3.0 1:4.3 + __ssnegda2@GCC_4.3.0 1:4.3 + __ssnegdq2@GCC_4.3.0 1:4.3 + __ssnegha2@GCC_4.3.0 1:4.3 + __ssneghq2@GCC_4.3.0 1:4.3 + __ssnegqq2@GCC_4.3.0 1:4.3 + __ssnegsa2@GCC_4.3.0 1:4.3 + __ssnegsq2@GCC_4.3.0 1:4.3 + __ssnegta2@GCC_4.3.0 1:4.3 + __ssnegtq2@GCC_4.3.0 1:4.3 + __sssubda3@GCC_4.3.0 1:4.3 + __sssubdq3@GCC_4.3.0 1:4.3 + __sssubha3@GCC_4.3.0 1:4.3 + __sssubhq3@GCC_4.3.0 1:4.3 + __sssubqq3@GCC_4.3.0 1:4.3 + __sssubsa3@GCC_4.3.0 1:4.3 + __sssubsq3@GCC_4.3.0 1:4.3 + __sssubta3@GCC_4.3.0 1:4.3 + __sssubtq3@GCC_4.3.0 1:4.3 + __subda3@GCC_4.3.0 1:4.3 + __subdf3@GCC_3.0 1:4.1.1 + __subdq3@GCC_4.3.0 1:4.3 + __subha3@GCC_4.3.0 1:4.3 + __subhq3@GCC_4.3.0 1:4.3 + __subqq3@GCC_4.3.0 1:4.3 + __subsa3@GCC_4.3.0 1:4.3 + __subsf3@GCC_3.0 1:4.1.1 + __subsq3@GCC_4.3.0 1:4.3 + __subta3@GCC_4.3.0 1:4.3 + __subtf3@GCC_3.0 1:4.1.1 + __subtq3@GCC_4.3.0 1:4.3 + __subuda3@GCC_4.3.0 1:4.3 + __subudq3@GCC_4.3.0 1:4.3 + __subuha3@GCC_4.3.0 1:4.3 + __subuhq3@GCC_4.3.0 1:4.3 + __subuqq3@GCC_4.3.0 1:4.3 + __subusa3@GCC_4.3.0 1:4.3 + __subusq3@GCC_4.3.0 1:4.3 + __subuta3@GCC_4.3.0 1:4.3 + __subutq3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __sync_add_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_8@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_1@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_2@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_4@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_8@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_synchronize@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_8@GCC_4.4.0 1:4.4 + __truncdfsf2@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_3.0 1:4.1.1 + __trunctfsf2@GCC_3.0 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __udivuda3@GCC_4.3.0 1:4.3 + __udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __udivuta3@GCC_4.3.0 1:4.3 + __udivutq3@GCC_4.3.0 1:4.3 + __umodti3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __unordtf2@GCC_4.5.0 1:4.5 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usadduta3@GCC_4.3.0 1:4.3 + __usaddutq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usashluta3@GCC_4.3.0 1:4.3 + __usashlutq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usdivuta3@GCC_4.3.0 1:4.3 + __usdivutq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usmuluta3@GCC_4.3.0 1:4.3 + __usmulutq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __usneguta2@GCC_4.3.0 1:4.3 + __usnegutq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 + __ussubuta3@GCC_4.3.0 1:4.3 + __ussubutq3@GCC_4.3.0 1:4.3 --- gcc-4.8-4.8.5.orig/debian/lib64gcc1.symbols.powerpc +++ gcc-4.8-4.8.5/debian/lib64gcc1.symbols.powerpc @@ -0,0 +1,129 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_3.4.4 1:4.1.1 + __gcc_qdiv@GCC_3.4.4 1:4.1.1 + __gcc_qmul@GCC_3.4.4 1:4.1.1 + __gcc_qsub@GCC_3.4.4 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + _xlqadd@GCC_3.4 1:4.1.1 + _xlqdiv@GCC_3.4 1:4.1.1 + _xlqmul@GCC_3.4 1:4.1.1 + _xlqsub@GCC_3.4 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/lib64gcc1.symbols.s390 +++ gcc-4.8-4.8.5/debian/lib64gcc1.symbols.s390 @@ -0,0 +1,110 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 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__fixtfti@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_4.1.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.1.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/lib64gcc1.symbols.sparc +++ gcc-4.8-4.8.5/debian/lib64gcc1.symbols.sparc @@ -0,0 +1,109 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/lib64gccLC.postinst +++ gcc-4.8-4.8.5/debian/lib64gccLC.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib64gcc@LC@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/lib64gfortran3.overrides +++ gcc-4.8-4.8.5/debian/lib64gfortran3.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +lib64gfortran3 binary: binary-or-shlib-defines-rpath --- gcc-4.8-4.8.5.orig/debian/lib64gfortran3.symbols +++ gcc-4.8-4.8.5/debian/lib64gfortran3.symbols @@ -0,0 +1,7 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.64" +#include "libgfortran3.symbols.qf" --- gcc-4.8-4.8.5.orig/debian/lib64gfortran3.symbols.mips +++ gcc-4.8-4.8.5/debian/lib64gfortran3.symbols.mips @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/lib64gfortran3.symbols.mipsel +++ gcc-4.8-4.8.5/debian/lib64gfortran3.symbols.mipsel @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/lib64gfortran3.symbols.powerpc +++ gcc-4.8-4.8.5/debian/lib64gfortran3.symbols.powerpc @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/lib64gfortran3.symbols.s390 +++ gcc-4.8-4.8.5/debian/lib64gfortran3.symbols.s390 @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/lib64gfortran3.symbols.sparc +++ gcc-4.8-4.8.5/debian/lib64gfortran3.symbols.sparc @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/lib64gomp1.symbols +++ gcc-4.8-4.8.5/debian/lib64gomp1.symbols @@ -0,0 +1,4 @@ +libgomp.so.1 lib64gomp1 #MINVER# +#include "libgomp1.symbols.common" + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 --- gcc-4.8-4.8.5.orig/debian/lib64itm1.symbols +++ gcc-4.8-4.8.5/debian/lib64itm1.symbols @@ -0,0 +1,4 @@ +libitm.so.1 lib64itm1 #MINVER# +#include "libitm1.symbols.common" +#include "libitm1.symbols.64bit" +(arch=amd64 i386 x32)#include "libitm1.symbols.x86" --- gcc-4.8-4.8.5.orig/debian/lib64objc4.symbols +++ gcc-4.8-4.8.5/debian/lib64objc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 lib64objc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 --- gcc-4.8-4.8.5.orig/debian/lib64quadmath0.symbols +++ gcc-4.8-4.8.5/debian/lib64quadmath0.symbols @@ -0,0 +1,2 @@ +libquadmath.so.0 lib64quadmath0 #MINVER# +#include "libquadmath0.symbols.common" --- gcc-4.8-4.8.5.orig/debian/lib64stdc++6.symbols.i386 +++ gcc-4.8-4.8.5/debian/lib64stdc++6.symbols.i386 @@ -0,0 +1,32 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# acosl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# asinl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# atan2l@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# atanl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# ceill@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# coshl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# cosl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# expl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# floorl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# fmodl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# frexpl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# hypotl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# log10l@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# logl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# modfl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# powl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# sinhl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# sinl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# sqrtl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# tanhl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# tanl@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/lib64stdc++6.symbols.powerpc +++ gcc-4.8-4.8.5/debian/lib64stdc++6.symbols.powerpc @@ -0,0 +1,10 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.8-4.8.5.orig/debian/lib64stdc++6.symbols.s390 +++ gcc-4.8-4.8.5/debian/lib64stdc++6.symbols.s390 @@ -0,0 +1,12 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.8-4.8.5.orig/debian/lib64stdc++6.symbols.sparc +++ gcc-4.8-4.8.5/debian/lib64stdc++6.symbols.sparc @@ -0,0 +1,10 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVli@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVli@GLIBCXX_3.4 4.1.1 +# FIXME: Currently no ldbl symbols in the 64bit libstdc++ on sparc. +# #include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/lib64stdc++CXX.postinst +++ gcc-4.8-4.8.5/debian/lib64stdc++CXX.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib64stdc++@CXX@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/libasan0.symbols +++ gcc-4.8-4.8.5/debian/libasan0.symbols @@ -0,0 +1,4 @@ +libasan.so.0 libasan0 #MINVER# +#include "libasan0.symbols.common" +(arch=!aarch64 !alpha !amd64 !ia64 !ppc64 !s390x !sparc64 !kfreebsd-amd64)#include "libasan0.symbols.32" +(arch=aarch64 alpha amd64 ia64 ppc64 s390x sparc64 kfreebsd-amd64)#include "libasan0.symbols.64" --- gcc-4.8-4.8.5.orig/debian/libasan0.symbols.32 +++ gcc-4.8-4.8.5/debian/libasan0.symbols.32 @@ -0,0 +1,4 @@ + _Znaj@Base 4.8 + _ZnajRKSt9nothrow_t@Base 4.8 + _Znwj@Base 4.8 + _ZnwjRKSt9nothrow_t@Base 4.8 --- gcc-4.8-4.8.5.orig/debian/libasan0.symbols.64 +++ gcc-4.8-4.8.5/debian/libasan0.symbols.64 @@ -0,0 +1,4 @@ + _Znam@Base 4.8 + _ZnamRKSt9nothrow_t@Base 4.8 + _Znwm@Base 4.8 + _ZnwmRKSt9nothrow_t@Base 4.8 --- gcc-4.8-4.8.5.orig/debian/libasan0.symbols.common +++ gcc-4.8-4.8.5/debian/libasan0.symbols.common @@ -0,0 +1,206 @@ + _ZN11__sanitizer10StackTrace13CompressStackEPS0_Pjm@Base 4.8 + _ZN11__sanitizer10StackTrace15UncompressStackEPS0_Pjm@Base 4.8 + _ZN11__sanitizer11CheckFailedEPKciS1_yy@Base 4.8 + _ZN6__asan10kMidMemBegE@Base 4.8 + _ZN6__asan10kMidMemEndE@Base 4.8 + _ZN6__asan11asan_mallocEmPN11__sanitizer10StackTraceE@Base 4.8 + _ZN6__asan11kHighMemEndE@Base 4.8 + _ZN6__asan13asan_memalignEmmPN11__sanitizer10StackTraceENS_9AllocTypeE@Base 4.8 + _ZN6__asan9asan_freeEPvPN11__sanitizer10StackTraceENS_9AllocTypeE@Base 4.8 + _ZdaPv@Base 4.8 + _ZdaPvRKSt9nothrow_t@Base 4.8 + _ZdlPv@Base 4.8 + _ZdlPvRKSt9nothrow_t@Base 4.8 + __asan_address_is_poisoned@Base 4.8 + __asan_after_dynamic_init@Base 4.8 + __asan_before_dynamic_init@Base 4.8 + __asan_describe_address@Base 4.8 + __asan_get_allocated_size@Base 4.8 + __asan_get_current_allocated_bytes@Base 4.8 + __asan_get_estimated_allocated_size@Base 4.8 + __asan_get_free_bytes@Base 4.8 + __asan_get_heap_size@Base 4.8 + __asan_get_ownership@Base 4.8 + __asan_get_unmapped_bytes@Base 4.8 + __asan_handle_no_return@Base 4.8 + __asan_init_v1@Base 4.8 + __asan_poison_memory_region@Base 4.8 + __asan_poison_stack_memory@Base 4.8 + __asan_print_accumulated_stats@Base 4.8 + __asan_region_is_poisoned@Base 4.8 + __asan_register_globals@Base 4.8 + __asan_report_error@Base 4.8 + __asan_report_load16@Base 4.8 + __asan_report_load1@Base 4.8 + __asan_report_load2@Base 4.8 + __asan_report_load4@Base 4.8 + __asan_report_load8@Base 4.8 + __asan_report_load_n@Base 4.8 + __asan_report_store16@Base 4.8 + __asan_report_store1@Base 4.8 + __asan_report_store2@Base 4.8 + __asan_report_store4@Base 4.8 + __asan_report_store8@Base 4.8 + __asan_report_store_n@Base 4.8 + __asan_set_death_callback@Base 4.8 + __asan_set_error_exit_code@Base 4.8 + __asan_set_error_report_callback@Base 4.8 + __asan_stack_free@Base 4.8 + __asan_stack_malloc@Base 4.8 + __asan_unpoison_memory_region@Base 4.8 + __asan_unpoison_stack_memory@Base 4.8 + __asan_unregister_globals@Base 4.8 + __cxa_throw@Base 4.8 + __interceptor___cxa_throw@Base 4.8 + __interceptor___isoc99_fscanf@Base 4.8 + __interceptor___isoc99_scanf@Base 4.8 + __interceptor___isoc99_sscanf@Base 4.8 + __interceptor___isoc99_vfscanf@Base 4.8 + __interceptor___isoc99_vscanf@Base 4.8 + __interceptor___isoc99_vsscanf@Base 4.8 + __interceptor___libc_memalign@Base 4.8 + __interceptor__longjmp@Base 4.8 + __interceptor_asctime@Base 4.8 + __interceptor_asctime_r@Base 4.8 + __interceptor_atoi@Base 4.8 + __interceptor_atol@Base 4.8 + __interceptor_atoll@Base 4.8 + __interceptor_calloc@Base 4.8 + __interceptor_cfree@Base 4.8 + __interceptor_ctime@Base 4.8 + __interceptor_ctime_r@Base 4.8 + __interceptor_free@Base 4.8 + __interceptor_fscanf@Base 4.8 + __interceptor_gmtime@Base 4.8 + __interceptor_gmtime_r@Base 4.8 + __interceptor_index@Base 4.8 + __interceptor_localtime@Base 4.8 + __interceptor_localtime_r@Base 4.8 + __interceptor_longjmp@Base 4.8 + __interceptor_mallinfo@Base 4.8 + __interceptor_malloc@Base 4.8 + __interceptor_malloc_stats@Base 4.8 + __interceptor_malloc_usable_size@Base 4.8 + __interceptor_mallopt@Base 4.8 + __interceptor_memalign@Base 4.8 + __interceptor_memcmp@Base 4.8 + __interceptor_memcpy@Base 4.8 + __interceptor_memmove@Base 4.8 + __interceptor_memset@Base 4.8 + __interceptor_mlock@Base 4.8 + __interceptor_mlockall@Base 4.8 + __interceptor_munlock@Base 4.8 + __interceptor_munlockall@Base 4.8 + __interceptor_posix_memalign@Base 4.8 + __interceptor_prctl@Base 4.8 + __interceptor_pread64@Base 4.8 + __interceptor_pread@Base 4.8 + __interceptor_pthread_create@Base 4.8 + __interceptor_pvalloc@Base 4.8 + __interceptor_pwrite64@Base 4.8 + __interceptor_pwrite@Base 4.8 + __interceptor_read@Base 4.8 + __interceptor_realloc@Base 4.8 + __interceptor_scanf@Base 4.8 + __interceptor_sigaction@Base 4.8 + __interceptor_siglongjmp@Base 4.8 + __interceptor_signal@Base 4.8 + __interceptor_sscanf@Base 4.8 + __interceptor_strcasecmp@Base 4.8 + __interceptor_strcat@Base 4.8 + __interceptor_strchr@Base 4.8 + __interceptor_strcmp@Base 4.8 + __interceptor_strcpy@Base 4.8 + __interceptor_strdup@Base 4.8 + __interceptor_strlen@Base 4.8 + __interceptor_strncasecmp@Base 4.8 + __interceptor_strncat@Base 4.8 + __interceptor_strncmp@Base 4.8 + __interceptor_strncpy@Base 4.8 + __interceptor_strnlen@Base 4.8 + __interceptor_strtol@Base 4.8 + __interceptor_strtoll@Base 4.8 + __interceptor_swapcontext@Base 4.8 + __interceptor_valloc@Base 4.8 + __interceptor_vfscanf@Base 4.8 + __interceptor_vscanf@Base 4.8 + __interceptor_vsscanf@Base 4.8 + __interceptor_write@Base 4.8 + __isoc99_fscanf@Base 4.8 + __isoc99_scanf@Base 4.8 + __isoc99_sscanf@Base 4.8 + __isoc99_vfscanf@Base 4.8 + __isoc99_vscanf@Base 4.8 + __isoc99_vsscanf@Base 4.8 + __libc_memalign@Base 4.8 + __sanitizer_report_error_summary@Base 4.8 + __sanitizer_sandbox_on_notify@Base 4.8 + __sanitizer_set_report_fd@Base 4.8 + __sanitizer_set_report_path@Base 4.8 + _longjmp@Base 4.8 + asctime@Base 4.8 + asctime_r@Base 4.8 + atoi@Base 4.8 + atol@Base 4.8 + atoll@Base 4.8 + calloc@Base 4.8 + cfree@Base 4.8 + ctime@Base 4.8 + ctime_r@Base 4.8 + free@Base 4.8 + fscanf@Base 4.8 + gmtime@Base 4.8 + gmtime_r@Base 4.8 + index@Base 4.8 + localtime@Base 4.8 + localtime_r@Base 4.8 + longjmp@Base 4.8 + mallinfo@Base 4.8 + malloc@Base 4.8 + malloc_stats@Base 4.8 + malloc_usable_size@Base 4.8 + mallopt@Base 4.8 + memalign@Base 4.8 + memcmp@Base 4.8 + memcpy@Base 4.8 + memmove@Base 4.8 + memset@Base 4.8 + mlock@Base 4.8 + mlockall@Base 4.8 + munlock@Base 4.8 + munlockall@Base 4.8 + posix_memalign@Base 4.8 + prctl@Base 4.8 + pread64@Base 4.8 + pread@Base 4.8 + pthread_create@Base 4.8 + pvalloc@Base 4.8 + pwrite64@Base 4.8 + pwrite@Base 4.8 + read@Base 4.8 + realloc@Base 4.8 + scanf@Base 4.8 + sigaction@Base 4.8 + siglongjmp@Base 4.8 + signal@Base 4.8 + sscanf@Base 4.8 + strcasecmp@Base 4.8 + strcat@Base 4.8 + strchr@Base 4.8 + strcmp@Base 4.8 + strcpy@Base 4.8 + strdup@Base 4.8 + strlen@Base 4.8 + strncasecmp@Base 4.8 + strncat@Base 4.8 + strncmp@Base 4.8 + strncpy@Base 4.8 + strnlen@Base 4.8 + strtol@Base 4.8 + strtoll@Base 4.8 + valloc@Base 4.8 + vfscanf@Base 4.8 + vscanf@Base 4.8 + vsscanf@Base 4.8 + swapcontext@Base 4.8 + write@Base 4.8 --- gcc-4.8-4.8.5.orig/debian/libatomic1.symbols +++ gcc-4.8-4.8.5/debian/libatomic1.symbols @@ -0,0 +1,3 @@ +libatomic.so.1 libatomic1 #MINVER# +#include "libatomic1.symbols.common" +(arch=arm64 alpha amd64 ia64 ppc64 ppc64el s390x sparc64 x32 kfreebsd-amd64)#include "libatomic1.symbols.64" --- gcc-4.8-4.8.5.orig/debian/libatomic1.symbols.64 +++ gcc-4.8-4.8.5/debian/libatomic1.symbols.64 @@ -0,0 +1,17 @@ + __atomic_add_fetch_16@LIBATOMIC_1.0 4.8 + __atomic_and_fetch_16@LIBATOMIC_1.0 4.8 + __atomic_compare_exchange_16@LIBATOMIC_1.0 4.8 + __atomic_exchange_16@LIBATOMIC_1.0 4.8 + __atomic_fetch_add_16@LIBATOMIC_1.0 4.8 + __atomic_fetch_and_16@LIBATOMIC_1.0 4.8 + __atomic_fetch_nand_16@LIBATOMIC_1.0 4.8 + __atomic_fetch_or_16@LIBATOMIC_1.0 4.8 + __atomic_fetch_sub_16@LIBATOMIC_1.0 4.8 + __atomic_fetch_xor_16@LIBATOMIC_1.0 4.8 + __atomic_load_16@LIBATOMIC_1.0 4.8 + __atomic_nand_fetch_16@LIBATOMIC_1.0 4.8 + __atomic_or_fetch_16@LIBATOMIC_1.0 4.8 + __atomic_store_16@LIBATOMIC_1.0 4.8 + __atomic_sub_fetch_16@LIBATOMIC_1.0 4.8 + __atomic_test_and_set_16@LIBATOMIC_1.0 4.8 + __atomic_xor_fetch_16@LIBATOMIC_1.0 4.8 --- gcc-4.8-4.8.5.orig/debian/libatomic1.symbols.common +++ gcc-4.8-4.8.5/debian/libatomic1.symbols.common @@ -0,0 +1,74 @@ + LIBATOMIC_1.0@LIBATOMIC_1.0 4.8 + __atomic_add_fetch_1@LIBATOMIC_1.0 4.8 + __atomic_add_fetch_2@LIBATOMIC_1.0 4.8 + __atomic_add_fetch_4@LIBATOMIC_1.0 4.8 + __atomic_add_fetch_8@LIBATOMIC_1.0 4.8 + __atomic_and_fetch_1@LIBATOMIC_1.0 4.8 + __atomic_and_fetch_2@LIBATOMIC_1.0 4.8 + __atomic_and_fetch_4@LIBATOMIC_1.0 4.8 + __atomic_and_fetch_8@LIBATOMIC_1.0 4.8 + __atomic_compare_exchange@LIBATOMIC_1.0 4.8 + __atomic_compare_exchange_1@LIBATOMIC_1.0 4.8 + __atomic_compare_exchange_2@LIBATOMIC_1.0 4.8 + __atomic_compare_exchange_4@LIBATOMIC_1.0 4.8 + __atomic_compare_exchange_8@LIBATOMIC_1.0 4.8 + __atomic_exchange@LIBATOMIC_1.0 4.8 + __atomic_exchange_1@LIBATOMIC_1.0 4.8 + __atomic_exchange_2@LIBATOMIC_1.0 4.8 + __atomic_exchange_4@LIBATOMIC_1.0 4.8 + __atomic_exchange_8@LIBATOMIC_1.0 4.8 + __atomic_fetch_add_1@LIBATOMIC_1.0 4.8 + __atomic_fetch_add_2@LIBATOMIC_1.0 4.8 + __atomic_fetch_add_4@LIBATOMIC_1.0 4.8 + __atomic_fetch_add_8@LIBATOMIC_1.0 4.8 + __atomic_fetch_and_1@LIBATOMIC_1.0 4.8 + __atomic_fetch_and_2@LIBATOMIC_1.0 4.8 + __atomic_fetch_and_4@LIBATOMIC_1.0 4.8 + __atomic_fetch_and_8@LIBATOMIC_1.0 4.8 + __atomic_fetch_nand_1@LIBATOMIC_1.0 4.8 + __atomic_fetch_nand_2@LIBATOMIC_1.0 4.8 + __atomic_fetch_nand_4@LIBATOMIC_1.0 4.8 + __atomic_fetch_nand_8@LIBATOMIC_1.0 4.8 + __atomic_fetch_or_1@LIBATOMIC_1.0 4.8 + __atomic_fetch_or_2@LIBATOMIC_1.0 4.8 + __atomic_fetch_or_4@LIBATOMIC_1.0 4.8 + __atomic_fetch_or_8@LIBATOMIC_1.0 4.8 + __atomic_fetch_sub_1@LIBATOMIC_1.0 4.8 + __atomic_fetch_sub_2@LIBATOMIC_1.0 4.8 + __atomic_fetch_sub_4@LIBATOMIC_1.0 4.8 + __atomic_fetch_sub_8@LIBATOMIC_1.0 4.8 + __atomic_fetch_xor_1@LIBATOMIC_1.0 4.8 + __atomic_fetch_xor_2@LIBATOMIC_1.0 4.8 + __atomic_fetch_xor_4@LIBATOMIC_1.0 4.8 + __atomic_fetch_xor_8@LIBATOMIC_1.0 4.8 + __atomic_is_lock_free@LIBATOMIC_1.0 4.8 + __atomic_load@LIBATOMIC_1.0 4.8 + __atomic_load_1@LIBATOMIC_1.0 4.8 + __atomic_load_2@LIBATOMIC_1.0 4.8 + __atomic_load_4@LIBATOMIC_1.0 4.8 + __atomic_load_8@LIBATOMIC_1.0 4.8 + __atomic_nand_fetch_1@LIBATOMIC_1.0 4.8 + __atomic_nand_fetch_2@LIBATOMIC_1.0 4.8 + __atomic_nand_fetch_4@LIBATOMIC_1.0 4.8 + __atomic_nand_fetch_8@LIBATOMIC_1.0 4.8 + __atomic_or_fetch_1@LIBATOMIC_1.0 4.8 + __atomic_or_fetch_2@LIBATOMIC_1.0 4.8 + __atomic_or_fetch_4@LIBATOMIC_1.0 4.8 + __atomic_or_fetch_8@LIBATOMIC_1.0 4.8 + __atomic_store@LIBATOMIC_1.0 4.8 + __atomic_store_1@LIBATOMIC_1.0 4.8 + __atomic_store_2@LIBATOMIC_1.0 4.8 + __atomic_store_4@LIBATOMIC_1.0 4.8 + __atomic_store_8@LIBATOMIC_1.0 4.8 + __atomic_sub_fetch_1@LIBATOMIC_1.0 4.8 + __atomic_sub_fetch_2@LIBATOMIC_1.0 4.8 + __atomic_sub_fetch_4@LIBATOMIC_1.0 4.8 + __atomic_sub_fetch_8@LIBATOMIC_1.0 4.8 + __atomic_test_and_set_1@LIBATOMIC_1.0 4.8 + __atomic_test_and_set_2@LIBATOMIC_1.0 4.8 + __atomic_test_and_set_4@LIBATOMIC_1.0 4.8 + __atomic_test_and_set_8@LIBATOMIC_1.0 4.8 + __atomic_xor_fetch_1@LIBATOMIC_1.0 4.8 + __atomic_xor_fetch_2@LIBATOMIC_1.0 4.8 + __atomic_xor_fetch_4@LIBATOMIC_1.0 4.8 + __atomic_xor_fetch_8@LIBATOMIC_1.0 4.8 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.aeabi +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.aeabi @@ -0,0 +1,69 @@ + __aeabi_cdcmpeq@GCC_3.5 1:4.4.0 + __aeabi_cdcmple@GCC_3.5 1:4.4.0 + __aeabi_cdrcmple@GCC_3.5 1:4.4.0 + __aeabi_cfcmpeq@GCC_3.5 1:4.4.0 + __aeabi_cfcmple@GCC_3.5 1:4.4.0 + __aeabi_cfrcmple@GCC_3.5 1:4.4.0 + __aeabi_d2f@GCC_3.5 1:4.4.0 + __aeabi_d2iz@GCC_3.5 1:4.4.0 + __aeabi_d2lz@GCC_3.5 1:4.4.0 + __aeabi_d2uiz@GCC_3.5 1:4.4.0 + __aeabi_d2ulz@GCC_3.5 1:4.4.0 + __aeabi_dadd@GCC_3.5 1:4.4.0 + __aeabi_dcmpeq@GCC_3.5 1:4.4.0 + __aeabi_dcmpge@GCC_3.5 1:4.4.0 + __aeabi_dcmpgt@GCC_3.5 1:4.4.0 + __aeabi_dcmple@GCC_3.5 1:4.4.0 + __aeabi_dcmplt@GCC_3.5 1:4.4.0 + __aeabi_dcmpun@GCC_3.5 1:4.4.0 + __aeabi_ddiv@GCC_3.5 1:4.4.0 + __aeabi_dmul@GCC_3.5 1:4.4.0 + __aeabi_dneg@GCC_3.5 1:4.4.0 + __aeabi_drsub@GCC_3.5 1:4.4.0 + __aeabi_dsub@GCC_3.5 1:4.4.0 + __aeabi_f2d@GCC_3.5 1:4.4.0 + __aeabi_f2iz@GCC_3.5 1:4.4.0 + __aeabi_f2lz@GCC_3.5 1:4.4.0 + __aeabi_f2uiz@GCC_3.5 1:4.4.0 + __aeabi_f2ulz@GCC_3.5 1:4.4.0 + __aeabi_fadd@GCC_3.5 1:4.4.0 + __aeabi_fcmpeq@GCC_3.5 1:4.4.0 + __aeabi_fcmpge@GCC_3.5 1:4.4.0 + __aeabi_fcmpgt@GCC_3.5 1:4.4.0 + __aeabi_fcmple@GCC_3.5 1:4.4.0 + __aeabi_fcmplt@GCC_3.5 1:4.4.0 + __aeabi_fcmpun@GCC_3.5 1:4.4.0 + __aeabi_fdiv@GCC_3.5 1:4.4.0 + __aeabi_fmul@GCC_3.5 1:4.4.0 + __aeabi_fneg@GCC_3.5 1:4.4.0 + __aeabi_frsub@GCC_3.5 1:4.4.0 + __aeabi_fsub@GCC_3.5 1:4.4.0 + __aeabi_i2d@GCC_3.5 1:4.4.0 + __aeabi_i2f@GCC_3.5 1:4.4.0 + __aeabi_idiv@GCC_3.5 1:4.4.0 + __aeabi_idiv0@GCC_3.5 1:4.5.0 + __aeabi_idivmod@GCC_3.5 1:4.4.0 + __aeabi_l2d@GCC_3.5 1:4.4.0 + __aeabi_l2f@GCC_3.5 1:4.4.0 + __aeabi_lasr@GCC_3.5 1:4.4.0 + __aeabi_lcmp@GCC_3.5 1:4.4.0 + __aeabi_ldivmod@GCC_3.5 1:4.4.0 + __aeabi_ldiv0@GCC_3.5 1:4.5.0 + __aeabi_llsl@GCC_3.5 1:4.4.0 + __aeabi_llsr@GCC_3.5 1:4.4.0 + __aeabi_lmul@GCC_3.5 1:4.4.0 + __aeabi_ui2d@GCC_3.5 1:4.4.0 + __aeabi_ui2f@GCC_3.5 1:4.4.0 + __aeabi_uidiv@GCC_3.5 1:4.4.0 + __aeabi_uidivmod@GCC_3.5 1:4.4.0 + __aeabi_ul2d@GCC_3.5 1:4.4.0 + __aeabi_ul2f@GCC_3.5 1:4.4.0 + __aeabi_ulcmp@GCC_3.5 1:4.4.0 + __aeabi_uldivmod@GCC_3.5 1:4.4.0 + __aeabi_unwind_cpp_pr0@GCC_3.5 1:4.4.0 + __aeabi_unwind_cpp_pr1@GCC_3.5 1:4.4.0 + __aeabi_unwind_cpp_pr2@GCC_3.5 1:4.4.0 + __aeabi_uread4@GCC_3.5 1:4.4.0 + __aeabi_uread8@GCC_3.5 1:4.4.0 + __aeabi_uwrite4@GCC_3.5 1:4.4.0 + __aeabi_uwrite8@GCC_3.5 1:4.4.0 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.alpha +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.alpha @@ -0,0 +1,110 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_LDBL_4.0.0@GCC_LDBL_4.0.0 1:4.2.1 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_LDBL_4.0.0 1:4.2.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.2.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.2.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.2.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_LDBL_4.0.0 1:4.2.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_LDBL_4.0.0 1:4.2.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.amd64 +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.amd64 @@ -0,0 +1,150 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_4.8.0@GCC_4.8.0 1:4.8 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __cpu_indicator_init@GCC_4.8.0 1:4.8 + __cpu_model@GCC_4.8.0 1:4.8 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GCC_3.0 1:4.1.1 + __deregister_frame_info@GCC_3.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.3 + __divtc3@GCC_4.3.0 1:4.4.0 + __divtf3@GCC_4.3.0 1:4.3 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.3.0 1:4.3 + __extenddftf2@GCC_4.3.0 1:4.3 + __extendsftf2@GCC_4.3.0 1:4.3 + __extendxftf2@GCC_4.3.0 1:4.3 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.3.0 1:4.3 + __fixtfsi@GCC_4.3.0 1:4.3 + __fixtfti@GCC_4.3.0 1:4.3 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.3.0 1:4.3 + __fixunstfsi@GCC_4.3.0 1:4.3 + __fixunstfti@GCC_4.3.0 1:4.3 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.3.0 1:4.3 + __floatsitf@GCC_4.3.0 1:4.3 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.3.0 1:4.3 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.3.0 1:4.3 + __floatunsitf@GCC_4.3.0 1:4.3 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.3.0 1:4.3 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.3.0 1:4.3 + __gttf2@GCC_3.0 1:4.3 + __gttf2@GCC_4.3.0 1:4.4.0 + __letf2@GCC_4.3.0 1:4.3 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_3.0 1:4.3 + __lttf2@GCC_4.3.0 1:4.4.0 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.3 + __multc3@GCC_4.3.0 1:4.4.0 + __multf3@GCC_4.3.0 1:4.3 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.3.0 1:4.3 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_3.0 1:4.3 + __netf2@GCC_4.3.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.3 + __powitf2@GCC_4.3.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GCC_3.0 1:4.1.1 + __register_frame_info@GCC_3.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GCC_3.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GCC_3.0 1:4.1.1 + __subtf3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.3.0 1:4.3 + __trunctfsf2@GCC_4.3.0 1:4.3 + __trunctfxf2@GCC_4.3.0 1:4.3 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.3.0 1:4.3 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.arm64 +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.arm64 @@ -0,0 +1,134 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.7 + GCC_3.3.1@GCC_3.3.1 1:4.7 + GCC_3.3@GCC_3.3 1:4.7 + GCC_3.4.2@GCC_3.4.2 1:4.7 + GCC_3.4.4@GCC_3.4.4 1:4.7 + GCC_3.4@GCC_3.4 1:4.7 + GCC_4.0.0@GCC_4.0.0 1:4.7 + GCC_4.2.0@GCC_4.2.0 1:4.7 + GCC_4.3.0@GCC_4.3.0 1:4.7 + GCC_4.5.0@GCC_4.5.0 1:4.7 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.7 + _Unwind_Backtrace@GCC_3.3 1:4.7 + _Unwind_DeleteException@GCC_3.0 1:4.7 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.7 + _Unwind_Find_FDE@GCC_3.0 1:4.7 + _Unwind_ForcedUnwind@GCC_3.0 1:4.7 + _Unwind_GetCFA@GCC_3.3 1:4.7 + _Unwind_GetDataRelBase@GCC_3.0 1:4.7 + _Unwind_GetGR@GCC_3.0 1:4.7 + _Unwind_GetIP@GCC_3.0 1:4.7 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.7 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.7 + _Unwind_GetRegionStart@GCC_3.0 1:4.7 + _Unwind_GetTextRelBase@GCC_3.0 1:4.7 + _Unwind_RaiseException@GCC_3.0 1:4.7 + _Unwind_Resume@GCC_3.0 1:4.7 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.7 + _Unwind_SetGR@GCC_3.0 1:4.7 + _Unwind_SetIP@GCC_3.0 1:4.7 + __absvdi2@GCC_3.0 1:4.7 + __absvsi2@GCC_3.0 1:4.7 + __absvti2@GCC_3.4.4 1:4.7 + __addtf3@GCC_3.0 1:4.7 + __addvdi3@GCC_3.0 1:4.7 + __addvsi3@GCC_3.0 1:4.7 + __addvti3@GCC_3.4.4 1:4.7 + __ashlti3@GCC_3.0 1:4.7 + __ashrti3@GCC_3.0 1:4.7 + __bswapdi2@GCC_4.3.0 1:4.7 + __bswapsi2@GCC_4.3.0 1:4.7 + __clear_cache@GCC_3.0 1:4.7 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.7 + __clzti2@GCC_3.4 1:4.7 + __cmpti2@GCC_3.0 1:4.7 + __ctzdi2@GCC_3.4 1:4.7 + __ctzti2@GCC_3.4 1:4.7 + __deregister_frame@GLIBC_2.0 1:4.7 + __deregister_frame_info@GLIBC_2.0 1:4.7 + __deregister_frame_info_bases@GCC_3.0 1:4.7 + __divdc3@GCC_4.0.0 1:4.7 + __divsc3@GCC_4.0.0 1:4.7 + __divtc3@GCC_4.0.0 1:4.7 + __divtf3@GCC_3.0 1:4.7 + __divti3@GCC_3.0 1:4.7 + __emutls_get_address@GCC_4.3.0 1:4.7 + __emutls_register_common@GCC_4.3.0 1:4.7 + __enable_execute_stack@GCC_3.4.2 1:4.7 + __eqtf2@GCC_3.0 1:4.7 + __extenddftf2@GCC_3.0 1:4.7 + __extendsftf2@GCC_3.0 1:4.7 + __ffsdi2@GCC_3.0 1:4.7 + __ffsti2@GCC_3.0 1:4.7 + __fixdfti@GCC_3.0 1:4.7 + __fixsfti@GCC_3.0 1:4.7 + __fixtfdi@GCC_3.0 1:4.7 + __fixtfsi@GCC_3.0 1:4.7 + __fixtfti@GCC_3.0 1:4.7 + __fixunsdfdi@GCC_3.0 1:4.7 + __fixunsdfti@GCC_3.0 1:4.7 + __fixunssfdi@GCC_3.0 1:4.7 + __fixunssfti@GCC_3.0 1:4.7 + __fixunstfdi@GCC_3.0 1:4.7 + __fixunstfsi@GCC_3.0 1:4.7 + __fixunstfti@GCC_3.0 1:4.7 + __floatditf@GCC_3.0 1:4.7 + __floatsitf@GCC_3.0 1:4.7 + __floattidf@GCC_3.0 1:4.7 + __floattisf@GCC_3.0 1:4.7 + __floattitf@GCC_3.0 1:4.7 + __floatunditf@GCC_4.2.0 1:4.7 + __floatunsitf@GCC_4.2.0 1:4.7 + __floatuntidf@GCC_4.2.0 1:4.7 + __floatuntisf@GCC_4.2.0 1:4.7 + __floatuntitf@GCC_4.2.0 1:4.7 + __frame_state_for@GLIBC_2.0 1:4.7 + __gcc_personality_v0@GCC_3.3.1 1:4.7 + __getf2@GCC_3.0 1:4.7 + __gttf2@GCC_3.0 1:4.7 + __letf2@GCC_3.0 1:4.7 + __lshrti3@GCC_3.0 1:4.7 + __lttf2@GCC_3.0 1:4.7 + __modti3@GCC_3.0 1:4.7 + __muldc3@GCC_4.0.0 1:4.7 + __mulsc3@GCC_4.0.0 1:4.7 + __multc3@GCC_4.0.0 1:4.7 + __multf3@GCC_3.0 1:4.7 + __multi3@GCC_3.0 1:4.7 + __mulvdi3@GCC_3.0 1:4.7 + __mulvsi3@GCC_3.0 1:4.7 + __mulvti3@GCC_3.4.4 1:4.7 + __negtf2@GCC_3.0 1:4.7 + __negti2@GCC_3.0 1:4.7 + __negvdi2@GCC_3.0 1:4.7 + __negvsi2@GCC_3.0 1:4.7 + __negvti2@GCC_3.4.4 1:4.7 + __netf2@GCC_3.0 1:4.7 + __paritydi2@GCC_3.4 1:4.7 + __parityti2@GCC_3.4 1:4.7 + __popcountdi2@GCC_3.4 1:4.7 + __popcountti2@GCC_3.4 1:4.7 + __powidf2@GCC_4.0.0 1:4.7 + __powisf2@GCC_4.0.0 1:4.7 + __powitf2@GCC_4.0.0 1:4.7 + __register_frame@GLIBC_2.0 1:4.7 + __register_frame_info@GLIBC_2.0 1:4.7 + __register_frame_info_bases@GCC_3.0 1:4.7 + __register_frame_info_table@GLIBC_2.0 1:4.7 + __register_frame_info_table_bases@GCC_3.0 1:4.7 + __register_frame_table@GLIBC_2.0 1:4.7 + __subtf3@GCC_3.0 1:4.7 + __subvdi3@GCC_3.0 1:4.7 + __subvsi3@GCC_3.0 1:4.7 + __subvti3@GCC_3.4.4 1:4.7 + __trunctfdf2@GCC_3.0 1:4.7 + __trunctfsf2@GCC_3.0 1:4.7 + __ucmpti2@GCC_3.0 1:4.7 + __udivmodti4@GCC_3.0 1:4.7 + __udivti3@GCC_3.0 1:4.7 + __umodti3@GCC_3.0 1:4.7 + __unordtf2@GCC_4.5.0 1:4.7 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.armel +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.armel @@ -0,0 +1,1103 @@ +libgcc_s.so.1 libgcc1 #MINVER# +(ignore-blacklist)#include "libgcc1.symbols.aeabi" + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_3.5@GCC_3.5 1:4.3.0 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_4.3.0 1:4.3.0 + _Unwind_Complete@GCC_3.5 1:4.3.0 + _Unwind_DeleteException@GCC_3.0 1:4.3.0 + _Unwind_ForcedUnwind@GCC_3.0 1:4.3.0 + _Unwind_GetCFA@GCC_3.3 1:4.3.0 + _Unwind_GetDataRelBase@GCC_3.0 1:4.3.0 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.3.0 + 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+ __powixf2@GCC_4.0.0 4.2.1 + __register_frame@GLIBC_2.0 4.2.1 + __register_frame_info@GLIBC_2.0 4.2.1 + __register_frame_info_bases@GCC_3.0 4.2.1 + __register_frame_info_table@GLIBC_2.0 4.2.1 + __register_frame_info_table_bases@GCC_3.0 4.2.1 + __register_frame_table@GLIBC_2.0 4.2.1 + __subvdi3@GCC_3.0 4.2.1 + __subvsi3@GCC_3.0 4.2.1 + __ucmpdi2@GCC_3.0 4.2.1 + __udivdi3@GLIBC_2.0 4.2.1 + __udivmoddi4@GCC_3.0 4.2.1 + __umoddi3@GLIBC_2.0 4.2.1 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.i386 +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.i386 @@ -0,0 +1,140 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_4.8.0@GCC_4.8.0 1:4.8 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __cpu_indicator_init@GCC_4.8.0 1:4.8 + __cpu_model@GCC_4.8.0 1:4.8 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.ia64 +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.ia64 @@ -0,0 +1,148 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.2@GCC_3.3.2 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetBSP@GCC_3.3.2 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.8 + __clrsbti2@GCC_4.7.0 1:4.8 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divsi3@GCC_3.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_3.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __divxf3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunstfti@GCC_3.0 1:4.1.1 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __ia64_nonlocal_goto@GCC_3.0 1:4.1.1 + __ia64_restore_stack_nonlocal@GCC_3.0 1:4.1.1 + __ia64_save_stack_nonlocal@GCC_3.0 1:4.1.1 + __ia64_trampoline@GCC_3.0 1:4.1.1 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __modsi3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivsi3@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __umodsi3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.kfreebsd-amd64 +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.kfreebsd-amd64 @@ -0,0 +1,142 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_4.8.0@GCC_4.8.0 1:4.8 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __cpu_indicator_init@GCC_4.8.0 1:4.8 + __cpu_model@GCC_4.8.0 1:4.8 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GCC_3.0 1:4.1.1 + __deregister_frame_info@GCC_3.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.3 + __divtf3@GCC_4.3.0 1:4.3 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.3.0 1:4.3 + __extenddftf2@GCC_4.3.0 1:4.3 + __extendsftf2@GCC_4.3.0 1:4.3 + __extendxftf2@GCC_4.3.0 1:4.3 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.3.0 1:4.3 + __fixtfsi@GCC_4.3.0 1:4.3 + __fixtfti@GCC_4.3.0 1:4.3 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.3.0 1:4.3 + __fixunstfsi@GCC_4.3.0 1:4.3 + __fixunstfti@GCC_4.3.0 1:4.3 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.3.0 1:4.3 + __floatsitf@GCC_4.3.0 1:4.3 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.3.0 1:4.3 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.3.0 1:4.3 + __floatunsitf@GCC_4.3.0 1:4.3 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.3.0 1:4.3 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.3.0 1:4.3 + __gttf2@GCC_3.0 1:4.3 + __letf2@GCC_4.3.0 1:4.3 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_3.0 1:4.3 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.3 + __multf3@GCC_4.3.0 1:4.3 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.3.0 1:4.3 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_3.0 1:4.3 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.3 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GCC_3.0 1:4.1.1 + __register_frame_info@GCC_3.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GCC_3.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GCC_3.0 1:4.1.1 + __subtf3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.3.0 1:4.3 + __trunctfsf2@GCC_4.3.0 1:4.3 + __trunctfxf2@GCC_4.3.0 1:4.3 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.3.0 1:4.3 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.kfreebsd-i386 +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.kfreebsd-i386 @@ -0,0 +1,136 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_4.8.0@GCC_4.8.0 1:4.8 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.lpia +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.lpia @@ -0,0 +1,135 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_4.8.0@GCC_4.8.0 1:4.8 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + 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__satfractsfha@GCC_4.3.0 1:4.3 + __satfractsfhq@GCC_4.3.0 1:4.3 + __satfractsfqq@GCC_4.3.0 1:4.3 + __satfractsfsa@GCC_4.3.0 1:4.3 + __satfractsfsq@GCC_4.3.0 1:4.3 + __satfractsfuda@GCC_4.3.0 1:4.3 + __satfractsfudq@GCC_4.3.0 1:4.3 + __satfractsfuha@GCC_4.3.0 1:4.3 + __satfractsfuhq@GCC_4.3.0 1:4.3 + __satfractsfuqq@GCC_4.3.0 1:4.3 + __satfractsfusa@GCC_4.3.0 1:4.3 + __satfractsfusq@GCC_4.3.0 1:4.3 + __satfractsida@GCC_4.3.0 1:4.3 + __satfractsidq@GCC_4.3.0 1:4.3 + __satfractsiha@GCC_4.3.0 1:4.3 + __satfractsihq@GCC_4.3.0 1:4.3 + __satfractsiqq@GCC_4.3.0 1:4.3 + __satfractsisa@GCC_4.3.0 1:4.3 + __satfractsisq@GCC_4.3.0 1:4.3 + __satfractsiuda@GCC_4.3.0 1:4.3 + __satfractsiudq@GCC_4.3.0 1:4.3 + __satfractsiuha@GCC_4.3.0 1:4.3 + __satfractsiuhq@GCC_4.3.0 1:4.3 + __satfractsiuqq@GCC_4.3.0 1:4.3 + __satfractsiusa@GCC_4.3.0 1:4.3 + __satfractsiusq@GCC_4.3.0 1:4.3 + __satfractsqda@GCC_4.3.0 1:4.3 + __satfractsqdq2@GCC_4.3.0 1:4.3 + __satfractsqha@GCC_4.3.0 1:4.3 + __satfractsqhq2@GCC_4.3.0 1:4.3 + __satfractsqqq2@GCC_4.3.0 1:4.3 + __satfractsqsa@GCC_4.3.0 1:4.3 + __satfractsquda@GCC_4.3.0 1:4.3 + __satfractsqudq@GCC_4.3.0 1:4.3 + __satfractsquha@GCC_4.3.0 1:4.3 + __satfractsquhq@GCC_4.3.0 1:4.3 + __satfractsquqq@GCC_4.3.0 1:4.3 + __satfractsqusa@GCC_4.3.0 1:4.3 + __satfractsqusq@GCC_4.3.0 1:4.3 + __satfractudada@GCC_4.3.0 1:4.3 + __satfractudadq@GCC_4.3.0 1:4.3 + __satfractudaha@GCC_4.3.0 1:4.3 + __satfractudahq@GCC_4.3.0 1:4.3 + __satfractudaqq@GCC_4.3.0 1:4.3 + __satfractudasa@GCC_4.3.0 1:4.3 + __satfractudasq@GCC_4.3.0 1:4.3 + __satfractudaudq@GCC_4.3.0 1:4.3 + __satfractudauha2@GCC_4.3.0 1:4.3 + __satfractudauhq@GCC_4.3.0 1:4.3 + __satfractudauqq@GCC_4.3.0 1:4.3 + __satfractudausa2@GCC_4.3.0 1:4.3 + __satfractudausq@GCC_4.3.0 1:4.3 + __satfractudqda@GCC_4.3.0 1:4.3 + __satfractudqdq@GCC_4.3.0 1:4.3 + __satfractudqha@GCC_4.3.0 1:4.3 + __satfractudqhq@GCC_4.3.0 1:4.3 + __satfractudqqq@GCC_4.3.0 1:4.3 + __satfractudqsa@GCC_4.3.0 1:4.3 + __satfractudqsq@GCC_4.3.0 1:4.3 + __satfractudquda@GCC_4.3.0 1:4.3 + __satfractudquha@GCC_4.3.0 1:4.3 + __satfractudquhq2@GCC_4.3.0 1:4.3 + __satfractudquqq2@GCC_4.3.0 1:4.3 + __satfractudqusa@GCC_4.3.0 1:4.3 + __satfractudqusq2@GCC_4.3.0 1:4.3 + __satfractuhada@GCC_4.3.0 1:4.3 + __satfractuhadq@GCC_4.3.0 1:4.3 + __satfractuhaha@GCC_4.3.0 1:4.3 + __satfractuhahq@GCC_4.3.0 1:4.3 + __satfractuhaqq@GCC_4.3.0 1:4.3 + __satfractuhasa@GCC_4.3.0 1:4.3 + __satfractuhasq@GCC_4.3.0 1:4.3 + __satfractuhauda2@GCC_4.3.0 1:4.3 + __satfractuhaudq@GCC_4.3.0 1:4.3 + __satfractuhauhq@GCC_4.3.0 1:4.3 + __satfractuhauqq@GCC_4.3.0 1:4.3 + __satfractuhausa2@GCC_4.3.0 1:4.3 + __satfractuhausq@GCC_4.3.0 1:4.3 + __satfractuhqda@GCC_4.3.0 1:4.3 + __satfractuhqdq@GCC_4.3.0 1:4.3 + __satfractuhqha@GCC_4.3.0 1:4.3 + __satfractuhqhq@GCC_4.3.0 1:4.3 + __satfractuhqqq@GCC_4.3.0 1:4.3 + __satfractuhqsa@GCC_4.3.0 1:4.3 + __satfractuhqsq@GCC_4.3.0 1:4.3 + __satfractuhquda@GCC_4.3.0 1:4.3 + __satfractuhqudq2@GCC_4.3.0 1:4.3 + __satfractuhquha@GCC_4.3.0 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__satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + 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__subsq3@GCC_4.3.0 1:4.3 + __subuda3@GCC_4.3.0 1:4.3 + __subudq3@GCC_4.3.0 1:4.3 + __subuha3@GCC_4.3.0 1:4.3 + __subuhq3@GCC_4.3.0 1:4.3 + __subuqq3@GCC_4.3.0 1:4.3 + __subusa3@GCC_4.3.0 1:4.3 + __subusq3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __sync_add_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_add_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_add_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_1@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_2@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_nand_1@GCC_4.4.0 1:4.4.0 + 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__udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.powerpc +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.powerpc @@ -0,0 +1,142 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_4.1.0 1:4.1.1 + __gcc_qdiv@GCC_4.1.0 1:4.1.1 + __gcc_qmul@GCC_4.1.0 1:4.1.1 + __gcc_qsub@GCC_4.1.0 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trampoline_setup@GCC_3.4.2 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.powerpcspe +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.powerpcspe @@ -0,0 +1,142 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_4.1.0 1:4.1.1 + __gcc_qdiv@GCC_4.1.0 1:4.1.1 + __gcc_qmul@GCC_4.1.0 1:4.1.1 + __gcc_qsub@GCC_4.1.0 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trampoline_setup@GCC_3.4.2 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.ppc64 +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.ppc64 @@ -0,0 +1,129 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_3.4.4 1:4.1.1 + __gcc_qdiv@GCC_3.4.4 1:4.1.1 + __gcc_qmul@GCC_3.4.4 1:4.1.1 + __gcc_qsub@GCC_3.4.4 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + _xlqadd@GCC_3.4 1:4.1.1 + _xlqdiv@GCC_3.4 1:4.1.1 + _xlqmul@GCC_3.4 1:4.1.1 + _xlqsub@GCC_3.4 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.ppc64el +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.ppc64el @@ -0,0 +1,130 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_3.4.4 1:4.1.1 + __gcc_qdiv@GCC_3.4.4 1:4.1.1 + __gcc_qmul@GCC_3.4.4 1:4.1.1 + __gcc_qsub@GCC_3.4.4 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trampoline_setup@GCC_3.4.2 1:4.8 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + _xlqadd@GCC_3.4 1:4.1.1 + _xlqdiv@GCC_3.4 1:4.1.1 + _xlqmul@GCC_3.4 1:4.1.1 + _xlqsub@GCC_3.4 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.s390 +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.s390 @@ -0,0 +1,104 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.s390x +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.s390x @@ -0,0 +1,110 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_4.1.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.1.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.sh4 +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.sh4 @@ -0,0 +1,129 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_4.8.0@GCC_4.8.0 1:4.8 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GCC_3.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GCC_3.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.sparc +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.sparc @@ -0,0 +1,105 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_LDBL_3.0@GCC_LDBL_3.0 1:4.2.1 + GCC_LDBL_4.0.0@GCC_LDBL_4.0.0 1:4.2.1 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_LDBL_4.0.0 1:4.2.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_LDBL_3.0 1:4.2.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_LDBL_3.0 1:4.2.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_LDBL_3.0 1:4.2.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_LDBL_4.0.0 1:4.2.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_LDBL_4.0.0 1:4.2.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgcc1.symbols.sparc64 +++ gcc-4.8-4.8.5/debian/libgcc1.symbols.sparc64 @@ -0,0 +1,109 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgcc2.symbols.m68k +++ gcc-4.8-4.8.5/debian/libgcc2.symbols.m68k @@ -0,0 +1,158 @@ +libgcc_s.so.2 libgcc2 #MINVER# + GCC_3.0@GCC_3.0 4.2.1 + GCC_3.3.1@GCC_3.3.1 4.2.1 + GCC_3.3.4@GCC_3.3.4 4.4.5 + GCC_3.3@GCC_3.3 4.2.1 + GCC_3.4.2@GCC_3.4.2 4.2.1 + GCC_3.4@GCC_3.4 4.2.1 + GCC_4.0.0@GCC_4.0.0 4.2.1 + GCC_4.2.0@GCC_4.2.0 4.2.1 + GCC_4.3.0@GCC_4.3.0 4.3.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 4.2.1 + _Unwind_Backtrace@GCC_3.3 4.2.1 + _Unwind_DeleteException@GCC_3.0 4.2.1 + _Unwind_FindEnclosingFunction@GCC_3.3 4.2.1 + _Unwind_Find_FDE@GCC_3.0 4.2.1 + _Unwind_ForcedUnwind@GCC_3.0 4.2.1 + _Unwind_GetCFA@GCC_3.3 4.2.1 + _Unwind_GetDataRelBase@GCC_3.0 4.2.1 + _Unwind_GetGR@GCC_3.0 4.2.1 + _Unwind_GetIP@GCC_3.0 4.2.1 + _Unwind_GetIPInfo@GCC_4.2.0 4.2.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 4.2.1 + _Unwind_GetRegionStart@GCC_3.0 4.2.1 + _Unwind_GetTextRelBase@GCC_3.0 4.2.1 + _Unwind_RaiseException@GCC_3.0 4.2.1 + _Unwind_Resume@GCC_3.0 4.2.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 4.2.1 + _Unwind_SetGR@GCC_3.0 4.2.1 + _Unwind_SetIP@GCC_3.0 4.2.1 + __absvdi2@GCC_3.0 4.2.1 + __absvsi2@GCC_3.0 4.2.1 + __adddf3@GCC_3.0 4.4.5 + __addsf3@GCC_3.0 4.4.5 + __addvdi3@GCC_3.0 4.2.1 + __addvsi3@GCC_3.0 4.2.1 + __addxf3@GCC_3.0 4.4.5 + __ashldi3@GCC_3.0 4.2.1 + __ashrdi3@GCC_3.0 4.2.1 + __bswapdi2@GCC_4.3.0 4.3.0 + __bswapsi2@GCC_4.3.0 4.3.0 + __clear_cache@GCC_3.0 4.2.1 + __clzdi2@GCC_3.4 4.2.1 + __clzsi2@GCC_3.4 4.2.1 + __cmpdi2@GCC_3.0 4.2.1 + __ctzdi2@GCC_3.4 4.2.1 + __ctzsi2@GCC_3.4 4.2.1 + __deregister_frame@GLIBC_2.0 4.2.1 + __deregister_frame_info@GLIBC_2.0 4.2.1 + __deregister_frame_info_bases@GCC_3.0 4.2.1 + __divdc3@GCC_4.0.0 4.2.1 + __divdf3@GCC_3.0 4.4.5 + __divdi3@GLIBC_2.0 4.2.1 + __divsc3@GCC_4.0.0 4.2.1 + __divsf3@GCC_3.0 4.4.5 + __divsi3@GCC_3.0 4.4.5 + __divxc3@GCC_4.0.0 4.2.1 + __divxf3@GCC_3.0 4.4.5 + __emutls_get_address@GCC_4.3.0 4.3.0 + __emutls_register_common@GCC_4.3.0 4.3.0 + __enable_execute_stack@GCC_3.4.2 4.2.1 + __eqdf2@GCC_3.0 4.4.5 + __eqsf2@GCC_3.0 4.4.5 + __eqxf2@GCC_3.0 4.4.5 + __extenddfxf2@GCC_3.0 4.4.5 + __extendsfdf2@GCC_3.0 4.4.5 + __extendsfxf2@GCC_3.0 4.4.5 + __ffsdi2@GCC_3.0 4.2.1 + __ffssi2@GCC_4.3.0 4.3.0 + __fixdfdi@GCC_3.0 4.2.1 + __fixdfsi@GCC_3.0 4.4.5 + __fixsfdi@GCC_3.0 4.2.1 + __fixsfsi@GCC_3.0 4.4.5 + __fixunsdfdi@GCC_3.0 4.2.1 + __fixunsdfsi@GCC_3.0 4.2.1 + __fixunssfdi@GCC_3.0 4.2.1 + __fixunssfsi@GCC_3.0 4.2.1 + __fixunsxfdi@GCC_3.0 4.2.1 + __fixunsxfsi@GCC_3.0 4.2.1 + __fixxfdi@GCC_3.0 4.2.1 + __fixxfsi@GCC_3.0 4.4.5 + __floatdidf@GCC_3.0 4.2.1 + __floatdisf@GCC_3.0 4.2.1 + __floatdixf@GCC_3.0 4.2.1 + __floatsidf@GCC_3.0 4.4.5 + __floatsisf@GCC_3.0 4.4.5 + __floatsixf@GCC_3.0 4.4.5 + __floatundidf@GCC_4.2.0 4.2.1 + __floatundisf@GCC_4.2.0 4.2.1 + __floatundixf@GCC_4.2.0 4.2.1 + __floatunsidf@GCC_4.2.0 4.4.5 + __floatunsisf@GCC_4.2.0 4.4.5 + __floatunsixf@GCC_4.2.0 4.4.5 + __frame_state_for@GLIBC_2.0 4.2.1 + __gcc_personality_v0@GCC_3.3.1 4.2.1 + __gedf2@GCC_3.0 4.4.5 + __gesf2@GCC_3.0 4.4.5 + __gexf2@GCC_3.0 4.4.5 + __gtdf2@GCC_3.0 4.4.5 + __gtsf2@GCC_3.0 4.4.5 + __gtxf2@GCC_3.0 4.4.5 + __ledf2@GCC_3.0 4.4.5 + __lesf2@GCC_3.0 4.4.5 + __lexf2@GCC_3.0 4.4.5 + __lshrdi3@GCC_3.0 4.2.1 + __ltdf2@GCC_3.0 4.4.5 + __ltsf2@GCC_3.0 4.4.5 + __ltxf2@GCC_3.0 4.4.5 + __moddi3@GLIBC_2.0 4.2.1 + __modsi3@GCC_3.0 4.4.5 + __muldc3@GCC_4.0.0 4.2.1 + __muldf3@GCC_3.0 4.4.5 + __muldi3@GCC_3.0 4.2.1 + __mulsc3@GCC_4.0.0 4.2.1 + __mulsf3@GCC_3.0 4.4.5 + __mulsi3@GCC_3.0 4.4.5 + __mulvdi3@GCC_3.0 4.2.1 + __mulvsi3@GCC_3.0 4.2.1 + __mulxc3@GCC_4.0.0 4.2.1 + __mulxf3@GCC_3.0 4.4.5 + __nedf2@GCC_3.0 4.4.5 + __negdf2@GCC_3.0 4.4.5 + __negdi2@GCC_3.0 4.2.1 + __negsf2@GCC_3.0 4.4.5 + __negvdi2@GCC_3.0 4.2.1 + __negvsi2@GCC_3.0 4.2.1 + __negxf2@GCC_3.0 4.4.5 + __nesf2@GCC_3.0 4.4.5 + __nexf2@GCC_3.0 4.4.5 + __paritydi2@GCC_3.4 4.2.1 + __paritysi2@GCC_3.4 4.2.1 + __popcountdi2@GCC_3.4 4.2.1 + __popcountsi2@GCC_3.4 4.2.1 + __powidf2@GCC_4.0.0 4.2.1 + __powisf2@GCC_4.0.0 4.2.1 + __powixf2@GCC_4.0.0 4.2.1 + __register_frame@GLIBC_2.0 4.2.1 + __register_frame_info@GLIBC_2.0 4.2.1 + __register_frame_info_bases@GCC_3.0 4.2.1 + __register_frame_info_table@GLIBC_2.0 4.2.1 + __register_frame_info_table_bases@GCC_3.0 4.2.1 + __register_frame_table@GLIBC_2.0 4.2.1 + __subdf3@GCC_3.0 4.4.5 + __subsf3@GCC_3.0 4.4.5 + __subvdi3@GCC_3.0 4.2.1 + __subvsi3@GCC_3.0 4.2.1 + __subxf3@GCC_3.0 4.4.5 + __truncdfsf2@GCC_3.0 4.4.5 + __truncxfdf2@GCC_3.0 4.4.5 + __truncxfsf2@GCC_3.0 4.4.5 + __ucmpdi2@GCC_3.0 4.2.1 + __udivdi3@GLIBC_2.0 4.2.1 + __udivmoddi4@GCC_3.0 4.2.1 + __udivsi3@GCC_3.0 4.4.5 + __umoddi3@GLIBC_2.0 4.2.1 + __umodsi3@GCC_3.0 4.4.5 + __unorddf2@GCC_3.3.4 4.4.5 + __unordsf2@GCC_3.3.4 4.4.5 --- gcc-4.8-4.8.5.orig/debian/libgcc4.symbols.hppa +++ gcc-4.8-4.8.5/debian/libgcc4.symbols.hppa @@ -0,0 +1,94 @@ +libgcc_s.so.4 libgcc4 #MINVER# + GCC_3.0@GCC_3.0 4.1.1 + GCC_3.3.1@GCC_3.3.1 4.1.1 + GCC_3.3@GCC_3.3 4.1.1 + GCC_3.4.2@GCC_3.4.2 4.1.1 + GCC_3.4@GCC_3.4 4.1.1 + GCC_4.0.0@GCC_4.0.0 4.1.1 + GCC_4.2.0@GCC_4.2.0 4.1.1 + GCC_4.3.0@GCC_4.3.0 4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 4.1.1 + _Unwind_Backtrace@GCC_3.3 4.1.1 + _Unwind_DeleteException@GCC_3.0 4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 4.1.1 + _Unwind_Find_FDE@GCC_3.0 4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 4.1.1 + _Unwind_GetCFA@GCC_3.3 4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 4.1.1 + _Unwind_GetGR@GCC_3.0 4.1.1 + _Unwind_GetIP@GCC_3.0 4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 4.1.1 + _Unwind_GetRegionStart@GCC_3.0 4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 4.1.1 + _Unwind_RaiseException@GCC_3.0 4.1.1 + _Unwind_Resume@GCC_3.0 4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 4.1.1 + _Unwind_SetGR@GCC_3.0 4.1.1 + _Unwind_SetIP@GCC_3.0 4.1.1 + __absvdi2@GCC_3.0 4.1.1 + __absvsi2@GCC_3.0 4.1.1 + __addvdi3@GCC_3.0 4.1.1 + __addvsi3@GCC_3.0 4.1.1 + __ashldi3@GCC_3.0 4.1.1 + __ashrdi3@GCC_3.0 4.1.1 + __bswapdi2@GCC_4.3.0 4.3 + __bswapsi2@GCC_4.3.0 4.3 + __clear_cache@GCC_3.0 4.1.1 + __clzdi2@GCC_3.4 4.1.1 + __clzsi2@GCC_3.4 4.1.1 + __cmpdi2@GCC_3.0 4.1.1 + __ctzdi2@GCC_3.4 4.1.1 + __ctzsi2@GCC_3.4 4.1.1 + __deregister_frame@GLIBC_2.0 4.1.1 + __deregister_frame_info@GLIBC_2.0 4.1.1 + __deregister_frame_info_bases@GCC_3.0 4.1.1 + __divdc3@GCC_4.0.0 4.1.1 + __divdi3@GLIBC_2.0 4.1.1 + __divsc3@GCC_4.0.0 4.1.1 + __emutls_get_address@GCC_4.3.0 4.3 + __emutls_register_common@GCC_4.3.0 4.3 + __enable_execute_stack@GCC_3.4.2 4.1.1 + __ffsdi2@GCC_3.0 4.1.1 + __ffssi2@GCC_4.3.0 4.3 + __fixdfdi@GCC_3.0 4.1.1 + __fixsfdi@GCC_3.0 4.1.1 + __fixunsdfdi@GCC_3.0 4.1.1 + __fixunsdfsi@GCC_3.0 4.1.1 + __fixunssfdi@GCC_3.0 4.1.1 + __fixunssfsi@GCC_3.0 4.1.1 + __floatdidf@GCC_3.0 4.1.1 + __floatdisf@GCC_3.0 4.1.1 + __floatundidf@GCC_4.2.0 4.2.1 + __floatundisf@GCC_4.2.0 4.2.1 + __frame_state_for@GLIBC_2.0 4.1.1 + __gcc_personality_v0@GCC_3.3.1 4.1.1 + __lshrdi3@GCC_3.0 4.1.1 + __moddi3@GLIBC_2.0 4.1.1 + __muldc3@GCC_4.0.0 4.1.1 + __muldi3@GCC_3.0 4.1.1 + __mulsc3@GCC_4.0.0 4.1.1 + __mulvdi3@GCC_3.0 4.1.1 + __mulvsi3@GCC_3.0 4.1.1 + __negdi2@GCC_3.0 4.1.1 + __negvdi2@GCC_3.0 4.1.1 + __negvsi2@GCC_3.0 4.1.1 + __paritydi2@GCC_3.4 4.1.1 + __paritysi2@GCC_3.4 4.1.1 + __popcountdi2@GCC_3.4 4.1.1 + __popcountsi2@GCC_3.4 4.1.1 + __powidf2@GCC_4.0.0 4.1.1 + __powisf2@GCC_4.0.0 4.1.1 + __register_frame@GLIBC_2.0 4.1.1 + __register_frame_info@GLIBC_2.0 4.1.1 + __register_frame_info_bases@GCC_3.0 4.1.1 + __register_frame_info_table@GLIBC_2.0 4.1.1 + __register_frame_info_table_bases@GCC_3.0 4.1.1 + __register_frame_table@GLIBC_2.0 4.1.1 + __subvdi3@GCC_3.0 4.1.1 + __subvsi3@GCC_3.0 4.1.1 + __ucmpdi2@GCC_3.0 4.1.1 + __udivdi3@GLIBC_2.0 4.1.1 + __udivmoddi4@GCC_3.0 4.1.1 + __umoddi3@GLIBC_2.0 4.1.1 --- gcc-4.8-4.8.5.orig/debian/libgccLC.postinst +++ gcc-4.8-4.8.5/debian/libgccLC.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libgcc@LC@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/libgcj-common.postinst +++ gcc-4.8-4.8.5/debian/libgcj-common.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libgcj-common + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcj-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/libgcj-common.preinst +++ gcc-4.8-4.8.5/debian/libgcj-common.preinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + upgrade|install) + if [ -n "$2" ] && [ -h /usr/share/doc/libgcj-common ] \ + && dpkg --compare-versions "$2" lt 1:4.0.2-10 + then + rm -f /usr/share/doc/libgcj-common + fi +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/libgcj-doc.doc-base +++ gcc-4.8-4.8.5/debian/libgcj-doc.doc-base @@ -0,0 +1,10 @@ +Document: libgcj-doc +Title: The GNU LibGCJ Classpath library +Author: Various +Abstract: Autogenerated documentation describing the libgcj + library (GCC 4.8), based on the classpath library. +Section: Programming/Java + +Format: html +Index: /usr/share/doc/gcc-4.8-base/api/index.html +Files: /usr/share/doc/gcc-4.8-base/api/*.html --- gcc-4.8-4.8.5.orig/debian/libgcjGCJ-awt.overrides +++ gcc-4.8-4.8.5/debian/libgcjGCJ-awt.overrides @@ -0,0 +1,2 @@ +# pick up the exact version, in case another gcj version is installed +libgcj@GCJ@-awt binary: binary-or-shlib-defines-rpath --- gcc-4.8-4.8.5.orig/debian/libgcjGCJ-dev.overrides +++ gcc-4.8-4.8.5/debian/libgcjGCJ-dev.overrides @@ -0,0 +1 @@ +libgcj@GCJ@-dev binary: library-not-linked-against-libc --- gcc-4.8-4.8.5.orig/debian/libgcjGCJ.overrides +++ gcc-4.8-4.8.5/debian/libgcjGCJ.overrides @@ -0,0 +1,9 @@ +# pick up the exact version, in case another gcj version is installed +libgcj@GCJ@ binary: binary-or-shlib-defines-rpath + +# intended +libgcj@GCJ@ binary: unused-shlib-entry-in-control-file +libgcj@GCJ@ binary: shlibs-declares-dependency-on-other-package + +# keep patched ltdl copy +libgcj@GCJ@ binary: embedded-library --- gcc-4.8-4.8.5.orig/debian/libgcjLGCJ.postinst +++ gcc-4.8-4.8.5/debian/libgcjLGCJ.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libgcj@GCJ@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf /usr/share/doc/libgcj@GCJ@ + ln -s gcj-@BV@-base /usr/share/doc/libgcj@GCJ@ + fi +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/libgcjLGCJ.postrm +++ gcc-4.8-4.8.5/debian/libgcjLGCJ.postrm @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + remove|purge) + # only purge if no other library is installed. + if [ -z "$(ls /usr/lib/libgcj.so.@GCJ@* 2>/dev/null)" ]; then + rm -f /var/lib/gcj-@BV@/classmap.db + rmdir --ignore-fail-on-non-empty /var/lib/gcj-@BV@ 2>/dev/null || true + fi +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.10 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.10 @@ -0,0 +1,98 @@ + __iso_c_binding_c_f_pointer_c10@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_r10@GFORTRAN_1.0 4.3 + _gfortran_arandom_r10@GFORTRAN_1.0 4.3 + _gfortran_bessel_jn_r10@GFORTRAN_1.4 4.6 + _gfortran_bessel_yn_r10@GFORTRAN_1.4 4.6 + _gfortran_cpu_time_10@GFORTRAN_1.0 4.3 + _gfortran_erfc_scaled_r10@GFORTRAN_1.1 4.4.0 + _gfortran_exponent_r10@GFORTRAN_1.0 4.3 + _gfortran_fraction_r10@GFORTRAN_1.0 4.3 + _gfortran_matmul_c10@GFORTRAN_1.0 4.3 + _gfortran_matmul_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_maxval_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_minval_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxval_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mminval_r10@GFORTRAN_1.0 4.3 + _gfortran_mproduct_c10@GFORTRAN_1.0 4.3 + _gfortran_mproduct_r10@GFORTRAN_1.0 4.3 + _gfortran_msum_c10@GFORTRAN_1.0 4.3 + _gfortran_msum_r10@GFORTRAN_1.0 4.3 + _gfortran_nearest_r10@GFORTRAN_1.0 4.3 + _gfortran_pow_c10_i4@GFORTRAN_1.0 4.3 + _gfortran_pow_c10_i8@GFORTRAN_1.0 4.3 + _gfortran_pow_r10_i8@GFORTRAN_1.0 4.3 + _gfortran_product_c10@GFORTRAN_1.0 4.3 + _gfortran_product_r10@GFORTRAN_1.0 4.3 + _gfortran_random_r10@GFORTRAN_1.0 4.3 + _gfortran_reshape_c10@GFORTRAN_1.0 4.3 + _gfortran_reshape_r10@GFORTRAN_1.0 4.3 + _gfortran_rrspacing_r10@GFORTRAN_1.0 4.3 + _gfortran_set_exponent_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxval_r10@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_sminval_r10@GFORTRAN_1.0 4.3 + _gfortran_spacing_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__acos_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__acosh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__aimag_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__aint_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__anint_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__asin_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__asinh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__atan2_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__atan_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__atanh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__conjg_10@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__cosh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__log10_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__log_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__log_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_4_10@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_10@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r10@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c10@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r10@GFORTRAN_1.0 4.3 + _gfortran_ssum_c10@GFORTRAN_1.0 4.3 + _gfortran_ssum_r10@GFORTRAN_1.0 4.3 + _gfortran_sum_c10@GFORTRAN_1.0 4.3 + _gfortran_sum_r10@GFORTRAN_1.0 4.3 + _gfortran_transpose_c10@GFORTRAN_1.0 4.3 + _gfortran_transpose_r10@GFORTRAN_1.0 4.3 --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.16 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.16 @@ -0,0 +1,199 @@ + __iso_c_binding_c_f_pointer_i16@GFORTRAN_1.0 4.3 + _gfortran_all_l16@GFORTRAN_1.0 4.3 + _gfortran_any_l16@GFORTRAN_1.0 4.3 + _gfortran_count_16_l@GFORTRAN_1.0 4.3 + _gfortran_cshift0_16@GFORTRAN_1.1 4.4.0 + _gfortran_cshift0_16_char4@GFORTRAN_1.4 4.6 + _gfortran_cshift0_16_char@GFORTRAN_1.1 4.4.0 + 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_gfortran_eoshift2_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift3_16@GFORTRAN_1.0 4.3 + _gfortran_eoshift3_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift3_16_char@GFORTRAN_1.0 4.3 + _gfortran_iall_i16@GFORTRAN_1.4 4.6 + _gfortran_iany_i16@GFORTRAN_1.4 4.6 + _gfortran_iparity_i16@GFORTRAN_1.4 4.6 + _gfortran_ishftc16@GFORTRAN_1.0 4.3 + _gfortran_matmul_i16@GFORTRAN_1.0 4.3 + _gfortran_matmul_l16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_maxval_i16@GFORTRAN_1.0 4.3 + _gfortran_miall_i16@GFORTRAN_1.4 4.6 + _gfortran_miany_i16@GFORTRAN_1.4 4.6 + _gfortran_minloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_minloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_minloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_minval_i16@GFORTRAN_1.0 4.3 + _gfortran_miparity_i16@GFORTRAN_1.4 4.6 + _gfortran_mmaxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxval_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mminval_i16@GFORTRAN_1.0 4.3 + _gfortran_mproduct_i16@GFORTRAN_1.0 4.3 + _gfortran_msum_i16@GFORTRAN_1.0 4.3 + _gfortran_parity_l16@GFORTRAN_1.4 4.6 + _gfortran_pow_c16_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_c4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_c8_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i4@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i8@GFORTRAN_1.0 4.3 + _gfortran_pow_i4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i8_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r16_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r8_i16@GFORTRAN_1.0 4.3 + _gfortran_product_i16@GFORTRAN_1.0 4.3 + _gfortran_reshape_16@GFORTRAN_1.0 4.3 + _gfortran_shape_16@GFORTRAN_1.0 4.3 + _gfortran_siall_i16@GFORTRAN_1.4 4.6 + _gfortran_siany_i16@GFORTRAN_1.4 4.6 + _gfortran_siparity_i16@GFORTRAN_1.4 4.6 + _gfortran_smaxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxval_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_sminval_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__char_1_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__index_1_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__len_1_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_16_16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_16_4@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_16_8@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_i16@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i16@GFORTRAN_1.0 4.3 + _gfortran_ssum_i16@GFORTRAN_1.0 4.3 + _gfortran_sum_i16@GFORTRAN_1.0 4.3 + _gfortran_transpose_i16@GFORTRAN_1.0 4.3 --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.64 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.64 @@ -0,0 +1,2 @@ + _gfortran_clz128@GFORTRAN_1.2 4.4.0 + _gfortran_ctz128@GFORTRAN_1.2 4.4.0 --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.alpha +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.alpha @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.amd64 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.amd64 @@ -0,0 +1,7 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.qf" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.arm64 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.arm64 @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.64" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.armel +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.armel @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.armhf +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.armhf @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.common +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.common @@ -0,0 +1,806 @@ + F2C_1.0@F2C_1.0 4.3 + GFORTRAN_1.0@GFORTRAN_1.0 4.3 + GFORTRAN_1.1@GFORTRAN_1.1 4.4.0 + GFORTRAN_1.2@GFORTRAN_1.2 4.4.0 + GFORTRAN_1.3@GFORTRAN_1.3 4.6 + GFORTRAN_1.4@GFORTRAN_1.4 4.6 + GFORTRAN_1.5@GFORTRAN_1.5 4.8 + GFORTRAN_C99_1.0@GFORTRAN_C99_1.0 4.3 + GFORTRAN_C99_1.1@GFORTRAN_C99_1.1 4.5 + __iso_c_binding_c_f_pointer@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_c4@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_c8@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_d0@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_i1@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_i2@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_i4@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_i8@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_l1@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_l2@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_l4@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_l8@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_r4@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_r8@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_s0@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_u0@GFORTRAN_1.0 4.3 + _gfortran_abort@GFORTRAN_1.0 4.3 + _gfortran_access_func@GFORTRAN_1.0 4.3 + _gfortran_adjustl@GFORTRAN_1.0 4.3 + _gfortran_adjustl_char4@GFORTRAN_1.1 4.4.0 + _gfortran_adjustr@GFORTRAN_1.0 4.3 + _gfortran_adjustr_char4@GFORTRAN_1.1 4.4.0 + _gfortran_alarm_sub_i4@GFORTRAN_1.0 4.3 + _gfortran_alarm_sub_i8@GFORTRAN_1.0 4.3 + _gfortran_alarm_sub_int_i4@GFORTRAN_1.0 4.3 + _gfortran_alarm_sub_int_i8@GFORTRAN_1.0 4.3 + _gfortran_all_l1@GFORTRAN_1.0 4.3 + _gfortran_all_l2@GFORTRAN_1.0 4.3 + _gfortran_all_l4@GFORTRAN_1.0 4.3 + _gfortran_all_l8@GFORTRAN_1.0 4.3 + _gfortran_any_l1@GFORTRAN_1.0 4.3 + _gfortran_any_l2@GFORTRAN_1.0 4.3 + _gfortran_any_l4@GFORTRAN_1.0 4.3 + _gfortran_any_l8@GFORTRAN_1.0 4.3 + _gfortran_arandom_r4@GFORTRAN_1.0 4.3 + _gfortran_arandom_r8@GFORTRAN_1.0 4.3 + _gfortran_associated@GFORTRAN_1.0 4.3 + _gfortran_backtrace@GFORTRAN_1.5 4.8 + _gfortran_bessel_jn_r4@GFORTRAN_1.4 4.6 + _gfortran_bessel_jn_r8@GFORTRAN_1.4 4.6 + _gfortran_bessel_yn_r4@GFORTRAN_1.4 4.6 + _gfortran_bessel_yn_r8@GFORTRAN_1.4 4.6 + _gfortran_chdir_i4@GFORTRAN_1.0 4.3 + _gfortran_chdir_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_chdir_i8@GFORTRAN_1.0 4.3 + _gfortran_chdir_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_chmod_func@GFORTRAN_1.0 4.3 + _gfortran_chmod_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_chmod_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_compare_string@GFORTRAN_1.0 4.3 + _gfortran_compare_string_char4@GFORTRAN_1.1 4.4.0 + _gfortran_concat_string@GFORTRAN_1.0 4.3 + _gfortran_concat_string_char4@GFORTRAN_1.1 4.4.0 + _gfortran_convert_char1_to_char4@GFORTRAN_1.1 4.4.0 + _gfortran_convert_char4_to_char1@GFORTRAN_1.1 4.4.0 + _gfortran_count_1_l@GFORTRAN_1.0 4.3 + _gfortran_count_2_l@GFORTRAN_1.0 4.3 + _gfortran_count_4_l@GFORTRAN_1.0 4.3 + _gfortran_count_8_l@GFORTRAN_1.0 4.3 + _gfortran_cpu_time_4@GFORTRAN_1.0 4.3 + _gfortran_cpu_time_8@GFORTRAN_1.0 4.3 + _gfortran_cshift0_1@GFORTRAN_1.0 4.3 + _gfortran_cshift0_1_char4@GFORTRAN_1.1 4.4.0 + _gfortran_cshift0_1_char@GFORTRAN_1.0 4.3 + _gfortran_cshift0_2@GFORTRAN_1.0 4.3 + _gfortran_cshift0_2_char4@GFORTRAN_1.1 4.4.0 + _gfortran_cshift0_2_char@GFORTRAN_1.0 4.3 + _gfortran_cshift0_4@GFORTRAN_1.0 4.3 + _gfortran_cshift0_4_char4@GFORTRAN_1.1 4.4.0 + _gfortran_cshift0_4_char@GFORTRAN_1.0 4.3 + _gfortran_cshift0_8@GFORTRAN_1.0 4.3 + _gfortran_cshift0_8_char4@GFORTRAN_1.1 4.4.0 + _gfortran_cshift0_8_char@GFORTRAN_1.0 4.3 + _gfortran_cshift1_4@GFORTRAN_1.0 4.3 + _gfortran_cshift1_4_char4@GFORTRAN_1.1 4.4.0 + _gfortran_cshift1_4_char@GFORTRAN_1.0 4.3 + _gfortran_cshift1_8@GFORTRAN_1.0 4.3 + _gfortran_cshift1_8_char4@GFORTRAN_1.1 4.4.0 + _gfortran_cshift1_8_char@GFORTRAN_1.0 4.3 + _gfortran_ctime@GFORTRAN_1.0 4.3 + _gfortran_ctime_sub@GFORTRAN_1.0 4.3 + _gfortran_date_and_time@GFORTRAN_1.0 4.3 + _gfortran_dtime@GFORTRAN_1.0 4.3 + _gfortran_dtime_sub@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_1@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_1_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift0_1_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_2@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_2_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift0_2_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_4@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_4_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift0_4_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_8@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_8_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift0_8_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift1_4@GFORTRAN_1.0 4.3 + _gfortran_eoshift1_4_char4@GFORTRAN_1.1 4.4.0 + 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_gfortran_specific__nint_4_8@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_4@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_8@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r8@GFORTRAN_1.0 4.3 + _gfortran_spread@GFORTRAN_1.0 4.3 + _gfortran_spread_char4@GFORTRAN_1.1 4.4.0 + _gfortran_spread_char4_scalar@GFORTRAN_1.1 4.4.0 + _gfortran_spread_char@GFORTRAN_1.0 4.3 + _gfortran_spread_char_scalar@GFORTRAN_1.0 4.3 + _gfortran_spread_scalar@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c4@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c8@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i1@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i2@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i4@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i8@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r4@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r8@GFORTRAN_1.0 4.3 + _gfortran_srand@GFORTRAN_1.0 4.3 + _gfortran_ssum_c4@GFORTRAN_1.0 4.3 + _gfortran_ssum_c8@GFORTRAN_1.0 4.3 + _gfortran_ssum_i1@GFORTRAN_1.0 4.3 + _gfortran_ssum_i2@GFORTRAN_1.0 4.3 + _gfortran_ssum_i4@GFORTRAN_1.0 4.3 + _gfortran_ssum_i8@GFORTRAN_1.0 4.3 + _gfortran_ssum_r4@GFORTRAN_1.0 4.3 + _gfortran_ssum_r8@GFORTRAN_1.0 4.3 + _gfortran_st_backspace@GFORTRAN_1.0 4.3 + _gfortran_st_close@GFORTRAN_1.0 4.3 + _gfortran_st_endfile@GFORTRAN_1.0 4.3 + _gfortran_st_flush@GFORTRAN_1.0 4.3 + _gfortran_st_inquire@GFORTRAN_1.0 4.3 + _gfortran_st_iolength@GFORTRAN_1.0 4.3 + _gfortran_st_iolength_done@GFORTRAN_1.0 4.3 + _gfortran_st_open@GFORTRAN_1.0 4.3 + _gfortran_st_read@GFORTRAN_1.0 4.3 + _gfortran_st_read_done@GFORTRAN_1.0 4.3 + _gfortran_st_rewind@GFORTRAN_1.0 4.3 + _gfortran_st_set_nml_var@GFORTRAN_1.0 4.3 + _gfortran_st_set_nml_var_dim@GFORTRAN_1.0 4.3 + _gfortran_st_wait@GFORTRAN_1.1 4.4.0 + _gfortran_st_write@GFORTRAN_1.0 4.3 + _gfortran_st_write_done@GFORTRAN_1.0 4.3 + _gfortran_stat_i4@GFORTRAN_1.0 4.3 + _gfortran_stat_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_stat_i8@GFORTRAN_1.0 4.3 + _gfortran_stat_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_stop_numeric@GFORTRAN_1.0 4.3 + _gfortran_stop_numeric_f08@GFORTRAN_1.4 4.6 + _gfortran_stop_string@GFORTRAN_1.0 4.3 + _gfortran_store_exe_path@GFORTRAN_1.0 4.3 + _gfortran_string_index@GFORTRAN_1.0 4.3 + _gfortran_string_index_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_len_trim@GFORTRAN_1.0 4.3 + _gfortran_string_len_trim_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_minmax@GFORTRAN_1.0 4.3 + _gfortran_string_minmax_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_scan@GFORTRAN_1.0 4.3 + _gfortran_string_scan_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_trim@GFORTRAN_1.0 4.3 + _gfortran_string_trim_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_verify@GFORTRAN_1.0 4.3 + _gfortran_string_verify_char4@GFORTRAN_1.1 4.4.0 + _gfortran_sum_c4@GFORTRAN_1.0 4.3 + _gfortran_sum_c8@GFORTRAN_1.0 4.3 + _gfortran_sum_i1@GFORTRAN_1.0 4.3 + _gfortran_sum_i2@GFORTRAN_1.0 4.3 + _gfortran_sum_i4@GFORTRAN_1.0 4.3 + _gfortran_sum_i8@GFORTRAN_1.0 4.3 + _gfortran_sum_r4@GFORTRAN_1.0 4.3 + _gfortran_sum_r8@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i4@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i8@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_system@GFORTRAN_1.0 4.3 + _gfortran_system_clock_4@GFORTRAN_1.0 4.3 + _gfortran_system_clock_8@GFORTRAN_1.0 4.3 + _gfortran_system_sub@GFORTRAN_1.0 4.3 + _gfortran_time8_func@GFORTRAN_1.0 4.3 + _gfortran_time_func@GFORTRAN_1.0 4.3 + _gfortran_transfer_array@GFORTRAN_1.0 4.3 + _gfortran_transfer_array_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_character@GFORTRAN_1.0 4.3 + _gfortran_transfer_character_wide@GFORTRAN_1.1 4.4.0 + _gfortran_transfer_character_wide_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_character_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex@GFORTRAN_1.0 4.3 + _gfortran_transfer_complex_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_integer@GFORTRAN_1.0 4.3 + _gfortran_transfer_integer_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_logical@GFORTRAN_1.0 4.3 + _gfortran_transfer_logical_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real@GFORTRAN_1.0 4.3 + _gfortran_transfer_real_write@GFORTRAN_1.4 4.6 + _gfortran_transpose@GFORTRAN_1.0 4.3 + _gfortran_transpose_c4@GFORTRAN_1.0 4.3 + _gfortran_transpose_c8@GFORTRAN_1.0 4.3 + _gfortran_transpose_char4@GFORTRAN_1.1 4.4.0 + _gfortran_transpose_char@GFORTRAN_1.0 4.3 + _gfortran_transpose_i4@GFORTRAN_1.0 4.3 + _gfortran_transpose_i8@GFORTRAN_1.0 4.3 + _gfortran_transpose_r4@GFORTRAN_1.0 4.3 + _gfortran_transpose_r8@GFORTRAN_1.0 4.3 + _gfortran_ttynam@GFORTRAN_1.0 4.3 + _gfortran_ttynam_sub@GFORTRAN_1.0 4.3 + _gfortran_umask_i4@GFORTRAN_1.0 4.3 + _gfortran_umask_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_umask_i8@GFORTRAN_1.0 4.3 + _gfortran_umask_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_unlink@GFORTRAN_1.0 4.3 + _gfortran_unlink_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_unlink_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_unpack0@GFORTRAN_1.0 4.3 + _gfortran_unpack0_char4@GFORTRAN_1.1 4.4.0 + _gfortran_unpack0_char@GFORTRAN_1.0 4.3 + _gfortran_unpack1@GFORTRAN_1.0 4.3 + _gfortran_unpack1_char4@GFORTRAN_1.1 4.4.0 + _gfortran_unpack1_char@GFORTRAN_1.0 4.3 --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.hurd-i386 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.hurd-i386 @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.i386 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.i386 @@ -0,0 +1,9 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16.powerpc" + _gfortran_norm2_r10@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128_write@GFORTRAN_1.4 4.6 --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.ia64 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.ia64 @@ -0,0 +1,7 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.64" +#include "libgfortran3.symbols.qf" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.kfreebsd-amd64 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.kfreebsd-amd64 @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.kfreebsd-i386 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.kfreebsd-i386 @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.lpia +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.lpia @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.mips +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.mips @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.mipsel +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.mipsel @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.powerpc +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.powerpc @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.powerpcspe +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.powerpcspe @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.ppc64 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.ppc64 @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.ppc64el +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.ppc64el @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.qf +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.qf @@ -0,0 +1,16 @@ + _gfortran_maxloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_maxloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_minloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_minloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mmaxloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mmaxloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mminloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mminloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_smaxloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_smaxloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_sminloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_sminloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_transfer_complex128@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128_write@GFORTRAN_1.4 4.6 --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.s390 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.s390 @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.s390x +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.s390x @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.sh4 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.sh4 @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.sparc +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.sparc @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.8-4.8.5.orig/debian/libgfortran3.symbols.sparc64 +++ gcc-4.8-4.8.5/debian/libgfortran3.symbols.sparc64 @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.8-4.8.5.orig/debian/libgnat-BV.overrides +++ gcc-4.8-4.8.5/debian/libgnat-BV.overrides @@ -0,0 +1 @@ +libgnat-@BV@ binary: package-name-doesnt-match-sonames --- gcc-4.8-4.8.5.orig/debian/libgnatprjBV.overrides +++ gcc-4.8-4.8.5/debian/libgnatprjBV.overrides @@ -0,0 +1 @@ +libgnatprj@BV@ binary: missing-dependency-on-libc --- gcc-4.8-4.8.5.orig/debian/libgnatvsnBV.overrides +++ gcc-4.8-4.8.5/debian/libgnatvsnBV.overrides @@ -0,0 +1 @@ +libgnatvsn@BV@ binary: missing-dependency-on-libc --- gcc-4.8-4.8.5.orig/debian/libgomp1.symbols +++ gcc-4.8-4.8.5/debian/libgomp1.symbols @@ -0,0 +1,4 @@ +libgomp.so.1 libgomp1 #MINVER# +#include "libgomp1.symbols.common" + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 --- gcc-4.8-4.8.5.orig/debian/libgomp1.symbols.common +++ gcc-4.8-4.8.5/debian/libgomp1.symbols.common @@ -0,0 +1,159 @@ + GOMP_1.0@GOMP_1.0 4.2.1 + GOMP_2.0@GOMP_2.0 4.4 + GOMP_3.0@GOMP_3.0 4.7 + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 + GOMP_barrier@GOMP_1.0 4.2.1 + GOMP_critical_end@GOMP_1.0 4.2.1 + GOMP_critical_name_end@GOMP_1.0 4.2.1 + GOMP_critical_name_start@GOMP_1.0 4.2.1 + GOMP_critical_start@GOMP_1.0 4.2.1 + GOMP_loop_dynamic_next@GOMP_1.0 4.2.1 + GOMP_loop_dynamic_start@GOMP_1.0 4.2.1 + GOMP_loop_end@GOMP_1.0 4.2.1 + GOMP_loop_end_nowait@GOMP_1.0 4.2.1 + GOMP_loop_guided_next@GOMP_1.0 4.2.1 + GOMP_loop_guided_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_dynamic_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_dynamic_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_guided_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_guided_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_runtime_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_runtime_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_static_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_static_start@GOMP_1.0 4.2.1 + GOMP_loop_runtime_next@GOMP_1.0 4.2.1 + GOMP_loop_runtime_start@GOMP_1.0 4.2.1 + GOMP_loop_static_next@GOMP_1.0 4.2.1 + GOMP_loop_static_start@GOMP_1.0 4.2.1 + GOMP_loop_ull_dynamic_next@GOMP_2.0 4.4 + GOMP_loop_ull_dynamic_start@GOMP_2.0 4.4 + GOMP_loop_ull_guided_next@GOMP_2.0 4.4 + GOMP_loop_ull_guided_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_dynamic_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_dynamic_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_guided_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_guided_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_runtime_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_runtime_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_static_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_static_start@GOMP_2.0 4.4 + GOMP_loop_ull_runtime_next@GOMP_2.0 4.4 + GOMP_loop_ull_runtime_start@GOMP_2.0 4.4 + GOMP_loop_ull_static_next@GOMP_2.0 4.4 + GOMP_loop_ull_static_start@GOMP_2.0 4.4 + GOMP_ordered_end@GOMP_1.0 4.2.1 + GOMP_ordered_start@GOMP_1.0 4.2.1 + GOMP_parallel_end@GOMP_1.0 4.2.1 + GOMP_parallel_loop_dynamic_start@GOMP_1.0 4.2.1 + GOMP_parallel_loop_guided_start@GOMP_1.0 4.2.1 + GOMP_parallel_loop_runtime_start@GOMP_1.0 4.2.1 + GOMP_parallel_loop_static_start@GOMP_1.0 4.2.1 + GOMP_parallel_sections_start@GOMP_1.0 4.2.1 + GOMP_parallel_start@GOMP_1.0 4.2.1 + GOMP_sections_end@GOMP_1.0 4.2.1 + GOMP_sections_end_nowait@GOMP_1.0 4.2.1 + GOMP_sections_next@GOMP_1.0 4.2.1 + GOMP_sections_start@GOMP_1.0 4.2.1 + GOMP_single_copy_end@GOMP_1.0 4.2.1 + GOMP_single_copy_start@GOMP_1.0 4.2.1 + GOMP_single_start@GOMP_1.0 4.2.1 + GOMP_task@GOMP_2.0 4.4 + GOMP_taskwait@GOMP_2.0 4.4 + GOMP_taskyield@GOMP_3.0 4.7 + OMP_1.0@OMP_1.0 4.2.1 + OMP_2.0@OMP_2.0 4.2.1 + OMP_3.0@OMP_3.0 4.4 + OMP_3.1@OMP_3.1 4.7 + omp_destroy_lock@OMP_1.0 4.2.1 + omp_destroy_lock@OMP_3.0 4.4 + omp_destroy_lock_@OMP_1.0 4.2.1 + omp_destroy_lock_@OMP_3.0 4.4 + omp_destroy_nest_lock@OMP_1.0 4.2.1 + omp_destroy_nest_lock@OMP_3.0 4.4 + omp_destroy_nest_lock_@OMP_1.0 4.2.1 + omp_destroy_nest_lock_@OMP_3.0 4.4 + omp_get_active_level@OMP_3.0 4.4 + omp_get_active_level_@OMP_3.0 4.4 + omp_get_ancestor_thread_num@OMP_3.0 4.4 + omp_get_ancestor_thread_num_8_@OMP_3.0 4.4 + omp_get_ancestor_thread_num_@OMP_3.0 4.4 + omp_get_dynamic@OMP_1.0 4.2.1 + omp_get_dynamic_@OMP_1.0 4.2.1 + omp_get_level@OMP_3.0 4.4 + omp_get_level_@OMP_3.0 4.4 + omp_get_max_active_levels@OMP_3.0 4.4 + omp_get_max_active_levels_@OMP_3.0 4.4 + omp_get_max_threads@OMP_1.0 4.2.1 + omp_get_max_threads_@OMP_1.0 4.2.1 + omp_get_nested@OMP_1.0 4.2.1 + omp_get_nested_@OMP_1.0 4.2.1 + omp_get_num_procs@OMP_1.0 4.2.1 + omp_get_num_procs_@OMP_1.0 4.2.1 + omp_get_num_threads@OMP_1.0 4.2.1 + omp_get_num_threads_@OMP_1.0 4.2.1 + omp_get_schedule@OMP_3.0 4.4 + omp_get_schedule_8_@OMP_3.0 4.4 + omp_get_schedule_@OMP_3.0 4.4 + omp_get_team_size@OMP_3.0 4.4 + omp_get_team_size_8_@OMP_3.0 4.4 + omp_get_team_size_@OMP_3.0 4.4 + omp_get_thread_limit@OMP_3.0 4.4 + omp_get_thread_limit_@OMP_3.0 4.4 + omp_get_thread_num@OMP_1.0 4.2.1 + omp_get_thread_num_@OMP_1.0 4.2.1 + omp_get_wtick@OMP_2.0 4.2.1 + omp_get_wtick_@OMP_2.0 4.2.1 + omp_get_wtime@OMP_2.0 4.2.1 + omp_get_wtime_@OMP_2.0 4.2.1 + omp_in_final@OMP_3.1 4.7 + omp_in_final_@OMP_3.1 4.7 + omp_in_parallel@OMP_1.0 4.2.1 + omp_in_parallel_@OMP_1.0 4.2.1 + omp_init_lock@OMP_1.0 4.2.1 + omp_init_lock@OMP_3.0 4.4 + omp_init_lock_@OMP_1.0 4.2.1 + omp_init_lock_@OMP_3.0 4.4 + omp_init_nest_lock@OMP_1.0 4.2.1 + omp_init_nest_lock@OMP_3.0 4.4 + omp_init_nest_lock_@OMP_1.0 4.2.1 + omp_init_nest_lock_@OMP_3.0 4.4 + omp_set_dynamic@OMP_1.0 4.2.1 + omp_set_dynamic_8_@OMP_1.0 4.2.1 + omp_set_dynamic_@OMP_1.0 4.2.1 + omp_set_lock@OMP_1.0 4.2.1 + omp_set_lock@OMP_3.0 4.4 + omp_set_lock_@OMP_1.0 4.2.1 + omp_set_lock_@OMP_3.0 4.4 + omp_set_max_active_levels@OMP_3.0 4.4 + omp_set_max_active_levels_8_@OMP_3.0 4.4 + omp_set_max_active_levels_@OMP_3.0 4.4 + omp_set_nest_lock@OMP_1.0 4.2.1 + omp_set_nest_lock@OMP_3.0 4.4 + omp_set_nest_lock_@OMP_1.0 4.2.1 + omp_set_nest_lock_@OMP_3.0 4.4 + omp_set_nested@OMP_1.0 4.2.1 + omp_set_nested_8_@OMP_1.0 4.2.1 + omp_set_nested_@OMP_1.0 4.2.1 + omp_set_num_threads@OMP_1.0 4.2.1 + omp_set_num_threads_8_@OMP_1.0 4.2.1 + omp_set_num_threads_@OMP_1.0 4.2.1 + omp_set_schedule@OMP_3.0 4.4 + omp_set_schedule_8_@OMP_3.0 4.4 + omp_set_schedule_@OMP_3.0 4.4 + omp_test_lock@OMP_1.0 4.2.1 + omp_test_lock@OMP_3.0 4.4 + omp_test_lock_@OMP_1.0 4.2.1 + omp_test_lock_@OMP_3.0 4.4 + omp_test_nest_lock@OMP_1.0 4.2.1 + omp_test_nest_lock@OMP_3.0 4.4 + omp_test_nest_lock_@OMP_1.0 4.2.1 + omp_test_nest_lock_@OMP_3.0 4.4 + omp_unset_lock@OMP_1.0 4.2.1 + omp_unset_lock@OMP_3.0 4.4 + omp_unset_lock_@OMP_1.0 4.2.1 + omp_unset_lock_@OMP_3.0 4.4 + omp_unset_nest_lock@OMP_1.0 4.2.1 + omp_unset_nest_lock@OMP_3.0 4.4 + omp_unset_nest_lock_@OMP_1.0 4.2.1 + omp_unset_nest_lock_@OMP_3.0 4.4 --- gcc-4.8-4.8.5.orig/debian/libhfgcc1.symbols.armel +++ gcc-4.8-4.8.5/debian/libhfgcc1.symbols.armel @@ -0,0 +1,1103 @@ +libgcc_s.so.1 libhfgcc1 #MINVER# +(ignore-blacklist)#include "libgcc1.symbols.aeabi" + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_3.5@GCC_3.5 1:4.3.0 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_4.3.0 1:4.3.0 + _Unwind_Complete@GCC_3.5 1:4.3.0 + _Unwind_DeleteException@GCC_3.0 1:4.3.0 + _Unwind_ForcedUnwind@GCC_3.0 1:4.3.0 + _Unwind_GetCFA@GCC_3.3 1:4.3.0 + _Unwind_GetDataRelBase@GCC_3.0 1:4.3.0 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.3.0 + _Unwind_GetRegionStart@GCC_3.0 1:4.3.0 + _Unwind_GetTextRelBase@GCC_3.0 1:4.3.0 + _Unwind_RaiseException@GCC_3.0 1:4.3.0 + _Unwind_Resume@GCC_3.0 1:4.3.0 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.3.0 + _Unwind_VRS_Get@GCC_3.5 1:4.3.0 + _Unwind_VRS_Pop@GCC_3.5 1:4.3.0 + _Unwind_VRS_Set@GCC_3.5 1:4.3.0 + __absvdi2@GCC_3.0 1:4.3.0 + __absvsi2@GCC_3.0 1:4.3.0 + __adddf3@GCC_3.0 1:4.3.0 + __addsf3@GCC_3.0 1:4.3.0 + __addvdi3@GCC_3.0 1:4.3.0 + __addvsi3@GCC_3.0 1:4.3.0 + __ashldi3@GCC_3.0 1:4.3.0 + __ashrdi3@GCC_3.0 1:4.3.0 + __bswapdi2@GCC_4.3.0 1:4.3.0 + __bswapsi2@GCC_4.3.0 1:4.3.0 + __clear_cache@GCC_3.0 1:4.3.0 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.3.0 + __clzsi2@GCC_3.4 1:4.3.0 + __cmpdi2@GCC_3.0 1:4.3.0 + __ctzdi2@GCC_3.4 1:4.3.0 + __ctzsi2@GCC_3.4 1:4.3.0 + __divdc3@GCC_4.0.0 1:4.3.0 + __divdf3@GCC_3.0 1:4.3.0 + __divdi3@GLIBC_2.0 1:4.3.0 + __divsc3@GCC_4.0.0 1:4.3.0 + __divsf3@GCC_3.0 1:4.3.0 + __divsi3@GCC_3.0 1:4.3.0 + __emutls_get_address@GCC_4.3.0 1:4.3.0 + __emutls_register_common@GCC_4.3.0 1:4.3.0 + __enable_execute_stack@GCC_3.4.2 1:4.3.0 + __eqdf2@GCC_3.0 1:4.3.0 + __eqsf2@GCC_3.0 1:4.3.0 + __extendsfdf2@GCC_3.0 1:4.3.0 + __ffsdi2@GCC_3.0 1:4.3.0 + __ffssi2@GCC_4.3.0 1:4.3.0 + __fixdfdi@GCC_3.0 1:4.3.0 + __fixdfsi@GCC_3.0 1:4.3.0 + __fixsfdi@GCC_3.0 1:4.3.0 + __fixsfsi@GCC_3.0 1:4.3.0 + __fixunsdfdi@GCC_3.0 1:4.3.0 + __fixunsdfsi@GCC_3.0 1:4.3.0 + __fixunssfdi@GCC_3.0 1:4.3.0 + __fixunssfsi@GCC_3.0 1:4.3.0 + __floatdidf@GCC_3.0 1:4.3.0 + __floatdisf@GCC_3.0 1:4.3.0 + __floatsidf@GCC_3.0 1:4.3.0 + __floatsisf@GCC_3.0 1:4.3.0 + __floatundidf@GCC_4.2.0 1:4.3.0 + __floatundisf@GCC_4.2.0 1:4.3.0 + __floatunsidf@GCC_4.2.0 1:4.3.0 + __floatunsisf@GCC_4.2.0 1:4.3.0 + __gcc_personality_v0@GCC_3.3.1 1:4.3.0 + __gedf2@GCC_3.0 1:4.3.0 + __gesf2@GCC_3.0 1:4.3.0 + __gnu_addda3@GCC_4.3.0 1:4.3.0 + __gnu_adddq3@GCC_4.3.0 1:4.3.0 + __gnu_addha3@GCC_4.3.0 1:4.3.0 + __gnu_addhq3@GCC_4.3.0 1:4.3.0 + __gnu_addqq3@GCC_4.3.0 1:4.3.0 + __gnu_addsa3@GCC_4.3.0 1:4.3.0 + __gnu_addsq3@GCC_4.3.0 1:4.3.0 + __gnu_adduda3@GCC_4.3.0 1:4.3.0 + __gnu_addudq3@GCC_4.3.0 1:4.3.0 + __gnu_adduha3@GCC_4.3.0 1:4.3.0 + __gnu_adduhq3@GCC_4.3.0 1:4.3.0 + __gnu_adduqq3@GCC_4.3.0 1:4.3.0 + __gnu_addusa3@GCC_4.3.0 1:4.3.0 + __gnu_addusq3@GCC_4.3.0 1:4.3.0 + __gnu_ashlda3@GCC_4.3.0 1:4.3.0 + __gnu_ashldq3@GCC_4.3.0 1:4.3.0 + __gnu_ashlha3@GCC_4.3.0 1:4.3.0 + __gnu_ashlhq3@GCC_4.3.0 1:4.3.0 + __gnu_ashlqq3@GCC_4.3.0 1:4.3.0 + __gnu_ashlsa3@GCC_4.3.0 1:4.3.0 + __gnu_ashlsq3@GCC_4.3.0 1:4.3.0 + __gnu_ashluda3@GCC_4.3.0 1:4.3.0 + __gnu_ashludq3@GCC_4.3.0 1:4.3.0 + __gnu_ashluha3@GCC_4.3.0 1:4.3.0 + __gnu_ashluhq3@GCC_4.3.0 1:4.3.0 + __gnu_ashluqq3@GCC_4.3.0 1:4.3.0 + __gnu_ashlusa3@GCC_4.3.0 1:4.3.0 + __gnu_ashlusq3@GCC_4.3.0 1:4.3.0 + __gnu_ashrda3@GCC_4.3.0 1:4.3.0 + __gnu_ashrdq3@GCC_4.3.0 1:4.3.0 + __gnu_ashrha3@GCC_4.3.0 1:4.3.0 + __gnu_ashrhq3@GCC_4.3.0 1:4.3.0 + __gnu_ashrqq3@GCC_4.3.0 1:4.3.0 + __gnu_ashrsa3@GCC_4.3.0 1:4.3.0 + __gnu_ashrsq3@GCC_4.3.0 1:4.3.0 + __gnu_cmpda2@GCC_4.3.0 1:4.3.0 + __gnu_cmpdq2@GCC_4.3.0 1:4.3.0 + __gnu_cmpha2@GCC_4.3.0 1:4.3.0 + __gnu_cmphq2@GCC_4.3.0 1:4.3.0 + __gnu_cmpqq2@GCC_4.3.0 1:4.3.0 + __gnu_cmpsa2@GCC_4.3.0 1:4.3.0 + __gnu_cmpsq2@GCC_4.3.0 1:4.3.0 + __gnu_cmpuda2@GCC_4.3.0 1:4.3.0 + __gnu_cmpudq2@GCC_4.3.0 1:4.3.0 + __gnu_cmpuha2@GCC_4.3.0 1:4.3.0 + __gnu_cmpuhq2@GCC_4.3.0 1:4.3.0 + __gnu_cmpuqq2@GCC_4.3.0 1:4.3.0 + __gnu_cmpusa2@GCC_4.3.0 1:4.3.0 + __gnu_cmpusq2@GCC_4.3.0 1:4.3.0 + __gnu_divda3@GCC_4.3.0 1:4.3.0 + __gnu_divdq3@GCC_4.3.0 1:4.3.0 + __gnu_divha3@GCC_4.3.0 1:4.3.0 + __gnu_divhq3@GCC_4.3.0 1:4.3.0 + __gnu_divqq3@GCC_4.3.0 1:4.3.0 + __gnu_divsa3@GCC_4.3.0 1:4.3.0 + __gnu_divsq3@GCC_4.3.0 1:4.3.0 + __gnu_fractdadf@GCC_4.3.0 1:4.3.0 + __gnu_fractdadi@GCC_4.3.0 1:4.3.0 + __gnu_fractdadq@GCC_4.3.0 1:4.3.0 + __gnu_fractdaha2@GCC_4.3.0 1:4.3.0 + __gnu_fractdahi@GCC_4.3.0 1:4.3.0 + __gnu_fractdahq@GCC_4.3.0 1:4.3.0 + __gnu_fractdaqi@GCC_4.3.0 1:4.3.0 + __gnu_fractdaqq@GCC_4.3.0 1:4.3.0 + __gnu_fractdasa2@GCC_4.3.0 1:4.3.0 + __gnu_fractdasf@GCC_4.3.0 1:4.3.0 + __gnu_fractdasi@GCC_4.3.0 1:4.3.0 + __gnu_fractdasq@GCC_4.3.0 1:4.3.0 + __gnu_fractdauda@GCC_4.3.0 1:4.3.0 + __gnu_fractdaudq@GCC_4.3.0 1:4.3.0 + __gnu_fractdauha@GCC_4.3.0 1:4.3.0 + __gnu_fractdauhq@GCC_4.3.0 1:4.3.0 + __gnu_fractdauqq@GCC_4.3.0 1:4.3.0 + __gnu_fractdausa@GCC_4.3.0 1:4.3.0 + __gnu_fractdausq@GCC_4.3.0 1:4.3.0 + __gnu_fractdfda@GCC_4.3.0 1:4.3.0 + __gnu_fractdfdq@GCC_4.3.0 1:4.3.0 + __gnu_fractdfha@GCC_4.3.0 1:4.3.0 + __gnu_fractdfhq@GCC_4.3.0 1:4.3.0 + __gnu_fractdfqq@GCC_4.3.0 1:4.3.0 + __gnu_fractdfsa@GCC_4.3.0 1:4.3.0 + __gnu_fractdfsq@GCC_4.3.0 1:4.3.0 + __gnu_fractdfuda@GCC_4.3.0 1:4.3.0 + __gnu_fractdfudq@GCC_4.3.0 1:4.3.0 + __gnu_fractdfuha@GCC_4.3.0 1:4.3.0 + __gnu_fractdfuhq@GCC_4.3.0 1:4.3.0 + __gnu_fractdfuqq@GCC_4.3.0 1:4.3.0 + __gnu_fractdfusa@GCC_4.3.0 1:4.3.0 + __gnu_fractdfusq@GCC_4.3.0 1:4.3.0 + __gnu_fractdida@GCC_4.3.0 1:4.3.0 + __gnu_fractdidq@GCC_4.3.0 1:4.3.0 + __gnu_fractdiha@GCC_4.3.0 1:4.3.0 + __gnu_fractdihq@GCC_4.3.0 1:4.3.0 + __gnu_fractdiqq@GCC_4.3.0 1:4.3.0 + __gnu_fractdisa@GCC_4.3.0 1:4.3.0 + __gnu_fractdisq@GCC_4.3.0 1:4.3.0 + __gnu_fractdiuda@GCC_4.3.0 1:4.3.0 + __gnu_fractdiudq@GCC_4.3.0 1:4.3.0 + __gnu_fractdiuha@GCC_4.3.0 1:4.3.0 + __gnu_fractdiuhq@GCC_4.3.0 1:4.3.0 + __gnu_fractdiuqq@GCC_4.3.0 1:4.3.0 + __gnu_fractdiusa@GCC_4.3.0 1:4.3.0 + __gnu_fractdiusq@GCC_4.3.0 1:4.3.0 + __gnu_fractdqda@GCC_4.3.0 1:4.3.0 + __gnu_fractdqdf@GCC_4.3.0 1:4.3.0 + __gnu_fractdqdi@GCC_4.3.0 1:4.3.0 + __gnu_fractdqha@GCC_4.3.0 1:4.3.0 + __gnu_fractdqhi@GCC_4.3.0 1:4.3.0 + __gnu_fractdqhq2@GCC_4.3.0 1:4.3.0 + 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__gnu_ssaddda3@GCC_4.3.0 1:4.3.0 + __gnu_ssadddq3@GCC_4.3.0 1:4.3.0 + __gnu_ssaddha3@GCC_4.3.0 1:4.3.0 + __gnu_ssaddhq3@GCC_4.3.0 1:4.3.0 + __gnu_ssaddqq3@GCC_4.3.0 1:4.3.0 + __gnu_ssaddsa3@GCC_4.3.0 1:4.3.0 + __gnu_ssaddsq3@GCC_4.3.0 1:4.3.0 + __gnu_ssashlda3@GCC_4.3.0 1:4.3.0 + __gnu_ssashldq3@GCC_4.3.0 1:4.3.0 + __gnu_ssashlha3@GCC_4.3.0 1:4.3.0 + __gnu_ssashlhq3@GCC_4.3.0 1:4.3.0 + __gnu_ssashlqq3@GCC_4.3.0 1:4.3.0 + __gnu_ssashlsa3@GCC_4.3.0 1:4.3.0 + __gnu_ssashlsq3@GCC_4.3.0 1:4.3.0 + __gnu_ssdivda3@GCC_4.3.0 1:4.3.0 + __gnu_ssdivdq3@GCC_4.3.0 1:4.3.0 + __gnu_ssdivha3@GCC_4.3.0 1:4.3.0 + __gnu_ssdivhq3@GCC_4.3.0 1:4.3.0 + __gnu_ssdivqq3@GCC_4.3.0 1:4.3.0 + __gnu_ssdivsa3@GCC_4.3.0 1:4.3.0 + __gnu_ssdivsq3@GCC_4.3.0 1:4.3.0 + __gnu_ssmulda3@GCC_4.3.0 1:4.3.0 + __gnu_ssmuldq3@GCC_4.3.0 1:4.3.0 + __gnu_ssmulha3@GCC_4.3.0 1:4.3.0 + __gnu_ssmulhq3@GCC_4.3.0 1:4.3.0 + __gnu_ssmulqq3@GCC_4.3.0 1:4.3.0 + __gnu_ssmulsa3@GCC_4.3.0 1:4.3.0 + __gnu_ssmulsq3@GCC_4.3.0 1:4.3.0 + __gnu_ssnegda2@GCC_4.3.0 1:4.3.0 + __gnu_ssnegdq2@GCC_4.3.0 1:4.3.0 + __gnu_ssnegha2@GCC_4.3.0 1:4.3.0 + __gnu_ssneghq2@GCC_4.3.0 1:4.3.0 + __gnu_ssnegqq2@GCC_4.3.0 1:4.3.0 + __gnu_ssnegsa2@GCC_4.3.0 1:4.3.0 + __gnu_ssnegsq2@GCC_4.3.0 1:4.3.0 + __gnu_sssubda3@GCC_4.3.0 1:4.3.0 + __gnu_sssubdq3@GCC_4.3.0 1:4.3.0 + __gnu_sssubha3@GCC_4.3.0 1:4.3.0 + __gnu_sssubhq3@GCC_4.3.0 1:4.3.0 + __gnu_sssubqq3@GCC_4.3.0 1:4.3.0 + __gnu_sssubsa3@GCC_4.3.0 1:4.3.0 + __gnu_sssubsq3@GCC_4.3.0 1:4.3.0 + __gnu_subda3@GCC_4.3.0 1:4.3.0 + __gnu_subdq3@GCC_4.3.0 1:4.3.0 + __gnu_subha3@GCC_4.3.0 1:4.3.0 + __gnu_subhq3@GCC_4.3.0 1:4.3.0 + __gnu_subqq3@GCC_4.3.0 1:4.3.0 + __gnu_subsa3@GCC_4.3.0 1:4.3.0 + __gnu_subsq3@GCC_4.3.0 1:4.3.0 + __gnu_subuda3@GCC_4.3.0 1:4.3.0 + __gnu_subudq3@GCC_4.3.0 1:4.3.0 + __gnu_subuha3@GCC_4.3.0 1:4.3.0 + __gnu_subuhq3@GCC_4.3.0 1:4.3.0 + __gnu_subuqq3@GCC_4.3.0 1:4.3.0 + __gnu_subusa3@GCC_4.3.0 1:4.3.0 + __gnu_subusq3@GCC_4.3.0 1:4.3.0 + __gnu_udivuda3@GCC_4.3.0 1:4.3.0 + __gnu_udivudq3@GCC_4.3.0 1:4.3.0 + __gnu_udivuha3@GCC_4.3.0 1:4.3.0 + __gnu_udivuhq3@GCC_4.3.0 1:4.3.0 + __gnu_udivuqq3@GCC_4.3.0 1:4.3.0 + __gnu_udivusa3@GCC_4.3.0 1:4.3.0 + __gnu_udivusq3@GCC_4.3.0 1:4.3.0 + __gnu_unwind_frame@GCC_3.5 1:4.3.0 + __gnu_usadduda3@GCC_4.3.0 1:4.3.0 + __gnu_usaddudq3@GCC_4.3.0 1:4.3.0 + __gnu_usadduha3@GCC_4.3.0 1:4.3.0 + __gnu_usadduhq3@GCC_4.3.0 1:4.3.0 + __gnu_usadduqq3@GCC_4.3.0 1:4.3.0 + __gnu_usaddusa3@GCC_4.3.0 1:4.3.0 + __gnu_usaddusq3@GCC_4.3.0 1:4.3.0 + __gnu_usashluda3@GCC_4.3.0 1:4.3.0 + __gnu_usashludq3@GCC_4.3.0 1:4.3.0 + __gnu_usashluha3@GCC_4.3.0 1:4.3.0 + __gnu_usashluhq3@GCC_4.3.0 1:4.3.0 + __gnu_usashluqq3@GCC_4.3.0 1:4.3.0 + __gnu_usashlusa3@GCC_4.3.0 1:4.3.0 + __gnu_usashlusq3@GCC_4.3.0 1:4.3.0 + __gnu_usdivuda3@GCC_4.3.0 1:4.3.0 + __gnu_usdivudq3@GCC_4.3.0 1:4.3.0 + __gnu_usdivuha3@GCC_4.3.0 1:4.3.0 + __gnu_usdivuhq3@GCC_4.3.0 1:4.3.0 + __gnu_usdivuqq3@GCC_4.3.0 1:4.3.0 + __gnu_usdivusa3@GCC_4.3.0 1:4.3.0 + __gnu_usdivusq3@GCC_4.3.0 1:4.3.0 + __gnu_usmuluda3@GCC_4.3.0 1:4.3.0 + __gnu_usmuludq3@GCC_4.3.0 1:4.3.0 + __gnu_usmuluha3@GCC_4.3.0 1:4.3.0 + __gnu_usmuluhq3@GCC_4.3.0 1:4.3.0 + __gnu_usmuluqq3@GCC_4.3.0 1:4.3.0 + __gnu_usmulusa3@GCC_4.3.0 1:4.3.0 + __gnu_usmulusq3@GCC_4.3.0 1:4.3.0 + __gnu_usneguda2@GCC_4.3.0 1:4.3.0 + __gnu_usnegudq2@GCC_4.3.0 1:4.3.0 + __gnu_usneguha2@GCC_4.3.0 1:4.3.0 + __gnu_usneguhq2@GCC_4.3.0 1:4.3.0 + __gnu_usneguqq2@GCC_4.3.0 1:4.3.0 + __gnu_usnegusa2@GCC_4.3.0 1:4.3.0 + __gnu_usnegusq2@GCC_4.3.0 1:4.3.0 + __gnu_ussubuda3@GCC_4.3.0 1:4.3.0 + __gnu_ussubudq3@GCC_4.3.0 1:4.3.0 + __gnu_ussubuha3@GCC_4.3.0 1:4.3.0 + __gnu_ussubuhq3@GCC_4.3.0 1:4.3.0 + __gnu_ussubuqq3@GCC_4.3.0 1:4.3.0 + __gnu_ussubusa3@GCC_4.3.0 1:4.3.0 + __gnu_ussubusq3@GCC_4.3.0 1:4.3.0 + __gtdf2@GCC_3.0 1:4.3.0 + __gtsf2@GCC_3.0 1:4.3.0 + __ledf2@GCC_3.0 1:4.3.0 + __lesf2@GCC_3.0 1:4.3.0 + __lshrdi3@GCC_3.0 1:4.3.0 + __ltdf2@GCC_3.0 1:4.3.0 + __ltsf2@GCC_3.0 1:4.3.0 + __moddi3@GLIBC_2.0 1:4.3.0 + __modsi3@GCC_3.0 1:4.3.0 + __muldc3@GCC_4.0.0 1:4.3.0 + __muldf3@GCC_3.0 1:4.3.0 + __muldi3@GCC_3.0 1:4.3.0 + __mulsc3@GCC_4.0.0 1:4.3.0 + __mulsf3@GCC_3.0 1:4.3.0 + __mulvdi3@GCC_3.0 1:4.3.0 + __mulvsi3@GCC_3.0 1:4.3.0 + __nedf2@GCC_3.0 1:4.3.0 + __negdf2@GCC_3.0 1:4.3.0 + __negdi2@GCC_3.0 1:4.3.0 + __negsf2@GCC_3.0 1:4.3.0 + __negvdi2@GCC_3.0 1:4.3.0 + __negvsi2@GCC_3.0 1:4.3.0 + __nesf2@GCC_3.0 1:4.3.0 + __paritydi2@GCC_3.4 1:4.3.0 + __paritysi2@GCC_3.4 1:4.3.0 + __popcountdi2@GCC_3.4 1:4.3.0 + __popcountsi2@GCC_3.4 1:4.3.0 + __powidf2@GCC_4.0.0 1:4.3.0 + __powisf2@GCC_4.0.0 1:4.3.0 + __subdf3@GCC_3.0 1:4.3.0 + __subsf3@GCC_3.0 1:4.3.0 + __subvdi3@GCC_3.0 1:4.3.0 + __subvsi3@GCC_3.0 1:4.3.0 + __truncdfsf2@GCC_3.0 1:4.3.0 + __ucmpdi2@GCC_3.0 1:4.3.0 + __udivdi3@GLIBC_2.0 1:4.3.0 + __udivmoddi4@GCC_3.0 1:4.3.0 + __udivsi3@GCC_3.0 1:4.3.0 + __umoddi3@GLIBC_2.0 1:4.3.0 + __umodsi3@GCC_3.0 1:4.3.0 + __unorddf2@GCC_3.3.4 1:4.3.0 + __unordsf2@GCC_3.3.4 1:4.3.0 --- gcc-4.8-4.8.5.orig/debian/libitm1.symbols +++ gcc-4.8-4.8.5/debian/libitm1.symbols @@ -0,0 +1,5 @@ +libitm.so.1 libitm1 #MINVER# +#include "libitm1.symbols.common" +(arch=amd64 i386 x32)#include "libitm1.symbols.x86" +(arch=!alpha !amd64 !arm64 !ia64 !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)#include "libitm1.symbols.32bit" +(arch=alpha amd64 arm64 ia64 ppc64 ppc64el s390x sparc64 kfreebsd-amd64)#include "libitm1.symbols.64bit" --- gcc-4.8-4.8.5.orig/debian/libitm1.symbols.32bit +++ gcc-4.8-4.8.5/debian/libitm1.symbols.32bit @@ -0,0 +1,4 @@ + _ZGTtnaj@LIBITM_1.0 4.7 + _ZGTtnajRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtnwj@LIBITM_1.0 4.7 + _ZGTtnwjRKSt9nothrow_t@LIBITM_1.0 4.7 --- gcc-4.8-4.8.5.orig/debian/libitm1.symbols.64bit +++ gcc-4.8-4.8.5/debian/libitm1.symbols.64bit @@ -0,0 +1,4 @@ + _ZGTtnam@LIBITM_1.0 4.7 + _ZGTtnamRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtnwm@LIBITM_1.0 4.7 + _ZGTtnwmRKSt9nothrow_t@LIBITM_1.0 4.7 --- gcc-4.8-4.8.5.orig/debian/libitm1.symbols.common +++ gcc-4.8-4.8.5/debian/libitm1.symbols.common @@ -0,0 +1,143 @@ + LIBITM_1.0@LIBITM_1.0 4.7 + _ITM_LB@LIBITM_1.0 4.7 + _ITM_LCD@LIBITM_1.0 4.7 + _ITM_LCE@LIBITM_1.0 4.7 + _ITM_LCF@LIBITM_1.0 4.7 + _ITM_LD@LIBITM_1.0 4.7 + _ITM_LE@LIBITM_1.0 4.7 + _ITM_LF@LIBITM_1.0 4.7 + _ITM_LU1@LIBITM_1.0 4.7 + _ITM_LU2@LIBITM_1.0 4.7 + _ITM_LU4@LIBITM_1.0 4.7 + _ITM_LU8@LIBITM_1.0 4.7 + _ITM_RCD@LIBITM_1.0 4.7 + _ITM_RCE@LIBITM_1.0 4.7 + _ITM_RCF@LIBITM_1.0 4.7 + _ITM_RD@LIBITM_1.0 4.7 + _ITM_RE@LIBITM_1.0 4.7 + _ITM_RF@LIBITM_1.0 4.7 + _ITM_RU1@LIBITM_1.0 4.7 + _ITM_RU2@LIBITM_1.0 4.7 + _ITM_RU4@LIBITM_1.0 4.7 + _ITM_RU8@LIBITM_1.0 4.7 + _ITM_RaRCD@LIBITM_1.0 4.7 + _ITM_RaRCE@LIBITM_1.0 4.7 + _ITM_RaRCF@LIBITM_1.0 4.7 + _ITM_RaRD@LIBITM_1.0 4.7 + _ITM_RaRE@LIBITM_1.0 4.7 + _ITM_RaRF@LIBITM_1.0 4.7 + _ITM_RaRU1@LIBITM_1.0 4.7 + _ITM_RaRU2@LIBITM_1.0 4.7 + _ITM_RaRU4@LIBITM_1.0 4.7 + _ITM_RaRU8@LIBITM_1.0 4.7 + _ITM_RaWCD@LIBITM_1.0 4.7 + _ITM_RaWCE@LIBITM_1.0 4.7 + _ITM_RaWCF@LIBITM_1.0 4.7 + _ITM_RaWD@LIBITM_1.0 4.7 + _ITM_RaWE@LIBITM_1.0 4.7 + _ITM_RaWF@LIBITM_1.0 4.7 + _ITM_RaWU1@LIBITM_1.0 4.7 + _ITM_RaWU2@LIBITM_1.0 4.7 + _ITM_RaWU4@LIBITM_1.0 4.7 + _ITM_RaWU8@LIBITM_1.0 4.7 + _ITM_RfWCD@LIBITM_1.0 4.7 + _ITM_RfWCE@LIBITM_1.0 4.7 + _ITM_RfWCF@LIBITM_1.0 4.7 + _ITM_RfWD@LIBITM_1.0 4.7 + _ITM_RfWE@LIBITM_1.0 4.7 + _ITM_RfWF@LIBITM_1.0 4.7 + _ITM_RfWU1@LIBITM_1.0 4.7 + _ITM_RfWU2@LIBITM_1.0 4.7 + _ITM_RfWU4@LIBITM_1.0 4.7 + _ITM_RfWU8@LIBITM_1.0 4.7 + _ITM_WCD@LIBITM_1.0 4.7 + _ITM_WCE@LIBITM_1.0 4.7 + _ITM_WCF@LIBITM_1.0 4.7 + _ITM_WD@LIBITM_1.0 4.7 + _ITM_WE@LIBITM_1.0 4.7 + _ITM_WF@LIBITM_1.0 4.7 + _ITM_WU1@LIBITM_1.0 4.7 + _ITM_WU2@LIBITM_1.0 4.7 + _ITM_WU4@LIBITM_1.0 4.7 + _ITM_WU8@LIBITM_1.0 4.7 + _ITM_WaRCD@LIBITM_1.0 4.7 + _ITM_WaRCE@LIBITM_1.0 4.7 + _ITM_WaRCF@LIBITM_1.0 4.7 + _ITM_WaRD@LIBITM_1.0 4.7 + _ITM_WaRE@LIBITM_1.0 4.7 + _ITM_WaRF@LIBITM_1.0 4.7 + _ITM_WaRU1@LIBITM_1.0 4.7 + _ITM_WaRU2@LIBITM_1.0 4.7 + _ITM_WaRU4@LIBITM_1.0 4.7 + _ITM_WaRU8@LIBITM_1.0 4.7 + _ITM_WaWCD@LIBITM_1.0 4.7 + _ITM_WaWCE@LIBITM_1.0 4.7 + _ITM_WaWCF@LIBITM_1.0 4.7 + _ITM_WaWD@LIBITM_1.0 4.7 + _ITM_WaWE@LIBITM_1.0 4.7 + _ITM_WaWF@LIBITM_1.0 4.7 + _ITM_WaWU1@LIBITM_1.0 4.7 + _ITM_WaWU2@LIBITM_1.0 4.7 + _ITM_WaWU4@LIBITM_1.0 4.7 + _ITM_WaWU8@LIBITM_1.0 4.7 + _ITM_abortTransaction@LIBITM_1.0 4.7 + _ITM_addUserCommitAction@LIBITM_1.0 4.7 + _ITM_addUserUndoAction@LIBITM_1.0 4.7 + _ITM_beginTransaction@LIBITM_1.0 4.7 + _ITM_calloc@LIBITM_1.0 4.7 + _ITM_changeTransactionMode@LIBITM_1.0 4.7 + _ITM_commitTransaction@LIBITM_1.0 4.7 + _ITM_commitTransactionEH@LIBITM_1.0 4.7 + _ITM_cxa_allocate_exception@LIBITM_1.0 4.7 + _ITM_cxa_begin_catch@LIBITM_1.0 4.7 + _ITM_cxa_end_catch@LIBITM_1.0 4.7 + _ITM_cxa_throw@LIBITM_1.0 4.7 + _ITM_deregisterTMCloneTable@LIBITM_1.0 4.7 + _ITM_dropReferences@LIBITM_1.0 4.7 + _ITM_error@LIBITM_1.0 4.7 + _ITM_free@LIBITM_1.0 4.7 + _ITM_getTMCloneOrIrrevocable@LIBITM_1.0 4.7 + _ITM_getTMCloneSafe@LIBITM_1.0 4.7 + _ITM_getTransactionId@LIBITM_1.0 4.7 + _ITM_inTransaction@LIBITM_1.0 4.7 + _ITM_libraryVersion@LIBITM_1.0 4.7 + _ITM_malloc@LIBITM_1.0 4.7 + _ITM_memcpyRnWt@LIBITM_1.0 4.7 + _ITM_memcpyRnWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRnWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtWn@LIBITM_1.0 4.7 + _ITM_memcpyRtWt@LIBITM_1.0 4.7 + _ITM_memcpyRtWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWn@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWt@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWn@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWt@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRnWt@LIBITM_1.0 4.7 + _ITM_memmoveRnWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRnWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtWn@LIBITM_1.0 4.7 + _ITM_memmoveRtWt@LIBITM_1.0 4.7 + _ITM_memmoveRtWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWn@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWt@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWn@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWt@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWtaW@LIBITM_1.0 4.7 + _ITM_memsetW@LIBITM_1.0 4.7 + _ITM_memsetWaR@LIBITM_1.0 4.7 + _ITM_memsetWaW@LIBITM_1.0 4.7 + _ITM_registerTMCloneTable@LIBITM_1.0 4.7 + _ITM_versionCompatible@LIBITM_1.0 4.7 + _ZGTtdaPv@LIBITM_1.0 4.7 + _ZGTtdaPvRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtdlPv@LIBITM_1.0 4.7 + _ZGTtdlPvRKSt9nothrow_t@LIBITM_1.0 4.7 --- gcc-4.8-4.8.5.orig/debian/libitm1.symbols.x86 +++ gcc-4.8-4.8.5/debian/libitm1.symbols.x86 @@ -0,0 +1,24 @@ + _ITM_LM128@LIBITM_1.0 4.7 + _ITM_LM256@LIBITM_1.0 4.7 + _ITM_LM64@LIBITM_1.0 4.7 + _ITM_RM128@LIBITM_1.0 4.7 + _ITM_RM256@LIBITM_1.0 4.7 + _ITM_RM64@LIBITM_1.0 4.7 + _ITM_RaRM128@LIBITM_1.0 4.7 + _ITM_RaRM256@LIBITM_1.0 4.7 + _ITM_RaRM64@LIBITM_1.0 4.7 + _ITM_RaWM128@LIBITM_1.0 4.7 + _ITM_RaWM256@LIBITM_1.0 4.7 + _ITM_RaWM64@LIBITM_1.0 4.7 + _ITM_RfWM128@LIBITM_1.0 4.7 + _ITM_RfWM256@LIBITM_1.0 4.7 + _ITM_RfWM64@LIBITM_1.0 4.7 + _ITM_WM128@LIBITM_1.0 4.7 + _ITM_WM256@LIBITM_1.0 4.7 + _ITM_WM64@LIBITM_1.0 4.7 + _ITM_WaRM128@LIBITM_1.0 4.7 + _ITM_WaRM256@LIBITM_1.0 4.7 + _ITM_WaRM64@LIBITM_1.0 4.7 + _ITM_WaWM128@LIBITM_1.0 4.7 + _ITM_WaWM256@LIBITM_1.0 4.7 + _ITM_WaWM64@LIBITM_1.0 4.7 --- gcc-4.8-4.8.5.orig/debian/libn32gcc1.symbols.mips +++ gcc-4.8-4.8.5/debian/libn32gcc1.symbols.mips @@ -0,0 +1,1749 @@ +libgcc_s.so.1 libn32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.2.0 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4 + GCC_4.5.0@GCC_4.5.0 1:4.5 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + 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1:4.3 + __satfractuhasa@GCC_4.3.0 1:4.3 + __satfractuhasq@GCC_4.3.0 1:4.3 + __satfractuhata@GCC_4.3.0 1:4.3 + __satfractuhatq@GCC_4.3.0 1:4.3 + __satfractuhauda2@GCC_4.3.0 1:4.3 + __satfractuhaudq@GCC_4.3.0 1:4.3 + __satfractuhauhq@GCC_4.3.0 1:4.3 + __satfractuhauqq@GCC_4.3.0 1:4.3 + __satfractuhausa2@GCC_4.3.0 1:4.3 + __satfractuhausq@GCC_4.3.0 1:4.3 + __satfractuhauta2@GCC_4.3.0 1:4.3 + __satfractuhautq@GCC_4.3.0 1:4.3 + __satfractuhqda@GCC_4.3.0 1:4.3 + __satfractuhqdq@GCC_4.3.0 1:4.3 + __satfractuhqha@GCC_4.3.0 1:4.3 + __satfractuhqhq@GCC_4.3.0 1:4.3 + __satfractuhqqq@GCC_4.3.0 1:4.3 + __satfractuhqsa@GCC_4.3.0 1:4.3 + __satfractuhqsq@GCC_4.3.0 1:4.3 + __satfractuhqta@GCC_4.3.0 1:4.3 + __satfractuhqtq@GCC_4.3.0 1:4.3 + __satfractuhquda@GCC_4.3.0 1:4.3 + __satfractuhqudq2@GCC_4.3.0 1:4.3 + __satfractuhquha@GCC_4.3.0 1:4.3 + __satfractuhquqq2@GCC_4.3.0 1:4.3 + __satfractuhqusa@GCC_4.3.0 1:4.3 + __satfractuhqusq2@GCC_4.3.0 1:4.3 + __satfractuhquta@GCC_4.3.0 1:4.3 + __satfractuhqutq2@GCC_4.3.0 1:4.3 + __satfractunsdida@GCC_4.3.0 1:4.3 + __satfractunsdidq@GCC_4.3.0 1:4.3 + __satfractunsdiha@GCC_4.3.0 1:4.3 + __satfractunsdihq@GCC_4.3.0 1:4.3 + __satfractunsdiqq@GCC_4.3.0 1:4.3 + __satfractunsdisa@GCC_4.3.0 1:4.3 + __satfractunsdisq@GCC_4.3.0 1:4.3 + __satfractunsdita@GCC_4.3.0 1:4.3 + __satfractunsditq@GCC_4.3.0 1:4.3 + __satfractunsdiuda@GCC_4.3.0 1:4.3 + __satfractunsdiudq@GCC_4.3.0 1:4.3 + __satfractunsdiuha@GCC_4.3.0 1:4.3 + __satfractunsdiuhq@GCC_4.3.0 1:4.3 + __satfractunsdiuqq@GCC_4.3.0 1:4.3 + __satfractunsdiusa@GCC_4.3.0 1:4.3 + __satfractunsdiusq@GCC_4.3.0 1:4.3 + __satfractunsdiuta@GCC_4.3.0 1:4.3 + __satfractunsdiutq@GCC_4.3.0 1:4.3 + __satfractunshida@GCC_4.3.0 1:4.3 + __satfractunshidq@GCC_4.3.0 1:4.3 + __satfractunshiha@GCC_4.3.0 1:4.3 + __satfractunshihq@GCC_4.3.0 1:4.3 + __satfractunshiqq@GCC_4.3.0 1:4.3 + __satfractunshisa@GCC_4.3.0 1:4.3 + __satfractunshisq@GCC_4.3.0 1:4.3 + __satfractunshita@GCC_4.3.0 1:4.3 + __satfractunshitq@GCC_4.3.0 1:4.3 + __satfractunshiuda@GCC_4.3.0 1:4.3 + __satfractunshiudq@GCC_4.3.0 1:4.3 + __satfractunshiuha@GCC_4.3.0 1:4.3 + __satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunshiuta@GCC_4.3.0 1:4.3 + __satfractunshiutq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqita@GCC_4.3.0 1:4.3 + __satfractunsqitq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunsqiuta@GCC_4.3.0 1:4.3 + __satfractunsqiutq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssita@GCC_4.3.0 1:4.3 + __satfractunssitq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractunssiuta@GCC_4.3.0 1:4.3 + __satfractunssiutq@GCC_4.3.0 1:4.3 + __satfractunstida@GCC_4.3.0 1:4.3 + __satfractunstidq@GCC_4.3.0 1:4.3 + __satfractunstiha@GCC_4.3.0 1:4.3 + __satfractunstihq@GCC_4.3.0 1:4.3 + __satfractunstiqq@GCC_4.3.0 1:4.3 + __satfractunstisa@GCC_4.3.0 1:4.3 + __satfractunstisq@GCC_4.3.0 1:4.3 + __satfractunstita@GCC_4.3.0 1:4.3 + __satfractunstitq@GCC_4.3.0 1:4.3 + __satfractunstiuda@GCC_4.3.0 1:4.3 + __satfractunstiudq@GCC_4.3.0 1:4.3 + __satfractunstiuha@GCC_4.3.0 1:4.3 + __satfractunstiuhq@GCC_4.3.0 1:4.3 + __satfractunstiuqq@GCC_4.3.0 1:4.3 + __satfractunstiusa@GCC_4.3.0 1:4.3 + __satfractunstiusq@GCC_4.3.0 1:4.3 + __satfractunstiuta@GCC_4.3.0 1:4.3 + __satfractunstiutq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqqta@GCC_4.3.0 1:4.3 + __satfractuqqtq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractuqquta@GCC_4.3.0 1:4.3 + __satfractuqqutq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusata@GCC_4.3.0 1:4.3 + __satfractusatq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusauta2@GCC_4.3.0 1:4.3 + __satfractusautq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusqta@GCC_4.3.0 1:4.3 + __satfractusqtq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __satfractusquta@GCC_4.3.0 1:4.3 + __satfractusqutq2@GCC_4.3.0 1:4.3 + __satfractutada@GCC_4.3.0 1:4.3 + __satfractutadq@GCC_4.3.0 1:4.3 + __satfractutaha@GCC_4.3.0 1:4.3 + __satfractutahq@GCC_4.3.0 1:4.3 + __satfractutaqq@GCC_4.3.0 1:4.3 + __satfractutasa@GCC_4.3.0 1:4.3 + __satfractutasq@GCC_4.3.0 1:4.3 + __satfractutata@GCC_4.3.0 1:4.3 + __satfractutatq@GCC_4.3.0 1:4.3 + __satfractutauda2@GCC_4.3.0 1:4.3 + __satfractutaudq@GCC_4.3.0 1:4.3 + __satfractutauha2@GCC_4.3.0 1:4.3 + __satfractutauhq@GCC_4.3.0 1:4.3 + __satfractutauqq@GCC_4.3.0 1:4.3 + __satfractutausa2@GCC_4.3.0 1:4.3 + __satfractutausq@GCC_4.3.0 1:4.3 + __satfractutautq@GCC_4.3.0 1:4.3 + __satfractutqda@GCC_4.3.0 1:4.3 + __satfractutqdq@GCC_4.3.0 1:4.3 + __satfractutqha@GCC_4.3.0 1:4.3 + __satfractutqhq@GCC_4.3.0 1:4.3 + __satfractutqqq@GCC_4.3.0 1:4.3 + __satfractutqsa@GCC_4.3.0 1:4.3 + __satfractutqsq@GCC_4.3.0 1:4.3 + __satfractutqta@GCC_4.3.0 1:4.3 + __satfractutqtq@GCC_4.3.0 1:4.3 + __satfractutquda@GCC_4.3.0 1:4.3 + __satfractutqudq2@GCC_4.3.0 1:4.3 + __satfractutquha@GCC_4.3.0 1:4.3 + __satfractutquhq2@GCC_4.3.0 1:4.3 + __satfractutquqq2@GCC_4.3.0 1:4.3 + __satfractutqusa@GCC_4.3.0 1:4.3 + __satfractutqusq2@GCC_4.3.0 1:4.3 + __satfractutquta@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssaddta3@GCC_4.3.0 1:4.3 + __ssaddtq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssashlta3@GCC_4.3.0 1:4.3 + __ssashltq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssdivta3@GCC_4.3.0 1:4.3 + __ssdivtq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 1:4.3 + __ssmulsq3@GCC_4.3.0 1:4.3 + __ssmulta3@GCC_4.3.0 1:4.3 + __ssmultq3@GCC_4.3.0 1:4.3 + __ssnegda2@GCC_4.3.0 1:4.3 + __ssnegdq2@GCC_4.3.0 1:4.3 + __ssnegha2@GCC_4.3.0 1:4.3 + __ssneghq2@GCC_4.3.0 1:4.3 + __ssnegqq2@GCC_4.3.0 1:4.3 + __ssnegsa2@GCC_4.3.0 1:4.3 + __ssnegsq2@GCC_4.3.0 1:4.3 + __ssnegta2@GCC_4.3.0 1:4.3 + __ssnegtq2@GCC_4.3.0 1:4.3 + __sssubda3@GCC_4.3.0 1:4.3 + __sssubdq3@GCC_4.3.0 1:4.3 + __sssubha3@GCC_4.3.0 1:4.3 + __sssubhq3@GCC_4.3.0 1:4.3 + __sssubqq3@GCC_4.3.0 1:4.3 + __sssubsa3@GCC_4.3.0 1:4.3 + __sssubsq3@GCC_4.3.0 1:4.3 + __sssubta3@GCC_4.3.0 1:4.3 + __sssubtq3@GCC_4.3.0 1:4.3 + __subda3@GCC_4.3.0 1:4.3 + __subdf3@GCC_3.0 1:4.1.1 + __subdq3@GCC_4.3.0 1:4.3 + __subha3@GCC_4.3.0 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1:4.3 + __satfractsita@GCC_4.3.0 1:4.3 + __satfractsitq@GCC_4.3.0 1:4.3 + __satfractsiuda@GCC_4.3.0 1:4.3 + __satfractsiudq@GCC_4.3.0 1:4.3 + __satfractsiuha@GCC_4.3.0 1:4.3 + __satfractsiuhq@GCC_4.3.0 1:4.3 + __satfractsiuqq@GCC_4.3.0 1:4.3 + __satfractsiusa@GCC_4.3.0 1:4.3 + __satfractsiusq@GCC_4.3.0 1:4.3 + __satfractsiuta@GCC_4.3.0 1:4.3 + __satfractsiutq@GCC_4.3.0 1:4.3 + __satfractsqda@GCC_4.3.0 1:4.3 + __satfractsqdq2@GCC_4.3.0 1:4.3 + __satfractsqha@GCC_4.3.0 1:4.3 + __satfractsqhq2@GCC_4.3.0 1:4.3 + __satfractsqqq2@GCC_4.3.0 1:4.3 + __satfractsqsa@GCC_4.3.0 1:4.3 + __satfractsqta@GCC_4.3.0 1:4.3 + __satfractsqtq2@GCC_4.3.0 1:4.3 + __satfractsquda@GCC_4.3.0 1:4.3 + __satfractsqudq@GCC_4.3.0 1:4.3 + __satfractsquha@GCC_4.3.0 1:4.3 + __satfractsquhq@GCC_4.3.0 1:4.3 + __satfractsquqq@GCC_4.3.0 1:4.3 + __satfractsqusa@GCC_4.3.0 1:4.3 + __satfractsqusq@GCC_4.3.0 1:4.3 + __satfractsquta@GCC_4.3.0 1:4.3 + __satfractsqutq@GCC_4.3.0 1:4.3 + __satfracttada2@GCC_4.3.0 1:4.3 + __satfracttadq@GCC_4.3.0 1:4.3 + __satfracttaha2@GCC_4.3.0 1:4.3 + __satfracttahq@GCC_4.3.0 1:4.3 + __satfracttaqq@GCC_4.3.0 1:4.3 + __satfracttasa2@GCC_4.3.0 1:4.3 + __satfracttasq@GCC_4.3.0 1:4.3 + __satfracttatq@GCC_4.3.0 1:4.3 + __satfracttauda@GCC_4.3.0 1:4.3 + __satfracttaudq@GCC_4.3.0 1:4.3 + __satfracttauha@GCC_4.3.0 1:4.3 + __satfracttauhq@GCC_4.3.0 1:4.3 + __satfracttauqq@GCC_4.3.0 1:4.3 + __satfracttausa@GCC_4.3.0 1:4.3 + __satfracttausq@GCC_4.3.0 1:4.3 + __satfracttauta@GCC_4.3.0 1:4.3 + __satfracttautq@GCC_4.3.0 1:4.3 + __satfracttida@GCC_4.3.0 1:4.3 + __satfracttidq@GCC_4.3.0 1:4.3 + __satfracttiha@GCC_4.3.0 1:4.3 + __satfracttihq@GCC_4.3.0 1:4.3 + __satfracttiqq@GCC_4.3.0 1:4.3 + __satfracttisa@GCC_4.3.0 1:4.3 + __satfracttisq@GCC_4.3.0 1:4.3 + __satfracttita@GCC_4.3.0 1:4.3 + __satfracttitq@GCC_4.3.0 1:4.3 + __satfracttiuda@GCC_4.3.0 1:4.3 + __satfracttiudq@GCC_4.3.0 1:4.3 + __satfracttiuha@GCC_4.3.0 1:4.3 + __satfracttiuhq@GCC_4.3.0 1:4.3 + __satfracttiuqq@GCC_4.3.0 1:4.3 + __satfracttiusa@GCC_4.3.0 1:4.3 + __satfracttiusq@GCC_4.3.0 1:4.3 + __satfracttiuta@GCC_4.3.0 1:4.3 + __satfracttiutq@GCC_4.3.0 1:4.3 + __satfracttqda@GCC_4.3.0 1:4.3 + __satfracttqdq2@GCC_4.3.0 1:4.3 + __satfracttqha@GCC_4.3.0 1:4.3 + __satfracttqhq2@GCC_4.3.0 1:4.3 + __satfracttqqq2@GCC_4.3.0 1:4.3 + __satfracttqsa@GCC_4.3.0 1:4.3 + __satfracttqsq2@GCC_4.3.0 1:4.3 + __satfracttqta@GCC_4.3.0 1:4.3 + __satfracttquda@GCC_4.3.0 1:4.3 + __satfracttqudq@GCC_4.3.0 1:4.3 + __satfracttquha@GCC_4.3.0 1:4.3 + __satfracttquhq@GCC_4.3.0 1:4.3 + __satfracttquqq@GCC_4.3.0 1:4.3 + __satfracttqusa@GCC_4.3.0 1:4.3 + __satfracttqusq@GCC_4.3.0 1:4.3 + __satfracttquta@GCC_4.3.0 1:4.3 + __satfracttqutq@GCC_4.3.0 1:4.3 + __satfractudada@GCC_4.3.0 1:4.3 + __satfractudadq@GCC_4.3.0 1:4.3 + __satfractudaha@GCC_4.3.0 1:4.3 + __satfractudahq@GCC_4.3.0 1:4.3 + __satfractudaqq@GCC_4.3.0 1:4.3 + __satfractudasa@GCC_4.3.0 1:4.3 + __satfractudasq@GCC_4.3.0 1:4.3 + __satfractudata@GCC_4.3.0 1:4.3 + __satfractudatq@GCC_4.3.0 1:4.3 + __satfractudaudq@GCC_4.3.0 1:4.3 + __satfractudauha2@GCC_4.3.0 1:4.3 + __satfractudauhq@GCC_4.3.0 1:4.3 + __satfractudauqq@GCC_4.3.0 1:4.3 + __satfractudausa2@GCC_4.3.0 1:4.3 + __satfractudausq@GCC_4.3.0 1:4.3 + __satfractudauta2@GCC_4.3.0 1:4.3 + __satfractudautq@GCC_4.3.0 1:4.3 + __satfractudqda@GCC_4.3.0 1:4.3 + __satfractudqdq@GCC_4.3.0 1:4.3 + __satfractudqha@GCC_4.3.0 1:4.3 + __satfractudqhq@GCC_4.3.0 1:4.3 + __satfractudqqq@GCC_4.3.0 1:4.3 + __satfractudqsa@GCC_4.3.0 1:4.3 + __satfractudqsq@GCC_4.3.0 1:4.3 + __satfractudqta@GCC_4.3.0 1:4.3 + __satfractudqtq@GCC_4.3.0 1:4.3 + __satfractudquda@GCC_4.3.0 1:4.3 + __satfractudquha@GCC_4.3.0 1:4.3 + __satfractudquhq2@GCC_4.3.0 1:4.3 + __satfractudquqq2@GCC_4.3.0 1:4.3 + __satfractudqusa@GCC_4.3.0 1:4.3 + __satfractudqusq2@GCC_4.3.0 1:4.3 + __satfractudquta@GCC_4.3.0 1:4.3 + __satfractudqutq2@GCC_4.3.0 1:4.3 + __satfractuhada@GCC_4.3.0 1:4.3 + __satfractuhadq@GCC_4.3.0 1:4.3 + __satfractuhaha@GCC_4.3.0 1:4.3 + __satfractuhahq@GCC_4.3.0 1:4.3 + __satfractuhaqq@GCC_4.3.0 1:4.3 + __satfractuhasa@GCC_4.3.0 1:4.3 + __satfractuhasq@GCC_4.3.0 1:4.3 + __satfractuhata@GCC_4.3.0 1:4.3 + __satfractuhatq@GCC_4.3.0 1:4.3 + __satfractuhauda2@GCC_4.3.0 1:4.3 + __satfractuhaudq@GCC_4.3.0 1:4.3 + __satfractuhauhq@GCC_4.3.0 1:4.3 + __satfractuhauqq@GCC_4.3.0 1:4.3 + __satfractuhausa2@GCC_4.3.0 1:4.3 + __satfractuhausq@GCC_4.3.0 1:4.3 + __satfractuhauta2@GCC_4.3.0 1:4.3 + __satfractuhautq@GCC_4.3.0 1:4.3 + __satfractuhqda@GCC_4.3.0 1:4.3 + __satfractuhqdq@GCC_4.3.0 1:4.3 + __satfractuhqha@GCC_4.3.0 1:4.3 + __satfractuhqhq@GCC_4.3.0 1:4.3 + __satfractuhqqq@GCC_4.3.0 1:4.3 + __satfractuhqsa@GCC_4.3.0 1:4.3 + __satfractuhqsq@GCC_4.3.0 1:4.3 + __satfractuhqta@GCC_4.3.0 1:4.3 + __satfractuhqtq@GCC_4.3.0 1:4.3 + __satfractuhquda@GCC_4.3.0 1:4.3 + __satfractuhqudq2@GCC_4.3.0 1:4.3 + __satfractuhquha@GCC_4.3.0 1:4.3 + __satfractuhquqq2@GCC_4.3.0 1:4.3 + __satfractuhqusa@GCC_4.3.0 1:4.3 + __satfractuhqusq2@GCC_4.3.0 1:4.3 + __satfractuhquta@GCC_4.3.0 1:4.3 + __satfractuhqutq2@GCC_4.3.0 1:4.3 + __satfractunsdida@GCC_4.3.0 1:4.3 + __satfractunsdidq@GCC_4.3.0 1:4.3 + __satfractunsdiha@GCC_4.3.0 1:4.3 + __satfractunsdihq@GCC_4.3.0 1:4.3 + __satfractunsdiqq@GCC_4.3.0 1:4.3 + __satfractunsdisa@GCC_4.3.0 1:4.3 + __satfractunsdisq@GCC_4.3.0 1:4.3 + __satfractunsdita@GCC_4.3.0 1:4.3 + __satfractunsditq@GCC_4.3.0 1:4.3 + __satfractunsdiuda@GCC_4.3.0 1:4.3 + __satfractunsdiudq@GCC_4.3.0 1:4.3 + __satfractunsdiuha@GCC_4.3.0 1:4.3 + __satfractunsdiuhq@GCC_4.3.0 1:4.3 + __satfractunsdiuqq@GCC_4.3.0 1:4.3 + __satfractunsdiusa@GCC_4.3.0 1:4.3 + __satfractunsdiusq@GCC_4.3.0 1:4.3 + __satfractunsdiuta@GCC_4.3.0 1:4.3 + __satfractunsdiutq@GCC_4.3.0 1:4.3 + __satfractunshida@GCC_4.3.0 1:4.3 + __satfractunshidq@GCC_4.3.0 1:4.3 + __satfractunshiha@GCC_4.3.0 1:4.3 + __satfractunshihq@GCC_4.3.0 1:4.3 + __satfractunshiqq@GCC_4.3.0 1:4.3 + __satfractunshisa@GCC_4.3.0 1:4.3 + __satfractunshisq@GCC_4.3.0 1:4.3 + __satfractunshita@GCC_4.3.0 1:4.3 + __satfractunshitq@GCC_4.3.0 1:4.3 + __satfractunshiuda@GCC_4.3.0 1:4.3 + __satfractunshiudq@GCC_4.3.0 1:4.3 + __satfractunshiuha@GCC_4.3.0 1:4.3 + __satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunshiuta@GCC_4.3.0 1:4.3 + __satfractunshiutq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqita@GCC_4.3.0 1:4.3 + __satfractunsqitq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunsqiuta@GCC_4.3.0 1:4.3 + __satfractunsqiutq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssita@GCC_4.3.0 1:4.3 + __satfractunssitq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractunssiuta@GCC_4.3.0 1:4.3 + __satfractunssiutq@GCC_4.3.0 1:4.3 + __satfractunstida@GCC_4.3.0 1:4.3 + __satfractunstidq@GCC_4.3.0 1:4.3 + __satfractunstiha@GCC_4.3.0 1:4.3 + __satfractunstihq@GCC_4.3.0 1:4.3 + __satfractunstiqq@GCC_4.3.0 1:4.3 + __satfractunstisa@GCC_4.3.0 1:4.3 + __satfractunstisq@GCC_4.3.0 1:4.3 + __satfractunstita@GCC_4.3.0 1:4.3 + __satfractunstitq@GCC_4.3.0 1:4.3 + __satfractunstiuda@GCC_4.3.0 1:4.3 + __satfractunstiudq@GCC_4.3.0 1:4.3 + __satfractunstiuha@GCC_4.3.0 1:4.3 + __satfractunstiuhq@GCC_4.3.0 1:4.3 + __satfractunstiuqq@GCC_4.3.0 1:4.3 + __satfractunstiusa@GCC_4.3.0 1:4.3 + __satfractunstiusq@GCC_4.3.0 1:4.3 + __satfractunstiuta@GCC_4.3.0 1:4.3 + __satfractunstiutq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqqta@GCC_4.3.0 1:4.3 + __satfractuqqtq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractuqquta@GCC_4.3.0 1:4.3 + __satfractuqqutq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusata@GCC_4.3.0 1:4.3 + __satfractusatq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusauta2@GCC_4.3.0 1:4.3 + __satfractusautq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusqta@GCC_4.3.0 1:4.3 + __satfractusqtq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __satfractusquta@GCC_4.3.0 1:4.3 + __satfractusqutq2@GCC_4.3.0 1:4.3 + __satfractutada@GCC_4.3.0 1:4.3 + __satfractutadq@GCC_4.3.0 1:4.3 + __satfractutaha@GCC_4.3.0 1:4.3 + __satfractutahq@GCC_4.3.0 1:4.3 + __satfractutaqq@GCC_4.3.0 1:4.3 + __satfractutasa@GCC_4.3.0 1:4.3 + __satfractutasq@GCC_4.3.0 1:4.3 + __satfractutata@GCC_4.3.0 1:4.3 + __satfractutatq@GCC_4.3.0 1:4.3 + __satfractutauda2@GCC_4.3.0 1:4.3 + __satfractutaudq@GCC_4.3.0 1:4.3 + __satfractutauha2@GCC_4.3.0 1:4.3 + __satfractutauhq@GCC_4.3.0 1:4.3 + __satfractutauqq@GCC_4.3.0 1:4.3 + __satfractutausa2@GCC_4.3.0 1:4.3 + __satfractutausq@GCC_4.3.0 1:4.3 + __satfractutautq@GCC_4.3.0 1:4.3 + __satfractutqda@GCC_4.3.0 1:4.3 + __satfractutqdq@GCC_4.3.0 1:4.3 + __satfractutqha@GCC_4.3.0 1:4.3 + __satfractutqhq@GCC_4.3.0 1:4.3 + __satfractutqqq@GCC_4.3.0 1:4.3 + __satfractutqsa@GCC_4.3.0 1:4.3 + __satfractutqsq@GCC_4.3.0 1:4.3 + __satfractutqta@GCC_4.3.0 1:4.3 + __satfractutqtq@GCC_4.3.0 1:4.3 + __satfractutquda@GCC_4.3.0 1:4.3 + __satfractutqudq2@GCC_4.3.0 1:4.3 + __satfractutquha@GCC_4.3.0 1:4.3 + __satfractutquhq2@GCC_4.3.0 1:4.3 + __satfractutquqq2@GCC_4.3.0 1:4.3 + __satfractutqusa@GCC_4.3.0 1:4.3 + __satfractutqusq2@GCC_4.3.0 1:4.3 + __satfractutquta@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssaddta3@GCC_4.3.0 1:4.3 + __ssaddtq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssashlta3@GCC_4.3.0 1:4.3 + __ssashltq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssdivta3@GCC_4.3.0 1:4.3 + __ssdivtq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 1:4.3 + __ssmulsq3@GCC_4.3.0 1:4.3 + __ssmulta3@GCC_4.3.0 1:4.3 + __ssmultq3@GCC_4.3.0 1:4.3 + __ssnegda2@GCC_4.3.0 1:4.3 + __ssnegdq2@GCC_4.3.0 1:4.3 + __ssnegha2@GCC_4.3.0 1:4.3 + __ssneghq2@GCC_4.3.0 1:4.3 + __ssnegqq2@GCC_4.3.0 1:4.3 + __ssnegsa2@GCC_4.3.0 1:4.3 + __ssnegsq2@GCC_4.3.0 1:4.3 + __ssnegta2@GCC_4.3.0 1:4.3 + __ssnegtq2@GCC_4.3.0 1:4.3 + __sssubda3@GCC_4.3.0 1:4.3 + __sssubdq3@GCC_4.3.0 1:4.3 + __sssubha3@GCC_4.3.0 1:4.3 + __sssubhq3@GCC_4.3.0 1:4.3 + __sssubqq3@GCC_4.3.0 1:4.3 + __sssubsa3@GCC_4.3.0 1:4.3 + __sssubsq3@GCC_4.3.0 1:4.3 + __sssubta3@GCC_4.3.0 1:4.3 + __sssubtq3@GCC_4.3.0 1:4.3 + __subda3@GCC_4.3.0 1:4.3 + __subdf3@GCC_3.0 1:4.1.1 + __subdq3@GCC_4.3.0 1:4.3 + __subha3@GCC_4.3.0 1:4.3 + __subhq3@GCC_4.3.0 1:4.3 + __subqq3@GCC_4.3.0 1:4.3 + __subsa3@GCC_4.3.0 1:4.3 + __subsf3@GCC_3.0 1:4.1.1 + __subsq3@GCC_4.3.0 1:4.3 + __subta3@GCC_4.3.0 1:4.3 + __subtf3@GCC_3.0 1:4.1.1 + __subtq3@GCC_4.3.0 1:4.3 + __subuda3@GCC_4.3.0 1:4.3 + __subudq3@GCC_4.3.0 1:4.3 + __subuha3@GCC_4.3.0 1:4.3 + __subuhq3@GCC_4.3.0 1:4.3 + __subuqq3@GCC_4.3.0 1:4.3 + __subusa3@GCC_4.3.0 1:4.3 + __subusq3@GCC_4.3.0 1:4.3 + __subuta3@GCC_4.3.0 1:4.3 + __subutq3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __sync_add_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_8@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_1@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_2@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_4@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_8@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_synchronize@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_8@GCC_4.4.0 1:4.4 + __truncdfsf2@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_3.0 1:4.1.1 + __trunctfsf2@GCC_3.0 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __udivuda3@GCC_4.3.0 1:4.3 + __udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __udivuta3@GCC_4.3.0 1:4.3 + __udivutq3@GCC_4.3.0 1:4.3 + __umodti3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __unordtf2@GCC_4.5.0 1:4.5 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usadduta3@GCC_4.3.0 1:4.3 + __usaddutq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usashluta3@GCC_4.3.0 1:4.3 + __usashlutq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usdivuta3@GCC_4.3.0 1:4.3 + __usdivutq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usmuluta3@GCC_4.3.0 1:4.3 + __usmulutq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __usneguta2@GCC_4.3.0 1:4.3 + __usnegutq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 + __ussubuta3@GCC_4.3.0 1:4.3 + __ussubutq3@GCC_4.3.0 1:4.3 --- gcc-4.8-4.8.5.orig/debian/libobjc4.symbols +++ gcc-4.8-4.8.5/debian/libobjc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 --- gcc-4.8-4.8.5.orig/debian/libobjc4.symbols.armel +++ gcc-4.8-4.8.5/debian/libobjc4.symbols.armel @@ -0,0 +1,4 @@ +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 + __objc_exception_class@Base 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libobjc4.symbols.armhf +++ gcc-4.8-4.8.5/debian/libobjc4.symbols.armhf @@ -0,0 +1,4 @@ +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 + __objc_exception_class@Base 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libobjc4.symbols.common +++ gcc-4.8-4.8.5/debian/libobjc4.symbols.common @@ -0,0 +1,205 @@ + __objc_accessors_init@Base 4.6 + __objc_add_class_to_hash@Base 4.2.1 + __objc_class_links_resolved@Base 4.2.1 + __objc_class_name_NXConstantString@Base 4.2.1 + __objc_class_name_Object@Base 4.2.1 + __objc_class_name_Protocol@Base 4.2.1 + __objc_dangling_categories@Base 4.2.1 + __objc_exec_class@Base 4.2.1 + __objc_force_linking@Base 4.2.1 + __objc_generate_gc_type_description@Base 4.2.1 + __objc_get_forward_imp@Base 4.2.1 + __objc_init_class@Base 4.6 + __objc_init_class_tables@Base 4.2.1 + __objc_init_dispatch_tables@Base 4.2.1 + __objc_init_selector_tables@Base 4.2.1 + __objc_init_thread_system@Base 4.2.1 + __objc_install_premature_dtable@Base 4.2.1 + __objc_is_multi_threaded@Base 4.2.1 + __objc_linking@Base 4.2.1 + __objc_msg_forward@Base 4.2.1 + __objc_msg_forward2@Base 4.3 + __objc_print_dtable_stats@Base 4.2.1 + __objc_protocols_add_protocol@Base 4.6 + __objc_protocols_init@Base 4.6 + __objc_register_instance_methods_to_class@Base 4.2.1 + __objc_register_selectors_from_class@Base 4.2.1 + __objc_register_selectors_from_description_list@Base 4.6 + __objc_register_selectors_from_list@Base 4.2.1 + __objc_register_selectors_from_module@Base 4.6 + __objc_resolve_class_links@Base 4.2.1 + __objc_responds_to@Base 4.2.1 + __objc_runtime_mutex@Base 4.2.1 + __objc_runtime_threads_alive@Base 4.2.1 + __objc_selector_max_index@Base 4.2.1 + __objc_sparse2_id@Base 4.2.1 + __objc_sync_init@Base 4.6 + __objc_thread_exit_status@Base 4.2.1 + __objc_uninstalled_dtable@Base 4.2.1 + __objc_update_classes_with_methods@Base 4.6 + __objc_update_dispatch_table_for_class@Base 4.2.1 + _objc_abort@Base 4.6 + _objc_became_multi_threaded@Base 4.2.1 + _objc_load_callback@Base 4.2.1 + _objc_lookup_class@Base 4.6 + class_addIvar@Base 4.6 + class_addMethod@Base 4.6 + class_addProtocol@Base 4.6 + class_add_method_list@Base 4.2.1 + class_conformsToProtocol@Base 4.6 + class_copyIvarList@Base 4.6 + class_copyMethodList@Base 4.6 + class_copyPropertyList@Base 4.6 + class_copyProtocolList@Base 4.6 + class_createInstance@Base 4.6 + class_getClassMethod@Base 4.6 + class_getClassVariable@Base 4.6 + class_getInstanceMethod@Base 4.6 + class_getInstanceSize@Base 4.6 + class_getInstanceVariable@Base 4.6 + class_getIvarLayout@Base 4.6 + class_getMethodImplementation@Base 4.6 + class_getName@Base 4.6 + class_getProperty@Base 4.6 + class_getSuperclass@Base 4.6 + class_getVersion@Base 4.6 + class_getWeakIvarLayout@Base 4.6 + class_isMetaClass@Base 4.6 + class_ivar_set_gcinvisible@Base 4.2.1 + class_replaceMethod@Base 4.6 + class_respondsToSelector@Base 4.6 + class_setIvarLayout@Base 4.6 + class_setVersion@Base 4.6 + class_setWeakIvarLayout@Base 4.6 + get_imp@Base 4.2.1 + idxsize@Base 4.2.1 + ivar_getName@Base 4.6 + ivar_getOffset@Base 4.6 + ivar_getTypeEncoding@Base 4.6 + method_copyArgumentType@Base 4.6 + method_copyReturnType@Base 4.6 + method_exchangeImplementations@Base 4.6 + method_getArgumentType@Base 4.6 + method_getDescription@Base 4.6 + method_getImplementation@Base 4.6 + method_getName@Base 4.6 + method_getNumberOfArguments@Base 4.6 + method_getReturnType@Base 4.6 + method_getTypeEncoding@Base 4.6 + method_get_imp@Base 4.6 + method_setImplementation@Base 4.6 + narrays@Base 4.2.1 + nbuckets@Base 4.2.1 + nil_method@Base 4.2.1 + nindices@Base 4.2.1 + objc_aligned_size@Base 4.2.1 + objc_alignof_type@Base 4.2.1 + objc_allocateClassPair@Base 4.6 + objc_atomic_malloc@Base 4.2.1 + objc_calloc@Base 4.2.1 + objc_condition_allocate@Base 4.2.1 + objc_condition_broadcast@Base 4.2.1 + objc_condition_deallocate@Base 4.2.1 + objc_condition_signal@Base 4.2.1 + objc_condition_wait@Base 4.2.1 + objc_copyProtocolList@Base 4.6 + objc_copyStruct@Base 4.6 + objc_disposeClassPair@Base 4.6 + objc_enumerationMutation@Base 4.6 + objc_exception_throw@Base 4.2.1 + objc_free@Base 4.2.1 + objc_getClass@Base 4.6 + objc_getClassList@Base 4.6 + objc_getMetaClass@Base 4.6 + objc_getProperty@Base 4.6 + objc_getPropertyStruct@Base 4.6 + objc_getProtocol@Base 4.6 + objc_getRequiredClass@Base 4.6 + objc_get_class@Base 4.2.1 + objc_get_meta_class@Base 4.2.1 + objc_get_type_qualifiers@Base 4.2.1 + objc_hash_add@Base 4.2.1 + objc_hash_delete@Base 4.2.1 + objc_hash_is_key_in_hash@Base 4.2.1 + objc_hash_new@Base 4.2.1 + objc_hash_next@Base 4.2.1 + objc_hash_remove@Base 4.2.1 + objc_hash_value_for_key@Base 4.2.1 + objc_layout_finish_structure@Base 4.2.1 + objc_layout_structure@Base 4.2.1 + objc_layout_structure_get_info@Base 4.2.1 + objc_layout_structure_next_member@Base 4.2.1 + objc_lookUpClass@Base 4.6 + objc_lookup_class@Base 4.2.1 + objc_malloc@Base 4.2.1 + objc_msg_lookup@Base 4.2.1 + objc_msg_lookup_super@Base 4.2.1 + objc_mutex_allocate@Base 4.2.1 + objc_mutex_deallocate@Base 4.2.1 + objc_mutex_lock@Base 4.2.1 + objc_mutex_trylock@Base 4.2.1 + objc_mutex_unlock@Base 4.2.1 + objc_promoted_size@Base 4.2.1 + objc_realloc@Base 4.2.1 + objc_registerClassPair@Base 4.6 + objc_setEnumerationMutationHandler@Base 4.6 + objc_setExceptionMatcher@Base 4.6 + objc_setGetUnknownClassHandler@Base 4.6 + objc_setProperty@Base 4.6 + objc_setPropertyStruct@Base 4.6 + objc_setUncaughtExceptionHandler@Base 4.6 + objc_set_thread_callback@Base 4.2.1 + objc_sizeof_type@Base 4.2.1 + objc_skip_argspec@Base 4.2.1 + objc_skip_offset@Base 4.2.1 + objc_skip_type_qualifiers@Base 4.2.1 + objc_skip_typespec@Base 4.2.1 + objc_sync_enter@Base 4.6 + objc_sync_exit@Base 4.6 + objc_thread_add@Base 4.2.1 + objc_thread_detach@Base 4.2.1 + objc_thread_exit@Base 4.2.1 + objc_thread_get_data@Base 4.2.1 + objc_thread_get_priority@Base 4.2.1 + objc_thread_id@Base 4.2.1 + objc_thread_remove@Base 4.2.1 + objc_thread_set_data@Base 4.2.1 + objc_thread_set_priority@Base 4.2.1 + objc_thread_yield@Base 4.2.1 + object_copy@Base 4.2.1 + object_dispose@Base 4.2.1 + object_getClassName@Base 4.6 + object_getIndexedIvars@Base 4.6 + object_getInstanceVariable@Base 4.6 + object_getIvar@Base 4.6 + object_setClass@Base 4.6 + object_setInstanceVariable@Base 4.6 + object_setIvar@Base 4.6 + property_getAttributes@Base 4.6 + property_getName@Base 4.6 + protocol_conformsToProtocol@Base 4.6 + protocol_copyMethodDescriptionList@Base 4.6 + protocol_copyPropertyList@Base 4.6 + protocol_copyProtocolList@Base 4.6 + protocol_getMethodDescription@Base 4.6 + protocol_getName@Base 4.6 + protocol_getProperty@Base 4.6 + protocol_isEqual@Base 4.6 + sarray_at_put@Base 4.2.1 + sarray_at_put_safe@Base 4.2.1 + sarray_free@Base 4.2.1 + sarray_lazy_copy@Base 4.2.1 + sarray_new@Base 4.2.1 + sarray_realloc@Base 4.2.1 + sarray_remove_garbage@Base 4.2.1 + search_for_method_in_list@Base 4.2.1 + sel_copyTypedSelectorList@Base 4.6 + sel_getName@Base 4.6 + sel_getTypeEncoding@Base 4.6 + sel_getTypedSelector@Base 4.6 + sel_getUid@Base 4.6 + sel_get_any_uid@Base 4.2.1 + sel_isEqual@Base 4.6 + sel_is_mapped@Base 4.2.1 + sel_registerName@Base 4.6 + sel_registerTypedName@Base 4.6 --- gcc-4.8-4.8.5.orig/debian/libquadmath0.symbols +++ gcc-4.8-4.8.5/debian/libquadmath0.symbols @@ -0,0 +1,2 @@ +libquadmath.so.0 libquadmath0 #MINVER# +#include "libquadmath0.symbols.common" --- gcc-4.8-4.8.5.orig/debian/libquadmath0.symbols.common +++ gcc-4.8-4.8.5/debian/libquadmath0.symbols.common @@ -0,0 +1,92 @@ + QUADMATH_1.0@QUADMATH_1.0 4.6 + acoshq@QUADMATH_1.0 4.6 + acosq@QUADMATH_1.0 4.6 + asinhq@QUADMATH_1.0 4.6 + asinq@QUADMATH_1.0 4.6 + atan2q@QUADMATH_1.0 4.6 + atanhq@QUADMATH_1.0 4.6 + atanq@QUADMATH_1.0 4.6 + cabsq@QUADMATH_1.0 4.6 + cacoshq@QUADMATH_1.0 4.6 + cacosq@QUADMATH_1.0 4.6 + cargq@QUADMATH_1.0 4.6 + casinhq@QUADMATH_1.0 4.6 + casinq@QUADMATH_1.0 4.6 + catanhq@QUADMATH_1.0 4.6 + catanq@QUADMATH_1.0 4.6 + cbrtq@QUADMATH_1.0 4.6 + ccoshq@QUADMATH_1.0 4.6 + ccosq@QUADMATH_1.0 4.6 + ceilq@QUADMATH_1.0 4.6 + cexpiq@QUADMATH_1.0 4.6 + cexpq@QUADMATH_1.0 4.6 + cimagq@QUADMATH_1.0 4.6 + clog10q@QUADMATH_1.0 4.6 + clogq@QUADMATH_1.0 4.6 + conjq@QUADMATH_1.0 4.6 + copysignq@QUADMATH_1.0 4.6 + coshq@QUADMATH_1.0 4.6 + cosq@QUADMATH_1.0 4.6 + cpowq@QUADMATH_1.0 4.6 + cprojq@QUADMATH_1.0 4.6 + crealq@QUADMATH_1.0 4.6 + csinhq@QUADMATH_1.0 4.6 + csinq@QUADMATH_1.0 4.6 + csqrtq@QUADMATH_1.0 4.6 + ctanhq@QUADMATH_1.0 4.6 + ctanq@QUADMATH_1.0 4.6 + erfcq@QUADMATH_1.0 4.6 + erfq@QUADMATH_1.0 4.6 + expm1q@QUADMATH_1.0 4.6 + expq@QUADMATH_1.0 4.6 + fabsq@QUADMATH_1.0 4.6 + fdimq@QUADMATH_1.0 4.6 + finiteq@QUADMATH_1.0 4.6 + floorq@QUADMATH_1.0 4.6 + fmaq@QUADMATH_1.0 4.6 + fmaxq@QUADMATH_1.0 4.6 + fminq@QUADMATH_1.0 4.6 + fmodq@QUADMATH_1.0 4.6 + frexpq@QUADMATH_1.0 4.6 + hypotq@QUADMATH_1.0 4.6 + ilogbq@QUADMATH_1.0 4.6 + isinfq@QUADMATH_1.0 4.6 + isnanq@QUADMATH_1.0 4.6 + j0q@QUADMATH_1.0 4.6 + j1q@QUADMATH_1.0 4.6 + jnq@QUADMATH_1.0 4.6 + ldexpq@QUADMATH_1.0 4.6 + lgammaq@QUADMATH_1.0 4.6 + llrintq@QUADMATH_1.0 4.6 + llroundq@QUADMATH_1.0 4.6 + log10q@QUADMATH_1.0 4.6 + log1pq@QUADMATH_1.0 4.6 + log2q@QUADMATH_1.0 4.6 + logq@QUADMATH_1.0 4.6 + lrintq@QUADMATH_1.0 4.6 + lroundq@QUADMATH_1.0 4.6 + modfq@QUADMATH_1.0 4.6 + nanq@QUADMATH_1.0 4.6 + nearbyintq@QUADMATH_1.0 4.6 + nextafterq@QUADMATH_1.0 4.6 + powq@QUADMATH_1.0 4.6 + quadmath_snprintf@QUADMATH_1.0 4.6 + remainderq@QUADMATH_1.0 4.6 + remquoq@QUADMATH_1.0 4.6 + rintq@QUADMATH_1.0 4.6 + roundq@QUADMATH_1.0 4.6 + scalblnq@QUADMATH_1.0 4.6 + scalbnq@QUADMATH_1.0 4.6 + signbitq@QUADMATH_1.0 4.6 + sincosq@QUADMATH_1.0 4.6 + sinhq@QUADMATH_1.0 4.6 + sinq@QUADMATH_1.0 4.6 + sqrtq@QUADMATH_1.0 4.6 + strtoflt128@QUADMATH_1.0 4.6 + tanhq@QUADMATH_1.0 4.6 + tanq@QUADMATH_1.0 4.6 + tgammaq@QUADMATH_1.0 4.6 + truncq@QUADMATH_1.0 4.6 + y0q@QUADMATH_1.0 4.6 + y1q@QUADMATH_1.0 4.6 + ynq@QUADMATH_1.0 4.6 --- gcc-4.8-4.8.5.orig/debian/libstdc++-BV-doc.doc-base +++ gcc-4.8-4.8.5/debian/libstdc++-BV-doc.doc-base @@ -0,0 +1,13 @@ +Document: libstdc++-@BV@-doc +Title: The GNU Standard C++ Library v3 (gcc-@BV@) +Author: Various +Abstract: This package contains documentation files for the GNU stdc++ library. + One set is the distribution documentation, the other set is the + source documentation including a namespace list, class hierarchy, + alphabetical list, compound list, file list, namespace members, + compound members and file members. +Section: Programming/C++ + +Format: html +Index: /usr/share/doc/libstdc++-@BV@-doc/libstdc++/index.html +Files: /usr/share/doc/libstdc++-@BV@-doc/libstdc++//* --- gcc-4.8-4.8.5.orig/debian/libstdc++-BV-doc.overrides +++ gcc-4.8-4.8.5/debian/libstdc++-BV-doc.overrides @@ -0,0 +1,2 @@ +libstdc++-@BV@-doc binary: hyphen-used-as-minus-sign +libstdc++-@BV@-doc binary: manpage-has-bad-whatis-entry --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.128bit +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.128bit @@ -0,0 +1,46 @@ + _ZNSt14numeric_limitsInE10has_denormE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE10is_boundedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE10is_integerE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE11round_styleE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12has_infinityE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12max_digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12max_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12min_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE13has_quiet_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14is_specializedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14max_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14min_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE15has_denorm_lossE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE15tinyness_beforeE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE17has_signaling_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE5radixE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE5trapsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE6digitsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE8digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE8is_exactE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_iec559E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_moduloE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_signedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10has_denormE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10is_boundedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10is_integerE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE11round_styleE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12has_infinityE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12max_digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12max_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12min_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE13has_quiet_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14is_specializedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14max_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14min_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE15has_denorm_lossE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE15tinyness_beforeE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE17has_signaling_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE5radixE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE5trapsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE6digitsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE8digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE8is_exactE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_iec559E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_moduloE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_signedE@GLIBCXX_3.4.17 4.7 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.32bit +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.32bit @@ -0,0 +1,554 @@ +#include "libstdc++6.symbols.common" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEj@GLIBCXX_3.4.4 4.1.1 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 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gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.32bit.hurd +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.32bit.hurd @@ -0,0 +1,536 @@ +#include "libstdc++6.symbols.common" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEj@GLIBCXX_3.4.4 4.1.1 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE6substrEjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKw@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_jj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEEixEj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSs16find_last_not_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs2atEj@GLIBCXX_3.4 4.1.1 + _ZNKSs4copyEPcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs6substrEjj@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEjjPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEjjRKSs@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEjjRKSsjj@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_checkEjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_limitEjj@GLIBCXX_3.4 4.1.1 + _ZNKSsixEj@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIcE6_M_putEPcjPKcPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIwE6_M_putEPwjPKwPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_j@GLIBCXX_3.4 4.1.1 + _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_j@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIcE12_M_transformEPcPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIwE12_M_transformEPwPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcjcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcjcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcjwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcjwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiijRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiijRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8valarrayIjE4sizeEv@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEjwRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEjjjw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEjjPKwj@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_j@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEjjRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE5eraseEjj@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwj@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_jj@GLIBCXX_3.4 4.1.1 + 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4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _Znaj@GLIBCXX_3.4 4.1.1 + _ZnajRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _Znwj@GLIBCXX_3.4 4.1.1 + _ZnwjRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC1EP15__pthread_mutex@GLIBCXX_3.4 4.3.0 + _ZNSt12__basic_fileIcEC2EP15__pthread_mutex@GLIBCXX_3.4 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.64bit +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.64bit @@ -0,0 +1,559 @@ +#include "libstdc++6.symbols.common" + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPcl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKcl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastElNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcElPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastElNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcElPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastElNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcElPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKw@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSs16find_last_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSs4copyEPcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmRKSs@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmRKSsmm@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSsixEm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIcE6_M_putEPcmPKcPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIwE6_M_putEPwmPKwPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1 + _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIcE12_M_transformEPcPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIwE12_M_transformEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcmcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcmcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEclRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcmwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcmwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwlRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1 + _ZNKSt8__detail20_Prime_rehash_policy11_M_next_bktEm@GLIBCXX_3.4.18 4.8 + _ZNKSt8__detail20_Prime_rehash_policy14_M_need_rehashEmmm@GLIBCXX_3.4.18 4.8 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5 + _ZNKSt8valarrayImE4sizeEv@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEmm@GLIBCXX_3.4.16 4.6.0 + _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEmwRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEmmmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE18_S_construct_aux_2EmwRKS1_@GLIBCXX_3.4.14 4.5 + _ZNSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_m@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEmmRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE5eraseEmm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwm@GLIBCXX_3.4 4.1.1 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_ZTv0_n24_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _Znam@GLIBCXX_3.4 4.1.1 + _ZnamRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _Znwm@GLIBCXX_3.4 4.1.1 + _ZnwmRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.alpha +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.alpha @@ -0,0 +1,55 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNSt14numeric_limitsInE10has_denormE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE10is_boundedE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE10is_integerE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE11round_styleE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE12has_infinityE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE12max_digits10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE12max_exponentE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE12min_exponentE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE13has_quiet_NaNE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE14is_specializedE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE14max_exponent10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE14min_exponent10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE15has_denorm_lossE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE15tinyness_beforeE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE17has_signaling_NaNE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE5radixE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE5trapsE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE6digitsE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE8digits10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE8is_exactE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE9is_iec559E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE9is_moduloE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE9is_signedE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE10has_denormE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE10is_boundedE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE10is_integerE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE11round_styleE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE12has_infinityE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE12max_digits10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE12max_exponentE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE12min_exponentE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE13has_quiet_NaNE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE14is_specializedE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE14max_exponent10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE14min_exponent10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE15has_denorm_lossE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE15tinyness_beforeE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE17has_signaling_NaNE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE5radixE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE5trapsE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE6digitsE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE8digits10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE8is_exactE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE9is_iec559E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE9is_moduloE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE9is_signedE@GLIBCXX_3.4.17 4.8 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.amd64 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.amd64 @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.arm +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.arm @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_sj0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.arm64 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.arm64 @@ -0,0 +1,9 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.armel +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.armel @@ -0,0 +1,26 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" + CXXABI_ARM_1.3.3@CXXABI_ARM_1.3.3 4.4.0 + _ZNKSt9type_info6beforeERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt9type_infoeqERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + __aeabi_atexit@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_cctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_noctor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_nocookie@CXXABI_ARM_1.3.3 4.4.0 + __cxa_begin_cleanup@CXXABI_1.3 4.3.0 + __cxa_end_cleanup@CXXABI_1.3 4.3.0 + __cxa_type_match@CXXABI_1.3 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.armhf +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.armhf @@ -0,0 +1,26 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" + CXXABI_ARM_1.3.3@CXXABI_ARM_1.3.3 4.4.0 + _ZNKSt9type_info6beforeERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt9type_infoeqERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + __aeabi_atexit@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_cctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_noctor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_nocookie@CXXABI_ARM_1.3.3 4.4.0 + __cxa_begin_cleanup@CXXABI_1.3 4.3.0 + __cxa_end_cleanup@CXXABI_1.3 4.3.0 + __cxa_type_match@CXXABI_1.3 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.common +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.common @@ -0,0 +1,3086 @@ + CXXABI_1.3.1@CXXABI_1.3.1 4.1.1 + CXXABI_1.3.2@CXXABI_1.3.2 4.3 + CXXABI_1.3.3@CXXABI_1.3.3 4.4.0 + CXXABI_1.3.4@CXXABI_1.3.4 4.5 + CXXABI_1.3.5@CXXABI_1.3.5 4.6 + CXXABI_1.3.6@CXXABI_1.3.6 4.7 + CXXABI_1.3.7@CXXABI_1.3.7 4.8 + CXXABI_1.3@CXXABI_1.3 4.1.1 + CXXABI_TM_1@CXXABI_TM_1 4.7 + GLIBCXX_3.4.10@GLIBCXX_3.4.10 4.3 + GLIBCXX_3.4.11@GLIBCXX_3.4.11 4.4.0 + GLIBCXX_3.4.12@GLIBCXX_3.4.12 4.4.0 + GLIBCXX_3.4.13@GLIBCXX_3.4.13 4.4.2 + GLIBCXX_3.4.14@GLIBCXX_3.4.14 4.5 + GLIBCXX_3.4.15@GLIBCXX_3.4.15 4.6 + GLIBCXX_3.4.16@GLIBCXX_3.4.16 4.6.0 + GLIBCXX_3.4.17@GLIBCXX_3.4.17 4.7 + GLIBCXX_3.4.18@GLIBCXX_3.4.18 4.8 + GLIBCXX_3.4.19@GLIBCXX_3.4.19 4.8 + GLIBCXX_3.4.1@GLIBCXX_3.4.1 4.1.1 + GLIBCXX_3.4.2@GLIBCXX_3.4.2 4.1.1 + GLIBCXX_3.4.3@GLIBCXX_3.4.3 4.1.1 + GLIBCXX_3.4.4@GLIBCXX_3.4.4 4.1.1 + GLIBCXX_3.4.5@GLIBCXX_3.4.5 4.1.1 + GLIBCXX_3.4.6@GLIBCXX_3.4.6 4.1.1 + GLIBCXX_3.4.7@GLIBCXX_3.4.7 4.1.1 + GLIBCXX_3.4.8@GLIBCXX_3.4.8 4.1.1 + GLIBCXX_3.4.9@GLIBCXX_3.4.9 4.2.1 + GLIBCXX_3.4@GLIBCXX_3.4 4.1.1 + _ZGVNSt10moneypunctIcLb0EE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt10moneypunctIcLb1EE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt10moneypunctIwLb0EE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt10moneypunctIwLb1EE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt11__timepunctIcE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt11__timepunctIwE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt7collateIcE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt7collateIwE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt8messagesIcE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt8messagesIwE2idE@GLIBCXX_3.4 4.1.1 + _ZGVNSt8numpunctIcE2idE@GLIBCXX_3.4 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4.1.1 + _ZTSSt17moneypunct_bynameIcLb1EE@GLIBCXX_3.4 4.1.1 + _ZTSSt17moneypunct_bynameIwLb0EE@GLIBCXX_3.4 4.1.1 + _ZTSSt17moneypunct_bynameIwLb1EE@GLIBCXX_3.4 4.1.1 + _ZTSSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTSSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTSSt19basic_istringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTSSt19basic_istringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTSSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTSSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTSSt21__ctype_abstract_baseIcE@GLIBCXX_3.4 4.1.1 + _ZTSSt21__ctype_abstract_baseIwE@GLIBCXX_3.4 4.1.1 + _ZTSSt23__codecvt_abstract_baseIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTSSt23__codecvt_abstract_baseIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTSSt5ctypeIcE@GLIBCXX_3.4 4.1.1 + _ZTSSt5ctypeIwE@GLIBCXX_3.4 4.1.1 + _ZTSSt7codecvtIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + 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_ZTSSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9bad_alloc@GLIBCXX_3.4 4.1.1 + _ZTSSt9basic_iosIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9basic_iosIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9exception@GLIBCXX_3.4 4.1.1 + _ZTSSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9strstream@GLIBCXX_3.4 4.1.1 + _ZTSSt9time_base@GLIBCXX_3.4 4.1.1 + _ZTSSt9type_info@GLIBCXX_3.4 4.1.1 + _ZTSa@CXXABI_1.3 4.1.1 + _ZTSb@CXXABI_1.3 4.1.1 + _ZTSc@CXXABI_1.3 4.1.1 + _ZTSd@CXXABI_1.3 4.1.1 + _ZTSe@CXXABI_1.3 4.1.1 + _ZTSf@CXXABI_1.3 4.1.1 + _ZTSh@CXXABI_1.3 4.1.1 + _ZTSi@CXXABI_1.3 4.1.1 + _ZTSj@CXXABI_1.3 4.1.1 + _ZTSl@CXXABI_1.3 4.1.1 + _ZTSm@CXXABI_1.3 4.1.1 + _ZTSs@CXXABI_1.3 4.1.1 + _ZTSt@CXXABI_1.3 4.1.1 + _ZTSv@CXXABI_1.3 4.1.1 + _ZTSw@CXXABI_1.3 4.1.1 + _ZTSx@CXXABI_1.3 4.1.1 + _ZTSy@CXXABI_1.3 4.1.1 + _ZTTSd@GLIBCXX_3.4 4.1.1 + _ZTTSi@GLIBCXX_3.4 4.1.1 + _ZTTSo@GLIBCXX_3.4 4.1.1 + _ZTTSt10istrstream@GLIBCXX_3.4 4.1.1 + _ZTTSt10ostrstream@GLIBCXX_3.4 4.1.1 + _ZTTSt13basic_fstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt13basic_fstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt13basic_istreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt13basic_ostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt14basic_ifstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt14basic_ifstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt14basic_iostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt14basic_ofstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt14basic_ofstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt19basic_istringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt19basic_istringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt9strstream@GLIBCXX_3.4 4.1.1 + _ZTVN10__cxxabiv116__enum_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv117__array_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv117__class_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv117__pbase_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv119__pointer_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv120__function_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv120__si_class_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv121__vmi_class_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv123__fundamental_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv129__pointer_to_member_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVNSt13__future_base11_State_baseE@GLIBCXX_3.4.15 4.6 + _ZTVNSt13__future_base12_Result_baseE@GLIBCXX_3.4.15 4.6 + _ZTVNSt13__future_base19_Async_state_commonE@GLIBCXX_3.4.17 4.7.0~rc1 + _ZTVNSt6locale5facetE@GLIBCXX_3.4 4.1.1 + _ZTVNSt8ios_base7failureE@GLIBCXX_3.4 4.1.1 + _ZTVSd@GLIBCXX_3.4 4.1.1 + _ZTVSi@GLIBCXX_3.4 4.1.1 + _ZTVSo@GLIBCXX_3.4 4.1.1 + _ZTVSt10bad_typeid@GLIBCXX_3.4 4.1.1 + _ZTVSt10istrstream@GLIBCXX_3.4 4.1.1 + _ZTVSt10lock_error@GLIBCXX_3.4.11 4.4.0 + _ZTVSt10moneypunctIcLb0EE@GLIBCXX_3.4 4.1.1 + _ZTVSt10moneypunctIcLb1EE@GLIBCXX_3.4 4.1.1 + _ZTVSt10moneypunctIwLb0EE@GLIBCXX_3.4 4.1.1 + _ZTVSt10moneypunctIwLb1EE@GLIBCXX_3.4 4.1.1 + _ZTVSt10ostrstream@GLIBCXX_3.4 4.1.1 + _ZTVSt11__timepunctIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt11__timepunctIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt11logic_error@GLIBCXX_3.4 4.1.1 + _ZTVSt11range_error@GLIBCXX_3.4 4.1.1 + _ZTVSt11regex_error@GLIBCXX_3.4.15 4.6 + _ZTVSt12bad_weak_ptr@GLIBCXX_3.4.15 4.6 + _ZTVSt12ctype_bynameIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt12ctype_bynameIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt12domain_error@GLIBCXX_3.4 4.1.1 + _ZTVSt12future_error@GLIBCXX_3.4.14 4.5 + _ZTVSt12length_error@GLIBCXX_3.4 4.1.1 + _ZTVSt12out_of_range@GLIBCXX_3.4 4.1.1 + _ZTVSt12strstreambuf@GLIBCXX_3.4 4.1.1 + _ZTVSt12system_error@GLIBCXX_3.4.11 4.4.0 + _ZTVSt13bad_exception@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_filebufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_filebufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_fstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_fstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_istreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_ostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13runtime_error@GLIBCXX_3.4 4.1.1 + _ZTVSt14basic_ifstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt14basic_ifstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt14basic_iostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt14basic_ofstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt14basic_ofstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt14codecvt_bynameIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt14codecvt_bynameIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt14collate_bynameIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt14collate_bynameIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt14error_category@GLIBCXX_3.4.11 4.4.0 + _ZTVSt14overflow_error@GLIBCXX_3.4 4.1.1 + _ZTVSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15basic_streambufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15basic_stringbufIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15basic_stringbufIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15messages_bynameIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt15messages_bynameIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt15numpunct_bynameIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt15numpunct_bynameIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15underflow_error@GLIBCXX_3.4 4.1.1 + _ZTVSt16invalid_argument@GLIBCXX_3.4 4.1.1 + _ZTVSt16nested_exception@CXXABI_1.3.5 4.6 +#MISSING: 4.6# _ZTVSt17bad_function_call@CXXABI_1.3.5 4.6 + _ZTVSt17bad_function_call@GLIBCXX_3.4.15 4.6 + _ZTVSt17moneypunct_bynameIcLb0EE@GLIBCXX_3.4 4.1.1 + _ZTVSt17moneypunct_bynameIcLb1EE@GLIBCXX_3.4 4.1.1 + _ZTVSt17moneypunct_bynameIwLb0EE@GLIBCXX_3.4 4.1.1 + _ZTVSt17moneypunct_bynameIwLb1EE@GLIBCXX_3.4 4.1.1 + _ZTVSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt19basic_istringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt19basic_istringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt21__ctype_abstract_baseIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt21__ctype_abstract_baseIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt23__codecvt_abstract_baseIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt23__codecvt_abstract_baseIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt5ctypeIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt5ctypeIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt7codecvtIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt7codecvtIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt7collateIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt7collateIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt8bad_cast@GLIBCXX_3.4 4.1.1 + _ZTVSt8ios_base@GLIBCXX_3.4 4.1.1 + _ZTVSt8messagesIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt8messagesIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt8numpunctIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt8numpunctIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9bad_alloc@GLIBCXX_3.4 4.1.1 + _ZTVSt9basic_iosIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9basic_iosIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9exception@GLIBCXX_3.4 4.1.1 + _ZTVSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9strstream@GLIBCXX_3.4 4.1.1 + _ZTVSt9type_info@GLIBCXX_3.4 4.1.1 + _ZdaPv@GLIBCXX_3.4 4.1.1 + _ZdaPvRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _ZdlPv@GLIBCXX_3.4 4.1.1 + _ZdlPvRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + __atomic_flag_for_address@GLIBCXX_3.4.11 4.4.0 + __atomic_flag_wait_explicit@GLIBCXX_3.4.11 4.4.0 + __cxa_allocate_dependent_exception@CXXABI_1.3.6 4.7 + __cxa_allocate_exception@CXXABI_1.3 4.1.1 + __cxa_bad_cast@CXXABI_1.3 4.1.1 + __cxa_bad_typeid@CXXABI_1.3 4.1.1 + __cxa_begin_catch@CXXABI_1.3 4.1.1 + __cxa_call_unexpected@CXXABI_1.3 4.1.1 + __cxa_current_exception_type@CXXABI_1.3 4.1.1 + __cxa_deleted_virtual@CXXABI_1.3.6 4.7 + __cxa_demangle@CXXABI_1.3 4.1.1 + __cxa_end_catch@CXXABI_1.3 4.1.1 + __cxa_free_dependent_exception@CXXABI_1.3.6 4.7 + __cxa_free_exception@CXXABI_1.3 4.1.1 + __cxa_get_exception_ptr@CXXABI_1.3.1 4.1.1 + __cxa_get_globals@CXXABI_1.3 4.1.1 + __cxa_get_globals_fast@CXXABI_1.3 4.1.1 + __cxa_guard_abort@CXXABI_1.3 4.1.1 + __cxa_guard_acquire@CXXABI_1.3 4.1.1 + __cxa_guard_release@CXXABI_1.3 4.1.1 + __cxa_pure_virtual@CXXABI_1.3 4.1.1 + __cxa_rethrow@CXXABI_1.3 4.1.1 + __cxa_thread_atexit@CXXABI_1.3.7 4.8 + __cxa_throw@CXXABI_1.3 4.1.1 + __cxa_tm_cleanup@CXXABI_TM_1 4.7 + __cxa_vec_cctor@CXXABI_1.3 4.1.1 + __cxa_vec_cleanup@CXXABI_1.3 4.1.1 + __cxa_vec_ctor@CXXABI_1.3 4.1.1 + __cxa_vec_delete2@CXXABI_1.3 4.1.1 + __cxa_vec_delete3@CXXABI_1.3 4.1.1 + __cxa_vec_delete@CXXABI_1.3 4.1.1 + __cxa_vec_dtor@CXXABI_1.3 4.1.1 + __cxa_vec_new2@CXXABI_1.3 4.1.1 + __cxa_vec_new3@CXXABI_1.3 4.1.1 + __cxa_vec_new@CXXABI_1.3 4.1.1 + __dynamic_cast@CXXABI_1.3 4.1.1 + __once_proxy@GLIBCXX_3.4.11 4.4.0 + atomic_flag_clear_explicit@GLIBCXX_3.4.11 4.4.0 + atomic_flag_test_and_set_explicit@GLIBCXX_3.4.11 4.4.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.excprop +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.excprop @@ -0,0 +1,17 @@ + _ZNKSt15__exception_ptr13exception_ptr20__cxa_exception_typeEv@CXXABI_1.3.3 4.4.0 + _ZNKSt15__exception_ptr13exception_ptrcvMS0_FvvEEv@CXXABI_1.3.3 4.4.0 + _ZNKSt15__exception_ptr13exception_ptrntEv@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptr4swapERS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC1EMS0_FvvE@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC1ERKS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC1Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC2EMS0_FvvE@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC2ERKS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC2Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrD1Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrD2Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptraSERKS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptreqERKNS_13exception_ptrES2_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptrneERKNS_13exception_ptrES2_@CXXABI_1.3.3 4.4.0 + _ZSt17current_exceptionv@CXXABI_1.3.3 4.4.0 + _ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE@CXXABI_1.3.3 4.4.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.glibcxxmath +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.glibcxxmath @@ -0,0 +1,22 @@ + acosl@GLIBCXX_3.4.3 4.1.1 + asinl@GLIBCXX_3.4.3 4.1.1 + atan2l@GLIBCXX_3.4 4.1.1 + atanl@GLIBCXX_3.4.3 4.1.1 + ceill@GLIBCXX_3.4.3 4.1.1 + coshl@GLIBCXX_3.4 4.1.1 + cosl@GLIBCXX_3.4 4.1.1 + expl@GLIBCXX_3.4 4.1.1 + floorl@GLIBCXX_3.4.3 4.1.1 + fmodl@GLIBCXX_3.4.3 4.1.1 + frexpl@GLIBCXX_3.4.3 4.1.1 + hypotl@GLIBCXX_3.4 4.1.1 + ldexpl@GLIBCXX_3.4.3 4.1.1 + log10l@GLIBCXX_3.4 4.1.1 + logl@GLIBCXX_3.4 4.1.1 + modfl@GLIBCXX_3.4.3 4.1.1 + powl@GLIBCXX_3.4 4.1.1 + sinhl@GLIBCXX_3.4 4.1.1 + sinl@GLIBCXX_3.4 4.1.1 + sqrtl@GLIBCXX_3.4 4.1.1 + tanhl@GLIBCXX_3.4 4.1.1 + tanl@GLIBCXX_3.4 4.1.1 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.hppa +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.hppa @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +# removed, see PR libstdc++/39491 __signbitl@GLIBCXX_3.4 4.2.1 +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.hurd-i386 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.hurd-i386 @@ -0,0 +1,5 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit.hurd" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.i386 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.i386 @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.ia64 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.ia64 @@ -0,0 +1,53 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNSt14numeric_limitsInE10has_denormE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE10is_boundedE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE10is_integerE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE11round_styleE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE12has_infinityE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE12max_digits10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE12max_exponentE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE12min_exponentE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE13has_quiet_NaNE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE14is_specializedE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE14max_exponent10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE14min_exponent10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE15has_denorm_lossE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE15tinyness_beforeE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE17has_signaling_NaNE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE5radixE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE5trapsE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE6digitsE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE8digits10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE8is_exactE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE9is_iec559E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE9is_moduloE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsInE9is_signedE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE10has_denormE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE10is_boundedE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE10is_integerE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE11round_styleE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE12has_infinityE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE12max_digits10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE12max_exponentE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE12min_exponentE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE13has_quiet_NaNE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE14is_specializedE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE14max_exponent10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE14min_exponent10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE15has_denorm_lossE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE15tinyness_beforeE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE17has_signaling_NaNE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE5radixE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE5trapsE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE6digitsE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE8digits10E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE8is_exactE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE9is_iec559E@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE9is_moduloE@GLIBCXX_3.4.17 4.8 + _ZNSt14numeric_limitsIoE9is_signedE@GLIBCXX_3.4.17 4.8 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.kfreebsd-amd64 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.kfreebsd-amd64 @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.kfreebsd-i386 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.kfreebsd-i386 @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.ldbl.32bit +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.ldbl.32bit @@ -0,0 +1,284 @@ + CXXABI_LDBL_1.3@CXXABI_LDBL_1.3 4.2.1 + GLIBCXX_LDBL_3.4.10@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + GLIBCXX_LDBL_3.4.7@GLIBCXX_LDBL_3.4.7 4.2.1 + GLIBCXX_LDBL_3.4@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt3tr14hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + _ZNKSt4hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + _ZGVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intItEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIxEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIyEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16_M_extract_floatES4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1 + 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_ZTSNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSPKg@CXXABI_LDBL_1.3 4.2.1 + _ZTSPg@CXXABI_LDBL_1.3 4.2.1 + _ZTSg@CXXABI_LDBL_1.3 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.lpia +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.lpia @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.m68k +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.m68k @@ -0,0 +1,5 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.mips +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.mips @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.mipsel +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.mipsel @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.powerpc +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.powerpc @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.powerpcspe +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.powerpcspe @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.ppc64 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.ppc64 @@ -0,0 +1,10 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.ppc64el +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.ppc64el @@ -0,0 +1,10 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.s390 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.s390 @@ -0,0 +1,558 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.common" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKw@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSs16find_last_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSs4copyEPcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmRKSs@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmRKSsmm@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSsixEm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIcE6_M_putEPcmPKcPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIwE6_M_putEPwmPKwPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1 + _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIcE12_M_transformEPcPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIwE12_M_transformEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcmcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcmcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcmwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcmwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0 + _ZNKSt8valarrayImE4sizeEv@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEmm@GLIBCXX_3.4.16 4.7 + _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEmwRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEmmmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE18_S_construct_aux_2EmwRKS1_@GLIBCXX_3.4.14 4.5.0 + _ZNSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_m@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEmmRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE5eraseEmm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwm@GLIBCXX_3.4 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_ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _Znam@GLIBCXX_3.4 4.1.1 + _ZnamRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _Znwm@GLIBCXX_3.4 4.1.1 + _ZnwmRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit.s390" + _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.s390x +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.s390x @@ -0,0 +1,12 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.sh4 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.sh4 @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.sparc +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.sparc @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.8-4.8.5.orig/debian/libstdc++6.symbols.sparc64 +++ gcc-4.8-4.8.5/debian/libstdc++6.symbols.sparc64 @@ -0,0 +1,10 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.128bit" + _ZN9__gnu_cxx12__atomic_addEPVli@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVli@GLIBCXX_3.4 4.1.1 +# FIXME: Currently no ldbl symbols in the 64bit libstdc++ on sparc. +# #include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.8-4.8.5.orig/debian/libstdc++CXX.postinst +++ gcc-4.8-4.8.5/debian/libstdc++CXX.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libstdc++@CXX@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/libstdc++CXX.prerm +++ gcc-4.8-4.8.5/debian/libstdc++CXX.prerm @@ -0,0 +1,13 @@ +#! /bin/sh + +set -e + +case "$1" in + remove) + files=$(dpkg -L libstdc++@CXX@@TARGET_QUAL@ | awk -F/ 'BEGIN {OFS="/"} /\.py$/ {$NF=sprintf("__pycache__/%s.*.py[co]", substr($NF,1,length($NF)-3)); print}') + rm -f $files + dirs=$(dpkg -L libstdc++@CXX@@TARGET_QUAL@ | awk -F/ 'BEGIN {OFS="/"} /\.py$/ {NF--; print}' | sort -u) + find $dirs -mindepth 1 -maxdepth 1 -name __pycache__ -type d -empty | xargs -r rmdir +esac + +#DEBHELPER# --- gcc-4.8-4.8.5.orig/debian/libx32asan0.overrides +++ gcc-4.8-4.8.5/debian/libx32asan0.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +libx32asan0 binary: binary-or-shlib-defines-rpath --- gcc-4.8-4.8.5.orig/debian/libx32asan0.symbols +++ gcc-4.8-4.8.5/debian/libx32asan0.symbols @@ -0,0 +1,3 @@ +libasan.so.0 libx32asan0 #MINVER# +#include "libasan0.symbols.common" +#include "libasan0.symbols.32" --- gcc-4.8-4.8.5.orig/debian/libx32atomic1.symbols +++ gcc-4.8-4.8.5/debian/libx32atomic1.symbols @@ -0,0 +1,3 @@ +libatomic.so.1 libx32atomic1 #MINVER# +#include "libatomic1.symbols.common" +#include "libatomic1.symbols.64" --- gcc-4.8-4.8.5.orig/debian/libx32gfortran3.overrides +++ gcc-4.8-4.8.5/debian/libx32gfortran3.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +libx32gfortran3 binary: binary-or-shlib-defines-rpath --- gcc-4.8-4.8.5.orig/debian/locale-gen +++ gcc-4.8-4.8.5/debian/locale-gen @@ -0,0 +1,49 @@ +#!/bin/sh + +LOCPATH=`pwd`/locales +export LOCPATH + +[ -d $LOCPATH ] || mkdir -p $LOCPATH + +umask 022 + +echo "Generating locales..." +while read locale charset; do + case $locale in \#*) continue;; esac + [ -n "$locale" -a -n "$charset" ] || continue + echo -n " `echo $locale | sed 's/\([^.\@]*\).*/\1/'`" + echo -n ".$charset" + echo -n `echo $locale | sed 's/\([^\@]*\)\(\@.*\)*/\2/'` + echo -n '...' + if [ -f $LOCPATH/$locale ]; then + input=$locale + else + input=`echo $locale | sed 's/\([^.]*\)[^@]*\(.*\)/\1\2/'` + fi + localedef -i $input -c -f $charset $LOCPATH/$locale #-A /etc/locale.alias + echo ' done'; \ +done <&2 "usage: `basename $0` [-p ] [-t ] [-m ]" + echo >&2 " [ ...]" + exit 1 +} + +while [ $# -gt 0 ]; do + case $1 in + -p) + pidfile=$2 + shift + shift + ;; + -t) + timeout=$2 + shift + shift + ;; + -m) + message="$2" + shift + shift + ;; + -*) + usage + ;; + *) + break + esac +done + +[ $# -gt 0 ] || usage + +logfile="$1" +shift +otherlogs="$@" + +cleanup() +{ + rm -f $pidfile + exit 0 +} + +#trap cleanup 0 1 3 15 + +echo $$ > $pidfile + +update() +{ + _logvar=$1 + _othervar=$2 + + # logfile may not exist yet + if [ -r $logfile ]; then + _logtail="`tail -10 $logfile | md5sum` $f" + else + _logtail="does not exist: $logfile" + fi + eval $_logvar="'$_logtail'" + + _othertails='' + for f in $otherlogs; do + if [ -r $f ]; then + _othertails="$_othertails `tail -10 $f | md5sum` $f" + else + _othertails="$_othertails does not exist: $f" + fi + done + eval $_othervar="'$_othertails'" +} + +update logtail othertails +while true; do + sleep $timeout + update newlogtail newothertails + if [ "$logtail" != "$newlogtail" ]; then + # there is still action in the primary logfile. do nothing. + logtail="$newlogtail" + elif [ "$othertails" != "$newothertails" ]; then + # there is still action in the other log files, so print the message + /bin/echo -e $message + othertails="$newothertails" + else + # nothing changed in the other log files. maybe a timeout ... + : + fi +done --- gcc-4.8-4.8.5.orig/debian/patches/aarch64-abi-fix.diff +++ gcc-4.8-4.8.5/debian/patches/aarch64-abi-fix.diff @@ -0,0 +1,16 @@ +# DP: Proposed patch for PR /59799, allow passing arrays in registers on AArch64. + +--- a/src/gcc/config/aarch64/aarch64.c ++++ b/src/gcc/config/aarch64/aarch64.c +@@ -987,10 +987,7 @@ aarch64_pass_by_reference (cumulative_args_t pcum ATTRIBUTE_UNUSED, + + if (type) + { +- /* Arrays always passed by reference. */ +- if (TREE_CODE (type) == ARRAY_TYPE) +- return true; +- /* Other aggregates based on their size. */ ++ /* Aggregates based on their size. */ + if (AGGREGATE_TYPE_P (type)) + size = int_size_in_bytes (type); + } --- gcc-4.8-4.8.5.orig/debian/patches/aarch64-call-frame-info.diff +++ gcc-4.8-4.8.5/debian/patches/aarch64-call-frame-info.diff @@ -0,0 +1,33 @@ +# DP: Fix call frame information in ffi_closure_SYSV on AArch64. + +diff --git a/src/aarch64/sysv.S b/src/aarch64/sysv.S +index 1022454..ecf6371 100644 +--- a/src/libffi/src/aarch64/sysv.S ++++ b/src/libffi/src/aarch64/sysv.S +@@ -231,13 +231,13 @@ ffi_closure_SYSV: + cfi_rel_offset (x30, 8) + + mov x29, sp ++ cfi_def_cfa_register (x29) + + sub sp, sp, #ffi_closure_SYSV_FS +- cfi_adjust_cfa_offset (ffi_closure_SYSV_FS) + + stp x21, x22, [x29, #-16] +- cfi_rel_offset (x21, 0) +- cfi_rel_offset (x22, 8) ++ cfi_rel_offset (x21, -16) ++ cfi_rel_offset (x22, -8) + + /* Load x21 with &call_context. */ + mov x21, sp +@@ -295,7 +295,7 @@ ffi_closure_SYSV: + cfi_restore (x22) + + mov sp, x29 +- cfi_adjust_cfa_offset (-ffi_closure_SYSV_FS) ++ cfi_def_cfa_register (sp) + + ldp x29, x30, [sp], #16 + cfi_adjust_cfa_offset (-16) + --- gcc-4.8-4.8.5.orig/debian/patches/ada-acats.diff +++ gcc-4.8-4.8.5/debian/patches/ada-acats.diff @@ -0,0 +1,190 @@ +# DP: - When running the ACATS, look for the gnat tools in their new +# DP: directory (build/gnattools), and for the shared libraries in +# DP: build/gcc/ada/rts-shared-zcx, build/libgnatvsn and build/libgnatprj. + +Index: b/src/gcc/testsuite/ada/acats/run_acats +=================================================================== +--- a/src/gcc/testsuite/ada/acats/run_acats ++++ b/src/gcc/testsuite/ada/acats/run_acats +@@ -20,52 +20,29 @@ + return 1 + } + ++echo '#!/bin/sh' > host_gnatchop ++echo exec /usr/bin/gnatchop '$*' >> host_gnatchop ++ ++chmod +x host_gnatchop ++ ++echo '#!/bin/sh' > host_gnatmake ++echo echo '$PATH' '$*' >> host_gnatmake ++echo exec /usr/bin/gnatmake '$*' >> host_gnatmake ++ ++chmod +x host_gnatmake ++ + # Set up environment to use the Ada compiler from the object tree + +-host_gnatchop=`which gnatchop` +-host_gnatmake=`which gnatmake` + ROOT=`${PWDCMD-pwd}` + BASE=`cd $ROOT/../../..; ${PWDCMD-pwd}` +- + PATH=$BASE:$ROOT:$PATH +-ADA_INCLUDE_PATH=$BASE/ada/rts +-LD_LIBRARY_PATH=$ADA_INCLUDE_PATH:$BASE:$LD_LIBRARY_PATH +-ADA_OBJECTS_PATH=$ADA_INCLUDE_PATH +- +-if [ ! -d $ADA_INCLUDE_PATH ]; then +- echo gnatlib missing, exiting. +- exit 1 +-fi +- +-if [ ! -f $BASE/gnatchop ]; then +- echo gnattools missing, exiting. +- exit 1 +-fi +- +-if [ ! -f $BASE/gnatmake ]; then +- echo gnattools missing, exiting. +- exit 1 +-fi +- ++GNATTOOLS=`cd $BASE/../gnattools; ${PWDCMD-pwd}` ++LIBGNATVSN=`cd $BASE/../libgnatvsn; ${PWDCMD-pwd}` ++LIBGNATPRJ=`cd $BASE/../libgnatprj; ${PWDCMD-pwd}` + GCC_DRIVER="$BASE/xgcc" + GCC="$BASE/xgcc -B$BASE/" + export PATH ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_DRIVER GCC LD_LIBRARY_PATH +- +-echo '#!/bin/sh' > host_gnatchop +-echo PATH=`dirname $host_gnatchop`:'$PATH' >> host_gnatchop +-echo unset ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_EXEC_PREFIX >> host_gnatchop +-echo export PATH >> host_gnatchop +-echo exec gnatchop '"$@"' >> host_gnatchop +- +-chmod +x host_gnatchop +- +-echo '#!/bin/sh' > host_gnatmake +-echo PATH=`dirname $host_gnatmake`:'$PATH' >> host_gnatmake +-echo unset ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_EXEC_PREFIX >> host_gnatmake +-echo export PATH >> host_gnatmake +-echo exec gnatmake '"$@"' >> host_gnatmake +- +-chmod +x host_gnatmake ++export GNATTOOLS LIBGNATVSN LIBGNATPRJ + + # Limit the stack to 16MB for stack checking + ulimit -s 16384 +Index: b/src/gcc/testsuite/ada/acats/run_all.sh +=================================================================== +--- a/src/gcc/testsuite/ada/acats/run_all.sh ++++ b/src/gcc/testsuite/ada/acats/run_all.sh +@@ -12,6 +12,11 @@ + gccflags="-O2" + gnatflags="-gnatws" + ++SHARED_RTS=`cd $GNATTOOLS/../gcc/ada/rts-shared-zcx; ${PWDCMD-pwd}` ++RTS=`cd $GNATTOOLS/../gcc/ada/rts-static-zcx; ${PWDCMD-pwd}` ++LD_LIBRARY_PATH=$SHARED_RTS:$LIBGNATVSN:$LIBGNATPRJ ++export LD_LIBRARY_PATH ++ + target_run () { + eval $EXPECT -f $testdir/run_test.exp $* + } +@@ -48,12 +53,15 @@ + fi + + target_gnatchop () { +- gnatchop --GCC="$GCC_DRIVER" $* ++ ADA_INCLUDE_PATH=$GNATTOOLS/../../src/gcc/ada $GNATTOOLS/gnatchop --GCC="$GCC_DRIVER" $* + } + + target_gnatmake () { +- echo gnatmake --GCC=\"$GCC\" $gnatflags $gccflags $* -largs $EXTERNAL_OBJECTS --GCC=\"$GCC\" +- gnatmake --GCC="$GCC" $gnatflags $gccflags $* -largs $EXTERNAL_OBJECTS --GCC="$GCC" ++ EXTERNAL_OBJECTS="$EXTERNAL_OBJECTS $RTS/adaint.o $RTS/sysdep.o $RTS/init.o $RTS/raise-gcc.o" ++ $GNATTOOLS/gnatmake -I- -I$RTS -I. \ ++ --GCC="$GCC" --GNATBIND="$GNATTOOLS/gnatbind" \ ++ --GNATLINK="$GNATTOOLS/gnatlink" $gnatflags $gccflags $* \ ++ -bargs -static -largs $EXTERNAL_OBJECTS --GCC="$GCC -I- -I$RTS -I." + } + + target_gcc () { +@@ -86,8 +94,8 @@ + display `$GCC -v 2>&1` + display host=`gcc -dumpmachine` + display target=$target +-display `type gnatmake` +-gnatls -v >> $dir/acats.log ++display `type $GNATTOOLS/gnatmake` ++$GNATTOOLS/gnatls -I- -I$RTS -v >> $dir/acats.log + display "" + + display " === acats support ===" +Index: b/src/gcc/testsuite/lib/gnat.exp +=================================================================== +--- a/src/gcc/testsuite/lib/gnat.exp ++++ b/src/gcc/testsuite/lib/gnat.exp +@@ -88,18 +88,24 @@ + global GNAT_UNDER_TEST + global TOOL_EXECUTABLE + global gnat_target_current ++ global ld_library_path + + set gnat_target_current "" + + if { $gnat_initialized == 1 } { return } + +- if ![info exists GNAT_UNDER_TEST] then { +- if [info exists TOOL_EXECUTABLE] { +- set GNAT_UNDER_TEST "$TOOL_EXECUTABLE" +- } else { +- set GNAT_UNDER_TEST "[local_find_gnatmake]" +- } +- } ++ set GNAT_UNDER_TEST "$rootme/../gnattools/gnatmake -I$rootme/ada/rts-shared-zcx --GCC=$rootme/xgcc --GNATBIND=$rootme/../gnattools/gnatbind --GNATLINK=$rootme/../gnattools/gnatlink -cargs -B$rootme -largs --GCC=$rootme/xgcc -B$rootme -margs" ++ append ld_library_path ":$rootme/ada/rts-shared-zcx" ++ append ld_library_path ":$rootme/../libgnatvsn" ++ append ld_library_path ":$rootme/../libgnatprj" ++ set_ld_library_path_env_vars ++ ++ # gnatlink looks for system.ads itself and has no --RTS option, so ++ # specify via environment ++ verbose -log "ADA_INCLUDE_PATH=$rootme/ada/rts-shared-zcx" ++ verbose -log "ADA_OBJECTS_PATH=$rootme/ada/rts-shared-zcx" ++ setenv ADA_INCLUDE_PATH "$rootme/ada/rts-shared-zcx" ++ setenv ADA_OBJECTS_PATH "$rootme/ada/rts-shared-zcx" + + if ![info exists tmpdir] then { + set tmpdir /tmp +@@ -121,31 +127,6 @@ + return [gcc_target_compile $source $dest $type $options] + } + +- # If we detect a change of target, we need to recompute both +- # GNAT_UNDER_TEST and the appropriate RTS. +- if { $gnat_target_current!="[current_target_name]" } { +- set gnat_target_current "[current_target_name]" +- if [info exists TOOL_OPTIONS] { +- set rtsdir "[get_multilibs ${TOOL_OPTIONS}]/libada" +- } else { +- set rtsdir "[get_multilibs]/libada" +- } +- if [info exists TOOL_EXECUTABLE] { +- set GNAT_UNDER_TEST "$TOOL_EXECUTABLE" +- } else { +- set GNAT_UNDER_TEST "[local_find_gnatmake]" +- } +- set GNAT_UNDER_TEST "$GNAT_UNDER_TEST --RTS=$rtsdir" +- +- # gnatlink looks for system.ads itself and has no --RTS option, so +- # specify via environment +- setenv ADA_INCLUDE_PATH "$rtsdir/adainclude" +- setenv ADA_OBJECTS_PATH "$rtsdir/adainclude" +- # Always log so compilations can be repeated manually. +- verbose -log "ADA_INCLUDE_PATH=$rtsdir/adainclude" +- verbose -log "ADA_OBJECTS_PATH=$rtsdir/adainclude" +- } +- + lappend options "compiler=$GNAT_UNDER_TEST -q -f" + lappend options "timeout=[timeout_value]" + --- gcc-4.8-4.8.5.orig/debian/patches/ada-default-project-path.diff +++ gcc-4.8-4.8.5/debian/patches/ada-default-project-path.diff @@ -0,0 +1,98 @@ +# DP: - Change the default search path for project files to the one specified +# DP: by the Debian Policy for Ada: /usr/share/ada/adainclude. + +Index: b/src/gcc/ada/Make-generated.in +=================================================================== +--- a/src/gcc/ada/Make-generated.in ++++ b/src/gcc/ada/Make-generated.in +@@ -105,7 +105,7 @@ + $(ECHO) " S1 : constant String := \"$(ADA_INCLUDE_DIR)/\";" >>tmp-sdefault.adb + $(ECHO) " S2 : constant String := \"$(ADA_RTL_OBJ_DIR)/\";" >>tmp-sdefault.adb + $(ECHO) " S3 : constant String := \"$(target_noncanonical)/\";" >>tmp-sdefault.adb +- $(ECHO) " S4 : constant String := \"$(libsubdir)/\";" >>tmp-sdefault.adb ++ $(ECHO) " S4 : constant String := \"/usr/share/ada/adainclude/\";" >>tmp-sdefault.adb + $(ECHO) " function Include_Dir_Default_Name return String_Ptr is" >>tmp-sdefault.adb + $(ECHO) " begin" >>tmp-sdefault.adb + $(ECHO) " return Relocate_Path (S0, S1);" >>tmp-sdefault.adb +Index: b/src/gcc/ada/prj-env.adb +=================================================================== +--- a/src/gcc/ada/prj-env.adb ++++ b/src/gcc/ada/prj-env.adb +@@ -25,7 +25,6 @@ + + with Fmap; + with Hostparm; +-with Makeutl; use Makeutl; + with Opt; + with Osint; use Osint; + with Output; use Output; +@@ -1889,6 +1888,7 @@ + (Self : in out Project_Search_Path; + Target_Name : String) + is ++ pragma Unreferenced (Target_Name); + Add_Default_Dir : Boolean := True; + First : Positive; + Last : Positive; +@@ -2023,59 +2023,8 @@ + + -- Set the initial value of Current_Project_Path + +- if Add_Default_Dir then +- declare +- Prefix : String_Ptr; +- +- begin +- if Sdefault.Search_Dir_Prefix = null then +- +- -- gprbuild case +- +- Prefix := new String'(Executable_Prefix_Path); +- +- else +- Prefix := new String'(Sdefault.Search_Dir_Prefix.all +- & ".." & Dir_Separator +- & ".." & Dir_Separator +- & ".." & Dir_Separator +- & ".." & Dir_Separator); +- end if; +- +- if Prefix.all /= "" then +- if Target_Name /= "" then +- +- -- $prefix/$target/lib/gnat +- +- Add_Str_To_Name_Buffer +- (Path_Separator & Prefix.all & Target_Name); +- +- -- Note: Target_Name has a trailing / when it comes from +- -- Sdefault. +- +- if Name_Buffer (Name_Len) /= '/' then +- Add_Char_To_Name_Buffer (Directory_Separator); +- end if; +- +- Add_Str_To_Name_Buffer +- ("lib" & Directory_Separator & "gnat"); +- end if; +- +- -- $prefix/share/gpr +- +- Add_Str_To_Name_Buffer +- (Path_Separator & Prefix.all & +- "share" & Directory_Separator & "gpr"); +- +- -- $prefix/lib/gnat +- +- Add_Str_To_Name_Buffer +- (Path_Separator & Prefix.all & +- "lib" & Directory_Separator & "gnat"); +- end if; +- +- Free (Prefix); +- end; ++ if Add_Default_Dir and Sdefault.Search_Dir_Prefix /= null then ++ Add_Str_To_Name_Buffer (Path_Separator & Sdefault.Search_Dir_Prefix.all); + end if; + + Self.Path := new String'(Name_Buffer (1 .. Name_Len)); --- gcc-4.8-4.8.5.orig/debian/patches/ada-driver-check.diff +++ gcc-4.8-4.8.5/debian/patches/ada-driver-check.diff @@ -0,0 +1,26 @@ +# DP: Simplify Ada driver check (we always build using the required +# DP: Ada version. Needed for warnings on alpha. + +--- a/src/config/acx.m4~ 2007-09-02 19:24:08.865326043 +0200 ++++ b/src/config/acx.m4 2007-09-02 19:28:53.719623005 +0200 +@@ -380,7 +380,7 @@ + # Other compilers, like HP Tru64 UNIX cc, exit successfully when + # given a .adb file, but produce no object file. So we must check + # if an object file was really produced to guard against this. +-errors=`(${CC} $1[]m4_ifval([$1], [ ])-c conftest.adb) 2>&1 || echo failure` ++errors=`(${CC} $1[]m4_ifval([$1], [ ])-c conftest.adb) 2>/dev/null || echo failure` + if test x"$errors" = x && test -f conftest.$ac_objext; then + acx_cv_cc_gcc_supports_ada=yes + fi + +--- a/src/configure~ 2007-09-02 16:50:31.206279000 +0200 ++++ b/src/configure 2007-09-02 19:28:58.259691491 +0200 +@@ -4448,7 +4448,7 @@ + # Other compilers, like HP Tru64 UNIX cc, exit successfully when + # given a .adb file, but produce no object file. So we must check + # if an object file was really produced to guard against this. +-errors=`(${CC} -c conftest.adb) 2>&1 || echo failure` ++errors=`(${CC} -c conftest.adb) 2>/dev/null || echo failure` + if test x"$errors" = x && test -f conftest.$ac_objext; then + acx_cv_cc_gcc_supports_ada=yes + fi --- gcc-4.8-4.8.5.orig/debian/patches/ada-gcc-name.diff +++ gcc-4.8-4.8.5/debian/patches/ada-gcc-name.diff @@ -0,0 +1,112 @@ +# DP: use gcc-4.8 instead of gcc as the command name. + +Index: b/src/gcc/ada/comperr.adb +=================================================================== +--- a/src/gcc/ada/comperr.adb ++++ b/src/gcc/ada/comperr.adb +@@ -371,7 +371,7 @@ + End_Line; + + Write_Str +- ("| Include the exact gcc or gnatmake command " & ++ ("| Include the exact gcc-4.8 or gnatmake command " & + "that you entered."); + End_Line; + +Index: b/src/gcc/ada/gnatlink.adb +=================================================================== +--- a/src/gcc/ada/gnatlink.adb ++++ b/src/gcc/ada/gnatlink.adb +@@ -137,7 +137,7 @@ + -- This table collects the arguments to be passed to compile the binder + -- generated file. + +- Gcc : String_Access := Program_Name ("gcc", "gnatlink"); ++ Gcc : String_Access := Program_Name ("gcc-4.8", "gnatlink"); + + Read_Mode : constant String := "r" & ASCII.NUL; + +@@ -1438,7 +1438,8 @@ + end if; + + Write_Line (" --GCC=comp Use comp as the compiler"); +- Write_Line (" --LINK=nam Use 'nam' for the linking rather than 'gcc'"); ++ Write_Line (" --LINK=nam Use 'nam' for the linking rather " & ++ "than 'gcc-4.8'"); + Write_Eol; + Write_Line (" [non-Ada-objects] list of non Ada object files"); + Write_Line (" [linker-options] other options for the linker"); +Index: b/src/gcc/ada/make.adb +=================================================================== +--- a/src/gcc/ada/make.adb ++++ b/src/gcc/ada/make.adb +@@ -669,7 +669,7 @@ + -- Compiler, Binder & Linker Data and Subprograms -- + ---------------------------------------------------- + +- Gcc : String_Access := Program_Name ("gcc", "gnatmake"); ++ Gcc : String_Access := Program_Name ("gcc-4.8", "gnatmake"); + Original_Gcc : constant String_Access := Gcc; + -- Original_Gcc is used to check if Gcc has been modified by a switch + -- --GCC=, so that for VM platforms, it is not modified again, as it can +Index: b/src/gcc/ada/gnatchop.adb +=================================================================== +--- a/src/gcc/ada/gnatchop.adb ++++ b/src/gcc/ada/gnatchop.adb +@@ -45,7 +45,7 @@ + Config_File_Name : constant String_Access := new String'("gnat.adc"); + -- The name of the file holding the GNAT configuration pragmas + +- Gcc : String_Access := new String'("gcc"); ++ Gcc : String_Access := new String'("gcc-4.8"); + -- May be modified by switch --GCC= + + Gcc_Set : Boolean := False; +Index: b/src/gcc/ada/mdll-utl.adb +=================================================================== +--- a/src/gcc/ada/mdll-utl.adb ++++ b/src/gcc/ada/mdll-utl.adb +@@ -39,7 +39,7 @@ + Dlltool_Name : constant String := "dlltool"; + Dlltool_Exec : OS_Lib.String_Access; + +- Gcc_Name : constant String := "gcc"; ++ Gcc_Name : constant String := "gcc-4.8"; + Gcc_Exec : OS_Lib.String_Access; + + Gnatbind_Name : constant String := "gnatbind"; +@@ -212,7 +212,7 @@ + end; + end if; + +- Print_Command ("gcc", Arguments (1 .. A)); ++ Print_Command ("gcc-4.8", Arguments (1 .. A)); + + OS_Lib.Spawn (Gcc_Exec.all, Arguments (1 .. A), Success); + +Index: b/src/gcc/ada/mlib-utl.adb +=================================================================== +--- a/src/gcc/ada/mlib-utl.adb ++++ b/src/gcc/ada/mlib-utl.adb +@@ -439,7 +439,7 @@ + if Driver_Name = No_Name then + if Gcc_Exec = null then + if Gcc_Name = null then +- Gcc_Name := Osint.Program_Name ("gcc", "gnatmake"); ++ Gcc_Name := Osint.Program_Name ("gcc-4.8", "gnatmake"); + end if; + + Gcc_Exec := Locate_Exec_On_Path (Gcc_Name.all); +Index: b/src/gcc/ada/prj-makr.adb +=================================================================== +--- a/src/gcc/ada/prj-makr.adb ++++ b/src/gcc/ada/prj-makr.adb +@@ -114,7 +114,7 @@ + + procedure Dup2 (Old_Fd, New_Fd : File_Descriptor); + +- Gcc : constant String := "gcc"; ++ Gcc : constant String := "gcc-4.8"; + Gcc_Path : String_Access := null; + + Non_Empty_Node : constant Project_Node_Id := 1; --- gcc-4.8-4.8.5.orig/debian/patches/ada-kfreebsd.diff +++ gcc-4.8-4.8.5/debian/patches/ada-kfreebsd.diff @@ -0,0 +1,337 @@ +# DP: add support for GNU/kFreeBSD. + +Index: b/src/gcc/ada/terminals.c +=================================================================== +--- a/src/gcc/ada/terminals.c ++++ b/src/gcc/ada/terminals.c +@@ -987,6 +987,7 @@ __gnat_setup_winsize (void *desc, int ro + /* On some system termio is either absent or including it will disable termios + (HP-UX) */ + #if ! defined (__hpux__) && ! defined (FREEBSD) && \ ++ ! defined (__FreeBSD_kernel__) && \ + ! defined (__APPLE__) && ! defined(__rtems__) + # include + #endif +Index: b/src/gcc/ada/s-osinte-kfreebsd-gnu.adb +=================================================================== +--- /dev/null ++++ b/src/gcc/ada/s-osinte-kfreebsd-gnu.adb +@@ -0,0 +1,158 @@ ++------------------------------------------------------------------------------ ++-- -- ++-- GNAT RUN-TIME LIBRARY (GNARL) COMPONENTS -- ++-- -- ++-- S Y S T E M . O S _ I N T E R F A C E -- ++-- -- ++-- B o d y -- ++-- -- ++-- Copyright (C) 1991-1994, Florida State University -- ++-- Copyright (C) 1995-2006, AdaCore -- ++-- -- ++-- GNARL is free software; you can redistribute it and/or modify it under -- ++-- terms of the GNU General Public License as published by the Free Soft- -- ++-- ware Foundation; either version 2, or (at your option) any later ver- -- ++-- sion. GNARL is distributed in the hope that it will be useful, but WITH- -- ++-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- ++-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -- ++-- for more details. You should have received a copy of the GNU General -- ++-- Public License distributed with GNARL; see file COPYING. If not, write -- ++-- to the Free Software Foundation, 51 Franklin Street, Fifth Floor, -- ++-- Boston, MA 02110-1301, USA. -- ++-- -- ++-- As a special exception, if other files instantiate generics from this -- ++-- unit, or you link this unit with other files to produce an executable, -- ++-- this unit does not by itself cause the resulting executable to be -- ++-- covered by the GNU General Public License. This exception does not -- ++-- however invalidate any other reasons why the executable file might be -- ++-- covered by the GNU Public License. -- ++-- -- ++-- GNARL was developed by the GNARL team at Florida State University. -- ++-- Extensive contributions were provided by Ada Core Technologies, Inc. -- ++-- -- ++------------------------------------------------------------------------------ ++ ++-- This is the GNU/kFreeBSD version of this package. ++ ++pragma Polling (Off); ++-- Turn off polling, we do not want ATC polling to take place during ++-- tasking operations. It causes infinite loops and other problems. ++ ++-- This package encapsulates all direct interfaces to OS services ++-- that are needed by children of System. ++ ++package body System.OS_Interface is ++ ++ -------------------- ++ -- Get_Stack_Base -- ++ -------------------- ++ ++ function Get_Stack_Base (thread : pthread_t) return Address is ++ pragma Warnings (Off, thread); ++ ++ begin ++ return Null_Address; ++ end Get_Stack_Base; ++ ++ ------------------ ++ -- pthread_init -- ++ ------------------ ++ ++ procedure pthread_init is ++ begin ++ null; ++ end pthread_init; ++ ++ ----------------------------------- ++ -- pthread_mutexattr_setprotocol -- ++ ----------------------------------- ++ ++ function pthread_mutexattr_setprotocol ++ (attr : access pthread_mutexattr_t; ++ protocol : int) return int is ++ pragma Unreferenced (attr, protocol); ++ begin ++ return 0; ++ end pthread_mutexattr_setprotocol; ++ ++ ----------------------------------- ++ -- pthread_mutexattr_getprotocol -- ++ ----------------------------------- ++ ++ function pthread_mutexattr_getprotocol ++ (attr : access pthread_mutexattr_t; ++ protocol : access int) return int is ++ pragma Unreferenced (attr, protocol); ++ begin ++ return 0; ++ end pthread_mutexattr_getprotocol; ++ ++ -------------------------------------- ++ -- pthread_mutexattr_setprioceiling -- ++ -------------------------------------- ++ ++ function pthread_mutexattr_setprioceiling ++ (attr : access pthread_mutexattr_t; ++ prioceiling : int) return int is ++ pragma Unreferenced (attr, prioceiling); ++ begin ++ return 0; ++ end pthread_mutexattr_setprioceiling; ++ ++ -------------------------------------- ++ -- pthread_mutexattr_getprioceiling -- ++ -------------------------------------- ++ ++ function pthread_mutexattr_getprioceiling ++ (attr : access pthread_mutexattr_t; ++ prioceiling : access int) return int is ++ pragma Unreferenced (attr, prioceiling); ++ begin ++ return 0; ++ end pthread_mutexattr_getprioceiling; ++ ++ ----------------- ++ -- To_Duration -- ++ ----------------- ++ ++ function To_Duration (TS : timespec) return Duration is ++ begin ++ return Duration (TS.tv_sec) + Duration (TS.tv_nsec) / 10#1#E9; ++ end To_Duration; ++ ++ ------------------------ ++ -- To_Target_Priority -- ++ ------------------------ ++ ++ function To_Target_Priority ++ (Prio : System.Any_Priority) return Interfaces.C.int ++ is ++ begin ++ return Interfaces.C.int (Prio); ++ end To_Target_Priority; ++ ++ ----------------- ++ -- To_Timespec -- ++ ----------------- ++ ++ function To_Timespec (D : Duration) return timespec is ++ S : time_t; ++ F : Duration; ++ ++ begin ++ S := time_t (Long_Long_Integer (D)); ++ F := D - Duration (S); ++ ++ -- If F has negative value due to a round-up, adjust for positive F ++ -- value. ++ ++ if F < 0.0 then ++ S := S - 1; ++ F := F + 1.0; ++ end if; ++ ++ return timespec'(tv_sec => S, ++ tv_nsec => long (Long_Long_Integer (F * 10#1#E9))); ++ end To_Timespec; ++ ++end System.OS_Interface; +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -1221,7 +1221,7 @@ ifeq ($(strip $(filter-out %86 kfreebsd% + a-intnam.ads ++# ++# This file is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ ++# Default target; must be first. ++all: libgnatprj ++ ++.SUFFIXES: ++ ++CPUS := $(shell getconf _NPROCESSORS_ONLN) ++LIB_VERSION := $(strip $(shell grep ' Library_Version :' \ ++ @srcdir@/../gcc/ada/gnatvsn.ads | \ ++ sed -e 's/.*"\(.*\)".*/\1/')) ++GCC:=../gcc/xgcc -B../gcc/ ++GPP := ../gcc/xg++ -B../gcc/ ++LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++LIBGNATVSN := -I../libgnatvsn ++CFLAGS := -g -O2 ++ADAFLAGS := -g -O2 -gnatn ++BASEVER := $(shell cat @srcdir@/../gcc/BASE-VER) ++DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE) ++DATESTAMP := $(shell cat @srcdir@/../gcc/DATESTAMP) ++TOOLS_TARGET_PAIRS := @TOOLS_TARGET_PAIRS@ ++LN_S := @LN_S@ ++ ++ifneq (@build@,@host@) ++ CFLAGS += -b @host@ ++endif ++ ++.PHONY: libgnatprj install ++libgnatprj: libgnatprj.so.$(LIB_VERSION) libgnatprj.a ++ ++# Here we list one file per Ada unit: the body file if the unit has a ++# body, the spec file otherwise. ++PRJ_SOURCES := ali.adb ali-util.adb butil.adb binderr.adb errout.adb \ ++erroutc.adb errutil.adb err_vars.ads fname-uf.adb fmap.adb impunit.adb \ ++lib-util.adb makeutl.adb mlib.adb mlib-fil.adb mlib-tgt.adb \ ++mlib-tgt-specific.adb mlib-utl.adb osint.adb osint-c.adb prj.adb prj-attr.adb \ ++prj-attr-pm.adb prj-com.ads prj-conf.adb prj-dect.adb prj-env.adb prj-err.adb \ ++prj-ext.adb prj-makr.adb prj-nmsc.adb prj-pars.adb prj-part.adb prj-pp.adb \ ++prj-proc.adb prj-strt.adb prj-tree.adb prj-util.adb restrict.adb rident.ads \ ++scng.adb sfn_scan.adb sinfo-cn.adb sinput-c.adb sinput-p.adb style.adb \ ++styleg.adb stylesw.adb switch.adb switch-m.adb targparm.adb tempdir.adb ++ ++# Source files generated in build/gcc/ada, not src/gcc/ada. ++GENERATED_SOURCES := sdefault.adb ++ ++SOURCES := $(PRJ_SOURCES) $(GENERATED_SOURCES) ++ ++OBJECTS := $(patsubst %.ads,%.o,$(SOURCES:.adb=.o)) ++ ++# Add some object files compiled from C sources. prefix.o requires ++# some objects from libiberty and from gcc. ++OBJECTS += common-targhooks.o errors.o hooks.o link.o prefix.o targetm.o ++ ++# These object files have already been built, both PIC and non-PIC. ++# prefix.o depends on them. ++LIBIBERTY_OBJECTS := concat.o filename_cmp.o safe-ctype.o xexit.o xmalloc.o xstrdup.o ++ ++vpath %.c @srcdir@ @srcdir@/../gcc @srcdir@/../gcc/common @srcdir@/../gcc/ada ++ ++libgnatprj.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) ++ : # Make libgnatprj.so ++ $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ -Wl,--no-allow-shlib-undefined \ ++ $^ $(addprefix ../libiberty/pic/,$(LIBIBERTY_OBJECTS)) \ ++ -L../gcc/ada/rts -lgnat-$(LIB_VERSION) \ ++ -L../libgnatvsn -lgnatvsn ++ $(LN_S) -f libgnatprj.so.$(LIB_VERSION) libgnatprj.so ++ chmod a=r obj-shared/*.ali ++# Make the .ali files, but not the .o files, visible to the gnat tools. ++ cp -lp obj-shared/*.ali . ++ ++$(addprefix obj-shared/,$(OBJECTS)): | stamp-libgnatprj-sources obj-shared ++ ++obj-shared/%.o: %.adb ++ $(GCC) -c -fPIC $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-shared/%.o: %.ads ++ $(GCC) -c -fPIC $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-shared/%.o: %.c ++ $(GPP) -c -fPIC $(CFLAGS) -DHAVE_CONFIG_H -pedantic \ ++ -I@srcdir@/../gcc -I@srcdir@/../include -I@srcdir@/../libcpp/include -I../gcc \ ++ $< -o $@ ++ ++obj-shared/prefix.o: @srcdir@/../gcc/prefix.c ++ $(GPP) -c -fPIC $(CFLAGS) -DPREFIX=\"@prefix@\" -DBASEVER=\"$(BASEVER)\" \ ++ -I@srcdir@/../gcc -I@srcdir@/../include -I../gcc -I@srcdir@/../libcpp/include \ ++ $< -o $@ ++ ++obj-shared: ++ -mkdir $@ ++ ++libgnatprj.a: $(addprefix obj-static/,$(OBJECTS)) ++ : # Make libgnatprj.a ++ ar rc $@ $^ $(addprefix ../libiberty/,$(LIBIBERTY_OBJECTS)) ++ ranlib $@ ++ ++$(addprefix obj-static/,$(OBJECTS)): | stamp-libgnatprj-sources obj-static ++ ++obj-static/%.o: %.adb ++ $(GCC) -c $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-static/%.o: %.ads ++ $(GCC) -c $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-static/%.o: %.c ++ $(GPP) -c $(CFLAGS) -DHAVE_CONFIG_H -pedantic \ ++ -I@srcdir@/../gcc -I@srcdir@/../include -I@srcdir@/../libcpp/include -I../gcc \ ++ $< -o $@ ++ ++obj-static/prefix.o: @srcdir@/../gcc/prefix.c ++ $(GPP) -c $(CFLAGS) -DPREFIX=\"@prefix@\" -DBASEVER=\"$(BASEVER)\" \ ++ -I@srcdir@/../gcc -I@srcdir@/../include -I../gcc -I@srcdir@/../libcpp/include \ ++ $< -o $@ ++ ++obj-static: ++ -mkdir $@ ++ ++$(SOURCES): stamp-libgnatprj-sources ++ ++stamp-libgnatprj-sources: ++ for file in $(PRJ_SOURCES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f @srcdir@/../gcc/ada/$$file -a ! -L $$file ] ; then $(LN_S) @srcdir@/../gcc/ada/$$file .; fi; \ ++ if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) @srcdir@/../gcc/ada/$$ads .; fi; \ ++ done ++ for file in $(GENERATED_SOURCES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f ../gcc/ada/$$file -a ! -L $$file ] ; then $(LN_S) ../gcc/ada/$$file .; fi; \ ++ if [ -f ../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) ../gcc/ada/$$ads .; \ ++ else \ ++ if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) @srcdir@/../gcc/ada/$$ads .; fi; \ ++ fi; \ ++ done ++ $(foreach PAIR,$(TOOLS_TARGET_PAIRS), \ ++ rm -f $(word 1,$(subst <, ,$(PAIR)));\ ++ $(LN_S) @srcdir@/../gcc/ada/$(word 2,$(subst <, ,$(PAIR))) \ ++ $(word 1,$(subst <, ,$(PAIR)));) ++ touch $@ ++ ++# Generate a list of source files (.ads and .adb) to install. Almost ++# all of them are in src/gcc/ada, but some are generated during build ++# and are in build/gcc/ada. ++BODIES := $(filter %.adb,$(PRJ_SOURCES)) ++SPECS := $(filter %.ads,$(PRJ_SOURCES)) $(patsubst %.adb,%.ads,$(BODIES) $(GENERATED_SOURCES)) ++SOURCES_TO_INSTALL := \ ++$(addprefix @srcdir@/../gcc/ada/,$(SPECS) $(BODIES)) \ ++$(addprefix ../gcc/ada/,$(GENERATED_SOURCES)) ++ ++libdir = @libdir@ ++ ++install: libgnatprj ++ $(INSTALL_DATA) libgnatprj.a $(DESTDIR)$(libdir) ++ $(INSTALL_DATA) libgnatprj.so.$(LIB_VERSION) $(DESTDIR)$(libdir) ++ cd $(DESTDIR)$(libdir); ln -sf libgnatprj.so.$(LIB_VERSION) libgnatprj.so ++ mkdir -p $(DESTDIR)$(prefix)/share/ada/adainclude/gnatprj ++ $(INSTALL_DATA) $(SOURCES_TO_INSTALL) \ ++ $(DESTDIR)$(prefix)/share/ada/adainclude/gnatprj ++ mkdir -p $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj ++ $(INSTALL) -m 0444 obj-shared/*.ali \ ++ $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj ++ chmod a=r $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj/*.ali ++ ++.PHONY: clean ++clean: ++ rm -rf *.ali obj-static obj-shared libgnatprj* *.adb *.ads stamp* +Index: b/src/libgnatprj/targetm.c +=================================================================== +--- /dev/null ++++ b/src/libgnatprj/targetm.c +@@ -0,0 +1,7 @@ ++#include "config.h" ++#include "system.h" ++#include "coretypes.h" ++#include "common/common-target.h" ++#include "common/common-target-def.h" ++ ++struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; +Index: b/src/Makefile.def +=================================================================== +--- a/src/Makefile.def ++++ b/src/Makefile.def +@@ -124,6 +124,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++host_modules= { module= libgnatprj; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + host_modules= { module= gnattools; no_check=true; + missing= info; + missing= dvi; +@@ -178,6 +185,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++target_modules = { module= libgnatprj; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; }; + target_modules = { module= libitm; lib_path=.libs; }; + target_modules = { module= libatomic; lib_path=.libs; }; +@@ -366,7 +380,10 @@ + + dependencies = { module=all-gnattools; on=all-libada; }; + dependencies = { module=all-gnattools; on=all-libgnatvsn; }; ++dependencies = { module=all-gnattools; on=all-libgnatprj; }; + dependencies = { module=all-libgnatvsn; on=all-libada; }; ++dependencies = { module=all-libgnatprj; on=all-libada; }; ++dependencies = { module=all-libgnatprj; on=all-libgnatvsn; }; + + dependencies = { module=all-lto-plugin; on=all-libiberty; }; + +Index: b/src/Makefile.in +=================================================================== +--- a/src/Makefile.in ++++ b/src/Makefile.in +@@ -920,6 +920,7 @@ + maybe-configure-utils \ + maybe-configure-libada \ + maybe-configure-libgnatvsn \ ++ maybe-configure-libgnatprj \ + maybe-configure-gnattools \ + maybe-configure-lto-plugin + .PHONY: configure-target +@@ -945,6 +946,7 @@ + maybe-configure-target-rda \ + maybe-configure-target-libada \ + maybe-configure-target-libgnatvsn \ ++ maybe-configure-target-libgnatprj \ + maybe-configure-target-libgomp \ + maybe-configure-target-libitm \ + maybe-configure-target-libatomic +@@ -1067,6 +1069,7 @@ + all-host: maybe-all-utils + all-host: maybe-all-libada + all-host: maybe-all-libgnatvsn ++all-host: maybe-all-libgnatprj + all-host: maybe-all-gnattools + @if lto-plugin-no-bootstrap + all-host: maybe-all-lto-plugin +@@ -1101,6 +1104,7 @@ + all-target: maybe-all-target-rda + all-target: maybe-all-target-libada + all-target: maybe-all-target-libgnatvsn ++all-target: maybe-all-target-libgnatprj + @if target-libgomp-no-bootstrap + all-target: maybe-all-target-libgomp + @endif target-libgomp-no-bootstrap +@@ -1167,6 +1171,7 @@ + info-host: maybe-info-utils + info-host: maybe-info-libada + info-host: maybe-info-libgnatvsn ++info-host: maybe-info-libgnatprj + info-host: maybe-info-gnattools + info-host: maybe-info-lto-plugin + +@@ -1193,6 +1198,7 @@ + info-target: maybe-info-target-rda + info-target: maybe-info-target-libada + info-target: maybe-info-target-libgnatvsn ++info-target: maybe-info-target-libgnatprj + info-target: maybe-info-target-libgomp + info-target: maybe-info-target-libitm + info-target: maybe-info-target-libatomic +@@ -1252,6 +1258,7 @@ + dvi-host: maybe-dvi-utils + dvi-host: maybe-dvi-libada + dvi-host: maybe-dvi-libgnatvsn ++dvi-host: maybe-dvi-libgnatprj + dvi-host: maybe-dvi-gnattools + dvi-host: maybe-dvi-lto-plugin + +@@ -1278,6 +1285,7 @@ + dvi-target: maybe-dvi-target-rda + dvi-target: maybe-dvi-target-libada + dvi-target: maybe-dvi-target-libgnatvsn ++dvi-target: maybe-dvi-target-libgnatprj + dvi-target: maybe-dvi-target-libgomp + dvi-target: maybe-dvi-target-libitm + dvi-target: maybe-dvi-target-libatomic +@@ -1337,6 +1345,7 @@ + pdf-host: maybe-pdf-utils + pdf-host: maybe-pdf-libada + pdf-host: maybe-pdf-libgnatvsn ++pdf-host: maybe-pdf-libgnatprj + pdf-host: maybe-pdf-gnattools + pdf-host: maybe-pdf-lto-plugin + +@@ -1363,6 +1372,7 @@ + pdf-target: maybe-pdf-target-rda + pdf-target: maybe-pdf-target-libada + pdf-target: maybe-pdf-target-libgnatvsn ++pdf-target: maybe-pdf-target-libgnatprj + pdf-target: maybe-pdf-target-libgomp + pdf-target: maybe-pdf-target-libitm + pdf-target: maybe-pdf-target-libatomic +@@ -1422,6 +1432,7 @@ + html-host: maybe-html-utils + html-host: maybe-html-libada + html-host: maybe-html-libgnatvsn ++html-host: maybe-html-libgnatprj + html-host: maybe-html-gnattools + html-host: maybe-html-lto-plugin + +@@ -1448,6 +1459,7 @@ + html-target: maybe-html-target-rda + html-target: maybe-html-target-libada + html-target: maybe-html-target-libgnatvsn ++html-target: maybe-html-target-libgnatprj + html-target: maybe-html-target-libgomp + html-target: maybe-html-target-libitm + html-target: maybe-html-target-libatomic +@@ -1507,6 +1519,7 @@ + TAGS-host: maybe-TAGS-utils + TAGS-host: maybe-TAGS-libada + TAGS-host: maybe-TAGS-libgnatvsn ++TAGS-host: maybe-TAGS-libgnatprj + TAGS-host: maybe-TAGS-gnattools + TAGS-host: maybe-TAGS-lto-plugin + +@@ -1533,6 +1546,7 @@ + TAGS-target: maybe-TAGS-target-rda + TAGS-target: maybe-TAGS-target-libada + TAGS-target: maybe-TAGS-target-libgnatvsn ++TAGS-target: maybe-TAGS-target-libgnatprj + TAGS-target: maybe-TAGS-target-libgomp + TAGS-target: maybe-TAGS-target-libitm + TAGS-target: maybe-TAGS-target-libatomic +@@ -1592,6 +1606,7 @@ + install-info-host: maybe-install-info-utils + install-info-host: maybe-install-info-libada + install-info-host: maybe-install-info-libgnatvsn ++install-info-host: maybe-install-info-libgnatprj + install-info-host: maybe-install-info-gnattools + install-info-host: maybe-install-info-lto-plugin + +@@ -1618,6 +1633,7 @@ + install-info-target: maybe-install-info-target-rda + install-info-target: maybe-install-info-target-libada + install-info-target: maybe-install-info-target-libgnatvsn ++install-info-target: maybe-install-info-target-libgnatprj + install-info-target: maybe-install-info-target-libgomp + install-info-target: maybe-install-info-target-libitm + install-info-target: maybe-install-info-target-libatomic +@@ -1677,6 +1693,7 @@ + install-pdf-host: maybe-install-pdf-utils + install-pdf-host: maybe-install-pdf-libada + install-pdf-host: maybe-install-pdf-libgnatvsn ++install-pdf-host: maybe-install-pdf-libgnatprj + install-pdf-host: maybe-install-pdf-gnattools + install-pdf-host: maybe-install-pdf-lto-plugin + +@@ -1703,6 +1720,7 @@ + install-pdf-target: maybe-install-pdf-target-rda + install-pdf-target: maybe-install-pdf-target-libada + install-pdf-target: maybe-install-pdf-target-libgnatvsn ++install-pdf-target: maybe-install-pdf-target-libgnatprj + install-pdf-target: maybe-install-pdf-target-libgomp + install-pdf-target: maybe-install-pdf-target-libitm + install-pdf-target: maybe-install-pdf-target-libatomic +@@ -1762,6 +1780,7 @@ + install-html-host: maybe-install-html-utils + install-html-host: maybe-install-html-libada + install-html-host: maybe-install-html-libgnatvsn ++install-html-host: maybe-install-html-libgnatprj + install-html-host: maybe-install-html-gnattools + install-html-host: maybe-install-html-lto-plugin + +@@ -1788,6 +1807,7 @@ + install-html-target: maybe-install-html-target-rda + install-html-target: maybe-install-html-target-libada + install-html-target: maybe-install-html-target-libgnatvsn ++install-html-target: maybe-install-html-target-libgnatprj + install-html-target: maybe-install-html-target-libgomp + install-html-target: maybe-install-html-target-libitm + install-html-target: maybe-install-html-target-libatomic +@@ -1847,6 +1867,7 @@ + installcheck-host: maybe-installcheck-utils + installcheck-host: maybe-installcheck-libada + installcheck-host: maybe-installcheck-libgnatvsn ++installcheck-host: maybe-installcheck-libgnatprj + installcheck-host: maybe-installcheck-gnattools + installcheck-host: maybe-installcheck-lto-plugin + +@@ -1873,6 +1894,7 @@ + installcheck-target: maybe-installcheck-target-rda + installcheck-target: maybe-installcheck-target-libada + installcheck-target: maybe-installcheck-target-libgnatvsn ++installcheck-target: maybe-installcheck-target-libgnatprj + installcheck-target: maybe-installcheck-target-libgomp + installcheck-target: maybe-installcheck-target-libitm + installcheck-target: maybe-installcheck-target-libatomic +@@ -1932,6 +1954,7 @@ + mostlyclean-host: maybe-mostlyclean-utils + mostlyclean-host: maybe-mostlyclean-libada + mostlyclean-host: maybe-mostlyclean-libgnatvsn ++mostlyclean-host: maybe-mostlyclean-libgnatprj + mostlyclean-host: maybe-mostlyclean-gnattools + mostlyclean-host: maybe-mostlyclean-lto-plugin + +@@ -1958,6 +1981,7 @@ + mostlyclean-target: maybe-mostlyclean-target-rda + mostlyclean-target: maybe-mostlyclean-target-libada + mostlyclean-target: maybe-mostlyclean-target-libgnatvsn ++mostlyclean-target: maybe-mostlyclean-target-libgnatprj + mostlyclean-target: maybe-mostlyclean-target-libgomp + mostlyclean-target: maybe-mostlyclean-target-libitm + mostlyclean-target: maybe-mostlyclean-target-libatomic +@@ -2017,6 +2041,7 @@ + clean-host: maybe-clean-utils + clean-host: maybe-clean-libada + clean-host: maybe-clean-libgnatvsn ++clean-host: maybe-clean-libgnatprj + clean-host: maybe-clean-gnattools + clean-host: maybe-clean-lto-plugin + +@@ -2043,6 +2068,7 @@ + clean-target: maybe-clean-target-rda + clean-target: maybe-clean-target-libada + clean-target: maybe-clean-target-libgnatvsn ++clean-target: maybe-clean-target-libgnatprj + clean-target: maybe-clean-target-libgomp + clean-target: maybe-clean-target-libitm + clean-target: maybe-clean-target-libatomic +@@ -2102,6 +2128,7 @@ + distclean-host: maybe-distclean-utils + distclean-host: maybe-distclean-libada + distclean-host: maybe-distclean-libgnatvsn ++distclean-host: maybe-distclean-libgnatprj + distclean-host: maybe-distclean-gnattools + distclean-host: maybe-distclean-lto-plugin + +@@ -2128,6 +2155,7 @@ + distclean-target: maybe-distclean-target-rda + distclean-target: maybe-distclean-target-libada + distclean-target: maybe-distclean-target-libgnatvsn ++distclean-target: maybe-distclean-target-libgnatprj + distclean-target: maybe-distclean-target-libgomp + distclean-target: maybe-distclean-target-libitm + distclean-target: maybe-distclean-target-libatomic +@@ -2187,6 +2215,7 @@ + maintainer-clean-host: maybe-maintainer-clean-utils + maintainer-clean-host: maybe-maintainer-clean-libada + maintainer-clean-host: maybe-maintainer-clean-libgnatvsn ++maintainer-clean-host: maybe-maintainer-clean-libgnatprj + maintainer-clean-host: maybe-maintainer-clean-gnattools + maintainer-clean-host: maybe-maintainer-clean-lto-plugin + +@@ -2213,6 +2242,7 @@ + maintainer-clean-target: maybe-maintainer-clean-target-rda + maintainer-clean-target: maybe-maintainer-clean-target-libada + maintainer-clean-target: maybe-maintainer-clean-target-libgnatvsn ++maintainer-clean-target: maybe-maintainer-clean-target-libgnatprj + maintainer-clean-target: maybe-maintainer-clean-target-libgomp + maintainer-clean-target: maybe-maintainer-clean-target-libitm + maintainer-clean-target: maybe-maintainer-clean-target-libatomic +@@ -2327,6 +2357,7 @@ + maybe-check-utils \ + maybe-check-libada \ + maybe-check-libgnatvsn \ ++ maybe-check-libgnatprj \ + maybe-check-gnattools \ + maybe-check-lto-plugin + +@@ -2353,6 +2384,7 @@ + maybe-check-target-rda \ + maybe-check-target-libada \ + maybe-check-target-libgnatvsn \ ++ maybe-check-target-libgnatprj \ + maybe-check-target-libgomp \ + maybe-check-target-libitm \ + maybe-check-target-libatomic +@@ -2438,6 +2470,7 @@ + maybe-install-utils \ + maybe-install-libada \ + maybe-install-libgnatvsn \ ++ maybe-install-libgnatprj \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -2487,6 +2520,7 @@ + maybe-install-utils \ + maybe-install-libada \ + maybe-install-libgnatvsn \ ++ maybe-install-libgnatprj \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -2513,6 +2547,7 @@ + maybe-install-target-rda \ + maybe-install-target-libada \ + maybe-install-target-libgnatvsn \ ++ maybe-install-target-libgnatprj \ + maybe-install-target-libgomp \ + maybe-install-target-libitm \ + maybe-install-target-libatomic +@@ -2592,6 +2627,7 @@ + maybe-install-strip-utils \ + maybe-install-strip-libada \ + maybe-install-strip-libgnatvsn \ ++ maybe-install-strip-libgnatprj \ + maybe-install-strip-gnattools \ + maybe-install-strip-lto-plugin + +@@ -2618,6 +2654,7 @@ + maybe-install-strip-target-rda \ + maybe-install-strip-target-libada \ + maybe-install-strip-target-libgnatvsn \ ++ maybe-install-strip-target-libgnatprj \ + maybe-install-strip-target-libgomp \ + maybe-install-strip-target-libitm \ + maybe-install-strip-target-libatomic +@@ -30140,6 +30177,343 @@ + + + ++.PHONY: configure-libgnatprj maybe-configure-libgnatprj ++maybe-configure-libgnatprj: ++@if gcc-bootstrap ++configure-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if libgnatprj ++maybe-configure-libgnatprj: configure-libgnatprj ++configure-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ test ! -f $(HOST_SUBDIR)/libgnatprj/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libgnatprj ; \ ++ $(HOST_EXPORTS) \ ++ echo Configuring in $(HOST_SUBDIR)/libgnatprj; \ ++ cd "$(HOST_SUBDIR)/libgnatprj" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(HOST_SUBDIR)/libgnatprj/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatprj"; \ ++ libsrcdir="$$s/libgnatprj"; \ ++ $(SHELL) $${libsrcdir}/configure \ ++ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif libgnatprj ++ ++ ++ ++ ++ ++.PHONY: all-libgnatprj maybe-all-libgnatprj ++maybe-all-libgnatprj: ++@if gcc-bootstrap ++all-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if libgnatprj ++TARGET-libgnatprj=all ++maybe-all-libgnatprj: all-libgnatprj ++all-libgnatprj: configure-libgnatprj ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(STAGE1_FLAGS_TO_PASS) \ ++ $(TARGET-libgnatprj)) ++@endif libgnatprj ++ ++ ++ ++ ++.PHONY: check-libgnatprj maybe-check-libgnatprj ++maybe-check-libgnatprj: ++@if libgnatprj ++maybe-check-libgnatprj: check-libgnatprj ++ ++check-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: install-libgnatprj maybe-install-libgnatprj ++maybe-install-libgnatprj: ++@if libgnatprj ++maybe-install-libgnatprj: install-libgnatprj ++ ++install-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(FLAGS_TO_PASS) install) ++ ++@endif libgnatprj ++ ++.PHONY: install-strip-libgnatprj maybe-install-strip-libgnatprj ++maybe-install-strip-libgnatprj: ++@if libgnatprj ++maybe-install-strip-libgnatprj: install-strip-libgnatprj ++ ++install-strip-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(FLAGS_TO_PASS) install-strip) ++ ++@endif libgnatprj ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-libgnatprj info-libgnatprj ++maybe-info-libgnatprj: ++@if libgnatprj ++maybe-info-libgnatprj: info-libgnatprj ++ ++# libgnatprj doesn't support info. ++info-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-dvi-libgnatprj dvi-libgnatprj ++maybe-dvi-libgnatprj: ++@if libgnatprj ++maybe-dvi-libgnatprj: dvi-libgnatprj ++ ++# libgnatprj doesn't support dvi. ++dvi-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-pdf-libgnatprj pdf-libgnatprj ++maybe-pdf-libgnatprj: ++@if libgnatprj ++maybe-pdf-libgnatprj: pdf-libgnatprj ++ ++pdf-libgnatprj: \ ++ configure-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing pdf in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-html-libgnatprj html-libgnatprj ++maybe-html-libgnatprj: ++@if libgnatprj ++maybe-html-libgnatprj: html-libgnatprj ++ ++# libgnatprj doesn't support html. ++html-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-TAGS-libgnatprj TAGS-libgnatprj ++maybe-TAGS-libgnatprj: ++@if libgnatprj ++maybe-TAGS-libgnatprj: TAGS-libgnatprj ++ ++# libgnatprj doesn't support TAGS. ++TAGS-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-install-info-libgnatprj install-info-libgnatprj ++maybe-install-info-libgnatprj: ++@if libgnatprj ++maybe-install-info-libgnatprj: install-info-libgnatprj ++ ++# libgnatprj doesn't support install-info. ++install-info-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-install-pdf-libgnatprj install-pdf-libgnatprj ++maybe-install-pdf-libgnatprj: ++@if libgnatprj ++maybe-install-pdf-libgnatprj: install-pdf-libgnatprj ++ ++install-pdf-libgnatprj: \ ++ configure-libgnatprj \ ++ pdf-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-pdf in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-install-html-libgnatprj install-html-libgnatprj ++maybe-install-html-libgnatprj: ++@if libgnatprj ++maybe-install-html-libgnatprj: install-html-libgnatprj ++ ++install-html-libgnatprj: \ ++ configure-libgnatprj \ ++ html-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-html in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-installcheck-libgnatprj installcheck-libgnatprj ++maybe-installcheck-libgnatprj: ++@if libgnatprj ++maybe-installcheck-libgnatprj: installcheck-libgnatprj ++ ++# libgnatprj doesn't support installcheck. ++installcheck-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-mostlyclean-libgnatprj mostlyclean-libgnatprj ++maybe-mostlyclean-libgnatprj: ++@if libgnatprj ++maybe-mostlyclean-libgnatprj: mostlyclean-libgnatprj ++ ++mostlyclean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing mostlyclean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-clean-libgnatprj clean-libgnatprj ++maybe-clean-libgnatprj: ++@if libgnatprj ++maybe-clean-libgnatprj: clean-libgnatprj ++ ++clean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing clean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-distclean-libgnatprj distclean-libgnatprj ++maybe-distclean-libgnatprj: ++@if libgnatprj ++maybe-distclean-libgnatprj: distclean-libgnatprj ++ ++distclean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing distclean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-maintainer-clean-libgnatprj maintainer-clean-libgnatprj ++maybe-maintainer-clean-libgnatprj: ++@if libgnatprj ++maybe-maintainer-clean-libgnatprj: maintainer-clean-libgnatprj ++ ++maintainer-clean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing maintainer-clean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++ ++ + .PHONY: configure-gnattools maybe-configure-gnattools + maybe-configure-gnattools: + @if gcc-bootstrap +@@ -42211,6 +42585,361 @@ + + + ++.PHONY: configure-target-libgnatprj maybe-configure-target-libgnatprj ++maybe-configure-target-libgnatprj: ++@if gcc-bootstrap ++configure-target-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if target-libgnatprj ++maybe-configure-target-libgnatprj: configure-target-libgnatprj ++configure-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ echo "Checking multilib configuration for libgnatprj..."; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatprj ; \ ++ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgnatprj/multilib.tmp 2> /dev/null ; \ ++ if test -r $(TARGET_SUBDIR)/libgnatprj/multilib.out; then \ ++ if cmp -s $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; then \ ++ rm -f $(TARGET_SUBDIR)/libgnatprj/multilib.tmp; \ ++ else \ ++ rm -f $(TARGET_SUBDIR)/libgnatprj/Makefile; \ ++ mv $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; \ ++ fi; \ ++ else \ ++ mv $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; \ ++ fi; \ ++ test ! -f $(TARGET_SUBDIR)/libgnatprj/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatprj ; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo Configuring in $(TARGET_SUBDIR)/libgnatprj; \ ++ cd "$(TARGET_SUBDIR)/libgnatprj" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(TARGET_SUBDIR)/libgnatprj/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatprj"; \ ++ libsrcdir="$$s/libgnatprj"; \ ++ rm -f no-such-file || : ; \ ++ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ ++ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif target-libgnatprj ++ ++ ++ ++ ++ ++.PHONY: all-target-libgnatprj maybe-all-target-libgnatprj ++maybe-all-target-libgnatprj: ++@if gcc-bootstrap ++all-target-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if target-libgnatprj ++TARGET-target-libgnatprj=all ++maybe-all-target-libgnatprj: all-target-libgnatprj ++all-target-libgnatprj: configure-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) \ ++ $(TARGET-target-libgnatprj)) ++@endif target-libgnatprj ++ ++ ++ ++ ++ ++.PHONY: check-target-libgnatprj maybe-check-target-libgnatprj ++maybe-check-target-libgnatprj: ++@if target-libgnatprj ++maybe-check-target-libgnatprj: check-target-libgnatprj ++ ++# Dummy target for uncheckable module. ++check-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: install-target-libgnatprj maybe-install-target-libgnatprj ++maybe-install-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-target-libgnatprj: install-target-libgnatprj ++ ++install-target-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install) ++ ++@endif target-libgnatprj ++ ++.PHONY: install-strip-target-libgnatprj maybe-install-strip-target-libgnatprj ++maybe-install-strip-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-strip-target-libgnatprj: install-strip-target-libgnatprj ++ ++install-strip-target-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install-strip) ++ ++@endif target-libgnatprj ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-target-libgnatprj info-target-libgnatprj ++maybe-info-target-libgnatprj: ++@if target-libgnatprj ++maybe-info-target-libgnatprj: info-target-libgnatprj ++ ++# libgnatprj doesn't support info. ++info-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-dvi-target-libgnatprj dvi-target-libgnatprj ++maybe-dvi-target-libgnatprj: ++@if target-libgnatprj ++maybe-dvi-target-libgnatprj: dvi-target-libgnatprj ++ ++# libgnatprj doesn't support dvi. ++dvi-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-pdf-target-libgnatprj pdf-target-libgnatprj ++maybe-pdf-target-libgnatprj: ++@if target-libgnatprj ++maybe-pdf-target-libgnatprj: pdf-target-libgnatprj ++ ++pdf-target-libgnatprj: \ ++ configure-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing pdf in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-html-target-libgnatprj html-target-libgnatprj ++maybe-html-target-libgnatprj: ++@if target-libgnatprj ++maybe-html-target-libgnatprj: html-target-libgnatprj ++ ++# libgnatprj doesn't support html. ++html-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-TAGS-target-libgnatprj TAGS-target-libgnatprj ++maybe-TAGS-target-libgnatprj: ++@if target-libgnatprj ++maybe-TAGS-target-libgnatprj: TAGS-target-libgnatprj ++ ++# libgnatprj doesn't support TAGS. ++TAGS-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-install-info-target-libgnatprj install-info-target-libgnatprj ++maybe-install-info-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-info-target-libgnatprj: install-info-target-libgnatprj ++ ++# libgnatprj doesn't support install-info. ++install-info-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-install-pdf-target-libgnatprj install-pdf-target-libgnatprj ++maybe-install-pdf-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-pdf-target-libgnatprj: install-pdf-target-libgnatprj ++ ++install-pdf-target-libgnatprj: \ ++ configure-target-libgnatprj \ ++ pdf-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-pdf in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-install-html-target-libgnatprj install-html-target-libgnatprj ++maybe-install-html-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-html-target-libgnatprj: install-html-target-libgnatprj ++ ++install-html-target-libgnatprj: \ ++ configure-target-libgnatprj \ ++ html-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-html in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-installcheck-target-libgnatprj installcheck-target-libgnatprj ++maybe-installcheck-target-libgnatprj: ++@if target-libgnatprj ++maybe-installcheck-target-libgnatprj: installcheck-target-libgnatprj ++ ++# libgnatprj doesn't support installcheck. ++installcheck-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-mostlyclean-target-libgnatprj mostlyclean-target-libgnatprj ++maybe-mostlyclean-target-libgnatprj: ++@if target-libgnatprj ++maybe-mostlyclean-target-libgnatprj: mostlyclean-target-libgnatprj ++ ++mostlyclean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing mostlyclean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-clean-target-libgnatprj clean-target-libgnatprj ++maybe-clean-target-libgnatprj: ++@if target-libgnatprj ++maybe-clean-target-libgnatprj: clean-target-libgnatprj ++ ++clean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing clean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-distclean-target-libgnatprj distclean-target-libgnatprj ++maybe-distclean-target-libgnatprj: ++@if target-libgnatprj ++maybe-distclean-target-libgnatprj: distclean-target-libgnatprj ++ ++distclean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing distclean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-maintainer-clean-target-libgnatprj maintainer-clean-target-libgnatprj ++maybe-maintainer-clean-target-libgnatprj: ++@if target-libgnatprj ++maybe-maintainer-clean-target-libgnatprj: maintainer-clean-target-libgnatprj ++ ++maintainer-clean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++ ++ ++ ++ + .PHONY: configure-target-libgomp maybe-configure-target-libgomp + maybe-configure-target-libgomp: + @if gcc-bootstrap +@@ -46265,6 +46994,7 @@ + configure-target-rda: stage_last + configure-target-libada: stage_last + configure-target-libgnatvsn: stage_last ++configure-target-libgnatprj: stage_last + configure-stage1-target-libgomp: maybe-all-stage1-gcc + configure-stage2-target-libgomp: maybe-all-stage2-gcc + configure-stage3-target-libgomp: maybe-all-stage3-gcc +@@ -46297,6 +47027,7 @@ + configure-target-rda: maybe-all-gcc + configure-target-libada: maybe-all-gcc + configure-target-libgnatvsn: maybe-all-gcc ++configure-target-libgnatprj: maybe-all-gcc + configure-target-libgomp: maybe-all-gcc + configure-target-libitm: maybe-all-gcc + configure-target-libatomic: maybe-all-gcc +@@ -46591,7 +47322,10 @@ + all-fixincludes: maybe-all-libiberty + all-gnattools: maybe-all-libada + all-gnattools: maybe-all-libgnatvsn ++all-gnattools: maybe-all-libgnatprj + all-libgnatvsn: maybe-all-libada ++all-libgnatprj: maybe-all-libada ++all-libgnatprj: maybe-all-libgnatvsn + all-lto-plugin: maybe-all-libiberty + + all-stage1-lto-plugin: maybe-all-stage1-libiberty +@@ -47128,6 +47862,7 @@ + configure-target-rda: maybe-all-target-libgcc + configure-target-libada: maybe-all-target-libgcc + configure-target-libgnatvsn: maybe-all-target-libgcc ++configure-target-libgnatprj: maybe-all-target-libgcc + configure-target-libgomp: maybe-all-target-libgcc + configure-target-libitm: maybe-all-target-libgcc + configure-target-libatomic: maybe-all-target-libgcc +@@ -47174,6 +47909,8 @@ + + configure-target-libgnatvsn: maybe-all-target-newlib maybe-all-target-libgloss + ++configure-target-libgnatprj: maybe-all-target-newlib maybe-all-target-libgloss ++ + configure-target-libgomp: maybe-all-target-newlib maybe-all-target-libgloss + + configure-target-libitm: maybe-all-target-newlib maybe-all-target-libgloss +Index: b/src/configure.ac +=================================================================== +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -133,7 +133,7 @@ + + # these libraries are used by various programs built for the host environment + # +-host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktrace libcpp libdecnumber gmp mpfr mpc isl cloog libelf libiconv libada libgnatvsn" ++host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktrace libcpp libdecnumber gmp mpfr mpc isl cloog libelf libiconv libada libgnatvsn libgnatprj" + + # these tools are built for the host environment + # Note, the powerpc-eabi build depends on sim occurring before gdb in order to +@@ -169,6 +169,7 @@ + target-libobjc \ + target-libada \ + target-libgnatvsn \ ++ target-libgnatprj \ + target-libgo" + + # these tools are built using the target libraries, and are intended to +@@ -265,7 +266,7 @@ + + # Some are only suitable for cross toolchains. + # Remove these if host=target. +-cross_only="target-libgloss target-newlib target-opcodes target-libada target-libgnatvsn" ++cross_only="target-libgloss target-newlib target-opcodes target-libada target-libgnatvsn target-libgnatprj" + + case $is_cross_compiler in + no) skipdirs="${skipdirs} ${cross_only}" ;; +@@ -421,7 +422,7 @@ + ENABLE_LIBADA=$enableval, + ENABLE_LIBADA=yes) + if test "${ENABLE_LIBADA}" != "yes" ; then +- noconfigdirs="$noconfigdirs libgnatvsn gnattools" ++ noconfigdirs="$noconfigdirs libgnatvsn libgnatprj gnattools" + fi + + AC_ARG_ENABLE(libssp, +Index: b/src/libgnatprj/configure.ac +=================================================================== +--- /dev/null ++++ b/src/libgnatprj/configure.ac +@@ -0,0 +1,145 @@ ++# Configure script for libada. ++# Copyright 2003, 2004 Free Software Foundation, Inc. ++# ++# This file is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ ++AC_INIT ++AC_PREREQ([2.63]) ++ ++AC_CONFIG_SRCDIR([Makefile.in]) ++ ++# Start of actual configure tests ++ ++AC_PROG_INSTALL ++ ++AC_CANONICAL_BUILD ++AC_CANONICAL_HOST ++AC_CANONICAL_TARGET ++ ++sinclude(../config/acx.m4) ++ACX_NONCANONICAL_TARGET ++ ++# Need to pass this down for now :-P ++AC_PROG_LN_S ++ ++# Determine x_ada_cflags ++case $host in ++ hppa*) x_ada_cflags=-mdisable-indexing ;; ++ *) x_ada_cflags= ;; ++esac ++AC_SUBST([x_ada_cflags]) ++ ++# Determine what to build for 'gnattools' ++if test $build = $target ; then ++ # Note that build=target is almost certainly the wrong test; FIXME ++ default_gnattools_target="gnattools-native" ++else ++ default_gnattools_target="gnattools-cross" ++fi ++AC_SUBST([default_gnattools_target]) ++ ++# Target-specific stuff (defaults) ++TOOLS_TARGET_PAIRS= ++AC_SUBST(TOOLS_TARGET_PAIRS) ++ ++# Per-target case statement ++# ---/---------------------- ++case "${target}" in ++ alpha*-dec-vx*) # Unlike all other Vxworks ++ ;; ++ m68k*-wrs-vx* \ ++ | powerpc*-wrs-vxworks \ ++ | sparc*-wrs-vx* \ ++ | *86-wrs-vxworks \ ++ | xscale*-wrs-vx* \ ++ | xscale*-wrs-coff \ ++ | mips*-wrs-vx*) ++ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb Makefile +Index: b/src/libgnatvsn/Makefile.in +=================================================================== +--- /dev/null ++++ b/src/libgnatvsn/Makefile.in +@@ -0,0 +1,157 @@ ++# Makefile for libgnatvsn. ++# Copyright (c) 2006 Ludovic Brenta ++# ++# This file is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ ++# Default target; must be first. ++all: libgnatvsn ++ ++.SUFFIXES: ++ ++CPUS := $(shell getconf _NPROCESSORS_ONLN) ++LIB_VERSION := $(strip $(shell grep ' Library_Version :' \ ++ @srcdir@/../gcc/ada/gnatvsn.ads | \ ++ sed -e 's/.*"\(.*\)".*/\1/')) ++GCC:=../gcc/xgcc -B../gcc/ ++LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++CFLAGS := -g -O2 -gnatn ++BASEVER := $(shell cat @srcdir@/../gcc/BASE-VER) ++DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE) ++DATESTAMP := $(shell cat @srcdir@/../gcc/DATESTAMP) ++ ++# For use in version.c - double quoted strings, with appropriate ++# surrounding punctuation and spaces, and with the datestamp and ++# development phase collapsed to the empty string in release mode ++# (i.e. if DEVPHASE_c is empty). The space immediately after the ++# comma in the $(if ...) constructs is significant - do not remove it. ++BASEVER_s := "\"$(BASEVER)\"" ++DEVPHASE_s := "\"$(if $(DEVPHASE), ($(DEVPHASE)))\"" ++DATESTAMP_s := "\"$(if $(DEVPHASE), $(DATESTAMP))\"" ++PKGVERSION_s:= "\"@PKGVERSION@\"" ++BUGURL_s := "\"@REPORT_BUGS_TO@\"" ++ ++ifneq (@build@,@host@) ++ CFLAGS += -b @host@ ++endif ++ ++.PHONY: libgnatvsn install ++libgnatvsn: libgnatvsn.so.$(LIB_VERSION) libgnatvsn.a ++ ++VSN_SOURCES := alloc.ads aspects.adb atree.adb casing.adb csets.adb debug.adb einfo.adb \ ++elists.adb fname.adb gnatvsn.adb hostparm.ads krunch.adb lib.adb namet.adb \ ++nlists.adb opt.adb output.adb repinfo.adb scans.adb sinfo.adb sem_aux.adb \ ++sinput.adb stand.adb stringt.adb table.adb tree_in.adb tree_io.adb types.adb \ ++uintp.adb uname.adb urealp.adb widechar.adb ++ ++VSN_SEPARATES := lib-list.adb lib-sort.adb ++ ++VSN_GENERATED_SOURCES := snames.adb ++ ++OBJECTS=$(patsubst %.ads,%.o,$(VSN_SOURCES:.adb=.o) $(VSN_GENERATED_SOURCES:.adb=.o)) version.o ++ ++vpath %.c @srcdir@/../gcc ++ ++libgnatvsn.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) ++ : # Make libgnatvsn.so ++ $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \ ++ -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++ ln -s libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so ++ chmod a=r obj-shared/*.ali ++# Make the .ali files, but not the .o files, visible to the gnat tools. ++ cp -lp obj-shared/*.ali . ++ ++$(addprefix obj-shared/,$(OBJECTS)): | stamp-libgnatvsn-sources obj-shared ++ ++obj-shared/%.o: %.adb ++ $(GCC) -c -fPIC $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-shared/%.o: %.ads ++ $(GCC) -c -fPIC $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-shared/version.o: version.c ++ $(GCC) -c -fPIC -g -O2 \ ++ -DBASEVER=$(BASEVER_s) \ ++ -DDATESTAMP=$(DATESTAMP_s) \ ++ -DDEVPHASE=$(DEVPHASE_s) \ ++ -DPKGVERSION=$(PKGVERSION_s) \ ++ -DBUGURL=$(BUGURL_s) \ ++ -DREVISION= \ ++ $(realpath $<) -o $@ ++ ++obj-shared: ++ -mkdir $@ ++ ++libgnatvsn.a: $(addprefix obj-static/,$(OBJECTS)) ++ : # Make libgnatvsn.a ++ ar rc $@ $^ ++ ranlib $@ ++ ++$(addprefix obj-static/,$(OBJECTS)): | stamp-libgnatvsn-sources obj-static ++ ++obj-static/%.o: %.adb ++ $(GCC) -c $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-static/%.o: %.ads ++ $(GCC) -c $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-static/version.o: version.c ++ $(GCC) -c -g -O2 \ ++ -DBASEVER=$(BASEVER_s) \ ++ -DDATESTAMP=$(DATESTAMP_s) \ ++ -DDEVPHASE=$(DEVPHASE_s) \ ++ -DPKGVERSION=$(PKGVERSION_s) \ ++ -DBUGURL=$(BUGURL_s) \ ++ -DREVISION= \ ++ $< -o $@ ++ ++obj-static: ++ -mkdir $@ ++ ++$(VSN_SOURCES) $(VSN_SEPARATES) $(VSN_GENERATED_SOURCES): stamp-libgnatvsn-sources ++ ++stamp-libgnatvsn-sources: ++ for file in $(VSN_SOURCES) $(VSN_SEPARATES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f @srcdir@/../gcc/ada/$$file -a ! -L $$file ] ; then ln -s @srcdir@/../gcc/ada/$$file .; fi; \ ++ if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then ln -s @srcdir@/../gcc/ada/$$ads .; fi; \ ++ done ++ for file in $(VSN_GENERATED_SOURCES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f ../gcc/ada/$$file -a ! -L $$file ] ; then ln -s ../gcc/ada/$$file .; fi; \ ++ if [ -f ../gcc/ada/$$ads -a ! -L $$ads ] ; then ln -s ../gcc/ada/$$ads .; fi; \ ++ done ++ touch $@ ++ ++libdir = @libdir@ ++ ++install: libgnatvsn ++ $(INSTALL_DATA) libgnatvsn.a $(DESTDIR)$(libdir) ++ $(INSTALL_DATA) libgnatvsn.so.$(LIB_VERSION) $(DESTDIR)$(libdir) ++ cd $(DESTDIR)$(libdir); ln -sf libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so ++ mkdir -p $(DESTDIR)$(prefix)/share/ada/adainclude/gnatvsn ++ $(INSTALL_DATA) \ ++ $(addprefix @srcdir@/../gcc/ada/,$(VSN_SOURCES) $(VSN_SEPARATES)) \ ++ $(addprefix @srcdir@/../gcc/ada/,$(patsubst %.adb,%.ads,$(filter %.adb,$(VSN_SOURCES)))) \ ++ $(addprefix ../gcc/ada/,$(VSN_GENERATED_SOURCES)) \ ++ $(addprefix ../gcc/ada/,$(patsubst %.adb,%.ads,$(VSN_GENERATED_SOURCES))) \ ++ $(DESTDIR)$(prefix)/share/ada/adainclude/gnatvsn ++ mkdir -p $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn ++ $(INSTALL) -m 0444 obj-shared/*.ali \ ++ $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn ++ chmod a=r $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn/*.ali ++ ++.PHONY: clean ++clean: ++ rm -rf *.ali obj-static obj-shared libgnatvsn* *.adb *.ads stamp* +Index: b/src/Makefile.def +=================================================================== +--- a/src/Makefile.def ++++ b/src/Makefile.def +@@ -117,6 +117,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++host_modules= { module= libgnatvsn; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + host_modules= { module= gnattools; no_check=true; + missing= info; + missing= dvi; +@@ -164,6 +171,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++target_modules = { module= libgnatvsn; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; }; + target_modules = { module= libitm; lib_path=.libs; }; + target_modules = { module= libatomic; lib_path=.libs; }; +@@ -351,6 +365,8 @@ + dependencies = { module=all-fixincludes; on=all-libiberty; }; + + dependencies = { module=all-gnattools; on=all-libada; }; ++dependencies = { module=all-gnattools; on=all-libgnatvsn; }; ++dependencies = { module=all-libgnatvsn; on=all-libada; }; + + dependencies = { module=all-lto-plugin; on=all-libiberty; }; + +Index: b/src/Makefile.in +=================================================================== +--- a/src/Makefile.in ++++ b/src/Makefile.in +@@ -919,6 +919,7 @@ + maybe-configure-libtermcap \ + maybe-configure-utils \ + maybe-configure-libada \ ++ maybe-configure-libgnatvsn \ + maybe-configure-gnattools \ + maybe-configure-lto-plugin + .PHONY: configure-target +@@ -943,6 +944,7 @@ + maybe-configure-target-boehm-gc \ + maybe-configure-target-rda \ + maybe-configure-target-libada \ ++ maybe-configure-target-libgnatvsn \ + maybe-configure-target-libgomp \ + maybe-configure-target-libitm \ + maybe-configure-target-libatomic +@@ -1064,6 +1066,7 @@ + all-host: maybe-all-libtermcap + all-host: maybe-all-utils + all-host: maybe-all-libada ++all-host: maybe-all-libgnatvsn + all-host: maybe-all-gnattools + @if lto-plugin-no-bootstrap + all-host: maybe-all-lto-plugin +@@ -1097,6 +1100,7 @@ + all-target: maybe-all-target-boehm-gc + all-target: maybe-all-target-rda + all-target: maybe-all-target-libada ++all-target: maybe-all-target-libgnatvsn + @if target-libgomp-no-bootstrap + all-target: maybe-all-target-libgomp + @endif target-libgomp-no-bootstrap +@@ -1162,6 +1166,7 @@ + info-host: maybe-info-libtermcap + info-host: maybe-info-utils + info-host: maybe-info-libada ++info-host: maybe-info-libgnatvsn + info-host: maybe-info-gnattools + info-host: maybe-info-lto-plugin + +@@ -1187,6 +1192,7 @@ + info-target: maybe-info-target-boehm-gc + info-target: maybe-info-target-rda + info-target: maybe-info-target-libada ++info-target: maybe-info-target-libgnatvsn + info-target: maybe-info-target-libgomp + info-target: maybe-info-target-libitm + info-target: maybe-info-target-libatomic +@@ -1245,6 +1251,7 @@ + dvi-host: maybe-dvi-libtermcap + dvi-host: maybe-dvi-utils + dvi-host: maybe-dvi-libada ++dvi-host: maybe-dvi-libgnatvsn + dvi-host: maybe-dvi-gnattools + dvi-host: maybe-dvi-lto-plugin + +@@ -1270,6 +1277,7 @@ + dvi-target: maybe-dvi-target-boehm-gc + dvi-target: maybe-dvi-target-rda + dvi-target: maybe-dvi-target-libada ++dvi-target: maybe-dvi-target-libgnatvsn + dvi-target: maybe-dvi-target-libgomp + dvi-target: maybe-dvi-target-libitm + dvi-target: maybe-dvi-target-libatomic +@@ -1328,6 +1336,7 @@ + pdf-host: maybe-pdf-libtermcap + pdf-host: maybe-pdf-utils + pdf-host: maybe-pdf-libada ++pdf-host: maybe-pdf-libgnatvsn + pdf-host: maybe-pdf-gnattools + pdf-host: maybe-pdf-lto-plugin + +@@ -1353,6 +1362,7 @@ + pdf-target: maybe-pdf-target-boehm-gc + pdf-target: maybe-pdf-target-rda + pdf-target: maybe-pdf-target-libada ++pdf-target: maybe-pdf-target-libgnatvsn + pdf-target: maybe-pdf-target-libgomp + pdf-target: maybe-pdf-target-libitm + pdf-target: maybe-pdf-target-libatomic +@@ -1411,6 +1421,7 @@ + html-host: maybe-html-libtermcap + html-host: maybe-html-utils + html-host: maybe-html-libada ++html-host: maybe-html-libgnatvsn + html-host: maybe-html-gnattools + html-host: maybe-html-lto-plugin + +@@ -1436,6 +1447,7 @@ + html-target: maybe-html-target-boehm-gc + html-target: maybe-html-target-rda + html-target: maybe-html-target-libada ++html-target: maybe-html-target-libgnatvsn + html-target: maybe-html-target-libgomp + html-target: maybe-html-target-libitm + html-target: maybe-html-target-libatomic +@@ -1494,6 +1506,7 @@ + TAGS-host: maybe-TAGS-libtermcap + TAGS-host: maybe-TAGS-utils + TAGS-host: maybe-TAGS-libada ++TAGS-host: maybe-TAGS-libgnatvsn + TAGS-host: maybe-TAGS-gnattools + TAGS-host: maybe-TAGS-lto-plugin + +@@ -1519,6 +1532,7 @@ + TAGS-target: maybe-TAGS-target-boehm-gc + TAGS-target: maybe-TAGS-target-rda + TAGS-target: maybe-TAGS-target-libada ++TAGS-target: maybe-TAGS-target-libgnatvsn + TAGS-target: maybe-TAGS-target-libgomp + TAGS-target: maybe-TAGS-target-libitm + TAGS-target: maybe-TAGS-target-libatomic +@@ -1577,6 +1591,7 @@ + install-info-host: maybe-install-info-libtermcap + install-info-host: maybe-install-info-utils + install-info-host: maybe-install-info-libada ++install-info-host: maybe-install-info-libgnatvsn + install-info-host: maybe-install-info-gnattools + install-info-host: maybe-install-info-lto-plugin + +@@ -1602,6 +1617,7 @@ + install-info-target: maybe-install-info-target-boehm-gc + install-info-target: maybe-install-info-target-rda + install-info-target: maybe-install-info-target-libada ++install-info-target: maybe-install-info-target-libgnatvsn + install-info-target: maybe-install-info-target-libgomp + install-info-target: maybe-install-info-target-libitm + install-info-target: maybe-install-info-target-libatomic +@@ -1660,6 +1676,7 @@ + install-pdf-host: maybe-install-pdf-libtermcap + install-pdf-host: maybe-install-pdf-utils + install-pdf-host: maybe-install-pdf-libada ++install-pdf-host: maybe-install-pdf-libgnatvsn + install-pdf-host: maybe-install-pdf-gnattools + install-pdf-host: maybe-install-pdf-lto-plugin + +@@ -1685,6 +1702,7 @@ + install-pdf-target: maybe-install-pdf-target-boehm-gc + install-pdf-target: maybe-install-pdf-target-rda + install-pdf-target: maybe-install-pdf-target-libada ++install-pdf-target: maybe-install-pdf-target-libgnatvsn + install-pdf-target: maybe-install-pdf-target-libgomp + install-pdf-target: maybe-install-pdf-target-libitm + install-pdf-target: maybe-install-pdf-target-libatomic +@@ -1743,6 +1761,7 @@ + install-html-host: maybe-install-html-libtermcap + install-html-host: maybe-install-html-utils + install-html-host: maybe-install-html-libada ++install-html-host: maybe-install-html-libgnatvsn + install-html-host: maybe-install-html-gnattools + install-html-host: maybe-install-html-lto-plugin + +@@ -1768,6 +1787,7 @@ + install-html-target: maybe-install-html-target-boehm-gc + install-html-target: maybe-install-html-target-rda + install-html-target: maybe-install-html-target-libada ++install-html-target: maybe-install-html-target-libgnatvsn + install-html-target: maybe-install-html-target-libgomp + install-html-target: maybe-install-html-target-libitm + install-html-target: maybe-install-html-target-libatomic +@@ -1826,6 +1846,7 @@ + installcheck-host: maybe-installcheck-libtermcap + installcheck-host: maybe-installcheck-utils + installcheck-host: maybe-installcheck-libada ++installcheck-host: maybe-installcheck-libgnatvsn + installcheck-host: maybe-installcheck-gnattools + installcheck-host: maybe-installcheck-lto-plugin + +@@ -1851,6 +1872,7 @@ + installcheck-target: maybe-installcheck-target-boehm-gc + installcheck-target: maybe-installcheck-target-rda + installcheck-target: maybe-installcheck-target-libada ++installcheck-target: maybe-installcheck-target-libgnatvsn + installcheck-target: maybe-installcheck-target-libgomp + installcheck-target: maybe-installcheck-target-libitm + installcheck-target: maybe-installcheck-target-libatomic +@@ -1909,6 +1931,7 @@ + mostlyclean-host: maybe-mostlyclean-libtermcap + mostlyclean-host: maybe-mostlyclean-utils + mostlyclean-host: maybe-mostlyclean-libada ++mostlyclean-host: maybe-mostlyclean-libgnatvsn + mostlyclean-host: maybe-mostlyclean-gnattools + mostlyclean-host: maybe-mostlyclean-lto-plugin + +@@ -1934,6 +1957,7 @@ + mostlyclean-target: maybe-mostlyclean-target-boehm-gc + mostlyclean-target: maybe-mostlyclean-target-rda + mostlyclean-target: maybe-mostlyclean-target-libada ++mostlyclean-target: maybe-mostlyclean-target-libgnatvsn + mostlyclean-target: maybe-mostlyclean-target-libgomp + mostlyclean-target: maybe-mostlyclean-target-libitm + mostlyclean-target: maybe-mostlyclean-target-libatomic +@@ -1992,6 +2016,7 @@ + clean-host: maybe-clean-libtermcap + clean-host: maybe-clean-utils + clean-host: maybe-clean-libada ++clean-host: maybe-clean-libgnatvsn + clean-host: maybe-clean-gnattools + clean-host: maybe-clean-lto-plugin + +@@ -2017,6 +2042,7 @@ + clean-target: maybe-clean-target-boehm-gc + clean-target: maybe-clean-target-rda + clean-target: maybe-clean-target-libada ++clean-target: maybe-clean-target-libgnatvsn + clean-target: maybe-clean-target-libgomp + clean-target: maybe-clean-target-libitm + clean-target: maybe-clean-target-libatomic +@@ -2075,6 +2101,7 @@ + distclean-host: maybe-distclean-libtermcap + distclean-host: maybe-distclean-utils + distclean-host: maybe-distclean-libada ++distclean-host: maybe-distclean-libgnatvsn + distclean-host: maybe-distclean-gnattools + distclean-host: maybe-distclean-lto-plugin + +@@ -2100,6 +2127,7 @@ + distclean-target: maybe-distclean-target-boehm-gc + distclean-target: maybe-distclean-target-rda + distclean-target: maybe-distclean-target-libada ++distclean-target: maybe-distclean-target-libgnatvsn + distclean-target: maybe-distclean-target-libgomp + distclean-target: maybe-distclean-target-libitm + distclean-target: maybe-distclean-target-libatomic +@@ -2158,6 +2186,7 @@ + maintainer-clean-host: maybe-maintainer-clean-libtermcap + maintainer-clean-host: maybe-maintainer-clean-utils + maintainer-clean-host: maybe-maintainer-clean-libada ++maintainer-clean-host: maybe-maintainer-clean-libgnatvsn + maintainer-clean-host: maybe-maintainer-clean-gnattools + maintainer-clean-host: maybe-maintainer-clean-lto-plugin + +@@ -2183,6 +2212,7 @@ + maintainer-clean-target: maybe-maintainer-clean-target-boehm-gc + maintainer-clean-target: maybe-maintainer-clean-target-rda + maintainer-clean-target: maybe-maintainer-clean-target-libada ++maintainer-clean-target: maybe-maintainer-clean-target-libgnatvsn + maintainer-clean-target: maybe-maintainer-clean-target-libgomp + maintainer-clean-target: maybe-maintainer-clean-target-libitm + maintainer-clean-target: maybe-maintainer-clean-target-libatomic +@@ -2296,6 +2326,7 @@ + maybe-check-libtermcap \ + maybe-check-utils \ + maybe-check-libada \ ++ maybe-check-libgnatvsn \ + maybe-check-gnattools \ + maybe-check-lto-plugin + +@@ -2321,6 +2352,7 @@ + maybe-check-target-boehm-gc \ + maybe-check-target-rda \ + maybe-check-target-libada \ ++ maybe-check-target-libgnatvsn \ + maybe-check-target-libgomp \ + maybe-check-target-libitm \ + maybe-check-target-libatomic +@@ -2405,6 +2437,7 @@ + maybe-install-libtermcap \ + maybe-install-utils \ + maybe-install-libada \ ++ maybe-install-libgnatvsn \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -2453,6 +2486,7 @@ + maybe-install-libtermcap \ + maybe-install-utils \ + maybe-install-libada \ ++ maybe-install-libgnatvsn \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -2478,6 +2512,7 @@ + maybe-install-target-boehm-gc \ + maybe-install-target-rda \ + maybe-install-target-libada \ ++ maybe-install-target-libgnatvsn \ + maybe-install-target-libgomp \ + maybe-install-target-libitm \ + maybe-install-target-libatomic +@@ -2556,6 +2591,7 @@ + maybe-install-strip-libtermcap \ + maybe-install-strip-utils \ + maybe-install-strip-libada \ ++ maybe-install-strip-libgnatvsn \ + maybe-install-strip-gnattools \ + maybe-install-strip-lto-plugin + +@@ -2581,6 +2617,7 @@ + maybe-install-strip-target-boehm-gc \ + maybe-install-strip-target-rda \ + maybe-install-strip-target-libada \ ++ maybe-install-strip-target-libgnatvsn \ + maybe-install-strip-target-libgomp \ + maybe-install-strip-target-libitm \ + maybe-install-strip-target-libatomic +@@ -29766,6 +29803,343 @@ + + + ++.PHONY: configure-libgnatvsn maybe-configure-libgnatvsn ++maybe-configure-libgnatvsn: ++@if gcc-bootstrap ++configure-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if libgnatvsn ++maybe-configure-libgnatvsn: configure-libgnatvsn ++configure-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ test ! -f $(HOST_SUBDIR)/libgnatvsn/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libgnatvsn ; \ ++ $(HOST_EXPORTS) \ ++ echo Configuring in $(HOST_SUBDIR)/libgnatvsn; \ ++ cd "$(HOST_SUBDIR)/libgnatvsn" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(HOST_SUBDIR)/libgnatvsn/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatvsn"; \ ++ libsrcdir="$$s/libgnatvsn"; \ ++ $(SHELL) $${libsrcdir}/configure \ ++ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif libgnatvsn ++ ++ ++ ++ ++ ++.PHONY: all-libgnatvsn maybe-all-libgnatvsn ++maybe-all-libgnatvsn: ++@if gcc-bootstrap ++all-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if libgnatvsn ++TARGET-libgnatvsn=all ++maybe-all-libgnatvsn: all-libgnatvsn ++all-libgnatvsn: configure-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(STAGE1_FLAGS_TO_PASS) \ ++ $(TARGET-libgnatvsn)) ++@endif libgnatvsn ++ ++ ++ ++ ++.PHONY: check-libgnatvsn maybe-check-libgnatvsn ++maybe-check-libgnatvsn: ++@if libgnatvsn ++maybe-check-libgnatvsn: check-libgnatvsn ++ ++check-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: install-libgnatvsn maybe-install-libgnatvsn ++maybe-install-libgnatvsn: ++@if libgnatvsn ++maybe-install-libgnatvsn: install-libgnatvsn ++ ++install-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(FLAGS_TO_PASS) install) ++ ++@endif libgnatvsn ++ ++.PHONY: install-strip-libgnatvsn maybe-install-strip-libgnatvsn ++maybe-install-strip-libgnatvsn: ++@if libgnatvsn ++maybe-install-strip-libgnatvsn: install-strip-libgnatvsn ++ ++install-strip-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(FLAGS_TO_PASS) install-strip) ++ ++@endif libgnatvsn ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-libgnatvsn info-libgnatvsn ++maybe-info-libgnatvsn: ++@if libgnatvsn ++maybe-info-libgnatvsn: info-libgnatvsn ++ ++# libgnatvsn doesn't support info. ++info-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-dvi-libgnatvsn dvi-libgnatvsn ++maybe-dvi-libgnatvsn: ++@if libgnatvsn ++maybe-dvi-libgnatvsn: dvi-libgnatvsn ++ ++# libgnatvsn doesn't support dvi. ++dvi-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-pdf-libgnatvsn pdf-libgnatvsn ++maybe-pdf-libgnatvsn: ++@if libgnatvsn ++maybe-pdf-libgnatvsn: pdf-libgnatvsn ++ ++pdf-libgnatvsn: \ ++ configure-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing pdf in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-html-libgnatvsn html-libgnatvsn ++maybe-html-libgnatvsn: ++@if libgnatvsn ++maybe-html-libgnatvsn: html-libgnatvsn ++ ++# libgnatvsn doesn't support html. ++html-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-TAGS-libgnatvsn TAGS-libgnatvsn ++maybe-TAGS-libgnatvsn: ++@if libgnatvsn ++maybe-TAGS-libgnatvsn: TAGS-libgnatvsn ++ ++# libgnatvsn doesn't support TAGS. ++TAGS-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-install-info-libgnatvsn install-info-libgnatvsn ++maybe-install-info-libgnatvsn: ++@if libgnatvsn ++maybe-install-info-libgnatvsn: install-info-libgnatvsn ++ ++# libgnatvsn doesn't support install-info. ++install-info-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-install-pdf-libgnatvsn install-pdf-libgnatvsn ++maybe-install-pdf-libgnatvsn: ++@if libgnatvsn ++maybe-install-pdf-libgnatvsn: install-pdf-libgnatvsn ++ ++install-pdf-libgnatvsn: \ ++ configure-libgnatvsn \ ++ pdf-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-pdf in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-install-html-libgnatvsn install-html-libgnatvsn ++maybe-install-html-libgnatvsn: ++@if libgnatvsn ++maybe-install-html-libgnatvsn: install-html-libgnatvsn ++ ++install-html-libgnatvsn: \ ++ configure-libgnatvsn \ ++ html-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-html in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-installcheck-libgnatvsn installcheck-libgnatvsn ++maybe-installcheck-libgnatvsn: ++@if libgnatvsn ++maybe-installcheck-libgnatvsn: installcheck-libgnatvsn ++ ++# libgnatvsn doesn't support installcheck. ++installcheck-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-mostlyclean-libgnatvsn mostlyclean-libgnatvsn ++maybe-mostlyclean-libgnatvsn: ++@if libgnatvsn ++maybe-mostlyclean-libgnatvsn: mostlyclean-libgnatvsn ++ ++mostlyclean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing mostlyclean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-clean-libgnatvsn clean-libgnatvsn ++maybe-clean-libgnatvsn: ++@if libgnatvsn ++maybe-clean-libgnatvsn: clean-libgnatvsn ++ ++clean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing clean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-distclean-libgnatvsn distclean-libgnatvsn ++maybe-distclean-libgnatvsn: ++@if libgnatvsn ++maybe-distclean-libgnatvsn: distclean-libgnatvsn ++ ++distclean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing distclean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-maintainer-clean-libgnatvsn maintainer-clean-libgnatvsn ++maybe-maintainer-clean-libgnatvsn: ++@if libgnatvsn ++maybe-maintainer-clean-libgnatvsn: maintainer-clean-libgnatvsn ++ ++maintainer-clean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing maintainer-clean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++ ++ + .PHONY: configure-gnattools maybe-configure-gnattools + maybe-configure-gnattools: + @if gcc-bootstrap +@@ -41482,6 +41856,361 @@ + + + ++.PHONY: configure-target-libgnatvsn maybe-configure-target-libgnatvsn ++maybe-configure-target-libgnatvsn: ++@if gcc-bootstrap ++configure-target-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if target-libgnatvsn ++maybe-configure-target-libgnatvsn: configure-target-libgnatvsn ++configure-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ echo "Checking multilib configuration for libgnatvsn..."; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatvsn ; \ ++ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp 2> /dev/null ; \ ++ if test -r $(TARGET_SUBDIR)/libgnatvsn/multilib.out; then \ ++ if cmp -s $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; then \ ++ rm -f $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp; \ ++ else \ ++ rm -f $(TARGET_SUBDIR)/libgnatvsn/Makefile; \ ++ mv $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; \ ++ fi; \ ++ else \ ++ mv $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; \ ++ fi; \ ++ test ! -f $(TARGET_SUBDIR)/libgnatvsn/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatvsn ; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo Configuring in $(TARGET_SUBDIR)/libgnatvsn; \ ++ cd "$(TARGET_SUBDIR)/libgnatvsn" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(TARGET_SUBDIR)/libgnatvsn/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatvsn"; \ ++ libsrcdir="$$s/libgnatvsn"; \ ++ rm -f no-such-file || : ; \ ++ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ ++ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif target-libgnatvsn ++ ++ ++ ++ ++ ++.PHONY: all-target-libgnatvsn maybe-all-target-libgnatvsn ++maybe-all-target-libgnatvsn: ++@if gcc-bootstrap ++all-target-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if target-libgnatvsn ++TARGET-target-libgnatvsn=all ++maybe-all-target-libgnatvsn: all-target-libgnatvsn ++all-target-libgnatvsn: configure-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) \ ++ $(TARGET-target-libgnatvsn)) ++@endif target-libgnatvsn ++ ++ ++ ++ ++ ++.PHONY: check-target-libgnatvsn maybe-check-target-libgnatvsn ++maybe-check-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-check-target-libgnatvsn: check-target-libgnatvsn ++ ++# Dummy target for uncheckable module. ++check-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: install-target-libgnatvsn maybe-install-target-libgnatvsn ++maybe-install-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-target-libgnatvsn: install-target-libgnatvsn ++ ++install-target-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install) ++ ++@endif target-libgnatvsn ++ ++.PHONY: install-strip-target-libgnatvsn maybe-install-strip-target-libgnatvsn ++maybe-install-strip-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-strip-target-libgnatvsn: install-strip-target-libgnatvsn ++ ++install-strip-target-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install-strip) ++ ++@endif target-libgnatvsn ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-target-libgnatvsn info-target-libgnatvsn ++maybe-info-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-info-target-libgnatvsn: info-target-libgnatvsn ++ ++# libgnatvsn doesn't support info. ++info-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-dvi-target-libgnatvsn dvi-target-libgnatvsn ++maybe-dvi-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-dvi-target-libgnatvsn: dvi-target-libgnatvsn ++ ++# libgnatvsn doesn't support dvi. ++dvi-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-pdf-target-libgnatvsn pdf-target-libgnatvsn ++maybe-pdf-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-pdf-target-libgnatvsn: pdf-target-libgnatvsn ++ ++pdf-target-libgnatvsn: \ ++ configure-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing pdf in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-html-target-libgnatvsn html-target-libgnatvsn ++maybe-html-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-html-target-libgnatvsn: html-target-libgnatvsn ++ ++# libgnatvsn doesn't support html. ++html-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-TAGS-target-libgnatvsn TAGS-target-libgnatvsn ++maybe-TAGS-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-TAGS-target-libgnatvsn: TAGS-target-libgnatvsn ++ ++# libgnatvsn doesn't support TAGS. ++TAGS-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-install-info-target-libgnatvsn install-info-target-libgnatvsn ++maybe-install-info-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-info-target-libgnatvsn: install-info-target-libgnatvsn ++ ++# libgnatvsn doesn't support install-info. ++install-info-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-install-pdf-target-libgnatvsn install-pdf-target-libgnatvsn ++maybe-install-pdf-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-pdf-target-libgnatvsn: install-pdf-target-libgnatvsn ++ ++install-pdf-target-libgnatvsn: \ ++ configure-target-libgnatvsn \ ++ pdf-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-pdf in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-install-html-target-libgnatvsn install-html-target-libgnatvsn ++maybe-install-html-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-html-target-libgnatvsn: install-html-target-libgnatvsn ++ ++install-html-target-libgnatvsn: \ ++ configure-target-libgnatvsn \ ++ html-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-html in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-installcheck-target-libgnatvsn installcheck-target-libgnatvsn ++maybe-installcheck-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-installcheck-target-libgnatvsn: installcheck-target-libgnatvsn ++ ++# libgnatvsn doesn't support installcheck. ++installcheck-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-mostlyclean-target-libgnatvsn mostlyclean-target-libgnatvsn ++maybe-mostlyclean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-mostlyclean-target-libgnatvsn: mostlyclean-target-libgnatvsn ++ ++mostlyclean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing mostlyclean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-clean-target-libgnatvsn clean-target-libgnatvsn ++maybe-clean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-clean-target-libgnatvsn: clean-target-libgnatvsn ++ ++clean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing clean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-distclean-target-libgnatvsn distclean-target-libgnatvsn ++maybe-distclean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-distclean-target-libgnatvsn: distclean-target-libgnatvsn ++ ++distclean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing distclean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-maintainer-clean-target-libgnatvsn maintainer-clean-target-libgnatvsn ++maybe-maintainer-clean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-maintainer-clean-target-libgnatvsn: maintainer-clean-target-libgnatvsn ++ ++maintainer-clean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++ ++ ++ ++ + .PHONY: configure-target-libgomp maybe-configure-target-libgomp + maybe-configure-target-libgomp: + @if gcc-bootstrap +@@ -45535,6 +46264,7 @@ + configure-target-boehm-gc: stage_last + configure-target-rda: stage_last + configure-target-libada: stage_last ++configure-target-libgnatvsn: stage_last + configure-stage1-target-libgomp: maybe-all-stage1-gcc + configure-stage2-target-libgomp: maybe-all-stage2-gcc + configure-stage3-target-libgomp: maybe-all-stage3-gcc +@@ -45566,6 +46296,7 @@ + configure-target-boehm-gc: maybe-all-gcc + configure-target-rda: maybe-all-gcc + configure-target-libada: maybe-all-gcc ++configure-target-libgnatvsn: maybe-all-gcc + configure-target-libgomp: maybe-all-gcc + configure-target-libitm: maybe-all-gcc + configure-target-libatomic: maybe-all-gcc +@@ -45859,6 +46590,8 @@ + all-stagefeedback-libcpp: maybe-all-stagefeedback-intl + all-fixincludes: maybe-all-libiberty + all-gnattools: maybe-all-libada ++all-gnattools: maybe-all-libgnatvsn ++all-libgnatvsn: maybe-all-libada + all-lto-plugin: maybe-all-libiberty + + all-stage1-lto-plugin: maybe-all-stage1-libiberty +@@ -46394,6 +47127,7 @@ + configure-target-boehm-gc: maybe-all-target-libgcc + configure-target-rda: maybe-all-target-libgcc + configure-target-libada: maybe-all-target-libgcc ++configure-target-libgnatvsn: maybe-all-target-libgcc + configure-target-libgomp: maybe-all-target-libgcc + configure-target-libitm: maybe-all-target-libgcc + configure-target-libatomic: maybe-all-target-libgcc +@@ -46438,6 +47172,8 @@ + + configure-target-libada: maybe-all-target-newlib maybe-all-target-libgloss + ++configure-target-libgnatvsn: maybe-all-target-newlib maybe-all-target-libgloss ++ + configure-target-libgomp: maybe-all-target-newlib maybe-all-target-libgloss + + configure-target-libitm: maybe-all-target-newlib maybe-all-target-libgloss +Index: b/src/configure.ac +=================================================================== +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -133,7 +133,7 @@ + + # these libraries are used by various programs built for the host environment + # +-host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktrace libcpp libdecnumber gmp mpfr mpc isl cloog libelf libiconv libada" ++host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktrace libcpp libdecnumber gmp mpfr mpc isl cloog libelf libiconv libada libgnatvsn" + + # these tools are built for the host environment + # Note, the powerpc-eabi build depends on sim occurring before gdb in order to +@@ -168,6 +168,7 @@ + ${libgcj} \ + target-libobjc \ + target-libada \ ++ target-libgnatvsn \ + target-libgo" + + # these tools are built using the target libraries, and are intended to +@@ -264,7 +265,7 @@ + + # Some are only suitable for cross toolchains. + # Remove these if host=target. +-cross_only="target-libgloss target-newlib target-opcodes target-libada" ++cross_only="target-libgloss target-newlib target-opcodes target-libada target-libgnatvsn" + + case $is_cross_compiler in + no) skipdirs="${skipdirs} ${cross_only}" ;; +@@ -420,7 +421,7 @@ + ENABLE_LIBADA=$enableval, + ENABLE_LIBADA=yes) + if test "${ENABLE_LIBADA}" != "yes" ; then +- noconfigdirs="$noconfigdirs gnattools" ++ noconfigdirs="$noconfigdirs libgnatvsn gnattools" + fi + + AC_ARG_ENABLE(libssp, +Index: b/src/gcc/ada/gcc-interface/config-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/config-lang.in ++++ b/src/gcc/ada/gcc-interface/config-lang.in +@@ -34,8 +34,8 @@ + + outputs="ada/gcc-interface/Makefile ada/Makefile" + +-target_libs="target-libada" +-lang_dirs="libada gnattools" ++target_libs="target-libada target-libgnatvsn" ++lang_dirs="libada libgnatvsn gnattools" + + # Ada is not enabled by default for the time being. + build_by_default=no --- gcc-4.8-4.8.5.orig/debian/patches/ada-library-project-files-soname.diff +++ gcc-4.8-4.8.5/debian/patches/ada-library-project-files-soname.diff @@ -0,0 +1,81 @@ +# DP: - in project files, use the exact Library_Version provided, if any, as +# DP: the soname of libraries; do not strip minor version numbers +# DP: (PR ada/40025). + +Index: b/src/gcc/ada/mlib-tgt-specific-linux.adb +=================================================================== +--- a/src/gcc/ada/mlib-tgt-specific-linux.adb ++++ b/src/gcc/ada/mlib-tgt-specific-linux.adb +@@ -50,6 +50,8 @@ + + function Is_Archive_Ext (Ext : String) return Boolean; + ++ function Library_Major_Minor_Id_Supported return Boolean; ++ + --------------------------- + -- Build_Dynamic_Library -- + --------------------------- +@@ -142,7 +144,18 @@ + return Ext = ".a" or else Ext = ".so"; + end Is_Archive_Ext; + ++ -------------------------------------- ++ -- Library_Major_Minor_Id_Supported -- ++ -------------------------------------- ++ ++ function Library_Major_Minor_Id_Supported return Boolean is ++ begin ++ return False; ++ end Library_Major_Minor_Id_Supported; ++ + begin + Build_Dynamic_Library_Ptr := Build_Dynamic_Library'Access; + Is_Archive_Ext_Ptr := Is_Archive_Ext'Access; ++ Library_Major_Minor_Id_Supported_Ptr := ++ Library_Major_Minor_Id_Supported'Access; + end MLib.Tgt.Specific; +Index: b/src/gcc/ada/mlib.adb +=================================================================== +--- a/src/gcc/ada/mlib.adb ++++ b/src/gcc/ada/mlib.adb +@@ -31,6 +31,7 @@ + with Opt; + with Output; use Output; + ++with MLib.Tgt; + with MLib.Utl; use MLib.Utl; + + with Prj.Com; +@@ -391,7 +392,11 @@ + -- Major_Id_Name -- + ------------------- + +- function Major_Id_Name ++ function Major_Id_Name_If_Supported ++ (Lib_Filename : String; ++ Lib_Version : String) ++ return String; ++ function Major_Id_Name_If_Supported + (Lib_Filename : String; + Lib_Version : String) + return String +@@ -445,6 +450,19 @@ + else + return ""; + end if; ++ end Major_Id_Name_If_Supported; ++ ++ function Major_Id_Name ++ (Lib_Filename : String; ++ Lib_Version : String) ++ return String ++ is ++ begin ++ if MLib.Tgt.Library_Major_Minor_Id_Supported then ++ return Major_Id_Name_If_Supported (Lib_Filename, Lib_Version); ++ else ++ return ""; ++ end if; + end Major_Id_Name; + + ------------------------------- --- gcc-4.8-4.8.5.orig/debian/patches/ada-link-lib.diff +++ gcc-4.8-4.8.5/debian/patches/ada-link-lib.diff @@ -0,0 +1,1905 @@ +# DP: - Install the shared Ada libraries as '.so.1', not '.so' to conform +# DP: to the Debian policy. +# DP: - Don't include a runtime link path (-rpath), when linking binaries. +# DP: - Build the shared libraries on hppa-linux. +# DP: - Instead of building libada as a target library only, build it as +# DP: both a host and, if different, target library. +# DP: - Build the GNAT tools in their top-level directory; do not use +# DP: recursive makefiles. +# DP: - Link the GNAT tools dynamically. + +# This patch seems large, but the hunks in Makefile.in are actually +# generated from Makefile.def using autogen. + +Index: b/src/gcc/ada/gcc-interface/config-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/config-lang.in ++++ b/src/gcc/ada/gcc-interface/config-lang.in +@@ -35,7 +35,7 @@ + outputs="ada/gcc-interface/Makefile ada/Makefile" + + target_libs="target-libada" +-lang_dirs="gnattools" ++lang_dirs="libada gnattools" + + # Ada is not enabled by default for the time being. + build_by_default=no +Index: b/src/gcc/ada/link.c +=================================================================== +--- a/src/gcc/ada/link.c ++++ b/src/gcc/ada/link.c +@@ -105,9 +105,9 @@ + + #elif defined (__FreeBSD__) + const char *__gnat_object_file_option = "-Wl,@"; +-const char *__gnat_run_path_option = "-Wl,-rpath,"; +-char __gnat_shared_libgnat_default = STATIC; +-char __gnat_shared_libgcc_default = STATIC; ++const char *__gnat_run_path_option = ""; ++char __gnat_shared_libgnat_default = SHARED; ++char __gnat_shared_libgcc_default = SHARED; + int __gnat_link_max = 8192; + unsigned char __gnat_objlist_file_supported = 1; + const char *__gnat_object_library_extension = ".a"; +@@ -127,9 +127,9 @@ + + #elif defined (linux) || defined(__GLIBC__) + const char *__gnat_object_file_option = "-Wl,@"; +-const char *__gnat_run_path_option = "-Wl,-rpath,"; +-char __gnat_shared_libgnat_default = STATIC; +-char __gnat_shared_libgcc_default = STATIC; ++const char *__gnat_run_path_option = ""; ++char __gnat_shared_libgnat_default = SHARED; ++char __gnat_shared_libgcc_default = SHARED; + int __gnat_link_max = 8192; + unsigned char __gnat_objlist_file_supported = 1; + const char *__gnat_object_library_extension = ".a"; +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -102,7 +102,7 @@ + MAKEINFO = makeinfo + TEXI2DVI = texi2dvi + TEXI2PDF = texi2pdf +-GNATBIND_FLAGS = -static -x ++GNATBIND_FLAGS = -shared -x + ADA_CFLAGS = + ADAFLAGS = -W -Wall -gnatpg -gnata + FORCE_DEBUG_ADAFLAGS = -g +@@ -250,10 +250,6 @@ + LIBDEPS = $(LIBINTL_DEP) $(LIBICONV_DEP) $(LIBBACKTRACE) $(LIBIBERTY) + # Default is no TGT_LIB; one might be passed down or something + TGT_LIB = +-TOOLS_LIBS = targext.o link.o ../../ggc-none.o ../../libcommon-target.a \ +- ../../libcommon.a ../../../libcpp/libcpp.a $(LIBGNAT) $(LIBINTL) $(LIBICONV) \ +- ../../../libbacktrace/.libs/libbacktrace.a ../../../libiberty/libiberty.a \ +- $(SYSLIBS) $(TGT_LIB) + + # Convert the target variable into a space separated list of architecture, + # manufacturer, and operating system and assign each of those to its own +@@ -324,30 +320,6 @@ + # defined in this file into the environment. + .NOEXPORT: + +-# Lists of files for various purposes. +- +-GNATLINK_OBJS = gnatlink.o \ +- a-except.o ali.o alloc.o butil.o casing.o csets.o debug.o fmap.o fname.o \ +- gnatvsn.o hostparm.o indepsw.o interfac.o i-c.o i-cstrin.o namet.o opt.o \ +- osint.o output.o rident.o s-exctab.o s-secsta.o s-stalib.o s-stoele.o \ +- sdefault.o snames.o stylesw.o switch.o system.o table.o targparm.o tree_io.o \ +- types.o validsw.o widechar.o +- +-GNATMAKE_OBJS = a-except.o ali.o ali-util.o aspects.o s-casuti.o alloc.o \ +- atree.o binderr.o butil.o casing.o csets.o debug.o elists.o einfo.o errout.o \ +- erroutc.o errutil.o err_vars.o fmap.o fname.o fname-uf.o fname-sf.o \ +- gnatmake.o gnatvsn.o hostparm.o interfac.o i-c.o i-cstrin.o krunch.o lib.o \ +- make.o makeusg.o makeutl.o mlib.o mlib-fil.o mlib-prj.o mlib-tgt.o \ +- mlib-tgt-specific.o mlib-utl.o namet.o nlists.o opt.o osint.o osint-m.o \ +- output.o prj.o prj-attr.o prj-attr-pm.o prj-com.o prj-dect.o prj-env.o \ +- prj-conf.o prj-pp.o prj-err.o prj-ext.o prj-nmsc.o prj-pars.o prj-part.o \ +- prj-proc.o prj-strt.o prj-tree.o prj-util.o restrict.o rident.o s-exctab.o \ +- s-secsta.o s-stalib.o s-stoele.o scans.o scng.o sdefault.o sfn_scan.o \ +- s-purexc.o s-htable.o scil_ll.o sem_aux.o sinfo.o sinput.o sinput-c.o \ +- sinput-p.o snames.o stand.o stringt.o styleg.o stylesw.o system.o validsw.o \ +- switch.o switch-m.o table.o targparm.o tempdir.o tree_io.o types.o uintp.o \ +- uname.o urealp.o usage.o widechar.o \ +- $(EXTRA_GNATMAKE_OBJS) + + # Make arch match the current multilib so that the RTS selection code + # picks up the right files. For a given target this must be coherent +@@ -1376,6 +1348,11 @@ + LIBRARY_VERSION := $(LIB_VERSION) + endif + ++ifeq ($(strip $(filter-out hppa% unknown linux gnu,$(targ))),) ++ GNATLIB_SHARED = gnatlib-shared-dual ++ LIBRARY_VERSION := $(LIB_VERSION) ++endif ++ + # HP/PA HP-UX 10 + ifeq ($(strip $(filter-out hppa% hp hpux10%,$(targ))),) + LIBGNAT_TARGET_PAIRS = \ +@@ -2381,151 +2358,6 @@ + $(patsubst %$(objext),%.adb,$(GNATRTL_OBJS)), \ + $(ADA_EXCLUDE_SRCS)) + +-LIBGNAT=../$(RTSDIR)/libgnat.a +- +-TOOLS_FLAGS_TO_PASS= \ +- "CC=$(CC)" \ +- "CFLAGS=$(CFLAGS)" \ +- "LDFLAGS=$(LDFLAGS)" \ +- "ADAFLAGS=$(ADAFLAGS)" \ +- "INCLUDES=$(INCLUDES_FOR_SUBDIR)"\ +- "ADA_INCLUDES=$(ADA_INCLUDES) $(ADA_INCLUDES_FOR_SUBDIR)"\ +- "libsubdir=$(libsubdir)" \ +- "exeext=$(exeext)" \ +- "fsrcdir=$(fsrcdir)" \ +- "srcdir=$(fsrcdir)" \ +- "TOOLS_LIBS=$(TOOLS_LIBS) $(TGT_LIB)" \ +- "GNATMAKE=$(GNATMAKE)" \ +- "GNATLINK=$(GNATLINK)" \ +- "GNATBIND=$(GNATBIND)" +- +-GCC_LINK=$(CC) $(GCC_LINK_FLAGS) $(ADA_INCLUDES) $(LDFLAGS) +- +-# Build directory for the tools. Let's copy the target-dependent +-# sources using the same mechanism as for gnatlib. The other sources are +-# accessed using the vpath directive below +-# Note: dummy target, stamp-tools is mainly handled by gnattools. +- +-../stamp-tools: +- touch ../stamp-tools +- +-# when compiling the tools, the runtime has to be first on the path so that +-# it hides the runtime files lying with the rest of the sources +-ifeq ($(TOOLSCASE),native) +- vpath %.ads ../$(RTSDIR) ../ +- vpath %.adb ../$(RTSDIR) ../ +- vpath %.c ../$(RTSDIR) ../ +- vpath %.h ../$(RTSDIR) ../ +-endif +- +-# in the cross tools case, everything is compiled with the native +-# gnatmake/link. Therefore only -I needs to be modified in ADA_INCLUDES +-ifeq ($(TOOLSCASE),cross) +- vpath %.ads ../ +- vpath %.adb ../ +- vpath %.c ../ +- vpath %.h ../ +-endif +- +-# gnatmake/link tools cannot always be built with gnatmake/link for bootstrap +-# reasons: gnatmake should be built with a recent compiler, a recent compiler +-# may not generate ALI files compatible with an old gnatmake so it is important +-# to be able to build gnatmake without a version of gnatmake around. Once +-# everything has been compiled once, gnatmake can be recompiled with itself +-# (see target gnattools1-re) +-gnattools1: ../stamp-tools ../stamp-gnatlib-$(RTSDIR) +- $(MAKE) -C tools -f ../Makefile $(TOOLS_FLAGS_TO_PASS) \ +- TOOLSCASE=native \ +- ../../gnatmake$(exeext) ../../gnatlink$(exeext) +- +-# gnatmake/link can be built with recent gnatmake/link if they are available. +-# This is especially convenient for building cross tools or for rebuilding +-# the tools when the original bootstrap has already be done. +-gnattools1-re: ../stamp-tools +- $(MAKE) -C tools -f ../Makefile $(TOOLS_FLAGS_TO_PASS) \ +- TOOLSCASE=cross INCLUDES="" gnatmake-re gnatlink-re +- +-# these tools are built with gnatmake & are common to native and cross +-gnattools2: ../stamp-tools +- $(MAKE) -C tools -f ../Makefile $(TOOLS_FLAGS_TO_PASS) \ +- TOOLSCASE=native common-tools $(EXTRA_GNATTOOLS) +- +-# those tools are only built for the cross version +-gnattools4: ../stamp-tools +-ifeq ($(ENABLE_VXADDR2LINE),true) +- $(MAKE) -C tools -f ../Makefile $(TOOLS_FLAGS_TO_PASS) \ +- TOOLSCASE=cross top_buildir=../../.. \ +- ../../vxaddr2line$(exeext) +-endif +- +-common-tools: ../stamp-tools +- $(GNATMAKE) -j0 -c -b $(ADA_INCLUDES) \ +- --GNATBIND="$(GNATBIND)" --GCC="$(CC) $(ALL_ADAFLAGS)" \ +- gnatchop gnatcmd gnatkr gnatls gnatprep gnatxref gnatfind gnatname \ +- gnatclean -bargs $(ADA_INCLUDES) $(GNATBIND_FLAGS) +- $(GNATLINK) -v gnatcmd -o ../../gnat$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- $(GNATLINK) -v gnatchop -o ../../gnatchop$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- $(GNATLINK) -v gnatkr -o ../../gnatkr$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- $(GNATLINK) -v gnatls -o ../../gnatls$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- $(GNATLINK) -v gnatprep -o ../../gnatprep$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- $(GNATLINK) -v gnatxref -o ../../gnatxref$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- $(GNATLINK) -v gnatfind -o ../../gnatfind$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- $(GNATLINK) -v gnatname -o ../../gnatname$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- $(GNATLINK) -v gnatclean -o ../../gnatclean$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- +-../../gnatsym$(exeext): ../stamp-tools +- $(GNATMAKE) -c $(ADA_INCLUDES) gnatsym --GCC="$(CC) $(ALL_ADAFLAGS)" +- $(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) gnatsym +- $(GNATLINK) -v gnatsym -o $@ --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- +-../../gnatdll$(exeext): ../stamp-tools +- $(GNATMAKE) -c $(ADA_INCLUDES) gnatdll --GCC="$(CC) $(ALL_ADAFLAGS)" +- $(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) gnatdll +- $(GNATLINK) -v gnatdll -o $@ --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- +-../../vxaddr2line$(exeext): ../stamp-tools targext.o +- $(GNATMAKE) -c $(ADA_INCLUDES) vxaddr2line --GCC="$(CC) $(ALL_ADAFLAGS)" +- $(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) vxaddr2line +- $(GNATLINK) -v vxaddr2line -o $@ --GCC="$(GCC_LINK)" targext.o $(CLIB) +- +-gnatmake-re: ../stamp-tools link.o targext.o +- $(GNATMAKE) -j0 $(ADA_INCLUDES) -u sdefault --GCC="$(CC) $(MOST_ADA_FLAGS)" +- $(GNATMAKE) -j0 -c $(ADA_INCLUDES) gnatmake --GCC="$(CC) $(ALL_ADAFLAGS)" +- $(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) gnatmake +- $(GNATLINK) -v gnatmake -o ../../gnatmake$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- +-# Note the use of the "mv" command in order to allow gnatlink to be linked with +-# with the former version of gnatlink itself which cannot override itself. +-# gnatlink-re cannot be run at the same time as gnatmake-re, hence the +-# dependency +-gnatlink-re: ../stamp-tools link.o targext.o gnatmake-re +- $(GNATMAKE) -j0 -c $(ADA_INCLUDES) gnatlink --GCC="$(CC) $(ALL_ADAFLAGS)" +- $(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) gnatlink +- $(GNATLINK) -v gnatlink -o ../../gnatlinknew$(exeext) \ +- --GCC="$(GCC_LINK)" $(TOOLS_LIBS) +- $(MV) ../../gnatlinknew$(exeext) ../../gnatlink$(exeext) +- +-# Needs to be built with CC=gcc +-# Since the RTL should be built with the latest compiler, remove the +-# stamp target in the parent directory whenever gnat1 is rebuilt +- +-# Likewise for the tools +-../../gnatmake$(exeext): $(P) b_gnatm.o link.o targext.o $(GNATMAKE_OBJS) +- +$(GCC_LINK) $(ALL_CFLAGS) -o $@ b_gnatm.o $(GNATMAKE_OBJS) $(TOOLS_LIBS) +- +-../../gnatlink$(exeext): $(P) b_gnatl.o link.o targext.o $(GNATLINK_OBJS) +- +$(GCC_LINK) $(ALL_CFLAGS) -o $@ b_gnatl.o $(GNATLINK_OBJS) $(TOOLS_LIBS) +- + ../stamp-gnatlib-$(RTSDIR): + @if [ ! -f stamp-gnatlib-$(RTSDIR) ] ; \ + then \ +@@ -2562,14 +2394,10 @@ + # Also install the .dSYM directories if they exist (these directories + # contain the debug information for the shared libraries on darwin) + for file in gnat gnarl; do \ +- if [ -f $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) ]; then \ +- $(INSTALL) $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) \ ++ if [ -f $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 ]; then \ ++ $(INSTALL) $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ + $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ + fi; \ +- if [ -f $(RTSDIR)/lib$${file}$(soext) ]; then \ +- $(LN_S) lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(DESTDIR)$(ADA_RTL_OBJ_DIR)/lib$${file}$(soext); \ +- fi; \ + if [ -d $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM ]; then \ + $(CP) -r $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM \ + $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ +@@ -2582,19 +2410,7 @@ + cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.adb + cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.ads + +-../stamp-gnatlib2-$(RTSDIR): +- $(RM) $(RTSDIR)/s-*.ali +- $(RM) $(RTSDIR)/s-*$(objext) +- $(RM) $(RTSDIR)/a-*.ali +- $(RM) $(RTSDIR)/a-*$(objext) +- $(RM) $(RTSDIR)/*.ali +- $(RM) $(RTSDIR)/*$(objext) +- $(RM) $(RTSDIR)/*$(arext) +- $(RM) $(RTSDIR)/*$(soext) +- touch ../stamp-gnatlib2-$(RTSDIR) +- $(RM) ../stamp-gnatlib-$(RTSDIR) +- +-../stamp-gnatlib1-$(RTSDIR): Makefile ../stamp-gnatlib2-$(RTSDIR) ++../stamp-gnatlib1-$(RTSDIR): Makefile + $(RMDIR) $(RTSDIR) + $(MKDIR) $(RTSDIR) + $(CHMOD) u+w $(RTSDIR) +@@ -2659,7 +2475,7 @@ + # Example: cd $(RTSDIR); ar rc libfoo.a $(LONG_LIST_OF_OBJS) + # is guaranteed to overflow the buffer. + +-gnatlib: ../stamp-gnatlib1-$(RTSDIR) ../stamp-gnatlib2-$(RTSDIR) $(RTSDIR)/s-oscons.ads ++gnatlib: ../stamp-gnatlib1-$(RTSDIR) $(RTSDIR)/s-oscons.ads + # C files + $(MAKE) -C $(RTSDIR) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ +@@ -2696,32 +2512,47 @@ + + # Warning: this target assumes that LIBRARY_VERSION has been set correctly. + gnatlib-shared-default: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(PICFLAG_FOR_TARGET)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/libgna*$(soext) ++ $(MAKE) -C $(RTSDIR) \ ++ CC="`echo \"$(GCC_FOR_TARGET)\" \ ++ | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ ++ INCLUDES="$(INCLUDES_FOR_SUBDIR) -I./../.." \ ++ CFLAGS="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET)" \ ++ FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ ++ srcdir=$(fsrcdir) \ ++ -f ../Makefile $(LIBGNAT_OBJS) ++ $(MAKE) -C $(RTSDIR) \ ++ CC="`echo \"$(GCC_FOR_TARGET)\" \ ++ | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ ++ ADA_INCLUDES="" \ ++ CFLAGS="$(GNATLIBCFLAGS) $(PICFLAG_FOR_TARGET)" \ ++ ADAFLAGS="$(GNATLIBFLAGS) $(PICFLAG_FOR_TARGET)" \ ++ FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ ++ srcdir=$(fsrcdir) \ ++ -f ../Makefile \ ++ $(GNATRTL_OBJS) ++ $(RM) $(RTSDIR)/libgna*$(soext) $(RTSDIR)/libgna*$(soext).1 + cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \ + | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared $(GNATLIBCFLAGS) \ + $(PICFLAG_FOR_TARGET) \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ ++ -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ + $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ +- $(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ ++ $(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ + $(MISCLIB) -lm + cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \ + | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared $(GNATLIBCFLAGS) \ + $(PICFLAG_FOR_TARGET) \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ ++ -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ + $(GNATRTL_TASKING_OBJS) \ +- $(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ ++ $(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ + $(THREADSLIB) +- cd $(RTSDIR); $(LN_S) libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnat$(soext) +- cd $(RTSDIR); $(LN_S) libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnarl$(soext) ++ cd $(RTSDIR); for lib in gnat gnarl; do \ ++ l=lib$${lib}$(hyphen)$(LIBRARY_VERSION)$(soext); \ ++ $(LN_S) $$l.1 $$l; \ ++ done ++# Delete the object files, lest they be linked statically into the tools ++# executables. Only the .ali, .a and .so files must remain. ++ rm -f $(RTSDIR)/*.o ++ $(CHMOD) a-wx $(RTSDIR)/*.ali + + gnatlib-shared-dual: + $(MAKE) $(FLAGS_TO_PASS) \ +@@ -2730,17 +2561,15 @@ + GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib-shared-default +- $(MV) $(RTSDIR)/libgna*$(soext) . +- $(RM) ../stamp-gnatlib2-$(RTSDIR) ++ gnatlib ++ $(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali + $(MAKE) $(FLAGS_TO_PASS) \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ + GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ + GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(MV) libgna*$(soext) $(RTSDIR) ++ gnatlib-shared-default + + gnatlib-shared-dual-win32: + $(MAKE) $(FLAGS_TO_PASS) \ +@@ -2750,17 +2579,15 @@ + PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib-shared-win32 +- $(MV) $(RTSDIR)/libgna*$(soext) . +- $(RM) ../stamp-gnatlib2-$(RTSDIR) ++ gnatlib ++ $(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali + $(MAKE) $(FLAGS_TO_PASS) \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ + GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ + GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(MV) libgna*$(soext) $(RTSDIR) ++ gnatlib-shared-win32 + + # ??? we need to add the option to support auto-import of arrays/records to + # the GNATLIBFLAGS when this will be supported by GNAT. At this point we will +@@ -2898,28 +2725,6 @@ + THREAD_KIND="$(THREAD_KIND)" \ + PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" gnatlib + +-# Compiling object files from source files. +- +-# Note that dependencies on obstack.h are not written +-# because that file is not part of GCC. +-# Dependencies on gvarargs.h are not written +-# because all that file does, when not compiling with GCC, +-# is include the system varargs.h. +- +-b_gnatl.adb : $(GNATLINK_OBJS) +- $(GNATBIND) $(ADA_INCLUDES) -o b_gnatl.adb gnatlink.ali +- +-b_gnatl.o : b_gnatl.adb +- $(CC) -c $(ALL_ADAFLAGS) $(ADA_INCLUDES) -gnatws -gnatyN \ +- $< $(OUTPUT_OPTION) +- +-b_gnatm.adb : $(GNATMAKE_OBJS) +- $(GNATBIND) $(ADA_INCLUDES) -o b_gnatm.adb gnatmake.ali +- +-b_gnatm.o : b_gnatm.adb +- $(CC) -c $(ALL_ADAFLAGS) $(ADA_INCLUDES) -gnatws -gnatyN \ +- $< $(OUTPUT_OPTION) +- + ADA_INCLUDE_DIR = $(libsubdir)/adainclude + ADA_RTL_OBJ_DIR = $(libsubdir)/adalib + +Index: b/src/gnattools/Makefile.in +=================================================================== +--- a/src/gnattools/Makefile.in ++++ b/src/gnattools/Makefile.in +@@ -18,6 +18,9 @@ + # Default target; must be first. + all: gnattools + ++.NOTPARALLEL: # don't run multiple gnatmakes in parallel in the same directory ++.SUFFIXES: ++ + # Standard autoconf-set variables. + SHELL = @SHELL@ + srcdir = @srcdir@ +@@ -35,103 +38,19 @@ + LN_S=@LN_S@ + target_noncanonical=@target_noncanonical@ + +-# Variables for the user (or the top level) to override. +-exeext = @EXEEXT@ +-objext=.o +-TRACE=no +-ADA_FOR_BUILD= +-ADA_FOR_TARGET= +-LDFLAGS= +-PWD_COMMAND = $${PWDCMD-pwd} +- +-# The tedious process of getting CFLAGS right. +-CFLAGS=-g +-GCC_WARN_CFLAGS = -W -Wall +-WARN_CFLAGS = @warn_cflags@ +- +-ADA_CFLAGS=@ADA_CFLAGS@ +- +-# Variables for gnattools. +-ADAFLAGS= -gnatpg -gnata +- +-# For finding the GCC build dir, which is used far too much +-GCC_DIR=../gcc +- +-# Absolute srcdir for gcc (why do we want absolute? I dunno) +-fsrcdir := $(shell cd $(srcdir)/../gcc/; ${PWD_COMMAND}) +- +-# Useful "subroutines" for the excess includes +-INCLUDES_FOR_SUBDIR = -I. -I.. -I../.. -I$(fsrcdir)/ada -I$(fsrcdir)/config \ +- -I$(fsrcdir)/../include -I$(fsrcdir) +-ADA_INCLUDES_FOR_SUBDIR = -I. -I$(fsrcdir)/ada +- +-# Variables for gnattools, native +-TOOLS_FLAGS_TO_PASS_NATIVE= \ +- "CC=../../xgcc -B../../" \ +- "CFLAGS=$(CFLAGS) $(WARN_CFLAGS)" \ +- "LDFLAGS=$(LDFLAGS)" \ +- "ADAFLAGS=$(ADAFLAGS)" \ +- "ADA_CFLAGS=$(ADA_CFLAGS)" \ +- "INCLUDES=$(INCLUDES_FOR_SUBDIR)" \ +- "ADA_INCLUDES=-I- -I../rts $(ADA_INCLUDES_FOR_SUBDIR)"\ +- "exeext=$(exeext)" \ +- "fsrcdir=$(fsrcdir)" \ +- "srcdir=$(fsrcdir)" \ +- "GNATMAKE=../../gnatmake" \ +- "GNATLINK=../../gnatlink" \ +- "GNATBIND=../../gnatbind" \ +- "TOOLSCASE=native" +- +-# Variables for regnattools +-TOOLS_FLAGS_TO_PASS_RE= \ +- "CC=../../xgcc -B../../" \ +- "CFLAGS=$(CFLAGS)" \ +- "LDFLAGS=$(LDFLAGS)" \ +- "ADAFLAGS=$(ADAFLAGS)" \ +- "ADA_CFLAGS=$(ADA_CFLAGS)" \ +- "INCLUDES=$(INCLUDES_FOR_SUBDIR)" \ +- "ADA_INCLUDES=-I../rts $(ADA_INCLUDES_FOR_SUBDIR)"\ +- "exeext=$(exeext)" \ +- "fsrcdir=$(fsrcdir)" \ +- "srcdir=$(fsrcdir)" \ +- "GNATMAKE=../../gnatmake" \ +- "GNATLINK=../../gnatlink" \ +- "GNATBIND=../../gnatbind" \ +- "TOOLSCASE=cross" +- +-# Variables for gnattools, cross +-ifeq ($(build), $(host)) +- GNATMAKE_FOR_HOST=gnatmake +- GNATLINK_FOR_HOST=gnatlink +- GNATBIND_FOR_HOST=gnatbind +- GNATLS_FOR_HOST=gnatls +-else +- GNATMAKE_FOR_HOST=$(host_alias)-gnatmake +- GNATLINK_FOR_HOST=$(host_alias)-gnatlink +- GNATBIND_FOR_HOST=$(host_alias)-gnatbind +- GNATLS_FOR_HOST=$(host_alias)-gnatls +-endif +- +-# Put the host RTS dir first in the PATH to hide the default runtime +-# files that are among the sources +-RTS_DIR:=$(strip $(subst \,/,$(shell $(GNATLS_FOR_HOST) -v | grep adalib ))) +- +-TOOLS_FLAGS_TO_PASS_CROSS= \ +- "CC=$(CC)" \ +- "CFLAGS=$(CFLAGS) $(WARN_CFLAGS)" \ +- "LDFLAGS=$(LDFLAGS)" \ +- "ADAFLAGS=$(ADAFLAGS)" \ +- "ADA_CFLAGS=$(ADA_CFLAGS)" \ +- "INCLUDES=$(INCLUDES_FOR_SUBDIR)" \ +- "ADA_INCLUDES=-I$(RTS_DIR)../adainclude -I$(RTS_DIR) $(ADA_INCLUDES_FOR_SUBDIR)" \ +- "exeext=$(exeext)" \ +- "fsrcdir=$(fsrcdir)" \ +- "srcdir=$(fsrcdir)" \ +- "GNATMAKE=$(GNATMAKE_FOR_HOST)" \ +- "GNATLINK=$(GNATLINK_FOR_HOST)" \ +- "GNATBIND=$(GNATBIND_FOR_HOST)" \ +- "TOOLSCASE=cross" \ +- "LIBGNAT=" ++CFLAGS=-O2 -Wall ++INCLUDES = -I@srcdir@/../gcc/ada -I@srcdir@/../gcc ++ADA_CFLAGS=-O2 -gnatn ++ADA_INCLUDES=-nostdinc -I- -I. -I../gcc/ada/rts -I@srcdir@/../gcc/ada ++LIB_VERSION=$(strip $(shell grep ' Library_Version :' \ ++ @srcdir@/../gcc/ada/gnatvsn.ads | sed -e 's/.*"\(.*\)".*/\1/')) ++SHARED_ADA_LIBS := -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++STATIC_ADA_LIBS := ../gcc/ada/rts/libgnat.a ++STATIC_GCC_LIBS := ../gcc/libcommon-target.a ../gcc/libcommon.a ../libcpp/libcpp.a \ ++../libbacktrace/.libs/libbacktrace.a ../libiberty/libiberty.a ++ ++# We will use the just-built compiler to compile and link everything. ++GCC=../gcc/xgcc -B../gcc/ + + # File lists + # ---------- +@@ -140,116 +59,228 @@ + EXTRA_GNATTOOLS = @EXTRA_GNATTOOLS@ + TOOLS_TARGET_PAIRS = @TOOLS_TARGET_PAIRS@ + ++# Stage 1 builds xgcc and gnatbind; we can use them to build ++# gnatmake-static and gnatlink-static, then use gnatmake-static and ++# gnatlink-static to build the other tools. The reason we first build ++# statically-linked versions of gnatmake and gnatlink is so we can run ++# them with confidence on all build platforms, without LD_LIBRARY_PATH ++# or some such variable. ++ ++# The tools we will build using gnatmake-static and gnatlink-static. ++TOOLS := gnat gnatbind gnatchop gnatclean gnatfind gnatkr gnatls gnatlink ++TOOLS += gnatmake gnatname gnatprep gnatxref ++ ++# Since we don't have gnatmake, we must specify the full list of ++# object files necessary to build gnatmake and gnatlink. ++# TODO: remove from these lists the objects that are part of ++# libgnatvsn and libgnatprj. ++GNATLINK_OBJS = \ ++ali.o \ ++alloc.o \ ++butil.o \ ++casing.o \ ++csets.o \ ++debug.o \ ++fmap.o \ ++fname.o \ ++gnatlink.o \ ++gnatvsn.o \ ++hostparm.o \ ++indepsw.o \ ++namet.o \ ++opt.o \ ++osint.o \ ++output.o \ ++rident.o \ ++sdefault.o \ ++snames.o \ ++stylesw.o \ ++switch.o \ ++table.o \ ++targparm.o \ ++tree_io.o \ ++types.o \ ++validsw.o \ ++widechar.o ++ ++GNATMAKE_OBJS = \ ++ali-util.o \ ++ali.o \ ++alloc.o \ ++aspects.o \ ++atree.o \ ++binderr.o \ ++butil.o \ ++casing.o \ ++csets.o \ ++debug.o \ ++einfo.o\ ++elists.o \ ++err_vars.o \ ++errout.o \ ++erroutc.o \ ++errutil.o \ ++fmap.o \ ++fname-sf.o \ ++fname-uf.o \ ++fname.o \ ++gnatmake.o \ ++gnatvsn.o \ ++hostparm.o \ ++krunch.o \ ++lib.o \ ++make.o \ ++makeusg.o \ ++makeutl.o \ ++mlib-fil.o \ ++mlib-prj.o \ ++mlib-tgt.o \ ++mlib-tgt-specific.o \ ++mlib-utl.o \ ++mlib.o \ ++namet.o \ ++nlists.o \ ++opt.o \ ++osint-m.o \ ++osint.o \ ++output.o \ ++prj-attr-pm.o \ ++prj-attr.o \ ++prj-com.o \ ++prj-conf.o \ ++prj-dect.o \ ++prj-env.o \ ++prj-err.o \ ++prj-ext.o \ ++prj-nmsc.o \ ++prj-pars.o \ ++prj-part.o \ ++prj-pp.o \ ++prj-proc.o \ ++prj-strt.o \ ++prj-tree.o \ ++prj-util.o \ ++prj.o \ ++restrict.o \ ++rident.o \ ++scans.o \ ++scng.o \ ++sdefault.o \ ++sem_aux.o \ ++sfn_scan.o \ ++sinfo.o \ ++sinput-c.o \ ++sinput-p.o \ ++sinput.o \ ++snames.o \ ++stand.o \ ++stringt.o \ ++styleg.o \ ++stylesw.o \ ++switch-m.o \ ++switch.o \ ++table.o \ ++targparm.o \ ++tempdir.o \ ++tree_io.o \ ++types.o \ ++uintp.o \ ++uname.o \ ++urealp.o \ ++usage.o \ ++validsw.o \ ++widechar.o \ ++$(EXTRA_GNATMAKE_OBJS) ++ + # Makefile targets + # ---------------- + + .PHONY: gnattools gnattools-native gnattools-cross regnattools + gnattools: @default_gnattools_target@ + +-# Sanity check +-$(GCC_DIR)/stamp-gnatlib-rts: +- @if [ ! -f $(GCC_DIR)/stamp-gnatlib-rts ] ; \ +- then \ +- echo "Cannot build gnattools while gnatlib is out of date or unbuilt" ; \ +- false; \ +- else \ +- true; \ +- fi +- +- + # Build directory for the tools. Let's copy the target-dependent + # sources using the same mechanism as for gnatlib. The other sources are +-# accessed using the vpath directive in ada/Makefile.in ++# accessed using the vpath directive. ++ ++stamp-gnattools-sources: ++ $(LN_S) ../gcc/ada/sdefault.adb ../gcc/ada/snames.ads ../gcc/ada/snames.adb . ++ $(foreach PAIR,$(TOOLS_TARGET_PAIRS), \ ++ rm -f $(word 1,$(subst <, ,$(PAIR)));\ ++ $(LN_S) @srcdir@/../gcc/ada/$(word 2,$(subst <, ,$(PAIR))) \ ++ $(word 1,$(subst <, ,$(PAIR)));) ++ touch $@ ++ ++gnattools-native: ../gcc/ada/rts/libgnat-$(LIB_VERSION).so ++gnattools-native: stamp-gnattools-sources ++gnattools-native: $(TOOLS) ++ ++$(TOOLS) gnatcmd: | gnatmake-static gnatlink-static ++ ++vpath %.c @srcdir@/../gcc/ada:@srcdir@/../gcc ++vpath %.h @srcdir@/../gcc/ada ++vpath %.adb .:@srcdir@/../gcc/ada ++vpath %.ads @srcdir@/../gcc/ada ++ ++# gnatlink ++ ++gnatlink-static: $(GNATLINK_OBJS) b_gnatl.o link.o ++ $(GCC) -o $@ $^ ../gcc/ada/rts/libgnat.a $(STATIC_GCC_LIBS) ++ ++gnatlink: $(GNATLINK_OBJS) b_gnatl.o link.o ++ $(GCC) -o $@ $^ $(SHARED_ADA_LIBS) $(STATIC_GCC_LIBS) ++ ++b_gnatl.adb: $(GNATLINK_OBJS) ++ ../gcc/gnatbind -o $@ $(ADA_INCLUDES) gnatlink.ali ++ ++# gnatmake ++ ++gnatmake-static: $(GNATMAKE_OBJS) b_gnatm.o link.o ++ $(GCC) -o $@ $(ADA_CFLAGS) $^ $(STATIC_ADA_LIBS) $(STATIC_GCC_LIBS) ++ ++gnatmake: $(GNATMAKE_OBJS) b_gnatm.o link.o ++ $(GCC) -o $@ $(ADA_CFLAGS) $^ $(SHARED_ADA_LIBS) $(STATIC_GCC_LIBS) ++ ++b_gnatm.adb: $(GNATMAKE_OBJS) ++ ../gcc/gnatbind -o $@ $(ADA_INCLUDES) gnatmake.ali ++ ++# Other tools ++gnatkr: ++ ./gnatmake-static -c -b $@ $(ADA_CFLAGS) $(ADA_INCLUDES) \ ++ --GCC="$(GCC)" \ ++ --GNATBIND=../gcc/gnatbind ++ ./gnatlink-static -o $@ $@.ali $(ADA_INCLUDES) $(SHARED_ADA_LIBS) \ ++ --GCC="$(GCC) $(ADA_INCLUDES)" $(STATIC_GCC_LIBS) ++ ++gnat: gnatcmd ++ cp -lp $< $@ ++ ++gnatbind gnatchop gnatclean gnatcmd gnatfind gnatls gnatname gnatprep gnatxref: \ ++link.o ++ ./gnatmake-static -c -b $@ $(ADA_CFLAGS) $(ADA_INCLUDES) \ ++ --GCC="$(GCC)" \ ++ --GNATBIND=../gcc/gnatbind ++ ./gnatlink-static -o $@ $@.ali $^ \ ++ $(ADA_INCLUDES) $(SHARED_ADA_LIBS) $(STATIC_GCC_LIBS) \ ++ --GCC="$(GCC) $(ADA_INCLUDES)" ++ ++# Force compiling sdefault.adb, not .ads, to produce sdefault.o ++sdefault.o: sdefault.adb ++ ++sdefault.adb: stamp-gnattools-sources ++ ++# Because these sources don't exist when the Makefile is evaluated: ++snames.o: snames.adb snames.ads ++ ++snames.adb snames.ads: stamp-gnattools-sources ++ ++%.o: %.adb ++ $(GCC) -c -o $@ $< $(ADA_CFLAGS) $(ADA_INCLUDES) ++ ++%.o: %.ads ++ $(GCC) -c -o $@ $< $(ADA_CFLAGS) $(ADA_INCLUDES) + +-$(GCC_DIR)/stamp-tools: +- -rm -rf $(GCC_DIR)/ada/tools +- -mkdir -p $(GCC_DIR)/ada/tools +- -(cd $(GCC_DIR)/ada/tools; $(LN_S) ../sdefault.adb ../snames.ads ../snames.adb .) +- -$(foreach PAIR,$(TOOLS_TARGET_PAIRS), \ +- rm -f $(GCC_DIR)/ada/tools/$(word 1,$(subst <, ,$(PAIR)));\ +- $(LN_S) $(fsrcdir)/ada/$(word 2,$(subst <, ,$(PAIR))) \ +- $(GCC_DIR)/ada/tools/$(word 1,$(subst <, ,$(PAIR)));) +- touch $(GCC_DIR)/stamp-tools +- +-# gnatmake/link tools cannot always be built with gnatmake/link for bootstrap +-# reasons: gnatmake should be built with a recent compiler, a recent compiler +-# may not generate ALI files compatible with an old gnatmake so it is important +-# to be able to build gnatmake without a version of gnatmake around. Once +-# everything has been compiled once, gnatmake can be recompiled with itself +-# (see target regnattools) +-gnattools-native: $(GCC_DIR)/stamp-tools $(GCC_DIR)/stamp-gnatlib-rts +- # gnattools1 +- $(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \ +- $(TOOLS_FLAGS_TO_PASS_NATIVE) \ +- ../../gnatmake$(exeext) ../../gnatlink$(exeext) +- # gnattools2 +- $(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \ +- $(TOOLS_FLAGS_TO_PASS_NATIVE) common-tools +- +-# gnatmake/link can be built with recent gnatmake/link if they are available. +-# This is especially convenient for building cross tools or for rebuilding +-# the tools when the original bootstrap has already be done. +-regnattools: $(GCC_DIR)/stamp-gnatlib-rts +- # gnattools1-re +- $(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \ +- $(TOOLS_FLAGS_TO_PASS_RE) INCLUDES="" \ +- gnatmake-re gnatlink-re +- # gnattools2 +- $(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \ +- $(TOOLS_FLAGS_TO_PASS_NATIVE) common-tools +- +-gnattools-cross: $(GCC_DIR)/stamp-tools +- # gnattools1-re +- $(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \ +- $(TOOLS_FLAGS_TO_PASS_CROSS) INCLUDES="" \ +- gnatmake-re gnatlink-re +- # gnattools2 +- $(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \ +- $(TOOLS_FLAGS_TO_PASS_CROSS) common-tools +- # Rename cross tools to where the GCC makefile wants them when +- # installing. FIXME: installation should be done elsewhere. +- if [ -f $(GCC_DIR)/gnatbind$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatbind$(exeext) $(GCC_DIR)/gnatbind-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatchop$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatchop$(exeext) $(GCC_DIR)/gnatchop-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnat$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnat$(exeext) $(GCC_DIR)/gnat-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatkr$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatkr$(exeext) $(GCC_DIR)/gnatkr-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatlink$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatlink$(exeext) $(GCC_DIR)/gnatlink-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatls$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatls$(exeext) $(GCC_DIR)/gnatls-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatmake$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatmake$(exeext) $(GCC_DIR)/gnatmake-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatmem$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatmem$(exeext) $(GCC_DIR)/gnatmem-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatname$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatname$(exeext) $(GCC_DIR)/gnatname-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatprep$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatprep$(exeext) $(GCC_DIR)/gnatprep-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatxref$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatxref$(exeext) $(GCC_DIR)/gnatxref-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatfind$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatfind$(exeext) $(GCC_DIR)/gnatfind-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatclean$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatclean$(exeext) $(GCC_DIR)/gnatclean-cross$(exeext); \ +- fi +- if [ -f $(GCC_DIR)/gnatsym$(exeext) ] ; then \ +- mv $(GCC_DIR)/gnatsym$(exeext) $(GCC_DIR)/gnatsym-cross$(exeext); \ +- fi ++%.o: %.c ++ $(GCC) -c -o $@ $< $(CFLAGS) $(INCLUDES) + + # Other + # ----- +@@ -279,6 +310,7 @@ + + # Installation rules. + install: ++ $(INSTALL) -s gnatmake gnatlink $(TOOLS) $(DESTDIR)$(bindir) + + install-strip: install + +@@ -292,8 +324,10 @@ + + # Cleaning rules. + mostlyclean: ++ $(RM) gnatmake gnatlink $(TOOLS) *.o *.ali + + clean: ++ $(RM) *.ads *.adb stamp-gnattools-sources + + distclean: + $(RM) Makefile config.status config.log +Index: b/src/libada/Makefile.in +=================================================================== +--- a/src/libada/Makefile.in ++++ b/src/libada/Makefile.in +@@ -64,7 +64,7 @@ + -fexceptions -DIN_RTS @have_getipinfo@ + + host_subdir = @host_subdir@ +-GCC_DIR=$(MULTIBUILDTOP)../../$(host_subdir)/gcc ++GCC_DIR=$(MULTIBUILDTOP)../$(host_subdir)/gcc + + target_noncanonical:=@target_noncanonical@ + version := $(shell cat $(srcdir)/../gcc/BASE-VER) +Index: b/src/Makefile.def +=================================================================== +--- a/src/Makefile.def ++++ b/src/Makefile.def +@@ -110,7 +110,20 @@ + missing=distclean; + missing=maintainer-clean; }; + host_modules= { module= utils; no_check=true; }; +-host_modules= { module= gnattools; }; ++host_modules= { module= libada; no_install=true; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; ++host_modules= { module= gnattools; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + host_modules= { module= lto-plugin; bootstrap=true; + extra_configure_flags=--enable-shared; }; + +@@ -144,7 +157,13 @@ + target_modules = { module= zlib; }; + target_modules = { module= boehm-gc; }; + target_modules = { module= rda; }; +-target_modules = { module= libada; }; ++target_modules = { module= libada; no_install=true; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; }; + target_modules = { module= libitm; lib_path=.libs; }; + target_modules = { module= libatomic; lib_path=.libs; }; +@@ -331,7 +350,7 @@ + + dependencies = { module=all-fixincludes; on=all-libiberty; }; + +-dependencies = { module=all-gnattools; on=all-target-libada; }; ++dependencies = { module=all-gnattools; on=all-libada; }; + + dependencies = { module=all-lto-plugin; on=all-libiberty; }; + +Index: b/src/Makefile.in +=================================================================== +--- a/src/Makefile.in ++++ b/src/Makefile.in +@@ -918,6 +918,7 @@ + maybe-configure-tk \ + maybe-configure-libtermcap \ + maybe-configure-utils \ ++ maybe-configure-libada \ + maybe-configure-gnattools \ + maybe-configure-lto-plugin + .PHONY: configure-target +@@ -1062,6 +1063,7 @@ + all-host: maybe-all-tk + all-host: maybe-all-libtermcap + all-host: maybe-all-utils ++all-host: maybe-all-libada + all-host: maybe-all-gnattools + @if lto-plugin-no-bootstrap + all-host: maybe-all-lto-plugin +@@ -1159,6 +1161,7 @@ + info-host: maybe-info-tk + info-host: maybe-info-libtermcap + info-host: maybe-info-utils ++info-host: maybe-info-libada + info-host: maybe-info-gnattools + info-host: maybe-info-lto-plugin + +@@ -1241,6 +1244,7 @@ + dvi-host: maybe-dvi-tk + dvi-host: maybe-dvi-libtermcap + dvi-host: maybe-dvi-utils ++dvi-host: maybe-dvi-libada + dvi-host: maybe-dvi-gnattools + dvi-host: maybe-dvi-lto-plugin + +@@ -1323,6 +1327,7 @@ + pdf-host: maybe-pdf-tk + pdf-host: maybe-pdf-libtermcap + pdf-host: maybe-pdf-utils ++pdf-host: maybe-pdf-libada + pdf-host: maybe-pdf-gnattools + pdf-host: maybe-pdf-lto-plugin + +@@ -1405,6 +1410,7 @@ + html-host: maybe-html-tk + html-host: maybe-html-libtermcap + html-host: maybe-html-utils ++html-host: maybe-html-libada + html-host: maybe-html-gnattools + html-host: maybe-html-lto-plugin + +@@ -1487,6 +1493,7 @@ + TAGS-host: maybe-TAGS-tk + TAGS-host: maybe-TAGS-libtermcap + TAGS-host: maybe-TAGS-utils ++TAGS-host: maybe-TAGS-libada + TAGS-host: maybe-TAGS-gnattools + TAGS-host: maybe-TAGS-lto-plugin + +@@ -1569,6 +1576,7 @@ + install-info-host: maybe-install-info-tk + install-info-host: maybe-install-info-libtermcap + install-info-host: maybe-install-info-utils ++install-info-host: maybe-install-info-libada + install-info-host: maybe-install-info-gnattools + install-info-host: maybe-install-info-lto-plugin + +@@ -1651,6 +1659,7 @@ + install-pdf-host: maybe-install-pdf-tk + install-pdf-host: maybe-install-pdf-libtermcap + install-pdf-host: maybe-install-pdf-utils ++install-pdf-host: maybe-install-pdf-libada + install-pdf-host: maybe-install-pdf-gnattools + install-pdf-host: maybe-install-pdf-lto-plugin + +@@ -1733,6 +1742,7 @@ + install-html-host: maybe-install-html-tk + install-html-host: maybe-install-html-libtermcap + install-html-host: maybe-install-html-utils ++install-html-host: maybe-install-html-libada + install-html-host: maybe-install-html-gnattools + install-html-host: maybe-install-html-lto-plugin + +@@ -1815,6 +1825,7 @@ + installcheck-host: maybe-installcheck-tk + installcheck-host: maybe-installcheck-libtermcap + installcheck-host: maybe-installcheck-utils ++installcheck-host: maybe-installcheck-libada + installcheck-host: maybe-installcheck-gnattools + installcheck-host: maybe-installcheck-lto-plugin + +@@ -1897,6 +1908,7 @@ + mostlyclean-host: maybe-mostlyclean-tk + mostlyclean-host: maybe-mostlyclean-libtermcap + mostlyclean-host: maybe-mostlyclean-utils ++mostlyclean-host: maybe-mostlyclean-libada + mostlyclean-host: maybe-mostlyclean-gnattools + mostlyclean-host: maybe-mostlyclean-lto-plugin + +@@ -1979,6 +1991,7 @@ + clean-host: maybe-clean-tk + clean-host: maybe-clean-libtermcap + clean-host: maybe-clean-utils ++clean-host: maybe-clean-libada + clean-host: maybe-clean-gnattools + clean-host: maybe-clean-lto-plugin + +@@ -2061,6 +2074,7 @@ + distclean-host: maybe-distclean-tk + distclean-host: maybe-distclean-libtermcap + distclean-host: maybe-distclean-utils ++distclean-host: maybe-distclean-libada + distclean-host: maybe-distclean-gnattools + distclean-host: maybe-distclean-lto-plugin + +@@ -2143,6 +2157,7 @@ + maintainer-clean-host: maybe-maintainer-clean-tk + maintainer-clean-host: maybe-maintainer-clean-libtermcap + maintainer-clean-host: maybe-maintainer-clean-utils ++maintainer-clean-host: maybe-maintainer-clean-libada + maintainer-clean-host: maybe-maintainer-clean-gnattools + maintainer-clean-host: maybe-maintainer-clean-lto-plugin + +@@ -2280,6 +2295,7 @@ + maybe-check-tk \ + maybe-check-libtermcap \ + maybe-check-utils \ ++ maybe-check-libada \ + maybe-check-gnattools \ + maybe-check-lto-plugin + +@@ -2388,6 +2404,7 @@ + maybe-install-tk \ + maybe-install-libtermcap \ + maybe-install-utils \ ++ maybe-install-libada \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -2435,6 +2452,7 @@ + maybe-install-tk \ + maybe-install-libtermcap \ + maybe-install-utils \ ++ maybe-install-libada \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -2537,6 +2555,7 @@ + maybe-install-strip-tk \ + maybe-install-strip-libtermcap \ + maybe-install-strip-utils \ ++ maybe-install-strip-libada \ + maybe-install-strip-gnattools \ + maybe-install-strip-lto-plugin + +@@ -29422,6 +29441,331 @@ + + + ++.PHONY: configure-libada maybe-configure-libada ++maybe-configure-libada: ++@if gcc-bootstrap ++configure-libada: stage_current ++@endif gcc-bootstrap ++@if libada ++maybe-configure-libada: configure-libada ++configure-libada: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ test ! -f $(HOST_SUBDIR)/libada/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libada ; \ ++ $(HOST_EXPORTS) \ ++ echo Configuring in $(HOST_SUBDIR)/libada; \ ++ cd "$(HOST_SUBDIR)/libada" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(HOST_SUBDIR)/libada/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libada"; \ ++ libsrcdir="$$s/libada"; \ ++ $(SHELL) $${libsrcdir}/configure \ ++ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif libada ++ ++ ++ ++ ++ ++.PHONY: all-libada maybe-all-libada ++maybe-all-libada: ++@if gcc-bootstrap ++all-libada: stage_current ++@endif gcc-bootstrap ++@if libada ++TARGET-libada=all ++maybe-all-libada: all-libada ++all-libada: configure-libada ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libada && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(STAGE1_FLAGS_TO_PASS) \ ++ $(TARGET-libada)) ++@endif libada ++ ++ ++ ++ ++.PHONY: check-libada maybe-check-libada ++maybe-check-libada: ++@if libada ++maybe-check-libada: check-libada ++ ++check-libada: ++ ++@endif libada ++ ++.PHONY: install-libada maybe-install-libada ++maybe-install-libada: ++@if libada ++maybe-install-libada: install-libada ++ ++install-libada: ++ ++@endif libada ++ ++.PHONY: install-strip-libada maybe-install-strip-libada ++maybe-install-strip-libada: ++@if libada ++maybe-install-strip-libada: install-strip-libada ++ ++install-strip-libada: ++ ++@endif libada ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-libada info-libada ++maybe-info-libada: ++@if libada ++maybe-info-libada: info-libada ++ ++# libada doesn't support info. ++info-libada: ++ ++@endif libada ++ ++.PHONY: maybe-dvi-libada dvi-libada ++maybe-dvi-libada: ++@if libada ++maybe-dvi-libada: dvi-libada ++ ++# libada doesn't support dvi. ++dvi-libada: ++ ++@endif libada ++ ++.PHONY: maybe-pdf-libada pdf-libada ++maybe-pdf-libada: ++@if libada ++maybe-pdf-libada: pdf-libada ++ ++pdf-libada: \ ++ configure-libada ++ @: $(MAKE); $(unstage) ++ @[ -f ./libada/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing pdf in libada" ; \ ++ (cd $(HOST_SUBDIR)/libada && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif libada ++ ++.PHONY: maybe-html-libada html-libada ++maybe-html-libada: ++@if libada ++maybe-html-libada: html-libada ++ ++# libada doesn't support html. ++html-libada: ++ ++@endif libada ++ ++.PHONY: maybe-TAGS-libada TAGS-libada ++maybe-TAGS-libada: ++@if libada ++maybe-TAGS-libada: TAGS-libada ++ ++# libada doesn't support TAGS. ++TAGS-libada: ++ ++@endif libada ++ ++.PHONY: maybe-install-info-libada install-info-libada ++maybe-install-info-libada: ++@if libada ++maybe-install-info-libada: install-info-libada ++ ++# libada doesn't support install-info. ++install-info-libada: ++ ++@endif libada ++ ++.PHONY: maybe-install-pdf-libada install-pdf-libada ++maybe-install-pdf-libada: ++@if libada ++maybe-install-pdf-libada: install-pdf-libada ++ ++install-pdf-libada: \ ++ configure-libada \ ++ pdf-libada ++ @: $(MAKE); $(unstage) ++ @[ -f ./libada/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-pdf in libada" ; \ ++ (cd $(HOST_SUBDIR)/libada && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif libada ++ ++.PHONY: maybe-install-html-libada install-html-libada ++maybe-install-html-libada: ++@if libada ++maybe-install-html-libada: install-html-libada ++ ++install-html-libada: \ ++ configure-libada \ ++ html-libada ++ @: $(MAKE); $(unstage) ++ @[ -f ./libada/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-html in libada" ; \ ++ (cd $(HOST_SUBDIR)/libada && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif libada ++ ++.PHONY: maybe-installcheck-libada installcheck-libada ++maybe-installcheck-libada: ++@if libada ++maybe-installcheck-libada: installcheck-libada ++ ++# libada doesn't support installcheck. ++installcheck-libada: ++ ++@endif libada ++ ++.PHONY: maybe-mostlyclean-libada mostlyclean-libada ++maybe-mostlyclean-libada: ++@if libada ++maybe-mostlyclean-libada: mostlyclean-libada ++ ++mostlyclean-libada: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libada/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing mostlyclean in libada" ; \ ++ (cd $(HOST_SUBDIR)/libada && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif libada ++ ++.PHONY: maybe-clean-libada clean-libada ++maybe-clean-libada: ++@if libada ++maybe-clean-libada: clean-libada ++ ++clean-libada: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libada/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing clean in libada" ; \ ++ (cd $(HOST_SUBDIR)/libada && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif libada ++ ++.PHONY: maybe-distclean-libada distclean-libada ++maybe-distclean-libada: ++@if libada ++maybe-distclean-libada: distclean-libada ++ ++distclean-libada: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libada/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing distclean in libada" ; \ ++ (cd $(HOST_SUBDIR)/libada && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif libada ++ ++.PHONY: maybe-maintainer-clean-libada maintainer-clean-libada ++maybe-maintainer-clean-libada: ++@if libada ++maybe-maintainer-clean-libada: maintainer-clean-libada ++ ++maintainer-clean-libada: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libada/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing maintainer-clean in libada" ; \ ++ (cd $(HOST_SUBDIR)/libada && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif libada ++ ++ ++ + .PHONY: configure-gnattools maybe-configure-gnattools + maybe-configure-gnattools: + @if gcc-bootstrap +@@ -29482,12 +29826,6 @@ + maybe-check-gnattools: check-gnattools + + check-gnattools: +- @: $(MAKE); $(unstage) +- @r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(HOST_EXPORTS) \ +- (cd $(HOST_SUBDIR)/gnattools && \ +- $(MAKE) $(FLAGS_TO_PASS) check) + + @endif gnattools + +@@ -29528,24 +29866,8 @@ + @if gnattools + maybe-info-gnattools: info-gnattools + +-info-gnattools: \ +- configure-gnattools +- @: $(MAKE); $(unstage) +- @[ -f ./gnattools/Makefile ] || exit 0; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(HOST_EXPORTS) \ +- for flag in $(EXTRA_HOST_FLAGS) ; do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- echo "Doing info in gnattools" ; \ +- (cd $(HOST_SUBDIR)/gnattools && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- info) \ +- || exit 1 ++# gnattools doesn't support info. ++info-gnattools: + + @endif gnattools + +@@ -29554,24 +29876,8 @@ + @if gnattools + maybe-dvi-gnattools: dvi-gnattools + +-dvi-gnattools: \ +- configure-gnattools +- @: $(MAKE); $(unstage) +- @[ -f ./gnattools/Makefile ] || exit 0; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(HOST_EXPORTS) \ +- for flag in $(EXTRA_HOST_FLAGS) ; do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- echo "Doing dvi in gnattools" ; \ +- (cd $(HOST_SUBDIR)/gnattools && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- dvi) \ +- || exit 1 ++# gnattools doesn't support dvi. ++dvi-gnattools: + + @endif gnattools + +@@ -29606,24 +29912,8 @@ + @if gnattools + maybe-html-gnattools: html-gnattools + +-html-gnattools: \ +- configure-gnattools +- @: $(MAKE); $(unstage) +- @[ -f ./gnattools/Makefile ] || exit 0; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(HOST_EXPORTS) \ +- for flag in $(EXTRA_HOST_FLAGS) ; do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- echo "Doing html in gnattools" ; \ +- (cd $(HOST_SUBDIR)/gnattools && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- html) \ +- || exit 1 ++# gnattools doesn't support html. ++html-gnattools: + + @endif gnattools + +@@ -29632,24 +29922,8 @@ + @if gnattools + maybe-TAGS-gnattools: TAGS-gnattools + +-TAGS-gnattools: \ +- configure-gnattools +- @: $(MAKE); $(unstage) +- @[ -f ./gnattools/Makefile ] || exit 0; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(HOST_EXPORTS) \ +- for flag in $(EXTRA_HOST_FLAGS) ; do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- echo "Doing TAGS in gnattools" ; \ +- (cd $(HOST_SUBDIR)/gnattools && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- TAGS) \ +- || exit 1 ++# gnattools doesn't support TAGS. ++TAGS-gnattools: + + @endif gnattools + +@@ -29658,25 +29932,8 @@ + @if gnattools + maybe-install-info-gnattools: install-info-gnattools + +-install-info-gnattools: \ +- configure-gnattools \ +- info-gnattools +- @: $(MAKE); $(unstage) +- @[ -f ./gnattools/Makefile ] || exit 0; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(HOST_EXPORTS) \ +- for flag in $(EXTRA_HOST_FLAGS) ; do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- echo "Doing install-info in gnattools" ; \ +- (cd $(HOST_SUBDIR)/gnattools && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- install-info) \ +- || exit 1 ++# gnattools doesn't support install-info. ++install-info-gnattools: + + @endif gnattools + +@@ -29739,24 +29996,8 @@ + @if gnattools + maybe-installcheck-gnattools: installcheck-gnattools + +-installcheck-gnattools: \ +- configure-gnattools +- @: $(MAKE); $(unstage) +- @[ -f ./gnattools/Makefile ] || exit 0; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(HOST_EXPORTS) \ +- for flag in $(EXTRA_HOST_FLAGS) ; do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- echo "Doing installcheck in gnattools" ; \ +- (cd $(HOST_SUBDIR)/gnattools && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- installcheck) \ +- || exit 1 ++# gnattools doesn't support installcheck. ++installcheck-gnattools: + + @endif gnattools + +@@ -40970,13 +41211,8 @@ + @if target-libada + maybe-check-target-libada: check-target-libada + ++# Dummy target for uncheckable module. + check-target-libada: +- @: $(MAKE); $(unstage) +- @r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(NORMAL_TARGET_EXPORTS) \ +- (cd $(TARGET_SUBDIR)/libada && \ +- $(MAKE) $(TARGET_FLAGS_TO_PASS) check) + + @endif target-libada + +@@ -40985,13 +41221,8 @@ + @if target-libada + maybe-install-target-libada: install-target-libada + +-install-target-libada: installdirs +- @: $(MAKE); $(unstage) +- @r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(NORMAL_TARGET_EXPORTS) \ +- (cd $(TARGET_SUBDIR)/libada && \ +- $(MAKE) $(TARGET_FLAGS_TO_PASS) install) ++# Dummy target for uninstallable. ++install-target-libada: + + @endif target-libada + +@@ -41000,13 +41231,8 @@ + @if target-libada + maybe-install-strip-target-libada: install-strip-target-libada + +-install-strip-target-libada: installdirs +- @: $(MAKE); $(unstage) +- @r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(NORMAL_TARGET_EXPORTS) \ +- (cd $(TARGET_SUBDIR)/libada && \ +- $(MAKE) $(TARGET_FLAGS_TO_PASS) install-strip) ++# Dummy target for uninstallable. ++install-strip-target-libada: + + @endif target-libada + +@@ -41017,24 +41243,8 @@ + @if target-libada + maybe-info-target-libada: info-target-libada + +-info-target-libada: \ +- configure-target-libada +- @: $(MAKE); $(unstage) +- @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(NORMAL_TARGET_EXPORTS) \ +- echo "Doing info in $(TARGET_SUBDIR)/libada" ; \ +- for flag in $(EXTRA_TARGET_FLAGS); do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- (cd $(TARGET_SUBDIR)/libada && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- info) \ +- || exit 1 ++# libada doesn't support info. ++info-target-libada: + + @endif target-libada + +@@ -41043,24 +41253,8 @@ + @if target-libada + maybe-dvi-target-libada: dvi-target-libada + +-dvi-target-libada: \ +- configure-target-libada +- @: $(MAKE); $(unstage) +- @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(NORMAL_TARGET_EXPORTS) \ +- echo "Doing dvi in $(TARGET_SUBDIR)/libada" ; \ +- for flag in $(EXTRA_TARGET_FLAGS); do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- (cd $(TARGET_SUBDIR)/libada && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- dvi) \ +- || exit 1 ++# libada doesn't support dvi. ++dvi-target-libada: + + @endif target-libada + +@@ -41095,24 +41289,8 @@ + @if target-libada + maybe-html-target-libada: html-target-libada + +-html-target-libada: \ +- configure-target-libada +- @: $(MAKE); $(unstage) +- @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(NORMAL_TARGET_EXPORTS) \ +- echo "Doing html in $(TARGET_SUBDIR)/libada" ; \ +- for flag in $(EXTRA_TARGET_FLAGS); do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- (cd $(TARGET_SUBDIR)/libada && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- html) \ +- || exit 1 ++# libada doesn't support html. ++html-target-libada: + + @endif target-libada + +@@ -41121,24 +41299,8 @@ + @if target-libada + maybe-TAGS-target-libada: TAGS-target-libada + +-TAGS-target-libada: \ +- configure-target-libada +- @: $(MAKE); $(unstage) +- @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(NORMAL_TARGET_EXPORTS) \ +- echo "Doing TAGS in $(TARGET_SUBDIR)/libada" ; \ +- for flag in $(EXTRA_TARGET_FLAGS); do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- (cd $(TARGET_SUBDIR)/libada && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- TAGS) \ +- || exit 1 ++# libada doesn't support TAGS. ++TAGS-target-libada: + + @endif target-libada + +@@ -41147,25 +41309,8 @@ + @if target-libada + maybe-install-info-target-libada: install-info-target-libada + +-install-info-target-libada: \ +- configure-target-libada \ +- info-target-libada +- @: $(MAKE); $(unstage) +- @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(NORMAL_TARGET_EXPORTS) \ +- echo "Doing install-info in $(TARGET_SUBDIR)/libada" ; \ +- for flag in $(EXTRA_TARGET_FLAGS); do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- (cd $(TARGET_SUBDIR)/libada && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- install-info) \ +- || exit 1 ++# libada doesn't support install-info. ++install-info-target-libada: + + @endif target-libada + +@@ -41228,24 +41373,8 @@ + @if target-libada + maybe-installcheck-target-libada: installcheck-target-libada + +-installcheck-target-libada: \ +- configure-target-libada +- @: $(MAKE); $(unstage) +- @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ +- r=`${PWD_COMMAND}`; export r; \ +- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ +- $(NORMAL_TARGET_EXPORTS) \ +- echo "Doing installcheck in $(TARGET_SUBDIR)/libada" ; \ +- for flag in $(EXTRA_TARGET_FLAGS); do \ +- eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ +- done; \ +- (cd $(TARGET_SUBDIR)/libada && \ +- $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ +- "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ +- "RANLIB=$${RANLIB}" \ +- "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ +- installcheck) \ +- || exit 1 ++# libada doesn't support installcheck. ++installcheck-target-libada: + + @endif target-libada + +@@ -45729,7 +45858,7 @@ + all-stageprofile-libcpp: maybe-all-stageprofile-intl + all-stagefeedback-libcpp: maybe-all-stagefeedback-intl + all-fixincludes: maybe-all-libiberty +-all-gnattools: maybe-all-target-libada ++all-gnattools: maybe-all-libada + all-lto-plugin: maybe-all-libiberty + + all-stage1-lto-plugin: maybe-all-stage1-libiberty +Index: b/src/configure.ac +=================================================================== +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -133,7 +133,7 @@ + + # these libraries are used by various programs built for the host environment + # +-host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktrace libcpp libdecnumber gmp mpfr mpc isl cloog libelf libiconv" ++host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktrace libcpp libdecnumber gmp mpfr mpc isl cloog libelf libiconv libada" + + # these tools are built for the host environment + # Note, the powerpc-eabi build depends on sim occurring before gdb in order to +@@ -264,7 +264,7 @@ + + # Some are only suitable for cross toolchains. + # Remove these if host=target. +-cross_only="target-libgloss target-newlib target-opcodes" ++cross_only="target-libgloss target-newlib target-opcodes target-libada" + + case $is_cross_compiler in + no) skipdirs="${skipdirs} ${cross_only}" ;; --- gcc-4.8-4.8.5.orig/debian/patches/ada-link-shlib.diff +++ gcc-4.8-4.8.5/debian/patches/ada-link-shlib.diff @@ -0,0 +1,85 @@ +# DP: In gnatlink, pass the options and libraries after objects to the +# DP: linker to avoid link failures with --as-needed. Closes: #680292. + +--- a/src/gcc/ada/mlib-tgt-specific-linux.adb ++++ b/src/gcc/ada/mlib-tgt-specific-linux.adb +@@ -81,19 +81,54 @@ + Version_Arg : String_Access; + Symbolic_Link_Needed : Boolean := False; + ++ N_Options : Argument_List := Options; ++ Options_Last : Natural := N_Options'Last; ++ -- After moving -lxxx to Options_2, N_Options up to index Options_Last ++ -- will contain the Options to pass to MLib.Utl.Gcc. ++ ++ Real_Options_2 : Argument_List (1 .. Options'Length); ++ Real_Options_2_Last : Natural := 0; ++ -- Real_Options_2 up to index Real_Options_2_Last will contain the ++ -- Options_2 to pass to MLib.Utl.Gcc. ++ + begin + if Opt.Verbose_Mode then + Write_Str ("building relocatable shared library "); + Write_Line (Lib_Path); + end if; + ++ -- Move all -lxxx to Options_2 ++ ++ declare ++ Index : Natural := N_Options'First; ++ Arg : String_Access; ++ ++ begin ++ while Index <= Options_Last loop ++ Arg := N_Options (Index); ++ ++ if Arg'Length > 2 ++ and then Arg (Arg'First .. Arg'First + 1) = "-l" ++ then ++ Real_Options_2_Last := Real_Options_2_Last + 1; ++ Real_Options_2 (Real_Options_2_Last) := Arg; ++ N_Options (Index .. Options_Last - 1) := ++ N_Options (Index + 1 .. Options_Last); ++ Options_Last := Options_Last - 1; ++ ++ else ++ Index := Index + 1; ++ end if; ++ end loop; ++ end; ++ + if Lib_Version = "" then + Utl.Gcc + (Output_File => Lib_Path, + Objects => Ofiles, +- Options => Options, ++ Options => N_Options (N_Options'First .. Options_Last), + Driver_Name => Driver_Name, +- Options_2 => No_Argument_List); ++ Options_2 => Real_Options_2 (1 .. Real_Options_2_Last)); + + else + declare +@@ -111,18 +146,18 @@ + Utl.Gcc + (Output_File => Lib_Version, + Objects => Ofiles, +- Options => Options & Version_Arg, ++ Options => N_Options (N_Options'First .. Options_Last) & Version_Arg, + Driver_Name => Driver_Name, +- Options_2 => No_Argument_List); ++ Options_2 => Real_Options_2 (1 .. Real_Options_2_Last)); + Symbolic_Link_Needed := Lib_Version /= Lib_Path; + + else + Utl.Gcc + (Output_File => Lib_Dir & Directory_Separator & Lib_Version, + Objects => Ofiles, +- Options => Options & Version_Arg, ++ Options => N_Options (N_Options'First .. Options_Last) & Version_Arg, + Driver_Name => Driver_Name, +- Options_2 => No_Argument_List); ++ Options_2 => Real_Options_2 (1 .. Real_Options_2_Last)); + Symbolic_Link_Needed := + Lib_Dir & Directory_Separator & Lib_Version /= Lib_Path; + end if; --- gcc-4.8-4.8.5.orig/debian/patches/ada-mips.diff +++ gcc-4.8-4.8.5/debian/patches/ada-mips.diff @@ -0,0 +1,33 @@ +# DP: Improve support for mips. + +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -1723,10 +1723,15 @@ + s-taprop.adb S, ++ tv_nsec => long (Long_Long_Integer (F * 10#1#E9))); ++ end To_Timespec; ++ ++end System.OS_Interface; --- gcc-4.8-4.8.5.orig/debian/patches/ada-s-osinte-gnu.ads.diff +++ gcc-4.8-4.8.5/debian/patches/ada-s-osinte-gnu.ads.diff @@ -0,0 +1,753 @@ +--- /dev/null 2012-01-30 20:41:15.189616186 +0100 ++++ b/src/gcc/ada/s-osinte-gnu.ads 2012-04-11 19:34:45.000000000 +0200 +@@ -0,0 +1,750 @@ ++------------------------------------------------------------------------------ ++-- -- ++-- GNU ADA RUN-TIME LIBRARY (GNARL) COMPONENTS -- ++-- -- ++-- S Y S T E M . O S _ I N T E R F A C E -- ++-- -- ++-- S p e c -- ++-- -- ++-- Copyright (C) 1991-1994, Florida State University -- ++-- Copyright (C) 1995-2011, Free Software Foundation, Inc. -- ++-- -- ++-- GNARL is free software; you can redistribute it and/or modify it under -- ++-- terms of the GNU General Public License as published by the Free Soft- -- ++-- ware Foundation; either version 2, or (at your option) any later ver- -- ++-- sion. GNARL is distributed in the hope that it will be useful, but WITH- -- ++-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- ++-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -- ++-- for more details. You should have received a copy of the GNU General -- ++-- Public License distributed with GNARL; see file COPYING. If not, write -- ++-- to the Free Software Foundation, 51 Franklin Street, Fifth Floor, -- ++-- Boston, MA 02110-1301, USA. -- ++-- -- ++-- As a special exception, if other files instantiate generics from this -- ++-- unit, or you link this unit with other files to produce an executable, -- ++-- this unit does not by itself cause the resulting executable to be -- ++-- covered by the GNU General Public License. This exception does not -- ++-- however invalidate any other reasons why the executable file might be -- ++-- covered by the GNU Public License. -- ++-- -- ++-- GNARL was developed by the GNARL team at Florida State University. -- ++-- Extensive contributions were provided by Ada Core Technologies, Inc. -- ++-- -- ++------------------------------------------------------------------------------ ++ ++-- This is the GNU/Hurd version of this package ++ ++-- This package encapsulates all direct interfaces to OS services ++-- that are needed by children of System. ++ ++-- PLEASE DO NOT add any with-clauses to this package or remove the pragma ++-- Preelaborate. This package is designed to be a bottom-level (leaf) package ++ ++with Interfaces.C; ++with Unchecked_Conversion; ++ ++package System.OS_Interface is ++ pragma Preelaborate; ++ ++ pragma Linker_Options ("-lpthread"); ++ pragma Linker_Options ("-lrt"); ++ ++ subtype int is Interfaces.C.int; ++ subtype char is Interfaces.C.char; ++ subtype short is Interfaces.C.short; ++ subtype long is Interfaces.C.long; ++ subtype unsigned is Interfaces.C.unsigned; ++ subtype unsigned_short is Interfaces.C.unsigned_short; ++ subtype unsigned_long is Interfaces.C.unsigned_long; ++ subtype unsigned_char is Interfaces.C.unsigned_char; ++ subtype plain_char is Interfaces.C.plain_char; ++ subtype size_t is Interfaces.C.size_t; ++ ++ ----------- ++ -- Errno -- ++ ----------- ++ -- From /usr/include/i386-gnu/bits/errno.h ++ ++ function errno return int; ++ pragma Import (C, errno, "__get_errno"); ++ ++ EAGAIN : constant := 1073741859; ++ EINTR : constant := 1073741828; ++ EINVAL : constant := 1073741846; ++ ENOMEM : constant := 1073741836; ++ EPERM : constant := 1073741825; ++ ETIMEDOUT : constant := 1073741884; ++ ++ ------------- ++ -- Signals -- ++ ------------- ++ -- From /usr/include/i386-gnu/bits/signum.h ++ ++ Max_Interrupt : constant := 32; ++ type Signal is new int range 0 .. Max_Interrupt; ++ for Signal'Size use int'Size; ++ ++ SIGHUP : constant := 1; -- hangup ++ SIGINT : constant := 2; -- interrupt (rubout) ++ SIGQUIT : constant := 3; -- quit (ASCD FS) ++ SIGILL : constant := 4; -- illegal instruction (not reset) ++ SIGTRAP : constant := 5; -- trace trap (not reset) ++ SIGIOT : constant := 6; -- IOT instruction ++ SIGABRT : constant := 6; -- used by abort, replace SIGIOT in the future ++ SIGEMT : constant := 7; -- EMT instruction ++ SIGFPE : constant := 8; -- floating point exception ++ SIGKILL : constant := 9; -- kill (cannot be caught or ignored) ++ SIGBUS : constant := 10; -- bus error ++ SIGSEGV : constant := 11; -- segmentation violation ++ SIGSYS : constant := 12; -- bad argument to system call ++ SIGPIPE : constant := 13; -- write on a pipe with no one to read it ++ SIGALRM : constant := 14; -- alarm clock ++ SIGTERM : constant := 15; -- software termination signal from kill ++ SIGURG : constant := 16; -- urgent condition on IO channel ++ SIGSTOP : constant := 17; -- stop (cannot be caught or ignored) ++ SIGTSTP : constant := 18; -- user stop requested from tty ++ SIGCONT : constant := 19; -- stopped process has been continued ++ SIGCLD : constant := 20; -- alias for SIGCHLD ++ SIGCHLD : constant := 20; -- child status change ++ SIGTTIN : constant := 21; -- background tty read attempted ++ SIGTTOU : constant := 22; -- background tty write attempted ++ SIGIO : constant := 23; -- I/O possible (Solaris SIGPOLL alias) ++ SIGPOLL : constant := 23; -- I/O possible (same as SIGIO?) ++ SIGXCPU : constant := 24; -- CPU time limit exceeded ++ SIGXFSZ : constant := 25; -- filesize limit exceeded ++ SIGVTALRM : constant := 26; -- virtual timer expired ++ SIGPROF : constant := 27; -- profiling timer expired ++ SIGWINCH : constant := 28; -- window size change ++ SIGINFO : constant := 29; -- information request (NetBSD/FreeBSD) ++ SIGUSR1 : constant := 30; -- user defined signal 1 ++ SIGUSR2 : constant := 31; -- user defined signal 2 ++ SIGLOST : constant := 32; -- Resource lost (Sun); server died (GNU) ++-- SIGLTHRRES : constant := 32; -- GNU/LinuxThreads restart signal ++-- SIGLTHRCAN : constant := 33; -- GNU/LinuxThreads cancel signal ++-- SIGLTHRDBG : constant := 34; -- GNU/LinuxThreads debugger signal ++ ++ SIGADAABORT : constant := SIGABRT; ++ -- Change this if you want to use another signal for task abort. ++ -- SIGTERM might be a good one. ++ ++ type Signal_Set is array (Natural range <>) of Signal; ++ ++ Unmasked : constant Signal_Set := ( ++ SIGTRAP, ++ -- To enable debugging on multithreaded applications, mark SIGTRAP to ++ -- be kept unmasked. ++ ++ SIGBUS, ++ ++ SIGTTIN, SIGTTOU, SIGTSTP, ++ -- Keep these three signals unmasked so that background processes ++ -- and IO behaves as normal "C" applications ++ ++ SIGPROF, ++ -- To avoid confusing the profiler ++ ++ SIGKILL, SIGSTOP); ++ -- These two signals actually cannot be masked; ++ -- POSIX simply won't allow it. ++ ++ Reserved : constant Signal_Set := ++ -- I am not sure why the following signal is reserved. ++ -- I guess they are not supported by this version of GNU/Hurd. ++ (0 .. 0 => SIGVTALRM); ++ ++ type sigset_t is private; ++ ++ -- From /usr/include/signal.h /usr/include/i386-gnu/bits/sigset.h ++ function sigaddset (set : access sigset_t; sig : Signal) return int; ++ pragma Import (C, sigaddset, "sigaddset"); ++ ++ function sigdelset (set : access sigset_t; sig : Signal) return int; ++ pragma Import (C, sigdelset, "sigdelset"); ++ ++ function sigfillset (set : access sigset_t) return int; ++ pragma Import (C, sigfillset, "sigfillset"); ++ ++ function sigismember (set : access sigset_t; sig : Signal) return int; ++ pragma Import (C, sigismember, "sigismember"); ++ ++ function sigemptyset (set : access sigset_t) return int; ++ pragma Import (C, sigemptyset, "sigemptyset"); ++ ++ -- sigcontext is architecture dependent, so define it private ++ type struct_sigcontext is private; ++ ++ -- From /usr/include/i386-gnu/bits/sigaction.h: Note: arg. order differs ++ type struct_sigaction is record ++ sa_handler : System.Address; ++ sa_mask : sigset_t; ++ sa_flags : int; ++ end record; ++ pragma Convention (C, struct_sigaction); ++ ++ type struct_sigaction_ptr is access all struct_sigaction; ++ ++ -- From /usr/include/i386-gnu/bits/sigaction.h ++ SIG_BLOCK : constant := 1; ++ SIG_UNBLOCK : constant := 2; ++ SIG_SETMASK : constant := 3; ++ ++ -- From /usr/include/i386-gnu/bits/signum.h ++ SIG_ERR : constant := 1; ++ SIG_DFL : constant := 0; ++ SIG_IGN : constant := 1; ++ SIG_HOLD : constant := 2; ++ ++ -- From /usr/include/i386-gnu/bits/sigaction.h ++ SA_SIGINFO : constant := 16#0040#; ++ SA_ONSTACK : constant := 16#0001#; ++ ++ function sigaction ++ (sig : Signal; ++ act : struct_sigaction_ptr; ++ oact : struct_sigaction_ptr) return int; ++ pragma Import (C, sigaction, "sigaction"); ++ ++ ---------- ++ -- Time -- ++ ---------- ++ ++ Time_Slice_Supported : constant Boolean := True; ++ -- Indicates whether time slicing is supported (i.e SCHED_RR is supported) ++ ++ type timespec is private; ++ ++ function nanosleep (rqtp, rmtp : access timespec) return int; ++ pragma Import (C, nanosleep, "nanosleep"); ++ ++ type clockid_t is private; ++ ++ CLOCK_REALTIME : constant clockid_t; ++ ++ -- From: /usr/include/time.h ++ function clock_gettime ++ (clock_id : clockid_t; ++ tp : access timespec) ++ return int; ++ pragma Import (C, clock_gettime, "clock_gettime"); ++ ++ function To_Duration (TS : timespec) return Duration; ++ pragma Inline (To_Duration); ++ ++ function To_Timespec (D : Duration) return timespec; ++ pragma Inline (To_Timespec); ++ ++ -- From: /usr/include/unistd.h ++ function sysconf (name : int) return long; ++ pragma Import (C, sysconf); ++ ++ -- From /usr/include/i386-gnu/bits/confname.h ++ SC_CLK_TCK : constant := 2; ++ SC_NPROCESSORS_ONLN : constant := 84; ++ ++ ------------------------- ++ -- Priority Scheduling -- ++ ------------------------- ++ -- From /usr/include/i386-gnu/bits/sched.h ++ ++ SCHED_OTHER : constant := 0; ++ SCHED_FIFO : constant := 1; ++ SCHED_RR : constant := 2; ++ ++ function To_Target_Priority ++ (Prio : System.Any_Priority) return Interfaces.C.int; ++ -- Maps System.Any_Priority to a POSIX priority. ++ ++ ------------- ++ -- Process -- ++ ------------- ++ ++ type pid_t is private; ++ ++ -- From: /usr/include/signal.h ++ function kill (pid : pid_t; sig : Signal) return int; ++ pragma Import (C, kill, "kill"); ++ ++ -- From: /usr/include/unistd.h ++ function getpid return pid_t; ++ pragma Import (C, getpid, "getpid"); ++ ++ --------- ++ -- LWP -- ++ --------- ++ ++ -- From: /usr/include/pthread/pthread.h ++ function lwp_self return System.Address; ++ -- lwp_self does not exist on this thread library, revert to pthread_self ++ -- which is the closest approximation (with getpid). This function is ++ -- needed to share 7staprop.adb across POSIX-like targets. ++ pragma Import (C, lwp_self, "pthread_self"); ++ ++ ------------- ++ -- Threads -- ++ ------------- ++ ++ type Thread_Body is access ++ function (arg : System.Address) return System.Address; ++ pragma Convention (C, Thread_Body); ++ ++ function Thread_Body_Access is new ++ Unchecked_Conversion (System.Address, Thread_Body); ++ ++ -- From: /usr/include/bits/pthread.h:typedef int __pthread_t; ++ -- /usr/include/pthread/pthreadtypes.h:typedef __pthread_t pthread_t; ++ type pthread_t is new unsigned_long; ++ subtype Thread_Id is pthread_t; ++ ++ function To_pthread_t is new Unchecked_Conversion ++ (unsigned_long, pthread_t); ++ ++ type pthread_mutex_t is limited private; ++ type pthread_cond_t is limited private; ++ type pthread_attr_t is limited private; ++ type pthread_mutexattr_t is limited private; ++ type pthread_condattr_t is limited private; ++ type pthread_key_t is private; ++ ++ -- From /usr/include/pthread/pthreadtypes.h ++ PTHREAD_CREATE_DETACHED : constant := 1; ++ PTHREAD_CREATE_JOINABLE : constant := 0; ++ ++ PTHREAD_SCOPE_PROCESS : constant := 1; ++ PTHREAD_SCOPE_SYSTEM : constant := 0; ++ ++ ----------- ++ -- Stack -- ++ ----------- ++ ++ -- From: /usr/include/i386-gnu/bits/sigstack.h ++ type stack_t is record ++ ss_sp : System.Address; ++ ss_size : size_t; ++ ss_flags : int; ++ end record; ++ pragma Convention (C, stack_t); ++ ++ function sigaltstack ++ (ss : not null access stack_t; ++ oss : access stack_t) return int; ++ pragma Import (C, sigaltstack, "sigaltstack"); ++ ++ Alternate_Stack : aliased System.Address; ++ -- This is a dummy definition, never used (Alternate_Stack_Size is null) ++ ++ Alternate_Stack_Size : constant := 0; ++ -- No alternate signal stack is used on this platform ++ ++ Stack_Base_Available : constant Boolean := False; ++ -- Indicates whether the stack base is available on this target ++ ++ function Get_Stack_Base (thread : pthread_t) return Address; ++ pragma Inline (Get_Stack_Base); ++ -- returns the stack base of the specified thread. Only call this function ++ -- when Stack_Base_Available is True. ++ ++ -- From: /usr/include/i386-gnu/bits/shm.h __getpagesize or getpagesize?? ++ function Get_Page_Size return size_t; ++ function Get_Page_Size return Address; ++ pragma Import (C, Get_Page_Size, "__getpagesize"); ++ -- Returns the size of a page ++ ++ -- From /usr/include/i386-gnu/bits/mman.h ++ PROT_NONE : constant := 0; ++ PROT_READ : constant := 4; ++ PROT_WRITE : constant := 2; ++ PROT_EXEC : constant := 1; ++ PROT_ALL : constant := PROT_READ + PROT_WRITE + PROT_EXEC; ++ PROT_ON : constant := PROT_NONE; ++ PROT_OFF : constant := PROT_ALL; ++ ++ -- From /usr/include/i386-gnu/bits/mman.h ++ function mprotect (addr : Address; len : size_t; prot : int) return int; ++ pragma Import (C, mprotect); ++ ++ --------------------------------------- ++ -- Nonstandard Thread Initialization -- ++ --------------------------------------- ++ ++ procedure pthread_init; ++ pragma Inline (pthread_init); ++ -- This is a dummy procedure to share some GNULLI files ++ ++ ------------------------- ++ -- POSIX.1c Section 3 -- ++ ------------------------- ++ ++ -- From: /usr/include/signal.h: ++ -- sigwait (__const sigset_t *__restrict __set, int *__restrict __sig) ++ function sigwait (set : access sigset_t; sig : access Signal) return int; ++ pragma Import (C, sigwait, "sigwait"); ++ ++ -- From: /usr/include/pthread/pthread.h: ++ -- extern int pthread_kill (pthread_t thread, int signo); ++ function pthread_kill (thread : pthread_t; sig : Signal) return int; ++ pragma Import (C, pthread_kill, "pthread_kill"); ++ ++ -- From: /usr/include/i386-gnu/bits/sigthread.h ++ -- extern int pthread_sigmask (int __how, __const __sigset_t *__newmask, ++ -- __sigset_t *__oldmask) __THROW; ++ function pthread_sigmask ++ (how : int; ++ set : access sigset_t; ++ oset : access sigset_t) return int; ++ pragma Import (C, pthread_sigmask, "pthread_sigmask"); ++ ++ -------------------------- ++ -- POSIX.1c Section 11 -- ++ -------------------------- ++ ++ -- From: /usr/include/pthread/pthread.h and ++ -- /usr/include/pthread/pthreadtypes.h ++ function pthread_mutexattr_init ++ (attr : access pthread_mutexattr_t) return int; ++ pragma Import (C, pthread_mutexattr_init, "pthread_mutexattr_init"); ++ ++ function pthread_mutexattr_destroy ++ (attr : access pthread_mutexattr_t) return int; ++ pragma Import (C, pthread_mutexattr_destroy, "pthread_mutexattr_destroy"); ++ ++ function pthread_mutex_init ++ (mutex : access pthread_mutex_t; ++ attr : access pthread_mutexattr_t) return int; ++ pragma Import (C, pthread_mutex_init, "pthread_mutex_init"); ++ ++ function pthread_mutex_destroy (mutex : access pthread_mutex_t) return int; ++ pragma Import (C, pthread_mutex_destroy, "pthread_mutex_destroy"); ++ ++ function pthread_mutex_lock (mutex : access pthread_mutex_t) return int; ++ pragma Import (C, pthread_mutex_lock, "pthread_mutex_lock"); ++ ++ function pthread_mutex_unlock (mutex : access pthread_mutex_t) return int; ++ pragma Import (C, pthread_mutex_unlock, "pthread_mutex_unlock"); ++ ++ function pthread_condattr_init ++ (attr : access pthread_condattr_t) return int; ++ pragma Import (C, pthread_condattr_init, "pthread_condattr_init"); ++ ++ function pthread_condattr_destroy ++ (attr : access pthread_condattr_t) return int; ++ pragma Import (C, pthread_condattr_destroy, "pthread_condattr_destroy"); ++ ++ function pthread_cond_init ++ (cond : access pthread_cond_t; ++ attr : access pthread_condattr_t) return int; ++ pragma Import (C, pthread_cond_init, "pthread_cond_init"); ++ ++ function pthread_cond_destroy (cond : access pthread_cond_t) return int; ++ pragma Import (C, pthread_cond_destroy, "pthread_cond_destroy"); ++ ++ function pthread_cond_signal (cond : access pthread_cond_t) return int; ++ pragma Import (C, pthread_cond_signal, "pthread_cond_signal"); ++ ++ function pthread_cond_wait ++ (cond : access pthread_cond_t; ++ mutex : access pthread_mutex_t) return int; ++ pragma Import (C, pthread_cond_wait, "pthread_cond_wait"); ++ ++ function pthread_cond_timedwait ++ (cond : access pthread_cond_t; ++ mutex : access pthread_mutex_t; ++ abstime : access timespec) return int; ++ pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait"); ++ ++ Relative_Timed_Wait : constant Boolean := False; ++ -- pthread_cond_timedwait requires an absolute delay time ++ ++ -------------------------- ++ -- POSIX.1c Section 13 -- ++ -------------------------- ++ -- From /usr/include/pthread/pthreadtypes.h ++ ++ PTHREAD_PRIO_NONE : constant := 0; ++ PTHREAD_PRIO_PROTECT : constant := 2; ++ PTHREAD_PRIO_INHERIT : constant := 1; ++ ++ -- From: /usr/include/pthread/pthread.h ++ function pthread_mutexattr_setprotocol ++ (attr : access pthread_mutexattr_t; ++ protocol : int) return int; ++ pragma Import (C, pthread_mutexattr_setprotocol, ++ "pthread_mutexattr_setprotocol"); ++ ++ function pthread_mutexattr_getprotocol ++ (attr : access pthread_mutexattr_t; ++ protocol : access int) return int; ++ pragma Import (C, pthread_mutexattr_getprotocol, ++ "pthread_mutexattr_getprotocol"); ++ ++ function pthread_mutexattr_setprioceiling ++ (attr : access pthread_mutexattr_t; ++ prioceiling : int) return int; ++ pragma Import (C, pthread_mutexattr_setprioceiling, ++ "pthread_mutexattr_setprioceiling"); ++ ++ function pthread_mutexattr_getprioceiling ++ (attr : access pthread_mutexattr_t; ++ prioceiling : access int) return int; ++ pragma Import (C, pthread_mutexattr_getprioceiling, ++ "pthread_mutexattr_getprioceiling"); ++ ++ type struct_sched_param is record ++ sched_priority : int; -- scheduling priority ++ end record; ++ pragma Convention (C, struct_sched_param); ++ ++ function pthread_setschedparam ++ (thread : pthread_t; ++ policy : int; ++ param : access struct_sched_param) return int; ++ pragma Import (C, pthread_setschedparam, "pthread_setschedparam"); ++ ++ function pthread_attr_setscope ++ (attr : access pthread_attr_t; ++ contentionscope : int) return int; ++ pragma Import (C, pthread_attr_setscope, "pthread_attr_setscope"); ++ ++ function pthread_attr_getscope ++ (attr : access pthread_attr_t; ++ contentionscope : access int) return int; ++ pragma Import (C, pthread_attr_getscope, "pthread_attr_getscope"); ++ ++ function pthread_attr_setinheritsched ++ (attr : access pthread_attr_t; ++ inheritsched : int) return int; ++ pragma Import (C, pthread_attr_setinheritsched, ++ "pthread_attr_setinheritsched"); ++ ++ function pthread_attr_getinheritsched ++ (attr : access pthread_attr_t; ++ inheritsched : access int) return int; ++ pragma Import (C, pthread_attr_getinheritsched, ++ "pthread_attr_getinheritsched"); ++ ++ function pthread_attr_setschedpolicy ++ (attr : access pthread_attr_t; ++ policy : int) return int; ++ pragma Import (C, pthread_attr_setschedpolicy, "pthread_setschedpolicy"); ++ ++ function sched_yield return int; ++ pragma Import (C, sched_yield, "sched_yield"); ++ ++ --------------------------- ++ -- P1003.1c - Section 16 -- ++ --------------------------- ++ ++ function pthread_attr_init ++ (attributes : access pthread_attr_t) return int; ++ pragma Import (C, pthread_attr_init, "pthread_attr_init"); ++ ++ function pthread_attr_destroy ++ (attributes : access pthread_attr_t) return int; ++ pragma Import (C, pthread_attr_destroy, "pthread_attr_destroy"); ++ ++ function pthread_attr_setdetachstate ++ (attr : access pthread_attr_t; ++ detachstate : int) return int; ++ pragma Import ++ (C, pthread_attr_setdetachstate, "pthread_attr_setdetachstate"); ++ ++ function pthread_attr_setstacksize ++ (attr : access pthread_attr_t; ++ stacksize : size_t) return int; ++ pragma Import (C, pthread_attr_setstacksize, "pthread_attr_setstacksize"); ++ ++ -- From: /usr/include/pthread/pthread.h ++ function pthread_create ++ (thread : access pthread_t; ++ attributes : access pthread_attr_t; ++ start_routine : Thread_Body; ++ arg : System.Address) return int; ++ pragma Import (C, pthread_create, "pthread_create"); ++ ++ procedure pthread_exit (status : System.Address); ++ pragma Import (C, pthread_exit, "pthread_exit"); ++ ++ function pthread_self return pthread_t; ++ pragma Import (C, pthread_self, "pthread_self"); ++ ++ -------------------------- ++ -- POSIX.1c Section 17 -- ++ -------------------------- ++ ++ function pthread_setspecific ++ (key : pthread_key_t; ++ value : System.Address) return int; ++ pragma Import (C, pthread_setspecific, "pthread_setspecific"); ++ ++ function pthread_getspecific (key : pthread_key_t) return System.Address; ++ pragma Import (C, pthread_getspecific, "pthread_getspecific"); ++ ++ type destructor_pointer is access procedure (arg : System.Address); ++ pragma Convention (C, destructor_pointer); ++ ++ function pthread_key_create ++ (key : access pthread_key_t; ++ destructor : destructor_pointer) return int; ++ pragma Import (C, pthread_key_create, "pthread_key_create"); ++ ++ -- From /usr/include/i386-gnu/bits/sched.h ++ -- 1_024 == 1024?? ++ CPU_SETSIZE : constant := 1_024; ++ ++ type bit_field is array (1 .. CPU_SETSIZE) of Boolean; ++ for bit_field'Size use CPU_SETSIZE; ++ pragma Pack (bit_field); ++ pragma Convention (C, bit_field); ++ ++ type cpu_set_t is record ++ bits : bit_field; ++ end record; ++ pragma Convention (C, cpu_set_t); ++ ++ -- function pthread_setaffinity_np ++ -- (thread : pthread_t; ++ -- cpusetsize : size_t; ++ -- cpuset : access cpu_set_t) return int; ++ -- pragma Import (C, pthread_setaffinity_np, ++ -- "__gnat_pthread_setaffinity_np"); ++ ++private ++ ++ type sigset_t is array (1 .. 4) of unsigned; ++ ++ -- FIXME: ++ -- In GNU/Hurd the component sa_handler turns out to ++ -- be one a union type, and the selector is a macro: ++ -- #define sa_handler __sigaction_handler.sa_handler ++ -- #define sa_sigaction __sigaction_handler.sa_sigaction ++ ++ -- In FreeBSD the component sa_handler turns out to ++ -- be one a union type, and the selector is a macro: ++ -- #define sa_handler __sigaction_u._handler ++ -- #define sa_sigaction __sigaction_u._sigaction ++ ++ -- Should we add a signal_context type here ? ++ -- How could it be done independent of the CPU architecture ? ++ -- sigcontext type is opaque, so it is architecturally neutral. ++ -- It is always passed as an access type, so define it as an empty record ++ -- since the contents are not used anywhere. ++ type struct_sigcontext is null record; ++ pragma Convention (C, struct_sigcontext); ++ ++ type pid_t is new int; ++ ++ type time_t is new long; ++ ++ type timespec is record ++ tv_sec : time_t; ++ tv_nsec : long; ++ end record; ++ pragma Convention (C, timespec); ++ ++ type clockid_t is new int; ++ CLOCK_REALTIME : constant clockid_t := 0; ++ ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- typedef struct __pthread_attr pthread_attr_t; ++ -- /usr/include/bits/thread-attr.h: struct __pthread_attr... ++ -- /usr/include/pthread/pthreadtypes.h: enum __pthread_contentionscope ++ -- enum __pthread_detachstate detachstate; ++ -- enum __pthread_inheritsched inheritsched; ++ -- enum __pthread_contentionscope contentionscope; ++ -- Not used: schedpolicy : int; ++ type pthread_attr_t is record ++ schedparam : struct_sched_param; ++ stackaddr : System.Address; ++ stacksize : size_t; ++ guardsize : size_t; ++ detachstate : int; ++ inheritsched : int; ++ contentionscope : int; ++ schedpolicy : int; ++ end record; ++ pragma Convention (C, pthread_attr_t); ++ ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- typedef struct __pthread_condattr pthread_condattr_t; ++ -- From: /usr/include/bits/condition-attr.h: ++ -- struct __pthread_condattr { ++ -- enum __pthread_process_shared pshared; ++ -- __Clockid_T Clock;} ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- enum __pthread_process_shared ++ type pthread_condattr_t is record ++ pshared : int; ++ clock : clockid_t; ++ end record; ++ pragma Convention (C, pthread_condattr_t); ++ ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- typedef struct __pthread_mutexattr pthread_mutexattr_t; and ++ -- /usr/include/bits/mutex-attr.h ++ -- struct __pthread_mutexattr { ++ -- Int Prioceiling; ++ -- Enum __Pthread_Mutex_Protocol Protocol; ++ -- Enum __Pthread_Process_Shared Pshared; ++ -- Enum __Pthread_Mutex_Type Mutex_Type;}; ++ type pthread_mutexattr_t is record ++ prioceiling : int; ++ protocol : int; ++ pshared : int; ++ mutex_type : int; ++ end record; ++ pragma Convention (C, pthread_mutexattr_t); ++ ++ -- From: /usr/include/pthread/pthreadtypes.h ++ -- typedef struct __pthread_mutex pthread_mutex_t; and ++ -- /usr/include/bits/mutex.h: ++ -- struct __pthread_mutex { ++ -- __pthread_spinlock_t __held; ++ -- __pthread_spinlock_t __lock; ++ -- /* in cthreads, mutex_init does not initialized the third ++ -- pointer, as such, we cannot rely on its value for anything. */ ++ -- char *cthreadscompat1; ++ -- struct __pthread *__queue; ++ -- struct __pthread_mutexattr *attr; ++ -- void *data; ++ -- /* up to this point, we are completely compatible with cthreads ++ -- and what libc expects. */ ++ -- void *owner; ++ -- unsigned locks; ++ -- /* if null then the default attributes apply. */ ++ -- }; ++ type pthread_mutex_t is record ++ held : int; ++ lock : int; ++ cthreadcompat : System.Address; ++ queue : System.Address; ++ attr : System.Address; ++ data : System.Address; ++ owner : System.Address; ++ locks : unsigned; ++ end record; ++ pragma Convention (C, pthread_mutex_t); ++ -- pointer needed? ++ -- type pthread_mutex_t_ptr is access pthread_mutex_t; ++ ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- typedef struct __pthread_cond pthread_cond_t; ++ -- typedef struct __pthread_condattr pthread_condattr_t; ++ -- /usr/include/bits/condition.h:struct __pthread_cond{} ++ -- pthread_condattr_t: see above! ++ -- /usr/include/bits/condition.h: struct __pthread_condimpl *__impl; ++ ++ type pthread_cond_t is record ++ lock : int; ++ queue : System.Address; ++ condattr : System.Address; ++ impl : System.Address; ++ data : System.Address; ++ end record; ++ pragma Convention (C, pthread_cond_t); ++ ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- typedef __pthread_key pthread_key_t; and ++ -- /usr/include/bits/thread-specific.h: ++ -- typedef int __pthread_key; ++ type pthread_key_t is new int; ++ ++end System.OS_Interface; --- gcc-4.8-4.8.5.orig/debian/patches/ada-s-taprop-gnu.adb.diff +++ gcc-4.8-4.8.5/debian/patches/ada-s-taprop-gnu.adb.diff @@ -0,0 +1,1339 @@ +--- /dev/null 2012-01-30 20:41:15.189616186 +0100 ++++ b/src/gcc/ada/s-taprop-gnu.adb 2012-04-11 19:17:52.000000000 +0200 +@@ -0,0 +1,1336 @@ ++------------------------------------------------------------------------------ ++-- -- ++-- GNAT RUN-TIME LIBRARY (GNARL) COMPONENTS -- ++-- -- ++-- S Y S T E M . T A S K _ P R I M I T I V E S . O P E R A T I O N S -- ++-- -- ++-- B o d y -- ++-- -- ++-- Copyright (C) 1992-2009, Free Software Foundation, Inc. -- ++-- -- ++-- GNARL is free software; you can redistribute it and/or modify it under -- ++-- terms of the GNU General Public License as published by the Free Soft- -- ++-- ware Foundation; either version 3, or (at your option) any later ver- -- ++-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- ++-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- ++-- or FITNESS FOR A PARTICULAR PURPOSE. -- ++-- -- ++-- As a special exception under Section 7 of GPL version 3, you are granted -- ++-- additional permissions described in the GCC Runtime Library Exception, -- ++-- version 3.1, as published by the Free Software Foundation. -- ++-- -- ++-- You should have received a copy of the GNU General Public License and -- ++-- a copy of the GCC Runtime Library Exception along with this program; -- ++-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- ++-- . -- ++-- -- ++-- GNARL was developed by the GNARL team at Florida State University. -- ++-- Extensive contributions were provided by Ada Core Technologies, Inc. -- ++-- -- ++------------------------------------------------------------------------------ ++ ++-- This is a GNU/Hurd version of this package ++-- Note: Removed the SCHED_FIFO and Ceiling Locking from the posix version ++-- since these functions are not (yet) supported on GNU/Hurd ++ ++-- This package contains all the GNULL primitives that interface directly with ++-- the underlying OS. ++ ++pragma Polling (Off); ++-- Turn off polling, we do not want ATC polling to take place during tasking ++-- operations. It causes infinite loops and other problems. ++ ++with Ada.Unchecked_Conversion; ++with Ada.Unchecked_Deallocation; ++ ++with Interfaces.C; ++ ++with System.Tasking.Debug; ++with System.Interrupt_Management; ++with System.OS_Primitives; ++with System.Task_Info; ++ ++with System.Soft_Links; ++-- We use System.Soft_Links instead of System.Tasking.Initialization ++-- because the later is a higher level package that we shouldn't depend on. ++-- For example when using the restricted run time, it is replaced by ++-- System.Tasking.Restricted.Stages. ++ ++package body System.Task_Primitives.Operations is ++ ++ package SSL renames System.Soft_Links; ++ ++ use System.Tasking.Debug; ++ use System.Tasking; ++ use Interfaces.C; ++ use System.OS_Interface; ++ use System.Parameters; ++ use System.OS_Primitives; ++ ++ ---------------- ++ -- Local Data -- ++ ---------------- ++ ++ -- The followings are logically constants, but need to be initialized ++ -- at run time. ++ ++ Single_RTS_Lock : aliased RTS_Lock; ++ -- This is a lock to allow only one thread of control in the RTS at ++ -- a time; it is used to execute in mutual exclusion from all other tasks. ++ -- Used mainly in Single_Lock mode, but also to protect All_Tasks_List ++ ++ ATCB_Key : aliased pthread_key_t; ++ -- Key used to find the Ada Task_Id associated with a thread ++ ++ Environment_Task_Id : Task_Id; ++ -- A variable to hold Task_Id for the environment task ++ ++ Unblocked_Signal_Mask : aliased sigset_t; ++ -- The set of signals that should unblocked in all tasks ++ ++ -- The followings are internal configuration constants needed ++ ++ Next_Serial_Number : Task_Serial_Number := 100; ++ -- We start at 100, to reserve some special values for ++ -- using in error checking. ++ ++ Foreign_Task_Elaborated : aliased Boolean := True; ++ -- Used to identified fake tasks (i.e., non-Ada Threads) ++ ++ Use_Alternate_Stack : constant Boolean := Alternate_Stack_Size /= 0; ++ -- Whether to use an alternate signal stack for stack overflows ++ ++ Abort_Handler_Installed : Boolean := False; ++ -- True if a handler for the abort signal is installed ++ ++ -------------------- ++ -- Local Packages -- ++ -------------------- ++ ++ package Specific is ++ ++ procedure Initialize (Environment_Task : Task_Id); ++ pragma Inline (Initialize); ++ -- Initialize various data needed by this package ++ ++ function Is_Valid_Task return Boolean; ++ pragma Inline (Is_Valid_Task); ++ -- Does executing thread have a TCB? ++ ++ procedure Set (Self_Id : Task_Id); ++ pragma Inline (Set); ++ -- Set the self id for the current task ++ ++ function Self return Task_Id; ++ pragma Inline (Self); ++ -- Return a pointer to the Ada Task Control Block of the calling task ++ ++ end Specific; ++ ++ package body Specific is separate; ++ -- The body of this package is target specific ++ ++ --------------------------------- ++ -- Support for foreign threads -- ++ --------------------------------- ++ ++ function Register_Foreign_Thread (Thread : Thread_Id) return Task_Id; ++ -- Allocate and Initialize a new ATCB for the current Thread ++ ++ function Register_Foreign_Thread ++ (Thread : Thread_Id) return Task_Id is separate; ++ ++ ----------------------- ++ -- Local Subprograms -- ++ ----------------------- ++ ++ procedure Abort_Handler (Sig : Signal); ++ -- Signal handler used to implement asynchronous abort. ++ -- See also comment before body, below. ++ ++ function To_Address is ++ new Ada.Unchecked_Conversion (Task_Id, System.Address); ++ ++ ------------------- ++ -- Abort_Handler -- ++ ------------------- ++ ++ -- Target-dependent binding of inter-thread Abort signal to the raising of ++ -- the Abort_Signal exception. ++ ++ -- The technical issues and alternatives here are essentially the ++ -- same as for raising exceptions in response to other signals ++ -- (e.g. Storage_Error). See code and comments in the package body ++ -- System.Interrupt_Management. ++ ++ -- Some implementations may not allow an exception to be propagated out of ++ -- a handler, and others might leave the signal or interrupt that invoked ++ -- this handler masked after the exceptional return to the application ++ -- code. ++ ++ -- GNAT exceptions are originally implemented using setjmp()/longjmp(). On ++ -- most UNIX systems, this will allow transfer out of a signal handler, ++ -- which is usually the only mechanism available for implementing ++ -- asynchronous handlers of this kind. However, some systems do not ++ -- restore the signal mask on longjmp(), leaving the abort signal masked. ++ ++ procedure Abort_Handler (Sig : Signal) is ++ pragma Unreferenced (Sig); ++ ++ T : constant Task_Id := Self; ++ Old_Set : aliased sigset_t; ++ ++ Result : Interfaces.C.int; ++ pragma Warnings (Off, Result); ++ ++ begin ++ -- It's not safe to raise an exception when using GCC ZCX mechanism. ++ -- Note that we still need to install a signal handler, since in some ++ -- cases (e.g. shutdown of the Server_Task in System.Interrupts) we ++ -- need to send the Abort signal to a task. ++ ++ if ZCX_By_Default and then GCC_ZCX_Support then ++ return; ++ end if; ++ ++ if T.Deferral_Level = 0 ++ and then T.Pending_ATC_Level < T.ATC_Nesting_Level and then ++ not T.Aborting ++ then ++ T.Aborting := True; ++ ++ -- Make sure signals used for RTS internal purpose are unmasked ++ ++ Result := pthread_sigmask (SIG_UNBLOCK, ++ Unblocked_Signal_Mask'Access, Old_Set'Access); ++ pragma Assert (Result = 0); ++ ++ raise Standard'Abort_Signal; ++ end if; ++ end Abort_Handler; ++ ++ ----------------- ++ -- Stack_Guard -- ++ ----------------- ++ ++ procedure Stack_Guard (T : ST.Task_Id; On : Boolean) is ++ Stack_Base : constant Address := Get_Stack_Base (T.Common.LL.Thread); ++ Guard_Page_Address : Address; ++ ++ Res : Interfaces.C.int; ++ ++ begin ++ if Stack_Base_Available then ++ ++ -- Compute the guard page address ++ ++ Guard_Page_Address := ++ Stack_Base - (Stack_Base mod Get_Page_Size) + Get_Page_Size; ++ ++ Res := ++ mprotect (Guard_Page_Address, Get_Page_Size, ++ prot => (if On then PROT_ON else PROT_OFF)); ++ pragma Assert (Res = 0); ++ end if; ++ end Stack_Guard; ++ ++ -------------------- ++ -- Get_Thread_Id -- ++ -------------------- ++ ++ function Get_Thread_Id (T : ST.Task_Id) return OSI.Thread_Id is ++ begin ++ return T.Common.LL.Thread; ++ end Get_Thread_Id; ++ ++ ---------- ++ -- Self -- ++ ---------- ++ ++ function Self return Task_Id renames Specific.Self; ++ ++ --------------------- ++ -- Initialize_Lock -- ++ --------------------- ++ ++ -- Note: mutexes and cond_variables needed per-task basis are ++ -- initialized in Initialize_TCB and the Storage_Error is ++ -- handled. Other mutexes (such as RTS_Lock, Memory_Lock...) ++ -- used in RTS is initialized before any status change of RTS. ++ -- Therefore raising Storage_Error in the following routines ++ -- should be able to be handled safely. ++ ++ procedure Initialize_Lock ++ (Prio : System.Any_Priority; ++ L : not null access Lock) ++ is ++ pragma Unreferenced (Prio); ++ ++ Attributes : aliased pthread_mutexattr_t; ++ Result : Interfaces.C.int; ++ ++ begin ++ Result := pthread_mutexattr_init (Attributes'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ raise Storage_Error with "Failed to allocate a lock"; ++ end if; ++ ++ Result := pthread_mutex_init (L, Attributes'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ Result := pthread_mutexattr_destroy (Attributes'Access); ++ raise Storage_Error; ++ end if; ++ ++ Result := pthread_mutexattr_destroy (Attributes'Access); ++ pragma Assert (Result = 0); ++ end Initialize_Lock; ++ ++ procedure Initialize_Lock ++ (L : not null access RTS_Lock; Level : Lock_Level) ++ is ++ pragma Unreferenced (Level); ++ ++ Attributes : aliased pthread_mutexattr_t; ++ Result : Interfaces.C.int; ++ ++ begin ++ Result := pthread_mutexattr_init (Attributes'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ raise Storage_Error with "Failed to allocate a lock"; ++ end if; ++ ++ Result := pthread_mutex_init (L, Attributes'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ Result := pthread_mutexattr_destroy (Attributes'Access); ++ raise Storage_Error; ++ end if; ++ ++ Result := pthread_mutexattr_destroy (Attributes'Access); ++ pragma Assert (Result = 0); ++ end Initialize_Lock; ++ ++ ------------------- ++ -- Finalize_Lock -- ++ ------------------- ++ ++ procedure Finalize_Lock (L : not null access Lock) is ++ Result : Interfaces.C.int; ++ begin ++ Result := pthread_mutex_destroy (L); ++ pragma Assert (Result = 0); ++ end Finalize_Lock; ++ ++ procedure Finalize_Lock (L : not null access RTS_Lock) is ++ Result : Interfaces.C.int; ++ begin ++ Result := pthread_mutex_destroy (L); ++ pragma Assert (Result = 0); ++ end Finalize_Lock; ++ ++ ---------------- ++ -- Write_Lock -- ++ ---------------- ++ ++ procedure Write_Lock ++ (L : not null access Lock; Ceiling_Violation : out Boolean) ++ is ++ Result : Interfaces.C.int; ++ ++ begin ++ Result := pthread_mutex_lock (L); ++ ++ -- Assume that the cause of EINVAL is a priority ceiling violation ++ ++ Ceiling_Violation := (Result = EINVAL); ++ pragma Assert (Result = 0 or else Result = EINVAL); ++ end Write_Lock; ++ ++ procedure Write_Lock ++ (L : not null access RTS_Lock; ++ Global_Lock : Boolean := False) ++ is ++ Result : Interfaces.C.int; ++ begin ++ if not Single_Lock or else Global_Lock then ++ Result := pthread_mutex_lock (L); ++ pragma Assert (Result = 0); ++ end if; ++ end Write_Lock; ++ ++ procedure Write_Lock (T : Task_Id) is ++ Result : Interfaces.C.int; ++ begin ++ if not Single_Lock then ++ Result := pthread_mutex_lock (T.Common.LL.L'Access); ++ pragma Assert (Result = 0); ++ end if; ++ end Write_Lock; ++ ++ --------------- ++ -- Read_Lock -- ++ --------------- ++ ++ procedure Read_Lock ++ (L : not null access Lock; Ceiling_Violation : out Boolean) is ++ begin ++ Write_Lock (L, Ceiling_Violation); ++ end Read_Lock; ++ ++ ------------ ++ -- Unlock -- ++ ------------ ++ ++ procedure Unlock (L : not null access Lock) is ++ Result : Interfaces.C.int; ++ begin ++ Result := pthread_mutex_unlock (L); ++ pragma Assert (Result = 0); ++ end Unlock; ++ ++ procedure Unlock ++ (L : not null access RTS_Lock; Global_Lock : Boolean := False) ++ is ++ Result : Interfaces.C.int; ++ begin ++ if not Single_Lock or else Global_Lock then ++ Result := pthread_mutex_unlock (L); ++ pragma Assert (Result = 0); ++ end if; ++ end Unlock; ++ ++ procedure Unlock (T : Task_Id) is ++ Result : Interfaces.C.int; ++ begin ++ if not Single_Lock then ++ Result := pthread_mutex_unlock (T.Common.LL.L'Access); ++ pragma Assert (Result = 0); ++ end if; ++ end Unlock; ++ ++ ----------------- ++ -- Set_Ceiling -- ++ ----------------- ++ ++ -- Dynamic priority ceilings are not supported by the underlying system ++ ++ procedure Set_Ceiling ++ (L : not null access Lock; ++ Prio : System.Any_Priority) ++ is ++ pragma Unreferenced (L, Prio); ++ begin ++ null; ++ end Set_Ceiling; ++ ++ ----------- ++ -- Sleep -- ++ ----------- ++ ++ procedure Sleep ++ (Self_ID : Task_Id; ++ Reason : System.Tasking.Task_States) ++ is ++ pragma Unreferenced (Reason); ++ ++ Result : Interfaces.C.int; ++ ++ begin ++ Result := ++ pthread_cond_wait ++ (cond => Self_ID.Common.LL.CV'Access, ++ mutex => (if Single_Lock ++ then Single_RTS_Lock'Access ++ else Self_ID.Common.LL.L'Access)); ++ ++ -- EINTR is not considered a failure ++ ++ pragma Assert (Result = 0 or else Result = EINTR); ++ end Sleep; ++ ++ ----------------- ++ -- Timed_Sleep -- ++ ----------------- ++ ++ -- This is for use within the run-time system, so abort is ++ -- assumed to be already deferred, and the caller should be ++ -- holding its own ATCB lock. ++ ++ procedure Timed_Sleep ++ (Self_ID : Task_Id; ++ Time : Duration; ++ Mode : ST.Delay_Modes; ++ Reason : Task_States; ++ Timedout : out Boolean; ++ Yielded : out Boolean) ++ is ++ pragma Unreferenced (Reason); ++ ++ Base_Time : constant Duration := Monotonic_Clock; ++ Check_Time : Duration := Base_Time; ++ Rel_Time : Duration; ++ Abs_Time : Duration; ++ Request : aliased timespec; ++ Result : Interfaces.C.int; ++ ++ begin ++ Timedout := True; ++ Yielded := False; ++ ++ if Mode = Relative then ++ Abs_Time := Duration'Min (Time, Max_Sensible_Delay) + Check_Time; ++ ++ if Relative_Timed_Wait then ++ Rel_Time := Duration'Min (Max_Sensible_Delay, Time); ++ end if; ++ ++ else ++ Abs_Time := Duration'Min (Check_Time + Max_Sensible_Delay, Time); ++ ++ if Relative_Timed_Wait then ++ Rel_Time := Duration'Min (Max_Sensible_Delay, Time - Check_Time); ++ end if; ++ end if; ++ ++ if Abs_Time > Check_Time then ++ Request := ++ To_Timespec (if Relative_Timed_Wait then Rel_Time else Abs_Time); ++ ++ loop ++ exit when Self_ID.Pending_ATC_Level < Self_ID.ATC_Nesting_Level; ++ ++ Result := ++ pthread_cond_timedwait ++ (cond => Self_ID.Common.LL.CV'Access, ++ mutex => (if Single_Lock ++ then Single_RTS_Lock'Access ++ else Self_ID.Common.LL.L'Access), ++ abstime => Request'Access); ++ ++ Check_Time := Monotonic_Clock; ++ exit when Abs_Time <= Check_Time or else Check_Time < Base_Time; ++ ++ if Result = 0 or Result = EINTR then ++ ++ -- Somebody may have called Wakeup for us ++ ++ Timedout := False; ++ exit; ++ end if; ++ ++ pragma Assert (Result = ETIMEDOUT); ++ end loop; ++ end if; ++ end Timed_Sleep; ++ ++ ----------------- ++ -- Timed_Delay -- ++ ----------------- ++ ++ -- This is for use in implementing delay statements, so we assume the ++ -- caller is abort-deferred but is holding no locks. ++ ++ procedure Timed_Delay ++ (Self_ID : Task_Id; ++ Time : Duration; ++ Mode : ST.Delay_Modes) ++ is ++ Base_Time : constant Duration := Monotonic_Clock; ++ Check_Time : Duration := Base_Time; ++ Abs_Time : Duration; ++ Rel_Time : Duration; ++ Request : aliased timespec; ++ ++ Result : Interfaces.C.int; ++ pragma Warnings (Off, Result); ++ ++ begin ++ if Single_Lock then ++ Lock_RTS; ++ end if; ++ ++ Write_Lock (Self_ID); ++ ++ if Mode = Relative then ++ Abs_Time := Duration'Min (Time, Max_Sensible_Delay) + Check_Time; ++ ++ if Relative_Timed_Wait then ++ Rel_Time := Duration'Min (Max_Sensible_Delay, Time); ++ end if; ++ ++ else ++ Abs_Time := Duration'Min (Check_Time + Max_Sensible_Delay, Time); ++ ++ if Relative_Timed_Wait then ++ Rel_Time := Duration'Min (Max_Sensible_Delay, Time - Check_Time); ++ end if; ++ end if; ++ ++ if Abs_Time > Check_Time then ++ Request := ++ To_Timespec (if Relative_Timed_Wait then Rel_Time else Abs_Time); ++ Self_ID.Common.State := Delay_Sleep; ++ ++ loop ++ exit when Self_ID.Pending_ATC_Level < Self_ID.ATC_Nesting_Level; ++ ++ Result := ++ pthread_cond_timedwait ++ (cond => Self_ID.Common.LL.CV'Access, ++ mutex => (if Single_Lock ++ then Single_RTS_Lock'Access ++ else Self_ID.Common.LL.L'Access), ++ abstime => Request'Access); ++ ++ Check_Time := Monotonic_Clock; ++ exit when Abs_Time <= Check_Time or else Check_Time < Base_Time; ++ ++ pragma Assert (Result = 0 ++ or else Result = ETIMEDOUT ++ or else Result = EINTR); ++ end loop; ++ ++ Self_ID.Common.State := Runnable; ++ end if; ++ ++ Unlock (Self_ID); ++ ++ if Single_Lock then ++ Unlock_RTS; ++ end if; ++ ++ Result := sched_yield; ++ end Timed_Delay; ++ ++ --------------------- ++ -- Monotonic_Clock -- ++ --------------------- ++ ++ function Monotonic_Clock return Duration is ++ TS : aliased timespec; ++ Result : Interfaces.C.int; ++ begin ++ Result := clock_gettime ++ (clock_id => CLOCK_REALTIME, tp => TS'Unchecked_Access); ++ pragma Assert (Result = 0); ++ return To_Duration (TS); ++ end Monotonic_Clock; ++ ++ ------------------- ++ -- RT_Resolution -- ++ ------------------- ++ ++ function RT_Resolution return Duration is ++ begin ++ return 10#1.0#E-6; ++ end RT_Resolution; ++ ++ ------------ ++ -- Wakeup -- ++ ------------ ++ ++ procedure Wakeup (T : Task_Id; Reason : System.Tasking.Task_States) is ++ pragma Unreferenced (Reason); ++ Result : Interfaces.C.int; ++ begin ++ Result := pthread_cond_signal (T.Common.LL.CV'Access); ++ pragma Assert (Result = 0); ++ end Wakeup; ++ ++ ----------- ++ -- Yield -- ++ ----------- ++ ++ procedure Yield (Do_Yield : Boolean := True) is ++ Result : Interfaces.C.int; ++ pragma Unreferenced (Result); ++ begin ++ if Do_Yield then ++ Result := sched_yield; ++ end if; ++ end Yield; ++ ++ ------------------ ++ -- Set_Priority -- ++ ------------------ ++ ++ procedure Set_Priority ++ (T : Task_Id; ++ Prio : System.Any_Priority; ++ Loss_Of_Inheritance : Boolean := False) ++ is ++ pragma Unreferenced (Loss_Of_Inheritance); ++ ++ begin ++ null; ++ end Set_Priority; ++ ++ ------------------ ++ -- Get_Priority -- ++ ------------------ ++ ++ function Get_Priority (T : Task_Id) return System.Any_Priority is ++ begin ++ return T.Common.Current_Priority; ++ end Get_Priority; ++ ++ ---------------- ++ -- Enter_Task -- ++ ---------------- ++ ++ procedure Enter_Task (Self_ID : Task_Id) is ++ begin ++ Self_ID.Common.LL.Thread := pthread_self; ++ Self_ID.Common.LL.LWP := lwp_self; ++ ++ Specific.Set (Self_ID); ++ ++ if Use_Alternate_Stack then ++ declare ++ Stack : aliased stack_t; ++ Result : Interfaces.C.int; ++ begin ++ Stack.ss_sp := Self_ID.Common.Task_Alternate_Stack; ++ Stack.ss_size := Alternate_Stack_Size; ++ Stack.ss_flags := 0; ++ Result := sigaltstack (Stack'Access, null); ++ pragma Assert (Result = 0); ++ end; ++ end if; ++ end Enter_Task; ++ ++ -------------- ++ -- New_ATCB -- ++ -------------- ++ ++ function New_ATCB (Entry_Num : Task_Entry_Index) return Task_Id is ++ begin ++ return new Ada_Task_Control_Block (Entry_Num); ++ end New_ATCB; ++ ++ ------------------- ++ -- Is_Valid_Task -- ++ ------------------- ++ ++ function Is_Valid_Task return Boolean renames Specific.Is_Valid_Task; ++ ++ ----------------------------- ++ -- Register_Foreign_Thread -- ++ ----------------------------- ++ ++ function Register_Foreign_Thread return Task_Id is ++ begin ++ if Is_Valid_Task then ++ return Self; ++ else ++ return Register_Foreign_Thread (pthread_self); ++ end if; ++ end Register_Foreign_Thread; ++ ++ -------------------- ++ -- Initialize_TCB -- ++ -------------------- ++ ++ procedure Initialize_TCB (Self_ID : Task_Id; Succeeded : out Boolean) is ++ Mutex_Attr : aliased pthread_mutexattr_t; ++ Result : Interfaces.C.int; ++ Cond_Attr : aliased pthread_condattr_t; ++ ++ begin ++ -- Give the task a unique serial number ++ ++ Self_ID.Serial_Number := Next_Serial_Number; ++ Next_Serial_Number := Next_Serial_Number + 1; ++ pragma Assert (Next_Serial_Number /= 0); ++ ++ if not Single_Lock then ++ Result := pthread_mutexattr_init (Mutex_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = 0 then ++ Result := ++ pthread_mutex_init ++ (Self_ID.Common.LL.L'Access, ++ Mutex_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ end if; ++ ++ if Result /= 0 then ++ Succeeded := False; ++ return; ++ end if; ++ ++ Result := pthread_mutexattr_destroy (Mutex_Attr'Access); ++ pragma Assert (Result = 0); ++ end if; ++ ++ Result := pthread_condattr_init (Cond_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = 0 then ++ Result := ++ pthread_cond_init ++ (Self_ID.Common.LL.CV'Access, Cond_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ end if; ++ ++ if Result = 0 then ++ Succeeded := True; ++ else ++ if not Single_Lock then ++ Result := pthread_mutex_destroy (Self_ID.Common.LL.L'Access); ++ pragma Assert (Result = 0); ++ end if; ++ ++ Succeeded := False; ++ end if; ++ ++ Result := pthread_condattr_destroy (Cond_Attr'Access); ++ pragma Assert (Result = 0); ++ end Initialize_TCB; ++ ++ ----------------- ++ -- Create_Task -- ++ ----------------- ++ ++ procedure Create_Task ++ (T : Task_Id; ++ Wrapper : System.Address; ++ Stack_Size : System.Parameters.Size_Type; ++ Priority : System.Any_Priority; ++ Succeeded : out Boolean) ++ is ++ Attributes : aliased pthread_attr_t; ++ Adjusted_Stack_Size : Interfaces.C.size_t; ++ Page_Size : constant Interfaces.C.size_t := Get_Page_Size; ++ Result : Interfaces.C.int; ++ ++ function Thread_Body_Access is new ++ Ada.Unchecked_Conversion (System.Address, Thread_Body); ++ ++ use System.Task_Info; ++ ++ begin ++ Adjusted_Stack_Size := ++ Interfaces.C.size_t (Stack_Size + Alternate_Stack_Size); ++ ++ if Stack_Base_Available then ++ ++ -- If Stack Checking is supported then allocate 2 additional pages: ++ ++ -- In the worst case, stack is allocated at something like ++ -- N * Get_Page_Size - epsilon, we need to add the size for 2 pages ++ -- to be sure the effective stack size is greater than what ++ -- has been asked. ++ ++ Adjusted_Stack_Size := Adjusted_Stack_Size + 2 * Page_Size; ++ end if; ++ ++ -- Round stack size as this is required by some OSes (Darwin) ++ ++ Adjusted_Stack_Size := Adjusted_Stack_Size + Page_Size - 1; ++ Adjusted_Stack_Size := ++ Adjusted_Stack_Size - Adjusted_Stack_Size mod Page_Size; ++ ++ Result := pthread_attr_init (Attributes'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result /= 0 then ++ Succeeded := False; ++ return; ++ end if; ++ ++ Result := ++ pthread_attr_setdetachstate ++ (Attributes'Access, PTHREAD_CREATE_DETACHED); ++ pragma Assert (Result = 0); ++ ++ Result := ++ pthread_attr_setstacksize ++ (Attributes'Access, Adjusted_Stack_Size); ++ pragma Assert (Result = 0); ++ ++ -- Since the initial signal mask of a thread is inherited from the ++ -- creator, and the Environment task has all its signals masked, we ++ -- do not need to manipulate caller's signal mask at this point. ++ -- All tasks in RTS will have All_Tasks_Mask initially. ++ ++ Result := pthread_create ++ (T.Common.LL.Thread'Access, ++ Attributes'Access, ++ Thread_Body_Access (Wrapper), ++ To_Address (T)); ++ pragma Assert (Result = 0 or else Result = EAGAIN); ++ ++ Succeeded := Result = 0; ++ ++ Result := pthread_attr_destroy (Attributes'Access); ++ pragma Assert (Result = 0); ++ ++ if Succeeded then ++ Set_Priority (T, Priority); ++ end if; ++ end Create_Task; ++ ++ ------------------ ++ -- Finalize_TCB -- ++ ------------------ ++ ++ procedure Finalize_TCB (T : Task_Id) is ++ Result : Interfaces.C.int; ++ Tmp : Task_Id := T; ++ Is_Self : constant Boolean := T = Self; ++ ++ procedure Free is new ++ Ada.Unchecked_Deallocation (Ada_Task_Control_Block, Task_Id); ++ ++ begin ++ if not Single_Lock then ++ Result := pthread_mutex_destroy (T.Common.LL.L'Access); ++ pragma Assert (Result = 0); ++ end if; ++ ++ Result := pthread_cond_destroy (T.Common.LL.CV'Access); ++ pragma Assert (Result = 0); ++ ++ if T.Known_Tasks_Index /= -1 then ++ Known_Tasks (T.Known_Tasks_Index) := null; ++ end if; ++ ++ Free (Tmp); ++ ++ if Is_Self then ++ Specific.Set (null); ++ end if; ++ end Finalize_TCB; ++ ++ --------------- ++ -- Exit_Task -- ++ --------------- ++ ++ procedure Exit_Task is ++ begin ++ -- Mark this task as unknown, so that if Self is called, it won't ++ -- return a dangling pointer. ++ ++ Specific.Set (null); ++ end Exit_Task; ++ ++ ---------------- ++ -- Abort_Task -- ++ ---------------- ++ ++ procedure Abort_Task (T : Task_Id) is ++ Result : Interfaces.C.int; ++ begin ++ if Abort_Handler_Installed then ++ Result := ++ pthread_kill ++ (T.Common.LL.Thread, ++ Signal (System.Interrupt_Management.Abort_Task_Interrupt)); ++ pragma Assert (Result = 0); ++ end if; ++ end Abort_Task; ++ ++ ---------------- ++ -- Initialize -- ++ ---------------- ++ ++ procedure Initialize (S : in out Suspension_Object) is ++ Mutex_Attr : aliased pthread_mutexattr_t; ++ Cond_Attr : aliased pthread_condattr_t; ++ Result : Interfaces.C.int; ++ ++ begin ++ -- Initialize internal state (always to False (RM D.10 (6))) ++ ++ S.State := False; ++ S.Waiting := False; ++ ++ -- Initialize internal mutex ++ ++ Result := pthread_mutexattr_init (Mutex_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ raise Storage_Error; ++ end if; ++ ++ Result := pthread_mutex_init (S.L'Access, Mutex_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ Result := pthread_mutexattr_destroy (Mutex_Attr'Access); ++ pragma Assert (Result = 0); ++ ++ raise Storage_Error; ++ end if; ++ ++ Result := pthread_mutexattr_destroy (Mutex_Attr'Access); ++ pragma Assert (Result = 0); ++ ++ -- Initialize internal condition variable ++ ++ Result := pthread_condattr_init (Cond_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result /= 0 then ++ Result := pthread_mutex_destroy (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ if Result = ENOMEM then ++ raise Storage_Error; ++ end if; ++ end if; ++ ++ Result := pthread_cond_init (S.CV'Access, Cond_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result /= 0 then ++ Result := pthread_mutex_destroy (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ if Result = ENOMEM then ++ Result := pthread_condattr_destroy (Cond_Attr'Access); ++ pragma Assert (Result = 0); ++ raise Storage_Error; ++ end if; ++ end if; ++ ++ Result := pthread_condattr_destroy (Cond_Attr'Access); ++ pragma Assert (Result = 0); ++ end Initialize; ++ ++ -------------- ++ -- Finalize -- ++ -------------- ++ ++ procedure Finalize (S : in out Suspension_Object) is ++ Result : Interfaces.C.int; ++ ++ begin ++ -- Destroy internal mutex ++ ++ Result := pthread_mutex_destroy (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ -- Destroy internal condition variable ++ ++ Result := pthread_cond_destroy (S.CV'Access); ++ pragma Assert (Result = 0); ++ end Finalize; ++ ++ ------------------- ++ -- Current_State -- ++ ------------------- ++ ++ function Current_State (S : Suspension_Object) return Boolean is ++ begin ++ -- We do not want to use lock on this read operation. State is marked ++ -- as Atomic so that we ensure that the value retrieved is correct. ++ ++ return S.State; ++ end Current_State; ++ ++ --------------- ++ -- Set_False -- ++ --------------- ++ ++ procedure Set_False (S : in out Suspension_Object) is ++ Result : Interfaces.C.int; ++ ++ begin ++ SSL.Abort_Defer.all; ++ ++ Result := pthread_mutex_lock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ S.State := False; ++ ++ Result := pthread_mutex_unlock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ SSL.Abort_Undefer.all; ++ end Set_False; ++ ++ -------------- ++ -- Set_True -- ++ -------------- ++ ++ procedure Set_True (S : in out Suspension_Object) is ++ Result : Interfaces.C.int; ++ ++ begin ++ SSL.Abort_Defer.all; ++ ++ Result := pthread_mutex_lock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ -- If there is already a task waiting on this suspension object then ++ -- we resume it, leaving the state of the suspension object to False, ++ -- as it is specified in (RM D.10(9)). Otherwise, it just leaves ++ -- the state to True. ++ ++ if S.Waiting then ++ S.Waiting := False; ++ S.State := False; ++ ++ Result := pthread_cond_signal (S.CV'Access); ++ pragma Assert (Result = 0); ++ ++ else ++ S.State := True; ++ end if; ++ ++ Result := pthread_mutex_unlock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ SSL.Abort_Undefer.all; ++ end Set_True; ++ ++ ------------------------ ++ -- Suspend_Until_True -- ++ ------------------------ ++ ++ procedure Suspend_Until_True (S : in out Suspension_Object) is ++ Result : Interfaces.C.int; ++ ++ begin ++ SSL.Abort_Defer.all; ++ ++ Result := pthread_mutex_lock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ if S.Waiting then ++ ++ -- Program_Error must be raised upon calling Suspend_Until_True ++ -- if another task is already waiting on that suspension object ++ -- (RM D.10(10)). ++ ++ Result := pthread_mutex_unlock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ SSL.Abort_Undefer.all; ++ ++ raise Program_Error; ++ ++ else ++ -- Suspend the task if the state is False. Otherwise, the task ++ -- continues its execution, and the state of the suspension object ++ -- is set to False (ARM D.10 par. 9). ++ ++ if S.State then ++ S.State := False; ++ else ++ S.Waiting := True; ++ ++ loop ++ -- Loop in case pthread_cond_wait returns earlier than expected ++ -- (e.g. in case of EINTR caused by a signal). ++ ++ Result := pthread_cond_wait (S.CV'Access, S.L'Access); ++ pragma Assert (Result = 0 or else Result = EINTR); ++ ++ exit when not S.Waiting; ++ end loop; ++ end if; ++ ++ Result := pthread_mutex_unlock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ SSL.Abort_Undefer.all; ++ end if; ++ end Suspend_Until_True; ++ ++ ---------------- ++ -- Check_Exit -- ++ ---------------- ++ ++ -- Dummy version ++ ++ function Check_Exit (Self_ID : ST.Task_Id) return Boolean is ++ pragma Unreferenced (Self_ID); ++ begin ++ return True; ++ end Check_Exit; ++ ++ -------------------- ++ -- Check_No_Locks -- ++ -------------------- ++ ++ function Check_No_Locks (Self_ID : ST.Task_Id) return Boolean is ++ pragma Unreferenced (Self_ID); ++ begin ++ return True; ++ end Check_No_Locks; ++ ++ ---------------------- ++ -- Environment_Task -- ++ ---------------------- ++ ++ function Environment_Task return Task_Id is ++ begin ++ return Environment_Task_Id; ++ end Environment_Task; ++ ++ -------------- ++ -- Lock_RTS -- ++ -------------- ++ ++ procedure Lock_RTS is ++ begin ++ Write_Lock (Single_RTS_Lock'Access, Global_Lock => True); ++ end Lock_RTS; ++ ++ ---------------- ++ -- Unlock_RTS -- ++ ---------------- ++ ++ procedure Unlock_RTS is ++ begin ++ Unlock (Single_RTS_Lock'Access, Global_Lock => True); ++ end Unlock_RTS; ++ ++ ------------------ ++ -- Suspend_Task -- ++ ------------------ ++ ++ function Suspend_Task ++ (T : ST.Task_Id; ++ Thread_Self : Thread_Id) return Boolean ++ is ++ pragma Unreferenced (T, Thread_Self); ++ begin ++ return False; ++ end Suspend_Task; ++ ++ ----------------- ++ -- Resume_Task -- ++ ----------------- ++ ++ function Resume_Task ++ (T : ST.Task_Id; ++ Thread_Self : Thread_Id) return Boolean ++ is ++ pragma Unreferenced (T, Thread_Self); ++ begin ++ return False; ++ end Resume_Task; ++ ++ -------------------- ++ -- Stop_All_Tasks -- ++ -------------------- ++ ++ procedure Stop_All_Tasks is ++ begin ++ null; ++ end Stop_All_Tasks; ++ ++ --------------- ++ -- Stop_Task -- ++ --------------- ++ ++ function Stop_Task (T : ST.Task_Id) return Boolean is ++ pragma Unreferenced (T); ++ begin ++ return False; ++ end Stop_Task; ++ ++ ------------------- ++ -- Continue_Task -- ++ ------------------- ++ ++ function Continue_Task (T : ST.Task_Id) return Boolean is ++ pragma Unreferenced (T); ++ begin ++ return False; ++ end Continue_Task; ++ ++ ---------------- ++ -- Initialize -- ++ ---------------- ++ ++ procedure Initialize (Environment_Task : Task_Id) is ++ act : aliased struct_sigaction; ++ old_act : aliased struct_sigaction; ++ Tmp_Set : aliased sigset_t; ++ Result : Interfaces.C.int; ++ ++ function State ++ (Int : System.Interrupt_Management.Interrupt_ID) return Character; ++ pragma Import (C, State, "__gnat_get_interrupt_state"); ++ -- Get interrupt state. Defined in a-init.c ++ -- The input argument is the interrupt number, ++ -- and the result is one of the following: ++ ++ Default : constant Character := 's'; ++ -- 'n' this interrupt not set by any Interrupt_State pragma ++ -- 'u' Interrupt_State pragma set state to User ++ -- 'r' Interrupt_State pragma set state to Runtime ++ -- 's' Interrupt_State pragma set state to System (use "default" ++ -- system handler) ++ ++ begin ++ Environment_Task_Id := Environment_Task; ++ ++ Interrupt_Management.Initialize; ++ ++ -- Prepare the set of signals that should unblocked in all tasks ++ ++ Result := sigemptyset (Unblocked_Signal_Mask'Access); ++ pragma Assert (Result = 0); ++ ++ for J in Interrupt_Management.Interrupt_ID loop ++ if System.Interrupt_Management.Keep_Unmasked (J) then ++ Result := sigaddset (Unblocked_Signal_Mask'Access, Signal (J)); ++ pragma Assert (Result = 0); ++ end if; ++ end loop; ++ ++ -- Initialize the lock used to synchronize chain of all ATCBs ++ ++ Initialize_Lock (Single_RTS_Lock'Access, RTS_Lock_Level); ++ ++ Specific.Initialize (Environment_Task); ++ ++ if Use_Alternate_Stack then ++ Environment_Task.Common.Task_Alternate_Stack := ++ Alternate_Stack'Address; ++ end if; ++ ++ -- Make environment task known here because it doesn't go through ++ -- Activate_Tasks, which does it for all other tasks. ++ ++ Known_Tasks (Known_Tasks'First) := Environment_Task; ++ Environment_Task.Known_Tasks_Index := Known_Tasks'First; ++ ++ Enter_Task (Environment_Task); ++ ++ if State ++ (System.Interrupt_Management.Abort_Task_Interrupt) /= Default ++ then ++ act.sa_flags := 0; ++ act.sa_handler := Abort_Handler'Address; ++ ++ Result := sigemptyset (Tmp_Set'Access); ++ pragma Assert (Result = 0); ++ act.sa_mask := Tmp_Set; ++ ++ Result := ++ sigaction ++ (Signal (System.Interrupt_Management.Abort_Task_Interrupt), ++ act'Unchecked_Access, ++ old_act'Unchecked_Access); ++ pragma Assert (Result = 0); ++ Abort_Handler_Installed := True; ++ end if; ++ end Initialize; ++ ++end System.Task_Primitives.Operations; --- gcc-4.8-4.8.5.orig/debian/patches/ada-sjlj.diff +++ gcc-4.8-4.8.5/debian/patches/ada-sjlj.diff @@ -0,0 +1,717 @@ +# DP: There are two exception mechanisms to choose from: zero-cost and +# DP: setjump/longjump. The Ada run-time library uses either of them +# DP: but not both. Build both versions of the run-time library. + +# This patch changes the way the upstream Makefiles build the run-time +# library. Before the patch: libada/Makefile calls gcc/ada/Makefile, +# which builds the "rts" subdirectory containing symbolic links to +# most source files, and modified copies of a few source files (to +# take target dependencies into account, and also to select the +# exception handling mechanism in system.ads). Then, gcc/ada/Makefile +# calls itself recursively but in the "rts" subdirectory and builds +# libgnat.a and libgnarl.a (and a couple other libraries: +# libgccprefix.a, libgmem.a). Upon return from this recursive call, +# it deletes the source and object files from "rts", reconstructs the +# source files, and builds libgnat.so and libgnarl.so by calling +# itself recursively a second time in the "rts" directory. + +# Furthermore, gcc/ada/Makefile disables parallel makes, so building +# the static and then shared versions of the RTS is entirely +# sequential even on SMP systems. + +# As a consequence of the above, building the SJLJ version of the +# library would overwrite the ZCX version. Thus it is necessary to +# manually save the previous version of the library before building the +# second one. + +# After the patch: libada/Makefile calls gcc/ada/Makefile, which +# builds the source directory (named gnatlib-sources instead of rts), +# containing the symbolic links and target-dependent files. + +# In a second step, libada/Makefile calls gcc/ada/Makefile again to +# build the targets gnatlib-shared-zcx, gnatlib-static-zcx and +# gnatlib-static-sjlj (we could also build gnatlib-shared-sjlj, but +# that triggers compiler errors on PowerPC). + +# Each of these three targets copies the source directory "rts" into a +# new directory named rts-shared-zcx, rts-static-zcx or +# rts-static-sjlj. In the new directory, they change the value of +# System.ZCX_By_Default, and then they call gcc/ada/Makefile +# recursively in the new directory to build the library. + +# gcc/ada/Makefile.in has a .NOTPARALLEL directive preventing it from +# launching commands in parallel. However, libada/Makefile has no +# such directive and can invoke up to three instances of +# gcc/ada/Makefile.in in parallel. This is okay because each of them +# runs in a different directory. + +# This patch also updates libgnat{vsn,prj}/Makefile and +# gnattools/Makefile to look for the shared ZCX version of the library +# in the appropriate directory, rather than just "rts", and updates +# the "make install" and binary targets as well. + +Index: b/src/libada/Makefile.in +=================================================================== +--- a/src/libada/Makefile.in ++++ b/src/libada/Makefile.in +@@ -16,7 +16,8 @@ + # . + + # Default target; must be first. +-all: gnatlib ++GNATLIB = gnatlib-static-zcx gnatlib-static-sjlj gnatlib-shared-zcx ++all: $(GNATLIB) + $(MULTIDO) $(AM_MAKEFLAGS) DO=all multi-do # $(MAKE) + + .PHONY: all +@@ -97,26 +98,28 @@ + "CFLAGS=$(CFLAGS)" + + # Rules to build gnatlib. +-.PHONY: gnatlib gnatlib-plain gnatlib-sjlj gnatlib-zcx gnatlib-shared osconstool +-gnatlib: @default_gnatlib_target@ ++.PHONY: $(GNATLIB) osconstool + +-gnatlib-plain: osconstool $(GCC_DIR)/ada/Makefile +- test -f stamp-libada || \ +- $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) gnatlib \ +- && touch stamp-libada +- -rm -rf adainclude +- -rm -rf adalib +- $(LN_S_RECURSIVE) $(ADA_RTS_DIR) adainclude +- $(LN_S_RECURSIVE) $(ADA_RTS_DIR) adalib +- +-gnatlib-sjlj gnatlib-zcx gnatlib-shared: osconstool $(GCC_DIR)/ada/Makefile +- test -f stamp-libada || \ +- $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) $@ \ +- && touch stamp-libada +- -rm -rf adainclude +- -rm -rf adalib +- $(LN_S_RECURSIVE) $(ADA_RTS_DIR) adainclude +- $(LN_S_RECURSIVE) $(ADA_RTS_DIR) adalib ++$(GCC_DIR)/ada/gnatlib-sources-sjlj/a-except.ads: ++ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) \ ++ EH_MECHANISM="" \ ++ gnatlib-sources-sjlj/a-except.ads ++ ++$(GCC_DIR)/ada/gnatlib-sources-zcx/a-except.ads: ++ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) \ ++ EH_MECHANISM="-gcc" \ ++ gnatlib-sources-zcx/a-except.ads ++ ++$(GNATLIB): osconstool $(GCC_DIR)/ada/Makefile \ ++$(GCC_DIR)/ada/gnatlib-sources-zcx/a-except.ads \ ++$(GCC_DIR)/ada/gnatlib-sources-sjlj/a-except.ads ++ $(MAKE) -C $(GCC_DIR)/ada $(FLAGS_TO_PASS) \ ++ GNATLIBFLAGS="$(GNATLIBFLAGS)" \ ++ GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ ++ TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \ ++ THREAD_KIND="$(THREAD_KIND)" \ ++ TRACE="$(TRACE)" \ ++ $@ + + osconstool: + $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) ./bldtools/oscons/xoscons +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -2353,84 +2353,109 @@ + $(patsubst %$(objext),%.adb,$(GNATRTL_OBJS)), \ + $(ADA_EXCLUDE_SRCS)) + +-../stamp-gnatlib-$(RTSDIR): +- @if [ ! -f stamp-gnatlib-$(RTSDIR) ] ; \ +- then \ +- $(ECHO) You must first build the GNAT library: make gnatlib; \ +- false; \ +- else \ +- true; \ +- fi ++libgnat = libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) ++libgnat-sjlj = libgnat$(hyphen)sjlj$(hyphen)$(LIBRARY_VERSION)$(soext) + +-install-gnatlib: ../stamp-gnatlib-$(RTSDIR) ++install-gnatlib: rts-static-zcx/libgnat$(arext) rts-static-sjlj/libgnat$(arext) ++install-gnatlib: rts-shared-zcx/$(libgnat) + # Create the directory before deleting it, in case the directory is + # a list of directories (as it may be on VMS). This ensures we are + # deleting the right one. +- -$(MKDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR) +- -$(MKDIR) $(DESTDIR)$(ADA_INCLUDE_DIR) +- $(RMDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR) +- $(RMDIR) $(DESTDIR)$(ADA_INCLUDE_DIR) +- -$(MKDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR) +- -$(MKDIR) $(DESTDIR)$(ADA_INCLUDE_DIR) +- for file in $(RTSDIR)/*.ali; do \ +- $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR) ++ ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR) ++ ++ for file in rts-shared-zcx/*.ali; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR); \ ++ done ++ for file in rts-static-sjlj/*.ali; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR); \ ++ done ++ ++ -cd rts-static-zcx; for file in *$(arext);do \ ++ $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR); \ ++ $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR)/$$file; \ + done +- -cd $(RTSDIR); for file in *$(arext);do \ +- $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ +- $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_RTL_OBJ_DIR)/$$file; \ ++ -cd rts-static-sjlj; for file in *$(arext);do \ ++ $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR); \ ++ $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR)/$$file; \ + done ++ ++ -$(foreach file, $(EXTRA_ADALIB_FILES), \ ++ $(INSTALL_DATA_DATE) rts-static-zcx/$(file) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) && \ ++ ) true + -$(foreach file, $(EXTRA_ADALIB_FILES), \ +- $(INSTALL_DATA_DATE) $(RTSDIR)/$(file) $(DESTDIR)$(ADA_RTL_OBJ_DIR) && \ ++ $(INSTALL_DATA_DATE) rts-static-sjlj/$(file) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) && \ + ) true + # Install the shared libraries, if any, using $(INSTALL) instead + # of $(INSTALL_DATA). The latter may force a mode inappropriate + # for shared libraries on some targets, e.g. on HP-UX where the x + # permission is required. +-# Also install the .dSYM directories if they exist (these directories +-# contain the debug information for the shared libraries on darwin) + for file in gnat gnarl; do \ +- if [ -f $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 ]; then \ +- $(INSTALL) $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ +- $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ +- fi; \ +- if [ -d $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM ]; then \ +- $(CP) -r $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM \ +- $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ ++ if [ -f rts-shared-zcx/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 ]; then \ ++ $(INSTALL) rts-shared-zcx/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR); \ + fi; \ + done + # This copy must be done preserving the date on the original file. +- for file in $(RTSDIR)/*.ad?; do \ +- $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_INCLUDE_DIR); \ ++ for file in rts-shared-zcx/*.adb rts-shared-zcx/*.ads; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR); \ + done +- cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.adb +- cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.ads ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR)/*.adb ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR)/*.ads ++ for file in rts-static-sjlj/*.adb rts-static-sjlj/*.ads; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR); \ ++ done ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR)/*.adb ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR)/*.ads ++ ++ (cd $(DESTDIR)$(libsubdir); \ ++ ln -s rts-native/adainclude adainclude; \ ++ ln -s rts-native/adalib adalib;) ++ ++replace_zcx_by_default=\ ++'s/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := $(zcx_by_default);/' ++ ++gnatlib-sources-zcx/a-except.ads: dir=$(dir $@) ++gnatlib-sources-zcx/a-except.ads: zcx_by_default=True ++ ++gnatlib-sources-sjlj/a-except.ads: dir=$(dir $@) ++gnatlib-sources-sjlj/a-except.ads: zcx_by_default=False + +-../stamp-gnatlib1-$(RTSDIR): Makefile +- $(RMDIR) $(RTSDIR) +- $(MKDIR) $(RTSDIR) +- $(CHMOD) u+w $(RTSDIR) ++gnatlib-sources-zcx/a-except.ads gnatlib-sources-sjlj/a-except.ads: ++ $(MKDIR) $(dir) ++ $(CHMOD) u+w $(dir) + # Copy target independent sources + $(foreach f,$(ADA_INCLUDE_SRCS) $(LIBGNAT_SRCS), \ +- $(LN_S) $(fsrcpfx)ada/$(f) $(RTSDIR) ;) true ++ $(LN_S) $(fsrcpfx)ada/$(f) $(dir) ;) true + # Remove files not used +- $(RM) $(patsubst %,$(RTSDIR)/%,$(ADA_EXCLUDE_FILES)) ++ $(RM) $(patsubst %,$(dir)/%,$(ADA_EXCLUDE_FILES)) + # Remove files to be replaced by target dependent sources + $(RM) $(foreach PAIR,$(LIBGNAT_TARGET_PAIRS), \ +- $(RTSDIR)/$(word 1,$(subst <, ,$(PAIR)))) +- for f in $(RTSDIR)/*-*-*.ads $(RTSDIR)/*-*-*.adb; do \ ++ $(dir)/$(word 1,$(subst <, ,$(PAIR)))) ++ for f in $(dir)/*-*-*.ads $(dir)/*-*-*.adb; do \ + case "$$f" in \ +- $(RTSDIR)/s-stratt-*) ;; \ ++ $(dir)/s-stratt-*) ;; \ + *) $(RM) $$f ;; \ + esac; \ + done + # Copy new target dependent sources + $(foreach PAIR,$(LIBGNAT_TARGET_PAIRS), \ + $(LN_S) $(fsrcpfx)ada/$(word 2,$(subst <, ,$(PAIR))) \ +- $(RTSDIR)/$(word 1,$(subst <, ,$(PAIR)));) ++ $(dir)/$(word 1,$(subst <, ,$(PAIR)));) ++ sed -e $(replace_zcx_by_default) $(dir)/system.ads > $(dir)/s.ads + # Copy tsystem.h +- $(CP) $(srcdir)/tsystem.h $(RTSDIR) +- $(RM) ../stamp-gnatlib-$(RTSDIR) +- touch ../stamp-gnatlib1-$(RTSDIR) ++ $(CP) $(srcdir)/tsystem.h $(dir) + + ifeq ($(strip $(filter-out alpha64 ia64 dec hp vms% openvms% alphavms%,$(subst -, ,$(host)))),) + OSCONS_CPP=../../$(DECC) -E /comment=as_is -DNATIVE \ +@@ -2457,9 +2482,11 @@ + $(CP) $^ ./bldtools/oscons + (cd ./bldtools/oscons ; gnatmake -q xoscons) + +-$(RTSDIR)/s-oscons.ads: ../stamp-gnatlib1-$(RTSDIR) s-oscons-tmplt.c gsocket.h ./bldtools/oscons/xoscons +- $(RM) $(RTSDIR)/s-oscons-tmplt.i $(RTSDIR)/s-oscons-tmplt.s +- (cd $(RTSDIR) ; \ ++.PRECIOUS: %/s-oscons.ads ++%/s-oscons.ads: dir = $(dir $@) ++%/s-oscons.ads: s-oscons-tmplt.c gsocket.h ./bldtools/oscons/xoscons ++ $(RM) $(dir)/s-oscons-tmplt.i $(dir)/s-oscons-tmplt.s ++ (cd $(dir) ; \ + $(OSCONS_CPP) ; \ + $(OSCONS_EXTRACT) ; \ + ../bldtools/oscons/xoscons s-oscons) +@@ -2470,9 +2497,12 @@ + # Example: cd $(RTSDIR); ar rc libfoo.a $(LONG_LIST_OF_OBJS) + # is guaranteed to overflow the buffer. + +-gnatlib: ../stamp-gnatlib1-$(RTSDIR) $(RTSDIR)/s-oscons.ads ++%/libgnat$(arext): build_dir = $(dir $@) ++%/libgnat$(arext): libgnarl = $(subst libgnat,libgnarl,$@) ++%/libgnat$(arext): libgnala = $(subst libgnat,libgnala,$@) ++%/libgnat$(arext): % %/s-oscons.ads + # C files +- $(MAKE) -C $(RTSDIR) \ ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + INCLUDES="$(INCLUDES_FOR_SUBDIR) -I./../.." \ +@@ -2481,7 +2511,7 @@ + srcdir=$(fsrcdir) \ + -f ../Makefile $(LIBGNAT_OBJS) + # Ada files +- $(MAKE) -C $(RTSDIR) \ ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + ADA_INCLUDES="" \ +@@ -2490,24 +2520,24 @@ + FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ + srcdir=$(fsrcdir) \ + -f ../Makefile $(GNATRTL_OBJS) +- $(RM) $(RTSDIR)/libgnat$(arext) $(RTSDIR)/libgnarl$(arext) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnat$(arext) \ +- $(addprefix $(RTSDIR)/,$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS)) +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgnat$(arext) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnarl$(arext) \ +- $(addprefix $(RTSDIR)/,$(GNATRTL_TASKING_OBJS)) +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgnarl$(arext) ++ $(RM) $@ $(libgnarl) ++ $(AR_FOR_TARGET) $(AR_FLAGS) $@ \ ++ $(addprefix $(build_dir),$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) g-trasym.o) ++ $(RANLIB_FOR_TARGET) $@ ++ $(AR_FOR_TARGET) $(AR_FLAGS) $(libgnarl) \ ++ $(addprefix $(build_dir),$(GNATRTL_TASKING_OBJS)) ++ $(RANLIB_FOR_TARGET) $(libgnarl) + ifeq ($(GMEM_LIB),gmemlib) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgmem$(arext) \ +- $(RTSDIR)/memtrack.o +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgmem$(arext) ++ $(AR_FOR_TARGET) $(AR_FLAGS) $(build_dir)libgmem$(arext) \ ++ $(build_dir)memtrack.o ++ $(RANLIB_FOR_TARGET) $(build_dir)libgmem$(arext) + endif +- $(CHMOD) a-wx $(RTSDIR)/*.ali +- touch ../stamp-gnatlib-$(RTSDIR) + + # Warning: this target assumes that LIBRARY_VERSION has been set correctly. +-gnatlib-shared-default: +- $(MAKE) -C $(RTSDIR) \ ++%/$(libgnat) %/$(libgnat-sjlj): build_dir = $(dir $@) ++%/$(libgnat) %/$(libgnat-sjlj): libgnarl = $(notdir $(subst libgnat,libgnarl,$@)) ++%/$(libgnat) %/$(libgnat-sjlj): % %/s-oscons.ads ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + INCLUDES="$(INCLUDES_FOR_SUBDIR) -I./../.." \ +@@ -2515,7 +2545,7 @@ + FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ + srcdir=$(fsrcdir) \ + -f ../Makefile $(LIBGNAT_OBJS) +- $(MAKE) -C $(RTSDIR) \ ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + ADA_INCLUDES="" \ +@@ -2525,176 +2555,46 @@ + srcdir=$(fsrcdir) \ + -f ../Makefile \ + $(GNATRTL_OBJS) +- $(RM) $(RTSDIR)/libgna*$(soext) $(RTSDIR)/libgna*$(soext).1 +- cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \ +- | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared $(GNATLIBCFLAGS) \ ++ $(RM) $(build_dir)/libgna*$(soext) $(build_dir)/libgna*$(soext).1 ++ cd $(build_dir); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ + $(PICFLAG_FOR_TARGET) \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ -o $(notdir $@).1 \ + $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ +- $(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ $(SO_OPTS)$(notdir $@).1 \ + $(MISCLIB) -lm +- cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \ +- | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared $(GNATLIBCFLAGS) \ ++ cd $(build_dir); $(LN_S) $(notdir $@).1 $(notdir $@) ++ cd $(build_dir); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ + $(PICFLAG_FOR_TARGET) \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ -o $(libgnarl).1 \ + $(GNATRTL_TASKING_OBJS) \ +- $(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ $(SO_OPTS)$(libgnarl).1 \ + $(THREADSLIB) +- cd $(RTSDIR); for lib in gnat gnarl; do \ +- l=lib$${lib}$(hyphen)$(LIBRARY_VERSION)$(soext); \ +- $(LN_S) $$l.1 $$l; \ +- done +-# Delete the object files, lest they be linked statically into the tools +-# executables. Only the .ali, .a and .so files must remain. +- rm -f $(RTSDIR)/*.o +- $(CHMOD) a-wx $(RTSDIR)/*.ali ++ cd $(build_dir); $(LN_S) $(libgnarl).1 $(libgnarl) + +-gnatlib-shared-dual: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib-shared-default ++gnatlib-shared-dual: gnatlib-static-zcx gnatlib-static-sjlj gnatlib-shared-zcx + +-gnatlib-shared-dual-win32: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib-shared-win32 +- +-# ??? we need to add the option to support auto-import of arrays/records to +-# the GNATLIBFLAGS when this will be supported by GNAT. At this point we will +-# use the gnatlib-shared-dual-win32 target to build the GNAT runtimes on +-# Windows. +-gnatlib-shared-win32: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(PICFLAG_FOR_TARGET)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/libgna*$(soext) +- cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \ +- | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared -shared-libgcc \ +- $(PICFLAG_FOR_TARGET) \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ +- $(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) $(MISCLIB) +- cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \ +- | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared -shared-libgcc \ +- $(PICFLAG_FOR_TARGET) \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_TASKING_OBJS) \ +- $(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(THREADSLIB) -Wl,libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) +- +-gnatlib-shared-darwin: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(PICFLAG_FOR_TARGET)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET) -fno-common" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/libgnat$(soext) $(RTSDIR)/libgnarl$(soext) +- cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \ +- | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -dynamiclib $(PICFLAG_FOR_TARGET) \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ +- $(SO_OPTS) \ +- -Wl,-install_name,@rpath/libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(MISCLIB) +- cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \ +- | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -dynamiclib $(PICFLAG_FOR_TARGET) \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_TASKING_OBJS) \ +- $(SO_OPTS) \ +- -Wl,-install_name,@rpath/libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(THREADSLIB) -Wl,libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) +- cd $(RTSDIR); $(LN_S) libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnat$(soext) +- cd $(RTSDIR); $(LN_S) libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnarl$(soext) +- cd $(RTSDIR); dsymutil libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) +- cd $(RTSDIR); dsymutil libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) +- +-gnatlib-shared-vms: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/libgna*$(soext) +- cd $(RTSDIR) && \ +- ../../gnatsym -s SYMVEC_$$$$.opt \ +- $(LIBGNAT_OBJS) $(GNATRTL_NONTASKING_OBJS) && \ +- ../../xgcc -g -B../../ -shared -shared-libgcc \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) libgnat.a \ +- sys\$$library:trace.exe \ +- --for-linker=/noinform \ +- --for-linker=SYMVEC_$$$$.opt \ +- --for-linker=gsmatch=equal,$(GSMATCH_VERSION) +- cd $(RTSDIR) && \ +- ../../gnatsym -s SYMVEC_$$$$.opt \ +- $(GNATRTL_TASKING_OBJS) && \ +- ../../xgcc -g -B../../ -shared -shared-libgcc \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnarl.a libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- sys\$$library:trace.exe \ +- --for-linker=/noinform \ +- --for-linker=SYMVEC_$$$$.opt \ +- --for-linker=gsmatch=equal,$(GSMATCH_VERSION) +- +-gnatlib-shared: ++gnatlib-shared-zcx: rts = $(subst gnatlib,rts,$@) ++gnatlib-shared-zcx: gnatlib-sources-zcx/a-except.ads ++ if [ ! -d $(rts) ] ; then \ ++ cp -a gnatlib-sources-zcx $(rts); \ ++ $(MV) $(rts)/s.ads $(rts)/system.ads; \ ++ fi + $(MAKE) $(FLAGS_TO_PASS) \ ++ EH_MECHANISM="-gcc" \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ + GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ + GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ + PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \ +- $(GNATLIB_SHARED) ++ $(rts)/$(libgnat) + +-# When building a SJLJ runtime for VxWorks, in addition to forcing +-# ZCX_By_default to False, we need to ensure that extra linker options +-# are not passed to prevent the inclusion of useless objects and +-# potential troubles from the presence of extra symbols and references +-# in some configurations. The inhibition is performed by commenting +-# the pragma instead of deleting the line, as the latter might result +-# in getting multiple blank lines, hence a style check error, as a +-# result. +-gnatlib-sjlj: +- $(MAKE) $(FLAGS_TO_PASS) EH_MECHANISM="" \ +- THREAD_KIND="$(THREAD_KIND)" ../stamp-gnatlib1-$(RTSDIR) +- sed -e 's/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := False;/' $(RTSDIR)/system.ads > $(RTSDIR)/s.ads +- sed -e 's/\(pragma Linker.*crtbe.*\)/-- \1/' $(RTSDIR)/s.ads > $(RTSDIR)/s2.ads +- $(RM) $(RTSDIR)/s.ads +- $(MV) $(RTSDIR)/s2.ads $(RTSDIR)/system.ads ++gnatlib-static-sjlj: rts = $(subst gnatlib,rts,$@) ++gnatlib-static-sjlj: gnatlib-sources-sjlj/a-except.ads ++ if [ ! -d $(rts) ] ; then \ ++ cp -a gnatlib-sources-sjlj $(rts); \ ++ $(MV) $(rts)/s.ads $(rts)/system.ads; \ ++ fi + $(MAKE) $(FLAGS_TO_PASS) \ + EH_MECHANISM="" \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +@@ -2703,13 +2603,15 @@ + FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ +- PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" gnatlib ++ PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \ ++ $(rts)/libgnat.a + +-gnatlib-zcx: +- $(MAKE) $(FLAGS_TO_PASS) EH_MECHANISM="-gcc" \ +- THREAD_KIND="$(THREAD_KIND)" ../stamp-gnatlib1-$(RTSDIR) +- sed -e 's/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := True;/' $(RTSDIR)/system.ads > $(RTSDIR)/s.ads +- $(MV) $(RTSDIR)/s.ads $(RTSDIR)/system.ads ++gnatlib-static-zcx: rts = $(subst gnatlib,rts,$@) ++gnatlib-static-zcx: gnatlib-sources-zcx/a-except.ads ++ if [ ! -d $(rts) ] ; then \ ++ cp -a gnatlib-sources-zcx $(rts); \ ++ $(MV) $(rts)/s.ads $(rts)/system.ads; \ ++ fi + $(MAKE) $(FLAGS_TO_PASS) \ + EH_MECHANISM="-gcc" \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +@@ -2718,10 +2620,15 @@ + FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ +- PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" gnatlib ++ PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \ ++ $(rts)/libgnat$(arext) + + ADA_INCLUDE_DIR = $(libsubdir)/adainclude + ADA_RTL_OBJ_DIR = $(libsubdir)/adalib ++ADA_NATIVE_INCLUDE_DIR = $(libsubdir)/rts-native/adainclude ++ADA_NATIVE_RTL_OBJ_DIR = $(libsubdir)/rts-native/adalib ++ADA_SJLJ_INCLUDE_DIR = $(libsubdir)/rts-sjlj/adainclude ++ADA_SJLJ_RTL_OBJ_DIR = $(libsubdir)/rts-sjlj/adalib + + # Special flags + +Index: b/src/gnattools/Makefile.in +=================================================================== +--- a/src/gnattools/Makefile.in ++++ b/src/gnattools/Makefile.in +@@ -36,15 +36,16 @@ + LN_S=@LN_S@ + target_noncanonical=@target_noncanonical@ + ++RTS=../gcc/ada/rts-shared-zcx + CFLAGS=-O2 -Wall + ADA_CFLAGS=-O2 -gnatn +-ADA_INCLUDES=-nostdinc -I- -I. -I../gcc/ada/rts -I../libgnatvsn -I../libgnatprj ++ADA_INCLUDES=-nostdinc -I- -I. -I$(RTS) -I../libgnatvsn -I../libgnatprj + LIB_VERSION=$(strip $(shell grep ' Library_Version :' \ + ../libgnatvsn/gnatvsn.ads | sed -e 's/.*"\(.*\)".*/\1/')) +-SHARED_ADA_LIBS := -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++SHARED_ADA_LIBS := -L$(RTS) -lgnat-$(LIB_VERSION) + SHARED_ADA_LIBS += -L../libgnatvsn -lgnatvsn + SHARED_ADA_LIBS += -L../libgnatprj -lgnatprj +-STATIC_ADA_LIBS := ../gcc/ada/rts/libgnat.a ++STATIC_ADA_LIBS := ../gcc/ada/rts-static-zcx/libgnat.a + STATIC_GCC_LIBS := ../gcc/libcommon-target.a ../gcc/libcommon.a ../libcpp/libcpp.a \ + ../libbacktrace/.libs/libbacktrace.a ../libiberty/libiberty.a + +@@ -118,6 +119,7 @@ + + .PHONY: gnattools gnattools-native gnattools-cross regnattools + gnattools: @default_gnattools_target@ ++ (cd $(RTS); if [ -d obj ]; then mv obj/* .; rmdir obj; fi) + + BODIES := $(foreach f,$(OBJECTS),$(wildcard $(patsubst %.o,@srcdir@/../gcc/ada/%.adb,$(f)))) + SPECS := $(foreach f,$(OBJECTS),$(wildcard $(patsubst %.o,@srcdir@/../gcc/ada/%.ads,$(f)))) +@@ -133,9 +135,12 @@ + rm -f $(word 1,$(subst <, ,$(PAIR)));\ + $(LN_S) @srcdir@/../gcc/ada/$(word 2,$(subst <, ,$(PAIR))) \ + $(word 1,$(subst <, ,$(PAIR)));) ++# Move the RTS object files away lest they be linked statically into the ++# tools. Only the .ali, .a and .so files must remain. ++ (cd $(RTS); mkdir obj; mv *.o obj; chmod a-wx *.ali) + touch $@ + +-gnattools-native: ../gcc/ada/rts/libgnat-$(LIB_VERSION).so ++gnattools-native: $(RTS)/libgnat-$(LIB_VERSION).so + gnattools-native: ../libgnatvsn/libgnatvsn.so + gnattools-native: stamp-gnattools-sources + gnattools-native: $(TOOLS) +@@ -151,7 +156,7 @@ + $(GCC) -o $@ $^ \ + ../libgnatprj/libgnatprj.a \ + ../libgnatvsn/libgnatvsn.a \ +- ../gcc/ada/rts/libgnat.a $(STATIC_GCC_LIBS) ++ $(STATIC_ADA_LIBS) $(STATIC_GCC_LIBS) + + gnatlink: $(GNATLINK_OBJS) b_gnatl.o + $(GCC) -o $@ $^ $(SHARED_ADA_LIBS) $(STATIC_GCC_LIBS) +Index: b/src/libgnatprj/Makefile.in +=================================================================== +--- a/src/libgnatprj/Makefile.in ++++ b/src/libgnatprj/Makefile.in +@@ -26,7 +26,8 @@ + sed -e 's/.*"\(.*\)".*/\1/')) + GCC:=../gcc/xgcc -B../gcc/ + GPP := ../gcc/xg++ -B../gcc/ +-LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++RTS:=../gcc/ada/rts-shared-zcx ++LIBGNAT_JUST_BUILT := -nostdinc -I$(RTS) + LIBGNATVSN := -I../libgnatvsn + CFLAGS := -g -O2 + ADAFLAGS := -g -O2 -gnatn +@@ -76,7 +77,7 @@ + : # Make libgnatprj.so + $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ -Wl,--no-allow-shlib-undefined \ + $^ $(addprefix ../libiberty/pic/,$(LIBIBERTY_OBJECTS)) \ +- -L../gcc/ada/rts -lgnat-$(LIB_VERSION) \ ++ -L$(RTS) -lgnat-$(LIB_VERSION) \ + -L../libgnatvsn -lgnatvsn + $(LN_S) -f libgnatprj.so.$(LIB_VERSION) libgnatprj.so + chmod a=r obj-shared/*.ali +Index: b/src/libgnatvsn/Makefile.in +=================================================================== +--- a/src/libgnatvsn/Makefile.in ++++ b/src/libgnatvsn/Makefile.in +@@ -25,7 +25,8 @@ + @srcdir@/../gcc/ada/gnatvsn.ads | \ + sed -e 's/.*"\(.*\)".*/\1/')) + GCC:=../gcc/xgcc -B../gcc/ +-LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++RTS:=../gcc/ada/rts-shared-zcx ++LIBGNAT_JUST_BUILT := -nostdinc -I$(RTS) + CFLAGS := -g -O2 -gnatn + BASEVER := $(shell cat @srcdir@/../gcc/BASE-VER) + DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE) +@@ -66,7 +67,7 @@ + libgnatvsn.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) + : # Make libgnatvsn.so + $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \ +- -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++ -L$(RTS) -lgnat-$(LIB_VERSION) + ln -s libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so + chmod a=r obj-shared/*.ali + # Make the .ali files, but not the .o files, visible to the gnat tools. +Index: b/src/gcc/ada/gcc-interface/Make-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Make-lang.in ++++ b/src/gcc/ada/gcc-interface/Make-lang.in +@@ -85,7 +85,8 @@ + "ADA_FOR_TARGET=$(ADA_FOR_TARGET)" \ + "INSTALL=$(INSTALL)" \ + "INSTALL_DATA=$(INSTALL_DATA)" \ +- "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" ++ "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" \ ++ "GCC_FOR_TARGET=$(GCC_FOR_TARGET)" + + # List of Ada tools to build and install + ADA_TOOLS=gnatbind gnatchop gnat gnatkr gnatlink gnatls gnatmake \ --- gcc-4.8-4.8.5.orig/debian/patches/ada-symbolic-tracebacks.diff +++ gcc-4.8-4.8.5/debian/patches/ada-symbolic-tracebacks.diff @@ -0,0 +1,396 @@ +# DP: - Enable support for symbolic tracebacks in exceptions (delete the dummy +# DP: convert_addresses from adaint.c, and provide a real one separately.) + +Ported Jürgen Pfeifer's patch to enable symbolic tracebacks on Debian +GNU/Linux. + +The binary distribution of GNAT 3.15p comes with an old version of +binutils that includes a library, libaddr2line.a. This library does +not exist in recent versions of binutils. The patch works around this +by calling /usr/bin/addr2line (still part of binutils) and parsing the +output. See debian/convert_addresses.c for the gory details. + +I have modified convert_addresses.c to not use a shell script anymore; +Debian controls the version of binutils which is installed. Also, I +use execve instead of execle. + +-- +Ludovic Brenta. + +# ' make emacs highlighting happy + +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -273,7 +273,8 @@ + # Both . and srcdir are used, in that order, + # so that tm.h and config.h will be found in the compilation + # subdirectory rather than in the source directory. +-INCLUDES = -I- -I. -I.. -I$(srcdir)/ada -I$(srcdir) -I$(srcdir)/../include $(GMPINC) ++INCLUDES = -iquote . -iquote .. -iquote $(srcdir)/ada -iquote$(srcdir) \ ++ -iquote $(srcdir)/../include $(GMPINC) + + ADA_INCLUDES = -I- -I. -I$(srcdir)/ada + +@@ -2317,7 +2318,7 @@ + # library. LIBGNAT_OBJS is the list of object files for libgnat. + # thread.c is special as put into GNATRTL_TASKING_OBJS by Makefile.rtl + LIBGNAT_OBJS = adadecode.o adaint.o argv.o aux-io.o \ +- cal.o cio.o cstreams.o ctrl_c.o \ ++ cal.o cio.o convert_addresses.o cstreams.o ctrl_c.o \ + env.o errno.o exit.o expect.o final.o \ + init.o initialize.o locales.o mkdir.o \ + raise.o seh_init.o socket.o sysdep.o \ +@@ -2996,6 +2997,7 @@ + socket.o : socket.c gsocket.h + sysdep.o : sysdep.c + raise.o : raise.c raise.h ++convert_addresses.o : convert_addresses.c + sigtramp-ppcvxw.o : sigtramp-ppcvxw.c sigtramp.h + terminals.o : terminals.c + vx_stack_info.o : vx_stack_info.c +Index: b/src/gcc/ada/adaint.c +=================================================================== +--- a/src/gcc/ada/adaint.c ++++ b/src/gcc/ada/adaint.c +@@ -3508,35 +3508,6 @@ + } + #endif + +-#if defined (IS_CROSS) \ +- || (! ((defined (sparc) || defined (i386)) && defined (sun) \ +- && defined (__SVR4)) \ +- && ! (defined (linux) && (defined (i386) || defined (__x86_64__))) \ +- && ! (defined (linux) && defined (__ia64__)) \ +- && ! (defined (linux) && defined (powerpc)) \ +- && ! defined (__FreeBSD__) \ +- && ! defined (__Lynx__) \ +- && ! defined (__hpux__) \ +- && ! defined (__APPLE__) \ +- && ! defined (_AIX) \ +- && ! defined (VMS) \ +- && ! defined (__MINGW32__)) +- +-/* Dummy function to satisfy g-trasym.o. See the preprocessor conditional +- just above for a list of native platforms that provide a non-dummy +- version of this procedure in libaddr2line.a. */ +- +-void +-convert_addresses (const char *file_name ATTRIBUTE_UNUSED, +- void *addrs ATTRIBUTE_UNUSED, +- int n_addr ATTRIBUTE_UNUSED, +- void *buf ATTRIBUTE_UNUSED, +- int *len ATTRIBUTE_UNUSED) +-{ +- *len = 0; +-} +-#endif +- + #if defined (_WIN32) + int __gnat_argument_needs_quote = 1; + #else +Index: b/src/gcc/ada/convert_addresses.c +=================================================================== +--- /dev/null ++++ b/src/gcc/ada/convert_addresses.c +@@ -0,0 +1,154 @@ ++/* ++ Copyright (C) 1999 by Juergen Pfeifer ++ Ada for Linux Team (ALT) ++ ++ Permission is hereby granted, free of charge, to any person obtaining a ++ copy of this software and associated documentation files (the ++ "Software"), to deal in the Software without restriction, including ++ without limitation the rights to use, copy, modify, merge, publish, ++ distribute, distribute with modifications, sublicense, and/or sell ++ copies of the Software, and to permit persons to whom the Software is ++ furnished to do so, subject to the following conditions: ++ ++ The above copyright notice and this permission notice shall be included ++ in all copies or substantial portions of the Software. ++ ++ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS ++ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. ++ IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, ++ DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR ++ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR ++ THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ ++ Except as contained in this notice, the name(s) of the above copyright ++ holders shall not be used in advertising or otherwise to promote the ++ sale, use or other dealings in this Software without prior written ++ authorization. ++*/ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define STDIN_FILENO 0 ++#define STDOUT_FILENO 1 ++#define MAX_LINE 1024 ++ ++#define CLOSE1 close(fd1[0]); close(fd1[1]) ++#define CLOSE2 close(fd2[0]); close(fd2[1]) ++#define RESTSIG sigaction(SIGPIPE,&oact,NULL) ++ ++void convert_addresses ++(const char *file_name, ++ void* addrs[], ++ int n_addr, ++ char* buf, ++ int* len) ++{ ++ int max_len = *len; ++ pid_t pid = getpid(); ++ pid_t child; ++ ++ struct sigaction act, oact; ++ ++ int fd1[2], fd2[2]; ++ ++ *buf = 0; *len = 0; ++ act.sa_handler = SIG_IGN; ++ sigemptyset(&act.sa_mask); ++ act.sa_flags = 0; ++ if (sigaction(SIGPIPE,&act,&oact) < 0) ++ return; ++ ++ if (pipe(fd1) >= 0) { ++ if (pipe(fd2)>=0) { ++ if ((child = fork()) < 0) { ++ CLOSE1; CLOSE2; RESTSIG; ++ return; ++ } ++ else { ++ if (0==child) { ++ close(fd1[1]); ++ close(fd2[0]); ++ if (fd1[0] != STDIN_FILENO) { ++ if (dup2(fd1[0],STDIN_FILENO) != STDIN_FILENO) { ++ CLOSE1; CLOSE2; ++ } ++ close(fd1[0]); ++ } ++ if (fd2[1] != STDOUT_FILENO) { ++ if (dup2(fd2[1],STDOUT_FILENO) != STDOUT_FILENO) { ++ CLOSE1; CLOSE2; ++ } ++ close(fd2[1]); ++ } ++ { ++ /* As pointed out by Florian Weimer to me, it is a ++ security threat to call the script with a user defined ++ environment and using the path. That would be Trojans ++ pleasure. Therefore we use the absolute path to ++ addr2line and an empty environment. That should be ++ safe. ++ */ ++ char *const argv[] = { "addr2line", ++ "-e", ++ file_name, ++ "--demangle=gnat", ++ "--functions", ++ "--basenames", ++ NULL }; ++ char *const envp[] = { NULL }; ++ if (execve("/usr/bin/addr2line", argv, envp) < 0) { ++ CLOSE1; CLOSE2; ++ } ++ } ++ } ++ else { ++ int i, n; ++ char hex[16]; ++ char line[MAX_LINE + 1]; ++ char *p; ++ char *s = buf; ++ ++ /* Parent context */ ++ close(fd1[0]); ++ close(fd2[1]); ++ ++ for(i=0; i < n_addr; i++) { ++ snprintf(hex,sizeof(hex),"%p\n",addrs[i]); ++ write(fd1[1],hex,strlen(hex)); ++ n = read(fd2[0],line,MAX_LINE); ++ if (n<=0) ++ break; ++ line[n]=0; ++ /* We have approx. 16 additional chars for "%p in " clause. ++ We use this info to prevent a buffer overrun. ++ */ ++ if (n + 16 + (*len) > max_len) ++ break; ++ p = strchr(line,'\n'); ++ if (p) { ++ if (*(p+1)) { ++ *p = 0; ++ *len += snprintf(s, (max_len - (*len)), "%p in %s at %s",addrs[i], line, p+1); ++ } ++ else { ++ *len += snprintf(s, (max_len - (*len)), "%p at %s",addrs[i], line); ++ } ++ s = buf + (*len); ++ } ++ } ++ close(fd1[1]); ++ close(fd2[0]); ++ } ++ } ++ } ++ else { ++ CLOSE1; ++ } ++ } ++ RESTSIG; ++} +Index: b/src/gcc/ada/g-trasym.adb +=================================================================== +--- a/src/gcc/ada/g-trasym.adb ++++ b/src/gcc/ada/g-trasym.adb +@@ -33,40 +33,110 @@ + -- is not supported. It returns tracebacks as lists of LF separated strings of + -- the form "0x..." corresponding to the addresses. + ++with System.Soft_Links; + with Ada.Exceptions.Traceback; use Ada.Exceptions.Traceback; +-with System.Address_Image; + + package body GNAT.Traceback.Symbolic is + ++ package TSL renames System.Soft_Links; ++ ++ -- To perform the raw addresses to symbolic form translation we rely on a ++ -- libaddr2line symbolizer which examines debug info from a provided ++ -- executable file name, and an absolute path is needed to ensure the file ++ -- is always found. This is "__gnat_locate_exec_on_path (gnat_argv [0])" ++ -- for our executable file, a fairly heavy operation so we cache the ++ -- result. ++ ++ Exename : System.Address; ++ -- Pointer to the name of the executable file to be used on all ++ -- invocations of the libaddr2line symbolization service. ++ ++ Exename_Resolved : Boolean := False; ++ -- Flag to indicate whether we have performed the executable file name ++ -- resolution already. Relying on a not null Exename for this purpose ++ -- would be potentially inefficient as this is what we will get if the ++ -- resolution attempt fails. ++ + ------------------------ + -- Symbolic_Traceback -- + ------------------------ + + function Symbolic_Traceback (Traceback : Tracebacks_Array) return String is ++ ++ procedure convert_addresses ++ (filename : System.Address; ++ addrs : System.Address; ++ n_addrs : Integer; ++ buf : System.Address; ++ len : System.Address); ++ pragma Import (C, convert_addresses, "convert_addresses"); ++ -- This is the procedure version of the Ada-aware addr2line. It places ++ -- in BUF a string representing the symbolic translation of the N_ADDRS ++ -- raw addresses provided in ADDRS, looked up in debug information from ++ -- FILENAME. LEN points to an integer which contains the size of the ++ -- BUF buffer at input and the result length at output. ++ -- ++ -- Note that this procedure is *not* thread-safe. ++ ++ type Argv_Array is array (0 .. 0) of System.Address; ++ gnat_argv : access Argv_Array; ++ pragma Import (C, gnat_argv, "gnat_argv"); ++ ++ function locate_exec_on_path ++ (c_exename : System.Address) return System.Address; ++ pragma Import (C, locate_exec_on_path, "__gnat_locate_exec_on_path"); ++ ++ B_Size : constant Integer := 256 * Traceback'Length; ++ Len : Integer := B_Size; ++ Res : String (1 .. B_Size); ++ ++ use type System.Address; ++ + begin ++ -- The symbolic translation of an empty set of addresses is an empty ++ -- string. ++ + if Traceback'Length = 0 then + return ""; ++ end if; + +- else +- declare +- Img : String := System.Address_Image (Traceback (Traceback'First)); ++ -- If our input set of raw addresses is not empty, resort to the ++ -- libaddr2line service to symbolize it all. + +- Result : String (1 .. (Img'Length + 3) * Traceback'Length); +- Last : Natural := 0; ++ -- Compute, cache and provide the absolute path to our executable file ++ -- name as the binary file where the relevant debug information is to be ++ -- found. If the executable file name resolution fails, we have no ++ -- sensible basis to invoke the symbolizer at all. ++ ++ -- Protect all this against concurrent accesses explicitly, as the ++ -- underlying services are potentially thread unsafe. ++ ++ TSL.Lock_Task.all; ++ ++ if not Exename_Resolved then ++ Exename := locate_exec_on_path (gnat_argv (0)); ++ Exename_Resolved := True; ++ end if; ++ ++ if Exename /= System.Null_Address then ++ Len := Res'Length; ++ convert_addresses ++ (Exename, Traceback'Address, Traceback'Length, ++ Res (1)'Address, Len'Address); ++ end if; ++ ++ TSL.Unlock_Task.all; + +- begin +- for J in Traceback'Range loop +- Img := System.Address_Image (Traceback (J)); +- Result (Last + 1 .. Last + 2) := "0x"; +- Last := Last + 2; +- Result (Last + 1 .. Last + Img'Length) := Img; +- Last := Last + Img'Length + 1; +- Result (Last) := ASCII.LF; +- end loop; ++ -- Return what the addr2line symbolizer has produced if we have called ++ -- it (the executable name resolution succeeded), or an empty string ++ -- otherwise. + +- return Result (1 .. Last); +- end; ++ if Exename /= System.Null_Address then ++ return Res (1 .. Len); ++ else ++ return ""; + end if; ++ + end Symbolic_Traceback; + + function Symbolic_Traceback (E : Exception_Occurrence) return String is +Index: b/src/gcc/ada/tracebak.c +=================================================================== +--- a/src/gcc/ada/tracebak.c ++++ b/src/gcc/ada/tracebak.c +@@ -425,7 +425,7 @@ + /* Starting with GCC 4.6, -fomit-frame-pointer is turned on by default for + 32-bit x86/Linux as well and DWARF 2 unwind tables are emitted instead. + See the x86-64 case below for the drawbacks with this approach. */ +-#if defined (linux) && (__GNUC__ * 10 + __GNUC_MINOR__ > 45) ++#if (defined (linux) || defined(__GNU__)) && (__GNUC__ * 10 + __GNUC_MINOR__ > 45) + #define USE_GCC_UNWINDER + #else + #define USE_GENERIC_UNWINDER --- gcc-4.8-4.8.5.orig/debian/patches/alpha-ieee-doc.diff +++ gcc-4.8-4.8.5/debian/patches/alpha-ieee-doc.diff @@ -0,0 +1,24 @@ +# DP: #212912 +# DP: on alpha-linux, make -mieee default and add -mieee-disable switch +# DP: to turn default off (doc patch) + +--- + gcc/doc/invoke.texi | 7 +++++++ + 1 files changed, 7 insertions(+), 0 deletions(-) + +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -9980,6 +9980,13 @@ able to correctly support denormalized numbers and exceptional IEEE + values such as not-a-number and plus/minus infinity. Other Alpha + compilers call this option @option{-ieee_with_no_inexact}. + ++DEBIAN SPECIFIC: This option is on by default for alpha-linux-gnu, unless ++@option{-ffinite-math-only} (which is part of the @option{-ffast-math} ++set) is specified, because the software functions in the GNU libc math ++libraries generate denormalized numbers, NaNs, and infs (all of which ++will cause a programs to SIGFPE when it attempts to use the results without ++@option{-mieee}). ++ + @item -mieee-with-inexact + @opindex mieee-with-inexact + This is like @option{-mieee} except the generated code also maintains --- gcc-4.8-4.8.5.orig/debian/patches/alpha-ieee.diff +++ gcc-4.8-4.8.5/debian/patches/alpha-ieee.diff @@ -0,0 +1,21 @@ +# DP: #212912 +# DP: on alpha-linux, make -mieee default and add -mieee-disable switch +# DP: to turn default off + +--- + gcc/config/alpha/alpha.c | 4 ++++ + 1 files changed, 4 insertions(+), 0 deletions(-) + +--- a/src/gcc/config/alpha/alpha.c ++++ b/src/gcc/config/alpha/alpha.c +@@ -259,6 +259,10 @@ + int line_size = 0, l1_size = 0, l2_size = 0; + int i; + ++ /* If not -ffinite-math-only, enable -mieee*/ ++ if (!flag_finite_math_only) ++ target_flags |= MASK_IEEE|MASK_IEEE_CONFORMANT; ++ + #ifdef SUBTARGET_OVERRIDE_OPTIONS + SUBTARGET_OVERRIDE_OPTIONS; + #endif --- gcc-4.8-4.8.5.orig/debian/patches/alpha-no-ev4-directive.diff +++ gcc-4.8-4.8.5/debian/patches/alpha-no-ev4-directive.diff @@ -0,0 +1,32 @@ +# DP: never emit .ev4 directive. + +--- + gcc/config/alpha/alpha.c | 7 +++---- + 1 files changed, 3 insertions(+), 4 deletions(-) + +Index: b/src/gcc/config/alpha/alpha.c +=================================================================== +--- a/src/gcc/config/alpha/alpha.c ++++ b/src/gcc/config/alpha/alpha.c +@@ -9366,7 +9366,7 @@ alpha_file_start (void) + fputs ("\t.set nomacro\n", asm_out_file); + if (TARGET_SUPPORT_ARCH | TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) + { +- const char *arch; ++ const char *arch = NULL; + + if (alpha_cpu == PROCESSOR_EV6 || TARGET_FIX || TARGET_CIX) + arch = "ev6"; +@@ -9376,10 +9376,9 @@ alpha_file_start (void) + arch = "ev56"; + else if (alpha_cpu == PROCESSOR_EV5) + arch = "ev5"; +- else +- arch = "ev4"; + +- fprintf (asm_out_file, "\t.arch %s\n", arch); ++ if (arch) ++ fprintf (asm_out_file, "\t.arch %s\n", arch); + } + } + --- gcc-4.8-4.8.5.orig/debian/patches/aotcompile.diff +++ gcc-4.8-4.8.5/debian/patches/aotcompile.diff @@ -0,0 +1,51 @@ +--- ./build/aot/aotcompile.py.orig 2010-04-08 13:38:27.621086079 +0000 ++++ ./build/aot/aotcompile.py 2010-04-08 14:22:55.102335973 +0000 +@@ -31,12 +31,25 @@ + "dbtool": "/usr/lib/gcc-snapshot/bin/gcj-dbtool"} + + MAKEFLAGS = [] +-GCJFLAGS = ["-fPIC", "-findirect-dispatch", "-fjni"] ++GCJFLAGS = ["-O2 -fPIC", "-findirect-dispatch", "-fjni"] + LDFLAGS = ["-Wl,-Bsymbolic"] + + MAX_CLASSES_PER_JAR = 1024 + MAX_BYTES_PER_JAR = 1048576 + ++try: ++ for line in file('/proc/meminfo'): ++ if line.startswith('MemTotal:'): ++ memtotal = int(line.split()[1]) ++ if memtotal < 270000: ++ MAX_CLASSES_PER_JAR = 512 ++ MAX_BYTES_PER_JAR = 524288 ++ if memtotal < 140000: ++ MAX_CLASSES_PER_JAR = 256 ++ MAX_BYTES_PER_JAR = 262144 ++except: ++ pass ++ + MAKEFILE = "Makefile" + + MAKEFILE_HEADER = '''\ +@@ -49,7 +62,7 @@ + $(GCJ) -c $(GCJFLAGS) $< -o $@ + + TARGETS = \\ +-%(targets)s ++javac ecj1 + + all: $(TARGETS)''' + +@@ -63,6 +76,12 @@ + %(dso)s: $(%(base)s_OBJECTS) + $(GCJ) -shared $(GCJFLAGS) $(LDFLAGS) $^ -o $@ + ++javac: $(%(base)s_OBJECTS) resources.o ++ $(GCJ) $(GCJFLAGS) $(RPATH) -Wl,-O1 --main=org.eclipse.jdt.internal.compiler.batch.Main $^ -o $@ ++ ++ecj1: $(%(base)s_OBJECTS) resources.o ++ $(GCJ) $(GCJFLAGS) $(RPATH) -Wl,-O1 --main=org.eclipse.jdt.internal.compiler.batch.GCCMain $^ -o $@ ++ + %(db)s: $(%(base)s_SOURCES) + $(DBTOOL) -n $@ 64 + for jar in $^; do \\ --- gcc-4.8-4.8.5.orig/debian/patches/arm-multilib-defaults.diff +++ gcc-4.8-4.8.5/debian/patches/arm-multilib-defaults.diff @@ -0,0 +1,92 @@ +# DP: Set MULTILIB_DEFAULTS for ARM multilib builds + +Index: b/src/gcc/config.gcc +=================================================================== +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -3280,10 +3280,18 @@ case "${target}" in + esac + + case "$with_float" in +- "" \ +- | soft | hard | softfp) ++ "") + # OK + ;; ++ soft) ++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=0" ++ ;; ++ softfp) ++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=1" ++ ;; ++ hard) ++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=2" ++ ;; + *) + echo "Unknown floating point type used in --with-float=$with_float" 1>&2 + exit 1 +@@ -3320,6 +3328,9 @@ case "${target}" in + "" \ + | arm | thumb ) + #OK ++ if test "$with_mode" = thumb; then ++ tm_defines="${tm_defines} TARGET_CONFIGURED_THUMB_MODE=1" ++ fi + ;; + *) + echo "Unknown mode used in --with-mode=$with_mode" +Index: b/src/gcc/config/arm/linux-eabi.h +=================================================================== +--- a/src/gcc/config/arm/linux-eabi.h ++++ b/src/gcc/config/arm/linux-eabi.h +@@ -43,7 +43,21 @@ + target hardware. If you override this to use the hard-float ABI then + change the setting of GLIBC_DYNAMIC_LINKER_DEFAULT as well. */ + #undef TARGET_DEFAULT_FLOAT_ABI ++#ifdef TARGET_CONFIGURED_FLOAT_ABI ++#if TARGET_CONFIGURED_FLOAT_ABI == 2 ++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=hard" ++#elif TARGET_CONFIGURED_FLOAT_ABI == 1 ++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFTFP ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=softfp" ++#else ++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=soft" ++#endif ++#else + #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=soft" ++#endif + + /* We default to the "aapcs-linux" ABI so that enums are int-sized by + default. */ +@@ -86,6 +100,28 @@ + %{mfloat-abi=soft*:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "} \ + %{!mfloat-abi=*:" GLIBC_DYNAMIC_LINKER_DEFAULT "}" + ++/* Set the multilib defaults according the configuration, needed to ++ let gcc -print-multi-dir do the right thing. */ ++ ++#if TARGET_BIG_ENDIAN_DEFAULT ++#define MULTILIB_DEFAULT_ENDIAN "mbig-endian" ++#else ++#define MULTILIB_DEFAULT_ENDIAN "mlittle-endian" ++#endif ++ ++#ifndef TARGET_CONFIGURED_THUMB_MODE ++#define MULTILIB_DEFAULT_MODE "marm" ++#elif TARGET_CONFIGURED_THUMB_MODE == 1 ++#define MULTILIB_DEFAULT_MODE "mthumb" ++#else ++#define MULTILIB_DEFAULT_MODE "marm" ++#endif ++ ++#undef MULTILIB_DEFAULTS ++#define MULTILIB_DEFAULTS \ ++ { MULTILIB_DEFAULT_MODE, MULTILIB_DEFAULT_ENDIAN, \ ++ MULTILIB_DEFAULT_FLOAT_ABI, "mno-thumb-interwork" } ++ + /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to + use the GNU/Linux version, not the generic BPABI version. */ + #undef LINK_SPEC --- gcc-4.8-4.8.5.orig/debian/patches/arm-multilib-soft-cross.diff +++ gcc-4.8-4.8.5/debian/patches/arm-multilib-soft-cross.diff @@ -0,0 +1,27 @@ +# DP: ARM hard/soft float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi ++++ b/src/gcc/config/arm/t-linux-eabi +@@ -21,6 +21,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp ++MULTILIB_OSDIRNAMES = ../libsf:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi ../libhf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.8-4.8.5.orig/debian/patches/arm-multilib-soft-float.diff +++ gcc-4.8-4.8.5/debian/patches/arm-multilib-soft-float.diff @@ -0,0 +1,26 @@ +--- a/src/gcc/config/arm/t-linux-eabi ++++ b/src/gcc/config/arm/t-linux-eabi +@@ -24,6 +24,23 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifneq (,$(findstring MULTIARCH_DEFAULTS,$(tm_defines))) ++ifneq (,$(findstring __arm_linux_gnueabi__,$(tm_defines))) ++ MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard/mfloat-abi=soft ++ MULTILIB_DIRNAMES = . hf soft-float ++ MULTILIB_EXCEPTIONS = ++ MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float ++ MULTILIB_OSDIRNAMES = ../../lib/arm-linux-gnueabi ../../lib/arm-linux-gnueabihf soft-float ++endif ++ifneq (,$(findstring __arm_linux_gnueabihf__,$(tm_defines))) ++ MULTILIB_OPTIONS = mfloat-abi=hard/mfloat-abi=softfp/mfloat-abi=soft ++ MULTILIB_DIRNAMES = . sf soft-float ++ MULTILIB_EXCEPTIONS = ++ MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float ++ MULTILIB_OSDIRNAMES = ../../lib/arm-linux-gnueabihf ../../lib/arm-linux-gnueabi soft-float ++endif ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.8-4.8.5.orig/debian/patches/arm-multilib-soft.diff +++ gcc-4.8-4.8.5/debian/patches/arm-multilib-soft.diff @@ -0,0 +1,27 @@ +# DP: ARM hard/soft float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi ++++ b/src/gcc/config/arm/t-linux-eabi +@@ -21,6 +21,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp ++MULTILIB_OSDIRNAMES = arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.8-4.8.5.orig/debian/patches/arm-multilib-softfp-cross.diff +++ gcc-4.8-4.8.5/debian/patches/arm-multilib-softfp-cross.diff @@ -0,0 +1,27 @@ +# DP: ARM hard/softfp float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 ++++ b/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 +@@ -24,6 +24,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = ../libsf:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi ../libhf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.8-4.8.5.orig/debian/patches/arm-multilib-softfp.diff +++ gcc-4.8-4.8.5/debian/patches/arm-multilib-softfp.diff @@ -0,0 +1,27 @@ +# DP: ARM hard/softfp float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 ++++ b/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 +@@ -24,6 +24,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.8-4.8.5.orig/debian/patches/arm-sanitizer.diff +++ gcc-4.8-4.8.5/debian/patches/arm-sanitizer.diff @@ -0,0 +1,280 @@ +# DP: Enable libsanitizer on ARM. + +libsanitizer/ + +2013-06-20 Christophe Lyon + + Backport from trunk r198683. + 2013-05-07 Christophe Lyon + + * configure.tgt: Add ARM pattern. + +gcc/ + +2013-06-20 Christophe Lyon + + Backport from trunk r198683. + 2013-05-07 Christophe Lyon + + * config/arm/arm.c (arm_asan_shadow_offset): New function. + (TARGET_ASAN_SHADOW_OFFSET): Define. + * config/arm/linux-eabi.h (ASAN_CC1_SPEC): Define. + (LINUX_OR_ANDROID_CC): Add ASAN_CC1_SPEC. + +gcc/testsuite/ + +2013-06-20 Christophe Lyon + + Backport from trunk r198683. + 2013-05-07 Christophe Lyon + + * lib/target-supports.exp (check_effective_target_hw): New + function. + * c-c++-common/asan/clone-test-1.c: Call + check_effective_target_hw. + * c-c++-common/asan/rlimit-mmap-test-1.c: Likewise. + * c-c++-common/asan/heap-overflow-1.c: Update regexps to accept + possible decorations. + * c-c++-common/asan/null-deref-1.c: Likewise. + * c-c++-common/asan/stack-overflow-1.c: Likewise. + * c-c++-common/asan/strncpy-overflow-1.c: Likewise. + * c-c++-common/asan/use-after-free-1.c: Likewise. + * g++.dg/asan/deep-thread-stack-1.C: Likewise. + * g++.dg/asan/large-func-test-1.C: Likewise. + +Index: b/src/libsanitizer/configure.tgt +=================================================================== +--- a/src/libsanitizer/configure.tgt ++++ b/src/libsanitizer/configure.tgt +@@ -32,6 +32,8 @@ case "${target}" in + ;; + sparc*-*-linux*) + ;; ++ arm*-*-linux*) ++ ;; + x86_64-*-darwin[1]* | i?86-*-darwin[1]*) + TSAN_SUPPORTED=no + ;; +Index: b/src/gcc/testsuite/lib/target-supports.exp +=================================================================== +--- a/src/gcc/testsuite/lib/target-supports.exp ++++ b/src/gcc/testsuite/lib/target-supports.exp +@@ -4743,6 +4743,33 @@ proc check_effective_target_simulator { + return 0 + } + ++# Return 1 if programs are intended to be run on hardware rather than ++# on a simulator ++ ++proc check_effective_target_hw { } { ++ ++ # All "src/sim" simulators set this one. ++ if [board_info target exists is_simulator] { ++ if [board_info target is_simulator] { ++ return 0 ++ } else { ++ return 1 ++ } ++ } ++ ++ # The "sid" simulators don't set that one, but at least they set ++ # this one. ++ if [board_info target exists slow_simulator] { ++ if [board_info target slow_simulator] { ++ return 0 ++ } else { ++ return 1 ++ } ++ } ++ ++ return 1 ++} ++ + # Return 1 if the target is a VxWorks kernel. + + proc check_effective_target_vxworks_kernel { } { +Index: b/src/gcc/testsuite/g++.dg/asan/large-func-test-1.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/asan/large-func-test-1.C ++++ b/src/gcc/testsuite/g++.dg/asan/large-func-test-1.C +@@ -37,9 +37,9 @@ int main() { + + // { dg-output "ERROR: AddressSanitizer:? heap-buffer-overflow on address\[^\n\r]*" } + // { dg-output "0x\[0-9a-f\]+ at pc 0x\[0-9a-f\]+ bp 0x\[0-9a-f\]+ sp 0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } +-// { dg-output "READ of size 4 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*READ of size 4 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } + // { dg-output " #0 0x\[0-9a-f\]+ (in \[^\n\r]*LargeFunction\[^\n\r]*(large-func-test-1.C:18|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } +-// { dg-output "0x\[0-9a-f\]+ is located 44 bytes to the right of 400-byte region.*(\n|\r\n|\r)" } +-// { dg-output "allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*0x\[0-9a-f\]+ is located 44 bytes to the right of 400-byte region.*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } + // { dg-output " #0( 0x\[0-9a-f\]+ (in _*(interceptor_|)malloc|\[(\])\[^\n\r]*(\n|\r\n|\r)" } + // { dg-output " #1|) 0x\[0-9a-f\]+ (in (operator new|_*_Zn\[aw\]\[mj\])|\[(\])\[^\n\r]*(\n|\r\n|\r)" } +Index: b/src/gcc/testsuite/g++.dg/asan/deep-thread-stack-1.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/asan/deep-thread-stack-1.C ++++ b/src/gcc/testsuite/g++.dg/asan/deep-thread-stack-1.C +@@ -45,9 +45,9 @@ int main(int argc, char *argv[]) { + } + + // { dg-output "ERROR: AddressSanitizer: heap-use-after-free.*(\n|\r\n|\r)" } +-// { dg-output "WRITE of size 4 at 0x\[0-9a-f\]+ thread T(\[0-9\]+).*(\n|\r\n|\r)" } +-// { dg-output "freed by thread T(\[0-9\]+) here:.*(\n|\r\n|\r)" } +-// { dg-output "previously allocated by thread T(\[0-9\]+) here:.*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*WRITE of size 4 at 0x\[0-9a-f\]+ thread T(\[0-9\]+).*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*freed by thread T(\[0-9\]+) here:.*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*previously allocated by thread T(\[0-9\]+) here:.*(\n|\r\n|\r)" } + // { dg-output "Thread T\\2 created by T(\[0-9\]+) here:.*(\n|\r\n|\r)" } + // { dg-output "Thread T\\8 created by T0 here:.*(\n|\r\n|\r)" } + // { dg-output "Thread T\\4 created by T(\[0-9\]+) here:.*(\n|\r\n|\r)" } +Index: b/src/gcc/testsuite/c-c++-common/asan/strncpy-overflow-1.c +=================================================================== +--- a/src/gcc/testsuite/c-c++-common/asan/strncpy-overflow-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/strncpy-overflow-1.c +@@ -15,7 +15,7 @@ int main(int argc, char **argv) { + /* { dg-output "WRITE of size \[0-9\]* at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*(interceptor_|)strncpy|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*strncpy-overflow-1.c:11|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */ +-/* { dg-output "0x\[0-9a-f\]+ is located 0 bytes to the right of 9-byte region\[^\n\r]*(\n|\r\n|\r)" } */ +-/* { dg-output "allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*0x\[0-9a-f\]+ is located 0 bytes to the right of 9-byte region\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*(interceptor_|)malloc|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*strncpy-overflow-1.c:10|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ +Index: b/src/gcc/testsuite/c-c++-common/asan/rlimit-mmap-test-1.c +=================================================================== +--- a/src/gcc/testsuite/c-c++-common/asan/rlimit-mmap-test-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/rlimit-mmap-test-1.c +@@ -2,6 +2,7 @@ + + /* { dg-do run { target setrlimit } } */ + /* { dg-skip-if "" { *-*-* } { "*" } { "-O0" } } */ ++/* { dg-require-effective-target hw } */ + /* { dg-shouldfail "asan" } */ + + #include +Index: b/src/gcc/testsuite/c-c++-common/asan/stack-overflow-1.c +=================================================================== +--- a/src/gcc/testsuite/c-c++-common/asan/stack-overflow-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/stack-overflow-1.c +@@ -19,4 +19,4 @@ int main() { + + /* { dg-output "READ of size 1 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*stack-overflow-1.c:16|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */ +-/* { dg-output "Address 0x\[0-9a-f\]+ is\[^\n\r]*frame
" } */ ++/* { dg-output "\[^\n\r]*Address 0x\[0-9a-f\]+ is\[^\n\r]*frame
" } */ +Index: b/src/gcc/testsuite/c-c++-common/asan/use-after-free-1.c +=================================================================== +--- a/src/gcc/testsuite/c-c++-common/asan/use-after-free-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/use-after-free-1.c +@@ -11,12 +11,12 @@ int main() { + + /* { dg-output "ERROR: AddressSanitizer:? heap-use-after-free on address\[^\n\r]*" } */ + /* { dg-output "0x\[0-9a-f\]+ at pc 0x\[0-9a-f\]+ bp 0x\[0-9a-f\]+ sp 0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */ +-/* { dg-output "READ of size 1 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*READ of size 1 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*use-after-free-1.c:9|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */ +-/* { dg-output "0x\[0-9a-f\]+ is located 5 bytes inside of 10-byte region .0x\[0-9a-f\]+,0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */ +-/* { dg-output "freed by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*0x\[0-9a-f\]+ is located 5 bytes inside of 10-byte region .0x\[0-9a-f\]+,0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*freed by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*(interceptor_|)free|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*use-after-free-1.c:8|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */ +-/* { dg-output "previously allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*previously allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*(interceptor_|)malloc|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*use-after-free-1.c:7|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ +Index: b/src/gcc/testsuite/c-c++-common/asan/clone-test-1.c +=================================================================== +--- a/src/gcc/testsuite/c-c++-common/asan/clone-test-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/clone-test-1.c +@@ -3,6 +3,7 @@ + + /* { dg-do run { target { *-*-linux* } } } */ + /* { dg-require-effective-target clone } */ ++/* { dg-require-effective-target hw } */ + /* { dg-options "-D_GNU_SOURCE" } */ + + #include +Index: b/src/gcc/testsuite/c-c++-common/asan/heap-overflow-1.c +=================================================================== +--- a/src/gcc/testsuite/c-c++-common/asan/heap-overflow-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/heap-overflow-1.c +@@ -25,7 +25,7 @@ int main(int argc, char **argv) { + + /* { dg-output "READ of size 1 at 0x\[0-9a-f\]+ thread T0.*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*heap-overflow-1.c:21|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */ +-/* { dg-output "0x\[0-9a-f\]+ is located 0 bytes to the right of 10-byte region\[^\n\r]*(\n|\r\n|\r)" } */ +-/* { dg-output "allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*0x\[0-9a-f\]+ is located 0 bytes to the right of 10-byte region\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*(interceptor_|)malloc|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*heap-overflow-1.c:19|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ +Index: b/src/gcc/testsuite/c-c++-common/asan/null-deref-1.c +=================================================================== +--- a/src/gcc/testsuite/c-c++-common/asan/null-deref-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/null-deref-1.c +@@ -18,6 +18,6 @@ int main() + + /* { dg-output "ERROR: AddressSanitizer:? SEGV on unknown address\[^\n\r]*" } */ + /* { dg-output "0x\[0-9a-f\]+ \[^\n\r]*pc 0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */ +-/* { dg-output "AddressSanitizer can not provide additional info.*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*AddressSanitizer can not provide additional info.*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in \[^\n\r]*NullDeref\[^\n\r]* (\[^\n\r]*null-deref-1.c:10|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*null-deref-1.c:15|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ +Index: b/src/gcc/config/arm/arm.c +=================================================================== +--- a/src/gcc/config/arm/arm.c ++++ b/src/gcc/config/arm/arm.c +@@ -278,6 +278,7 @@ static unsigned arm_add_stmt_cost (void + + static void arm_canonicalize_comparison (int *code, rtx *op0, rtx *op1, + bool op0_preserve_value); ++static unsigned HOST_WIDE_INT arm_asan_shadow_offset (void); + + /* Table of machine attributes. */ + static const struct attribute_spec arm_attribute_table[] = +@@ -647,6 +648,9 @@ static const struct attribute_spec arm_a + #define TARGET_CANONICALIZE_COMPARISON \ + arm_canonicalize_comparison + ++#undef TARGET_ASAN_SHADOW_OFFSET ++#define TARGET_ASAN_SHADOW_OFFSET arm_asan_shadow_offset ++ + struct gcc_target targetm = TARGET_INITIALIZER; + + /* Obstack for minipool constant handling. */ +@@ -27482,4 +27486,12 @@ arm_is_constant_pool_ref (rtx x) + && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))); + } + ++/* Implement the TARGET_ASAN_SHADOW_OFFSET hook. */ ++ ++static unsigned HOST_WIDE_INT ++arm_asan_shadow_offset (void) ++{ ++ return (unsigned HOST_WIDE_INT) 1 << 29; ++} ++ + #include "gt-arm.h" +Index: b/src/gcc/config/arm/linux-eabi.h +=================================================================== +--- a/src/gcc/config/arm/linux-eabi.h ++++ b/src/gcc/config/arm/linux-eabi.h +@@ -84,10 +84,14 @@ + LINUX_OR_ANDROID_LD (LINUX_TARGET_LINK_SPEC, \ + LINUX_TARGET_LINK_SPEC " " ANDROID_LINK_SPEC) + ++#undef ASAN_CC1_SPEC ++#define ASAN_CC1_SPEC "%{fsanitize=*:-funwind-tables}" ++ + #undef CC1_SPEC + #define CC1_SPEC \ +- LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC, \ +- GNU_USER_TARGET_CC1_SPEC " " ANDROID_CC1_SPEC) ++ LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \ ++ GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \ ++ ANDROID_CC1_SPEC) + + #define CC1PLUS_SPEC \ + LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC) --- gcc-4.8-4.8.5.orig/debian/patches/boehm-gc-getnprocs.diff +++ gcc-4.8-4.8.5/debian/patches/boehm-gc-getnprocs.diff @@ -0,0 +1,18 @@ +# DP: boehm-gc/pthread_support.c (GC_get_nprocs): Use sysconf as fallback. + +--- + boehm-gc/pthread_support.c | 3 ++- + 1 files changed, 2 insertions(+), 1 deletions(-) + +--- a/src/boehm-gc/pthread_support.c ++++ b/src/boehm-gc/pthread_support.c +@@ -724,7 +724,8 @@ + f = open("/proc/stat", O_RDONLY); + if (f < 0 || (len = STAT_READ(f, stat_buf, STAT_BUF_SIZE)) < 100) { + WARN("Couldn't read /proc/stat\n", 0); +- return -1; ++ /* Fallback to sysconf after the warning */ ++ return sysconf(_SC_NPROCESSORS_ONLN); + } + for (i = 0; i < len - 100; ++i) { + if (stat_buf[i] == '\n' && stat_buf[i+1] == 'c' --- gcc-4.8-4.8.5.orig/debian/patches/boehm-gc-nocheck.diff +++ gcc-4.8-4.8.5/debian/patches/boehm-gc-nocheck.diff @@ -0,0 +1,18 @@ +# DP: Disable running the boehm-gc testsuite. Hangs the buildd at least on hppa. + +--- + boehm-gc/Makefile.in | 3 ++- + 1 files changed, 2 insertions(+), 1 deletions(-) + +--- a/src/boehm-gc/Makefile.in ++++ b/src/boehm-gc/Makefile.in +@@ -684,7 +684,8 @@ check-TESTS: $(TESTS) + test "$$failed" -eq 0; \ + else :; fi + check-am: $(check_PROGRAMS) +- $(MAKE) $(AM_MAKEFLAGS) check-TESTS ++ : # $(MAKE) $(AM_MAKEFLAGS) check-TESTS ++ @echo target $@ disabled for Debian build. + check: check-recursive + all-am: Makefile $(LTLIBRARIES) all-multi + installdirs: installdirs-recursive --- gcc-4.8-4.8.5.orig/debian/patches/bootstrap-no-unneeded-libs.diff +++ gcc-4.8-4.8.5/debian/patches/bootstrap-no-unneeded-libs.diff @@ -0,0 +1,1422 @@ +# DP: For bootstrap builds, don't build unneeded libstdc++ things +# DP: (debug library, PCH headers). + +Index: b/src/Makefile.tpl +=================================================================== +--- a/src/Makefile.tpl ++++ b/src/Makefile.tpl +@@ -1060,7 +1060,9 @@ + --target=[+target_alias+] $${srcdiroption} [+ IF prev +]\ + --with-build-libsubdir=$(HOST_SUBDIR) [+ ENDIF prev +]\ + $(STAGE[+id+]_CONFIGURE_FLAGS)[+ IF extra_configure_flags +] \ +- [+extra_configure_flags+][+ ENDIF extra_configure_flags +] ++ [+extra_configure_flags+][+ ENDIF extra_configure_flags +] \ ++ [+ IF bootstrap_configure_flags +][+bootstrap_configure_flags+] \ ++ [+ ENDIF bootstrap_configure_flags +] + @endif [+prefix+][+module+]-bootstrap + [+ ENDFOR bootstrap_stage +] + [+ ENDIF bootstrap +] +Index: b/src/Makefile.def +=================================================================== +--- a/src/Makefile.def ++++ b/src/Makefile.def +@@ -117,7 +117,8 @@ + target_modules = { module= libstdc++-v3; + bootstrap=true; + lib_path=src/.libs; +- raw_cxx=true; }; ++ raw_cxx=true; ++ bootstrap_configure_flags='--disable-libstdcxx-debug --disable-libstdcxx-pch'; }; + target_modules = { module= libmudflap; lib_path=.libs; }; + target_modules = { module= libsanitizer; lib_path=.libs; }; + target_modules = { module= libssp; lib_path=.libs; }; +Index: b/src/Makefile.in +=================================================================== +--- a/src/Makefile.in ++++ b/src/Makefile.in +@@ -3007,7 +3007,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif bfd-bootstrap + + .PHONY: configure-stage2-bfd maybe-configure-stage2-bfd +@@ -3040,7 +3041,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif bfd-bootstrap + + .PHONY: configure-stage3-bfd maybe-configure-stage3-bfd +@@ -3073,7 +3075,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif bfd-bootstrap + + .PHONY: configure-stage4-bfd maybe-configure-stage4-bfd +@@ -3106,7 +3109,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif bfd-bootstrap + + .PHONY: configure-stageprofile-bfd maybe-configure-stageprofile-bfd +@@ -3139,7 +3143,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif bfd-bootstrap + + .PHONY: configure-stagefeedback-bfd maybe-configure-stagefeedback-bfd +@@ -3172,7 +3177,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif bfd-bootstrap + + +@@ -3879,7 +3885,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif opcodes-bootstrap + + .PHONY: configure-stage2-opcodes maybe-configure-stage2-opcodes +@@ -3912,7 +3919,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif opcodes-bootstrap + + .PHONY: configure-stage3-opcodes maybe-configure-stage3-opcodes +@@ -3945,7 +3953,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif opcodes-bootstrap + + .PHONY: configure-stage4-opcodes maybe-configure-stage4-opcodes +@@ -3978,7 +3987,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif opcodes-bootstrap + + .PHONY: configure-stageprofile-opcodes maybe-configure-stageprofile-opcodes +@@ -4011,7 +4021,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif opcodes-bootstrap + + .PHONY: configure-stagefeedback-opcodes maybe-configure-stagefeedback-opcodes +@@ -4044,7 +4055,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif opcodes-bootstrap + + +@@ -4751,7 +4763,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif binutils-bootstrap + + .PHONY: configure-stage2-binutils maybe-configure-stage2-binutils +@@ -4784,7 +4797,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif binutils-bootstrap + + .PHONY: configure-stage3-binutils maybe-configure-stage3-binutils +@@ -4817,7 +4831,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif binutils-bootstrap + + .PHONY: configure-stage4-binutils maybe-configure-stage4-binutils +@@ -4850,7 +4865,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif binutils-bootstrap + + .PHONY: configure-stageprofile-binutils maybe-configure-stageprofile-binutils +@@ -4883,7 +4899,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif binutils-bootstrap + + .PHONY: configure-stagefeedback-binutils maybe-configure-stagefeedback-binutils +@@ -4916,7 +4933,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif binutils-bootstrap + + +@@ -8696,7 +8714,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif gas-bootstrap + + .PHONY: configure-stage2-gas maybe-configure-stage2-gas +@@ -8729,7 +8748,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif gas-bootstrap + + .PHONY: configure-stage3-gas maybe-configure-stage3-gas +@@ -8762,7 +8782,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif gas-bootstrap + + .PHONY: configure-stage4-gas maybe-configure-stage4-gas +@@ -8795,7 +8816,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif gas-bootstrap + + .PHONY: configure-stageprofile-gas maybe-configure-stageprofile-gas +@@ -8828,7 +8850,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif gas-bootstrap + + .PHONY: configure-stagefeedback-gas maybe-configure-stagefeedback-gas +@@ -8861,7 +8884,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif gas-bootstrap + + +@@ -9568,7 +9592,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif gcc-bootstrap + + .PHONY: configure-stage2-gcc maybe-configure-stage2-gcc +@@ -9601,7 +9626,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif gcc-bootstrap + + .PHONY: configure-stage3-gcc maybe-configure-stage3-gcc +@@ -9634,7 +9660,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif gcc-bootstrap + + .PHONY: configure-stage4-gcc maybe-configure-stage4-gcc +@@ -9667,7 +9694,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif gcc-bootstrap + + .PHONY: configure-stageprofile-gcc maybe-configure-stageprofile-gcc +@@ -9700,7 +9728,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif gcc-bootstrap + + .PHONY: configure-stagefeedback-gcc maybe-configure-stagefeedback-gcc +@@ -9733,7 +9762,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif gcc-bootstrap + + +@@ -10441,7 +10471,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ + --target=none-${host_vendor}-${host_os} $${srcdiroption} \ + $(STAGE1_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif gmp-bootstrap + + .PHONY: configure-stage2-gmp maybe-configure-stage2-gmp +@@ -10475,7 +10506,8 @@ + --target=none-${host_vendor}-${host_os} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE2_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif gmp-bootstrap + + .PHONY: configure-stage3-gmp maybe-configure-stage3-gmp +@@ -10509,7 +10541,8 @@ + --target=none-${host_vendor}-${host_os} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE3_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif gmp-bootstrap + + .PHONY: configure-stage4-gmp maybe-configure-stage4-gmp +@@ -10543,7 +10576,8 @@ + --target=none-${host_vendor}-${host_os} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE4_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif gmp-bootstrap + + .PHONY: configure-stageprofile-gmp maybe-configure-stageprofile-gmp +@@ -10577,7 +10611,8 @@ + --target=none-${host_vendor}-${host_os} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEprofile_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif gmp-bootstrap + + .PHONY: configure-stagefeedback-gmp maybe-configure-stagefeedback-gmp +@@ -10611,7 +10646,8 @@ + --target=none-${host_vendor}-${host_os} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEfeedback_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif gmp-bootstrap + + +@@ -11307,7 +11343,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + $(STAGE1_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpfr_configure_flags@ ++ --disable-shared @extra_mpfr_configure_flags@ \ ++ + @endif mpfr-bootstrap + + .PHONY: configure-stage2-mpfr maybe-configure-stage2-mpfr +@@ -11341,7 +11378,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE2_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpfr_configure_flags@ ++ --disable-shared @extra_mpfr_configure_flags@ \ ++ + @endif mpfr-bootstrap + + .PHONY: configure-stage3-mpfr maybe-configure-stage3-mpfr +@@ -11375,7 +11413,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE3_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpfr_configure_flags@ ++ --disable-shared @extra_mpfr_configure_flags@ \ ++ + @endif mpfr-bootstrap + + .PHONY: configure-stage4-mpfr maybe-configure-stage4-mpfr +@@ -11409,7 +11448,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE4_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpfr_configure_flags@ ++ --disable-shared @extra_mpfr_configure_flags@ \ ++ + @endif mpfr-bootstrap + + .PHONY: configure-stageprofile-mpfr maybe-configure-stageprofile-mpfr +@@ -11443,7 +11483,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEprofile_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpfr_configure_flags@ ++ --disable-shared @extra_mpfr_configure_flags@ \ ++ + @endif mpfr-bootstrap + + .PHONY: configure-stagefeedback-mpfr maybe-configure-stagefeedback-mpfr +@@ -11477,7 +11518,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEfeedback_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpfr_configure_flags@ ++ --disable-shared @extra_mpfr_configure_flags@ \ ++ + @endif mpfr-bootstrap + + +@@ -12173,7 +12215,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + $(STAGE1_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ ++ --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \ ++ + @endif mpc-bootstrap + + .PHONY: configure-stage2-mpc maybe-configure-stage2-mpc +@@ -12207,7 +12250,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE2_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ ++ --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \ ++ + @endif mpc-bootstrap + + .PHONY: configure-stage3-mpc maybe-configure-stage3-mpc +@@ -12241,7 +12285,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE3_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ ++ --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \ ++ + @endif mpc-bootstrap + + .PHONY: configure-stage4-mpc maybe-configure-stage4-mpc +@@ -12275,7 +12320,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE4_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ ++ --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \ ++ + @endif mpc-bootstrap + + .PHONY: configure-stageprofile-mpc maybe-configure-stageprofile-mpc +@@ -12309,7 +12355,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEprofile_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ ++ --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \ ++ + @endif mpc-bootstrap + + .PHONY: configure-stagefeedback-mpc maybe-configure-stagefeedback-mpc +@@ -12343,7 +12390,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEfeedback_CONFIGURE_FLAGS) \ +- --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ ++ --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \ ++ + @endif mpc-bootstrap + + +@@ -13039,7 +13087,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + $(STAGE1_CONFIGURE_FLAGS) \ +- --disable-shared @extra_isl_gmp_configure_flags@ ++ --disable-shared @extra_isl_gmp_configure_flags@ \ ++ + @endif isl-bootstrap + + .PHONY: configure-stage2-isl maybe-configure-stage2-isl +@@ -13073,7 +13122,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE2_CONFIGURE_FLAGS) \ +- --disable-shared @extra_isl_gmp_configure_flags@ ++ --disable-shared @extra_isl_gmp_configure_flags@ \ ++ + @endif isl-bootstrap + + .PHONY: configure-stage3-isl maybe-configure-stage3-isl +@@ -13107,7 +13157,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE3_CONFIGURE_FLAGS) \ +- --disable-shared @extra_isl_gmp_configure_flags@ ++ --disable-shared @extra_isl_gmp_configure_flags@ \ ++ + @endif isl-bootstrap + + .PHONY: configure-stage4-isl maybe-configure-stage4-isl +@@ -13141,7 +13192,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE4_CONFIGURE_FLAGS) \ +- --disable-shared @extra_isl_gmp_configure_flags@ ++ --disable-shared @extra_isl_gmp_configure_flags@ \ ++ + @endif isl-bootstrap + + .PHONY: configure-stageprofile-isl maybe-configure-stageprofile-isl +@@ -13175,7 +13227,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEprofile_CONFIGURE_FLAGS) \ +- --disable-shared @extra_isl_gmp_configure_flags@ ++ --disable-shared @extra_isl_gmp_configure_flags@ \ ++ + @endif isl-bootstrap + + .PHONY: configure-stagefeedback-isl maybe-configure-stagefeedback-isl +@@ -13209,7 +13262,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEfeedback_CONFIGURE_FLAGS) \ +- --disable-shared @extra_isl_gmp_configure_flags@ ++ --disable-shared @extra_isl_gmp_configure_flags@ \ ++ + @endif isl-bootstrap + + +@@ -13905,7 +13959,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + $(STAGE1_CONFIGURE_FLAGS) \ +- --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system ++ --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \ ++ + @endif cloog-bootstrap + + .PHONY: configure-stage2-cloog maybe-configure-stage2-cloog +@@ -13939,7 +13994,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE2_CONFIGURE_FLAGS) \ +- --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system ++ --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \ ++ + @endif cloog-bootstrap + + .PHONY: configure-stage3-cloog maybe-configure-stage3-cloog +@@ -13973,7 +14029,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE3_CONFIGURE_FLAGS) \ +- --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system ++ --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \ ++ + @endif cloog-bootstrap + + .PHONY: configure-stage4-cloog maybe-configure-stage4-cloog +@@ -14007,7 +14064,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE4_CONFIGURE_FLAGS) \ +- --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system ++ --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \ ++ + @endif cloog-bootstrap + + .PHONY: configure-stageprofile-cloog maybe-configure-stageprofile-cloog +@@ -14041,7 +14099,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEprofile_CONFIGURE_FLAGS) \ +- --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system ++ --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \ ++ + @endif cloog-bootstrap + + .PHONY: configure-stagefeedback-cloog maybe-configure-stagefeedback-cloog +@@ -14075,7 +14134,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEfeedback_CONFIGURE_FLAGS) \ +- --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system ++ --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \ ++ + @endif cloog-bootstrap + + +@@ -14771,7 +14831,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + $(STAGE1_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif libelf-bootstrap + + .PHONY: configure-stage2-libelf maybe-configure-stage2-libelf +@@ -14805,7 +14866,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE2_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif libelf-bootstrap + + .PHONY: configure-stage3-libelf maybe-configure-stage3-libelf +@@ -14839,7 +14901,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE3_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif libelf-bootstrap + + .PHONY: configure-stage4-libelf maybe-configure-stage4-libelf +@@ -14873,7 +14936,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE4_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif libelf-bootstrap + + .PHONY: configure-stageprofile-libelf maybe-configure-stageprofile-libelf +@@ -14907,7 +14971,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEprofile_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif libelf-bootstrap + + .PHONY: configure-stagefeedback-libelf maybe-configure-stagefeedback-libelf +@@ -14941,7 +15006,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEfeedback_CONFIGURE_FLAGS) \ +- --disable-shared ++ --disable-shared \ ++ + @endif libelf-bootstrap + + +@@ -15636,7 +15702,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif gold-bootstrap + + .PHONY: configure-stage2-gold maybe-configure-stage2-gold +@@ -15669,7 +15736,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif gold-bootstrap + + .PHONY: configure-stage3-gold maybe-configure-stage3-gold +@@ -15702,7 +15770,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif gold-bootstrap + + .PHONY: configure-stage4-gold maybe-configure-stage4-gold +@@ -15735,7 +15804,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif gold-bootstrap + + .PHONY: configure-stageprofile-gold maybe-configure-stageprofile-gold +@@ -15768,7 +15838,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif gold-bootstrap + + .PHONY: configure-stagefeedback-gold maybe-configure-stagefeedback-gold +@@ -15801,7 +15872,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif gold-bootstrap + + +@@ -16948,7 +17020,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif intl-bootstrap + + .PHONY: configure-stage2-intl maybe-configure-stage2-intl +@@ -16981,7 +17054,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif intl-bootstrap + + .PHONY: configure-stage3-intl maybe-configure-stage3-intl +@@ -17014,7 +17088,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif intl-bootstrap + + .PHONY: configure-stage4-intl maybe-configure-stage4-intl +@@ -17047,7 +17122,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif intl-bootstrap + + .PHONY: configure-stageprofile-intl maybe-configure-stageprofile-intl +@@ -17080,7 +17156,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif intl-bootstrap + + .PHONY: configure-stagefeedback-intl maybe-configure-stagefeedback-intl +@@ -17113,7 +17190,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif intl-bootstrap + + +@@ -18685,7 +18763,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif ld-bootstrap + + .PHONY: configure-stage2-ld maybe-configure-stage2-ld +@@ -18718,7 +18797,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif ld-bootstrap + + .PHONY: configure-stage3-ld maybe-configure-stage3-ld +@@ -18751,7 +18831,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif ld-bootstrap + + .PHONY: configure-stage4-ld maybe-configure-stage4-ld +@@ -18784,7 +18865,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif ld-bootstrap + + .PHONY: configure-stageprofile-ld maybe-configure-stageprofile-ld +@@ -18817,7 +18899,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif ld-bootstrap + + .PHONY: configure-stagefeedback-ld maybe-configure-stagefeedback-ld +@@ -18850,7 +18933,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif ld-bootstrap + + +@@ -19557,7 +19641,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif libbacktrace-bootstrap + + .PHONY: configure-stage2-libbacktrace maybe-configure-stage2-libbacktrace +@@ -19590,7 +19675,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif libbacktrace-bootstrap + + .PHONY: configure-stage3-libbacktrace maybe-configure-stage3-libbacktrace +@@ -19623,7 +19709,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif libbacktrace-bootstrap + + .PHONY: configure-stage4-libbacktrace maybe-configure-stage4-libbacktrace +@@ -19656,7 +19743,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif libbacktrace-bootstrap + + .PHONY: configure-stageprofile-libbacktrace maybe-configure-stageprofile-libbacktrace +@@ -19689,7 +19777,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif libbacktrace-bootstrap + + .PHONY: configure-stagefeedback-libbacktrace maybe-configure-stagefeedback-libbacktrace +@@ -19722,7 +19811,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif libbacktrace-bootstrap + + +@@ -20429,7 +20519,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif libcpp-bootstrap + + .PHONY: configure-stage2-libcpp maybe-configure-stage2-libcpp +@@ -20462,7 +20553,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif libcpp-bootstrap + + .PHONY: configure-stage3-libcpp maybe-configure-stage3-libcpp +@@ -20495,7 +20587,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif libcpp-bootstrap + + .PHONY: configure-stage4-libcpp maybe-configure-stage4-libcpp +@@ -20528,7 +20621,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif libcpp-bootstrap + + .PHONY: configure-stageprofile-libcpp maybe-configure-stageprofile-libcpp +@@ -20561,7 +20655,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif libcpp-bootstrap + + .PHONY: configure-stagefeedback-libcpp maybe-configure-stagefeedback-libcpp +@@ -20594,7 +20689,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif libcpp-bootstrap + + +@@ -21301,7 +21397,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif libdecnumber-bootstrap + + .PHONY: configure-stage2-libdecnumber maybe-configure-stage2-libdecnumber +@@ -21334,7 +21431,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif libdecnumber-bootstrap + + .PHONY: configure-stage3-libdecnumber maybe-configure-stage3-libdecnumber +@@ -21367,7 +21465,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif libdecnumber-bootstrap + + .PHONY: configure-stage4-libdecnumber maybe-configure-stage4-libdecnumber +@@ -21400,7 +21499,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif libdecnumber-bootstrap + + .PHONY: configure-stageprofile-libdecnumber maybe-configure-stageprofile-libdecnumber +@@ -21433,7 +21533,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif libdecnumber-bootstrap + + .PHONY: configure-stagefeedback-libdecnumber maybe-configure-stagefeedback-libdecnumber +@@ -21466,7 +21567,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif libdecnumber-bootstrap + + +@@ -22614,7 +22716,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + $(STAGE1_CONFIGURE_FLAGS) \ +- @extra_host_libiberty_configure_flags@ ++ @extra_host_libiberty_configure_flags@ \ ++ + @endif libiberty-bootstrap + + .PHONY: configure-stage2-libiberty maybe-configure-stage2-libiberty +@@ -22648,7 +22751,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE2_CONFIGURE_FLAGS) \ +- @extra_host_libiberty_configure_flags@ ++ @extra_host_libiberty_configure_flags@ \ ++ + @endif libiberty-bootstrap + + .PHONY: configure-stage3-libiberty maybe-configure-stage3-libiberty +@@ -22682,7 +22786,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE3_CONFIGURE_FLAGS) \ +- @extra_host_libiberty_configure_flags@ ++ @extra_host_libiberty_configure_flags@ \ ++ + @endif libiberty-bootstrap + + .PHONY: configure-stage4-libiberty maybe-configure-stage4-libiberty +@@ -22716,7 +22821,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE4_CONFIGURE_FLAGS) \ +- @extra_host_libiberty_configure_flags@ ++ @extra_host_libiberty_configure_flags@ \ ++ + @endif libiberty-bootstrap + + .PHONY: configure-stageprofile-libiberty maybe-configure-stageprofile-libiberty +@@ -22750,7 +22856,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEprofile_CONFIGURE_FLAGS) \ +- @extra_host_libiberty_configure_flags@ ++ @extra_host_libiberty_configure_flags@ \ ++ + @endif libiberty-bootstrap + + .PHONY: configure-stagefeedback-libiberty maybe-configure-stagefeedback-libiberty +@@ -22784,7 +22891,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEfeedback_CONFIGURE_FLAGS) \ +- @extra_host_libiberty_configure_flags@ ++ @extra_host_libiberty_configure_flags@ \ ++ + @endif libiberty-bootstrap + + +@@ -26056,7 +26164,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif zlib-bootstrap + + .PHONY: configure-stage2-zlib maybe-configure-stage2-zlib +@@ -26089,7 +26198,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif zlib-bootstrap + + .PHONY: configure-stage3-zlib maybe-configure-stage3-zlib +@@ -26122,7 +26232,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif zlib-bootstrap + + .PHONY: configure-stage4-zlib maybe-configure-stage4-zlib +@@ -26155,7 +26266,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif zlib-bootstrap + + .PHONY: configure-stageprofile-zlib maybe-configure-stageprofile-zlib +@@ -26188,7 +26300,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif zlib-bootstrap + + .PHONY: configure-stagefeedback-zlib maybe-configure-stagefeedback-zlib +@@ -26221,7 +26334,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif zlib-bootstrap + + +@@ -29919,7 +30033,8 @@ + $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ + --target=${target_alias} $${srcdiroption} \ + $(STAGE1_CONFIGURE_FLAGS) \ +- --enable-shared ++ --enable-shared \ ++ + @endif lto-plugin-bootstrap + + .PHONY: configure-stage2-lto-plugin maybe-configure-stage2-lto-plugin +@@ -29953,7 +30068,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE2_CONFIGURE_FLAGS) \ +- --enable-shared ++ --enable-shared \ ++ + @endif lto-plugin-bootstrap + + .PHONY: configure-stage3-lto-plugin maybe-configure-stage3-lto-plugin +@@ -29987,7 +30103,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE3_CONFIGURE_FLAGS) \ +- --enable-shared ++ --enable-shared \ ++ + @endif lto-plugin-bootstrap + + .PHONY: configure-stage4-lto-plugin maybe-configure-stage4-lto-plugin +@@ -30021,7 +30138,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGE4_CONFIGURE_FLAGS) \ +- --enable-shared ++ --enable-shared \ ++ + @endif lto-plugin-bootstrap + + .PHONY: configure-stageprofile-lto-plugin maybe-configure-stageprofile-lto-plugin +@@ -30055,7 +30173,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEprofile_CONFIGURE_FLAGS) \ +- --enable-shared ++ --enable-shared \ ++ + @endif lto-plugin-bootstrap + + .PHONY: configure-stagefeedback-lto-plugin maybe-configure-stagefeedback-lto-plugin +@@ -30089,7 +30208,8 @@ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ + $(STAGEfeedback_CONFIGURE_FLAGS) \ +- --enable-shared ++ --enable-shared \ ++ + @endif lto-plugin-bootstrap + + +@@ -30829,7 +30949,9 @@ + $(SHELL) $${libsrcdir}/configure \ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ --disable-libstdcxx-debug --disable-libstdcxx-pch \ ++ + @endif target-libstdc++-v3-bootstrap + + .PHONY: configure-stage2-target-libstdc++-v3 maybe-configure-stage2-target-libstdc++-v3 +@@ -30874,7 +30996,9 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ --disable-libstdcxx-debug --disable-libstdcxx-pch \ ++ + @endif target-libstdc++-v3-bootstrap + + .PHONY: configure-stage3-target-libstdc++-v3 maybe-configure-stage3-target-libstdc++-v3 +@@ -30919,7 +31043,9 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ --disable-libstdcxx-debug --disable-libstdcxx-pch \ ++ + @endif target-libstdc++-v3-bootstrap + + .PHONY: configure-stage4-target-libstdc++-v3 maybe-configure-stage4-target-libstdc++-v3 +@@ -30964,7 +31090,9 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ --disable-libstdcxx-debug --disable-libstdcxx-pch \ ++ + @endif target-libstdc++-v3-bootstrap + + .PHONY: configure-stageprofile-target-libstdc++-v3 maybe-configure-stageprofile-target-libstdc++-v3 +@@ -31009,7 +31137,9 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ --disable-libstdcxx-debug --disable-libstdcxx-pch \ ++ + @endif target-libstdc++-v3-bootstrap + + .PHONY: configure-stagefeedback-target-libstdc++-v3 maybe-configure-stagefeedback-target-libstdc++-v3 +@@ -31054,7 +31184,9 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ --disable-libstdcxx-debug --disable-libstdcxx-pch \ ++ + @endif target-libstdc++-v3-bootstrap + + +@@ -33631,7 +33763,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif target-libgcc-bootstrap + + .PHONY: configure-stage2-target-libgcc maybe-configure-stage2-target-libgcc +@@ -33676,7 +33809,8 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif target-libgcc-bootstrap + + .PHONY: configure-stage3-target-libgcc maybe-configure-stage3-target-libgcc +@@ -33721,7 +33855,8 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif target-libgcc-bootstrap + + .PHONY: configure-stage4-target-libgcc maybe-configure-stage4-target-libgcc +@@ -33766,7 +33901,8 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif target-libgcc-bootstrap + + .PHONY: configure-stageprofile-target-libgcc maybe-configure-stageprofile-target-libgcc +@@ -33811,7 +33947,8 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif target-libgcc-bootstrap + + .PHONY: configure-stagefeedback-target-libgcc maybe-configure-stagefeedback-target-libgcc +@@ -33856,7 +33993,8 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif target-libgcc-bootstrap + + +@@ -40928,7 +41066,8 @@ + $(SHELL) $${libsrcdir}/configure \ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ +- $(STAGE1_CONFIGURE_FLAGS) ++ $(STAGE1_CONFIGURE_FLAGS) \ ++ + @endif target-libgomp-bootstrap + + .PHONY: configure-stage2-target-libgomp maybe-configure-stage2-target-libgomp +@@ -40973,7 +41112,8 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE2_CONFIGURE_FLAGS) ++ $(STAGE2_CONFIGURE_FLAGS) \ ++ + @endif target-libgomp-bootstrap + + .PHONY: configure-stage3-target-libgomp maybe-configure-stage3-target-libgomp +@@ -41018,7 +41158,8 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE3_CONFIGURE_FLAGS) ++ $(STAGE3_CONFIGURE_FLAGS) \ ++ + @endif target-libgomp-bootstrap + + .PHONY: configure-stage4-target-libgomp maybe-configure-stage4-target-libgomp +@@ -41063,7 +41204,8 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGE4_CONFIGURE_FLAGS) ++ $(STAGE4_CONFIGURE_FLAGS) \ ++ + @endif target-libgomp-bootstrap + + .PHONY: configure-stageprofile-target-libgomp maybe-configure-stageprofile-target-libgomp +@@ -41108,7 +41250,8 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEprofile_CONFIGURE_FLAGS) ++ $(STAGEprofile_CONFIGURE_FLAGS) \ ++ + @endif target-libgomp-bootstrap + + .PHONY: configure-stagefeedback-target-libgomp maybe-configure-stagefeedback-target-libgomp +@@ -41153,7 +41296,8 @@ + $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ + --target=${target_alias} $${srcdiroption} \ + --with-build-libsubdir=$(HOST_SUBDIR) \ +- $(STAGEfeedback_CONFIGURE_FLAGS) ++ $(STAGEfeedback_CONFIGURE_FLAGS) \ ++ + @endif target-libgomp-bootstrap + + --- gcc-4.8-4.8.5.orig/debian/patches/config-ml.diff +++ gcc-4.8-4.8.5/debian/patches/config-ml.diff @@ -0,0 +1,167 @@ +# DP: - Disable some biarch libraries for biarch builds. +# DP: - Fix multilib builds on kernels which don't support all multilibs. + +Index: b/src/config-ml.in +=================================================================== +--- a/src/config-ml.in ++++ b/src/config-ml.in +@@ -467,6 +467,25 @@ + ;; + esac + ++if [ -z "$biarch_multidir_names" ]; then ++ biarch_multidir_names="libiberty libstdc++-v3 libgfortran libmudflap libssp libffi libobjc libgomp" ++ echo "WARNING: biarch_multidir_names is unset. Use default value:" ++ echo " $biarch_multidir_names" ++fi ++ml_srcbase=`basename $ml_realsrcdir` ++old_multidirs="${multidirs}" ++multidirs="" ++for x in ${old_multidirs}; do ++ case " $x " in ++ " 32 "|" n32 "|" x32 "|" 64 "|" hf "|" sf "|" m4-nofpu ") ++ case "$biarch_multidir_names" in ++ *"$ml_srcbase"*) multidirs="${multidirs} ${x}" ;; ++ esac ++ ;; ++ *) multidirs="${multidirs} ${x}" ;; ++ esac ++done ++ + # Remove extraneous blanks from multidirs. + # Tests like `if [ -n "$multidirs" ]' require it. + multidirs=`echo "$multidirs" | sed -e 's/^[ ][ ]*//' -e 's/[ ][ ]*$//' -e 's/[ ][ ]*/ /g'` +@@ -654,6 +673,35 @@ + + for ml_dir in ${multidirs}; do + ++ # a native build fails if the running kernel doesn't support the multilib ++ # variant; force cross compilation for these cases. ++ ml_host_arg= ++ case "${host}" in ++ i[34567]86-*-linux*) ++ case "${ml_dir}" in ++ 64) ml_host_arg="--host=x86_64-linux-gnu";; ++ x32) ml_host_arg="--host=x86_64-linux-gnux32";; ++ esac ++ ;; ++ powerpc-*-linux*) ++ case "${ml_dir}" in ++ 64) ml_host_arg="--host=powerpc64-linux-gnu" ++ esac ++ ;; ++ s390-*-linux*) ++ case "${ml_dir}" in ++ 64) ml_host_arg="--host=s390x-linux-gnu" ++ esac ++ ;; ++ x86_64-*-linux*) ++ case "${ml_dir}" in ++ x32) ml_host_arg="--host=x86_64-linux-gnux32" ++ esac ++ esac ++ if [ -n "${ml_host_arg}" ]; then ++ ml_host_arg="${ml_host_arg} --with-default-host-alias=${host_alias}" ++ fi ++ + if [ "${ml_verbose}" = --verbose ]; then + echo "Running configure in multilib subdir ${ml_dir}" + echo "pwd: `${PWDCMD-pwd}`" +@@ -858,9 +906,20 @@ + fi + fi + ++ ml_configure_args= ++ for arg in ${ac_configure_args} ++ do ++ case $arg in ++ *CC=*) ml_configure_args=${ml_config_env} ;; ++ *CXX=*) ml_configure_args=${ml_config_env} ;; ++ *GCJ=*) ml_configure_args=${ml_config_env} ;; ++ *) ;; ++ esac ++ done ++ + if eval ${ml_config_env} ${ml_config_shell} ${ml_recprog} \ + --with-multisubdir=${ml_dir} --with-multisrctop=${multisrctop} \ +- ${ac_configure_args} ${ml_config_env} ${ml_srcdiroption} ; then ++ ${ac_configure_args} ${ml_configure_args} ${ml_host_arg} ${ml_srcdiroption} ; then + true + else + exit 1 +Index: b/src/libstdc++-v3/include/Makefile.am +=================================================================== +--- a/src/libstdc++-v3/include/Makefile.am ++++ b/src/libstdc++-v3/include/Makefile.am +@@ -826,8 +826,9 @@ + endif + + host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) +-host_builddir = ./${host_alias}/bits +-host_installdir = ${gxx_include_dir}/${host_alias}$(MULTISUBDIR)/bits ++default_host_alias = @default_host_alias@ ++host_builddir = ./${default_host_alias}/bits ++host_installdir = ${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits + host_headers = \ + ${host_srcdir}/ctype_base.h \ + ${host_srcdir}/ctype_inline.h \ +@@ -1048,6 +1049,7 @@ + stamp-${host_alias}: + @-mkdir -p ${host_builddir} + @-mkdir -p ${host_builddir}/../ext ++ @test ${default_host_alias} = ${host_alias} || ln -sf ${default_host_alias} ${host_alias} + @$(STAMP) stamp-${host_alias} + + # Host includes static. +Index: b/src/libstdc++-v3/include/Makefile.in +=================================================================== +--- a/src/libstdc++-v3/include/Makefile.in ++++ b/src/libstdc++-v3/include/Makefile.in +@@ -202,6 +202,7 @@ + check_msgfmt = @check_msgfmt@ + datadir = @datadir@ + datarootdir = @datarootdir@ ++default_host_alias = @default_host_alias@ + docdir = @docdir@ + dvidir = @dvidir@ + enable_shared = @enable_shared@ +@@ -1081,8 +1082,8 @@ + # For --enable-cheaders=c_std + @GLIBCXX_C_HEADERS_COMPATIBILITY_TRUE@c_compatibility_headers_extra = ${c_compatibility_headers} + host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) +-host_builddir = ./${host_alias}/bits +-host_installdir = ${gxx_include_dir}/${host_alias}$(MULTISUBDIR)/bits ++host_builddir = ./${default_host_alias}/bits ++host_installdir = ${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits + host_headers = \ + ${host_srcdir}/ctype_base.h \ + ${host_srcdir}/ctype_inline.h \ +@@ -1461,6 +1462,7 @@ + stamp-${host_alias}: + @-mkdir -p ${host_builddir} + @-mkdir -p ${host_builddir}/../ext ++ @test ${default_host_alias} = ${host_alias} || ln -sf ${default_host_alias} ${host_alias} + @$(STAMP) stamp-${host_alias} + + # Host includes static. +Index: b/src/libstdc++-v3/configure.ac +=================================================================== +--- a/src/libstdc++-v3/configure.ac ++++ b/src/libstdc++-v3/configure.ac +@@ -461,6 +461,16 @@ + multilib_arg= + fi + ++AC_ARG_WITH(default-host-alias, ++[AS_HELP_STRING([--with-default-host-alias=TRIPLET], ++ [specifies host triplet used for the default multilib build])], ++[case "${withval}" in ++yes) AC_MSG_ERROR(bad value ${withval} given for default host triplet) ;; ++no) default_host_alias='${host_alias}' ;; ++*) default_host_alias=${withval} ;; ++esac],[default_host_alias='${host_alias}']) ++AC_SUBST(default_host_alias) ++ + # Export all the install information. + GLIBCXX_EXPORT_INSTALL_INFO + --- gcc-4.8-4.8.5.orig/debian/patches/cross-biarch.diff +++ gcc-4.8-4.8.5/debian/patches/cross-biarch.diff @@ -0,0 +1,79 @@ +# DP: Fix the location of target's libs in cross-build for biarch + +--- + +--- a/src/config-ml.in 2010-08-24 01:48:38.000000000 -0400 ++++ b/src/config-ml.in 2010-08-24 03:56:12.000000000 -0400 +@@ -540,7 +540,12 @@ + else \ + if [ -d ../$${dir}/$${lib} ]; then \ + flags=`echo $$i | sed -e 's/^[^;]*;//' -e 's/@/ -/g'`; \ +- if (cd ../$${dir}/$${lib}; $(MAKE) $(FLAGS_TO_PASS) \ ++ libsuffix_="$${dir}"; \ ++ if [ "$${dir}" = "n32" ]; then libsuffix_=32; fi; \ ++ if (cd ../$${dir}/$${lib}; $(MAKE) $(subst \ ++ -B$(build_tooldir)/lib/, \ ++ -B$(build_tooldir)/lib$${libsuffix_}/, \ ++ $(FLAGS_TO_PASS)) \ + CFLAGS="$(CFLAGS) $${flags}" \ + CCASFLAGS="$(CCASFLAGS) $${flags}" \ + FCFLAGS="$(FCFLAGS) $${flags}" \ +@@ -791,6 +796,13 @@ + GCJ_=$GCJ' ' + GFORTRAN_=$GFORTRAN' ' + else ++ if [ "${ml_dir}" = "." ]; then ++ FILTER_="s!X\\(.*\\)!\\1!p" ++ elif [ "${ml_dir}" = "n32" ]; then # mips n32 -> lib32 ++ FILTER_="s!X\\(.*\\)/!\\132/!p" ++ else ++ FILTER_="s!X\\(.*\\)/!\\1${ml_dir}/!p" ++ fi + # Create a regular expression that matches any string as long + # as ML_POPDIR. + popdir_rx=`echo "${ML_POPDIR}" | sed 's,.,.,g'` +@@ -799,6 +811,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + CC_="${CC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\1/p"`' ' ;; ++ -B*/lib/) ++ CC_="${CC_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + CC_="${CC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -811,6 +825,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + CXX_="${CXX_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ CXX_="${CXX_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + CXX_="${CXX_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -823,6 +839,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + F77_="${F77_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ F77_="${F77_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + F77_="${F77_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -835,6 +853,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -847,6 +867,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) --- gcc-4.8-4.8.5.orig/debian/patches/cross-fixes.diff +++ gcc-4.8-4.8.5/debian/patches/cross-fixes.diff @@ -0,0 +1,81 @@ +# DP: Fix the linker error when creating an xcc for ia64 + +--- + gcc/config/ia64/fde-glibc.c | 3 +++ + gcc/config/ia64/unwind-ia64.c | 3 ++- + gcc/unwind-compat.c | 2 ++ + gcc/unwind-generic.h | 2 ++ + 6 files changed, 14 insertions(+), 1 deletions(-) + +Index: b/src/libgcc/config/ia64/fde-glibc.c +=================================================================== +--- a/src/libgcc/config/ia64/fde-glibc.c ++++ b/src/libgcc/config/ia64/fde-glibc.c +@@ -28,6 +28,7 @@ + #ifndef _GNU_SOURCE + #define _GNU_SOURCE 1 + #endif ++#ifndef inhibit_libc + #include "config.h" + #include + #include +@@ -159,3 +160,5 @@ + + return data.ret; + } ++ ++#endif +Index: b/src/libgcc/config/ia64/unwind-ia64.c +=================================================================== +--- a/src/libgcc/config/ia64/unwind-ia64.c ++++ b/src/libgcc/config/ia64/unwind-ia64.c +@@ -27,6 +27,7 @@ + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + ++#ifndef inhibit_libc + #include "tconfig.h" + #include "tsystem.h" + #include "coretypes.h" +@@ -2467,3 +2468,4 @@ + #endif + + #endif ++#endif +Index: b/src/libgcc/unwind-compat.c +=================================================================== +--- a/src/libgcc/unwind-compat.c ++++ b/src/libgcc/unwind-compat.c +@@ -24,6 +24,7 @@ + . */ + + #if defined (USE_GAS_SYMVER) && defined (USE_LIBUNWIND_EXCEPTIONS) ++#ifndef inhibit_libc + #include "tconfig.h" + #include "tsystem.h" + #include "unwind.h" +@@ -208,3 +209,4 @@ + } + symver (_Unwind_SetIP, GCC_3.0); + #endif ++#endif +Index: b/src/libgcc/unwind-generic.h +=================================================================== +--- a/src/libgcc/unwind-generic.h ++++ b/src/libgcc/unwind-generic.h +@@ -221,6 +221,7 @@ + compatible with the standard ABI for IA-64, we inline these. */ + + #ifdef __ia64__ ++#ifndef inhibit_libc + #include + + static inline _Unwind_Ptr +@@ -239,6 +240,7 @@ + + /* @@@ Retrieve the Backing Store Pointer of the given context. */ + extern _Unwind_Word _Unwind_GetBSP (struct _Unwind_Context *); ++#endif + #else + extern _Unwind_Ptr _Unwind_GetDataRelBase (struct _Unwind_Context *); + extern _Unwind_Ptr _Unwind_GetTextRelBase (struct _Unwind_Context *); --- gcc-4.8-4.8.5.orig/debian/patches/cross-install-location.diff +++ gcc-4.8-4.8.5/debian/patches/cross-install-location.diff @@ -0,0 +1,335 @@ +--- a/src/libmudflap/Makefile.in 2012-12-08 08:32:41.301881153 +0100 ++++ b/src/libmudflap/Makefile.in 2012-12-08 08:58:29.281874520 +0100 +@@ -269,7 +269,7 @@ + @LIBMUDFLAPTH_FALSE@libmudflapth = + @LIBMUDFLAPTH_TRUE@libmudflapth = libmudflapth.la + toolexeclib_LTLIBRARIES = libmudflap.la $(libmudflapth) +-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include ++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include + nobase_libsubinclude_HEADERS = mf-runtime.h + libmudflap_la_SOURCES = \ + mf-runtime.c \ +--- a/src/libmudflap/Makefile.am 2012-12-08 08:32:41.301881153 +0100 ++++ b/src/libmudflap/Makefile.am 2012-12-08 08:58:04.633876182 +0100 +@@ -23,7 +23,7 @@ + + toolexeclib_LTLIBRARIES = libmudflap.la $(libmudflapth) + target_noncanonical = @target_noncanonical@ +-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include ++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include + nobase_libsubinclude_HEADERS = mf-runtime.h + + +--- a/src/fixincludes/Makefile.in 2011-01-03 21:52:22.000000000 +0100 ++++ b/src/fixincludes/Makefile.in 2012-12-08 08:53:27.029874709 +0100 +@@ -52,9 +52,9 @@ + gcc_version := $(shell cat $(srcdir)/../gcc/BASE-VER) + + # Directory in which the compiler finds libraries etc. +-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + # Directory in which the compiler finds executables +-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + # Where our executable files go + itoolsdir = $(libexecsubdir)/install-tools + # Where our data files go +--- a/src/libgfortran/Makefile.in 2012-09-20 09:23:55.000000000 +0200 ++++ b/src/libgfortran/Makefile.in 2012-12-08 08:50:26.369874316 +0100 +@@ -499,12 +499,12 @@ + + libgfortran_la_DEPENDENCIES = $(version_dep) libgfortran.spec $(LIBQUADLIB_DEP) + myexeclib_LTLIBRARIES = libgfortranbegin.la +-myexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR) ++myexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR) + libgfortranbegin_la_SOURCES = fmain.c + libgfortranbegin_la_LDFLAGS = -static + libgfortranbegin_la_LINK = $(LINK) $(libgfortranbegin_la_LDFLAGS) + cafexeclib_LTLIBRARIES = libcaf_single.la +-cafexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR) ++cafexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR) + libcaf_single_la_SOURCES = caf/single.c + libcaf_single_la_LDFLAGS = -static + libcaf_single_la_DEPENDENCIES = caf/libcaf.h +--- a/src/libgfortran/Makefile.am 2012-01-09 17:02:36.000000000 +0100 ++++ b/src/libgfortran/Makefile.am 2012-12-08 08:49:41.957876998 +0100 +@@ -42,13 +42,13 @@ + libgfortran_la_DEPENDENCIES = $(version_dep) libgfortran.spec $(LIBQUADLIB_DEP) + + myexeclib_LTLIBRARIES = libgfortranbegin.la +-myexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR) ++myexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR) + libgfortranbegin_la_SOURCES = fmain.c + libgfortranbegin_la_LDFLAGS = -static + libgfortranbegin_la_LINK = $(LINK) $(libgfortranbegin_la_LDFLAGS) + + cafexeclib_LTLIBRARIES = libcaf_single.la +-cafexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR) ++cafexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR) + libcaf_single_la_SOURCES = caf/single.c + libcaf_single_la_LDFLAGS = -static + libcaf_single_la_DEPENDENCIES = caf/libcaf.h +--- a/src/lto-plugin/Makefile.in 2011-08-10 10:48:37.000000000 +0200 ++++ b/src/lto-plugin/Makefile.in 2012-12-08 09:00:17.861873944 +0100 +@@ -227,7 +227,7 @@ + ACLOCAL_AMFLAGS = -I .. -I ../config + AUTOMAKE_OPTIONS = no-dependencies + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) +-libexecsubdir := $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libexecsubdir := $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + AM_CPPFLAGS = -I$(top_srcdir)/../include $(DEFS) + AM_CFLAGS = @ac_lto_plugin_warn_cflags@ + AM_LIBTOOLFLAGS = --tag=disable-static +--- a/src/lto-plugin/Makefile.am 2011-08-10 10:48:37.000000000 +0200 ++++ b/src/lto-plugin/Makefile.am 2012-12-08 08:59:54.621875067 +0100 +@@ -5,7 +5,7 @@ + + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) + target_noncanonical := @target_noncanonical@ +-libexecsubdir := $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libexecsubdir := $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + + AM_CPPFLAGS = -I$(top_srcdir)/../include $(DEFS) + AM_CFLAGS = @ac_lto_plugin_warn_cflags@ +--- a/src/libitm/Makefile.in 2012-12-08 08:32:40.093881158 +0100 ++++ b/src/libitm/Makefile.in 2012-12-08 08:54:51.929875619 +0100 +@@ -306,8 +306,8 @@ + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) + abi_version = -fabi-version=4 + search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) +-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude +-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude ++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + AM_CPPFLAGS = $(addprefix -I, $(search_path)) + AM_CFLAGS = $(XCFLAGS) + AM_CXXFLAGS = $(XCFLAGS) -std=gnu++0x -funwind-tables -fno-exceptions \ +--- a/src/libitm/Makefile.am 2012-02-14 14:14:27.000000000 +0100 ++++ b/src/libitm/Makefile.am 2012-12-08 08:53:58.341873782 +0100 +@@ -11,8 +11,8 @@ + config_path = @config_path@ + search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) + +-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude +-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude ++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + + vpath % $(strip $(search_path)) + +--- a/src/gcc/gcc.c 2012-08-06 16:34:27.000000000 +0200 ++++ b/src/gcc/gcc.c 2012-12-08 08:42:06.353877392 +0100 +@@ -3621,7 +3621,7 @@ + GCC_EXEC_PREFIX is typically a directory name with a trailing + / (which is ignored by make_relative_prefix), so append a + program name. */ +- char *tmp_prefix = concat (gcc_exec_prefix, "gcc", NULL); ++ char *tmp_prefix = concat (gcc_exec_prefix, "gcc-cross", NULL); + gcc_libexec_prefix = get_relative_prefix (tmp_prefix, + standard_exec_prefix, + standard_libexec_prefix); +@@ -3647,15 +3647,15 @@ + { + int len = strlen (gcc_exec_prefix); + +- if (len > (int) sizeof ("/lib/gcc/") - 1 ++ if (len > (int) sizeof ("/lib/gcc-cross/") - 1 + && (IS_DIR_SEPARATOR (gcc_exec_prefix[len-1]))) + { +- temp = gcc_exec_prefix + len - sizeof ("/lib/gcc/") + 1; ++ temp = gcc_exec_prefix + len - sizeof ("/lib/gcc-cross/") + 1; + if (IS_DIR_SEPARATOR (*temp) + && filename_ncmp (temp + 1, "lib", 3) == 0 + && IS_DIR_SEPARATOR (temp[4]) +- && filename_ncmp (temp + 5, "gcc", 3) == 0) +- len -= sizeof ("/lib/gcc/") - 1; ++ && filename_ncmp (temp + 5, "gcc-cross", 3) == 0) ++ len -= sizeof ("/lib/gcc-cross/") - 1; + } + + set_std_prefix (gcc_exec_prefix, len); +--- a/src/gcc/Makefile.in 2012-12-08 08:32:41.337881153 +0100 ++++ b/src/gcc/Makefile.in 2012-12-08 08:36:18.493883559 +0100 +@@ -566,9 +566,9 @@ + # -------- + + # Directory in which the compiler finds libraries etc. +-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(version) ++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(version) + # Directory in which the compiler finds executables +-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(version) ++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(version) + # Directory in which all plugin resources are installed + plugin_resourcesdir = $(libsubdir)/plugin + # Directory in which plugin headers are installed +@@ -2079,8 +2079,8 @@ + + DRIVER_DEFINES = \ + -DSTANDARD_STARTFILE_PREFIX=\"$(unlibsubdir)/\" \ +- -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ +- -DSTANDARD_LIBEXEC_PREFIX=\"$(libexecdir)/gcc/\" \ ++ -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc-cross/\" \ ++ -DSTANDARD_LIBEXEC_PREFIX=\"$(libexecdir)/gcc-cross/\" \ + -DDEFAULT_TARGET_VERSION=\"$(version)\" \ + -DDEFAULT_TARGET_MACHINE=\"$(target_noncanonical)\" \ + -DSTANDARD_BINDIR_PREFIX=\"$(bindir)/\" \ +@@ -3980,7 +3980,7 @@ + -DTOOL_INCLUDE_DIR=\"$(gcc_tooldir)/include\" \ + -DNATIVE_SYSTEM_HEADER_DIR=\"$(NATIVE_SYSTEM_HEADER_DIR)\" \ + -DPREFIX=\"$(prefix)/\" \ +- -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ ++ -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc-cross/\" \ + @TARGET_SYSTEM_ROOT_DEFINE@ + + CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(FULLVER_s) +--- a/src/libssp/Makefile.in 2011-02-13 12:45:53.000000000 +0100 ++++ b/src/libssp/Makefile.in 2012-12-08 08:59:07.469875025 +0100 +@@ -259,7 +259,7 @@ + @LIBSSP_USE_SYMVER_SUN_TRUE@@LIBSSP_USE_SYMVER_TRUE@version_dep = ssp.map-sun + AM_CFLAGS = -Wall + toolexeclib_LTLIBRARIES = libssp.la libssp_nonshared.la +-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include ++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include + nobase_libsubinclude_HEADERS = ssp/ssp.h ssp/string.h ssp/stdio.h ssp/unistd.h + libssp_la_SOURCES = \ + ssp.c gets-chk.c memcpy-chk.c memmove-chk.c mempcpy-chk.c \ +--- a/src/libssp/Makefile.am 2010-12-06 01:50:04.000000000 +0100 ++++ b/src/libssp/Makefile.am 2012-12-08 08:58:51.241873553 +0100 +@@ -39,7 +39,7 @@ + toolexeclib_LTLIBRARIES = libssp.la libssp_nonshared.la + + target_noncanonical = @target_noncanonical@ +-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include ++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include + nobase_libsubinclude_HEADERS = ssp/ssp.h ssp/string.h ssp/stdio.h ssp/unistd.h + + libssp_la_SOURCES = \ +--- a/src/libquadmath/Makefile.in 2011-09-21 16:36:03.000000000 +0200 ++++ b/src/libquadmath/Makefile.in 2012-12-08 08:49:10.557875680 +0100 +@@ -319,7 +319,7 @@ + + @BUILD_LIBQUADMATH_TRUE@libquadmath_la_DEPENDENCIES = $(version_dep) $(libquadmath_la_LIBADD) + @BUILD_LIBQUADMATH_TRUE@nodist_libsubinclude_HEADERS = quadmath.h quadmath_weak.h +-@BUILD_LIBQUADMATH_TRUE@libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++@BUILD_LIBQUADMATH_TRUE@libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + @BUILD_LIBQUADMATH_TRUE@libquadmath_la_SOURCES = \ + @BUILD_LIBQUADMATH_TRUE@ math/acoshq.c math/fmodq.c math/acosq.c math/frexpq.c \ + @BUILD_LIBQUADMATH_TRUE@ math/rem_pio2q.c math/asinhq.c math/hypotq.c math/remainderq.c \ +--- a/src/libquadmath/Makefile.am 2011-09-21 16:36:03.000000000 +0200 ++++ b/src/libquadmath/Makefile.am 2012-12-08 08:48:25.553878276 +0100 +@@ -40,7 +40,7 @@ + libquadmath_la_DEPENDENCIES = $(version_dep) $(libquadmath_la_LIBADD) + + nodist_libsubinclude_HEADERS = quadmath.h quadmath_weak.h +-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + + libquadmath_la_SOURCES = \ + math/acoshq.c math/fmodq.c math/acosq.c math/frexpq.c \ +--- a/src/libobjc/Makefile.in 2011-11-02 16:28:43.000000000 +0100 ++++ b/src/libobjc/Makefile.in 2012-12-08 08:50:47.241873110 +0100 +@@ -51,7 +51,7 @@ + -include ../boehm-gc/threads.mk + + libdir = $(exec_prefix)/lib +-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + + # Multilib support variables. + MULTISRCTOP = +--- a/src/libada/Makefile.in 2012-08-06 16:34:27.000000000 +0200 ++++ b/src/libada/Makefile.in 2012-12-08 08:53:01.321876031 +0100 +@@ -62,7 +62,7 @@ + + target_noncanonical:=@target_noncanonical@ + version := $(shell cat $(srcdir)/../gcc/BASE-VER) +-libsubdir := $(libdir)/gcc/$(target_noncanonical)/$(version)$(MULTISUBDIR) ++libsubdir := $(libdir)/gcc-cross/$(target_noncanonical)/$(version)$(MULTISUBDIR) + ADA_RTS_DIR=$(GCC_DIR)/ada/rts$(subst /,_,$(MULTISUBDIR)) + ADA_RTS_SUBDIR=./rts$(subst /,_,$(MULTISUBDIR)) + +--- a/src/libgomp/Makefile.in 2012-09-20 09:23:55.000000000 +0200 ++++ b/src/libgomp/Makefile.in 2012-12-08 08:45:32.157878288 +0100 +@@ -291,8 +291,8 @@ + SUBDIRS = testsuite + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) + search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) +-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude +-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude ++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + AM_CPPFLAGS = $(addprefix -I, $(search_path)) + AM_CFLAGS = $(XCFLAGS) + AM_LDFLAGS = $(XLDFLAGS) $(SECTION_LDFLAGS) $(OPT_LDFLAGS) +--- a/src/libgomp/Makefile.am 2012-02-27 14:51:50.000000000 +0100 ++++ b/src/libgomp/Makefile.am 2012-12-08 08:44:48.913867574 +0100 +@@ -9,8 +9,8 @@ + config_path = @config_path@ + search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) + +-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude +-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude ++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + + vpath % $(strip $(search_path)) + +--- a/src/libgcc/Makefile.in 2012-12-08 08:32:41.249881153 +0100 ++++ b/src/libgcc/Makefile.in 2012-12-08 08:43:50.201879083 +0100 +@@ -178,7 +178,7 @@ + STRIP_FOR_TARGET = $(STRIP) + + # Directory in which the compiler finds libraries etc. +-libsubdir = $(libdir)/gcc/$(host_noncanonical)/$(version) ++libsubdir = $(libdir)/gcc-cross/$(host_noncanonical)/$(version) + # Used to install the shared libgcc. + slibdir = @slibdir@ + # Maybe used for DLLs on Windows targets. +--- a/src/libjava/Makefile.in 2012-12-08 08:32:41.249881153 +0100 ++++ b/src/libjava/Makefile.in 2012-12-08 08:51:43.365881984 +0100 +@@ -785,8 +785,8 @@ + + + # This is required by TL_AC_GXX_INCLUDE_DIR. +-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version) +-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) ++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + toolexeclib_LTLIBRARIES = libgcj.la libgij.la libgcj-tools.la \ + $(am__append_2) $(am__append_3) $(am__append_4) + toolexecmainlib_DATA = libgcj.spec +--- a/src/libjava/Makefile.am 2012-12-08 08:32:41.241881153 +0100 ++++ b/src/libjava/Makefile.am 2012-12-08 08:51:13.481876463 +0100 +@@ -34,9 +34,9 @@ + target_noncanonical = @target_noncanonical@ + + # This is required by TL_AC_GXX_INCLUDE_DIR. +-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + +-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + + ## + ## What gets installed, and where. +--- a/src/libffi/include/Makefile.am 2006-09-12 18:51:43.000000000 +0200 ++++ b/src/libffi/include/Makefile.am 2012-12-08 09:42:12.313863513 +0100 +@@ -7,6 +7,6 @@ + + # Where generated headers like ffitarget.h get installed. + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) +-toollibffidir := $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++toollibffidir := $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + + toollibffi_HEADERS = ffi.h ffitarget.h +--- a/src/libffi/include/Makefile.in 2012-12-08 09:12:36.913870891 +0100 ++++ b/src/libffi/include/Makefile.in 2012-12-08 09:42:24.901862621 +0100 +@@ -213,7 +213,7 @@ + + # Where generated headers like ffitarget.h get installed. + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) +-toollibffidir := $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++toollibffidir := $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + toollibffi_HEADERS = ffi.h ffitarget.h + all: all-am + --- gcc-4.8-4.8.5.orig/debian/patches/cross-ma-install-location.diff +++ gcc-4.8-4.8.5/debian/patches/cross-ma-install-location.diff @@ -0,0 +1,326 @@ +--- a/src/boehm-gc/configure.ac ++++ b/src/boehm-gc/configure.ac +@@ -498,14 +498,8 @@ + AC_DEFINE(USE_MMAP, 1, [use MMAP instead of sbrk to get new memory]) + fi + +-if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- toolexecdir='$(exec_prefix)/$(target_noncanonical)' +- toolexeclibdir='$(toolexecdir)/lib' +-else +- toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' +- toolexeclibdir='$(libdir)' +-fi ++toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' ++toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libada/configure.ac ++++ b/src/libada/configure.ac +@@ -65,15 +65,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libffi/configure.ac ++++ b/src/libffi/configure.ac +@@ -486,14 +486,9 @@ + AC_DEFINE(USING_PURIFY, 1, [Define this if you are using Purify and want to suppress spurious messages.]) + fi) + +-if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +-else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +-fi ++toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++toolexeclibdir='$(libdir)' ++ + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libgcc/configure.ac ++++ b/src/libgcc/configure.ac +@@ -85,8 +85,6 @@ + slibdir="$with_slibdir", + if test "${version_specific_libs}" = yes; then + slibdir='$(libsubdir)' +-elif test -n "$with_cross_host" && test x"$with_cross_host" != x"no"; then +- slibdir='$(exec_prefix)/$(host_noncanonical)/lib' + else + slibdir='$(libdir)' + fi) +@@ -131,15 +129,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_noncanonical)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libgfortran/configure.ac ++++ b/src/libgfortran/configure.ac +@@ -98,15 +98,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libgo/configure.ac ++++ b/src/libgo/configure.ac +@@ -77,14 +77,8 @@ + + # Calculate glibgo_toolexecdir, glibgo_toolexeclibdir + # Install a library built with a cross compiler in tooldir, not libdir. +-if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- nover_glibgo_toolexecdir='${exec_prefix}/${host_alias}' +- nover_glibgo_toolexeclibdir='${toolexecdir}/lib' +-else +- nover_glibgo_toolexecdir='${libdir}/gcc/${host_alias}' +- nover_glibgo_toolexeclibdir='${libdir}' +-fi ++nover_glibgo_toolexecdir='${libdir}/gcc/${host_alias}' ++nover_glibgo_toolexeclibdir='${libdir}' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libgomp/configure.ac ++++ b/src/libgomp/configure.ac +@@ -76,15 +76,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libitm/configure.ac ++++ b/src/libitm/configure.ac +@@ -90,15 +90,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -1566,15 +1566,8 @@ + toolexeclibdir=$toolexecmainlibdir + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_noncanonical)' +- toolexecmainlibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' +- toolexecmainlibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' ++ toolexecmainlibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) toolexeclibdir=$toolexecmainlibdir ;; # Avoid trailing /. +--- a/src/libobjc/configure.ac ++++ b/src/libobjc/configure.ac +@@ -109,15 +109,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_noncanonical)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libquadmath/configure.ac ++++ b/src/libquadmath/configure.ac +@@ -93,15 +93,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libssp/configure.ac ++++ b/src/libssp/configure.ac +@@ -170,15 +170,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libstdc++-v3/acinclude.m4 ++++ b/src/libstdc++-v3/acinclude.m4 +@@ -840,14 +840,8 @@ + # Calculate glibcxx_toolexecdir, glibcxx_toolexeclibdir + # Install a library built with a cross compiler in tooldir, not libdir. + if test x"$glibcxx_toolexecdir" = x"no"; then +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- glibcxx_toolexecdir='${exec_prefix}/${host_alias}' +- glibcxx_toolexeclibdir='${toolexecdir}/lib' +- else +- glibcxx_toolexecdir='${libdir}/gcc/${host_alias}' +- glibcxx_toolexeclibdir='${libdir}' +- fi ++ glibcxx_toolexecdir='${libdir}/gcc/${host_alias}' ++ glibcxx_toolexeclibdir='${libdir}' + multi_os_directory=`$CXX -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/zlib/configure.ac ++++ b/src/zlib/configure.ac +@@ -91,14 +91,9 @@ + + AC_CHECK_HEADERS(unistd.h) + +-if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +-else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +-fi ++toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++toolexeclibdir='$(libdir)' ++ + if test "$GCC" = yes && $CC -print-multi-os-directory > /dev/null 2>&1; then + multiosdir=/`$CC -print-multi-os-directory` + case $multiosdir in +--- a/src/libatomic/configure.ac ++++ b/src/libatomic/configure.ac +@@ -96,15 +96,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libsanitizer/configure.ac ++++ b/src/libsanitizer/configure.ac +@@ -38,15 +38,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. --- gcc-4.8-4.8.5.orig/debian/patches/cross-no-locale-include.diff +++ gcc-4.8-4.8.5/debian/patches/cross-no-locale-include.diff @@ -0,0 +1,17 @@ +# DP: Don't add /usr/local/include for cross compilers. Assume that +# DP: /usr/include is ready for multiarch, but not /usr/local/include. + +--- a/src/gcc/cppdefault.c ++++ b/src/gcc/cppdefault.c +@@ -66,8 +66,11 @@ + #ifdef LOCAL_INCLUDE_DIR + /* /usr/local/include comes before the fixincluded header files. */ + { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 2 }, ++#if 0 ++ /* Unsafe to assume that /usr/local/include is ready for multiarch. */ + { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 }, + #endif ++#endif + #ifdef PREFIX_INCLUDE_DIR + { PREFIX_INCLUDE_DIR, 0, 0, 1, 0, 0 }, + #endif --- gcc-4.8-4.8.5.orig/debian/patches/dejagnu-1.6-fix.diff +++ gcc-4.8-4.8.5/debian/patches/dejagnu-1.6-fix.diff @@ -0,0 +1,19 @@ +# DP: Fix libjava testsuite with dejagnu 1.6, taken from the trunk. + +2016-04-20 Ben Elliston + + * testsuite/lib/libjava.exp (libjava_arguments): Use 'file + normalize' rather than the defunct DejaGnu 'absolute' proc. + + +--- a/src/libjava/testsuite/lib/libjava.exp ++++ b/src/libjava/testsuite/lib/libjava.exp +@@ -416,7 +416,7 @@ + + # Search for libtool. We need it to link. + set found_compiler 0 +- set d [absolute $objdir] ++ set d [file normalize $objdir] + foreach x {. .. ../.. ../../..} { + if {[file exists $d/$x/libtool]} then { + # We have to run silently to avoid DejaGNU lossage. --- gcc-4.8-4.8.5.orig/debian/patches/disable-gdc-tests.diff +++ gcc-4.8-4.8.5/debian/patches/disable-gdc-tests.diff @@ -0,0 +1,15 @@ +# DP: Disable D tests, hang on many buildds + +--- a/src/gcc/d/Make-lang.in ++++ b/src/gcc/d/Make-lang.in +@@ -358,8 +358,8 @@ + # entry point. We feed the former to the latter here. + check-d: check-gdc + # List of targets that can use the generic check- rule and its // variant. +-lang_checks += check-gdc +-lang_checks_parallelized += check-gdc ++#lang_checks += check-gdc ++#lang_checks_parallelized += check-gdc + # For description see comment above check_gcc_parallelize in gcc/Makefile.in. + check_gdc_parallelize = d_do_test.exp=runnable/* + --- gcc-4.8-4.8.5.orig/debian/patches/fix-ffi_call_VFP-with-no-VFP-argument.diff +++ gcc-4.8-4.8.5/debian/patches/fix-ffi_call_VFP-with-no-VFP-argument.diff @@ -0,0 +1,12 @@ +# DP: armhf: Fix ffi_call_VFP with no VFP arguments. + +--- a/src/libffi/src/arm/sysv.S ++++ b/src/libffi/src/arm/sysv.S +@@ -368,6 +368,7 @@ ARM_FUNC_START ffi_call_VFP + + @ Load VFP register args if needed + cmp r0, #0 ++ mov ip, fp + beq LSYM(Lbase_args) + + @ Load only d0 if possible --- gcc-4.8-4.8.5.orig/debian/patches/g++-multiarch-incdir.diff +++ gcc-4.8-4.8.5/debian/patches/g++-multiarch-incdir.diff @@ -0,0 +1,119 @@ +# DP: Use /usr/include//c++/4.x as the include directory +# DP: for host dependent c++ header files. + +Index: b/src/libstdc++-v3/include/Makefile.am +=================================================================== +--- a/src/libstdc++-v3/include/Makefile.am ++++ b/src/libstdc++-v3/include/Makefile.am +@@ -828,7 +828,7 @@ endif + host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) + default_host_alias = @default_host_alias@ + host_builddir = ./${default_host_alias}/bits +-host_installdir = ${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits ++host_installdir = $(if $(shell $(CC) -print-multiarch),/usr/include/$(shell $(filter-out -m%,$(CC)) -print-multiarch)/c++/$(notdir ${gxx_include_dir})$(MULTISUBDIR)/bits,${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits) + host_headers = \ + ${host_srcdir}/ctype_base.h \ + ${host_srcdir}/ctype_inline.h \ +Index: b/src/libstdc++-v3/include/Makefile.in +=================================================================== +--- a/src/libstdc++-v3/include/Makefile.in ++++ b/src/libstdc++-v3/include/Makefile.in +@@ -1083,7 +1083,7 @@ profile_impl_headers = \ + @GLIBCXX_C_HEADERS_COMPATIBILITY_TRUE@c_compatibility_headers_extra = ${c_compatibility_headers} + host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) + host_builddir = ./${default_host_alias}/bits +-host_installdir = ${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits ++host_installdir = $(if $(shell $(CC) -print-multiarch),/usr/include/$(shell $(filter-out -m%,$(CC)) -print-multiarch)/c++/$(notdir ${gxx_include_dir})$(MULTISUBDIR)/bits,${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits) + host_headers = \ + ${host_srcdir}/ctype_base.h \ + ${host_srcdir}/ctype_inline.h \ +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -1107,6 +1107,7 @@ FLAGS_TO_PASS = \ + "prefix=$(prefix)" \ + "local_prefix=$(local_prefix)" \ + "gxx_include_dir=$(gcc_gxx_include_dir)" \ ++ "gxx_tool_include_dir=$(gcc_gxx_tool_include_dir)" \ + "build_tooldir=$(build_tooldir)" \ + "gcc_tooldir=$(gcc_tooldir)" \ + "bindir=$(bindir)" \ +@@ -1543,6 +1544,14 @@ ifneq ($(xmake_file),) + include $(xmake_file) + endif + ++# Directory in which the compiler finds target-dependent g++ includes. ++ifneq ($(call if_multiarch,non-empty),) ++ gcc_gxx_tool_include_dir = /usr/include/$(MULTIARCH_DIRNAME)/c++/$(BASEVER_c) ++else ++ gcc_gxx_tool_include_dir = $(gcc_gxx_include_dir)/$(target_noncanonical) ++endif ++ ++ + # all-tree.def includes all the tree.def files. + all-tree.def: s-alltree; @true + s-alltree: Makefile +@@ -3987,7 +3996,7 @@ PREPROCESSOR_DEFINES = \ + -DFIXED_INCLUDE_DIR=\"$(libsubdir)/include-fixed\" \ + -DGPLUSPLUS_INCLUDE_DIR=\"$(gcc_gxx_include_dir)\" \ + -DGPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT=$(gcc_gxx_include_dir_add_sysroot) \ +- -DGPLUSPLUS_TOOL_INCLUDE_DIR=\"$(gcc_gxx_include_dir)/$(target_noncanonical)\" \ ++ -DGPLUSPLUS_TOOL_INCLUDE_DIR=\"$(gcc_gxx_tool_include_dir)\" \ + -DGPLUSPLUS_BACKWARD_INCLUDE_DIR=\"$(gcc_gxx_include_dir)/backward\" \ + -DLOCAL_INCLUDE_DIR=\"$(local_includedir)\" \ + -DCROSS_INCLUDE_DIR=\"$(CROSS_SYSTEM_HEADER_DIR)\" \ +Index: b/src/gcc/cppdefault.c +=================================================================== +--- a/src/gcc/cppdefault.c ++++ b/src/gcc/cppdefault.c +@@ -49,6 +49,8 @@ const struct default_include cpp_include + /* Pick up GNU C++ target-dependent include files. */ + { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, + GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 1 }, ++ { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, ++ GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 2 }, + #endif + #ifdef GPLUSPLUS_BACKWARD_INCLUDE_DIR + /* Pick up GNU C++ backward and deprecated include files. */ +Index: b/src/gcc/incpath.c +=================================================================== +--- a/src/gcc/incpath.c ++++ b/src/gcc/incpath.c +@@ -160,6 +160,18 @@ add_standard_paths (const char *sysroot, + } + str = reconcat (str, str, dir_separator_str, + imultiarch, NULL); ++ if (p->cplusplus) ++ { ++ char *suffix = strstr (str, "/c++/"); ++ *suffix++ = '\0'; ++ suffix = xstrdup (suffix); ++ str = reconcat (str, str, dir_separator_str, ++ imultiarch, ++ dir_separator_str, suffix, NULL); ++ } ++ else ++ str = reconcat (str, str, dir_separator_str, ++ imultiarch, NULL); + } + add_path (str, SYSTEM, p->cxx_aware, false); + } +@@ -224,7 +236,16 @@ add_standard_paths (const char *sysroot, + free (str); + continue; + } +- str = reconcat (str, str, dir_separator_str, imultiarch, NULL); ++ if (p->cplusplus) ++ { ++ char *suffix = strstr (str, "/c++/"); ++ *suffix++ = '\0'; ++ suffix = xstrdup (suffix); ++ str = reconcat (str, str, dir_separator_str, imultiarch, ++ dir_separator_str, suffix, NULL); ++ } ++ else ++ str = reconcat (str, str, dir_separator_str, imultiarch, NULL); + } + + add_path (str, SYSTEM, p->cxx_aware, false); --- gcc-4.8-4.8.5.orig/debian/patches/gcc-as-needed.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-as-needed.diff @@ -0,0 +1,965 @@ +# DP: On linux targets pass --as-needed by default to the linker. + +Index: b/src/gcc/config/aarch64/aarch64-linux.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-linux.h ++++ b/src/gcc/config/aarch64/aarch64-linux.h +@@ -27,6 +27,7 @@ + + #define LINUX_TARGET_LINK_SPEC "%{h*} \ + --hash-style=gnu \ ++ --as-needed \ + %{static:-Bstatic} \ + %{shared:-shared} \ + %{symbolic:-Bsymbolic} \ +Index: b/src/gcc/config/ia64/linux.h +=================================================================== +--- a/src/gcc/config/ia64/linux.h ++++ b/src/gcc/config/ia64/linux.h +@@ -58,7 +58,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC " --hash-style=gnu \ ++#define LINK_SPEC " --hash-style=gnu --as-needed \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/sparc/linux.h +=================================================================== +--- a/src/gcc/config/sparc/linux.h ++++ b/src/gcc/config/sparc/linux.h +@@ -86,7 +86,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC "-m elf32_sparc --hash-style=gnu %{shared:-shared} \ ++#define LINK_SPEC "-m elf32_sparc --hash-style=gnu --as-needed %{shared:-shared} \ + %{!mno-relax:%{!r:-relax}} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/s390/linux.h +=================================================================== +--- a/src/gcc/config/s390/linux.h ++++ b/src/gcc/config/s390/linux.h +@@ -65,7 +65,7 @@ + + #undef LINK_SPEC + #define LINK_SPEC \ +- "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu \ ++ "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu --as-needed \ + %{shared:-shared} \ + %{!shared: \ + %{static:-static} \ +Index: b/src/gcc/config/rs6000/linux64.h +=================================================================== +--- a/src/gcc/config/rs6000/linux64.h ++++ b/src/gcc/config/rs6000/linux64.h +@@ -416,11 +416,11 @@ + " -m elf64ppc") + #endif + +-#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=gnu %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=gnu --as-needed %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}" + +-#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=gnu %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=gnu --as-needed %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}" + +Index: b/src/gcc/config/rs6000/sysv4.h +=================================================================== +--- a/src/gcc/config/rs6000/sysv4.h ++++ b/src/gcc/config/rs6000/sysv4.h +@@ -773,7 +773,7 @@ + #define GNU_USER_DYNAMIC_LINKER \ + CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER) + +-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu --as-needed %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" + +Index: b/src/gcc/config/i386/gnu-user64.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user64.h ++++ b/src/gcc/config/i386/gnu-user64.h +@@ -57,6 +57,7 @@ + %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \ + %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \ + --hash-style=gnu \ ++ --as-needed \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/i386/gnu-user.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user.h ++++ b/src/gcc/config/i386/gnu-user.h +@@ -74,7 +74,7 @@ + { "link_emulation", GNU_USER_LINK_EMULATION },\ + { "dynamic_linker", GNU_USER_DYNAMIC_LINKER } + +-#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{shared:-shared} \ ++#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=gnu --as-needed %{shared:-shared} \ + %{!shared: \ + %{!static: \ + %{rdynamic:-export-dynamic} \ +Index: b/src/gcc/config/alpha/linux-elf.h +=================================================================== +--- a/src/gcc/config/alpha/linux-elf.h ++++ b/src/gcc/config/alpha/linux-elf.h +@@ -37,7 +37,7 @@ + + #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER + +-#define LINK_SPEC "-m elf64alpha --hash-style=gnu %{G*} %{relax:-relax} \ ++#define LINK_SPEC "-m elf64alpha --hash-style=gnu --as-needed %{G*} %{relax:-relax} \ + %{O*:-O3} %{!O*:-O1} \ + %{shared:-shared} \ + %{!shared: \ +Index: b/src/gcc/config/arm/linux-elf.h +=================================================================== +--- a/src/gcc/config/arm/linux-elf.h ++++ b/src/gcc/config/arm/linux-elf.h +@@ -68,6 +68,7 @@ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "} \ + -X \ + --hash-style=gnu \ ++ --as-needed \ + %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ + SUBTARGET_EXTRA_LINK_SPEC + +Index: b/src/gcc/config/mips/gnu-user.h +=================================================================== +--- a/src/gcc/config/mips/gnu-user.h ++++ b/src/gcc/config/mips/gnu-user.h +@@ -56,6 +56,7 @@ + #undef GNU_USER_TARGET_LINK_SPEC + #define GNU_USER_TARGET_LINK_SPEC \ + "%(endian_spec) \ ++ -as-needed \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/mips/gnu-user64.h +=================================================================== +--- a/src/gcc/config/mips/gnu-user64.h ++++ b/src/gcc/config/mips/gnu-user64.h +@@ -34,6 +34,7 @@ + #define GNU_USER_TARGET_LINK_SPEC "\ + %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} \ + %{shared} \ ++ -as-needed \ + %(endian_spec) \ + %{!shared: \ + %{!static: \ +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -625,7 +625,7 @@ + rm .libs/libgcj_bc.so; \ + mv .libs/libgcj_bc.so.1.0.0 .libs/libgcj_bc.so; \ + $(libgcj_bc_dummy_LINK) -xc /dev/null -Wl,-soname,libgcj_bc.so.1 \ +- -o .libs/libgcj_bc.so.1.0.0 -lgcj || exit; \ ++ -o .libs/libgcj_bc.so.1.0.0 -Wl,--no-as-needed -lgcj || exit; \ + rm .libs/libgcj_bc.so.1; \ + $(LN_S) libgcj_bc.so.1.0.0 .libs/libgcj_bc.so.1 + +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -10573,7 +10573,7 @@ + rm .libs/libgcj_bc.so; \ + mv .libs/libgcj_bc.so.1.0.0 .libs/libgcj_bc.so; \ + $(libgcj_bc_dummy_LINK) -xc /dev/null -Wl,-soname,libgcj_bc.so.1 \ +- -o .libs/libgcj_bc.so.1.0.0 -lgcj || exit; \ ++ -o .libs/libgcj_bc.so.1.0.0 -Wl,--no-as-needed -lgcj || exit; \ + rm .libs/libgcj_bc.so.1; \ + $(LN_S) libgcj_bc.so.1.0.0 .libs/libgcj_bc.so.1 + +Index: b/src/libstdc++-v3/testsuite/30_threads/try_lock/2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/try_lock/2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/try_lock/2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/try_lock/4.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/try_lock/4.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/try_lock/4.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/condition_variable/54185.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/condition_variable/54185.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable/54185.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* *-*-solaris* *-*-cygwin *-*-darwin1[1-9]* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/1.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/1.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/1.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/wait_for.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/shared_future/members/wait_for.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/wait_for.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/get.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/shared_future/members/get.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/get.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/wait_until.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/shared_future/members/wait_until.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/wait_until.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/valid.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/shared_future/members/valid.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/valid.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/get2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/shared_future/members/get2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/get2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/wait.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/shared_future/members/wait.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/shared_future/members/wait.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/condition_variable_any/50862.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/condition_variable_any/50862.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable_any/50862.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/condition_variable_any/members/1.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/condition_variable_any/members/1.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable_any/members/1.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/condition_variable_any/members/2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/condition_variable_any/members/2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable_any/members/2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/mutex/try_lock/2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/mutex/try_lock/2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/mutex/try_lock/2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/async/any.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/async/any.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/async/any.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/async/42819.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/async/42819.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/async/42819.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/async/sync.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/async/sync.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/async/sync.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/async/async.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/async/async.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/async/async.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/async/49668.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/async/49668.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/async/49668.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/promise/members/set_value.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/promise/members/set_value.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/promise/members/set_value.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/promise/members/set_exception2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/promise/members/set_exception2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/promise/members/set_exception2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/promise/members/set_exception.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/promise/members/set_exception.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/promise/members/set_exception.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/promise/members/set_value2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/promise/members/set_value2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/promise/members/set_value2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/promise/members/get_future.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/promise/members/get_future.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/promise/members/get_future.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/promise/members/swap.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/promise/members/swap.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/promise/members/swap.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/promise/members/set_value3.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/promise/members/set_value3.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/promise/members/set_value3.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/promise/cons/move_assign.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/promise/cons/move_assign.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/promise/cons/move_assign.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/promise/cons/alloc.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/promise/cons/alloc.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/promise/cons/alloc.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/promise/cons/move.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/promise/cons/move.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/promise/cons/move.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/call_once/39909.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/call_once/39909.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/call_once/39909.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/call_once/49668.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/call_once/49668.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/call_once/49668.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/call_once/call_once1.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/call_once/call_once1.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/call_once/call_once1.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/packaged_task/cons/alloc.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/cons/alloc.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/cons/alloc.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/packaged_task/cons/3.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/cons/3.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/cons/3.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/packaged_task/49668.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/49668.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/49668.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/get_future.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/get_future.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/get_future.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke3.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke3.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke3.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke4.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke4.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke4.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke5.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke5.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke5.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/invoke.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/reset2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/reset2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/members/reset2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock/2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock/2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock/2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock_for/3.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock_for/3.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock_for/3.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock_until/2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock_until/2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock_until/2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/lock/2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/lock/2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/lock/2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/lock/4.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/lock/4.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/lock/4.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/this_thread/1.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/this_thread/1.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/this_thread/1.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/members/1.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/members/1.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/members/1.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/members/2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/members/2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/members/2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/members/3.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/members/3.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/members/3.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/swap/1.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/swap/1.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/swap/1.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/cons/moveable.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/cons/moveable.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/cons/moveable.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/cons/49668.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/cons/49668.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/cons/49668.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/cons/2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/cons/2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/cons/2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/cons/3.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/cons/3.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/cons/3.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/cons/4.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/cons/4.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/cons/4.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/cons/5.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/cons/5.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/cons/5.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/cons/6.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/cons/6.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/cons/6.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/cons/7.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/cons/7.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/cons/7.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/cons/8.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/cons/8.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/cons/8.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/thread/cons/9.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/thread/cons/9.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/thread/cons/9.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/future/members/valid.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/future/members/valid.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/future/members/valid.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/future/members/get2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/future/members/get2.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/future/members/get2.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/future/members/share.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/future/members/share.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/future/members/share.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/future/members/wait.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/future/members/wait.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/future/members/wait.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/future/members/wait_for.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/future/members/wait_for.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/future/members/wait_for.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/future/members/get.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/future/members/get.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/future/members/get.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/future/members/45133.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/future/members/45133.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/future/members/45133.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: b/src/libstdc++-v3/testsuite/30_threads/future/members/wait_until.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/future/members/wait_until.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/future/members/wait_until.cc +@@ -1,5 +1,5 @@ + // { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } ++// { dg-options " -std=gnu++0x -pthread -Wl,--no-as-needed" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } --- gcc-4.8-4.8.5.orig/debian/patches/gcc-auto-build.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-auto-build.diff @@ -0,0 +1,13 @@ +# DP: Fix cross building a native compiler. + +--- a/src/gcc/configure.ac ++++ b/src/gcc/configure.ac +@@ -1516,7 +1516,7 @@ + /* | [A-Za-z]:[\\/]* ) realsrcdir=${srcdir};; + *) realsrcdir=../${srcdir};; + esac +- CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \ ++ CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD} -DGENERATOR_FILE" \ + LDFLAGS="${LDFLAGS_FOR_BUILD}" GMPINC="" \ + ${realsrcdir}/configure \ + --enable-languages=${enable_languages-all} \ --- gcc-4.8-4.8.5.orig/debian/patches/gcc-base-version-linaro.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-base-version-linaro.diff @@ -0,0 +1,178 @@ +# DP: Set base version to 4.8, introduce full version 4.8.x. + +Index: b/src/gcc/BASE-VER +=================================================================== +--- a/src/gcc/BASE-VER ++++ b/src/gcc/BASE-VER +@@ -1 +1 @@ +-4.8.5 ++4.8 +Index: b/src/gcc/FULL-VER +=================================================================== +--- /dev/null ++++ b/src/gcc/FULL-VER +@@ -0,0 +1 @@ ++4.8.5 +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -796,11 +796,13 @@ GTM_H = tm.h $(tm_file_list) in + TM_H = $(GTM_H) insn-flags.h $(OPTIONS_H) + + # Variables for version information. +-BASEVER := $(srcdir)/BASE-VER # 4.x.y ++FULLVER := $(srcdir)/FULL-VER # 4.x.y ++BASEVER := $(srcdir)/BASE-VER # 4.x + DEVPHASE := $(srcdir)/DEV-PHASE # experimental, prerelease, "" + DATESTAMP := $(srcdir)/DATESTAMP # YYYYMMDD or empty + REVISION := $(srcdir)/REVISION # [BRANCH revision XXXXXX] + ++FULLVER_c := $(shell cat $(FULLVER)) + BASEVER_c := $(shell cat $(BASEVER)) + DEVPHASE_c := $(shell cat $(DEVPHASE)) + DATESTAMP_c := $(shell cat $(DATESTAMP)) +@@ -819,7 +821,7 @@ version := $(BASEVER_c) + # development phase collapsed to the empty string in release mode + # (i.e. if DEVPHASE_c is empty). The space immediately after the + # comma in the $(if ...) constructs is significant - do not remove it. +-BASEVER_s := "\"$(BASEVER_c)\"" ++FULLVER_s := "\"$(FULLVER_c)\"" + DEVPHASE_s := "\"$(if $(DEVPHASE_c), ($(DEVPHASE_c)))\"" + DATESTAMP_s := "\"$(if $(DEVPHASE_c), $(DATESTAMP_c))\"" + PKGVERSION_s:= "\"@PKGVERSION@\"" +@@ -2021,9 +2023,9 @@ incpath.o: incpath.c incpath.h $(CONFIG_ + intl.h prefix.h coretypes.h $(TM_H) cppdefault.h $(TARGET_H) \ + $(MACHMODE_H) + +-CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(BASEVER_s) ++CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(FULLVER_s) + prefix.o: prefix.c $(CONFIG_H) $(SYSTEM_H) coretypes.h prefix.h \ +- $(COMMON_TARGET_H) Makefile $(BASEVER) ++ $(COMMON_TARGET_H) Makefile $(FULLVER) + + # Language-independent files. + +@@ -2091,11 +2093,11 @@ options-save.o: options-save.c $(CONFIG_ + + dumpvers: dumpvers.c + +-CFLAGS-version.o += -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++CFLAGS-version.o += -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ + -DREVISION=$(REVISION_s) \ + -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ + -DBUGURL=$(BUGURL_s) +-version.o: version.c version.h $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++version.o: version.c version.h $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) + + gtype-desc.o: gtype-desc.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(HASHTAB_H) $(SPLAY_TREE_H) $(OBSTACK_H) $(BITMAP_H) \ +@@ -2680,10 +2682,10 @@ common/common-targhooks.o : common/commo + coretypes.h $(INPUT_H) $(TM_H) $(COMMON_TARGET_H) common/common-targhooks.h + + bversion.h: s-bversion; @true +-s-bversion: BASE-VER +- echo "#define BUILDING_GCC_MAJOR `echo $(BASEVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h +- echo "#define BUILDING_GCC_MINOR `echo $(BASEVER_c) | sed -e 's/^[0-9]*\.\([0-9]*\).*$$/\1/'`" >> bversion.h +- echo "#define BUILDING_GCC_PATCHLEVEL `echo $(BASEVER_c) | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$$/\1/'`" >> bversion.h ++s-bversion: FULL-VER ++ echo "#define BUILDING_GCC_MAJOR `echo $(FULLVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h ++ echo "#define BUILDING_GCC_MINOR `echo $(FULLVER_c) | sed -e 's/^[0-9]*\.\([0-9]*\).*$$/\1/'`" >> bversion.h ++ echo "#define BUILDING_GCC_PATCHLEVEL `echo $(FULLVER_c) | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$$/\1/'`" >> bversion.h + echo "#define BUILDING_GCC_VERSION (BUILDING_GCC_MAJOR * 1000 + BUILDING_GCC_MINOR)" >> bversion.h + $(STAMP) s-bversion + +@@ -3799,9 +3801,9 @@ build/%.o : # dependencies provided by + ## build/version.o is compiled by the $(COMPILER_FOR_BUILD) but needs + ## several C macro definitions, just like version.o + build/version.o: version.c version.h \ +- $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++ $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) + $(COMPILER_FOR_BUILD) -c $(BUILD_COMPILERFLAGS) $(BUILD_CPPFLAGS) \ +- -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++ -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ + -DREVISION=$(REVISION_s) \ + -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ + -DBUGURL=$(BUGURL_s) -o $@ $< +@@ -3995,7 +3997,7 @@ PREPROCESSOR_DEFINES = \ + -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ + @TARGET_SYSTEM_ROOT_DEFINE@ + +-CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) ++CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(FULLVER_s) + cppbuiltin.o: $(BASEVER) + + CFLAGS-cppdefault.o += $(PREPROCESSOR_DEFINES) +@@ -4014,8 +4016,8 @@ build/gcov-iov$(build_exeext): build/gco + build/gcov-iov.o -o $@ + + gcov-iov.h: s-iov +-s-iov: build/gcov-iov$(build_exeext) $(BASEVER) $(DEVPHASE) +- build/gcov-iov$(build_exeext) '$(BASEVER_c)' '$(DEVPHASE_c)' \ ++s-iov: build/gcov-iov$(build_exeext) $(FULLVER) $(DEVPHASE) ++ build/gcov-iov$(build_exeext) '$(FULLVER_c)' '$(DEVPHASE_c)' \ + > tmp-gcov-iov.h + $(SHELL) $(srcdir)/../move-if-change tmp-gcov-iov.h gcov-iov.h + $(STAMP) s-iov +@@ -4281,8 +4283,8 @@ TEXI_GCCINSTALL_FILES = install.texi ins + TEXI_CPPINT_FILES = cppinternals.texi gcc-common.texi gcc-vers.texi + + # gcc-vers.texi is generated from the version files. +-gcc-vers.texi: $(BASEVER) $(DEVPHASE) +- (echo "@set version-GCC $(BASEVER_c)"; \ ++gcc-vers.texi: $(FULLVER) $(DEVPHASE) ++ (echo "@set version-GCC $(FULLVER_c)"; \ + if [ "$(DEVPHASE_c)" = "experimental" ]; \ + then echo "@set DEVELOPMENT"; \ + else echo "@clear DEVELOPMENT"; \ +@@ -4660,9 +4662,11 @@ install-common: native lang.install-comm + install-driver: installdirs xgcc$(exeext) + -rm -f $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) + -$(INSTALL_PROGRAM) xgcc$(exeext) $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) ++ifneq ($(GCC_INSTALL_NAME),$(target_noncanonical)-gcc-$(version)) + -rm -f $(DESTDIR)$(bindir)/$(target_noncanonical)-gcc-$(version)$(exeext) + -( cd $(DESTDIR)$(bindir) && \ + $(LN) $(GCC_INSTALL_NAME)$(exeext) $(target_noncanonical)-gcc-$(version)$(exeext) ) ++endif + -if [ -f gcc-cross$(exeext) ] ; then \ + if [ -d $(DESTDIR)$(gcc_tooldir)/bin/. ] ; then \ + rm -f $(DESTDIR)$(gcc_tooldir)/bin/gcc$(exeext); \ +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -772,7 +772,7 @@ install_data_local_split = 50 + install-data-local: + $(PRE_INSTALL) + ## Install the .pc file. +- @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ ++ @pc_version=$(GCJVERSION); \ + file="libgcj-$${pc_version}.pc"; \ + $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ + echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -12426,7 +12426,7 @@ install-exec-hook: install-binPROGRAMS i + @BUILD_ECJ1_TRUE@ mv $(DESTDIR)$(libexecsubdir)/`echo ecjx | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` $(DESTDIR)$(libexecsubdir)/ecj1$(host_exeext) + install-data-local: + $(PRE_INSTALL) +- @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ ++ @pc_version=$(GCJVERSION); \ + file="libgcj-$${pc_version}.pc"; \ + $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ + echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +Index: b/src/libjava/testsuite/lib/libjava.exp +=================================================================== +--- a/src/libjava/testsuite/lib/libjava.exp ++++ b/src/libjava/testsuite/lib/libjava.exp +@@ -177,7 +177,7 @@ proc libjava_init { args } { + + set text [eval exec "$GCJ_UNDER_TEST -B$specdir -v 2>@ stdout"] + regexp " version \[^\n\r\]*" $text version +- set libjava_version [lindex $version 1] ++ set libjava_version 4.8 + + verbose "version: $libjava_version" + --- gcc-4.8-4.8.5.orig/debian/patches/gcc-base-version.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-base-version.diff @@ -0,0 +1,178 @@ +# DP: Set base version to 4.8, introduce full version 4.8.x. + +Index: b/src/gcc/BASE-VER +=================================================================== +--- a/src/gcc/BASE-VER ++++ b/src/gcc/BASE-VER +@@ -1 +1 @@ +-4.8.5 ++4.8 +Index: b/src/gcc/FULL-VER +=================================================================== +--- /dev/null ++++ b/src/gcc/FULL-VER +@@ -0,0 +1 @@ ++4.8.5 +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -796,11 +796,13 @@ GTM_H = tm.h $(tm_file_list) in + TM_H = $(GTM_H) insn-flags.h $(OPTIONS_H) + + # Variables for version information. +-BASEVER := $(srcdir)/BASE-VER # 4.x.y ++FULLVER := $(srcdir)/FULL-VER # 4.x.y ++BASEVER := $(srcdir)/BASE-VER # 4.x + DEVPHASE := $(srcdir)/DEV-PHASE # experimental, prerelease, "" + DATESTAMP := $(srcdir)/DATESTAMP # YYYYMMDD or empty + REVISION := $(srcdir)/REVISION # [BRANCH revision XXXXXX] + ++FULLVER_c := $(shell cat $(FULLVER)) + BASEVER_c := $(shell cat $(BASEVER)) + DEVPHASE_c := $(shell cat $(DEVPHASE)) + DATESTAMP_c := $(shell cat $(DATESTAMP)) +@@ -819,7 +821,7 @@ version := $(BASEVER_c) + # development phase collapsed to the empty string in release mode + # (i.e. if DEVPHASE_c is empty). The space immediately after the + # comma in the $(if ...) constructs is significant - do not remove it. +-BASEVER_s := "\"$(BASEVER_c)\"" ++FULLVER_s := "\"$(FULLVER_c)\"" + DEVPHASE_s := "\"$(if $(DEVPHASE_c), ($(DEVPHASE_c)))\"" + DATESTAMP_s := "\"$(if $(DEVPHASE_c), $(DATESTAMP_c))\"" + PKGVERSION_s:= "\"@PKGVERSION@\"" +@@ -2021,9 +2023,9 @@ incpath.o: incpath.c incpath.h $(CONFIG_ + intl.h prefix.h coretypes.h $(TM_H) cppdefault.h $(TARGET_H) \ + $(MACHMODE_H) + +-CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(BASEVER_s) ++CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(FULLVER_s) + prefix.o: prefix.c $(CONFIG_H) $(SYSTEM_H) coretypes.h prefix.h \ +- $(COMMON_TARGET_H) Makefile $(BASEVER) ++ $(COMMON_TARGET_H) Makefile $(FULLVER) + + # Language-independent files. + +@@ -2091,11 +2093,11 @@ options-save.o: options-save.c $(CONFIG_ + + dumpvers: dumpvers.c + +-CFLAGS-version.o += -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++CFLAGS-version.o += -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ + -DREVISION=$(REVISION_s) \ + -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ + -DBUGURL=$(BUGURL_s) +-version.o: version.c version.h $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++version.o: version.c version.h $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) + + gtype-desc.o: gtype-desc.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(HASHTAB_H) $(SPLAY_TREE_H) $(OBSTACK_H) $(BITMAP_H) \ +@@ -2680,10 +2682,10 @@ common/common-targhooks.o : common/commo + coretypes.h $(INPUT_H) $(TM_H) $(COMMON_TARGET_H) common/common-targhooks.h + + bversion.h: s-bversion; @true +-s-bversion: BASE-VER +- echo "#define BUILDING_GCC_MAJOR `echo $(BASEVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h +- echo "#define BUILDING_GCC_MINOR `echo $(BASEVER_c) | sed -e 's/^[0-9]*\.\([0-9]*\).*$$/\1/'`" >> bversion.h +- echo "#define BUILDING_GCC_PATCHLEVEL `echo $(BASEVER_c) | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$$/\1/'`" >> bversion.h ++s-bversion: FULL-VER ++ echo "#define BUILDING_GCC_MAJOR `echo $(FULLVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h ++ echo "#define BUILDING_GCC_MINOR `echo $(FULLVER_c) | sed -e 's/^[0-9]*\.\([0-9]*\).*$$/\1/'`" >> bversion.h ++ echo "#define BUILDING_GCC_PATCHLEVEL `echo $(FULLVER_c) | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$$/\1/'`" >> bversion.h + echo "#define BUILDING_GCC_VERSION (BUILDING_GCC_MAJOR * 1000 + BUILDING_GCC_MINOR)" >> bversion.h + $(STAMP) s-bversion + +@@ -3799,9 +3801,9 @@ build/%.o : # dependencies provided by + ## build/version.o is compiled by the $(COMPILER_FOR_BUILD) but needs + ## several C macro definitions, just like version.o + build/version.o: version.c version.h \ +- $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++ $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) + $(COMPILER_FOR_BUILD) -c $(BUILD_COMPILERFLAGS) $(BUILD_CPPFLAGS) \ +- -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++ -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ + -DREVISION=$(REVISION_s) \ + -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ + -DBUGURL=$(BUGURL_s) -o $@ $< +@@ -3995,7 +3997,7 @@ PREPROCESSOR_DEFINES = \ + -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ + @TARGET_SYSTEM_ROOT_DEFINE@ + +-CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) ++CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(FULLVER_s) + cppbuiltin.o: cppbuiltin.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(TARGET_H) $(TARGET_DEF) $(TREE_H) $(CPP_ID_DATA_H) \ + cppbuiltin.h version.h Makefile +@@ -4016,8 +4018,8 @@ build/gcov-iov$(build_exeext): build/gco + build/gcov-iov.o -o $@ + + gcov-iov.h: s-iov +-s-iov: build/gcov-iov$(build_exeext) $(BASEVER) $(DEVPHASE) +- build/gcov-iov$(build_exeext) '$(BASEVER_c)' '$(DEVPHASE_c)' \ ++s-iov: build/gcov-iov$(build_exeext) $(FULLVER) $(DEVPHASE) ++ build/gcov-iov$(build_exeext) '$(FULLVER_c)' '$(DEVPHASE_c)' \ + > tmp-gcov-iov.h + $(SHELL) $(srcdir)/../move-if-change tmp-gcov-iov.h gcov-iov.h + $(STAMP) s-iov +@@ -4282,8 +4284,8 @@ TEXI_GCCINSTALL_FILES = install.texi ins + TEXI_CPPINT_FILES = cppinternals.texi gcc-common.texi gcc-vers.texi + + # gcc-vers.texi is generated from the version files. +-gcc-vers.texi: $(BASEVER) $(DEVPHASE) +- (echo "@set version-GCC $(BASEVER_c)"; \ ++gcc-vers.texi: $(FULLVER) $(DEVPHASE) ++ (echo "@set version-GCC $(FULLVER_c)"; \ + if [ "$(DEVPHASE_c)" = "experimental" ]; \ + then echo "@set DEVELOPMENT"; \ + else echo "@clear DEVELOPMENT"; \ +@@ -4661,9 +4663,11 @@ install-common: native lang.install-comm + install-driver: installdirs xgcc$(exeext) + -rm -f $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) + -$(INSTALL_PROGRAM) xgcc$(exeext) $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) ++ifneq ($(GCC_INSTALL_NAME),$(target_noncanonical)-gcc-$(version)) + -rm -f $(DESTDIR)$(bindir)/$(target_noncanonical)-gcc-$(version)$(exeext) + -( cd $(DESTDIR)$(bindir) && \ + $(LN) $(GCC_INSTALL_NAME)$(exeext) $(target_noncanonical)-gcc-$(version)$(exeext) ) ++endif + -if [ -f gcc-cross$(exeext) ] ; then \ + if [ -d $(DESTDIR)$(gcc_tooldir)/bin/. ] ; then \ + rm -f $(DESTDIR)$(gcc_tooldir)/bin/gcc$(exeext); \ +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -772,7 +772,7 @@ install_data_local_split = 50 + install-data-local: + $(PRE_INSTALL) + ## Install the .pc file. +- @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ ++ @pc_version=$(GCJVERSION); \ + file="libgcj-$${pc_version}.pc"; \ + $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ + echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -12426,7 +12426,7 @@ install-exec-hook: install-binPROGRAMS i + @BUILD_ECJ1_TRUE@ mv $(DESTDIR)$(libexecsubdir)/`echo ecjx | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` $(DESTDIR)$(libexecsubdir)/ecj1$(host_exeext) + install-data-local: + $(PRE_INSTALL) +- @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ ++ @pc_version=$(GCJVERSION); \ + file="libgcj-$${pc_version}.pc"; \ + $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ + echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +Index: b/src/libjava/testsuite/lib/libjava.exp +=================================================================== +--- a/src/libjava/testsuite/lib/libjava.exp ++++ b/src/libjava/testsuite/lib/libjava.exp +@@ -177,7 +177,7 @@ proc libjava_init { args } { + + set text [eval exec "$GCJ_UNDER_TEST -B$specdir -v 2>@ stdout"] + regexp " version \[^\n\r\]*" $text version +- set libjava_version [lindex $version 1] ++ set libjava_version 4.8 + + verbose "version: $libjava_version" + --- gcc-4.8-4.8.5.orig/debian/patches/gcc-cloog-dl.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-cloog-dl.diff @@ -0,0 +1,487 @@ +# DP: Link against -ldl instead of -lcloog -lppl. Exit with an error when using +# DP: the Graphite loop transformation infrastructure without having the +# DP: libcloog-ppl0 package installed. Packages using these optimizations +# DP: should build-depend on libcloog-ppl0. + +2011-01-04 Jakub Jelinek + + * Makefile.in (BACKENDLIBS): Link against -ldl instead of + -lcloog -lppl. + (graphite.o, graphite%.o): Force -O, remove -fkeep-inline-functions. + (GRAPHITE_CLOOG_UTIL_H, GRAPHITE_POLY_H): New. + (graphite*.o): Adjust dependencies. + * graphite-cloog-compat.h: Include . Reference libcloog and + libppl symbols through pointers in cloog_pointers__ variable. + * graphite.c (init_cloog_pointers): New function. + (graphite_transform_loops): Call init_cloog_pointers. + * graphite-clast-to-gimple.c (gcc_type_for_iv_of_clast_loop): Rename + stmt_for argument to stmt_fora. + * graphite-poly.h: Include graphite-cloog-util.h. + +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -965,6 +965,8 @@ + PLUGIN_H = plugin.h $(GCC_PLUGIN_H) + PLUGIN_VERSION_H = plugin-version.h configargs.h + LIBFUNCS_H = libfuncs.h $(HASHTAB_H) ++GRAPHITE_CLOOG_UTIL_H = graphite-cloog-util.h graphite-cloog-compat.h ++GRAPHITE_POLY_H = graphite-poly.h $(GRAPHITE_CLOOG_UTIL_H) + + # + # Now figure out from those variables how to compile and link. +@@ -1019,7 +1021,7 @@ + # and the system's installed libraries. + LIBS = @LIBS@ libcommon.a $(CPPLIB) $(LIBINTL) $(LIBICONV) $(LIBIBERTY) \ + $(LIBDECNUMBER) $(HOST_LIBS) +-BACKENDLIBS = $(CLOOGLIBS) $(PPLLIBS) $(GMPLIBS) $(PLUGINLIBS) $(HOST_LIBS) \ ++BACKENDLIBS = $(GMPLIBS) $(if $(CLOOGLIBS),-ldl) $(PLUGINLIBS) $(HOST_LIBS) \ + $(ZLIB) + # Any system libraries needed just for GNAT. + SYSLIBS = @GNAT_LIBEXC@ +@@ -2605,40 +2607,40 @@ + $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) tree-pass.h value-prof.h + graphite.o : graphite.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(DIAGNOSTIC_CORE_H) \ + $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h \ +- $(DBGCNT_H) graphite-ppl.h graphite-poly.h graphite-scop-detection.h \ ++ $(DBGCNT_H) graphite-ppl.h $(GRAPHITE_POLY_H) graphite-scop-detection.h \ + graphite-clast-to-gimple.h graphite-sese-to-poly.h + graphite-blocking.o : graphite-blocking.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \ +- sese.h graphite-ppl.h graphite-poly.h ++ sese.h graphite-ppl.h $(GRAPHITE_POLY_H) + graphite-clast-to-gimple.o : graphite-clast-to-gimple.c $(CONFIG_H) \ + $(SYSTEM_H) coretypes.h $(DIAGNOSTIC_CORE_H) $(TREE_FLOW_H) $(TREE_DUMP_H) \ +- $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h graphite-cloog-util.h \ +- graphite-ppl.h graphite-poly.h graphite-clast-to-gimple.h \ ++ $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h $(GRAPHITE_CLOOG_UTIL_H) \ ++ graphite-ppl.h $(GRAPHITE_POLY_H) graphite-clast-to-gimple.h \ + graphite-dependences.h graphite-cloog-compat.h + graphite-cloog-util.o : graphite-cloog-util.c $(CONFIG_H) $(SYSTEM_H) \ +- coretypes.h graphite-cloog-util.h graphite-cloog-compat.h ++ coretypes.h $(GRAPHITE_CLOOG_UTIL_H) graphite-cloog-compat.h + graphite-dependences.o : graphite-dependences.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \ +- sese.h graphite-ppl.h graphite-poly.h graphite-dependences.h \ +- graphite-cloog-util.h ++ sese.h graphite-ppl.h $(GRAPHITE_POLY_H) graphite-dependences.h \ ++ $(GRAPHITE_CLOOG_UTIL_H) + graphite-flattening.o : graphite-flattening.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \ +- sese.h graphite-ppl.h graphite-poly.h ++ sese.h graphite-ppl.h $(GRAPHITE_POLY_H) + graphite-interchange.o : graphite-interchange.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \ +- sese.h graphite-ppl.h graphite-poly.h ++ sese.h graphite-ppl.h $(GRAPHITE_POLY_H) + graphite-poly.o : graphite-poly.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(DIAGNOSTIC_CORE_H) $(TREE_FLOW_H) $(TREE_DUMP_H) gimple-pretty-print.h \ +- $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h graphite-ppl.h graphite-poly.h \ +- graphite-dependences.h graphite-cloog-util.h ++ $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h graphite-ppl.h $(GRAPHITE_POLY_H) \ ++ graphite-dependences.h $(GRAPHITE_CLOOG_UTIL_H) + graphite-ppl.o : graphite-ppl.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ +- graphite-cloog-util.h graphite-ppl.h ++ $(GRAPHITE_CLOOG_UTIL_H) graphite-ppl.h + graphite-scop-detection.o : graphite-scop-detection.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) $(TREE_PASS_H) \ +- sese.h graphite-ppl.h graphite-poly.h graphite-scop-detection.h ++ sese.h graphite-ppl.h $(GRAPHITE_POLY_H) graphite-scop-detection.h + graphite-sese-to-poly.o : graphite-sese-to-poly.c $(CONFIG_H) \ + $(SYSTEM_H) coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) \ +- $(TREE_DATA_REF_H) domwalk.h sese.h graphite-ppl.h graphite-poly.h \ ++ $(TREE_DATA_REF_H) domwalk.h sese.h graphite-ppl.h $(GRAPHITE_POLY_H) \ + graphite-sese-to-poly.h + tree-vect-loop.o: tree-vect-loop.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(GGC_H) $(TREE_H) $(BASIC_BLOCK_H) $(DIAGNOSTIC_H) $(TREE_FLOW_H) \ +@@ -3457,6 +3459,15 @@ + $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) \ + $< $(OUTPUT_OPTION) + ++graphite%.o : \ ++ ALL_CFLAGS := -O $(filter-out -fkeep-inline-functions, $(ALL_CFLAGS)) ++graphite.o : \ ++ ALL_CFLAGS := -O $(filter-out -fkeep-inline-functions, $(ALL_CFLAGS)) ++graphite%.o : \ ++ ALL_CXXFLAGS := -O $(filter-out -fkeep-inline-functions, $(ALL_CXXFLAGS)) ++graphite.o : \ ++ ALL_CXXFLAGS := -O $(filter-out -fkeep-inline-functions, $(ALL_CXXFLAGS)) ++ + # Build auxiliary files that support ecoff format. + mips-tfile: mips-tfile.o $(LIBDEPS) + $(LINKER) $(LINKERFLAGS) $(LDFLAGS) -o $@ \ +Index: b/src/gcc/graphite-cloog-compat.h +=================================================================== +--- a/src/gcc/graphite-cloog-compat.h ++++ b/src/gcc/graphite-cloog-compat.h +@@ -272,4 +272,279 @@ + return m->NbRows; + } + #endif /* CLOOG_ORG */ ++ ++#include ++#if PPL_VERSION_MAJOR == 0 && PPL_VERSION_MINOR < 11 ++#define DYNSYMS_PPL11 ++#else ++#define DYNSYMS_PPL11 \ ++ DYNSYM (ppl_new_PIP_Problem_from_constraints); \ ++ DYNSYM (ppl_PIP_Problem_is_satisfiable); \ ++ DYNSYM (ppl_delete_PIP_Problem); ++#endif ++#define DYNSYMS \ ++ DYNSYM (cloog_block_alloc); \ ++ DYNSYM (cloog_block_list_free); \ ++ DYNSYM (cloog_block_list_malloc); \ ++ DYNSYM (cloog_clast_create); \ ++ DYNSYM (cloog_clast_free); \ ++ DYNSYM (cloog_domain_free); \ ++ DYNSYM (cloog_domain_matrix2domain); \ ++ DYNSYM (cloog_initialize); \ ++ DYNSYM (cloog_loop_malloc); \ ++ DYNSYM (cloog_matrix_alloc); \ ++ DYNSYM (cloog_matrix_copy); \ ++ DYNSYM (cloog_matrix_free); \ ++ DYNSYM (cloog_matrix_print); \ ++ DYNSYM (cloog_names_malloc); \ ++ DYNSYM (cloog_names_scalarize); \ ++ DYNSYM (cloog_options_free); \ ++ DYNSYM (cloog_options_malloc); \ ++ DYNSYM (cloog_program_dump_cloog); \ ++ DYNSYM (cloog_program_extract_scalars); \ ++ DYNSYM (cloog_program_free); \ ++ DYNSYM (cloog_program_generate); \ ++ DYNSYM (cloog_program_malloc); \ ++ DYNSYM (cloog_program_print); \ ++ DYNSYM (cloog_program_scatter); \ ++ DYNSYM (cloog_statement_alloc); \ ++ DYNSYM (cloog_domain_union); \ ++ DYNSYM (cloog_matrix_read); \ ++ DYNSYM (cloog_new_pol); \ ++ DYNSYM (cloog_vector_gcd); \ ++ DYNSYM (ppl_finalize); \ ++ DYNSYM (ppl_assign_Coefficient_from_mpz_t); \ ++ DYNSYM (ppl_assign_Linear_Expression_from_Linear_Expression); \ ++ DYNSYM (ppl_Coefficient_to_mpz_t); \ ++ DYNSYM (ppl_Constraint_coefficient); \ ++ DYNSYM (ppl_Constraint_inhomogeneous_term); \ ++ DYNSYM (ppl_Constraint_space_dimension); \ ++ DYNSYM (ppl_Constraint_System_begin); \ ++ DYNSYM (ppl_Constraint_System_const_iterator_dereference); \ ++ DYNSYM (ppl_Constraint_System_const_iterator_equal_test); \ ++ DYNSYM (ppl_Constraint_System_const_iterator_increment); \ ++ DYNSYM (ppl_Constraint_System_end); \ ++ DYNSYM (ppl_Constraint_System_insert_Constraint); \ ++ DYNSYM (ppl_Constraint_System_space_dimension); \ ++ DYNSYM (ppl_Constraint_type); \ ++ DYNSYM (ppl_delete_Coefficient); \ ++ DYNSYM (ppl_delete_Constraint); \ ++ DYNSYM (ppl_delete_Constraint_System_const_iterator); \ ++ DYNSYM (ppl_delete_Linear_Expression); \ ++ DYNSYM (ppl_delete_Pointset_Powerset_C_Polyhedron); \ ++ DYNSYM (ppl_delete_Pointset_Powerset_C_Polyhedron_iterator); \ ++ DYNSYM (ppl_delete_Polyhedron); \ ++ DYNSYM (ppl_Linear_Expression_add_to_coefficient); \ ++ DYNSYM (ppl_Linear_Expression_add_to_inhomogeneous); \ ++ DYNSYM (ppl_Linear_Expression_coefficient); \ ++ DYNSYM (ppl_Linear_Expression_inhomogeneous_term); \ ++ DYNSYM (ppl_Linear_Expression_space_dimension); \ ++ DYNSYM (ppl_new_Coefficient); \ ++ DYNSYM (ppl_new_Coefficient_from_mpz_t); \ ++ DYNSYM (ppl_new_Constraint); \ ++ DYNSYM (ppl_new_Constraint_System); \ ++ DYNSYM (ppl_new_Constraint_System_const_iterator); \ ++ DYNSYM (ppl_new_C_Polyhedron_from_C_Polyhedron); \ ++ DYNSYM (ppl_new_C_Polyhedron_from_space_dimension); \ ++ DYNSYM (ppl_new_C_Polyhedron_recycle_Constraint_System); \ ++ DYNSYM (ppl_new_Linear_Expression); \ ++ DYNSYM (ppl_new_Linear_Expression_from_Constraint); \ ++ DYNSYM (ppl_new_Linear_Expression_from_Linear_Expression); \ ++ DYNSYM (ppl_new_Linear_Expression_with_dimension); \ ++ DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_from_C_Polyhedron); \ ++ DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_from_Pointset_Powerset_C_Polyhedron); \ ++ DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_from_space_dimension); \ ++ DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_iterator); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_add_constraint); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_add_space_dimensions_and_embed); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_difference_assign); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_intersection_assign); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_is_empty); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_begin); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_dereference); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_end); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_equal_test); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_increment); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_map_space_dimensions); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_maximize); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_minimize); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_remove_space_dimensions); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_size); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_space_dimension); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_upper_bound_assign); \ ++ DYNSYM (ppl_Polyhedron_add_constraint); \ ++ DYNSYM (ppl_Polyhedron_add_constraints); \ ++ DYNSYM (ppl_Polyhedron_add_space_dimensions_and_embed); \ ++ DYNSYM (ppl_Polyhedron_get_constraints); \ ++ DYNSYM (ppl_Polyhedron_map_space_dimensions); \ ++ DYNSYM (ppl_Polyhedron_remove_space_dimensions); \ ++ DYNSYM (ppl_Polyhedron_space_dimension); \ ++ DYNSYM (ppl_subtract_Linear_Expression_from_Linear_Expression); \ ++ DYNSYM (pprint); \ ++ DYNSYM (stmt_block); \ ++ DYNSYM (stmt_for); \ ++ DYNSYM (stmt_guard); \ ++ DYNSYM (stmt_root); \ ++ DYNSYM (stmt_user); \ ++ DYNSYM (stmt_ass); \ ++ DYNSYM (ppl_delete_Constraint_System); \ ++ DYNSYM (ppl_initialize); \ ++ DYNSYM (ppl_new_Constraint_System_from_Constraint); \ ++ DYNSYM (ppl_new_C_Polyhedron_from_Constraint_System); \ ++ DYNSYM (ppl_Polyhedron_affine_image); \ ++ DYNSYM (ppl_io_fprint_Pointset_Powerset_C_Polyhedron); \ ++ DYNSYMS_PPL11 ++extern struct cloog_pointers_s__ ++{ ++ bool inited; ++ void *h; ++#define DYNSYM(x) __typeof (x) *p_##x ++ DYNSYMS ++#undef DYNSYM ++} cloog_pointers__; ++ ++#define cloog_block_alloc (*cloog_pointers__.p_cloog_block_alloc) ++#define cloog_block_list_free (*cloog_pointers__.p_cloog_block_list_free) ++#define cloog_block_list_malloc (*cloog_pointers__.p_cloog_block_list_malloc) ++#define cloog_clast_create (*cloog_pointers__.p_cloog_clast_create) ++#define cloog_clast_free (*cloog_pointers__.p_cloog_clast_free) ++#define cloog_domain_free (*cloog_pointers__.p_cloog_domain_free) ++#define cloog_domain_matrix2domain (*cloog_pointers__.p_cloog_domain_matrix2domain) ++#define cloog_initialize (*cloog_pointers__.p_cloog_initialize) ++#ifndef CLOOG_ORG ++#undef cloog_loop_malloc ++#define cloog_loop_malloc(STATE) (*cloog_pointers__.p_cloog_loop_malloc) () ++#else ++#define cloog_loop_malloc (*cloog_pointers__.p_cloog_loop_malloc) ++#endif ++#define cloog_matrix_alloc (*cloog_pointers__.p_cloog_matrix_alloc) ++#define cloog_matrix_copy (*cloog_pointers__.p_cloog_matrix_copy) ++#define cloog_matrix_free (*cloog_pointers__.p_cloog_matrix_free) ++#define cloog_matrix_print (*cloog_pointers__.p_cloog_matrix_print) ++#define cloog_names_malloc (*cloog_pointers__.p_cloog_names_malloc) ++#define cloog_names_scalarize (*cloog_pointers__.p_cloog_names_scalarize) ++#define cloog_options_free (*cloog_pointers__.p_cloog_options_free) ++#ifndef CLOOG_ORG ++#undef cloog_options_malloc ++#define cloog_options_malloc(STATE) (*cloog_pointers__.p_cloog_options_malloc) () ++#undef cloog_program_dump_cloog ++#define cloog_program_dump_cloog(DUMPFILE, PROGRAM, SCATTERINGLIST) \ ++ (*cloog_pointers__.p_cloog_program_dump_cloog) (DUMPFILE, PROGRAM) ++#undef cloog_program_extract_scalars ++#define cloog_program_extract_scalars(PROG, SCATT, OPT) \ ++ (*cloog_pointers__.p_cloog_program_extract_scalars) (PROG, SCATT) ++#else ++#define cloog_options_malloc (*cloog_pointers__.p_cloog_options_malloc) ++#define cloog_program_dump_cloog (*cloog_pointers__.p_cloog_program_dump_cloog) ++#define cloog_program_extract_scalars (*cloog_pointers__.p_cloog_program_extract_scalars) ++#endif ++#define cloog_program_free (*cloog_pointers__.p_cloog_program_free) ++#define cloog_program_generate (*cloog_pointers__.p_cloog_program_generate) ++#define cloog_program_malloc (*cloog_pointers__.p_cloog_program_malloc) ++#define cloog_program_print (*cloog_pointers__.p_cloog_program_print) ++#ifndef CLOOG_ORG ++#undef cloog_program_scatter ++#define cloog_program_scatter(PROG, SCATT, OPT) \ ++ (*cloog_pointers__.p_cloog_program_scatter) (PROG, SCATT) ++#undef cloog_statement_alloc ++#define cloog_statement_alloc(STATE, INDEX) \ ++ (*cloog_pointers__.p_cloog_statement_alloc) (INDEX) ++#else ++#define cloog_program_scatter (*cloog_pointers__.p_cloog_program_scatter) ++#define cloog_statement_alloc (*cloog_pointers__.p_cloog_statement_alloc) ++#endif ++#define cloog_domain_union (*cloog_pointers__.p_cloog_domain_union) ++#define cloog_matrix_read (*cloog_pointers__.p_cloog_matrix_read) ++#define cloog_new_pol (*cloog_pointers__.p_cloog_new_pol) ++#define cloog_vector_gcd (*cloog_pointers__.p_cloog_vector_gcd) ++#define ppl_finalize (*cloog_pointers__.p_ppl_finalize) ++#define ppl_assign_Coefficient_from_mpz_t (*cloog_pointers__.p_ppl_assign_Coefficient_from_mpz_t) ++#define ppl_assign_Linear_Expression_from_Linear_Expression (*cloog_pointers__.p_ppl_assign_Linear_Expression_from_Linear_Expression) ++#define ppl_Coefficient_to_mpz_t (*cloog_pointers__.p_ppl_Coefficient_to_mpz_t) ++#define ppl_Constraint_coefficient (*cloog_pointers__.p_ppl_Constraint_coefficient) ++#define ppl_Constraint_inhomogeneous_term (*cloog_pointers__.p_ppl_Constraint_inhomogeneous_term) ++#define ppl_Constraint_space_dimension (*cloog_pointers__.p_ppl_Constraint_space_dimension) ++#define ppl_Constraint_System_begin (*cloog_pointers__.p_ppl_Constraint_System_begin) ++#define ppl_Constraint_System_const_iterator_dereference (*cloog_pointers__.p_ppl_Constraint_System_const_iterator_dereference) ++#define ppl_Constraint_System_const_iterator_equal_test (*cloog_pointers__.p_ppl_Constraint_System_const_iterator_equal_test) ++#define ppl_Constraint_System_const_iterator_increment (*cloog_pointers__.p_ppl_Constraint_System_const_iterator_increment) ++#define ppl_Constraint_System_end (*cloog_pointers__.p_ppl_Constraint_System_end) ++#define ppl_Constraint_System_insert_Constraint (*cloog_pointers__.p_ppl_Constraint_System_insert_Constraint) ++#define ppl_Constraint_System_space_dimension (*cloog_pointers__.p_ppl_Constraint_System_space_dimension) ++#define ppl_Constraint_type (*cloog_pointers__.p_ppl_Constraint_type) ++#define ppl_delete_Coefficient (*cloog_pointers__.p_ppl_delete_Coefficient) ++#define ppl_delete_Constraint (*cloog_pointers__.p_ppl_delete_Constraint) ++#define ppl_delete_Constraint_System_const_iterator (*cloog_pointers__.p_ppl_delete_Constraint_System_const_iterator) ++#define ppl_delete_Linear_Expression (*cloog_pointers__.p_ppl_delete_Linear_Expression) ++#define ppl_delete_Pointset_Powerset_C_Polyhedron (*cloog_pointers__.p_ppl_delete_Pointset_Powerset_C_Polyhedron) ++#define ppl_delete_Pointset_Powerset_C_Polyhedron_iterator (*cloog_pointers__.p_ppl_delete_Pointset_Powerset_C_Polyhedron_iterator) ++#define ppl_delete_Polyhedron (*cloog_pointers__.p_ppl_delete_Polyhedron) ++#define ppl_Linear_Expression_add_to_coefficient (*cloog_pointers__.p_ppl_Linear_Expression_add_to_coefficient) ++#define ppl_Linear_Expression_add_to_inhomogeneous (*cloog_pointers__.p_ppl_Linear_Expression_add_to_inhomogeneous) ++#define ppl_Linear_Expression_coefficient (*cloog_pointers__.p_ppl_Linear_Expression_coefficient) ++#define ppl_Linear_Expression_inhomogeneous_term (*cloog_pointers__.p_ppl_Linear_Expression_inhomogeneous_term) ++#define ppl_Linear_Expression_space_dimension (*cloog_pointers__.p_ppl_Linear_Expression_space_dimension) ++#define ppl_new_Coefficient (*cloog_pointers__.p_ppl_new_Coefficient) ++#define ppl_new_Coefficient_from_mpz_t (*cloog_pointers__.p_ppl_new_Coefficient_from_mpz_t) ++#define ppl_new_Constraint (*cloog_pointers__.p_ppl_new_Constraint) ++#define ppl_new_Constraint_System (*cloog_pointers__.p_ppl_new_Constraint_System) ++#define ppl_new_Constraint_System_const_iterator (*cloog_pointers__.p_ppl_new_Constraint_System_const_iterator) ++#define ppl_new_C_Polyhedron_from_C_Polyhedron (*cloog_pointers__.p_ppl_new_C_Polyhedron_from_C_Polyhedron) ++#define ppl_new_C_Polyhedron_from_space_dimension (*cloog_pointers__.p_ppl_new_C_Polyhedron_from_space_dimension) ++#define ppl_new_C_Polyhedron_recycle_Constraint_System (*cloog_pointers__.p_ppl_new_C_Polyhedron_recycle_Constraint_System) ++#define ppl_new_Linear_Expression (*cloog_pointers__.p_ppl_new_Linear_Expression) ++#define ppl_new_Linear_Expression_from_Constraint (*cloog_pointers__.p_ppl_new_Linear_Expression_from_Constraint) ++#define ppl_new_Linear_Expression_from_Linear_Expression (*cloog_pointers__.p_ppl_new_Linear_Expression_from_Linear_Expression) ++#define ppl_new_Linear_Expression_with_dimension (*cloog_pointers__.p_ppl_new_Linear_Expression_with_dimension) ++#define ppl_new_Pointset_Powerset_C_Polyhedron_from_C_Polyhedron (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_from_C_Polyhedron) ++#define ppl_new_Pointset_Powerset_C_Polyhedron_from_Pointset_Powerset_C_Polyhedron (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_from_Pointset_Powerset_C_Polyhedron) ++#define ppl_new_Pointset_Powerset_C_Polyhedron_from_space_dimension (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_from_space_dimension) ++#define ppl_new_Pointset_Powerset_C_Polyhedron_iterator (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_iterator) ++#define ppl_Pointset_Powerset_C_Polyhedron_add_constraint (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_add_constraint) ++#define ppl_Pointset_Powerset_C_Polyhedron_add_space_dimensions_and_embed (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_add_space_dimensions_and_embed) ++#define ppl_Pointset_Powerset_C_Polyhedron_difference_assign (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_difference_assign) ++#define ppl_Pointset_Powerset_C_Polyhedron_intersection_assign (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_intersection_assign) ++#define ppl_Pointset_Powerset_C_Polyhedron_is_empty (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_is_empty) ++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_begin (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_begin) ++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_dereference (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_dereference) ++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_end (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_end) ++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_equal_test (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_equal_test) ++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_increment (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_increment) ++#define ppl_Pointset_Powerset_C_Polyhedron_map_space_dimensions (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_map_space_dimensions) ++#define ppl_Pointset_Powerset_C_Polyhedron_maximize (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_maximize) ++#define ppl_Pointset_Powerset_C_Polyhedron_minimize (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_minimize) ++#define ppl_Pointset_Powerset_C_Polyhedron_remove_space_dimensions (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_remove_space_dimensions) ++#define ppl_Pointset_Powerset_C_Polyhedron_size (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_size) ++#define ppl_Pointset_Powerset_C_Polyhedron_space_dimension (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_space_dimension) ++#define ppl_Pointset_Powerset_C_Polyhedron_upper_bound_assign (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_upper_bound_assign) ++#define ppl_Polyhedron_add_constraint (*cloog_pointers__.p_ppl_Polyhedron_add_constraint) ++#define ppl_Polyhedron_add_constraints (*cloog_pointers__.p_ppl_Polyhedron_add_constraints) ++#define ppl_Polyhedron_add_space_dimensions_and_embed (*cloog_pointers__.p_ppl_Polyhedron_add_space_dimensions_and_embed) ++#define ppl_Polyhedron_get_constraints (*cloog_pointers__.p_ppl_Polyhedron_get_constraints) ++#define ppl_Polyhedron_map_space_dimensions (*cloog_pointers__.p_ppl_Polyhedron_map_space_dimensions) ++#define ppl_Polyhedron_remove_space_dimensions (*cloog_pointers__.p_ppl_Polyhedron_remove_space_dimensions) ++#define ppl_Polyhedron_space_dimension (*cloog_pointers__.p_ppl_Polyhedron_space_dimension) ++#define ppl_subtract_Linear_Expression_from_Linear_Expression (*cloog_pointers__.p_ppl_subtract_Linear_Expression_from_Linear_Expression) ++#define pprint (*cloog_pointers__.p_pprint) ++#define stmt_block (*cloog_pointers__.p_stmt_block) ++#define stmt_for (*cloog_pointers__.p_stmt_for) ++#define stmt_guard (*cloog_pointers__.p_stmt_guard) ++#define stmt_root (*cloog_pointers__.p_stmt_root) ++#define stmt_user (*cloog_pointers__.p_stmt_user) ++#define stmt_ass (*cloog_pointers__.p_stmt_ass) ++#define ppl_delete_Constraint_System (*cloog_pointers__.p_ppl_delete_Constraint_System) ++#define ppl_initialize (*cloog_pointers__.p_ppl_initialize) ++#define ppl_new_Constraint_System_from_Constraint (*cloog_pointers__.p_ppl_new_Constraint_System_from_Constraint) ++#define ppl_new_C_Polyhedron_from_Constraint_System (*cloog_pointers__.p_ppl_new_C_Polyhedron_from_Constraint_System) ++#define ppl_Polyhedron_affine_image (*cloog_pointers__.p_ppl_Polyhedron_affine_image) ++#define ppl_io_fprint_Pointset_Powerset_C_Polyhedron (*cloog_pointers__.p_ppl_io_fprint_Pointset_Powerset_C_Polyhedron) ++#if !(PPL_VERSION_MAJOR == 0 && PPL_VERSION_MINOR < 11) ++#define ppl_new_PIP_Problem_from_constraints (*cloog_pointers__.p_ppl_new_PIP_Problem_from_constraints) ++#define ppl_PIP_Problem_is_satisfiable (*cloog_pointers__.p_ppl_PIP_Problem_is_satisfiable) ++#define ppl_delete_PIP_Problem (*cloog_pointers__.p_ppl_delete_PIP_Problem) ++#endif ++ ++#define cloog_finalize (*cloog_pointers__.p_ppl_finalize) ++ ++ + #endif /* GRAPHITE_CLOOG_COMPAT_H */ +Index: b/src/gcc/graphite.c +=================================================================== +--- a/src/gcc/graphite.c ++++ b/src/gcc/graphite.c +@@ -56,6 +56,35 @@ + + CloogState *cloog_state; + ++__typeof (cloog_pointers__) cloog_pointers__; ++ ++static bool ++init_cloog_pointers (void) ++{ ++ void *h; ++ ++ if (cloog_pointers__.inited) ++ return cloog_pointers__.h != NULL; ++ h = dlopen ("libcloog-isl.so.4", RTLD_LAZY); ++ cloog_pointers__.h = h; ++ if (h == NULL) ++ return false; ++#define DYNSYM(x) \ ++ do \ ++ { \ ++ union { __typeof (cloog_pointers__.p_##x) p; void *q; } u; \ ++ u.q = dlsym (h, #x); \ ++ if (u.q == NULL) \ ++ return false; \ ++ cloog_pointers__.p_##x = u.p; \ ++ } \ ++ while (0) ++ DYNSYMS ++#undef DYNSYM ++ return true; ++} ++ ++ + /* Print global statistics to FILE. */ + + static void +@@ -201,6 +230,12 @@ + return false; + } + ++ if (!init_cloog_pointers ()) ++ { ++ sorry ("Graphite loop optimizations can only be used if the libcloog-isl4 package is installed"); ++ return false; ++ } ++ + scev_reset (); + recompute_all_dominators (); + initialize_original_copy_tables (); +Index: b/src/gcc/graphite-clast-to-gimple.c +=================================================================== +--- a/src/gcc/graphite-clast-to-gimple.c ++++ b/src/gcc/graphite-clast-to-gimple.c +@@ -836,7 +836,7 @@ + from STMT_FOR. */ + + static tree +-type_for_clast_for (struct clast_for *stmt_for, ivs_params_p ip) ++type_for_clast_for (struct clast_for *stmt_fora, ivs_params_p ip) + { + mpz_t bound_one, bound_two; + tree lb_type, ub_type; +@@ -844,8 +844,8 @@ + mpz_init (bound_one); + mpz_init (bound_two); + +- lb_type = type_for_clast_expr (stmt_for->LB, ip, bound_one, bound_two); +- ub_type = type_for_clast_expr (stmt_for->UB, ip, bound_one, bound_two); ++ lb_type = type_for_clast_expr (stmt_fora->LB, ip, bound_one, bound_two); ++ ub_type = type_for_clast_expr (stmt_fora->UB, ip, bound_one, bound_two); + + mpz_clear (bound_one); + mpz_clear (bound_two); +Index: b/src/gcc/graphite-poly.h +=================================================================== +--- a/src/gcc/graphite-poly.h ++++ b/src/gcc/graphite-poly.h +@@ -22,6 +22,8 @@ + #ifndef GCC_GRAPHITE_POLY_H + #define GCC_GRAPHITE_POLY_H + ++#include "graphite-cloog-util.h" ++ + typedef struct poly_dr *poly_dr_p; + DEF_VEC_P(poly_dr_p); + DEF_VEC_ALLOC_P (poly_dr_p, heap); --- gcc-4.8-4.8.5.orig/debian/patches/gcc-d-lang.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-d-lang.diff @@ -0,0 +1,251 @@ +# DP: Add D options and specs for the gcc driver. + +Index: b/src/gcc/d/lang-specs.h +=================================================================== +--- /dev/null ++++ b/src/gcc/d/lang-specs.h +@@ -0,0 +1,31 @@ ++/* lang-specs.h -- D frontend for GCC. ++ Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++ ++ GCC is free software; you can redistribute it and/or modify it under ++ the terms of the GNU General Public License as published by the Free ++ Software Foundation; either version 3, or (at your option) any later ++ version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ANY ++ WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . ++*/ ++ ++/* %{!M} probably doesn't make sense because we would need ++ to do that -- -MD and -MMD doesn't sound like a plan for D.... */ ++ ++{".d", "@d", 0, 1, 0 }, ++{".D", "@d", 0, 1, 0 }, ++{".dd", "@d", 0, 1, 0 }, ++{".DD", "@d", 0, 1, 0 }, ++{".di", "@d", 0, 1, 0 }, ++{".DI", "@d", 0, 1, 0 }, ++{"@d", ++ "%{!E:cc1d %i %(cc1_options) %(cc1d) %I %{nostdinc*} %{+e*} %{I*} %{J*}\ ++ %{M} %{MM} %{!fsyntax-only:%(invoke_as)}}", 0, 1, 0 }, ++ +Index: b/src/gcc/d/lang.opt +=================================================================== +--- /dev/null ++++ b/src/gcc/d/lang.opt +@@ -0,0 +1,208 @@ ++; GDC -- D front-end for GCC ++; Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++; ++; This program is free software; you can redistribute it and/or modify ++; it under the terms of the GNU General Public License as published by ++; the Free Software Foundation; either version 2 of the License, or ++; (at your option) any later version. ++; ++; This program is distributed in the hope that it will be useful, ++; but WITHOUT ANY WARRANTY; without even the implied warranty of ++; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++; GNU General Public License for more details. ++; ++; You should have received a copy of the GNU General Public License ++; along with GCC; see the file COPYING3. If not see ++; . ++ ++Language ++D ++ ++debuglib= ++Driver Joined ++Debug library to use instead of phobos ++ ++defaultlib= ++Driver Joined ++Default library to use instead of phobos ++ ++fassert ++D ++Permit the use of the assert keyword ++ ++; For D: defaults to on ++fbounds-check ++D ++Generate code to check bounds before indexing arrays ++ ++fbuiltin ++D Var(flag_no_builtin, 0) ++Recognize built-in functions ++ ++fdebug ++D ++Compile in debug code ++ ++fdebug= ++D Joined RejectNegative ++-fdebug,-fdebug=,-fdebug= Compile in debug code, code <= level, or code identified by ident ++ ++fdeps= ++D Joined RejectNegative ++-fdeps= Write module dependencies to filename ++ ++fdoc ++D ++Generate documentation ++ ++fdoc-dir= ++D Joined RejectNegative ++-fdoc-dir= Write documentation file to docdir directory ++ ++fdoc-file= ++D Joined RejectNegative ++-fdoc-file= Write documentation file to filename ++ ++fdoc-inc= ++D Joined RejectNegative ++-fdoc-inc= Include a Ddoc macro file ++ ++fdump-source ++D RejectNegative ++Dump decoded UTF-8 text and source from HTML ++ ++fd-verbose ++D ++Print information about D language processing to stdout ++ ++fd-vtls ++D ++List all variables going into thread local storage ++ ++femit-templates ++D ++-femit-templates Emit templates code and data even if the linker cannot merge multiple copies ++ ++fignore-unknown-pragmas ++D ++Ignore unsupported pragmas ++ ++fin ++D ++Generate runtime code for in() contracts ++ ++fintfc ++Generate D interface files ++ ++fintfc-dir= ++D Joined RejectNegative ++-fintfc-dir= Write D interface files to directory ++ ++fintfc-file= ++D Joined RejectNegative ++-fintfc-file= Write D interface file to ++ ++finvariants ++D ++Generate runtime code for invariant()'s ++ ++fmake-deps= ++D Joined RejectNegative ++-fmake-deps= Write dependency output to the given file ++ ++fmake-mdeps= ++D Joined RejectNegative ++Like -fmake-deps= but ignore system modules ++ ++femit-moduleinfo ++D ++Generate ModuleInfo struct for output module ++ ++fonly= ++D Joined RejectNegative ++Process all modules specified on the command line, but only generate code for the module specified by the argument ++ ++fout ++D ++Generate runtime code for out() contracts ++ ++fproperty ++D ++Enforce property syntax ++ ++frelease ++D ++Compile release version ++ ++fsplit-dynamic-arrays ++D Var(flag_split_darrays) ++Split dynamic arrays into length and pointer when passing to functions ++ ++funittest ++D ++Compile in unittest code ++ ++fversion= ++D Joined RejectNegative ++-fversion= Compile in version code >= or identified by ++ ++fXf= ++D Joined RejectNegative ++-fXf= Write JSON file to ++ ++imultilib ++D Joined Separate ++-imultilib Set to be the multilib include subdirectory ++ ++iprefix ++D Joined Separate ++-iprefix Specify as a prefix for next two options ++ ++isysroot ++D Joined Separate ++-isysroot Set to be the system root directory ++ ++isystem ++D Joined Separate ++-isystem Add to the start of the system include path ++ ++I ++D Joined Separate ++-I Add to the end of the main include path ++ ++J ++D Joined Separate ++-J Put MODULE files in 'directory' ++ ++nophoboslib ++Driver ++Do not link the standard D library in the compilation ++ ++nostdinc ++D ++Do not search standard system include directories (those specified with -isystem will still be used) ++ ++static-libphobos ++Driver ++Link the standard D library statically in the compilation ++ ++Wall ++D ++; Documented in c.opt ++ ++Wcast-result ++D Warning Var(warn_cast_result) ++Warn about casts that will produce a null or nil result ++ ++Wdeprecated ++D ++; Documented in c.opt ++ ++Werror ++D ++; Documented in common.opt ++ ++Wunknown-pragmas ++D ++; Documented in c.opt ++ --- gcc-4.8-4.8.5.orig/debian/patches/gcc-default-format-security.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-default-format-security.diff @@ -0,0 +1,37 @@ +# DP: Turn on -Wformat -Wformat-security by default for C, C++, ObjC, ObjC++. + +Index: b/src/gcc/doc/invoke.texi +=================================================================== +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -3351,6 +3351,11 @@ + in future warnings may be added to @option{-Wformat-security} that are not + included in @option{-Wformat-nonliteral}.) + ++NOTE: In Ubuntu 8.10 and later versions this option is enabled by default ++for C, C++, ObjC, ObjC++. To disable, use @option{-Wno-format-security}, ++or disable all format warnings with @option{-Wformat=0}. To make format ++security warnings fatal, specify @option{-Werror=format-security}. ++ + @item -Wformat-y2k + @opindex Wformat-y2k + @opindex Wno-format-y2k +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -654,11 +654,14 @@ + #define LINK_GCC_C_SEQUENCE_SPEC "%G %L %G" + #endif + ++/* no separate spec, just shove it into the ssp default spec */ ++#define FORMAT_SECURITY_SPEC "%{!Wformat:%{!Wformat=2:%{!Wformat=0:%{!Wall:-Wformat} %{!Wno-format-security:-Wformat-security}}}}" ++ + #ifndef SSP_DEFAULT_SPEC + #ifdef TARGET_LIBC_PROVIDES_SSP +-#define SSP_DEFAULT_SPEC "%{!fno-stack-protector:%{!fstack-protector-all:%{!ffreestanding:%{!nostdlib:-fstack-protector}}}}" ++#define SSP_DEFAULT_SPEC "%{!fno-stack-protector:%{!fstack-protector-all:%{!ffreestanding:%{!nostdlib:-fstack-protector}}}} " FORMAT_SECURITY_SPEC + #else +-#define SSP_DEFAULT_SPEC "" ++#define SSP_DEFAULT_SPEC FORMAT_SECURITY_SPEC + #endif + #endif + --- gcc-4.8-4.8.5.orig/debian/patches/gcc-default-fortify-source.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-default-fortify-source.diff @@ -0,0 +1,40 @@ +# DP: Turn on -D_FORTIFY_SOURCE=2 by default for C, C++, ObjC, ObjC++, +# DP: if the optimization level is > 0 + +--- + gcc/doc/invoke.texi | 6 ++++++ + gcc/c-family/c-cppbuiltin.c | 3 + + 2 files changed, 9 insertions(+), 0 deletions(-) + +Index: b/src/gcc/doc/invoke.texi +=================================================================== +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -6561,6 +6561,12 @@ + Please note the warning under @option{-fgcse} about + invoking @option{-O2} on programs that use computed gotos. + ++NOTE: In Ubuntu 8.10 and later versions, @option{-D_FORTIFY_SOURCE=2} is ++set by default, and is activated when @option{-O} is set to 2 or higher. ++This enables additional compile-time and run-time checks for several libc ++functions. To disable, specify either @option{-U_FORTIFY_SOURCE} or ++@option{-D_FORTIFY_SOURCE=0}. ++ + @item -O3 + @opindex O3 + Optimize yet more. @option{-O3} turns on all optimizations specified +Index: b/src/gcc/c-family/c-cppbuiltin.c +=================================================================== +--- a/src/gcc/c-family/c-cppbuiltin.c ++++ b/src/gcc/c-family/c-cppbuiltin.c +@@ -853,6 +853,10 @@ + builtin_define_with_value ("__REGISTER_PREFIX__", REGISTER_PREFIX, 0); + builtin_define_with_value ("__USER_LABEL_PREFIX__", user_label_prefix, 0); + ++ /* Fortify Source enabled by default for optimization levels > 0 */ ++ if (optimize) ++ builtin_define_with_int_value ("_FORTIFY_SOURCE", 2); ++ + /* Misc. */ + if (flag_gnu89_inline) + cpp_define (pfile, "__GNUC_GNU_INLINE__"); --- gcc-4.8-4.8.5.orig/debian/patches/gcc-default-relro.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-default-relro.diff @@ -0,0 +1,33 @@ +# DP: Turn on -Wl,-z,relro by default. + +--- + gcc/doc/invoke.texi | 3 +++ + gcc/gcc.c | 1 + + 2 files changed, 4 insertions(+), 0 deletions(-) + +Index: b/src/gcc/doc/invoke.texi +=================================================================== +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -10049,6 +10049,9 @@ + linker. When using the GNU linker, you can also get the same effect with + @option{-Wl,-Map=output.map}. + ++NOTE: In Ubuntu 8.10 and later versions, for LDFLAGS, the option ++@option{-Wl,-z,relro} is used. To disable, use @option{-Wl,-z,norelro}. ++ + @item -u @var{symbol} + @opindex u + Pretend the symbol @var{symbol} is undefined, to force linking of +Index: b/src/gcc/gcc.c +=================================================================== +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -741,6 +741,7 @@ + "%{flto|flto=*:% tmp-tm.texi +- case `echo X|tr X '\101'` in \ +- A) tr -d '\015' < tmp-tm.texi > tmp2-tm.texi ;; \ +- *) tr -d '\r' < tmp-tm.texi > tmp2-tm.texi ;; \ +- esac +- mv tmp2-tm.texi tmp-tm.texi +- $(SHELL) $(srcdir)/../move-if-change tmp-tm.texi tm.texi +- @if cmp -s $(srcdir)/doc/tm.texi tm.texi; then \ +- $(STAMP) $@; \ +- elif test $(srcdir)/doc/tm.texi -nt $(srcdir)/doc/tm.texi.in \ +- && ( test $(srcdir)/doc/tm.texi -nt $(srcdir)/target.def \ +- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/c-family/c-target.def \ +- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/common/common-target.def \ +- ); then \ +- echo >&2 ; \ +- echo You should edit $(srcdir)/doc/tm.texi.in rather than $(srcdir)/doc/tm.texi . >&2 ; \ +- false; \ +- else \ +- echo >&2 ; \ +- echo Verify that you have permission to grant a GFDL license for all >&2 ; \ +- echo new text in tm.texi, then copy it to $(srcdir)/doc/tm.texi. >&2 ; \ +- false; \ +- fi ++ cat $(srcdir)/doc/tm.texi.in > tmp-tm.texi ++ $(STAMP) $@ + + GTFILES = $(CPP_ID_DATA_H) $(srcdir)/input.h $(srcdir)/coretypes.h \ + $(host_xm_file_list) \ --- gcc-4.8-4.8.5.orig/debian/patches/gcc-hash-style-both.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-hash-style-both.diff @@ -0,0 +1,167 @@ +# DP: Link using --hash-style=both (alpha, amd64, armel, armhf, ia64, i386, powerpc, ppc64, s390, sparc) + +2006-07-11 Jakub Jelinek + + * config/i386/linux.h (LINK_SPEC): Add --hash-style=both. + * config/i386/linux64.h (LINK_SPEC): Likewise. + * config/rs6000/sysv4.h (LINK_OS_LINUX_SPEC): Likewise. + * config/rs6000/linux64.h (LINK_OS_LINUX_SPEC32, + LINK_OS_LINUX_SPEC64): Likewise. + * config/s390/linux.h (LINK_SPEC): Likewise. + * config/ia64/linux.h (LINK_SPEC): Likewise. + * config/sparc/linux.h (LINK_SPEC): Likewise. + * config/sparc/linux64.h (LINK_SPEC, LINK_ARCH32_SPEC, + LINK_ARCH64_SPEC): Likewise. + * config/alpha/linux-elf.h (LINK_SPEC): Likewise. + +2009-12-21 Matthias Klose + + * config/arm/linux-elf.h (LINK_SPEC): Add --hash-style=both. + +2012-11-17 Matthias Klose + + * config/aarch64/aarch64-linux.h (LINK_SPEC): Add --hash-style=both. + +--- + gcc/config/alpha/linux-elf.h | 2 +- + gcc/config/i386/linux.h | 2 +- + gcc/config/i386/linux64.h | 2 +- + gcc/config/ia64/linux.h | 2 +- + gcc/config/rs6000/linux64.h | 4 ++-- + gcc/config/rs6000/sysv4.h | 2 +- + gcc/config/s390/linux.h | 2 +- + gcc/config/sparc/linux.h | 2 +- + 8 files changed, 9 insertions(+), 9 deletions(-) + +Index: b/src/gcc/config/alpha/linux-elf.h +=================================================================== +--- a/src/gcc/config/alpha/linux-elf.h ++++ b/src/gcc/config/alpha/linux-elf.h +@@ -37,7 +37,7 @@ + + #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER + +-#define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax} \ ++#define LINK_SPEC "-m elf64alpha --hash-style=both %{G*} %{relax:-relax} \ + %{O*:-O3} %{!O*:-O1} \ + %{shared:-shared} \ + %{!shared: \ +Index: b/src/gcc/config/ia64/linux.h +=================================================================== +--- a/src/gcc/config/ia64/linux.h ++++ b/src/gcc/config/ia64/linux.h +@@ -58,7 +58,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC "\ ++#define LINK_SPEC " --hash-style=both \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/rs6000/linux64.h +=================================================================== +--- a/src/gcc/config/rs6000/linux64.h ++++ b/src/gcc/config/rs6000/linux64.h +@@ -385,11 +385,11 @@ + " -m elf64ppc") + #endif + +-#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=both %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}" + +-#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=both %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}" + +Index: b/src/gcc/config/rs6000/sysv4.h +=================================================================== +--- a/src/gcc/config/rs6000/sysv4.h ++++ b/src/gcc/config/rs6000/sysv4.h +@@ -788,7 +788,7 @@ + #define GNU_USER_DYNAMIC_LINKER \ + CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER) + +-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=both %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" + +Index: b/src/gcc/config/s390/linux.h +=================================================================== +--- a/src/gcc/config/s390/linux.h ++++ b/src/gcc/config/s390/linux.h +@@ -65,7 +65,7 @@ + + #undef LINK_SPEC + #define LINK_SPEC \ +- "%{m31:-m elf_s390}%{m64:-m elf64_s390} \ ++ "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=both \ + %{shared:-shared} \ + %{!shared: \ + %{static:-static} \ +Index: b/src/gcc/config/sparc/linux.h +=================================================================== +--- a/src/gcc/config/sparc/linux.h ++++ b/src/gcc/config/sparc/linux.h +@@ -86,7 +86,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC "-m elf32_sparc %{shared:-shared} \ ++#define LINK_SPEC "-m elf32_sparc --hash-style=both %{shared:-shared} \ + %{!mno-relax:%{!r:-relax}} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/arm/linux-elf.h +=================================================================== +--- a/src/gcc/config/arm/linux-elf.h ++++ b/src/gcc/config/arm/linux-elf.h +@@ -67,6 +67,7 @@ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "} \ + -X \ ++ --hash-style=both \ + %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ + SUBTARGET_EXTRA_LINK_SPEC + +Index: b/src/gcc/config/i386/gnu-user.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user.h ++++ b/src/gcc/config/i386/gnu-user.h +@@ -74,7 +74,7 @@ + { "link_emulation", GNU_USER_LINK_EMULATION },\ + { "dynamic_linker", GNU_USER_DYNAMIC_LINKER } + +-#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ ++#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=both %{shared:-shared} \ + %{!shared: \ + %{!static: \ + %{rdynamic:-export-dynamic} \ +Index: b/src/gcc/config/i386/gnu-user64.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user64.h ++++ b/src/gcc/config/i386/gnu-user64.h +@@ -56,6 +56,7 @@ + "%{" SPEC_64 ":-m " GNU_USER_LINK_EMULATION64 "} \ + %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \ + %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \ ++ --hash-style=both \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/aarch64/aarch64-linux.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-linux.h ++++ b/src/gcc/config/aarch64/aarch64-linux.h +@@ -24,6 +24,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64.so.1" + + #define LINUX_TARGET_LINK_SPEC "%{h*} \ ++ --hash-style=both \ + %{static:-Bstatic} \ + %{shared:-shared} \ + %{symbolic:-Bsymbolic} \ --- gcc-4.8-4.8.5.orig/debian/patches/gcc-hash-style-gnu.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-hash-style-gnu.diff @@ -0,0 +1,168 @@ +# DP: Link using --hash-style=gnu (aarch64, alpha, amd64, armel, armhf, ia64, +# DP: i386, powerpc, ppc64, s390, sparc) + +2006-07-11 Jakub Jelinek + + * config/i386/linux.h (LINK_SPEC): Add --hash-style=gnu. + * config/i386/linux64.h (LINK_SPEC): Likewise. + * config/rs6000/sysv4.h (LINK_OS_LINUX_SPEC): Likewise. + * config/rs6000/linux64.h (LINK_OS_LINUX_SPEC32, + LINK_OS_LINUX_SPEC64): Likewise. + * config/s390/linux.h (LINK_SPEC): Likewise. + * config/ia64/linux.h (LINK_SPEC): Likewise. + * config/sparc/linux.h (LINK_SPEC): Likewise. + * config/sparc/linux64.h (LINK_SPEC, LINK_ARCH32_SPEC, + LINK_ARCH64_SPEC): Likewise. + * config/alpha/linux-elf.h (LINK_SPEC): Likewise. + +2009-12-21 Matthias Klose + + * config/arm/linux-elf.h (LINK_SPEC): Add --hash-style=gnu. + +2012-11-17 Matthias Klose + + * config/aarch64/aarch64-linux.h (LINK_SPEC): Add --hash-style=gnu. + +--- + gcc/config/alpha/linux-elf.h | 2 +- + gcc/config/i386/linux.h | 2 +- + gcc/config/i386/linux64.h | 2 +- + gcc/config/ia64/linux.h | 2 +- + gcc/config/rs6000/linux64.h | 4 ++-- + gcc/config/rs6000/sysv4.h | 2 +- + gcc/config/s390/linux.h | 2 +- + gcc/config/sparc/linux.h | 2 +- + 8 files changed, 9 insertions(+), 9 deletions(-) + +Index: b/src/gcc/config/alpha/linux-elf.h +=================================================================== +--- a/src/gcc/config/alpha/linux-elf.h ++++ b/src/gcc/config/alpha/linux-elf.h +@@ -37,7 +37,7 @@ along with GCC; see the file COPYING3. + + #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER + +-#define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax} \ ++#define LINK_SPEC "-m elf64alpha --hash-style=gnu %{G*} %{relax:-relax} \ + %{O*:-O3} %{!O*:-O1} \ + %{shared:-shared} \ + %{!shared: \ +Index: b/src/gcc/config/ia64/linux.h +=================================================================== +--- a/src/gcc/config/ia64/linux.h ++++ b/src/gcc/config/ia64/linux.h +@@ -58,7 +58,7 @@ do { \ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC "\ ++#define LINK_SPEC " --hash-style=gnu \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/rs6000/linux64.h +=================================================================== +--- a/src/gcc/config/rs6000/linux64.h ++++ b/src/gcc/config/rs6000/linux64.h +@@ -401,11 +401,11 @@ extern int dot_symbols; + " -m elf64ppc") + #endif + +-#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=gnu %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}" + +-#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=gnu %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}" + +Index: b/src/gcc/config/rs6000/sysv4.h +=================================================================== +--- a/src/gcc/config/rs6000/sysv4.h ++++ b/src/gcc/config/rs6000/sysv4.h +@@ -773,7 +773,7 @@ ENDIAN_SELECT(" -mbig", " -mlittle", DEF + #define GNU_USER_DYNAMIC_LINKER \ + CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER) + +-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" + +Index: b/src/gcc/config/s390/linux.h +=================================================================== +--- a/src/gcc/config/s390/linux.h ++++ b/src/gcc/config/s390/linux.h +@@ -65,7 +65,7 @@ along with GCC; see the file COPYING3. + + #undef LINK_SPEC + #define LINK_SPEC \ +- "%{m31:-m elf_s390}%{m64:-m elf64_s390} \ ++ "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu \ + %{shared:-shared} \ + %{!shared: \ + %{static:-static} \ +Index: b/src/gcc/config/sparc/linux.h +=================================================================== +--- a/src/gcc/config/sparc/linux.h ++++ b/src/gcc/config/sparc/linux.h +@@ -86,7 +86,7 @@ extern const char *host_detect_local_cpu + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC "-m elf32_sparc %{shared:-shared} \ ++#define LINK_SPEC "-m elf32_sparc --hash-style=gnu %{shared:-shared} \ + %{!mno-relax:%{!r:-relax}} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/arm/linux-elf.h +=================================================================== +--- a/src/gcc/config/arm/linux-elf.h ++++ b/src/gcc/config/arm/linux-elf.h +@@ -67,6 +67,7 @@ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "} \ + -X \ ++ --hash-style=gnu \ + %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ + SUBTARGET_EXTRA_LINK_SPEC + +Index: b/src/gcc/config/i386/gnu-user.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user.h ++++ b/src/gcc/config/i386/gnu-user.h +@@ -74,7 +74,7 @@ along with GCC; see the file COPYING3. + { "link_emulation", GNU_USER_LINK_EMULATION },\ + { "dynamic_linker", GNU_USER_DYNAMIC_LINKER } + +-#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ ++#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{shared:-shared} \ + %{!shared: \ + %{!static: \ + %{rdynamic:-export-dynamic} \ +Index: b/src/gcc/config/i386/gnu-user64.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user64.h ++++ b/src/gcc/config/i386/gnu-user64.h +@@ -56,6 +56,7 @@ see the files COPYING3 and COPYING.RUNTI + "%{" SPEC_64 ":-m " GNU_USER_LINK_EMULATION64 "} \ + %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \ + %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \ ++ --hash-style=gnu \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/aarch64/aarch64-linux.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-linux.h ++++ b/src/gcc/config/aarch64/aarch64-linux.h +@@ -26,6 +26,7 @@ + #define CPP_SPEC "%{pthread:-D_REENTRANT}" + + #define LINUX_TARGET_LINK_SPEC "%{h*} \ ++ --hash-style=gnu \ + %{static:-Bstatic} \ + %{shared:-shared} \ + %{symbolic:-Bsymbolic} \ --- gcc-4.8-4.8.5.orig/debian/patches/gcc-ice-apport.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-ice-apport.diff @@ -0,0 +1,24 @@ +# DP: Report an ICE to apport (if apport is available +# DP: and the environment variable GCC_NOAPPORT is not set) + +Index: b/src/gcc/gcc.c +=================================================================== +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -6271,6 +6271,16 @@ retry_ice (const char *prog, const char + fflush (stderr); + free (cmd); + } ++ if (!getenv ("GCC_NOAPPORT") ++ && !access ("/usr/share/apport/gcc_ice_hook", R_OK | X_OK)) ++ { ++ char *cmd = XNEWVEC (char, 50 + strlen (temp_filenames[attempt * 2]) ++ + strlen (new_argv[0])); ++ sprintf (cmd, "/usr/share/apport/gcc_ice_hook %s %s", ++ new_argv[0], temp_filenames[attempt * 2]); ++ system (cmd); ++ free (cmd); ++ } + /* Make sure it is not deleted. */ + free (temp_filenames[attempt * 2]); + temp_filenames[attempt * 2] = NULL; --- gcc-4.8-4.8.5.orig/debian/patches/gcc-ice-dump.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-ice-dump.diff @@ -0,0 +1,32 @@ +# DP: For ICEs, dump the preprocessed source file to stderr +# DP: when in a distro build environment. + +Index: b/src/gcc/gcc.c +=================================================================== +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -6253,9 +6253,24 @@ retry_ice (const char *prog, const char + if (WIFEXITED (status) + && WEXITSTATUS (status) == SUCCESS_EXIT_CODE) + { ++ char *deb_build_options = getenv("DEB_BUILD_OPTIONS"); ++ + fnotice (stderr, "Preprocessed source stored into %s file," + " please attach this to your bugreport.\n", + temp_filenames[attempt * 2]); ++ if (deb_build_options) ++ { ++ char *cmd = XNEWVEC (char, 50 + strlen (temp_filenames[attempt * 2])); ++ ++ sprintf (cmd, "/bin/cat %s >&2", temp_filenames[attempt * 2]); ++ fprintf (stderr, "=== BEGIN GCC DUMP ===\n"); ++ fflush (stderr); ++ system (cmd); ++ fflush (stderr); ++ fprintf (stderr, "=== END GCC DUMP ===\n"); ++ fflush (stderr); ++ free (cmd); ++ } + /* Make sure it is not deleted. */ + free (temp_filenames[attempt * 2]); + temp_filenames[attempt * 2] = NULL; --- gcc-4.8-4.8.5.orig/debian/patches/gcc-ice-hack.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-ice-hack.diff @@ -0,0 +1,315 @@ +# DP: Retry the build on an ice, save the calling options and preprocessed +# DP: source when the ice is reproducible. + +2004-01-23 Jakub Jelinek + + * gcc.c (execute): Don't free first string early, but at the end + of the function. Call retry_ice if compiler exited with + ICE_EXIT_CODE. + (retry_ice): New function. + * diagnostic.c (diagnostic_count_diagnostic, + diagnostic_action_after_output, error_recursion): Exit with + ICE_EXIT_CODE instead of FATAL_EXIT_CODE. + +#--- a/src/gcc/Makefile.in +#+++ b/src/gcc/Makefile.in +#@@ -181,6 +181,8 @@ SYSCALLS.c.X-warn = -Wno-strict-prototypes -Wno-error +# dfp.o-warn = -Wno-error +# # mips-tfile.c contains -Wcast-qual warnings. +# mips-tfile.o-warn = -Wno-error +#+# gcc-ice-hack +#+gcc.o-warn = -Wno-error +# +# # All warnings have to be shut off in stage1 if the compiler used then +# # isn't gcc; configure determines that. WARN_CFLAGS will be either +Index: b/src/gcc/gcc.c +=================================================================== +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -249,6 +249,9 @@ + #if defined(HAVE_TARGET_OBJECT_SUFFIX) || defined(HAVE_TARGET_EXECUTABLE_SUFFIX) + static const char *convert_filename (const char *, int, int); + #endif ++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS)) ++static void retry_ice (const char *prog, const char **argv); ++#endif + + static const char *getenv_spec_function (int, const char **); + static const char *if_exists_spec_function (int, const char **); +@@ -2773,7 +2776,7 @@ + } + } + +- if (string != commands[i].prog) ++ if (i && string != commands[i].prog) + free (CONST_CAST (char *, string)); + } + +@@ -2826,6 +2829,16 @@ + else if (WIFEXITED (status) + && WEXITSTATUS (status) >= MIN_FATAL_STATUS) + { ++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS)) ++ /* For ICEs in cc1, cc1obj, cc1plus see if it is ++ reproducible or not. */ ++ const char *p; ++ if (WEXITSTATUS (status) == ICE_EXIT_CODE ++ && i == 0 ++ && (p = strrchr (commands[0].argv[0], DIR_SEPARATOR)) ++ && ! strncmp (p + 1, "cc1", 3)) ++ retry_ice (commands[0].prog, commands[0].argv); ++#endif + if (WEXITSTATUS (status) > greatest_status) + greatest_status = WEXITSTATUS (status); + ret_code = -1; +@@ -2883,6 +2896,9 @@ + } + } + ++ if (commands[0].argv[0] != commands[0].prog) ++ free (CONST_CAST (char *, commands[0].argv[0])); ++ + return ret_code; + } + } +@@ -6036,6 +6052,227 @@ + switches[switchnum].validated = true; + } + ++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS)) ++#define RETRY_ICE_ATTEMPTS 2 ++ ++static void ++retry_ice (const char *prog, const char **argv) ++{ ++ int nargs, out_arg = -1, quiet = 0, attempt; ++ int pid, retries, sleep_interval; ++ const char **new_argv; ++ char *temp_filenames[RETRY_ICE_ATTEMPTS * 2 + 2]; ++ ++ if (gcc_input_filename == NULL || ! strcmp (gcc_input_filename, "-")) ++ return; ++ ++ for (nargs = 0; argv[nargs] != NULL; ++nargs) ++ /* Only retry compiler ICEs, not preprocessor ones. */ ++ if (! strcmp (argv[nargs], "-E")) ++ return; ++ else if (argv[nargs][0] == '-' && argv[nargs][1] == 'o') ++ { ++ if (out_arg == -1) ++ out_arg = nargs; ++ else ++ return; ++ } ++ /* If the compiler is going to output any time information, ++ it might varry between invocations. */ ++ else if (! strcmp (argv[nargs], "-quiet")) ++ quiet = 1; ++ else if (! strcmp (argv[nargs], "-ftime-report")) ++ return; ++ ++ if (out_arg == -1 || !quiet) ++ return; ++ ++ memset (temp_filenames, '\0', sizeof (temp_filenames)); ++ new_argv = XALLOCAVEC (const char *, nargs + 3); ++ memcpy (new_argv, argv, (nargs + 1) * sizeof (const char *)); ++ new_argv[nargs++] = "-frandom-seed=0"; ++ new_argv[nargs] = NULL; ++ if (new_argv[out_arg][2] == '\0') ++ new_argv[out_arg + 1] = "-"; ++ else ++ new_argv[out_arg] = "-o-"; ++ ++ for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS + 1; ++attempt) ++ { ++ int fd = -1; ++ int status; ++ ++ temp_filenames[attempt * 2] = make_temp_file (".out"); ++ temp_filenames[attempt * 2 + 1] = make_temp_file (".err"); ++ ++ if (attempt == RETRY_ICE_ATTEMPTS) ++ { ++ int i; ++ int fd1, fd2; ++ struct stat st1, st2; ++ size_t n, len; ++ char *buf; ++ ++ buf = XNEWVEC (char, 8192); ++ ++ for (i = 0; i < 2; ++i) ++ { ++ fd1 = open (temp_filenames[i], O_RDONLY); ++ fd2 = open (temp_filenames[2 + i], O_RDONLY); ++ ++ if (fd1 < 0 || fd2 < 0) ++ { ++ i = -1; ++ close (fd1); ++ close (fd2); ++ break; ++ } ++ ++ if (fstat (fd1, &st1) < 0 || fstat (fd2, &st2) < 0) ++ { ++ i = -1; ++ close (fd1); ++ close (fd2); ++ break; ++ } ++ ++ if (st1.st_size != st2.st_size) ++ { ++ close (fd1); ++ close (fd2); ++ break; ++ } ++ ++ len = 0; ++ for (n = st1.st_size; n; n -= len) ++ { ++ len = n; ++ if (len > 4096) ++ len = 4096; ++ ++ if (read (fd1, buf, len) != (int) len ++ || read (fd2, buf + 4096, len) != (int) len) ++ { ++ i = -1; ++ break; ++ } ++ ++ if (memcmp (buf, buf + 4096, len) != 0) ++ break; ++ } ++ ++ close (fd1); ++ close (fd2); ++ ++ if (n) ++ break; ++ } ++ ++ free (buf); ++ if (i == -1) ++ break; ++ ++ if (i != 2) ++ { ++ fnotice (stderr, "The bug is not reproducible, so it is" ++ " likely a hardware or OS problem.\n"); ++ break; ++ } ++ ++ fd = open (temp_filenames[attempt * 2], O_RDWR); ++ if (fd < 0) ++ break; ++ write (fd, "//", 2); ++ for (i = 0; i < nargs; i++) ++ { ++ write (fd, " ", 1); ++ write (fd, new_argv[i], strlen (new_argv[i])); ++ } ++ write (fd, "\n", 1); ++ new_argv[nargs] = "-E"; ++ new_argv[nargs + 1] = NULL; ++ } ++ ++ /* Fork a subprocess; wait and retry if it fails. */ ++ sleep_interval = 1; ++ pid = -1; ++ for (retries = 0; retries < 4; retries++) ++ { ++ pid = fork (); ++ if (pid >= 0) ++ break; ++ sleep (sleep_interval); ++ sleep_interval *= 2; ++ } ++ ++ if (pid < 0) ++ break; ++ else if (pid == 0) ++ { ++ if (attempt != RETRY_ICE_ATTEMPTS) ++ fd = open (temp_filenames[attempt * 2], O_RDWR); ++ if (fd < 0) ++ exit (-1); ++ if (fd != 1) ++ { ++ close (1); ++ dup (fd); ++ close (fd); ++ } ++ ++ fd = open (temp_filenames[attempt * 2 + 1], O_RDWR); ++ if (fd < 0) ++ exit (-1); ++ if (fd != 2) ++ { ++ close (2); ++ dup (fd); ++ close (fd); ++ } ++ ++ if (prog == new_argv[0]) ++ execvp (prog, CONST_CAST2 (char *const *, const char **, new_argv)); ++ else ++ execv (new_argv[0], CONST_CAST2 (char *const *, const char **, new_argv)); ++ exit (-1); ++ } ++ ++ if (waitpid (pid, &status, 0) < 0) ++ break; ++ ++ if (attempt < RETRY_ICE_ATTEMPTS ++ && (! WIFEXITED (status) || WEXITSTATUS (status) != ICE_EXIT_CODE)) ++ { ++ fnotice (stderr, "The bug is not reproducible, so it is" ++ " likely a hardware or OS problem.\n"); ++ break; ++ } ++ else if (attempt == RETRY_ICE_ATTEMPTS) ++ { ++ close (fd); ++ if (WIFEXITED (status) ++ && WEXITSTATUS (status) == SUCCESS_EXIT_CODE) ++ { ++ fnotice (stderr, "Preprocessed source stored into %s file," ++ " please attach this to your bugreport.\n", ++ temp_filenames[attempt * 2]); ++ /* Make sure it is not deleted. */ ++ free (temp_filenames[attempt * 2]); ++ temp_filenames[attempt * 2] = NULL; ++ break; ++ } ++ } ++ } ++ ++ for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS * 2 + 2; attempt++) ++ if (temp_filenames[attempt]) ++ { ++ unlink (temp_filenames[attempt]); ++ free (temp_filenames[attempt]); ++ } ++} ++#endif ++ + /* Search for a file named NAME trying various prefixes including the + user's -B prefix and some standard ones. + Return the absolute file name found. If nothing is found, return NAME. */ +Index: b/src/gcc/diagnostic.c +=================================================================== +--- a/src/gcc/diagnostic.c ++++ b/src/gcc/diagnostic.c +@@ -455,7 +455,7 @@ + real_abort (); + diagnostic_finish (context); + fnotice (stderr, "compilation terminated.\n"); +- exit (FATAL_EXIT_CODE); ++ exit (ICE_EXIT_CODE); + + default: + gcc_unreachable (); --- gcc-4.8-4.8.5.orig/debian/patches/gcc-linaro-doc.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-linaro-doc.diff @@ -0,0 +1,2525 @@ +# DP: Changes for the Linaro 4.8-2015.07 release (documentation). + +--- a/src/gcc/doc/extend.texi ++++ b/src/gcc/doc/extend.texi +@@ -8797,6 +8797,7 @@ + * Alpha Built-in Functions:: + * ARM iWMMXt Built-in Functions:: + * ARM NEON Intrinsics:: ++* ARM ACLE Intrinsics:: + * AVR Built-in Functions:: + * Blackfin Built-in Functions:: + * FR-V Built-in Functions:: +@@ -9063,6 +9064,14 @@ + + @include arm-neon-intrinsics.texi + ++@node ARM ACLE Intrinsics ++@subsection ARM ACLE Intrinsics ++ ++These built-in intrinsics for the ARMv8-A CRC32 extension are available when ++the @option{-march=armv8-a+crc} switch is used: ++ ++@include arm-acle-intrinsics.texi ++ + @node AVR Built-in Functions + @subsection AVR Built-in Functions + +--- a/src/gcc/doc/arm-acle-intrinsics.texi ++++ b/src/gcc/doc/arm-acle-intrinsics.texi +@@ -0,0 +1,55 @@ ++@c Copyright (C) 2013-2014 Free Software Foundation, Inc. ++@c This is part of the GCC manual. ++@c For copying conditions, see the file gcc.texi. ++ ++@subsubsection CRC32 intrinsics ++ ++@itemize @bullet ++@item uint32_t __crc32b (uint32_t, uint8_t) ++@*@emph{Form of expected instruction(s):} @code{crc32b @var{r0}, @var{r0}, @var{r0}} ++@end itemize ++ ++ ++@itemize @bullet ++@item uint32_t __crc32h (uint32_t, uint16_t) ++@*@emph{Form of expected instruction(s):} @code{crc32h @var{r0}, @var{r0}, @var{r0}} ++@end itemize ++ ++ ++@itemize @bullet ++@item uint32_t __crc32w (uint32_t, uint32_t) ++@*@emph{Form of expected instruction(s):} @code{crc32w @var{r0}, @var{r0}, @var{r0}} ++@end itemize ++ ++ ++@itemize @bullet ++@item uint32_t __crc32d (uint32_t, uint64_t) ++@*@emph{Form of expected instruction(s):} Two @code{crc32w @var{r0}, @var{r0}, @var{r0}} ++instructions for AArch32. One @code{crc32w @var{w0}, @var{w0}, @var{x0}} instruction for ++AArch64. ++@end itemize ++ ++@itemize @bullet ++@item uint32_t __crc32cb (uint32_t, uint8_t) ++@*@emph{Form of expected instruction(s):} @code{crc32cb @var{r0}, @var{r0}, @var{r0}} ++@end itemize ++ ++ ++@itemize @bullet ++@item uint32_t __crc32ch (uint32_t, uint16_t) ++@*@emph{Form of expected instruction(s):} @code{crc32ch @var{r0}, @var{r0}, @var{r0}} ++@end itemize ++ ++ ++@itemize @bullet ++@item uint32_t __crc32cw (uint32_t, uint32_t) ++@*@emph{Form of expected instruction(s):} @code{crc32cw @var{r0}, @var{r0}, @var{r0}} ++@end itemize ++ ++ ++@itemize @bullet ++@item uint32_t __crc32cd (uint32_t, uint64_t) ++@*@emph{Form of expected instruction(s):} Two @code{crc32cw @var{r0}, @var{r0}, @var{r0}} ++instructions for AArch32. One @code{crc32cw @var{w0}, @var{w0}, @var{x0}} instruction for ++AArch64. ++@end itemize +--- a/src/gcc/doc/tm.texi ++++ b/src/gcc/doc/tm.texi +@@ -10925,10 +10925,18 @@ + @samp{TARGET_INIT_BUILTINS}. @var{fndecl} is the declaration of the + built-in function. @var{n_args} is the number of arguments passed to + the function; the arguments themselves are pointed to by @var{argp}. +-The result is another tree containing a simplified expression for the +-call's result. If @var{ignore} is true the value will be ignored. ++The result is another tree, valid for both GIMPLE and GENERIC, ++containing a simplified expression for the call's result. If ++@var{ignore} is true the value will be ignored. + @end deftypefn + ++@deftypefn {Target Hook} bool TARGET_GIMPLE_FOLD_BUILTIN (gimple_stmt_iterator *@var{gsi}) ++Fold a call to a machine specific built-in function that was set up ++by @samp{TARGET_INIT_BUILTINS}. @var{gsi} points to the gimple ++statement holding the function call. Returns true if any change ++was made to the GIMPLE stream. ++@end deftypefn ++ + @deftypefn {Target Hook} int TARGET_COMPARE_VERSION_PRIORITY (tree @var{decl1}, tree @var{decl2}) + This hook is used to compare the target attributes in two functions to + determine which function's features get higher priority. This is used +--- a/src/gcc/doc/tm.texi.in ++++ b/src/gcc/doc/tm.texi.in +@@ -10771,10 +10771,13 @@ + @samp{TARGET_INIT_BUILTINS}. @var{fndecl} is the declaration of the + built-in function. @var{n_args} is the number of arguments passed to + the function; the arguments themselves are pointed to by @var{argp}. +-The result is another tree containing a simplified expression for the +-call's result. If @var{ignore} is true the value will be ignored. ++The result is another tree, valid for both GIMPLE and GENERIC, ++containing a simplified expression for the call's result. If ++@var{ignore} is true the value will be ignored. + @end deftypefn + ++@hook TARGET_GIMPLE_FOLD_BUILTIN ++ + @hook TARGET_COMPARE_VERSION_PRIORITY + This hook is used to compare the target attributes in two functions to + determine which function's features get higher priority. This is used +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -418,7 +418,7 @@ + -ftree-parallelize-loops=@var{n} -ftree-pre -ftree-partial-pre -ftree-pta @gol + -ftree-reassoc -ftree-sink -ftree-slsr -ftree-sra @gol + -ftree-switch-conversion -ftree-tail-merge @gol +--ftree-ter -ftree-vect-loop-version -ftree-vectorize -ftree-vrp @gol ++-ftree-ter -ftree-vectorize -ftree-vrp @gol + -funit-at-a-time -funroll-all-loops -funroll-loops @gol + -funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops @gol + -fvariable-expansion-in-unroller -fvect-cost-model -fvpt -fweb @gol +@@ -511,7 +511,9 @@ + -mtp=@var{name} -mtls-dialect=@var{dialect} @gol + -mword-relocations @gol + -mfix-cortex-m3-ldrd @gol +--munaligned-access} ++-munaligned-access @gol ++-mneon-for-64bits @gol ++-mrestrict-it} + + @emph{AVR Options} + @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol +@@ -6606,7 +6608,7 @@ + @option{-Os} disables the following optimization flags: + @gccoptlist{-falign-functions -falign-jumps -falign-loops @gol + -falign-labels -freorder-blocks -freorder-blocks-and-partition @gol +--fprefetch-loop-arrays -ftree-vect-loop-version} ++-fprefetch-loop-arrays} + + @item -Ofast + @opindex Ofast +@@ -7847,19 +7849,20 @@ + Perform basic block vectorization on trees. This flag is enabled by default at + @option{-O3} and when @option{-ftree-vectorize} is enabled. + +-@item -ftree-vect-loop-version +-@opindex ftree-vect-loop-version +-Perform loop versioning when doing loop vectorization on trees. When a loop +-appears to be vectorizable except that data alignment or data dependence cannot +-be determined at compile time, then vectorized and non-vectorized versions of +-the loop are generated along with run-time checks for alignment or dependence +-to control which version is executed. This option is enabled by default +-except at level @option{-Os} where it is disabled. +- +-@item -fvect-cost-model ++@item -fvect-cost-model=@var{model} + @opindex fvect-cost-model +-Enable cost model for vectorization. This option is enabled by default at +-@option{-O3}. ++Alter the cost model used for vectorization. The @var{model} argument ++should be one of @code{unlimited}, @code{dynamic} or @code{cheap}. ++With the @code{unlimited} model the vectorized code-path is assumed ++to be profitable while with the @code{dynamic} model a runtime check ++will guard the vectorized code-path to enable it only for iteration ++counts that will likely execute faster than when executing the original ++scalar loop. The @code{cheap} model will disable vectorization of ++loops where doing so would be cost prohibitive for example due to ++required runtime checks for data dependence or alignment but otherwise ++is equal to the @code{dynamic} model. ++The default cost model depends on other optimization flags and is ++either @code{dynamic} or @code{cheap}. + + @item -ftree-vrp + @opindex ftree-vrp +@@ -9255,14 +9258,16 @@ + + @item vect-max-version-for-alignment-checks + The maximum number of run-time checks that can be performed when +-doing loop versioning for alignment in the vectorizer. See option +-@option{-ftree-vect-loop-version} for more information. ++doing loop versioning for alignment in the vectorizer. + + @item vect-max-version-for-alias-checks + The maximum number of run-time checks that can be performed when +-doing loop versioning for alias in the vectorizer. See option +-@option{-ftree-vect-loop-version} for more information. ++doing loop versioning for alias in the vectorizer. + ++@item vect-max-peeling-for-alignment ++The maximum number of loop peels to enhance access alignment ++for vectorizer. Value -1 means 'no limit'. ++ + @item max-iterations-to-track + The maximum number of iterations of a loop the brute-force algorithm + for analysis of the number of iterations of the loop tries to evaluate. +@@ -10990,6 +10995,8 @@ + the following: + + @table @samp ++@item crc ++Enable CRC extension. + @item crypto + Enable Crypto extension. This implies Advanced SIMD is enabled. + @item fp +@@ -11276,9 +11283,12 @@ + @samp{armv6}, @samp{armv6j}, + @samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m}, + @samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{armv7e-m} +-@samp{armv8-a}, ++@samp{armv8-a}, @samp{armv8-a+crc}, + @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}. + ++@option{-march=armv8-a+crc} enables code generation for the ARMv8-A ++architecture together with the optional CRC32 extensions. ++ + @option{-march=native} causes the compiler to auto-detect the architecture + of the build computer. At present, this feature is only supported on + GNU/Linux, and not all architectures are recognized. If the auto-detect +@@ -11308,8 +11318,8 @@ + @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp}, + @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s}, + @samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9}, +-@samp{cortex-a15}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, +-@samp{cortex-m4}, @samp{cortex-m3}, ++@samp{cortex-a15}, @samp{cortex-a53}, @samp{cortex-r4}, @samp{cortex-r4f}, ++@samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m4}, @samp{cortex-m3}, + @samp{cortex-m1}, + @samp{cortex-m0}, + @samp{cortex-m0plus}, +@@ -11556,6 +11566,17 @@ + preprocessor symbol @code{__ARM_FEATURE_UNALIGNED} will also be + defined. + ++@item -mneon-for-64bits ++@opindex mneon-for-64bits ++Enables using Neon to handle scalar 64-bits operations. This is ++disabled by default since the cost of moving data from core registers ++to Neon is high. ++ ++@item -mrestrict-it ++@opindex mrestrict-it ++Restricts generation of IT blocks to conform to the rules of ARMv8. ++IT blocks can only contain a single 16-bit instruction from a select ++set of instructions. This option is on by default for ARMv8 Thumb mode. + @end table + + @node AVR Options +--- a/src/gcc/doc/arm-neon-intrinsics.texi ++++ b/src/gcc/doc/arm-neon-intrinsics.texi +@@ -4079,6 +4079,12 @@ + @subsubsection Vector shift right and insert + + @itemize @bullet ++@item poly64x1_t vsri_n_p64 (poly64x1_t, poly64x1_t, const int) ++@*@emph{Form of expected instruction(s):} @code{vsri.64 @var{d0}, @var{d0}, #@var{0}} ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x2_t vsri_n_u32 (uint32x2_t, uint32x2_t, const int) + @*@emph{Form of expected instruction(s):} @code{vsri.32 @var{d0}, @var{d0}, #@var{0}} + @end itemize +@@ -4139,6 +4145,12 @@ + + + @itemize @bullet ++@item poly64x2_t vsriq_n_p64 (poly64x2_t, poly64x2_t, const int) ++@*@emph{Form of expected instruction(s):} @code{vsri.64 @var{q0}, @var{q0}, #@var{0}} ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x4_t vsriq_n_u32 (uint32x4_t, uint32x4_t, const int) + @*@emph{Form of expected instruction(s):} @code{vsri.32 @var{q0}, @var{q0}, #@var{0}} + @end itemize +@@ -4203,6 +4215,12 @@ + @subsubsection Vector shift left and insert + + @itemize @bullet ++@item poly64x1_t vsli_n_p64 (poly64x1_t, poly64x1_t, const int) ++@*@emph{Form of expected instruction(s):} @code{vsli.64 @var{d0}, @var{d0}, #@var{0}} ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x2_t vsli_n_u32 (uint32x2_t, uint32x2_t, const int) + @*@emph{Form of expected instruction(s):} @code{vsli.32 @var{d0}, @var{d0}, #@var{0}} + @end itemize +@@ -4263,6 +4281,12 @@ + + + @itemize @bullet ++@item poly64x2_t vsliq_n_p64 (poly64x2_t, poly64x2_t, const int) ++@*@emph{Form of expected instruction(s):} @code{vsli.64 @var{q0}, @var{q0}, #@var{0}} ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x4_t vsliq_n_u32 (uint32x4_t, uint32x4_t, const int) + @*@emph{Form of expected instruction(s):} @code{vsli.32 @var{q0}, @var{q0}, #@var{0}} + @end itemize +@@ -5071,6 +5095,11 @@ + @subsubsection Create vector from literal bit pattern + + @itemize @bullet ++@item poly64x1_t vcreate_p64 (uint64_t) ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x2_t vcreate_u32 (uint64_t) + @end itemize + +@@ -5184,6 +5213,11 @@ + + + @itemize @bullet ++@item poly64x1_t vdup_n_p64 (poly64_t) ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1_t vdup_n_u64 (uint64_t) + @end itemize + +@@ -5194,6 +5228,11 @@ + + + @itemize @bullet ++@item poly64x2_t vdupq_n_p64 (poly64_t) ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x4_t vdupq_n_u32 (uint32_t) + @*@emph{Form of expected instruction(s):} @code{vdup.32 @var{q0}, @var{r0}} + @end itemize +@@ -5440,6 +5479,11 @@ + + + @itemize @bullet ++@item poly64x1_t vdup_lane_p64 (poly64x1_t, const int) ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1_t vdup_lane_u64 (uint64x1_t, const int) + @end itemize + +@@ -5504,6 +5548,11 @@ + + + @itemize @bullet ++@item poly64x2_t vdupq_lane_p64 (poly64x1_t, const int) ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x2_t vdupq_lane_u64 (uint64x1_t, const int) + @end itemize + +@@ -5518,6 +5567,11 @@ + @subsubsection Combining vectors + + @itemize @bullet ++@item poly64x2_t vcombine_p64 (poly64x1_t, poly64x1_t) ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x4_t vcombine_u32 (uint32x2_t, uint32x2_t) + @end itemize + +@@ -5577,6 +5631,11 @@ + @subsubsection Splitting vectors + + @itemize @bullet ++@item poly64x1_t vget_high_p64 (poly64x2_t) ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x2_t vget_high_u32 (uint32x4_t) + @end itemize + +@@ -5686,6 +5745,11 @@ + + + @itemize @bullet ++@item poly64x1_t vget_low_p64 (poly64x2_t) ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1_t vget_low_u64 (uint64x2_t) + @end itemize + +@@ -5748,6 +5812,18 @@ + + + @itemize @bullet ++@item float16x4_t vcvt_f16_f32 (float32x4_t) ++@*@emph{Form of expected instruction(s):} @code{vcvt.f16.f32 @var{d0}, @var{q0}} ++@end itemize ++ ++ ++@itemize @bullet ++@item float32x4_t vcvt_f32_f16 (float16x4_t) ++@*@emph{Form of expected instruction(s):} @code{vcvt.f32.f16 @var{q0}, @var{d0}} ++@end itemize ++ ++ ++@itemize @bullet + @item float32x2_t vcvt_n_f32_u32 (uint32x2_t, const int) + @*@emph{Form of expected instruction(s):} @code{vcvt.f32.u32 @var{d0}, @var{d0}, #@var{0}} + @end itemize +@@ -6806,6 +6882,12 @@ + @subsubsection Vector extract + + @itemize @bullet ++@item poly64x1_t vext_p64 (poly64x1_t, poly64x1_t, const int) ++@*@emph{Form of expected instruction(s):} @code{vext.64 @var{d0}, @var{d0}, @var{d0}, #@var{0}} ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x2_t vext_u32 (uint32x2_t, uint32x2_t, const int) + @*@emph{Form of expected instruction(s):} @code{vext.32 @var{d0}, @var{d0}, @var{d0}, #@var{0}} + @end itemize +@@ -6872,6 +6954,12 @@ + + + @itemize @bullet ++@item poly64x2_t vextq_p64 (poly64x2_t, poly64x2_t, const int) ++@*@emph{Form of expected instruction(s):} @code{vext.64 @var{q0}, @var{q0}, @var{q0}, #@var{0}} ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x4_t vextq_u32 (uint32x4_t, uint32x4_t, const int) + @*@emph{Form of expected instruction(s):} @code{vext.32 @var{q0}, @var{q0}, @var{q0}, #@var{0}} + @end itemize +@@ -7162,6 +7250,12 @@ + @subsubsection Bit selection + + @itemize @bullet ++@item poly64x1_t vbsl_p64 (uint64x1_t, poly64x1_t, poly64x1_t) ++@*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}} ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x2_t vbsl_u32 (uint32x2_t, uint32x2_t, uint32x2_t) + @*@emph{Form of expected instruction(s):} @code{vbsl @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbit @var{d0}, @var{d0}, @var{d0}} @emph{or} @code{vbif @var{d0}, @var{d0}, @var{d0}} + @end itemize +@@ -7228,6 +7322,12 @@ + + + @itemize @bullet ++@item poly64x2_t vbslq_p64 (uint64x2_t, poly64x2_t, poly64x2_t) ++@*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}} ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x4_t vbslq_u32 (uint32x4_t, uint32x4_t, uint32x4_t) + @*@emph{Form of expected instruction(s):} @code{vbsl @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbit @var{q0}, @var{q0}, @var{q0}} @emph{or} @code{vbif @var{q0}, @var{q0}, @var{q0}} + @end itemize +@@ -7634,6 +7734,12 @@ + @subsubsection Element/structure loads, VLD1 variants + + @itemize @bullet ++@item poly64x1_t vld1_p64 (const poly64_t *) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x2_t vld1_u32 (const uint32_t *) + @*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}@}, [@var{r0}]} + @end itemize +@@ -7700,6 +7806,12 @@ + + + @itemize @bullet ++@item poly64x2_t vld1q_p64 (const poly64_t *) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint32x4_t vld1q_u32 (const uint32_t *) + @*@emph{Form of expected instruction(s):} @code{vld1.32 @{@var{d0}, @var{d1}@}, [@var{r0}]} + @end itemize +@@ -7820,6 +7932,12 @@ + + + @itemize @bullet ++@item poly64x1_t vld1_lane_p64 (const poly64_t *, poly64x1_t, const int) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1_t vld1_lane_u64 (const uint64_t *, uint64x1_t, const int) + @*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]} + @end itemize +@@ -7886,6 +8004,12 @@ + + + @itemize @bullet ++@item poly64x2_t vld1q_lane_p64 (const poly64_t *, poly64x2_t, const int) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x2_t vld1q_lane_u64 (const uint64_t *, uint64x2_t, const int) + @*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]} + @end itemize +@@ -7952,6 +8076,12 @@ + + + @itemize @bullet ++@item poly64x1_t vld1_dup_p64 (const poly64_t *) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1_t vld1_dup_u64 (const uint64_t *) + @*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]} + @end itemize +@@ -8018,6 +8148,12 @@ + + + @itemize @bullet ++@item poly64x2_t vld1q_dup_p64 (const poly64_t *) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x2_t vld1q_dup_u64 (const uint64_t *) + @*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}@}, [@var{r0}]} + @end itemize +@@ -8034,6 +8170,12 @@ + @subsubsection Element/structure stores, VST1 variants + + @itemize @bullet ++@item void vst1_p64 (poly64_t *, poly64x1_t) ++@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item void vst1_u32 (uint32_t *, uint32x2_t) + @*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}@}, [@var{r0}]} + @end itemize +@@ -8100,6 +8242,12 @@ + + + @itemize @bullet ++@item void vst1q_p64 (poly64_t *, poly64x2_t) ++@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item void vst1q_u32 (uint32_t *, uint32x4_t) + @*@emph{Form of expected instruction(s):} @code{vst1.32 @{@var{d0}, @var{d1}@}, [@var{r0}]} + @end itemize +@@ -8220,6 +8368,12 @@ + + + @itemize @bullet ++@item void vst1_lane_p64 (poly64_t *, poly64x1_t, const int) ++@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item void vst1_lane_s64 (int64_t *, int64x1_t, const int) + @*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]} + @end itemize +@@ -8286,6 +8440,12 @@ + + + @itemize @bullet ++@item void vst1q_lane_p64 (poly64_t *, poly64x2_t, const int) ++@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item void vst1q_lane_s64 (int64_t *, int64x2_t, const int) + @*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}@}, [@var{r0}]} + @end itemize +@@ -8356,6 +8516,12 @@ + + + @itemize @bullet ++@item poly64x1x2_t vld2_p64 (const poly64_t *) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1x2_t vld2_u64 (const uint64_t *) + @*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]} + @end itemize +@@ -8566,6 +8732,12 @@ + + + @itemize @bullet ++@item poly64x1x2_t vld2_dup_p64 (const poly64_t *) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1x2_t vld2_dup_u64 (const uint64_t *) + @*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]} + @end itemize +@@ -8636,6 +8808,12 @@ + + + @itemize @bullet ++@item void vst2_p64 (poly64_t *, poly64x1x2_t) ++@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item void vst2_u64 (uint64_t *, uint64x1x2_t) + @*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}@}, [@var{r0}]} + @end itemize +@@ -8850,6 +9028,12 @@ + + + @itemize @bullet ++@item poly64x1x3_t vld3_p64 (const poly64_t *) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1x3_t vld3_u64 (const uint64_t *) + @*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]} + @end itemize +@@ -9060,6 +9244,12 @@ + + + @itemize @bullet ++@item poly64x1x3_t vld3_dup_p64 (const poly64_t *) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1x3_t vld3_dup_u64 (const uint64_t *) + @*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}@}, [@var{r0}]} + @end itemize +@@ -9130,6 +9320,12 @@ + + + @itemize @bullet ++@item void vst3_p64 (poly64_t *, poly64x1x3_t) ++@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item void vst3_u64 (uint64_t *, uint64x1x3_t) + @*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]} + @end itemize +@@ -9344,6 +9540,12 @@ + + + @itemize @bullet ++@item poly64x1x4_t vld4_p64 (const poly64_t *) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1x4_t vld4_u64 (const uint64_t *) + @*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]} + @end itemize +@@ -9554,6 +9756,12 @@ + + + @itemize @bullet ++@item poly64x1x4_t vld4_dup_p64 (const poly64_t *) ++@*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item uint64x1x4_t vld4_dup_u64 (const uint64_t *) + @*@emph{Form of expected instruction(s):} @code{vld1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]} + @end itemize +@@ -9624,6 +9832,12 @@ + + + @itemize @bullet ++@item void vst4_p64 (poly64_t *, poly64x1x4_t) ++@*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]} ++@end itemize ++ ++ ++@itemize @bullet + @item void vst4_u64 (uint64_t *, uint64x1x4_t) + @*@emph{Form of expected instruction(s):} @code{vst1.64 @{@var{d0}, @var{d1}, @var{d2}, @var{d3}@}, [@var{r0}]} + @end itemize +@@ -10274,27 +10488,27 @@ + @subsubsection Reinterpret casts + + @itemize @bullet +-@item poly8x8_t vreinterpret_p8_u32 (uint32x2_t) ++@item poly8x8_t vreinterpret_p8_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item poly8x8_t vreinterpret_p8_u16 (uint16x4_t) ++@item poly8x8_t vreinterpret_p8_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item poly8x8_t vreinterpret_p8_u8 (uint8x8_t) ++@item poly8x8_t vreinterpret_p8_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item poly8x8_t vreinterpret_p8_s32 (int32x2_t) ++@item poly8x8_t vreinterpret_p8_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item poly8x8_t vreinterpret_p8_s16 (int16x4_t) ++@item poly8x8_t vreinterpret_p8_u64 (uint64x1_t) + @end itemize + + +@@ -10304,952 +10518,1317 @@ + + + @itemize @bullet +-@item poly8x8_t vreinterpret_p8_u64 (uint64x1_t) ++@item poly8x8_t vreinterpret_p8_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item poly8x8_t vreinterpret_p8_s64 (int64x1_t) ++@item poly8x8_t vreinterpret_p8_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item poly8x8_t vreinterpret_p8_f32 (float32x2_t) ++@item poly8x8_t vreinterpret_p8_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet +-@item poly8x8_t vreinterpret_p8_p16 (poly16x4_t) ++@item poly8x8_t vreinterpret_p8_u16 (uint16x4_t) + @end itemize + + + @itemize @bullet +-@item poly8x16_t vreinterpretq_p8_u32 (uint32x4_t) ++@item poly8x8_t vreinterpret_p8_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item poly8x16_t vreinterpretq_p8_u16 (uint16x8_t) ++@item poly16x4_t vreinterpret_p16_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item poly8x16_t vreinterpretq_p8_u8 (uint8x16_t) ++@item poly16x4_t vreinterpret_p16_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item poly8x16_t vreinterpretq_p8_s32 (int32x4_t) ++@item poly16x4_t vreinterpret_p16_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item poly8x16_t vreinterpretq_p8_s16 (int16x8_t) ++@item poly16x4_t vreinterpret_p16_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item poly8x16_t vreinterpretq_p8_s8 (int8x16_t) ++@item poly16x4_t vreinterpret_p16_u64 (uint64x1_t) + @end itemize + + + @itemize @bullet +-@item poly8x16_t vreinterpretq_p8_u64 (uint64x2_t) ++@item poly16x4_t vreinterpret_p16_s8 (int8x8_t) + @end itemize + + + @itemize @bullet +-@item poly8x16_t vreinterpretq_p8_s64 (int64x2_t) ++@item poly16x4_t vreinterpret_p16_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item poly8x16_t vreinterpretq_p8_f32 (float32x4_t) ++@item poly16x4_t vreinterpret_p16_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item poly8x16_t vreinterpretq_p8_p16 (poly16x8_t) ++@item poly16x4_t vreinterpret_p16_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet ++@item poly16x4_t vreinterpret_p16_u16 (uint16x4_t) ++@end itemize ++ ++ ++@itemize @bullet + @item poly16x4_t vreinterpret_p16_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item poly16x4_t vreinterpret_p16_u16 (uint16x4_t) ++@item float32x2_t vreinterpret_f32_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item poly16x4_t vreinterpret_p16_u8 (uint8x8_t) ++@item float32x2_t vreinterpret_f32_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item poly16x4_t vreinterpret_p16_s32 (int32x2_t) ++@item float32x2_t vreinterpret_f32_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item poly16x4_t vreinterpret_p16_s16 (int16x4_t) ++@item float32x2_t vreinterpret_f32_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item poly16x4_t vreinterpret_p16_s8 (int8x8_t) ++@item float32x2_t vreinterpret_f32_u64 (uint64x1_t) + @end itemize + + + @itemize @bullet +-@item poly16x4_t vreinterpret_p16_u64 (uint64x1_t) ++@item float32x2_t vreinterpret_f32_s8 (int8x8_t) + @end itemize + + + @itemize @bullet +-@item poly16x4_t vreinterpret_p16_s64 (int64x1_t) ++@item float32x2_t vreinterpret_f32_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item poly16x4_t vreinterpret_p16_f32 (float32x2_t) ++@item float32x2_t vreinterpret_f32_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item poly16x4_t vreinterpret_p16_p8 (poly8x8_t) ++@item float32x2_t vreinterpret_f32_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet +-@item poly16x8_t vreinterpretq_p16_u32 (uint32x4_t) ++@item float32x2_t vreinterpret_f32_u16 (uint16x4_t) + @end itemize + + + @itemize @bullet +-@item poly16x8_t vreinterpretq_p16_u16 (uint16x8_t) ++@item float32x2_t vreinterpret_f32_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item poly16x8_t vreinterpretq_p16_u8 (uint8x16_t) ++@item poly64x1_t vreinterpret_p64_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item poly16x8_t vreinterpretq_p16_s32 (int32x4_t) ++@item poly64x1_t vreinterpret_p64_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item poly16x8_t vreinterpretq_p16_s16 (int16x8_t) ++@item poly64x1_t vreinterpret_p64_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item poly16x8_t vreinterpretq_p16_s8 (int8x16_t) ++@item poly64x1_t vreinterpret_p64_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item poly16x8_t vreinterpretq_p16_u64 (uint64x2_t) ++@item poly64x1_t vreinterpret_p64_u64 (uint64x1_t) + @end itemize + + + @itemize @bullet +-@item poly16x8_t vreinterpretq_p16_s64 (int64x2_t) ++@item poly64x1_t vreinterpret_p64_s8 (int8x8_t) + @end itemize + + + @itemize @bullet +-@item poly16x8_t vreinterpretq_p16_f32 (float32x4_t) ++@item poly64x1_t vreinterpret_p64_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item poly16x8_t vreinterpretq_p16_p8 (poly8x16_t) ++@item poly64x1_t vreinterpret_p64_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item float32x2_t vreinterpret_f32_u32 (uint32x2_t) ++@item poly64x1_t vreinterpret_p64_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet +-@item float32x2_t vreinterpret_f32_u16 (uint16x4_t) ++@item poly64x1_t vreinterpret_p64_u16 (uint16x4_t) + @end itemize + + + @itemize @bullet +-@item float32x2_t vreinterpret_f32_u8 (uint8x8_t) ++@item poly64x1_t vreinterpret_p64_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item float32x2_t vreinterpret_f32_s32 (int32x2_t) ++@item int64x1_t vreinterpret_s64_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item float32x2_t vreinterpret_f32_s16 (int16x4_t) ++@item int64x1_t vreinterpret_s64_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item float32x2_t vreinterpret_f32_s8 (int8x8_t) ++@item int64x1_t vreinterpret_s64_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item float32x2_t vreinterpret_f32_u64 (uint64x1_t) ++@item int64x1_t vreinterpret_s64_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item float32x2_t vreinterpret_f32_s64 (int64x1_t) ++@item int64x1_t vreinterpret_s64_u64 (uint64x1_t) + @end itemize + + + @itemize @bullet +-@item float32x2_t vreinterpret_f32_p16 (poly16x4_t) ++@item int64x1_t vreinterpret_s64_s8 (int8x8_t) + @end itemize + + + @itemize @bullet +-@item float32x2_t vreinterpret_f32_p8 (poly8x8_t) ++@item int64x1_t vreinterpret_s64_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item float32x4_t vreinterpretq_f32_u32 (uint32x4_t) ++@item int64x1_t vreinterpret_s64_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item float32x4_t vreinterpretq_f32_u16 (uint16x8_t) ++@item int64x1_t vreinterpret_s64_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet +-@item float32x4_t vreinterpretq_f32_u8 (uint8x16_t) ++@item int64x1_t vreinterpret_s64_u16 (uint16x4_t) + @end itemize + + + @itemize @bullet +-@item float32x4_t vreinterpretq_f32_s32 (int32x4_t) ++@item int64x1_t vreinterpret_s64_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item float32x4_t vreinterpretq_f32_s16 (int16x8_t) ++@item uint64x1_t vreinterpret_u64_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item float32x4_t vreinterpretq_f32_s8 (int8x16_t) ++@item uint64x1_t vreinterpret_u64_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item float32x4_t vreinterpretq_f32_u64 (uint64x2_t) ++@item uint64x1_t vreinterpret_u64_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item float32x4_t vreinterpretq_f32_s64 (int64x2_t) ++@item uint64x1_t vreinterpret_u64_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item float32x4_t vreinterpretq_f32_p16 (poly16x8_t) ++@item uint64x1_t vreinterpret_u64_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item float32x4_t vreinterpretq_f32_p8 (poly8x16_t) ++@item uint64x1_t vreinterpret_u64_s8 (int8x8_t) + @end itemize + + + @itemize @bullet +-@item int64x1_t vreinterpret_s64_u32 (uint32x2_t) ++@item uint64x1_t vreinterpret_u64_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item int64x1_t vreinterpret_s64_u16 (uint16x4_t) ++@item uint64x1_t vreinterpret_u64_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item int64x1_t vreinterpret_s64_u8 (uint8x8_t) ++@item uint64x1_t vreinterpret_u64_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet +-@item int64x1_t vreinterpret_s64_s32 (int32x2_t) ++@item uint64x1_t vreinterpret_u64_u16 (uint16x4_t) + @end itemize + + + @itemize @bullet +-@item int64x1_t vreinterpret_s64_s16 (int16x4_t) ++@item uint64x1_t vreinterpret_u64_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item int64x1_t vreinterpret_s64_s8 (int8x8_t) ++@item int8x8_t vreinterpret_s8_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item int64x1_t vreinterpret_s64_u64 (uint64x1_t) ++@item int8x8_t vreinterpret_s8_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item int64x1_t vreinterpret_s64_f32 (float32x2_t) ++@item int8x8_t vreinterpret_s8_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item int64x1_t vreinterpret_s64_p16 (poly16x4_t) ++@item int8x8_t vreinterpret_s8_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item int64x1_t vreinterpret_s64_p8 (poly8x8_t) ++@item int8x8_t vreinterpret_s8_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item int64x2_t vreinterpretq_s64_u32 (uint32x4_t) ++@item int8x8_t vreinterpret_s8_u64 (uint64x1_t) + @end itemize + + + @itemize @bullet +-@item int64x2_t vreinterpretq_s64_u16 (uint16x8_t) ++@item int8x8_t vreinterpret_s8_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item int64x2_t vreinterpretq_s64_u8 (uint8x16_t) ++@item int8x8_t vreinterpret_s8_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item int64x2_t vreinterpretq_s64_s32 (int32x4_t) ++@item int8x8_t vreinterpret_s8_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet +-@item int64x2_t vreinterpretq_s64_s16 (int16x8_t) ++@item int8x8_t vreinterpret_s8_u16 (uint16x4_t) + @end itemize + + + @itemize @bullet +-@item int64x2_t vreinterpretq_s64_s8 (int8x16_t) ++@item int8x8_t vreinterpret_s8_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item int64x2_t vreinterpretq_s64_u64 (uint64x2_t) ++@item int16x4_t vreinterpret_s16_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item int64x2_t vreinterpretq_s64_f32 (float32x4_t) ++@item int16x4_t vreinterpret_s16_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item int64x2_t vreinterpretq_s64_p16 (poly16x8_t) ++@item int16x4_t vreinterpret_s16_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item int64x2_t vreinterpretq_s64_p8 (poly8x16_t) ++@item int16x4_t vreinterpret_s16_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item uint64x1_t vreinterpret_u64_u32 (uint32x2_t) ++@item int16x4_t vreinterpret_s16_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item uint64x1_t vreinterpret_u64_u16 (uint16x4_t) ++@item int16x4_t vreinterpret_s16_u64 (uint64x1_t) + @end itemize + + + @itemize @bullet +-@item uint64x1_t vreinterpret_u64_u8 (uint8x8_t) ++@item int16x4_t vreinterpret_s16_s8 (int8x8_t) + @end itemize + + + @itemize @bullet +-@item uint64x1_t vreinterpret_u64_s32 (int32x2_t) ++@item int16x4_t vreinterpret_s16_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item uint64x1_t vreinterpret_u64_s16 (int16x4_t) ++@item int16x4_t vreinterpret_s16_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet +-@item uint64x1_t vreinterpret_u64_s8 (int8x8_t) ++@item int16x4_t vreinterpret_s16_u16 (uint16x4_t) + @end itemize + + + @itemize @bullet +-@item uint64x1_t vreinterpret_u64_s64 (int64x1_t) ++@item int16x4_t vreinterpret_s16_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item uint64x1_t vreinterpret_u64_f32 (float32x2_t) ++@item int32x2_t vreinterpret_s32_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item uint64x1_t vreinterpret_u64_p16 (poly16x4_t) ++@item int32x2_t vreinterpret_s32_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item uint64x1_t vreinterpret_u64_p8 (poly8x8_t) ++@item int32x2_t vreinterpret_s32_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item uint64x2_t vreinterpretq_u64_u32 (uint32x4_t) ++@item int32x2_t vreinterpret_s32_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item uint64x2_t vreinterpretq_u64_u16 (uint16x8_t) ++@item int32x2_t vreinterpret_s32_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item uint64x2_t vreinterpretq_u64_u8 (uint8x16_t) ++@item int32x2_t vreinterpret_s32_u64 (uint64x1_t) + @end itemize + + + @itemize @bullet +-@item uint64x2_t vreinterpretq_u64_s32 (int32x4_t) ++@item int32x2_t vreinterpret_s32_s8 (int8x8_t) + @end itemize + + + @itemize @bullet +-@item uint64x2_t vreinterpretq_u64_s16 (int16x8_t) ++@item int32x2_t vreinterpret_s32_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item uint64x2_t vreinterpretq_u64_s8 (int8x16_t) ++@item int32x2_t vreinterpret_s32_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet +-@item uint64x2_t vreinterpretq_u64_s64 (int64x2_t) ++@item int32x2_t vreinterpret_s32_u16 (uint16x4_t) + @end itemize + + + @itemize @bullet +-@item uint64x2_t vreinterpretq_u64_f32 (float32x4_t) ++@item int32x2_t vreinterpret_s32_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item uint64x2_t vreinterpretq_u64_p16 (poly16x8_t) ++@item uint8x8_t vreinterpret_u8_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item uint64x2_t vreinterpretq_u64_p8 (poly8x16_t) ++@item uint8x8_t vreinterpret_u8_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item int8x8_t vreinterpret_s8_u32 (uint32x2_t) ++@item uint8x8_t vreinterpret_u8_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item int8x8_t vreinterpret_s8_u16 (uint16x4_t) ++@item uint8x8_t vreinterpret_u8_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item int8x8_t vreinterpret_s8_u8 (uint8x8_t) ++@item uint8x8_t vreinterpret_u8_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item int8x8_t vreinterpret_s8_s32 (int32x2_t) ++@item uint8x8_t vreinterpret_u8_u64 (uint64x1_t) + @end itemize + + + @itemize @bullet +-@item int8x8_t vreinterpret_s8_s16 (int16x4_t) ++@item uint8x8_t vreinterpret_u8_s8 (int8x8_t) + @end itemize + + + @itemize @bullet +-@item int8x8_t vreinterpret_s8_u64 (uint64x1_t) ++@item uint8x8_t vreinterpret_u8_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item int8x8_t vreinterpret_s8_s64 (int64x1_t) ++@item uint8x8_t vreinterpret_u8_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item int8x8_t vreinterpret_s8_f32 (float32x2_t) ++@item uint8x8_t vreinterpret_u8_u16 (uint16x4_t) + @end itemize + + + @itemize @bullet +-@item int8x8_t vreinterpret_s8_p16 (poly16x4_t) ++@item uint8x8_t vreinterpret_u8_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item int8x8_t vreinterpret_s8_p8 (poly8x8_t) ++@item uint16x4_t vreinterpret_u16_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item int8x16_t vreinterpretq_s8_u32 (uint32x4_t) ++@item uint16x4_t vreinterpret_u16_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item int8x16_t vreinterpretq_s8_u16 (uint16x8_t) ++@item uint16x4_t vreinterpret_u16_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item int8x16_t vreinterpretq_s8_u8 (uint8x16_t) ++@item uint16x4_t vreinterpret_u16_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item int8x16_t vreinterpretq_s8_s32 (int32x4_t) ++@item uint16x4_t vreinterpret_u16_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item int8x16_t vreinterpretq_s8_s16 (int16x8_t) ++@item uint16x4_t vreinterpret_u16_u64 (uint64x1_t) + @end itemize + + + @itemize @bullet +-@item int8x16_t vreinterpretq_s8_u64 (uint64x2_t) ++@item uint16x4_t vreinterpret_u16_s8 (int8x8_t) + @end itemize + + + @itemize @bullet +-@item int8x16_t vreinterpretq_s8_s64 (int64x2_t) ++@item uint16x4_t vreinterpret_u16_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item int8x16_t vreinterpretq_s8_f32 (float32x4_t) ++@item uint16x4_t vreinterpret_u16_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item int8x16_t vreinterpretq_s8_p16 (poly16x8_t) ++@item uint16x4_t vreinterpret_u16_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet +-@item int8x16_t vreinterpretq_s8_p8 (poly8x16_t) ++@item uint16x4_t vreinterpret_u16_u32 (uint32x2_t) + @end itemize + + + @itemize @bullet +-@item int16x4_t vreinterpret_s16_u32 (uint32x2_t) ++@item uint32x2_t vreinterpret_u32_p8 (poly8x8_t) + @end itemize + + + @itemize @bullet +-@item int16x4_t vreinterpret_s16_u16 (uint16x4_t) ++@item uint32x2_t vreinterpret_u32_p16 (poly16x4_t) + @end itemize + + + @itemize @bullet +-@item int16x4_t vreinterpret_s16_u8 (uint8x8_t) ++@item uint32x2_t vreinterpret_u32_f32 (float32x2_t) + @end itemize + + + @itemize @bullet +-@item int16x4_t vreinterpret_s16_s32 (int32x2_t) ++@item uint32x2_t vreinterpret_u32_p64 (poly64x1_t) + @end itemize + + + @itemize @bullet +-@item int16x4_t vreinterpret_s16_s8 (int8x8_t) ++@item uint32x2_t vreinterpret_u32_s64 (int64x1_t) + @end itemize + + + @itemize @bullet +-@item int16x4_t vreinterpret_s16_u64 (uint64x1_t) ++@item uint32x2_t vreinterpret_u32_u64 (uint64x1_t) + @end itemize + + + @itemize @bullet +-@item int16x4_t vreinterpret_s16_s64 (int64x1_t) ++@item uint32x2_t vreinterpret_u32_s8 (int8x8_t) + @end itemize + + + @itemize @bullet +-@item int16x4_t vreinterpret_s16_f32 (float32x2_t) ++@item uint32x2_t vreinterpret_u32_s16 (int16x4_t) + @end itemize + + + @itemize @bullet +-@item int16x4_t vreinterpret_s16_p16 (poly16x4_t) ++@item uint32x2_t vreinterpret_u32_s32 (int32x2_t) + @end itemize + + + @itemize @bullet +-@item int16x4_t vreinterpret_s16_p8 (poly8x8_t) ++@item uint32x2_t vreinterpret_u32_u8 (uint8x8_t) + @end itemize + + + @itemize @bullet +-@item int16x8_t vreinterpretq_s16_u32 (uint32x4_t) ++@item uint32x2_t vreinterpret_u32_u16 (uint16x4_t) + @end itemize + + + @itemize @bullet +-@item int16x8_t vreinterpretq_s16_u16 (uint16x8_t) ++@item poly8x16_t vreinterpretq_p8_p16 (poly16x8_t) + @end itemize + + + @itemize @bullet +-@item int16x8_t vreinterpretq_s16_u8 (uint8x16_t) ++@item poly8x16_t vreinterpretq_p8_f32 (float32x4_t) + @end itemize + + + @itemize @bullet +-@item int16x8_t vreinterpretq_s16_s32 (int32x4_t) ++@item poly8x16_t vreinterpretq_p8_p64 (poly64x2_t) + @end itemize + + + @itemize @bullet +-@item int16x8_t vreinterpretq_s16_s8 (int8x16_t) ++@item poly8x16_t vreinterpretq_p8_p128 (poly128_t) + @end itemize + + + @itemize @bullet +-@item int16x8_t vreinterpretq_s16_u64 (uint64x2_t) ++@item poly8x16_t vreinterpretq_p8_s64 (int64x2_t) + @end itemize + + + @itemize @bullet +-@item int16x8_t vreinterpretq_s16_s64 (int64x2_t) ++@item poly8x16_t vreinterpretq_p8_u64 (uint64x2_t) + @end itemize + + + @itemize @bullet +-@item int16x8_t vreinterpretq_s16_f32 (float32x4_t) ++@item poly8x16_t vreinterpretq_p8_s8 (int8x16_t) + @end itemize + + + @itemize @bullet +-@item int16x8_t vreinterpretq_s16_p16 (poly16x8_t) ++@item poly8x16_t vreinterpretq_p8_s16 (int16x8_t) + @end itemize + + + @itemize @bullet +-@item int16x8_t vreinterpretq_s16_p8 (poly8x16_t) ++@item poly8x16_t vreinterpretq_p8_s32 (int32x4_t) + @end itemize + + + @itemize @bullet +-@item int32x2_t vreinterpret_s32_u32 (uint32x2_t) ++@item poly8x16_t vreinterpretq_p8_u8 (uint8x16_t) + @end itemize + + + @itemize @bullet +-@item int32x2_t vreinterpret_s32_u16 (uint16x4_t) ++@item poly8x16_t vreinterpretq_p8_u16 (uint16x8_t) + @end itemize + + + @itemize @bullet +-@item int32x2_t vreinterpret_s32_u8 (uint8x8_t) ++@item poly8x16_t vreinterpretq_p8_u32 (uint32x4_t) + @end itemize + + + @itemize @bullet +-@item int32x2_t vreinterpret_s32_s16 (int16x4_t) ++@item poly16x8_t vreinterpretq_p16_p8 (poly8x16_t) + @end itemize + + + @itemize @bullet +-@item int32x2_t vreinterpret_s32_s8 (int8x8_t) ++@item poly16x8_t vreinterpretq_p16_f32 (float32x4_t) + @end itemize + + + @itemize @bullet +-@item int32x2_t vreinterpret_s32_u64 (uint64x1_t) ++@item poly16x8_t vreinterpretq_p16_p64 (poly64x2_t) + @end itemize + + + @itemize @bullet +-@item int32x2_t vreinterpret_s32_s64 (int64x1_t) ++@item poly16x8_t vreinterpretq_p16_p128 (poly128_t) + @end itemize + + + @itemize @bullet +-@item int32x2_t vreinterpret_s32_f32 (float32x2_t) ++@item poly16x8_t vreinterpretq_p16_s64 (int64x2_t) + @end itemize + + + @itemize @bullet +-@item int32x2_t vreinterpret_s32_p16 (poly16x4_t) ++@item poly16x8_t vreinterpretq_p16_u64 (uint64x2_t) + @end itemize + + + @itemize @bullet +-@item int32x2_t vreinterpret_s32_p8 (poly8x8_t) ++@item poly16x8_t vreinterpretq_p16_s8 (int8x16_t) + @end itemize + + + @itemize @bullet +-@item int32x4_t vreinterpretq_s32_u32 (uint32x4_t) ++@item poly16x8_t vreinterpretq_p16_s16 (int16x8_t) + @end itemize + + + @itemize @bullet +-@item int32x4_t vreinterpretq_s32_u16 (uint16x8_t) ++@item poly16x8_t vreinterpretq_p16_s32 (int32x4_t) + @end itemize + + + @itemize @bullet +-@item int32x4_t vreinterpretq_s32_u8 (uint8x16_t) ++@item poly16x8_t vreinterpretq_p16_u8 (uint8x16_t) + @end itemize + + + @itemize @bullet +-@item int32x4_t vreinterpretq_s32_s16 (int16x8_t) ++@item poly16x8_t vreinterpretq_p16_u16 (uint16x8_t) + @end itemize + + + @itemize @bullet +-@item int32x4_t vreinterpretq_s32_s8 (int8x16_t) ++@item poly16x8_t vreinterpretq_p16_u32 (uint32x4_t) + @end itemize + + + @itemize @bullet +-@item int32x4_t vreinterpretq_s32_u64 (uint64x2_t) ++@item float32x4_t vreinterpretq_f32_p8 (poly8x16_t) + @end itemize + + + @itemize @bullet +-@item int32x4_t vreinterpretq_s32_s64 (int64x2_t) ++@item float32x4_t vreinterpretq_f32_p16 (poly16x8_t) + @end itemize + + + @itemize @bullet +-@item int32x4_t vreinterpretq_s32_f32 (float32x4_t) ++@item float32x4_t vreinterpretq_f32_p64 (poly64x2_t) + @end itemize + + + @itemize @bullet +-@item int32x4_t vreinterpretq_s32_p16 (poly16x8_t) ++@item float32x4_t vreinterpretq_f32_p128 (poly128_t) + @end itemize + + + @itemize @bullet +-@item int32x4_t vreinterpretq_s32_p8 (poly8x16_t) ++@item float32x4_t vreinterpretq_f32_s64 (int64x2_t) + @end itemize + + + @itemize @bullet +-@item uint8x8_t vreinterpret_u8_u32 (uint32x2_t) ++@item float32x4_t vreinterpretq_f32_u64 (uint64x2_t) + @end itemize + + + @itemize @bullet +-@item uint8x8_t vreinterpret_u8_u16 (uint16x4_t) ++@item float32x4_t vreinterpretq_f32_s8 (int8x16_t) + @end itemize + + + @itemize @bullet +-@item uint8x8_t vreinterpret_u8_s32 (int32x2_t) ++@item float32x4_t vreinterpretq_f32_s16 (int16x8_t) + @end itemize + + + @itemize @bullet +-@item uint8x8_t vreinterpret_u8_s16 (int16x4_t) ++@item float32x4_t vreinterpretq_f32_s32 (int32x4_t) + @end itemize + + + @itemize @bullet +-@item uint8x8_t vreinterpret_u8_s8 (int8x8_t) ++@item float32x4_t vreinterpretq_f32_u8 (uint8x16_t) + @end itemize + + + @itemize @bullet +-@item uint8x8_t vreinterpret_u8_u64 (uint64x1_t) ++@item float32x4_t vreinterpretq_f32_u16 (uint16x8_t) + @end itemize + + + @itemize @bullet +-@item uint8x8_t vreinterpret_u8_s64 (int64x1_t) ++@item float32x4_t vreinterpretq_f32_u32 (uint32x4_t) + @end itemize + + + @itemize @bullet +-@item uint8x8_t vreinterpret_u8_f32 (float32x2_t) ++@item poly64x2_t vreinterpretq_p64_p8 (poly8x16_t) + @end itemize + + + @itemize @bullet +-@item uint8x8_t vreinterpret_u8_p16 (poly16x4_t) ++@item poly64x2_t vreinterpretq_p64_p16 (poly16x8_t) + @end itemize + + + @itemize @bullet +-@item uint8x8_t vreinterpret_u8_p8 (poly8x8_t) ++@item poly64x2_t vreinterpretq_p64_f32 (float32x4_t) + @end itemize + + + @itemize @bullet +-@item uint8x16_t vreinterpretq_u8_u32 (uint32x4_t) ++@item poly64x2_t vreinterpretq_p64_p128 (poly128_t) + @end itemize + + + @itemize @bullet +-@item uint8x16_t vreinterpretq_u8_u16 (uint16x8_t) ++@item poly64x2_t vreinterpretq_p64_s64 (int64x2_t) + @end itemize + + + @itemize @bullet +-@item uint8x16_t vreinterpretq_u8_s32 (int32x4_t) ++@item poly64x2_t vreinterpretq_p64_u64 (uint64x2_t) + @end itemize + + + @itemize @bullet +-@item uint8x16_t vreinterpretq_u8_s16 (int16x8_t) ++@item poly64x2_t vreinterpretq_p64_s8 (int8x16_t) + @end itemize + + + @itemize @bullet +-@item uint8x16_t vreinterpretq_u8_s8 (int8x16_t) ++@item poly64x2_t vreinterpretq_p64_s16 (int16x8_t) + @end itemize + + + @itemize @bullet +-@item uint8x16_t vreinterpretq_u8_u64 (uint64x2_t) ++@item poly64x2_t vreinterpretq_p64_s32 (int32x4_t) + @end itemize + + + @itemize @bullet +-@item uint8x16_t vreinterpretq_u8_s64 (int64x2_t) ++@item poly64x2_t vreinterpretq_p64_u8 (uint8x16_t) + @end itemize + + + @itemize @bullet +-@item uint8x16_t vreinterpretq_u8_f32 (float32x4_t) ++@item poly64x2_t vreinterpretq_p64_u16 (uint16x8_t) + @end itemize + + + @itemize @bullet +-@item uint8x16_t vreinterpretq_u8_p16 (poly16x8_t) ++@item poly64x2_t vreinterpretq_p64_u32 (uint32x4_t) + @end itemize + + + @itemize @bullet ++@item poly128_t vreinterpretq_p128_p8 (poly8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_p16 (poly16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_f32 (float32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_p64 (poly64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_s64 (int64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_u64 (uint64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_s8 (int8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_s16 (int16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_s32 (int32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_u8 (uint8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_u16 (uint16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item poly128_t vreinterpretq_p128_u32 (uint32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_p8 (poly8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_p16 (poly16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_f32 (float32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_p64 (poly64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_p128 (poly128_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_u64 (uint64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_s8 (int8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_s16 (int16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_s32 (int32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_u8 (uint8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_u16 (uint16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int64x2_t vreinterpretq_s64_u32 (uint32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_p8 (poly8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_p16 (poly16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_f32 (float32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_p64 (poly64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_p128 (poly128_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_s64 (int64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_s8 (int8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_s16 (int16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_s32 (int32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_u8 (uint8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_u16 (uint16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item uint64x2_t vreinterpretq_u64_u32 (uint32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_p8 (poly8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_p16 (poly16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_f32 (float32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_p64 (poly64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_p128 (poly128_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_s64 (int64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_u64 (uint64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_s16 (int16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_s32 (int32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_u8 (uint8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_u16 (uint16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int8x16_t vreinterpretq_s8_u32 (uint32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_p8 (poly8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_p16 (poly16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_f32 (float32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_p64 (poly64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_p128 (poly128_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_s64 (int64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_u64 (uint64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_s8 (int8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_s32 (int32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_u8 (uint8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_u16 (uint16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int16x8_t vreinterpretq_s16_u32 (uint32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_p8 (poly8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_p16 (poly16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_f32 (float32x4_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_p64 (poly64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_p128 (poly128_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_s64 (int64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_u64 (uint64x2_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_s8 (int8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_s16 (int16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_u8 (uint8x16_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_u16 (uint16x8_t) ++@end itemize ++ ++ ++@itemize @bullet ++@item int32x4_t vreinterpretq_s32_u32 (uint32x4_t) ++@end itemize ++ ++ ++@itemize @bullet + @item uint8x16_t vreinterpretq_u8_p8 (poly8x16_t) + @end itemize + + + @itemize @bullet +-@item uint16x4_t vreinterpret_u16_u32 (uint32x2_t) ++@item uint8x16_t vreinterpretq_u8_p16 (poly16x8_t) + @end itemize + + + @itemize @bullet +-@item uint16x4_t vreinterpret_u16_u8 (uint8x8_t) ++@item uint8x16_t vreinterpretq_u8_f32 (float32x4_t) + @end itemize + + + @itemize @bullet +-@item uint16x4_t vreinterpret_u16_s32 (int32x2_t) ++@item uint8x16_t vreinterpretq_u8_p64 (poly64x2_t) + @end itemize + + + @itemize @bullet +-@item uint16x4_t vreinterpret_u16_s16 (int16x4_t) ++@item uint8x16_t vreinterpretq_u8_p128 (poly128_t) + @end itemize + + + @itemize @bullet +-@item uint16x4_t vreinterpret_u16_s8 (int8x8_t) ++@item uint8x16_t vreinterpretq_u8_s64 (int64x2_t) + @end itemize + + + @itemize @bullet +-@item uint16x4_t vreinterpret_u16_u64 (uint64x1_t) ++@item uint8x16_t vreinterpretq_u8_u64 (uint64x2_t) + @end itemize + + + @itemize @bullet +-@item uint16x4_t vreinterpret_u16_s64 (int64x1_t) ++@item uint8x16_t vreinterpretq_u8_s8 (int8x16_t) + @end itemize + + + @itemize @bullet +-@item uint16x4_t vreinterpret_u16_f32 (float32x2_t) ++@item uint8x16_t vreinterpretq_u8_s16 (int16x8_t) + @end itemize + + + @itemize @bullet +-@item uint16x4_t vreinterpret_u16_p16 (poly16x4_t) ++@item uint8x16_t vreinterpretq_u8_s32 (int32x4_t) + @end itemize + + + @itemize @bullet +-@item uint16x4_t vreinterpret_u16_p8 (poly8x8_t) ++@item uint8x16_t vreinterpretq_u8_u16 (uint16x8_t) + @end itemize + + + @itemize @bullet +-@item uint16x8_t vreinterpretq_u16_u32 (uint32x4_t) ++@item uint8x16_t vreinterpretq_u8_u32 (uint32x4_t) + @end itemize + + + @itemize @bullet +-@item uint16x8_t vreinterpretq_u16_u8 (uint8x16_t) ++@item uint16x8_t vreinterpretq_u16_p8 (poly8x16_t) + @end itemize + + + @itemize @bullet +-@item uint16x8_t vreinterpretq_u16_s32 (int32x4_t) ++@item uint16x8_t vreinterpretq_u16_p16 (poly16x8_t) + @end itemize + + + @itemize @bullet +-@item uint16x8_t vreinterpretq_u16_s16 (int16x8_t) ++@item uint16x8_t vreinterpretq_u16_f32 (float32x4_t) + @end itemize + + + @itemize @bullet +-@item uint16x8_t vreinterpretq_u16_s8 (int8x16_t) ++@item uint16x8_t vreinterpretq_u16_p64 (poly64x2_t) + @end itemize + + + @itemize @bullet +-@item uint16x8_t vreinterpretq_u16_u64 (uint64x2_t) ++@item uint16x8_t vreinterpretq_u16_p128 (poly128_t) + @end itemize + + +@@ -11259,77 +11838,77 @@ + + + @itemize @bullet +-@item uint16x8_t vreinterpretq_u16_f32 (float32x4_t) ++@item uint16x8_t vreinterpretq_u16_u64 (uint64x2_t) + @end itemize + + + @itemize @bullet +-@item uint16x8_t vreinterpretq_u16_p16 (poly16x8_t) ++@item uint16x8_t vreinterpretq_u16_s8 (int8x16_t) + @end itemize + + + @itemize @bullet +-@item uint16x8_t vreinterpretq_u16_p8 (poly8x16_t) ++@item uint16x8_t vreinterpretq_u16_s16 (int16x8_t) + @end itemize + + + @itemize @bullet +-@item uint32x2_t vreinterpret_u32_u16 (uint16x4_t) ++@item uint16x8_t vreinterpretq_u16_s32 (int32x4_t) + @end itemize + + + @itemize @bullet +-@item uint32x2_t vreinterpret_u32_u8 (uint8x8_t) ++@item uint16x8_t vreinterpretq_u16_u8 (uint8x16_t) + @end itemize + + + @itemize @bullet +-@item uint32x2_t vreinterpret_u32_s32 (int32x2_t) ++@item uint16x8_t vreinterpretq_u16_u32 (uint32x4_t) + @end itemize + + + @itemize @bullet +-@item uint32x2_t vreinterpret_u32_s16 (int16x4_t) ++@item uint32x4_t vreinterpretq_u32_p8 (poly8x16_t) + @end itemize + + + @itemize @bullet +-@item uint32x2_t vreinterpret_u32_s8 (int8x8_t) ++@item uint32x4_t vreinterpretq_u32_p16 (poly16x8_t) + @end itemize + + + @itemize @bullet +-@item uint32x2_t vreinterpret_u32_u64 (uint64x1_t) ++@item uint32x4_t vreinterpretq_u32_f32 (float32x4_t) + @end itemize + + + @itemize @bullet +-@item uint32x2_t vreinterpret_u32_s64 (int64x1_t) ++@item uint32x4_t vreinterpretq_u32_p64 (poly64x2_t) + @end itemize + + + @itemize @bullet +-@item uint32x2_t vreinterpret_u32_f32 (float32x2_t) ++@item uint32x4_t vreinterpretq_u32_p128 (poly128_t) + @end itemize + + + @itemize @bullet +-@item uint32x2_t vreinterpret_u32_p16 (poly16x4_t) ++@item uint32x4_t vreinterpretq_u32_s64 (int64x2_t) + @end itemize + + + @itemize @bullet +-@item uint32x2_t vreinterpret_u32_p8 (poly8x8_t) ++@item uint32x4_t vreinterpretq_u32_u64 (uint64x2_t) + @end itemize + + + @itemize @bullet +-@item uint32x4_t vreinterpretq_u32_u16 (uint16x8_t) ++@item uint32x4_t vreinterpretq_u32_s8 (int8x16_t) + @end itemize + + + @itemize @bullet +-@item uint32x4_t vreinterpretq_u32_u8 (uint8x16_t) ++@item uint32x4_t vreinterpretq_u32_s16 (int16x8_t) + @end itemize + + +@@ -11339,39 +11918,91 @@ + + + @itemize @bullet +-@item uint32x4_t vreinterpretq_u32_s16 (int16x8_t) ++@item uint32x4_t vreinterpretq_u32_u8 (uint8x16_t) + @end itemize + + + @itemize @bullet +-@item uint32x4_t vreinterpretq_u32_s8 (int8x16_t) ++@item uint32x4_t vreinterpretq_u32_u16 (uint16x8_t) + @end itemize + + ++ ++ ++ + @itemize @bullet +-@item uint32x4_t vreinterpretq_u32_u64 (uint64x2_t) ++@item poly128_t vldrq_p128(poly128_t const *) + @end itemize + ++@itemize @bullet ++@item void vstrq_p128(poly128_t *, poly128_t) ++@end itemize + + @itemize @bullet +-@item uint32x4_t vreinterpretq_u32_s64 (int64x2_t) ++@item uint64x1_t vceq_p64 (poly64x1_t, poly64x1_t) + @end itemize + ++@itemize @bullet ++@item uint64x1_t vtst_p64 (poly64x1_t, poly64x1_t) ++@end itemize + + @itemize @bullet +-@item uint32x4_t vreinterpretq_u32_f32 (float32x4_t) ++@item uint32_t vsha1h_u32 (uint32_t) ++@*@emph{Form of expected instruction(s):} @code{sha1h.32 @var{q0}, @var{q1}} + @end itemize + ++@itemize @bullet ++@item uint32x4_t vsha1cq_u32 (uint32x4_t, uint32_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha1c.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize + + @itemize @bullet +-@item uint32x4_t vreinterpretq_u32_p16 (poly16x8_t) ++@item uint32x4_t vsha1pq_u32 (uint32x4_t, uint32_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha1p.32 @var{q0}, @var{q1}, @var{q2}} + @end itemize + ++@itemize @bullet ++@item uint32x4_t vsha1mq_u32 (uint32x4_t, uint32_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha1m.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize + + @itemize @bullet +-@item uint32x4_t vreinterpretq_u32_p8 (poly8x16_t) ++@item uint32x4_t vsha1su0q_u32 (uint32x4_t, uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha1su0.32 @var{q0}, @var{q1}, @var{q2}} + @end itemize + ++@itemize @bullet ++@item uint32x4_t vsha1su1q_u32 (uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha1su1.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize + ++@itemize @bullet ++@item uint32x4_t vsha256hq_u32 (uint32x4_t, uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha256h.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha256h2q_u32 (uint32x4_t, uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha256h2.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha256su0q_u32 (uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha256su0.32 @var{q0}, @var{q1}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha256su1q_u32 (uint32x4_t, uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha256su1.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize + ++@itemize @bullet ++@item poly128_t vmull_p64 (poly64_t a, poly64_t b) ++@*@emph{Form of expected instruction(s):} @code{vmull.p64 @var{q0}, @var{d1}, @var{d2}} ++@end itemize + ++@itemize @bullet ++@item poly128_t vmull_high_p64 (poly64x2_t a, poly64x2_t b) ++@*@emph{Form of expected instruction(s):} @code{vmull.p64 @var{q0}, @var{d1}, @var{d2}} ++@end itemize ++ +--- a/src/gcc/doc/md.texi ++++ b/src/gcc/doc/md.texi +@@ -1711,9 +1711,6 @@ + @item Z + Integer constant zero + +-@item Usa +-An absolute symbolic address +- + @item Ush + The high part (bits 12 and upwards) of the pc-relative address of a symbol + within 4GB of the instruction +@@ -8901,7 +8898,8 @@ + (define_cond_exec + [@var{predicate-pattern}] + "@var{condition}" +- "@var{output-template}") ++ "@var{output-template}" ++ "@var{optional-insn-attribues}") + @end smallexample + + @var{predicate-pattern} is the condition that must be true for the +@@ -8922,6 +8920,13 @@ + @code{current_insn_predicate} that will contain the entire predicate + if the current insn is predicated, and will otherwise be @code{NULL}. + ++@var{optional-insn-attributes} is an optional vector of attributes that gets ++appended to the insn attributes of the produced cond_exec rtx. It can ++be used to add some distinguishing attribute to cond_exec rtxs produced ++that way. An example usage would be to use this attribute in conjunction ++with attributes on the main pattern to disable particular alternatives under ++certain conditions. ++ + When @code{define_cond_exec} is used, an implicit reference to + the @code{predicable} instruction attribute is made. + @xref{Insn Attributes}. This attribute must be a boolean (i.e.@: have +@@ -9678,7 +9683,7 @@ + QABSNEG))] + "TARGET_NEON" + "vq.\t%0, %1" +- [(set_attr "neon_type" "neon_vqneg_vqabs")] ++ [(set_attr "type" "neon_vqneg_vqabs")] + ) + + @end smallexample +@@ -9693,7 +9698,7 @@ + UNSPEC_VQABS))] + "TARGET_NEON" + "vqabs.\t%0, %1" +- [(set_attr "neon_type" "neon_vqneg_vqabs")] ++ [(set_attr "type" "neon_vqneg_vqabs")] + ) + + (define_insn "neon_vqneg" +@@ -9703,7 +9708,7 @@ + UNSPEC_VQNEG))] + "TARGET_NEON" + "vqneg.\t%0, %1" +- [(set_attr "neon_type" "neon_vqneg_vqabs")] ++ [(set_attr "type" "neon_vqneg_vqabs")] + ) + + @end smallexample --- gcc-4.8-4.8.5.orig/debian/patches/gcc-linaro-no-local.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-linaro-no-local.diff @@ -0,0 +1,189 @@ +# DP: Revert Linaro local patch to build armv4t multilibs. + +Index: b/src/gcc/incpath.c +=================================================================== +--- a/src/gcc/incpath.c ++++ b/src/gcc/incpath.c +@@ -148,22 +148,20 @@ + if (!filename_ncmp (p->fname, cpp_GCC_INCLUDE_DIR, len)) + { + char *str = concat (iprefix, p->fname + len, NULL); +- if (p->multilib && imultilib) +- { +- str = reconcat (str, str, dir_separator_str, +- imultilib, NULL); +- add_path (str, SYSTEM, p->cxx_aware, false); +- } +- else +- add_path (str, SYSTEM, p->cxx_aware, false); +- +- if (p->multilib && imultiarch) ++ if (p->multilib == 1 && imultilib) ++ str = reconcat (str, str, dir_separator_str, ++ imultilib, NULL); ++ else if (p->multilib == 2) + { +- char *str = concat (iprefix, p->fname + len, NULL); ++ if (!imultiarch) ++ { ++ free (str); ++ continue; ++ } + str = reconcat (str, str, dir_separator_str, + imultiarch, NULL); +- add_path (str, SYSTEM, p->cxx_aware, false); + } ++ add_path (str, SYSTEM, p->cxx_aware, false); + } + } + } +@@ -173,7 +171,7 @@ + { + if (!p->cplusplus || cxx_stdinc) + { +- char *str, *str2; ++ char *str; + + /* Should this directory start with the sysroot? */ + if (sysroot && p->add_sysroot) +@@ -217,20 +215,19 @@ + else + str = update_path (p->fname, p->component); + +- str2 = xstrdup(str); +- if (p->multilib && imultilib) ++ if (p->multilib == 1 && imultilib) ++ str = reconcat (str, str, dir_separator_str, imultilib, NULL); ++ else if (p->multilib == 2) + { +- str = reconcat (str, str, dir_separator_str, imultilib, NULL); +- add_path (str, SYSTEM, p->cxx_aware, false); ++ if (!imultiarch) ++ { ++ free (str); ++ continue; ++ } ++ str = reconcat (str, str, dir_separator_str, imultiarch, NULL); + } +- else +- add_path (str, SYSTEM, p->cxx_aware, false); + +- if (p->multilib && imultiarch) +- { +- str2 = reconcat (str2, str2, dir_separator_str, imultiarch, NULL); +- add_path (str2, SYSTEM, p->cxx_aware, false); +- } ++ add_path (str, SYSTEM, p->cxx_aware, false); + } + } + } +Index: b/src/gcc/gcc.c +=================================================================== +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -2227,7 +2227,7 @@ + } + + /* Now try the multiarch path. */ +- if (!skip_multi_dir && !multi_dir ++ if (!skip_multi_dir + && !pl->require_machine_suffix && multiarch_dir) + { + memcpy (path + len, multiarch_suffix, multiarch_len + 1); +@@ -2263,16 +2263,6 @@ + if (ret) + break; + } +- +- /* Now try the multiarch path. */ +- if (!skip_multi_dir +- && !pl->require_machine_suffix && multiarch_dir) +- { +- memcpy (path + len, multiarch_suffix, multiarch_len + 1); +- ret = callback (path, callback_info); +- if (ret) +- break; +- } + } + if (pl) + break; +@@ -7672,21 +7662,6 @@ + ++p; + } + +- if (first) +- { +- if (this_path_len > 3 +- && this_path[0] == '.' +- && this_path[1] == ':' +- && this_path[2] == ':') +- { +- char *new_multiarch_dir = XNEWVEC (char, this_path_len + 1); +- +- strncpy (new_multiarch_dir, this_path, this_path_len); +- new_multiarch_dir[this_path_len] = '\0'; +- multiarch_dir = &new_multiarch_dir[3]; +- } +- } +- + if (ok && first) + { + if (this_path_len != 1 +Index: b/src/gcc/ChangeLog.linaro +=================================================================== +--- a/src/gcc/ChangeLog.linaro ++++ b/src/gcc/ChangeLog.linaro +@@ -312,14 +312,6 @@ + GCC Linaro 4.8-2014.01 released. + * LINARO-VERSION: Update. + +-2014-01-16 Zhenqiang Chen +- +- Linaro local patch for armv4t multilib support. +- * gcc/config/arm/t-mlibs: New file. +- * config.gcc: Add t-mlibs. +- * incpath.c (add_standard_paths): Try multilib path first. +- * gcc.c (for_each_path): Likewise. +- + 2013-12-21 Christophe Lyon + + * LINARO-VERSION: Bump version. +Index: b/src/gcc/config.gcc +=================================================================== +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -878,7 +878,7 @@ + tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" + ;; + esac +- tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi arm/t-mlibs" ++ tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi" + tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h arm/aout.h vxworks-dummy.h arm/arm.h" + # Define multilib configuration for arm-linux-androideabi. + case ${target} in +Index: b/src/gcc/config/arm/t-mlibs +=================================================================== +--- a/src/gcc/config/arm/t-mlibs ++++ /dev/null +@@ -1,21 +0,0 @@ +-# A set of predefined MULTILIB for different ARM targets. +-# Through the configure option --with-multilib-list, user can customize the +-# final MULTILIB implementation. +- +-comma := , +-space := +-space += +- +-MULTILIB_OPTIONS = marm +-MULTILIB_DIRNAMES = arm +-MULTILIB_OPTIONS += march=armv4t +-MULTILIB_DIRNAMES += armv4t +-MULTILIB_OPTIONS += mfloat-abi=soft +-MULTILIB_DIRNAMES += soft +- +-MULTILIB_EXCEPTIONS = +- +-MULTILIB_REQUIRED = marm/march=armv4t/mfloat-abi=soft +- +-MULTILIB_OSDIRNAMES = marm/march.armv4t/mfloat-abi.soft=!arm-linux-gnueabi +- --- gcc-4.8-4.8.5.orig/debian/patches/gcc-linaro-no-macros.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-linaro-no-macros.diff @@ -0,0 +1,107 @@ +# DP : Don't add the __LINARO_RELEASE__ and __LINARO_SPIN__ macros for distro builds. + +Index: b/src/gcc/ChangeLog.linaro +=================================================================== +--- a/src/gcc/ChangeLog.linaro ++++ b/src/gcc/ChangeLog.linaro +@@ -20,16 +20,6 @@ + * var-tracking.c (add_stores): Return instead of asserting if old + and new values for conditional store are the same. + +-2014-11-14 Yvan Roux +- +- Add Linaro release macros (Linaro only patch.) +- +- * Makefile.in (LINAROVER, LINAROVER_C, LINAROVER_S): Define. +- (CFLAGS-cppbuiltin.o): Add LINAROVER macro definition. +- (cppbuiltin.o): Depend on $(LINAROVER). +- * cppbuiltin.c (parse_linarover): New. +- (define_GNUC__): Define __LINARO_RELEASE__ and __LINARO_SPIN__ macros. +- + 2014-08-26 venkataramanan-kumar + + Backport from trunk r205807. +Index: b/src/gcc/cppbuiltin.c +=================================================================== +--- a/src/gcc/cppbuiltin.c ++++ b/src/gcc/cppbuiltin.c +@@ -53,41 +53,18 @@ parse_basever (int *major, int *minor, i + *patchlevel = s_patchlevel; + } + +-/* Parse a LINAROVER version string of the format "M.m-year.month[-spin][~dev]" +- to create Linaro release number YYYYMM and spin version. */ +-static void +-parse_linarover (int *release, int *spin) +-{ +- static int s_year = -1, s_month, s_spin; +- +- if (s_year == -1) +- if (sscanf (LINAROVER, "%*[^-]-%d.%d-%d", &s_year, &s_month, &s_spin) != 3) +- { +- sscanf (LINAROVER, "%*[^-]-%d.%d", &s_year, &s_month); +- s_spin = 0; +- } +- +- if (release) +- *release = s_year * 100 + s_month; +- +- if (spin) +- *spin = s_spin; +-} + + /* Define __GNUC__, __GNUC_MINOR__, __GNUC_PATCHLEVEL__ and __VERSION__. */ + static void + define__GNUC__ (cpp_reader *pfile) + { +- int major, minor, patchlevel, linaro_release, linaro_spin; ++ int major, minor, patchlevel; + + parse_basever (&major, &minor, &patchlevel); +- parse_linarover (&linaro_release, &linaro_spin); + cpp_define_formatted (pfile, "__GNUC__=%d", major); + cpp_define_formatted (pfile, "__GNUC_MINOR__=%d", minor); + cpp_define_formatted (pfile, "__GNUC_PATCHLEVEL__=%d", patchlevel); + cpp_define_formatted (pfile, "__VERSION__=\"%s\"", version_string); +- cpp_define_formatted (pfile, "__LINARO_RELEASE__=%d", linaro_release); +- cpp_define_formatted (pfile, "__LINARO_SPIN__=%d", linaro_spin); + cpp_define_formatted (pfile, "__ATOMIC_RELAXED=%d", MEMMODEL_RELAXED); + cpp_define_formatted (pfile, "__ATOMIC_SEQ_CST=%d", MEMMODEL_SEQ_CST); + cpp_define_formatted (pfile, "__ATOMIC_ACQUIRE=%d", MEMMODEL_ACQUIRE); +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -800,12 +800,10 @@ BASEVER := $(srcdir)/BASE-VER # 4.x + DEVPHASE := $(srcdir)/DEV-PHASE # experimental, prerelease, "" + DATESTAMP := $(srcdir)/DATESTAMP # YYYYMMDD or empty + REVISION := $(srcdir)/REVISION # [BRANCH revision XXXXXX] +-LINAROVER := $(srcdir)/LINARO-VERSION # M.x-YYYY.MM[-S][~dev] + + BASEVER_c := $(shell cat $(BASEVER)) + DEVPHASE_c := $(shell cat $(DEVPHASE)) + DATESTAMP_c := $(shell cat $(DATESTAMP)) +-LINAROVER_c := $(shell cat $(LINAROVER)) + + ifeq (,$(wildcard $(REVISION))) + REVISION_c := +@@ -826,7 +824,6 @@ DEVPHASE_s := "\"$(if $(DEVPHASE_c), ($ + DATESTAMP_s := "\"$(if $(DEVPHASE_c), $(DATESTAMP_c))\"" + PKGVERSION_s:= "\"@PKGVERSION@\"" + BUGURL_s := "\"@REPORT_BUGS_TO@\"" +-LINAROVER_s := "\"$(LINAROVER_c)\"" + + PKGVERSION := @PKGVERSION@ + BUGURL_TEXI := @REPORT_BUGS_TEXI@ +@@ -4020,9 +4017,8 @@ PREPROCESSOR_DEFINES = \ + -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ + @TARGET_SYSTEM_ROOT_DEFINE@ + +-CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) \ +- -DLINAROVER=$(LINAROVER_s) +-cppbuiltin.o: $(BASEVER) $(LINAROVER) ++CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) ++cppbuiltin.o: $(BASEVER) + + CFLAGS-cppdefault.o += $(PREPROCESSOR_DEFINES) + cppdefault.o: cppdefault.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ --- gcc-4.8-4.8.5.orig/debian/patches/gcc-linaro-updates.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-linaro-updates.diff @@ -0,0 +1,2 @@ +# DP: Linaro updates from the 4.8-2013.xx-stable branch: + --- gcc-4.8-4.8.5.orig/debian/patches/gcc-linaro.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-linaro.diff @@ -0,0 +1,69843 @@ +# DP: Changes for the Linaro 4.8-2015.07 release. + +LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@224828 \ + svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_8-branch@225347 \ + | filterdiff --remove-timestamps --addoldprefix=a/src/ --addnewprefix=b/src/ + +--- a/src/libitm/ChangeLog.linaro ++++ b/src/libitm/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libgomp/ChangeLog.linaro ++++ b/src/libgomp/ChangeLog.linaro +@@ -0,0 +1,79 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-22 Yvan Roux ++ ++ Backport from trunk r200521. ++ 2013-06-28 Marcus Shawcroft ++ ++ * testsuite/libgomp.fortran/strassen.f90: ++ Add dg-skip-if aarch64_tiny. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libgomp/testsuite/libgomp.fortran/strassen.f90 ++++ b/src/libgomp/testsuite/libgomp.fortran/strassen.f90 +@@ -1,4 +1,5 @@ + ! { dg-options "-O2" } ++! { dg-skip-if "AArch64 tiny code model does not support programs larger than 1MiB" {aarch64_tiny} {"*"} {""} } + + program strassen_matmul + use omp_lib +--- a/src/libquadmath/ChangeLog.linaro ++++ b/src/libquadmath/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libsanitizer/sanitizer_common/sanitizer_linux.cc ++++ b/src/libsanitizer/sanitizer_common/sanitizer_linux.cc +@@ -410,7 +410,9 @@ + CHECK_EQ(*current_++, ' '); + while (IsDecimal(*current_)) + current_++; +- CHECK_EQ(*current_++, ' '); ++ // Qemu may lack the trailing space. ++ // http://code.google.com/p/address-sanitizer/issues/detail?id=160 ++ // CHECK_EQ(*current_++, ' '); + // Skip spaces. + while (current_ < next_line && *current_ == ' ') + current_++; +--- a/src/libsanitizer/ChangeLog.linaro ++++ b/src/libsanitizer/ChangeLog.linaro +@@ -0,0 +1,86 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-20 Christophe Lyon ++ ++ Backport from trunk r198683. ++ 2013-05-07 Christophe Lyon ++ ++ * configure.tgt: Add ARM pattern. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-06-04 Christophe Lyon ++ ++ Backport from trunk r199606. ++ 2013-06-03 Christophe Lyon ++ ++ * sanitizer_common/sanitizer_linux.cc (MemoryMappingLayout::Next): ++ Cherry pick upstream r182922. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libsanitizer/configure.tgt ++++ b/src/libsanitizer/configure.tgt +@@ -32,6 +32,8 @@ + ;; + sparc*-*-linux*) + ;; ++ arm*-*-linux*) ++ ;; + x86_64-*-darwin[1]* | i?86-*-darwin[1]*) + TSAN_SUPPORTED=no + ;; +--- a/src/zlib/ChangeLog.linaro ++++ b/src/zlib/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libstdc++-v3/ChangeLog.linaro ++++ b/src/libstdc++-v3/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -611,6 +611,8 @@ + + # Disable Java if libffi is not supported. + case "${target}" in ++ aarch64-*-*) ++ ;; + alpha*-*-*) + ;; + arm*-*-*) +--- a/src/intl/ChangeLog.linaro ++++ b/src/intl/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/ChangeLog.linaro ++++ b/src/ChangeLog.linaro +@@ -0,0 +1,79 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-12-06 Michael Collison ++ ++ Backport from trunk r197997 ++ 2013-04-16 Andreas Schwab ++ ++ * configure.ac (aarch64-*-*): Don't disable java. ++ * configure: Regenerate. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libmudflap/ChangeLog.linaro ++++ b/src/libmudflap/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/boehm-gc/ChangeLog.linaro ++++ b/src/boehm-gc/ChangeLog.linaro +@@ -0,0 +1,84 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197770. ++ ++ 2013-03-16 Yvan Roux ++ ++ * include/private/gcconfig.h (AARCH64): New macro (defined only if ++ __aarch64__). ++ (mach_type_known): Update comment adding ARM AArch64 target. ++ (NOSYS, mach_type_known,CPP_WORDSZ, MACH_TYPE, ALIGNMENT, HBLKSIZE, ++ OS_TYPE, LINUX_STACKBOTTOM, USE_GENERIC_PUSH_REGS, DYNAMIC_LOADING, ++ DATASTART, DATAEND, STACKBOTTOM): Define for AArch64. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/boehm-gc/include/private/gcconfig.h ++++ b/src/boehm-gc/include/private/gcconfig.h +@@ -60,6 +60,13 @@ + # endif + + /* Determine the machine type: */ ++#if defined(__aarch64__) ++# define AARCH64 ++# if !defined(LINUX) ++# define NOSYS ++# define mach_type_known ++# endif ++# endif + # if defined(__arm__) || defined(__thumb__) + # define ARM32 + # if !defined(LINUX) && !defined(NETBSD) +@@ -239,6 +246,10 @@ + # define IA64 + # define mach_type_known + # endif ++# if defined(LINUX) && defined(__aarch64__) ++# define AARCH64 ++# define mach_type_known ++# endif + # if defined(LINUX) && defined(__arm__) + # define ARM32 + # define mach_type_known +@@ -500,6 +511,7 @@ + /* running Amdahl UTS4 */ + /* S390 ==> 390-like machine */ + /* running LINUX */ ++ /* AARCH64 ==> ARM AArch64 */ + /* ARM32 ==> Intel StrongARM */ + /* IA64 ==> Intel IPF */ + /* (e.g. Itanium) */ +@@ -1841,6 +1853,32 @@ + # define HEURISTIC1 + # endif + ++# ifdef AARCH64 ++# define CPP_WORDSZ 64 ++# define MACH_TYPE "AARCH64" ++# define ALIGNMENT 8 ++# ifndef HBLKSIZE ++# define HBLKSIZE 4096 ++# endif ++# ifdef LINUX ++# define OS_TYPE "LINUX" ++# define LINUX_STACKBOTTOM ++# define USE_GENERIC_PUSH_REGS ++# define DYNAMIC_LOADING ++ extern int __data_start[]; ++# define DATASTART ((ptr_t)__data_start) ++ extern char _end[]; ++# define DATAEND ((ptr_t)(&_end)) ++# endif ++# ifdef NOSYS ++ /* __data_start is usually defined in the target linker script. */ ++ extern int __data_start[]; ++# define DATASTART ((ptr_t)__data_start) ++ extern void *__stack_base__; ++# define STACKBOTTOM ((ptr_t)__stack_base__) ++# endif ++# endif ++ + # ifdef ARM32 + # define CPP_WORDSZ 32 + # define MACH_TYPE "ARM32" +--- a/src/include/ChangeLog.linaro ++++ b/src/include/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libiberty/ChangeLog.linaro ++++ b/src/libiberty/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/lto-plugin/ChangeLog.linaro ++++ b/src/lto-plugin/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/contrib/regression/ChangeLog.linaro ++++ b/src/contrib/regression/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/contrib/config-list.mk ++++ b/src/contrib/config-list.mk +@@ -11,7 +11,8 @@ + # nohup nice make -j25 -l36 -f ../gcc/contrib/config-list.mk > make.out 2>&1 & + # + # v850e1-elf is rejected by config.sub +-LIST = alpha-linux-gnu alpha-freebsd6 alpha-netbsd alpha-openbsd \ ++LIST = aarch64-elf aarch64-linux-gnu \ ++ alpha-linux-gnu alpha-freebsd6 alpha-netbsd alpha-openbsd \ + alpha64-dec-vms alpha-dec-vms am33_2.0-linux \ + arm-wrs-vxworks arm-netbsdelf \ + arm-linux-androideabi arm-uclinux_eabi arm-eabi \ +--- a/src/contrib/ChangeLog.linaro ++++ b/src/contrib/ChangeLog.linaro +@@ -0,0 +1,78 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198443. ++ 2013-04-22 Sofiane Naci ++ ++ * config-list.mk (LIST): Add aarch64-elf and aarch64-linux-gnu. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/contrib/reghunt/ChangeLog.linaro ++++ b/src/contrib/reghunt/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libatomic/ChangeLog.linaro ++++ b/src/libatomic/ChangeLog.linaro +@@ -0,0 +1,79 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-12-06 Michael Collison ++ ++ Backport from trunk r203774 ++ 2013-10-17 Michael Hudson-Doyle ++ ++ * libatomic/configure.tgt (aarch64*): Remove code preventing ++ build. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libatomic/configure.tgt ++++ b/src/libatomic/configure.tgt +@@ -95,11 +95,6 @@ + + # Other system configury + case "${target}" in +- aarch64*) +- # This is currently not supported in AArch64. +- UNSUPPORTED=1 +- ;; +- + arm*-*-linux*) + # OS support for atomic primitives. + config_path="${config_path} linux/arm posix" +--- a/src/config/ChangeLog.linaro ++++ b/src/config/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libbacktrace/ChangeLog.linaro ++++ b/src/libbacktrace/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libjava/libltdl/ChangeLog.linaro ++++ b/src/libjava/libltdl/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libjava/configure.host ++++ b/src/libjava/configure.host +@@ -81,6 +81,11 @@ + + # This case statement supports per-CPU defaults. + case "${host}" in ++ aarch64*-linux*) ++ libgcj_interpreter=yes ++ sysdeps_dir=aarch64 ++ ATOMICSPEC=-fuse-atomic-builtins ++ ;; + arm*-elf) + with_libffi_default=no + PROCESS=Ecos +@@ -289,6 +294,12 @@ + sysdeps_dir=i386 + DIVIDESPEC=-f%{m32:no-}use-divide-subroutine + ;; ++ aarch64*-linux* ) ++ slow_pthread_self=no ++ can_unwind_signal=no ++ CHECKREFSPEC=-fcheck-references ++ DIVIDESPEC=-fuse-divide-subroutine ++ ;; + arm*-linux* ) + slow_pthread_self=no + can_unwind_signal=no +--- a/src/libjava/ChangeLog.linaro ++++ b/src/libjava/ChangeLog.linaro +@@ -0,0 +1,79 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-12-06 Michael Collison ++ ++ Backport from trunk r197997 ++ 2013-04-16 Andreas Schwab ++ ++ * configure.host: Add support for aarch64. ++ * sysdep/aarch64/locks.h: New file. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libjava/classpath/ChangeLog.linaro ++++ b/src/libjava/classpath/ChangeLog.linaro +@@ -0,0 +1,78 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-12-06 Michael Collison ++ ++ Backport from trunk r197997 ++ 2013-04-16 Andreas Schwab ++ ++ * native/fdlibm/ieeefp.h: Add support for aarch64. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libjava/classpath/native/fdlibm/ieeefp.h ++++ b/src/libjava/classpath/native/fdlibm/ieeefp.h +@@ -4,6 +4,14 @@ + #ifndef __IEEE_BIG_ENDIAN + #ifndef __IEEE_LITTLE_ENDIAN + ++#ifdef __aarch64__ ++#ifdef __AARCH64EB__ ++#define __IEEE_BIG_ENDIAN ++#else ++#define __IEEE_LITTLE_ENDIAN ++#endif ++#endif ++ + #ifdef __alpha__ + #define __IEEE_LITTLE_ENDIAN + #endif +--- a/src/libjava/sysdep/aarch64/locks.h ++++ b/src/libjava/sysdep/aarch64/locks.h +@@ -0,0 +1,57 @@ ++// locks.h - Thread synchronization primitives. AArch64 implementation. ++ ++#ifndef __SYSDEP_LOCKS_H__ ++#define __SYSDEP_LOCKS_H__ ++ ++typedef size_t obj_addr_t; /* Integer type big enough for object */ ++ /* address. */ ++ ++// Atomically replace *addr by new_val if it was initially equal to old. ++// Return true if the comparison succeeded. ++// Assumed to have acquire semantics, i.e. later memory operations ++// cannot execute before the compare_and_swap finishes. ++inline static bool ++compare_and_swap(volatile obj_addr_t *addr, ++ obj_addr_t old, ++ obj_addr_t new_val) ++{ ++ return __sync_bool_compare_and_swap(addr, old, new_val); ++} ++ ++// Set *addr to new_val with release semantics, i.e. making sure ++// that prior loads and stores complete before this ++// assignment. ++inline static void ++release_set(volatile obj_addr_t *addr, obj_addr_t new_val) ++{ ++ __sync_synchronize(); ++ *addr = new_val; ++} ++ ++// Compare_and_swap with release semantics instead of acquire semantics. ++// On many architecture, the operation makes both guarantees, so the ++// implementation can be the same. ++inline static bool ++compare_and_swap_release(volatile obj_addr_t *addr, ++ obj_addr_t old, ++ obj_addr_t new_val) ++{ ++ return __sync_bool_compare_and_swap(addr, old, new_val); ++} ++ ++// Ensure that subsequent instructions do not execute on stale ++// data that was loaded from memory before the barrier. ++inline static void ++read_barrier() ++{ ++ __sync_synchronize(); ++} ++ ++// Ensure that prior stores to memory are completed with respect to other ++// processors. ++inline static void ++write_barrier() ++{ ++ __sync_synchronize(); ++} ++#endif +--- a/src/gnattools/ChangeLog.linaro ++++ b/src/gnattools/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/maintainer-scripts/ChangeLog.linaro ++++ b/src/maintainer-scripts/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/configure ++++ b/src/configure +@@ -3272,6 +3272,8 @@ + + # Disable Java if libffi is not supported. + case "${target}" in ++ aarch64-*-*) ++ ;; + alpha*-*-*) + ;; + arm*-*-*) +--- a/src/libgcc/ChangeLog.linaro ++++ b/src/libgcc/ChangeLog.linaro +@@ -0,0 +1,81 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198090. ++ 2013-04-19 Yufeng Zhang ++ ++ * config/aarch64/sfp-machine.h (_FP_W_TYPE): Change to define ++ as 'unsigned long long' instead of 'unsigned long'. ++ (_FP_WS_TYPE): Change to define as 'signed long long' instead of ++ 'signed long'. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libgcc/config/aarch64/sfp-machine.h ++++ b/src/libgcc/config/aarch64/sfp-machine.h +@@ -24,8 +24,8 @@ + . */ + + #define _FP_W_TYPE_SIZE 64 +-#define _FP_W_TYPE unsigned long +-#define _FP_WS_TYPE signed long ++#define _FP_W_TYPE unsigned long long ++#define _FP_WS_TYPE signed long long + #define _FP_I_TYPE int + + typedef int TItype __attribute__ ((mode (TI))); +--- a/src/libgcc/config/libbid/ChangeLog.linaro ++++ b/src/libgcc/config/libbid/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libdecnumber/ChangeLog.linaro ++++ b/src/libdecnumber/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/LINARO-VERSION ++++ b/src/gcc/LINARO-VERSION +@@ -0,0 +1 @@ ++4.8-2015.04-1~dev +--- a/src/gcc/targhooks.c ++++ b/src/gcc/targhooks.c +@@ -1042,20 +1042,17 @@ + unsigned *cost = (unsigned *) data; + unsigned retval = 0; + +- if (flag_vect_cost_model) +- { +- tree vectype = stmt_info ? stmt_vectype (stmt_info) : NULL_TREE; +- int stmt_cost = default_builtin_vectorization_cost (kind, vectype, ++ tree vectype = stmt_info ? stmt_vectype (stmt_info) : NULL_TREE; ++ int stmt_cost = default_builtin_vectorization_cost (kind, vectype, + misalign); +- /* Statements in an inner loop relative to the loop being +- vectorized are weighted more heavily. The value here is +- arbitrary and could potentially be improved with analysis. */ +- if (where == vect_body && stmt_info && stmt_in_inner_loop_p (stmt_info)) +- count *= 50; /* FIXME. */ ++ /* Statements in an inner loop relative to the loop being ++ vectorized are weighted more heavily. The value here is ++ arbitrary and could potentially be improved with analysis. */ ++ if (where == vect_body && stmt_info && stmt_in_inner_loop_p (stmt_info)) ++ count *= 50; /* FIXME. */ + +- retval = (unsigned) (count * stmt_cost); +- cost[where] += retval; +- } ++ retval = (unsigned) (count * stmt_cost); ++ cost[where] += retval; + + return retval; + } +--- a/src/gcc/cppbuiltin.c ++++ b/src/gcc/cppbuiltin.c +@@ -53,18 +53,41 @@ + *patchlevel = s_patchlevel; + } + ++/* Parse a LINAROVER version string of the format "M.m-year.month[-spin][~dev]" ++ to create Linaro release number YYYYMM and spin version. */ ++static void ++parse_linarover (int *release, int *spin) ++{ ++ static int s_year = -1, s_month, s_spin; + ++ if (s_year == -1) ++ if (sscanf (LINAROVER, "%*[^-]-%d.%d-%d", &s_year, &s_month, &s_spin) != 3) ++ { ++ sscanf (LINAROVER, "%*[^-]-%d.%d", &s_year, &s_month); ++ s_spin = 0; ++ } ++ ++ if (release) ++ *release = s_year * 100 + s_month; ++ ++ if (spin) ++ *spin = s_spin; ++} ++ + /* Define __GNUC__, __GNUC_MINOR__, __GNUC_PATCHLEVEL__ and __VERSION__. */ + static void + define__GNUC__ (cpp_reader *pfile) + { +- int major, minor, patchlevel; ++ int major, minor, patchlevel, linaro_release, linaro_spin; + + parse_basever (&major, &minor, &patchlevel); ++ parse_linarover (&linaro_release, &linaro_spin); + cpp_define_formatted (pfile, "__GNUC__=%d", major); + cpp_define_formatted (pfile, "__GNUC_MINOR__=%d", minor); + cpp_define_formatted (pfile, "__GNUC_PATCHLEVEL__=%d", patchlevel); + cpp_define_formatted (pfile, "__VERSION__=\"%s\"", version_string); ++ cpp_define_formatted (pfile, "__LINARO_RELEASE__=%d", linaro_release); ++ cpp_define_formatted (pfile, "__LINARO_SPIN__=%d", linaro_spin); + cpp_define_formatted (pfile, "__ATOMIC_RELAXED=%d", MEMMODEL_RELAXED); + cpp_define_formatted (pfile, "__ATOMIC_SEQ_CST=%d", MEMMODEL_SEQ_CST); + cpp_define_formatted (pfile, "__ATOMIC_ACQUIRE=%d", MEMMODEL_ACQUIRE); +--- a/src/gcc/hooks.c ++++ b/src/gcc/hooks.c +@@ -147,6 +147,14 @@ + return false; + } + ++/* Generic hook that takes (gimple_stmt_iterator *) and returns ++ false. */ ++bool ++hook_bool_gsiptr_false (gimple_stmt_iterator *a ATTRIBUTE_UNUSED) ++{ ++ return false; ++} ++ + /* Used for the TARGET_ASM_CAN_OUTPUT_MI_THUNK hook. */ + bool + hook_bool_const_tree_hwi_hwi_const_tree_false (const_tree a ATTRIBUTE_UNUSED, +--- a/src/gcc/hooks.h ++++ b/src/gcc/hooks.h +@@ -42,6 +42,7 @@ + extern bool hook_bool_const_tree_false (const_tree); + extern bool hook_bool_tree_true (tree); + extern bool hook_bool_const_tree_true (const_tree); ++extern bool hook_bool_gsiptr_false (gimple_stmt_iterator *); + extern bool hook_bool_const_tree_hwi_hwi_const_tree_false (const_tree, + HOST_WIDE_INT, + HOST_WIDE_INT, +--- a/src/gcc/c-family/ChangeLog.linaro ++++ b/src/gcc/c-family/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/java/ChangeLog.linaro ++++ b/src/gcc/java/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/c/ChangeLog.linaro ++++ b/src/gcc/c/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/target.def ++++ b/src/gcc/target.def +@@ -1289,7 +1289,8 @@ + "", + tree, (unsigned int /*location_t*/ loc, tree fndecl, void *arglist), NULL) + +-/* Fold a target-specific builtin. */ ++/* Fold a target-specific builtin to a tree valid for both GIMPLE ++ and GENERIC. */ + DEFHOOK + (fold_builtin, + "", +@@ -1296,6 +1297,16 @@ + tree, (tree fndecl, int n_args, tree *argp, bool ignore), + hook_tree_tree_int_treep_bool_null) + ++/* Fold a target-specific builtin to a valid GIMPLE tree. */ ++DEFHOOK ++(gimple_fold_builtin, ++ "Fold a call to a machine specific built-in function that was set up\n\ ++by @samp{TARGET_INIT_BUILTINS}. @var{gsi} points to the gimple\n\ ++statement holding the function call. Returns true if any change\n\ ++was made to the GIMPLE stream.", ++ bool, (gimple_stmt_iterator *gsi), ++ hook_bool_gsiptr_false) ++ + /* Target hook is used to compare the target attributes in two functions to + determine which function's features get higher priority. This is used + during function multi-versioning to figure out the order in which two +--- a/src/gcc/incpath.c ++++ b/src/gcc/incpath.c +@@ -148,20 +148,22 @@ + if (!filename_ncmp (p->fname, cpp_GCC_INCLUDE_DIR, len)) + { + char *str = concat (iprefix, p->fname + len, NULL); +- if (p->multilib == 1 && imultilib) +- str = reconcat (str, str, dir_separator_str, +- imultilib, NULL); +- else if (p->multilib == 2) ++ if (p->multilib && imultilib) ++ { ++ str = reconcat (str, str, dir_separator_str, ++ imultilib, NULL); ++ add_path (str, SYSTEM, p->cxx_aware, false); ++ } ++ else ++ add_path (str, SYSTEM, p->cxx_aware, false); ++ ++ if (p->multilib && imultiarch) + { +- if (!imultiarch) +- { +- free (str); +- continue; +- } ++ char *str = concat (iprefix, p->fname + len, NULL); + str = reconcat (str, str, dir_separator_str, + imultiarch, NULL); ++ add_path (str, SYSTEM, p->cxx_aware, false); + } +- add_path (str, SYSTEM, p->cxx_aware, false); + } + } + } +@@ -171,7 +173,7 @@ + { + if (!p->cplusplus || cxx_stdinc) + { +- char *str; ++ char *str, *str2; + + /* Should this directory start with the sysroot? */ + if (sysroot && p->add_sysroot) +@@ -215,19 +217,20 @@ + else + str = update_path (p->fname, p->component); + +- if (p->multilib == 1 && imultilib) +- str = reconcat (str, str, dir_separator_str, imultilib, NULL); +- else if (p->multilib == 2) ++ str2 = xstrdup(str); ++ if (p->multilib && imultilib) + { +- if (!imultiarch) +- { +- free (str); +- continue; +- } +- str = reconcat (str, str, dir_separator_str, imultiarch, NULL); ++ str = reconcat (str, str, dir_separator_str, imultilib, NULL); ++ add_path (str, SYSTEM, p->cxx_aware, false); + } ++ else ++ add_path (str, SYSTEM, p->cxx_aware, false); + +- add_path (str, SYSTEM, p->cxx_aware, false); ++ if (p->multilib && imultiarch) ++ { ++ str2 = reconcat (str2, str2, dir_separator_str, imultiarch, NULL); ++ add_path (str2, SYSTEM, p->cxx_aware, false); ++ } + } + } + } +--- a/src/gcc/rtlanal.c ++++ b/src/gcc/rtlanal.c +@@ -1228,6 +1228,10 @@ + if (find_reg_note (insn, REG_EQUAL, NULL_RTX)) + return 0; + ++ /* Check the code to be executed for COND_EXEC. */ ++ if (GET_CODE (pat) == COND_EXEC) ++ pat = COND_EXEC_CODE (pat); ++ + if (GET_CODE (pat) == SET && set_noop_p (pat)) + return 1; + +--- a/src/gcc/configure ++++ b/src/gcc/configure +@@ -1667,7 +1667,8 @@ + use sysroot as the system root during the build + --with-sysroot[=DIR] search for usr/lib, usr/include, et al, within DIR + --with-specs=SPECS add SPECS to driver command-line processing +- --with-pkgversion=PKG Use PKG in the version string in place of "GCC" ++ --with-pkgversion=PKG Use PKG in the version string in place of "Linaro ++ GCC `cat $srcdir/LINARO-VERSION`" + --with-bugurl=URL Direct users to URL to report a bug + --with-multilib-list select multilibs (SH and x86-64 only) + --with-gnu-ld assume the C compiler uses GNU ld default=no +@@ -7336,7 +7337,7 @@ + *) PKGVERSION="($withval) " ;; + esac + else +- PKGVERSION="(GCC) " ++ PKGVERSION="(Linaro GCC `cat $srcdir/LINARO-VERSION`) " + + fi + +@@ -26026,8 +26027,9 @@ + # ??? Once 2.11 is released, probably need to add first known working + # version to the per-target configury. + case "$cpu_type" in +- alpha | arm | avr | bfin | cris | i386 | m32c | m68k | microblaze | mips \ +- | pa | rs6000 | score | sparc | spu | tilegx | tilepro | xstormy16 | xtensa) ++ aarch64 | alpha | arm | avr | bfin | cris | i386 | m32c | m68k | microblaze \ ++ | mips | pa | rs6000 | score | sparc | spu | tilegx | tilepro | xstormy16 \ ++ | xtensa) + insn="nop" + ;; + ia64 | s390) +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -2227,7 +2227,7 @@ + } + + /* Now try the multiarch path. */ +- if (!skip_multi_dir ++ if (!skip_multi_dir && !multi_dir + && !pl->require_machine_suffix && multiarch_dir) + { + memcpy (path + len, multiarch_suffix, multiarch_len + 1); +@@ -2263,6 +2263,16 @@ + if (ret) + break; + } ++ ++ /* Now try the multiarch path. */ ++ if (!skip_multi_dir ++ && !pl->require_machine_suffix && multiarch_dir) ++ { ++ memcpy (path + len, multiarch_suffix, multiarch_len + 1); ++ ret = callback (path, callback_info); ++ if (ret) ++ break; ++ } + } + if (pl) + break; +@@ -7662,6 +7672,21 @@ + ++p; + } + ++ if (first) ++ { ++ if (this_path_len > 3 ++ && this_path[0] == '.' ++ && this_path[1] == ':' ++ && this_path[2] == ':') ++ { ++ char *new_multiarch_dir = XNEWVEC (char, this_path_len + 1); ++ ++ strncpy (new_multiarch_dir, this_path, this_path_len); ++ new_multiarch_dir[this_path_len] = '\0'; ++ multiarch_dir = &new_multiarch_dir[3]; ++ } ++ } ++ + if (ok && first) + { + if (this_path_len != 1 +--- a/src/gcc/gensupport.c ++++ b/src/gcc/gensupport.c +@@ -1717,6 +1717,21 @@ + XVECEXP (insn, 1, 0) = pattern; + } + ++ if (XVEC (ce_elem->data, 3) != NULL) ++ { ++ rtvec attributes = rtvec_alloc (XVECLEN (insn, 4) ++ + XVECLEN (ce_elem->data, 3)); ++ int i = 0; ++ int j = 0; ++ for (i = 0; i < XVECLEN (insn, 4); i++) ++ RTVEC_ELT (attributes, i) = XVECEXP (insn, 4, i); ++ ++ for (j = 0; j < XVECLEN (ce_elem->data, 3); j++, i++) ++ RTVEC_ELT (attributes, i) = XVECEXP (ce_elem->data, 3, j); ++ ++ XVEC (insn, 4) = attributes; ++ } ++ + XSTR (insn, 2) = alter_test_for_insn (ce_elem, insn_elem); + XTMPL (insn, 3) = alter_output_for_insn (ce_elem, insn_elem, + alternatives, max_operand); +--- a/src/gcc/fold-const.c ++++ b/src/gcc/fold-const.c +@@ -2470,9 +2470,13 @@ + } + + if (TREE_CODE (arg0) != TREE_CODE (arg1) +- /* This is needed for conversions and for COMPONENT_REF. +- Might as well play it safe and always test this. */ +- || TREE_CODE (TREE_TYPE (arg0)) == ERROR_MARK ++ /* NOP_EXPR and CONVERT_EXPR are considered equal. */ ++ && !(CONVERT_EXPR_P (arg0) && CONVERT_EXPR_P (arg1))) ++ return 0; ++ ++ /* This is needed for conversions and for COMPONENT_REF. ++ Might as well play it safe and always test this. */ ++ if (TREE_CODE (TREE_TYPE (arg0)) == ERROR_MARK + || TREE_CODE (TREE_TYPE (arg1)) == ERROR_MARK + || TYPE_MODE (TREE_TYPE (arg0)) != TYPE_MODE (TREE_TYPE (arg1))) + return 0; +--- a/src/gcc/objc/ChangeLog.linaro ++++ b/src/gcc/objc/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/tree-ssa-uncprop.c ++++ b/src/gcc/tree-ssa-uncprop.c +@@ -466,12 +466,11 @@ + struct equiv_hash_elt equiv_hash_elt; + void **slot; + +- /* If the argument is not an invariant, and refers to the same +- underlying variable as the PHI result, then there's no +- point in un-propagating the argument. */ ++ /* If the argument is not an invariant and can be potentially ++ coalesced with the result, then there's no point in ++ un-propagating the argument. */ + if (!is_gimple_min_invariant (arg) +- && (SSA_NAME_VAR (arg) == SSA_NAME_VAR (res) +- && TREE_TYPE (arg) == TREE_TYPE (res))) ++ && gimple_can_coalesce_p (arg, res)) + continue; + + /* Lookup this argument's value in the hash table. */ +@@ -485,7 +484,7 @@ + int j; + + /* Walk every equivalence with the same value. If we find +- one with the same underlying variable as the PHI result, ++ one that can potentially coalesce with the PHI rsult, + then replace the value in the argument with its equivalent + SSA_NAME. Use the most recent equivalence as hopefully + that results in shortest lifetimes. */ +@@ -493,8 +492,7 @@ + { + tree equiv = elt->equivalences[j]; + +- if (SSA_NAME_VAR (equiv) == SSA_NAME_VAR (res) +- && TREE_TYPE (equiv) == TREE_TYPE (res)) ++ if (gimple_can_coalesce_p (equiv, res)) + { + SET_PHI_ARG_DEF (phi, e->dest_idx, equiv); + break; +--- a/src/gcc/ChangeLog.linaro ++++ b/src/gcc/ChangeLog.linaro +@@ -0,0 +1,5173 @@ ++2015-05-19 Christophe Lyon ++ ++ * LINARO-VERSION: Bump version. ++ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ * LINARO-VERSION: Update. ++ ++2015-04-11 Kugan Vivekanandarajah ++ ++ Backport from trunk r203711. ++ 2013-10-16 James Greenhalgh ++ ++ * config/aarch64/aarch64.md ++ (*mov_aarch64): Fix output template for DUP (element) Scalar. ++ ++2015-02-15 Michael Collison ++ ++ * LINARO-VERSION: Bump version. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ * LINARO-VERSION: Update. ++ ++2014-11-14 Yvan Roux ++ ++ * LINARO-VERSION: Bump version. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ * LINARO-VERSION: Update. ++ ++2014-11-14 Michael Collison ++ ++ Backport from trunk r212178.. ++ 2014-06-30 Joseph Myers ++ ++ * var-tracking.c (add_stores): Return instead of asserting if old ++ and new values for conditional store are the same. ++ ++2014-11-14 Yvan Roux ++ ++ Add Linaro release macros (Linaro only patch.) ++ ++ * Makefile.in (LINAROVER, LINAROVER_C, LINAROVER_S): Define. ++ (CFLAGS-cppbuiltin.o): Add LINAROVER macro definition. ++ (cppbuiltin.o): Depend on $(LINAROVER). ++ * cppbuiltin.c (parse_linarover): New. ++ (define_GNUC__): Define __LINARO_RELEASE__ and __LINARO_SPIN__ macros. ++ ++2014-08-26 venkataramanan-kumar ++ ++ Backport from trunk r205807. ++ 2013-12-09 Richard Earnshaw ++ ++ * arm.c (mem_ok_for_ldrd_strd): Rename first argument as MEM. Do ++ more address validation checks. ++ ++2014-08-15 Yvan Roux ++ ++ * LINARO-VERSION: Bump version. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ * LINARO-VERSION: Update. ++ ++2014-08-11 Michael Collison ++ ++ Backport from trunk r206529, r206530 ++ 2014-01-10 Richard Earnshaw ++ ++ PR target/59744 ++ * aarch64-modes.def (CC_Zmode): New flags mode. ++ * aarch64.c (aarch64_select_cc_mode): Only allow NEG when the condition ++ represents an equality. ++ (aarch64_get_condition_code): Handle CC_Zmode. ++ * aarch64.md (compare_neg): Restrict to equality operations. ++ ++2014-08-11 Michael Collison ++ ++ Backport from trunk r204251 ++ 2013-10-31 Richard Sandiford ++ Yury Gribov ++ ++ PR sanitizer/58543 ++ * asan.c (asan_clear_shadow): Allocate a new vreg for temporary ++ shadow pointer to avoid clobbering the main one. ++ ++2014-04-08 Yvan Roux ++ ++ * LINARO-VERSION: Bump version. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ * LINARO-VERSION: Update. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r205105 ++ 2013-11-20 James Greenhalgh ++ ++ * config/aarch64/aarch64.md: Remove "mode" and "mode2" attributes ++ from all insns. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r205050 ++ 2013-11-19 James Greenhalgh ++ ++ * config/arm/arm.md (zero_extenddi2): Add type attribute. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r204852 ++ 2013-11-19 James Greenhalgh ++ ++ * config/aarch64/aarch64.md: Remove v8type from all insns. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r204852 ++ 2013-11-15 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md: Remove simd_type from all ++ patterns. ++ * config/aarch64/aarch64.md: Likewise, correct "type" attribute ++ where it is incorrect or missing. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r204784 ++ 2013-11-14 James Greenhalgh ++ ++ * config/aarch64/aarch64-cores.def (example-1): Remove. ++ (example-2): Likewise. ++ * config/aarch64/aarch64-tune.md: Regenerate. ++ * config/aarch64/aarch64.md: Do not include "large.md" or "small.md". ++ (generic_sched): Remove "large", "small". ++ * config/aarch64/large.md: Delete. ++ * config/aarch64/small.md: Delete. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r204783 ++ 2013-11-14 James Greenhalgh ++ ++ * config/aarch64/aarch64-cores.def (cortex-a57): Tune for cortexa15. ++ * config/aarch64/aarch64-tune.md: Regenerate. ++ * config/aarch64/aarch64.md: Include cortex-a15 pipeline model. ++ (generic_sched): "no" if we are tuning for cortexa15. ++ * config/arm/cortex-a15.md: Include cortex-a15-neon.md by ++ relative path. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r204782 ++ 2013-11-14 James Greenhalgh ++ ++ * config/aarch64/aarch64-arches.def (armv8-a): Tune for cortex-a53. ++ * config/aarch64/aarch64.md: Do not include aarch64-generic.md. ++ * config/aarch64/aarch64.c (aarch64_tune): Initialize to cortexa53. ++ (all_cores): Use cortexa53 when tuning for "generic". ++ (aarch64_override_options): Fix comment. ++ * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Set to cortexa53. ++ * config/aarch64/aarch64-generic.md: Delete. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r204575 ++ 2013-11-08 James Greenhalgh ++ ++ * config/arm/aarch-common.c ++ (search_term): New typedef. ++ (shift_rtx_costs): New array. ++ (arm_rtx_shift_left_p): New. ++ (arm_find_sub_rtx_with_search_term): Likewise. ++ (arm_find_sub_rtx_with_code): Likewise. ++ (arm_early_load_addr_dep): Add sanity checking. ++ (arm_no_early_alu_shift_dep): Likewise. ++ (arm_no_early_alu_shift_value_dep): Likewise. ++ (arm_no_early_mul_dep): Likewise. ++ (arm_no_early_store_addr_dep): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203621 ++ 2013-10-15 James Greenhalgh ++ ++ * config/arm/neon-schedgen.ml: Remove. ++ * config/arm/cortex-a9-neon.md: Remove comment regarding ++ neon-schedgen.ml. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203620 ++ 2013-10-15 James Greenhalgh ++ ++ * config/arm/types: Remove old neon types. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203619 ++ 2013-10-15 James Greenhalgh ++ ++ * config/arm/cortex-a7.md ++ (cortex_a7_neon_type): New. ++ (cortex_a7_neon_mul): Update for new types. ++ (cortex_a7_neon_mla): Likewise. ++ (cortex_a7_neon): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203618 ++ 2013-10-15 James Greenhalgh ++ ++ * config/arm/cortex-a15-neon.md ++ (cortex_a15_neon_type): New, ++ ++ (cortex_a15_neon_int_1): Remove. ++ (cortex_a15_neon_int_2): Likewise. ++ (cortex_a15_neon_int_3): Likewise. ++ (cortex_a15_neon_int_4): Likewise. ++ (cortex_a15_neon_int_5): Likewise. ++ (cortex_a15_neon_vqneg_vqabs): Likewise. ++ (cortex_a15_neon_vmov): Likewise. ++ (cortex_a15_neon_vaba): Likewise. ++ (cortex_a15_neon_vaba_qqq): Likewise. ++ (cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a15_neon_mul_qqq_8_16_32_ddd_32): Likewise. ++ (cortex_a15_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar): ++ Likewise. ++ (cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a15_neon_mla_qqq_8_16): Likewise. ++ (cortex_a15_neon_mla_ddd_32_qqd_16_ddd_32_scalar): Likewise. ++ (cortex_a15_neon_mla_qqq_32_qqd_32_scalar): Likewise. ++ (cortex_a15_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. ++ (cortex_a15_neon_mul_qqd_32_scalar): Likewise. ++ (cortex_a15_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. ++ (cortex_a15_neon_shift_1): Likewise. ++ (cortex_a15_neon_shift_2): Likewise. ++ (cortex_a15_neon_shift_3): Likewise. ++ (cortex_a15_neon_vshl_ddd): Likewise. ++ (cortex_a15_neon_vqshl_vrshl_vqrshl_qqq): Likewise. ++ (cortex_a15_neon_vsra_vrsra): Likewise. ++ (cortex_a15_neon_fp_vmla_ddd_scalar): Likewise. ++ (cortex_a15_neon_fp_vmla_qqq_scalar): Likewise. ++ (cortex_a15_neon_bp_3cycle): Likewise. ++ (cortex_a15_neon_ldm_2): Likewise. ++ (cortex_a15_neon_stm_2): Likewise. ++ (cortex_a15_neon_mcr): Likewise. ++ (cortex_a15_neon_mrc): Likewise. ++ (cortex_a15_neon_fp_vadd_ddd_vabs_dd): Likewise. ++ (cortex_a15_neon_fp_vadd_qqq_vabs_qq): Likewise. ++ (cortex_a15_neon_fp_vmul_ddd): Likewise. ++ (cortex_a15_neon_fp_vmul_qqd): Likewise. ++ (cortex_a15_neon_fp_vmla_ddd): Likewise. ++ (cortex_a15_neon_fp_vmla_qqq): Likewise. ++ (cortex_a15_neon_fp_vmla_ddd_scalar): Likewise. ++ (cortex_a15_neon_fp_vmla_qqq_scalar): Likewise. ++ (cortex_a15_neon_fp_vrecps_vrsqrts_ddd): Likewise. ++ (cortex_a15_neon_fp_vrecps_vrsqrts_qqq): Likewise. ++ (cortex_a15_neon_bp_simple): Likewise. ++ (cortex_a15_neon_bp_2cycle): Likewise. ++ (cortex_a15_neon_bp_3cycle): Likewise. ++ (cortex_a15_neon_vld1_1_2_regs): Likewise. ++ (cortex_a15_neon_vld1_3_4_regs): Likewise. ++ (cortex_a15_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. ++ (cortex_a15_neon_vld2_4_regs): Likewise. ++ (cortex_a15_neon_vld3_vld4): Likewise. ++ (cortex_a15_neon_vst1_1_2_regs_vst2_2_regs): Likewise. ++ (cortex_a15_neon_vst1_3_4_regs): Likewise. ++ (cortex_a15_neon_vst2_4_regs_vst3_vst4): Rename to... ++ (cortex_a15_neon_vst2_4_regs_vst3): ...This, update for new attributes. ++ (cortex_a15_neon_vst3_vst4): Rename to... ++ (cortex_a15_neon_vst4): This, update for new attributes. ++ (cortex_a15_neon_vld1_vld2_lane): Update for new attributes. ++ (cortex_a15_neon_vld3_vld4_lane): Likewise. ++ (cortex_a15_neon_vst1_vst2_lane): Likewise. ++ (cortex_a15_neon_vst3_vst4_lane): Likewise. ++ (cortex_a15_neon_vld3_vld4_all_lanes): Likewise. ++ (cortex_a15_neon_ldm_2): Likewise. ++ (cortex_a15_neon_stm_2): Likewise. ++ (cortex_a15_neon_mcr): Likewise. ++ (cortex_a15_neon_mcr_2_mcrr): Likewise. ++ (cortex_a15_neon_mrc): Likewise. ++ (cortex_a15_neon_mrrc): Likewise. ++ ++ (cortex_a15_neon_abd): New. ++ (cortex_a15_neon_abd_q): Likewise. ++ (cortex_a15_neon_aba): Likewise. ++ (cortex_a15_neon_aba_q): Likewise. ++ (cortex_a15_neon_acc): Likewise. ++ (cortex_a15_neon_acc_q): Likewise. ++ (cortex_a15_neon_arith_basic): Likewise. ++ (cortex_a15_neon_arith_complex): Likewise. ++ (cortex_a15_neon_multiply): Likewise. ++ (cortex_a15_neon_multiply_q): Likewise. ++ (cortex_a15_neon_mla): Likewise. ++ (cortex_a15_neon_mla_q): Likewise. ++ (cortex_a15_neon_sat_mla_long): Likewise. ++ (cortex_a15_neon_shift_acc): Likewise. ++ (cortex_a15_neon_shift_imm_basic): Likewise. ++ (cortex_a15_neon_shift_imm_complex): Likewise. ++ (cortex_a15_neon_shift_reg_basic): Likewise. ++ (cortex_a15_neon_shift_reg_basic_q): Likewise. ++ (cortex_a15_neon_shift_reg_complex): Likewise. ++ (cortex_a15_neon_shift_reg_complex_q): Likewise. ++ (cortex_a15_neon_fp_negabs): Likewise ++ (cortex_a15_neon_fp_arith): Likewise ++ (cortex_a15_neon_fp_arith_q): Likewise ++ (cortex_a15_neon_fp_cvt_int): Likewise ++ (cortex_a15_neon_fp_cvt_int_q): Likewise ++ (cortex_a15_neon_fp_cvt_16): Likewise ++ (cortex_a15_neon_fp_mul): Likewise ++ (cortex_a15_neon_fp_mul_q): Likewise ++ (cortex_a15_neon_fp_mla): Likewise ++ (cortex_a15_neon_fp_mla_q): Likewise ++ (cortex_a15_neon_fp_recps_rsqrte): Likewise. ++ (cortex_a15_neon_fp_recps_rsqrte_q): Likewise. ++ (cortex_a15_neon_bitops): Likewise. ++ (cortex_a15_neon_bitops_q): Likewise. ++ (cortex_a15_neon_from_gp): Likewise. ++ (cortex_a15_neon_from_gp_q): Likewise. ++ (cortex_a15_neon_tbl3_tbl4): Likewise. ++ (cortex_a15_neon_zip_q): Likewise. ++ (cortex_a15_neon_to_gp): Likewise. ++ (cortex_a15_neon_load_a): Likewise. ++ (cortex_a15_neon_load_b): Likewise. ++ (cortex_a15_neon_load_c): Likewise. ++ (cortex_a15_neon_load_d): Likewise. ++ (cortex_a15_neon_load_e): Likewise. ++ (cortex_a15_neon_load_f): Likewise. ++ (cortex_a15_neon_store_a): Likewise. ++ (cortex_a15_neon_store_b): Likewise. ++ (cortex_a15_neon_store_c): Likewise. ++ (cortex_a15_neon_store_d): Likewise. ++ (cortex_a15_neon_store_e): Likewise. ++ (cortex_a15_neon_store_f): Likewise. ++ (cortex_a15_neon_store_g): Likewise. ++ (cortex_a15_neon_store_h): Likewise. ++ (cortex_a15_vfp_to_from_gp): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203617 ++ 2013-10-15 James Greenhalgh ++ ++ * config/arm/cortex-a9-neon.md (cortex_a9_neon_type): New. ++ ++ (cortex_a9_neon_vshl_ddd): Remove. ++ (cortex_a9_neon_vst3_vst4): Likewise. ++ (cortex_a9_neon_vld3_vld4_all_lanes): Likewise. ++ ++ (cortex_a9_neon_bit_ops_q): New. ++ ++ (cortex_a9_neon_int_1): Use cortex_a8_neon_type. ++ (cortex_a9_neon_int_2): Likewise. ++ (cortex_a9_neon_int_3): Likewise. ++ (cortex_a9_neon_int_4): Likewise. ++ (cortex_a9_neon_int_5): Likewise. ++ (cortex_a9_neon_vqneg_vqabs): Likewise. ++ (cortex_a9_neon_vmov): Likewise. ++ (cortex_a9_neon_vaba): Likewise. ++ (cortex_a9_neon_vaba_qqq): Likewise. ++ (cortex_a9_neon_shift_1): Likewise. ++ (cortex_a9_neon_shift_2): Likewise. ++ (cortex_a9_neon_shift_3): Likewise. ++ (cortex_a9_neon_vqshl_vrshl_vqrshl_qqq): Likewise. ++ (cortex_a9_neon_vsra_vrsra): Likewise. ++ (cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a9_neon_mul_qqq_8_16_32_ddd_32): Likewise. ++ (cortex_a9_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar): ++ Likewise. ++ (cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a9_neon_mla_qqq_8_16): Likewise. ++ (cortex_a9_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long): ++ Likewise. ++ (cortex_a9_neon_mla_qqq_32_qqd_32_scalar): Likewise. ++ (cortex_a9_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. ++ (cortex_a9_neon_mul_qqd_32_scalar): Likewise. ++ (cortex_a9_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. ++ (cortex_a9_neon_fp_vadd_ddd_vabs_dd): Likewise. ++ (cortex_a9_neon_fp_vadd_qqq_vabs_qq): Likewise. ++ (cortex_a9_neon_fp_vsum): Likewise. ++ (cortex_a9_neon_fp_vmul_ddd): Likewise. ++ (cortex_a9_neon_fp_vmul_qqd): Likewise. ++ (cortex_a9_neon_fp_vmla_ddd): Likewise. ++ (cortex_a9_neon_fp_vmla_qqq): Likewise. ++ (cortex_a9_neon_fp_vmla_ddd_scalar): Likewise. ++ (cortex_a9_neon_fp_vmla_qqq_scalar): Likewise. ++ (cortex_a9_neon_fp_vrecps_vrsqrts_ddd): Likewise. ++ (cortex_a9_neon_fp_vrecps_vrsqrts_qqq): Likewise. ++ (cortex_a9_neon_bp_simple): Likewise. ++ (cortex_a9_neon_bp_2cycle): Likewise. ++ (cortex_a9_neon_bp_3cycle): Likewise. ++ (cortex_a9_neon_ldr): Likewise. ++ (cortex_a9_neon_str): Likewise. ++ (cortex_a9_neon_vld1_1_2_regs): Likewise. ++ (cortex_a9_neon_vld1_3_4_regs): Likewise. ++ (cortex_a9_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. ++ (cortex_a9_neon_vld2_4_regs): Likewise. ++ (cortex_a9_neon_vld3_vld4): Likewise. ++ (cortex_a9_neon_vld1_vld2_lane): Likewise. ++ (cortex_a9_neon_vld3_vld4_lane): Likewise. ++ (cortex_a9_neon_vld3_vld4_all_lanes): Likewise. ++ (cortex_a9_neon_vst1_1_2_regs_vst2_2_regs): Likewise. ++ (cortex_a9_neon_vst1_3_4_regs): Likewise. ++ (cortex_a9_neon_vst2_4_regs_vst3_vst4): Likewise. ++ (cortex_a9_neon_vst1_vst2_lane): Likewise. ++ (cortex_a9_neon_vst3_vst4_lane): Likewise. ++ (cortex_a9_neon_mcr): Likewise. ++ (cortex_a9_neon_mcr_2_mcrr): Likewise. ++ (cortex_a9_neon_mrc): Likewise. ++ (cortex_a9_neon_mrrc): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203616 ++ 2013-10-15 James Greenhalgh ++ ++ * config/arm/cortex-a8-neon.md (cortex_a8_neon_type): New. ++ ++ (cortex_a8_neon_vshl_ddd): Remove. ++ (cortex_a8_neon_vst3_vst4): Likewise. ++ (cortex_a8_neon_vld3_vld4_all_lanes): Likewise. ++ ++ (cortex_a8_neon_bit_ops_q): New. ++ ++ (cortex_a8_neon_int_1): Use cortex_a8_neon_type. ++ (cortex_a8_neon_int_2): Likewise.. ++ (cortex_a8_neon_int_3): Likewise. ++ (cortex_a8_neon_int_5): Likewise. ++ (cortex_a8_neon_vqneg_vqabs): Likewise. ++ (cortex_a8_neon_int_4): Likewise. ++ (cortex_a8_neon_vaba): Likewise. ++ (cortex_a8_neon_vaba_qqq): Likewise. ++ (cortex_a8_neon_shift_1): Likewise. ++ (cortex_a8_neon_shift_2): Likewise. ++ (cortex_a8_neon_shift_3): Likewise. ++ (cortex_a8_neon_vqshl_vrshl_vqrshl_qqq): Likewise. ++ (cortex_a8_neon_vsra_vrsra): Likewise. ++ (cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a8_neon_mul_qqq_8_16_32_ddd_32): Likewise. ++ (cortex_a8_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar): ++ Likewise. ++ (cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a8_neon_mla_qqq_8_16): Likewise. ++ (cortex_a8_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long): ++ Likewise. ++ (cortex_a8_neon_mla_qqq_32_qqd_32_scalar): Likewise. ++ (cortex_a8_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. ++ (cortex_a8_neon_mul_qqd_32_scalar): Likewise. ++ (cortex_a8_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. ++ (cortex_a8_neon_fp_vadd_ddd_vabs_dd): Likewise. ++ (cortex_a8_neon_fp_vadd_qqq_vabs_qq): Likewise. ++ (cortex_a8_neon_fp_vsum): Likewise. ++ (cortex_a8_neon_fp_vmul_ddd): Likewise. ++ (cortex_a8_neon_fp_vmul_qqd): Likewise. ++ (cortex_a8_neon_fp_vmla_ddd): Likewise. ++ (cortex_a8_neon_fp_vmla_qqq): Likewise. ++ (cortex_a8_neon_fp_vmla_ddd_scalar): Likewise. ++ (cortex_a8_neon_fp_vmla_qqq_scalar): Likewise. ++ (cortex_a8_neon_fp_vrecps_vrsqrts_ddd): Likewise. ++ (cortex_a8_neon_fp_vrecps_vrsqrts_qqq): Likewise. ++ (cortex_a8_neon_bp_simple): Likewise. ++ (cortex_a8_neon_bp_2cycle): Likewise. ++ (cortex_a8_neon_bp_3cycle): Likewise. ++ (cortex_a8_neon_ldr): Likewise. ++ (cortex_a8_neon_str): Likewise. ++ (cortex_a8_neon_vld1_1_2_regs): Likewise. ++ (cortex_a8_neon_vld1_3_4_regs): Likewise. ++ (cortex_a8_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. ++ (cortex_a8_neon_vld2_4_regs): Likewise. ++ (cortex_a8_neon_vld3_vld4): Likewise. ++ (cortex_a8_neon_vld1_vld2_lane): Likewise. ++ (cortex_a8_neon_vld3_vld4_lane): Likewise. ++ (cortex_a8_neon_vst1_1_2_regs_vst2_2_regs): Likewise. ++ (cortex_a8_neon_vst1_3_4_regs): Likewise. ++ (cortex_a8_neon_vst2_4_regs_vst3_vst4): Likewise. ++ (cortex_a8_neon_vst1_vst2_lane): Likewise. ++ (cortex_a8_neon_vst3_vst4_lane): Likewise. ++ (cortex_a8_neon_mcr): Likewise. ++ (cortex_a8_neon_mcr_2_mcrr): Likewise. ++ (cortex_a8_neon_mrc): Likewise. ++ (cortex_a8_neon_mrrc): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203614 ++ 2013-10-15 James Greenhalgh ++ ++ * config/aarch64/iterators.md (Vetype): Add SF and DF modes. ++ (fp): New. ++ * config/aarch64/aarch64-simd.md (neon_type): Remove. ++ (aarch64_simd_dup): Add "type" attribute. ++ (aarch64_dup_lane): Likewise. ++ (aarch64_dup_lane_): Likewise. ++ (*aarch64_simd_mov): Likewise. ++ (aarch64_simd_mov_from_low): Likewise. ++ (aarch64_simd_mov_from_high): Likewise. ++ (orn3): Likewise. ++ (bic3): Likewise. ++ (add3): Likewise. ++ (sub3): Likewise. ++ (mul3): Likewise. ++ (*aarch64_mul3_elt): Likewise. ++ (*aarch64_mul3_elt_): Likewise. ++ (*aarch64_mul3_elt_to_128df): Likewise. ++ (*aarch64_mul3_elt_to_64v2df): Likewise. ++ (neg2): Likewise. ++ (abs2): Likewise. ++ (abd_3): Likewise. ++ (aba_3): Likewise. ++ (fabd_3): Likewise. ++ (*fabd_scalar3): Likewise. ++ (and3): Likewise. ++ (ior3): Likewise. ++ (xor3): Likewise. ++ (one_cmpl2): Likewise. ++ (aarch64_simd_vec_set): Likewise. ++ (aarch64_simd_lshr): Likewise. ++ (aarch64_simd_ashr): Likewise. ++ (aarch64_simd_imm_shl): Likewise. ++ (aarch64_simd_reg_sshl_unsigned): Likewise. ++ (aarch64_simd_reg_shl_signed): Likewise. ++ (aarch64_simd_vec_setv2di): Likewise. ++ (aarch64_simd_vec_set): Likewise. ++ (aarch64_mla): Likewise. ++ (*aarch64_mla_elt): Likewise. ++ (*aarch64_mla_elt_): Likewise. ++ (aarch64_mls): Likewise. ++ (*aarch64_mls_elt): Likewise. ++ (*aarch64_mls_elt_): Likewise. ++ (3): Likewise. ++ (move_lo_quad_): Likewise. ++ (aarch64_simd_move_hi_quad_): Likewise. ++ (aarch64_simd_vec_pack_trunc_): Likewise. ++ (vec_pack_trunc_): Likewise. ++ (aarch64_simd_vec_unpack_lo_): Likewise. ++ (aarch64_simd_vec_unpack_hi_): Likewise. ++ (*aarch64_mlal_lo): Likewise. ++ (*aarch64_mlal_hi): Likewise. ++ (*aarch64_mlsl_lo): Likewise. ++ (*aarch64_mlsl_hi): Likewise. ++ (*aarch64_mlal): Likewise. ++ (*aarch64_mlsl): Likewise. ++ (aarch64_simd_vec_mult_lo_): Likewise. ++ (aarch64_simd_vec_mult_hi_): Likewise. ++ (add3): Likewise. ++ (sub3): Likewise. ++ (mul3): Likewise. ++ (div3): Likewise. ++ (neg2): Likewise. ++ (abs2): Likewise. ++ (fma4): Likewise. ++ (*aarch64_fma4_elt): Likewise. ++ (*aarch64_fma4_elt_): Likewise. ++ (*aarch64_fma4_elt_to_128df): Likewise. ++ (*aarch64_fma4_elt_to_64v2df): Likewise. ++ (fnma4): Likewise. ++ (*aarch64_fnma4_elt): Likewise. ++ (*aarch64_fnma4_elt_ ++ (*aarch64_fnma4_elt_to_128df): Likewise. ++ (*aarch64_fnma4_elt_to_64v2df): Likewise. ++ (2): Likewise. ++ (l2): Likewise. ++ (2): Likewise. ++ (vec_unpacks_lo_v4sf): Likewise. ++ (aarch64_float_extend_lo_v2df): Likewise. ++ (vec_unpacks_hi_v4sf): Likewise. ++ (aarch64_float_truncate_lo_v2sf): Likewise. ++ (aarch64_float_truncate_hi_v4sf): Likewise. ++ (aarch64_vmls): Likewise. ++ (3): Likewise. ++ (3): Likewise. ++ (reduc_plus_): Likewise. ++ (reduc_plus_v2di): Likewise. ++ (reduc_plus_v2si): Likewise. ++ (reduc_plus_): Likewise. ++ (aarch64_addpv4sf): Likewise. ++ (clz2): Likewise. ++ (reduc__): Likewise. ++ (reduc__v2di): Likewise. ++ (reduc__v2si): Likewise. ++ (reduc__): Likewise. ++ (reduc__v4sf): Likewise. ++ (aarch64_simd_bsl_internal): Likewise. ++ (*aarch64_get_lane_extend): Likewise. ++ (*aarch64_get_lane_zero_extendsi): Likewise. ++ (aarch64_get_lane): Likewise. ++ (*aarch64_combinez): Likewise. ++ (aarch64_combine): Likewise. ++ (aarch64_simd_combine): Likewise. ++ (aarch64_l_hi_internal): Likewise. ++ (aarch64_l_lo_internal): Likewise. ++ (aarch64_l): Likewise. ++ (aarch64_w): Likewise. ++ (aarch64_w2_internal): Likewise. ++ (aarch64_h): Likewise. ++ (aarch64_hn): Likewise. ++ (aarch64_hn2): Likewise. ++ (aarch64_pmul): Likewise. ++ (aarch64_): Likewise. ++ (aarch64_qadd): Likewise. ++ (aarch64_sqmovun): Likewise. ++ (aarch64_qmovn): Likewise. ++ (aarch64_s): Likewise. ++ (aarch64_sqdmulh): Likewise. ++ (aarch64_sqdmulh_lane): Likewise. ++ (aarch64_sqdmulh_laneq): Likewise. ++ (aarch64_sqdmulh_lane): Likewise. ++ (aarch64_sqdmll): Likewise. ++ (aarch64_sqdmll_lane_internal): Likewise. ++ (aarch64_sqdmll_lane_internal): Likewise. ++ (aarch64_sqdmll_n): Likewise. ++ (aarch64_sqdmll2_internal): Likewise. ++ (aarch64_sqdmll2_lane_internal): Likewise. ++ (aarch64_sqdmll2_n_internal): Likewise. ++ (aarch64_sqdmull): Likewise. ++ (aarch64_sqdmull_lane_internal): Likewise. ++ (aarch64_sqdmull_n): Likewise. ++ (aarch64_sqdmull2_internal): Likewise. ++ (aarch64_sqdmull2_lane_internal): Likewise. ++ (aarch64_sqdmull2_n_internal): Likewise. ++ (aarch64_shl): Likewise. ++ (aarch64_qshl ++ (aarch64_shll_n): Likewise. ++ (aarch64_shll2_n): Likewise. ++ (aarch64_shr_n): Likewise. ++ (aarch64_sra_n): Likewise. ++ (aarch64_si_n): Likewise. ++ (aarch64_qshl_n): Likewise. ++ (aarch64_qshrn_n): Likewise. ++ (aarch64_cm): Likewise. ++ (aarch64_cmdi): Likewise. ++ (aarch64_cm): Likewise. ++ (aarch64_cmdi): Likewise. ++ (aarch64_cmtst): Likewise. ++ (aarch64_cmtstdi): Likewise. ++ (aarch64_cm): Likewise. ++ (*aarch64_fac): Likewise. ++ (aarch64_addp): Likewise. ++ (aarch64_addpdi): Likewise. ++ (sqrt2): Likewise. ++ (vec_load_lanesoi): Likewise. ++ (vec_store_lanesoi): Likewise. ++ (vec_load_lanesci): Likewise. ++ (vec_store_lanesci): Likewise. ++ (vec_load_lanesxi): Likewise. ++ (vec_store_lanesxi): Likewise. ++ (*aarch64_mov): Likewise. ++ (aarch64_ld2_dreg): Likewise. ++ (aarch64_ld2_dreg): Likewise. ++ (aarch64_ld3_dreg): Likewise. ++ (aarch64_ld3_dreg): Likewise. ++ (aarch64_ld4_dreg): Likewise. ++ (aarch64_ld4_dreg): Likewise. ++ (aarch64_tbl1): Likewise. ++ (aarch64_tbl2v16qi): Likewise. ++ (aarch64_combinev16qi): Likewise. ++ (aarch64_): Likewise. ++ (aarch64_st2_dreg): Likewise. ++ (aarch64_st2_dreg): Likewise. ++ (aarch64_st3_dreg): Likewise. ++ (aarch64_st3_dreg): Likewise. ++ (aarch64_st4_dreg): Likewise. ++ (aarch64_st4_dreg): Likewise. ++ (*aarch64_simd_ld1r): Likewise. ++ (aarch64_frecpe): Likewise. ++ (aarch64_frecp): Likewise. ++ (aarch64_frecps): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203613 ++ 2013-10-15 James Greenhalgh ++ ++ * config/arm/iterators.md (V_elem_ch): New. ++ (q): Likewise. ++ (VQH_type): Likewise. ++ * config/arm/arm.md (is_neon_type): New. ++ (conds): Use is_neon_type. ++ (anddi3_insn): Update type attribute. ++ (xordi3_insn): Likewise. ++ (one_cmpldi2): Likewise. ++ * gcc/config/arm/vfp.md (movhf_vfp_neon): Update type attribute. ++ * gcc/config/arm/neon.md (neon_mov): Update type attribute. ++ (*movmisalign_neon_store): Likewise. ++ (*movmisalign_neon_load): Likewise. ++ (vec_set_internal): Likewise. ++ (vec_set_internal): Likewise. ++ (vec_setv2di_internal): Likewise. ++ (vec_extract): Likewise. ++ (vec_extract): Likewise. ++ (vec_extractv2di): Likewise. ++ (*add3_neon): Likewise. ++ (adddi3_neon): Likewise. ++ (*sub3_neon): Likewise. ++ (subdi3_neon): Likewise. ++ (fma4): Likewise. ++ (fma4_intrinsic): Likewise. ++ (*fmsub4): Likewise. ++ (fmsub4_intrinsic): Likewise. ++ (neon_vrint): Likewise. ++ (ior3): Likewise. ++ (and3): Likewise. ++ (orn3_neon): Likewise. ++ (orndi3_neon): Likewise. ++ (bic3_neon): Likewise. ++ (bicdi3_neon): Likewise. ++ (xor3): Likewise. ++ (one_cmpl2): Likewise. ++ (abs2): Likewise. ++ (neg2): Likewise. ++ (negdi2_neon): Likewise. ++ (*umin3_neon): Likewise. ++ (*umax3_neon): Likewise. ++ (*smin3_neon): Likewise. ++ (*smax3_neon): Likewise. ++ (vashl3): Likewise. ++ (vashr3_imm): Likewise. ++ (vlshr3_imm): Likewise. ++ (ashl3_signed): Likewise. ++ (ashl3_unsigned): Likewise. ++ (neon_load_count): Likewise. ++ (ashldi3_neon_noclobber): Likewise. ++ (ashldi3_neon): Likewise. ++ (signed_shift_di3_neon): Likewise. ++ (unsigned_shift_di3_neon): Likewise. ++ (ashrdi3_neon_imm_noclobber): Likewise. ++ (lshrdi3_neon_imm_noclobber): Likewise. ++ (di3_neon): Likewise. ++ (widen_ssum3): Likewise. ++ (widen_usum3): Likewise. ++ (quad_halves_v4si): Likewise. ++ (quad_halves_v4sf): Likewise. ++ (quad_halves_v8hi): Likewise. ++ (quad_halves_v16qi): Likewise. ++ (reduc_splus_v2di): Likewise. ++ (neon_vpadd_internal): Likewise. ++ (neon_vpsmin): Likewise. ++ (neon_vpsmax): Likewise. ++ (neon_vpumin): Likewise. ++ (neon_vpumax): Likewise. ++ (*ss_add_neon): Likewise. ++ (*us_add_neon): Likewise. ++ (*ss_sub_neon): Likewise. ++ (*us_sub_neon): Likewise. ++ (neon_vadd_unspec): Likewise. ++ (neon_vaddl): Likewise. ++ (neon_vaddw): Likewise. ++ (neon_vhadd): Likewise. ++ (neon_vqadd): Likewise. ++ (neon_vaddhn): Likewise. ++ (neon_vmul): Likewise. ++ (neon_vfms): Likewise. ++ (neon_vmlal): Likewise. ++ (neon_vmls): Likewise. ++ (neon_vmlsl): Likewise. ++ (neon_vqdmulh): Likewise. ++ (neon_vqdmlal): Likewise. ++ (neon_vqdmlsl): Likewise. ++ (neon_vmull): Likewise. ++ (neon_vqdmull): Likewise. ++ (neon_vsub_unspec): Likewise. ++ (neon_vsubl): Likewise. ++ (neon_vsubw): Likewise. ++ (neon_vqsub): Likewise. ++ (neon_vhsub): Likewise. ++ (neon_vsubhn): Likewise. ++ (neon_vceq): Likewise. ++ (neon_vcge): Likewise. ++ (neon_vcgeu): Likewise. ++ (neon_vcgt): Likewise. ++ (neon_vcgtu): Likewise. ++ (neon_vcle): Likewise. ++ (neon_vclt): Likewise. ++ (neon_vcage): Likewise. ++ (neon_vcagt): Likewise. ++ (neon_vtst): Likewise. ++ (neon_vabd): Likewise. ++ (neon_vabdl): Likewise. ++ (neon_vaba): Likewise. ++ (neon_vabal): Likewise. ++ (neon_vmax): Likewise. ++ (neon_vmin): Likewise. ++ (neon_vpaddl): Likewise. ++ (neon_vpadal): Likewise. ++ (neon_vpmax): Likewise. ++ (neon_vpmin): Likewise. ++ (neon_vrecps): Likewise. ++ (neon_vrsqrts): Likewise. ++ (neon_vqabs): Likewise. ++ (neon_vqneg): Likewise. ++ (neon_vcls): Likewise. ++ (clz2): Likewise. ++ (popcount2): Likewise. ++ (neon_vrecpe): Likewise. ++ (neon_vrsqrte): Likewise. ++ (neon_vget_lane_sext_internal): Likewise. ++ (neon_vget_lane_zext_internal): Likewise. ++ (neon_vdup_n): Likewise. ++ (neon_vdup_n): Likewise. ++ (neon_vdup_nv2di): Likewise. ++ (neon_vdup_lane_interal): Likewise. ++ (*neon_vswp): Likewise. ++ (neon_vcombine): Likewise. ++ (float2): Likewise. ++ (floatuns2): Likewise. ++ (fix_trunc2): Likewise. ++ (fixuns_trunc2 ++ (neon_vcvt): Likewise. ++ (neon_vcvt): Likewise. ++ (neon_vcvtv4sfv4hf): Likewise. ++ (neon_vcvtv4hfv4sf): Likewise. ++ (neon_vcvt_n): Likewise. ++ (neon_vcvt_n): Likewise. ++ (neon_vmovn): Likewise. ++ (neon_vqmovn): Likewise. ++ (neon_vqmovun): Likewise. ++ (neon_vmovl): Likewise. ++ (neon_vmul_lane): Likewise. ++ (neon_vmul_lane): Likewise. ++ (neon_vmull_lane): Likewise. ++ (neon_vqdmull_lane): Likewise. ++ (neon_vqdmulh_lane): Likewise. ++ (neon_vqdmulh_lane): Likewise. ++ (neon_vmla_lane): Likewise. ++ (neon_vmla_lane): Likewise. ++ (neon_vmlal_lane): Likewise. ++ (neon_vqdmlal_lane): Likewise. ++ (neon_vmls_lane): Likewise. ++ (neon_vmls_lane): Likewise. ++ (neon_vmlsl_lane): Likewise. ++ (neon_vqdmlsl_lane): Likewise. ++ (neon_vext): Likewise. ++ (neon_vrev64): Likewise. ++ (neon_vrev32): Likewise. ++ (neon_vrev16): Likewise. ++ (neon_vbsl_internal): Likewise. ++ (neon_vshl): Likewise. ++ (neon_vqshl): Likewise. ++ (neon_vshr_n): Likewise. ++ (neon_vshrn_n): Likewise. ++ (neon_vqshrn_n): Likewise. ++ (neon_vqshrun_n): Likewise. ++ (neon_vshl_n): Likewise. ++ (neon_vqshl_n): Likewise. ++ (neon_vqshlu_n): Likewise. ++ (neon_vshll_n): Likewise. ++ (neon_vsra_n): Likewise. ++ (neon_vsri_n): Likewise. ++ (neon_vsli_n): Likewise. ++ (neon_vtbl1v8qi): Likewise. ++ (neon_vtbl2v8qi): Likewise. ++ (neon_vtbl3v8qi): Likewise. ++ (neon_vtbl4v8qi): Likewise. ++ (neon_vtbl1v16qi): Likewise. ++ (neon_vtbl2v16qi): Likewise. ++ (neon_vcombinev16qi): Likewise. ++ (neon_vtbx1v8qi): Likewise. ++ (neon_vtbx2v8qi): Likewise. ++ (neon_vtbx3v8qi): Likewise. ++ (neon_vtbx4v8qi): Likewise. ++ (*neon_vtrn_insn): Likewise. ++ (*neon_vzip_insn): Likewise. ++ (*neon_vuzp_insn): Likewise. ++ (neon_vld1): Likewise. ++ (neon_vld1_lane): Likewise. ++ (neon_vld1_lane): Likewise. ++ (neon_vld1_dup): Likewise. ++ (neon_vld1_dup): Likewise. ++ (neon_vld1_dupv2di): Likewise. ++ (neon_vst1): Likewise. ++ (neon_vst1_lane): Likewise. ++ (neon_vst1_lane): Likewise. ++ (neon_vld2): Likewise. ++ (neon_vld2): Likewise. ++ (neon_vld2_lane): Likewise. ++ (neon_vld2_lane): Likewise. ++ (neon_vld2_dup): Likewise. ++ (neon_vst2): Likewise. ++ (neon_vst2): Likewise. ++ (neon_vst2_lane): Likewise. ++ (neon_vst2_lane): Likewise. ++ (neon_vld3): Likewise. ++ (neon_vld3qa): Likewise. ++ (neon_vld3qb): Likewise. ++ (neon_vld3_lane): Likewise. ++ (neon_vld3_lane): Likewise. ++ (neon_vld3_dup): Likewise. ++ (neon_vst3): Likewise. ++ (neon_vst3qa): Likewise. ++ (neon_vst3qb): Likewise. ++ (neon_vst3_lane): Likewise. ++ (neon_vst3_lane): Likewise. ++ (neon_vld4): Likewise. ++ (neon_vld4qa): Likewise. ++ (neon_vld4qb): Likewise. ++ (neon_vld4_lane): Likewise. ++ (neon_vld4_lane): Likewise. ++ (neon_vld4_dup): Likewise. ++ (neon_vst4): Likewise. ++ (neon_vst4qa): Likewise. ++ (neon_vst4qb): Likewise. ++ (neon_vst4_lane): Likewise. ++ (neon_vst4_lane): Likewise. ++ (neon_vec_unpack_lo_): Likewise. ++ (neon_vec_unpack_hi_): Likewise. ++ (neon_vec_mult_lo_): Likewise. ++ (neon_vec_mult_hi_): Likewise. ++ (neon_vec_shiftl_): Likewise. ++ (neon_unpack_): Likewise. ++ (neon_vec_mult_): Likewise. ++ (vec_pack_trunc_): Likewise. ++ (neon_vec_pack_trunc_): Likewise. ++ (neon_vabd_2): Likewise. ++ (neon_vabd_3): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203612 ++ 2013-10-15 James Greenhalgh ++ ++ * config/aarch64/aarch64.md (movtf_aarch64): Update type attribute. ++ (load_pair): Update type attribute. ++ (store_pair): Update type attribute. ++ * config/aarch64/iterators.md (q): New. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203611 ++ 2013-10-15 James Greenhalgh ++ ++ * config/arm/types.md: Add new types for Neon insns. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r203241 ++ 2013-10-07 Renlin Li ++ ++ * config/arm/arm-cores.def (cortex-a53): Use cortex tuning. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202560 ++ 2013-09-13 Kyrylo Tkachov ++ ++ * config/arm/arm.md (arm_cmpsi_insn): Split rI alternative. ++ Set type attribute correctly. Set predicable_short_it attribute. ++ (cmpsi_shiftsi): Remove %? from output template. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202448 ++ 2013-09-10 James Greenhalgh ++ ++ * config/aarch64/aarch64.md (generic_sched): New. ++ * config/aarch64/aarch64-generic.md (load): Make conditional ++ on generic_sched attribute. ++ (nonload): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202334 ++ 2013-09-06 James Greenhalgh ++ ++ * config/aarch64/aarch64.md ++ (*movtf_aarch64): Use neon_dm_2 as type where v8type ++ is fpsimd_2. ++ (load_pair): Likewise. ++ (store_pair): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202333 ++ 2013-09-06 James Greenhalgh ++ ++ * config/arm/types.md (type): Add "mrs" type. ++ * config/aarch64/aarch64.md ++ (aarch64_load_tp_hard): Make type "mrs". ++ * config/arm/arm.md ++ (load_tp_hard): Make type "mrs". ++ * config/arm/cortex-a15.md: Update with new attributes. ++ * config/arm/cortex-a5.md: Update with new attributes. ++ * config/arm/cortex-a53.md: Update with new attributes. ++ * config/arm/cortex-a7.md: Update with new attributes. ++ * config/arm/cortex-a8.md: Update with new attributes. ++ * config/arm/cortex-a9.md: Update with new attributes. ++ * config/arm/cortex-m4.md: Update with new attributes. ++ * config/arm/cortex-r4.md: Update with new attributes. ++ * config/arm/fa526.md: Update with new attributes. ++ * config/arm/fa606te.md: Update with new attributes. ++ * config/arm/fa626te.md: Update with new attributes. ++ * config/arm/fa726te.md: Update with new attributes. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202332 ++ 2013-09-06 James Greenhalgh ++ ++ * config/aarch64/aarch64.md ++ (*movti_aarch64): Use "multiple" for type where v8type is "move2". ++ (*movtf_aarch64): Likewise. ++ * config/arm/arm.md ++ (thumb1_movdi_insn): Use "multiple" for type where more than one ++ instruction is used for a move. ++ (*arm32_movhf): Likewise. ++ (*thumb_movdf_insn): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202331 ++ 2013-09-06 James Greenhalgh ++ ++ * config/arm/types.md (type): Rename fcpys to fmov. ++ * config/arm/vfp.md ++ (*arm_movsi_vfp): Rename type fcpys as fmov. ++ (*thumb2_movsi_vfp): Likewise ++ (*movhf_vfp_neon): Likewise ++ (*movhf_vfp): Likewise ++ (*movsf_vfp): Likewise ++ (*thumb2_movsf_vfp): Likewise ++ (*movsfcc_vfp): Likewise ++ (*thumb2_movsfcc_vfp): Likewise ++ * config/aarch64/aarch64-simd.md ++ (move_lo_quad_): Replace type mov_reg with fmovs. ++ * config/aarch64/aarch64.md ++ (*movsi_aarch64): Replace type mov_reg with fmovs. ++ (*movdi_aarch64): Likewise ++ (*movsf_aarch64): Likewise ++ (*movdf_aarch64): Likewise ++ * config/arm/arm.c ++ (cortexa7_older_only): Rename TYPE_FCPYS to TYPE_FMOV. ++ * config/arm/iwmmxt.md ++ (*iwmmxt_movsi_insn): Rename type fcpys as fmov. ++ * config/arm/arm1020e.md: Update with new attributes. ++ * config/arm/cortex-a15-neon.md: Update with new attributes. ++ * config/arm/cortex-a5.md: Update with new attributes. ++ * config/arm/cortex-a53.md: Update with new attributes. ++ * config/arm/cortex-a7.md: Update with new attributes. ++ * config/arm/cortex-a8-neon.md: Update with new attributes. ++ * config/arm/cortex-a9.md: Update with new attributes. ++ * config/arm/cortex-m4-fpu.md: Update with new attributes. ++ * config/arm/cortex-r4f.md: Update with new attributes. ++ * config/arm/marvell-pj4.md: Update with new attributes. ++ * config/arm/vfp11.md: Update with new attributes. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202330 ++ 2013-09-06 James Greenhalgh ++ ++ * config/aarch64/aarch64.md ++ (*madd): Fix type attribute. ++ (*maddsi_uxtw): Likewise. ++ (*msub): Likewise. ++ (*msubsi_uxtw): Likewise. ++ (maddsidi4): Likewise. ++ (msubsidi4): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202329 ++ 2013-09-06 James Greenhalgh ++ ++ * config/arm/types.md: Split fdiv as fsqrt, fdiv. ++ * config/arm/arm.md (core_cycles): Remove fdiv. ++ * config/arm/vfp.md: ++ (*sqrtsf2_vfp): Update for attribute changes. ++ (*sqrtdf2_vfp): Likewise. ++ * config/aarch64/aarch64.md: ++ (sqrt2): Update for attribute changes. ++ * config/arm/arm1020e.md: Update with new attributes. ++ * config/arm/cortex-a15-neon.md: Update with new attributes. ++ * config/arm/cortex-a5.md: Update with new attributes. ++ * config/arm/cortex-a53.md: Update with new attributes. ++ * config/arm/cortex-a7.md: Update with new attributes. ++ * config/arm/cortex-a8-neon.md: Update with new attributes. ++ * config/arm/cortex-a9.md: Update with new attributes. ++ * config/arm/cortex-m4-fpu.md: Update with new attributes. ++ * config/arm/cortex-r4f.md: Update with new attributes. ++ * config/arm/marvell-pj4.md: Update with new attributes. ++ * config/arm/vfp11.md: Update with new attributes. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202328 ++ 2013-09-06 James Greenhalgh ++ ++ * config/arm/types.md ++ (type): Split f_cvt as f_cvt, f_cvtf2i, f_cvti2f. ++ * config/aarch64/aarch64.md ++ (l2): Update with ++ new attributes. ++ (fix_trunc2): Likewise. ++ (fixuns_trunc2): Likewise. ++ (float2): Likewise. ++ * config/arm/vfp.md ++ (*truncsisf2_vfp): Update with new attributes. ++ (*truncsidf2_vfp): Likewise. ++ (fixuns_truncsfsi2): Likewise. ++ (fixuns_truncdfsi2): Likewise. ++ (*floatsisf2_vfp): Likewise. ++ (*floatsidf2_vfp): Likewise. ++ (floatunssisf2): Likewise. ++ (floatunssidf2): Likewise. ++ (*combine_vcvt_f32_): Likewise. ++ (*combine_vcvt_f64_): Likewise. ++ * config/arm/arm1020e.md: Update with new attributes. ++ * config/arm/cortex-a15-neon.md: Update with new attributes. ++ * config/arm/cortex-a5.md: Update with new attributes. ++ * config/arm/cortex-a53.md: Update with new attributes. ++ * config/arm/cortex-a7.md: Update with new attributes. ++ * config/arm/cortex-a8-neon.md: Update with new attributes. ++ * config/arm/cortex-a9.md: Update with new attributes. ++ * config/arm/cortex-m4-fpu.md: Update with new attributes. ++ * config/arm/cortex-r4f.md: Update with new attributes. ++ * config/arm/marvell-pj4.md: Update with new attributes. ++ * config/arm/vfp11.md: Update with new attributes. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202323 ++ 2013-09-06 James Greenhalgh ++ ++ * config/arm/types.md: Add "no_insn", "multiple" and "untyped" ++ types. ++ * config/arm/arm-fixed.md: Add type attribute to all insn ++ patterns. ++ (add3): Add type attribute. ++ (add3): Likewise. ++ (usadd3): Likewise. ++ (ssadd3): Likewise. ++ (sub3): Likewise. ++ (sub3): Likewise. ++ (ussub3): Likewise. ++ (sssub3): Likewise. ++ (ssmulsa3): Likewise. ++ (usmulusa3): Likewise. ++ (arm_usatsihi): Likewise. ++ * config/arm/vfp.md ++ (*movdi_vfp): Add types for all instructions. ++ (*movdi_vfp_cortexa8): Likewise. ++ (*movhf_vfp_neon): Likewise. ++ (*movhf_vfp): Likewise. ++ (*movdf_vfp): Likewise. ++ (*thumb2_movdf_vfp): Likewise. ++ (*thumb2_movdfcc_vfp): Likewise. ++ * config/arm/arm.md: Add type attribute to all insn patterns. ++ (*thumb1_adddi3): Add type attribute. ++ (*arm_adddi3): Likewise. ++ (*adddi_sesidi_di): Likewise. ++ (*adddi_zesidi_di): Likewise. ++ (*thumb1_addsi3): Likewise. ++ (addsi3_compare0): Likewise. ++ (*addsi3_compare0_scratch): Likewise. ++ (*compare_negsi_si): Likewise. ++ (cmpsi2_addneg): Likewise. ++ (*addsi3_carryin_): Likewise. ++ (*addsi3_carryin_alt2_): Likewise. ++ (*addsi3_carryin_clobercc_): Likewise. ++ (*subsi3_carryin): Likewise. ++ (*subsi3_carryin_const): Likewise. ++ (*subsi3_carryin_compare): Likewise. ++ (*subsi3_carryin_compare_const): Likewise. ++ (*arm_subdi3): Likewise. ++ (*thumb_subdi3): Likewise. ++ (*subdi_di_zesidi): Likewise. ++ (*subdi_di_sesidi): Likewise. ++ (*subdi_zesidi_di): Likewise. ++ (*subdi_sesidi_di): Likewise. ++ (*subdi_zesidi_ze): Likewise. ++ (thumb1_subsi3_insn): Likewise. ++ (*arm_subsi3_insn): Likewise. ++ (*anddi3_insn): Likewise. ++ (*anddi_zesidi_di): Likewise. ++ (*anddi_sesdi_di): Likewise. ++ (*ne_zeroextracts): Likewise. ++ (*ne_zeroextracts): Likewise. ++ (*ite_ne_zeroextr): Likewise. ++ (*ite_ne_zeroextr): Likewise. ++ (*anddi_notdi_di): Likewise. ++ (*anddi_notzesidi): Likewise. ++ (*anddi_notsesidi): Likewise. ++ (andsi_notsi_si): Likewise. ++ (thumb1_bicsi3): Likewise. ++ (*iordi3_insn): Likewise. ++ (*iordi_zesidi_di): Likewise. ++ (*iordi_sesidi_di): Likewise. ++ (*thumb1_iorsi3_insn): Likewise. ++ (*xordi3_insn): Likewise. ++ (*xordi_zesidi_di): Likewise. ++ (*xordi_sesidi_di): Likewise. ++ (*arm_xorsi3): Likewise. ++ (*andsi_iorsi3_no): Likewise. ++ (*smax_0): Likewise. ++ (*smax_m1): Likewise. ++ (*arm_smax_insn): Likewise. ++ (*smin_0): Likewise. ++ (*arm_smin_insn): Likewise. ++ (*arm_umaxsi3): Likewise. ++ (*arm_uminsi3): Likewise. ++ (*minmax_arithsi): Likewise. ++ (*minmax_arithsi_): Likewise. ++ (*satsi_): Likewise. ++ (arm_ashldi3_1bit): Likewise. ++ (arm_ashrdi3_1bit): Likewise. ++ (arm_lshrdi3_1bit): Likewise. ++ (*arm_negdi2): Likewise. ++ (*thumb1_negdi2): Likewise. ++ (*arm_negsi2): Likewise. ++ (*thumb1_negsi2): Likewise. ++ (*negdi_extendsid): Likewise. ++ (*negdi_zero_extend): Likewise. ++ (*arm_abssi2): Likewise. ++ (*thumb1_abssi2): Likewise. ++ (*arm_neg_abssi2): Likewise. ++ (*thumb1_neg_abss): Likewise. ++ (one_cmpldi2): Likewise. ++ (extenddi2): Likewise. ++ (*compareqi_eq0): Likewise. ++ (*arm_extendhisi2addsi): Likewise. ++ (*arm_movdi): Likewise. ++ (*thumb1_movdi_insn): Likewise. ++ (*arm_movt): Likewise. ++ (*thumb1_movsi_insn): Likewise. ++ (pic_add_dot_plus_four): Likewise. ++ (pic_add_dot_plus_eight): Likewise. ++ (tls_load_dot_plus_eight): Likewise. ++ (*thumb1_movhi_insn): Likewise. ++ (*thumb1_movsf_insn): Likewise. ++ (*movdf_soft_insn): Likewise. ++ (*thumb_movdf_insn): Likewise. ++ (cbranchsi4_insn): Likewise. ++ (cbranchsi4_scratch): Likewise. ++ (*negated_cbranchsi4): Likewise. ++ (*tbit_cbranch): Likewise. ++ (*tlobits_cbranch): Likewise. ++ (*tstsi3_cbranch): Likewise. ++ (*cbranchne_decr1): Likewise. ++ (*addsi3_cbranch): Likewise. ++ (*addsi3_cbranch_scratch): Likewise. ++ (*arm_cmpdi_insn): Likewise. ++ (*arm_cmpdi_unsig): Likewise. ++ (*arm_cmpdi_zero): Likewise. ++ (*thumb_cmpdi_zero): Likewise. ++ (*deleted_compare): Likewise. ++ (*mov_scc): Likewise. ++ (*mov_negscc): Likewise. ++ (*mov_notscc): Likewise. ++ (*cstoresi_eq0_thumb1_insn): Likewise. ++ (cstoresi_nltu_thumb1): Likewise. ++ (cstoresi_ltu_thu): Likewise. ++ (thumb1_addsi3_addgeu): Likewise. ++ (*arm_jump): Likewise. ++ (*thumb_jump): Likewise. ++ (*check_arch2): Likewise. ++ (arm_casesi_internal): Likewise. ++ (thumb1_casesi_dispatch): Likewise. ++ (*arm_indirect_jump): Likewise. ++ (*thumb1_indirect_jump): Likewise. ++ (nop): Likewise. ++ (*and_scc): Likewise. ++ (*ior_scc): Likewise. ++ (*compare_scc): Likewise. ++ (*cond_move): Likewise. ++ (*cond_arith): Likewise. ++ (*cond_sub): Likewise. ++ (*cmp_ite0): Likewise. ++ (*cmp_ite1): Likewise. ++ (*cmp_and): Likewise. ++ (*cmp_ior): Likewise. ++ (*ior_scc_scc): Likewise. ++ (*ior_scc_scc_cmp): Likewise. ++ (*and_scc_scc): Likewise. ++ (*and_scc_scc_cmp): Likewise. ++ (*and_scc_scc_nod): Likewise. ++ (*negscc): Likewise. ++ (movcond_addsi): Likewise. ++ (movcond): Likewise. ++ (*ifcompare_plus_move): Likewise. ++ (*if_plus_move): Likewise. ++ (*ifcompare_move_plus): Likewise. ++ (*if_move_plus): Likewise. ++ (*ifcompare_arith_arith): Likewise. ++ (*if_arith_arith): Likewise. ++ (*ifcompare_arith_move): Likewise. ++ (*if_arith_move): Likewise. ++ (*ifcompare_move_arith): Likewise. ++ (*if_move_arith): Likewise. ++ (*ifcompare_move_not): Likewise. ++ (*if_move_not): Likewise. ++ (*ifcompare_not_move): Likewise. ++ (*if_not_move): Likewise. ++ (*ifcompare_shift_move): Likewise. ++ (*if_shift_move): Likewise. ++ (*ifcompare_move_shift): Likewise. ++ (*if_move_shift): Likewise. ++ (*ifcompare_shift_shift): Likewise. ++ (*ifcompare_not_arith): Likewise. ++ (*ifcompare_arith_not): Likewise. ++ (*if_arith_not): Likewise. ++ (*ifcompare_neg_move): Likewise. ++ (*if_neg_move): Likewise. ++ (*ifcompare_move_neg): Likewise. ++ (*if_move_neg): Likewise. ++ (prologue_thumb1_interwork): Likewise. ++ (*cond_move_not): Likewise. ++ (*sign_extract_onebit): Likewise. ++ (*not_signextract_onebit): Likewise. ++ (stack_tie): Likewise. ++ (align_4): Likewise. ++ (align_8): Likewise. ++ (consttable_end): Likewise. ++ (consttable_1): Likewise. ++ (consttable_2): Likewise. ++ (consttable_4): Likewise. ++ (consttable_8): Likewise. ++ (consttable_16): Likewise. ++ (*thumb1_tablejump): Likewise. ++ (prefetch): Likewise. ++ (force_register_use): Likewise. ++ (thumb_eh_return): Likewise. ++ (load_tp_hard): Likewise. ++ (load_tp_soft): Likewise. ++ (tlscall): Likewise. ++ (*arm_movtas_ze): Likewise. ++ (*arm_rev): Likewise. ++ (*arm_revsh): Likewise. ++ (*arm_rev16): Likewise. ++ * config/arm/thumb2.md ++ (*thumb2_smaxsi3): Likewise. ++ (*thumb2_sminsi3): Likewise. ++ (*thumb32_umaxsi3): Likewise. ++ (*thumb2_uminsi3): Likewise. ++ (*thumb2_negdi2): Likewise. ++ (*thumb2_abssi2): Likewise. ++ (*thumb2_neg_abss): Likewise. ++ (*thumb2_movsi_insn): Likewise. ++ (tls_load_dot_plus_four): Likewise. ++ (*thumb2_movhi_insn): Likewise. ++ (*thumb2_mov_scc): Likewise. ++ (*thumb2_mov_negs): Likewise. ++ (*thumb2_mov_negs): Likewise. ++ (*thumb2_mov_nots): Likewise. ++ (*thumb2_mov_nots): Likewise. ++ (*thumb2_movsicc_): Likewise. ++ (*thumb2_movsfcc_soft_insn): Likewise. ++ (*thumb2_indirect_jump): Likewise. ++ (*thumb2_and_scc): Likewise. ++ (*thumb2_ior_scc): Likewise. ++ (*thumb2_ior_scc_strict_it): Likewise. ++ (*thumb2_cond_move): Likewise. ++ (*thumb2_cond_arith): Likewise. ++ (*thumb2_cond_ari): Likewise. ++ (*thumb2_cond_sub): Likewise. ++ (*thumb2_negscc): Likewise. ++ (*thumb2_movcond): Likewise. ++ (thumb2_casesi_internal): Likewise. ++ (thumb2_casesi_internal_pic): Likewise. ++ (*thumb2_alusi3_short): Likewise. ++ (*thumb2_mov_shortim): Likewise. ++ (*thumb2_addsi_short): Likewise. ++ (*thumb2_subsi_short): Likewise. ++ (thumb2_addsi3_compare0): Likewise. ++ (*thumb2_cbz): Likewise. ++ (*thumb2_cbnz): Likewise. ++ (*thumb2_one_cmplsi2_short): Likewise. ++ (*thumb2_negsi2_short): Likewise. ++ (*orsi_notsi_si): Likewise. ++ * config/arm/arm1020e.md: Update with new attributes. ++ * config/arm/arm1026ejs.md: Update with new attributes. ++ * config/arm/arm1136jfs.md: Update with new attributes. ++ * config/arm/arm926ejs.md: Update with new attributes. ++ * config/arm/cortex-a15.md: Update with new attributes. ++ * config/arm/cortex-a5.md: Update with new attributes. ++ * config/arm/cortex-a53.md: Update with new attributes. ++ * config/arm/cortex-a7.md: Update with new attributes. ++ * config/arm/cortex-a8.md: Update with new attributes. ++ * config/arm/cortex-a9.md: Update with new attributes. ++ * config/arm/cortex-m4.md: Update with new attributes. ++ * config/arm/cortex-r4.md: Update with new attributes. ++ * config/arm/fa526.md: Update with new attributes. ++ * config/arm/fa606te.md: Update with new attributes. ++ * config/arm/fa626te.md: Update with new attributes. ++ * config/arm/fa726te.md: Update with new attributes. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202292 ++ 2013-09-05 James Greenhalgh ++ ++ * config/aarch64/aarch64.md ++ (type): Remove frecpe, frecps, frecpx. ++ (aarch64_frecp): Move to aarch64-simd.md, ++ fix to be a TARGET_SIMD instruction. ++ (aarch64_frecps): Remove. ++ * config/aarch64/aarch64-simd.md ++ (aarch64_frecp): New, moved from aarch64.md ++ (aarch64_frecps): Handle all float/vector of float modes. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202291 ++ 2013-09-05 James Greenhalgh ++ Sofiane Naci ++ ++ * config/arm/types.md (define_attr "type"): ++ Expand "arlo_imm" ++ into "adr", "alu_imm", "alus_imm", "logic_imm", "logics_imm". ++ Expand "arlo_reg" ++ into "adc_reg", "adc_imm", "adcs_reg", "adcs_imm", "alu_ext", ++ "alu_reg", "alus_ext", "alus_reg", "bfm", "csel", "logic_reg", ++ "logics_reg", "rev". ++ Expand "arlo_shift" ++ into "alu_shift_imm", "alus_shift_imm", "logic_shift_imm", ++ "logics_shift_imm". ++ Expand "arlo_shift_reg" ++ into "alu_shift_reg", "alus_shift_reg", "logic_shift_reg", ++ "logics_shift_reg". ++ Expand "clz" into "clz, "rbit". ++ Rename "shift" to "shift_imm". ++ * config/arm/arm.md (define_attr "core_cycles"): Update for attribute ++ changes. ++ Update for attribute changes all occurrences of arlo_* and ++ shift* types. ++ * config/arm/arm-fixed.md: Update for attribute changes ++ all occurrences of arlo_* types. ++ * config/arm/thumb2.md: Update for attribute changes all occurrences ++ of arlo_* types. ++ * config/arm/arm.c (xscale_sched_adjust_cost): (rtx insn, rtx ++ (cortexa7_older_only): Likewise. ++ (cortexa7_younger): Likewise. ++ * config/arm/arm1020e.md (1020alu_op): Update for attribute changes. ++ (1020alu_shift_op): Likewise. ++ (1020alu_shift_reg_op): Likewise. ++ * config/arm/arm1026ejs.md (alu_op): Update for attribute changes. ++ (alu_shift_op): Likewise. ++ (alu_shift_reg_op): Likewise. ++ * config/arm/arm1136jfs.md (11_alu_op): Update for ++ attribute changes. ++ (11_alu_shift_op): Likewise. ++ (11_alu_shift_reg_op): Likewise. ++ * config/arm/arm926ejs.md (9_alu_op): Update for attribute changes. ++ (9_alu_shift_reg_op): Likewise. ++ * config/arm/cortex-a15.md (cortex_a15_alu): Update for ++ attribute changes. ++ (cortex_a15_alu_shift): Likewise. ++ (cortex_a15_alu_shift_reg): Likewise. ++ * config/arm/cortex-a5.md (cortex_a5_alu): Update for ++ attribute changes. ++ (cortex_a5_alu_shift): Likewise. ++ * config/arm/cortex-a53.md ++ (cortex_a53_alu): Update for attribute changes. ++ (cortex_a53_alu_shift): Likewise. ++ * config/arm/cortex-a7.md ++ (cortex_a7_alu_imm): Update for attribute changes. ++ (cortex_a7_alu_reg): Likewise. ++ (cortex_a7_alu_shift): Likewise. ++ * config/arm/cortex-a8.md ++ (cortex_a8_alu): Update for attribute changes. ++ (cortex_a8_alu_shift): Likewise. ++ (cortex_a8_alu_shift_reg): Likewise. ++ * config/arm/cortex-a9.md ++ (cortex_a9_dp): Update for attribute changes. ++ (cortex_a9_dp_shift): Likewise. ++ * config/arm/cortex-m4.md ++ (cortex_m4_alu): Update for attribute changes. ++ * config/arm/cortex-r4.md ++ (cortex_r4_alu): Update for attribute changes. ++ (cortex_r4_mov): Likewise. ++ (cortex_r4_alu_shift_reg): Likewise. ++ * config/arm/fa526.md ++ (526_alu_op): Update for attribute changes. ++ (526_alu_shift_op): Likewise. ++ * config/arm/fa606te.md ++ (606te_alu_op): Update for attribute changes. ++ * config/arm/fa626te.md ++ (626te_alu_op): Update for attribute changes. ++ (626te_alu_shift_op): Likewise. ++ * config/arm/fa726te.md ++ (726te_alu_op): Update for attribute changes. ++ (726te_alu_shift_op): Likewise. ++ (726te_alu_shift_reg_op): Likewise. ++ * config/arm/fmp626.md (mp626_alu_op): Update for attribute changes. ++ (mp626_alu_shift_op): Likewise. ++ * config/arm/marvell-pj4.md (pj4_alu): Update for attribute changes. ++ (pj4_alu_conds): Likewise. ++ (pj4_shift): Likewise. ++ (pj4_shift_conds): Likewise. ++ (pj4_alu_shift): Likewise. ++ (pj4_alu_shift_conds): Likewise. ++ * config/aarch64/aarch64.md: Update for attribute change ++ all occurrences of arlo_* and shift* types. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202272 ++ 2013-08-02 James Greenhalgh ++ Sofiane Naci ++ ++ * config/aarch64/aarch64.md ++ (*movti_aarch64): Rename r_2_f and f_2_r. ++ (*movsf_aarch64): Likewise. ++ (*movdf_aarch64): Likewise. ++ (*movtf_aarch64): Likewise. ++ (aarch64_movdi_low): Likewise. ++ (aarch64_movdi_high): Likewise. ++ (aarch64_movhigh_di): Likewise. ++ (aarch64_movlow_di): Likewise. ++ (aarch64_movtilow_tilow): Likewise. ++ * config/arm/arm.md (attribute "neon_type"): Delete. Move attribute ++ values to config/arm/types.md ++ (attribute "conds"): Update for attribute change. ++ (anddi3_insn): Likewise. ++ (iordi3_insn): Likewise. ++ (xordi3_insn): Likewise. ++ (one_cmpldi2): Likewise. ++ * config/arm/types.md (type): Add Neon types. ++ * config/arm/neon.md (neon_mov): Remove "neon_type" attribute, ++ use "type" attribute. ++ (movmisalign_neon_store): Likewise. ++ (movmisalign_neon_load): Likewise. ++ (vec_set_internal): Likewise. ++ (vec_setv2di_internal): Likewise. ++ (vec_extract): Likewise. ++ (vec_extractv2di): Likewise. ++ (add3_neon): Likewise. ++ (adddi3_neon): Likewise. ++ (sub3_neon): Likewise. ++ (subdi3_neon): Likewise. ++ (mul3_neon): Likewise. ++ (mul3add_neon): Likewise. ++ (mul3negadd_neon): Likewise. ++ (fma4)): Likewise. ++ (fma4_intrinsic): Likewise. ++ (fmsub4)): Likewise. ++ (fmsub4_intrinsic): Likewise. ++ (neon_vrint): Likewise. ++ (ior3): Likewise. ++ (and3): Likewise. ++ (anddi3_neon): Likewise. ++ (orn3_neon): Likewise. ++ (orndi3_neon): Likewise. ++ (bic3_neon): Likewise. ++ (bicdi3_neon): Likewise. ++ (xor3): Likewise. ++ (one_cmpl2): Likewise. ++ (abs2): Likewise. ++ (neg2): Likewise. ++ (umin3_neon): Likewise. ++ (umax3_neon): Likewise. ++ (smin3_neon): Likewise. ++ (smax3_neon): Likewise. ++ (vashl3): Likewise. ++ (vashr3_imm): Likewise. ++ (vlshr3_imm): Likewise. ++ (ashl3_signed): Likewise. ++ (ashl3_unsigned): Likewise. ++ (neon_load_count): Likewise. ++ (ashldi3_neon_noclobber): Likewise. ++ (signed_shift_di3_neon): Likewise. ++ (unsigned_shift_di3_neon): Likewise. ++ (ashrdi3_neon_imm_noclobber): Likewise. ++ (lshrdi3_neon_imm_noclobber): Likewise. ++ (widen_ssum3): Likewise. ++ (widen_usum3): Likewise. ++ (quad_halves_v4si): Likewise. ++ (quad_halves_v4sf): Likewise. ++ (quad_halves_v8hi): Likewise. ++ (quad_halves_v16qi): Likewise. ++ (reduc_splus_v2di): Likewise. ++ (neon_vpadd_internal): Likewise. ++ (neon_vpsmin): Likewise. ++ (neon_vpsmax): Likewise. ++ (neon_vpumin): Likewise. ++ (neon_vpumax): Likewise. ++ (ss_add_neon): Likewise. ++ (us_add_neon): Likewise. ++ (ss_sub_neon): Likewise. ++ (us_sub_neon): Likewise. ++ (neon_vadd_unspec): Likewise. ++ (neon_vaddl): Likewise. ++ (neon_vaddw): Likewise. ++ (neon_vhadd): Likewise. ++ (neon_vqadd): Likewise. ++ (neon_vaddhn): Likewise. ++ (neon_vmul): Likewise. ++ (neon_vmla): Likewise. ++ (neon_vmlal): Likewise. ++ (neon_vmls): Likewise. ++ (neon_vmlsl): Likewise. ++ (neon_vqdmulh): Likewise. ++ (neon_vqdmlal): Likewise. ++ (neon_vqdmlsl): Likewise. ++ (neon_vmull): Likewise. ++ (neon_vqdmull): Likewise. ++ (neon_vsub_unspec): Likewise. ++ (neon_vsubl): Likewise. ++ (neon_vsubw): Likewise. ++ (neon_vqsub): Likewise. ++ (neon_vhsub): Likewise. ++ (neon_vsubhn): Likewise. ++ (neon_vceq): Likewise. ++ (neon_vcge): Likewise. ++ (neon_vcgeu): Likewise. ++ (neon_vcgt): Likewise. ++ (neon_vcgtu): Likewise. ++ (neon_vcle): Likewise. ++ (neon_vclt): Likewise. ++ (neon_vcage): Likewise. ++ (neon_vcagt): Likewise. ++ (neon_vtst): Likewise. ++ (neon_vabd): Likewise. ++ (neon_vabdl): Likewise. ++ (neon_vaba): Likewise. ++ (neon_vabal): Likewise. ++ (neon_vmax): Likewise. ++ (neon_vmin): Likewise. ++ (neon_vpaddl): Likewise. ++ (neon_vpadal): Likewise. ++ (neon_vpmax): Likewise. ++ (neon_vpmin): Likewise. ++ (neon_vrecps): Likewise. ++ (neon_vrsqrts): Likewise. ++ (neon_vqabs): Likewise. ++ (neon_vqneg): Likewise. ++ (neon_vcls): Likewise. ++ (clz2): Likewise. ++ (popcount2): Likewise. ++ (neon_vrecpe): Likewise. ++ (neon_vrsqrte): Likewise. ++ (neon_vget_lane_sext_internal): Likewise. ++ (neon_vget_lane_zext_internal): Likewise. ++ (neon_vdup_n): Likewise. ++ (neon_vdup_nv2di): Likewise. ++ (neon_vdpu_lane_internal): Likewise. ++ (neon_vswp): Likewise. ++ (float2): Likewise. ++ (floatuns2): Likewise. ++ (fix_trunc)2): Likewise ++ (fixuns_trunc): Likewise. ++ (neon_vcvtv4sfv4hf): Likewise. ++ (neon_vcvtv4hfv4sf): Likewise. ++ (neon_vcvt_n): Likewise. ++ (neon_vmovn): Likewise. ++ (neon_vqmovn): Likewise. ++ (neon_vqmovun): Likewise. ++ (neon_vmovl): Likewise. ++ (neon_vmul_lane): Likewise. ++ (neon_vmull_lane): Likewise. ++ (neon_vqdmull_lane): Likewise. ++ (neon_vqdmulh_lane): Likewise. ++ (neon_vmla_lane): Likewise. ++ (neon_vmlal_lane): Likewise. ++ (neon_vqdmlal_lane): Likewise. ++ (neon_vmls_lane): Likewise. ++ (neon_vmlsl_lane): Likewise. ++ (neon_vqdmlsl_lane): Likewise. ++ (neon_vext): Likewise. ++ (neon_vrev64): Likewise. ++ (neon_vrev32): Likewise. ++ (neon_vrev16): Likewise. ++ (neon_vbsl_internal): Likewise. ++ (neon_vshl): Likewise. ++ (neon_vqshl): Likewise. ++ (neon_vshr_n): Likewise. ++ (neon_vshrn_n): Likewise. ++ (neon_vqshrn_n): Likewise. ++ (neon_vqshrun_n): Likewise. ++ (neon_vshl_n): Likewise. ++ (neon_vqshl_n): Likewise. ++ (neon_vqshlu_n): Likewise. ++ (neon_vshll_n): Likewise. ++ (neon_vsra_n): Likewise. ++ (neon_vsri_n): Likewise. ++ (neon_vsli_n): Likewise. ++ (neon_vtbl1v8qi): Likewise. ++ (neon_vtbl2v8qi): Likewise. ++ (neon_vtbl3v8qi): Likewise. ++ (neon_vtbl4v8qi): Likewise. ++ (neon_vtbx1v8qi): Likewise. ++ (neon_vtbx2v8qi): Likewise. ++ (neon_vtbx3v8qi): Likewise. ++ (neon_vtbx4v8qi): Likewise. ++ (neon_vtrn_internal): Likewise. ++ (neon_vzip_internal): Likewise. ++ (neon_vuzp_internal): Likewise. ++ (neon_vld1): Likewise. ++ (neon_vld1_lane): Likewise. ++ (neon_vld1_dup): Likewise. ++ (neon_vld1_dupv2di): Likewise. ++ (neon_vst1): Likewise. ++ (neon_vst1_lane): Likewise. ++ (neon_vld2): Likewise. ++ (neon_vld2_lane): Likewise. ++ (neon_vld2_dup): Likewise. ++ (neon_vst2): Likewise. ++ (neon_vst2_lane): Likewise. ++ (neon_vld3): Likewise. ++ (neon_vld3qa): Likewise. ++ (neon_vld3qb): Likewise. ++ (neon_vld3_lane): Likewise. ++ (neon_vld3_dup): Likewise. ++ (neon_vst3): Likewise. ++ (neon_vst3qa): Likewise. ++ (neon_vst3qb): Likewise. ++ (neon_vst3_lane): Likewise. ++ (neon_vld4): Likewise. ++ (neon_vld4qa): Likewise. ++ (neon_vld4qb): Likewise. ++ (neon_vld4_lane): Likewise. ++ (neon_vld4_dup): Likewise. ++ (neon_vst4): Likewise. ++ (neon_vst4qa): Likewise. ++ (neon_vst4qb): Likewise. ++ (neon_vst4_lane): Likewise. ++ (neon_vec_unpack_lo_): Likewise. ++ (neon_vec_unpack_hi_): Likewise. ++ (neon_vec_mult_lo_): Likewise. ++ (neon_vec_mult_hi_): Likewise. ++ (neon_vec_shiftl_): Likewise. ++ (neon_unpack_): Likewise. ++ (neon_vec_mult_): Likewise. ++ (vec_pack_trunc_): Likewise. ++ (neon_vec_pack_trunk_): Likewise. ++ (neon_vabd_2): Likewise. ++ (neon_vabd_3): Likewise. ++ * config/arm/vfp.md (arm_movsi_vfp): Update for attribute changes. ++ (thumb2_movsi_vfp): Likewise. ++ (movdi_vfp): Likewise. ++ (movdi_vfp_cortexa8): Likewise. ++ (movhf_vfp_neon): Likewise. ++ (movhf_vfp): Likewiwse. ++ (movsf_vfp): Likewiwse. ++ (thumb2_movsf_vfp): Likewiwse. ++ (movdf_vfp): Likewise. ++ (thumb2_movdf_vfp): Likewise. ++ (movsfcc_vfp): Likewise. ++ (thumb2_movsfcc_vfp): Likewise. ++ (movdfcc_vfp): Likewise. ++ (thumb2_movdfcc_vfp): Likewise. ++ * config/arm/arm.c (cortexa7_older_only): Update for attribute change. ++ * config/arm/arm1020e.md (v10_c2v): Update for attribute change. ++ (v10_v2c): Likewise. ++ * config/arm/cortex-a15-neon.md (cortex_a15_neon_int_1): Update for ++ attribute change. ++ (cortex_a15_neon_int_2): Likewise. ++ (cortex_a15_neon_int_3): Likewise. ++ (cortex_a15_neon_int_4): Likewise. ++ (cortex_a15_neon_int_5): Likewise. ++ (cortex_a15_neon_vqneg_vqabs): Likewise. ++ (cortex_a15_neon_vmov): Likewise. ++ (cortex_a15_neon_vaba): Likewise. ++ (cortex_a15_neon_vaba_qqq): Likewise. ++ (cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a15_neon_mul_qqq_8_16_32_ddd_32): Likewise. ++ (cortex_a15_neon_mul_qdd_64_32_long_qqd_16_ddd_32_\ ++ scalar_64_32_long_scalar): Likewise. ++ (cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a15_neon_mla_qqq_8_16): Likewise. ++ (cortex_a15_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_\ ++ lotype_qdd_64_32_long): Likewise. ++ (cortex_a15_neon_mla_qqq_32_qqd_32_scalar): Likewise. ++ (cortex_a15_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. ++ (cortex_a15_neon_mul_qqd_32_scalar): Likewise. ++ (cortex_a15_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. ++ (cortex_a15_neon_shift_1): Likewise. ++ (cortex_a15_neon_shift_2): Likewise. ++ (cortex_a15_neon_shift_3): Likewise. ++ (cortex_a15_neon_vshl_ddd): Likewise. ++ (cortex_a15_neon_vqshl_vrshl_vqrshl_qqq): Likewise. ++ (cortex_a15_neon_vsra_vrsra): Likewise. ++ (cortex_a15_neon_fp_vadd_ddd_vabs_dd): Likewise. ++ (cortex_a15_neon_fp_vadd_qqq_vabs_qq): Likewise. ++ (cortex_a15_neon_fp_vmul_ddd): Likewise. ++ (cortex_a15_neon_fp_vmul_qqd): Likewise. ++ (cortex_a15_neon_fp_vmla_ddd): Likewise. ++ (cortex_a15_neon_fp_vmla_qqq): Likewise. ++ (cortex_a15_neon_fp_vmla_ddd_scalar): Likewise. ++ (cortex_a15_neon_fp_vmla_qqq_scalar): Likewise. ++ (cortex_a15_neon_fp_vrecps_vrsqrts_ddd): Likewise. ++ (cortex_a15_neon_fp_vrecps_vrsqrts_qqq): Likewise. ++ (cortex_a15_neon_bp_simple): Likewise. ++ (cortex_a15_neon_bp_2cycle): Likewise. ++ (cortex_a15_neon_bp_3cycle): Likewise. ++ (cortex_a15_neon_vld1_1_2_regs): Likewise. ++ (cortex_a15_neon_vld1_3_4_regs): Likewise. ++ (cortex_a15_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. ++ (cortex_a15_neon_vld2_4_regs): Likewise. ++ (cortex_a15_neon_vld3_vld4): Likewise. ++ (cortex_a15_neon_vst1_1_2_regs_vst2_2_regs): Likewise. ++ (cortex_a15_neon_vst1_3_4_regs): Likewise. ++ (cortex_a15_neon_vst2_4_regs_vst3_vst4): Likewise. ++ (cortex_a15_neon_vst3_vst4): Likewise. ++ (cortex_a15_neon_vld1_vld2_lane): Likewise. ++ (cortex_a15_neon_vld3_vld4_lane" 10 ++ (cortex_a15_neon_vst1_vst2_lane): Likewise. ++ (cortex_a15_neon_vst3_vst4_lane): Likewise. ++ (cortex_a15_neon_vld3_vld4_all_lanes): Likewise. ++ (cortex_a15_neon_ldm_2): Likewise.0 ++ (cortex_a15_neon_stm_2): Likewise. ++ (cortex_a15_neon_mcr): Likewise. ++ (cortex_a15_neon_mcr_2_mcrr): Likewise. ++ (cortex_a15_neon_mrc): Likewise. ++ (cortex_a15_neon_mrrc): Likewise. ++ * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute ++ change. ++ (cortex_a15_alu_shift): Likewise. ++ (cortex_a15_alu_shift_reg): Likewise. ++ (cortex_a15_mult32): Likewise. ++ (cortex_a15_mult64): Likewise. ++ (cortex_a15_block): Likewise. ++ (cortex_a15_branch): Likewise. ++ (cortex_a15_load1): Likewise. ++ (cortex_a15_load3): Likewise. ++ (cortex_a15_store1): Likewise. ++ (cortex_a15_store3): Likewise. ++ (cortex_a15_call): Likewise. ++ * config/arm/cortex-a5.md (cortex_a5_r2f): Update for attribute ++ change. ++ (cortex_a5_f2r): Likewise. ++ * config/arm/cortex-a53.md (cortex_a53_r2f): Update for attribute ++ change. ++ (cortex_a53_f2r): Likewise. ++ * config/arm/cortex-a7.md ++ (cortex_a7_branch): Update for attribute change. ++ (cortex_a7_call): Likewise. ++ (cortex_a7_alu_imm): Likewise. ++ (cortex_a7_alu_reg): Likewise. ++ (cortex_a7_alu_shift): Likewise. ++ (cortex_a7_mul): Likewise. ++ (cortex_a7_load1): Likewise. ++ (cortex_a7_store1): Likewise. ++ (cortex_a7_load2): Likewise. ++ (cortex_a7_store2): Likewise. ++ (cortex_a7_load3): Likewise. ++ (cortex_a7_store3): Likewise. ++ (cortex_a7_load4): Likewise. ++ (cortex_a7_store4): Likewise. ++ (cortex_a7_fpalu): Likewise. ++ (cortex_a7_fconst): Likewise. ++ (cortex_a7_fpmuls): Likewise. ++ (cortex_a7_neon_mul): Likewise. ++ (cortex_a7_fpmacs): Likewise. ++ (cortex_a7_neon_mla: Likewise. ++ (cortex_a7_fpmuld: Likewise. ++ (cortex_a7_fpmacd: Likewise. ++ (cortex_a7_fpfmad: Likewise. ++ (cortex_a7_fdivs: Likewise. ++ (cortex_a7_fdivd: Likewise. ++ (cortex_a7_r2f: Likewise. ++ (cortex_a7_f2r: Likewise. ++ (cortex_a7_f_flags: Likewise. ++ (cortex_a7_f_loads: Likewise. ++ (cortex_a7_f_loadd: Likewise. ++ (cortex_a7_f_stores: Likewise. ++ (cortex_a7_f_stored: Likewise. ++ (cortex_a7_neon): Likewise. ++ * config/arm/cortex-a8-neon.md ++ (cortex_a8_neon_mrc): Update for attribute change. ++ (cortex_a8_neon_mrrc): Likewise. ++ (cortex_a8_neon_int_1): Likewise. ++ (cortex_a8_neon_int_2): Likewise. ++ (cortex_a8_neon_int_3): Likewise. ++ (cortex_a8_neon_int_4): Likewise. ++ (cortex_a8_neon_int_5): Likewise. ++ (cortex_a8_neon_vqneg_vqabs): Likewise. ++ (cortex_a8_neon_vmov): Likewise. ++ (cortex_a8_neon_vaba): Likewise. ++ (cortex_a8_neon_vaba_qqq): Likewise. ++ (cortex_a8_neon_vsma): Likewise. ++ (cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a8_neon_mul_qqq_8_16_32_ddd_32): Likewise. ++ (cortex_a8_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar): ++ Likewise. ++ (cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a8_neon_mla_qqq_8_16): Likewise. ++ (cortex_a8_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_\ ++ long_scalar_qdd_64_32_long): Likewise. ++ (cortex_a8_neon_mla_qqq_32_qqd_32_scalar): Likewise. ++ (cortex_a8_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. ++ (cortex_a8_neon_mul_qqd_32_scalar): Likewise. ++ (cortex_a8_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. ++ (cortex_a8_neon_shift_1): Likewise. ++ (cortex_a8_neon_shift_2): Likewise. ++ (cortex_a8_neon_shift_3): Likewise. ++ (cortex_a8_neon_vshl_ddd): Likewise. ++ (cortex_a8_neon_vqshl_vrshl_vqrshl_qqq): Likewise. ++ (cortex_a8_neon_vsra_vrsra): Likewise. ++ (cortex_a8_neon_fp_vadd_ddd_vabs_dd): Likewise. ++ (cortex_a8_neon_fp_vadd_qqq_vabs_qq): Likewise. ++ (cortex_a8_neon_fp_vsum): Likewise. ++ (cortex_a8_neon_fp_vmul_ddd): Likewise. ++ (cortex_a8_neon_fp_vmul_qqd): Likewise. ++ (cortex_a8_neon_fp_vmla_ddd): Likewise. ++ (cortex_a8_neon_fp_vmla_qqq): Likewise. ++ (cortex_a8_neon_fp_vmla_ddd_scalar): Likewise. ++ (cortex_a8_neon_fp_vmla_qqq_scalar): Likewise. ++ (cortex_a8_neon_fp_vrecps_vrsqrts_ddd): Likewise. ++ (cortex_a8_neon_fp_vrecps_vrsqrts_qqq): Likewise. ++ (cortex_a8_neon_bp_simple): Likewise. ++ (cortex_a8_neon_bp_2cycle): Likewise. ++ (cortex_a8_neon_bp_3cycle): Likewise. ++ (cortex_a8_neon_ldr): Likewise. ++ (cortex_a8_neon_str): Likewise. ++ (cortex_a8_neon_vld1_1_2_regs): Likewise. ++ (cortex_a8_neon_vld1_3_4_regs): Likewise. ++ (cortex_a8_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. ++ (cortex_a8_neon_vld2_4_regs): Likewise. ++ (cortex_a8_neon_vld3_vld4): Likewise. ++ (cortex_a8_neon_vst1_1_2_regs_vst2_2_regs): Likewise. ++ (cortex_a8_neon_vst1_3_4_regs): Likewise. ++ (cortex_a8_neon_vst2_4_regs_vst3_vst4): Likewise. ++ (cortex_a8_neon_vst3_vst4): Likewise. ++ (cortex_a8_neon_vld1_vld2_lane): Likewise. ++ (cortex_a8_neon_vld3_vld4_lane): Likewise. ++ (cortex_a8_neon_vst1_vst2_lane): Likewise. ++ (cortex_a8_neon_vst3_vst4_lane): Likewise. ++ (cortex_a8_neon_vld3_vld4_all_lanes): Likewise. ++ (cortex_a8_neon_mcr): Likewise. ++ (cortex_a8_neon_mcr_2_mcrr): Likewise. ++ * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute ++ change. ++ * config/arm/cortex-a9-neon.md (ca9_neon_mrc): Update for attribute ++ change. ++ (ca9_neon_mrrc): Likewise. ++ (cortex_a9_neon_int_1): Likewise. ++ (cortex_a9_neon_int_2): Likewise. ++ (cortex_a9_neon_int_3): Likewise. ++ (cortex_a9_neon_int_4): Likewise. ++ (cortex_a9_neon_int_5): Likewise. ++ (cortex_a9_neon_vqneg_vqabs): Likewise. ++ (cortex_a9_neon_vmov): Likewise. ++ (cortex_a9_neon_vaba): Likewise. ++ (cortex_a9_neon_vaba_qqq): Likewise. ++ (cortex_a9_neon_vsma): Likewise. ++ (cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a9_neon_mul_qqq_8_16_32_ddd_32): Likewise. ++ (cortex_a9_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar): ++ Likewise. ++ (cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. ++ (cortex_a9_neon_mla_qqq_8_16): Likewise. ++ (cortex_a9_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_\ ++ long_scalar_qdd_64_32_long): Likewise. ++ (cortex_a9_neon_mla_qqq_32_qqd_32_scalar): Likewise. ++ (cortex_a9_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. ++ (cortex_a9_neon_mul_qqd_32_scalar): Likewise. ++ (cortex_a9_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. ++ (cortex_a9_neon_shift_1): Likewise. ++ (cortex_a9_neon_shift_2): Likewise. ++ (cortex_a9_neon_shift_3): Likewise. ++ (cortex_a9_neon_vshl_ddd): Likewise. ++ (cortex_a9_neon_vqshl_vrshl_vqrshl_qqq): Likewise. ++ (cortex_a9_neon_vsra_vrsra): Likewise. ++ (cortex_a9_neon_fp_vadd_ddd_vabs_dd): Likewise. ++ (cortex_a9_neon_fp_vadd_qqq_vabs_qq): Likewise. ++ (cortex_a9_neon_fp_vsum): Likewise. ++ (cortex_a9_neon_fp_vmul_ddd): Likewise. ++ (cortex_a9_neon_fp_vmul_qqd): Likewise. ++ (cortex_a9_neon_fp_vmla_ddd): Likewise. ++ (cortex_a9_neon_fp_vmla_qqq): Likewise. ++ (cortex_a9_neon_fp_vmla_ddd_scalar): Likewise. ++ (cortex_a9_neon_fp_vmla_qqq_scalar): Likewise. ++ (cortex_a9_neon_fp_vrecps_vrsqrts_ddd): Likewise. ++ (cortex_a9_neon_fp_vrecps_vrsqrts_qqq): Likewise. ++ (cortex_a9_neon_bp_simple): Likewise. ++ (cortex_a9_neon_bp_2cycle): Likewise. ++ (cortex_a9_neon_bp_3cycle): Likewise. ++ (cortex_a9_neon_ldr): Likewise. ++ (cortex_a9_neon_str): Likewise. ++ (cortex_a9_neon_vld1_1_2_regs): Likewise. ++ (cortex_a9_neon_vld1_3_4_regs): Likewise. ++ (cortex_a9_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. ++ (cortex_a9_neon_vld2_4_regs): Likewise. ++ (cortex_a9_neon_vld3_vld4): Likewise. ++ (cortex_a9_neon_vst1_1_2_regs_vst2_2_regs): Likewise. ++ (cortex_a9_neon_vst1_3_4_regs): Likewise. ++ (cortex_a9_neon_vst2_4_regs_vst3_vst4): Likewise. ++ (cortex_a9_neon_vst3_vst4): Likewise. ++ (cortex_a9_neon_vld1_vld2_lane): Likewise. ++ (cortex_a9_neon_vld3_vld4_lane): Likewise. ++ (cortex_a9_neon_vst1_vst2_lane): Likewise. ++ (cortex_a9_neon_vst3_vst4_lane): Likewise. ++ (cortex_a9_neon_vld3_vld4_all_lanes): Likewise. ++ (cortex_a9_neon_mcr): Likewise. ++ (cortex_a9_neon_mcr_2_mcrr): Likewise. ++ * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute change. ++ (cortex_a9_fps): Likewise. ++ * config/arm/cortex-m4-fpu.md (cortex_m4_vmov_2): Update for attribute ++ change. ++ (cortex_m4_fmuls): Likewise. ++ * config/arm/cortex-r4f.md (cortex_r4_mcr): Update for attribute ++ change. ++ (cortex_r4_mrc): Likewise. ++ * config/arm/iterators.md: Update comment referring to neon_type. ++ * config/arm/iwmmxt.md ++ (iwmmxt_arm_movdi): Update for attribute change. ++ (iwmmxt_movsi_insn): Likewise. ++ * config/arm/marvell-pj4.md ++ (pj4_vfp_to_core): Update for attribute change. ++ (pj4_core_to_vfp): Likewise. ++ * config/arm/neon-schedgen.ml (emit_insn_reservations): Update for ++ attribute change. ++ * config/arm/vfp11.md (vfp_fload): Update for attribute change. ++ (vfp_fstore): Likewise. ++ * doc/md.texi: Change references to neon_type to refer to type. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r201436 ++ 2013-08-02 Sofiane Naci ++ ++ * config/arm/types.md (define_attr "type"): Add "load_acq" and "store_rel". ++ * config/arm/cortex-a53.md (cortex_a53_load1): Update for attribute ++ changes. ++ (cortex_a53_store1): Likewise. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r201400 ++ 2013-08-01 Sofiane Naci ++ ++ * config.gcc (aarch64*-*-*): Add aarch-common.o to extra_objs. Add ++ aarch-common-protos.h to extra_headers. ++ (aarch64*-*-*): Add arm/aarch-common-protos.h to tm_p_file. ++ * config/aarch64/aarch64.md: Include "../arm/cortex-a53.md". ++ * config/aarch64/t-aarch64 (aarch-common.o): Define. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r201399 ++ 2013-08-01 Sofiane Naci ++ ++ * config/aarch64/aarch64.md (define_attr "type"): Delete. ++ Include "../arm/types.md". Define "type" attribute for all patterns. ++ * config/aarch64/aarch64-simd.md (move_lo_quad_): Update for ++ attribute changes. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r201376 ++ 2013-07-31 Sofiane Naci ++ ++ * config.gcc (arm*-*-*): Add aarch-common.o to extra_objs. Add ++ aarch-common-protos.h to extra_headers. ++ (arm*-*-*): Add arm/aarch-common-protos.h to tm_p_file. ++ * config/arm/arm.c (arm_early_load_addr_dep): Move from here to ... ++ (arm_early_store_addr_dep): Likewise. ++ (arm_no_early_alu_shift_dep: Likewise. ++ (arm_no_early_alu_shift_value_dep: Likewise. ++ (arm_no_early_mul_dep: Likewise. ++ (arm_no_early_store_addr_dep: Likewise. ++ (arm_mac_accumulator_is_mul_result: Likewise. ++ (arm_mac_accumulator_is_result: Likewise. ++ * config/arm/aarch-common.c: ... here. New file. ++ * config/arm/arm-protos.h (arm_early_load_addr_dep): Move from here to ... ++ (arm_early_store_addr_dep): Likewise. ++ (arm_no_early_alu_shift_dep: Likewise. ++ (arm_no_early_alu_shift_value_dep: Likewise. ++ (arm_no_early_mul_dep: Likewise. ++ (arm_no_early_store_addr_dep: Likewise. ++ (arm_mac_accumulator_is_mul_result: Likewise. ++ (arm_mac_accumulator_is_result: Likewise. ++ * config/arm/aarch-common-protos.h: ... here. New file. ++ * config/arm/t-arm (aarch-common.o): Define. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r201375 ++ 2013-07-31 Sofiane Naci ++ ++ * config/arm/arm.md: Include new file "types.md". ++ (define_attr "type"): Move from here to ... ++ (define_attr "mul32"): Likewise. ++ (define_attr "mul64"): Likewise. ++ * config/arm/types.md: ... here. New file. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202663 ++ 2013-09-17 Cong Hou ++ ++ * tree-vect-patterns.c (vect_recog_dot_prod_pattern): Fix a bug ++ when checking the dot production pattern. The type of rhs operand ++ of multiply is now checked correctly. ++ ++2014-04-02 Zhenqiang Chen ++ ++ Backport from trunk r208511 ++ 2014-03-12 Christian Bruel ++ ++ PR target/60264 ++ * config/arm/arm.c (arm_emit_vfp_multi_reg_pop): Emit a ++ REG_CFA_DEF_CFA note. ++ (arm_expand_epilogue_apcs_frame): call arm_add_cfa_adjust_cfa_note. ++ (arm_unwind_emit): Allow REG_CFA_DEF_CFA. ++ ++2014-03-14 Yvan Roux ++ ++ * LINARO-VERSION: Bump version. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ * LINARO-VERSION: Update. ++ ++2014-02-13 Yvan Roux ++ ++ * LINARO-VERSION: Bump version. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ * LINARO-VERSION: Update. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206518 ++ 2014-01-10 Kyrylo Tkachov ++ ++ * config/arm/arm.c (arm_init_iwmmxt_builtins): Skip ++ non-iwmmxt builtins. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206151 ++ 2013-12-20 Kyrylo Tkachov ++ ++ * config/arm/neon.ml (crypto_intrinsics): Add vceq_64 and vtst_p64. ++ * config/arm/arm_neon.h: Regenerate. ++ * config/arm/neon-docgen.ml: Add vceq_p64 and vtst_p64. ++ * doc/arm-neon-intrinsics.texi: Regenerate. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206149 ++ 2013-12-20 Kyrylo Tkachov ++ ++ * config/arm/arm_acle.h: Add underscores before variables. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206132 ++ 2013-12-19 Kyrylo Tkachov ++ ++ * config/arm/neon-docgen.ml: Add crypto intrinsics documentation. ++ * doc/arm-neon-intrinsics.texi: Regenerate. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206131 ++ 2013-12-19 Kyrylo Tkachov ++ ++ * config/arm/neon-testgen.ml (effective_target): Handle "CRYPTO". ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206130 ++ 2013-12-19 Kyrylo Tkachov ++ ++ * config/arm/arm.c (enum arm_builtins): Add crypto builtins. ++ (arm_init_neon_builtins): Handle crypto builtins. ++ (bdesc_2arg): Likewise. ++ (bdesc_1arg): Likewise. ++ (bdesc_3arg): New table. ++ (arm_expand_ternop_builtin): New function. ++ (arm_expand_unop_builtin): Handle sha1h explicitly. ++ (arm_expand_builtin): Handle ternary builtins. ++ * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): ++ Define __ARM_FEATURE_CRYPTO. ++ * config/arm/arm.md: Include crypto.md. ++ (is_neon_type): Add crypto types. ++ * config/arm/arm_neon_builtins.def: Add TImode reinterprets. ++ * config/arm/crypto.def: New. ++ * config/arm/crypto.md: Likewise. ++ * config/arm/iterators.md (CRYPTO_UNARY): New int iterator. ++ (CRYPTO_BINARY): Likewise. ++ (CRYPTO_TERNARY): Likewise. ++ (CRYPTO_SELECTING): Likewise. ++ (crypto_pattern): New int attribute. ++ (crypto_size_sfx): Likewise. ++ (crypto_mode): Likewise. ++ (crypto_type): Likewise. ++ * config/arm/neon-gen.ml: Handle poly64_t and poly128_t types. ++ Handle crypto intrinsics. ++ * config/arm/neon.ml: Add support for poly64 and polt128 types ++ and intrinsics. Define crypto intrinsics. ++ * config/arm/neon.md (neon_vreinterpretti): New pattern. ++ (neon_vreinterpretv16qi): Use VQXMOV mode iterator. ++ (neon_vreinterpretv8hi): Likewise. ++ (neon_vreinterpretv4si): Likewise. ++ (neon_vreinterpretv4sf): Likewise. ++ (neon_vreinterpretv2di): Likewise. ++ * config/arm/unspecs.md (UNSPEC_AESD, UNSPEC_AESE, UNSPEC_AESIMC, ++ UNSPEC_AESMC, UNSPEC_SHA1C, UNSPEC_SHA1M, UNSPEC_SHA1P, UNSPEC_SHA1H, ++ UNSPEC_SHA1SU0, UNSPEC_SHA1SU1, UNSPEC_SHA256H, UNSPEC_SHA256H2, ++ UNSPEC_SHA256SU0, UNSPEC_SHA256SU1, VMULLP64): Define. ++ * config/arm/arm_neon.h: Regenerate. ++ ++ Modifications needed to backport into linaro-4_8-branch: ++ * config/arm/arm.md (attribute neon_type): neon_crypto_aes, ++ neon_crypto_sha1_xor, neon_crypto_sha1_fast, ++ neon_crypto_sha1_slow, neon_crypto_sha256_fast, ++ neon_crypto_sha256_slow, neon_mul_d_long: New. ++ instead of: ++ * config/arm/arm.md: Include crypto.md. ++ (is_neon_type): Add crypto types. ++ ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206128 ++ 2013-12-19 Kyrylo Tkachov ++ ++ * Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi. ++ * config.gcc (extra_headers): Add arm_acle.h. ++ * config/arm/arm.c (FL_CRC32): Define. ++ (arm_have_crc): Likewise. ++ (arm_option_override): Set arm_have_crc. ++ (arm_builtins): Add CRC32 builtins. ++ (bdesc_2arg): Likewise. ++ (arm_init_crc32_builtins): New function. ++ (arm_init_builtins): Initialise CRC32 builtins. ++ (arm_file_start): Handle architecture extensions. ++ * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FEATURE_CRC32. ++ Define __ARM_32BIT_STATE. ++ (TARGET_CRC32): Define. ++ * config/arm/arm-arches.def: Add armv8-a+crc. ++ * config/arm/arm-tables.opt: Regenerate. ++ * config/arm/arm.md (type): Add crc. ++ (): New insn. ++ * config/arm/arm_acle.h: New file. ++ * config/arm/iterators.md (CRC): New int iterator. ++ (crc_variant, crc_mode): New int attributes. ++ * confg/arm/unspecs.md (UNSPEC_CRC32B, UNSPEC_CRC32H, UNSPEC_CRC32W, ++ UNSPEC_CRC32CB, UNSPEC_CRC32CH, UNSPEC_CRC32CW): New unspecs. ++ * doc/invoke.texi: Document -march=armv8-a+crc option. ++ * doc/extend.texi: Document ACLE intrinsics. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206120 ++ 2013-12-19 Tejas Belagod ++ ++ * config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins): ++ Define builtin types for poly64_t poly128_t. ++ (TYPES_BINOPP, aarch64_types_binopp_qualifiers): New. ++ * aarch64/aarch64-simd-builtins.def: Update builtins table. ++ * config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi, ++ aarch64_crypto_pmullv2di): New. ++ * config/aarch64/aarch64.c (aarch64_simd_mangle_map): Update table for ++ poly64x2_t mangler. ++ * config/aarch64/arm_neon.h (poly64x2_t, poly64_t, poly128_t): Define. ++ (vmull_p64, vmull_high_p64): New. ++ * config/aarch64/iterators.md (UNSPEC_PMULL<2>): New. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206119 ++ 2013-12-19 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd-builtins.def: Update builtins table. ++ * config/aarch64/aarch64-simd.md (aarch64_crypto_sha256hv4si, ++ aarch64_crypto_sha256su0v4si, aarch64_crypto_sha256su1v4si): New. ++ * config/aarch64/arm_neon.h (vsha256hq_u32, vsha256h2q_u32, ++ vsha256su0q_u32, vsha256su1q_u32): New. ++ * config/aarch64/iterators.md (UNSPEC_SHA256H<2>, UNSPEC_SHA256SU<01>): ++ New. ++ (CRYPTO_SHA256): New int iterator. ++ (sha256_op): New int attribute. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206118 ++ 2013-12-19 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd-builtins.def: Update builtins table. ++ * config/aarch64/aarch64-builtins.c (aarch64_types_ternopu_qualifiers, ++ TYPES_TERNOPU): New. ++ * config/aarch64/aarch64-simd.md (aarch64_crypto_sha1hsi, ++ aarch64_crypto_sha1su1v4si, aarch64_crypto_sha1v4si, ++ aarch64_crypto_sha1su0v4si): New. ++ * config/aarch64/arm_neon.h (vsha1cq_u32, sha1mq_u32, vsha1pq_u32, ++ vsha1h_u32, vsha1su0q_u32, vsha1su1q_u32): New. ++ * config/aarch64/iterators.md (UNSPEC_SHA1, UNSPEC_SHA1SU<01>): ++ New. ++ (CRYPTO_SHA1): New int iterator. ++ (sha1_op): New int attribute. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206117 ++ 2013-12-19 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd-builtins.def: Update builtins table. ++ * config/aarch64/aarch64-builtins.c (aarch64_types_binopu_qualifiers, ++ TYPES_BINOPU): New. ++ * config/aarch64/aarch64-simd.md (aarch64_crypto_aesv16qi, ++ aarch64_crypto_aesv16qi): New. ++ * config/aarch64/arm_neon.h (vaeseq_u8, vaesdq_u8, vaesmcq_u8, ++ vaesimcq_u8): New. ++ * config/aarch64/iterators.md (UNSPEC_AESE, UNSPEC_AESD, UNSPEC_AESMC, ++ UNSPEC_AESIMC): New. ++ (CRYPTO_AES, CRYPTO_AESMC): New int iterators. ++ (aes_op, aesmc_op): New int attributes. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206115 ++ 2013-12-19 Tejas Belagod ++ ++ * config/arm/types.md (neon_mul_d_long, crypto_aes, crypto_sha1_xor, ++ crypto_sha1_fast, crypto_sha1_slow, crypto_sha256_fast, ++ crypto_sha256_slow): New. ++ ++ Modifications needed to backport into linaro-4_8-branch: ++ * config/aarch64/aarch64-simd.md (attribute simd_type): ++ (simd_mul_d_long, simd_crypto_aes, simd_crypto_sha1_xor, ++ simd_crypto_sha1_fast, simd_crypto_sha1_slow, simd_crypto_sha256_fast, ++ simd_crypto_sha256_slow) : New. ++ instead of the above change. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206114 ++ 2013-12-19 Tejas Belagod ++ ++ * config/aarch64/aarch64.h (TARGET_CRYPTO): New. ++ (__ARM_FEATURE_CRYPTO): Define if TARGET_CRYPTO is true. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r205384. ++ 2013-11-26 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_type_qualifiers): Add qualifier_poly. ++ (aarch64_build_scalar_type): Also build Poly types. ++ (aarch64_build_vector_type): Likewise. ++ (aarch64_build_type): Likewise. ++ (aarch64_build_signed_type): New. ++ (aarch64_build_unsigned_type): Likewise. ++ (aarch64_build_poly_type): Likewise. ++ (aarch64_init_simd_builtins): Also handle Poly types. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r205383. ++ 2013-11-26 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (VAR1): Use new naming scheme for aarch64_builtins. ++ (aarch64_builtin_vectorized_function): Use new ++ aarch64_builtins names. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r205092. ++ 2013-11-20 James Greenhalgh ++ ++ * gcc/config/aarch64/aarch64-builtins.c ++ (aarch64_simd_itype): Remove. ++ (aarch64_simd_builtin_datum): Remove itype, add ++ qualifiers pointer. ++ (VAR1): Use qualifiers. ++ (aarch64_build_scalar_type): New. ++ (aarch64_build_vector_type): Likewise. ++ (aarch64_build_type): Likewise. ++ (aarch64_init_simd_builtins): Refactor, remove special cases, ++ consolidate main loop. ++ (aarch64_simd_expand_args): Likewise. ++ ++2014-02-01 Christophe Lyon ++ ++ Backport from trunk r202875,202980. ++ 2013-09-24 Xinliang David Li ++ ++ * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): ++ Check max peel iterations parameter. ++ * param.def: New parameter. ++ * doc/invoke.texi: Document New parameter. ++ ++ 2013-09-27 Xinliang David Li ++ ++ * opts.c (finish_options): Adjust parameters ++ according to vect cost model. ++ (common_handle_option): Set dynamic vect cost ++ model for FDO. ++ targhooks.c (default_add_stmt_cost): Compute stmt cost ++ unconditionally. ++ * tree-vect-loop.c (vect_estimate_min_profitable_iters): ++ Use helper function. ++ * tree-vectorizer.h (unlimited_cost_model): New function. ++ * tree-vect-slp.c (vect_slp_analyze_bb_1): Use helper function. ++ * tree-vect-data-refs.c (vect_peeling_hash_insert): Use helper ++ function. ++ (vect_enhance_data_refs_alignment): Ditto. ++ * flag-types.h: New enum. ++ * common/config/i386/i386-common.c (ix86_option_init_struct): ++ No need to initialize vect_cost_model flag. ++ * config/i386/i386.c (ix86_add_stmt_cost): Compute stmt cost ++ unconditionally. ++ ++2014-01-21 Zhenqiang Chen ++ ++ Backport from trunk r200103 ++ 2013-06-15 Jeff Law ++ ++ * gimple.h (gimple_can_coalesce_p): Prototype. ++ * tree-ssa-coalesce.c (gimple_can_coalesce_p): New function. ++ (create_outofssa_var_map, coalesce_partitions): Use it. ++ * tree-ssa-uncprop.c (uncprop_into_successor_phis): Similarly. ++ * tree-ssa-live.c (var_map_base_init): Use TYPE_CANONICAL ++ if it's available. ++ ++2014-01-21 Christophe Lyon ++ ++ * LINARO-VERSION: Bump version. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ * LINARO-VERSION: Update. ++ ++2014-01-16 Zhenqiang Chen ++ ++ Linaro local patch for armv4t multilib support. ++ * gcc/config/arm/t-mlibs: New file. ++ * config.gcc: Add t-mlibs. ++ * incpath.c (add_standard_paths): Try multilib path first. ++ * gcc.c (for_each_path): Likewise. ++ ++2013-12-21 Christophe Lyon ++ ++ * LINARO-VERSION: Bump version. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ * LINARO-VERSION: Update. ++ ++2013-12-06 Christophe Lyon ++ ++ Backport from trunk r204737. ++ 2013-11-13 Christophe Lyon ++ ++ * config/aarch64/aarch64.h (FRAME_GROWS_DOWNWARD): Define to 1. ++ * config/aarch64/aarch64.c (aarch64_initial_elimination_offset): ++ Update offset calculations. ++ ++2013-12-06 Christophe Lyon ++ ++ Backport from trunk r203327. ++ 2013-10-09 Zhenqiang Chen ++ ++ * tree-ssa-phiopts.c (rhs_is_fed_for_value_replacement): New function. ++ (operand_equal_for_value_replacement): New function, extracted from ++ value_replacement and enhanced to catch more cases. ++ (value_replacement): Use operand_equal_for_value_replacement. ++ ++2013-11-18 Christophe Lyon ++ ++ * LINARO-VERSION: Bump version. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ * LINARO-VERSION: Update. ++ ++2013-11-06 Christophe Lyon ++ ++ Revert backport from trunk r197526. ++ 2013-04-05 Greta Yorsh ++ ++ * config/arm/arm.md (negdi_extendsidi): New pattern. ++ (negdi_zero_extendsidi): Likewise. ++ ++2013-11-05 Zhenqiang Chen ++ ++ Backport from trunk r203267, r203603 and r204247. ++ 2013-10-08 Zhenqiang Chen ++ ++ PR target/58423 ++ * config/arm/arm.c (arm_emit_ldrd_pop): Attach ++ RTX_FRAME_RELATED_P on INSN. ++ ++ 2013-10-15 Matthew Gretton-Dann ++ Ramana Radhakrishnan ++ ++ * config/arm/t-aprofile: New file. ++ * config.gcc: Handle --with-multilib-list option. ++ ++ 2013-10-31 Zhenqiang Chen ++ ++ * lower-subreg.c (resolve_simple_move): Copy REG_INC note. ++ ++2013-10-17 Christophe Lyon ++ ++ Backport from trunk r200956 ++ 2013-07-15 Marcus Shawcroft ++ ++ * config/aarch64/aarch64-protos.h (aarch64_symbol_type): ++ Define SYMBOL_TINY_GOT, update comment. ++ * config/aarch64/aarch64.c ++ (aarch64_load_symref_appropriately): Handle SYMBOL_TINY_GOT. ++ (aarch64_expand_mov_immediate): Likewise. ++ (aarch64_print_operand): Likewise. ++ (aarch64_classify_symbol): Likewise. ++ * config/aarch64/aarch64.md (UNSPEC_GOTTINYPIC): Define. ++ (ldr_got_tiny): Define. ++ ++2013-10-16 Christophe Lyon ++ ++ * LINARO-VERSION: Bump version. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ * LINARO-VERSION: Update. ++ ++2013-10-09 Christophe Lyon ++ ++ Backport from trunk r198526,198527,200020,200595. ++ 2013-05-02 Ian Bolton ++ ++ * config/aarch64/aarch64.md (*and_one_cmpl3_compare0): ++ New pattern. ++ (*and_one_cmplsi3_compare0_uxtw): Likewise. ++ (*and_one_cmpl_3_compare0): Likewise. ++ (*and_one_cmpl_si3_compare0_uxtw): Likewise. ++ ++ 2013-05-02 Ian Bolton ++ ++ * config/aarch64/aarch64.md (movsi_aarch64): Only allow to/from ++ S reg when fp attribute set. ++ (movdi_aarch64): Only allow to/from D reg when fp attribute set. ++ ++ 2013-06-12 Sofiane Naci ++ ++ * config/aarch64/aarch64-simd.md (aarch64_combine): convert to split. ++ (aarch64_simd_combine): New instruction expansion. ++ * config/aarch64/aarch64-protos.h (aarch64_split_simd_combine): New ++ function prototype. ++ * config/aarch64/aarch64.c (aarch64_split_combine): New function. ++ * config/aarch64/iterators.md (Vdbl): Add entry for DF. ++ ++ 2013-07-02 Ian Bolton ++ ++ * config/aarch64/aarch64.md (*extr_insv_reg): New pattern. ++ ++2013-10-09 Christophe Lyon ++ ++ Backport from trunk r201879. ++ 2013-08-20 Matthew Gretton-Dann ++ ++ * config/arm/linux-elf.h (MULTILIB_DEFAULTS): Remove definition. ++ * config/arm/t-linux-eabi (MULTILIB_OPTIONS): Document association ++ with MULTLIB_DEFAULTS. ++ ++2013-10-09 Christophe Lyon ++ ++ Backport from trunk r201871. ++ 2013-08-20 Pavel Chupin ++ ++ Fix LIB_SPEC for systems without libpthread. ++ ++ * config/gnu-user.h: Introduce GNU_USER_TARGET_NO_PTHREADS_LIB_SPEC. ++ * config/arm/linux-eabi.h: Use GNU_USER_TARGET_NO_PTHREADS_LIB_SPEC ++ for Android. ++ * config/i386/linux-common.h: Likewise. ++ * config/mips/linux-common.h: Likewise. ++ ++2013-10-08 Christophe Lyon ++ ++ Backport from trunk r202702. ++ 2013-09-18 Richard Earnshaw ++ ++ * arm.c (arm_get_frame_offsets): Validate architecture supports ++ LDRD/STRD before accepting the tuning preference. ++ (arm_expand_prologue): Likewise. ++ (arm_expand_epilogue): Likewise. ++ ++2013-10-04 Venkataramanan.Kumar ++ ++ Backport from trunk r203028. ++ 2013-09-30 Venkataramanan Kumar ++ ++ * config/aarch64/aarch64.h (MCOUNT_NAME): Define. ++ (NO_PROFILE_COUNTERS): Likewise. ++ (PROFILE_HOOK): Likewise. ++ (FUNCTION_PROFILER): Likewise. ++ * config/aarch64/aarch64.c (aarch64_function_profiler): Remove. ++ ++2013-10-03 Christophe Lyon ++ ++ Backport from trunk r201923,201927. ++ 2013-08-22 Julian Brown ++ ++ * configure.ac: Add aarch64 to list of arches which use "nop" in ++ debug_line test. ++ * configure: Regenerate. ++ ++ 2013-08-22 Paolo Carlini ++ ++ * configure.ac: Add backslashes missing from the last change. ++ * configure: Regenerate. ++ ++2013-10-03 Christophe Lyon ++ ++ Backport from trunk r202023,202108. ++ 2013-08-27 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h: Replace all inline asm implementations ++ of vget_low_* with implementations in terms of other intrinsics. ++ ++ 2013-08-30 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (__AARCH64_UINT64_C, __AARCH64_INT64_C): New ++ arm_neon.h's internal macros to specify 64-bit constants. Avoid using ++ stdint.h's macros. ++ ++2013-10-03 Christophe Lyon ++ ++ Backport from trunk r201260,202400. ++ 2013-07-26 Kyrylo Tkachov ++ Richard Earnshaw ++ ++ * combine.c (simplify_comparison): Re-canonicalize operands ++ where appropriate. ++ * config/arm/arm.md (movcond_addsi): New splitter. ++ ++ 2013-09-09 Kyrylo Tkachov ++ ++ * config/aarch64/aarch64.c (aarch64_select_cc_mode): Return CC_SWP for ++ comparison with negated operand. ++ * config/aarch64/aarch64.md (compare_neg): Match canonical ++ RTL form. ++ ++2013-10-03 Christophe Lyon ++ ++ Backport from trunk r202164. ++ 2013-09-02 Bin Cheng ++ ++ * tree-ssa-loop-ivopts.c (set_autoinc_for_original_candidates): ++ Find auto-increment use both before and after candidate. ++ ++2013-10-03 Christophe Lyon ++ ++ Backport from trunk r202279. ++ 2013-09-05 Richard Earnshaw ++ ++ * arm.c (thumb2_emit_strd_push): Rewrite to use pre-decrement on ++ initial store. ++ * thumb2.md (thumb2_storewb_parisi): New pattern. ++ ++2013-10-03 Christophe Lyon ++ ++ Backport from trunk r202275. ++ 2013-09-05 Yufeng Zhang ++ ++ * config/aarch64/aarch64-option-extensions.def: Add ++ AARCH64_OPT_EXTENSION of 'crc'. ++ * config/aarch64/aarch64.h (AARCH64_FL_CRC): New define. ++ (AARCH64_ISA_CRC): Ditto. ++ * doc/invoke.texi (-march and -mcpu feature modifiers): Add ++ description of the CRC extension. ++ ++2013-10-01 Christophe Lyon ++ ++ Backport from trunk r201250. ++ 2013-07-25 Kyrylo Tkachov ++ ++ * config/arm/arm.md (arm_addsi3, addsi3_carryin_, ++ addsi3_carryin_alt2_): Correct output template. ++ ++2013-10-01 Kugan Vivekanandarajah ++ ++ Backport from trunk r203059,203116. ++ 2013-10-01 Kugan Vivekanandarajah ++ ++ PR target/58578 ++ Revert ++ 2013-04-05 Greta Yorsh ++ * config/arm/arm.md (arm_ashldi3_1bit): define_insn into ++ define_insn_and_split. ++ (arm_ashrdi3_1bit,arm_lshrdi3_1bit): Likewise. ++ (shiftsi3_compare): New pattern. ++ (rrx): New pattern. ++ * config/arm/unspecs.md (UNSPEC_RRX): New. ++ ++2013-09-11 Christophe Lyon ++ ++ * LINARO-VERSION: Bump version. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ * LINARO-VERSION: Update. ++ ++2013-09-10 Venkataramanan Kumar ++ ++ Backport from trunk r200197, 201411. ++ 2013-06-19 Richard Earnshaw ++ ++ arm.md (split for eq(reg, 0)): Add variants for ARMv5 and Thumb2. ++ (peepholes for eq(reg, not-0)): Ensure condition register is dead after ++ pattern. Use more efficient sequences on ARMv5 and Thumb2. ++ ++ 2013-08-01 Kyrylo Tkachov ++ ++ * config/arm/arm.md (peepholes for eq (reg1) (reg2/imm)): ++ Generate canonical plus rtx with negated immediate instead of minus ++ where appropriate. ++ * config/arm/arm.c (thumb2_reorg): Handle ADCS , case. ++ ++2013-09-10 Christophe Lyon ++ ++ Backport from trunk r200593,201024,201025,201122,201124,201126. ++ 2013-07-02 Kyrylo Tkachov ++ ++ * config/arm/arm.md (arm_andsi3_insn): Add alternatives for 16-bit ++ encoding. ++ (iorsi3_insn): Likewise. ++ (arm_xorsi3): Likewise. ++ ++ 2013-07-18 Sofiane Naci ++ ++ * config/arm/arm.md (attribute "type"): Rename "simple_alu_imm" to ++ "arlo_imm". Rename "alu_reg" to "arlo_reg". Rename "simple_alu_shift" to ++ "extend". Split "alu_shift" into "shift" and "arlo_shift". Split ++ "alu_shift_reg" into "shift_reg" and "arlo_shift_reg". List types ++ in alphabetical order. ++ (attribute "core_cycles"): Update for attribute changes. ++ (arm_addsi3): Likewise. ++ (addsi3_compare0): Likewise. ++ (addsi3_compare0_scratch): Likewise. ++ (addsi3_compare_op1): Likewise. ++ (addsi3_compare_op2): Likewise. ++ (compare_addsi2_op0): Likewise. ++ (compare_addsi2_op1): Likewise. ++ (addsi3_carryin_shift_): Likewise. ++ (subsi3_carryin_shift): Likewise. ++ (rsbsi3_carryin_shift): Likewise. ++ (arm_subsi3_insn): Likewise. ++ (subsi3_compare0): Likewise. ++ (subsi3_compare): Likewise. ++ (arm_andsi3_insn): Likewise. ++ (thumb1_andsi3_insn): Likewise. ++ (andsi3_compare0): Likewise. ++ (andsi3_compare0_scratch): Likewise. ++ (zeroextractsi_compare0_scratch ++ (andsi_not_shiftsi_si): Likewise. ++ (iorsi3_insn): Likewise. ++ (iorsi3_compare0): Likewise. ++ (iorsi3_compare0_scratch): Likewise. ++ (arm_xorsi3): Likewise. ++ (thumb1_xorsi3_insn): Likewise. ++ (xorsi3_compare0): Likewise. ++ (xorsi3_compare0_scratch): Likewise. ++ (satsi__shift): Likewise. ++ (rrx): Likewise. ++ (arm_shiftsi3): Likewise. ++ (shiftsi3_compare0): Likewise. ++ (not_shiftsi): Likewise. ++ (not_shiftsi_compare0): Likewise. ++ (not_shiftsi_compare0_scratch): Likewise. ++ (arm_one_cmplsi2): Likewise. ++ (thumb_one_complsi2): Likewise. ++ (notsi_compare0): Likewise. ++ (notsi_compare0_scratch): Likewise. ++ (thumb1_zero_extendhisi2): Likewise. ++ (arm_zero_extendhisi2): Likewise. ++ (arm_zero_extendhisi2_v6): Likewise. ++ (arm_zero_extendhisi2addsi): Likewise. ++ (thumb1_zero_extendqisi2): Likewise. ++ (thumb1_zero_extendqisi2_v6): Likewise. ++ (arm_zero_extendqisi2): Likewise. ++ (arm_zero_extendqisi2_v6): Likewise. ++ (arm_zero_extendqisi2addsi): Likewise. ++ (thumb1_extendhisi2): Likewise. ++ (arm_extendhisi2): Likewise. ++ (arm_extendhisi2_v6): Likewise. ++ (arm_extendqisi): Likewise. ++ (arm_extendqisi_v6): Likewise. ++ (arm_extendqisi2addsi): Likewise. ++ (thumb1_extendqisi2): Likewise. ++ (thumb1_movdi_insn): Likewise. ++ (arm_movsi_insn): Likewise. ++ (movsi_compare0): Likewise. ++ (movhi_insn_arch4): Likewise. ++ (movhi_bytes): Likewise. ++ (arm_movqi_insn): Likewise. ++ (thumb1_movqi_insn): Likewise. ++ (arm32_movhf): Likewise. ++ (thumb1_movhf): Likewise. ++ (arm_movsf_soft_insn): Likewise. ++ (thumb1_movsf_insn): Likewise. ++ (movdf_soft_insn): Likewise. ++ (thumb_movdf_insn): Likewise. ++ (arm_cmpsi_insn): Likewise. ++ (cmpsi_shiftsi): Likewise. ++ (cmpsi_shiftsi_swp): Likewise. ++ (arm_cmpsi_negshiftsi_si): Likewise. ++ (movsicc_insn): Likewise. ++ (movsfcc_soft_insn): Likewise. ++ (arith_shiftsi): Likewise. ++ (arith_shiftsi_compare0 ++ (arith_shiftsi_compare0_scratch ++ (sub_shiftsi): Likewise. ++ (sub_shiftsi_compare0 ++ (sub_shiftsi_compare0_scratch ++ (and_scc): Likewise. ++ (cond_move): Likewise. ++ (if_plus_move): Likewise. ++ (if_move_plus): Likewise. ++ (if_move_not): Likewise. ++ (if_not_move): Likewise. ++ (if_shift_move): Likewise. ++ (if_move_shift): Likewise. ++ (if_shift_shift): Likewise. ++ (if_not_arith): Likewise. ++ (if_arith_not): Likewise. ++ (cond_move_not): Likewise. ++ (thumb1_ashlsi3): Set type attribute. ++ (thumb1_ashrsi3): Likewise. ++ (thumb1_lshrsi3): Likewise. ++ (thumb1_rotrsi3): Likewise. ++ (shiftsi3_compare0_scratch): Likewise. ++ * config/arm/neon.md (neon_mov): Update for attribute changes. ++ (neon_mov): Likewise. ++ * config/arm/thumb2.md (thumb_andsi_not_shiftsi_si): Update for attribute ++ changes. ++ (thumb2_movsi_insn): Likewise. ++ (thumb2_cmpsi_neg_shiftsi): Likewise. ++ (thumb2_extendqisi_v6): Likewise. ++ (thumb2_zero_extendhisi2_v6): Likewise. ++ (thumb2_zero_extendqisi2_v6): Likewise. ++ (thumb2_shiftsi3_short): Likewise. ++ (thumb2_addsi3_compare0_scratch): Likewise. ++ (orsi_not_shiftsi_si): Likewise. ++ * config/arm/vfp.md (arm_movsi_vfp): Update for attribute changes. ++ * config/arm/arm-fixed.md (arm_ssatsihi_shift): Update for attribute ++ changes. ++ * config/arm/arm1020e.md (1020alu_op): Update for attribute changes. ++ (1020alu_shift_op): Likewise. ++ (1020alu_shift_reg_op): Likewise. ++ * config/arm/arm1026ejs.md (alu_op): Update for attribute changes. ++ (alu_shift_op): Likewise. ++ (alu_shift_reg_op): Likewise. ++ * config/arm/arm1136jfs.md (11_alu_op): Update for attribute changes. ++ (11_alu_shift_op): Likewise. ++ (11_alu_shift_reg_op): Likewise. ++ * config/arm/arm926ejs.md (9_alu_op): Update for attribute changes. ++ (9_alu_shift_reg_op): Likewise. ++ * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute changes. ++ (cortex_a15_alu_shift): Likewise. ++ (cortex_a15_alu_shift_reg): Likewise. ++ * config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute changes. ++ (cortex_a5_alu_shift): Likewise. ++ * config/arm/cortex-a53.md (cortex_a53_alu) : Update for attribute ++ changes. ++ (cortex_a53_alu_shift): Likewise. ++ * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute ++ changes. ++ (cortex_a7_alu_reg): Likewise. ++ (cortex_a7_alu_shift): Likewise. ++ * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute changes. ++ (cortex_a8_alu_shift): Likewise. ++ (cortex_a8_alu_shift_reg): Likewise. ++ (cortex_a8_mov): Likewise. ++ * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute changes. ++ (cortex_a9_dp_shift): Likewise. ++ * config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute changes. ++ * config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute changes. ++ (cortex_r4_mov): Likewise. ++ (cortex_r4_alu_shift): Likewise. ++ (cortex_r4_alu_shift_reg): Likewise. ++ * config/arm/fa526.md (526_alu_op): Update for attribute changes. ++ (526_alu_shift_op): Likewise. ++ * config/arm/fa606te.md (606te_alu_op): Update for attribute changes. ++ * config/arm/fa626te.md (626te_alu_op): Update for attribute changes. ++ (626te_alu_shift_op): Likewise. ++ * config/arm/fa726te.md (726te_shift_op): Update for attribute changes. ++ (726te_alu_op): Likewise. ++ (726te_alu_shift_op): Likewise. ++ (726te_alu_shift_reg_op): Likewise. ++ * config/arm/fmp626.md (mp626_alu_op): Update for attribute changes. ++ (mp626_alu_shift_op): Likewise. ++ * config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute changes. ++ (pj4_alu_e1_conds): Likewise. ++ (pj4_alu): Likewise. ++ (pj4_alu_conds): Likewise. ++ (pj4_shift): Likewise. ++ (pj4_shift_conds): Likewise. ++ (pj4_alu_shift): Likewise. ++ (pj4_alu_shift_conds): Likewise. ++ * config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute changes. ++ (cortexa7_older_only): Likewise. ++ (cortexa7_younger): Likewise. ++ ++ 2013-07-18 Sofiane Naci ++ ++ * config/arm/arm.md (attribute "insn"): Delete values "mrs", "msr", ++ "xtab" and "sat". Move value "clz" from here to ... ++ (attriubte "type"): ... here. ++ (satsi_): Delete "insn" attribute. ++ (satsi__shift): Likewise. ++ (arm_zero_extendqisi2addsi): Likewise. ++ (arm_extendqisi2addsi): Likewise. ++ (clzsi2): Update for attribute changes. ++ (rbitsi2): Likewise. ++ * config/arm/arm-fixed.md (arm_ssatsihi_shift): Delete "insn" attribute. ++ (arm_usatsihi): Likewise. ++ * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change. ++ ++ 2013-07-22 Kyrylo Tkachov ++ ++ * config/arm/predicates.md (shiftable_operator_strict_it): ++ New predicate. ++ * config/arm/thumb2.md (thumb_andsi_not_shiftsi_si): ++ Disable cond_exec version for arm_restrict_it. ++ (thumb2_smaxsi3): Convert to generate cond_exec. ++ (thumb2_sminsi3): Likewise. ++ (thumb32_umaxsi3): Likewise. ++ (thumb2_uminsi3): Likewise. ++ (thumb2_abssi2): Adjust constraints for arm_restrict_it. ++ (thumb2_neg_abssi2): Likewise. ++ (thumb2_mov_scc): Add alternative for 16-bit encoding. ++ (thumb2_movsicc_insn): Adjust alternatives. ++ (thumb2_mov_negscc): Disable for arm_restrict_it. ++ (thumb2_mov_negscc_strict_it): New pattern. ++ (thumb2_mov_notscc_strict_it): New pattern. ++ (thumb2_mov_notscc): Disable for arm_restrict_it. ++ (thumb2_ior_scc): Likewise. ++ (thumb2_ior_scc_strict_it): New pattern. ++ (thumb2_cond_move): Adjust for arm_restrict_it. ++ (thumb2_cond_arith): Disable for arm_restrict_it. ++ (thumb2_cond_arith_strict_it): New pattern. ++ (thumb2_cond_sub): Adjust for arm_restrict_it. ++ (thumb2_movcond): Likewise. ++ (thumb2_extendqisi_v6): Disable cond_exec variant for arm_restrict_it. ++ (thumb2_zero_extendhisi2_v6): Likewise. ++ (thumb2_zero_extendqisi2_v6): Likewise. ++ (orsi_notsi_si): Likewise. ++ (orsi_not_shiftsi_si): Likewise. ++ ++ 2013-07-22 Sofiane Naci ++ ++ * config/arm/arm.md (attribute "insn"): Delete. ++ (attribute "type"): Add "mov_imm", "mov_reg", "mov_shift", ++ "mov_shift_reg", "mvn_imm", "mvn_reg", "mvn_shift" and "mvn_shift_reg". ++ (not_shiftsi): Update for attribute change. ++ (not_shiftsi_compare0): Likewise. ++ (not_shiftsi_compare0_scratch): Likewise. ++ (arm_one_cmplsi2): Likewise. ++ (thumb1_one_cmplsi2): Likewise. ++ (notsi_compare0): Likewise. ++ (notsi_compare0_scratch): Likewise. ++ (thumb1_movdi_insn): Likewise. ++ (arm_movsi_insn): Likewise. ++ (movhi_insn_arch4): Likewise. ++ (movhi_bytes): Likewise. ++ (arm_movqi_insn): Likewise. ++ (thumb1_movqi_insn): Likewise. ++ (arm32_movhf): Likewise. ++ (thumb1_movhf): Likewise. ++ (arm_movsf_soft_insn): Likewise. ++ (thumb1_movsf_insn): Likewise. ++ (thumb_movdf_insn): Likewise. ++ (movsicc_insn): Likewise. ++ (movsfcc_soft_insn): Likewise. ++ (and_scc): Likewise. ++ (cond_move): Likewise. ++ (if_move_not): Likewise. ++ (if_not_move): Likewise. ++ (if_shift_move): Likewise. ++ (if_move_shift): Likewise. ++ (if_shift_shift): Likewise. ++ (if_not_arith): Likewise. ++ (if_arith_not): Likewise. ++ (cond_move_not): Likewise. ++ * config/arm/neon.md (neon_mov): Update for attribute change. ++ (neon_mov): Likewise. ++ * config/arm/vfp.md (arm_movsi_vfp): Update for attribute change. ++ (thumb2_movsi_vfp): Likewise. ++ (movsf_vfp): Likewise. ++ (thumb2_movsf_vfp): Likewise. ++ * config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute change. ++ (cortexa7_older_only): Likewise. ++ (cortexa7_younger): Likewise. ++ * config/arm/arm1020e.md (1020alu_op): Update for attribute change. ++ (1020alu_shift_op): Likewise. ++ (1020alu_shift_reg_op): Likewise. ++ * config/arm/arm1026ejs.md (alu_op): Update for attribute change. ++ (alu_shift_op): Likewise. ++ (alu_shift_reg_op): Likewise. ++ * config/arm/arm1136jfs.md (11_alu_op): Update for attribute change. ++ (11_alu_shift_op): Likewise. ++ (11_alu_shift_reg_op): Likewise. ++ * config/arm/arm926ejs.md (9_alu_op): Update for attribute change. ++ (9_alu_shift_reg_op): Likewise. ++ * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute change. ++ (cortex_a15_alu_shift): Likewise. ++ (cortex_a15_alu_shift_reg): Likewise. ++ * config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute change. ++ (cortex_a5_alu_shift): Likewise. ++ * config/arm/cortex-a53.md (cortex_a53_alu): Update for attribute change. ++ (cortex_a53_alu_shift): Likewise. ++ * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute change. ++ (cortex_a7_alu_reg): Likewise. ++ (cortex_a7_alu_shift): Likewise. ++ * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change. ++ (cortex_a8_alu_shift): Likewise. ++ (cortex_a8_alu_shift_reg): Likewise. ++ (cortex_a8_mov): Likewise. ++ * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute change. ++ (cortex_a9_dp_shift): Likewise. ++ * config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute change. ++ * config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute change. ++ (cortex_r4_mov): Likewise. ++ (cortex_r4_alu_shift): Likewise. ++ (cortex_r4_alu_shift_reg): Likewise. ++ * config/arm/fa526.md (526_alu_op): Update for attribute change. ++ (526_alu_shift_op): Likewise. ++ * config/arm/fa606te.md (606te_alu_op): Update for attribute change. ++ * config/arm/fa626te.md (626te_alu_op): Update for attribute change. ++ (626te_alu_shift_op): Likewise. ++ * config/arm/fa726te.md (726te_shift_op): Update for attribute change. ++ (726te_alu_op): Likewise. ++ (726te_alu_shift_op): Likewise. ++ (726te_alu_shift_reg_op): Likewise. ++ * config/arm/fmp626.md (mp626_alu_op): Update for attribute change. ++ (mp626_alu_shift_op): Likewise. ++ * config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute change. ++ (pj4_alu_e1_conds): Likewise. ++ (pj4_alu): Likewise. ++ (pj4_alu_conds): Likewise. ++ (pj4_shift): Likewise. ++ (pj4_shift_conds): Likewise. ++ (pj4_alu_shift): Likewise. ++ (pj4_alu_shift_conds): Likewise. ++ ++ 2013-07-22 Kyrylo Tkachov ++ ++ * config/arm/constraints.md (Pd): Allow TARGET_THUMB ++ instead of TARGET_THUMB1. ++ (Pz): New constraint. ++ * config/arm/arm.md (arm_addsi3): Add alternatives for 16-bit ++ encodings. ++ (compare_negsi_si): Likewise. ++ (compare_addsi2_op0): Likewise. ++ (compare_addsi2_op1): Likewise. ++ (addsi3_carryin_): Likewise. ++ (addsi3_carryin_alt2_): Likewise. ++ (addsi3_carryin_shift_): Disable cond_exec variant ++ for arm_restrict_it. ++ (subsi3_carryin): Likewise. ++ (arm_subsi3_insn): Add alternatives for 16-bit encoding. ++ (minmax_arithsi): Disable for arm_restrict_it. ++ (minmax_arithsi_non_canon): Adjust for arm_restrict_it. ++ (satsi_): Disable cond_exec variant for arm_restrict_it. ++ (satsi__shift): Likewise. ++ (arm_shiftsi3): Add alternative for 16-bit encoding. ++ (arm32_movhf): Disable for arm_restrict_it. ++ (arm_cmpdi_unsigned): Add alternatives for 16-bit encoding. ++ (arm_movtas_ze): Disable cond_exec variant for arm_restrict_it. ++ ++2013-09-09 Kugan Vivekanandarajah ++ ++ Backport from trunk r201412. ++ 2013-08-01 Kyrylo Tkachov ++ ++ * config/arm/arm.md (minmax_arithsi_non_canon): Emit canonical RTL form ++ when subtracting a constant. ++ ++2013-09-05 Yvan Roux ++ ++ Backport from trunk r201249. ++ 2013-07-25 Kyrylo Tkachov ++ ++ * config/arm/arm-fixed.md (ssmulsa3, usmulusa3): ++ Adjust for arm_restrict_it. ++ Remove trailing whitespace. ++ ++2013-09-05 Yvan Roux ++ ++ Backport from trunk r201342. ++ 2013-07-30 Richard Earnshaw ++ ++ * config.gcc (arm): Require 64-bit host-wide-int for all ARM target ++ configs. ++ ++2013-09-05 Christophe Lyon ++ ++ Backport from trunk r199527,199792,199814. ++ 2013-05-31 Kyrylo Tkachov ++ ++ PR target/56315 ++ * config/arm/arm.c (const_ok_for_dimode_op): Handle IOR. ++ * config/arm/arm.md (*iordi3_insn): Change to insn_and_split. ++ * config/arm/neon.md (iordi3_neon): Remove. ++ (neon_vorr): Generate iordi3 instead of iordi3_neon. ++ * config/arm/predicates.md (imm_for_neon_logic_operand): ++ Move to earlier in the file. ++ (neon_logic_op2): Likewise. ++ (arm_iordi_operand_neon): New predicate. ++ ++ 2013-06-07 Kyrylo Tkachov ++ ++ * config/arm/constraints.md (Df): New constraint. ++ * config/arm/arm.md (iordi3_insn): Use Df constraint instead of De. ++ Correct length attribute for last two alternatives. ++ ++ 2013-06-07 Kyrylo Tkachov ++ ++ PR target/56315 ++ * config/arm/arm.md (*xordi3_insn): Change to insn_and_split. ++ (xordi3): Change operand 2 constraint to arm_xordi_operand. ++ * config/arm/arm.c (const_ok_for_dimode_op): Handle XOR. ++ * config/arm/constraints.md (Dg): New constraint. ++ * config/arm/neon.md (xordi3_neon): Remove. ++ (neon_veor): Generate xordi3 instead of xordi3_neon. ++ * config/arm/predicates.md (arm_xordi_operand): New predicate. ++ ++2013-09-05 Christophe Lyon ++ ++ Backport from trunk r201599. ++ 2013-08-08 Richard Earnshaw ++ ++ PR target/57431 ++ * arm/neon.md (neon_vld1_dupdi): New expand pattern. ++ (neon_vld1_dup VD iterator): Iterate over VD not VDX. ++ ++2013-09-05 Christophe Lyon ++ ++ Backport from trunk r201589. ++ 2013-08-08 Bernd Edlinger ++ ++ PR target/58065 ++ * config/arm/arm.h (MALLOC_ABI_ALIGNMENT): Define. ++ ++2013-09-03 Venkataramanan Kumar ++ ++ Backport from trunk ++ r201624, r201666. ++ 2013-08-09 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd-builtins.def (get_lane_signed): Remove. ++ (get_lane_unsigned): Likewise. ++ (dup_lane_scalar): Likewise. ++ (get_lane): enable for VALL. ++ * config/aarch64/aarch64-simd.md ++ (aarch64_dup_lane_scalar): Remove. ++ (aarch64_get_lane_signed): Likewise. ++ (aarch64_get_lane_unsigned): Likewise. ++ (aarch64_get_lane_extend): New. ++ (aarch64_get_lane_zero_extendsi): Likewise. ++ (aarch64_get_lane): Enable for all vector modes. ++ (aarch64_get_lanedi): Remove misleading constraints. ++ * config/aarch64/arm_neon.h ++ (__aarch64_vget_lane_any): Define. ++ (__aarch64_vget_lane_<8,16,32,64>): Likewise. ++ (vget_lane_<8,16,32,64>): Use __aarch64_vget_lane macros. ++ (vdup_lane_<8,16,32,64>): Likewise. ++ * config/aarch64/iterators.md (VDQQH): New. ++ (VDQQHS): Likewise. ++ (vwcore): Likewise. ++ ++ 2013-08-12 James Greenhalgh ++ ++ * config/aarch64/arm_none.h ++ (vdup_lane_<8,16,32,64>): Fix macro call. ++ ++2013-08-26 Kugan Vivekanandarajah ++ ++ Backport from trunk r201341. ++ 2013-07-30 Richard Earnshaw ++ ++ * arm.md (mulhi3): New expand pattern. ++ ++2013-08-16 Christophe Lyon ++ ++ * LINARO-VERSION: Bump version. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ * LINARO-VERSION: Update. ++ ++2013-08-08 Christophe Lyon ++ ++ Backport from trunk ++ r198489,200167,200199,200510,200513,200515,200576. ++ 2013-05-01 Greta Yorsh ++ ++ * config/arm/thumb2.md (thumb2_smaxsi3,thumb2_sminsi3): Convert ++ define_insn to define_insn_and_split. ++ (thumb32_umaxsi3,thumb2_uminsi3): Likewise. ++ (thumb2_negdi2,thumb2_abssi2,thumb2_neg_abssi2): Likewise. ++ (thumb2_mov_scc,thumb2_mov_negscc,thumb2_mov_notscc): Likewise. ++ (thumb2_movsicc_insn,thumb2_and_scc,thumb2_ior_scc): Likewise. ++ (thumb2_negscc): Likewise. ++ ++ 2013-06-18 Sofiane Naci ++ ++ * config/arm/arm.md (attribute "insn"): Move multiplication and division ++ attributes to... ++ (attribute "type"): ... here. Remove mult. ++ (attribute "mul32"): New attribute. ++ (attribute "mul64"): Add umaal. ++ (*arm_mulsi3): Update attributes. ++ (*arm_mulsi3_v6): Likewise. ++ (*thumb_mulsi3): Likewise. ++ (*thumb_mulsi3_v6): Likewise. ++ (*mulsi3_compare0): Likewise. ++ (*mulsi3_compare0_v6): Likewise. ++ (*mulsi_compare0_scratch): Likewise. ++ (*mulsi_compare0_scratch_v6): Likewise. ++ (*mulsi3addsi): Likewise. ++ (*mulsi3addsi_v6): Likewise. ++ (*mulsi3addsi_compare0): Likewise. ++ (*mulsi3addsi_compare0_v6): Likewise. ++ (*mulsi3addsi_compare0_scratch): Likewise. ++ (*mulsi3addsi_compare0_scratch_v6): Likewise. ++ (*mulsi3subsi): Likewise. ++ (*mulsidi3adddi): Likewise. ++ (*mulsi3addsi_v6): Likewise. ++ (*mulsidi3adddi_v6): Likewise. ++ (*mulsidi3_nov6): Likewise. ++ (*mulsidi3_v6): Likewise. ++ (*umulsidi3_nov6): Likewise. ++ (*umulsidi3_v6): Likewise. ++ (*umulsidi3adddi): Likewise. ++ (*umulsidi3adddi_v6): Likewise. ++ (*smulsi3_highpart_nov6): Likewise. ++ (*smulsi3_highpart_v6): Likewise. ++ (*umulsi3_highpart_nov6): Likewise. ++ (*umulsi3_highpart_v6): Likewise. ++ (mulhisi3): Likewise. ++ (*mulhisi3tb): Likewise. ++ (*mulhisi3bt): Likewise. ++ (*mulhisi3tt): Likewise. ++ (maddhisi4): Likewise. ++ (*maddhisi4tb): Likewise. ++ (*maddhisi4tt): Likewise. ++ (maddhidi4): Likewise. ++ (*maddhidi4tb): Likewise. ++ (*maddhidi4tt): Likewise. ++ (divsi3): Likewise. ++ (udivsi3): Likewise. ++ * config/arm/thumb2.md (thumb2_mulsi_short): Update attributes. ++ (thumb2_mulsi_short_compare0): Likewise. ++ (thumb2_mulsi_short_compare0_scratch): Likewise. ++ * config/arm/arm1020e.md (1020mult1): Update attribute change. ++ (1020mult2): Likewise. ++ (1020mult3): Likewise. ++ (1020mult4): Likewise. ++ (1020mult5): Likewise. ++ (1020mult6): Likewise. ++ * config/arm/cortex-a15.md (cortex_a15_mult32): Update attribute change. ++ (cortex_a15_mult64): Likewise. ++ (cortex_a15_sdiv): Likewise. ++ (cortex_a15_udiv): Likewise. ++ * config/arm/arm1026ejs.md (mult1): Update attribute change. ++ (mult2): Likewise. ++ (mult3): Likewise. ++ (mult4): Likewise. ++ (mult5): Likewise. ++ (mult6): Likewise. ++ * config/arm/marvell-pj4.md (pj4_ir_mul): Update attribute change. ++ (pj4_ir_div): Likewise. ++ * config/arm/arm1136jfs.md (11_mult1): Update attribute change. ++ (11_mult2): Likewise. ++ (11_mult3): Likewise. ++ (11_mult4): Likewise. ++ (11_mult5): Likewise. ++ (11_mult6): Likewise. ++ (11_mult7): Likewise. ++ * config/arm/cortex-a8.md (cortex_a8_mul): Update attribute change. ++ (cortex_a8_mla): Likewise. ++ (cortex_a8_mull): Likewise. ++ (cortex_a8_smulwy): Likewise. ++ (cortex_a8_smlald): Likewise. ++ * config/arm/cortex-m4.md (cortex_m4_alu): Update attribute change. ++ * config/arm/cortex-r4.md (cortex_r4_mul_4): Update attribute change. ++ (cortex_r4_mul_3): Likewise. ++ (cortex_r4_mla_4): Likewise. ++ (cortex_r4_mla_3): Likewise. ++ (cortex_r4_smlald): Likewise. ++ (cortex_r4_mull): Likewise. ++ (cortex_r4_sdiv): Likewise. ++ (cortex_r4_udiv): Likewise. ++ * config/arm/cortex-a7.md (cortex_a7_mul): Update attribute change. ++ (cortex_a7_idiv): Likewise. ++ * config/arm/arm926ejs.md (9_mult1): Update attribute change. ++ (9_mult2): Likewise. ++ (9_mult3): Likewise. ++ (9_mult4): Likewise. ++ (9_mult5): Likewise. ++ (9_mult6): Likewise. ++ * config/arm/cortex-a53.md (cortex_a53_mul): Update attribute change. ++ (cortex_a53_sdiv): Likewise. ++ (cortex_a53_udiv): Likewise. ++ * config/arm/fa726te.md (726te_mult_op): Update attribute change. ++ * config/arm/fmp626.md (mp626_mult1): Update attribute change. ++ (mp626_mult2): Likewise. ++ (mp626_mult3): Likewise. ++ (mp626_mult4): Likewise. ++ * config/arm/fa526.md (526_mult1): Update attribute change. ++ (526_mult2): Likewise. ++ * config/arm/arm-generic.md (mult): Update attribute change. ++ (mult_ldsched_strongarm): Likewise. ++ (mult_ldsched): Likewise. ++ (multi_cycle): Likewise. ++ * config/arm/cortex-a5.md (cortex_a5_mul): Update attribute change. ++ * config/arm/fa606te.md (606te_mult1): Update attribute change. ++ (606te_mult2): Likewise. ++ (606te_mult3): Likewise. ++ (606te_mult4): Likewise. ++ * config/arm/cortex-a9.md (cortex_a9_mult16): Update attribute change. ++ (cortex_a9_mac16): Likewise. ++ (cortex_a9_multiply): Likewise. ++ (cortex_a9_mac): Likewise. ++ (cortex_a9_multiply_long): Likewise. ++ * config/arm/fa626te.md (626te_mult1): Update attribute change. ++ (626te_mult2): Likewise. ++ (626te_mult3): Likewise. ++ (626te_mult4): Likewise. ++ ++ 2013-06-19 Sofiane Naci ++ ++ * config/arm/vfp.md: Move VFP instruction classification documentation ++ to ... ++ * config/arm/arm.md: ... here. Update instruction classification ++ documentation. ++ ++ 2013-06-28 Kyrylo Tkachov ++ ++ * config/arm/predicates.md (arm_cond_move_operator): New predicate. ++ * config/arm/arm.md (movsfcc): Use arm_cond_move_operator predicate. ++ (movdfcc): Likewise. ++ * config/arm/vfp.md (*thumb2_movsf_vfp): ++ Disable predication for arm_restrict_it. ++ (*thumb2_movsfcc_vfp): Disable for arm_restrict_it. ++ (*thumb2_movdfcc_vfp): Likewise. ++ (*abssf2_vfp, *absdf2_vfp, *negsf2_vfp, *negdf2_vfp,*addsf3_vfp, ++ *adddf3_vfp, *subsf3_vfp, *subdf3_vfpc, *divsf3_vfp,*divdf3_vfp, ++ *mulsf3_vfp, *muldf3_vfp, *mulsf3negsf_vfp, *muldf3negdf_vfp, ++ *mulsf3addsf_vfp, *muldf3adddf_vfp, *mulsf3subsf_vfp, ++ *muldf3subdf_vfp, *mulsf3negsfaddsf_vfp, *fmuldf3negdfadddf_vfp, ++ *mulsf3negsfsubsf_vfp, *muldf3negdfsubdf_vfp, *fma4, ++ *fmsub4, *fnmsub4, *fnmadd4, ++ *extendsfdf2_vfp, *truncdfsf2_vfp, *extendhfsf2, *truncsfhf2, ++ *truncsisf2_vfp, *truncsidf2_vfp, fixuns_truncsfsi2, fixuns_truncdfsi2, ++ *floatsisf2_vfp, *floatsidf2_vfp, floatunssisf2, floatunssidf2, ++ *sqrtsf2_vfp, *sqrtdf2_vfp, *cmpsf_vfp, *cmpsf_trap_vfp, *cmpdf_vfp, ++ *cmpdf_trap_vfp, 2): ++ Disable predication for arm_restrict_it. ++ ++ 2013-06-28 Kyrylo Tkachov ++ ++ * config/arm/arm.md (arm_mulsi3_v6): Add alternative for 16-bit ++ encoding. ++ (mulsi3addsi_v6): Disable predicable variant for arm_restrict_it. ++ (mulsi3subsi): Likewise. ++ (mulsidi3adddi): Likewise. ++ (mulsidi3_v6): Likewise. ++ (umulsidi3_v6): Likewise. ++ (umulsidi3adddi_v6): Likewise. ++ (smulsi3_highpart_v6): Likewise. ++ (umulsi3_highpart_v6): Likewise. ++ (mulhisi3tb): Likewise. ++ (mulhisi3bt): Likewise. ++ (mulhisi3tt): Likewise. ++ (maddhisi4): Likewise. ++ (maddhisi4tb): Likewise. ++ (maddhisi4tt): Likewise. ++ (maddhidi4): Likewise. ++ (maddhidi4tb): Likewise. ++ (maddhidi4tt): Likewise. ++ (zeroextractsi_compare0_scratch): Likewise. ++ (insv_zero): Likewise. ++ (insv_t2): Likewise. ++ (anddi_notzesidi_di): Likewise. ++ (anddi_notsesidi_di): Likewise. ++ (andsi_notsi_si): Likewise. ++ (iordi_zesidi_di): Likewise. ++ (xordi_zesidi_di): Likewise. ++ (andsi_iorsi3_notsi): Likewise. ++ (smax_0): Likewise. ++ (smax_m1): Likewise. ++ (smin_0): Likewise. ++ (not_shiftsi): Likewise. ++ (unaligned_loadsi): Likewise. ++ (unaligned_loadhis): Likewise. ++ (unaligned_loadhiu): Likewise. ++ (unaligned_storesi): Likewise. ++ (unaligned_storehi): Likewise. ++ (extv_reg): Likewise. ++ (extzv_t2): Likewise. ++ (divsi3): Likewise. ++ (udivsi3): Likewise. ++ (arm_zero_extendhisi2addsi): Likewise. ++ (arm_zero_extendqisi2addsi): Likewise. ++ (compareqi_eq0): Likewise. ++ (arm_extendhisi2_v6): Likewise. ++ (arm_extendqisi2addsi): Likewise. ++ (arm_movt): Likewise. ++ (thumb2_ldrd): Likewise. ++ (thumb2_ldrd_base): Likewise. ++ (thumb2_ldrd_base_neg): Likewise. ++ (thumb2_strd): Likewise. ++ (thumb2_strd_base): Likewise. ++ (thumb2_strd_base_neg): Likewise. ++ (arm_negsi2): Add alternative for 16-bit encoding. ++ (arm_one_cmplsi2): Likewise. ++ ++ 2013-06-28 Kyrylo Tkachov ++ ++ * config/arm/constraints.md (Ts): New constraint. ++ * config/arm/arm.md (arm_movqi_insn): Add alternatives for ++ 16-bit encodings. ++ (compare_scc): Use "Ts" constraint for operand 0. ++ (ior_scc_scc): Likewise. ++ (and_scc_scc): Likewise. ++ (and_scc_scc_nodom): Likewise. ++ (ior_scc_scc_cmp): Likewise for operand 7. ++ (and_scc_scc_cmp): Likewise. ++ * config/arm/thumb2.md (thumb2_movsi_insn): ++ Add alternatives for 16-bit encodings. ++ (thumb2_movhi_insn): Likewise. ++ (thumb2_movsicc_insn): Likewise. ++ (thumb2_and_scc): Take 'and' outside cond_exec. Use "Ts" constraint. ++ (thumb2_negscc): Use "Ts" constraint. ++ Move mvn instruction outside cond_exec block. ++ * config/arm/vfp.md (thumb2_movsi_vfp): Add alternatives ++ for 16-bit encodings. ++ ++ 2013-07-01 Sofiane Naci ++ ++ * arm.md (attribute "wtype"): Delete. Move attribute values from here ++ to ... ++ (attribute "type"): ... here, and prefix with "wmmx_". ++ (attribute "core_cycles"): Update for attribute changes. ++ * iwmmxt.md (tbcstv8qi): Update for attribute changes. ++ (tbcstv4hi): Likewise. ++ (tbcstv2si): Likewise. ++ (iwmmxt_iordi3): Likewise. ++ (iwmmxt_xordi3): Likewise. ++ (iwmmxt_anddi3): Likewise. ++ (iwmmxt_nanddi3): Likewise. ++ (iwmmxt_arm_movdi): Likewise. ++ (iwmmxt_movsi_insn): Likewise. ++ (mov_internal): Likewise. ++ (and3_iwmmxt): Likewise. ++ (ior3_iwmmxt): Likewise. ++ (xor3_iwmmxt): Likewise. ++ (add3_iwmmxt): Likewise. ++ (ssaddv8qi3): Likewise. ++ (ssaddv4hi3): Likewise. ++ (ssaddv2si3): Likewise. ++ (usaddv8qi3): Likewise. ++ (usaddv4hi3): Likewise. ++ (usaddv2si3): Likewise. ++ (sub3_iwmmxt): Likewise. ++ (sssubv8qi3): Likewise. ++ (sssubv4hi3): Likewise. ++ (sssubv2si3): Likewise. ++ (ussubv8qi3): Likewise. ++ (ussubv4hi3): Likewise. ++ (ussubv2si3): Likewise. ++ (mulv4hi3_iwmmxt): Likewise. ++ (smulv4hi3_highpart): Likewise. ++ (umulv4hi3_highpart): Likewise. ++ (iwmmxt_wmacs): Likewise. ++ (iwmmxt_wmacsz): Likewise. ++ (iwmmxt_wmacu): Likewise. ++ (iwmmxt_wmacuz): Likewise. ++ (iwmmxt_clrdi): Likewise. ++ (iwmmxt_clrv8qi): Likewise. ++ (iwmmxt_clr4hi): Likewise. ++ (iwmmxt_clr2si): Likewise. ++ (iwmmxt_uavgrndv8qi3): Likewise. ++ (iwmmxt_uavgrndv4hi3): Likewise. ++ (iwmmxt_uavgv8qi3): Likewise. ++ (iwmmxt_uavgv4hi3): Likewise. ++ (iwmmxt_tinsrb): Likewise. ++ (iwmmxt_tinsrh): Likewise. ++ (iwmmxt_tinsrw): Likewise. ++ (iwmmxt_textrmub): Likewise. ++ (iwmmxt_textrmsb): Likewise. ++ (iwmmxt_textrmuh): Likewise. ++ (iwmmxt_textrmsh): Likewise. ++ (iwmmxt_textrmw): Likewise. ++ (iwmxxt_wshufh): Likewise. ++ (eqv8qi3): Likewise. ++ (eqv4hi3): Likewise. ++ (eqv2si3): Likewise. ++ (gtuv8qi3): Likewise. ++ (gtuv4hi3): Likewise. ++ (gtuv2si3): Likewise. ++ (gtv8qi3): Likewise. ++ (gtv4hi3): Likewise. ++ (gtv2si3): Likewise. ++ (smax3_iwmmxt): Likewise. ++ (umax3_iwmmxt): Likewise. ++ (smin3_iwmmxt): Likewise. ++ (umin3_iwmmxt): Likewise. ++ (iwmmxt_wpackhss): Likewise. ++ (iwmmxt_wpackwss): Likewise. ++ (iwmmxt_wpackdss): Likewise. ++ (iwmmxt_wpackhus): Likewise. ++ (iwmmxt_wpackwus): Likewise. ++ (iwmmxt_wpackdus): Likewise. ++ (iwmmxt_wunpckihb): Likewise. ++ (iwmmxt_wunpckihh): Likewise. ++ (iwmmxt_wunpckihw): Likewise. ++ (iwmmxt_wunpckilb): Likewise. ++ (iwmmxt_wunpckilh): Likewise. ++ (iwmmxt_wunpckilw): Likewise. ++ (iwmmxt_wunpckehub): Likewise. ++ (iwmmxt_wunpckehuh): Likewise. ++ (iwmmxt_wunpckehuw): Likewise. ++ (iwmmxt_wunpckehsb): Likewise. ++ (iwmmxt_wunpckehsh): Likewise. ++ (iwmmxt_wunpckehsw): Likewise. ++ (iwmmxt_wunpckelub): Likewise. ++ (iwmmxt_wunpckeluh): Likewise. ++ (iwmmxt_wunpckeluw): Likewise. ++ (iwmmxt_wunpckelsb): Likewise. ++ (iwmmxt_wunpckelsh): Likewise. ++ (iwmmxt_wunpckelsw): Likewise. ++ (ror3): Likewise. ++ (ashr3_iwmmxt): Likewise. ++ (lshr3_iwmmxt): Likewise. ++ (ashl3_iwmmxt): Likewise. ++ (ror3_di): Likewise. ++ (ashr3_di): Likewise. ++ (lshr3_di): Likewise. ++ (ashl3_di): Likewise. ++ (iwmmxt_wmadds): Likewise. ++ (iwmmxt_wmaddu): Likewise. ++ (iwmmxt_tmia): Likewise. ++ (iwmmxt_tmiaph): Likewise. ++ (iwmmxt_tmiabb): Likewise. ++ (iwmmxt_tmiatb): Likewise. ++ (iwmmxt_tmiabt): Likewise. ++ (iwmmxt_tmiatt): Likewise. ++ (iwmmxt_tmovmskb): Likewise. ++ (iwmmxt_tmovmskh): Likewise. ++ (iwmmxt_tmovmskw): Likewise. ++ (iwmmxt_waccb): Likewise. ++ (iwmmxt_wacch): Likewise. ++ (iwmmxt_waccw): Likewise. ++ (iwmmxt_waligni): Likewise. ++ (iwmmxt_walignr): Likewise. ++ (iwmmxt_walignr0): Likewise. ++ (iwmmxt_walignr1): Likewise. ++ (iwmmxt_walignr2): Likewise. ++ (iwmmxt_walignr3): Likewise. ++ (iwmmxt_wsadb): Likewise. ++ (iwmmxt_wsadh): Likewise. ++ (iwmmxt_wsadbz): Likewise. ++ (iwmmxt_wsadhz): Likewise. ++ * iwmmxt2.md (iwmmxt_wabs3): Update for attribute changes. ++ (iwmmxt_wabsdiffb): Likewise. ++ (iwmmxt_wabsdiffh): Likewise. ++ (iwmmxt_wabsdiffw): Likewise. ++ (iwmmxt_waddsubhx): Likewise ++ (iwmmxt_wsubaddhx): Likewise. ++ (addc3): Likewise. ++ (iwmmxt_avg4): Likewise. ++ (iwmmxt_avg4r): Likewise. ++ (iwmmxt_wmaddsx): Likewise. ++ (iwmmxt_wmaddux): Likewise. ++ (iwmmxt_wmaddsn): Likewise. ++ (iwmmxt_wmaddun): Likewise. ++ (iwmmxt_wmulwsm): Likewise. ++ (iwmmxt_wmulwum): Likewise. ++ (iwmmxt_wmulsmr): Likewise. ++ (iwmmxt_wmulumr): Likewise. ++ (iwmmxt_wmulwsmr): Likewise. ++ (iwmmxt_wmulwumr): Likewise. ++ (iwmmxt_wmulwl): Likewise. ++ (iwmmxt_wqmulm): Likewise. ++ (iwmmxt_wqmulwm): Likewise. ++ (iwmmxt_wqmulmr): Likewise. ++ (iwmmxt_wqmulwmr): Likewise. ++ (iwmmxt_waddbhusm): Likewise. ++ (iwmmxt_waddbhusl): Likewise. ++ (iwmmxt_wqmiabb): Likewise. ++ (iwmmxt_wqmiabt): Likewise. ++ (iwmmxt_wqmiatb): Likewise. ++ (iwmmxt_wqmiatt): Likewise. ++ (iwmmxt_wqmiabbn): Likewise. ++ (iwmmxt_wqmiabtn): Likewise. ++ (iwmmxt_wqmiatbn): Likewise. ++ (iwmmxt_wqmiattn): Likewise. ++ (iwmmxt_wmiabb): Likewise. ++ (iwmmxt_wmiabt): Likewise. ++ (iwmmxt_wmiatb): Likewise. ++ (iwmmxt_wmiatt): Likewise. ++ (iwmmxt_wmiabbn): Likewise. ++ (iwmmxt_wmiabtn): Likewise. ++ (iwmmxt_wmiatbn): Likewise. ++ (iwmmxt_wmiattn): Likewise. ++ (iwmmxt_wmiawbb): Likewise. ++ (iwmmxt_wmiawbt): Likewise. ++ (iwmmxt_wmiawtb): Likewise. ++ (iwmmxt_wmiawtt): Likewise. ++ (iwmmxt_wmiawbbn): Likewise. ++ (iwmmxt_wmiawbtn): Likewise. ++ (iwmmxt_wmiawtbn): Likewise. ++ (iwmmxt_wmiawttn): Likewise. ++ (iwmmxt_wmerge): Likewise. ++ (iwmmxt_tandc3): Likewise. ++ (iwmmxt_torc3): Likewise. ++ (iwmmxt_torvsc3): Likewise. ++ (iwmmxt_textrc3): Likewise. ++ * marvell-f-iwmmxt.md (wmmxt_shift): Update for attribute changes. ++ (wmmxt_pack): Likewise. ++ (wmmxt_mult_c1): Likewise. ++ (wmmxt_mult_c2): Likewise. ++ (wmmxt_alu_c1): Likewise. ++ (wmmxt_alu_c2): Likewise. ++ (wmmxt_alu_c3): Likewise. ++ (wmmxt_transfer_c1): Likewise. ++ (wmmxt_transfer_c2): Likewise. ++ (wmmxt_transfer_c3): Likewise. ++ (marvell_f_iwmmxt_wstr): Likewise. ++ (marvell_f_iwmmxt_wldr): Likewise. ++ ++2013-08-07 Christophe Lyon ++ ++ Backport from trunk r201237. ++ 2013-07-25 Terry Guo ++ ++ * config/arm/arm.c (thumb1_size_rtx_costs): Assign proper cost for ++ shift_add/shift_sub0/shift_sub1 RTXs. ++ ++2013-08-06 Christophe Lyon ++ ++ Backport from trunk r200596,201067,201083. ++ 2013-07-02 Ian Bolton ++ ++ * config/aarch64/aarch64-simd.md (absdi2): Support abs for ++ DI mode. ++ ++ 2013-07-19 Ian Bolton ++ ++ * config/aarch64/arm_neon.h (vabs_s64): New function ++ ++ 2013-07-20 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_fold_builtin): Fold abs in all modes. ++ * config/aarch64/aarch64-simd-builtins.def ++ (abs): Enable for all modes. ++ * config/aarch64/arm_neon.h ++ (vabs_s<8,16,32,64): Rewrite using builtins. ++ (vabs_f64): Add missing intrinsic. ++ ++2013-08-06 Christophe Lyon ++ ++ Backport from trunk r198735,198831,199959. ++ 2013-05-09 Sofiane Naci ++ ++ * config/aarch64/aarch64.md: New movtf split. ++ (*movtf_aarch64): Update. ++ (aarch64_movdi_tilow): Handle TF modes and rename to ++ aarch64_movdi_low. ++ (aarch64_movdi_tihigh): Handle TF modes and rename to ++ aarch64_movdi_high ++ (aarch64_movtihigh_di): Handle TF modes and rename to ++ aarch64_movhigh_di ++ (aarch64_movtilow_di): Handle TF modes and rename to ++ aarch64_movlow_di ++ (aarch64_movtilow_tilow): Remove spurious whitespace. ++ * config/aarch64/aarch64.c (aarch64_split_128bit_move): Handle TFmode ++ splits. ++ (aarch64_print_operand): Update. ++ ++ 2013-05-13 Sofiane Naci ++ ++ * config/aarch64/aarch64-simd.md (aarch64_simd_mov): Group ++ similar switch cases. ++ (aarch64_simd_mov): Rename to aarch64_split_simd_mov. Update. ++ (aarch64_simd_mov_to_low): Delete. ++ (aarch64_simd_mov_to_high): Delete. ++ (move_lo_quad_): Add w<-r alternative. ++ (aarch64_simd_move_hi_quad_): Likewise. ++ (aarch64_simd_mov_from_*): Update type attribute. ++ * config/aarch64/aarch64.c (aarch64_split_simd_move): Refacror switch ++ statement. ++ ++ 2013-06-11 Sofiane Naci ++ ++ * config/aarch64/aarch64-simd.md (move_lo_quad_): Update. ++ ++2013-08-06 Christophe Lyon ++ ++ Backport from trunk r199438,199439,201326. ++ ++ 2013-05-30 Zhenqiang Chen ++ ++ * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): New added. ++ (arm_emit_multi_reg_pop): Add REG_CFA_ADJUST_CFA notes. ++ (arm_emit_vfp_multi_reg_pop): Likewise. ++ (thumb2_emit_ldrd_pop): Likewise. ++ (arm_expand_epilogue): Add misc REG_CFA notes. ++ (arm_unwind_emit): Skip REG_CFA_ADJUST_CFA and REG_CFA_RESTORE. ++ ++ 2013-05-30 Bernd Schmidt ++ Zhenqiang Chen ++ ++ * config/arm/arm-protos.h: Add and update function protos. ++ * config/arm/arm.c (use_simple_return_p): New added. ++ (thumb2_expand_return): Check simple_return flag. ++ * config/arm/arm.md: Add simple_return and conditional simple_return. ++ * config/arm/iterators.md: Add iterator for return and simple_return. ++ ++ 2013-07-30 Zhenqiang Chen ++ ++ PR rtl-optimization/57637 ++ * function.c (move_insn_for_shrink_wrap): Also check the ++ GEN set of the LIVE problem for the liveness analysis ++ if it exists, otherwise give up. ++ ++2013-08-06 Christophe Lyon ++ ++ Backport from trunk r198928,198973,199203,201240,201241,201307. ++ 2013-05-15 Ramana Radhakrishnan ++ ++ PR target/19599 ++ * config/arm/predicates.md (call_insn_operand): New predicate. ++ * config/arm/constraints.md ("Cs", "Ss"): New constraints. ++ * config/arm/arm.md (*call_insn, *call_value_insn): Match only ++ if insn is not a tail call. ++ (*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through ++ registers. ++ * config/arm/arm.h (enum reg_class): New caller save register class. ++ (REG_CLASS_NAMES): Likewise. ++ (REG_CLASS_CONTENTS): Likewise. ++ * config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling ++ without decls. ++ ++ 2013-05-16 Ramana Radhakrishnan ++ ++ PR target/19599 ++ * config/arm/arm.c (arm_function_ok_for_sibcall): Add check ++ for NULL decl. ++ ++ 2013-05-22 Ramana Radhakrishnan ++ ++ PR target/19599 ++ PR target/57340 ++ * config/arm/arm.c (any_sibcall_uses_r3): Rename to .. ++ (any_sibcall_could_use_r3): this and handle indirect calls. ++ (arm_get_frame_offsets): Rename use of any_sibcall_uses_r3. ++ ++ 2013-07-25 Ramana Radhakrishnan ++ ++ PR target/19599 ++ PR target/57731 ++ PR target/57748 ++ * config/arm/arm.md ("*sibcall_value_insn): Replace use of ++ Ss with US. Adjust output for v5 and v4t. ++ (*sibcall_value_insn): Likewise and loosen predicate on ++ operand0. ++ * config/arm/constraints.md ("Ss"): Rename to US. ++ ++ 2013-07-25 Ramana Radhakrishnan ++ ++ * config/arm/arm.md (*sibcall_insn): Remove unnecessary space. ++ ++ 2013-07-29 Ramana Radhakrishnan ++ Fix incorrect changelog entry. ++ ++ Replace ++ PR target/57748 ++ with ++ PR target/57837 ++ ++2013-08-05 Yvan Roux ++ ++ Backport from trunk r200922. ++ 2013-07-12 Tejas Belagod ++ ++ * config/aarch64/aarch64-protos.h ++ (aarch64_simd_immediate_valid_for_move): Remove. ++ * config/aarch64/aarch64.c (simd_immediate_info): New member. ++ (aarch64_simd_valid_immediate): Recognize idioms for shifting ones ++ cases. ++ (aarch64_output_simd_mov_immediate): Print the correct shift specifier. ++ ++2013-08-05 Yvan Roux ++ ++ Backport from trunk r200670. ++ 2013-07-04 Tejas Belagod ++ ++ * config/aarch64/aarch64-protos.h (cpu_vector_cost): New. ++ (tune_params): New member 'const vec_costs'. ++ * config/aarch64/aarch64.c (generic_vector_cost): New. ++ (generic_tunings): New member 'generic_vector_cost'. ++ (aarch64_builtin_vectorization_cost): New. ++ (aarch64_add_stmt_cost): New. ++ (TARGET_VECTORIZE_ADD_STMT_COST): New. ++ (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): New. ++ ++2013-08-05 Yvan Roux ++ ++ Backport from trunk r200637. ++ 2013-07-03 Yufeng Zhang ++ ++ * config/aarch64/aarch64.h (enum arm_abi_type): Remove. ++ (ARM_ABI_AAPCS64): Ditto. ++ (arm_abi): Ditto. ++ (ARM_DEFAULT_ABI): Ditto. ++ ++2013-08-05 Yvan Roux ++ ++ Backport from trunk r200532, r200565. ++ 2013-06-28 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c (aarch64_cannot_force_const_mem): Adjust ++ layout. ++ ++ 2013-06-29 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c: Remove junk from the beginning of the ++ file. ++ ++2013-08-05 Yvan Roux ++ ++ Backport from trunk r200531. ++ 2013-06-28 Marcus Shawcroft ++ ++ * config/aarch64/aarch64-protos.h (aarch64_symbol_type): ++ Update comment w.r.t SYMBOL_TINY_ABSOLUTE. ++ ++2013-08-05 Yvan Roux ++ ++ Backport from trunk r200519. ++ 2013-06-28 Marcus Shawcroft ++ ++ * config/aarch64/aarch64-protos.h ++ aarch64_classify_symbol_expression): Define. ++ (aarch64_symbolic_constant_p): Remove. ++ * config/aarch64/aarch64.c (aarch64_classify_symbol_expression): Remove ++ static. Fix line length and white space. ++ (aarch64_symbolic_constant_p): Remove. ++ * config/aarch64/predicates.md (aarch64_valid_symref): ++ Use aarch64_classify_symbol_expression. ++ ++2013-08-05 Yvan Roux ++ ++ Backport from trunk r200466, r200467. ++ 2013-06-27 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_force_temporary): Add an extra ++ parameter 'mode' of type 'enum machine_mode mode'; change to pass ++ 'mode' to force_reg. ++ (aarch64_add_offset): Update calls to aarch64_force_temporary. ++ (aarch64_expand_mov_immediate): Likewise. ++ ++ 2013-06-27 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_add_offset): Change to pass ++ 'mode' to aarch64_plus_immediate and gen_rtx_PLUS. ++ ++2013-08-05 Yvan Roux ++ ++ Backport from trunk r200419. ++ 2013-06-26 Greta Yorsh ++ ++ * config/arm/arm.h (MAX_CONDITIONAL_EXECUTE): Define macro. ++ * config/arm/arm-protos.h (arm_max_conditional_execute): New ++ declaration. ++ (tune_params): Update comment. ++ * config/arm/arm.c (arm_cortex_a15_tune): Set max_cond_insns to 2. ++ (arm_max_conditional_execute): New function. ++ (thumb2_final_prescan_insn): Use max_insn_skipped and ++ MAX_INSN_PER_IT_BLOCK to compute maximum instructions in a block. ++ ++2013-07-24 Matthew Gretton-Dann ++ ++ * LINARO-VERSION: Bump version. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ * LINARO-VERSION: Update. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ Backport from trunk r201005. ++ 2013-07-17 Yvan Roux ++ ++ PR target/57909 ++ * config/arm/arm.c (gen_movmem_ldrd_strd): Fix unaligned load/store ++ usage in HI mode. ++ ++2013-07-09 Christophe Lyon ++ ++ * LINARO-VERSION: Bump version. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ * LINARO-VERSION: Update. ++ ++2013-07-03 Christophe Lyon ++ ++ Revert backport from trunk r198928,198973,199203. ++ 2013-05-22 Ramana Radhakrishnan ++ ++ PR target/19599 ++ PR target/57340 ++ * config/arm/arm.c (any_sibcall_uses_r3): Rename to .. ++ (any_sibcall_could_use_r3): this and handle indirect calls. ++ (arm_get_frame_offsets): Rename use of any_sibcall_uses_r3. ++ ++ 2013-05-16 Ramana Radhakrishnan ++ ++ PR target/19599 ++ * config/arm/arm.c (arm_function_ok_for_sibcall): Add check ++ for NULL decl. ++ ++ 2013-05-15 Ramana Radhakrishnan ++ ++ PR target/19599 ++ * config/arm/predicates.md (call_insn_operand): New predicate. ++ * config/arm/constraints.md ("Cs", "Ss"): New constraints. ++ * config/arm/arm.md (*call_insn, *call_value_insn): Match only ++ if insn is not a tail call. ++ (*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through ++ registers. ++ * config/arm/arm.h (enum reg_class): New caller save register class. ++ (REG_CLASS_NAMES): Likewise. ++ (REG_CLASS_CONTENTS): Likewise. ++ * config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling ++ without decls. ++ ++2013-07-03 Christophe Lyon ++ ++ Revert backport from mainline (r199438, r199439) ++ 2013-05-30 Zhenqiang Chen ++ ++ * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): New added. ++ (arm_emit_multi_reg_pop): Add REG_CFA_ADJUST_CFA notes. ++ (arm_emit_vfp_multi_reg_pop): Likewise. ++ (thumb2_emit_ldrd_pop): Likewise. ++ (arm_expand_epilogue): Add misc REG_CFA notes. ++ (arm_unwind_emit): Skip REG_CFA_ADJUST_CFA and REG_CFA_RESTORE. ++ ++ 2013-05-30 Bernd Schmidt ++ Zhenqiang Chen ++ ++ * config/arm/arm-protos.h: Add and update function protos. ++ * config/arm/arm.c (use_simple_return_p): New added. ++ (thumb2_expand_return): Check simple_return flag. ++ * config/arm/arm.md: Add simple_return and conditional simple_return. ++ * config/arm/iterators.md: Add iterator for return and simple_return. ++ * gcc.dg/shrink-wrap-alloca.c: New added. ++ * gcc.dg/shrink-wrap-pretend.c: New added. ++ * gcc.dg/shrink-wrap-sibcall.c: New added. ++ ++2013-07-03 Christophe Lyon ++ ++ Backport from trunk r199640, 199705, 199733, 199734, 199739. ++ 2013-06-04 Kyrylo Tkachov ++ ++ * rtl.def: Add extra fourth optional field to define_cond_exec. ++ * gensupport.c (process_one_cond_exec): Process attributes from ++ define_cond_exec. ++ * doc/md.texi: Document fourth field in define_cond_exec. ++ ++ 2013-06-05 Kyrylo Tkachov ++ ++ * config/arm/arm.md (enabled_for_depr_it): New attribute. ++ (predicable_short_it): Likewise. ++ (predicated): Likewise. ++ (enabled): Handle above. ++ (define_cond_exec): Set predicated attribute to yes. ++ ++ 2013-06-06 Kyrylo Tkachov ++ ++ * config/arm/sync.md (atomic_loaddi_1): ++ Disable predication for arm_restrict_it. ++ (arm_load_exclusive): Likewise. ++ (arm_load_exclusivesi): Likewise. ++ (arm_load_exclusivedi): Likewise. ++ (arm_load_acquire_exclusive): Likewise. ++ (arm_load_acquire_exclusivesi): Likewise. ++ (arm_load_acquire_exclusivedi): Likewise. ++ (arm_store_exclusive): Likewise. ++ (arm_store_exclusive): Likewise. ++ (arm_store_release_exclusivedi): Likewise. ++ (arm_store_release_exclusive): Likewise. ++ ++ 2013-06-06 Kyrylo Tkachov ++ ++ * config/arm/arm-ldmstm.ml: Set "predicable_short_it" to "no" ++ where appropriate. ++ * config/arm/ldmstm.md: Regenerate. ++ ++ 2013-06-06 Kyrylo Tkachov ++ ++ * config/arm/arm-fixed.md (add3,usadd3,ssadd3, ++ sub3, ussub3, sssub3, arm_ssatsihi_shift, ++ arm_usatsihi): Adjust alternatives for arm_restrict_it. ++ ++2013-07-02 Rob Savoye ++ ++ Backport from trunk 200096 ++ ++ 2013-06-14 Vidya Praveen ++ ++ * config/aarch64/aarch64-simd.md (aarch64_mlal_lo): ++ New pattern. ++ (aarch64_mlal_hi, aarch64_mlsl_lo): Likewise. ++ (aarch64_mlsl_hi, aarch64_mlal): Likewise. ++ (aarch64_mlsl): Likewise. ++ ++2013-07-02 Rob Savoye ++ ++ Backport from trunk 200062 ++ ++ 2013-06-13 Bin Cheng ++ * fold-const.c (operand_equal_p): Consider NOP_EXPR and ++ CONVERT_EXPR as equal nodes. ++ ++2013-07-02 Rob Savoye ++ Backport from trunk 199810 ++ ++ 2013-06-07 Kyrylo Tkachov ++ ++ * config/arm/arm.md (anddi3_insn): Remove duplicate alternatives. ++ Clean up alternatives. ++ ++2013-06-20 Rob Savoye ++ ++ Backport from trunk 200152 ++ 2013-06-17 Sofiane Naci ++ ++ * config/aarch64/aarch64-simd.md (aarch64_dup_lane): Add r<-w ++ alternative and update. ++ (aarch64_dup_lanedi): Delete. ++ * config/aarch64/arm_neon.h (vdup_lane_*): Update. ++ * config/aarch64/aarch64-simd-builtins.def: Update. ++ ++2013-06-20 Rob Savoye ++ ++ Backport from trunk 200061 ++ 2013-06-13 Bin Cheng ++ ++ * rtlanal.c (noop_move_p): Check the code to be executed for ++ COND_EXEC. ++ ++2013-06-20 Rob Savoye ++ ++ Backport from trunk 199694 ++ 2013-06-05 Kyrylo Tkachov ++ ++ * config/arm/arm.c (MAX_INSN_PER_IT_BLOCK): New macro. ++ (arm_option_override): Override arm_restrict_it where appropriate. ++ (thumb2_final_prescan_insn): Use MAX_INSN_PER_IT_BLOCK. ++ * config/arm/arm.opt (mrestrict-it): New command-line option. ++ * doc/invoke.texi: Document -mrestrict-it. ++ ++2013-06-20 Christophe Lyon ++ ++ Backport from trunk r198683. ++ 2013-05-07 Christophe Lyon ++ ++ * config/arm/arm.c (arm_asan_shadow_offset): New function. ++ (TARGET_ASAN_SHADOW_OFFSET): Define. ++ * config/arm/linux-eabi.h (ASAN_CC1_SPEC): Define. ++ (LINUX_OR_ANDROID_CC): Add ASAN_CC1_SPEC. ++ ++2013-06-18 Rob Savoye ++ ++ * LINARO-VERSION: Bump version. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ * LINARO-VERSION: Update. ++ ++2013-06-06 Zhenqiang Chen ++ ++ Backport from mainline (r199438, r199439) ++ 2013-05-30 Zhenqiang Chen ++ ++ * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): New added. ++ (arm_emit_multi_reg_pop): Add REG_CFA_ADJUST_CFA notes. ++ (arm_emit_vfp_multi_reg_pop): Likewise. ++ (thumb2_emit_ldrd_pop): Likewise. ++ (arm_expand_epilogue): Add misc REG_CFA notes. ++ (arm_unwind_emit): Skip REG_CFA_ADJUST_CFA and REG_CFA_RESTORE. ++ ++ 2013-05-30 Bernd Schmidt ++ Zhenqiang Chen ++ ++ * config/arm/arm-protos.h: Add and update function protos. ++ * config/arm/arm.c (use_simple_return_p): New added. ++ (thumb2_expand_return): Check simple_return flag. ++ * config/arm/arm.md: Add simple_return and conditional simple_return. ++ * config/arm/iterators.md: Add iterator for return and simple_return. ++ * gcc.dg/shrink-wrap-alloca.c: New added. ++ * gcc.dg/shrink-wrap-pretend.c: New added. ++ * gcc.dg/shrink-wrap-sibcall.c: New added. ++ ++2013-06-06 Kugan Vivekanandarajah ++ ++ Backport from mainline r198879: ++ ++ 2013-05-14 Chung-Lin Tang ++ PR target/42017 ++ * config/arm/arm.h (EPILOGUE_USES): Only return true ++ for LR_REGNUM after epilogue_completed. ++ ++2013-06-05 Christophe Lyon ++ ++ Backport from trunk r199652,199653,199656,199657,199658. ++ ++ 2013-06-04 Ian Bolton ++ ++ * config/aarch64/aarch64.md (*mov_aarch64): Call ++ into function to generate MOVI instruction. ++ * config/aarch64/aarch64.c (aarch64_simd_container_mode): ++ New function. ++ (aarch64_preferred_simd_mode): Turn into wrapper. ++ (aarch64_output_scalar_simd_mov_immediate): New function. ++ * config/aarch64/aarch64-protos.h: Add prototype for above. ++ ++ 2013-06-04 Ian Bolton ++ ++ * config/aarch64/aarch64.c (simd_immediate_info): Remove ++ element_char member. ++ (sizetochar): Return signed char. ++ (aarch64_simd_valid_immediate): Remove elchar and other ++ unnecessary variables. ++ (aarch64_output_simd_mov_immediate): Take rtx instead of &rtx. ++ Calculate element_char as required. ++ * config/aarch64/aarch64-protos.h: Update and move prototype ++ for aarch64_output_simd_mov_immediate. ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_mov): ++ Update arguments. ++ ++ 2013-06-04 Ian Bolton ++ ++ * config/aarch64/aarch64.c (simd_immediate_info): Struct to hold ++ information completed by aarch64_simd_valid_immediate. ++ (aarch64_legitimate_constant_p): Update arguments. ++ (aarch64_simd_valid_immediate): Work with struct rather than many ++ pointers. ++ (aarch64_simd_scalar_immediate_valid_for_move): Update arguments. ++ (aarch64_simd_make_constant): Update arguments. ++ (aarch64_output_simd_mov_immediate): Work with struct rather than ++ many pointers. Output immediate directly rather than as operand. ++ * config/aarch64/aarch64-protos.h (aarch64_simd_valid_immediate): ++ Update prototype. ++ * config/aarch64/constraints.md (Dn): Update arguments. ++ ++ 2013-06-04 Ian Bolton ++ ++ * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): No ++ longer static. ++ (aarch64_simd_immediate_valid_for_move): Remove. ++ (aarch64_simd_scalar_immediate_valid_for_move): Update call. ++ (aarch64_simd_make_constant): Update call. ++ (aarch64_output_simd_mov_immediate): Update call. ++ * config/aarch64/aarch64-protos.h (aarch64_simd_valid_immediate): ++ Add prototype. ++ * config/aarch64/constraints.md (Dn): Update call. ++ ++ 2013-06-04 Ian Bolton ++ ++ * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Change ++ return type to bool for prototype. ++ (aarch64_legitimate_constant_p): Check for true instead of not -1. ++ (aarch64_simd_valid_immediate): Fix up each return to return a bool. ++ (aarch64_simd_immediate_valid_for_move): Update retval for bool. ++ ++2013-06-04 Christophe Lyon ++ ++ Backport from trunk r199261. ++ 2013-05-23 Christian Bruel ++ ++ PR debug/57351 ++ * config/arm/arm.c (arm_dwarf_register_span): Do not use dbx number. ++ ++2013-06-03 Christophe Lyon ++ ++ Backport from trunk ++ r198890,199254,199259,199260,199293,199407,199408,199454,199544,199545. ++ ++ 2013-05-31 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): ++ Remove un-necessary braces. ++ ++ 2013-05-31 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c (aarch64_classify_symbol): ++ Use SYMBOL_TINY_ABSOLUTE for AARCH64_CMODEL_TINY_PIC. ++ ++ 2013-05-30 Ian Bolton ++ ++ * config/aarch64/aarch64.md (insv): New define_expand. ++ (*insv_reg): New define_insn. ++ ++ 2012-05-29 Chris Schlumberger-Socha ++ Marcus Shawcroft ++ ++ * config/aarch64/aarch64-protos.h (aarch64_symbol_type): Define ++ SYMBOL_TINY_ABSOLUTE. ++ * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Handle ++ SYMBOL_TINY_ABSOLUTE. ++ (aarch64_expand_mov_immediate): Likewise. ++ (aarch64_classify_symbol): Likewise. ++ (aarch64_mov_operand_p): Remove ATTRIBUTE_UNUSED. ++ Permit SYMBOL_TINY_ABSOLUTE. ++ * config/aarch64/predicates.md (aarch64_mov_operand): Permit CONST. ++ ++ 2013-05-29 Chris Schlumberger-Socha ++ Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c (aarch64_classify_symbol): Remove comment. ++ Refactor if/switch. Replace gcc_assert with if. ++ ++ 2013-05-24 Ian Bolton ++ ++ * config/aarch64/aarch64.c (aarch64_print_operand): Change the ++ X format specifier to only display bottom 16 bits. ++ * config/aarch64/aarch64.md (insv_imm): Allow any size of ++ immediate to match for operand 2, since it will be masked. ++ ++ 2013-05-23 Chris Schlumberger-Socha ++ Marcus Shawcroft ++ ++ * config/aarch64/aarch64.md (*movdi_aarch64): Replace Usa with S. ++ * config/aarch64/constraints.md (Usa): Remove. ++ * doc/md.texi (AArch64 Usa): Remove. ++ ++ 2013-05-23 Chris Schlumberger-Socha ++ Marcus Shawcroft ++ ++ * config/aarch64/aarch64-protos.h (aarch64_mov_operand_p): Define. ++ * config/aarch64/aarch64.c (aarch64_mov_operand_p): Define. ++ * config/aarch64/predicates.md (aarch64_const_address): Remove. ++ (aarch64_mov_operand): Use aarch64_mov_operand_p. ++ ++ 2013-05-23 Vidya Praveen ++ ++ * config/aarch64/aarch64-simd.md (clzv4si2): Support for CLZ ++ instruction (AdvSIMD). ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_builtin_vectorized_function): Handler for BUILT_IN_CLZ. ++ * config/aarch64/aarch-simd-builtins.def: Entry for CLZ. ++ ++ 2013-05-14 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md ++ (aarch64_vcond_internal): Rename to... ++ (aarch64_vcond_internal): ...This, for integer modes. ++ (aarch64_vcond_internal): ...This for ++ float modes. Clarify all iterator modes. ++ (vcond): Use new name for vcond expanders. ++ (vcond): Likewise. ++ (vcondu: Likewise. ++ * config/aarch64/iterators.md (VDQF_COND): New. ++ ++2013-05-29 Christophe Lyon ++ ++ Backport from trunk r198928,198973,199203. ++ 2013-05-22 Ramana Radhakrishnan ++ ++ PR target/19599 ++ PR target/57340 ++ * config/arm/arm.c (any_sibcall_uses_r3): Rename to .. ++ (any_sibcall_could_use_r3): this and handle indirect calls. ++ (arm_get_frame_offsets): Rename use of any_sibcall_uses_r3. ++ ++ 2013-05-16 Ramana Radhakrishnan ++ ++ PR target/19599 ++ * config/arm/arm.c (arm_function_ok_for_sibcall): Add check ++ for NULL decl. ++ ++ 2013-05-15 Ramana Radhakrishnan ++ ++ PR target/19599 ++ * config/arm/predicates.md (call_insn_operand): New predicate. ++ * config/arm/constraints.md ("Cs", "Ss"): New constraints. ++ * config/arm/arm.md (*call_insn, *call_value_insn): Match only ++ if insn is not a tail call. ++ (*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through ++ registers. ++ * config/arm/arm.h (enum reg_class): New caller save register class. ++ (REG_CLASS_NAMES): Likewise. ++ (REG_CLASS_CONTENTS): Likewise. ++ * config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling ++ without decls. ++ ++2013-05-28 Christophe Lyon ++ ++ Backport from trunk r198680. ++ 2013-05-07 Sofiane Naci ++ ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_mov): call splitter. ++ (aarch64_simd_mov): New expander. ++ (aarch64_simd_mov_to_low): New instruction pattern. ++ (aarch64_simd_mov_to_high): Likewise. ++ (aarch64_simd_mov_from_low): Likewise. ++ (aarch64_simd_mov_from_high): Likewise. ++ (aarch64_dup_lane): Update. ++ (aarch64_dup_lanedi): New instruction pattern. ++ * config/aarch64/aarch64-protos.h (aarch64_split_simd_move): New prototype. ++ * config/aarch64/aarch64.c (aarch64_split_simd_move): New function. ++ ++2013-05-28 Christophe Lyon ++ ++ Backport from trunk r198497-198500. ++ 2013-05-01 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_gimple_fold_builtin.c): Fold more modes for reduc_splus_. ++ * config/aarch64/aarch64-simd-builtins.def ++ (reduc_splus_): Add new modes. ++ (reduc_uplus_): New. ++ * config/aarch64/aarch64-simd.md (aarch64_addvv4sf): Remove. ++ (reduc_uplus_v4sf): Likewise. ++ (reduc_splus_v4sf): Likewise. ++ (aarch64_addv): Likewise. ++ (reduc_uplus_): Likewise. ++ (reduc_splus_): Likewise. ++ (aarch64_addvv2di): Likewise. ++ (reduc_uplus_v2di): Likewise. ++ (reduc_splus_v2di): Likewise. ++ (aarch64_addvv2si): Likewise. ++ (reduc_uplus_v2si): Likewise. ++ (reduc_splus_v2si): Likewise. ++ (reduc_plus_): New. ++ (reduc_plus_v2di): Likewise. ++ (reduc_plus_v2si): Likewise. ++ (reduc_plus_v4sf): Likewise. ++ (aarch64_addpv4sf): Likewise. ++ * config/aarch64/arm_neon.h ++ (vaddv_<8, 16, 32, 64): Rewrite using builtins. ++ * config/aarch64/iterators.md (unspec): Remove UNSPEC_ADDV, ++ add UNSPEC_SADDV, UNSPEC_UADDV. ++ (SUADDV): New. ++ (sur): Add UNSPEC_SADDV, UNSPEC_UADDV. ++ ++ 2013-05-01 James Greenhalgh ++ ++ * config/aarch64/arm_neon.h ++ (v_<8, 16, 32, 64>): Rewrite using builtins. ++ ++ 2013-05-01 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins ++ (aarch64_gimple_fold_builtin): Fold reduc__ builtins. ++ ++ 2013-05-01 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd-builtins.def ++ (reduc_smax_): New. ++ (reduc_smin_): Likewise. ++ (reduc_umax_): Likewise. ++ (reduc_umin_): Likewise. ++ (reduc_smax_nan_): Likewise. ++ (reduc_smin_nan_): Likewise. ++ (fmax): Remove. ++ (fmin): Likewise. ++ (smax): Update for V2SF, V4SF and V2DF modes. ++ (smin): Likewise. ++ (smax_nan): New. ++ (smin_nan): Likewise. ++ * config/aarch64/aarch64-simd.md (3): Rename to... ++ (3): ...This, refactor. ++ (s3): New. ++ (3): Likewise. ++ (reduc__): Refactor. ++ (reduc__v4sf): Likewise. ++ (reduc__v2si): Likewise. ++ (aarch64_: Remove. ++ * config/aarch64/arm_neon.h (vmax_f<32,64>): Rewrite to use ++ new builtin names. ++ (vmin_f<32,64>): Likewise. ++ * config/iterators.md (unspec): Add UNSPEC_FMAXNMV, UNSPEC_FMINNMV. ++ (FMAXMIN): New. ++ (su): Add mappings for smax, smin, umax, umin. ++ (maxmin): New. ++ (FMAXMINV): Add UNSPEC_FMAXNMV, UNSPEC_FMINNMV. ++ (FMAXMIN): Rename as... ++ (FMAXMIN_UNS): ...This. ++ (maxminv): Remove. ++ (fmaxminv): Likewise. ++ (fmaxmin): Likewise. ++ (maxmin_uns): New. ++ (maxmin_uns_op): Likewise. ++ ++2013-05-28 Christophe Lyon ++ ++ Backport from trunk r199241. ++ 2013-05-23 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md ++ (aarch64_cmdi): Add clobber of CC_REGNUM to unsplit pattern. ++ ++2013-05-23 Christophe Lyon ++ ++ Backport from trunk r198970. ++ 2013-05-16 Greta Yorsh ++ ++ * config/arm/arm-protos.h (gen_movmem_ldrd_strd): New declaration. ++ * config/arm/arm.c (next_consecutive_mem): New function. ++ (gen_movmem_ldrd_strd): Likewise. ++ * config/arm/arm.md (movmemqi): Update condition and code. ++ (unaligned_loaddi, unaligned_storedi): New patterns. ++ ++2013-05-19 Matthew Gretton-Dann ++ ++ * LINARO-VERSION: Bump version number. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ * LINARO-VERSION: Update. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ Backport from trunk r198677. ++ 2013-05-07 Naveen H.S ++ ++ * config/aarch64/aarch64.md ++ (cmp_swp__shft_): Restrict the ++ shift value between 0-4. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ Backport from trunk r198574-198575. ++ 2013-05-03 Vidya Praveen ++ ++ * config/aarch64/aarch64-simd.md (simd_fabd): Correct the description. ++ ++ 2013-05-03 Vidya Praveen ++ ++ * config/aarch64/aarch64-simd.md (*fabd_scalar3): Support ++ scalar form of FABD instruction. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ Backport from trunk r198490-198496 ++ 2013-05-01 James Greenhalgh ++ ++ * config/aarch64/arm_neon.h ++ (vac_f<32, 64>): Rename to... ++ (vca_f<32, 64>): ...this, reimpliment in C. ++ (vca_f<32, 64>): Reimpliment in C. ++ ++ 2013-05-01 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md (*aarch64_fac): New. ++ * config/aarch64/iterators.md (FAC_COMPARISONS): New. ++ ++ 2013-05-01 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md ++ (vcond_internal): Handle special cases for constant masks. ++ (vcond): Allow nonmemory_operands for outcome vectors. ++ (vcondu): Likewise. ++ (vcond): New. ++ ++ 2013-05-01 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c (BUILTIN_VALLDI): Define. ++ (aarch64_fold_builtin): Add folding for cm. ++ * config/aarch64/aarch64-simd-builtins.def ++ (cmeq): Update to BUILTIN_VALLDI. ++ (cmgt): Likewise. ++ (cmge): Likewise. ++ (cmle): Likewise. ++ (cmlt): Likewise. ++ * config/aarch64/arm_neon.h ++ (vc_<8,16,32,64>): Remap ++ to builtins or C as appropriate. ++ ++ 2013-05-01 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd-builtins.def (cmhs): Rename to... ++ (cmgeu): ...This. ++ (cmhi): Rename to... ++ (cmgtu): ...This. ++ * config/aarch64/aarch64-simd.md ++ (simd_mode): Add SF. ++ (aarch64_vcond_internal): Use new names for unsigned comparison insns. ++ (aarch64_cm): Rewrite to not use UNSPECs. ++ * config/aarch64/aarch64.md (*cstore_neg): Rename to... ++ (cstore_neg): ...This. ++ * config/aarch64/iterators.md ++ (VALLF): new. ++ (unspec): Remove UNSPEC_CM. ++ (COMPARISONS): New. ++ (UCOMPARISONS): Likewise. ++ (optab): Add missing comparisons. ++ (n_optab): New. ++ (cmp_1): Likewise. ++ (cmp_2): Likewise. ++ (CMP): Likewise. ++ (cmp): Remove. ++ (VCMP_S): Likewise. ++ (VCMP_U): Likewise. ++ (V_cmp_result): Add DF, SF modes. ++ (v_cmp_result): Likewise. ++ (v): Likewise. ++ (vmtype): Likewise. ++ * config/aarch64/predicates.md (aarch64_reg_or_fp_zero): New. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ Backport from trunk r198191. ++ 2013-04-23 Sofiane Naci ++ ++ * config/aarch64/aarch64.md (*mov_aarch64): Add simd attribute. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ Backport from trunk r197838. ++ 2013-04-11 Naveen H.S ++ ++ * config/aarch64/aarch64.c (aarch64_select_cc_mode): Allow NEG ++ code in CC_NZ mode. ++ * config/aarch64/aarch64.md (*neg_3_compare0): New ++ pattern. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198019. ++ 2013-04-16 Naveen H.S ++ ++ * config/aarch64/aarch64.md (*adds_mul_imm_): New pattern. ++ (*subs_mul_imm_): New pattern. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198424-198425. ++ 2013-04-29 Ian Bolton ++ ++ * config/aarch64/aarch64.md (movsi_aarch64): Support LDR/STR ++ from/to S register. ++ (movdi_aarch64): Support LDR/STR from/to D register. ++ ++ 2013-04-29 Ian Bolton ++ ++ * common/config/aarch64/aarch64-common.c: Enable REE pass at O2 ++ or higher by default. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198412. ++ 2013-04-29 Kyrylo Tkachov ++ ++ * config/arm/arm.md (store_minmaxsi): Use only when ++ optimize_insn_for_size_p. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk 198394,198396-198400,198402-198404. ++ 2013-04-29 James Greenhalgh ++ ++ * config/aarch64/arm_neon.h ++ (vcvt_f<32,64>_s<32,64>): Rewrite in C. ++ (vcvt_f<32,64>_s<32,64>): Rewrite using builtins. ++ (vcvt__f<32,64>_f<32,64>): Likewise. ++ (vcvt_<32,64>_f<32,64>): Likewise. ++ (vcvta_<32,64>_f<32,64>): Likewise. ++ (vcvtm_<32,64>_f<32,64>): Likewise. ++ (vcvtn_<32,64>_f<32,64>): Likewise. ++ (vcvtp_<32,64>_f<32,64>): Likewise. ++ ++ 2013-04-29 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md ++ (2): New, maps to fix, fixuns. ++ (2): New, maps to ++ fix_trunc, fixuns_trunc. ++ (ftrunc2): New. ++ * config/aarch64/iterators.md (optab): Add fix, fixuns. ++ (fix_trunc_optab): New. ++ ++ 2013-04-29 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_builtin_vectorized_function): Vectorize over ifloorf, ++ iceilf, lround, iroundf. ++ ++ 2013-04-29 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd-builtins.def (vec_unpacks_hi_): New. ++ (float_truncate_hi_): Likewise. ++ (float_extend_lo_): Likewise. ++ (float_truncate_lo_): Likewise. ++ * config/aarch64/aarch64-simd.md (vec_unpacks_lo_v4sf): New. ++ (aarch64_float_extend_lo_v2df): Likewise. ++ (vec_unpacks_hi_v4sf): Likewise. ++ (aarch64_float_truncate_lo_v2sf): Likewise. ++ (aarch64_float_truncate_hi_v4sf): Likewise. ++ (vec_pack_trunc_v2df): Likewise. ++ (vec_pack_trunc_df): Likewise. ++ ++ 2013-04-29 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_fold_builtin): Fold float conversions. ++ * config/aarch64/aarch64-simd-builtins.def ++ (floatv2si, floatv4si, floatv2di): New. ++ (floatunsv2si, floatunsv4si, floatunsv2di): Likewise. ++ * config/aarch64/aarch64-simd.md ++ (2): New, expands to float and floatuns. ++ * config/aarch64/iterators.md (FLOATUORS): New. ++ (optab): Add float, floatuns. ++ (su_optab): Likewise. ++ ++ 2013-04-29 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_builtin_vectorized_function): Fold to standard pattern names. ++ * config/aarch64/aarch64-simd-builtins.def (frintn): New. ++ (frintz): Rename to... ++ (btrunc): ...this. ++ (frintp): Rename to... ++ (ceil): ...this. ++ (frintm): Rename to... ++ (floor): ...this. ++ (frinti): Rename to... ++ (nearbyint): ...this. ++ (frintx): Rename to... ++ (rint): ...this. ++ (frinta): Rename to... ++ (round): ...this. ++ * config/aarch64/aarch64-simd.md ++ (aarch64_frint): Delete. ++ (2): Convert to insn. ++ * config/aarch64/aarch64.md (unspec): Add UNSPEC_FRINTN. ++ * config/aarch64/iterators.md (FRINT): Add UNSPEC_FRINTN. ++ (frint_pattern): Likewise. ++ (frint_suffix): Likewise. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198302-198306,198316. ++ 2013-04-25 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md ++ (aarch64_simd_bsl_internal): Rewrite RTL to not use UNSPEC_BSL. ++ (aarch64_simd_bsl): Likewise. ++ * config/aarch64/iterators.md (unspec): Remove UNSPEC_BSL. ++ ++ 2013-04-25 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md (neg2): Use VDQ iterator. ++ ++ 2013-04-25 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_fold_builtin): New. ++ * config/aarch64/aarch64-protos.h (aarch64_fold_builtin): New. ++ * config/aarch64/aarch64.c (TARGET_FOLD_BUILTIN): Define. ++ * config/aarch64/aarch64-simd-builtins.def (abs): New. ++ * config/aarch64/arm_neon.h ++ (vabs_): Implement using __builtin_aarch64_fabs. ++ ++ 2013-04-25 James Greenhalgh ++ Tejas Belagod ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_gimple_fold_builtin): New. ++ * config/aarch64/aarch64-protos.h (aarch64_gimple_fold_builtin): New. ++ * config/aarch64/aarch64-simd-builtins.def (addv): New. ++ * config/aarch64/aarch64-simd.md (addpv4sf): New. ++ (addvv4sf): Update. ++ * config/aarch64/aarch64.c (TARGET_GIMPLE_FOLD_BUILTIN): Define. ++ ++ 2013-04-25 Naveen H.S ++ ++ * config/aarch64/aarch64.md ++ (*cmp_swp__shft_): New pattern. ++ ++ 2013-04-25 Naveen H.S ++ ++ * config/aarch64/aarch64.md (*ngc): New pattern. ++ (*ngcsi_uxtw): New pattern. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk 198298. ++ 2013-04-25 Kyrylo Tkachov ++ Julian Brown ++ ++ * config/arm/arm.c (neon_builtin_type_mode): Add T_V4HF. ++ (TB_DREG): Add T_V4HF. ++ (v4hf_UP): New macro. ++ (neon_itype): Add NEON_FLOAT_WIDEN, NEON_FLOAT_NARROW. ++ (arm_init_neon_builtins): Handle NEON_FLOAT_WIDEN, ++ NEON_FLOAT_NARROW. ++ Handle initialisation of V4HF. Adjust initialisation of reinterpret ++ built-ins. ++ (arm_expand_neon_builtin): Handle NEON_FLOAT_WIDEN, ++ NEON_FLOAT_NARROW. ++ (arm_vector_mode_supported_p): Handle V4HF. ++ (arm_mangle_map): Handle V4HFmode. ++ * config/arm/arm.h (VALID_NEON_DREG_MODE): Add V4HF. ++ * config/arm/arm_neon_builtins.def: Add entries for ++ vcvtv4hfv4sf, vcvtv4sfv4hf. ++ * config/arm/neon.md (neon_vcvtv4sfv4hf): New pattern. ++ (neon_vcvtv4hfv4sf): Likewise. ++ * config/arm/neon-gen.ml: Handle half-precision floating point ++ features. ++ * config/arm/neon-testgen.ml: Handle Requires_FP_bit feature. ++ * config/arm/arm_neon.h: Regenerate. ++ * config/arm/neon.ml (type elts): Add F16. ++ (type vectype): Add T_float16x4, T_floatHF. ++ (type vecmode): Add V4HF. ++ (type features): Add Requires_FP_bit feature. ++ (elt_width): Handle F16. ++ (elt_class): Likewise. ++ (elt_of_class_width): Likewise. ++ (mode_of_elt): Refactor. ++ (type_for_elt): Handle F16, fix error messages. ++ (vectype_size): Handle T_float16x4. ++ (vcvt_sh): New function. ++ (ops): Add entries for vcvt_f16_f32, vcvt_f32_f16. ++ (string_of_vectype): Handle T_floatHF, T_float16, T_float16x4. ++ (string_of_mode): Handle V4HF. ++ * doc/arm-neon-intrinsics.texi: Regenerate. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198136-198137,198142,198176. ++ 2013-04-23 Andreas Schwab ++ ++ * coretypes.h (gimple_stmt_iterator): Add struct to make ++ compatible with C. ++ ++ 2013-04-22 James Greenhalgh ++ ++ * coretypes.h (gimple_stmt_iterator_d): Forward declare. ++ (gimple_stmt_iterator): New typedef. ++ * gimple.h (gimple_stmt_iterator): Rename to... ++ (gimple_stmt_iterator_d): ... This. ++ * doc/tm.texi.in (TARGET_FOLD_BUILTIN): Detail restriction that ++ trees be valid for GIMPLE and GENERIC. ++ (TARGET_GIMPLE_FOLD_BUILTIN): New. ++ * gimple-fold.c (gimple_fold_call): Call target hook ++ gimple_fold_builtin. ++ * hooks.c (hook_bool_gsiptr_false): New. ++ * hooks.h (hook_bool_gsiptr_false): New. ++ * target.def (fold_stmt): New. ++ * doc/tm.texi: Regenerate. ++ ++ 2013-04-22 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (CF): Remove. ++ (CF0, CF1, CF2, CF3, CF4, CF10): New. ++ (VAR<1-12>): Add MAP parameter. ++ (BUILTIN_*): Likewise. ++ * config/aarch64/aarch64-simd-builtins.def: Set MAP parameter. ++ * config/aarch64/aarch64-simd.md (aarch64_sshl_n): Remove. ++ (aarch64_ushl_n): Likewise. ++ (aarch64_sshr_n): Likewise. ++ (aarch64_ushr_n): Likewise. ++ (aarch64_): Likewise. ++ (aarch64_sqrt): Likewise. ++ * config/aarch64/arm_neon.h (vshl_n_*): Use new builtin names. ++ (vshr_n_*): Likewise. ++ ++ 2013-04-22 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_simd_builtin_type_mode): Handle SF types. ++ (sf_UP): Define. ++ (BUILTIN_GPF): Define. ++ (aarch64_init_simd_builtins): Handle SF types. ++ * config/aarch64/aarch64-simd-builtins.def (frecpe): Add support. ++ (frecps): Likewise. ++ (frecpx): Likewise. ++ * config/aarch64/aarch64-simd.md ++ (simd_types): Update simd_frcp to simd_frecp. ++ (aarch64_frecpe): New. ++ (aarch64_frecps): Likewise. ++ * config/aarch64/aarch64.md (unspec): Add UNSPEC_FRECP. ++ (v8type): Add frecp. ++ (aarch64_frecp): New. ++ (aarch64_frecps): Likewise. ++ * config/aarch64/iterators.md (FRECP): New. ++ (frecp_suffix): Likewise. ++ * config/aarch64/arm_neon.h ++ (vrecp_<32, 64>): Convert to using builtins. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198030. ++ 2013-04-17 Greta Yorsh ++ ++ * config/arm/arm.md (movsicc_insn): Convert define_insn into ++ define_insn_and_split. ++ (and_scc,ior_scc,negscc): Likewise. ++ (cmpsi2_addneg, subsi3_compare): Convert to named patterns. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198020. ++ 2013-04-16 Naveen H.S ++ ++ * config/aarch64/aarch64.md (*adds__multp2): ++ New pattern. ++ (*subs__multp2): New pattern. ++ (*adds__): New pattern. ++ (*subs__): New pattern. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198004,198029. ++ 2013-04-17 Greta Yorsh ++ ++ * config/arm/arm.c (use_return_insn): Return 0 for targets that ++ can benefit from using a sequence of LDRD instructions in epilogue ++ instead of a single LDM instruction. ++ ++ 2013-04-16 Greta Yorsh ++ ++ * config/arm/arm.c (emit_multi_reg_push): New declaration ++ for an existing function. ++ (arm_emit_strd_push): New function. ++ (arm_expand_prologue): Used here. ++ (arm_emit_ldrd_pop): New function. ++ (arm_expand_epilogue): Used here. ++ (arm_get_frame_offsets): Update condition. ++ (arm_emit_multi_reg_pop): Add a special case for load of a single ++ register with writeback. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197965. ++ 2013-04-15 Kyrylo Tkachov ++ ++ * config/arm/arm.c (const_ok_for_dimode_op): Handle AND case. ++ * config/arm/arm.md (*anddi3_insn): Change to insn_and_split. ++ * config/arm/constraints.md (De): New constraint. ++ * config/arm/neon.md (anddi3_neon): Delete. ++ (neon_vand): Expand to standard anddi3 pattern. ++ * config/arm/predicates.md (imm_for_neon_inv_logic_operand): ++ Move earlier in the file. ++ (neon_inv_logic_op2): Likewise. ++ (arm_anddi_operand_neon): New predicate. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197925. ++ 2013-04-12 Greta Yorsh ++ ++ * config/arm/arm.md (mov_scc,mov_negscc,mov_notscc): Convert ++ define_insn into define_insn_and_split and emit movsicc patterns. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197807. ++ 2013-04-11 Naveen H.S ++ ++ * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Define. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197642. ++ 2013-04-09 Kyrylo Tkachov ++ ++ * config/arm/arm.md (minmax_arithsi_non_canon): New pattern. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197530,197921. ++ 2013-04-12 Greta Yorsh ++ ++ * config/arm/arm.c (gen_operands_ldrd_strd): Initialize "base". ++ ++ 2013-04-05 Greta Yorsh ++ ++ * config/arm/constraints.md (q): New constraint. ++ * config/arm/ldrdstrd.md: New file. ++ * config/arm/arm.md (ldrdstrd.md) New include. ++ (arm_movdi): Use "q" instead of "r" constraint ++ for double-word memory access. ++ (movdf_soft_insn): Likewise. ++ * config/arm/vfp.md (movdi_vfp): Likewise. ++ * config/arm/t-arm (MD_INCLUDES): Add ldrdstrd.md. ++ * config/arm/arm-protos.h (gen_operands_ldrd_strd): New declaration. ++ * config/arm/arm.c (gen_operands_ldrd_strd): New function. ++ (mem_ok_for_ldrd_strd): Likewise. ++ (output_move_double): Update assertion. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport of trunk r197518-197522,197526-197528. ++ 2013-04-05 Greta Yorsh ++ ++ * config/arm/arm.md (arm_smax_insn): Convert define_insn into ++ define_insn_and_split. ++ (arm_smin_insn,arm_umaxsi3,arm_uminsi3): Likewise. ++ ++ 2013-04-05 Greta Yorsh ++ ++ * config/arm/arm.md (arm_ashldi3_1bit): Convert define_insn into ++ define_insn_and_split. ++ (arm_ashrdi3_1bit,arm_lshrdi3_1bit): Likewise. ++ (shiftsi3_compare): New pattern. ++ (rrx): New pattern. ++ * config/arm/unspecs.md (UNSPEC_RRX): New. ++ ++ 2013-04-05 Greta Yorsh ++ ++ * config/arm/arm.md (negdi_extendsidi): New pattern. ++ (negdi_zero_extendsidi): Likewise. ++ ++ 2013-04-05 Greta Yorsh ++ ++ * config/arm/arm.md (andsi_iorsi3_notsi): Convert define_insn into ++ define_insn_and_split. ++ (arm_negdi2,arm_abssi2,arm_neg_abssi2): Likewise. ++ (arm_cmpdi_insn,arm_cmpdi_unsigned): Likewise. ++ ++ 2013-04-05 Greta Yorsh ++ ++ * config/arm/arm.md (arm_subdi3): Convert define_insn into ++ define_insn_and_split. ++ (subdi_di_zesidi,subdi_di_sesidi): Likewise. ++ (subdi_zesidi_di,subdi_sesidi_di,subdi_zesidi_zesidi): Likewise. ++ ++ 2013-04-05 Greta Yorsh ++ ++ * config/arm/arm.md (subsi3_carryin): New pattern. ++ (subsi3_carryin_const): Likewise. ++ (subsi3_carryin_compare,subsi3_carryin_compare_const): Likewise. ++ (subsi3_carryin_shift,rsbsi3_carryin_shift): Likewise. ++ ++ 2013-04-05 Greta Yorsh ++ ++ * config/arm/arm.md (incscc,arm_incscc,decscc,arm_decscc): Delete. ++ ++ 2013-04-05 Greta Yorsh ++ ++ * config/arm/arm.md (addsi3_carryin_): Set attribute predicable. ++ (addsi3_carryin_alt2_,addsi3_carryin_shift_): Likewise. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport of trunk r197517. ++ 2013-04-05 Kyrylo Tkachov ++ ++ * config/arm/arm.c (arm_expand_builtin): Change fcode ++ type to unsigned int. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport of trunk r197513. ++ 2013-04-05 Ramana Radhakrishnan ++ ++ * doc/invoke.texi (ARM Options): Document cortex-a53 support. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport of trunk r197489-197491. ++ 2013-04-04 Kyrylo Tkachov ++ ++ * config/arm/arm-protos.h (arm_builtin_vectorized_function): ++ New function prototype. ++ * config/arm/arm.c (TARGET_VECTORIZE_BUILTINS): Define. ++ (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Likewise. ++ (arm_builtin_vectorized_function): New function. ++ ++ 2013-04-04 Kyrylo Tkachov ++ ++ * config/arm/arm_neon_builtins.def: New file. ++ * config/arm/arm.c (neon_builtin_data): Move contents to ++ arm_neon_builtins.def. ++ (enum arm_builtins): Include neon builtin definitions. ++ (ARM_BUILTIN_NEON_BASE): Move from enum to macro. ++ * config/arm/t-arm (arm.o): Add dependency on ++ arm_neon_builtins.def. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport of trunk 196795-196797,196957 ++ 2013-03-19 Ian Bolton ++ ++ * config/aarch64/aarch64.md (*sub3_carryin): New pattern. ++ (*subsi3_carryin_uxtw): Likewise. ++ ++ 2013-03-19 Ian Bolton ++ ++ * config/aarch64/aarch64.md (*ror3_insn): New pattern. ++ (*rorsi3_insn_uxtw): Likewise. ++ ++ 2013-03-19 Ian Bolton ++ ++ * config/aarch64/aarch64.md (*extr5_insn): New pattern. ++ (*extrsi5_insn_uxtw): Likewise. ++ ++2013-04-10 Matthew Gretton-Dann ++ ++ * LINARO-VERSION: Bump version number. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. ++ * LINARO-VERSION: New file. ++ * configure.ac: Add Linaro version string. ++ * configure: Regenerate. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport of trunk r197346. ++ 2013-04-02 Ian Caulfield ++ Ramana Radhakrishnan ++ ++ * config/arm/arm-arches.def (armv8-a): Default to cortex-a53. ++ * config/arm/t-arm (MD_INCLUDES): Depend on cortex-a53.md. ++ * config/arm/cortex-a53.md: New file. ++ * config/arm/bpabi.h (BE8_LINK_SPEC): Handle cortex-a53. ++ * config/arm/arm.md (generic_sched, generic_vfp): Handle cortex-a53. ++ * config/arm/arm.c (arm_issue_rate): Likewise. ++ * config/arm/arm-tune.md: Regenerate ++ * config/arm/arm-tables.opt: Regenerate. ++ * config/arm/arm-cores.def: Add cortex-a53. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport of trunk r197342. ++ 2013-04-02 Sofiane Naci ++ ++ * config/aarch64/aarch64.md (*mov_aarch64): Add variants for ++ scalar load/store operations using B/H registers. ++ (*zero_extend2_aarch64): Likewise. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport of trunk r197341. ++ 2013-04-02 Sofiane Naci ++ ++ * config/aarch64/aarch64.md (*mov_aarch64): Add alternatives for ++ scalar move. ++ * config/aarch64/aarch64.c ++ (aarch64_simd_scalar_immediate_valid_for_move): New. ++ * config/aarch64/aarch64-protos.h ++ (aarch64_simd_scalar_immediate_valid_for_move): New. ++ * config/aarch64/constraints.md (Dh, Dq): New. ++ * config/aarch64/iterators.md (hq): New. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r197207. ++ 2013-03-28 Naveen H.S ++ ++ * config/aarch64/aarch64.md (*and3_compare0): New pattern. ++ (*andsi3_compare0_uxtw): New pattern. ++ (*and_3_compare0): New pattern. ++ (*and_si3_compare0_uxtw): New pattern. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r197153. ++ 2013-03-27 Terry Guo ++ ++ * config/arm/arm-cores.def: Added core cortex-r7. ++ * config/arm/arm-tune.md: Regenerated. ++ * config/arm/arm-tables.opt: Regenerated. ++ * doc/invoke.texi: Added entry for core cortex-r7. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r197052. ++ 2013-03-25 Kyrylo Tkachov ++ ++ * config/arm/arm.md (f_sels, f_seld): New types. ++ (*cmov): New pattern. ++ * config/arm/predicates.md (arm_vsel_comparison_operator): New ++ predicate. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r197046. ++ 2013-03-25 Kyrylo Tkachov ++ ++ * config/arm/arm.c (arm_emit_load_exclusive): Add acq parameter. ++ Emit load-acquire versions when acq is true. ++ (arm_emit_store_exclusive): Add rel parameter. ++ Emit store-release versions when rel is true. ++ (arm_split_compare_and_swap): Use acquire-release instructions ++ instead. ++ of barriers when appropriate. ++ (arm_split_atomic_op): Likewise. ++ * config/arm/arm.h (TARGET_HAVE_LDACQ): New macro. ++ * config/arm/unspecs.md (VUNSPEC_LAX): New unspec. ++ (VUNSPEC_SLX): Likewise. ++ (VUNSPEC_LDA): Likewise. ++ (VUNSPEC_STL): Likewise. ++ * config/arm/sync.md (atomic_load): New pattern. ++ (atomic_store): Likewise. ++ (arm_load_acquire_exclusive): Likewise. ++ (arm_load_acquire_exclusivesi): Likewise. ++ (arm_load_acquire_exclusivedi): Likewise. ++ (arm_store_release_exclusive): Likewise. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r196876. ++ 2013-03-21 Christophe Lyon ++ ++ * config/arm/arm-protos.h (tune_params): Add ++ prefer_neon_for_64bits field. ++ * config/arm/arm.c (prefer_neon_for_64bits): New variable. ++ (arm_slowmul_tune): Default prefer_neon_for_64bits to false. ++ (arm_fastmul_tune, arm_strongarm_tune, arm_xscale_tune): Ditto. ++ (arm_9e_tune, arm_v6t2_tune, arm_cortex_tune): Ditto. ++ (arm_cortex_a15_tune, arm_cortex_a5_tune): Ditto. ++ (arm_cortex_a9_tune, arm_v6m_tune, arm_fa726te_tune): Ditto. ++ (arm_option_override): Handle -mneon-for-64bits new option. ++ * config/arm/arm.h (TARGET_PREFER_NEON_64BITS): New macro. ++ (prefer_neon_for_64bits): Declare new variable. ++ * config/arm/arm.md (arch): Rename neon_onlya8 and neon_nota8 to ++ avoid_neon_for_64bits and neon_for_64bits. Remove onlya8 and ++ nota8. ++ (arch_enabled): Handle new arch types. Remove support for onlya8 ++ and nota8. ++ (one_cmpldi2): Use new arch names. ++ * config/arm/arm.opt (mneon-for-64bits): Add option. ++ * config/arm/neon.md (adddi3_neon, subdi3_neon, iordi3_neon) ++ (anddi3_neon, xordi3_neon, ashldi3_neon, di3_neon): Use ++ neon_for_64bits instead of nota8 and avoid_neon_for_64bits instead ++ of onlya8. ++ * doc/invoke.texi (-mneon-for-64bits): Document. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r196858. ++ 2013-03-21 Naveen H.S ++ ++ * config/aarch64/aarch64-simd.md (simd_fabd): New Attribute. ++ (abd_3): New pattern. ++ (aba_3): New pattern. ++ (fabd_3): New pattern. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r196856. ++ 2013-03-21 Naveen H.S ++ ++ * config/aarch64/aarch64-elf.h (REGISTER_PREFIX): Remove. ++ * config/aarch64/aarch64.c (aarch64_print_operand): Remove all ++ occurrence of REGISTER_PREFIX as its empty string. +--- a/src/gcc/testsuite/gcc.target/arm/vect-rounding-floorf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vect-rounding-floorf.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_neon_ok } */ ++/* { dg-options "-O2 -ffast-math -ftree-vectorize" } */ ++/* { dg-add-options arm_v8_neon } */ ++ ++#define N 32 ++ ++void ++foo (float *output, float *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_floorf (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_floorf } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vaesdq_u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vaesdq_u8.c +@@ -0,0 +1,22 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint8x16_t a, b, c; ++ int i = 0; ++ ++ for (i = 0; i < 16; ++i) ++ { ++ a[i] = i; ++ b[i] = 15 - i; ++ } ++ c = vaesdq_u8 (a, b); ++ return c[0]; ++} ++ ++/* { dg-final { scan-assembler "aesd.8\tq\[0-9\]+, q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vsha256su0q_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vsha256su0q_u32.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint32x4_t a = {0xd, 0xe, 0xa, 0xd}; ++ uint32x4_t b = {0, 1, 2, 3}; ++ ++ uint32x4_t res = vsha256su0q_u32 (a, b); ++ return res[0]; ++} ++ ++/* { dg-final { scan-assembler "sha256su0.32\tq\[0-9\]+, q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vld1p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld1p64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ ++ out_poly64x1_t = vld1_p64 (0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4p64.c +@@ -0,0 +1,20 @@ ++/* Test the `vst4p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vst4p64 (void) ++{ ++ poly64_t *arg0_poly64_t; ++ poly64x1x4_t arg1_poly64x1x4_t; ++ ++ vst4_p64 (arg0_poly64_t, arg1_poly64x1x4_t); ++} ++ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_u8' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_u8 (void) ++{ ++ poly128_t out_poly128_t; ++ uint8x16_t arg0_uint8x16_t; ++ ++ out_poly128_t = vreinterpretq_p128_u8 (arg0_uint8x16_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_s32' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_s32 (void) ++{ ++ poly128_t out_poly128_t; ++ int32x4_t arg0_int32x4_t; ++ ++ out_poly128_t = vreinterpretq_p128_s32 (arg0_int32x4_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_u8' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_u8 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ uint8x16_t arg0_uint8x16_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_u8 (arg0_uint8x16_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp8_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp8_p64 (void) ++{ ++ poly8x16_t out_poly8x16_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_poly8x16_t = vreinterpretq_p8_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_s16' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_s16 (void) ++{ ++ poly128_t out_poly128_t; ++ int16x8_t arg0_int16x8_t; ++ ++ out_poly128_t = vreinterpretq_p128_s16 (arg0_int16x8_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vld2p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld2p64 (void) ++{ ++ poly64x1x2_t out_poly64x1x2_t; ++ ++ out_poly64x1x2_t = vld2_p64 (0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_u64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_u64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ uint64x2_t arg0_uint64x2_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_u64 (arg0_uint64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c +@@ -0,0 +1,19 @@ ++/* Test the `vld4_dupp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld4_dupp64 (void) ++{ ++ poly64x1x4_t out_poly64x1x4_t; ++ ++ out_poly64x1x4_t = vld4_dup_p64 (0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQu8_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQu8_p64 (void) ++{ ++ uint8x16_t out_uint8x16_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_uint8x16_t = vreinterpretq_u8_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_p16' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_p16 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ poly16x8_t arg0_poly16x8_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_p16 (arg0_poly16x8_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c +@@ -0,0 +1,19 @@ ++/* Test the `vdupQ_np64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vdupQ_np64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ poly64_t arg0_poly64_t; ++ ++ out_poly64x2_t = vdupq_n_p64 (arg0_poly64_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQs32_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQs32_p64 (void) ++{ ++ int32x4_t out_int32x4_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_int32x4_t = vreinterpretq_s32_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_u32' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_u32 (void) ++{ ++ poly128_t out_poly128_t; ++ uint32x4_t arg0_uint32x4_t; ++ ++ out_poly128_t = vreinterpretq_p128_u32 (arg0_uint32x4_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQs64_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQs64_p64 (void) ++{ ++ int64x2_t out_int64x2_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_int64x2_t = vreinterpretq_s64_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vld3p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld3p64 (void) ++{ ++ poly64x1x3_t out_poly64x1x3_t; ++ ++ out_poly64x1x3_t = vld3_p64 (0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQu16_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQu16_p128 (void) ++{ ++ uint16x8_t out_uint16x8_t; ++ poly128_t arg0_poly128_t; ++ ++ out_uint16x8_t = vreinterpretq_u16_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_u16' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_u16 (void) ++{ ++ poly128_t out_poly128_t; ++ uint16x8_t arg0_uint16x8_t; ++ ++ out_poly128_t = vreinterpretq_p128_u16 (arg0_uint16x8_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c +@@ -0,0 +1,19 @@ ++/* Test the `vcreatep64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vcreatep64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ uint64_t arg0_uint64_t; ++ ++ out_poly64x1_t = vcreate_p64 (arg0_uint64_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c +@@ -0,0 +1,19 @@ ++/* Test the `vdupQ_lanep64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vdupQ_lanep64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_poly64x2_t = vdupq_lane_p64 (arg0_poly64x1_t, 0); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_f32' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_f32 (void) ++{ ++ poly128_t out_poly128_t; ++ float32x4_t arg0_float32x4_t; ++ ++ out_poly128_t = vreinterpretq_p128_f32 (arg0_float32x4_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c +@@ -0,0 +1,21 @@ ++/* Test the `vsri_np64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vsri_np64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ poly64x1_t arg0_poly64x1_t; ++ poly64x1_t arg1_poly64x1_t; ++ ++ out_poly64x1_t = vsri_n_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 1); ++} ++ ++/* { dg-final { scan-assembler "vsri\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c +@@ -0,0 +1,20 @@ ++/* Test the `vld1_lanep64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld1_lanep64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ poly64x1_t arg1_poly64x1_t; ++ ++ out_poly64x1_t = vld1_lane_p64 (0, arg1_poly64x1_t, 0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQs8_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQs8_p128 (void) ++{ ++ int8x16_t out_int8x16_t; ++ poly128_t arg0_poly128_t; ++ ++ out_int8x16_t = vreinterpretq_s8_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vld4p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld4p64 (void) ++{ ++ poly64x1x4_t out_poly64x1x4_t; ++ ++ out_poly64x1x4_t = vld4_p64 (0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_s32' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_s32 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ int32x4_t arg0_int32x4_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_s32 (arg0_int32x4_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c +@@ -0,0 +1,20 @@ ++/* Test the `vld1Q_lanep64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld1Q_lanep64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ poly64x2_t arg1_poly64x2_t; ++ ++ out_poly64x2_t = vld1q_lane_p64 (0, arg1_poly64x2_t, 1); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_p8' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_p8 (void) ++{ ++ poly128_t out_poly128_t; ++ poly8x16_t arg0_poly8x16_t; ++ ++ out_poly128_t = vreinterpretq_p128_p8 (arg0_poly8x16_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_p8' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_p8 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ poly8x16_t arg0_poly8x16_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_p8 (arg0_poly8x16_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c +@@ -0,0 +1,19 @@ ++/* Test the `vget_lowp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vget_lowp64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_poly64x1_t = vget_low_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQs64_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQs64_p128 (void) ++{ ++ int64x2_t out_int64x2_t; ++ poly128_t arg0_poly128_t; ++ ++ out_int64x2_t = vreinterpretq_s64_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c +@@ -0,0 +1,20 @@ ++/* Test the `vst1_lanep64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vst1_lanep64 (void) ++{ ++ poly64_t *arg0_poly64_t; ++ poly64x1_t arg1_poly64x1_t; ++ ++ vst1_lane_p64 (arg0_poly64_t, arg1_poly64x1_t, 0); ++} ++ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQs16_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQs16_p64 (void) ++{ ++ int16x8_t out_int16x8_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_int16x8_t = vreinterpretq_s16_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_s16' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_s16 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ int16x8_t arg0_int16x8_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_s16 (arg0_int16x8_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp16_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp16_p64 (void) ++{ ++ poly16x4_t out_poly16x4_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_poly16x4_t = vreinterpret_p16_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c +@@ -0,0 +1,20 @@ ++/* Test the `vst1Qp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vst1Qp64 (void) ++{ ++ poly64_t *arg0_poly64_t; ++ poly64x2_t arg1_poly64x2_t; ++ ++ vst1q_p64 (arg0_poly64_t, arg1_poly64x2_t); ++} ++ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_s64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_s64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ int64x1_t arg0_int64x1_t; ++ ++ out_poly64x1_t = vreinterpret_p64_s64 (arg0_int64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQu32_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQu32_p64 (void) ++{ ++ uint32x4_t out_uint32x4_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_uint32x4_t = vreinterpretq_u32_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_u32' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_u32 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ uint32x4_t arg0_uint32x4_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_u32 (arg0_uint32x4_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c +@@ -0,0 +1,19 @@ ++/* Test the `vget_highp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vget_highp64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_poly64x1_t = vget_high_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQu64_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQu64_p64 (void) ++{ ++ uint64x2_t out_uint64x2_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_uint64x2_t = vreinterpretq_u64_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_u16' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_u16 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ uint16x8_t arg0_uint16x8_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_u16 (arg0_uint16x8_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c +@@ -0,0 +1,20 @@ ++/* Test the `vcvtf32_f16' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_neon_fp16_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_neon_fp16 } */ ++ ++#include "arm_neon.h" ++ ++void test_vcvtf32_f16 (void) ++{ ++ float32x4_t out_float32x4_t; ++ float16x4_t arg0_float16x4_t; ++ ++ out_float32x4_t = vcvt_f32_f16 (arg0_float16x4_t); ++} ++ ++/* { dg-final { scan-assembler "vcvt\.f32.f16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_f32' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_f32 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ float32x4_t arg0_float32x4_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_f32 (arg0_float32x4_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslp64.c +@@ -0,0 +1,22 @@ ++/* Test the `vbslp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vbslp64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ uint64x1_t arg0_uint64x1_t; ++ poly64x1_t arg1_poly64x1_t; ++ poly64x1_t arg2_poly64x1_t; ++ ++ out_poly64x1_t = vbsl_p64 (arg0_uint64x1_t, arg1_poly64x1_t, arg2_poly64x1_t); ++} ++ ++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp16_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp16_p128 (void) ++{ ++ poly16x8_t out_poly16x8_t; ++ poly128_t arg0_poly128_t; ++ ++ out_poly16x8_t = vreinterpretq_p16_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c +@@ -0,0 +1,21 @@ ++/* Test the `vsli_np64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vsli_np64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ poly64x1_t arg0_poly64x1_t; ++ poly64x1_t arg1_poly64x1_t; ++ ++ out_poly64x1_t = vsli_n_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 1); ++} ++ ++/* { dg-final { scan-assembler "vsli\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c +@@ -0,0 +1,19 @@ ++/* Test the `vld1Q_dupp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld1Q_dupp64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ ++ out_poly64x2_t = vld1q_dup_p64 (0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQu8_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQu8_p128 (void) ++{ ++ uint8x16_t out_uint8x16_t; ++ poly128_t arg0_poly128_t; ++ ++ out_uint8x16_t = vreinterpretq_u8_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQf32_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQf32_p64 (void) ++{ ++ float32x4_t out_float32x4_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_float32x4_t = vreinterpretq_f32_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_u64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_u64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ uint64x1_t arg0_uint64x1_t; ++ ++ out_poly64x1_t = vreinterpret_p64_u64 (arg0_uint64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c +@@ -0,0 +1,19 @@ ++/* Test the `vdup_lanep64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vdup_lanep64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_poly64x1_t = vdup_lane_p64 (arg0_poly64x1_t, 0); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_p16' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_p16 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ poly16x4_t arg0_poly16x4_t; ++ ++ out_poly64x1_t = vreinterpret_p64_p16 (arg0_poly16x4_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_p64 (void) ++{ ++ poly128_t out_poly128_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_poly128_t = vreinterpretq_p128_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQu16_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQu16_p64 (void) ++{ ++ uint16x8_t out_uint16x8_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_uint16x8_t = vreinterpretq_u16_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterprets32_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterprets32_p64 (void) ++{ ++ int32x2_t out_int32x2_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_int32x2_t = vreinterpret_s32_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterprets8_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterprets8_p64 (void) ++{ ++ int8x8_t out_int8x8_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_int8x8_t = vreinterpret_s8_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c +@@ -0,0 +1,20 @@ ++/* Test the `vcvtf16_f32' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_neon_fp16_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_neon_fp16 } */ ++ ++#include "arm_neon.h" ++ ++void test_vcvtf16_f32 (void) ++{ ++ float16x4_t out_float16x4_t; ++ float32x4_t arg0_float32x4_t; ++ ++ out_float16x4_t = vcvt_f16_f32 (arg0_float32x4_t); ++} ++ ++/* { dg-final { scan-assembler "vcvt\.f16.f32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterprets64_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterprets64_p64 (void) ++{ ++ int64x1_t out_int64x1_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_int64x1_t = vreinterpret_s64_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQu64_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQu64_p128 (void) ++{ ++ uint64x2_t out_uint64x2_t; ++ poly128_t arg0_poly128_t; ++ ++ out_uint64x2_t = vreinterpretq_u64_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_s8' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_s8 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ int8x8_t arg0_int8x8_t; ++ ++ out_poly64x1_t = vreinterpret_p64_s8 (arg0_int8x8_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c +@@ -0,0 +1,19 @@ ++/* Test the `vld1_dupp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld1_dupp64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ ++ out_poly64x1_t = vld1_dup_p64 (0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_s32' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_s32 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ int32x2_t arg0_int32x2_t; ++ ++ out_poly64x1_t = vreinterpret_p64_s32 (arg0_int32x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c +@@ -0,0 +1,21 @@ ++/* Test the `vsriQ_np64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vsriQ_np64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ poly64x2_t arg0_poly64x2_t; ++ poly64x2_t arg1_poly64x2_t; ++ ++ out_poly64x2_t = vsriq_n_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 1); ++} ++ ++/* { dg-final { scan-assembler "vsri\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c +@@ -0,0 +1,22 @@ ++/* Test the `vbslQp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vbslQp64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ uint64x2_t arg0_uint64x2_t; ++ poly64x2_t arg1_poly64x2_t; ++ poly64x2_t arg2_poly64x2_t; ++ ++ out_poly64x2_t = vbslq_p64 (arg0_uint64x2_t, arg1_poly64x2_t, arg2_poly64x2_t); ++} ++ ++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQs32_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQs32_p128 (void) ++{ ++ int32x4_t out_int32x4_t; ++ poly128_t arg0_poly128_t; ++ ++ out_int32x4_t = vreinterpretq_s32_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_u8' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_u8 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ uint8x8_t arg0_uint8x8_t; ++ ++ out_poly64x1_t = vreinterpret_p64_u8 (arg0_uint8x8_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c +@@ -0,0 +1,20 @@ ++/* Test the `vst1Q_lanep64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vst1Q_lanep64 (void) ++{ ++ poly64_t *arg0_poly64_t; ++ poly64x2_t arg1_poly64x2_t; ++ ++ vst1q_lane_p64 (arg0_poly64_t, arg1_poly64x2_t, 1); ++} ++ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_s16' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_s16 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ int16x4_t arg0_int16x4_t; ++ ++ out_poly64x1_t = vreinterpret_p64_s16 (arg0_int16x4_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterprets16_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterprets16_p64 (void) ++{ ++ int16x4_t out_int16x4_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_int16x4_t = vreinterpret_s16_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c +@@ -0,0 +1,20 @@ ++/* Test the `vcombinep64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vcombinep64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ poly64x1_t arg0_poly64x1_t; ++ poly64x1_t arg1_poly64x1_t; ++ ++ out_poly64x2_t = vcombine_p64 (arg0_poly64x1_t, arg1_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c +@@ -0,0 +1,19 @@ ++/* Test the `vld1Qp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld1Qp64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ ++ out_poly64x2_t = vld1q_p64 (0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_s64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_s64 (void) ++{ ++ poly128_t out_poly128_t; ++ int64x2_t arg0_int64x2_t; ++ ++ out_poly128_t = vreinterpretq_p128_s64 (arg0_int64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp8_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp8_p64 (void) ++{ ++ poly8x8_t out_poly8x8_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_poly8x8_t = vreinterpret_p8_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c +@@ -0,0 +1,19 @@ ++/* Test the `vdup_np64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vdup_np64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ poly64_t arg0_poly64_t; ++ ++ out_poly64x1_t = vdup_n_p64 (arg0_poly64_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1p64.c +@@ -0,0 +1,20 @@ ++/* Test the `vst1p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vst1p64 (void) ++{ ++ poly64_t *arg0_poly64_t; ++ poly64x1_t arg1_poly64x1_t; ++ ++ vst1_p64 (arg0_poly64_t, arg1_poly64x1_t); ++} ++ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretu8_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretu8_p64 (void) ++{ ++ uint8x8_t out_uint8x8_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_uint8x8_t = vreinterpret_u8_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_u32' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_u32 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ uint32x2_t arg0_uint32x2_t; ++ ++ out_poly64x1_t = vreinterpret_p64_u32 (arg0_uint32x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretu32_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretu32_p64 (void) ++{ ++ uint32x2_t out_uint32x2_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_uint32x2_t = vreinterpret_u32_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c +@@ -0,0 +1,19 @@ ++/* Test the `vld2_dupp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld2_dupp64 (void) ++{ ++ poly64x1x2_t out_poly64x1x2_t; ++ ++ out_poly64x1x2_t = vld2_dup_p64 (0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretu64_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretu64_p64 (void) ++{ ++ uint64x1_t out_uint64x1_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_uint64x1_t = vreinterpret_u64_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c +@@ -0,0 +1,21 @@ ++/* Test the `vsliQ_np64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vsliQ_np64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ poly64x2_t arg0_poly64x2_t; ++ poly64x2_t arg1_poly64x2_t; ++ ++ out_poly64x2_t = vsliq_n_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 1); ++} ++ ++/* { dg-final { scan-assembler "vsli\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_u16' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_u16 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ uint16x4_t arg0_uint16x4_t; ++ ++ out_poly64x1_t = vreinterpret_p64_u16 (arg0_uint16x4_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_u64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_u64 (void) ++{ ++ poly128_t out_poly128_t; ++ uint64x2_t arg0_uint64x2_t; ++ ++ out_poly128_t = vreinterpretq_p128_u64 (arg0_uint64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2p64.c +@@ -0,0 +1,20 @@ ++/* Test the `vst2p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vst2p64 (void) ++{ ++ poly64_t *arg0_poly64_t; ++ poly64x1x2_t arg1_poly64x1x2_t; ++ ++ vst2_p64 (arg0_poly64_t, arg1_poly64x1x2_t); ++} ++ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp8_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp8_p128 (void) ++{ ++ poly8x16_t out_poly8x16_t; ++ poly128_t arg0_poly128_t; ++ ++ out_poly8x16_t = vreinterpretq_p8_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_f32' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_f32 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ float32x2_t arg0_float32x2_t; ++ ++ out_poly64x1_t = vreinterpret_p64_f32 (arg0_float32x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQf32_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQf32_p128 (void) ++{ ++ float32x4_t out_float32x4_t; ++ poly128_t arg0_poly128_t; ++ ++ out_float32x4_t = vreinterpretq_f32_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQp64.c +@@ -0,0 +1,21 @@ ++/* Test the `vextQp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vextQp64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ poly64x2_t arg0_poly64x2_t; ++ poly64x2_t arg1_poly64x2_t; ++ ++ out_poly64x2_t = vextq_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 0); ++} ++ ++/* { dg-final { scan-assembler "vext\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_p16' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_p16 (void) ++{ ++ poly128_t out_poly128_t; ++ poly16x8_t arg0_poly16x8_t; ++ ++ out_poly128_t = vreinterpretq_p128_p16 (arg0_poly16x8_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_p128 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ poly128_t arg0_poly128_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQs16_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQs16_p128 (void) ++{ ++ int16x8_t out_int16x8_t; ++ poly128_t arg0_poly128_t; ++ ++ out_int16x8_t = vreinterpretq_s16_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQs8_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQs8_p64 (void) ++{ ++ int8x16_t out_int8x16_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_int8x16_t = vreinterpretq_s8_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vextp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextp64.c +@@ -0,0 +1,21 @@ ++/* Test the `vextp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vextp64 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ poly64x1_t arg0_poly64x1_t; ++ poly64x1_t arg1_poly64x1_t; ++ ++ out_poly64x1_t = vext_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 0); ++} ++ ++/* { dg-final { scan-assembler "vext\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp16_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp16_p64 (void) ++{ ++ poly16x8_t out_poly16x8_t; ++ poly64x2_t arg0_poly64x2_t; ++ ++ out_poly16x8_t = vreinterpretq_p16_p64 (arg0_poly64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretf32_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretf32_p64 (void) ++{ ++ float32x2_t out_float32x2_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_float32x2_t = vreinterpret_f32_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp128_s8' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp128_s8 (void) ++{ ++ poly128_t out_poly128_t; ++ int8x16_t arg0_int8x16_t; ++ ++ out_poly128_t = vreinterpretq_p128_s8 (arg0_int8x16_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_s8' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_s8 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ int8x16_t arg0_int8x16_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_s8 (arg0_int8x16_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3p64.c +@@ -0,0 +1,20 @@ ++/* Test the `vst3p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vst3p64 (void) ++{ ++ poly64_t *arg0_poly64_t; ++ poly64x1x3_t arg1_poly64x1x3_t; ++ ++ vst3_p64 (arg0_poly64_t, arg1_poly64x1x3_t); ++} ++ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c +@@ -0,0 +1,19 @@ ++/* Test the `vld3_dupp64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vld3_dupp64 (void) ++{ ++ poly64x1x3_t out_poly64x1x3_t; ++ ++ out_poly64x1x3_t = vld3_dup_p64 (0); ++} ++ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretu16_p64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretu16_p64 (void) ++{ ++ uint16x4_t out_uint16x4_t; ++ poly64x1_t arg0_poly64x1_t; ++ ++ out_uint16x4_t = vreinterpret_u16_p64 (arg0_poly64x1_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretp64_p8' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretp64_p8 (void) ++{ ++ poly64x1_t out_poly64x1_t; ++ poly8x8_t arg0_poly8x8_t; ++ ++ out_poly64x1_t = vreinterpret_p64_p8 (arg0_poly8x8_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQp64_s64' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQp64_s64 (void) ++{ ++ poly64x2_t out_poly64x2_t; ++ int64x2_t arg0_int64x2_t; ++ ++ out_poly64x2_t = vreinterpretq_p64_s64 (arg0_int64x2_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c +@@ -0,0 +1,19 @@ ++/* Test the `vreinterpretQu32_p128' ARM Neon intrinsic. */ ++/* This file was autogenerated by neon-testgen. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void test_vreinterpretQu32_p128 (void) ++{ ++ uint32x4_t out_uint32x4_t; ++ poly128_t arg0_poly128_t; ++ ++ out_uint32x4_t = vreinterpretq_u32_p128 (arg0_poly128_t); ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/anddi3-opt.c ++++ b/src/gcc/testsuite/gcc.target/arm/anddi3-opt.c +@@ -0,0 +1,11 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O1" } */ ++ ++unsigned long long ++muld (unsigned long long X, unsigned long long Y) ++{ ++ unsigned long long mask = 0xffffffffull; ++ return (X & mask) * (Y & mask); ++} ++ ++/* { dg-final { scan-assembler-not "and\[\\t \]+.+,\[\\t \]*.+,\[\\t \]*.+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/peep-ldrd-1.c ++++ b/src/gcc/testsuite/gcc.target/arm/peep-ldrd-1.c +@@ -0,0 +1,11 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_prefer_ldrd_strd } */ ++/* { dg-options "-O2" } */ ++int foo(int a, int b, int* p, int *q) ++{ ++ a = p[2] + p[3]; ++ *q = a; ++ *p = a; ++ return a; ++} ++/* { dg-final { scan-assembler "ldrd" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselgtdf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselgtdf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++double ++foo (double x, double y) ++{ ++ volatile int i = 0; ++ return i > 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselgt.f64\td\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/acle/acle.exp ++++ b/src/gcc/testsuite/gcc.target/arm/acle/acle.exp +@@ -0,0 +1,35 @@ ++# Copyright (C) 2013-2014 Free Software Foundation, Inc. ++ ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . ++ ++# GCC testsuite that uses the `dg.exp' driver. ++ ++# Exit immediately if this isn't an ARM target. ++if ![istarget arm*-*-*] then { ++ return ++} ++ ++# Load support procs. ++load_lib gcc-dg.exp ++ ++# Initialize `dg'. ++dg-init ++ ++# Main loop. ++dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \ ++ "" "" ++ ++# All done. ++dg-finish +--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32b.c ++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32b.c +@@ -0,0 +1,20 @@ ++/* Test the crc32b ACLE intrinsic. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crc_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crc } */ ++ ++#include "arm_acle.h" ++ ++void test_crc32b (void) ++{ ++ uint32_t out_uint32_t; ++ uint32_t arg0_uint32_t; ++ uint8_t arg1_uint8_t; ++ ++ out_uint32_t = __crc32b (arg0_uint32_t, arg1_uint8_t); ++} ++ ++/* { dg-final { scan-assembler "crc32b\t...?, ...?, ...?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32d.c ++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32d.c +@@ -0,0 +1,20 @@ ++/* Test the crc32d ACLE intrinsic. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crc_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crc } */ ++ ++#include "arm_acle.h" ++ ++void test_crc32d (void) ++{ ++ uint32_t out_uint32_t; ++ uint32_t arg0_uint32_t; ++ uint64_t arg1_uint64_t; ++ ++ out_uint32_t = __crc32d (arg0_uint32_t, arg1_uint64_t); ++} ++ ++/* { dg-final { scan-assembler-times "crc32w\t...?, ...?, ...?\n" 2 } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32cb.c ++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32cb.c +@@ -0,0 +1,20 @@ ++/* Test the crc32cb ACLE intrinsic. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crc_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crc } */ ++ ++#include "arm_acle.h" ++ ++void test_crc32cb (void) ++{ ++ uint32_t out_uint32_t; ++ uint32_t arg0_uint32_t; ++ uint8_t arg1_uint8_t; ++ ++ out_uint32_t = __crc32cb (arg0_uint32_t, arg1_uint8_t); ++} ++ ++/* { dg-final { scan-assembler "crc32cb\t...?, ...?, ...?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32cd.c ++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32cd.c +@@ -0,0 +1,20 @@ ++/* Test the crc32cd ACLE intrinsic. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crc_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crc } */ ++ ++#include "arm_acle.h" ++ ++void test_crc32cd (void) ++{ ++ uint32_t out_uint32_t; ++ uint32_t arg0_uint32_t; ++ uint64_t arg1_uint64_t; ++ ++ out_uint32_t = __crc32cd (arg0_uint32_t, arg1_uint64_t); ++} ++ ++/* { dg-final { scan-assembler-times "crc32cw\t...?, ...?, ...?\n" 2 } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32w.c ++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32w.c +@@ -0,0 +1,20 @@ ++/* Test the crc32w ACLE intrinsic. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crc_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crc } */ ++ ++#include "arm_acle.h" ++ ++void test_crc32w (void) ++{ ++ uint32_t out_uint32_t; ++ uint32_t arg0_uint32_t; ++ uint32_t arg1_uint32_t; ++ ++ out_uint32_t = __crc32w (arg0_uint32_t, arg1_uint32_t); ++} ++ ++/* { dg-final { scan-assembler "crc32w\t...?, ...?, ...?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32h.c ++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32h.c +@@ -0,0 +1,20 @@ ++/* Test the crc32h ACLE intrinsic. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crc_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crc } */ ++ ++#include "arm_acle.h" ++ ++void test_crc32h (void) ++{ ++ uint32_t out_uint32_t; ++ uint32_t arg0_uint32_t; ++ uint16_t arg1_uint16_t; ++ ++ out_uint32_t = __crc32h (arg0_uint32_t, arg1_uint16_t); ++} ++ ++/* { dg-final { scan-assembler "crc32h\t...?, ...?, ...?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32cw.c ++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32cw.c +@@ -0,0 +1,20 @@ ++/* Test the crc32cw ACLE intrinsic. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crc_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crc } */ ++ ++#include "arm_acle.h" ++ ++void test_crc32cw (void) ++{ ++ uint32_t out_uint32_t; ++ uint32_t arg0_uint32_t; ++ uint32_t arg1_uint32_t; ++ ++ out_uint32_t = __crc32cw (arg0_uint32_t, arg1_uint32_t); ++} ++ ++/* { dg-final { scan-assembler "crc32cw\t...?, ...?, ...?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32ch.c ++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32ch.c +@@ -0,0 +1,20 @@ ++/* Test the crc32ch ACLE intrinsic. */ ++ ++/* { dg-do assemble } */ ++/* { dg-require-effective-target arm_crc_ok } */ ++/* { dg-options "-save-temps -O0" } */ ++/* { dg-add-options arm_crc } */ ++ ++#include "arm_acle.h" ++ ++void test_crc32ch (void) ++{ ++ uint32_t out_uint32_t; ++ uint32_t arg0_uint32_t; ++ uint16_t arg1_uint16_t; ++ ++ out_uint32_t = __crc32ch (arg0_uint32_t, arg1_uint16_t); ++} ++ ++/* { dg-final { scan-assembler "crc32ch\t...?, ...?, ...?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/iordi3-opt.c ++++ b/src/gcc/testsuite/gcc.target/arm/iordi3-opt.c +@@ -0,0 +1,9 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O1" } */ ++ ++unsigned long long or64 (unsigned long long input) ++{ ++ return input | 0x200000004ULL; ++} ++ ++/* { dg-final { scan-assembler-not "mov\[\\t \]+.+,\[\\t \]*.+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint32_t hash = 0xdeadbeef; ++ uint32x4_t a = {0, 1, 2, 3}; ++ uint32x4_t b = {3, 2, 1, 0}; ++ ++ uint32x4_t res = vsha1pq_u32 (a, hash, b); ++ return res[0]; ++} ++ ++/* { dg-final { scan-assembler "sha1p.32\tq\[0-9\]+, q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/atomic-op-relaxed.c ++++ b/src/gcc/testsuite/gcc.target/arm/atomic-op-relaxed.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arch_v8a_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_arch_v8a } */ ++ ++#include "../aarch64/atomic-op-relaxed.x" ++ ++/* { dg-final { scan-assembler-times "ldrex\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "strex\t...?, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-not "dmb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselgesf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselgesf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++float ++foo (float x, float y) ++{ ++ volatile int i = 0; ++ return i >= 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselge.f32\ts\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/peep-strd-1.c ++++ b/src/gcc/testsuite/gcc.target/arm/peep-strd-1.c +@@ -0,0 +1,9 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_prefer_ldrd_strd } */ ++/* { dg-options "-O2" } */ ++void foo(int a, int b, int* p) ++{ ++ p[2] = a; ++ p[3] = b; ++} ++/* { dg-final { scan-assembler "strd" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vsha1su1q_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vsha1su1q_u32.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint32x4_t a = {0xd, 0xe, 0xa, 0xd}; ++ uint32x4_t b = {0, 1, 2, 3}; ++ ++ uint32x4_t res = vsha1su1q_u32 (a, b); ++ return res[0]; ++} ++ ++/* { dg-final { scan-assembler "sha1su1.32\tq\[0-9\]+, q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vmullp64.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vmullp64.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++poly128_t ++foo (void) ++{ ++ poly64_t a = 0xdeadbeef; ++ poly64_t b = 0xadadadad; ++ return vmull_p64 (a, b); ++} ++ ++/* { dg-final { scan-assembler "vmull.p64.*" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/lp1243022.c ++++ b/src/gcc/testsuite/gcc.target/arm/lp1243022.c +@@ -0,0 +1,201 @@ ++/* { dg-do compile { target arm_thumb2 } } */ ++/* { dg-options "-O2 -fdump-rtl-subreg2" } */ ++ ++/* { dg-final { scan-rtl-dump "REG_INC" "subreg2" { target { ! arm_neon } } } } */ ++/* { dg-final { cleanup-rtl-dump "subreg2" } } */ ++struct device; ++typedef unsigned int __u32; ++typedef unsigned long long u64; ++typedef __u32 __le32; ++typedef u64 dma_addr_t; ++typedef unsigned gfp_t; ++int dev_warn (const struct device *dev, const char *fmt, ...); ++struct usb_bus ++{ ++ struct device *controller; ++}; ++struct usb_hcd ++{ ++ struct usb_bus self; ++}; ++struct xhci_generic_trb ++{ ++ __le32 field[4]; ++}; ++union xhci_trb ++{ ++ struct xhci_generic_trb generic; ++}; ++struct xhci_segment ++{ ++ union xhci_trb *trbs; ++ dma_addr_t dma; ++}; ++struct xhci_ring ++{ ++ struct xhci_segment *first_seg; ++}; ++struct xhci_hcd ++{ ++ struct xhci_ring *cmd_ring; ++ struct xhci_ring *event_ring; ++}; ++struct usb_hcd *xhci_to_hcd (struct xhci_hcd *xhci) ++{ ++} ++dma_addr_t xhci_trb_virt_to_dma (struct xhci_segment * seg, ++ union xhci_trb * trb); ++struct xhci_segment *trb_in_td (struct xhci_segment *start_seg, ++ dma_addr_t suspect_dma); ++xhci_test_trb_in_td (struct xhci_hcd *xhci, struct xhci_segment *input_seg, ++ union xhci_trb *start_trb, union xhci_trb *end_trb, ++ dma_addr_t input_dma, struct xhci_segment *result_seg, ++ char *test_name, int test_number) ++{ ++ unsigned long long start_dma; ++ unsigned long long end_dma; ++ struct xhci_segment *seg; ++ start_dma = xhci_trb_virt_to_dma (input_seg, start_trb); ++ end_dma = xhci_trb_virt_to_dma (input_seg, end_trb); ++ { ++ dev_warn (xhci_to_hcd (xhci)->self.controller, ++ "%d\n", test_number); ++ dev_warn (xhci_to_hcd (xhci)->self.controller, ++ "Expected seg %p, got seg %p\n", result_seg, seg); ++ } ++} ++xhci_check_trb_in_td_math (struct xhci_hcd *xhci, gfp_t mem_flags) ++{ ++ struct ++ { ++ dma_addr_t input_dma; ++ struct xhci_segment *result_seg; ++ } ++ simple_test_vector[] = ++ { ++ { ++ 0, ((void *) 0) ++ } ++ , ++ { ++ xhci->event_ring->first_seg->dma - 16, ((void *) 0)} ++ , ++ { ++ xhci->event_ring->first_seg->dma - 1, ((void *) 0)} ++ , ++ { ++ xhci->event_ring->first_seg->dma, xhci->event_ring->first_seg} ++ , ++ { ++ xhci->event_ring->first_seg->dma + (64 - 1) * 16, ++ xhci->event_ring->first_seg ++ } ++ , ++ { ++ xhci->event_ring->first_seg->dma + (64 - 1) * 16 + 1, ((void *) 0)} ++ , ++ { ++ xhci->event_ring->first_seg->dma + (64) * 16, ((void *) 0)} ++ , ++ { ++ (dma_addr_t) (~0), ((void *) 0) ++ } ++ }; ++ struct ++ { ++ struct xhci_segment *input_seg; ++ union xhci_trb *start_trb; ++ union xhci_trb *end_trb; ++ dma_addr_t input_dma; ++ struct xhci_segment *result_seg; ++ } ++ complex_test_vector[] = ++ { ++ { ++ .input_seg = xhci->event_ring->first_seg,.start_trb = ++ xhci->event_ring->first_seg->trbs,.end_trb = ++ &xhci->event_ring->first_seg->trbs[64 - 1],.input_dma = ++ xhci->cmd_ring->first_seg->dma,.result_seg = ((void *) 0), ++ } ++ , ++ { ++ .input_seg = xhci->event_ring->first_seg,.start_trb = ++ xhci->event_ring->first_seg->trbs,.end_trb = ++ &xhci->cmd_ring->first_seg->trbs[64 - 1],.input_dma = ++ xhci->cmd_ring->first_seg->dma,.result_seg = ((void *) 0), ++ } ++ , ++ { ++ .input_seg = xhci->event_ring->first_seg,.start_trb = ++ xhci->cmd_ring->first_seg->trbs,.end_trb = ++ &xhci->cmd_ring->first_seg->trbs[64 - 1],.input_dma = ++ xhci->cmd_ring->first_seg->dma,.result_seg = ((void *) 0), ++ } ++ , ++ { ++ .input_seg = xhci->event_ring->first_seg,.start_trb = ++ &xhci->event_ring->first_seg->trbs[0],.end_trb = ++ &xhci->event_ring->first_seg->trbs[3],.input_dma = ++ xhci->event_ring->first_seg->dma + 4 * 16,.result_seg = ((void *) 0), ++ } ++ , ++ { ++ .input_seg = xhci->event_ring->first_seg,.start_trb = ++ &xhci->event_ring->first_seg->trbs[3],.end_trb = ++ &xhci->event_ring->first_seg->trbs[6],.input_dma = ++ xhci->event_ring->first_seg->dma + 2 * 16,.result_seg = ((void *) 0), ++ } ++ , ++ { ++ .input_seg = xhci->event_ring->first_seg,.start_trb = ++ &xhci->event_ring->first_seg->trbs[64 - 3],.end_trb = ++ &xhci->event_ring->first_seg->trbs[1],.input_dma = ++ xhci->event_ring->first_seg->dma + 2 * 16,.result_seg = ((void *) 0), ++ } ++ , ++ { ++ .input_seg = xhci->event_ring->first_seg,.start_trb = ++ &xhci->event_ring->first_seg->trbs[64 - 3],.end_trb = ++ &xhci->event_ring->first_seg->trbs[1],.input_dma = ++ xhci->event_ring->first_seg->dma + (64 - 4) * 16,.result_seg = ++ ((void *) 0), ++ } ++ , ++ { ++ .input_seg = xhci->event_ring->first_seg,.start_trb = ++ &xhci->event_ring->first_seg->trbs[64 - 3],.end_trb = ++ &xhci->event_ring->first_seg->trbs[1],.input_dma = ++ xhci->cmd_ring->first_seg->dma + 2 * 16,.result_seg = ((void *) 0), ++ } ++ }; ++ unsigned int num_tests; ++ int i, ret; ++ num_tests = ++ (sizeof (simple_test_vector) / sizeof ((simple_test_vector)[0]) + ++ (sizeof (struct ++ { ++ } ++ ))); ++ for (i = 0; i < num_tests; i++) ++ { ++ ret = ++ xhci_test_trb_in_td (xhci, xhci->event_ring->first_seg, ++ xhci->event_ring->first_seg->trbs, ++ &xhci->event_ring->first_seg->trbs[64 - 1], ++ simple_test_vector[i].input_dma, ++ simple_test_vector[i].result_seg, "Simple", i); ++ if (ret < 0) ++ return ret; ++ } ++ for (i = 0; i < num_tests; i++) ++ { ++ ret = ++ xhci_test_trb_in_td (xhci, complex_test_vector[i].input_seg, ++ complex_test_vector[i].start_trb, ++ complex_test_vector[i].end_trb, ++ complex_test_vector[i].input_dma, ++ complex_test_vector[i].result_seg, "Complex", i); ++ if (ret < 0) ++ return ret; ++ } ++} +--- a/src/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire.c ++++ b/src/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arch_v8a_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_arch_v8a } */ ++ ++#include "../aarch64/atomic-comp-swap-release-acquire.x" ++ ++/* { dg-final { scan-assembler-times "ldaex\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 4 } } */ ++/* { dg-final { scan-assembler-times "stlex" 4 } } */ ++/* { dg-final { scan-assembler-not "dmb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/pr19599.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr19599.c +@@ -0,0 +1,10 @@ ++/* { dg-skip-if "need at least armv5te" { *-*-* } { "-march=armv[234]*" "-mthumb" } { "" } } */ ++/* { dg-options "-O2 -march=armv5te -marm" } */ ++/* { dg-final { scan-assembler "bx" } } */ ++ ++int (*indirect_func)(); ++ ++int indirect_call() ++{ ++ return indirect_func(); ++} +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vstrq_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vstrq_p128.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++void ++foo (poly128_t* ptr, poly128_t val) ++{ ++ vstrq_p128 (ptr, val); ++} ++ ++/* { dg-final { scan-assembler "vst1.64\t{d\[0-9\]+-d\[0-9\]+}.*" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/atomic-op-seq_cst.c ++++ b/src/gcc/testsuite/gcc.target/arm/atomic-op-seq_cst.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arch_v8a_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_arch_v8a } */ ++ ++#include "../aarch64/atomic-op-seq_cst.x" ++ ++/* { dg-final { scan-assembler-times "ldaex\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stlex\t...?, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-not "dmb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselgedf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselgedf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++double ++foo (double x, double y) ++{ ++ volatile int i = 0; ++ return i >= 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselge.f64\td\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/atomic-op-consume.c ++++ b/src/gcc/testsuite/gcc.target/arm/atomic-op-consume.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arch_v8a_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_arch_v8a } */ ++ ++#include "../aarch64/atomic-op-consume.x" ++ ++/* { dg-final { scan-assembler-times "ldrex\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "strex\t...?, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-not "dmb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/atomic-op-char.c ++++ b/src/gcc/testsuite/gcc.target/arm/atomic-op-char.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arch_v8a_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_arch_v8a } */ ++ ++#include "../aarch64/atomic-op-char.x" ++ ++/* { dg-final { scan-assembler-times "ldrexb\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "strexb\t...?, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-not "dmb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/thumb-ltu.c ++++ b/src/gcc/testsuite/gcc.target/arm/thumb-ltu.c +@@ -1,5 +1,5 @@ + /* { dg-do compile } */ +-/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv6" "-march=armv6j" "-march=armv6z" } } */ ++/* { dg-require-effective-target arm_thumb1_ok } */ + /* { dg-options "-mcpu=arm1136jf-s -mthumb -O2" } */ + + void f(unsigned a, unsigned b, unsigned c, unsigned d) +--- a/src/gcc/testsuite/gcc.target/arm/pr60264.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr60264.c +@@ -0,0 +1,12 @@ ++/* { dg-do compile } */ ++/* { dg-options "-mapcs -g" } */ ++ ++double bar(void); ++ ++int foo(void) ++{ ++ int i = bar() + bar(); ++ ++ return i; ++} ++ +--- a/src/gcc/testsuite/gcc.target/arm/vselnesf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselnesf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++float ++foo (float x, float y) ++{ ++ volatile int i = 0; ++ return i != 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vseleq.f32\ts\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vaesmcq_u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vaesmcq_u8.c +@@ -0,0 +1,20 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint8x16_t a, b; ++ int i = 0; ++ ++ for (i = 0; i < 16; ++i) ++ a[i] = i; ++ ++ b = vaesmcq_u8 (a); ++ return b[0]; ++} ++ ++/* { dg-final { scan-assembler "aesmc.8\tq\[0-9\]+, q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselvcsf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselvcsf.c +@@ -0,0 +1,12 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++float ++foo (float x, float y) ++{ ++ return !__builtin_isunordered (x, y) ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselvs.f32\ts\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vsha256hq_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vsha256hq_u32.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint32x4_t a = {0xd, 0xe, 0xa, 0xd}; ++ uint32x4_t b = {0, 1, 2, 3}; ++ uint32x4_t c = {3, 2, 1, 0}; ++ ++ uint32x4_t res = vsha256hq_u32 (a, b, c); ++ return res[0]; ++} ++ ++/* { dg-final { scan-assembler "sha256h.32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/minmax_minus.c ++++ b/src/gcc/testsuite/gcc.target/arm/minmax_minus.c +@@ -0,0 +1,12 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_cond_exec } */ ++/* { dg-options "-O2" } */ ++ ++#define MAX(a, b) (a > b ? a : b) ++int ++foo (int a, int b, int c) ++{ ++ return c - MAX (a, b); ++} ++ ++/* { dg-final { scan-assembler-not "mov" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/atomic-op-release.c ++++ b/src/gcc/testsuite/gcc.target/arm/atomic-op-release.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arch_v8a_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_arch_v8a } */ ++ ++#include "../aarch64/atomic-op-release.x" ++ ++/* { dg-final { scan-assembler-times "ldrex\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stlex\t...?, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-not "dmb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselvssf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselvssf.c +@@ -0,0 +1,12 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++float ++foo (float x, float y) ++{ ++ return __builtin_isunordered (x, y) ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselvs.f32\ts\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint32_t hash = 0xdeadbeef; ++ uint32x4_t a = {0, 1, 2, 3}; ++ uint32x4_t b = {3, 2, 1, 0}; ++ ++ uint32x4_t res = vsha1cq_u32 (a, hash, b); ++ return res[0]; ++} ++ ++/* { dg-final { scan-assembler "sha1c.32\tq\[0-9\]+, q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vaeseq_u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vaeseq_u8.c +@@ -0,0 +1,22 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint8x16_t a, b, c; ++ int i = 0; ++ ++ for (i = 0; i < 16; ++i) ++ { ++ a[i] = i; ++ b[i] = 15 - i; ++ } ++ c = vaeseq_u8 (a, b); ++ return c[0]; ++} ++ ++/* { dg-final { scan-assembler "aese.8\tq\[0-9\]+, q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vect-rounding-roundf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vect-rounding-roundf.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_neon_ok } */ ++/* { dg-options "-O2 -ffast-math -ftree-vectorize" } */ ++/* { dg-add-options arm_v8_neon } */ ++ ++#define N 32 ++ ++void ++foo (float *output, float *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_roundf (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_roundf } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vtst_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vtst_p64.c +@@ -0,0 +1,38 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-require-effective-target arm_neon_hw } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++#include ++ ++extern void abort (void); ++ ++int ++main (void) ++{ ++ uint64_t args[] = { 0x0, 0xdeadbeef, ~0xdeadbeef, 0xffff, ++ ~0xffff, 0xffffffff, ~0xffffffff, ~0x0 }; ++ int i, j; ++ ++ for (i = 0; i < sizeof (args) / sizeof (args[0]); ++i) ++ { ++ for (j = 0; j < sizeof (args) / sizeof (args[0]); ++j) ++ { ++ uint64_t a1 = args[i]; ++ uint64_t a2 = args[j]; ++ uint64_t res = vtst_p64 (vreinterpret_p64_u64 (a1), ++ vreinterpret_p64_u64 (a2)); ++ uint64_t exp = (a1 & a2) ? ~0x0 : 0x0; ++ ++ if (res != exp) ++ { ++ fprintf (stderr, "vtst_p64 (a1= %lx, a2= %lx)" ++ " returned %lx, expected %lx\n", ++ a1, a2, res, exp); ++ abort (); ++ } ++ } ++ } ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/arm/neon-for-64bits-1.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-for-64bits-1.c +@@ -0,0 +1,54 @@ ++/* Check that Neon is *not* used by default to handle 64-bits scalar ++ operations. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++typedef long long i64; ++typedef unsigned long long u64; ++typedef unsigned int u32; ++typedef int i32; ++ ++/* Unary operators */ ++#define UNARY_OP(name, op) \ ++ void unary_##name(u64 *a, u64 *b) { *a = op (*b + 0x1234567812345678ULL) ; } ++ ++/* Binary operators */ ++#define BINARY_OP(name, op) \ ++ void binary_##name(u64 *a, u64 *b, u64 *c) { *a = *b op *c ; } ++ ++/* Unsigned shift */ ++#define SHIFT_U(name, op, amount) \ ++ void ushift_##name(u64 *a, u64 *b, int c) { *a = *b op amount; } ++ ++/* Signed shift */ ++#define SHIFT_S(name, op, amount) \ ++ void sshift_##name(i64 *a, i64 *b, int c) { *a = *b op amount; } ++ ++UNARY_OP(not, ~) ++ ++BINARY_OP(add, +) ++BINARY_OP(sub, -) ++BINARY_OP(and, &) ++BINARY_OP(or, |) ++BINARY_OP(xor, ^) ++ ++SHIFT_U(right1, >>, 1) ++SHIFT_U(right2, >>, 2) ++SHIFT_U(right5, >>, 5) ++SHIFT_U(rightn, >>, c) ++ ++SHIFT_S(right1, >>, 1) ++SHIFT_S(right2, >>, 2) ++SHIFT_S(right5, >>, 5) ++SHIFT_S(rightn, >>, c) ++ ++/* { dg-final {scan-assembler-times "vmvn" 0} } */ ++/* { dg-final {scan-assembler-times "vadd" 0} } */ ++/* { dg-final {scan-assembler-times "vsub" 0} } */ ++/* { dg-final {scan-assembler-times "vand" 0} } */ ++/* { dg-final {scan-assembler-times "vorr" 0} } */ ++/* { dg-final {scan-assembler-times "veor" 0} } */ ++/* { dg-final {scan-assembler-times "vshr" 0} } */ +--- a/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-2.c ++++ b/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-2.c +@@ -4,7 +4,7 @@ + + #include + +-char dest[16]; ++char dest[16] = { 0 }; + + void aligned_dest (char *src) + { +@@ -14,7 +14,10 @@ + /* Expect a multi-word store for the main part of the copy, but subword + loads/stores for the remainder. */ + +-/* { dg-final { scan-assembler-times "stmia" 1 } } */ ++/* { dg-final { scan-assembler-times "ldmia" 0 } } */ ++/* { dg-final { scan-assembler-times "ldrd" 0 } } */ ++/* { dg-final { scan-assembler-times "stmia" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ ++/* { dg-final { scan-assembler-times "strd" 1 { target { arm_prefer_ldrd_strd } } } } */ + /* { dg-final { scan-assembler-times "ldrh" 1 } } */ + /* { dg-final { scan-assembler-times "strh" 1 } } */ + /* { dg-final { scan-assembler-times "ldrb" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c +@@ -0,0 +1,14 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint32_t val = 0xdeadbeef; ++ return vsha1h_u32 (val); ++} ++ ++/* { dg-final { scan-assembler "sha1h.32\tq\[0-9\]+, q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/xordi3-opt.c ++++ b/src/gcc/testsuite/gcc.target/arm/xordi3-opt.c +@@ -0,0 +1,9 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O1" } */ ++ ++unsigned long long xor64 (unsigned long long input) ++{ ++ return input ^ 0x200000004ULL; ++} ++ ++/* { dg-final { scan-assembler-not "mov\[\\t \]+.+,\[\\t \]*.+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vsha256su1q_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vsha256su1q_u32.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint32x4_t a = {0xd, 0xe, 0xa, 0xd}; ++ uint32x4_t b = {0, 1, 2, 3}; ++ uint32x4_t c = {3, 2, 1, 0}; ++ ++ uint32x4_t res = vsha256su1q_u32 (a, b, c); ++ return res[0]; ++} ++ ++/* { dg-final { scan-assembler "sha256su1.32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel.c ++++ b/src/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arch_v8a_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_arch_v8a } */ ++ ++#include "../aarch64/atomic-op-acq_rel.x" ++ ++/* { dg-final { scan-assembler-times "ldaex\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stlex\t...?, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-not "dmb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselltsf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselltsf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++float ++foo (float x, float y) ++{ ++ volatile int i = 0; ++ return i < 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselge.f32\ts\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselnedf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselnedf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++double ++foo (double x, double y) ++{ ++ volatile int i = 0; ++ return i != 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vseleq.f64\td\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselvcdf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselvcdf.c +@@ -0,0 +1,12 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++double ++foo (double x, double y) ++{ ++ return !__builtin_isunordered (x, y) ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselvs.f64\td\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vect-rounding-btruncf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vect-rounding-btruncf.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_neon_ok } */ ++/* { dg-options "-O2 -ffast-math -ftree-vectorize" } */ ++/* { dg-add-options arm_v8_neon } */ ++ ++#define N 32 ++ ++void ++foo (float *output, float *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_truncf (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_btruncf } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vseleqsf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vseleqsf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++float ++foo (float x, float y) ++{ ++ volatile int i = 0; ++ return i == 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vseleq.f32\ts\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/ivopts-orig_biv-inc.c ++++ b/src/gcc/testsuite/gcc.target/arm/ivopts-orig_biv-inc.c +@@ -0,0 +1,19 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -fdump-tree-ivopts-details" } */ ++/* { dg-skip-if "" { arm_thumb1 } } */ ++ ++extern char *__ctype_ptr__; ++ ++unsigned char * foo(unsigned char *ReadPtr) ++{ ++ ++ unsigned char c; ++ ++ while (!(((__ctype_ptr__+sizeof(""[*ReadPtr]))[(int)(*ReadPtr)])&04) == (!(0))) ++ ReadPtr++; ++ ++ return ReadPtr; ++} ++ ++/* { dg-final { scan-tree-dump-times "original biv" 2 "ivopts"} } */ ++/* { dg-final { cleanup-tree-dump "ivopts" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselvsdf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselvsdf.c +@@ -0,0 +1,12 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++double ++foo (double x, double y) ++{ ++ return __builtin_isunordered (x, y) ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselvs.f64\td\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-3.c ++++ b/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-3.c +@@ -4,7 +4,7 @@ + + #include + +-char src[16]; ++char src[16] = {0}; + + void aligned_src (char *dest) + { +@@ -14,8 +14,11 @@ + /* Expect a multi-word load for the main part of the copy, but subword + loads/stores for the remainder. */ + +-/* { dg-final { scan-assembler-times "ldmia" 1 } } */ +-/* { dg-final { scan-assembler-times "ldrh" 1 } } */ ++/* { dg-final { scan-assembler-times "ldmia" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ ++/* { dg-final { scan-assembler-times "ldrd" 1 { target { arm_prefer_ldrd_strd } } } } */ ++/* { dg-final { scan-assembler-times "strd" 0 } } */ ++/* { dg-final { scan-assembler-times "stm" 0 } } */ ++/* { dg-final { scan-assembler-times "ldrh" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ + /* { dg-final { scan-assembler-times "strh" 1 } } */ +-/* { dg-final { scan-assembler-times "ldrb" 1 } } */ ++/* { dg-final { scan-assembler-times "ldrb" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ + /* { dg-final { scan-assembler-times "strb" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/pr46975-2.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr46975-2.c +@@ -0,0 +1,10 @@ ++/* { dg-options "-mthumb -O2" } */ ++/* { dg-require-effective-target arm_thumb2_ok } */ ++/* { dg-final { scan-assembler "sub" } } */ ++/* { dg-final { scan-assembler "clz" } } */ ++/* { dg-final { scan-assembler "lsr.*#5" } } */ ++ ++int foo (int s) ++{ ++ return s == 1; ++} +--- a/src/gcc/testsuite/gcc.target/arm/neon-vceq_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vceq_p64.c +@@ -0,0 +1,38 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-require-effective-target arm_neon_hw } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++#include ++ ++extern void abort (void); ++ ++int ++main (void) ++{ ++ uint64_t args[] = { 0x0, 0xdeadbeef, ~0xdeadbeef, 0xffff, ++ ~0xffff, 0xffffffff, ~0xffffffff, ~0x0 }; ++ int i, j; ++ ++ for (i = 0; i < sizeof (args) / sizeof (args[0]); ++i) ++ { ++ for (j = 0; j < sizeof (args) / sizeof (args[0]); ++j) ++ { ++ uint64_t a1 = args[i]; ++ uint64_t a2 = args[j]; ++ uint64_t res = vceq_p64 (vreinterpret_p64_u64 (a1), ++ vreinterpret_p64_u64 (a2)); ++ uint64_t exp = (a1 == a2) ? ~0x0 : 0x0; ++ ++ if (res != exp) ++ { ++ fprintf (stderr, "vceq_p64 (a1= %lx, a2= %lx)" ++ " returned %lx, expected %lx\n", ++ a1, a2, res, exp); ++ abort (); ++ } ++ } ++ } ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/arm/anddi3-opt2.c ++++ b/src/gcc/testsuite/gcc.target/arm/anddi3-opt2.c +@@ -0,0 +1,9 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O1" } */ ++ ++long long muld(long long X, long long Y) ++{ ++ return X & ~1; ++} ++ ++/* { dg-final { scan-assembler-not "and\[\\t \]+.+,\[\\t \]*.+,\[\\t \]*.+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c +@@ -15,4 +15,4 @@ + + /* { dg-final { scan-assembler-times "vcgt\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" 2 } } */ + /* { dg-final { scan-assembler "vorr\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +-/* { dg-final { scan-assembler "vbsl\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "vbsl|vbit|vbif\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vsha256h2q_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vsha256h2q_u32.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint32x4_t a = {0xd, 0xe, 0xa, 0xd}; ++ uint32x4_t b = {0, 1, 2, 3}; ++ uint32x4_t c = {3, 2, 1, 0}; ++ ++ uint32x4_t res = vsha256h2q_u32 (a, b, c); ++ return res[0]; ++} ++ ++/* { dg-final { scan-assembler "sha256h2.32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselltdf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselltdf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++double ++foo (double x, double y) ++{ ++ volatile int i = 0; ++ return i < 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselge.f64\td\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c ++++ b/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c +@@ -4,8 +4,8 @@ + + #include + +-char src[16]; +-char dest[16]; ++char src[16] = { 0 }; ++char dest[16] = { 0 }; + + void aligned_both (void) + { +@@ -14,5 +14,9 @@ + + /* We know both src and dest to be aligned: expect multiword loads/stores. */ + +-/* { dg-final { scan-assembler-times "ldmia" 1 } } */ +-/* { dg-final { scan-assembler-times "stmia" 1 } } */ ++/* { dg-final { scan-assembler-times "ldmia" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ ++/* { dg-final { scan-assembler-times "stmia" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ ++/* { dg-final { scan-assembler "ldrd" { target { arm_prefer_ldrd_strd } } } } */ ++/* { dg-final { scan-assembler-times "ldm" 0 { target { arm_prefer_ldrd_strd } } } } */ ++/* { dg-final { scan-assembler "strd" { target { arm_prefer_ldrd_strd } } } } */ ++/* { dg-final { scan-assembler-times "stm" 0 { target { arm_prefer_ldrd_strd } } } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vseleqdf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vseleqdf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++double ++foo (double x, double y) ++{ ++ volatile int i = 0; ++ return i == 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vseleq.f64\td\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/atomic-op-acquire.c ++++ b/src/gcc/testsuite/gcc.target/arm/atomic-op-acquire.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arch_v8a_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_arch_v8a } */ ++ ++#include "../aarch64/atomic-op-acquire.x" ++ ++/* { dg-final { scan-assembler-times "ldaex\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "strex\t...?, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-not "dmb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vsellesf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vsellesf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++float ++foo (float x, float y) ++{ ++ volatile int i = 0; ++ return i <= 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselgt.f32\ts\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vcond-unordered.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vcond-unordered.c +@@ -16,4 +16,4 @@ + /* { dg-final { scan-assembler "vcgt\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ + /* { dg-final { scan-assembler "vcge\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ + /* { dg-final { scan-assembler "vorr\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +-/* { dg-final { scan-assembler "vbsl\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "vbsl|vbit|vbif\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vsha1su0q_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vsha1su0q_u32.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint32x4_t a = {0xd, 0xe, 0xa, 0xd}; ++ uint32x4_t b = {0, 1, 2, 3}; ++ uint32x4_t c = {3, 2, 1, 0}; ++ ++ uint32x4_t res = vsha1su0q_u32 (a, b, c); ++ return res[0]; ++} ++ ++/* { dg-final { scan-assembler "sha1su0.32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vmull_high_p64.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vmull_high_p64.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++poly128_t ++foo (void) ++{ ++ poly64x2_t a = { 0xdeadbeef, 0xadabcaca }; ++ poly64x2_t b = { 0xdcdcdcdc, 0xbdbdbdbd }; ++ return vmull_high_p64 (a, b); ++} ++ ++/* { dg-final { scan-assembler "vmull.p64.*" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/atomic-op-int.c ++++ b/src/gcc/testsuite/gcc.target/arm/atomic-op-int.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arch_v8a_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_arch_v8a } */ ++ ++#include "../aarch64/atomic-op-int.x" ++ ++/* { dg-final { scan-assembler-times "ldrex\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "strex\t...?, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-not "dmb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint32_t hash = 0xdeadbeef; ++ uint32x4_t a = {0, 1, 2, 3}; ++ uint32x4_t b = {3, 2, 1, 0}; ++ ++ uint32x4_t res = vsha1mq_u32 (a, hash, b); ++ return res[0]; ++} ++ ++/* { dg-final { scan-assembler "sha1m.32\tq\[0-9\]+, q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vldrq_p128.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vldrq_p128.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++poly128_t ++foo (poly128_t* ptr) ++{ ++ return vldrq_p128 (ptr); ++} ++ ++/* { dg-final { scan-assembler "vld1.64\t{d\[0-9\]+-d\[0-9\]+}.*" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/ldrd-strd-offset.c ++++ b/src/gcc/testsuite/gcc.target/arm/ldrd-strd-offset.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++typedef struct ++{ ++ int x; ++ int i, j; ++} off_struct; ++ ++int foo (char *str, int *a, int b, int c) ++{ ++ off_struct *p = (off_struct *)(str + 3); ++ b = p->i; ++ c = p->j; ++ *a = b + c; ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/arm/atomic-op-short.c ++++ b/src/gcc/testsuite/gcc.target/arm/atomic-op-short.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arch_v8a_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_arch_v8a } */ ++ ++#include "../aarch64/atomic-op-short.x" ++ ++/* { dg-final { scan-assembler-times "ldrexh\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "strexh\t...?, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-not "dmb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/pr40887.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr40887.c +@@ -2,9 +2,9 @@ + /* { dg-options "-O2 -march=armv5te" } */ + /* { dg-final { scan-assembler "blx" } } */ + +-int (*indirect_func)(); ++int (*indirect_func)(int x); + + int indirect_call() + { +- return indirect_func(); ++ return indirect_func(20) + indirect_func (40); + } +--- a/src/gcc/testsuite/gcc.target/arm/crypto-vaesimcq_u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/crypto-vaesimcq_u8.c +@@ -0,0 +1,20 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_crypto_ok } */ ++/* { dg-add-options arm_crypto } */ ++ ++#include "arm_neon.h" ++ ++int ++foo (void) ++{ ++ uint8x16_t a, b; ++ int i = 0; ++ ++ for (i = 0; i < 16; ++i) ++ a[i] = i; ++ ++ b = vaesimcq_u8 (a); ++ return b[0]; ++} ++ ++/* { dg-final { scan-assembler "aesimc.8\tq\[0-9\]+, q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vect-rounding-ceilf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vect-rounding-ceilf.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_neon_ok } */ ++/* { dg-options "-O2 -ffast-math -ftree-vectorize" } */ ++/* { dg-add-options arm_v8_neon } */ ++ ++#define N 32 ++ ++void ++foo (float *output, float *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_ceilf (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_ceilf } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselledf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselledf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++double ++foo (double x, double y) ++{ ++ volatile int i = 0; ++ return i <= 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselgt.f64\td\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/vselgtsf.c ++++ b/src/gcc/testsuite/gcc.target/arm/vselgtsf.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_v8_vfp_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_v8_vfp } */ ++ ++float ++foo (float x, float y) ++{ ++ volatile int i = 0; ++ return i > 0 ? x : y; ++} ++ ++/* { dg-final { scan-assembler-times "vselgt.f32\ts\[0-9\]+" 1 } } */ +--- a/src/gcc/testsuite/gcc.target/arm/pr58578.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr58578.c +@@ -0,0 +1,54 @@ ++ ++/* PR target/58578 */ ++/* { dg-do run } */ ++/* { dg-options "-O1" } */ ++ ++#include ++ ++typedef struct { ++ long _prec; ++ int _flag; ++ long _exp; ++} __my_st_t; ++ ++typedef __my_st_t *__my_st_ptr; ++ ++int ++_test_fn (__my_st_ptr y, const __my_st_ptr xt) ++{ ++ int inexact; ++ if (xt->_exp != -2147483647L) ++ { ++ (y->_flag = xt->_flag); ++ } ++ ++ do { ++ __my_st_ptr _y = y; ++ long _err1 = -2 * xt->_exp; ++ long _err2 = 2; ++ if (0 < _err1) ++ { ++ unsigned long _err = (unsigned long) _err1 + _err2; ++ if (__builtin_expect(!!(_err > _y->_prec + 1), 0)) ++ return 2; ++ return 3; ++ } ++ } while (0); ++ ++ return 0; ++} ++ ++int main () ++{ ++ __my_st_t x, y; ++ long pz; ++ int inex; ++ ++ x._prec = 914; ++ y._exp = 18; ++ if (_test_fn (&x, &y)) ++ { ++ abort(); ++ } ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/arm/neon-vcond-gt.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vcond-gt.c +@@ -14,4 +14,4 @@ + } + + /* { dg-final { scan-assembler "vcgt\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +-/* { dg-final { scan-assembler "vbit\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "vbsl|vbit|vbif\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/insv_2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/insv_2.c +@@ -0,0 +1,85 @@ ++/* { dg-do run { target aarch64*-*-* } } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++/* { dg-require-effective-target aarch64_big_endian } */ ++ ++extern void abort (void); ++ ++typedef struct bitfield ++{ ++ unsigned short eight: 8; ++ unsigned short four: 4; ++ unsigned short five: 5; ++ unsigned short seven: 7; ++ unsigned int sixteen: 16; ++} bitfield; ++ ++bitfield ++bfi1 (bitfield a) ++{ ++ /* { dg-final { scan-assembler "bfi\tx\[0-9\]+, x\[0-9\]+, 56, 8" } } */ ++ a.eight = 3; ++ return a; ++} ++ ++bitfield ++bfi2 (bitfield a) ++{ ++ /* { dg-final { scan-assembler "bfi\tx\[0-9\]+, x\[0-9\]+, 43, 5" } } */ ++ a.five = 7; ++ return a; ++} ++ ++bitfield ++movk (bitfield a) ++{ ++ /* { dg-final { scan-assembler "movk\tx\[0-9\]+, 0x1d6b, lsl 16" } } */ ++ a.sixteen = 7531; ++ return a; ++} ++ ++bitfield ++set1 (bitfield a) ++{ ++ /* { dg-final { scan-assembler "orr\tx\[0-9\]+, x\[0-9\]+, 272678883688448" } } */ ++ a.five = 0x1f; ++ return a; ++} ++ ++bitfield ++set0 (bitfield a) ++{ ++ /* { dg-final { scan-assembler "and\tx\[0-9\]+, x\[0-9\]+, -272678883688449" } } */ ++ a.five = 0; ++ return a; ++} ++ ++ ++int ++main (int argc, char** argv) ++{ ++ static bitfield a; ++ bitfield b = bfi1 (a); ++ bitfield c = bfi2 (b); ++ bitfield d = movk (c); ++ ++ if (d.eight != 3) ++ abort (); ++ ++ if (d.five != 7) ++ abort (); ++ ++ if (d.sixteen != 7531) ++ abort (); ++ ++ d = set1 (d); ++ if (d.five != 0x1f) ++ abort (); ++ ++ d = set0 (d); ++ if (d.five != 0) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vrecps.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vrecps.c +@@ -0,0 +1,144 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps" } */ ++ ++#include ++#include ++#include ++ ++int ++test_frecps_float32_t (void) ++{ ++ int i; ++ float32_t value = 0.2; ++ float32_t reciprocal = 5.0; ++ float32_t step = vrecpes_f32 (value); ++ /* 3 steps should give us within ~0.001 accuracy. */ ++ for (i = 0; i < 3; i++) ++ step = step * vrecpss_f32 (step, value); ++ ++ return fabs (step - reciprocal) < 0.001; ++} ++ ++/* { dg-final { scan-assembler "frecpe\\ts\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "frecps\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" } } */ ++ ++int ++test_frecps_float32x2_t (void) ++{ ++ int i; ++ int ret = 1; ++ ++ const float32_t value_pool[] = {0.2, 0.4}; ++ const float32_t reciprocal_pool[] = {5.0, 2.5}; ++ float32x2_t value = vld1_f32 (value_pool); ++ float32x2_t reciprocal = vld1_f32 (reciprocal_pool); ++ ++ float32x2_t step = vrecpe_f32 (value); ++ /* 3 steps should give us within ~0.001 accuracy. */ ++ for (i = 0; i < 3; i++) ++ step = step * vrecps_f32 (step, value); ++ ++ ret &= fabs (vget_lane_f32 (step, 0) ++ - vget_lane_f32 (reciprocal, 0)) < 0.001; ++ ret &= fabs (vget_lane_f32 (step, 1) ++ - vget_lane_f32 (reciprocal, 1)) < 0.001; ++ ++ return ret; ++} ++ ++/* { dg-final { scan-assembler "frecpe\\tv\[0-9\]+.2s, v\[0-9\]+.2s" } } */ ++/* { dg-final { scan-assembler "frecps\\tv\[0-9\]+.2s, v\[0-9\]+.2s, v\[0-9\]+.2s" } } */ ++ ++int ++test_frecps_float32x4_t (void) ++{ ++ int i; ++ int ret = 1; ++ ++ const float32_t value_pool[] = {0.2, 0.4, 0.5, 0.8}; ++ const float32_t reciprocal_pool[] = {5.0, 2.5, 2.0, 1.25}; ++ float32x4_t value = vld1q_f32 (value_pool); ++ float32x4_t reciprocal = vld1q_f32 (reciprocal_pool); ++ ++ float32x4_t step = vrecpeq_f32 (value); ++ /* 3 steps should give us within ~0.001 accuracy. */ ++ for (i = 0; i < 3; i++) ++ step = step * vrecpsq_f32 (step, value); ++ ++ ret &= fabs (vgetq_lane_f32 (step, 0) ++ - vgetq_lane_f32 (reciprocal, 0)) < 0.001; ++ ret &= fabs (vgetq_lane_f32 (step, 1) ++ - vgetq_lane_f32 (reciprocal, 1)) < 0.001; ++ ret &= fabs (vgetq_lane_f32 (step, 2) ++ - vgetq_lane_f32 (reciprocal, 2)) < 0.001; ++ ret &= fabs (vgetq_lane_f32 (step, 3) ++ - vgetq_lane_f32 (reciprocal, 3)) < 0.001; ++ ++ return ret; ++} ++ ++/* { dg-final { scan-assembler "frecpe\\tv\[0-9\]+.4s, v\[0-9\]+.4s" } } */ ++/* { dg-final { scan-assembler "frecps\\tv\[0-9\]+.4s, v\[0-9\]+.4s, v\[0-9\]+.4s" } } */ ++ ++int ++test_frecps_float64_t (void) ++{ ++ int i; ++ float64_t value = 0.2; ++ float64_t reciprocal = 5.0; ++ float64_t step = vrecped_f64 (value); ++ /* 3 steps should give us within ~0.001 accuracy. */ ++ for (i = 0; i < 3; i++) ++ step = step * vrecpsd_f64 (step, value); ++ ++ return fabs (step - reciprocal) < 0.001; ++} ++ ++/* { dg-final { scan-assembler "frecpe\\td\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "frecps\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" } } */ ++ ++int ++test_frecps_float64x2_t (void) ++{ ++ int i; ++ int ret = 1; ++ ++ const float64_t value_pool[] = {0.2, 0.4}; ++ const float64_t reciprocal_pool[] = {5.0, 2.5}; ++ float64x2_t value = vld1q_f64 (value_pool); ++ float64x2_t reciprocal = vld1q_f64 (reciprocal_pool); ++ ++ float64x2_t step = vrecpeq_f64 (value); ++ /* 3 steps should give us within ~0.001 accuracy. */ ++ for (i = 0; i < 3; i++) ++ step = step * vrecpsq_f64 (step, value); ++ ++ ret &= fabs (vgetq_lane_f64 (step, 0) ++ - vgetq_lane_f64 (reciprocal, 0)) < 0.001; ++ ret &= fabs (vgetq_lane_f64 (step, 1) ++ - vgetq_lane_f64 (reciprocal, 1)) < 0.001; ++ ++ return ret; ++} ++ ++/* { dg-final { scan-assembler "frecpe\\tv\[0-9\]+.2d, v\[0-9\]+.2d" } } */ ++/* { dg-final { scan-assembler "frecps\\tv\[0-9\]+.2d, v\[0-9\]+.2d, v\[0-9\]+.2d" } } */ ++ ++int ++main (int argc, char **argv) ++{ ++ if (!test_frecps_float32_t ()) ++ abort (); ++ if (!test_frecps_float32x2_t ()) ++ abort (); ++ if (!test_frecps_float32x4_t ()) ++ abort (); ++ if (!test_frecps_float64_t ()) ++ abort (); ++ if (!test_frecps_float64x2_t ()) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/ands_2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/ands_2.c +@@ -0,0 +1,157 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++ ++int ++ands_si_test1 (int a, int b, int c) ++{ ++ int d = a & b; ++ ++ /* { dg-final { scan-assembler-not "ands\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */ ++ /* { dg-final { scan-assembler-times "and\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 2 } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++ands_si_test2 (int a, int b, int c) ++{ ++ int d = a & 0x99999999; ++ ++ /* { dg-final { scan-assembler-not "ands\tw\[0-9\]+, w\[0-9\]+, -1717986919" } } */ ++ /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, -1717986919" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++ands_si_test3 (int a, int b, int c) ++{ ++ int d = a & (b << 3); ++ ++ /* { dg-final { scan-assembler-not "ands\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++typedef long long s64; ++ ++s64 ++ands_di_test1 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a & b; ++ ++ /* { dg-final { scan-assembler-not "ands\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */ ++ /* { dg-final { scan-assembler-times "and\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" 2 } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++ands_di_test2 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a & 0xaaaaaaaaaaaaaaaall; ++ ++ /* { dg-final { scan-assembler-not "ands\tx\[0-9\]+, x\[0-9\]+, -6148914691236517206" } } */ ++ /* { dg-final { scan-assembler "and\tx\[0-9\]+, x\[0-9\]+, -6148914691236517206" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++ands_di_test3 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a & (b << 3); ++ ++ /* { dg-final { scan-assembler-not "ands\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ /* { dg-final { scan-assembler "and\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++main () ++{ ++ int x; ++ s64 y; ++ ++ x = ands_si_test1 (29, 4, 5); ++ if (x != 13) ++ abort (); ++ ++ x = ands_si_test1 (5, 2, 20); ++ if (x != 25) ++ abort (); ++ ++ x = ands_si_test2 (29, 4, 5); ++ if (x != 34) ++ abort (); ++ ++ x = ands_si_test2 (1024, 2, 20); ++ if (x != 1044) ++ abort (); ++ ++ x = ands_si_test3 (35, 4, 5); ++ if (x != 41) ++ abort (); ++ ++ x = ands_si_test3 (5, 2, 20); ++ if (x != 25) ++ abort (); ++ ++ y = ands_di_test1 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ ++ if (y != ((0x130000029ll & 0x320000004ll) + 0x320000004ll + 0x505050505ll)) ++ abort (); ++ ++ y = ands_di_test1 (0x5000500050005ll, ++ 0x2111211121112ll, ++ 0x0000000002020ll); ++ if (y != 0x5000500052025ll) ++ abort (); ++ ++ y = ands_di_test2 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ if (y != ((0x130000029ll & 0xaaaaaaaaaaaaaaaall) + 0x320000004ll + 0x505050505ll)) ++ abort (); ++ ++ y = ands_di_test2 (0x540004100ll, ++ 0x320000004ll, ++ 0x805050205ll); ++ if (y != (0x540004100ll + 0x805050205ll)) ++ abort (); ++ ++ y = ands_di_test3 (0x130000029ll, ++ 0x064000008ll, ++ 0x505050505ll); ++ if (y != ((0x130000029ll & (0x064000008ll << 3)) ++ + 0x064000008ll + 0x505050505ll)) ++ abort (); ++ ++ y = ands_di_test3 (0x130002900ll, ++ 0x088000008ll, ++ 0x505050505ll); ++ if (y != (0x130002900ll + 0x505050505ll)) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/scalar-vca.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/scalar-vca.c +@@ -0,0 +1,72 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps" } */ ++ ++#include ++ ++extern void abort (void); ++extern float fabsf (float); ++extern double fabs (double); ++ ++#define NUM_TESTS 8 ++ ++float input_s1[] = {0.1f, -0.1f, 0.4f, 10.3f, 200.0f, -800.0f, -13.0f, -0.5f}; ++float input_s2[] = {-0.2f, 0.4f, 0.04f, -100.3f, 2.0f, -80.0f, 13.0f, -0.5f}; ++double input_d1[] = {0.1, -0.1, 0.4, 10.3, 200.0, -800.0, -13.0, -0.5}; ++double input_d2[] = {-0.2, 0.4, 0.04, -100.3, 2.0, -80.0, 13.0, -0.5}; ++ ++#define TEST(TEST, CMP, SUFFIX, WIDTH, F) \ ++int \ ++test_fca##TEST##SUFFIX##_float##WIDTH##_t (void) \ ++{ \ ++ int ret = 0; \ ++ int i = 0; \ ++ uint##WIDTH##_t output[NUM_TESTS]; \ ++ \ ++ for (i = 0; i < NUM_TESTS; i++) \ ++ { \ ++ float##WIDTH##_t f1 = fabs##F (input_##SUFFIX##1[i]); \ ++ float##WIDTH##_t f2 = fabs##F (input_##SUFFIX##2[i]); \ ++ /* Inhibit optimization of our linear test loop. */ \ ++ asm volatile ("" : : : "memory"); \ ++ output[i] = f1 CMP f2 ? -1 : 0; \ ++ } \ ++ \ ++ for (i = 0; i < NUM_TESTS; i++) \ ++ { \ ++ output[i] = vca##TEST##SUFFIX##_f##WIDTH (input_##SUFFIX##1[i], \ ++ input_##SUFFIX##2[i]) \ ++ ^ output[i]; \ ++ /* Inhibit autovectorization of our scalar test loop. */ \ ++ asm volatile ("" : : : "memory"); \ ++ } \ ++ \ ++ for (i = 0; i < NUM_TESTS; i++) \ ++ ret |= output[i]; \ ++ \ ++ return ret; \ ++} ++ ++TEST (ge, >=, s, 32, f) ++/* { dg-final { scan-assembler "facge\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" } } */ ++TEST (ge, >=, d, 64, ) ++/* { dg-final { scan-assembler "facge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" } } */ ++TEST (gt, >, s, 32, f) ++/* { dg-final { scan-assembler "facgt\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" } } */ ++TEST (gt, >, d, 64, ) ++/* { dg-final { scan-assembler "facgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" } } */ ++ ++int ++main (int argc, char **argv) ++{ ++ if (test_fcages_float32_t ()) ++ abort (); ++ if (test_fcaged_float64_t ()) ++ abort (); ++ if (test_fcagts_float32_t ()) ++ abort (); ++ if (test_fcagtd_float64_t ()) ++ abort (); ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.x +@@ -0,0 +1,37 @@ ++int v = 0; ++ ++int ++atomic_fetch_add_ACQ_REL (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_sub_ACQ_REL (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_and_ACQ_REL (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_nand_ACQ_REL (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_xor_ACQ_REL (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_or_ACQ_REL (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_ACQ_REL); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect_smlal_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect_smlal_1.c +@@ -0,0 +1,325 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 -fno-inline -save-temps -fno-vect-cost-model" } */ ++ ++typedef signed char S8_t; ++typedef signed short S16_t; ++typedef signed int S32_t; ++typedef signed long S64_t; ++typedef signed char *__restrict__ pS8_t; ++typedef signed short *__restrict__ pS16_t; ++typedef signed int *__restrict__ pS32_t; ++typedef signed long *__restrict__ pS64_t; ++typedef unsigned char U8_t; ++typedef unsigned short U16_t; ++typedef unsigned int U32_t; ++typedef unsigned long U64_t; ++typedef unsigned char *__restrict__ pU8_t; ++typedef unsigned short *__restrict__ pU16_t; ++typedef unsigned int *__restrict__ pU32_t; ++typedef unsigned long *__restrict__ pU64_t; ++ ++extern void abort (); ++ ++void ++test_addS64_tS32_t4 (pS64_t a, pS32_t b, pS32_t c) ++{ ++ int i; ++ for (i = 0; i < 4; i++) ++ a[i] += (S64_t) b[i] * (S64_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler "smlal\tv\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "smlal2\tv\[0-9\]+\.2d" } } */ ++ ++void ++test_addS32_tS16_t8 (pS32_t a, pS16_t b, pS16_t c) ++{ ++ int i; ++ for (i = 0; i < 8; i++) ++ a[i] += (S32_t) b[i] * (S32_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler "smlal\tv\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "smlal2\tv\[0-9\]+\.4s" } } */ ++ ++void ++test_addS16_tS8_t16 (pS16_t a, pS8_t b, pS8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] += (S16_t) b[i] * (S16_t) c[i]; ++} ++ ++void ++test_addS16_tS8_t16_neg0 (pS16_t a, pS8_t b, pS8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] += (S16_t) -b[i] * (S16_t) -c[i]; ++} ++ ++void ++test_addS16_tS8_t16_neg1 (pS16_t a, pS8_t b, pS8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] -= (S16_t) b[i] * (S16_t) -c[i]; ++} ++ ++void ++test_addS16_tS8_t16_neg2 (pS16_t a, pS8_t b, pS8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] -= (S16_t) -b[i] * (S16_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler-times "smlal\tv\[0-9\]+\.8h" 4 } } */ ++/* { dg-final { scan-assembler-times "smlal2\tv\[0-9\]+\.8h" 4 } } */ ++ ++void ++test_subS64_tS32_t4 (pS64_t a, pS32_t b, pS32_t c) ++{ ++ int i; ++ for (i = 0; i < 4; i++) ++ a[i] -= (S64_t) b[i] * (S64_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler "smlsl\tv\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "smlsl2\tv\[0-9\]+\.2d" } } */ ++ ++void ++test_subS32_tS16_t8 (pS32_t a, pS16_t b, pS16_t c) ++{ ++ int i; ++ for (i = 0; i < 8; i++) ++ a[i] -= (S32_t) b[i] * (S32_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler "smlsl\tv\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "smlsl2\tv\[0-9\]+\.4s" } } */ ++ ++void ++test_subS16_tS8_t16 (pS16_t a, pS8_t b, pS8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] -= (S16_t) b[i] * (S16_t) c[i]; ++} ++ ++void ++test_subS16_tS8_t16_neg0 (pS16_t a, pS8_t b, pS8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] += (S16_t) -b[i] * (S16_t) c[i]; ++} ++ ++void ++test_subS16_tS8_t16_neg1 (pS16_t a, pS8_t b, pS8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] += (S16_t) b[i] * (S16_t) -c[i]; ++} ++ ++void ++test_subS16_tS8_t16_neg2 (pS16_t a, pS8_t b, pS8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] += -((S16_t) b[i] * (S16_t) c[i]); ++} ++ ++void ++test_subS16_tS8_t16_neg3 (pS16_t a, pS8_t b, pS8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] -= (S16_t) -b[i] * (S16_t) -c[i]; ++} ++ ++/* { dg-final { scan-assembler-times "smlsl\tv\[0-9\]+\.8h" 5 } } */ ++/* { dg-final { scan-assembler-times "smlsl2\tv\[0-9\]+\.8h" 5 } } */ ++ ++void ++test_addU64_tU32_t4 (pU64_t a, pU32_t b, pU32_t c) ++{ ++ int i; ++ for (i = 0; i < 4; i++) ++ a[i] += (U64_t) b[i] * (U64_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler "umlal\tv\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "umlal2\tv\[0-9\]+\.2d" } } */ ++ ++void ++test_addU32_tU16_t8 (pU32_t a, pU16_t b, pU16_t c) ++{ ++ int i; ++ for (i = 0; i < 8; i++) ++ a[i] += (U32_t) b[i] * (U32_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler "umlal\tv\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "umlal2\tv\[0-9\]+\.4s" } } */ ++ ++void ++test_addU16_tU8_t16 (pU16_t a, pU8_t b, pU8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] += (U16_t) b[i] * (U16_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler "umlal\tv\[0-9\]+\.8h" } } */ ++/* { dg-final { scan-assembler "umlal2\tv\[0-9\]+\.8h" } } */ ++ ++void ++test_subU64_tU32_t4 (pU64_t a, pU32_t b, pU32_t c) ++{ ++ int i; ++ for (i = 0; i < 4; i++) ++ a[i] -= (U64_t) b[i] * (U64_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler "umlsl\tv\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "umlsl2\tv\[0-9\]+\.2d" } } */ ++ ++void ++test_subU32_tU16_t8 (pU32_t a, pU16_t b, pU16_t c) ++{ ++ int i; ++ for (i = 0; i < 8; i++) ++ a[i] -= (U32_t) b[i] * (U32_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler "umlsl\tv\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "umlsl2\tv\[0-9\]+\.4s" } } */ ++ ++void ++test_subU16_tU8_t16 (pU16_t a, pU8_t b, pU8_t c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ a[i] -= (U16_t) b[i] * (U16_t) c[i]; ++} ++ ++/* { dg-final { scan-assembler "umlsl\tv\[0-9\]+\.8h" } } */ ++/* { dg-final { scan-assembler "umlsl2\tv\[0-9\]+\.8h" } } */ ++ ++ ++S64_t add_rS64[4] = { 6, 7, -4, -3 }; ++S32_t add_rS32[8] = { 6, 7, -4, -3, 10, 11, 0, 1 }; ++S16_t add_rS16[16] = ++ { 6, 7, -4, -3, 10, 11, 0, 1, 14, 15, 4, 5, 18, 19, 8, 9 }; ++ ++S64_t sub_rS64[4] = { 0, 1, 2, 3 }; ++S32_t sub_rS32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; ++S16_t sub_rS16[16] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; ++ ++U64_t add_rU64[4] = { 0x6, 0x7, 0x2fffffffc, 0x2fffffffd }; ++ ++U32_t add_rU32[8] = ++{ ++ 0x6, 0x7, 0x2fffc, 0x2fffd, ++ 0xa, 0xb, 0x30000, 0x30001 ++}; ++ ++U16_t add_rU16[16] = ++{ ++ 0x6, 0x7, 0x2fc, 0x2fd, 0xa, 0xb, 0x300, 0x301, ++ 0xe, 0xf, 0x304, 0x305, 0x12, 0x13, 0x308, 0x309 ++}; ++ ++U64_t sub_rU64[4] = { 0, 1, 2, 3 }; ++U32_t sub_rU32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; ++U16_t sub_rU16[16] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; ++ ++S8_t neg_r[16] = { -6, -5, 8, 9, -2, -1, 12, 13, 2, 3, 16, 17, 6, 7, 20, 21 }; ++ ++S64_t S64_ta[16] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; ++S32_t S32_tb[16] = { 2, 2, -2, -2, 2, 2, -2, -2, 2, 2, -2, -2, 2, 2, -2, -2 }; ++S32_t S32_tc[16] = { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }; ++ ++S32_t S32_ta[16] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; ++S16_t S16_tb[16] = { 2, 2, -2, -2, 2, 2, -2, -2, 2, 2, -2, -2, 2, 2, -2, -2 }; ++S16_t S16_tc[16] = { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }; ++ ++S16_t S16_ta[16] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; ++S8_t S8_tb[16] = { 2, 2, -2, -2, 2, 2, -2, -2, 2, 2, -2, -2, 2, 2, -2, -2 }; ++S8_t S8_tc[16] = { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }; ++ ++ ++#define CHECK(T,N,AS,US) \ ++do \ ++ { \ ++ for (i = 0; i < N; i++) \ ++ if (S##T##_ta[i] != AS##_r##US##T[i]) \ ++ abort (); \ ++ } \ ++while (0) ++ ++#define SCHECK(T,N,AS) CHECK(T,N,AS,S) ++#define UCHECK(T,N,AS) CHECK(T,N,AS,U) ++ ++#define NCHECK(RES) \ ++do \ ++ { \ ++ for (i = 0; i < 16; i++) \ ++ if (S16_ta[i] != RES[i]) \ ++ abort (); \ ++ } \ ++while (0) ++ ++ ++int ++main () ++{ ++ int i; ++ ++ test_addS64_tS32_t4 (S64_ta, S32_tb, S32_tc); ++ SCHECK (64, 4, add); ++ test_addS32_tS16_t8 (S32_ta, S16_tb, S16_tc); ++ SCHECK (32, 8, add); ++ test_addS16_tS8_t16 (S16_ta, S8_tb, S8_tc); ++ SCHECK (16, 16, add); ++ test_subS64_tS32_t4 (S64_ta, S32_tb, S32_tc); ++ SCHECK (64, 4, sub); ++ test_subS32_tS16_t8 (S32_ta, S16_tb, S16_tc); ++ SCHECK (32, 8, sub); ++ test_subS16_tS8_t16 (S16_ta, S8_tb, S8_tc); ++ SCHECK (16, 16, sub); ++ ++ test_addU64_tU32_t4 (S64_ta, S32_tb, S32_tc); ++ UCHECK (64, 4, add); ++ test_addU32_tU16_t8 (S32_ta, S16_tb, S16_tc); ++ UCHECK (32, 8, add); ++ test_addU16_tU8_t16 (S16_ta, S8_tb, S8_tc); ++ UCHECK (16, 16, add); ++ test_subU64_tU32_t4 (S64_ta, S32_tb, S32_tc); ++ UCHECK (64, 4, sub); ++ test_subU32_tU16_t8 (S32_ta, S16_tb, S16_tc); ++ UCHECK (32, 8, sub); ++ test_subU16_tU8_t16 (S16_ta, S8_tb, S8_tc); ++ UCHECK (16, 16, sub); ++ ++ test_addS16_tS8_t16_neg0 (S16_ta, S8_tb, S8_tc); ++ NCHECK (add_rS16); ++ test_subS16_tS8_t16_neg0 (S16_ta, S8_tb, S8_tc); ++ NCHECK (sub_rS16); ++ test_addS16_tS8_t16_neg1 (S16_ta, S8_tb, S8_tc); ++ NCHECK (add_rS16); ++ test_subS16_tS8_t16_neg1 (S16_ta, S8_tb, S8_tc); ++ NCHECK (sub_rS16); ++ test_addS16_tS8_t16_neg2 (S16_ta, S8_tb, S8_tc); ++ NCHECK (add_rS16); ++ test_subS16_tS8_t16_neg2 (S16_ta, S8_tb, S8_tc); ++ NCHECK (sub_rS16); ++ test_subS16_tS8_t16_neg3 (S16_ta, S8_tb, S8_tc); ++ NCHECK (neg_r); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/extr.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/extr.c +@@ -0,0 +1,34 @@ ++/* { dg-options "-O2 --save-temps" } */ ++/* { dg-do run } */ ++ ++extern void abort (void); ++ ++int ++test_si (int a, int b) ++{ ++ /* { dg-final { scan-assembler "extr\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, 27\n" } } */ ++ return (a << 5) | ((unsigned int) b >> 27); ++} ++ ++long long ++test_di (long long a, long long b) ++{ ++ /* { dg-final { scan-assembler "extr\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, 45\n" } } */ ++ return (a << 19) | ((unsigned long long) b >> 45); ++} ++ ++int ++main () ++{ ++ int v; ++ long long w; ++ v = test_si (0x00000004, 0x30000000); ++ if (v != 0x00000086) ++ abort(); ++ w = test_di (0x0001040040040004ll, 0x0070050066666666ll); ++ if (w != 0x2002002000200380ll) ++ abort(); ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-compile.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-compile.c +@@ -16,5 +16,7 @@ + /* { dg-final { scan-assembler "uminv" } } */ + /* { dg-final { scan-assembler "smaxv" } } */ + /* { dg-final { scan-assembler "sminv" } } */ ++/* { dg-final { scan-assembler "sabd" } } */ ++/* { dg-final { scan-assembler "saba" } } */ + /* { dg-final { scan-assembler-times "addv" 2} } */ + /* { dg-final { scan-assembler-times "addp" 2} } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-d.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-d.c +@@ -2,12 +2,13 @@ + /* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-unroll-loops --save-temps -fno-inline" } */ + + #define FTYPE double ++#define ITYPE long + #define OP == + #define INV_OP != + + #include "vect-fcm.x" + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 8 "vect" } } */ + /* { dg-final { scan-assembler "fcmeq\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ + /* { dg-final { scan-assembler "fcmeq\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-3.c +@@ -1,5 +1,5 @@ + /* { dg-error "unknown" "" {target "aarch64*-*-*" } } */ +-/* { dg-options "-O2 -mcpu=example-1+dummy" } */ ++/* { dg-options "-O2 -mcpu=cortex-a53+dummy" } */ + + void f () + { +--- a/src/gcc/testsuite/gcc.target/aarch64/adds3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/adds3.c +@@ -0,0 +1,61 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++typedef long long s64; ++ ++int ++adds_ext (s64 a, int b, int c) ++{ ++ s64 d = a + b; ++ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++adds_shift_ext (s64 a, int b, int c) ++{ ++ s64 d = (a + ((s64)b << 3)); ++ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int main () ++{ ++ int x; ++ s64 y; ++ ++ x = adds_ext (0x13000002ll, 41, 15); ++ if (x != 318767203) ++ abort (); ++ ++ x = adds_ext (0x50505050ll, 29, 4); ++ if (x != 1347440782) ++ abort (); ++ ++ x = adds_ext (0x12121212121ll, 2, 14); ++ if (x != 555819315) ++ abort (); ++ ++ x = adds_shift_ext (0x123456789ll, 4, 12); ++ if (x != 591751097) ++ abort (); ++ ++ x = adds_shift_ext (0x02020202ll, 9, 8); ++ if (x != 33686107) ++ abort (); ++ ++ x = adds_shift_ext (0x987987987987ll, 23, 41); ++ if (x != -2020050305) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { scan-assembler-times "adds\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, sxtw" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/subs2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/subs2.c +@@ -0,0 +1,155 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++ ++int ++subs_si_test1 (int a, int b, int c) ++{ ++ int d = a - b; ++ ++ /* { dg-final { scan-assembler-not "subs\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++subs_si_test2 (int a, int b, int c) ++{ ++ int d = a - 0xfff; ++ ++ /* { dg-final { scan-assembler-not "subs\tw\[0-9\]+, w\[0-9\]+, #4095" } } */ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+, w\[0-9\]+, #4095" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++subs_si_test3 (int a, int b, int c) ++{ ++ int d = a - (b << 3); ++ ++ /* { dg-final { scan-assembler-not "subs\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++typedef long long s64; ++ ++s64 ++subs_di_test1 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a - b; ++ ++ /* { dg-final { scan-assembler-not "subs\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++subs_di_test2 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a - 0x1000ll; ++ ++ /* { dg-final { scan-assembler-not "subs\tx\[0-9\]+, x\[0-9\]+, #4096" } } */ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+, x\[0-9\]+, #4096" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++subs_di_test3 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a - (b << 3); ++ ++ /* { dg-final { scan-assembler-not "subs\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int main () ++{ ++ int x; ++ s64 y; ++ ++ x = subs_si_test1 (29, 4, 5); ++ if (x != 34) ++ abort (); ++ ++ x = subs_si_test1 (5, 2, 20); ++ if (x != 25) ++ abort (); ++ ++ x = subs_si_test2 (29, 4, 5); ++ if (x != 34) ++ abort (); ++ ++ x = subs_si_test2 (1024, 2, 20); ++ if (x != 1044) ++ abort (); ++ ++ x = subs_si_test3 (35, 4, 5); ++ if (x != 12) ++ abort (); ++ ++ x = subs_si_test3 (5, 2, 20); ++ if (x != 25) ++ abort (); ++ ++ y = subs_di_test1 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ ++ if (y != 0x63505052e) ++ abort (); ++ ++ y = subs_di_test1 (0x5000500050005ll, ++ 0x2111211121112ll, ++ 0x0000000002020ll); ++ if (y != 0x5000500052025) ++ abort (); ++ ++ y = subs_di_test2 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ if (y != 0x95504f532) ++ abort (); ++ ++ y = subs_di_test2 (0x540004100ll, ++ 0x320000004ll, ++ 0x805050205ll); ++ if (y != 0x1065053309) ++ abort (); ++ ++ y = subs_di_test3 (0x130000029ll, ++ 0x064000008ll, ++ 0x505050505ll); ++ if (y != 0x63505052e) ++ abort (); ++ ++ y = subs_di_test3 (0x130002900ll, ++ 0x088000008ll, ++ 0x505050505ll); ++ if (y != 0x635052e05) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/bics_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/bics_1.c +@@ -0,0 +1,107 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++ ++int ++bics_si_test1 (int a, int b, int c) ++{ ++ int d = a & ~b; ++ ++ /* { dg-final { scan-assembler-times "bics\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 2 } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++bics_si_test2 (int a, int b, int c) ++{ ++ int d = a & ~(b << 3); ++ ++ /* { dg-final { scan-assembler "bics\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++typedef long long s64; ++ ++s64 ++bics_di_test1 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a & ~b; ++ ++ /* { dg-final { scan-assembler-times "bics\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" 2 } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++bics_di_test2 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a & ~(b << 3); ++ ++ /* { dg-final { scan-assembler "bics\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++main () ++{ ++ int x; ++ s64 y; ++ ++ x = bics_si_test1 (29, ~4, 5); ++ if (x != ((29 & 4) + ~4 + 5)) ++ abort (); ++ ++ x = bics_si_test1 (5, ~2, 20); ++ if (x != 25) ++ abort (); ++ ++ x = bics_si_test2 (35, ~4, 5); ++ if (x != ((35 & ~(~4 << 3)) + ~4 + 5)) ++ abort (); ++ ++ x = bics_si_test2 (96, ~2, 20); ++ if (x != 116) ++ abort (); ++ ++ y = bics_di_test1 (0x130000029ll, ++ ~0x320000004ll, ++ 0x505050505ll); ++ ++ if (y != ((0x130000029ll & 0x320000004ll) + ~0x320000004ll + 0x505050505ll)) ++ abort (); ++ ++ y = bics_di_test1 (0x5000500050005ll, ++ ~0x2111211121112ll, ++ 0x0000000002020ll); ++ if (y != 0x5000500052025ll) ++ abort (); ++ ++ y = bics_di_test2 (0x130000029ll, ++ ~0x064000008ll, ++ 0x505050505ll); ++ if (y != ((0x130000029ll & ~(~0x064000008ll << 3)) ++ + ~0x064000008ll + 0x505050505ll)) ++ abort (); ++ ++ y = bics_di_test2 (0x130002900ll, ++ ~0x088000008ll, ++ 0x505050505ll); ++ if (y != (0x130002900ll + 0x505050505ll)) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vmaxv.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vmaxv.c +@@ -0,0 +1,117 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps -ffast-math" } */ ++ ++#include ++ ++extern void abort (void); ++ ++#define NUM_TESTS 16 ++#define DELTA 0.000001 ++ ++int8_t input_int8[] = {1, 56, 2, -9, -90, 23, 54, 76, ++ -4, 34, 110, -110, 6, 4, 75, -34}; ++int16_t input_int16[] = {1, 56, 2, -9, -90, 23, 54, 76, ++ -4, 34, 110, -110, 6, 4, 75, -34}; ++int32_t input_int32[] = {1, 56, 2, -9, -90, 23, 54, 76, ++ -4, 34, 110, -110, 6, 4, 75, -34}; ++ ++uint8_t input_uint8[] = {1, 56, 2, 9, 90, 23, 54, 76, ++ 4, 34, 110, 110, 6, 4, 75, 34}; ++uint16_t input_uint16[] = {1, 56, 2, 9, 90, 23, 54, 76, ++ 4, 34, 110, 110, 6, 4, 75, 34}; ++uint32_t input_uint32[] = {1, 56, 2, 9, 90, 23, 54, 76, ++ 4, 34, 110, 110, 6, 4, 75, 34}; ++ ++#define EQUAL(a, b) (a == b) ++ ++#define TEST(MAXMIN, CMP_OP, SUFFIX, Q, TYPE, LANES) \ ++int \ ++test_v##MAXMIN##v##SUFFIX##_##TYPE##x##LANES##_t (void) \ ++{ \ ++ int i, j; \ ++ int moves = (NUM_TESTS - LANES) + 1; \ ++ TYPE##_t out_l[NUM_TESTS]; \ ++ TYPE##_t out_v[NUM_TESTS]; \ ++ \ ++ /* Calculate linearly. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ out_l[i] = input_##TYPE[i]; \ ++ for (j = 0; j < LANES; j++) \ ++ out_l[i] = input_##TYPE[i + j] CMP_OP out_l[i] ? \ ++ input_##TYPE[i + j] : out_l[i]; \ ++ } \ ++ \ ++ /* Calculate using vector reduction intrinsics. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ TYPE##x##LANES##_t t1 = vld1##Q##_##SUFFIX (input_##TYPE + i); \ ++ out_v[i] = v##MAXMIN##v##Q##_##SUFFIX (t1); \ ++ } \ ++ \ ++ /* Compare. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ if (!EQUAL (out_v[i], out_l[i])) \ ++ return 0; \ ++ } \ ++ return 1; \ ++} ++ ++#define BUILD_VARIANTS(TYPE, STYPE, W32, W64) \ ++TEST (max, >, STYPE, , TYPE, W32) \ ++TEST (max, >, STYPE, q, TYPE, W64) \ ++TEST (min, <, STYPE, , TYPE, W32) \ ++TEST (min, <, STYPE, q, TYPE, W64) ++ ++BUILD_VARIANTS (int8, s8, 8, 16) ++/* { dg-final { scan-assembler "smaxv\\tb\[0-9\]+, v\[0-9\]+\.8b" } } */ ++/* { dg-final { scan-assembler "sminv\\tb\[0-9\]+, v\[0-9\]+\.8b" } } */ ++/* { dg-final { scan-assembler "smaxv\\tb\[0-9\]+, v\[0-9\]+\.16b" } } */ ++/* { dg-final { scan-assembler "sminv\\tb\[0-9\]+, v\[0-9\]+\.16b" } } */ ++BUILD_VARIANTS (uint8, u8, 8, 16) ++/* { dg-final { scan-assembler "umaxv\\tb\[0-9\]+, v\[0-9\]+\.8b" } } */ ++/* { dg-final { scan-assembler "uminv\\tb\[0-9\]+, v\[0-9\]+\.8b" } } */ ++/* { dg-final { scan-assembler "umaxv\\tb\[0-9\]+, v\[0-9\]+\.16b" } } */ ++/* { dg-final { scan-assembler "uminv\\tb\[0-9\]+, v\[0-9\]+\.16b" } } */ ++BUILD_VARIANTS (int16, s16, 4, 8) ++/* { dg-final { scan-assembler "smaxv\\th\[0-9\]+, v\[0-9\]+\.4h" } } */ ++/* { dg-final { scan-assembler "sminv\\th\[0-9\]+, v\[0-9\]+\.4h" } } */ ++/* { dg-final { scan-assembler "smaxv\\th\[0-9\]+, v\[0-9\]+\.8h" } } */ ++/* { dg-final { scan-assembler "sminv\\th\[0-9\]+, v\[0-9\]+\.8h" } } */ ++BUILD_VARIANTS (uint16, u16, 4, 8) ++/* { dg-final { scan-assembler "umaxv\\th\[0-9\]+, v\[0-9\]+\.4h" } } */ ++/* { dg-final { scan-assembler "uminv\\th\[0-9\]+, v\[0-9\]+\.4h" } } */ ++/* { dg-final { scan-assembler "umaxv\\th\[0-9\]+, v\[0-9\]+\.8h" } } */ ++/* { dg-final { scan-assembler "uminv\\th\[0-9\]+, v\[0-9\]+\.8h" } } */ ++BUILD_VARIANTS (int32, s32, 2, 4) ++/* { dg-final { scan-assembler "smaxp\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "sminp\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "smaxv\\ts\[0-9\]+, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "sminv\\ts\[0-9\]+, v\[0-9\]+\.4s" } } */ ++BUILD_VARIANTS (uint32, u32, 2, 4) ++/* { dg-final { scan-assembler "umaxp\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "uminp\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "umaxv\\ts\[0-9\]+, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "uminv\\ts\[0-9\]+, v\[0-9\]+\.4s" } } */ ++ ++#undef TEST ++#define TEST(MAXMIN, CMP_OP, SUFFIX, Q, TYPE, LANES) \ ++{ \ ++ if (!test_v##MAXMIN##v##SUFFIX##_##TYPE##x##LANES##_t ()) \ ++ abort (); \ ++} ++ ++int ++main (int argc, char **argv) ++{ ++ BUILD_VARIANTS (int8, s8, 8, 16) ++ BUILD_VARIANTS (uint8, u8, 8, 16) ++ BUILD_VARIANTS (int16, s16, 4, 8) ++ BUILD_VARIANTS (uint16, u16, 4, 8) ++ BUILD_VARIANTS (int32, s32, 2, 4) ++ BUILD_VARIANTS (uint32, u32, 2, 4) ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vrecpx.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vrecpx.c +@@ -0,0 +1,54 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps" } */ ++ ++#include ++#include ++#include ++ ++float32_t in_f[] = ++{2.0, 4.0, 8.0, 16.0, 1.0, 0.5, 0.25, 0.125}; ++float32_t rec_f[] = ++{1.0, 0.5, 0.25, 0.125, 2.0, 4.0, 8.0, 16.0}; ++float64_t in_d[] = ++{2.0, 4.0, 8.0, 16.0, 1.0, 0.5, 0.25, 0.125}; ++float32_t rec_d[] = ++{1.0, 0.5, 0.25, 0.125, 2.0, 4.0, 8.0, 16.0}; ++ ++int ++test_frecpx_float32_t (void) ++{ ++ int i = 0; ++ int ret = 1; ++ for (i = 0; i < 8; i++) ++ ret &= fabs (vrecpxs_f32 (in_f[i]) - rec_f[i]) < 0.001; ++ ++ return ret; ++} ++ ++/* { dg-final { scan-assembler "frecpx\\ts\[0-9\]+, s\[0-9\]+" } } */ ++ ++int ++test_frecpx_float64_t (void) ++{ ++ int i = 0; ++ int ret = 1; ++ for (i = 0; i < 8; i++) ++ ret &= fabs (vrecpxd_f64 (in_d[i]) - rec_d[i]) < 0.001; ++ ++ return ret; ++} ++ ++/* { dg-final { scan-assembler "frecpx\\td\[0-9\]+, d\[0-9\]+" } } */ ++ ++int ++main (int argc, char **argv) ++{ ++ if (!test_frecpx_float32_t ()) ++ abort (); ++ if (!test_frecpx_float64_t ()) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vca.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vca.c +@@ -0,0 +1,89 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps" } */ ++ ++#include ++ ++extern void abort (void); ++extern float fabsf (float); ++extern double fabs (double); ++ ++#define NUM_TESTS 8 ++ ++float input_s1[] = {0.1f, -0.1f, 0.4f, 10.3f, 200.0f, -800.0f, -13.0f, -0.5f}; ++float input_s2[] = {-0.2f, 0.4f, 0.04f, -100.3f, 2.0f, -80.0f, 13.0f, -0.5f}; ++double input_d1[] = {0.1, -0.1, 0.4, 10.3, 200.0, -800.0, -13.0, -0.5}; ++double input_d2[] = {-0.2, 0.4, 0.04, -100.3, 2.0, -80.0, 13.0, -0.5}; ++ ++#define TEST(T, CMP, SUFFIX, WIDTH, LANES, Q, F) \ ++int \ ++test_vca##T##_float##WIDTH##x##LANES##_t (void) \ ++{ \ ++ int ret = 0; \ ++ int i = 0; \ ++ uint##WIDTH##_t output[NUM_TESTS]; \ ++ \ ++ for (i = 0; i < NUM_TESTS; i++) \ ++ { \ ++ float##WIDTH##_t f1 = fabs##F (input_##SUFFIX##1[i]); \ ++ float##WIDTH##_t f2 = fabs##F (input_##SUFFIX##2[i]); \ ++ /* Inhibit optimization of our linear test loop. */ \ ++ asm volatile ("" : : : "memory"); \ ++ output[i] = f1 CMP f2 ? -1 : 0; \ ++ } \ ++ \ ++ for (i = 0; i < NUM_TESTS; i += LANES) \ ++ { \ ++ float##WIDTH##x##LANES##_t in1 = \ ++ vld1##Q##_f##WIDTH (input_##SUFFIX##1 + i); \ ++ float##WIDTH##x##LANES##_t in2 = \ ++ vld1##Q##_f##WIDTH (input_##SUFFIX##2 + i); \ ++ uint##WIDTH##x##LANES##_t expected_out = \ ++ vld1##Q##_u##WIDTH (output + i); \ ++ uint##WIDTH##x##LANES##_t out = \ ++ veor##Q##_u##WIDTH (vca##T##Q##_f##WIDTH (in1, in2), \ ++ expected_out); \ ++ vst1##Q##_u##WIDTH (output + i, out); \ ++ } \ ++ \ ++ for (i = 0; i < NUM_TESTS; i++) \ ++ ret |= output[i]; \ ++ \ ++ return ret; \ ++} ++ ++#define BUILD_VARIANTS(T, CMP) \ ++TEST (T, CMP, s, 32, 2, , f) \ ++TEST (T, CMP, s, 32, 4, q, f) \ ++TEST (T, CMP, d, 64, 2, q, ) ++ ++BUILD_VARIANTS (ge, >=) ++/* { dg-final { scan-assembler "facge\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "facge\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "facge\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++ ++BUILD_VARIANTS (gt, >) ++/* { dg-final { scan-assembler "facgt\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "facgt\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "facgt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++ ++/* No need for another scan-assembler as these tests ++ also generate facge, facgt instructions. */ ++BUILD_VARIANTS (le, <=) ++BUILD_VARIANTS (lt, <) ++ ++#undef TEST ++#define TEST(T, CMP, SUFFIX, WIDTH, LANES, Q, F) \ ++if (test_vca##T##_float##WIDTH##x##LANES##_t ()) \ ++ abort (); ++ ++int ++main (int argc, char **argv) ++{ ++BUILD_VARIANTS (ge, >=) ++BUILD_VARIANTS (gt, >) ++BUILD_VARIANTS (le, <=) ++BUILD_VARIANTS (lt, <) ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vrnd.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vrnd.c +@@ -0,0 +1,117 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps" } */ ++ ++#include ++ ++extern void abort (void); ++extern float fabsf (float); ++extern double fabs (double); ++ ++extern double trunc (double); ++extern double round (double); ++extern double nearbyint (double); ++extern double floor (double); ++extern double ceil (double); ++extern double rint (double); ++ ++extern float truncf (float); ++extern float roundf (float); ++extern float nearbyintf (float); ++extern float floorf (float); ++extern float ceilf (float); ++extern float rintf (float); ++ ++#define NUM_TESTS 8 ++#define DELTA 0.000001 ++ ++float input_f32[] = {0.1f, -0.1f, 0.4f, 10.3f, ++ 200.0f, -800.0f, -13.0f, -0.5f}; ++double input_f64[] = {0.1, -0.1, 0.4, 10.3, ++ 200.0, -800.0, -13.0, -0.5}; ++ ++#define TEST(SUFFIX, Q, WIDTH, LANES, C_FN, F) \ ++int \ ++test_vrnd##SUFFIX##_float##WIDTH##x##LANES##_t (void) \ ++{ \ ++ int ret = 1; \ ++ int i = 0; \ ++ int nlanes = LANES; \ ++ float##WIDTH##_t expected_out[NUM_TESTS]; \ ++ float##WIDTH##_t actual_out[NUM_TESTS]; \ ++ \ ++ for (i = 0; i < NUM_TESTS; i++) \ ++ { \ ++ expected_out[i] = C_FN##F (input_f##WIDTH[i]); \ ++ /* Don't vectorize this. */ \ ++ asm volatile ("" : : : "memory"); \ ++ } \ ++ \ ++ /* Prevent the compiler from noticing these two loops do the same \ ++ thing and optimizing away the comparison. */ \ ++ asm volatile ("" : : : "memory"); \ ++ \ ++ for (i = 0; i < NUM_TESTS; i+=nlanes) \ ++ { \ ++ float##WIDTH##x##LANES##_t out = \ ++ vrnd##SUFFIX##Q##_f##WIDTH \ ++ (vld1##Q##_f##WIDTH (input_f##WIDTH + i)); \ ++ vst1##Q##_f##WIDTH (actual_out + i, out); \ ++ } \ ++ \ ++ for (i = 0; i < NUM_TESTS; i++) \ ++ ret &= fabs##F (expected_out[i] - actual_out[i]) < DELTA; \ ++ \ ++ return ret; \ ++} \ ++ ++ ++#define BUILD_VARIANTS(SUFFIX, C_FN) \ ++TEST (SUFFIX, , 32, 2, C_FN, f) \ ++TEST (SUFFIX, q, 32, 4, C_FN, f) \ ++TEST (SUFFIX, q, 64, 2, C_FN, ) \ ++ ++BUILD_VARIANTS ( , trunc) ++/* { dg-final { scan-assembler "frintz\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "frintz\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "frintz\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++BUILD_VARIANTS (a, round) ++/* { dg-final { scan-assembler "frinta\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "frinta\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "frinta\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++BUILD_VARIANTS (i, nearbyint) ++/* { dg-final { scan-assembler "frinti\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "frinti\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "frinti\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++BUILD_VARIANTS (m, floor) ++/* { dg-final { scan-assembler "frintm\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "frintm\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "frintm\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++BUILD_VARIANTS (p, ceil) ++/* { dg-final { scan-assembler "frintp\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "frintp\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "frintp\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++BUILD_VARIANTS (x, rint) ++/* { dg-final { scan-assembler "frintx\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "frintx\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "frintx\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++ ++#undef TEST ++#define TEST(SUFFIX, Q, WIDTH, LANES, C_FN, F) \ ++{ \ ++ if (!test_vrnd##SUFFIX##_float##WIDTH##x##LANES##_t ()) \ ++ abort (); \ ++} ++ ++int ++main (int argc, char **argv) ++{ ++ BUILD_VARIANTS ( , trunc) ++ BUILD_VARIANTS (a, round) ++ BUILD_VARIANTS (i, nearbyint) ++ BUILD_VARIANTS (m, floor) ++ BUILD_VARIANTS (p, ceil) ++ BUILD_VARIANTS (x, rint) ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c +@@ -1,43 +1,7 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ + +-int v = 0; ++#include "atomic-op-relaxed.x" + +-int +-atomic_fetch_add_RELAXED (int a) +-{ +- return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); +-} +- +-int +-atomic_fetch_sub_RELAXED (int a) +-{ +- return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); +-} +- +-int +-atomic_fetch_and_RELAXED (int a) +-{ +- return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); +-} +- +-int +-atomic_fetch_nand_RELAXED (int a) +-{ +- return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); +-} +- +-int +-atomic_fetch_xor_RELAXED (int a) +-{ +- return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); +-} +- +-int +-atomic_fetch_or_RELAXED (int a) +-{ +- return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); +-} +- + /* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ + /* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/aes_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aes_1.c +@@ -0,0 +1,40 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-march=armv8-a+crypto" } */ ++ ++#include "arm_neon.h" ++ ++uint8x16_t ++test_vaeseq_u8 (uint8x16_t data, uint8x16_t key) ++{ ++ return vaeseq_u8 (data, key); ++} ++ ++/* { dg-final { scan-assembler-times "aese\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */ ++ ++uint8x16_t ++test_vaesdq_u8 (uint8x16_t data, uint8x16_t key) ++{ ++ return vaesdq_u8 (data, key); ++} ++ ++/* { dg-final { scan-assembler-times "aesd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */ ++ ++uint8x16_t ++test_vaesmcq_u8 (uint8x16_t data) ++{ ++ return vaesmcq_u8 (data); ++} ++ ++/* { dg-final { scan-assembler-times "aesmc\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */ ++ ++uint8x16_t ++test_vaesimcq_u8 (uint8x16_t data) ++{ ++ return vaesimcq_u8 (data); ++} ++ ++/* { dg-final { scan-assembler-times "aesimc\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */ ++ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm.x +@@ -13,6 +13,8 @@ + 2.0, -4.0, 8.0, -16.0, + -2.125, 4.25, -8.5, 17.0}; + ++/* Float comparisons, float results. */ ++ + void + foo (FTYPE *in1, FTYPE *in2, FTYPE *output) + { +@@ -49,11 +51,52 @@ + output[i] = (in1[i] INV_OP 0.0) ? 4.0 : 2.0; + } + ++/* Float comparisons, int results. */ ++ ++void ++foo_int (FTYPE *in1, FTYPE *in2, ITYPE *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = (in1[i] OP in2[i]) ? 2 : 4; ++} ++ ++void ++bar_int (FTYPE *in1, FTYPE *in2, ITYPE *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = (in1[i] INV_OP in2[i]) ? 4 : 2; ++} ++ ++void ++foobar_int (FTYPE *in1, FTYPE *in2, ITYPE *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = (in1[i] OP 0.0) ? 4 : 2; ++} ++ ++void ++foobarbar_int (FTYPE *in1, FTYPE *in2, ITYPE *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = (in1[i] INV_OP 0.0) ? 4 : 2; ++} ++ + int + main (int argc, char **argv) + { + FTYPE out1[N]; + FTYPE out2[N]; ++ ITYPE outi1[N]; ++ ITYPE outi2[N]; ++ + int i = 0; + foo (input1, input2, out1); + bar (input1, input2, out2); +@@ -65,6 +108,17 @@ + for (i = 0; i < N; i++) + if (out1[i] == out2[i]) + abort (); ++ ++ foo_int (input1, input2, outi1); ++ bar_int (input1, input2, outi2); ++ for (i = 0; i < N; i++) ++ if (outi1[i] != outi2[i]) ++ abort (); ++ foobar_int (input1, input2, outi1); ++ foobarbar_int (input1, input2, outi2); ++ for (i = 0; i < N; i++) ++ if (outi1[i] == outi2[i]) ++ abort (); + return 0; + } + +--- a/src/gcc/testsuite/gcc.target/aarch64/movi_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/movi_1.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++void ++dummy (short* b) ++{ ++ /* { dg-final { scan-assembler "movi\tv\[0-9\]+\.4h, 0x4, lsl 8" } } */ ++ /* { dg-final { scan-assembler-not "movi\tv\[0-9\]+\.4h, 0x400" } } */ ++ /* { dg-final { scan-assembler-not "movi\tv\[0-9\]+\.4h, 1024" } } */ ++ register short x asm ("h8") = 1024; ++ asm volatile ("" : : "w" (x)); ++ *b = x; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vaddv-intrinsic-compile.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vaddv-intrinsic-compile.c +@@ -0,0 +1,11 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#include "arm_neon.h" ++ ++#include "vaddv-intrinsic.x" ++ ++/* { dg-final { scan-assembler "faddp\\ts\[0-9\]+"} } */ ++/* { dg-final { scan-assembler-times "faddp\\tv\[0-9\]+\.4s" 2} } */ ++/* { dg-final { scan-assembler "faddp\\td\[0-9\]+"} } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vabs_intrinsic_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vabs_intrinsic_1.c +@@ -0,0 +1,101 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps" } */ ++ ++#include ++ ++extern void abort (void); ++ ++#define ETYPE(size) int##size##_t ++#define VTYPE(size, lanes) int##size##x##lanes##_t ++ ++#define TEST_VABS(q, size, lanes) \ ++static void \ ++test_vabs##q##_##size (ETYPE (size) * res, \ ++ const ETYPE (size) *in1) \ ++{ \ ++ VTYPE (size, lanes) a = vld1##q##_s##size (res); \ ++ VTYPE (size, lanes) b = vld1##q##_s##size (in1); \ ++ a = vabs##q##_s##size (b); \ ++ vst1##q##_s##size (res, a); \ ++} ++ ++#define BUILD_VARS(width, n_lanes, n_half_lanes) \ ++TEST_VABS (, width, n_half_lanes) \ ++TEST_VABS (q, width, n_lanes) \ ++ ++BUILD_VARS (64, 2, 1) ++BUILD_VARS (32, 4, 2) ++BUILD_VARS (16, 8, 4) ++BUILD_VARS (8, 16, 8) ++ ++#define POOL1 {-10} ++#define POOL2 {2, -10} ++#define POOL4 {0, -10, 2, -3} ++#define POOL8 {0, -10, 2, -3, 4, -50, 6, -70} ++#define POOL16 {0, -10, 2, -3, 4, -50, 6, -70, \ ++ -5, 10, -2, 3, -4, 50, -6, 70} ++ ++#define EXPECTED1 {10} ++#define EXPECTED2 {2, 10} ++#define EXPECTED4 {0, 10, 2, 3} ++#define EXPECTED8 {0, 10, 2, 3, 4, 50, 6, 70} ++#define EXPECTED16 {0, 10, 2, 3, 4, 50, 6, 70, \ ++ 5, 10, 2, 3, 4, 50, 6, 70} ++ ++#define BUILD_TEST(size, lanes_64, lanes_128) \ ++static void \ ++test_##size (void) \ ++{ \ ++ int i; \ ++ ETYPE (size) pool1[lanes_64] = POOL##lanes_64; \ ++ ETYPE (size) res1[lanes_64] = {0}; \ ++ ETYPE (size) expected1[lanes_64] = EXPECTED##lanes_64; \ ++ ETYPE (size) pool2[lanes_128] = POOL##lanes_128; \ ++ ETYPE (size) res2[lanes_128] = {0}; \ ++ ETYPE (size) expected2[lanes_128] = EXPECTED##lanes_128; \ ++ \ ++ /* Forcefully avoid optimization. */ \ ++ asm volatile ("" : : : "memory"); \ ++ test_vabs_##size (res1, pool1); \ ++ for (i = 0; i < lanes_64; i++) \ ++ if (res1[i] != expected1[i]) \ ++ abort (); \ ++ \ ++ /* Forcefully avoid optimization. */ \ ++ asm volatile ("" : : : "memory"); \ ++ test_vabsq_##size (res2, pool2); \ ++ for (i = 0; i < lanes_128; i++) \ ++ if (res2[i] != expected2[i]) \ ++ abort (); \ ++} ++ ++/* { dg-final { scan-assembler-times "abs\\tv\[0-9\]+\.8b, v\[0-9\]+\.8b" 1 } } */ ++/* { dg-final { scan-assembler-times "abs\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */ ++BUILD_TEST (8 , 8, 16) ++ ++/* { dg-final { scan-assembler-times "abs\\tv\[0-9\]+\.4h, v\[0-9\]+\.4h" 1 } } */ ++/* { dg-final { scan-assembler-times "abs\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h" 1 } } */ ++BUILD_TEST (16, 4, 8) ++ ++/* { dg-final { scan-assembler-times "abs\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" 1 } } */ ++/* { dg-final { scan-assembler-times "abs\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */ ++BUILD_TEST (32, 2, 4) ++ ++/* { dg-final { scan-assembler-times "abs\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" 1 } } */ ++BUILD_TEST (64, 1, 2) ++ ++#undef BUILD_TEST ++ ++#define BUILD_TEST(size) test_##size () ++ ++int ++main (int argc, char **argv) ++{ ++ BUILD_TEST (8); ++ BUILD_TEST (16); ++ BUILD_TEST (32); ++ BUILD_TEST (64); ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.x +@@ -0,0 +1,37 @@ ++int v = 0; ++ ++int ++atomic_fetch_add_RELAXED (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_sub_RELAXED (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_and_RELAXED (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_nand_RELAXED (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_xor_RELAXED (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_or_RELAXED (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect.c +@@ -55,6 +55,8 @@ + int smin_vector[] = {0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15}; + unsigned int umax_vector[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; + unsigned int umin_vector[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; ++ int sabd_vector[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; ++ int saba_vector[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; + int reduce_smax_value = 0; + int reduce_smin_value = -15; + unsigned int reduce_umax_value = 15; +@@ -81,6 +83,8 @@ + TEST (smin, s); + TEST (umax, u); + TEST (umin, u); ++ TEST (sabd, s); ++ TEST (saba, s); + TESTV (reduce_smax, s); + TESTV (reduce_smin, s); + TESTV (reduce_umax, u); +--- a/src/gcc/testsuite/gcc.target/aarch64/scalar-mov.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/scalar-mov.c +@@ -0,0 +1,9 @@ ++/* { dg-do compile } */ ++/* { dg-options "-g -mgeneral-regs-only" } */ ++ ++void ++foo (const char *c, ...) ++{ ++ char buf[256]; ++ buf[256 - 1] = '\0'; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-movi.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-movi.c +@@ -0,0 +1,74 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++ ++#define N 16 ++ ++static void ++movi_msl8 (int *__restrict a) ++{ ++ int i; ++ ++ /* { dg-final { scan-assembler "movi\\tv\[0-9\]+\.4s, 0xab, msl 8" } } */ ++ for (i = 0; i < N; i++) ++ a[i] = 0xabff; ++} ++ ++static void ++movi_msl16 (int *__restrict a) ++{ ++ int i; ++ ++ /* { dg-final { scan-assembler "movi\\tv\[0-9\]+\.4s, 0xab, msl 16" } } */ ++ for (i = 0; i < N; i++) ++ a[i] = 0xabffff; ++} ++ ++static void ++mvni_msl8 (int *__restrict a) ++{ ++ int i; ++ ++ /* { dg-final { scan-assembler "mvni\\tv\[0-9\]+\.4s, 0xab, msl 8" } } */ ++ for (i = 0; i < N; i++) ++ a[i] = 0xffff5400; ++} ++ ++static void ++mvni_msl16 (int *__restrict a) ++{ ++ int i; ++ ++ /* { dg-final { scan-assembler "mvni\\tv\[0-9\]+\.4s, 0xab, msl 16" } } */ ++ for (i = 0; i < N; i++) ++ a[i] = 0xff540000; ++} ++ ++int ++main (void) ++{ ++ int a[N] = { 0 }; ++ int i; ++ ++#define CHECK_ARRAY(a, val) \ ++ for (i = 0; i < N; i++) \ ++ if (a[i] != val) \ ++ abort (); ++ ++ movi_msl8 (a); ++ CHECK_ARRAY (a, 0xabff); ++ ++ movi_msl16 (a); ++ CHECK_ARRAY (a, 0xabffff); ++ ++ mvni_msl8 (a); ++ CHECK_ARRAY (a, 0xffff5400); ++ ++ mvni_msl16 (a); ++ CHECK_ARRAY (a, 0xff540000); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-d.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-d.c +@@ -2,12 +2,13 @@ + /* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-unroll-loops --save-temps -fno-inline" } */ + + #define FTYPE double ++#define ITYPE long + #define OP >= + #define INV_OP < + + #include "vect-fcm.x" + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 8 "vect" } } */ + /* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ + /* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */ + /* { dg-final { scan-assembler "fcmlt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c +@@ -1,43 +1,7 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ + +-int v = 0; ++#include "atomic-op-acquire.x" + +-int +-atomic_fetch_add_ACQUIRE (int a) +-{ +- return __atomic_fetch_add (&v, a, __ATOMIC_ACQUIRE); +-} +- +-int +-atomic_fetch_sub_ACQUIRE (int a) +-{ +- return __atomic_fetch_sub (&v, a, __ATOMIC_ACQUIRE); +-} +- +-int +-atomic_fetch_and_ACQUIRE (int a) +-{ +- return __atomic_fetch_and (&v, a, __ATOMIC_ACQUIRE); +-} +- +-int +-atomic_fetch_nand_ACQUIRE (int a) +-{ +- return __atomic_fetch_nand (&v, a, __ATOMIC_ACQUIRE); +-} +- +-int +-atomic_fetch_xor_ACQUIRE (int a) +-{ +- return __atomic_fetch_xor (&v, a, __ATOMIC_ACQUIRE); +-} +- +-int +-atomic_fetch_or_ACQUIRE (int a) +-{ +- return __atomic_fetch_or (&v, a, __ATOMIC_ACQUIRE); +-} +- + /* { dg-final { scan-assembler-times "ldaxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ + /* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/abs_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/abs_1.c +@@ -0,0 +1,53 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -fno-inline --save-temps" } */ ++ ++extern long long llabs (long long); ++extern void abort (void); ++ ++long long ++abs64 (long long a) ++{ ++ /* { dg-final { scan-assembler "eor\t" } } */ ++ /* { dg-final { scan-assembler "sub\t" } } */ ++ return llabs (a); ++} ++ ++long long ++abs64_in_dreg (long long a) ++{ ++ /* { dg-final { scan-assembler "abs\td\[0-9\]+, d\[0-9\]+" } } */ ++ register long long x asm ("d8") = a; ++ register long long y asm ("d9"); ++ asm volatile ("" : : "w" (x)); ++ y = llabs (x); ++ asm volatile ("" : : "w" (y)); ++ return y; ++} ++ ++int ++main (void) ++{ ++ volatile long long ll0 = 0LL, ll1 = 1LL, llm1 = -1LL; ++ ++ if (abs64 (ll0) != 0LL) ++ abort (); ++ ++ if (abs64 (ll1) != 1LL) ++ abort (); ++ ++ if (abs64 (llm1) != 1LL) ++ abort (); ++ ++ if (abs64_in_dreg (ll0) != 0LL) ++ abort (); ++ ++ if (abs64_in_dreg (ll1) != 1LL) ++ abort (); ++ ++ if (abs64_in_dreg (llm1) != 1LL) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c +@@ -1,41 +1,7 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ + +-#define STRONG 0 +-#define WEAK 1 +-int v = 0; ++#include "atomic-comp-swap-release-acquire.x" + +-int +-atomic_compare_exchange_STRONG_RELEASE_ACQUIRE (int a, int b) +-{ +- return __atomic_compare_exchange (&v, &a, &b, +- STRONG, __ATOMIC_RELEASE, +- __ATOMIC_ACQUIRE); +-} +- +-int +-atomic_compare_exchange_WEAK_RELEASE_ACQUIRE (int a, int b) +-{ +- return __atomic_compare_exchange (&v, &a, &b, +- WEAK, __ATOMIC_RELEASE, +- __ATOMIC_ACQUIRE); +-} +- +-int +-atomic_compare_exchange_n_STRONG_RELEASE_ACQUIRE (int a, int b) +-{ +- return __atomic_compare_exchange_n (&v, &a, b, +- STRONG, __ATOMIC_RELEASE, +- __ATOMIC_ACQUIRE); +-} +- +-int +-atomic_compare_exchange_n_WEAK_RELEASE_ACQUIRE (int a, int b) +-{ +- return __atomic_compare_exchange_n (&v, &a, b, +- WEAK, __ATOMIC_RELEASE, +- __ATOMIC_ACQUIRE); +-} +- + /* { dg-final { scan-assembler-times "ldaxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 4 } } */ + /* { dg-final { scan-assembler-times "stlxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 4 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect.x +@@ -138,3 +138,17 @@ + + return s; + } ++ ++void sabd (pRINT a, pRINT b, pRINT c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ c[i] = abs (a[i] - b[i]); ++} ++ ++void saba (pRINT a, pRINT b, pRINT c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ c[i] += abs (a[i] - b[i]); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-clz.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-clz.c +@@ -0,0 +1,35 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 -save-temps -fno-inline" } */ ++ ++extern void abort (); ++ ++void ++count_lz_v4si (unsigned *__restrict a, int *__restrict b) ++{ ++ int i; ++ ++ for (i = 0; i < 4; i++) ++ b[i] = __builtin_clz (a[i]); ++} ++ ++/* { dg-final { scan-assembler "clz\tv\[0-9\]+\.4s" } } */ ++ ++int ++main () ++{ ++ unsigned int x[4] = { 0x0, 0xFFFF, 0x1FFFF, 0xFFFFFFFF }; ++ int r[4] = { 32, 16, 15, 0 }; ++ int d[4], i; ++ ++ count_lz_v4si (x, d); ++ ++ for (i = 0; i < 4; i++) ++ { ++ if (d[i] != r[i]) ++ abort (); ++ } ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/sha256_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/sha256_1.c +@@ -0,0 +1,40 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-march=armv8-a+crypto" } */ ++ ++#include "arm_neon.h" ++ ++uint32x4_t ++test_vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk) ++{ ++ return vsha256hq_u32 (hash_abcd, hash_efgh, wk); ++} ++ ++/* { dg-final { scan-assembler-times "sha256h\\tq" 1 } } */ ++ ++uint32x4_t ++test_vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk) ++{ ++ return vsha256h2q_u32 (hash_efgh, hash_abcd, wk); ++} ++ ++/* { dg-final { scan-assembler-times "sha256h2\\tq" 1 } } */ ++ ++uint32x4_t ++test_vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7) ++{ ++ return vsha256su0q_u32 (w0_3, w4_7); ++} ++ ++/* { dg-final { scan-assembler-times "sha256su0\\tv" 1 } } */ ++ ++uint32x4_t ++test_vsha256su1q_u32 (uint32x4_t tw0_3, uint32x4_t w8_11, uint32x4_t w12_15) ++{ ++ return vsha256su1q_u32 (tw0_3, w8_11, w12_15); ++} ++ ++/* { dg-final { scan-assembler-times "sha256su1\\tv" 1 } } */ ++ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-f.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-f.c +@@ -2,12 +2,13 @@ + /* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-unroll-loops --save-temps -fno-inline" } */ + + #define FTYPE float ++#define ITYPE int + #define OP > + #define INV_OP <= + + #include "vect-fcm.x" + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 8 "vect" } } */ + /* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s" } } */ + /* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */ + /* { dg-final { scan-assembler "fcmle\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/subs3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/subs3.c +@@ -0,0 +1,61 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++typedef long long s64; ++ ++int ++subs_ext (s64 a, int b, int c) ++{ ++ s64 d = a - b; ++ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++subs_shift_ext (s64 a, int b, int c) ++{ ++ s64 d = (a - ((s64)b << 3)); ++ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int main () ++{ ++ int x; ++ s64 y; ++ ++ x = subs_ext (0x13000002ll, 41, 15); ++ if (x != 318767121) ++ abort (); ++ ++ x = subs_ext (0x50505050ll, 29, 4); ++ if (x != 1347440724) ++ abort (); ++ ++ x = subs_ext (0x12121212121ll, 2, 14); ++ if (x != 555819311) ++ abort (); ++ ++ x = subs_shift_ext (0x123456789ll, 4, 12); ++ if (x != 591751033) ++ abort (); ++ ++ x = subs_shift_ext (0x02020202ll, 9, 8); ++ if (x != 33685963) ++ abort (); ++ ++ x = subs_shift_ext (0x987987987987ll, 23, 41); ++ if (x != -2020050673) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { scan-assembler-times "subs\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, sxtw" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/bics_2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/bics_2.c +@@ -0,0 +1,111 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++ ++int ++bics_si_test1 (int a, int b, int c) ++{ ++ int d = a & ~b; ++ ++ /* { dg-final { scan-assembler-not "bics\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */ ++ /* { dg-final { scan-assembler-times "bic\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 2 } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++bics_si_test2 (int a, int b, int c) ++{ ++ int d = a & ~(b << 3); ++ ++ /* { dg-final { scan-assembler-not "bics\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ /* { dg-final { scan-assembler "bic\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++typedef long long s64; ++ ++s64 ++bics_di_test1 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a & ~b; ++ ++ /* { dg-final { scan-assembler-not "bics\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */ ++ /* { dg-final { scan-assembler-times "bic\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" 2 } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++bics_di_test2 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a & ~(b << 3); ++ ++ /* { dg-final { scan-assembler-not "bics\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ /* { dg-final { scan-assembler "bic\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++main () ++{ ++ int x; ++ s64 y; ++ ++ x = bics_si_test1 (29, ~4, 5); ++ if (x != ((29 & 4) + ~4 + 5)) ++ abort (); ++ ++ x = bics_si_test1 (5, ~2, 20); ++ if (x != 25) ++ abort (); ++ ++ x = bics_si_test2 (35, ~4, 5); ++ if (x != ((35 & ~(~4 << 3)) + ~4 + 5)) ++ abort (); ++ ++ x = bics_si_test2 (96, ~2, 20); ++ if (x != 116) ++ abort (); ++ ++ y = bics_di_test1 (0x130000029ll, ++ ~0x320000004ll, ++ 0x505050505ll); ++ ++ if (y != ((0x130000029ll & 0x320000004ll) + ~0x320000004ll + 0x505050505ll)) ++ abort (); ++ ++ y = bics_di_test1 (0x5000500050005ll, ++ ~0x2111211121112ll, ++ 0x0000000002020ll); ++ if (y != 0x5000500052025ll) ++ abort (); ++ ++ y = bics_di_test2 (0x130000029ll, ++ ~0x064000008ll, ++ 0x505050505ll); ++ if (y != ((0x130000029ll & ~(~0x064000008ll << 3)) ++ + ~0x064000008ll + 0x505050505ll)) ++ abort (); ++ ++ y = bics_di_test2 (0x130002900ll, ++ ~0x088000008ll, ++ 0x505050505ll); ++ if (y != (0x130002900ll + 0x505050505ll)) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vaddv-intrinsic.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vaddv-intrinsic.c +@@ -0,0 +1,28 @@ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++#include "arm_neon.h" ++ ++extern void abort (void); ++ ++#include "vaddv-intrinsic.x" ++ ++int ++main (void) ++{ ++ const float32_t pool_v2sf[] = {4.0f, 9.0f}; ++ const float32_t pool_v4sf[] = {4.0f, 9.0f, 16.0f, 25.0f}; ++ const float64_t pool_v2df[] = {4.0, 9.0}; ++ ++ if (test_vaddv_v2sf (pool_v2sf) != 13.0f) ++ abort (); ++ ++ if (test_vaddv_v4sf (pool_v4sf) != 54.0f) ++ abort (); ++ ++ if (test_vaddv_v2df (pool_v2df) != 13.0) ++ abort (); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.x +@@ -0,0 +1,37 @@ ++int v = 0; ++ ++int ++atomic_fetch_add_ACQUIRE (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_sub_ACQUIRE (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_and_ACQUIRE (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_nand_ACQUIRE (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_xor_ACQUIRE (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_or_ACQUIRE (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_ACQUIRE); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/sbc.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/sbc.c +@@ -0,0 +1,41 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps" } */ ++ ++extern void abort (void); ++ ++typedef unsigned int u32int; ++typedef unsigned long long u64int; ++ ++u32int ++test_si (u32int w1, u32int w2, u32int w3, u32int w4) ++{ ++ u32int w0; ++ /* { dg-final { scan-assembler "sbc\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+\n" } } */ ++ w0 = w1 - w2 - (w3 < w4); ++ return w0; ++} ++ ++u64int ++test_di (u64int x1, u64int x2, u64int x3, u64int x4) ++{ ++ u64int x0; ++ /* { dg-final { scan-assembler "sbc\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+\n" } } */ ++ x0 = x1 - x2 - (x3 < x4); ++ return x0; ++} ++ ++int ++main () ++{ ++ u32int x; ++ u64int y; ++ x = test_si (7, 8, 12, 15); ++ if (x != -2) ++ abort(); ++ y = test_di (0x987654321ll, 0x123456789ll, 0x345345345ll, 0x123123123ll); ++ if (y != 0x8641fdb98ll) ++ abort(); ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/pmull_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/pmull_1.c +@@ -0,0 +1,23 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-march=armv8-a+crypto" } */ ++ ++#include "arm_neon.h" ++ ++poly128_t ++test_vmull_p64 (poly64_t a, poly64_t b) ++{ ++ return vmull_p64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "pmull\\tv" 1 } } */ ++ ++poly128_t ++test_vmull_high_p64 (poly64x2_t a, poly64x2_t b) ++{ ++ return vmull_high_p64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "pmull2\\tv" 1 } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.x +@@ -0,0 +1,36 @@ ++ ++#define STRONG 0 ++#define WEAK 1 ++int v = 0; ++ ++int ++atomic_compare_exchange_STRONG_RELEASE_ACQUIRE (int a, int b) ++{ ++ return __atomic_compare_exchange (&v, &a, &b, ++ STRONG, __ATOMIC_RELEASE, ++ __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_compare_exchange_WEAK_RELEASE_ACQUIRE (int a, int b) ++{ ++ return __atomic_compare_exchange (&v, &a, &b, ++ WEAK, __ATOMIC_RELEASE, ++ __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_compare_exchange_n_STRONG_RELEASE_ACQUIRE (int a, int b) ++{ ++ return __atomic_compare_exchange_n (&v, &a, b, ++ STRONG, __ATOMIC_RELEASE, ++ __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_compare_exchange_n_WEAK_RELEASE_ACQUIRE (int a, int b) ++{ ++ return __atomic_compare_exchange_n (&v, &a, b, ++ WEAK, __ATOMIC_RELEASE, ++ __ATOMIC_ACQUIRE); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c +@@ -1,5 +1,5 @@ + /* { dg-do compile } */ +-/* { dg-options "-O2" } */ ++/* { dg-options "-O2 -dp" } */ + + #include + +@@ -32,6 +32,18 @@ + vqaddd_s64 (a, d)); + } + ++/* { dg-final { scan-assembler-times "\\tabs\\td\[0-9\]+, d\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vabs_s64 (int64x1_t a) ++{ ++ uint64x1_t res; ++ force_simd (a); ++ res = vabs_s64 (a); ++ force_simd (res); ++ return res; ++} ++ + /* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ + + uint64x1_t +@@ -181,7 +193,7 @@ + return res; + } + +-/* { dg-final { scan-assembler-times "\\tdup\\tb\[0-9\]+, v\[0-9\]+\.b" 2 } } */ ++/* { dg-final { scan-assembler-times "aarch64_get_lanev16qi" 2 } } */ + + int8x1_t + test_vdupb_lane_s8 (int8x16_t a) +@@ -195,7 +207,7 @@ + return vdupb_lane_u8 (a, 2); + } + +-/* { dg-final { scan-assembler-times "\\tdup\\th\[0-9\]+, v\[0-9\]+\.h" 2 } } */ ++/* { dg-final { scan-assembler-times "aarch64_get_lanev8hi" 2 } } */ + + int16x1_t + test_vduph_lane_s16 (int16x8_t a) +@@ -209,7 +221,7 @@ + return vduph_lane_u16 (a, 2); + } + +-/* { dg-final { scan-assembler-times "\\tdup\\ts\[0-9\]+, v\[0-9\]+\.s" 2 } } */ ++/* { dg-final { scan-assembler-times "aarch64_get_lanev4si" 2 } } */ + + int32x1_t + test_vdups_lane_s32 (int32x4_t a) +@@ -223,18 +235,18 @@ + return vdups_lane_u32 (a, 2); + } + +-/* { dg-final { scan-assembler-times "\\tdup\\td\[0-9\]+, v\[0-9\]+\.d" 2 } } */ ++/* { dg-final { scan-assembler-times "aarch64_get_lanev2di" 2 } } */ + + int64x1_t + test_vdupd_lane_s64 (int64x2_t a) + { +- return vdupd_lane_s64 (a, 2); ++ return vdupd_lane_s64 (a, 1); + } + + uint64x1_t + test_vdupd_lane_u64 (uint64x2_t a) + { +- return vdupd_lane_u64 (a, 2); ++ return vdupd_lane_u64 (a, 1); + } + + /* { dg-final { scan-assembler-times "\\tcmtst\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-int.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-int.c +@@ -1,43 +1,7 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ + +-int v = 0; ++#include "atomic-op-int.x" + +-int +-atomic_fetch_add_RELAXED (int a) +-{ +- return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); +-} +- +-int +-atomic_fetch_sub_RELAXED (int a) +-{ +- return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); +-} +- +-int +-atomic_fetch_and_RELAXED (int a) +-{ +- return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); +-} +- +-int +-atomic_fetch_nand_RELAXED (int a) +-{ +- return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); +-} +- +-int +-atomic_fetch_xor_RELAXED (int a) +-{ +- return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); +-} +- +-int +-atomic_fetch_or_RELAXED (int a) +-{ +- return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); +-} +- + /* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ + /* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/cmn-neg.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cmn-neg.c +@@ -0,0 +1,33 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps" } */ ++ ++extern void abort (void); ++ ++void __attribute__ ((noinline)) ++foo_s32 (int a, int b) ++{ ++ if (a == -b) ++ abort (); ++} ++/* { dg-final { scan-assembler "cmn\tw\[0-9\]" } } */ ++ ++void __attribute__ ((noinline)) ++foo_s64 (long long a, long long b) ++{ ++ if (a == -b) ++ abort (); ++} ++/* { dg-final { scan-assembler "cmn\tx\[0-9\]" } } */ ++ ++ ++int ++main (void) ++{ ++ int a = 30; ++ int b = 42; ++ foo_s32 (a, b); ++ foo_s64 (a, b); ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c +@@ -1,43 +1,7 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ + +-int v = 0; ++#include "atomic-op-seq_cst.x" + +-int +-atomic_fetch_add_SEQ_CST (int a) +-{ +- return __atomic_fetch_add (&v, a, __ATOMIC_SEQ_CST); +-} +- +-int +-atomic_fetch_sub_SEQ_CST (int a) +-{ +- return __atomic_fetch_sub (&v, a, __ATOMIC_SEQ_CST); +-} +- +-int +-atomic_fetch_and_SEQ_CST (int a) +-{ +- return __atomic_fetch_and (&v, a, __ATOMIC_SEQ_CST); +-} +- +-int +-atomic_fetch_nand_SEQ_CST (int a) +-{ +- return __atomic_fetch_nand (&v, a, __ATOMIC_SEQ_CST); +-} +- +-int +-atomic_fetch_xor_SEQ_CST (int a) +-{ +- return __atomic_fetch_xor (&v, a, __ATOMIC_SEQ_CST); +-} +- +-int +-atomic_fetch_or_SEQ_CST (int a) +-{ +- return __atomic_fetch_or (&v, a, __ATOMIC_SEQ_CST); +-} +- + /* { dg-final { scan-assembler-times "ldaxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ + /* { dg-final { scan-assembler-times "stlxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vaddv-intrinsic.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/vaddv-intrinsic.x +@@ -0,0 +1,27 @@ ++ ++float32_t ++test_vaddv_v2sf (const float32_t *pool) ++{ ++ float32x2_t val; ++ ++ val = vld1_f32 (pool); ++ return vaddv_f32 (val); ++} ++ ++float32_t ++test_vaddv_v4sf (const float32_t *pool) ++{ ++ float32x4_t val; ++ ++ val = vld1q_f32 (pool); ++ return vaddvq_f32 (val); ++} ++ ++float64_t ++test_vaddv_v2df (const float64_t *pool) ++{ ++ float64x2_t val; ++ ++ val = vld1q_f64 (pool); ++ return vaddvq_f64 (val); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/negs.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/negs.c +@@ -0,0 +1,108 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps" } */ ++ ++extern void abort (void); ++int z; ++ ++int ++negs_si_test1 (int a, int b, int c) ++{ ++ int d = -b; ++ ++ /* { dg-final { scan-assembler "negs\tw\[0-9\]+, w\[0-9\]+" } } */ ++ if (d < 0) ++ return a + c; ++ ++ z = d; ++ return b + c + d; ++} ++ ++int ++negs_si_test3 (int a, int b, int c) ++{ ++ int d = -(b) << 3; ++ ++ /* { dg-final { scan-assembler "negs\tw\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ if (d == 0) ++ return a + c; ++ ++ z = d; ++ return b + c + d; ++} ++ ++typedef long long s64; ++s64 zz; ++ ++s64 ++negs_di_test1 (s64 a, s64 b, s64 c) ++{ ++ s64 d = -b; ++ ++ /* { dg-final { scan-assembler "negs\tx\[0-9\]+, x\[0-9\]+" } } */ ++ if (d < 0) ++ return a + c; ++ ++ zz = d; ++ return b + c + d; ++} ++ ++s64 ++negs_di_test3 (s64 a, s64 b, s64 c) ++{ ++ s64 d = -(b) << 3; ++ ++ /* { dg-final { scan-assembler "negs\tx\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ if (d == 0) ++ return a + c; ++ ++ zz = d; ++ return b + c + d; ++} ++ ++int main () ++{ ++ int x; ++ s64 y; ++ ++ x = negs_si_test1 (2, 12, 5); ++ if (x != 7) ++ abort (); ++ ++ x = negs_si_test1 (1, 2, 32); ++ if (x != 33) ++ abort (); ++ ++ x = negs_si_test3 (13, 14, 5); ++ if (x != -93) ++ abort (); ++ ++ x = negs_si_test3 (15, 21, 2); ++ if (x != -145) ++ abort (); ++ ++ y = negs_di_test1 (0x20202020ll, ++ 0x65161611ll, ++ 0x42434243ll); ++ if (y != 0x62636263ll) ++ abort (); ++ ++ y = negs_di_test1 (0x1010101010101ll, ++ 0x123456789abcdll, ++ 0x5555555555555ll); ++ if (y != 0x6565656565656ll) ++ abort (); ++ ++ y = negs_di_test3 (0x62523781ll, ++ 0x64234978ll, ++ 0x12345123ll); ++ if (y != 0xfffffffd553d4edbll) ++ abort (); ++ ++ y = negs_di_test3 (0x763526268ll, ++ 0x101010101ll, ++ 0x222222222ll); ++ if (y != 0xfffffffb1b1b1b1bll) ++ abort (); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c +@@ -1,43 +1,7 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ + +-int v = 0; ++#include "atomic-op-consume.x" + +-int +-atomic_fetch_add_CONSUME (int a) +-{ +- return __atomic_fetch_add (&v, a, __ATOMIC_CONSUME); +-} +- +-int +-atomic_fetch_sub_CONSUME (int a) +-{ +- return __atomic_fetch_sub (&v, a, __ATOMIC_CONSUME); +-} +- +-int +-atomic_fetch_and_CONSUME (int a) +-{ +- return __atomic_fetch_and (&v, a, __ATOMIC_CONSUME); +-} +- +-int +-atomic_fetch_nand_CONSUME (int a) +-{ +- return __atomic_fetch_nand (&v, a, __ATOMIC_CONSUME); +-} +- +-int +-atomic_fetch_xor_CONSUME (int a) +-{ +- return __atomic_fetch_xor (&v, a, __ATOMIC_CONSUME); +-} +- +-int +-atomic_fetch_or_CONSUME (int a) +-{ +- return __atomic_fetch_or (&v, a, __ATOMIC_CONSUME); +-} +- + /* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ + /* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vaddv.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vaddv.c +@@ -0,0 +1,128 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps -ffast-math" } */ ++ ++#include ++ ++extern void abort (void); ++extern float fabsf (float); ++extern double fabs (double); ++ ++#define NUM_TESTS 16 ++#define DELTA 0.000001 ++ ++int8_t input_int8[] = {1, 56, 2, -9, -90, 23, 54, 76, ++ -4, 34, 110, -110, 6, 4, 75, -34}; ++int16_t input_int16[] = {1, 56, 2, -9, -90, 23, 54, 76, ++ -4, 34, 110, -110, 6, 4, 75, -34}; ++int32_t input_int32[] = {1, 56, 2, -9, -90, 23, 54, 76, ++ -4, 34, 110, -110, 6, 4, 75, -34}; ++int64_t input_int64[] = {1, 56, 2, -9, -90, 23, 54, 76, ++ -4, 34, 110, -110, 6, 4, 75, -34}; ++ ++uint8_t input_uint8[] = {1, 56, 2, 9, 90, 23, 54, 76, ++ 4, 34, 110, 110, 6, 4, 75, 34}; ++uint16_t input_uint16[] = {1, 56, 2, 9, 90, 23, 54, 76, ++ 4, 34, 110, 110, 6, 4, 75, 34}; ++uint32_t input_uint32[] = {1, 56, 2, 9, 90, 23, 54, 76, ++ 4, 34, 110, 110, 6, 4, 75, 34}; ++ ++uint64_t input_uint64[] = {1, 56, 2, 9, 90, 23, 54, 76, ++ 4, 34, 110, 110, 6, 4, 75, 34}; ++ ++float input_float32[] = {0.1f, -0.1f, 0.4f, 10.3f, ++ 200.0f, -800.0f, -13.0f, -0.5f, ++ 7.9f, -870.0f, 10.4f, 310.11f, ++ 0.0f, -865.0f, -2213.0f, -1.5f}; ++ ++double input_float64[] = {0.1, -0.1, 0.4, 10.3, ++ 200.0, -800.0, -13.0, -0.5, ++ 7.9, -870.0, 10.4, 310.11, ++ 0.0, -865.0, -2213.0, -1.5}; ++ ++#define EQUALF(a, b) (fabsf (a - b) < DELTA) ++#define EQUALD(a, b) (fabs (a - b) < DELTA) ++#define EQUALL(a, b) (a == b) ++ ++#define TEST(SUFFIX, Q, TYPE, LANES, FLOAT) \ ++int \ ++test_vaddv##SUFFIX##_##TYPE##x##LANES##_t (void) \ ++{ \ ++ int i, j; \ ++ int moves = (NUM_TESTS - LANES) + 1; \ ++ TYPE##_t out_l[NUM_TESTS]; \ ++ TYPE##_t out_v[NUM_TESTS]; \ ++ \ ++ /* Calculate linearly. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ out_l[i] = input_##TYPE[i]; \ ++ for (j = 1; j < LANES; j++) \ ++ out_l[i] += input_##TYPE[i + j]; \ ++ } \ ++ \ ++ /* Calculate using vector reduction intrinsics. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ TYPE##x##LANES##_t t1 = vld1##Q##_##SUFFIX (input_##TYPE + i); \ ++ out_v[i] = vaddv##Q##_##SUFFIX (t1); \ ++ } \ ++ \ ++ /* Compare. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ if (!EQUAL##FLOAT (out_v[i], out_l[i])) \ ++ return 0; \ ++ } \ ++ return 1; \ ++} ++ ++#define BUILD_VARIANTS(TYPE, STYPE, W32, W64, F) \ ++TEST (STYPE, , TYPE, W32, F) \ ++TEST (STYPE, q, TYPE, W64, F) \ ++ ++BUILD_VARIANTS (int8, s8, 8, 16, L) ++BUILD_VARIANTS (uint8, u8, 8, 16, L) ++/* { dg-final { scan-assembler "addv\\tb\[0-9\]+, v\[0-9\]+\.8b" } } */ ++/* { dg-final { scan-assembler "addv\\tb\[0-9\]+, v\[0-9\]+\.16b" } } */ ++BUILD_VARIANTS (int16, s16, 4, 8, L) ++BUILD_VARIANTS (uint16, u16, 4, 8, L) ++/* { dg-final { scan-assembler "addv\\th\[0-9\]+, v\[0-9\]+\.4h" } } */ ++/* { dg-final { scan-assembler "addv\\th\[0-9\]+, v\[0-9\]+\.8h" } } */ ++BUILD_VARIANTS (int32, s32, 2, 4, L) ++BUILD_VARIANTS (uint32, u32, 2, 4, L) ++/* { dg-final { scan-assembler "addp\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "addv\\ts\[0-9\]+, v\[0-9\]+\.4s" } } */ ++TEST (s64, q, int64, 2, D) ++TEST (u64, q, uint64, 2, D) ++/* { dg-final { scan-assembler "addp\\td\[0-9\]+\, v\[0-9\]+\.2d" } } */ ++ ++BUILD_VARIANTS (float32, f32, 2, 4, F) ++/* { dg-final { scan-assembler "faddp\\ts\[0-9\]+, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "faddp\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++TEST (f64, q, float64, 2, D) ++/* { dg-final { scan-assembler "faddp\\td\[0-9\]+\, v\[0-9\]+\.2d" } } */ ++ ++#undef TEST ++#define TEST(SUFFIX, Q, TYPE, LANES, FLOAT) \ ++{ \ ++ if (!test_vaddv##SUFFIX##_##TYPE##x##LANES##_t ()) \ ++ abort (); \ ++} ++ ++int ++main (int argc, char **argv) ++{ ++BUILD_VARIANTS (int8, s8, 8, 16, L) ++BUILD_VARIANTS (uint8, u8, 8, 16, L) ++BUILD_VARIANTS (int16, s16, 4, 8, L) ++BUILD_VARIANTS (uint16, u16, 4, 8, L) ++BUILD_VARIANTS (int32, s32, 2, 4, L) ++BUILD_VARIANTS (uint32, u32, 2, 4, L) ++ ++BUILD_VARIANTS (float32, f32, 2, 4, F) ++TEST (f64, q, float64, 2, D) ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-char.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-char.c +@@ -1,43 +1,7 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ + +-char v = 0; ++#include "atomic-op-char.x" + +-char +-atomic_fetch_add_RELAXED (char a) +-{ +- return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); +-} +- +-char +-atomic_fetch_sub_RELAXED (char a) +-{ +- return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); +-} +- +-char +-atomic_fetch_and_RELAXED (char a) +-{ +- return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); +-} +- +-char +-atomic_fetch_nand_RELAXED (char a) +-{ +- return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); +-} +- +-char +-atomic_fetch_xor_RELAXED (char a) +-{ +- return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); +-} +- +-char +-atomic_fetch_or_RELAXED (char a) +-{ +- return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); +-} +- + /* { dg-final { scan-assembler-times "ldxrb\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ + /* { dg-final { scan-assembler-times "stxrb\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-int.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-int.x +@@ -0,0 +1,37 @@ ++int v = 0; ++ ++int ++atomic_fetch_add_RELAXED (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_sub_RELAXED (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_and_RELAXED (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_nand_RELAXED (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_xor_RELAXED (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_or_RELAXED (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.x +@@ -0,0 +1,37 @@ ++int v = 0; ++ ++int ++atomic_fetch_add_SEQ_CST (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_sub_SEQ_CST (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_and_SEQ_CST (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_nand_SEQ_CST (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_xor_SEQ_CST (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_or_SEQ_CST (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_SEQ_CST); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/bfxil_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/bfxil_1.c +@@ -0,0 +1,40 @@ ++/* { dg-do run { target aarch64*-*-* } } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++/* { dg-require-effective-target aarch64_little_endian } */ ++ ++extern void abort (void); ++ ++typedef struct bitfield ++{ ++ unsigned short eight1: 8; ++ unsigned short four: 4; ++ unsigned short eight2: 8; ++ unsigned short seven: 7; ++ unsigned int sixteen: 16; ++} bitfield; ++ ++bitfield ++bfxil (bitfield a) ++{ ++ /* { dg-final { scan-assembler "bfxil\tx\[0-9\]+, x\[0-9\]+, 16, 8" } } */ ++ a.eight1 = a.eight2; ++ return a; ++} ++ ++int ++main (void) ++{ ++ static bitfield a; ++ bitfield b; ++ ++ a.eight1 = 9; ++ a.eight2 = 57; ++ b = bfxil (a); ++ ++ if (b.eight1 != a.eight2) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.x +@@ -0,0 +1,37 @@ ++int v = 0; ++ ++int ++atomic_fetch_add_CONSUME (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_sub_CONSUME (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_and_CONSUME (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_nand_CONSUME (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_xor_CONSUME (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_or_CONSUME (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_CONSUME); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-short.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-short.c +@@ -1,43 +1,7 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ + +-short v = 0; ++#include "atomic-op-short.x" + +-short +-atomic_fetch_add_RELAXED (short a) +-{ +- return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); +-} +- +-short +-atomic_fetch_sub_RELAXED (short a) +-{ +- return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); +-} +- +-short +-atomic_fetch_and_RELAXED (short a) +-{ +- return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); +-} +- +-short +-atomic_fetch_nand_RELAXED (short a) +-{ +- return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); +-} +- +-short +-atomic_fetch_xor_RELAXED (short a) +-{ +- return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); +-} +- +-short +-atomic_fetch_or_RELAXED (short a) +-{ +- return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); +-} +- + /* { dg-final { scan-assembler-times "ldxrh\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ + /* { dg-final { scan-assembler-times "stxrh\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-char.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-char.x +@@ -0,0 +1,37 @@ ++char v = 0; ++ ++char ++atomic_fetch_add_RELAXED (char a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); ++} ++ ++char ++atomic_fetch_sub_RELAXED (char a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); ++} ++ ++char ++atomic_fetch_and_RELAXED (char a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); ++} ++ ++char ++atomic_fetch_nand_RELAXED (char a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); ++} ++ ++char ++atomic_fetch_xor_RELAXED (char a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); ++} ++ ++char ++atomic_fetch_or_RELAXED (char a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-f.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-f.c +@@ -2,12 +2,13 @@ + /* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-unroll-loops --save-temps -fno-inline" } */ + + #define FTYPE float ++#define ITYPE int + #define OP == + #define INV_OP != + + #include "vect-fcm.x" + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 8 "vect" } } */ + /* { dg-final { scan-assembler "fcmeq\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s" } } */ + /* { dg-final { scan-assembler "fcmeq\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fp-compile.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fp-compile.c +@@ -11,3 +11,4 @@ + /* { dg-final { scan-assembler "fdiv\\tv" } } */ + /* { dg-final { scan-assembler "fneg\\tv" } } */ + /* { dg-final { scan-assembler "fabs\\tv" } } */ ++/* { dg-final { scan-assembler "fabd\\tv" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/adds1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/adds1.c +@@ -0,0 +1,149 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++ ++int ++adds_si_test1 (int a, int b, int c) ++{ ++ int d = a + b; ++ ++ /* { dg-final { scan-assembler "adds\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++adds_si_test2 (int a, int b, int c) ++{ ++ int d = a + 0xff; ++ ++ /* { dg-final { scan-assembler "adds\tw\[0-9\]+, w\[0-9\]+, 255" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++adds_si_test3 (int a, int b, int c) ++{ ++ int d = a + (b << 3); ++ ++ /* { dg-final { scan-assembler "adds\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++typedef long long s64; ++ ++s64 ++adds_di_test1 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a + b; ++ ++ /* { dg-final { scan-assembler "adds\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++adds_di_test2 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a + 0xff; ++ ++ /* { dg-final { scan-assembler "adds\tx\[0-9\]+, x\[0-9\]+, 255" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++adds_di_test3 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a + (b << 3); ++ ++ /* { dg-final { scan-assembler "adds\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int main () ++{ ++ int x; ++ s64 y; ++ ++ x = adds_si_test1 (29, 4, 5); ++ if (x != 42) ++ abort (); ++ ++ x = adds_si_test1 (5, 2, 20); ++ if (x != 29) ++ abort (); ++ ++ x = adds_si_test2 (29, 4, 5); ++ if (x != 293) ++ abort (); ++ ++ x = adds_si_test2 (1024, 2, 20); ++ if (x != 1301) ++ abort (); ++ ++ x = adds_si_test3 (35, 4, 5); ++ if (x != 76) ++ abort (); ++ ++ x = adds_si_test3 (5, 2, 20); ++ if (x != 43) ++ abort (); ++ ++ y = adds_di_test1 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ ++ if (y != 0xc75050536) ++ abort (); ++ ++ y = adds_di_test1 (0x5000500050005ll, ++ 0x2111211121112ll, ++ 0x0000000002020ll); ++ if (y != 0x9222922294249) ++ abort (); ++ ++ y = adds_di_test2 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ if (y != 0x955050631) ++ abort (); ++ ++ y = adds_di_test2 (0x130002900ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ if (y != 0x955052f08) ++ abort (); ++ ++ y = adds_di_test3 (0x130000029ll, ++ 0x064000008ll, ++ 0x505050505ll); ++ if (y != 0x9b9050576) ++ abort (); ++ ++ y = adds_di_test3 (0x130002900ll, ++ 0x088000008ll, ++ 0x505050505ll); ++ if (y != 0xafd052e4d) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/insv_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/insv_1.c +@@ -0,0 +1,85 @@ ++/* { dg-do run { target aarch64*-*-* } } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++/* { dg-require-effective-target aarch64_little_endian } */ ++ ++extern void abort (void); ++ ++typedef struct bitfield ++{ ++ unsigned short eight: 8; ++ unsigned short four: 4; ++ unsigned short five: 5; ++ unsigned short seven: 7; ++ unsigned int sixteen: 16; ++} bitfield; ++ ++bitfield ++bfi1 (bitfield a) ++{ ++ /* { dg-final { scan-assembler "bfi\tx\[0-9\]+, x\[0-9\]+, 0, 8" } } */ ++ a.eight = 3; ++ return a; ++} ++ ++bitfield ++bfi2 (bitfield a) ++{ ++ /* { dg-final { scan-assembler "bfi\tx\[0-9\]+, x\[0-9\]+, 16, 5" } } */ ++ a.five = 7; ++ return a; ++} ++ ++bitfield ++movk (bitfield a) ++{ ++ /* { dg-final { scan-assembler "movk\tx\[0-9\]+, 0x1d6b, lsl 32" } } */ ++ a.sixteen = 7531; ++ return a; ++} ++ ++bitfield ++set1 (bitfield a) ++{ ++ /* { dg-final { scan-assembler "orr\tx\[0-9\]+, x\[0-9\]+, 2031616" } } */ ++ a.five = 0x1f; ++ return a; ++} ++ ++bitfield ++set0 (bitfield a) ++{ ++ /* { dg-final { scan-assembler "and\tx\[0-9\]+, x\[0-9\]+, -2031617" } } */ ++ a.five = 0; ++ return a; ++} ++ ++ ++int ++main (int argc, char** argv) ++{ ++ static bitfield a; ++ bitfield b = bfi1 (a); ++ bitfield c = bfi2 (b); ++ bitfield d = movk (c); ++ ++ if (d.eight != 3) ++ abort (); ++ ++ if (d.five != 7) ++ abort (); ++ ++ if (d.sixteen != 7531) ++ abort (); ++ ++ d = set1 (d); ++ if (d.five != 0x1f) ++ abort (); ++ ++ d = set0 (d); ++ if (d.five != 0) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/ror.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/ror.c +@@ -0,0 +1,34 @@ ++/* { dg-options "-O2 --save-temps" } */ ++/* { dg-do run } */ ++ ++extern void abort (void); ++ ++int ++test_si (int a) ++{ ++ /* { dg-final { scan-assembler "ror\tw\[0-9\]+, w\[0-9\]+, 27\n" } } */ ++ return (a << 5) | ((unsigned int) a >> 27); ++} ++ ++long long ++test_di (long long a) ++{ ++ /* { dg-final { scan-assembler "ror\tx\[0-9\]+, x\[0-9\]+, 45\n" } } */ ++ return (a << 19) | ((unsigned long long) a >> 45); ++} ++ ++int ++main () ++{ ++ int v; ++ long long w; ++ v = test_si (0x0203050); ++ if (v != 0x4060a00) ++ abort(); ++ w = test_di (0x0000020506010304ll); ++ if (w != 0x1028300818200000ll) ++ abort(); ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/ands_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/ands_1.c +@@ -0,0 +1,151 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++ ++int ++ands_si_test1 (int a, int b, int c) ++{ ++ int d = a & b; ++ ++ /* { dg-final { scan-assembler-times "ands\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 2 } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++ands_si_test2 (int a, int b, int c) ++{ ++ int d = a & 0xff; ++ ++ /* { dg-final { scan-assembler "ands\tw\[0-9\]+, w\[0-9\]+, 255" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++ands_si_test3 (int a, int b, int c) ++{ ++ int d = a & (b << 3); ++ ++ /* { dg-final { scan-assembler "ands\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++typedef long long s64; ++ ++s64 ++ands_di_test1 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a & b; ++ ++ /* { dg-final { scan-assembler-times "ands\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" 2 } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++ands_di_test2 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a & 0xff; ++ ++ /* { dg-final { scan-assembler "ands\tx\[0-9\]+, x\[0-9\]+, 255" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++ands_di_test3 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a & (b << 3); ++ ++ /* { dg-final { scan-assembler "ands\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++main () ++{ ++ int x; ++ s64 y; ++ ++ x = ands_si_test1 (29, 4, 5); ++ if (x != 13) ++ abort (); ++ ++ x = ands_si_test1 (5, 2, 20); ++ if (x != 25) ++ abort (); ++ ++ x = ands_si_test2 (29, 4, 5); ++ if (x != 38) ++ abort (); ++ ++ x = ands_si_test2 (1024, 2, 20); ++ if (x != 1044) ++ abort (); ++ ++ x = ands_si_test3 (35, 4, 5); ++ if (x != 41) ++ abort (); ++ ++ x = ands_si_test3 (5, 2, 20); ++ if (x != 25) ++ abort (); ++ ++ y = ands_di_test1 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ ++ if (y != ((0x130000029ll & 0x320000004ll) + 0x320000004ll + 0x505050505ll)) ++ abort (); ++ ++ y = ands_di_test1 (0x5000500050005ll, ++ 0x2111211121112ll, ++ 0x0000000002020ll); ++ if (y != 0x5000500052025ll) ++ abort (); ++ ++ y = ands_di_test2 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ if (y != ((0x130000029ll & 0xff) + 0x320000004ll + 0x505050505ll)) ++ abort (); ++ ++ y = ands_di_test2 (0x130002900ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ if (y != (0x130002900ll + 0x505050505ll)) ++ abort (); ++ ++ y = ands_di_test3 (0x130000029ll, ++ 0x064000008ll, ++ 0x505050505ll); ++ if (y != ((0x130000029ll & (0x064000008ll << 3)) ++ + 0x064000008ll + 0x505050505ll)) ++ abort (); ++ ++ y = ands_di_test3 (0x130002900ll, ++ 0x088000008ll, ++ 0x505050505ll); ++ if (y != (0x130002900ll + 0x505050505ll)) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-release.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-release.c +@@ -1,43 +1,7 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ + +-int v = 0; ++#include "atomic-op-release.x" + +-int +-atomic_fetch_add_RELEASE (int a) +-{ +- return __atomic_fetch_add (&v, a, __ATOMIC_RELEASE); +-} +- +-int +-atomic_fetch_sub_RELEASE (int a) +-{ +- return __atomic_fetch_sub (&v, a, __ATOMIC_RELEASE); +-} +- +-int +-atomic_fetch_and_RELEASE (int a) +-{ +- return __atomic_fetch_and (&v, a, __ATOMIC_RELEASE); +-} +- +-int +-atomic_fetch_nand_RELEASE (int a) +-{ +- return __atomic_fetch_nand (&v, a, __ATOMIC_RELEASE); +-} +- +-int +-atomic_fetch_xor_RELEASE (int a) +-{ +- return __atomic_fetch_xor (&v, a, __ATOMIC_RELEASE); +-} +- +-int +-atomic_fetch_or_RELEASE (int a) +-{ +- return __atomic_fetch_or (&v, a, __ATOMIC_RELEASE); +-} +- + /* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ + /* { dg-final { scan-assembler-times "stlxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vfmaxv.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vfmaxv.c +@@ -0,0 +1,169 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps -ffast-math" } */ ++ ++#include ++ ++extern void abort (void); ++ ++extern float fabsf (float); ++extern double fabs (double); ++extern int isnan (double); ++extern float fmaxf (float, float); ++extern float fminf (float, float); ++extern double fmax (double, double); ++extern double fmin (double, double); ++ ++#define NUM_TESTS 16 ++#define DELTA 0.000001 ++#define NAN (0.0 / 0.0) ++ ++float input_float32[] = {0.1f, -0.1f, 0.4f, 10.3f, ++ 200.0f, -800.0f, -13.0f, -0.5f, ++ NAN, -870.0f, 10.4f, 310.11f, ++ 0.0f, -865.0f, -2213.0f, -1.5f}; ++ ++double input_float64[] = {0.1, -0.1, 0.4, 10.3, ++ 200.0, -800.0, -13.0, -0.5, ++ NAN, -870.0, 10.4, 310.11, ++ 0.0, -865.0, -2213.0, -1.5}; ++ ++#define EQUALF(a, b) (fabsf (a - b) < DELTA) ++#define EQUALD(a, b) (fabs (a - b) < DELTA) ++ ++/* Floating point 'unordered' variants. */ ++ ++#undef TEST ++#define TEST(MAXMIN, CMP_OP, SUFFIX, Q, TYPE, LANES, FLOAT) \ ++int \ ++test_v##MAXMIN##v##SUFFIX##_##TYPE##x##LANES##_t (void) \ ++{ \ ++ int i, j; \ ++ int moves = (NUM_TESTS - LANES) + 1; \ ++ TYPE##_t out_l[NUM_TESTS]; \ ++ TYPE##_t out_v[NUM_TESTS]; \ ++ \ ++ /* Calculate linearly. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ out_l[i] = input_##TYPE[i]; \ ++ for (j = 0; j < LANES; j++) \ ++ { \ ++ if (isnan (out_l[i])) \ ++ continue; \ ++ if (isnan (input_##TYPE[i + j]) \ ++ || input_##TYPE[i + j] CMP_OP out_l[i]) \ ++ out_l[i] = input_##TYPE[i + j]; \ ++ } \ ++ } \ ++ \ ++ /* Calculate using vector reduction intrinsics. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ TYPE##x##LANES##_t t1 = vld1##Q##_##SUFFIX (input_##TYPE + i); \ ++ out_v[i] = v##MAXMIN##v##Q##_##SUFFIX (t1); \ ++ } \ ++ \ ++ /* Compare. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ if (!EQUAL##FLOAT (out_v[i], out_l[i]) \ ++ && !(isnan (out_v[i]) && isnan (out_l[i]))) \ ++ return 0; \ ++ } \ ++ return 1; \ ++} ++ ++#define BUILD_VARIANTS(TYPE, STYPE, W32, W64, F) \ ++TEST (max, >, STYPE, , TYPE, W32, F) \ ++TEST (max, >, STYPE, q, TYPE, W64, F) \ ++TEST (min, <, STYPE, , TYPE, W32, F) \ ++TEST (min, <, STYPE, q, TYPE, W64, F) ++ ++BUILD_VARIANTS (float32, f32, 2, 4, F) ++/* { dg-final { scan-assembler "fmaxp\\ts\[0-9\]+, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fminp\\ts\[0-9\]+, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fmaxv\\ts\[0-9\]+, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fminv\\ts\[0-9\]+, v\[0-9\]+\.4s" } } */ ++TEST (max, >, f64, q, float64, 2, D) ++/* { dg-final { scan-assembler "fmaxp\\td\[0-9\]+, v\[0-9\]+\.2d" } } */ ++TEST (min, <, f64, q, float64, 2, D) ++/* { dg-final { scan-assembler "fminp\\td\[0-9\]+, v\[0-9\]+\.2d" } } */ ++ ++/* Floating point 'nm' variants. */ ++ ++#undef TEST ++#define TEST(MAXMIN, F, SUFFIX, Q, TYPE, LANES, FLOAT) \ ++int \ ++test_v##MAXMIN##nmv##SUFFIX##_##TYPE##x##LANES##_t (void) \ ++{ \ ++ int i, j; \ ++ int moves = (NUM_TESTS - LANES) + 1; \ ++ TYPE##_t out_l[NUM_TESTS]; \ ++ TYPE##_t out_v[NUM_TESTS]; \ ++ \ ++ /* Calculate linearly. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ out_l[i] = input_##TYPE[i]; \ ++ for (j = 0; j < LANES; j++) \ ++ out_l[i] = f##MAXMIN##F (input_##TYPE[i + j], out_l[i]); \ ++ } \ ++ \ ++ /* Calculate using vector reduction intrinsics. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ TYPE##x##LANES##_t t1 = vld1##Q##_##SUFFIX (input_##TYPE + i); \ ++ out_v[i] = v##MAXMIN##nmv##Q##_##SUFFIX (t1); \ ++ } \ ++ \ ++ /* Compare. */ \ ++ for (i = 0; i < moves; i++) \ ++ { \ ++ if (!EQUAL##FLOAT (out_v[i], out_l[i])) \ ++ return 0; \ ++ } \ ++ return 1; \ ++} ++ ++TEST (max, f, f32, , float32, 2, D) ++/* { dg-final { scan-assembler "fmaxnmp\\ts\[0-9\]+, v\[0-9\]+\.2s" } } */ ++TEST (min, f, f32, , float32, 2, D) ++/* { dg-final { scan-assembler "fminnmp\\ts\[0-9\]+, v\[0-9\]+\.2s" } } */ ++TEST (max, f, f32, q, float32, 4, D) ++/* { dg-final { scan-assembler "fmaxnmv\\ts\[0-9\]+, v\[0-9\]+\.4s" } } */ ++TEST (min, f, f32, q, float32, 4, D) ++/* { dg-final { scan-assembler "fminnmv\\ts\[0-9\]+, v\[0-9\]+\.4s" } } */ ++TEST (max, , f64, q, float64, 2, D) ++/* { dg-final { scan-assembler "fmaxnmp\\td\[0-9\]+, v\[0-9\]+\.2d" } } */ ++TEST (min, , f64, q, float64, 2, D) ++/* { dg-final { scan-assembler "fminnmp\\td\[0-9\]+, v\[0-9\]+\.2d" } } */ ++ ++#undef TEST ++#define TEST(MAXMIN, CMP_OP, SUFFIX, Q, TYPE, LANES, FLOAT) \ ++{ \ ++ if (!test_v##MAXMIN##v##SUFFIX##_##TYPE##x##LANES##_t ()) \ ++ abort (); \ ++} ++ ++int ++main (int argc, char **argv) ++{ ++ BUILD_VARIANTS (float32, f32, 2, 4, F) ++ TEST (max, >, f64, q, float64, 2, D) ++ TEST (min, <, f64, q, float64, 2, D) ++ ++#undef TEST ++#define TEST(MAXMIN, CMP_OP, SUFFIX, Q, TYPE, LANES, FLOAT) \ ++{ \ ++ if (!test_v##MAXMIN##nmv##SUFFIX##_##TYPE##x##LANES##_t ()) \ ++ abort (); \ ++} ++ ++ BUILD_VARIANTS (float32, f32, 2, 4, F) ++ TEST (max, >, f64, q, float64, 2, D) ++ TEST (min, <, f64, q, float64, 2, D) ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-short.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-short.x +@@ -0,0 +1,37 @@ ++short v = 0; ++ ++short ++atomic_fetch_add_RELAXED (short a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); ++} ++ ++short ++atomic_fetch_sub_RELAXED (short a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); ++} ++ ++short ++atomic_fetch_and_RELAXED (short a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); ++} ++ ++short ++atomic_fetch_nand_RELAXED (short a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); ++} ++ ++short ++atomic_fetch_xor_RELAXED (short a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); ++} ++ ++short ++atomic_fetch_or_RELAXED (short a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vcvt.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vcvt.c +@@ -0,0 +1,132 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 --save-temps -ffast-math" } */ ++ ++#include ++ ++extern void abort (void); ++extern double fabs (double); ++ ++#define NUM_TESTS 8 ++#define DELTA 0.000001 ++ ++float input_f32[] = {0.1f, -0.1f, 0.4f, 10.3f, ++ 200.0f, -800.0f, -13.0f, -0.5f}; ++double input_f64[] = {0.1, -0.1, 0.4, 10.3, ++ 200.0, -800.0, -13.0, -0.5}; ++ ++#define TEST(SUFFIX, Q, WIDTH, LANES, S, U, D) \ ++int \ ++test_vcvt##SUFFIX##_##S##WIDTH##_f##WIDTH##x##LANES##_t (void) \ ++{ \ ++ int ret = 1; \ ++ int i = 0; \ ++ int nlanes = LANES; \ ++ U##int##WIDTH##_t expected_out[NUM_TESTS]; \ ++ U##int##WIDTH##_t actual_out[NUM_TESTS]; \ ++ \ ++ for (i = 0; i < NUM_TESTS; i++) \ ++ { \ ++ expected_out[i] \ ++ = vcvt##SUFFIX##D##_##S##WIDTH##_f##WIDTH (input_f##WIDTH[i]); \ ++ /* Don't vectorize this. */ \ ++ asm volatile ("" : : : "memory"); \ ++ } \ ++ \ ++ for (i = 0; i < NUM_TESTS; i+=nlanes) \ ++ { \ ++ U##int##WIDTH##x##LANES##_t out = \ ++ vcvt##SUFFIX##Q##_##S##WIDTH##_f##WIDTH \ ++ (vld1##Q##_f##WIDTH (input_f##WIDTH + i)); \ ++ vst1##Q##_##S##WIDTH (actual_out + i, out); \ ++ } \ ++ \ ++ for (i = 0; i < NUM_TESTS; i++) \ ++ ret &= fabs (expected_out[i] - actual_out[i]) < DELTA; \ ++ \ ++ return ret; \ ++} \ ++ ++ ++#define BUILD_VARIANTS(SUFFIX) \ ++TEST (SUFFIX, , 32, 2, s, ,s) \ ++TEST (SUFFIX, q, 32, 4, s, ,s) \ ++TEST (SUFFIX, q, 64, 2, s, ,d) \ ++TEST (SUFFIX, , 32, 2, u,u,s) \ ++TEST (SUFFIX, q, 32, 4, u,u,s) \ ++TEST (SUFFIX, q, 64, 2, u,u,d) \ ++ ++BUILD_VARIANTS ( ) ++/* { dg-final { scan-assembler "fcvtzs\\tw\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtzs\\tx\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtzs\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fcvtzs\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fcvtzs\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "fcvtzu\\tw\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtzu\\tx\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtzu\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fcvtzu\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fcvtzu\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++BUILD_VARIANTS (a) ++/* { dg-final { scan-assembler "fcvtas\\tw\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtas\\tx\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtas\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fcvtas\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fcvtas\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "fcvtau\\tw\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtau\\tx\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtau\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fcvtau\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fcvtau\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++BUILD_VARIANTS (m) ++/* { dg-final { scan-assembler "fcvtms\\tw\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtms\\tx\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtms\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fcvtms\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fcvtms\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "fcvtmu\\tw\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtmu\\tx\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtmu\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fcvtmu\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fcvtmu\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++BUILD_VARIANTS (n) ++/* { dg-final { scan-assembler "fcvtns\\tw\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtns\\tx\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtns\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fcvtns\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fcvtns\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "fcvtnu\\tw\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtnu\\tx\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtnu\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fcvtnu\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fcvtnu\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++BUILD_VARIANTS (p) ++/* { dg-final { scan-assembler "fcvtps\\tw\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtps\\tx\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtps\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fcvtps\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fcvtps\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "fcvtpu\\tw\[0-9\]+, s\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtpu\\tx\[0-9\]+, d\[0-9\]+" } } */ ++/* { dg-final { scan-assembler "fcvtpu\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */ ++/* { dg-final { scan-assembler "fcvtpu\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "fcvtpu\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++ ++#undef TEST ++#define TEST(SUFFIX, Q, WIDTH, LANES, S, U, D) \ ++{ \ ++ if (!test_vcvt##SUFFIX##_##S##WIDTH##_f##WIDTH##x##LANES##_t ()) \ ++ abort (); \ ++} ++ ++int ++main (int argc, char **argv) ++{ ++ BUILD_VARIANTS ( ) ++ BUILD_VARIANTS (a) ++ BUILD_VARIANTS (m) ++ BUILD_VARIANTS (n) ++ BUILD_VARIANTS (p) ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-release.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-release.x +@@ -0,0 +1,37 @@ ++int v = 0; ++ ++int ++atomic_fetch_add_RELEASE (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_fetch_sub_RELEASE (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_fetch_and_RELEASE (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_fetch_nand_RELEASE (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_fetch_xor_RELEASE (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_fetch_or_RELEASE (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELEASE); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/fabd.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fabd.c +@@ -0,0 +1,38 @@ ++/* { dg-do run } */ ++/* { dg-options "-O1 -fno-inline --save-temps" } */ ++ ++extern double fabs (double); ++extern float fabsf (float); ++extern void abort (); ++extern void exit (int); ++ ++void ++fabd_d (double x, double y, double d) ++{ ++ if ((fabs (x - y) - d) > 0.00001) ++ abort (); ++} ++ ++/* { dg-final { scan-assembler "fabd\td\[0-9\]+" } } */ ++ ++void ++fabd_f (float x, float y, float d) ++{ ++ if ((fabsf (x - y) - d) > 0.00001) ++ abort (); ++} ++ ++/* { dg-final { scan-assembler "fabd\ts\[0-9\]+" } } */ ++ ++int ++main () ++{ ++ fabd_d (10.0, 5.0, 5.0); ++ fabd_d (5.0, 10.0, 5.0); ++ fabd_f (10.0, 5.0, 5.0); ++ fabd_f (5.0, 10.0, 5.0); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fp.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fp.c +@@ -117,6 +117,16 @@ + 9.0, 10.0, 11.0, 12.0, + 13.0, 14.0, 15.0, 16.0 }; + ++ F32 fabd_F32_vector[] = { 1.0f, 1.0f, 1.0f, 1.0f, ++ 1.0f, 1.0f, 1.0f, 1.0f, ++ 1.0f, 1.0f, 1.0f, 1.0f, ++ 1.0f, 1.0f, 1.0f, 1.0f }; ++ ++ F64 fabd_F64_vector[] = { 1.0, 1.0, 1.0, 1.0, ++ 1.0, 1.0, 1.0, 1.0, ++ 1.0, 1.0, 1.0, 1.0, ++ 1.0, 1.0, 1.0, 1.0 }; ++ + /* Setup input vectors. */ + for (i=1; i<=16; i++) + { +@@ -132,6 +142,7 @@ + TEST (div, 3); + TEST (neg, 2); + TEST (abs, 2); ++ TEST (fabd, 3); + + return 0; + } +--- a/src/gcc/testsuite/gcc.target/aarch64/cmn-neg2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cmn-neg2.c +@@ -0,0 +1,34 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps" } */ ++ ++extern void abort (void); ++ ++/* It's unsafe to use CMN in these comparisons. */ ++ ++void __attribute__ ((noinline)) ++foo_s32 (int a, int b) ++{ ++ if (a < -b) ++ abort (); ++} ++ ++void __attribute__ ((noinline)) ++foo_s64 (unsigned long long a, unsigned long long b) ++{ ++ if (a > -b) ++ abort (); ++} ++ ++ ++int ++main (void) ++{ ++ int a = 30; ++ int b = 42; ++ foo_s32 (a, b); ++ foo_s64 (a, b); ++ return 0; ++} ++/* { dg-final { scan-assembler-not "cmn\t" } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/ngc.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/ngc.c +@@ -0,0 +1,66 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++typedef unsigned int u32; ++ ++u32 ++ngc_si (u32 a, u32 b, u32 c, u32 d) ++{ ++ a = -b - (c < d); ++ return a; ++} ++ ++typedef unsigned long long u64; ++ ++u64 ++ngc_si_tst (u64 a, u32 b, u32 c, u32 d) ++{ ++ a = -b - (c < d); ++ return a; ++} ++ ++u64 ++ngc_di (u64 a, u64 b, u64 c, u64 d) ++{ ++ a = -b - (c < d); ++ return a; ++} ++ ++int ++main () ++{ ++ int x; ++ u64 y; ++ ++ x = ngc_si (29, 4, 5, 4); ++ if (x != -4) ++ abort (); ++ ++ x = ngc_si (1024, 2, 20, 13); ++ if (x != -2) ++ abort (); ++ ++ y = ngc_si_tst (0x130000029ll, 32, 50, 12); ++ if (y != 0xffffffe0) ++ abort (); ++ ++ y = ngc_si_tst (0x5000500050005ll, 21, 2, 14); ++ if (y != 0xffffffea) ++ abort (); ++ ++ y = ngc_di (0x130000029ll, 0x320000004ll, 0x505050505ll, 0x123123123ll); ++ if (y != 0xfffffffcdffffffc) ++ abort (); ++ ++ y = ngc_di (0x5000500050005ll, ++ 0x2111211121112ll, 0x0000000002020ll, 0x1414575046477ll); ++ if (y != 0xfffdeeedeeedeeed) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { scan-assembler-times "ngc\tw\[0-9\]+, w\[0-9\]+" 2 } } */ ++/* { dg-final { scan-assembler-times "ngc\tx\[0-9\]+, x\[0-9\]+" 1 } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/sha1_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/sha1_1.c +@@ -0,0 +1,55 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-march=armv8-a+crypto" } */ ++ ++#include "arm_neon.h" ++ ++uint32x4_t ++test_vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) ++{ ++ return vsha1cq_u32 (hash_abcd, hash_e, wk); ++} ++ ++/* { dg-final { scan-assembler-times "sha1c\\tq" 1 } } */ ++ ++uint32x4_t ++test_vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) ++{ ++ return vsha1mq_u32 (hash_abcd, hash_e, wk); ++} ++ ++/* { dg-final { scan-assembler-times "sha1m\\tq" 1 } } */ ++ ++uint32x4_t ++test_vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) ++{ ++ return vsha1pq_u32 (hash_abcd, hash_e, wk); ++} ++ ++/* { dg-final { scan-assembler-times "sha1p\\tq" 1 } } */ ++ ++uint32_t ++test_vsha1h_u32 (uint32_t hash_e) ++{ ++ return vsha1h_u32 (hash_e); ++} ++ ++/* { dg-final { scan-assembler-times "sha1h\\ts" 1 } } */ ++ ++uint32x4_t ++test_vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11) ++{ ++ return vsha1su0q_u32 (w0_3, w4_7, w8_11); ++} ++ ++/* { dg-final { scan-assembler-times "sha1su0\\tv" 1 } } */ ++ ++uint32x4_t ++test_vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15) ++{ ++ return vsha1su1q_u32 (tw0_3, w12_15); ++} ++ ++/* { dg-final { scan-assembler-times "sha1su1\\tv" 1 } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/cmp.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cmp.c +@@ -0,0 +1,61 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int ++cmp_si_test1 (int a, int b, int c) ++{ ++ if (a > b) ++ return a + c; ++ else ++ return a + b + c; ++} ++ ++int ++cmp_si_test2 (int a, int b, int c) ++{ ++ if ((a >> 3) > b) ++ return a + c; ++ else ++ return a + b + c; ++} ++ ++typedef long long s64; ++ ++s64 ++cmp_di_test1 (s64 a, s64 b, s64 c) ++{ ++ if (a > b) ++ return a + c; ++ else ++ return a + b + c; ++} ++ ++s64 ++cmp_di_test2 (s64 a, s64 b, s64 c) ++{ ++ if ((a >> 3) > b) ++ return a + c; ++ else ++ return a + b + c; ++} ++ ++int ++cmp_di_test3 (int a, s64 b, s64 c) ++{ ++ if (a > b) ++ return a + c; ++ else ++ return a + b + c; ++} ++ ++int ++cmp_di_test4 (int a, s64 b, s64 c) ++{ ++ if (((s64)a << 3) > b) ++ return a + c; ++ else ++ return a + b + c; ++} ++ ++/* { dg-final { scan-assembler-times "cmp\tw\[0-9\]+, w\[0-9\]+" 2 } } */ ++/* { dg-final { scan-assembler-times "cmp\tx\[0-9\]+, x\[0-9\]+" 4 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-f.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-f.c +@@ -2,12 +2,13 @@ + /* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-unroll-loops --save-temps -fno-inline" } */ + + #define FTYPE float ++#define ITYPE int + #define OP >= + #define INV_OP < + + #include "vect-fcm.x" + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 8 "vect" } } */ + /* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s" } } */ + /* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */ + /* { dg-final { scan-assembler "fcmlt\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/bfxil_2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/bfxil_2.c +@@ -0,0 +1,42 @@ ++/* { dg-do run { target aarch64*-*-* } } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++/* { dg-require-effective-target aarch64_big_endian } */ ++ ++extern void abort (void); ++ ++typedef struct bitfield ++{ ++ unsigned short eight1: 8; ++ unsigned short four: 4; ++ unsigned short eight2: 8; ++ unsigned short seven: 7; ++ unsigned int sixteen: 16; ++ unsigned short eight3: 8; ++ unsigned short eight4: 8; ++} bitfield; ++ ++bitfield ++bfxil (bitfield a) ++{ ++ /* { dg-final { scan-assembler "bfxil\tx\[0-9\]+, x\[0-9\]+, 40, 8" } } */ ++ a.eight4 = a.eight2; ++ return a; ++} ++ ++int ++main (void) ++{ ++ static bitfield a; ++ bitfield b; ++ ++ a.eight4 = 9; ++ a.eight2 = 57; ++ b = bfxil (a); ++ ++ if (b.eight4 != a.eight2) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fp.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fp.x +@@ -7,6 +7,16 @@ + extern float fabsf (float); + extern double fabs (double); + ++#define DEF3a(fname, type, op) \ ++ void fname##_##type (pR##type a, \ ++ pR##type b, \ ++ pR##type c) \ ++ { \ ++ int i; \ ++ for (i = 0; i < 16; i++) \ ++ a[i] = op (b[i] - c[i]); \ ++ } ++ + #define DEF3(fname, type, op) \ + void fname##_##type (pR##type a, \ + pR##type b, \ +@@ -13,7 +23,7 @@ + pR##type c) \ + { \ + int i; \ +- for (i=0; i<16; i++) \ ++ for (i = 0; i < 16; i++) \ + a[i] = b[i] op c[i]; \ + } + +@@ -22,11 +32,15 @@ + pR##type b) \ + { \ + int i; \ +- for (i=0; i<16; i++) \ ++ for (i = 0; i < 16; i++) \ + a[i] = op(b[i]); \ + } + + ++#define DEFN3a(fname, op) \ ++ DEF3a (fname, F32, op) \ ++ DEF3a (fname, F64, op) ++ + #define DEFN3(fname, op) \ + DEF3 (fname, F32, op) \ + DEF3 (fname, F64, op) +@@ -42,3 +56,5 @@ + DEFN2 (neg, -) + DEF2 (abs, F32, fabsf) + DEF2 (abs, F64, fabs) ++DEF3a (fabd, F32, fabsf) ++DEF3a (fabd, F64, fabs) +--- a/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-2.c +@@ -1,5 +1,5 @@ + /* { dg-error "missing" "" {target "aarch64*-*-*" } } */ +-/* { dg-options "-O2 -mcpu=example-1+no" } */ ++/* { dg-options "-O2 -mcpu=cortex-a53+no" } */ + + void f () + { +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c +@@ -1,43 +1,7 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ + +-int v = 0; ++#include "atomic-op-acq_rel.x" + +-int +-atomic_fetch_add_ACQ_REL (int a) +-{ +- return __atomic_fetch_add (&v, a, __ATOMIC_ACQ_REL); +-} +- +-int +-atomic_fetch_sub_ACQ_REL (int a) +-{ +- return __atomic_fetch_sub (&v, a, __ATOMIC_ACQ_REL); +-} +- +-int +-atomic_fetch_and_ACQ_REL (int a) +-{ +- return __atomic_fetch_and (&v, a, __ATOMIC_ACQ_REL); +-} +- +-int +-atomic_fetch_nand_ACQ_REL (int a) +-{ +- return __atomic_fetch_nand (&v, a, __ATOMIC_ACQ_REL); +-} +- +-int +-atomic_fetch_xor_ACQ_REL (int a) +-{ +- return __atomic_fetch_xor (&v, a, __ATOMIC_ACQ_REL); +-} +- +-int +-atomic_fetch_or_ACQ_REL (int a) +-{ +- return __atomic_fetch_or (&v, a, __ATOMIC_ACQ_REL); +-} +- + /* { dg-final { scan-assembler-times "ldaxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ + /* { dg-final { scan-assembler-times "stlxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/subs1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/subs1.c +@@ -0,0 +1,149 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++ ++int ++subs_si_test1 (int a, int b, int c) ++{ ++ int d = a - c; ++ ++ /* { dg-final { scan-assembler "subs\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++subs_si_test2 (int a, int b, int c) ++{ ++ int d = a - 0xff; ++ ++ /* { dg-final { scan-assembler "subs\tw\[0-9\]+, w\[0-9\]+, #255" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++subs_si_test3 (int a, int b, int c) ++{ ++ int d = a - (b << 3); ++ ++ /* { dg-final { scan-assembler "subs\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++typedef long long s64; ++ ++s64 ++subs_di_test1 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a - c; ++ ++ /* { dg-final { scan-assembler "subs\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++subs_di_test2 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a - 0xff; ++ ++ /* { dg-final { scan-assembler "subs\tx\[0-9\]+, x\[0-9\]+, #255" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++subs_di_test3 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a - (b << 3); ++ ++ /* { dg-final { scan-assembler "subs\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ if (d == 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int main () ++{ ++ int x; ++ s64 y; ++ ++ x = subs_si_test1 (29, 4, 5); ++ if (x != 33) ++ abort (); ++ ++ x = subs_si_test1 (5, 2, 20); ++ if (x != 7) ++ abort (); ++ ++ x = subs_si_test2 (29, 4, 5); ++ if (x != -217) ++ abort (); ++ ++ x = subs_si_test2 (1024, 2, 20); ++ if (x != 791) ++ abort (); ++ ++ x = subs_si_test3 (35, 4, 5); ++ if (x != 12) ++ abort (); ++ ++ x = subs_si_test3 (5, 2, 20); ++ if (x != 11) ++ abort (); ++ ++ y = subs_di_test1 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ ++ if (y != 0x45000002d) ++ abort (); ++ ++ y = subs_di_test1 (0x5000500050005ll, ++ 0x2111211121112ll, ++ 0x0000000002020ll); ++ if (y != 0x7111711171117) ++ abort (); ++ ++ y = subs_di_test2 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ if (y != 0x955050433) ++ abort (); ++ ++ y = subs_di_test2 (0x130002900ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ if (y != 0x955052d0a) ++ abort (); ++ ++ y = subs_di_test3 (0x130000029ll, ++ 0x064000008ll, ++ 0x505050505ll); ++ if (y != 0x3790504f6) ++ abort (); ++ ++ y = subs_di_test3 (0x130002900ll, ++ 0x088000008ll, ++ 0x505050505ll); ++ if (y != 0x27d052dcd) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/adds2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/adds2.c +@@ -0,0 +1,155 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 --save-temps -fno-inline" } */ ++ ++extern void abort (void); ++ ++int ++adds_si_test1 (int a, int b, int c) ++{ ++ int d = a + b; ++ ++ /* { dg-final { scan-assembler-not "adds\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++adds_si_test2 (int a, int b, int c) ++{ ++ int d = a + 0xfff; ++ ++ /* { dg-final { scan-assembler-not "adds\tw\[0-9\]+, w\[0-9\]+, 4095" } } */ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+, w\[0-9\]+, 4095" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int ++adds_si_test3 (int a, int b, int c) ++{ ++ int d = a + (b << 3); ++ ++ /* { dg-final { scan-assembler-not "adds\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++typedef long long s64; ++ ++s64 ++adds_di_test1 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a + b; ++ ++ /* { dg-final { scan-assembler-not "adds\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++adds_di_test2 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a + 0x1000ll; ++ ++ /* { dg-final { scan-assembler-not "adds\tx\[0-9\]+, x\[0-9\]+, 4096" } } */ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+, x\[0-9\]+, 4096" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++s64 ++adds_di_test3 (s64 a, s64 b, s64 c) ++{ ++ s64 d = a + (b << 3); ++ ++ /* { dg-final { scan-assembler-not "adds\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ ++ if (d <= 0) ++ return a + c; ++ else ++ return b + d + c; ++} ++ ++int main () ++{ ++ int x; ++ s64 y; ++ ++ x = adds_si_test1 (29, 4, 5); ++ if (x != 42) ++ abort (); ++ ++ x = adds_si_test1 (5, 2, 20); ++ if (x != 29) ++ abort (); ++ ++ x = adds_si_test2 (29, 4, 5); ++ if (x != 4133) ++ abort (); ++ ++ x = adds_si_test2 (1024, 2, 20); ++ if (x != 5141) ++ abort (); ++ ++ x = adds_si_test3 (35, 4, 5); ++ if (x != 76) ++ abort (); ++ ++ x = adds_si_test3 (5, 2, 20); ++ if (x != 43) ++ abort (); ++ ++ y = adds_di_test1 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ ++ if (y != 0xc75050536) ++ abort (); ++ ++ y = adds_di_test1 (0x5000500050005ll, ++ 0x2111211121112ll, ++ 0x0000000002020ll); ++ if (y != 0x9222922294249) ++ abort (); ++ ++ y = adds_di_test2 (0x130000029ll, ++ 0x320000004ll, ++ 0x505050505ll); ++ if (y != 0x955051532) ++ abort (); ++ ++ y = adds_di_test2 (0x540004100ll, ++ 0x320000004ll, ++ 0x805050205ll); ++ if (y != 0x1065055309) ++ abort (); ++ ++ y = adds_di_test3 (0x130000029ll, ++ 0x064000008ll, ++ 0x505050505ll); ++ if (y != 0x9b9050576) ++ abort (); ++ ++ y = adds_di_test3 (0x130002900ll, ++ 0x088000008ll, ++ 0x505050505ll); ++ if (y != 0xafd052e4d) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-d.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-d.c +@@ -2,12 +2,13 @@ + /* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-unroll-loops --save-temps -fno-inline" } */ + + #define FTYPE double ++#define ITYPE long + #define OP > + #define INV_OP <= + + #include "vect-fcm.x" + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 8 "vect" } } */ + /* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ + /* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */ + /* { dg-final { scan-assembler "fcmle\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */ +--- a/src/gcc/testsuite/lib/target-supports.exp ++++ b/src/gcc/testsuite/lib/target-supports.exp +@@ -487,13 +487,6 @@ + return 0 + } + +- # We don't yet support profiling for AArch64. +- if { [istarget aarch64*-*-*] +- && ([lindex $test_what 1] == "-p" +- || [lindex $test_what 1] == "-pg") } { +- return 0 +- } +- + # cygwin does not support -p. + if { [istarget *-*-cygwin*] && $test_what == "-p" } { + return 0 +@@ -2073,6 +2066,7 @@ + || ([istarget powerpc*-*-*] + && ![istarget powerpc-*-linux*paired*]) + || [istarget x86_64-*-*] ++ || [istarget aarch64*-*-*] + || ([istarget arm*-*-*] + && [check_effective_target_arm_neon_ok])} { + set et_vect_uintfloat_cvt_saved 1 +@@ -2139,6 +2133,15 @@ + }] + } + ++# Return 1 if this is a AArch64 target supporting little endian ++proc check_effective_target_aarch64_little_endian { } { ++ return [check_no_compiler_messages aarch64_little_endian assembly { ++ #if !defined(__aarch64__) || defined(__AARCH64EB__) ++ #error FOO ++ #endif ++ }] ++} ++ + # Return 1 is this is an arm target using 32-bit instructions + proc check_effective_target_arm32 { } { + return [check_no_compiler_messages arm32 assembly { +@@ -2208,22 +2211,6 @@ + } + } + +-# Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8 +-# -mfloat-abi=softfp +-proc check_effective_target_arm_v8_neon_ok {} { +- if { [check_effective_target_arm32] } { +- return [check_no_compiler_messages arm_v8_neon_ok object { +- int foo (void) +- { +- __asm__ volatile ("vrintn.f32 q0, q0"); +- return 0; +- } +- } "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"] +- } else { +- return 0 +- } +-} +- + # Return 1 if this is an ARM target supporting -mfpu=vfp + # -mfloat-abi=hard. Some multilibs may be incompatible with these + # options. +@@ -2263,6 +2250,49 @@ + }] + } + ++# Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8 ++# -mfloat-abi=softfp or equivalent options. Some multilibs may be ++# incompatible with these options. Also set et_arm_crypto_flags to the ++# best options to add. ++ ++proc check_effective_target_arm_crypto_ok_nocache { } { ++ global et_arm_crypto_flags ++ set et_arm_crypto_flags "" ++ if { [check_effective_target_arm32] } { ++ foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} { ++ if { [check_no_compiler_messages_nocache arm_crypto_ok object { ++ #include "arm_neon.h" ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vaeseq_u8 (a, b); ++ } ++ } "$flags"] } { ++ set et_arm_crypto_flags $flags ++ return 1 ++ } ++ } ++ } ++ ++ return 0 ++} ++ ++# Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8 ++ ++proc check_effective_target_arm_crypto_ok { } { ++ return [check_cached_effective_target arm_crypto_ok \ ++ check_effective_target_arm_crypto_ok_nocache] ++} ++ ++# Add options for crypto extensions. ++proc add_options_for_arm_crypto { flags } { ++ if { ! [check_effective_target_arm_crypto_ok] } { ++ return "$flags" ++ } ++ global et_arm_crypto_flags ++ return "$flags $et_arm_crypto_flags" ++} ++ + # Add the options needed for NEON. We need either -mfloat-abi=softfp + # or -mfloat-abi=hard, but if one is already specified by the + # multilib, use it. Similarly, if a -mfpu option already enables +@@ -2287,9 +2317,18 @@ + if { ! [check_effective_target_arm_v8_neon_ok] } { + return "$flags" + } +- return "$flags -march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=softfp" ++ global et_arm_v8_neon_flags ++ return "$flags $et_arm_v8_neon_flags -march=armv8-a" + } + ++proc add_options_for_arm_crc { flags } { ++ if { ! [check_effective_target_arm_crc_ok] } { ++ return "$flags" ++ } ++ global et_arm_crc_flags ++ return "$flags $et_arm_crc_flags" ++} ++ + # Add the options needed for NEON. We need either -mfloat-abi=softfp + # or -mfloat-abi=hard, but if one is already specified by the + # multilib, use it. Similarly, if a -mfpu option already enables +@@ -2331,6 +2370,94 @@ + check_effective_target_arm_neon_ok_nocache] + } + ++proc check_effective_target_arm_crc_ok_nocache { } { ++ global et_arm_crc_flags ++ set et_arm_crc_flags "-march=armv8-a+crc" ++ return [check_no_compiler_messages_nocache arm_crc_ok object { ++ #if !defined (__ARM_FEATURE_CRC32) ++ #error FOO ++ #endif ++ } "$et_arm_crc_flags"] ++} ++ ++proc check_effective_target_arm_crc_ok { } { ++ return [check_cached_effective_target arm_crc_ok \ ++ check_effective_target_arm_crc_ok_nocache] ++} ++ ++# Return 1 if this is an ARM target supporting -mfpu=neon-fp16 ++# -mfloat-abi=softfp or equivalent options. Some multilibs may be ++# incompatible with these options. Also set et_arm_neon_flags to the ++# best options to add. ++ ++proc check_effective_target_arm_neon_fp16_ok_nocache { } { ++ global et_arm_neon_fp16_flags ++ set et_arm_neon_fp16_flags "" ++ if { [check_effective_target_arm32] } { ++ foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16" ++ "-mfpu=neon-fp16 -mfloat-abi=softfp"} { ++ if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object { ++ #include "arm_neon.h" ++ float16x4_t ++ foo (float32x4_t arg) ++ { ++ return vcvt_f16_f32 (arg); ++ } ++ } "$flags"] } { ++ set et_arm_neon_fp16_flags $flags ++ return 1 ++ } ++ } ++ } ++ ++ return 0 ++} ++ ++proc check_effective_target_arm_neon_fp16_ok { } { ++ return [check_cached_effective_target arm_neon_fp16_ok \ ++ check_effective_target_arm_neon_fp16_ok_nocache] ++} ++ ++proc add_options_for_arm_neon_fp16 { flags } { ++ if { ! [check_effective_target_arm_neon_fp16_ok] } { ++ return "$flags" ++ } ++ global et_arm_neon_fp16_flags ++ return "$flags $et_arm_neon_fp16_flags" ++} ++ ++# Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8 ++# -mfloat-abi=softfp or equivalent options. Some multilibs may be ++# incompatible with these options. Also set et_arm_v8_neon_flags to the ++# best options to add. ++ ++proc check_effective_target_arm_v8_neon_ok_nocache { } { ++ global et_arm_v8_neon_flags ++ set et_arm_v8_neon_flags "" ++ if { [check_effective_target_arm32] } { ++ foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} { ++ if { [check_no_compiler_messages_nocache arm_v8_neon_ok object { ++ #include "arm_neon.h" ++ void ++ foo () ++ { ++ __asm__ volatile ("vrintn.f32 q0, q0"); ++ } ++ } "$flags"] } { ++ set et_arm_v8_neon_flags $flags ++ return 1 ++ } ++ } ++ } ++ ++ return 0 ++} ++ ++proc check_effective_target_arm_v8_neon_ok { } { ++ return [check_cached_effective_target arm_v8_neon_ok \ ++ check_effective_target_arm_v8_neon_ok_nocache] ++} ++ + # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4 + # -mfloat-abi=softfp or equivalent options. Some multilibs may be + # incompatible with these options. Also set et_arm_neonv2_flags to the +@@ -2393,6 +2520,11 @@ + # Must generate floating-point instructions. + return 0 + } ++ if [check_effective_target_arm_hf_eabi] { ++ # Use existing float-abi and force an fpu which supports fp16 ++ set et_arm_fp16_flags "-mfpu=vfpv4" ++ return 1; ++ } + if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] { + # The existing -mfpu value is OK; use it, but add softfp. + set et_arm_fp16_flags "-mfloat-abi=softfp" +@@ -2525,6 +2657,17 @@ + } ""] + } + ++# Return 1 if this is an ARM target where conditional execution is available. ++ ++proc check_effective_target_arm_cond_exec { } { ++ return [check_no_compiler_messages arm_cond_exec assembly { ++ #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__) ++ #error FOO ++ #endif ++ int i; ++ } ""] ++} ++ + # Return 1 if this is an ARM cortex-M profile cpu + + proc check_effective_target_arm_cortex_m { } { +@@ -2570,6 +2713,24 @@ + } [add_options_for_arm_neonv2 ""]] + } + ++# Return 1 if the target supports executing ARMv8 NEON instructions, 0 ++# otherwise. ++ ++proc check_effective_target_arm_v8_neon_hw { } { ++ return [check_runtime arm_v8_neon_hw_available { ++ #include "arm_neon.h" ++ int ++ main (void) ++ { ++ float32x2_t a; ++ asm ("vrinta.f32 %P0, %P1" ++ : "=w" (a) ++ : "0" (a)); ++ return 0; ++ } ++ } [add_options_for_arm_v8_neon ""]] ++} ++ + # Return 1 if this is a ARM target with NEON enabled. + + proc check_effective_target_arm_neon { } { +@@ -4743,6 +4904,33 @@ + return 0 + } + ++# Return 1 if programs are intended to be run on hardware rather than ++# on a simulator ++ ++proc check_effective_target_hw { } { ++ ++ # All "src/sim" simulators set this one. ++ if [board_info target exists is_simulator] { ++ if [board_info target is_simulator] { ++ return 0 ++ } else { ++ return 1 ++ } ++ } ++ ++ # The "sid" simulators don't set that one, but at least they set ++ # this one. ++ if [board_info target exists slow_simulator] { ++ if [board_info target slow_simulator] { ++ return 0 ++ } else { ++ return 1 ++ } ++ } ++ ++ return 1 ++} ++ + # Return 1 if the target is a VxWorks kernel. + + proc check_effective_target_vxworks_kernel { } { +--- a/src/gcc/testsuite/ChangeLog.linaro ++++ b/src/gcc/testsuite/ChangeLog.linaro +@@ -0,0 +1,1041 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-26 venkataramanan kumar ++ ++ Backport from trunk r205807. ++ 2013-12-09 Richard Earnshaw ++ ++ * gcc.target/arm/ldrd-strd-offset.c: New. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-08-11 Michael Collison ++ ++ Backport from trunk r206529 ++ 2014-01-10 Richard Earnshaw ++ ++ PR target/59744 ++ * gcc.target/aarch64/cmn-neg.c: Use equality comparisons. ++ * gcc.target/aarch64/cmn-neg2.c: New test. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r204784 ++ 2013-11-14 James Greenhalgh ++ ++ * gcc.target/aarch64/cpu-diagnostics-2.c: Change "-mcpu=" ++ to "cortex-a53". ++ * gcc.target/aarch64/cpu-diagnostics-3.c: Change "-mcpu=" ++ to "cortex-a53". ++ ++2014-04-07 Michael Collison ++ ++ Backport from trunk r202663 ++ 2013-09-17 Cong Hou ++ ++ * gcc.dg/vect/vect-reduc-dot-s16c.c: Add a test case with dot product ++ on two arrays with short and int types. This should not be recognized ++ as a dot product pattern. ++ ++2014-04-02 Zhenqiang Chen ++ ++ Backport from trunk r208511 ++ 2014-03-12 Christian Bruel ++ ++ PR target/60264 ++ * gcc.target/arm/pr60264.c ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206519 ++ 2014-01-10 Kyrylo Tkachov ++ ++ * lib/target-supports.exp ++ (check_effective_target_arm_crypto_ok_nocache): New. ++ (check_effective_target_arm_crypto_ok): Use above procedure. ++ (add_options_for_arm_crypto): Use et_arm_crypto_flags. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206151 ++ 2013-12-20 Kyrylo Tkachov ++ ++ * gcc.target/arm/neon-vceq_p64.c: New test. ++ * gcc.target/arm/neon-vtst_p64.c: Likewise. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206131 ++ 2013-12-04 Kyrylo Tkachov ++ ++ * lib/target-supports.exp (check_effective_target_arm_crypto_ok): ++ New procedure. ++ (add_options_for_arm_crypto): Likewise. ++ * gcc.target/arm/crypto-vaesdq_u8.c: New test. ++ * gcc.target/arm/crypto-vaeseq_u8.c: Likewise. ++ * gcc.target/arm/crypto-vaesimcq_u8.c: Likewise. ++ * gcc.target/arm/crypto-vaesmcq_u8.c: Likewise. ++ * gcc.target/arm/crypto-vldrq_p128.c: Likewise. ++ * gcc.target/arm/crypto-vmull_high_p64.c: Likewise. ++ * gcc.target/arm/crypto-vmullp64.c: Likewise. ++ * gcc.target/arm/crypto-vsha1cq_u32.c: Likewise. ++ * gcc.target/arm/crypto-vsha1h_u32.c: Likewise. ++ * gcc.target/arm/crypto-vsha1mq_u32.c: Likewise. ++ * gcc.target/arm/crypto-vsha1pq_u32.c: Likewise. ++ * gcc.target/arm/crypto-vsha1su0q_u32.c: Likewise. ++ * gcc.target/arm/crypto-vsha1su1q_u32.c: Likewise. ++ * gcc.target/arm/crypto-vsha256h2q_u32.c: Likewise. ++ * gcc.target/arm/crypto-vsha256hq_u32.c: Likewise. ++ * gcc.target/arm/crypto-vsha256su0q_u32.c: Likewise. ++ * gcc.target/arm/crypto-vsha256su1q_u32.c: Likewise. ++ * gcc.target/arm/crypto-vstrq_p128.c: Likewise. ++ * gcc.target/arm/neon/vbslQp64: Generate. ++ * gcc.target/arm/neon/vbslp64: Likewise. ++ * gcc.target/arm/neon/vcombinep64: Likewise. ++ * gcc.target/arm/neon/vcreatep64: Likewise. ++ * gcc.target/arm/neon/vdupQ_lanep64: Likewise. ++ * gcc.target/arm/neon/vdupQ_np64: Likewise. ++ * gcc.target/arm/neon/vdup_lanep64: Likewise. ++ * gcc.target/arm/neon/vdup_np64: Likewise. ++ * gcc.target/arm/neon/vextQp64: Likewise. ++ * gcc.target/arm/neon/vextp64: Likewise. ++ * gcc.target/arm/neon/vget_highp64: Likewise. ++ * gcc.target/arm/neon/vget_lowp64: Likewise. ++ * gcc.target/arm/neon/vld1Q_dupp64: Likewise. ++ * gcc.target/arm/neon/vld1Q_lanep64: Likewise. ++ * gcc.target/arm/neon/vld1Qp64: Likewise. ++ * gcc.target/arm/neon/vld1_dupp64: Likewise. ++ * gcc.target/arm/neon/vld1_lanep64: Likewise. ++ * gcc.target/arm/neon/vld1p64: Likewise. ++ * gcc.target/arm/neon/vld2_dupp64: Likewise. ++ * gcc.target/arm/neon/vld2p64: Likewise. ++ * gcc.target/arm/neon/vld3_dupp64: Likewise. ++ * gcc.target/arm/neon/vld3p64: Likewise. ++ * gcc.target/arm/neon/vld4_dupp64: Likewise. ++ * gcc.target/arm/neon/vld4p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQf32_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQf32_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_f32: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_p16: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_p8: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_s16: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_s32: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_s64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_s8: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_u16: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_u32: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_u64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp128_u8: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp16_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp16_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_f32: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_p16: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_p8: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_s16: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_s32: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_s64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_s8: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_u16: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_u32: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_u64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp64_u8: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp8_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQp8_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQs16_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQs16_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQs32_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQs32_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQs64_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQs64_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQs8_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQs8_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQu16_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQu16_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQu32_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQu32_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQu64_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQu64_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretQu8_p128: Likewise. ++ * gcc.target/arm/neon/vreinterpretQu8_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretf32_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretp16_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_f32: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_p16: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_p8: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_s16: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_s32: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_s64: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_s8: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_u16: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_u32: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_u64: Likewise. ++ * gcc.target/arm/neon/vreinterpretp64_u8: Likewise. ++ * gcc.target/arm/neon/vreinterpretp8_p64: Likewise. ++ * gcc.target/arm/neon/vreinterprets16_p64: Likewise. ++ * gcc.target/arm/neon/vreinterprets32_p64: Likewise. ++ * gcc.target/arm/neon/vreinterprets64_p64: Likewise. ++ * gcc.target/arm/neon/vreinterprets8_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretu16_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretu32_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretu64_p64: Likewise. ++ * gcc.target/arm/neon/vreinterpretu8_p64: Likewise. ++ * gcc.target/arm/neon/vsliQ_np64: Likewise. ++ * gcc.target/arm/neon/vsli_np64: Likewise. ++ * gcc.target/arm/neon/vsriQ_np64: Likewise. ++ * gcc.target/arm/neon/vsri_np64: Likewise. ++ * gcc.target/arm/neon/vst1Q_lanep64: Likewise. ++ * gcc.target/arm/neon/vst1Qp64: Likewise. ++ * gcc.target/arm/neon/vst1_lanep64: Likewise. ++ * gcc.target/arm/neon/vst1p64: Likewise. ++ * gcc.target/arm/neon/vst2p64: Likewise. ++ * gcc.target/arm/neon/vst3p64: Likewise. ++ * gcc.target/arm/neon/vst4p64: Likewise. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206128 ++ 2013-12-19 Kyrylo Tkachov ++ ++ * lib/target-supports.exp (add_options_for_arm_crc): New procedure. ++ (check_effective_target_arm_crc_ok_nocache): Likewise. ++ (check_effective_target_arm_crc_ok): Likewise. ++ * gcc.target/arm/acle/: New directory. ++ * gcc.target/arm/acle/acle.exp: New. ++ * gcc.target/arm/acle/crc32b.c: New test. ++ * gcc.target/arm/acle/crc32h.c: Likewise. ++ * gcc.target/arm/acle/crc32w.c: Likewise. ++ * gcc.target/arm/acle/crc32d.c: Likewise. ++ * gcc.target/arm/acle/crc32cb.c: Likewise. ++ * gcc.target/arm/acle/crc32ch.c: Likewise. ++ * gcc.target/arm/acle/crc32cw.c: Likewise. ++ * gcc.target/arm/acle/crc32cd.c: Likewise. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206120 ++ 2013-12-19 Tejas Belagod ++ ++ * gcc.target/aarch64/pmull_1.c: New. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206119 ++ 2013-12-19 Tejas Belagod ++ ++ * gcc.target/aarch64/sha256_1.c: New. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206118 ++ 2013-12-19 Tejas Belagod ++ ++ * gcc.target/aarch64/sha1_1.c: New. ++ ++2014-02-10 Michael Collison ++ ++ Backport from trunk r206117 ++ 2013-12-19 Tejas Belagod ++ ++ * gcc.target/aarch64/aes_1.c: New. ++ ++2014-02-01 Christophe Lyon ++ ++ Backport from trunk r203057. ++ 2013-10-01 Kyrylo Tkachov ++ ++ PR tree-optimization/58556 ++ * gcc.dg/tree-ssa/gen-vect-26.c: Use dynamic vector cost model. ++ * gcc.dg/tree-ssa/gen-vect-28.c: Likewise. ++ ++2014-01-21 Zhenqiang Chen ++ ++ Backport from trunk r205509 and r200103 ++ 2013-11-29 Zhenqiang Chen ++ ++ * gcc.target/arm/lp1243022.c: Skip target arm-neon. ++ ++ Backport mainline r200103 ++ 2013-06-15 Jeff Law ++ ++ * gcc.dg/tree-ssa/coalesce-1.c: New test. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-12-06 Michael Collison ++ ++ Backport from trunk r202872. ++ 2013-09-24 Kyrylo Tkachov ++ ++ * lib/target-supports.exp (check_effective_target_arm_cond_exec): ++ New Procedure ++ * gcc.target/arm/minmax_minus.c: Check for cond_exec target. ++ ++2013-12-06 Christophe Lyon ++ ++ Backport from trunk r203327. ++ 2013-10-09 Zhenqiang Chen ++ ++ * gcc.dg/tree-ssa/phi-opt-11.c: New test. ++ ++2013-12-06 Charles Baylis ++ ++ Backport from trunk r203799. ++ 2013-10-17 Charles Bayis ++ ++ * gcc.dg/builtin-apply2.c: Skip test on arm hardfloat ABI ++ targets. ++ * gcc.dg/tls/pr42894.c: Remove dg-options for arm*-*-* targets. ++ * gcc.target/arm/thumb-ltu.c: Remove dg-skip-if and require ++ effective target arm_thumb1_ok. ++ * lib/target-supports.exp ++ (check_effective_target_arm_fp16_ok_nocache): Don't force ++ -mfloat-abi=soft when building for hardfloat target. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-11-06 Christophe Lyon ++ ++ Revert backport from trunk r197526. ++ 2013-04-05 Greta Yorsh ++ ++ * gcc.target/arm/negdi-1.c: New test. ++ * gcc.target/arm/negdi-2.c: Likewise. ++ * gcc.target/arm/negdi-3.c: Likewise. ++ * gcc.target/arm/negdi-4.c: Likewise. ++ ++2013-11-05 Zhenqiang Chen ++ ++ Backport from trunk r204247. ++ 2013-10-31 Zhenqiang Chen ++ ++ * gcc.target/arm/lp1243022.c: New test. ++ ++2013-11-04 Kugan Vivekanandarajah ++ ++ Backport from trunk r204336 ++ 2013-11-03 Kugan Vivekanandarajah ++ ++ * gcc.target/arm/neon-vcond-gt.c: Scan for vbsl or vbit or vbif. ++ * gcc.target/arm/neon-vcond-ltgt.c: Scan for vbsl or vbit or vbif. ++ * gcc.target/arm/neon-vcond-unordered.c: Scan for vbsl or vbit or ++ vbif. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-10-09 Christophe Lyon ++ ++ Backport from trunk r198526,200595,200597. ++ 2013-05-02 Ian Bolton ++ ++ * gcc.target/aarch64/bics_1.c: New test. ++ * gcc.target/aarch64/bics_2.c: Likewise. ++ ++ 2013-07-02 Ian Bolton ++ ++ * gcc.target/aarch64/bfxil_1.c: New test. ++ * gcc.target/aarch64/bfxil_2.c: Likewise. ++ ++ 2013-07-02 Ian Bolton ++ ++ * gcc.target/config/aarch64/insv_1.c: Update to show it doesn't work ++ on big endian. ++ * gcc.target/config/aarch64/insv_2.c: New test for big endian. ++ * lib/target-supports.exp: Define aarch64_little_endian. ++ ++2013-10-03 Christophe Lyon ++ ++ Backport from trunk r202400. ++ 2013-09-09 Kyrylo Tkachov ++ ++ * gcc.target/aarch64/cmn-neg.c: New test. ++ ++2013-10-03 Christophe Lyon ++ ++ Backport from trunk r202164. ++ 2013-09-02 Bin Cheng ++ ++ * gcc.target/arm/ivopts-orig_biv-inc.c: New testcase. ++ ++2013-10-01 Kugan Vivekanandarajah ++ ++ Backport from trunk r203059,203116. ++ 2013-10-01 Kugan Vivekanandarajah ++ ++ PR Target/58578 ++ * gcc.target/arm/pr58578.c: New test. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-09-06 Venkataramanan Kumar ++ ++ Backport from trunk r201411. ++ 2013-08-01 Kyrylo Tkachov ++ ++ * gcc.target/arm/pr46972-2.c: New test. ++ ++2013-09-05 Yvan Roux ++ ++ Backport from trunk r201267. ++ 2013-07-26 Kyrylo Tkachov ++ ++ * gcc.target/arm/minmax_minus.c: Scan for absence of mov. ++ ++2013-09-05 Christophe Lyon ++ ++ Backport from trunk r199527,199814,201435. ++ 2013-05-31 Kyrylo Tkachov ++ ++ PR target/56315 ++ * gcc.target/arm/iordi3-opt.c: New test. ++ ++ 2013-06-07 Kyrylo Tkachov ++ ++ PR target/56315 ++ * gcc.target/arm/xordi3-opt.c: New test. ++ ++ 2013-08-02 Kyrylo Tkachov ++ ++ * gcc.target/arm/neon-for-64bits-2.c: Delete. ++ ++2013-09-05 Christophe Lyon ++ ++ Backport from trunk r201730,201731. ++ ++ 2013-08-14 Janis Johnson ++ ++ * gcc.target/arm/atomic-comp-swap-release-acquire.c: Move dg-do ++ to be the first test directive. ++ * gcc.target/arm/atomic-op-acq_rel.c: Likewise. ++ * gcc.target/arm/atomic-op-acquire.c: Likewise. ++ * gcc.target/arm/atomic-op-char.c: Likewise. ++ * gcc.target/arm/atomic-op-consume.c: Likewise. ++ * gcc.target/arm/atomic-op-int.c: Likewise. ++ * gcc.target/arm/atomic-op-relaxed.c: Likewise. ++ * gcc.target/arm/atomic-op-release.c: Likewise. ++ * gcc.target/arm/atomic-op-seq_cst.c: Likewise. ++ * gcc.target/arm/atomic-op-short.c: Likewise. ++ ++ 2013-08-14 Janis Johnson ++ ++ * gcc.target/arm/pr19599.c: Skip for -mthumb. ++ ++2013-09-03 Venkataramanan Kumar ++ ++ Backport from trunk r201624. ++ 2013-08-09 James Greenhalgh ++ ++ * gcc.target/aarch64/scalar_intrinsics.c: Update expected ++ output of vdup intrinsics ++ ++2013-08-26 Kugan Vivekanandarajah ++ ++ Backport from trunk r201636. ++ 2013-08-09 Yufeng Zhang ++ ++ * gcc.dg/lower-subreg-1.c: Skip aarch64*-*-*. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-08-07 Christophe Lyon ++ ++ Backport from trunk r199720 ++ 2013-06-06 Marcus Shawcroft ++ ++ * gcc.dg/vect/no-section-anchors-vect-68.c: ++ Add dg-skip-if aarch64_tiny. ++ ++2013-08-07 Christophe Lyon ++ ++ Backport from trunk r201237. ++ 2013-07-25 Terry Guo ++ ++ * gcc.target/arm/thumb1-Os-mult.c: New test case. ++ ++2013-08-06 Christophe Lyon ++ ++ Backport from trunk r200596,201067,201083. ++ 2013-07-02 Ian Bolton ++ ++ * gcc.target/aarch64/abs_1.c: New test. ++ ++ 2013-07-19 Ian Bolton ++ ++ * gcc.target/aarch64/scalar_intrinsics.c (test_vabs_s64): Added ++ new testcase. ++ ++ 2013-07-20 James Greenhalgh ++ ++ * gcc.target/aarch64/vabs_intrinsic_1.c: New file. ++ ++2013-08-06 Christophe Lyon ++ ++ Backport from trunk r198864. ++ 2013-05-07 Ian Bolton ++ ++ * gcc.target/aarch64/ands_1.c: New test. ++ * gcc.target/aarch64/ands_2.c: Likewise ++ ++2013-08-06 Christophe Lyon ++ ++ Backport from trunk r199439,199533,201326. ++ ++ 2013-05-30 Zhenqiang Chen ++ ++ * gcc.dg/shrink-wrap-alloca.c: New added. ++ * gcc.dg/shrink-wrap-pretend.c: New added. ++ * gcc.dg/shrink-wrap-sibcall.c: New added. ++ ++ 2013-05-31 Rainer Orth ++ ++ * gcc.dg/shrink-wrap-alloca.c: Use __builtin_alloca. ++ ++ 2013-07-30 Zhenqiang Chen ++ ++ * gcc.target/arm/pr57637.c: New testcase. ++ ++2013-08-06 Christophe Lyon ++ ++ Backport from trunk r198928,198973,199203,201240,201241. ++ 2013-05-15 Ramana Radhakrishnan ++ ++ PR target/19599 ++ * gcc.target/arm/pr40887.c: Adjust testcase. ++ * gcc.target/arm/pr19599.c: New test. ++ ++2013-08-05 Yvan Roux ++ ++ Backport from trunk r200922. ++ 2013-07-12 Tejas Belagod ++ ++ * gcc.target/aarch64/vect-movi.c: New. ++ ++2013-08-05 Yvan Roux ++ ++ Backport from trunk r200720. ++ 2013-07-05 Marcus Shawcroft ++ ++ * gcc.dg/pr57518.c: Adjust scan-rtl-dump-not pattern. ++ ++2013-07-21 Yvan Roux ++ ++ Backport from trunk r200204. ++ 2013-06-19 Yufeng Zhang ++ ++ * gcc.dg/torture/stackalign/builtin-apply-2.c: set ++ STACK_ARGUMENTS_SIZE with 0 if __aarch64__ is defined. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-07-03 Christophe Lyon ++ ++ Revert backport from trunk r198928. ++ 2013-05-15 Ramana Radhakrishnan ++ ++ PR target/19599 ++ * gcc.target/arm/pr40887.c: Adjust testcase. ++ * gcc.target/arm/pr19599.c: New test. ++ ++2013-07-03 Christophe Lyon ++ ++ Revert backport from trunk 199439, 199533 ++ 2013-05-31 Rainer Orth ++ ++ * gcc.dg/shrink-wrap-alloca.c: Use __builtin_alloca. ++ ++ 2013-05-30 Zhenqiang Chen ++ ++ * gcc.dg/shrink-wrap-alloca.c: New added. ++ * gcc.dg/shrink-wrap-pretend.c: New added. ++ * gcc.dg/shrink-wrap-sibcall.c: New added. ++ ++2013-07-02 Rob Savoye ++ ++ Backport from trunk 200096 ++ ++ 2013-06-14 Vidya Praveen ++ ++ * gcc.target/aarch64/vect_smlal_1.c: New file. ++ ++2013-07-02 Rob Savoye ++ ++ Backport from trunk 200019 ++ 2013-06-12 Ramana Radhakrishnan ++ ++ * gcc.target/arm/unaligned-memcpy-4.c (src, dst): Initialize ++ to ensure alignment. ++ * gcc.target/arm/unaligned-memcpy-3.c (src): Likewise. ++ ++2013-06-20 Rob Savoye ++ ++ Backport from trunk 200152 ++ 2013-06-17 Sofiane Naci ++ ++ * gcc.target/aarch64/scalar_intrinsics.c: Update. ++ ++2013-06-20 Rob Savoye ++ ++ Backport from trunk 200148 ++ 2013-06-17 Kyrylo Tkachov ++ ++ * gcc.target/arm/unaligned-memcpy-2.c (dest): Initialize to ++ ensure alignment. ++ ++2013-06-20 Rob Savoye ++ ++ Backport from trunk 199533 ++ 2013-05-31 Rainer Orth ++ ++ * gcc.dg/shrink-wrap-alloca.c: Use __builtin_alloca. ++ ++2013-06-20 Christophe Lyon ++ ++ Backport from trunk r198683. ++ 2013-05-07 Christophe Lyon ++ ++ * lib/target-supports.exp (check_effective_target_hw): New ++ function. ++ * c-c++-common/asan/clone-test-1.c: Call ++ check_effective_target_hw. ++ * c-c++-common/asan/rlimit-mmap-test-1.c: Likewise. ++ * c-c++-common/asan/heap-overflow-1.c: Update regexps to accept ++ possible decorations. ++ * c-c++-common/asan/null-deref-1.c: Likewise. ++ * c-c++-common/asan/stack-overflow-1.c: Likewise. ++ * c-c++-common/asan/strncpy-overflow-1.c: Likewise. ++ * c-c++-common/asan/use-after-free-1.c: Likewise. ++ * g++.dg/asan/deep-thread-stack-1.C: Likewise. ++ * g++.dg/asan/large-func-test-1.C: Likewise. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-06-06 Zhenqiang Chen ++ ++ Backport from mainline r199439. ++ 2013-05-30 Zhenqiang Chen ++ ++ * gcc.dg/shrink-wrap-alloca.c: New added. ++ * gcc.dg/shrink-wrap-pretend.c: New added. ++ * gcc.dg/shrink-wrap-sibcall.c: New added. ++ ++2013-06-05 Christophe Lyon ++ ++ Backport from trunk r199658. ++ 2013-06-04 Ian Bolton ++ ++ * gcc.target/aarch64/movi_1.c: New test. ++ ++2013-06-04 Christophe Lyon ++ ++ Backport from trunk r199261. ++ 2013-05-23 Christian Bruel ++ ++ PR debug/57351 ++ * gcc.dg/debug/pr57351.c: New test ++ ++2013-06-03 Christophe Lyon ++ Backport from trunk r198890,199254,199294,199454. ++ ++ 2013-05-30 Ian Bolton ++ ++ * gcc.target/aarch64/insv_1.c: New test. ++ ++ 2013-05-24 Ian Bolton ++ ++ * gcc.target/aarch64/scalar_intrinsics.c ++ (force_simd): Use a valid instruction. ++ (test_vdupd_lane_s64): Pass a valid lane argument. ++ (test_vdupd_lane_u64): Likewise. ++ ++ 2013-05-23 Vidya Praveen ++ ++ * gcc.target/aarch64/vect-clz.c: New file. ++ ++ 2013-05-14 James Greenhalgh ++ ++ * gcc.target/aarch64/vect-fcm.x: Add cases testing ++ FLOAT cmp FLOAT ? INT : INT. ++ * gcc.target/aarch64/vect-fcm-eq-d.c: Define IMODE. ++ * gcc.target/aarch64/vect-fcm-eq-f.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-ge-d.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-ge-f.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-gt-d.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-gt-f.c: Likewise. ++ ++2013-05-29 Christophe Lyon ++ ++ Backport from trunk r198928. ++ 2013-05-15 Ramana Radhakrishnan ++ ++ PR target/19599 ++ * gcc.target/arm/pr40887.c: Adjust testcase. ++ * gcc.target/arm/pr19599.c: New test. ++ ++2013-05-28 Christophe Lyon ++ ++ Backport from trunk r198680. ++ 2013-05-07 Sofiane Naci ++ ++ * gcc.target/aarch64/scalar_intrinsics.c: Update. ++ ++2013-05-28 Christophe Lyon ++ ++ Backport from trunk r198499-198500. ++ 2013-05-01 James Greenhalgh ++ * gcc.target/aarch64/vect-vaddv.c: New. ++ ++ 2013-05-01 James Greenhalgh ++ ++ * gcc.target/aarch64/vect-vmaxv.c: New. ++ * gcc.target/aarch64/vect-vfmaxv.c: Likewise. ++ ++2013-05-23 Christophe Lyon ++ ++ Backport from trunk r198970. ++ 2013-05-16 Greta Yorsh ++ ++ * gcc.target/arm/unaligned-memcpy-2.c: Adjust expected output. ++ * gcc.target/arm/unaligned-memcpy-3.c: Likewise. ++ * gcc.target/arm/unaligned-memcpy-4.c: Likewise. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ Backport from trunk r198574-198575. ++ 2013-05-03 Vidya Praveen ++ ++ * gcc.target/aarch64/fabd.c: New file. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ Backport from trunk r198490-198496. ++ 2013-05-01 James Greenhalgh ++ ++ * gcc.target/aarch64/scalar-vca.c: New. ++ * gcc.target/aarch64/vect-vca.c: Likewise. ++ ++ 2013-05-01 James Greenhalgh ++ ++ * gcc.target/aarch64/scalar_intrinsics.c (force_simd): New. ++ (test_vceqd_s64): Force arguments to SIMD registers. ++ (test_vceqzd_s64): Likewise. ++ (test_vcged_s64): Likewise. ++ (test_vcled_s64): Likewise. ++ (test_vcgezd_s64): Likewise. ++ (test_vcged_u64): Likewise. ++ (test_vcgtd_s64): Likewise. ++ (test_vcltd_s64): Likewise. ++ (test_vcgtzd_s64): Likewise. ++ (test_vcgtd_u64): Likewise. ++ (test_vclezd_s64): Likewise. ++ (test_vcltzd_s64): Likewise. ++ (test_vtst_s64): Likewise. ++ (test_vtst_u64): Likewise. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ Backport from trunk r198191. ++ 2013-04-23 Sofiane Naci ++ ++ * gcc.target/aarch64/scalar-mov.c: New testcase. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ Backport from trunk r197838. ++ 2013-04-11 Naveen H.S ++ ++ * gcc.target/aarch64/negs.c: New. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198019. ++ 2013-04-16 Naveen H.S ++ ++ * gcc.target/aarch64/adds1.c: New. ++ * gcc.target/aarch64/adds2.c: New. ++ * gcc.target/aarch64/subs1.c: New. ++ * gcc.target/aarch64/subs2.c: New. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198394,198396-198400,198402-198404,198406. ++ 2013-04-29 James Greenhalgh ++ ++ * lib/target-supports.exp (vect_uintfloat_cvt): Enable for AArch64. ++ ++ 2013-04-29 James Greenhalgh ++ ++ * gcc.target/aarch64/vect-vcvt.c: New. ++ ++ 2013-04-29 James Greenhalgh ++ ++ * gcc.target/aarch64/vect-vrnd.c: New. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198302-198306,198316. ++ 2013-04-25 James Greenhalgh ++ Tejas Belagod ++ ++ * gcc.target/aarch64/vaddv-intrinsic.c: New. ++ * gcc.target/aarch64/vaddv-intrinsic-compile.c: Likewise. ++ * gcc.target/aarch64/vaddv-intrinsic.x: Likewise. ++ ++ 2013-04-25 Naveen H.S ++ ++ * gcc.target/aarch64/cmp.c: New. ++ ++ 2013-04-25 Naveen H.S ++ ++ * gcc.target/aarch64/ngc.c: New. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198298. ++ 2013-04-25 Kyrylo Tkachov ++ ++ * lib/target-supports.exp ++ (check_effective_target_arm_neon_fp16_ok_nocache): New procedure. ++ (check_effective_target_arm_neon_fp16_ok): Likewise. ++ (add_options_for_arm_neon_fp16): Likewise. ++ * gcc.target/arm/neon/vcvtf16_f32.c: New test. Generated. ++ * gcc.target/arm/neon/vcvtf32_f16.c: Likewise. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198136-198137,198142,198176 ++ 2013-04-22 James Greenhalgh ++ ++ * gcc.target/aarch64/vrecps.c: New. ++ * gcc.target/aarch64/vrecpx.c: Likewise. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r198020. ++ 2013-04-16 Naveen H.S ++ ++ * gcc.target/aarch64/adds3.c: New. ++ * gcc.target/aarch64/subs3.c: New. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197965. ++ 2013-04-15 Kyrylo Tkachov ++ ++ * gcc.target/arm/anddi3-opt.c: New test. ++ * gcc.target/arm/anddi3-opt2.c: Likewise. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197642. ++ 2013-04-09 Kyrylo Tkachov ++ ++ * gcc.target/arm/minmax_minus.c: New test. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197530,197921. ++ 2013-04-05 Greta Yorsh ++ ++ * gcc.target/arm/peep-ldrd-1.c: New test. ++ * gcc.target/arm/peep-strd-1.c: Likewise. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197523. ++ 2013-04-05 Kyrylo Tkachov ++ ++ * lib/target-supports.exp (add_options_for_arm_v8_neon): ++ Add -march=armv8-a when we use v8 NEON. ++ (check_effective_target_vect_call_btruncf): Remove arm-*-*-*. ++ (check_effective_target_vect_call_ceilf): Likewise. ++ (check_effective_target_vect_call_floorf): Likewise. ++ (check_effective_target_vect_call_roundf): Likewise. ++ (check_vect_support_and_set_flags): Remove check for arm_v8_neon. ++ * gcc.target/arm/vect-rounding-btruncf.c: New testcase. ++ * gcc.target/arm/vect-rounding-ceilf.c: Likewise. ++ * gcc.target/arm/vect-rounding-floorf.c: Likewise. ++ * gcc.target/arm/vect-rounding-roundf.c: Likewise. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197518-197522,197516-197528. ++ 2013-04-05 Greta Yorsh ++ ++ * gcc.target/arm/negdi-1.c: New test. ++ * gcc.target/arm/negdi-2.c: Likewise. ++ * gcc.target/arm/negdi-3.c: Likewise. ++ * gcc.target/arm/negdi-4.c: Likewise. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r197489-197491. ++ 2013-04-04 Kyrylo Tkachov ++ ++ * lib/target-supports.exp (check_effective_target_arm_v8_neon_hw): ++ New procedure. ++ (check_effective_target_arm_v8_neon_ok_nocache): ++ Likewise. ++ (check_effective_target_arm_v8_neon_ok): Change to use ++ check_effective_target_arm_v8_neon_ok_nocache. ++ (add_options_for_arm_v8_neon): Use et_arm_v8_neon_flags to set ARMv8 ++ NEON flags. ++ (check_effective_target_vect_call_btruncf): ++ Enable for arm and ARMv8 NEON. ++ (check_effective_target_vect_call_ceilf): Likewise. ++ (check_effective_target_vect_call_floorf): Likewise. ++ (check_effective_target_vect_call_roundf): Likewise. ++ (check_vect_support_and_set_flags): Handle ARMv8 NEON effective ++ target. ++ ++2013-05-02 Matthew Gretton-Dann ++ ++ Backport from trunk r196795-196797,196957. ++ 2013-03-19 Ian Bolton ++ ++ * gcc.target/aarch64/sbc.c: New test. ++ ++ 2013-03-19 Ian Bolton ++ ++ * gcc.target/aarch64/ror.c: New test. ++ ++ 2013-03-19 Ian Bolton ++ ++ * gcc.target/aarch64/extr.c: New test. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r197052. ++ 2013-03-25 Kyrylo Tkachov ++ ++ * gcc.target/arm/vseleqdf.c: New test. ++ * gcc.target/arm/vseleqsf.c: Likewise. ++ * gcc.target/arm/vselgedf.c: Likewise. ++ * gcc.target/arm/vselgesf.c: Likewise. ++ * gcc.target/arm/vselgtdf.c: Likewise. ++ * gcc.target/arm/vselgtsf.c: Likewise. ++ * gcc.target/arm/vselledf.c: Likewise. ++ * gcc.target/arm/vsellesf.c: Likewise. ++ * gcc.target/arm/vselltdf.c: Likewise. ++ * gcc.target/arm/vselltsf.c: Likewise. ++ * gcc.target/arm/vselnedf.c: Likewise. ++ * gcc.target/arm/vselnesf.c: Likewise. ++ * gcc.target/arm/vselvcdf.c: Likewise. ++ * gcc.target/arm/vselvcsf.c: Likewise. ++ * gcc.target/arm/vselvsdf.c: Likewise. ++ * gcc.target/arm/vselvssf.c: Likewise. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r197051. ++ 2013-03-25 Kyrylo Tkachov ++ ++ * gcc.target/aarch64/atomic-comp-swap-release-acquire.c: Move test ++ body from here... ++ * gcc.target/aarch64/atomic-comp-swap-release-acquire.x: ... to here. ++ * gcc.target/aarch64/atomic-op-acq_rel.c: Move test body from here... ++ * gcc.target/aarch64/atomic-op-acq_rel.x: ... to here. ++ * gcc.target/aarch64/atomic-op-acquire.c: Move test body from here... ++ * gcc.target/aarch64/atomic-op-acquire.x: ... to here. ++ * gcc.target/aarch64/atomic-op-char.c: Move test body from here... ++ * gcc.target/aarch64/atomic-op-char.x: ... to here. ++ * gcc.target/aarch64/atomic-op-consume.c: Move test body from here... ++ * gcc.target/aarch64/atomic-op-consume.x: ... to here. ++ * gcc.target/aarch64/atomic-op-int.c: Move test body from here... ++ * gcc.target/aarch64/atomic-op-int.x: ... to here. ++ * gcc.target/aarch64/atomic-op-relaxed.c: Move test body from here... ++ * gcc.target/aarch64/atomic-op-relaxed.x: ... to here. ++ * gcc.target/aarch64/atomic-op-release.c: Move test body from here... ++ * gcc.target/aarch64/atomic-op-release.x: ... to here. ++ * gcc.target/aarch64/atomic-op-seq_cst.c: Move test body from here... ++ * gcc.target/aarch64/atomic-op-seq_cst.x: ... to here. ++ * gcc.target/aarch64/atomic-op-short.c: Move test body from here... ++ * gcc.target/aarch64/atomic-op-short.x: ... to here. ++ * gcc.target/arm/atomic-comp-swap-release-acquire.c: New test. ++ * gcc.target/arm/atomic-op-acq_rel.c: Likewise. ++ * gcc.target/arm/atomic-op-acquire.c: Likewise. ++ * gcc.target/arm/atomic-op-char.c: Likewise. ++ * gcc.target/arm/atomic-op-consume.c: Likewise. ++ * gcc.target/arm/atomic-op-int.c: Likewise. ++ * gcc.target/arm/atomic-op-relaxed.c: Likewise. ++ * gcc.target/arm/atomic-op-release.c: Likewise. ++ * gcc.target/arm/atomic-op-seq_cst.c: Likewise. ++ * gcc.target/arm/atomic-op-short.c: Likewise. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r196876. ++ 2013-03-21 Christophe Lyon ++ ++ * gcc.target/arm/neon-for-64bits-1.c: New tests. ++ * gcc.target/arm/neon-for-64bits-2.c: Likewise. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Backport from trunk r196858. ++ 2013-03-21 Naveen H.S ++ ++ * gcc.target/aarch64/vect.c: Test and result vector added ++ for sabd and saba instructions. ++ * gcc.target/aarch64/vect-compile.c: Check for sabd and saba ++ instructions in assembly. ++ * gcc.target/aarch64/vect.x: Add sabd and saba test functions. ++ * gcc.target/aarch64/vect-fp.c: Test and result vector added ++ for fabd instruction. ++ * gcc.target/aarch64/vect-fp-compile.c: Check for fabd ++ instruction in assembly. ++ * gcc.target/aarch64/vect-fp.x: Add fabd test function. +--- a/src/gcc/testsuite/gcc.dg/shrink-wrap-alloca.c ++++ b/src/gcc/testsuite/gcc.dg/shrink-wrap-alloca.c +@@ -0,0 +1,11 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -g" } */ ++ ++int *p; ++ ++void ++test (int a) ++{ ++ if (a > 0) ++ p = __builtin_alloca (4); ++} +--- a/src/gcc/testsuite/gcc.dg/shrink-wrap-pretend.c ++++ b/src/gcc/testsuite/gcc.dg/shrink-wrap-pretend.c +@@ -0,0 +1,36 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -g" } */ ++ ++#include ++#include ++#include ++ ++#define DEBUG_BUFFER_SIZE 80 ++int unifi_debug = 5; ++ ++void ++unifi_trace (void* ospriv, int level, const char *fmt, ...) ++{ ++ static char s[DEBUG_BUFFER_SIZE]; ++ va_list args; ++ unsigned int len; ++ ++ if (!ospriv) ++ return; ++ ++ if (unifi_debug >= level) ++ { ++ va_start (args, fmt); ++ len = vsnprintf (&(s)[0], (DEBUG_BUFFER_SIZE), fmt, args); ++ va_end (args); ++ ++ if (len >= DEBUG_BUFFER_SIZE) ++ { ++ (s)[DEBUG_BUFFER_SIZE - 2] = '\n'; ++ (s)[DEBUG_BUFFER_SIZE - 1] = 0; ++ } ++ ++ printf ("%s", s); ++ } ++} ++ +--- a/src/gcc/testsuite/gcc.dg/debug/pr57351.c ++++ b/src/gcc/testsuite/gcc.dg/debug/pr57351.c +@@ -0,0 +1,54 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon } */ ++/* { dg-options "-std=c99 -Os -g -march=armv7-a" } */ ++/* { dg-add-options arm_neon } */ ++ ++typedef unsigned int size_t; ++typedef int ptrdiff_t; ++typedef signed char int8_t ; ++typedef signed long long int64_t; ++typedef int8_t GFC_INTEGER_1; ++typedef GFC_INTEGER_1 GFC_LOGICAL_1; ++typedef int64_t GFC_INTEGER_8; ++typedef GFC_INTEGER_8 GFC_LOGICAL_8; ++typedef ptrdiff_t index_type; ++typedef struct descriptor_dimension ++{ ++ index_type lower_bound; ++ index_type _ubound; ++} ++descriptor_dimension; ++typedef struct { GFC_LOGICAL_1 *base_addr; size_t offset; index_type dtype; descriptor_dimension dim[7];} gfc_array_l1; ++typedef struct { GFC_LOGICAL_8 *base_addr; size_t offset; index_type dtype; descriptor_dimension dim[7];} gfc_array_l8; ++void ++all_l8 (gfc_array_l8 * const restrict retarray, ++ gfc_array_l1 * const restrict array, ++ const index_type * const restrict pdim) ++{ ++ GFC_LOGICAL_8 * restrict dest; ++ index_type n; ++ index_type len; ++ index_type delta; ++ index_type dim; ++ dim = (*pdim) - 1; ++ len = ((array)->dim[dim]._ubound + 1 - (array)->dim[dim].lower_bound); ++ for (n = 0; n < dim; n++) ++ { ++ const GFC_LOGICAL_1 * restrict src; ++ GFC_LOGICAL_8 result; ++ { ++ result = 1; ++ { ++ for (n = 0; n < len; n++, src += delta) ++ { ++ if (! *src) ++ { ++ result = 0; ++ break; ++ } ++ } ++ *dest = result; ++ } ++ } ++ } ++} +--- a/src/gcc/testsuite/gcc.dg/lower-subreg-1.c ++++ b/src/gcc/testsuite/gcc.dg/lower-subreg-1.c +@@ -1,4 +1,4 @@ +-/* { dg-do compile { target { ! { mips64 || { arm*-*-* ia64-*-* sparc*-*-* spu-*-* tilegx-*-* } } } } } */ ++/* { dg-do compile { target { ! { mips64 || { aarch64*-*-* arm*-*-* ia64-*-* sparc*-*-* spu-*-* tilegx-*-* } } } } } */ + /* { dg-options "-O -fdump-rtl-subreg1" } */ + /* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && x32 } { "*" } { "" } } */ + /* { dg-require-effective-target ilp32 } */ +--- a/src/gcc/testsuite/gcc.dg/shrink-wrap-sibcall.c ++++ b/src/gcc/testsuite/gcc.dg/shrink-wrap-sibcall.c +@@ -0,0 +1,26 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -g" } */ ++ ++unsigned char a, b, d, f, g; ++ ++int test (void); ++ ++int ++baz (int c) ++{ ++ if (c == 0) return test (); ++ if (b & 1) ++ { ++ g = 0; ++ int e = (a & 0x0f) - (g & 0x0f); ++ ++ if (!a) b |= 0x80; ++ a = e + test (); ++ f = g/5 + a*3879 + b *2985; ++ } ++ else ++ { ++ f = g + a*39879 + b *25; ++ } ++ return test (); ++} +--- a/src/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c ++++ b/src/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c +@@ -16,7 +16,7 @@ + E, F and G are passed on stack. So the size of the stack argument + data is 20. */ + #define STACK_ARGUMENTS_SIZE 20 +-#elif defined __MMIX__ ++#elif defined __aarch64__ || defined __MMIX__ + /* No parameters on stack for bar. */ + #define STACK_ARGUMENTS_SIZE 0 + #else +--- a/src/gcc/testsuite/gcc.dg/tree-ssa/coalesce-1.c ++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/coalesce-1.c +@@ -0,0 +1,195 @@ ++/* { dg-do compile } */ ++ ++/* { dg-options "-O2 -fdump-rtl-expand-details" } */ ++ ++typedef long unsigned int size_t; ++union tree_node; ++typedef union tree_node *tree; ++union gimple_statement_d; ++typedef union gimple_statement_d *gimple; ++typedef const union tree_node *const_tree; ++typedef const union gimple_statement_d *const_gimple; ++struct gimple_seq_d; ++typedef struct gimple_seq_d *gimple_seq; ++struct edge_def; ++typedef struct edge_def *edge; ++struct basic_block_def; ++typedef struct basic_block_def *basic_block; ++typedef const struct basic_block_def *const_basic_block; ++struct tree_exp ++{ ++ tree operands[1]; ++}; ++typedef struct ssa_use_operand_d ++{ ++ tree *use; ++} ssa_use_operand_t; ++struct phi_arg_d ++{ ++ struct ssa_use_operand_d imm_use; ++}; ++union tree_node ++{ ++ struct tree_exp exp; ++}; ++struct function ++{ ++}; ++extern struct function *cfun; ++struct edge_def ++{ ++ unsigned int dest_idx; ++}; ++static __inline__ void ++VEC_edge_must_be_pointer_type (void) ++{ ++ (void) ((edge) 1 == (void *) 1); ++} typedef struct VEC_edge_base ++ ++{ ++ unsigned num; ++ unsigned alloc; ++ edge vec[1]; ++} VEC_edge_base; ++typedef struct VEC_edge_none ++{ ++ VEC_edge_base base; ++} VEC_edge_none; ++ ++static __inline__ edge ++VEC_edge_base_index (const VEC_edge_base * vec_, unsigned ix_, ++ const char *file_, unsigned line_, const char *function_) ++{ ++ return vec_->vec[ix_]; ++} ++ ++typedef struct VEC_edge_gc ++{ ++ VEC_edge_base base; ++} VEC_edge_gc; ++struct basic_block_def ++{ ++ VEC_edge_gc *succs; ++}; ++static __inline__ edge ++single_succ_edge (const_basic_block bb) ++{ ++ return (VEC_edge_base_index ++ ((((bb)->succs) ? &((bb)->succs)->base : 0), (0), ++ "/home/gcc/virgin-gcc/gcc/basic-block.h", 563, __FUNCTION__)); ++} ++ ++edge find_edge (basic_block, basic_block); ++typedef tree *def_operand_p; ++typedef ssa_use_operand_t *use_operand_p; ++struct gimple_seq_node_d; ++typedef struct gimple_seq_node_d *gimple_seq_node; ++struct gimple_seq_node_d ++{ ++ gimple stmt; ++}; ++typedef struct ++{ ++ gimple_seq_node ptr; ++ gimple_seq seq; ++ basic_block bb; ++} gimple_stmt_iterator; ++struct gimple_statement_phi ++{ ++ struct phi_arg_d args[1]; ++}; ++union gimple_statement_d ++{ ++ struct gimple_statement_phi gimple_phi; ++}; ++extern size_t const gimple_ops_offset_[]; ++static __inline__ tree * ++gimple_ops (gimple gs) ++{ ++ size_t off; ++ off = gimple_ops_offset_[gimple_statement_structure (gs)]; ++ return (tree *) ((char *) gs + off); ++} ++ ++static __inline__ tree ++gimple_op (const_gimple gs, unsigned i) ++{ ++ return gimple_ops ((((union ++ { ++ const union gimple_statement_d * _q; ++ union gimple_statement_d * _nq;}) (((gs))))._nq))[i]; ++} ++ ++static __inline__ struct phi_arg_d * ++gimple_phi_arg (gimple gs, unsigned index) ++{ ++ return &(gs->gimple_phi.args[index]); ++} ++ ++static __inline__ tree ++gimple_switch_label (const_gimple gs, unsigned index) ++{ ++ return gimple_op (gs, index + 1); ++} ++ ++gimple_stmt_iterator gsi_start_phis (basic_block); ++extern basic_block label_to_block_fn (struct function *, tree); ++ ++static __inline__ tree ++get_use_from_ptr (use_operand_p use) ++{ ++ return *(use->use); ++} ++ ++static __inline__ use_operand_p ++gimple_phi_arg_imm_use_ptr (gimple gs, int i) ++{ ++ return &gimple_phi_arg (gs, i)->imm_use; ++} ++ ++struct switch_conv_info ++{ ++ basic_block final_bb; ++ basic_block switch_bb; ++ const char *reason; ++ tree *default_values; ++}; ++static struct switch_conv_info info; ++ ++static void ++gather_default_values (tree default_case) ++{ ++ gimple_stmt_iterator gsi; ++ basic_block bb = ++ (label_to_block_fn ((cfun + 0), default_case->exp.operands[2])); ++ edge e; ++ int i = 0; ++ if (bb == info.final_bb) ++ e = find_edge (info.switch_bb, bb); ++ else ++ e = single_succ_edge (bb); ++ for (gsi = gsi_start_phis (info.final_bb); ++ gsi_gsi_start_phis (info.final_bb); gsi_next (&gsi)) ++ { ++ gimple phi = gsi.ptr->stmt; ++ tree val = get_use_from_ptr (gimple_phi_arg_imm_use_ptr ++ ((((phi))), (((e)->dest_idx)))); ++ info.default_values[i++] = val; ++ } ++} ++ ++unsigned char ++process_switch (gimple swtch) ++{ ++ unsigned int i, branch_num = gimple_switch_num_labels (swtch); ++ tree index_type; ++ info.reason = "switch has no labels\n"; ++ gather_default_values (gimple_switch_label (swtch, 0)); ++} ++ ++/* Verify that out-of-ssa coalescing did its job by verifying there are not ++ any partition copies inserted. */ ++ ++/* { dg-final { scan-rtl-dump-not "partition copy" "expand"} } */ ++/* { dg-final { cleanup-rtl-dump "expand" } } */ ++ +--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-26.c ++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-26.c +@@ -1,6 +1,6 @@ + /* { dg-do run { target vect_cmdline_needed } } */ +-/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */ +-/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details -mno-sse" { target { i?86-*-* x86_64-*-* } } } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details -fvect-cost-model=dynamic" } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details -fvect-cost-model=dynamic -mno-sse" { target { i?86-*-* x86_64-*-* } } } */ + + #include + +--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c ++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c +@@ -0,0 +1,25 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O1 -fdump-tree-optimized" } */ ++ ++int f(int a, int b, int c) ++{ ++ if (a == 0 && b > c) ++ return 0; ++ return a; ++} ++ ++int g(int a, int b, int c) ++{ ++ if (a == 42 && b > c) ++ return 42; ++ return a; ++} ++ ++int h(int a, int b, int c, int d) ++{ ++ if (a == d && b > c) ++ return d; ++ return a; ++} ++/* { dg-final { scan-tree-dump-times "if" 0 "optimized"} } */ ++/* { dg-final { cleanup-tree-dump "optimized" } } */ +--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c ++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c +@@ -1,6 +1,6 @@ + /* { dg-do run { target vect_cmdline_needed } } */ +-/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */ +-/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details -mno-sse" { target { i?86-*-* x86_64-*-* } } } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details -fvect-cost-model=dynamic" } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details -fvect-cost-model=dynamic -mno-sse" { target { i?86-*-* x86_64-*-* } } } */ + + #include + +--- a/src/gcc/testsuite/gcc.dg/tls/pr42894.c ++++ b/src/gcc/testsuite/gcc.dg/tls/pr42894.c +@@ -1,6 +1,5 @@ + /* PR target/42894 */ + /* { dg-do compile } */ +-/* { dg-options "-march=armv5te -mthumb" { target arm*-*-* } } */ + /* { dg-require-effective-target tls } */ + + extern __thread int t; +--- a/src/gcc/testsuite/gcc.dg/builtin-apply2.c ++++ b/src/gcc/testsuite/gcc.dg/builtin-apply2.c +@@ -1,6 +1,6 @@ + /* { dg-do run } */ + /* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */ +-/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */ ++/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { arm*-*-* && arm_hf_eabi } { "*" } { "" } } */ + + /* PR target/12503 */ + /* Origin: */ +--- a/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c ++++ b/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c +@@ -1,4 +1,6 @@ +-/* { dg-require-effective-target vect_int } */ ++/* { dg-require-effective-target vect_int } ++ { dg-skip-if "AArch64 tiny code model does not support programs larger than 1MiB" {aarch64_tiny} {"*"} {""} } ++ */ + + #include + #include "tree-vect.h" +--- a/src/gcc/testsuite/g++.dg/asan/large-func-test-1.C ++++ b/src/gcc/testsuite/g++.dg/asan/large-func-test-1.C +@@ -37,9 +37,9 @@ + + // { dg-output "ERROR: AddressSanitizer:? heap-buffer-overflow on address\[^\n\r]*" } + // { dg-output "0x\[0-9a-f\]+ at pc 0x\[0-9a-f\]+ bp 0x\[0-9a-f\]+ sp 0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } +-// { dg-output "READ of size 4 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*READ of size 4 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } + // { dg-output " #0 0x\[0-9a-f\]+ (in \[^\n\r]*LargeFunction\[^\n\r]*(large-func-test-1.C:18|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } +-// { dg-output "0x\[0-9a-f\]+ is located 44 bytes to the right of 400-byte region.*(\n|\r\n|\r)" } +-// { dg-output "allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*0x\[0-9a-f\]+ is located 44 bytes to the right of 400-byte region.*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } + // { dg-output " #0( 0x\[0-9a-f\]+ (in _*(interceptor_|)malloc|\[(\])\[^\n\r]*(\n|\r\n|\r)" } + // { dg-output " #1|) 0x\[0-9a-f\]+ (in (operator new|_*_Zn\[aw\]\[mj\])|\[(\])\[^\n\r]*(\n|\r\n|\r)" } +--- a/src/gcc/testsuite/g++.dg/asan/deep-thread-stack-1.C ++++ b/src/gcc/testsuite/g++.dg/asan/deep-thread-stack-1.C +@@ -45,9 +45,9 @@ + } + + // { dg-output "ERROR: AddressSanitizer: heap-use-after-free.*(\n|\r\n|\r)" } +-// { dg-output "WRITE of size 4 at 0x\[0-9a-f\]+ thread T(\[0-9\]+).*(\n|\r\n|\r)" } +-// { dg-output "freed by thread T(\[0-9\]+) here:.*(\n|\r\n|\r)" } +-// { dg-output "previously allocated by thread T(\[0-9\]+) here:.*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*WRITE of size 4 at 0x\[0-9a-f\]+ thread T(\[0-9\]+).*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*freed by thread T(\[0-9\]+) here:.*(\n|\r\n|\r)" } ++// { dg-output "\[^\n\r]*previously allocated by thread T(\[0-9\]+) here:.*(\n|\r\n|\r)" } + // { dg-output "Thread T\\2 created by T(\[0-9\]+) here:.*(\n|\r\n|\r)" } + // { dg-output "Thread T\\8 created by T0 here:.*(\n|\r\n|\r)" } + // { dg-output "Thread T\\4 created by T(\[0-9\]+) here:.*(\n|\r\n|\r)" } +--- a/src/gcc/testsuite/c-c++-common/asan/strncpy-overflow-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/strncpy-overflow-1.c +@@ -15,7 +15,7 @@ + /* { dg-output "WRITE of size \[0-9\]* at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*(interceptor_|)strncpy|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*strncpy-overflow-1.c:11|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */ +-/* { dg-output "0x\[0-9a-f\]+ is located 0 bytes to the right of 9-byte region\[^\n\r]*(\n|\r\n|\r)" } */ +-/* { dg-output "allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*0x\[0-9a-f\]+ is located 0 bytes to the right of 9-byte region\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*(interceptor_|)malloc|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*strncpy-overflow-1.c:10|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ +--- a/src/gcc/testsuite/c-c++-common/asan/rlimit-mmap-test-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/rlimit-mmap-test-1.c +@@ -2,6 +2,7 @@ + + /* { dg-do run { target setrlimit } } */ + /* { dg-skip-if "" { *-*-* } { "*" } { "-O0" } } */ ++/* { dg-require-effective-target hw } */ + /* { dg-shouldfail "asan" } */ + + #include +--- a/src/gcc/testsuite/c-c++-common/asan/stack-overflow-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/stack-overflow-1.c +@@ -19,4 +19,4 @@ + + /* { dg-output "READ of size 1 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*stack-overflow-1.c:16|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */ +-/* { dg-output "Address 0x\[0-9a-f\]+ is\[^\n\r]*frame
" } */ ++/* { dg-output "\[^\n\r]*Address 0x\[0-9a-f\]+ is\[^\n\r]*frame
" } */ +--- a/src/gcc/testsuite/c-c++-common/asan/use-after-free-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/use-after-free-1.c +@@ -11,12 +11,12 @@ + + /* { dg-output "ERROR: AddressSanitizer:? heap-use-after-free on address\[^\n\r]*" } */ + /* { dg-output "0x\[0-9a-f\]+ at pc 0x\[0-9a-f\]+ bp 0x\[0-9a-f\]+ sp 0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */ +-/* { dg-output "READ of size 1 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*READ of size 1 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*use-after-free-1.c:9|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */ +-/* { dg-output "0x\[0-9a-f\]+ is located 5 bytes inside of 10-byte region .0x\[0-9a-f\]+,0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */ +-/* { dg-output "freed by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*0x\[0-9a-f\]+ is located 5 bytes inside of 10-byte region .0x\[0-9a-f\]+,0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*freed by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*(interceptor_|)free|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*use-after-free-1.c:8|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */ +-/* { dg-output "previously allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*previously allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*(interceptor_|)malloc|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*use-after-free-1.c:7|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ +--- a/src/gcc/testsuite/c-c++-common/asan/clone-test-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/clone-test-1.c +@@ -3,6 +3,7 @@ + + /* { dg-do run { target { *-*-linux* } } } */ + /* { dg-require-effective-target clone } */ ++/* { dg-require-effective-target hw } */ + /* { dg-options "-D_GNU_SOURCE" } */ + + #include +--- a/src/gcc/testsuite/c-c++-common/asan/heap-overflow-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/heap-overflow-1.c +@@ -25,7 +25,7 @@ + + /* { dg-output "READ of size 1 at 0x\[0-9a-f\]+ thread T0.*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*heap-overflow-1.c:21|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */ +-/* { dg-output "0x\[0-9a-f\]+ is located 0 bytes to the right of 10-byte region\[^\n\r]*(\n|\r\n|\r)" } */ +-/* { dg-output "allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*0x\[0-9a-f\]+ is located 0 bytes to the right of 10-byte region\[^\n\r]*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*allocated by thread T0 here:\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in _*(interceptor_|)malloc|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*heap-overflow-1.c:19|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ +--- a/src/gcc/testsuite/c-c++-common/asan/null-deref-1.c ++++ b/src/gcc/testsuite/c-c++-common/asan/null-deref-1.c +@@ -18,6 +18,6 @@ + + /* { dg-output "ERROR: AddressSanitizer:? SEGV on unknown address\[^\n\r]*" } */ + /* { dg-output "0x\[0-9a-f\]+ \[^\n\r]*pc 0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */ +-/* { dg-output "AddressSanitizer can not provide additional info.*(\n|\r\n|\r)" } */ ++/* { dg-output "\[^\n\r]*AddressSanitizer can not provide additional info.*(\n|\r\n|\r)" } */ + /* { dg-output " #0 0x\[0-9a-f\]+ (in \[^\n\r]*NullDeref\[^\n\r]* (\[^\n\r]*null-deref-1.c:10|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ + /* { dg-output " #1 0x\[0-9a-f\]+ (in _*main (\[^\n\r]*null-deref-1.c:15|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */ +--- a/src/gcc/objcp/ChangeLog.linaro ++++ b/src/gcc/objcp/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/cp/ChangeLog.linaro ++++ b/src/gcc/cp/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/tree-ssa-loop-ivopts.c ++++ b/src/gcc/tree-ssa-loop-ivopts.c +@@ -4832,22 +4832,36 @@ + for (i = 0; i < n_iv_cands (data); i++) + { + struct iv_cand *cand = iv_cand (data, i); +- struct iv_use *closest = NULL; ++ struct iv_use *closest_before = NULL; ++ struct iv_use *closest_after = NULL; + if (cand->pos != IP_ORIGINAL) + continue; ++ + for (j = 0; j < n_iv_uses (data); j++) + { + struct iv_use *use = iv_use (data, j); + unsigned uid = gimple_uid (use->stmt); +- if (gimple_bb (use->stmt) != gimple_bb (cand->incremented_at) +- || uid > gimple_uid (cand->incremented_at)) ++ ++ if (gimple_bb (use->stmt) != gimple_bb (cand->incremented_at)) + continue; +- if (closest == NULL || uid > gimple_uid (closest->stmt)) +- closest = use; ++ ++ if (uid < gimple_uid (cand->incremented_at) ++ && (closest_before == NULL ++ || uid > gimple_uid (closest_before->stmt))) ++ closest_before = use; ++ ++ if (uid > gimple_uid (cand->incremented_at) ++ && (closest_after == NULL ++ || uid < gimple_uid (closest_after->stmt))) ++ closest_after = use; + } +- if (closest == NULL || !autoinc_possible_for_pair (data, closest, cand)) +- continue; +- cand->ainc_use = closest; ++ ++ if (closest_before != NULL ++ && autoinc_possible_for_pair (data, closest_before, cand)) ++ cand->ainc_use = closest_before; ++ else if (closest_after != NULL ++ && autoinc_possible_for_pair (data, closest_after, cand)) ++ cand->ainc_use = closest_after; + } + } + +--- a/src/gcc/rtl.def ++++ b/src/gcc/rtl.def +@@ -937,8 +937,9 @@ + relational operator. Operands should have only one alternative. + 1: A C expression giving an additional condition for recognizing + the generated pattern. +- 2: A template or C code to produce assembler output. */ +-DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "Ess", RTX_EXTRA) ++ 2: A template or C code to produce assembler output. ++ 3: A vector of attributes to append to the resulting cond_exec insn. */ ++DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "EssV", RTX_EXTRA) + + /* Definition of an operand predicate. The difference between + DEFINE_PREDICATE and DEFINE_SPECIAL_PREDICATE is that genrecog will +--- a/src/gcc/go/ChangeLog.linaro ++++ b/src/gcc/go/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/opts.c ++++ b/src/gcc/opts.c +@@ -484,6 +484,7 @@ + { OPT_LEVELS_2_PLUS, OPT_falign_labels, NULL, 1 }, + { OPT_LEVELS_2_PLUS, OPT_falign_functions, NULL, 1 }, + { OPT_LEVELS_2_PLUS, OPT_ftree_tail_merge, NULL, 1 }, ++ { OPT_LEVELS_2_PLUS, OPT_fvect_cost_model_, NULL, VECT_COST_MODEL_CHEAP }, + { OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_foptimize_strlen, NULL, 1 }, + { OPT_LEVELS_2_PLUS, OPT_fhoist_adjacent_loads, NULL, 1 }, + +@@ -497,7 +498,7 @@ + { OPT_LEVELS_3_PLUS, OPT_funswitch_loops, NULL, 1 }, + { OPT_LEVELS_3_PLUS, OPT_fgcse_after_reload, NULL, 1 }, + { OPT_LEVELS_3_PLUS, OPT_ftree_vectorize, NULL, 1 }, +- { OPT_LEVELS_3_PLUS, OPT_fvect_cost_model, NULL, 1 }, ++ { OPT_LEVELS_3_PLUS, OPT_fvect_cost_model_, NULL, VECT_COST_MODEL_DYNAMIC }, + { OPT_LEVELS_3_PLUS, OPT_fipa_cp_clone, NULL, 1 }, + { OPT_LEVELS_3_PLUS, OPT_ftree_partial_pre, NULL, 1 }, + +@@ -822,6 +823,17 @@ + } + } + ++ /* Tune vectorization related parametees according to cost model. */ ++ if (opts->x_flag_vect_cost_model == VECT_COST_MODEL_CHEAP) ++ { ++ maybe_set_param_value (PARAM_VECT_MAX_VERSION_FOR_ALIAS_CHECKS, ++ 6, opts->x_param_values, opts_set->x_param_values); ++ maybe_set_param_value (PARAM_VECT_MAX_VERSION_FOR_ALIGNMENT_CHECKS, ++ 0, opts->x_param_values, opts_set->x_param_values); ++ maybe_set_param_value (PARAM_VECT_MAX_PEELING_FOR_ALIGNMENT, ++ 0, opts->x_param_values, opts_set->x_param_values); ++ } ++ + /* Set PARAM_MAX_STORES_TO_SINK to 0 if either vectorization or if-conversion + is disabled. */ + if (!opts->x_flag_tree_vectorize || !opts->x_flag_tree_loop_if_convert) +@@ -1592,7 +1604,7 @@ + if (!opts_set->x_flag_tree_vectorize) + opts->x_flag_tree_vectorize = value; + if (!opts_set->x_flag_vect_cost_model) +- opts->x_flag_vect_cost_model = value; ++ opts->x_flag_vect_cost_model = VECT_COST_MODEL_DYNAMIC; + if (!opts_set->x_flag_tree_loop_distribute_patterns) + opts->x_flag_tree_loop_distribute_patterns = value; + break; +--- a/src/gcc/ada/ChangeLog.linaro ++++ b/src/gcc/ada/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/common/config/aarch64/aarch64-common.c ++++ b/src/gcc/common/config/aarch64/aarch64-common.c +@@ -44,6 +44,8 @@ + { + /* Enable section anchors by default at -O1 or higher. */ + { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 }, ++ /* Enable redundant extension instructions removal at -O2 and higher. */ ++ { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 }, + { OPT_LEVELS_NONE, 0, NULL, 0 } + }; + +--- a/src/gcc/common/config/i386/i386-common.c ++++ b/src/gcc/common/config/i386/i386-common.c +@@ -729,7 +729,6 @@ + + opts->x_flag_pcc_struct_return = 2; + opts->x_flag_asynchronous_unwind_tables = 2; +- opts->x_flag_vect_cost_model = 1; + } + + /* On the x86 -fsplit-stack and -fstack-protector both use the same +--- a/src/gcc/asan.c ++++ b/src/gcc/asan.c +@@ -906,7 +906,7 @@ + + gcc_assert ((len & 3) == 0); + top_label = gen_label_rtx (); +- addr = force_reg (Pmode, XEXP (shadow_mem, 0)); ++ addr = copy_to_mode_reg (Pmode, XEXP (shadow_mem, 0)); + shadow_mem = adjust_automodify_address (shadow_mem, SImode, addr, 0); + end = force_reg (Pmode, plus_constant (Pmode, addr, len)); + emit_label (top_label); +--- a/src/gcc/fortran/ChangeLog.linaro ++++ b/src/gcc/fortran/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/configure.ac ++++ b/src/gcc/configure.ac +@@ -813,7 +813,7 @@ + ) + AC_SUBST(CONFIGURE_SPECS) + +-ACX_PKGVERSION([GCC]) ++ACX_PKGVERSION([Linaro GCC `cat $srcdir/LINARO-VERSION`]) + ACX_BUGURL([http://gcc.gnu.org/bugs.html]) + + # Sanity check enable_languages in case someone does not run the toplevel +@@ -4233,8 +4233,9 @@ + # ??? Once 2.11 is released, probably need to add first known working + # version to the per-target configury. + case "$cpu_type" in +- alpha | arm | avr | bfin | cris | i386 | m32c | m68k | microblaze | mips \ +- | pa | rs6000 | score | sparc | spu | tilegx | tilepro | xstormy16 | xtensa) ++ aarch64 | alpha | arm | avr | bfin | cris | i386 | m32c | m68k | microblaze \ ++ | mips | pa | rs6000 | score | sparc | spu | tilegx | tilepro | xstormy16 \ ++ | xtensa) + insn="nop" + ;; + ia64 | s390) +--- a/src/gcc/tree-vectorizer.h ++++ b/src/gcc/tree-vectorizer.h +@@ -838,6 +838,14 @@ + return (DR_MISALIGNMENT (data_ref_info) != -1); + } + ++ ++/* Return true if the vect cost model is unlimited. */ ++static inline bool ++unlimited_cost_model () ++{ ++ return flag_vect_cost_model == VECT_COST_MODEL_UNLIMITED; ++} ++ + /* Source location */ + extern LOC vect_location; + +--- a/src/gcc/tree-vect-loop.c ++++ b/src/gcc/tree-vect-loop.c +@@ -2636,7 +2636,7 @@ + void *target_cost_data = LOOP_VINFO_TARGET_COST_DATA (loop_vinfo); + + /* Cost model disabled. */ +- if (!flag_vect_cost_model) ++ if (unlimited_cost_model ()) + { + dump_printf_loc (MSG_NOTE, vect_location, "cost model disabled."); + *ret_min_profitable_niters = 0; +--- a/src/gcc/flag-types.h ++++ b/src/gcc/flag-types.h +@@ -191,4 +191,13 @@ + FP_CONTRACT_FAST = 2 + }; + ++/* Vectorizer cost-model. */ ++enum vect_cost_model { ++ VECT_COST_MODEL_UNLIMITED = 0, ++ VECT_COST_MODEL_CHEAP = 1, ++ VECT_COST_MODEL_DYNAMIC = 2, ++ VECT_COST_MODEL_DEFAULT = 3 ++}; ++ ++ + #endif /* ! GCC_FLAG_TYPES_H */ +--- a/src/gcc/tree-vect-data-refs.c ++++ b/src/gcc/tree-vect-data-refs.c +@@ -1328,7 +1328,7 @@ + *new_slot = slot; + } + +- if (!supportable_dr_alignment && !flag_vect_cost_model) ++ if (!supportable_dr_alignment && unlimited_cost_model ()) + slot->count += VECT_MAX_COST; + } + +@@ -1438,7 +1438,7 @@ + res.peel_info.dr = NULL; + res.body_cost_vec = stmt_vector_for_cost(); + +- if (flag_vect_cost_model) ++ if (!unlimited_cost_model ()) + { + res.inside_cost = INT_MAX; + res.outside_cost = INT_MAX; +@@ -1668,7 +1668,7 @@ + vectorization factor. + We do this automtically for cost model, since we calculate cost + for every peeling option. */ +- if (!flag_vect_cost_model) ++ if (unlimited_cost_model ()) + possible_npeel_number = vf /nelements; + + /* Handle the aligned case. We may decide to align some other +@@ -1676,7 +1676,7 @@ + if (DR_MISALIGNMENT (dr) == 0) + { + npeel_tmp = 0; +- if (!flag_vect_cost_model) ++ if (unlimited_cost_model ()) + possible_npeel_number++; + } + +@@ -1926,6 +1926,30 @@ + + if (do_peeling) + { ++ unsigned max_allowed_peel ++ = PARAM_VALUE (PARAM_VECT_MAX_PEELING_FOR_ALIGNMENT); ++ if (max_allowed_peel != (unsigned)-1) ++ { ++ unsigned max_peel = npeel; ++ if (max_peel == 0) ++ { ++ gimple dr_stmt = DR_STMT (dr0); ++ stmt_vec_info vinfo = vinfo_for_stmt (dr_stmt); ++ tree vtype = STMT_VINFO_VECTYPE (vinfo); ++ max_peel = TYPE_VECTOR_SUBPARTS (vtype) - 1; ++ } ++ if (max_peel > max_allowed_peel) ++ { ++ do_peeling = false; ++ if (dump_enabled_p ()) ++ dump_printf_loc (MSG_NOTE, vect_location, ++ "Disable peeling, max peels reached: %d\n", max_peel); ++ } ++ } ++ } ++ ++ if (do_peeling) ++ { + stmt_info_for_cost *si; + void *data = LOOP_VINFO_TARGET_COST_DATA (loop_vinfo); + +@@ -1979,16 +2003,14 @@ + /* (2) Versioning to force alignment. */ + + /* Try versioning if: +- 1) flag_tree_vect_loop_version is TRUE +- 2) optimize loop for speed +- 3) there is at least one unsupported misaligned data ref with an unknown ++ 1) optimize loop for speed ++ 2) there is at least one unsupported misaligned data ref with an unknown + misalignment, and +- 4) all misaligned data refs with a known misalignment are supported, and +- 5) the number of runtime alignment checks is within reason. */ ++ 3) all misaligned data refs with a known misalignment are supported, and ++ 4) the number of runtime alignment checks is within reason. */ + + do_versioning = +- flag_tree_vect_loop_version +- && optimize_loop_nest_for_speed_p (loop) ++ optimize_loop_nest_for_speed_p (loop) + && (!loop->inner); /* FORNOW */ + + if (do_versioning) +--- a/src/gcc/coretypes.h ++++ b/src/gcc/coretypes.h +@@ -62,6 +62,8 @@ + typedef union gimple_statement_d *gimple; + typedef const union gimple_statement_d *const_gimple; + typedef gimple gimple_seq; ++struct gimple_stmt_iterator_d; ++typedef struct gimple_stmt_iterator_d gimple_stmt_iterator; + union section; + typedef union section section; + struct gcc_options; +--- a/src/gcc/tree-ssa-phiopt.c ++++ b/src/gcc/tree-ssa-phiopt.c +@@ -108,6 +108,26 @@ + This opportunity can sometimes occur as a result of other + optimizations. + ++ ++ Another case caught by value replacement looks like this: ++ ++ bb0: ++ t1 = a == CONST; ++ t2 = b > c; ++ t3 = t1 & t2; ++ if (t3 != 0) goto bb1; else goto bb2; ++ bb1: ++ bb2: ++ x = PHI (CONST, a) ++ ++ Gets replaced with: ++ bb0: ++ bb2: ++ t1 = a == CONST; ++ t2 = b > c; ++ t3 = t1 & t2; ++ x = a; ++ + ABS Replacement + --------------- + +@@ -153,7 +173,7 @@ + + Adjacent Load Hoisting + ---------------------- +- ++ + This transformation replaces + + bb0: +@@ -275,7 +295,7 @@ + phi optimizations. Both share much of the infrastructure in how + to match applicable basic block patterns. DO_STORE_ELIM is true + when we want to do conditional store replacement, false otherwise. +- DO_HOIST_LOADS is true when we want to hoist adjacent loads out ++ DO_HOIST_LOADS is true when we want to hoist adjacent loads out + of diamond control flow patterns, false otherwise. */ + static unsigned int + tree_ssa_phiopt_worker (bool do_store_elim, bool do_hoist_loads) +@@ -378,7 +398,7 @@ + continue; + } + else +- continue; ++ continue; + + e1 = EDGE_SUCC (bb1, 0); + +@@ -426,7 +446,7 @@ + + if (!candorest) + continue; +- ++ + phi = single_non_singleton_phi_for_edges (phis, e1, e2); + if (!phi) + continue; +@@ -714,6 +734,93 @@ + return false; + } + ++/* RHS is a source argument in a BIT_AND_EXPR which feeds a conditional ++ of the form SSA_NAME NE 0. ++ ++ If RHS is fed by a simple EQ_EXPR comparison of two values, see if ++ the two input values of the EQ_EXPR match arg0 and arg1. ++ ++ If so update *code and return TRUE. Otherwise return FALSE. */ ++ ++static bool ++rhs_is_fed_for_value_replacement (const_tree arg0, const_tree arg1, ++ enum tree_code *code, const_tree rhs) ++{ ++ /* Obviously if RHS is not an SSA_NAME, we can't look at the defining ++ statement. */ ++ if (TREE_CODE (rhs) == SSA_NAME) ++ { ++ gimple def1 = SSA_NAME_DEF_STMT (rhs); ++ ++ /* Verify the defining statement has an EQ_EXPR on the RHS. */ ++ if (is_gimple_assign (def1) && gimple_assign_rhs_code (def1) == EQ_EXPR) ++ { ++ /* Finally verify the source operands of the EQ_EXPR are equal ++ to arg0 and arg1. */ ++ tree op0 = gimple_assign_rhs1 (def1); ++ tree op1 = gimple_assign_rhs2 (def1); ++ if ((operand_equal_for_phi_arg_p (arg0, op0) ++ && operand_equal_for_phi_arg_p (arg1, op1)) ++ || (operand_equal_for_phi_arg_p (arg0, op1) ++ && operand_equal_for_phi_arg_p (arg1, op0))) ++ { ++ /* We will perform the optimization. */ ++ *code = gimple_assign_rhs_code (def1); ++ return true; ++ } ++ } ++ } ++ return false; ++} ++ ++/* Return TRUE if arg0/arg1 are equal to the rhs/lhs or lhs/rhs of COND. ++ ++ Also return TRUE if arg0/arg1 are equal to the source arguments of a ++ an EQ comparison feeding a BIT_AND_EXPR which feeds COND. ++ ++ Return FALSE otherwise. */ ++ ++static bool ++operand_equal_for_value_replacement (const_tree arg0, const_tree arg1, ++ enum tree_code *code, gimple cond) ++{ ++ gimple def; ++ tree lhs = gimple_cond_lhs (cond); ++ tree rhs = gimple_cond_rhs (cond); ++ ++ if ((operand_equal_for_phi_arg_p (arg0, lhs) ++ && operand_equal_for_phi_arg_p (arg1, rhs)) ++ || (operand_equal_for_phi_arg_p (arg1, lhs) ++ && operand_equal_for_phi_arg_p (arg0, rhs))) ++ return true; ++ ++ /* Now handle more complex case where we have an EQ comparison ++ which feeds a BIT_AND_EXPR which feeds COND. ++ ++ First verify that COND is of the form SSA_NAME NE 0. */ ++ if (*code != NE_EXPR || !integer_zerop (rhs) ++ || TREE_CODE (lhs) != SSA_NAME) ++ return false; ++ ++ /* Now ensure that SSA_NAME is set by a BIT_AND_EXPR. */ ++ def = SSA_NAME_DEF_STMT (lhs); ++ if (!is_gimple_assign (def) || gimple_assign_rhs_code (def) != BIT_AND_EXPR) ++ return false; ++ ++ /* Now verify arg0/arg1 correspond to the source arguments of an ++ EQ comparison feeding the BIT_AND_EXPR. */ ++ ++ tree tmp = gimple_assign_rhs1 (def); ++ if (rhs_is_fed_for_value_replacement (arg0, arg1, code, tmp)) ++ return true; ++ ++ tmp = gimple_assign_rhs2 (def); ++ if (rhs_is_fed_for_value_replacement (arg0, arg1, code, tmp)) ++ return true; ++ ++ return false; ++} ++ + /* The function value_replacement does the main work of doing the value + replacement. Return non-zero if the replacement is done. Otherwise return + 0. If we remove the middle basic block, return 2. +@@ -783,10 +890,7 @@ + We now need to verify that the two arguments in the PHI node match + the two arguments to the equality comparison. */ + +- if ((operand_equal_for_phi_arg_p (arg0, gimple_cond_lhs (cond)) +- && operand_equal_for_phi_arg_p (arg1, gimple_cond_rhs (cond))) +- || (operand_equal_for_phi_arg_p (arg1, gimple_cond_lhs (cond)) +- && operand_equal_for_phi_arg_p (arg0, gimple_cond_rhs (cond)))) ++ if (operand_equal_for_value_replacement (arg0, arg1, &code, cond)) + { + edge e; + tree arg; +@@ -1807,7 +1911,7 @@ + + /* Given a "diamond" control-flow pattern where BB0 tests a condition, + BB1 and BB2 are "then" and "else" blocks dependent on this test, +- and BB3 rejoins control flow following BB1 and BB2, look for ++ and BB3 rejoins control flow following BB1 and BB2, look for + opportunities to hoist loads as follows. If BB3 contains a PHI of + two loads, one each occurring in BB1 and BB2, and the loads are + provably of adjacent fields in the same structure, then move both +@@ -1857,7 +1961,7 @@ + + arg1 = gimple_phi_arg_def (phi_stmt, 0); + arg2 = gimple_phi_arg_def (phi_stmt, 1); +- ++ + if (TREE_CODE (arg1) != SSA_NAME + || TREE_CODE (arg2) != SSA_NAME + || SSA_NAME_IS_DEFAULT_DEF (arg1) +--- a/src/gcc/tree-ssa-coalesce.c ++++ b/src/gcc/tree-ssa-coalesce.c +@@ -979,8 +979,7 @@ + continue; + + register_ssa_partition (map, arg); +- if ((SSA_NAME_VAR (arg) == SSA_NAME_VAR (res) +- && TREE_TYPE (arg) == TREE_TYPE (res)) ++ if (gimple_can_coalesce_p (arg, res) + || (e->flags & EDGE_ABNORMAL)) + { + saw_copy = true; +@@ -1021,8 +1020,7 @@ + if (gimple_assign_copy_p (stmt) + && TREE_CODE (lhs) == SSA_NAME + && TREE_CODE (rhs1) == SSA_NAME +- && SSA_NAME_VAR (lhs) == SSA_NAME_VAR (rhs1) +- && TREE_TYPE (lhs) == TREE_TYPE (rhs1)) ++ && gimple_can_coalesce_p (lhs, rhs1)) + { + v1 = SSA_NAME_VERSION (lhs); + v2 = SSA_NAME_VERSION (rhs1); +@@ -1073,8 +1071,7 @@ + v1 = SSA_NAME_VERSION (outputs[match]); + v2 = SSA_NAME_VERSION (input); + +- if (SSA_NAME_VAR (outputs[match]) == SSA_NAME_VAR (input) +- && TREE_TYPE (outputs[match]) == TREE_TYPE (input)) ++ if (gimple_can_coalesce_p (outputs[match], input)) + { + cost = coalesce_cost (REG_BR_PROB_BASE, + optimize_bb_for_size_p (bb)); +@@ -1108,8 +1105,7 @@ + first = var; + else + { +- gcc_assert (SSA_NAME_VAR (var) == SSA_NAME_VAR (first) +- && TREE_TYPE (var) == TREE_TYPE (first)); ++ gcc_assert (gimple_can_coalesce_p (var, first)); + v1 = SSA_NAME_VERSION (first); + v2 = SSA_NAME_VERSION (var); + bitmap_set_bit (used_in_copy, v1); +@@ -1246,8 +1242,7 @@ + var2 = ssa_name (y); + + /* Assert the coalesces have the same base variable. */ +- gcc_assert (SSA_NAME_VAR (var1) == SSA_NAME_VAR (var2) +- && TREE_TYPE (var1) == TREE_TYPE (var2)); ++ gcc_assert (gimple_can_coalesce_p (var1, var2)); + + if (debug) + fprintf (debug, "Coalesce list: "); +@@ -1377,3 +1372,38 @@ + + return map; + } ++ ++/* Given SSA_NAMEs NAME1 and NAME2, return true if they are candidates for ++ coalescing together, false otherwise. ++ ++ This must stay consistent with var_map_base_init in tree-ssa-live.c. */ ++ ++bool ++gimple_can_coalesce_p (tree name1, tree name2) ++{ ++ /* First check the SSA_NAME's associated DECL. We only want to ++ coalesce if they have the same DECL or both have no associated DECL. */ ++ if (SSA_NAME_VAR (name1) != SSA_NAME_VAR (name2)) ++ return false; ++ ++ /* Now check the types. If the types are the same, then we should ++ try to coalesce V1 and V2. */ ++ tree t1 = TREE_TYPE (name1); ++ tree t2 = TREE_TYPE (name2); ++ if (t1 == t2) ++ return true; ++ ++ /* If the types are not the same, check for a canonical type match. This ++ (for example) allows coalescing when the types are fundamentally the ++ same, but just have different names. ++ ++ Note pointer types with different address spaces may have the same ++ canonical type. Those are rejected for coalescing by the ++ types_compatible_p check. */ ++ if (TYPE_CANONICAL (t1) ++ && TYPE_CANONICAL (t1) == TYPE_CANONICAL (t2) ++ && types_compatible_p (t1, t2)) ++ return true; ++ ++ return false; ++} +--- a/src/gcc/lower-subreg.c ++++ b/src/gcc/lower-subreg.c +@@ -966,7 +966,20 @@ + rtx reg; + + reg = gen_reg_rtx (orig_mode); ++ ++#ifdef AUTO_INC_DEC ++ { ++ rtx move = emit_move_insn (reg, src); ++ if (MEM_P (src)) ++ { ++ rtx note = find_reg_note (insn, REG_INC, NULL_RTX); ++ if (note) ++ add_reg_note (move, REG_INC, XEXP (note, 0)); ++ } ++ } ++#else + emit_move_insn (reg, src); ++#endif + src = reg; + } + +@@ -1056,6 +1069,16 @@ + mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0); + minsn = emit_move_insn (real_dest, mdest); + ++#ifdef AUTO_INC_DEC ++ if (MEM_P (real_dest) ++ && !(resolve_reg_p (real_dest) || resolve_subreg_p (real_dest))) ++ { ++ rtx note = find_reg_note (insn, REG_INC, NULL_RTX); ++ if (note) ++ add_reg_note (minsn, REG_INC, XEXP (note, 0)); ++ } ++#endif ++ + smove = single_set (minsn); + gcc_assert (smove != NULL_RTX); + +--- a/src/gcc/gimple-fold.c ++++ b/src/gcc/gimple-fold.c +@@ -1151,6 +1151,8 @@ + gimplify_and_update_call_from_tree (gsi, result); + changed = true; + } ++ else if (DECL_BUILT_IN_CLASS (callee) == BUILT_IN_MD) ++ changed |= targetm.gimple_fold_builtin (gsi); + } + + return changed; +--- a/src/gcc/tree-ssa-live.c ++++ b/src/gcc/tree-ssa-live.c +@@ -88,8 +88,12 @@ + as it restricts the sets we compute conflicts for. + Using TREE_TYPE to generate sets is the easies as + type equivalency also holds for SSA names with the same +- underlying decl. */ +- m->base.from = TREE_TYPE (var); ++ underlying decl. ++ ++ Check gimple_can_coalesce_p when changing this code. */ ++ m->base.from = (TYPE_CANONICAL (TREE_TYPE (var)) ++ ? TYPE_CANONICAL (TREE_TYPE (var)) ++ : TREE_TYPE (var)); + /* If base variable hasn't been seen, set it up. */ + slot = (struct tree_int_map **) htab_find_slot (tree_to_index, + m, INSERT); +--- a/src/gcc/lto/ChangeLog.linaro ++++ b/src/gcc/lto/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/po/ChangeLog.linaro ++++ b/src/gcc/po/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/gcc/common.opt ++++ b/src/gcc/common.opt +@@ -2237,13 +2237,33 @@ + Common Report Var(flag_tree_slp_vectorize) Init(2) Optimization + Enable basic block vectorization (SLP) on trees + ++fvect-cost-model= ++Common Joined RejectNegative Enum(vect_cost_model) Var(flag_vect_cost_model) Init(VECT_COST_MODEL_DEFAULT) ++Specifies the cost model for vectorization ++ ++Enum ++Name(vect_cost_model) Type(enum vect_cost_model) UnknownError(unknown vectorizer cost model %qs) ++ ++EnumValue ++Enum(vect_cost_model) String(unlimited) Value(VECT_COST_MODEL_UNLIMITED) ++ ++EnumValue ++Enum(vect_cost_model) String(dynamic) Value(VECT_COST_MODEL_DYNAMIC) ++ ++EnumValue ++Enum(vect_cost_model) String(cheap) Value(VECT_COST_MODEL_CHEAP) ++ + fvect-cost-model +-Common Report Var(flag_vect_cost_model) Optimization +-Enable use of cost model in vectorization ++Common RejectNegative Alias(fvect-cost-model=,dynamic) ++Enables the dynamic vectorizer cost model. Preserved for backward compatibility. + ++fno-vect-cost-model ++Common RejectNegative Alias(fvect-cost-model=,unlimited) ++Enables the unlimited vectorizer cost model. Preserved for backward compatibility. ++ + ftree-vect-loop-version +-Common Report Var(flag_tree_vect_loop_version) Init(1) Optimization +-Enable loop versioning when doing loop vectorization on trees ++Common Ignore ++Does nothing. Preserved for backward compatibility. + + ftree-scev-cprop + Common Report Var(flag_tree_scev_cprop) Init(1) Optimization +--- a/src/gcc/combine.c ++++ b/src/gcc/combine.c +@@ -11996,6 +11996,13 @@ + } + } + ++ /* We may have changed the comparison operands. Re-canonicalize. */ ++ if (swap_commutative_operands_p (op0, op1)) ++ { ++ tem = op0, op0 = op1, op1 = tem; ++ code = swap_condition (code); ++ } ++ + /* If this machine only supports a subset of valid comparisons, see if we + can convert an unsupported one into a supported one. */ + target_canonicalize_comparison (&code, &op0, &op1, 0); +--- a/src/gcc/var-tracking.c ++++ b/src/gcc/var-tracking.c +@@ -5892,7 +5892,8 @@ + { + cselib_val *oval = cselib_lookup (oloc, GET_MODE (oloc), 0, VOIDmode); + +- gcc_assert (oval != v); ++ if (oval == v) ++ return; + gcc_assert (REG_P (oloc) || MEM_P (oloc)); + + if (oval && !cselib_preserved_value_p (oval)) +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -312,7 +312,7 @@ + cpu_type=aarch64 + need_64bit_hwint=yes + extra_headers="arm_neon.h" +- extra_objs="aarch64-builtins.o" ++ extra_objs="aarch64-builtins.o aarch-common.o" + target_has_targetm_common=yes + ;; + alpha*-*-*) +@@ -325,10 +325,12 @@ + ;; + arm*-*-*) + cpu_type=arm +- extra_headers="mmintrin.h arm_neon.h" ++ extra_headers="mmintrin.h arm_neon.h arm_acle.h" ++ extra_objs="aarch-common.o" + target_type_format_char='%' + c_target_objs="arm-c.o" + cxx_target_objs="arm-c.o" ++ need_64bit_hwint=yes + extra_options="${extra_options} arm/arm-tables.opt" + ;; + avr-*-*) +@@ -497,6 +499,9 @@ + fi + + case ${target} in ++aarch64*-*-*) ++ tm_p_file="${tm_p_file} arm/aarch-common-protos.h" ++ ;; + i[34567]86-*-*) + if test "x$with_abi" != x; then + echo "This target does not support --with-abi." +@@ -537,9 +542,13 @@ + fi + tm_file="vxworks-dummy.h ${tm_file}" + ;; +-arm*-*-* | mips*-*-* | sh*-*-* | sparc*-*-*) ++arm*-*-*) ++ tm_p_file="${tm_p_file} arm/aarch-common-protos.h" + tm_file="vxworks-dummy.h ${tm_file}" + ;; ++mips*-*-* | sh*-*-* | sparc*-*-*) ++ tm_file="vxworks-dummy.h ${tm_file}" ++ ;; + esac + + # On a.out targets, we need to use collect2. +@@ -877,7 +886,7 @@ + tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" + ;; + esac +- tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi" ++ tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi arm/t-mlibs" + tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h arm/aout.h vxworks-dummy.h arm/arm.h" + # Define multilib configuration for arm-linux-androideabi. + case ${target} in +@@ -885,10 +894,6 @@ + tmake_file="$tmake_file arm/t-linux-androideabi" + ;; + esac +- # The BPABI long long divmod functions return a 128-bit value in +- # registers r0-r3. Correctly modeling that requires the use of +- # TImode. +- need_64bit_hwint=yes + # The EABI requires the use of __cxa_atexit. + default_use_cxa_atexit=yes + with_tls=${with_tls:-gnu} +@@ -897,10 +902,6 @@ + tm_file="dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/linux-gas.h arm/uclinux-elf.h glibc-stdint.h" + tmake_file="arm/t-arm arm/t-arm-elf arm/t-bpabi" + tm_file="$tm_file arm/bpabi.h arm/uclinux-eabi.h arm/aout.h vxworks-dummy.h arm/arm.h" +- # The BPABI long long divmod functions return a 128-bit value in +- # registers r0-r3. Correctly modeling that requires the use of +- # TImode. +- need_64bit_hwint=yes + # The EABI requires the use of __cxa_atexit. + default_use_cxa_atexit=yes + ;; +@@ -909,10 +910,6 @@ + arm*eb-*-eabi*) + tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" + esac +- # The BPABI long long divmod functions return a 128-bit value in +- # registers r0-r3. Correctly modeling that requires the use of +- # TImode. +- need_64bit_hwint=yes + default_use_cxa_atexit=yes + tm_file="dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/bpabi.h" + tmake_file="arm/t-arm arm/t-arm-elf" +@@ -3341,6 +3338,43 @@ + if test "x$with_arch" != x && test "x$with_cpu" != x; then + echo "Warning: --with-arch overrides --with-cpu=$with_cpu" 1>&2 + fi ++ ++ # Add extra multilibs ++ if test "x$with_multilib_list" != x; then ++ arm_multilibs=`echo $with_multilib_list | sed -e 's/,/ /g'` ++ for arm_multilib in ${arm_multilibs}; do ++ case ${arm_multilib} in ++ aprofile) ++ # Note that arm/t-aprofile is a ++ # stand-alone make file fragment to be ++ # used only with itself. We do not ++ # specifically use the ++ # TM_MULTILIB_OPTION framework because ++ # this shorthand is more ++ # pragmatic. Additionally it is only ++ # designed to work without any ++ # with-cpu, with-arch with-mode ++ # with-fpu or with-float options. ++ if test "x$with_arch" != x \ ++ || test "x$with_cpu" != x \ ++ || test "x$with_float" != x \ ++ || test "x$with_fpu" != x \ ++ || test "x$with_mode" != x ; then ++ echo "Error: You cannot use any of --with-arch/cpu/fpu/float/mode with --with-multilib-list=aprofile" 1>&2 ++ exit 1 ++ fi ++ tmake_file="${tmake_file} arm/t-aprofile" ++ break ++ ;; ++ default) ++ ;; ++ *) ++ echo "Error: --with-multilib-list=${with_multilib_list} not supported." 1>&2 ++ exit 1 ++ ;; ++ esac ++ done ++ fi + ;; + + fr*-*-*linux*) +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -800,10 +800,12 @@ + DEVPHASE := $(srcdir)/DEV-PHASE # experimental, prerelease, "" + DATESTAMP := $(srcdir)/DATESTAMP # YYYYMMDD or empty + REVISION := $(srcdir)/REVISION # [BRANCH revision XXXXXX] ++LINAROVER := $(srcdir)/LINARO-VERSION # M.x-YYYY.MM[-S][~dev] + + BASEVER_c := $(shell cat $(BASEVER)) + DEVPHASE_c := $(shell cat $(DEVPHASE)) + DATESTAMP_c := $(shell cat $(DATESTAMP)) ++LINAROVER_c := $(shell cat $(LINAROVER)) + + ifeq (,$(wildcard $(REVISION))) + REVISION_c := +@@ -824,6 +826,7 @@ + DATESTAMP_s := "\"$(if $(DEVPHASE_c), $(DATESTAMP_c))\"" + PKGVERSION_s:= "\"@PKGVERSION@\"" + BUGURL_s := "\"@REPORT_BUGS_TO@\"" ++LINAROVER_s := "\"$(LINAROVER_c)\"" + + PKGVERSION := @PKGVERSION@ + BUGURL_TEXI := @REPORT_BUGS_TEXI@ +@@ -4017,10 +4020,9 @@ + -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ + @TARGET_SYSTEM_ROOT_DEFINE@ + +-CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) +-cppbuiltin.o: cppbuiltin.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ +- $(TARGET_H) $(TARGET_DEF) $(TREE_H) $(CPP_ID_DATA_H) \ +- cppbuiltin.h version.h Makefile ++CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) \ ++ -DLINAROVER=$(LINAROVER_s) ++cppbuiltin.o: $(BASEVER) $(LINAROVER) + + CFLAGS-cppdefault.o += $(PREPROCESSOR_DEFINES) + cppdefault.o: cppdefault.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ +@@ -4283,7 +4285,8 @@ + gcov.texi trouble.texi bugreport.texi service.texi \ + contribute.texi compat.texi funding.texi gnu.texi gpl_v3.texi \ + fdl.texi contrib.texi cppenv.texi cppopts.texi avr-mmcu.texi \ +- implement-c.texi implement-cxx.texi arm-neon-intrinsics.texi ++ implement-c.texi implement-cxx.texi arm-neon-intrinsics.texi \ ++ arm-acle-intrinsics.texi + + # we explicitly use $(srcdir)/doc/tm.texi here to avoid confusion with + # the generated tm.texi; the latter might have a more recent timestamp, +--- a/src/gcc/gimple.h ++++ b/src/gcc/gimple.h +@@ -130,7 +130,7 @@ + + /* Iterator object for GIMPLE statement sequences. */ + +-typedef struct ++struct gimple_stmt_iterator_d + { + /* Sequence node holding the current statement. */ + gimple_seq_node ptr; +@@ -141,9 +141,8 @@ + block/sequence is removed. */ + gimple_seq *seq; + basic_block bb; +-} gimple_stmt_iterator; ++}; + +- + /* Data structure definitions for GIMPLE tuples. NOTE: word markers + are for 64 bit hosts. */ + +@@ -1036,6 +1035,9 @@ + extern bool useless_type_conversion_p (tree, tree); + extern bool types_compatible_p (tree, tree); + ++/* In tree-ssa-coalesce.c */ ++extern bool gimple_can_coalesce_p (tree, tree); ++ + /* Return the first node in GIMPLE sequence S. */ + + static inline gimple_seq_node +--- a/src/gcc/config/i386/linux-common.h ++++ b/src/gcc/config/i386/linux-common.h +@@ -40,7 +40,7 @@ + #undef LIB_SPEC + #define LIB_SPEC \ + LINUX_OR_ANDROID_LD (GNU_USER_TARGET_LIB_SPEC, \ +- GNU_USER_TARGET_LIB_SPEC " " ANDROID_LIB_SPEC) ++ GNU_USER_TARGET_NO_PTHREADS_LIB_SPEC " " ANDROID_LIB_SPEC) + + #undef STARTFILE_SPEC + #define STARTFILE_SPEC \ +--- a/src/gcc/config/i386/i386.c ++++ b/src/gcc/config/i386/i386.c +@@ -42337,20 +42337,17 @@ + unsigned *cost = (unsigned *) data; + unsigned retval = 0; + +- if (flag_vect_cost_model) +- { +- tree vectype = stmt_info ? stmt_vectype (stmt_info) : NULL_TREE; +- int stmt_cost = ix86_builtin_vectorization_cost (kind, vectype, misalign); ++ tree vectype = stmt_info ? stmt_vectype (stmt_info) : NULL_TREE; ++ int stmt_cost = ix86_builtin_vectorization_cost (kind, vectype, misalign); + +- /* Statements in an inner loop relative to the loop being +- vectorized are weighted more heavily. The value here is +- arbitrary and could potentially be improved with analysis. */ +- if (where == vect_body && stmt_info && stmt_in_inner_loop_p (stmt_info)) +- count *= 50; /* FIXME. */ ++ /* Statements in an inner loop relative to the loop being ++ vectorized are weighted more heavily. The value here is ++ arbitrary and could potentially be improved with analysis. */ ++ if (where == vect_body && stmt_info && stmt_in_inner_loop_p (stmt_info)) ++ count *= 50; /* FIXME. */ + +- retval = (unsigned) (count * stmt_cost); +- cost[where] += retval; +- } ++ retval = (unsigned) (count * stmt_cost); ++ cost[where] += retval; + + return retval; + } +--- a/src/gcc/config/gnu-user.h ++++ b/src/gcc/config/gnu-user.h +@@ -73,10 +73,14 @@ + #undef CPLUSPLUS_CPP_SPEC + #define CPLUSPLUS_CPP_SPEC "-D_GNU_SOURCE %(cpp)" + ++#define GNU_USER_TARGET_NO_PTHREADS_LIB_SPEC \ ++ "%{shared:-lc} \ ++ %{!shared:%{mieee-fp:-lieee} %{profile:-lc_p}%{!profile:-lc}}" ++ + #define GNU_USER_TARGET_LIB_SPEC \ +- "%{pthread:-lpthread} \ +- %{shared:-lc} \ +- %{!shared:%{mieee-fp:-lieee} %{profile:-lc_p}%{!profile:-lc}}" ++ "%{pthread:-lpthread} " \ ++ GNU_USER_TARGET_NO_PTHREADS_LIB_SPEC ++ + #undef LIB_SPEC + #define LIB_SPEC GNU_USER_TARGET_LIB_SPEC + +--- a/src/gcc/config/aarch64/large.md ++++ b/src/gcc/config/aarch64/large.md +@@ -1,312 +0,0 @@ +-;; Copyright (C) 2012-2013 Free Software Foundation, Inc. +-;; +-;; Contributed by ARM Ltd. +-;; +-;; This file is part of GCC. +-;; +-;; GCC is free software; you can redistribute it and/or modify it +-;; under the terms of the GNU General Public License as published by +-;; the Free Software Foundation; either version 3, or (at your option) +-;; any later version. +-;; +-;; GCC is distributed in the hope that it will be useful, but +-;; WITHOUT ANY WARRANTY; without even the implied warranty of +-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-;; General Public License for more details. +-;; +-;; You should have received a copy of the GNU General Public License +-;; along with GCC; see the file COPYING3. If not see +-;; . +- +-;; In the absence of any ARMv8-A implementations, two examples derived +-;; from ARM's most recent ARMv7-A cores (Cortex-A7 and Cortex-A15) are +-;; included by way of example. This is a temporary measure. +- +-;; Example pipeline description for an example 'large' core +-;; implementing AArch64 +- +-;;------------------------------------------------------- +-;; General Description +-;;------------------------------------------------------- +- +-(define_automaton "large_cpu") +- +-;; The core is modelled as a triple issue pipeline that has +-;; the following dispatch units. +-;; 1. Two pipelines for simple integer operations: int1, int2 +-;; 2. Two pipelines for SIMD and FP data-processing operations: fpsimd1, fpsimd2 +-;; 3. One pipeline for branch operations: br +-;; 4. One pipeline for integer multiply and divide operations: multdiv +-;; 5. Two pipelines for load and store operations: ls1, ls2 +-;; +-;; We can issue into three pipelines per-cycle. +-;; +-;; We assume that where we have unit pairs xxx1 is always filled before xxx2. +- +-;;------------------------------------------------------- +-;; CPU Units and Reservations +-;;------------------------------------------------------- +- +-;; The three issue units +-(define_cpu_unit "large_cpu_unit_i1, large_cpu_unit_i2, large_cpu_unit_i3" "large_cpu") +- +-(define_reservation "large_cpu_resv_i1" +- "(large_cpu_unit_i1 | large_cpu_unit_i2 | large_cpu_unit_i3)") +- +-(define_reservation "large_cpu_resv_i2" +- "((large_cpu_unit_i1 + large_cpu_unit_i2) | (large_cpu_unit_i2 + large_cpu_unit_i3))") +- +-(define_reservation "large_cpu_resv_i3" +- "(large_cpu_unit_i1 + large_cpu_unit_i2 + large_cpu_unit_i3)") +- +-(final_presence_set "large_cpu_unit_i2" "large_cpu_unit_i1") +-(final_presence_set "large_cpu_unit_i3" "large_cpu_unit_i2") +- +-;; The main dispatch units +-(define_cpu_unit "large_cpu_unit_int1, large_cpu_unit_int2" "large_cpu") +-(define_cpu_unit "large_cpu_unit_fpsimd1, large_cpu_unit_fpsimd2" "large_cpu") +-(define_cpu_unit "large_cpu_unit_ls1, large_cpu_unit_ls2" "large_cpu") +-(define_cpu_unit "large_cpu_unit_br" "large_cpu") +-(define_cpu_unit "large_cpu_unit_multdiv" "large_cpu") +- +-(define_reservation "large_cpu_resv_ls" "(large_cpu_unit_ls1 | large_cpu_unit_ls2)") +- +-;; The extended load-store pipeline +-(define_cpu_unit "large_cpu_unit_load, large_cpu_unit_store" "large_cpu") +- +-;; The extended ALU pipeline +-(define_cpu_unit "large_cpu_unit_int1_alu, large_cpu_unit_int2_alu" "large_cpu") +-(define_cpu_unit "large_cpu_unit_int1_shf, large_cpu_unit_int2_shf" "large_cpu") +-(define_cpu_unit "large_cpu_unit_int1_sat, large_cpu_unit_int2_sat" "large_cpu") +- +- +-;;------------------------------------------------------- +-;; Simple ALU Instructions +-;;------------------------------------------------------- +- +-;; Simple ALU operations without shift +-(define_insn_reservation "large_cpu_alu" 2 +- (and (eq_attr "tune" "large") (eq_attr "v8type" "adc,alu,alu_ext")) +- "large_cpu_resv_i1, \ +- (large_cpu_unit_int1, large_cpu_unit_int1_alu) |\ +- (large_cpu_unit_int2, large_cpu_unit_int2_alu)") +- +-(define_insn_reservation "large_cpu_logic" 2 +- (and (eq_attr "tune" "large") (eq_attr "v8type" "logic,logic_imm")) +- "large_cpu_resv_i1, \ +- (large_cpu_unit_int1, large_cpu_unit_int1_alu) |\ +- (large_cpu_unit_int2, large_cpu_unit_int2_alu)") +- +-(define_insn_reservation "large_cpu_shift" 2 +- (and (eq_attr "tune" "large") (eq_attr "v8type" "shift,shift_imm")) +- "large_cpu_resv_i1, \ +- (large_cpu_unit_int1, large_cpu_unit_int1_shf) |\ +- (large_cpu_unit_int2, large_cpu_unit_int2_shf)") +- +-;; Simple ALU operations with immediate shift +-(define_insn_reservation "large_cpu_alu_shift" 3 +- (and (eq_attr "tune" "large") (eq_attr "v8type" "alu_shift")) +- "large_cpu_resv_i1, \ +- (large_cpu_unit_int1, +- large_cpu_unit_int1 + large_cpu_unit_int1_shf, large_cpu_unit_int1_alu) | \ +- (large_cpu_unit_int2, +- large_cpu_unit_int2 + large_cpu_unit_int2_shf, large_cpu_unit_int2_alu)") +- +-(define_insn_reservation "large_cpu_logic_shift" 3 +- (and (eq_attr "tune" "large") (eq_attr "v8type" "logic_shift")) +- "large_cpu_resv_i1, \ +- (large_cpu_unit_int1, large_cpu_unit_int1_alu) |\ +- (large_cpu_unit_int2, large_cpu_unit_int2_alu)") +- +- +-;;------------------------------------------------------- +-;; Multiplication/Division +-;;------------------------------------------------------- +- +-;; Simple multiplication +-(define_insn_reservation "large_cpu_mult_single" 3 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "SI"))) +- "large_cpu_resv_i1, large_cpu_unit_multdiv") +- +-(define_insn_reservation "large_cpu_mult_double" 4 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "DI"))) +- "large_cpu_resv_i1, large_cpu_unit_multdiv") +- +-;; 64-bit multiplication +-(define_insn_reservation "large_cpu_mull" 4 +- (and (eq_attr "tune" "large") (eq_attr "v8type" "mull,mulh,maddl")) +- "large_cpu_resv_i1, large_cpu_unit_multdiv * 2") +- +-;; Division +-(define_insn_reservation "large_cpu_udiv_single" 9 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "udiv") (eq_attr "mode" "SI"))) +- "large_cpu_resv_i1, large_cpu_unit_multdiv") +- +-(define_insn_reservation "large_cpu_udiv_double" 18 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "udiv") (eq_attr "mode" "DI"))) +- "large_cpu_resv_i1, large_cpu_unit_multdiv") +- +-(define_insn_reservation "large_cpu_sdiv_single" 10 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "SI"))) +- "large_cpu_resv_i1, large_cpu_unit_multdiv") +- +-(define_insn_reservation "large_cpu_sdiv_double" 20 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "DI"))) +- "large_cpu_resv_i1, large_cpu_unit_multdiv") +- +- +-;;------------------------------------------------------- +-;; Branches +-;;------------------------------------------------------- +- +-;; Branches take one issue slot. +-;; No latency as there is no result +-(define_insn_reservation "large_cpu_branch" 0 +- (and (eq_attr "tune" "large") (eq_attr "v8type" "branch")) +- "large_cpu_resv_i1, large_cpu_unit_br") +- +- +-;; Calls take up all issue slots, and form a block in the +-;; pipeline. The result however is available the next cycle. +-;; Addition of new units requires this to be updated. +-(define_insn_reservation "large_cpu_call" 1 +- (and (eq_attr "tune" "large") (eq_attr "v8type" "call")) +- "large_cpu_resv_i3 | large_cpu_resv_i2, \ +- large_cpu_unit_int1 + large_cpu_unit_int2 + large_cpu_unit_br + \ +- large_cpu_unit_multdiv + large_cpu_unit_fpsimd1 + large_cpu_unit_fpsimd2 + \ +- large_cpu_unit_ls1 + large_cpu_unit_ls2,\ +- large_cpu_unit_int1_alu + large_cpu_unit_int1_shf + large_cpu_unit_int1_sat + \ +- large_cpu_unit_int2_alu + large_cpu_unit_int2_shf + \ +- large_cpu_unit_int2_sat + large_cpu_unit_load + large_cpu_unit_store") +- +- +-;;------------------------------------------------------- +-;; Load/Store Instructions +-;;------------------------------------------------------- +- +-;; Loads of up to two words. +-(define_insn_reservation "large_cpu_load1" 4 +- (and (eq_attr "tune" "large") (eq_attr "v8type" "load_acq,load1,load2")) +- "large_cpu_resv_i1, large_cpu_resv_ls, large_cpu_unit_load, nothing") +- +-;; Stores of up to two words. +-(define_insn_reservation "large_cpu_store1" 0 +- (and (eq_attr "tune" "large") (eq_attr "v8type" "store_rel,store1,store2")) +- "large_cpu_resv_i1, large_cpu_resv_ls, large_cpu_unit_store") +- +- +-;;------------------------------------------------------- +-;; Floating-point arithmetic. +-;;------------------------------------------------------- +- +-(define_insn_reservation "large_cpu_fpalu" 4 +- (and (eq_attr "tune" "large") +- (eq_attr "v8type" "ffarith,fadd,fccmp,fcvt,fcmp")) +- "large_cpu_resv_i1 + large_cpu_unit_fpsimd1") +- +-(define_insn_reservation "large_cpu_fconst" 3 +- (and (eq_attr "tune" "large") +- (eq_attr "v8type" "fconst")) +- "large_cpu_resv_i1 + large_cpu_unit_fpsimd1") +- +-(define_insn_reservation "large_cpu_fpmuls" 4 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "fmul,fmadd") (eq_attr "mode" "SF"))) +- "large_cpu_resv_i1 + large_cpu_unit_fpsimd1") +- +-(define_insn_reservation "large_cpu_fpmuld" 7 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "fmul,fmadd") (eq_attr "mode" "DF"))) +- "large_cpu_resv_i1 + large_cpu_unit_fpsimd1, large_cpu_unit_fpsimd1 * 2,\ +- large_cpu_resv_i1 + large_cpu_unit_fpsimd1") +- +- +-;;------------------------------------------------------- +-;; Floating-point Division +-;;------------------------------------------------------- +- +-;; Single-precision divide takes 14 cycles to complete, and this +-;; includes the time taken for the special instruction used to collect the +-;; result to travel down the multiply pipeline. +- +-(define_insn_reservation "large_cpu_fdivs" 14 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "SF"))) +- "large_cpu_resv_i1, large_cpu_unit_fpsimd1 * 13") +- +-(define_insn_reservation "large_cpu_fdivd" 29 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "DF"))) +- "large_cpu_resv_i1, large_cpu_unit_fpsimd1 * 28") +- +- +- +-;;------------------------------------------------------- +-;; Floating-point Transfers +-;;------------------------------------------------------- +- +-(define_insn_reservation "large_cpu_i2f" 4 +- (and (eq_attr "tune" "large") +- (eq_attr "v8type" "fmovi2f")) +- "large_cpu_resv_i1") +- +-(define_insn_reservation "large_cpu_f2i" 2 +- (and (eq_attr "tune" "large") +- (eq_attr "v8type" "fmovf2i")) +- "large_cpu_resv_i1") +- +- +-;;------------------------------------------------------- +-;; Floating-point Load/Store +-;;------------------------------------------------------- +- +-(define_insn_reservation "large_cpu_floads" 4 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "fpsimd_load,fpsimd_load2") (eq_attr "mode" "SF"))) +- "large_cpu_resv_i1") +- +-(define_insn_reservation "large_cpu_floadd" 5 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "fpsimd_load,fpsimd_load2") (eq_attr "mode" "DF"))) +- "large_cpu_resv_i1 + large_cpu_unit_br, large_cpu_resv_i1") +- +-(define_insn_reservation "large_cpu_fstores" 0 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "fpsimd_store,fpsimd_store2") (eq_attr "mode" "SF"))) +- "large_cpu_resv_i1") +- +-(define_insn_reservation "large_cpu_fstored" 0 +- (and (eq_attr "tune" "large") +- (and (eq_attr "v8type" "fpsimd_store,fpsimd_store2") (eq_attr "mode" "DF"))) +- "large_cpu_resv_i1 + large_cpu_unit_br, large_cpu_resv_i1") +- +- +-;;------------------------------------------------------- +-;; Bypasses +-;;------------------------------------------------------- +- +-(define_bypass 1 "large_cpu_alu, large_cpu_logic, large_cpu_shift" +- "large_cpu_alu, large_cpu_alu_shift, large_cpu_logic, large_cpu_logic_shift, large_cpu_shift") +- +-(define_bypass 2 "large_cpu_alu_shift, large_cpu_logic_shift" +- "large_cpu_alu, large_cpu_alu_shift, large_cpu_logic, large_cpu_logic_shift, large_cpu_shift") +- +-(define_bypass 1 "large_cpu_alu, large_cpu_logic, large_cpu_shift" "large_cpu_load1") +- +-(define_bypass 2 "large_cpu_alu_shift, large_cpu_logic_shift" "large_cpu_load1") +- +-(define_bypass 2 "large_cpu_floads" +- "large_cpu_fpalu, large_cpu_fpmuld,\ +- large_cpu_fdivs, large_cpu_fdivd,\ +- large_cpu_f2i") +- +-(define_bypass 3 "large_cpu_floadd" +- "large_cpu_fpalu, large_cpu_fpmuld,\ +- large_cpu_fdivs, large_cpu_fdivd,\ +- large_cpu_f2i") +--- a/src/gcc/config/aarch64/aarch64-generic.md ++++ b/src/gcc/config/aarch64/aarch64-generic.md +@@ -1,38 +0,0 @@ +-;; Machine description for AArch64 architecture. +-;; Copyright (C) 2009-2013 Free Software Foundation, Inc. +-;; Contributed by ARM Ltd. +-;; +-;; This file is part of GCC. +-;; +-;; GCC is free software; you can redistribute it and/or modify it +-;; under the terms of the GNU General Public License as published by +-;; the Free Software Foundation; either version 3, or (at your option) +-;; any later version. +-;; +-;; GCC is distributed in the hope that it will be useful, but +-;; WITHOUT ANY WARRANTY; without even the implied warranty of +-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-;; General Public License for more details. +-;; +-;; You should have received a copy of the GNU General Public License +-;; along with GCC; see the file COPYING3. If not see +-;; . +- +-;; Generic scheduler +- +-(define_automaton "aarch64") +- +-(define_cpu_unit "core" "aarch64") +- +-(define_attr "is_load" "yes,no" +- (if_then_else (eq_attr "v8type" "fpsimd_load,fpsimd_load2,load1,load2") +- (const_string "yes") +- (const_string "no"))) +- +-(define_insn_reservation "load" 2 +- (eq_attr "is_load" "yes") +- "core") +- +-(define_insn_reservation "nonload" 1 +- (eq_attr "is_load" "no") +- "core") +--- a/src/gcc/config/aarch64/small.md ++++ b/src/gcc/config/aarch64/small.md +@@ -1,287 +0,0 @@ +-;; Copyright (C) 2012-2013 Free Software Foundation, Inc. +-;; +-;; Contributed by ARM Ltd. +-;; +-;; This file is part of GCC. +-;; +-;; GCC is free software; you can redistribute it and/or modify it +-;; under the terms of the GNU General Public License as published by +-;; the Free Software Foundation; either version 3, or (at your option) +-;; any later version. +-;; +-;; GCC is distributed in the hope that it will be useful, but +-;; WITHOUT ANY WARRANTY; without even the implied warranty of +-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-;; General Public License for more details. +-;; +-;; You should have received a copy of the GNU General Public License +-;; along with GCC; see the file COPYING3. If not see +-;; . +- +-;; In the absence of any ARMv8-A implementations, two examples derived +-;; from ARM's most recent ARMv7-A cores (Cortex-A7 and Cortex-A15) are +-;; included by way of example. This is a temporary measure. +- +-;; Example pipeline description for an example 'small' core +-;; implementing AArch64 +- +-;;------------------------------------------------------- +-;; General Description +-;;------------------------------------------------------- +- +-(define_automaton "small_cpu") +- +-;; The core is modelled as a single issue pipeline with the following +-;; dispatch units. +-;; 1. One pipeline for simple intructions. +-;; 2. One pipeline for branch intructions. +-;; +-;; There are five pipeline stages. +-;; The decode/issue stages operate the same for all instructions. +-;; Instructions always advance one stage per cycle in order. +-;; Only branch instructions may dual-issue with other instructions, except +-;; when those instructions take multiple cycles to issue. +- +- +-;;------------------------------------------------------- +-;; CPU Units and Reservations +-;;------------------------------------------------------- +- +-(define_cpu_unit "small_cpu_unit_i" "small_cpu") +-(define_cpu_unit "small_cpu_unit_br" "small_cpu") +- +-;; Pseudo-unit for blocking the multiply pipeline when a double-precision +-;; multiply is in progress. +-(define_cpu_unit "small_cpu_unit_fpmul_pipe" "small_cpu") +- +-;; The floating-point add pipeline, used to model the usage +-;; of the add pipeline by fp alu instructions. +-(define_cpu_unit "small_cpu_unit_fpadd_pipe" "small_cpu") +- +-;; Floating-point division pipeline (long latency, out-of-order completion). +-(define_cpu_unit "small_cpu_unit_fpdiv" "small_cpu") +- +- +-;;------------------------------------------------------- +-;; Simple ALU Instructions +-;;------------------------------------------------------- +- +-;; Simple ALU operations without shift +-(define_insn_reservation "small_cpu_alu" 2 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "adc,alu,alu_ext")) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_logic" 2 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "logic,logic_imm")) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_shift" 2 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "shift,shift_imm")) +- "small_cpu_unit_i") +- +-;; Simple ALU operations with immediate shift +-(define_insn_reservation "small_cpu_alu_shift" 2 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "alu_shift")) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_logic_shift" 2 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "logic_shift")) +- "small_cpu_unit_i") +- +- +-;;------------------------------------------------------- +-;; Multiplication/Division +-;;------------------------------------------------------- +- +-;; Simple multiplication +-(define_insn_reservation "small_cpu_mult_single" 2 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "SI"))) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_mult_double" 3 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "DI"))) +- "small_cpu_unit_i") +- +-;; 64-bit multiplication +-(define_insn_reservation "small_cpu_mull" 3 +- (and (eq_attr "tune" "small") (eq_attr "v8type" "mull,mulh,maddl")) +- "small_cpu_unit_i * 2") +- +-;; Division +-(define_insn_reservation "small_cpu_udiv_single" 5 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "udiv") (eq_attr "mode" "SI"))) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_udiv_double" 10 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "udiv") (eq_attr "mode" "DI"))) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_sdiv_single" 6 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "SI"))) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_sdiv_double" 12 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "DI"))) +- "small_cpu_unit_i") +- +- +-;;------------------------------------------------------- +-;; Load/Store Instructions +-;;------------------------------------------------------- +- +-(define_insn_reservation "small_cpu_load1" 2 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "load_acq,load1")) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_store1" 0 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "store_rel,store1")) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_load2" 3 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "load2")) +- "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_store2" 0 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "store2")) +- "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") +- +- +-;;------------------------------------------------------- +-;; Branches +-;;------------------------------------------------------- +- +-;; Direct branches are the only instructions that can dual-issue. +-;; The latency here represents when the branch actually takes place. +- +-(define_insn_reservation "small_cpu_unit_br" 3 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "branch,call")) +- "small_cpu_unit_br") +- +- +-;;------------------------------------------------------- +-;; Floating-point arithmetic. +-;;------------------------------------------------------- +- +-(define_insn_reservation "small_cpu_fpalu" 4 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "ffarith,fadd,fccmp,fcvt,fcmp")) +- "small_cpu_unit_i + small_cpu_unit_fpadd_pipe") +- +-(define_insn_reservation "small_cpu_fconst" 3 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "fconst")) +- "small_cpu_unit_i + small_cpu_unit_fpadd_pipe") +- +-(define_insn_reservation "small_cpu_fpmuls" 4 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "fmul") (eq_attr "mode" "SF"))) +- "small_cpu_unit_i + small_cpu_unit_fpmul_pipe") +- +-(define_insn_reservation "small_cpu_fpmuld" 7 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "fmul") (eq_attr "mode" "DF"))) +- "small_cpu_unit_i + small_cpu_unit_fpmul_pipe, small_cpu_unit_fpmul_pipe * 2,\ +- small_cpu_unit_i + small_cpu_unit_fpmul_pipe") +- +- +-;;------------------------------------------------------- +-;; Floating-point Division +-;;------------------------------------------------------- +- +-;; Single-precision divide takes 14 cycles to complete, and this +-;; includes the time taken for the special instruction used to collect the +-;; result to travel down the multiply pipeline. +- +-(define_insn_reservation "small_cpu_fdivs" 14 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "SF"))) +- "small_cpu_unit_i, small_cpu_unit_fpdiv * 13") +- +-(define_insn_reservation "small_cpu_fdivd" 29 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "DF"))) +- "small_cpu_unit_i, small_cpu_unit_fpdiv * 28") +- +- +-;;------------------------------------------------------- +-;; Floating-point Transfers +-;;------------------------------------------------------- +- +-(define_insn_reservation "small_cpu_i2f" 4 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "fmovi2f")) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_f2i" 2 +- (and (eq_attr "tune" "small") +- (eq_attr "v8type" "fmovf2i")) +- "small_cpu_unit_i") +- +- +-;;------------------------------------------------------- +-;; Floating-point Load/Store +-;;------------------------------------------------------- +- +-(define_insn_reservation "small_cpu_floads" 4 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "SF"))) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_floadd" 5 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "DF"))) +- "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_fstores" 0 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "SF"))) +- "small_cpu_unit_i") +- +-(define_insn_reservation "small_cpu_fstored" 0 +- (and (eq_attr "tune" "small") +- (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "DF"))) +- "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") +- +- +-;;------------------------------------------------------- +-;; Bypasses +-;;------------------------------------------------------- +- +-;; Forwarding path for unshifted operands. +- +-(define_bypass 1 "small_cpu_alu, small_cpu_alu_shift" +- "small_cpu_alu, small_cpu_alu_shift, small_cpu_logic, small_cpu_logic_shift, small_cpu_shift") +- +-(define_bypass 1 "small_cpu_logic, small_cpu_logic_shift" +- "small_cpu_alu, small_cpu_alu_shift, small_cpu_logic, small_cpu_logic_shift, small_cpu_shift") +- +-(define_bypass 1 "small_cpu_shift" +- "small_cpu_alu, small_cpu_alu_shift, small_cpu_logic, small_cpu_logic_shift, small_cpu_shift") +- +-;; Load-to-use for floating-point values has a penalty of one cycle. +- +-(define_bypass 2 "small_cpu_floads" +- "small_cpu_fpalu, small_cpu_fpmuld,\ +- small_cpu_fdivs, small_cpu_fdivd,\ +- small_cpu_f2i") +- +-(define_bypass 3 "small_cpu_floadd" +- "small_cpu_fpalu, small_cpu_fpmuld,\ +- small_cpu_fdivs, small_cpu_fdivd,\ +- small_cpu_f2i") +--- a/src/gcc/config/aarch64/aarch64-simd.md ++++ b/src/gcc/config/aarch64/aarch64-simd.md +@@ -18,298 +18,6 @@ + ;; along with GCC; see the file COPYING3. If not see + ;; . + +- +-; Main data types used by the insntructions +- +-(define_attr "simd_mode" "unknown,none,V8QI,V16QI,V4HI,V8HI,V2SI,V4SI,V2DI,V2SF,V4SF,V2DF,OI,CI,XI,DI,DF,SI,SF,HI,QI" +- (const_string "unknown")) +- +- +-; Classification of AdvSIMD instructions for scheduling purposes. +-; Do not set this attribute and the "v8type" attribute together in +-; any instruction pattern. +- +-; simd_abd integer absolute difference and accumulate. +-; simd_abdl integer absolute difference and accumulate (long). +-; simd_adal integer add and accumulate (long). +-; simd_add integer addition/subtraction. +-; simd_addl integer addition/subtraction (long). +-; simd_addlv across lanes integer sum (long). +-; simd_addn integer addition/subtraction (narrow). +-; simd_addn2 integer addition/subtraction (narrow, high). +-; simd_addv across lanes integer sum. +-; simd_cls count leading sign/zero bits. +-; simd_cmp compare / create mask. +-; simd_cnt population count. +-; simd_dup duplicate element. +-; simd_dupgp duplicate general purpose register. +-; simd_ext bitwise extract from pair. +-; simd_fadd floating point add/sub. +-; simd_fcmp floating point compare. +-; simd_fcvti floating point convert to integer. +-; simd_fcvtl floating-point convert upsize. +-; simd_fcvtn floating-point convert downsize (narrow). +-; simd_fcvtn2 floating-point convert downsize (narrow, high). +-; simd_fdiv floating point division. +-; simd_fminmax floating point min/max. +-; simd_fminmaxv across lanes floating point min/max. +-; simd_fmla floating point multiply-add. +-; simd_fmla_elt floating point multiply-add (by element). +-; simd_fmul floating point multiply. +-; simd_fmul_elt floating point multiply (by element). +-; simd_fnegabs floating point neg/abs. +-; simd_frcpe floating point reciprocal estimate. +-; simd_frcps floating point reciprocal step. +-; simd_frecx floating point reciprocal exponent. +-; simd_frint floating point round to integer. +-; simd_fsqrt floating point square root. +-; simd_icvtf integer convert to floating point. +-; simd_ins insert element. +-; simd_insgp insert general purpose register. +-; simd_load1 load multiple structures to one register (LD1). +-; simd_load1r load single structure to all lanes of one register (LD1R). +-; simd_load1s load single structure to one lane of one register (LD1 [index]). +-; simd_load2 load multiple structures to two registers (LD1, LD2). +-; simd_load2r load single structure to all lanes of two registers (LD1R, LD2R). +-; simd_load2s load single structure to one lane of two registers (LD2 [index]). +-; simd_load3 load multiple structures to three registers (LD1, LD3). +-; simd_load3r load single structure to all lanes of three registers (LD3R). +-; simd_load3s load single structure to one lane of three registers (LD3 [index]). +-; simd_load4 load multiple structures to four registers (LD1, LD2, LD4). +-; simd_load4r load single structure to all lanes of four registers (LD4R). +-; simd_load4s load single structure to one lane of four registers (LD4 [index]). +-; simd_logic logical operation. +-; simd_logic_imm logcial operation (immediate). +-; simd_minmax integer min/max. +-; simd_minmaxv across lanes integer min/max, +-; simd_mla integer multiply-accumulate. +-; simd_mla_elt integer multiply-accumulate (by element). +-; simd_mlal integer multiply-accumulate (long). +-; simd_mlal_elt integer multiply-accumulate (by element, long). +-; simd_move move register. +-; simd_move_imm move immediate. +-; simd_movgp move element to general purpose register. +-; simd_mul integer multiply. +-; simd_mul_elt integer multiply (by element). +-; simd_mull integer multiply (long). +-; simd_mull_elt integer multiply (by element, long). +-; simd_negabs integer negate/absolute. +-; simd_rbit bitwise reverse. +-; simd_rcpe integer reciprocal estimate. +-; simd_rcps integer reciprocal square root. +-; simd_rev element reverse. +-; simd_sat_add integer saturating addition/subtraction. +-; simd_sat_mlal integer saturating multiply-accumulate (long). +-; simd_sat_mlal_elt integer saturating multiply-accumulate (by element, long). +-; simd_sat_mul integer saturating multiply. +-; simd_sat_mul_elt integer saturating multiply (by element). +-; simd_sat_mull integer saturating multiply (long). +-; simd_sat_mull_elt integer saturating multiply (by element, long). +-; simd_sat_negabs integer saturating negate/absolute. +-; simd_sat_shift integer saturating shift. +-; simd_sat_shift_imm integer saturating shift (immediate). +-; simd_sat_shiftn_imm integer saturating shift (narrow, immediate). +-; simd_sat_shiftn2_imm integer saturating shift (narrow, high, immediate). +-; simd_shift shift register/vector. +-; simd_shift_acc shift accumulate. +-; simd_shift_imm shift immediate. +-; simd_shift_imm_acc shift immediate and accumualte. +-; simd_shiftl shift register/vector (long). +-; simd_shiftl_imm shift register/vector (long, immediate). +-; simd_shiftn_imm shift register/vector (narrow, immediate). +-; simd_shiftn2_imm shift register/vector (narrow, high, immediate). +-; simd_store1 store multiple structures from one register (ST1). +-; simd_store1s store single structure from one lane of one register (ST1 [index]). +-; simd_store2 store multiple structures from two registers (ST1, ST2). +-; simd_store2s store single structure from one lane of two registers (ST2 [index]). +-; simd_store3 store multiple structures from three registers (ST1, ST3). +-; simd_store3s store single structure from one lane of three register (ST3 [index]). +-; simd_store4 store multiple structures from four registers (ST1, ST2, ST4). +-; simd_store4s store single structure from one lane for four registers (ST4 [index]). +-; simd_tbl table lookup. +-; simd_trn transpose. +-; simd_uzp unzip. +-; simd_zip zip. +- +-(define_attr "simd_type" +- "simd_abd,\ +- simd_abdl,\ +- simd_adal,\ +- simd_add,\ +- simd_addl,\ +- simd_addlv,\ +- simd_addn,\ +- simd_addn2,\ +- simd_addv,\ +- simd_cls,\ +- simd_cmp,\ +- simd_cnt,\ +- simd_dup,\ +- simd_dupgp,\ +- simd_ext,\ +- simd_fadd,\ +- simd_fcmp,\ +- simd_fcvti,\ +- simd_fcvtl,\ +- simd_fcvtn,\ +- simd_fcvtn2,\ +- simd_fdiv,\ +- simd_fminmax,\ +- simd_fminmaxv,\ +- simd_fmla,\ +- simd_fmla_elt,\ +- simd_fmul,\ +- simd_fmul_elt,\ +- simd_fnegabs,\ +- simd_frcpe,\ +- simd_frcps,\ +- simd_frecx,\ +- simd_frint,\ +- simd_fsqrt,\ +- simd_icvtf,\ +- simd_ins,\ +- simd_insgp,\ +- simd_load1,\ +- simd_load1r,\ +- simd_load1s,\ +- simd_load2,\ +- simd_load2r,\ +- simd_load2s,\ +- simd_load3,\ +- simd_load3r,\ +- simd_load3s,\ +- simd_load4,\ +- simd_load4r,\ +- simd_load4s,\ +- simd_logic,\ +- simd_logic_imm,\ +- simd_minmax,\ +- simd_minmaxv,\ +- simd_mla,\ +- simd_mla_elt,\ +- simd_mlal,\ +- simd_mlal_elt,\ +- simd_movgp,\ +- simd_move,\ +- simd_move_imm,\ +- simd_mul,\ +- simd_mul_elt,\ +- simd_mull,\ +- simd_mull_elt,\ +- simd_negabs,\ +- simd_rbit,\ +- simd_rcpe,\ +- simd_rcps,\ +- simd_rev,\ +- simd_sat_add,\ +- simd_sat_mlal,\ +- simd_sat_mlal_elt,\ +- simd_sat_mul,\ +- simd_sat_mul_elt,\ +- simd_sat_mull,\ +- simd_sat_mull_elt,\ +- simd_sat_negabs,\ +- simd_sat_shift,\ +- simd_sat_shift_imm,\ +- simd_sat_shiftn_imm,\ +- simd_sat_shiftn2_imm,\ +- simd_shift,\ +- simd_shift_acc,\ +- simd_shift_imm,\ +- simd_shift_imm_acc,\ +- simd_shiftl,\ +- simd_shiftl_imm,\ +- simd_shiftn_imm,\ +- simd_shiftn2_imm,\ +- simd_store1,\ +- simd_store1s,\ +- simd_store2,\ +- simd_store2s,\ +- simd_store3,\ +- simd_store3s,\ +- simd_store4,\ +- simd_store4s,\ +- simd_tbl,\ +- simd_trn,\ +- simd_uzp,\ +- simd_zip,\ +- none" +- (const_string "none")) +- +- +-; The "neon_type" attribute is used by the AArch32 backend. Below is a mapping +-; from "simd_type" to "neon_type". +- +-(define_attr "neon_type" +- "neon_int_1,neon_int_2,neon_int_3,neon_int_4,neon_int_5,neon_vqneg_vqabs, +- neon_vmov,neon_vaba,neon_vsma,neon_vaba_qqq, +- neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,neon_mul_qqq_8_16_32_ddd_32, +- neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar, +- neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,neon_mla_qqq_8_16, +- neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long, +- neon_mla_qqq_32_qqd_32_scalar,neon_mul_ddd_16_scalar_32_16_long_scalar, +- neon_mul_qqd_32_scalar,neon_mla_ddd_16_scalar_qdd_32_16_long_scalar, +- neon_shift_1,neon_shift_2,neon_shift_3,neon_vshl_ddd, +- neon_vqshl_vrshl_vqrshl_qqq,neon_vsra_vrsra,neon_fp_vadd_ddd_vabs_dd, +- neon_fp_vadd_qqq_vabs_qq,neon_fp_vsum,neon_fp_vmul_ddd,neon_fp_vmul_qqd, +- neon_fp_vmla_ddd,neon_fp_vmla_qqq,neon_fp_vmla_ddd_scalar, +- neon_fp_vmla_qqq_scalar,neon_fp_vrecps_vrsqrts_ddd, +- neon_fp_vrecps_vrsqrts_qqq,neon_bp_simple,neon_bp_2cycle,neon_bp_3cycle, +- neon_ldr,neon_str,neon_vld1_1_2_regs,neon_vld1_3_4_regs, +- neon_vld2_2_regs_vld1_vld2_all_lanes,neon_vld2_4_regs,neon_vld3_vld4, +- neon_vst1_1_2_regs_vst2_2_regs,neon_vst1_3_4_regs, +- neon_vst2_4_regs_vst3_vst4,neon_vst3_vst4,neon_vld1_vld2_lane, +- neon_vld3_vld4_lane,neon_vst1_vst2_lane,neon_vst3_vst4_lane, +- neon_vld3_vld4_all_lanes,neon_mcr,neon_mcr_2_mcrr,neon_mrc,neon_mrrc, +- neon_ldm_2,neon_stm_2,none,unknown" +- (cond [ +- (eq_attr "simd_type" "simd_dup") (const_string "neon_bp_simple") +- (eq_attr "simd_type" "simd_movgp") (const_string "neon_bp_simple") +- (eq_attr "simd_type" "simd_add,simd_logic,simd_logic_imm") (const_string "neon_int_1") +- (eq_attr "simd_type" "simd_negabs,simd_addlv") (const_string "neon_int_3") +- (eq_attr "simd_type" "simd_addn,simd_addn2,simd_addl,simd_sat_add,simd_sat_negabs") (const_string "neon_int_4") +- (eq_attr "simd_type" "simd_move") (const_string "neon_vmov") +- (eq_attr "simd_type" "simd_ins") (const_string "neon_mcr") +- (and (eq_attr "simd_type" "simd_mul,simd_sat_mul") (eq_attr "simd_mode" "V8QI,V4HI")) (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") +- (and (eq_attr "simd_type" "simd_mul,simd_sat_mul") (eq_attr "simd_mode" "V2SI,V8QI,V16QI,V2SI")) (const_string "neon_mul_qqq_8_16_32_ddd_32") +- (and (eq_attr "simd_type" "simd_mull,simd_sat_mull") (eq_attr "simd_mode" "V8QI,V16QI,V4HI,V8HI")) (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") +- (and (eq_attr "simd_type" "simd_mull,simd_sat_mull") (eq_attr "simd_mode" "V2SI,V4SI,V2DI")) (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar") +- (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V8QI,V4HI")) (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") +- (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V2SI")) (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long") +- (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V16QI,V8HI")) (const_string "neon_mla_qqq_8_16") +- (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V4SI")) (const_string "neon_mla_qqq_32_qqd_32_scalar") +- (and (eq_attr "simd_type" "simd_mlal") (eq_attr "simd_mode" "V8QI,V16QI,V4HI,V8HI")) (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") +- (and (eq_attr "simd_type" "simd_mlal") (eq_attr "simd_mode" "V2SI,V4SI,V2DI")) (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long") +- (and (eq_attr "simd_type" "simd_fmla") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vmla_ddd") +- (and (eq_attr "simd_type" "simd_fmla") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vmla_qqq") +- (and (eq_attr "simd_type" "simd_fmla_elt") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vmla_ddd_scalar") +- (and (eq_attr "simd_type" "simd_fmla_elt") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vmla_qqq_scalar") +- (and (eq_attr "simd_type" "simd_fmul,simd_fmul_elt,simd_fdiv,simd_fsqrt") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vmul_ddd") +- (and (eq_attr "simd_type" "simd_fmul,simd_fmul_elt,simd_fdiv,simd_fsqrt") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vmul_qqd") +- (and (eq_attr "simd_type" "simd_fadd") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vadd_ddd_vabs_dd") +- (and (eq_attr "simd_type" "simd_fadd") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vadd_qqq_vabs_qq") +- (and (eq_attr "simd_type" "simd_fnegabs,simd_fminmax,simd_fminmaxv") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vadd_ddd_vabs_dd") +- (and (eq_attr "simd_type" "simd_fnegabs,simd_fminmax,simd_fminmaxv") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vadd_qqq_vabs_qq") +- (and (eq_attr "simd_type" "simd_shift,simd_shift_acc") (eq_attr "simd_mode" "V8QI,V4HI,V2SI")) (const_string "neon_vshl_ddd") +- (and (eq_attr "simd_type" "simd_shift,simd_shift_acc") (eq_attr "simd_mode" "V16QI,V8HI,V4SI,V2DI")) (const_string "neon_shift_3") +- (eq_attr "simd_type" "simd_minmax,simd_minmaxv") (const_string "neon_int_5") +- (eq_attr "simd_type" "simd_shiftn_imm,simd_shiftn2_imm,simd_shiftl_imm,") (const_string "neon_shift_1") +- (eq_attr "simd_type" "simd_load1,simd_load2") (const_string "neon_vld1_1_2_regs") +- (eq_attr "simd_type" "simd_load3,simd_load3") (const_string "neon_vld1_3_4_regs") +- (eq_attr "simd_type" "simd_load1r,simd_load2r,simd_load3r,simd_load4r") (const_string "neon_vld2_2_regs_vld1_vld2_all_lanes") +- (eq_attr "simd_type" "simd_load1s,simd_load2s") (const_string "neon_vld1_vld2_lane") +- (eq_attr "simd_type" "simd_load3s,simd_load4s") (const_string "neon_vld3_vld4_lane") +- (eq_attr "simd_type" "simd_store1,simd_store2") (const_string "neon_vst1_1_2_regs_vst2_2_regs") +- (eq_attr "simd_type" "simd_store3,simd_store4") (const_string "neon_vst1_3_4_regs") +- (eq_attr "simd_type" "simd_store1s,simd_store2s") (const_string "neon_vst1_vst2_lane") +- (eq_attr "simd_type" "simd_store3s,simd_store4s") (const_string "neon_vst3_vst4_lane") +- (and (eq_attr "simd_type" "simd_frcpe,simd_frcps") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vrecps_vrsqrts_ddd") +- (and (eq_attr "simd_type" "simd_frcpe,simd_frcps") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vrecps_vrsqrts_qqq") +- (eq_attr "simd_type" "none") (const_string "none") +- ] +- (const_string "unknown"))) +- +- + (define_expand "mov" + [(set (match_operand:VALL 0 "aarch64_simd_nonimmediate_operand" "") + (match_operand:VALL 1 "aarch64_simd_general_operand" ""))] +@@ -338,8 +46,7 @@ + (vec_duplicate:VDQ (match_operand: 1 "register_operand" "r")))] + "TARGET_SIMD" + "dup\\t%0., %1" +- [(set_attr "simd_type" "simd_dupgp") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_from_gp")] + ) + + (define_insn "aarch64_dup_lane" +@@ -351,29 +58,15 @@ + )))] + "TARGET_SIMD" + "dup\\t%0, %1.[%2]" +- [(set_attr "simd_type" "simd_dup") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_dup")] + ) + +-(define_insn "aarch64_dup_lane" +- [(set (match_operand:SDQ_I 0 "register_operand" "=w") +- (vec_select: +- (match_operand: 1 "register_operand" "w") +- (parallel [(match_operand:SI 2 "immediate_operand" "i")]) +- ))] +- "TARGET_SIMD" +- "dup\\t%0, %1.[%2]" +- [(set_attr "simd_type" "simd_dup") +- (set_attr "simd_mode" "")] +-) +- + (define_insn "aarch64_simd_dup" + [(set (match_operand:VDQF 0 "register_operand" "=w") + (vec_duplicate:VDQF (match_operand: 1 "register_operand" "w")))] + "TARGET_SIMD" + "dup\\t%0., %1.[0]" +- [(set_attr "simd_type" "simd_dup") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_dup")] + ) + + (define_insn "*aarch64_simd_mov" +@@ -394,13 +87,14 @@ + case 4: return "ins\t%0.d[0], %1"; + case 5: return "mov\t%0, %1"; + case 6: +- return aarch64_output_simd_mov_immediate (&operands[1], ++ return aarch64_output_simd_mov_immediate (operands[1], + mode, 64); + default: gcc_unreachable (); + } + } +- [(set_attr "simd_type" "simd_load1,simd_store1,simd_move,simd_movgp,simd_insgp,simd_move,simd_move_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_load1_1reg, neon_store1_1reg,\ ++ neon_logic, neon_to_gp, neon_from_gp,\ ++ mov_reg, neon_move")] + ) + + (define_insn "*aarch64_simd_mov" +@@ -414,20 +108,25 @@ + { + switch (which_alternative) + { +- case 0: return "ld1\t{%0.}, %1"; +- case 1: return "st1\t{%1.}, %0"; +- case 2: return "orr\t%0., %1., %1."; +- case 3: return "umov\t%0, %1.d[0]\;umov\t%H0, %1.d[1]"; +- case 4: return "ins\t%0.d[0], %1\;ins\t%0.d[1], %H1"; +- case 5: return "#"; ++ case 0: ++ return "ld1\t{%0.}, %1"; ++ case 1: ++ return "st1\t{%1.}, %0"; ++ case 2: ++ return "orr\t%0., %1., %1."; ++ case 3: ++ case 4: ++ case 5: ++ return "#"; + case 6: +- return aarch64_output_simd_mov_immediate (&operands[1], +- mode, 128); +- default: gcc_unreachable (); ++ return aarch64_output_simd_mov_immediate (operands[1], mode, 128); ++ default: ++ gcc_unreachable (); + } + } +- [(set_attr "simd_type" "simd_load1,simd_store1,simd_move,simd_movgp,simd_insgp,simd_move,simd_move_imm") +- (set_attr "simd_mode" "") ++ [(set_attr "type" "neon_load1_1reg, neon_store1_1reg,\ ++ neon_logic, multiple, multiple, multiple,\ ++ neon_move") + (set_attr "length" "4,4,4,8,8,8,4")] + ) + +@@ -452,6 +151,75 @@ + aarch64_simd_disambiguate_copy (operands, dest, src, 2); + }) + ++(define_split ++ [(set (match_operand:VQ 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" ""))] ++ "TARGET_SIMD && reload_completed ++ && ((FP_REGNUM_P (REGNO (operands[0])) && GP_REGNUM_P (REGNO (operands[1]))) ++ || (GP_REGNUM_P (REGNO (operands[0])) && FP_REGNUM_P (REGNO (operands[1]))))" ++ [(const_int 0)] ++{ ++ aarch64_split_simd_move (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_split_simd_mov" ++ [(set (match_operand:VQ 0) ++ (match_operand:VQ 1))] ++ "TARGET_SIMD" ++ { ++ rtx dst = operands[0]; ++ rtx src = operands[1]; ++ ++ if (GP_REGNUM_P (REGNO (src))) ++ { ++ rtx src_low_part = gen_lowpart (mode, src); ++ rtx src_high_part = gen_highpart (mode, src); ++ ++ emit_insn ++ (gen_move_lo_quad_ (dst, src_low_part)); ++ emit_insn ++ (gen_move_hi_quad_ (dst, src_high_part)); ++ } ++ ++ else ++ { ++ rtx dst_low_part = gen_lowpart (mode, dst); ++ rtx dst_high_part = gen_highpart (mode, dst); ++ rtx lo = aarch64_simd_vect_par_cnst_half (mode, false); ++ rtx hi = aarch64_simd_vect_par_cnst_half (mode, true); ++ ++ emit_insn ++ (gen_aarch64_simd_mov_from_low (dst_low_part, src, lo)); ++ emit_insn ++ (gen_aarch64_simd_mov_from_high (dst_high_part, src, hi)); ++ } ++ DONE; ++ } ++) ++ ++(define_insn "aarch64_simd_mov_from_low" ++ [(set (match_operand: 0 "register_operand" "=r") ++ (vec_select: ++ (match_operand:VQ 1 "register_operand" "w") ++ (match_operand:VQ 2 "vect_par_cnst_lo_half" "")))] ++ "TARGET_SIMD && reload_completed" ++ "umov\t%0, %1.d[0]" ++ [(set_attr "type" "neon_to_gp") ++ (set_attr "length" "4") ++ ]) ++ ++(define_insn "aarch64_simd_mov_from_high" ++ [(set (match_operand: 0 "register_operand" "=r") ++ (vec_select: ++ (match_operand:VQ 1 "register_operand" "w") ++ (match_operand:VQ 2 "vect_par_cnst_hi_half" "")))] ++ "TARGET_SIMD && reload_completed" ++ "umov\t%0, %1.d[1]" ++ [(set_attr "type" "neon_to_gp") ++ (set_attr "length" "4") ++ ]) ++ + (define_insn "orn3" + [(set (match_operand:VDQ 0 "register_operand" "=w") + (ior:VDQ (not:VDQ (match_operand:VDQ 1 "register_operand" "w")) +@@ -458,8 +226,7 @@ + (match_operand:VDQ 2 "register_operand" "w")))] + "TARGET_SIMD" + "orn\t%0., %2., %1." +- [(set_attr "simd_type" "simd_logic") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_logic")] + ) + + (define_insn "bic3" +@@ -468,8 +235,7 @@ + (match_operand:VDQ 2 "register_operand" "w")))] + "TARGET_SIMD" + "bic\t%0., %2., %1." +- [(set_attr "simd_type" "simd_logic") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_logic")] + ) + + (define_insn "add3" +@@ -478,8 +244,7 @@ + (match_operand:VDQ 2 "register_operand" "w")))] + "TARGET_SIMD" + "add\t%0., %1., %2." +- [(set_attr "simd_type" "simd_add") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_add")] + ) + + (define_insn "sub3" +@@ -488,8 +253,7 @@ + (match_operand:VDQ 2 "register_operand" "w")))] + "TARGET_SIMD" + "sub\t%0., %1., %2." +- [(set_attr "simd_type" "simd_add") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sub")] + ) + + (define_insn "mul3" +@@ -498,17 +262,15 @@ + (match_operand:VDQM 2 "register_operand" "w")))] + "TARGET_SIMD" + "mul\t%0., %1., %2." +- [(set_attr "simd_type" "simd_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_mul_")] + ) + + (define_insn "neg2" +- [(set (match_operand:VDQM 0 "register_operand" "=w") +- (neg:VDQM (match_operand:VDQM 1 "register_operand" "w")))] ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (neg:VDQ (match_operand:VDQ 1 "register_operand" "w")))] + "TARGET_SIMD" + "neg\t%0., %1." +- [(set_attr "simd_type" "simd_negabs") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_neg")] + ) + + (define_insn "abs2" +@@ -516,10 +278,50 @@ + (abs:VDQ (match_operand:VDQ 1 "register_operand" "w")))] + "TARGET_SIMD" + "abs\t%0., %1." +- [(set_attr "simd_type" "simd_negabs") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_abs")] + ) + ++(define_insn "abd_3" ++ [(set (match_operand:VDQ_BHSI 0 "register_operand" "=w") ++ (abs:VDQ_BHSI (minus:VDQ_BHSI ++ (match_operand:VDQ_BHSI 1 "register_operand" "w") ++ (match_operand:VDQ_BHSI 2 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "sabd\t%0., %1., %2." ++ [(set_attr "type" "neon_abd")] ++) ++ ++(define_insn "aba_3" ++ [(set (match_operand:VDQ_BHSI 0 "register_operand" "=w") ++ (plus:VDQ_BHSI (abs:VDQ_BHSI (minus:VDQ_BHSI ++ (match_operand:VDQ_BHSI 1 "register_operand" "w") ++ (match_operand:VDQ_BHSI 2 "register_operand" "w"))) ++ (match_operand:VDQ_BHSI 3 "register_operand" "0")))] ++ "TARGET_SIMD" ++ "saba\t%0., %1., %2." ++ [(set_attr "type" "neon_arith_acc")] ++) ++ ++(define_insn "fabd_3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (abs:VDQF (minus:VDQF ++ (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "fabd\t%0., %1., %2." ++ [(set_attr "type" "neon_fp_abd_")] ++) ++ ++(define_insn "*fabd_scalar3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (abs:GPF (minus:GPF ++ (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "fabd\t%0, %1, %2" ++ [(set_attr "type" "neon_fp_abd_")] ++) ++ + (define_insn "and3" + [(set (match_operand:VDQ 0 "register_operand" "=w") + (and:VDQ (match_operand:VDQ 1 "register_operand" "w") +@@ -526,8 +328,7 @@ + (match_operand:VDQ 2 "register_operand" "w")))] + "TARGET_SIMD" + "and\t%0., %1., %2." +- [(set_attr "simd_type" "simd_logic") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_logic")] + ) + + (define_insn "ior3" +@@ -536,8 +337,7 @@ + (match_operand:VDQ 2 "register_operand" "w")))] + "TARGET_SIMD" + "orr\t%0., %1., %2." +- [(set_attr "simd_type" "simd_logic") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_logic")] + ) + + (define_insn "xor3" +@@ -546,8 +346,7 @@ + (match_operand:VDQ 2 "register_operand" "w")))] + "TARGET_SIMD" + "eor\t%0., %1., %2." +- [(set_attr "simd_type" "simd_logic") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_logic")] + ) + + (define_insn "one_cmpl2" +@@ -555,8 +354,7 @@ + (not:VDQ (match_operand:VDQ 1 "register_operand" "w")))] + "TARGET_SIMD" + "not\t%0., %1." +- [(set_attr "simd_type" "simd_logic") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_logic")] + ) + + (define_insn "aarch64_simd_vec_set" +@@ -568,8 +366,7 @@ + (match_operand:SI 2 "immediate_operand" "i")))] + "TARGET_SIMD" + "ins\t%0.[%p2], %w1"; +- [(set_attr "simd_type" "simd_insgp") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_from_gp")] + ) + + (define_insn "aarch64_simd_lshr" +@@ -578,8 +375,7 @@ + (match_operand:VDQ 2 "aarch64_simd_rshift_imm" "Dr")))] + "TARGET_SIMD" + "ushr\t%0., %1., %2" +- [(set_attr "simd_type" "simd_shift_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_imm")] + ) + + (define_insn "aarch64_simd_ashr" +@@ -588,8 +384,7 @@ + (match_operand:VDQ 2 "aarch64_simd_rshift_imm" "Dr")))] + "TARGET_SIMD" + "sshr\t%0., %1., %2" +- [(set_attr "simd_type" "simd_shift_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_imm")] + ) + + (define_insn "aarch64_simd_imm_shl" +@@ -598,8 +393,7 @@ + (match_operand:VDQ 2 "aarch64_simd_lshift_imm" "Dl")))] + "TARGET_SIMD" + "shl\t%0., %1., %2" +- [(set_attr "simd_type" "simd_shift_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_imm")] + ) + + (define_insn "aarch64_simd_reg_sshl" +@@ -608,8 +402,7 @@ + (match_operand:VDQ 2 "register_operand" "w")))] + "TARGET_SIMD" + "sshl\t%0., %1., %2." +- [(set_attr "simd_type" "simd_shift") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_reg")] + ) + + (define_insn "aarch64_simd_reg_shl_unsigned" +@@ -619,8 +412,7 @@ + UNSPEC_ASHIFT_UNSIGNED))] + "TARGET_SIMD" + "ushl\t%0., %1., %2." +- [(set_attr "simd_type" "simd_shift") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_reg")] + ) + + (define_insn "aarch64_simd_reg_shl_signed" +@@ -630,8 +422,7 @@ + UNSPEC_ASHIFT_SIGNED))] + "TARGET_SIMD" + "sshl\t%0., %1., %2." +- [(set_attr "simd_type" "simd_shift") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_reg")] + ) + + (define_expand "ashl3" +@@ -837,8 +628,7 @@ + (match_operand:SI 2 "immediate_operand" "i")))] + "TARGET_SIMD" + "ins\t%0.d[%p2], %1"; +- [(set_attr "simd_type" "simd_insgp") +- (set_attr "simd_mode" "V2DI")] ++ [(set_attr "type" "neon_from_gp")] + ) + + (define_expand "vec_setv2di" +@@ -863,8 +653,7 @@ + (match_operand:SI 2 "immediate_operand" "i")))] + "TARGET_SIMD" + "ins\t%0.[%p2], %1.[0]"; +- [(set_attr "simd_type" "simd_ins") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_ins")] + ) + + (define_expand "vec_set" +@@ -888,8 +677,7 @@ + (match_operand:VQ_S 1 "register_operand" "0")))] + "TARGET_SIMD" + "mla\t%0., %2., %3." +- [(set_attr "simd_type" "simd_mla") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_mla_")] + ) + + (define_insn "aarch64_mls" +@@ -899,47 +687,52 @@ + (match_operand:VQ_S 3 "register_operand" "w"))))] + "TARGET_SIMD" + "mls\t%0., %2., %3." +- [(set_attr "simd_type" "simd_mla") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_mla_")] + ) + + ;; Max/Min operations. +-(define_insn "3" ++(define_insn "3" + [(set (match_operand:VQ_S 0 "register_operand" "=w") + (MAXMIN:VQ_S (match_operand:VQ_S 1 "register_operand" "w") + (match_operand:VQ_S 2 "register_operand" "w")))] + "TARGET_SIMD" +- "\t%0., %1., %2." +- [(set_attr "simd_type" "simd_minmax") +- (set_attr "simd_mode" "")] ++ "\t%0., %1., %2." ++ [(set_attr "type" "neon_minmax")] + ) + + ;; Move into low-half clearing high half to 0. + + (define_insn "move_lo_quad_" +- [(set (match_operand:VQ 0 "register_operand" "=w") ++ [(set (match_operand:VQ 0 "register_operand" "=w,w,w") + (vec_concat:VQ +- (match_operand: 1 "register_operand" "w") ++ (match_operand: 1 "register_operand" "w,r,r") + (vec_duplicate: (const_int 0))))] + "TARGET_SIMD" +- "mov\\t%d0, %d1"; +- [(set_attr "simd_type" "simd_dup") +- (set_attr "simd_mode" "")] ++ "@ ++ dup\\t%d0, %1.d[0] ++ fmov\\t%d0, %1 ++ dup\\t%d0, %1" ++ [(set_attr "type" "neon_dup,fmov,neon_dup") ++ (set_attr "simd" "yes,*,yes") ++ (set_attr "fp" "*,yes,*") ++ (set_attr "length" "4")] + ) + + ;; Move into high-half. + + (define_insn "aarch64_simd_move_hi_quad_" +- [(set (match_operand:VQ 0 "register_operand" "+w") ++ [(set (match_operand:VQ 0 "register_operand" "+w,w") + (vec_concat:VQ + (vec_select: + (match_dup 0) + (match_operand:VQ 2 "vect_par_cnst_lo_half" "")) +- (match_operand: 1 "register_operand" "w")))] ++ (match_operand: 1 "register_operand" "w,r")))] + "TARGET_SIMD" +- "ins\\t%0.d[1], %1.d[0]"; +- [(set_attr "simd_type" "simd_ins") +- (set_attr "simd_mode" "")] ++ "@ ++ ins\\t%0.d[1], %1.d[0] ++ ins\\t%0.d[1], %1" ++ [(set_attr "type" "neon_ins") ++ (set_attr "length" "4")] + ) + + (define_expand "move_hi_quad_" +@@ -961,8 +754,7 @@ + (truncate: (match_operand:VQN 1 "register_operand" "w")))] + "TARGET_SIMD" + "xtn\\t%0., %1." +- [(set_attr "simd_type" "simd_shiftn_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_imm_narrow_q")] + ) + + (define_expand "vec_pack_trunc_" +@@ -988,8 +780,7 @@ + (truncate: (match_operand:VQN 2 "register_operand" "w"))))] + "TARGET_SIMD" + "xtn\\t%0., %1.\;xtn2\\t%0., %2." +- [(set_attr "simd_type" "simd_shiftn2_imm") +- (set_attr "simd_mode" "") ++ [(set_attr "type" "multiple") + (set_attr "length" "8")] + ) + +@@ -1003,8 +794,7 @@ + )))] + "TARGET_SIMD" + "shll %0., %1., 0" +- [(set_attr "simd_type" "simd_shiftl_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_imm_long")] + ) + + (define_insn "aarch64_simd_vec_unpack_hi_" +@@ -1015,8 +805,7 @@ + )))] + "TARGET_SIMD" + "shll2 %0., %1., 0" +- [(set_attr "simd_type" "simd_shiftl_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_imm_long")] + ) + + (define_expand "vec_unpack_hi_" +@@ -1045,6 +834,98 @@ + + ;; Widening arithmetic. + ++(define_insn "*aarch64_mlal_lo" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (plus: ++ (mult: ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_lo_half" ""))) ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 4 "register_operand" "w") ++ (match_dup 3)))) ++ (match_operand: 1 "register_operand" "0")))] ++ "TARGET_SIMD" ++ "mlal\t%0., %2., %4." ++ [(set_attr "type" "neon_mla__long")] ++) ++ ++(define_insn "*aarch64_mlal_hi" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (plus: ++ (mult: ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_hi_half" ""))) ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 4 "register_operand" "w") ++ (match_dup 3)))) ++ (match_operand: 1 "register_operand" "0")))] ++ "TARGET_SIMD" ++ "mlal2\t%0., %2., %4." ++ [(set_attr "type" "neon_mla__long")] ++) ++ ++(define_insn "*aarch64_mlsl_lo" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (minus: ++ (match_operand: 1 "register_operand" "0") ++ (mult: ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_lo_half" ""))) ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 4 "register_operand" "w") ++ (match_dup 3))))))] ++ "TARGET_SIMD" ++ "mlsl\t%0., %2., %4." ++ [(set_attr "type" "neon_mla__long")] ++) ++ ++(define_insn "*aarch64_mlsl_hi" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (minus: ++ (match_operand: 1 "register_operand" "0") ++ (mult: ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_hi_half" ""))) ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 4 "register_operand" "w") ++ (match_dup 3))))))] ++ "TARGET_SIMD" ++ "mlsl2\t%0., %2., %4." ++ [(set_attr "type" "neon_mla__long")] ++) ++ ++(define_insn "*aarch64_mlal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (plus: ++ (mult: ++ (ANY_EXTEND: ++ (match_operand:VDW 1 "register_operand" "w")) ++ (ANY_EXTEND: ++ (match_operand:VDW 2 "register_operand" "w"))) ++ (match_operand: 3 "register_operand" "0")))] ++ "TARGET_SIMD" ++ "mlal\t%0., %1., %2." ++ [(set_attr "type" "neon_mla__long")] ++) ++ ++(define_insn "*aarch64_mlsl" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (minus: ++ (match_operand: 1 "register_operand" "0") ++ (mult: ++ (ANY_EXTEND: ++ (match_operand:VDW 2 "register_operand" "w")) ++ (ANY_EXTEND: ++ (match_operand:VDW 3 "register_operand" "w")))))] ++ "TARGET_SIMD" ++ "mlsl\t%0., %2., %3." ++ [(set_attr "type" "neon_mla__long")] ++) ++ + (define_insn "aarch64_simd_vec_mult_lo_" + [(set (match_operand: 0 "register_operand" "=w") + (mult: (ANY_EXTEND: (vec_select: +@@ -1055,8 +936,7 @@ + (match_dup 3)))))] + "TARGET_SIMD" + "mull\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_mull") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_mul__long")] + ) + + (define_expand "vec_widen_mult_lo_" +@@ -1083,8 +963,7 @@ + (match_dup 3)))))] + "TARGET_SIMD" + "mull2\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_mull") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_mul__long")] + ) + + (define_expand "vec_widen_mult_hi_" +@@ -1133,8 +1012,7 @@ + (match_operand:VDQF 2 "register_operand" "w")))] + "TARGET_SIMD" + "fadd\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_fadd") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_addsub_")] + ) + + (define_insn "sub3" +@@ -1143,8 +1021,7 @@ + (match_operand:VDQF 2 "register_operand" "w")))] + "TARGET_SIMD" + "fsub\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_fadd") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_addsub_")] + ) + + (define_insn "mul3" +@@ -1153,8 +1030,7 @@ + (match_operand:VDQF 2 "register_operand" "w")))] + "TARGET_SIMD" + "fmul\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_fmul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_mul_")] + ) + + (define_insn "div3" +@@ -1163,8 +1039,7 @@ + (match_operand:VDQF 2 "register_operand" "w")))] + "TARGET_SIMD" + "fdiv\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_fdiv") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_div_")] + ) + + (define_insn "neg2" +@@ -1172,8 +1047,7 @@ + (neg:VDQF (match_operand:VDQF 1 "register_operand" "w")))] + "TARGET_SIMD" + "fneg\\t%0., %1." +- [(set_attr "simd_type" "simd_fnegabs") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_neg_")] + ) + + (define_insn "abs2" +@@ -1181,8 +1055,7 @@ + (abs:VDQF (match_operand:VDQF 1 "register_operand" "w")))] + "TARGET_SIMD" + "fabs\\t%0., %1." +- [(set_attr "simd_type" "simd_fnegabs") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_abs_")] + ) + + (define_insn "fma4" +@@ -1192,30 +1065,23 @@ + (match_operand:VDQF 3 "register_operand" "0")))] + "TARGET_SIMD" + "fmla\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_fmla") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_mla_")] + ) + +-(define_insn "aarch64_frint" ++;; Vector versions of the floating-point frint patterns. ++;; Expands to btrunc, ceil, floor, nearbyint, rint, round. ++(define_insn "2" + [(set (match_operand:VDQF 0 "register_operand" "=w") + (unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w")] + FRINT))] + "TARGET_SIMD" + "frint\\t%0., %1." +- [(set_attr "simd_type" "simd_frint") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_round_")] + ) + +-;; Vector versions of the floating-point frint patterns. +-;; Expands to btrunc, ceil, floor, nearbyint, rint, round. +-(define_expand "2" +- [(set (match_operand:VDQF 0 "register_operand") +- (unspec:VDQF [(match_operand:VDQF 1 "register_operand")] +- FRINT))] +- "TARGET_SIMD" +- {}) +- +-(define_insn "aarch64_fcvt" ++;; Vector versions of the fcvt standard patterns. ++;; Expands to lbtrunc, lround, lceil, lfloor ++(define_insn "l2" + [(set (match_operand: 0 "register_operand" "=w") + (FIXUORS: (unspec: + [(match_operand:VDQF 1 "register_operand" "w")] +@@ -1222,20 +1088,138 @@ + FCVT)))] + "TARGET_SIMD" + "fcvt\\t%0., %1." +- [(set_attr "simd_type" "simd_fcvti") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_to_int_")] + ) + +-;; Vector versions of the fcvt standard patterns. +-;; Expands to lbtrunc, lround, lceil, lfloor +-(define_expand "l2" ++(define_expand "2" + [(set (match_operand: 0 "register_operand") + (FIXUORS: (unspec: + [(match_operand:VDQF 1 "register_operand")] +- FCVT)))] ++ UNSPEC_FRINTZ)))] + "TARGET_SIMD" + {}) + ++(define_expand "2" ++ [(set (match_operand: 0 "register_operand") ++ (FIXUORS: (unspec: ++ [(match_operand:VDQF 1 "register_operand")] ++ UNSPEC_FRINTZ)))] ++ "TARGET_SIMD" ++ {}) ++ ++(define_expand "ftrunc2" ++ [(set (match_operand:VDQF 0 "register_operand") ++ (unspec:VDQF [(match_operand:VDQF 1 "register_operand")] ++ UNSPEC_FRINTZ))] ++ "TARGET_SIMD" ++ {}) ++ ++(define_insn "2" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (FLOATUORS:VDQF ++ (match_operand: 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "cvtf\\t%0., %1." ++ [(set_attr "type" "neon_int_to_fp_")] ++) ++ ++;; Conversions between vectors of floats and doubles. ++;; Contains a mix of patterns to match standard pattern names ++;; and those for intrinsics. ++ ++;; Float widening operations. ++ ++(define_insn "vec_unpacks_lo_v4sf" ++ [(set (match_operand:V2DF 0 "register_operand" "=w") ++ (float_extend:V2DF ++ (vec_select:V2SF ++ (match_operand:V4SF 1 "register_operand" "w") ++ (parallel [(const_int 0) (const_int 1)]) ++ )))] ++ "TARGET_SIMD" ++ "fcvtl\\t%0.2d, %1.2s" ++ [(set_attr "type" "neon_fp_cvt_widen_s")] ++) ++ ++(define_insn "aarch64_float_extend_lo_v2df" ++ [(set (match_operand:V2DF 0 "register_operand" "=w") ++ (float_extend:V2DF ++ (match_operand:V2SF 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fcvtl\\t%0.2d, %1.2s" ++ [(set_attr "type" "neon_fp_cvt_widen_s")] ++) ++ ++(define_insn "vec_unpacks_hi_v4sf" ++ [(set (match_operand:V2DF 0 "register_operand" "=w") ++ (float_extend:V2DF ++ (vec_select:V2SF ++ (match_operand:V4SF 1 "register_operand" "w") ++ (parallel [(const_int 2) (const_int 3)]) ++ )))] ++ "TARGET_SIMD" ++ "fcvtl2\\t%0.2d, %1.4s" ++ [(set_attr "type" "neon_fp_cvt_widen_s")] ++) ++ ++;; Float narrowing operations. ++ ++(define_insn "aarch64_float_truncate_lo_v2sf" ++ [(set (match_operand:V2SF 0 "register_operand" "=w") ++ (float_truncate:V2SF ++ (match_operand:V2DF 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fcvtn\\t%0.2s, %1.2d" ++ [(set_attr "type" "neon_fp_cvt_narrow_d_q")] ++) ++ ++(define_insn "aarch64_float_truncate_hi_v4sf" ++ [(set (match_operand:V4SF 0 "register_operand" "=w") ++ (vec_concat:V4SF ++ (match_operand:V2SF 1 "register_operand" "0") ++ (float_truncate:V2SF ++ (match_operand:V2DF 2 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "fcvtn2\\t%0.4s, %2.2d" ++ [(set_attr "type" "neon_fp_cvt_narrow_d_q")] ++) ++ ++(define_expand "vec_pack_trunc_v2df" ++ [(set (match_operand:V4SF 0 "register_operand") ++ (vec_concat:V4SF ++ (float_truncate:V2SF ++ (match_operand:V2DF 1 "register_operand")) ++ (float_truncate:V2SF ++ (match_operand:V2DF 2 "register_operand")) ++ ))] ++ "TARGET_SIMD" ++ { ++ rtx tmp = gen_reg_rtx (V2SFmode); ++ emit_insn (gen_aarch64_float_truncate_lo_v2sf (tmp, operands[1])); ++ emit_insn (gen_aarch64_float_truncate_hi_v4sf (operands[0], ++ tmp, operands[2])); ++ DONE; ++ } ++) ++ ++(define_expand "vec_pack_trunc_df" ++ [(set (match_operand:V2SF 0 "register_operand") ++ (vec_concat:V2SF ++ (float_truncate:SF ++ (match_operand:DF 1 "register_operand")) ++ (float_truncate:SF ++ (match_operand:DF 2 "register_operand")) ++ ))] ++ "TARGET_SIMD" ++ { ++ rtx tmp = gen_reg_rtx (V2SFmode); ++ emit_insn (gen_move_lo_quad_v2df (tmp, operands[1])); ++ emit_insn (gen_move_hi_quad_v2df (tmp, operands[2])); ++ emit_insn (gen_aarch64_float_truncate_lo_v2sf (operands[0], tmp)); ++ DONE; ++ } ++) ++ + (define_insn "aarch64_vmls" + [(set (match_operand:VDQF 0 "register_operand" "=w") + (minus:VDQF (match_operand:VDQF 1 "register_operand" "0") +@@ -1243,8 +1227,7 @@ + (match_operand:VDQF 3 "register_operand" "w"))))] + "TARGET_SIMD" + "fmls\\t%0., %2., %3." +- [(set_attr "simd_type" "simd_fmla") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_mla__scalar")] + ) + + ;; FP Max/Min +@@ -1261,253 +1244,201 @@ + ;; only introduces MIN_EXPR/MAX_EXPR in fast math mode or when not honouring + ;; NaNs. + +-(define_insn "smax3" ++(define_insn "3" + [(set (match_operand:VDQF 0 "register_operand" "=w") +- (smax:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (FMAXMIN:VDQF (match_operand:VDQF 1 "register_operand" "w") + (match_operand:VDQF 2 "register_operand" "w")))] + "TARGET_SIMD" +- "fmaxnm\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_fminmax") +- (set_attr "simd_mode" "")] ++ "fnm\\t%0., %1., %2." ++ [(set_attr "type" "neon_fp_minmax_")] + ) + +-(define_insn "smin3" ++(define_insn "3" + [(set (match_operand:VDQF 0 "register_operand" "=w") +- (smin:VDQF (match_operand:VDQF 1 "register_operand" "w") +- (match_operand:VDQF 2 "register_operand" "w")))] ++ (unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")] ++ FMAXMIN_UNS))] + "TARGET_SIMD" +- "fminnm\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_fminmax") +- (set_attr "simd_mode" "")] ++ "\\t%0., %1., %2." ++ [(set_attr "type" "neon_fp_minmax_")] + ) + +-;; FP 'across lanes' max and min ops. ++;; 'across lanes' add. + +-(define_insn "reduc_s_v4sf" +- [(set (match_operand:V4SF 0 "register_operand" "=w") +- (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "w")] +- FMAXMINV))] ++(define_insn "reduc_plus_" ++ [(set (match_operand:VDQV 0 "register_operand" "=w") ++ (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] ++ SUADDV))] + "TARGET_SIMD" +- "fnmv\\t%s0, %1.4s"; +- [(set_attr "simd_type" "simd_fminmaxv") +- (set_attr "simd_mode" "V4SF")] ++ "addv\\t%0, %1." ++ [(set_attr "type" "neon_reduc_add")] + ) + +-(define_insn "reduc_s_" ++(define_insn "reduc_plus_v2di" ++ [(set (match_operand:V2DI 0 "register_operand" "=w") ++ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "w")] ++ SUADDV))] ++ "TARGET_SIMD" ++ "addp\\t%d0, %1.2d" ++ [(set_attr "type" "neon_reduc_add_q")] ++) ++ ++(define_insn "reduc_plus_v2si" ++ [(set (match_operand:V2SI 0 "register_operand" "=w") ++ (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] ++ SUADDV))] ++ "TARGET_SIMD" ++ "addp\\t%0.2s, %1.2s, %1.2s" ++ [(set_attr "type" "neon_reduc_add")] ++) ++ ++(define_insn "reduc_plus_" + [(set (match_operand:V2F 0 "register_operand" "=w") + (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] +- FMAXMINV))] ++ SUADDV))] + "TARGET_SIMD" +- "fnmp\\t%0., %1., %1."; +- [(set_attr "simd_type" "simd_fminmax") +- (set_attr "simd_mode" "")] ++ "faddp\\t%0, %1." ++ [(set_attr "type" "neon_fp_reduc_add_")] + ) + +-;; FP 'across lanes' add. +- +-(define_insn "aarch64_addvv4sf" ++(define_insn "aarch64_addpv4sf" + [(set (match_operand:V4SF 0 "register_operand" "=w") + (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "w")] + UNSPEC_FADDV))] + "TARGET_SIMD" + "faddp\\t%0.4s, %1.4s, %1.4s" +- [(set_attr "simd_type" "simd_fadd") +- (set_attr "simd_mode" "V4SF")] ++ [(set_attr "type" "neon_fp_reduc_add_s_q")] + ) + +-(define_expand "reduc_uplus_v4sf" +- [(set (match_operand:V4SF 0 "register_operand" "=w") +- (match_operand:V4SF 1 "register_operand" "w"))] ++(define_expand "reduc_plus_v4sf" ++ [(set (match_operand:V4SF 0 "register_operand") ++ (unspec:V4SF [(match_operand:V4SF 1 "register_operand")] ++ SUADDV))] + "TARGET_SIMD" + { + rtx tmp = gen_reg_rtx (V4SFmode); +- emit_insn (gen_aarch64_addvv4sf (tmp, operands[1])); +- emit_insn (gen_aarch64_addvv4sf (operands[0], tmp)); ++ emit_insn (gen_aarch64_addpv4sf (tmp, operands[1])); ++ emit_insn (gen_aarch64_addpv4sf (operands[0], tmp)); + DONE; + }) + +-(define_expand "reduc_splus_v4sf" +- [(set (match_operand:V4SF 0 "register_operand" "=w") +- (match_operand:V4SF 1 "register_operand" "w"))] ++(define_insn "clz2" ++ [(set (match_operand:VDQ_BHSI 0 "register_operand" "=w") ++ (clz:VDQ_BHSI (match_operand:VDQ_BHSI 1 "register_operand" "w")))] + "TARGET_SIMD" +-{ +- rtx tmp = gen_reg_rtx (V4SFmode); +- emit_insn (gen_aarch64_addvv4sf (tmp, operands[1])); +- emit_insn (gen_aarch64_addvv4sf (operands[0], tmp)); +- DONE; +-}) +- +-(define_insn "aarch64_addv" +- [(set (match_operand:V2F 0 "register_operand" "=w") +- (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] +- UNSPEC_FADDV))] +- "TARGET_SIMD" +- "faddp\\t%0, %1." +- [(set_attr "simd_type" "simd_fadd") +- (set_attr "simd_mode" "")] ++ "clz\\t%0., %1." ++ [(set_attr "type" "neon_cls")] + ) + +-(define_expand "reduc_uplus_" +- [(set (match_operand:V2F 0 "register_operand" "=w") +- (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] +- UNSPEC_FADDV))] +- "TARGET_SIMD" +- "" +-) ++;; 'across lanes' max and min ops. + +-(define_expand "reduc_splus_" +- [(set (match_operand:V2F 0 "register_operand" "=w") +- (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] +- UNSPEC_FADDV))] +- "TARGET_SIMD" +- "" +-) +- +-;; Reduction across lanes. +- +-(define_insn "aarch64_addv" ++(define_insn "reduc__" + [(set (match_operand:VDQV 0 "register_operand" "=w") + (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] +- UNSPEC_ADDV))] ++ MAXMINV))] + "TARGET_SIMD" +- "addv\\t%0, %1." +- [(set_attr "simd_type" "simd_addv") +- (set_attr "simd_mode" "")] ++ "v\\t%0, %1." ++ [(set_attr "type" "neon_reduc_minmax")] + ) + +-(define_expand "reduc_splus_" +- [(set (match_operand:VDQV 0 "register_operand" "=w") +- (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] +- UNSPEC_ADDV))] +- "TARGET_SIMD" +- "" +-) +- +-(define_expand "reduc_uplus_" +- [(set (match_operand:VDQV 0 "register_operand" "=w") +- (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] +- UNSPEC_ADDV))] +- "TARGET_SIMD" +- "" +-) +- +-(define_insn "aarch64_addvv2di" ++(define_insn "reduc__v2di" + [(set (match_operand:V2DI 0 "register_operand" "=w") + (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "w")] +- UNSPEC_ADDV))] ++ MAXMINV))] + "TARGET_SIMD" +- "addp\\t%d0, %1.2d" +- [(set_attr "simd_type" "simd_add") +- (set_attr "simd_mode" "V2DI")] ++ "p\\t%d0, %1.2d" ++ [(set_attr "type" "neon_reduc_minmax_q")] + ) + +-(define_expand "reduc_uplus_v2di" +- [(set (match_operand:V2DI 0 "register_operand" "=w") +- (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "w")] +- UNSPEC_ADDV))] +- "TARGET_SIMD" +- "" +-) +- +-(define_expand "reduc_splus_v2di" +- [(set (match_operand:V2DI 0 "register_operand" "=w") +- (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "w")] +- UNSPEC_ADDV))] +- "TARGET_SIMD" +- "" +-) +- +-(define_insn "aarch64_addvv2si" ++(define_insn "reduc__v2si" + [(set (match_operand:V2SI 0 "register_operand" "=w") + (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] +- UNSPEC_ADDV))] ++ MAXMINV))] + "TARGET_SIMD" +- "addp\\t%0.2s, %1.2s, %1.2s" +- [(set_attr "simd_type" "simd_add") +- (set_attr "simd_mode" "V2SI")] ++ "p\\t%0.2s, %1.2s, %1.2s" ++ [(set_attr "type" "neon_reduc_minmax")] + ) + +-(define_expand "reduc_uplus_v2si" +- [(set (match_operand:V2SI 0 "register_operand" "=w") +- (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] +- UNSPEC_ADDV))] ++(define_insn "reduc__" ++ [(set (match_operand:V2F 0 "register_operand" "=w") ++ (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] ++ FMAXMINV))] + "TARGET_SIMD" +- "" ++ "p\\t%0, %1." ++ [(set_attr "type" "neon_fp_reduc_minmax_")] + ) + +-(define_expand "reduc_splus_v2si" +- [(set (match_operand:V2SI 0 "register_operand" "=w") +- (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] +- UNSPEC_ADDV))] ++(define_insn "reduc__v4sf" ++ [(set (match_operand:V4SF 0 "register_operand" "=w") ++ (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "w")] ++ FMAXMINV))] + "TARGET_SIMD" +- "" ++ "v\\t%s0, %1.4s" ++ [(set_attr "type" "neon_fp_reduc_minmax_s_q")] + ) + +-(define_insn "reduc__" +- [(set (match_operand:VDQV 0 "register_operand" "=w") +- (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] +- MAXMINV))] +- "TARGET_SIMD" +- "v\\t%0, %1." +- [(set_attr "simd_type" "simd_minmaxv") +- (set_attr "simd_mode" "")] +-) +- +-(define_insn "reduc__v2si" +- [(set (match_operand:V2SI 0 "register_operand" "=w") +- (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] +- MAXMINV))] +- "TARGET_SIMD" +- "p\\t%0.2s, %1.2s, %1.2s" +- [(set_attr "simd_type" "simd_minmax") +- (set_attr "simd_mode" "V2SI")] +-) +- +-;; vbsl_* intrinsics may compile to any of bsl/bif/bit depending on register +-;; allocation. For an intrinsic of form: +-;; vD = bsl_* (vS, vN, vM) ++;; aarch64_simd_bsl may compile to any of bsl/bif/bit depending on register ++;; allocation. ++;; Operand 1 is the mask, operands 2 and 3 are the bitfields from which ++;; to select. ++;; ++;; Thus our BSL is of the form: ++;; op0 = bsl (mask, op2, op3) + ;; We can use any of: +-;; bsl vS, vN, vM (if D = S) +-;; bit vD, vN, vS (if D = M, so 1-bits in vS choose bits from vN, else vM) +-;; bif vD, vM, vS (if D = N, so 0-bits in vS choose bits from vM, else vN) ++;; ++;; if (op0 = mask) ++;; bsl mask, op1, op2 ++;; if (op0 = op1) (so 1-bits in mask choose bits from op2, else op0) ++;; bit op0, op2, mask ++;; if (op0 = op2) (so 0-bits in mask choose bits from op1, else op0) ++;; bif op0, op1, mask + + (define_insn "aarch64_simd_bsl_internal" + [(set (match_operand:VALL 0 "register_operand" "=w,w,w") +- (unspec:VALL +- [(match_operand: 1 "register_operand" " 0,w,w") +- (match_operand:VALL 2 "register_operand" " w,w,0") +- (match_operand:VALL 3 "register_operand" " w,0,w")] +- UNSPEC_BSL))] ++ (ior:VALL ++ (and:VALL ++ (match_operand: 1 "register_operand" " 0,w,w") ++ (match_operand:VALL 2 "register_operand" " w,w,0")) ++ (and:VALL ++ (not: ++ (match_dup: 1)) ++ (match_operand:VALL 3 "register_operand" " w,0,w")) ++ ))] + "TARGET_SIMD" + "@ + bsl\\t%0., %2., %3. + bit\\t%0., %2., %1. + bif\\t%0., %3., %1." ++ [(set_attr "type" "neon_bsl")] + ) + + (define_expand "aarch64_simd_bsl" +- [(set (match_operand:VALL 0 "register_operand") +- (unspec:VALL [(match_operand: 1 "register_operand") +- (match_operand:VALL 2 "register_operand") +- (match_operand:VALL 3 "register_operand")] +- UNSPEC_BSL))] +- "TARGET_SIMD" ++ [(match_operand:VALL 0 "register_operand") ++ (match_operand: 1 "register_operand") ++ (match_operand:VALL 2 "register_operand") ++ (match_operand:VALL 3 "register_operand")] ++ "TARGET_SIMD" + { + /* We can't alias operands together if they have different modes. */ + operands[1] = gen_lowpart (mode, operands[1]); ++ emit_insn (gen_aarch64_simd_bsl_internal (operands[0], operands[1], ++ operands[2], operands[3])); ++ DONE; + }) + +-(define_expand "aarch64_vcond_internal" ++(define_expand "aarch64_vcond_internal" + [(set (match_operand:VDQ 0 "register_operand") + (if_then_else:VDQ + (match_operator 3 "comparison_operator" + [(match_operand:VDQ 4 "register_operand") + (match_operand:VDQ 5 "nonmemory_operand")]) +- (match_operand:VDQ 1 "register_operand") +- (match_operand:VDQ 2 "register_operand")))] ++ (match_operand:VDQ 1 "nonmemory_operand") ++ (match_operand:VDQ 2 "nonmemory_operand")))] + "TARGET_SIMD" + { + int inverse = 0, has_zero_imm_form = 0; ++ rtx op1 = operands[1]; ++ rtx op2 = operands[2]; + rtx mask = gen_reg_rtx (mode); + + switch (GET_CODE (operands[3])) +@@ -1566,30 +1497,47 @@ + } + + if (inverse) +- emit_insn (gen_aarch64_simd_bsl (operands[0], mask, operands[2], +- operands[1])); +- else +- emit_insn (gen_aarch64_simd_bsl (operands[0], mask, operands[1], +- operands[2])); ++ { ++ op1 = operands[2]; ++ op2 = operands[1]; ++ } + ++ /* If we have (a = (b CMP c) ? -1 : 0); ++ Then we can simply move the generated mask. */ ++ ++ if (op1 == CONSTM1_RTX (mode) ++ && op2 == CONST0_RTX (mode)) ++ emit_move_insn (operands[0], mask); ++ else ++ { ++ if (!REG_P (op1)) ++ op1 = force_reg (mode, op1); ++ if (!REG_P (op2)) ++ op2 = force_reg (mode, op2); ++ emit_insn (gen_aarch64_simd_bsl (operands[0], mask, ++ op1, op2)); ++ } ++ + DONE; + }) + +-(define_expand "aarch64_vcond_internal" +- [(set (match_operand:VDQF 0 "register_operand") ++(define_expand "aarch64_vcond_internal" ++ [(set (match_operand:VDQF_COND 0 "register_operand") + (if_then_else:VDQF + (match_operator 3 "comparison_operator" + [(match_operand:VDQF 4 "register_operand") + (match_operand:VDQF 5 "nonmemory_operand")]) +- (match_operand:VDQF 1 "register_operand") +- (match_operand:VDQF 2 "register_operand")))] ++ (match_operand:VDQF_COND 1 "nonmemory_operand") ++ (match_operand:VDQF_COND 2 "nonmemory_operand")))] + "TARGET_SIMD" + { + int inverse = 0; + int use_zero_form = 0; + int swap_bsl_operands = 0; +- rtx mask = gen_reg_rtx (mode); +- rtx tmp = gen_reg_rtx (mode); ++ rtx op1 = operands[1]; ++ rtx op2 = operands[2]; ++ rtx mask = gen_reg_rtx (mode); ++ rtx tmp = gen_reg_rtx (mode); + + rtx (*base_comparison) (rtx, rtx, rtx); + rtx (*complimentary_comparison) (rtx, rtx, rtx); +@@ -1609,7 +1557,7 @@ + /* Fall through. */ + default: + if (!REG_P (operands[5])) +- operands[5] = force_reg (mode, operands[5]); ++ operands[5] = force_reg (mode, operands[5]); + } + + switch (GET_CODE (operands[3])) +@@ -1622,8 +1570,8 @@ + case UNGE: + case ORDERED: + case UNORDERED: +- base_comparison = gen_aarch64_cmge; +- complimentary_comparison = gen_aarch64_cmgt; ++ base_comparison = gen_aarch64_cmge; ++ complimentary_comparison = gen_aarch64_cmgt; + break; + case LE: + case UNLE: +@@ -1631,14 +1579,14 @@ + /* Fall through. */ + case GT: + case UNGT: +- base_comparison = gen_aarch64_cmgt; +- complimentary_comparison = gen_aarch64_cmge; ++ base_comparison = gen_aarch64_cmgt; ++ complimentary_comparison = gen_aarch64_cmge; + break; + case EQ: + case NE: + case UNEQ: +- base_comparison = gen_aarch64_cmeq; +- complimentary_comparison = gen_aarch64_cmeq; ++ base_comparison = gen_aarch64_cmeq; ++ complimentary_comparison = gen_aarch64_cmeq; + break; + default: + gcc_unreachable (); +@@ -1666,10 +1614,10 @@ + switch (GET_CODE (operands[3])) + { + case LT: +- base_comparison = gen_aarch64_cmlt; ++ base_comparison = gen_aarch64_cmlt; + break; + case LE: +- base_comparison = gen_aarch64_cmle; ++ base_comparison = gen_aarch64_cmle; + break; + default: + /* Do nothing, other zero form cases already have the correct +@@ -1712,9 +1660,9 @@ + true iff !(a != b && a ORDERED b), swapping the operands to BSL + will then give us (a == b || a UNORDERED b) as intended. */ + +- emit_insn (gen_aarch64_cmgt (mask, operands[4], operands[5])); +- emit_insn (gen_aarch64_cmgt (tmp, operands[5], operands[4])); +- emit_insn (gen_ior3 (mask, mask, tmp)); ++ emit_insn (gen_aarch64_cmgt (mask, operands[4], operands[5])); ++ emit_insn (gen_aarch64_cmgt (tmp, operands[5], operands[4])); ++ emit_insn (gen_ior3 (mask, mask, tmp)); + swap_bsl_operands = 1; + break; + case UNORDERED: +@@ -1723,9 +1671,9 @@ + swap_bsl_operands = 1; + /* Fall through. */ + case ORDERED: +- emit_insn (gen_aarch64_cmgt (tmp, operands[4], operands[5])); +- emit_insn (gen_aarch64_cmge (mask, operands[5], operands[4])); +- emit_insn (gen_ior3 (mask, mask, tmp)); ++ emit_insn (gen_aarch64_cmgt (tmp, operands[4], operands[5])); ++ emit_insn (gen_aarch64_cmge (mask, operands[5], operands[4])); ++ emit_insn (gen_ior3 (mask, mask, tmp)); + break; + default: + gcc_unreachable (); +@@ -1732,11 +1680,27 @@ + } + + if (swap_bsl_operands) +- emit_insn (gen_aarch64_simd_bsl (operands[0], mask, operands[2], +- operands[1])); +- else +- emit_insn (gen_aarch64_simd_bsl (operands[0], mask, operands[1], +- operands[2])); ++ { ++ op1 = operands[2]; ++ op2 = operands[1]; ++ } ++ ++ /* If we have (a = (b CMP c) ? -1 : 0); ++ Then we can simply move the generated mask. */ ++ ++ if (op1 == CONSTM1_RTX (mode) ++ && op2 == CONST0_RTX (mode)) ++ emit_move_insn (operands[0], mask); ++ else ++ { ++ if (!REG_P (op1)) ++ op1 = force_reg (mode, op1); ++ if (!REG_P (op2)) ++ op2 = force_reg (mode, op2); ++ emit_insn (gen_aarch64_simd_bsl (operands[0], mask, ++ op1, op2)); ++ } ++ + DONE; + }) + +@@ -1746,16 +1710,32 @@ + (match_operator 3 "comparison_operator" + [(match_operand:VALL 4 "register_operand") + (match_operand:VALL 5 "nonmemory_operand")]) +- (match_operand:VALL 1 "register_operand") +- (match_operand:VALL 2 "register_operand")))] ++ (match_operand:VALL 1 "nonmemory_operand") ++ (match_operand:VALL 2 "nonmemory_operand")))] + "TARGET_SIMD" + { +- emit_insn (gen_aarch64_vcond_internal (operands[0], operands[1], ++ emit_insn (gen_aarch64_vcond_internal (operands[0], operands[1], + operands[2], operands[3], + operands[4], operands[5])); + DONE; + }) + ++(define_expand "vcond" ++ [(set (match_operand: 0 "register_operand") ++ (if_then_else: ++ (match_operator 3 "comparison_operator" ++ [(match_operand:VDQF 4 "register_operand") ++ (match_operand:VDQF 5 "nonmemory_operand")]) ++ (match_operand: 1 "nonmemory_operand") ++ (match_operand: 2 "nonmemory_operand")))] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_aarch64_vcond_internal ( ++ operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], operands[5])); ++ DONE; ++}) + + (define_expand "vcondu" + [(set (match_operand:VDQ 0 "register_operand") +@@ -1763,11 +1743,11 @@ + (match_operator 3 "comparison_operator" + [(match_operand:VDQ 4 "register_operand") + (match_operand:VDQ 5 "nonmemory_operand")]) +- (match_operand:VDQ 1 "register_operand") +- (match_operand:VDQ 2 "register_operand")))] ++ (match_operand:VDQ 1 "nonmemory_operand") ++ (match_operand:VDQ 2 "nonmemory_operand")))] + "TARGET_SIMD" + { +- emit_insn (gen_aarch64_vcond_internal (operands[0], operands[1], ++ emit_insn (gen_aarch64_vcond_internal (operands[0], operands[1], + operands[2], operands[3], + operands[4], operands[5])); + DONE; +@@ -1785,45 +1765,47 @@ + DONE; + }) + +-(define_insn "aarch64_get_lane_signed" +- [(set (match_operand: 0 "register_operand" "=r") +- (sign_extend: ++;; Lane extraction with sign extension to general purpose register. ++(define_insn "*aarch64_get_lane_extend" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (sign_extend:GPI + (vec_select: +- (match_operand:VQ_S 1 "register_operand" "w") ++ (match_operand:VDQQH 1 "register_operand" "w") + (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))] + "TARGET_SIMD" +- "smov\\t%0, %1.[%2]" +- [(set_attr "simd_type" "simd_movgp") +- (set_attr "simd_mode" "")] ++ "smov\\t%0, %1.[%2]" ++ [(set_attr "type" "neon_to_gp")] + ) + +-(define_insn "aarch64_get_lane_unsigned" +- [(set (match_operand: 0 "register_operand" "=r") +- (zero_extend: ++(define_insn "*aarch64_get_lane_zero_extendsi" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (zero_extend:SI + (vec_select: +- (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQQH 1 "register_operand" "w") + (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))] + "TARGET_SIMD" +- "umov\\t%0, %1.[%2]" +- [(set_attr "simd_type" "simd_movgp") +- (set_attr "simd_mode" "")] ++ "umov\\t%w0, %1.[%2]" ++ [(set_attr "type" "neon_to_gp")] + ) + ++;; Lane extraction of a value, neither sign nor zero extension ++;; is guaranteed so upper bits should be considered undefined. + (define_insn "aarch64_get_lane" +- [(set (match_operand: 0 "register_operand" "=w") ++ [(set (match_operand: 0 "register_operand" "=r, w") + (vec_select: +- (match_operand:VDQF 1 "register_operand" "w") +- (parallel [(match_operand:SI 2 "immediate_operand" "i")])))] ++ (match_operand:VALL 1 "register_operand" "w, w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i, i")])))] + "TARGET_SIMD" +- "mov\\t%0.[0], %1.[%2]" +- [(set_attr "simd_type" "simd_ins") +- (set_attr "simd_mode" "")] ++ "@ ++ umov\\t%0, %1.[%2] ++ dup\\t%0, %1.[%2]" ++ [(set_attr "type" "neon_to_gp, neon_dup")] + ) + + (define_expand "aarch64_get_lanedi" +- [(match_operand:DI 0 "register_operand" "=r") +- (match_operand:DI 1 "register_operand" "w") +- (match_operand:SI 2 "immediate_operand" "i")] ++ [(match_operand:DI 0 "register_operand") ++ (match_operand:DI 1 "register_operand") ++ (match_operand:SI 2 "immediate_operand")] + "TARGET_SIMD" + { + aarch64_simd_lane_bounds (operands[2], 0, 1); +@@ -1940,20 +1922,37 @@ + (match_operand:VDIC 2 "aarch64_simd_imm_zero" "Dz")))] + "TARGET_SIMD" + "mov\\t%0.8b, %1.8b" +- [(set_attr "simd_type" "simd_move") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_move")] + ) + +-(define_insn "aarch64_combine" ++(define_insn_and_split "aarch64_combine" + [(set (match_operand: 0 "register_operand" "=&w") + (vec_concat: (match_operand:VDC 1 "register_operand" "w") + (match_operand:VDC 2 "register_operand" "w")))] + "TARGET_SIMD" +- "mov\\t%0.d[0], %1.d[0]\;ins\\t%0.d[1], %2.d[0]" +- [(set_attr "simd_type" "simd_ins") +- (set_attr "simd_mode" "")] ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++{ ++ aarch64_split_simd_combine (operands[0], operands[1], operands[2]); ++ DONE; ++} ++[(set_attr "type" "multiple")] + ) + ++(define_expand "aarch64_simd_combine" ++ [(set (match_operand: 0 "register_operand" "=&w") ++ (vec_concat: (match_operand:VDC 1 "register_operand" "w") ++ (match_operand:VDC 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ { ++ emit_insn (gen_move_lo_quad_ (operands[0], operands[1])); ++ emit_insn (gen_move_hi_quad_ (operands[0], operands[2])); ++ DONE; ++ } ++[(set_attr "type" "multiple")] ++) ++ + ;; l. + + (define_insn "aarch64_l2_internal" +@@ -1966,8 +1965,7 @@ + (match_dup 3)))))] + "TARGET_SIMD" + "l2 %0., %1., %2." +- [(set_attr "simd_type" "simd_addl") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon__long")] + ) + + (define_expand "aarch64_saddl2" +@@ -2026,8 +2024,7 @@ + (match_operand:VDW 2 "register_operand" "w"))))] + "TARGET_SIMD" + "l %0., %1., %2." +- [(set_attr "simd_type" "simd_addl") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon__long")] + ) + + ;; w. +@@ -2039,8 +2036,7 @@ + (match_operand:VDW 2 "register_operand" "w"))))] + "TARGET_SIMD" + "w\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_addl") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon__widen")] + ) + + (define_insn "aarch64_w2_internal" +@@ -2052,8 +2048,7 @@ + (match_operand:VQW 3 "vect_par_cnst_hi_half" "")))))] + "TARGET_SIMD" + "w2\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_addl") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon__widen")] + ) + + (define_expand "aarch64_saddw2" +@@ -2114,8 +2109,7 @@ + HADDSUB))] + "TARGET_SIMD" + "h\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_add") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon__halve")] + ) + + ;; hn. +@@ -2127,8 +2121,7 @@ + ADDSUBHN))] + "TARGET_SIMD" + "hn\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_addn") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon__halve_narrow_q")] + ) + + (define_insn "aarch64_hn2" +@@ -2139,8 +2132,7 @@ + ADDSUBHN2))] + "TARGET_SIMD" + "hn2\\t%0., %2., %3." +- [(set_attr "simd_type" "simd_addn2") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon__halve_narrow_q")] + ) + + ;; pmul. +@@ -2152,8 +2144,7 @@ + UNSPEC_PMUL))] + "TARGET_SIMD" + "pmul\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_mul_")] + ) + + ;; q +@@ -2164,8 +2155,7 @@ + (match_operand:VSDQ_I 2 "register_operand" "w")))] + "TARGET_SIMD" + "\\t%0, %1, %2" +- [(set_attr "simd_type" "simd_add") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_")] + ) + + ;; suqadd and usqadd +@@ -2177,8 +2167,7 @@ + USSUQADD))] + "TARGET_SIMD" + "qadd\\t%0, %2" +- [(set_attr "simd_type" "simd_sat_add") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_qadd")] + ) + + ;; sqmovun +@@ -2189,8 +2178,7 @@ + UNSPEC_SQXTUN))] + "TARGET_SIMD" + "sqxtun\\t%0, %1" +- [(set_attr "simd_type" "simd_sat_shiftn_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_shift_imm_narrow_q")] + ) + + ;; sqmovn and uqmovn +@@ -2201,8 +2189,7 @@ + SUQMOVN))] + "TARGET_SIMD" + "qxtn\\t%0, %1" +- [(set_attr "simd_type" "simd_sat_shiftn_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_shift_imm_narrow_q")] + ) + + ;; q +@@ -2213,8 +2200,7 @@ + (match_operand:VSDQ_I_BHSI 1 "register_operand" "w")))] + "TARGET_SIMD" + "s\\t%0, %1" +- [(set_attr "simd_type" "simd_sat_negabs") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_")] + ) + + ;; sqdmulh. +@@ -2227,8 +2213,7 @@ + VQDMULH))] + "TARGET_SIMD" + "sqdmulh\\t%0, %1, %2" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul_")] + ) + + ;; sqdmulh_lane +@@ -2245,8 +2230,7 @@ + "* + aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); + return \"sqdmulh\\t%0., %1., %2.[%3]\";" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul__scalar")] + ) + + (define_insn "aarch64_sqdmulh_laneq" +@@ -2261,8 +2245,7 @@ + "* + aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); + return \"sqdmulh\\t%0., %1., %2.[%3]\";" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul__scalar")] + ) + + (define_insn "aarch64_sqdmulh_lane" +@@ -2277,8 +2260,7 @@ + "* + aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); + return \"sqdmulh\\t%0, %1, %2.[%3]\";" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul__scalar")] + ) + + ;; vqdml[sa]l +@@ -2296,8 +2278,7 @@ + (const_int 1))))] + "TARGET_SIMD" + "sqdmll\\t%0, %2, %3" +- [(set_attr "simd_type" "simd_sat_mlal") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mla__long")] + ) + + ;; vqdml[sa]l_lane +@@ -2319,8 +2300,7 @@ + (const_int 1))))] + "TARGET_SIMD" + "sqdmll\\t%0, %2, %3.[%4]" +- [(set_attr "simd_type" "simd_sat_mlal") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mla__scalar_long")] + ) + + (define_insn "aarch64_sqdmll_lane_internal" +@@ -2339,8 +2319,7 @@ + (const_int 1))))] + "TARGET_SIMD" + "sqdmll\\t%0, %2, %3.[%4]" +- [(set_attr "simd_type" "simd_sat_mlal") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mla__scalar_long")] + ) + + (define_expand "aarch64_sqdmlal_lane" +@@ -2419,8 +2398,7 @@ + (const_int 1))))] + "TARGET_SIMD" + "sqdmll\\t%0, %2, %3.[0]" +- [(set_attr "simd_type" "simd_sat_mlal") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mla__scalar_long")] + ) + + ;; sqdml[as]l2 +@@ -2442,8 +2420,7 @@ + (const_int 1))))] + "TARGET_SIMD" + "sqdmll2\\t%0, %2, %3" +- [(set_attr "simd_type" "simd_sat_mlal") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mla__scalar_long")] + ) + + (define_expand "aarch64_sqdmlal2" +@@ -2493,8 +2470,7 @@ + (const_int 1))))] + "TARGET_SIMD" + "sqdmll2\\t%0, %2, %3.[%4]" +- [(set_attr "simd_type" "simd_sat_mlal") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mla__scalar_long")] + ) + + (define_expand "aarch64_sqdmlal2_lane" +@@ -2577,8 +2553,7 @@ + (const_int 1))))] + "TARGET_SIMD" + "sqdmll2\\t%0, %2, %3.[0]" +- [(set_attr "simd_type" "simd_sat_mlal") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mla__scalar_long")] + ) + + (define_expand "aarch64_sqdmlal2_n" +@@ -2622,8 +2597,7 @@ + (const_int 1)))] + "TARGET_SIMD" + "sqdmull\\t%0, %1, %2" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul__long")] + ) + + ;; vqdmull_lane +@@ -2643,8 +2617,7 @@ + (const_int 1)))] + "TARGET_SIMD" + "sqdmull\\t%0, %1, %2.[%3]" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul__scalar_long")] + ) + + (define_insn "aarch64_sqdmull_lane_internal" +@@ -2661,8 +2634,7 @@ + (const_int 1)))] + "TARGET_SIMD" + "sqdmull\\t%0, %1, %2.[%3]" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul__scalar_long")] + ) + + (define_expand "aarch64_sqdmull_lane" +@@ -2706,8 +2678,7 @@ + (const_int 1)))] + "TARGET_SIMD" + "sqdmull\\t%0, %1, %2.[0]" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul__scalar_long")] + ) + + ;; vqdmull2 +@@ -2730,8 +2701,7 @@ + (const_int 1)))] + "TARGET_SIMD" + "sqdmull2\\t%0, %1, %2" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul__scalar_long")] + ) + + (define_expand "aarch64_sqdmull2" +@@ -2765,8 +2735,7 @@ + (const_int 1)))] + "TARGET_SIMD" + "sqdmull2\\t%0, %1, %2.[%3]" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul__scalar_long")] + ) + + (define_expand "aarch64_sqdmull2_lane" +@@ -2816,8 +2785,7 @@ + (const_int 1)))] + "TARGET_SIMD" + "sqdmull2\\t%0, %1, %2.[0]" +- [(set_attr "simd_type" "simd_sat_mul") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_mul__scalar_long")] + ) + + (define_expand "aarch64_sqdmull2_n" +@@ -2842,8 +2810,7 @@ + VSHL))] + "TARGET_SIMD" + "shl\\t%0, %1, %2"; +- [(set_attr "simd_type" "simd_shift") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_reg")] + ) + + +@@ -2857,32 +2824,9 @@ + VQSHL))] + "TARGET_SIMD" + "qshl\\t%0, %1, %2"; +- [(set_attr "simd_type" "simd_sat_shift") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_shift_reg")] + ) + +-;; vshl_n +- +-(define_expand "aarch64_sshl_n" +- [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") +- (match_operand:VSDQ_I_DI 1 "register_operand" "w") +- (match_operand:SI 2 "immediate_operand" "i")] +- "TARGET_SIMD" +-{ +- emit_insn (gen_ashl3 (operands[0], operands[1], operands[2])); +- DONE; +-}) +- +-(define_expand "aarch64_ushl_n" +- [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") +- (match_operand:VSDQ_I_DI 1 "register_operand" "w") +- (match_operand:SI 2 "immediate_operand" "i")] +- "TARGET_SIMD" +-{ +- emit_insn (gen_ashl3 (operands[0], operands[1], operands[2])); +- DONE; +-}) +- + ;; vshll_n + + (define_insn "aarch64_shll_n" +@@ -2901,8 +2845,7 @@ + else { + return \"shll\\t%0., %1., %2\"; + }" +- [(set_attr "simd_type" "simd_shift_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_imm_long")] + ) + + ;; vshll_high_n +@@ -2923,32 +2866,9 @@ + else { + return \"shll2\\t%0., %1., %2\"; + }" +- [(set_attr "simd_type" "simd_shift_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_imm_long")] + ) + +-;; vshr_n +- +-(define_expand "aarch64_sshr_n" +- [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") +- (match_operand:VSDQ_I_DI 1 "register_operand" "w") +- (match_operand:SI 2 "immediate_operand" "i")] +- "TARGET_SIMD" +-{ +- emit_insn (gen_ashr3 (operands[0], operands[1], operands[2])); +- DONE; +-}) +- +-(define_expand "aarch64_ushr_n" +- [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") +- (match_operand:VSDQ_I_DI 1 "register_operand" "w") +- (match_operand:SI 2 "immediate_operand" "i")] +- "TARGET_SIMD" +-{ +- emit_insn (gen_lshr3 (operands[0], operands[1], operands[2])); +- DONE; +-}) +- + ;; vrshr_n + + (define_insn "aarch64_shr_n" +@@ -2961,8 +2881,7 @@ + int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; + aarch64_simd_const_bounds (operands[2], 1, bit_width + 1); + return \"shr\\t%0, %1, %2\";" +- [(set_attr "simd_type" "simd_shift_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_shift_imm")] + ) + + ;; v(r)sra_n +@@ -2978,8 +2897,7 @@ + int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; + aarch64_simd_const_bounds (operands[3], 1, bit_width + 1); + return \"sra\\t%0, %2, %3\";" +- [(set_attr "simd_type" "simd_shift_imm_acc") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_acc")] + ) + + ;; vsi_n +@@ -2996,8 +2914,7 @@ + aarch64_simd_const_bounds (operands[3], 1 - , + bit_width - + 1); + return \"si\\t%0, %2, %3\";" +- [(set_attr "simd_type" "simd_shift_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_shift_imm")] + ) + + ;; vqshl(u) +@@ -3012,8 +2929,7 @@ + int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; + aarch64_simd_const_bounds (operands[2], 0, bit_width); + return \"qshl\\t%0, %1, %2\";" +- [(set_attr "simd_type" "simd_sat_shift_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_shift_imm")] + ) + + +@@ -3029,8 +2945,7 @@ + int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; + aarch64_simd_const_bounds (operands[2], 1, bit_width + 1); + return \"qshrn\\t%0, %1, %2\";" +- [(set_attr "simd_type" "simd_sat_shiftn_imm") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_sat_shift_imm_narrow_q")] + ) + + +@@ -3049,8 +2964,7 @@ + "@ + cm\t%0, %, % + cm\t%0, %1, #0" +- [(set_attr "simd_type" "simd_cmp") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_compare, neon_compare_zero")] + ) + + (define_insn_and_split "aarch64_cmdi" +@@ -3059,7 +2973,8 @@ + (COMPARISONS:DI + (match_operand:DI 1 "register_operand" "w,w,r") + (match_operand:DI 2 "aarch64_simd_reg_or_zero" "w,ZDz,r") +- )))] ++ ))) ++ (clobber (reg:CC CC_REGNUM))] + "TARGET_SIMD" + "@ + cm\t%d0, %d, %d +@@ -3070,15 +2985,7 @@ + happening in the 'w' constraint cases. */ + && GP_REGNUM_P (REGNO (operands[0])) + && GP_REGNUM_P (REGNO (operands[1]))" +- [(set (reg:CC CC_REGNUM) +- (compare:CC +- (match_dup 1) +- (match_dup 2))) +- (set (match_dup 0) +- (neg:DI +- (COMPARISONS:DI +- (match_operand 3 "cc_register" "") +- (const_int 0))))] ++ [(const_int 0)] + { + enum machine_mode mode = SELECT_CC_MODE (, operands[1], operands[2]); + rtx cc_reg = aarch64_gen_compare_reg (, operands[1], operands[2]); +@@ -3086,8 +2993,7 @@ + emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg)); + DONE; + } +- [(set_attr "simd_type" "simd_cmp") +- (set_attr "simd_mode" "DI")] ++ [(set_attr "type" "neon_compare, neon_compare_zero, multiple")] + ) + + ;; cm(hs|hi) +@@ -3101,8 +3007,7 @@ + )))] + "TARGET_SIMD" + "cm\t%0, %, %" +- [(set_attr "simd_type" "simd_cmp") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_compare")] + ) + + (define_insn_and_split "aarch64_cmdi" +@@ -3111,7 +3016,8 @@ + (UCOMPARISONS:DI + (match_operand:DI 1 "register_operand" "w,r") + (match_operand:DI 2 "aarch64_simd_reg_or_zero" "w,r") +- )))] ++ ))) ++ (clobber (reg:CC CC_REGNUM))] + "TARGET_SIMD" + "@ + cm\t%d0, %d, %d +@@ -3121,24 +3027,15 @@ + happening in the 'w' constraint cases. */ + && GP_REGNUM_P (REGNO (operands[0])) + && GP_REGNUM_P (REGNO (operands[1]))" +- [(set (reg:CC CC_REGNUM) +- (compare:CC +- (match_dup 1) +- (match_dup 2))) +- (set (match_dup 0) +- (neg:DI +- (UCOMPARISONS:DI +- (match_operand 3 "cc_register" "") +- (const_int 0))))] ++ [(const_int 0)] + { +- enum machine_mode mode = SELECT_CC_MODE (, operands[1], operands[2]); ++ enum machine_mode mode = CCmode; + rtx cc_reg = aarch64_gen_compare_reg (, operands[1], operands[2]); + rtx comparison = gen_rtx_ (mode, operands[1], operands[2]); + emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg)); + DONE; + } +- [(set_attr "simd_type" "simd_cmp") +- (set_attr "simd_mode" "DI")] ++ [(set_attr "type" "neon_compare, neon_compare_zero")] + ) + + ;; cmtst +@@ -3153,8 +3050,7 @@ + (vec_duplicate: (const_int 0)))))] + "TARGET_SIMD" + "cmtst\t%0, %1, %2" +- [(set_attr "simd_type" "simd_cmp") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_tst")] + ) + + (define_insn_and_split "aarch64_cmtstdi" +@@ -3164,7 +3060,8 @@ + (and:DI + (match_operand:DI 1 "register_operand" "w,r") + (match_operand:DI 2 "register_operand" "w,r")) +- (const_int 0))))] ++ (const_int 0)))) ++ (clobber (reg:CC CC_REGNUM))] + "TARGET_SIMD" + "@ + cmtst\t%d0, %d1, %d2 +@@ -3174,16 +3071,7 @@ + happening in the 'w' constraint cases. */ + && GP_REGNUM_P (REGNO (operands[0])) + && GP_REGNUM_P (REGNO (operands[1]))" +- [(set (reg:CC_NZ CC_REGNUM) +- (compare:CC_NZ +- (and:DI (match_dup 1) +- (match_dup 2)) +- (const_int 0))) +- (set (match_dup 0) +- (neg:DI +- (ne:DI +- (match_operand 3 "cc_register" "") +- (const_int 0))))] ++ [(const_int 0)] + { + rtx and_tree = gen_rtx_AND (DImode, operands[1], operands[2]); + enum machine_mode mode = SELECT_CC_MODE (NE, and_tree, const0_rtx); +@@ -3192,8 +3080,7 @@ + emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg)); + DONE; + } +- [(set_attr "simd_type" "simd_cmp") +- (set_attr "simd_mode" "DI")] ++ [(set_attr "type" "neon_tst")] + ) + + ;; fcm(eq|ge|gt|le|lt) +@@ -3209,10 +3096,25 @@ + "@ + fcm\t%0, %, % + fcm\t%0, %1, 0" +- [(set_attr "simd_type" "simd_fcmp") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_compare_")] + ) + ++;; fac(ge|gt) ++;; Note we can also handle what would be fac(le|lt) by ++;; generating fac(ge|gt). ++ ++(define_insn "*aarch64_fac" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (neg: ++ (FAC_COMPARISONS: ++ (abs:VALLF (match_operand:VALLF 1 "register_operand" "w")) ++ (abs:VALLF (match_operand:VALLF 2 "register_operand" "w")) ++ )))] ++ "TARGET_SIMD" ++ "fac\t%0, %, %" ++ [(set_attr "type" "neon_fp_compare_")] ++) ++ + ;; addp + + (define_insn "aarch64_addp" +@@ -3223,8 +3125,7 @@ + UNSPEC_ADDP))] + "TARGET_SIMD" + "addp\t%0, %1, %2" +- [(set_attr "simd_type" "simd_add") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_reduc_add")] + ) + + (define_insn "aarch64_addpdi" +@@ -3234,34 +3135,9 @@ + UNSPEC_ADDP))] + "TARGET_SIMD" + "addp\t%d0, %1.2d" +- [(set_attr "simd_type" "simd_add") +- (set_attr "simd_mode" "DI")] ++ [(set_attr "type" "neon_reduc_add")] + ) + +-;; v(max|min) +- +-(define_expand "aarch64_" +- [(set (match_operand:VDQ_BHSI 0 "register_operand" "=w") +- (MAXMIN:VDQ_BHSI (match_operand:VDQ_BHSI 1 "register_operand" "w") +- (match_operand:VDQ_BHSI 2 "register_operand" "w")))] +- "TARGET_SIMD" +-{ +- emit_insn (gen_3 (operands[0], operands[1], operands[2])); +- DONE; +-}) +- +- +-(define_insn "aarch64_" +- [(set (match_operand:VDQF 0 "register_operand" "=w") +- (unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w") +- (match_operand:VDQF 2 "register_operand" "w")] +- FMAXMIN))] +- "TARGET_SIMD" +- "\t%0., %1., %2." +- [(set_attr "simd_type" "simd_fminmax") +- (set_attr "simd_mode" "")] +-) +- + ;; sqrt + + (define_insn "sqrt2" +@@ -3269,20 +3145,9 @@ + (sqrt:VDQF (match_operand:VDQF 1 "register_operand" "w")))] + "TARGET_SIMD" + "fsqrt\\t%0., %1." +- [(set_attr "simd_type" "simd_fsqrt") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_fp_sqrt_")] + ) + +-(define_expand "aarch64_sqrt" +- [(match_operand:VDQF 0 "register_operand" "=w") +- (match_operand:VDQF 1 "register_operand" "w")] +- "TARGET_SIMD" +-{ +- emit_insn (gen_sqrt2 (operands[0], operands[1])); +- DONE; +-}) +- +- + ;; Patterns for vector struct loads and stores. + + (define_insn "vec_load_lanesoi" +@@ -3292,8 +3157,8 @@ + UNSPEC_LD2))] + "TARGET_SIMD" + "ld2\\t{%S0. - %T0.}, %1" +- [(set_attr "simd_type" "simd_load2") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_load2_2reg")] ++) + + (define_insn "vec_store_lanesoi" + [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv") +@@ -3302,8 +3167,8 @@ + UNSPEC_ST2))] + "TARGET_SIMD" + "st2\\t{%S1. - %T1.}, %0" +- [(set_attr "simd_type" "simd_store2") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_store2_2reg")] ++) + + (define_insn "vec_load_lanesci" + [(set (match_operand:CI 0 "register_operand" "=w") +@@ -3312,8 +3177,8 @@ + UNSPEC_LD3))] + "TARGET_SIMD" + "ld3\\t{%S0. - %U0.}, %1" +- [(set_attr "simd_type" "simd_load3") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_load3_3reg")] ++) + + (define_insn "vec_store_lanesci" + [(set (match_operand:CI 0 "aarch64_simd_struct_operand" "=Utv") +@@ -3322,8 +3187,8 @@ + UNSPEC_ST3))] + "TARGET_SIMD" + "st3\\t{%S1. - %U1.}, %0" +- [(set_attr "simd_type" "simd_store3") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_store3_3reg")] ++) + + (define_insn "vec_load_lanesxi" + [(set (match_operand:XI 0 "register_operand" "=w") +@@ -3332,8 +3197,8 @@ + UNSPEC_LD4))] + "TARGET_SIMD" + "ld4\\t{%S0. - %V0.}, %1" +- [(set_attr "simd_type" "simd_load4") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_load4_4reg")] ++) + + (define_insn "vec_store_lanesxi" + [(set (match_operand:XI 0 "aarch64_simd_struct_operand" "=Utv") +@@ -3342,8 +3207,8 @@ + UNSPEC_ST4))] + "TARGET_SIMD" + "st4\\t{%S1. - %V1.}, %0" +- [(set_attr "simd_type" "simd_store4") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_store4_4reg")] ++) + + ;; Reload patterns for AdvSIMD register list operands. + +@@ -3375,9 +3240,10 @@ + default: gcc_unreachable (); + } + } +- [(set_attr "simd_type" "simd_move,simd_store,simd_load") +- (set (attr "length") (symbol_ref "aarch64_simd_attr_length_move (insn)")) +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_move,neon_store_reg_q,\ ++ neon_load_reg_q") ++ (set (attr "length") (symbol_ref "aarch64_simd_attr_length_move (insn)"))] ++) + + (define_split + [(set (match_operand:OI 0 "register_operand" "") +@@ -3459,8 +3325,8 @@ + (vec_duplicate:VD (const_int 0)))) 0))] + "TARGET_SIMD" + "ld2\\t{%S0. - %T0.}, %1" +- [(set_attr "simd_type" "simd_load2") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_load2_2reg")] ++) + + (define_insn "aarch64_ld2_dreg" + [(set (match_operand:OI 0 "register_operand" "=w") +@@ -3476,8 +3342,8 @@ + (const_int 0))) 0))] + "TARGET_SIMD" + "ld1\\t{%S0.1d - %T0.1d}, %1" +- [(set_attr "simd_type" "simd_load2") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_load1_2reg")] ++) + + (define_insn "aarch64_ld3_dreg" + [(set (match_operand:CI 0 "register_operand" "=w") +@@ -3498,8 +3364,8 @@ + (vec_duplicate:VD (const_int 0)))) 0))] + "TARGET_SIMD" + "ld3\\t{%S0. - %U0.}, %1" +- [(set_attr "simd_type" "simd_load3") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_load3_3reg")] ++) + + (define_insn "aarch64_ld3_dreg" + [(set (match_operand:CI 0 "register_operand" "=w") +@@ -3520,8 +3386,8 @@ + (const_int 0))) 0))] + "TARGET_SIMD" + "ld1\\t{%S0.1d - %U0.1d}, %1" +- [(set_attr "simd_type" "simd_load3") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_load1_3reg")] ++) + + (define_insn "aarch64_ld4_dreg" + [(set (match_operand:XI 0 "register_operand" "=w") +@@ -3547,8 +3413,8 @@ + (vec_duplicate:VD (const_int 0))))) 0))] + "TARGET_SIMD" + "ld4\\t{%S0. - %V0.}, %1" +- [(set_attr "simd_type" "simd_load4") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_load4_4reg")] ++) + + (define_insn "aarch64_ld4_dreg" + [(set (match_operand:XI 0 "register_operand" "=w") +@@ -3574,8 +3440,8 @@ + (const_int 0)))) 0))] + "TARGET_SIMD" + "ld1\\t{%S0.1d - %V0.1d}, %1" +- [(set_attr "simd_type" "simd_load4") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_load1_4reg")] ++) + + (define_expand "aarch64_ld" + [(match_operand:VSTRUCT 0 "register_operand" "=w") +@@ -3689,8 +3555,7 @@ + UNSPEC_TBL))] + "TARGET_SIMD" + "tbl\\t%0., {%1.16b}, %2." +- [(set_attr "simd_type" "simd_tbl") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_tbl1")] + ) + + ;; Two source registers. +@@ -3702,8 +3567,7 @@ + UNSPEC_TBL))] + "TARGET_SIMD" + "tbl\\t%0.16b, {%S1.16b - %T1.16b}, %2.16b" +- [(set_attr "simd_type" "simd_tbl") +- (set_attr "simd_mode" "V16QI")] ++ [(set_attr "type" "neon_tbl2_q")] + ) + + (define_insn_and_split "aarch64_combinev16qi" +@@ -3718,7 +3582,9 @@ + { + aarch64_split_combinev16qi (operands); + DONE; +-}) ++} ++[(set_attr "type" "multiple")] ++) + + (define_insn "aarch64_" + [(set (match_operand:VALL 0 "register_operand" "=w") +@@ -3727,8 +3593,7 @@ + PERMUTE))] + "TARGET_SIMD" + "\\t%0., %1., %2." +- [(set_attr "simd_type" "simd_") +- (set_attr "simd_mode" "")] ++ [(set_attr "type" "neon_permute")] + ) + + (define_insn "aarch64_st2_dreg" +@@ -3738,8 +3603,8 @@ + UNSPEC_ST2))] + "TARGET_SIMD" + "st2\\t{%S1. - %T1.}, %0" +- [(set_attr "simd_type" "simd_store2") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_store2_2reg")] ++) + + (define_insn "aarch64_st2_dreg" + [(set (match_operand:TI 0 "aarch64_simd_struct_operand" "=Utv") +@@ -3748,8 +3613,8 @@ + UNSPEC_ST2))] + "TARGET_SIMD" + "st1\\t{%S1.1d - %T1.1d}, %0" +- [(set_attr "simd_type" "simd_store2") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_store1_2reg")] ++) + + (define_insn "aarch64_st3_dreg" + [(set (match_operand:EI 0 "aarch64_simd_struct_operand" "=Utv") +@@ -3758,8 +3623,8 @@ + UNSPEC_ST3))] + "TARGET_SIMD" + "st3\\t{%S1. - %U1.}, %0" +- [(set_attr "simd_type" "simd_store3") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_store3_3reg")] ++) + + (define_insn "aarch64_st3_dreg" + [(set (match_operand:EI 0 "aarch64_simd_struct_operand" "=Utv") +@@ -3768,8 +3633,8 @@ + UNSPEC_ST3))] + "TARGET_SIMD" + "st1\\t{%S1.1d - %U1.1d}, %0" +- [(set_attr "simd_type" "simd_store3") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_store1_3reg")] ++) + + (define_insn "aarch64_st4_dreg" + [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv") +@@ -3778,8 +3643,8 @@ + UNSPEC_ST4))] + "TARGET_SIMD" + "st4\\t{%S1. - %V1.}, %0" +- [(set_attr "simd_type" "simd_store4") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_store4_4reg")] ++) + + (define_insn "aarch64_st4_dreg" + [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv") +@@ -3788,8 +3653,8 @@ + UNSPEC_ST4))] + "TARGET_SIMD" + "st1\\t{%S1.1d - %V1.1d}, %0" +- [(set_attr "simd_type" "simd_store4") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_store1_4reg")] ++) + + (define_expand "aarch64_st" + [(match_operand:DI 0 "register_operand" "r") +@@ -3867,5 +3732,154 @@ + (match_operand: 1 "aarch64_simd_struct_operand" "Utv")))] + "TARGET_SIMD" + "ld1r\\t{%0.}, %1" +- [(set_attr "simd_type" "simd_load1r") +- (set_attr "simd_mode" "")]) ++ [(set_attr "type" "neon_load1_all_lanes")] ++) ++ ++(define_insn "aarch64_frecpe" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w")] ++ UNSPEC_FRECPE))] ++ "TARGET_SIMD" ++ "frecpe\\t%0., %1." ++ [(set_attr "type" "neon_fp_recpe_")] ++) ++ ++(define_insn "aarch64_frecp" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ FRECP))] ++ "TARGET_SIMD" ++ "frecp\\t%0, %1" ++ [(set_attr "type" "neon_fp_recp_")] ++) ++ ++(define_insn "aarch64_frecps" ++ [(set (match_operand:VALLF 0 "register_operand" "=w") ++ (unspec:VALLF [(match_operand:VALLF 1 "register_operand" "w") ++ (match_operand:VALLF 2 "register_operand" "w")] ++ UNSPEC_FRECPS))] ++ "TARGET_SIMD" ++ "frecps\\t%0, %1, %2" ++ [(set_attr "type" "neon_fp_recps_")] ++) ++ ++;; aes ++ ++(define_insn "aarch64_crypto_aesv16qi" ++ [(set (match_operand:V16QI 0 "register_operand" "=w") ++ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "0") ++ (match_operand:V16QI 2 "register_operand" "w")] ++ CRYPTO_AES))] ++ "TARGET_SIMD && TARGET_CRYPTO" ++ "aes\\t%0.16b, %2.16b" ++ [(set_attr "type" "crypto_aes")] ++) ++ ++(define_insn "aarch64_crypto_aesv16qi" ++ [(set (match_operand:V16QI 0 "register_operand" "=w") ++ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "w")] ++ CRYPTO_AESMC))] ++ "TARGET_SIMD && TARGET_CRYPTO" ++ "aes\\t%0.16b, %1.16b" ++ [(set_attr "type" "crypto_aes")] ++) ++ ++;; sha1 ++ ++(define_insn "aarch64_crypto_sha1hsi" ++ [(set (match_operand:SI 0 "register_operand" "=w") ++ (unspec:SI [(match_operand:SI 1 ++ "register_operand" "w")] ++ UNSPEC_SHA1H))] ++ "TARGET_SIMD && TARGET_CRYPTO" ++ "sha1h\\t%s0, %s1" ++ [(set_attr "type" "crypto_sha1_fast")] ++) ++ ++(define_insn "aarch64_crypto_sha1su1v4si" ++ [(set (match_operand:V4SI 0 "register_operand" "=w") ++ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "0") ++ (match_operand:V4SI 2 "register_operand" "w")] ++ UNSPEC_SHA1SU1))] ++ "TARGET_SIMD && TARGET_CRYPTO" ++ "sha1su1\\t%0.4s, %2.4s" ++ [(set_attr "type" "crypto_sha1_fast")] ++) ++ ++(define_insn "aarch64_crypto_sha1v4si" ++ [(set (match_operand:V4SI 0 "register_operand" "=w") ++ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "0") ++ (match_operand:SI 2 "register_operand" "w") ++ (match_operand:V4SI 3 "register_operand" "w")] ++ CRYPTO_SHA1))] ++ "TARGET_SIMD && TARGET_CRYPTO" ++ "sha1\\t%q0, %s2, %3.4s" ++ [(set_attr "type" "crypto_sha1_slow")] ++) ++ ++(define_insn "aarch64_crypto_sha1su0v4si" ++ [(set (match_operand:V4SI 0 "register_operand" "=w") ++ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "0") ++ (match_operand:V4SI 2 "register_operand" "w") ++ (match_operand:V4SI 3 "register_operand" "w")] ++ UNSPEC_SHA1SU0))] ++ "TARGET_SIMD && TARGET_CRYPTO" ++ "sha1su0\\t%0.4s, %2.4s, %3.4s" ++ [(set_attr "type" "crypto_sha1_xor")] ++) ++ ++;; sha256 ++ ++(define_insn "aarch64_crypto_sha256hv4si" ++ [(set (match_operand:V4SI 0 "register_operand" "=w") ++ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "0") ++ (match_operand:V4SI 2 "register_operand" "w") ++ (match_operand:V4SI 3 "register_operand" "w")] ++ CRYPTO_SHA256))] ++ "TARGET_SIMD && TARGET_CRYPTO" ++ "sha256h\\t%q0, %q2, %3.4s" ++ [(set_attr "type" "crypto_sha256_slow")] ++) ++ ++(define_insn "aarch64_crypto_sha256su0v4si" ++ [(set (match_operand:V4SI 0 "register_operand" "=w") ++ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "0") ++ (match_operand:V4SI 2 "register_operand" "w")] ++ UNSPEC_SHA256SU0))] ++ "TARGET_SIMD &&TARGET_CRYPTO" ++ "sha256su0\\t%0.4s, %2.4s" ++ [(set_attr "type" "crypto_sha256_fast")] ++) ++ ++(define_insn "aarch64_crypto_sha256su1v4si" ++ [(set (match_operand:V4SI 0 "register_operand" "=w") ++ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "0") ++ (match_operand:V4SI 2 "register_operand" "w") ++ (match_operand:V4SI 3 "register_operand" "w")] ++ UNSPEC_SHA256SU1))] ++ "TARGET_SIMD &&TARGET_CRYPTO" ++ "sha256su1\\t%0.4s, %2.4s, %3.4s" ++ [(set_attr "type" "crypto_sha256_slow")] ++) ++ ++;; pmull ++ ++(define_insn "aarch64_crypto_pmulldi" ++ [(set (match_operand:TI 0 "register_operand" "=w") ++ (unspec:TI [(match_operand:DI 1 "register_operand" "w") ++ (match_operand:DI 2 "register_operand" "w")] ++ UNSPEC_PMULL))] ++ "TARGET_SIMD && TARGET_CRYPTO" ++ "pmull\\t%0.1q, %1.1d, %2.1d" ++ [(set_attr "type" "neon_mul_d_long")] ++) ++ ++(define_insn "aarch64_crypto_pmullv2di" ++ [(set (match_operand:TI 0 "register_operand" "=w") ++ (unspec:TI [(match_operand:V2DI 1 "register_operand" "w") ++ (match_operand:V2DI 2 "register_operand" "w")] ++ UNSPEC_PMULL2))] ++ "TARGET_SIMD && TARGET_CRYPTO" ++ "pmull2\\t%0.1q, %1.2d, %2.2d" ++ [(set_attr "type" "neon_mul_d_long")] ++) +--- a/src/gcc/config/aarch64/predicates.md ++++ b/src/gcc/config/aarch64/predicates.md +@@ -115,16 +115,11 @@ + (match_test "aarch64_legitimate_address_p (mode, XEXP (op, 0), PARALLEL, + 0)"))) + +-(define_predicate "aarch64_const_address" +- (and (match_code "symbol_ref") +- (match_test "mode == DImode && CONSTANT_ADDRESS_P (op)"))) +- + (define_predicate "aarch64_valid_symref" + (match_code "const, symbol_ref, label_ref") + { +- enum aarch64_symbol_type symbol_type; +- return (aarch64_symbolic_constant_p (op, SYMBOL_CONTEXT_ADR, &symbol_type) +- && symbol_type != SYMBOL_FORCE_TO_MEM); ++ return (aarch64_classify_symbolic_expression (op, SYMBOL_CONTEXT_ADR) ++ != SYMBOL_FORCE_TO_MEM); + }) + + (define_predicate "aarch64_tls_ie_symref" +@@ -170,15 +165,10 @@ + }) + + (define_predicate "aarch64_mov_operand" +- (and (match_code "reg,subreg,mem,const_int,symbol_ref,high") ++ (and (match_code "reg,subreg,mem,const,const_int,symbol_ref,label_ref,high") + (ior (match_operand 0 "register_operand") + (ior (match_operand 0 "memory_operand") +- (ior (match_test "GET_CODE (op) == HIGH +- && aarch64_valid_symref (XEXP (op, 0), +- GET_MODE (XEXP (op, 0)))") +- (ior (match_test "CONST_INT_P (op) +- && aarch64_move_imm (INTVAL (op), mode)") +- (match_test "aarch64_const_address (op, mode)"))))))) ++ (match_test "aarch64_mov_operand_p (op, SYMBOL_CONTEXT_ADR, mode)"))))) + + (define_predicate "aarch64_movti_operand" + (and (match_code "reg,subreg,mem,const_int") +--- a/src/gcc/config/aarch64/aarch64-elf.h ++++ b/src/gcc/config/aarch64/aarch64-elf.h +@@ -106,7 +106,6 @@ + + #define ASM_COMMENT_START "//" + +-#define REGISTER_PREFIX "" + #define LOCAL_LABEL_PREFIX "." + #define USER_LABEL_PREFIX "" + +--- a/src/gcc/config/aarch64/arm_neon.h ++++ b/src/gcc/config/aarch64/arm_neon.h +@@ -29,6 +29,9 @@ + + #include + ++#define __AARCH64_UINT64_C(__C) ((uint64_t) __C) ++#define __AARCH64_INT64_C(__C) ((int64_t) __C) ++ + typedef __builtin_aarch64_simd_qi int8x8_t + __attribute__ ((__vector_size__ (8))); + typedef __builtin_aarch64_simd_hi int16x4_t +@@ -72,6 +75,8 @@ + __attribute__ ((__vector_size__ (16))); + typedef __builtin_aarch64_simd_poly16 poly16x8_t + __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_poly64 poly64x2_t ++ __attribute__ ((__vector_size__ (16))); + typedef __builtin_aarch64_simd_uqi uint8x16_t + __attribute__ ((__vector_size__ (16))); + typedef __builtin_aarch64_simd_uhi uint16x8_t +@@ -85,6 +90,8 @@ + typedef double float64_t; + typedef __builtin_aarch64_simd_poly8 poly8_t; + typedef __builtin_aarch64_simd_poly16 poly16_t; ++typedef __builtin_aarch64_simd_poly64 poly64_t; ++typedef __builtin_aarch64_simd_poly128 poly128_t; + + typedef struct int8x8x2_t + { +@@ -446,7 +453,66 @@ + poly16x8_t val[4]; + } poly16x8x4_t; + ++/* vget_lane internal macros. */ + ++#define __aarch64_vget_lane_any(__size, __cast_ret, __cast_a, __a, __b) \ ++ (__cast_ret \ ++ __builtin_aarch64_get_lane##__size (__cast_a __a, __b)) ++ ++#define __aarch64_vget_lane_f32(__a, __b) \ ++ __aarch64_vget_lane_any (v2sf, , , __a, __b) ++#define __aarch64_vget_lane_f64(__a, __b) (__a) ++ ++#define __aarch64_vget_lane_p8(__a, __b) \ ++ __aarch64_vget_lane_any (v8qi, (poly8_t), (int8x8_t), __a, __b) ++#define __aarch64_vget_lane_p16(__a, __b) \ ++ __aarch64_vget_lane_any (v4hi, (poly16_t), (int16x4_t), __a, __b) ++ ++#define __aarch64_vget_lane_s8(__a, __b) \ ++ __aarch64_vget_lane_any (v8qi, , ,__a, __b) ++#define __aarch64_vget_lane_s16(__a, __b) \ ++ __aarch64_vget_lane_any (v4hi, , ,__a, __b) ++#define __aarch64_vget_lane_s32(__a, __b) \ ++ __aarch64_vget_lane_any (v2si, , ,__a, __b) ++#define __aarch64_vget_lane_s64(__a, __b) (__a) ++ ++#define __aarch64_vget_lane_u8(__a, __b) \ ++ __aarch64_vget_lane_any (v8qi, (uint8_t), (int8x8_t), __a, __b) ++#define __aarch64_vget_lane_u16(__a, __b) \ ++ __aarch64_vget_lane_any (v4hi, (uint16_t), (int16x4_t), __a, __b) ++#define __aarch64_vget_lane_u32(__a, __b) \ ++ __aarch64_vget_lane_any (v2si, (uint32_t), (int32x2_t), __a, __b) ++#define __aarch64_vget_lane_u64(__a, __b) (__a) ++ ++#define __aarch64_vgetq_lane_f32(__a, __b) \ ++ __aarch64_vget_lane_any (v4sf, , , __a, __b) ++#define __aarch64_vgetq_lane_f64(__a, __b) \ ++ __aarch64_vget_lane_any (v2df, , , __a, __b) ++ ++#define __aarch64_vgetq_lane_p8(__a, __b) \ ++ __aarch64_vget_lane_any (v16qi, (poly8_t), (int8x16_t), __a, __b) ++#define __aarch64_vgetq_lane_p16(__a, __b) \ ++ __aarch64_vget_lane_any (v8hi, (poly16_t), (int16x8_t), __a, __b) ++ ++#define __aarch64_vgetq_lane_s8(__a, __b) \ ++ __aarch64_vget_lane_any (v16qi, , ,__a, __b) ++#define __aarch64_vgetq_lane_s16(__a, __b) \ ++ __aarch64_vget_lane_any (v8hi, , ,__a, __b) ++#define __aarch64_vgetq_lane_s32(__a, __b) \ ++ __aarch64_vget_lane_any (v4si, , ,__a, __b) ++#define __aarch64_vgetq_lane_s64(__a, __b) \ ++ __aarch64_vget_lane_any (v2di, , ,__a, __b) ++ ++#define __aarch64_vgetq_lane_u8(__a, __b) \ ++ __aarch64_vget_lane_any (v16qi, (uint8_t), (int8x16_t), __a, __b) ++#define __aarch64_vgetq_lane_u16(__a, __b) \ ++ __aarch64_vget_lane_any (v8hi, (uint16_t), (int16x8_t), __a, __b) ++#define __aarch64_vgetq_lane_u32(__a, __b) \ ++ __aarch64_vget_lane_any (v4si, (uint32_t), (int32x4_t), __a, __b) ++#define __aarch64_vgetq_lane_u64(__a, __b) \ ++ __aarch64_vget_lane_any (v2di, (uint64_t), (int64x2_t), __a, __b) ++ ++/* vadd */ + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vadd_s8 (int8x8_t __a, int8x8_t __b) + { +@@ -2307,155 +2373,156 @@ + return (poly16x4_t) __a; + } + ++/* vget_lane */ ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vget_lane_f32 (float32x2_t __a, const int __b) ++{ ++ return __aarch64_vget_lane_f32 (__a, __b); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vget_lane_f64 (float64x1_t __a, const int __b) ++{ ++ return __aarch64_vget_lane_f64 (__a, __b); ++} ++ ++__extension__ static __inline poly8_t __attribute__ ((__always_inline__)) ++vget_lane_p8 (poly8x8_t __a, const int __b) ++{ ++ return __aarch64_vget_lane_p8 (__a, __b); ++} ++ ++__extension__ static __inline poly16_t __attribute__ ((__always_inline__)) ++vget_lane_p16 (poly16x4_t __a, const int __b) ++{ ++ return __aarch64_vget_lane_p16 (__a, __b); ++} ++ + __extension__ static __inline int8_t __attribute__ ((__always_inline__)) + vget_lane_s8 (int8x8_t __a, const int __b) + { +- return (int8_t) __builtin_aarch64_get_lane_signedv8qi (__a, __b); ++ return __aarch64_vget_lane_s8 (__a, __b); + } + + __extension__ static __inline int16_t __attribute__ ((__always_inline__)) + vget_lane_s16 (int16x4_t __a, const int __b) + { +- return (int16_t) __builtin_aarch64_get_lane_signedv4hi (__a, __b); ++ return __aarch64_vget_lane_s16 (__a, __b); + } + + __extension__ static __inline int32_t __attribute__ ((__always_inline__)) + vget_lane_s32 (int32x2_t __a, const int __b) + { +- return (int32_t) __builtin_aarch64_get_lane_signedv2si (__a, __b); ++ return __aarch64_vget_lane_s32 (__a, __b); + } + +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vget_lane_f32 (float32x2_t __a, const int __b) ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vget_lane_s64 (int64x1_t __a, const int __b) + { +- return (float32_t) __builtin_aarch64_get_lanev2sf (__a, __b); ++ return __aarch64_vget_lane_s64 (__a, __b); + } + + __extension__ static __inline uint8_t __attribute__ ((__always_inline__)) + vget_lane_u8 (uint8x8_t __a, const int __b) + { +- return (uint8_t) __builtin_aarch64_get_lane_unsignedv8qi ((int8x8_t) __a, +- __b); ++ return __aarch64_vget_lane_u8 (__a, __b); + } + + __extension__ static __inline uint16_t __attribute__ ((__always_inline__)) + vget_lane_u16 (uint16x4_t __a, const int __b) + { +- return (uint16_t) __builtin_aarch64_get_lane_unsignedv4hi ((int16x4_t) __a, +- __b); ++ return __aarch64_vget_lane_u16 (__a, __b); + } + + __extension__ static __inline uint32_t __attribute__ ((__always_inline__)) + vget_lane_u32 (uint32x2_t __a, const int __b) + { +- return (uint32_t) __builtin_aarch64_get_lane_unsignedv2si ((int32x2_t) __a, +- __b); ++ return __aarch64_vget_lane_u32 (__a, __b); + } + +-__extension__ static __inline poly8_t __attribute__ ((__always_inline__)) +-vget_lane_p8 (poly8x8_t __a, const int __b) ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vget_lane_u64 (uint64x1_t __a, const int __b) + { +- return (poly8_t) __builtin_aarch64_get_lane_unsignedv8qi ((int8x8_t) __a, +- __b); ++ return __aarch64_vget_lane_u64 (__a, __b); + } + +-__extension__ static __inline poly16_t __attribute__ ((__always_inline__)) +-vget_lane_p16 (poly16x4_t __a, const int __b) ++/* vgetq_lane */ ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vgetq_lane_f32 (float32x4_t __a, const int __b) + { +- return (poly16_t) __builtin_aarch64_get_lane_unsignedv4hi ((int16x4_t) __a, +- __b); ++ return __aarch64_vgetq_lane_f32 (__a, __b); + } + +-__extension__ static __inline int64_t __attribute__ ((__always_inline__)) +-vget_lane_s64 (int64x1_t __a, const int __b) ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vgetq_lane_f64 (float64x2_t __a, const int __b) + { +- return (int64_t) __builtin_aarch64_get_lanedi (__a, __b); ++ return __aarch64_vgetq_lane_f64 (__a, __b); + } + +-__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) +-vget_lane_u64 (uint64x1_t __a, const int __b) ++__extension__ static __inline poly8_t __attribute__ ((__always_inline__)) ++vgetq_lane_p8 (poly8x16_t __a, const int __b) + { +- return (uint64_t) __builtin_aarch64_get_lanedi ((int64x1_t) __a, __b); ++ return __aarch64_vgetq_lane_p8 (__a, __b); + } + ++__extension__ static __inline poly16_t __attribute__ ((__always_inline__)) ++vgetq_lane_p16 (poly16x8_t __a, const int __b) ++{ ++ return __aarch64_vgetq_lane_p16 (__a, __b); ++} ++ + __extension__ static __inline int8_t __attribute__ ((__always_inline__)) + vgetq_lane_s8 (int8x16_t __a, const int __b) + { +- return (int8_t) __builtin_aarch64_get_lane_signedv16qi (__a, __b); ++ return __aarch64_vgetq_lane_s8 (__a, __b); + } + + __extension__ static __inline int16_t __attribute__ ((__always_inline__)) + vgetq_lane_s16 (int16x8_t __a, const int __b) + { +- return (int16_t) __builtin_aarch64_get_lane_signedv8hi (__a, __b); ++ return __aarch64_vgetq_lane_s16 (__a, __b); + } + + __extension__ static __inline int32_t __attribute__ ((__always_inline__)) + vgetq_lane_s32 (int32x4_t __a, const int __b) + { +- return (int32_t) __builtin_aarch64_get_lane_signedv4si (__a, __b); ++ return __aarch64_vgetq_lane_s32 (__a, __b); + } + +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vgetq_lane_f32 (float32x4_t __a, const int __b) ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vgetq_lane_s64 (int64x2_t __a, const int __b) + { +- return (float32_t) __builtin_aarch64_get_lanev4sf (__a, __b); ++ return __aarch64_vgetq_lane_s64 (__a, __b); + } + +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vgetq_lane_f64 (float64x2_t __a, const int __b) +-{ +- return (float64_t) __builtin_aarch64_get_lanev2df (__a, __b); +-} +- + __extension__ static __inline uint8_t __attribute__ ((__always_inline__)) + vgetq_lane_u8 (uint8x16_t __a, const int __b) + { +- return (uint8_t) __builtin_aarch64_get_lane_unsignedv16qi ((int8x16_t) __a, +- __b); ++ return __aarch64_vgetq_lane_u8 (__a, __b); + } + + __extension__ static __inline uint16_t __attribute__ ((__always_inline__)) + vgetq_lane_u16 (uint16x8_t __a, const int __b) + { +- return (uint16_t) __builtin_aarch64_get_lane_unsignedv8hi ((int16x8_t) __a, +- __b); ++ return __aarch64_vgetq_lane_u16 (__a, __b); + } + + __extension__ static __inline uint32_t __attribute__ ((__always_inline__)) + vgetq_lane_u32 (uint32x4_t __a, const int __b) + { +- return (uint32_t) __builtin_aarch64_get_lane_unsignedv4si ((int32x4_t) __a, +- __b); ++ return __aarch64_vgetq_lane_u32 (__a, __b); + } + +-__extension__ static __inline poly8_t __attribute__ ((__always_inline__)) +-vgetq_lane_p8 (poly8x16_t __a, const int __b) +-{ +- return (poly8_t) __builtin_aarch64_get_lane_unsignedv16qi ((int8x16_t) __a, +- __b); +-} +- +-__extension__ static __inline poly16_t __attribute__ ((__always_inline__)) +-vgetq_lane_p16 (poly16x8_t __a, const int __b) +-{ +- return (poly16_t) __builtin_aarch64_get_lane_unsignedv8hi ((int16x8_t) __a, +- __b); +-} +- +-__extension__ static __inline int64_t __attribute__ ((__always_inline__)) +-vgetq_lane_s64 (int64x2_t __a, const int __b) +-{ +- return __builtin_aarch64_get_lane_unsignedv2di (__a, __b); +-} +- + __extension__ static __inline uint64_t __attribute__ ((__always_inline__)) + vgetq_lane_u64 (uint64x2_t __a, const int __b) + { +- return (uint64_t) __builtin_aarch64_get_lane_unsignedv2di ((int64x2_t) __a, +- __b); ++ return __aarch64_vgetq_lane_u64 (__a, __b); + } + ++/* vreinterpret */ ++ + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) + vreinterpret_p8_s8 (int8x8_t __a) + { +@@ -3805,6 +3872,85 @@ + return (uint32x4_t) __builtin_aarch64_reinterpretv4siv8hi ((int16x8_t) __a); + } + ++#define __GET_LOW(__TYPE) \ ++ uint64x2_t tmp = vreinterpretq_u64_##__TYPE (__a); \ ++ uint64_t lo = vgetq_lane_u64 (tmp, 0); \ ++ return vreinterpret_##__TYPE##_u64 (lo); ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vget_low_f32 (float32x4_t __a) ++{ ++ __GET_LOW (f32); ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vget_low_f64 (float64x2_t __a) ++{ ++ return vgetq_lane_f64 (__a, 0); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vget_low_p8 (poly8x16_t __a) ++{ ++ __GET_LOW (p8); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vget_low_p16 (poly16x8_t __a) ++{ ++ __GET_LOW (p16); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vget_low_s8 (int8x16_t __a) ++{ ++ __GET_LOW (s8); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vget_low_s16 (int16x8_t __a) ++{ ++ __GET_LOW (s16); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vget_low_s32 (int32x4_t __a) ++{ ++ __GET_LOW (s32); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vget_low_s64 (int64x2_t __a) ++{ ++ return vgetq_lane_s64 (__a, 0); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vget_low_u8 (uint8x16_t __a) ++{ ++ __GET_LOW (u8); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vget_low_u16 (uint16x8_t __a) ++{ ++ __GET_LOW (u16); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vget_low_u32 (uint32x4_t __a) ++{ ++ __GET_LOW (u32); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vget_low_u64 (uint64x2_t __a) ++{ ++ return vgetq_lane_u64 (__a, 0); ++} ++ ++#undef __GET_LOW ++ + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vcombine_s8 (int8x8_t __a, int8x8_t __b) + { +@@ -4468,160 +4614,6 @@ + return result; + } + +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vabs_f32 (float32x2_t a) +-{ +- float32x2_t result; +- __asm__ ("fabs %0.2s,%1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vabs_s8 (int8x8_t a) +-{ +- int8x8_t result; +- __asm__ ("abs %0.8b,%1.8b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vabs_s16 (int16x4_t a) +-{ +- int16x4_t result; +- __asm__ ("abs %0.4h,%1.4h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vabs_s32 (int32x2_t a) +-{ +- int32x2_t result; +- __asm__ ("abs %0.2s,%1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vabsq_f32 (float32x4_t a) +-{ +- float32x4_t result; +- __asm__ ("fabs %0.4s,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vabsq_f64 (float64x2_t a) +-{ +- float64x2_t result; +- __asm__ ("fabs %0.2d,%1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vabsq_s8 (int8x16_t a) +-{ +- int8x16_t result; +- __asm__ ("abs %0.16b,%1.16b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vabsq_s16 (int16x8_t a) +-{ +- int16x8_t result; +- __asm__ ("abs %0.8h,%1.8h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vabsq_s32 (int32x4_t a) +-{ +- int32x4_t result; +- __asm__ ("abs %0.4s,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vabsq_s64 (int64x2_t a) +-{ +- int64x2_t result; +- __asm__ ("abs %0.2d,%1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vacged_f64 (float64_t a, float64_t b) +-{ +- float64_t result; +- __asm__ ("facge %d0,%d1,%d2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vacges_f32 (float32_t a, float32_t b) +-{ +- float32_t result; +- __asm__ ("facge %s0,%s1,%s2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vacgtd_f64 (float64_t a, float64_t b) +-{ +- float64_t result; +- __asm__ ("facgt %d0,%d1,%d2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vacgts_f32 (float32_t a, float32_t b) +-{ +- float32_t result; +- __asm__ ("facgt %s0,%s1,%s2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- + __extension__ static __inline int16_t __attribute__ ((__always_inline__)) + vaddlv_s8 (int8x8_t a) + { +@@ -4732,116 +4724,6 @@ + return result; + } + +-__extension__ static __inline int8_t __attribute__ ((__always_inline__)) +-vaddv_s8 (int8x8_t a) +-{ +- int8_t result; +- __asm__ ("addv %b0,%1.8b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int16_t __attribute__ ((__always_inline__)) +-vaddv_s16 (int16x4_t a) +-{ +- int16_t result; +- __asm__ ("addv %h0,%1.4h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) +-vaddv_u8 (uint8x8_t a) +-{ +- uint8_t result; +- __asm__ ("addv %b0,%1.8b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) +-vaddv_u16 (uint16x4_t a) +-{ +- uint16_t result; +- __asm__ ("addv %h0,%1.4h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int8_t __attribute__ ((__always_inline__)) +-vaddvq_s8 (int8x16_t a) +-{ +- int8_t result; +- __asm__ ("addv %b0,%1.16b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int16_t __attribute__ ((__always_inline__)) +-vaddvq_s16 (int16x8_t a) +-{ +- int16_t result; +- __asm__ ("addv %h0,%1.8h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32_t __attribute__ ((__always_inline__)) +-vaddvq_s32 (int32x4_t a) +-{ +- int32_t result; +- __asm__ ("addv %s0,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) +-vaddvq_u8 (uint8x16_t a) +-{ +- uint8_t result; +- __asm__ ("addv %b0,%1.16b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) +-vaddvq_u16 (uint16x8_t a) +-{ +- uint16_t result; +- __asm__ ("addv %h0,%1.8h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) +-vaddvq_u32 (uint32x4_t a) +-{ +- uint32_t result; +- __asm__ ("addv %s0,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) + vbsl_f32 (uint32x2_t a, float32x2_t b, float32x2_t c) + { +@@ -5095,358 +4977,6 @@ + return result; + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcage_f32 (float32x2_t a, float32x2_t b) +-{ +- uint32x2_t result; +- __asm__ ("facge %0.2s, %1.2s, %2.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcageq_f32 (float32x4_t a, float32x4_t b) +-{ +- uint32x4_t result; +- __asm__ ("facge %0.4s, %1.4s, %2.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcageq_f64 (float64x2_t a, float64x2_t b) +-{ +- uint64x2_t result; +- __asm__ ("facge %0.2d, %1.2d, %2.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcagt_f32 (float32x2_t a, float32x2_t b) +-{ +- uint32x2_t result; +- __asm__ ("facgt %0.2s, %1.2s, %2.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcagtq_f32 (float32x4_t a, float32x4_t b) +-{ +- uint32x4_t result; +- __asm__ ("facgt %0.4s, %1.4s, %2.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcagtq_f64 (float64x2_t a, float64x2_t b) +-{ +- uint64x2_t result; +- __asm__ ("facgt %0.2d, %1.2d, %2.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcale_f32 (float32x2_t a, float32x2_t b) +-{ +- uint32x2_t result; +- __asm__ ("facge %0.2s, %2.2s, %1.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcaleq_f32 (float32x4_t a, float32x4_t b) +-{ +- uint32x4_t result; +- __asm__ ("facge %0.4s, %2.4s, %1.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcaleq_f64 (float64x2_t a, float64x2_t b) +-{ +- uint64x2_t result; +- __asm__ ("facge %0.2d, %2.2d, %1.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcalt_f32 (float32x2_t a, float32x2_t b) +-{ +- uint32x2_t result; +- __asm__ ("facgt %0.2s, %2.2s, %1.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcaltq_f32 (float32x4_t a, float32x4_t b) +-{ +- uint32x4_t result; +- __asm__ ("facgt %0.4s, %2.4s, %1.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcaltq_f64 (float64x2_t a, float64x2_t b) +-{ +- uint64x2_t result; +- __asm__ ("facgt %0.2d, %2.2d, %1.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vceq_f32 (float32x2_t a, float32x2_t b) +-{ +- uint32x2_t result; +- __asm__ ("fcmeq %0.2s, %1.2s, %2.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vceq_f64 (float64x1_t a, float64x1_t b) +-{ +- uint64x1_t result; +- __asm__ ("fcmeq %d0, %d1, %d2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vceqd_f64 (float64_t a, float64_t b) +-{ +- float64_t result; +- __asm__ ("fcmeq %d0,%d1,%d2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vceqq_f32 (float32x4_t a, float32x4_t b) +-{ +- uint32x4_t result; +- __asm__ ("fcmeq %0.4s, %1.4s, %2.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vceqq_f64 (float64x2_t a, float64x2_t b) +-{ +- uint64x2_t result; +- __asm__ ("fcmeq %0.2d, %1.2d, %2.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vceqs_f32 (float32_t a, float32_t b) +-{ +- float32_t result; +- __asm__ ("fcmeq %s0,%s1,%s2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vceqzd_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcmeq %d0,%d1,#0" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vceqzs_f32 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcmeq %s0,%s1,#0" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcge_f32 (float32x2_t a, float32x2_t b) +-{ +- uint32x2_t result; +- __asm__ ("fcmge %0.2s, %1.2s, %2.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vcge_f64 (float64x1_t a, float64x1_t b) +-{ +- uint64x1_t result; +- __asm__ ("fcmge %d0, %d1, %d2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcgeq_f32 (float32x4_t a, float32x4_t b) +-{ +- uint32x4_t result; +- __asm__ ("fcmge %0.4s, %1.4s, %2.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcgeq_f64 (float64x2_t a, float64x2_t b) +-{ +- uint64x2_t result; +- __asm__ ("fcmge %0.2d, %1.2d, %2.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcgt_f32 (float32x2_t a, float32x2_t b) +-{ +- uint32x2_t result; +- __asm__ ("fcmgt %0.2s, %1.2s, %2.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vcgt_f64 (float64x1_t a, float64x1_t b) +-{ +- uint64x1_t result; +- __asm__ ("fcmgt %d0, %d1, %d2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcgtq_f32 (float32x4_t a, float32x4_t b) +-{ +- uint32x4_t result; +- __asm__ ("fcmgt %0.4s, %1.4s, %2.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcgtq_f64 (float64x2_t a, float64x2_t b) +-{ +- uint64x2_t result; +- __asm__ ("fcmgt %0.2d, %1.2d, %2.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcle_f32 (float32x2_t a, float32x2_t b) +-{ +- uint32x2_t result; +- __asm__ ("fcmge %0.2s, %2.2s, %1.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vcle_f64 (float64x1_t a, float64x1_t b) +-{ +- uint64x1_t result; +- __asm__ ("fcmge %d0, %d2, %d1" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcleq_f32 (float32x4_t a, float32x4_t b) +-{ +- uint32x4_t result; +- __asm__ ("fcmge %0.4s, %2.4s, %1.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcleq_f64 (float64x2_t a, float64x2_t b) +-{ +- uint64x2_t result; +- __asm__ ("fcmge %0.2d, %2.2d, %1.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vcls_s8 (int8x8_t a) + { +@@ -5513,50 +5043,6 @@ + return result; + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vclt_f32 (float32x2_t a, float32x2_t b) +-{ +- uint32x2_t result; +- __asm__ ("fcmgt %0.2s, %2.2s, %1.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vclt_f64 (float64x1_t a, float64x1_t b) +-{ +- uint64x1_t result; +- __asm__ ("fcmgt %d0, %d2, %d1" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcltq_f32 (float32x4_t a, float32x4_t b) +-{ +- uint32x4_t result; +- __asm__ ("fcmgt %0.4s, %2.4s, %1.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcltq_f64 (float64x2_t a, float64x2_t b) +-{ +- uint64x2_t result; +- __asm__ ("fcmgt %0.2d, %2.2d, %1.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vclz_s8 (int8x8_t a) + { +@@ -5915,72 +5401,6 @@ + + /* vcvt_f32_f16 not supported */ + +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vcvt_f32_f64 (float64x2_t a) +-{ +- float32x2_t result; +- __asm__ ("fcvtn %0.2s,%1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vcvt_f32_s32 (int32x2_t a) +-{ +- float32x2_t result; +- __asm__ ("scvtf %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vcvt_f32_u32 (uint32x2_t a) +-{ +- float32x2_t result; +- __asm__ ("ucvtf %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vcvt_f64_f32 (float32x2_t a) +-{ +- float64x2_t result; +- __asm__ ("fcvtl %0.2d,%1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +-vcvt_f64_s64 (uint64x1_t a) +-{ +- float64x1_t result; +- __asm__ ("scvtf %d0, %d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +-vcvt_f64_u64 (uint64x1_t a) +-{ +- float64x1_t result; +- __asm__ ("ucvtf %d0, %d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + /* vcvt_high_f16_f32 not supported */ + + /* vcvt_high_f32_f16 not supported */ +@@ -5987,28 +5407,6 @@ + + static float32x2_t vdup_n_f32 (float32_t); + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vcvt_high_f32_f64 (float32x2_t a, float64x2_t b) +-{ +- float32x4_t result = vcombine_f32 (a, vdup_n_f32 (0.0f)); +- __asm__ ("fcvtn2 %0.4s,%2.2d" +- : "+w"(result) +- : "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vcvt_high_f64_f32 (float32x4_t a) +-{ +- float64x2_t result; +- __asm__ ("fcvtl2 %0.2d,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + #define vcvt_n_f32_s32(a, b) \ + __extension__ \ + ({ \ +@@ -6057,160 +5455,6 @@ + result; \ + }) + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vcvt_s32_f32 (float32x2_t a) +-{ +- int32x2_t result; +- __asm__ ("fcvtzs %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcvt_u32_f32 (float32x2_t a) +-{ +- uint32x2_t result; +- __asm__ ("fcvtzu %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vcvta_s32_f32 (float32x2_t a) +-{ +- int32x2_t result; +- __asm__ ("fcvtas %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcvta_u32_f32 (float32x2_t a) +-{ +- uint32x2_t result; +- __asm__ ("fcvtau %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vcvtad_s64_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcvtas %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vcvtad_u64_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcvtau %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vcvtaq_s32_f32 (float32x4_t a) +-{ +- int32x4_t result; +- __asm__ ("fcvtas %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vcvtaq_s64_f64 (float64x2_t a) +-{ +- int64x2_t result; +- __asm__ ("fcvtas %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcvtaq_u32_f32 (float32x4_t a) +-{ +- uint32x4_t result; +- __asm__ ("fcvtau %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcvtaq_u64_f64 (float64x2_t a) +-{ +- uint64x2_t result; +- __asm__ ("fcvtau %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vcvtas_s64_f64 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcvtas %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vcvtas_u64_f64 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcvtau %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int64_t __attribute__ ((__always_inline__)) +-vcvtd_f64_s64 (int64_t a) +-{ +- int64_t result; +- __asm__ ("scvtf %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) +-vcvtd_f64_u64 (uint64_t a) +-{ +- uint64_t result; +- __asm__ ("ucvtf %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + #define vcvtd_n_f64_s64(a, b) \ + __extension__ \ + ({ \ +@@ -6259,402 +5503,6 @@ + result; \ + }) + +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vcvtd_s64_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcvtzs %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vcvtd_u64_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcvtzu %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vcvtm_s32_f32 (float32x2_t a) +-{ +- int32x2_t result; +- __asm__ ("fcvtms %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcvtm_u32_f32 (float32x2_t a) +-{ +- uint32x2_t result; +- __asm__ ("fcvtmu %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vcvtmd_s64_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcvtms %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vcvtmd_u64_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcvtmu %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vcvtmq_s32_f32 (float32x4_t a) +-{ +- int32x4_t result; +- __asm__ ("fcvtms %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vcvtmq_s64_f64 (float64x2_t a) +-{ +- int64x2_t result; +- __asm__ ("fcvtms %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcvtmq_u32_f32 (float32x4_t a) +-{ +- uint32x4_t result; +- __asm__ ("fcvtmu %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcvtmq_u64_f64 (float64x2_t a) +-{ +- uint64x2_t result; +- __asm__ ("fcvtmu %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vcvtms_s64_f64 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcvtms %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vcvtms_u64_f64 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcvtmu %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vcvtn_s32_f32 (float32x2_t a) +-{ +- int32x2_t result; +- __asm__ ("fcvtns %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcvtn_u32_f32 (float32x2_t a) +-{ +- uint32x2_t result; +- __asm__ ("fcvtnu %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vcvtnd_s64_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcvtns %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vcvtnd_u64_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcvtnu %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vcvtnq_s32_f32 (float32x4_t a) +-{ +- int32x4_t result; +- __asm__ ("fcvtns %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vcvtnq_s64_f64 (float64x2_t a) +-{ +- int64x2_t result; +- __asm__ ("fcvtns %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcvtnq_u32_f32 (float32x4_t a) +-{ +- uint32x4_t result; +- __asm__ ("fcvtnu %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcvtnq_u64_f64 (float64x2_t a) +-{ +- uint64x2_t result; +- __asm__ ("fcvtnu %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vcvtns_s64_f64 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcvtns %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vcvtns_u64_f64 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcvtnu %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vcvtp_s32_f32 (float32x2_t a) +-{ +- int32x2_t result; +- __asm__ ("fcvtps %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vcvtp_u32_f32 (float32x2_t a) +-{ +- uint32x2_t result; +- __asm__ ("fcvtpu %0.2s, %1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vcvtpd_s64_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcvtps %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vcvtpd_u64_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("fcvtpu %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vcvtpq_s32_f32 (float32x4_t a) +-{ +- int32x4_t result; +- __asm__ ("fcvtps %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vcvtpq_s64_f64 (float64x2_t a) +-{ +- int64x2_t result; +- __asm__ ("fcvtps %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcvtpq_u32_f32 (float32x4_t a) +-{ +- uint32x4_t result; +- __asm__ ("fcvtpu %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcvtpq_u64_f64 (float64x2_t a) +-{ +- uint64x2_t result; +- __asm__ ("fcvtpu %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vcvtps_s64_f64 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcvtps %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vcvtps_u64_f64 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcvtpu %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vcvtq_f32_s32 (int32x4_t a) +-{ +- float32x4_t result; +- __asm__ ("scvtf %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vcvtq_f32_u32 (uint32x4_t a) +-{ +- float32x4_t result; +- __asm__ ("ucvtf %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vcvtq_f64_s64 (int64x2_t a) +-{ +- float64x2_t result; +- __asm__ ("scvtf %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vcvtq_f64_u64 (uint64x2_t a) +-{ +- float64x2_t result; +- __asm__ ("ucvtf %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + #define vcvtq_n_f32_s32(a, b) \ + __extension__ \ + ({ \ +@@ -6751,72 +5599,6 @@ + result; \ + }) + +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vcvtq_s32_f32 (float32x4_t a) +-{ +- int32x4_t result; +- __asm__ ("fcvtzs %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vcvtq_s64_f64 (float64x2_t a) +-{ +- int64x2_t result; +- __asm__ ("fcvtzs %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vcvtq_u32_f32 (float32x4_t a) +-{ +- uint32x4_t result; +- __asm__ ("fcvtzu %0.4s, %1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vcvtq_u64_f64 (float64x2_t a) +-{ +- uint64x2_t result; +- __asm__ ("fcvtzu %0.2d, %1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32_t __attribute__ ((__always_inline__)) +-vcvts_f64_s32 (int32_t a) +-{ +- int32_t result; +- __asm__ ("scvtf %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) +-vcvts_f64_u32 (uint32_t a) +-{ +- uint32_t result; +- __asm__ ("ucvtf %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + #define vcvts_n_f32_s32(a, b) \ + __extension__ \ + ({ \ +@@ -6865,28 +5647,6 @@ + result; \ + }) + +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vcvts_s64_f64 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcvtzs %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vcvts_u64_f64 (float32_t a) +-{ +- float32_t result; +- __asm__ ("fcvtzu %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) + vcvtx_f32_f64 (float64x2_t a) + { +@@ -8110,151 +6870,7 @@ + return result; + } + +-#define vget_lane_f64(a, b) \ +- __extension__ \ +- ({ \ +- float64x1_t a_ = (a); \ +- float64_t result; \ +- __asm__ ("umov %x0, %1.d[%2]" \ +- : "=r"(result) \ +- : "w"(a_), "i"(b) \ +- : /* No clobbers */); \ +- result; \ +- }) +- +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vget_low_f32 (float32x4_t a) +-{ +- float32x2_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +-vget_low_f64 (float64x2_t a) +-{ +- float64x1_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +-vget_low_p8 (poly8x16_t a) +-{ +- poly8x8_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) +-vget_low_p16 (poly16x8_t a) +-{ +- poly16x4_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vget_low_s8 (int8x16_t a) +-{ +- int8x8_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vget_low_s16 (int16x8_t a) +-{ +- int16x4_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vget_low_s32 (int32x4_t a) +-{ +- int32x2_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) +-vget_low_s64 (int64x2_t a) +-{ +- int64x1_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vget_low_u8 (uint8x16_t a) +-{ +- uint8x8_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vget_low_u16 (uint16x8_t a) +-{ +- uint16x4_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vget_low_u32 (uint32x4_t a) +-{ +- uint32x2_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vget_low_u64 (uint64x2_t a) +-{ +- uint64x1_t result; +- __asm__ ("ins %0.d[0], %1.d[0]" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vhsub_s8 (int8x8_t a, int8x8_t b) + { + int8x8_t result; +@@ -8962,303 +7578,6 @@ + result; \ + }) + +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vmaxnm_f32 (float32x2_t a, float32x2_t b) +-{ +- float32x2_t result; +- __asm__ ("fmaxnm %0.2s,%1.2s,%2.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vmaxnmq_f32 (float32x4_t a, float32x4_t b) +-{ +- float32x4_t result; +- __asm__ ("fmaxnm %0.4s,%1.4s,%2.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vmaxnmq_f64 (float64x2_t a, float64x2_t b) +-{ +- float64x2_t result; +- __asm__ ("fmaxnm %0.2d,%1.2d,%2.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vmaxnmvq_f32 (float32x4_t a) +-{ +- float32_t result; +- __asm__ ("fmaxnmv %s0,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int8_t __attribute__ ((__always_inline__)) +-vmaxv_s8 (int8x8_t a) +-{ +- int8_t result; +- __asm__ ("smaxv %b0,%1.8b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int16_t __attribute__ ((__always_inline__)) +-vmaxv_s16 (int16x4_t a) +-{ +- int16_t result; +- __asm__ ("smaxv %h0,%1.4h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) +-vmaxv_u8 (uint8x8_t a) +-{ +- uint8_t result; +- __asm__ ("umaxv %b0,%1.8b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) +-vmaxv_u16 (uint16x4_t a) +-{ +- uint16_t result; +- __asm__ ("umaxv %h0,%1.4h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vmaxvq_f32 (float32x4_t a) +-{ +- float32_t result; +- __asm__ ("fmaxv %s0,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int8_t __attribute__ ((__always_inline__)) +-vmaxvq_s8 (int8x16_t a) +-{ +- int8_t result; +- __asm__ ("smaxv %b0,%1.16b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int16_t __attribute__ ((__always_inline__)) +-vmaxvq_s16 (int16x8_t a) +-{ +- int16_t result; +- __asm__ ("smaxv %h0,%1.8h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32_t __attribute__ ((__always_inline__)) +-vmaxvq_s32 (int32x4_t a) +-{ +- int32_t result; +- __asm__ ("smaxv %s0,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) +-vmaxvq_u8 (uint8x16_t a) +-{ +- uint8_t result; +- __asm__ ("umaxv %b0,%1.16b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) +-vmaxvq_u16 (uint16x8_t a) +-{ +- uint16_t result; +- __asm__ ("umaxv %h0,%1.8h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) +-vmaxvq_u32 (uint32x4_t a) +-{ +- uint32_t result; +- __asm__ ("umaxv %s0,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vminnmvq_f32 (float32x4_t a) +-{ +- float32_t result; +- __asm__ ("fminnmv %s0,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int8_t __attribute__ ((__always_inline__)) +-vminv_s8 (int8x8_t a) +-{ +- int8_t result; +- __asm__ ("sminv %b0,%1.8b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int16_t __attribute__ ((__always_inline__)) +-vminv_s16 (int16x4_t a) +-{ +- int16_t result; +- __asm__ ("sminv %h0,%1.4h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) +-vminv_u8 (uint8x8_t a) +-{ +- uint8_t result; +- __asm__ ("uminv %b0,%1.8b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) +-vminv_u16 (uint16x4_t a) +-{ +- uint16_t result; +- __asm__ ("uminv %h0,%1.4h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vminvq_f32 (float32x4_t a) +-{ +- float32_t result; +- __asm__ ("fminv %s0,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int8_t __attribute__ ((__always_inline__)) +-vminvq_s8 (int8x16_t a) +-{ +- int8_t result; +- __asm__ ("sminv %b0,%1.16b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int16_t __attribute__ ((__always_inline__)) +-vminvq_s16 (int16x8_t a) +-{ +- int16_t result; +- __asm__ ("sminv %h0,%1.8h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline int32_t __attribute__ ((__always_inline__)) +-vminvq_s32 (int32x4_t a) +-{ +- int32_t result; +- __asm__ ("sminv %s0,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) +-vminvq_u8 (uint8x16_t a) +-{ +- uint8_t result; +- __asm__ ("uminv %b0,%1.16b" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) +-vminvq_u16 (uint16x8_t a) +-{ +- uint16_t result; +- __asm__ ("uminv %h0,%1.8h" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) +-vminvq_u32 (uint32x4_t a) +-{ +- uint32_t result; +- __asm__ ("uminv %s0,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + #define vmla_lane_f32(a, b, c, d) \ + __extension__ \ + ({ \ +@@ -11382,7 +9701,7 @@ + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vmovn_high_s16 (int8x8_t a, int16x8_t b) + { +- int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("xtn2 %0.16b,%1.8h" + : "+w"(result) + : "w"(b) +@@ -11393,7 +9712,7 @@ + __extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) + vmovn_high_s32 (int16x4_t a, int32x4_t b) + { +- int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (__AARCH64_UINT64_C (0x0))); + __asm__ ("xtn2 %0.8h,%1.4s" + : "+w"(result) + : "w"(b) +@@ -11404,7 +9723,7 @@ + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) + vmovn_high_s64 (int32x2_t a, int64x2_t b) + { +- int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (__AARCH64_UINT64_C (0x0))); + __asm__ ("xtn2 %0.4s,%1.2d" + : "+w"(result) + : "w"(b) +@@ -11415,7 +9734,7 @@ + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vmovn_high_u16 (uint8x8_t a, uint16x8_t b) + { +- uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("xtn2 %0.16b,%1.8h" + : "+w"(result) + : "w"(b) +@@ -11426,7 +9745,7 @@ + __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) + vmovn_high_u32 (uint16x4_t a, uint32x4_t b) + { +- uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (__AARCH64_UINT64_C (0x0))); + __asm__ ("xtn2 %0.8h,%1.4s" + : "+w"(result) + : "w"(b) +@@ -11437,7 +9756,7 @@ + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) + vmovn_high_u64 (uint32x2_t a, uint64x2_t b) + { +- uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (__AARCH64_UINT64_C (0x0))); + __asm__ ("xtn2 %0.4s,%1.2d" + : "+w"(result) + : "w"(b) +@@ -13856,7 +12175,7 @@ + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vqmovn_high_s16 (int8x8_t a, int16x8_t b) + { +- int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("sqxtn2 %0.16b, %1.8h" + : "+w"(result) + : "w"(b) +@@ -13867,7 +12186,7 @@ + __extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) + vqmovn_high_s32 (int16x4_t a, int32x4_t b) + { +- int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (__AARCH64_UINT64_C (0x0))); + __asm__ ("sqxtn2 %0.8h, %1.4s" + : "+w"(result) + : "w"(b) +@@ -13878,7 +12197,7 @@ + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) + vqmovn_high_s64 (int32x2_t a, int64x2_t b) + { +- int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (__AARCH64_UINT64_C (0x0))); + __asm__ ("sqxtn2 %0.4s, %1.2d" + : "+w"(result) + : "w"(b) +@@ -13889,7 +12208,7 @@ + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vqmovn_high_u16 (uint8x8_t a, uint16x8_t b) + { +- uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("uqxtn2 %0.16b, %1.8h" + : "+w"(result) + : "w"(b) +@@ -13900,7 +12219,7 @@ + __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) + vqmovn_high_u32 (uint16x4_t a, uint32x4_t b) + { +- uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (__AARCH64_UINT64_C (0x0))); + __asm__ ("uqxtn2 %0.8h, %1.4s" + : "+w"(result) + : "w"(b) +@@ -13911,7 +12230,7 @@ + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) + vqmovn_high_u64 (uint32x2_t a, uint64x2_t b) + { +- uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (__AARCH64_UINT64_C (0x0))); + __asm__ ("uqxtn2 %0.4s, %1.2d" + : "+w"(result) + : "w"(b) +@@ -13922,7 +12241,7 @@ + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vqmovun_high_s16 (uint8x8_t a, int16x8_t b) + { +- uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("sqxtun2 %0.16b, %1.8h" + : "+w"(result) + : "w"(b) +@@ -13933,7 +12252,7 @@ + __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) + vqmovun_high_s32 (uint16x4_t a, int32x4_t b) + { +- uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (__AARCH64_UINT64_C (0x0))); + __asm__ ("sqxtun2 %0.8h, %1.4s" + : "+w"(result) + : "w"(b) +@@ -13944,7 +12263,7 @@ + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) + vqmovun_high_s64 (uint32x2_t a, int64x2_t b) + { +- uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (__AARCH64_UINT64_C (0x0))); + __asm__ ("sqxtun2 %0.4s, %1.2d" + : "+w"(result) + : "w"(b) +@@ -14002,7 +12321,8 @@ + int16x8_t b_ = (b); \ + int8x8_t a_ = (a); \ + int8x16_t result = vcombine_s8 \ +- (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ (a_, vcreate_s8 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqrshrn2 %0.16b, %1.8h, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14016,7 +12336,8 @@ + int32x4_t b_ = (b); \ + int16x4_t a_ = (a); \ + int16x8_t result = vcombine_s16 \ +- (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ (a_, vcreate_s16 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqrshrn2 %0.8h, %1.4s, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14030,7 +12351,8 @@ + int64x2_t b_ = (b); \ + int32x2_t a_ = (a); \ + int32x4_t result = vcombine_s32 \ +- (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ (a_, vcreate_s32 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqrshrn2 %0.4s, %1.2d, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14044,7 +12366,8 @@ + uint16x8_t b_ = (b); \ + uint8x8_t a_ = (a); \ + uint8x16_t result = vcombine_u8 \ +- (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ (a_, vcreate_u8 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("uqrshrn2 %0.16b, %1.8h, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14058,7 +12381,8 @@ + uint32x4_t b_ = (b); \ + uint16x4_t a_ = (a); \ + uint16x8_t result = vcombine_u16 \ +- (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ (a_, vcreate_u16 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("uqrshrn2 %0.8h, %1.4s, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14072,7 +12396,8 @@ + uint64x2_t b_ = (b); \ + uint32x2_t a_ = (a); \ + uint32x4_t result = vcombine_u32 \ +- (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ (a_, vcreate_u32 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("uqrshrn2 %0.4s, %1.2d, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14086,7 +12411,8 @@ + int16x8_t b_ = (b); \ + uint8x8_t a_ = (a); \ + uint8x16_t result = vcombine_u8 \ +- (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ (a_, vcreate_u8 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqrshrun2 %0.16b, %1.8h, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14100,7 +12426,8 @@ + int32x4_t b_ = (b); \ + uint16x4_t a_ = (a); \ + uint16x8_t result = vcombine_u16 \ +- (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ (a_, vcreate_u16 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqrshrun2 %0.8h, %1.4s, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14114,7 +12441,8 @@ + int64x2_t b_ = (b); \ + uint32x2_t a_ = (a); \ + uint32x4_t result = vcombine_u32 \ +- (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ (a_, vcreate_u32 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqrshrun2 %0.4s, %1.2d, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14128,7 +12456,8 @@ + int16x8_t b_ = (b); \ + int8x8_t a_ = (a); \ + int8x16_t result = vcombine_s8 \ +- (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ (a_, vcreate_s8 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqshrn2 %0.16b, %1.8h, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14142,7 +12471,8 @@ + int32x4_t b_ = (b); \ + int16x4_t a_ = (a); \ + int16x8_t result = vcombine_s16 \ +- (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ (a_, vcreate_s16 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqshrn2 %0.8h, %1.4s, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14156,7 +12486,8 @@ + int64x2_t b_ = (b); \ + int32x2_t a_ = (a); \ + int32x4_t result = vcombine_s32 \ +- (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ (a_, vcreate_s32 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqshrn2 %0.4s, %1.2d, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14170,7 +12501,8 @@ + uint16x8_t b_ = (b); \ + uint8x8_t a_ = (a); \ + uint8x16_t result = vcombine_u8 \ +- (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ (a_, vcreate_u8 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("uqshrn2 %0.16b, %1.8h, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14184,7 +12516,8 @@ + uint32x4_t b_ = (b); \ + uint16x4_t a_ = (a); \ + uint16x8_t result = vcombine_u16 \ +- (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ (a_, vcreate_u16 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("uqshrn2 %0.8h, %1.4s, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14198,7 +12531,8 @@ + uint64x2_t b_ = (b); \ + uint32x2_t a_ = (a); \ + uint32x4_t result = vcombine_u32 \ +- (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ (a_, vcreate_u32 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("uqshrn2 %0.4s, %1.2d, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14212,7 +12546,8 @@ + int16x8_t b_ = (b); \ + uint8x8_t a_ = (a); \ + uint8x16_t result = vcombine_u8 \ +- (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ (a_, vcreate_u8 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqshrun2 %0.16b, %1.8h, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14226,7 +12561,8 @@ + int32x4_t b_ = (b); \ + uint16x4_t a_ = (a); \ + uint16x8_t result = vcombine_u16 \ +- (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ (a_, vcreate_u16 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqshrun2 %0.8h, %1.4s, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14240,7 +12576,8 @@ + int64x2_t b_ = (b); \ + uint32x2_t a_ = (a); \ + uint32x4_t result = vcombine_u32 \ +- (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ (a_, vcreate_u32 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("sqshrun2 %0.4s, %1.2d, #%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -14292,17 +12629,6 @@ + return result; + } + +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vrecpe_f32 (float32x2_t a) +-{ +- float32x2_t result; +- __asm__ ("frecpe %0.2s,%1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) + vrecpe_u32 (uint32x2_t a) + { +@@ -14314,39 +12640,6 @@ + return result; + } + +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vrecped_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("frecpe %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vrecpeq_f32 (float32x4_t a) +-{ +- float32x4_t result; +- __asm__ ("frecpe %0.4s,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vrecpeq_f64 (float64x2_t a) +-{ +- float64x2_t result; +- __asm__ ("frecpe %0.2d,%1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) + vrecpeq_u32 (uint32x4_t a) + { +@@ -14358,94 +12651,6 @@ + return result; + } + +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vrecpes_f32 (float32_t a) +-{ +- float32_t result; +- __asm__ ("frecpe %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vrecps_f32 (float32x2_t a, float32x2_t b) +-{ +- float32x2_t result; +- __asm__ ("frecps %0.2s,%1.2s,%2.2s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vrecpsd_f64 (float64_t a, float64_t b) +-{ +- float64_t result; +- __asm__ ("frecps %d0,%d1,%d2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vrecpsq_f32 (float32x4_t a, float32x4_t b) +-{ +- float32x4_t result; +- __asm__ ("frecps %0.4s,%1.4s,%2.4s" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vrecpsq_f64 (float64x2_t a, float64x2_t b) +-{ +- float64x2_t result; +- __asm__ ("frecps %0.2d,%1.2d,%2.2d" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vrecpss_f32 (float32_t a, float32_t b) +-{ +- float32_t result; +- __asm__ ("frecps %s0,%s1,%s2" +- : "=w"(result) +- : "w"(a), "w"(b) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vrecpxd_f64 (float64_t a) +-{ +- float64_t result; +- __asm__ ("frecpe %d0,%d1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vrecpxs_f32 (float32_t a) +-{ +- float32_t result; +- __asm__ ("frecpe %s0,%s1" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) + vrev16_p8 (poly8x8_t a) + { +@@ -14842,171 +13047,6 @@ + return result; + } + +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vrnd_f32 (float32x2_t a) +-{ +- float32x2_t result; +- __asm__ ("frintz %0.2s,%1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vrnda_f32 (float32x2_t a) +-{ +- float32x2_t result; +- __asm__ ("frinta %0.2s,%1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vrndm_f32 (float32x2_t a) +-{ +- float32x2_t result; +- __asm__ ("frintm %0.2s,%1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vrndn_f32 (float32x2_t a) +-{ +- float32x2_t result; +- __asm__ ("frintn %0.2s,%1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vrndp_f32 (float32x2_t a) +-{ +- float32x2_t result; +- __asm__ ("frintp %0.2s,%1.2s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vrndq_f32 (float32x4_t a) +-{ +- float32x4_t result; +- __asm__ ("frintz %0.4s,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vrndq_f64 (float64x2_t a) +-{ +- float64x2_t result; +- __asm__ ("frintz %0.2d,%1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vrndqa_f32 (float32x4_t a) +-{ +- float32x4_t result; +- __asm__ ("frinta %0.4s,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vrndqa_f64 (float64x2_t a) +-{ +- float64x2_t result; +- __asm__ ("frinta %0.2d,%1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vrndqm_f32 (float32x4_t a) +-{ +- float32x4_t result; +- __asm__ ("frintm %0.4s,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vrndqm_f64 (float64x2_t a) +-{ +- float64x2_t result; +- __asm__ ("frintm %0.2d,%1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vrndqn_f32 (float32x4_t a) +-{ +- float32x4_t result; +- __asm__ ("frintn %0.4s,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vrndqn_f64 (float64x2_t a) +-{ +- float64x2_t result; +- __asm__ ("frintn %0.2d,%1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vrndqp_f32 (float32x4_t a) +-{ +- float32x4_t result; +- __asm__ ("frintp %0.4s,%1.4s" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- +-__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +-vrndqp_f64 (float64x2_t a) +-{ +- float64x2_t result; +- __asm__ ("frintp %0.2d,%1.2d" +- : "=w"(result) +- : "w"(a) +- : /* No clobbers */); +- return result; +-} +- + #define vrshrn_high_n_s16(a, b, c) \ + __extension__ \ + ({ \ +@@ -15013,7 +13053,8 @@ + int16x8_t b_ = (b); \ + int8x8_t a_ = (a); \ + int8x16_t result = vcombine_s8 \ +- (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ (a_, vcreate_s8 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("rshrn2 %0.16b,%1.8h,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15027,7 +13068,8 @@ + int32x4_t b_ = (b); \ + int16x4_t a_ = (a); \ + int16x8_t result = vcombine_s16 \ +- (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ (a_, vcreate_s16 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("rshrn2 %0.8h,%1.4s,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15041,7 +13083,8 @@ + int64x2_t b_ = (b); \ + int32x2_t a_ = (a); \ + int32x4_t result = vcombine_s32 \ +- (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ (a_, vcreate_s32 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("rshrn2 %0.4s,%1.2d,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15055,7 +13098,8 @@ + uint16x8_t b_ = (b); \ + uint8x8_t a_ = (a); \ + uint8x16_t result = vcombine_u8 \ +- (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ (a_, vcreate_u8 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("rshrn2 %0.16b,%1.8h,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15069,7 +13113,8 @@ + uint32x4_t b_ = (b); \ + uint16x4_t a_ = (a); \ + uint16x8_t result = vcombine_u16 \ +- (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ (a_, vcreate_u16 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("rshrn2 %0.8h,%1.4s,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15083,7 +13128,8 @@ + uint64x2_t b_ = (b); \ + uint32x2_t a_ = (a); \ + uint32x4_t result = vcombine_u32 \ +- (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ (a_, vcreate_u32 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("rshrn2 %0.4s,%1.2d,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15320,7 +13366,7 @@ + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vrsubhn_high_s16 (int8x8_t a, int16x8_t b, int16x8_t c) + { +- int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("rsubhn2 %0.16b, %1.8h, %2.8h" + : "+w"(result) + : "w"(b), "w"(c) +@@ -15331,7 +13377,7 @@ + __extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) + vrsubhn_high_s32 (int16x4_t a, int32x4_t b, int32x4_t c) + { +- int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (__AARCH64_UINT64_C (0x0))); + __asm__ ("rsubhn2 %0.8h, %1.4s, %2.4s" + : "+w"(result) + : "w"(b), "w"(c) +@@ -15342,7 +13388,7 @@ + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) + vrsubhn_high_s64 (int32x2_t a, int64x2_t b, int64x2_t c) + { +- int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (__AARCH64_UINT64_C (0x0))); + __asm__ ("rsubhn2 %0.4s, %1.2d, %2.2d" + : "+w"(result) + : "w"(b), "w"(c) +@@ -15353,7 +13399,7 @@ + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vrsubhn_high_u16 (uint8x8_t a, uint16x8_t b, uint16x8_t c) + { +- uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("rsubhn2 %0.16b, %1.8h, %2.8h" + : "+w"(result) + : "w"(b), "w"(c) +@@ -15364,7 +13410,7 @@ + __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) + vrsubhn_high_u32 (uint16x4_t a, uint32x4_t b, uint32x4_t c) + { +- uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (__AARCH64_UINT64_C (0x0))); + __asm__ ("rsubhn2 %0.8h, %1.4s, %2.4s" + : "+w"(result) + : "w"(b), "w"(c) +@@ -15375,7 +13421,7 @@ + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) + vrsubhn_high_u64 (uint32x2_t a, uint64x2_t b, uint64x2_t c) + { +- uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (__AARCH64_UINT64_C (0x0))); + __asm__ ("rsubhn2 %0.4s, %1.2d, %2.2d" + : "+w"(result) + : "w"(b), "w"(c) +@@ -15767,7 +13813,8 @@ + int16x8_t b_ = (b); \ + int8x8_t a_ = (a); \ + int8x16_t result = vcombine_s8 \ +- (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ (a_, vcreate_s8 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("shrn2 %0.16b,%1.8h,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15781,7 +13828,8 @@ + int32x4_t b_ = (b); \ + int16x4_t a_ = (a); \ + int16x8_t result = vcombine_s16 \ +- (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ (a_, vcreate_s16 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("shrn2 %0.8h,%1.4s,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15795,7 +13843,8 @@ + int64x2_t b_ = (b); \ + int32x2_t a_ = (a); \ + int32x4_t result = vcombine_s32 \ +- (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ (a_, vcreate_s32 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("shrn2 %0.4s,%1.2d,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15809,7 +13858,8 @@ + uint16x8_t b_ = (b); \ + uint8x8_t a_ = (a); \ + uint8x16_t result = vcombine_u8 \ +- (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ (a_, vcreate_u8 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("shrn2 %0.16b,%1.8h,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15823,7 +13873,8 @@ + uint32x4_t b_ = (b); \ + uint16x4_t a_ = (a); \ + uint16x8_t result = vcombine_u16 \ +- (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ (a_, vcreate_u16 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("shrn2 %0.8h,%1.4s,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -15837,7 +13888,8 @@ + uint64x2_t b_ = (b); \ + uint32x2_t a_ = (a); \ + uint32x4_t result = vcombine_u32 \ +- (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ (a_, vcreate_u32 \ ++ (__AARCH64_UINT64_C (0x0))); \ + __asm__ ("shrn2 %0.4s,%1.2d,#%2" \ + : "+w"(result) \ + : "w"(b_), "i"(c) \ +@@ -16289,7 +14341,7 @@ + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vsubhn_high_s16 (int8x8_t a, int16x8_t b, int16x8_t c) + { +- int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("subhn2 %0.16b, %1.8h, %2.8h" + : "+w"(result) + : "w"(b), "w"(c) +@@ -16300,7 +14352,7 @@ + __extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) + vsubhn_high_s32 (int16x4_t a, int32x4_t b, int32x4_t c) + { +- int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (__AARCH64_UINT64_C (0x0))); + __asm__ ("subhn2 %0.8h, %1.4s, %2.4s" + : "+w"(result) + : "w"(b), "w"(c) +@@ -16311,7 +14363,7 @@ + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) + vsubhn_high_s64 (int32x2_t a, int64x2_t b, int64x2_t c) + { +- int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (__AARCH64_UINT64_C (0x0))); + __asm__ ("subhn2 %0.4s, %1.2d, %2.2d" + : "+w"(result) + : "w"(b), "w"(c) +@@ -16322,7 +14374,7 @@ + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vsubhn_high_u16 (uint8x8_t a, uint16x8_t b, uint16x8_t c) + { +- uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("subhn2 %0.16b, %1.8h, %2.8h" + : "+w"(result) + : "w"(b), "w"(c) +@@ -16333,7 +14385,7 @@ + __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) + vsubhn_high_u32 (uint16x4_t a, uint32x4_t b, uint32x4_t c) + { +- uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (__AARCH64_UINT64_C (0x0))); + __asm__ ("subhn2 %0.8h, %1.4s, %2.4s" + : "+w"(result) + : "w"(b), "w"(c) +@@ -16344,7 +14396,7 @@ + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) + vsubhn_high_u64 (uint32x2_t a, uint64x2_t b, uint64x2_t c) + { +- uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (__AARCH64_UINT64_C (0x0))); + __asm__ ("subhn2 %0.4s, %1.2d, %2.2d" + : "+w"(result) + : "w"(b), "w"(c) +@@ -18309,86 +16361,6 @@ + return result; + } + +-__extension__ static __inline int32_t __attribute__ ((__always_inline__)) +-vaddv_s32 (int32x2_t a) +-{ +- int32_t result; +- __asm__ ("addp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); +- return result; +-} +- +-__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) +-vaddv_u32 (uint32x2_t a) +-{ +- uint32_t result; +- __asm__ ("addp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vmaxnmv_f32 (float32x2_t a) +-{ +- float32_t result; +- __asm__ ("fmaxnmp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); +- return result; +-} +- +-__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +-vminnmv_f32 (float32x2_t a) +-{ +- float32_t result; +- __asm__ ("fminnmp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vmaxnmvq_f64 (float64x2_t a) +-{ +- float64_t result; +- __asm__ ("fmaxnmp %0.2d, %1.2d, %1.2d" : "=w"(result) : "w"(a) : ); +- return result; +-} +- +-__extension__ static __inline int32_t __attribute__ ((__always_inline__)) +-vmaxv_s32 (int32x2_t a) +-{ +- int32_t result; +- __asm__ ("smaxp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); +- return result; +-} +- +-__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) +-vmaxv_u32 (uint32x2_t a) +-{ +- uint32_t result; +- __asm__ ("umaxp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); +- return result; +-} +- +-__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +-vminnmvq_f64 (float64x2_t a) +-{ +- float64_t result; +- __asm__ ("fminnmp %0.2d, %1.2d, %1.2d" : "=w"(result) : "w"(a) : ); +- return result; +-} +- +-__extension__ static __inline int32_t __attribute__ ((__always_inline__)) +-vminv_s32 (int32x2_t a) +-{ +- int32_t result; +- __asm__ ("sminp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); +- return result; +-} +- +-__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) +-vminv_u32 (uint32x2_t a) +-{ +- uint32_t result; +- __asm__ ("uminp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); +- return result; +-} +- + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vpaddd_s64 (int64x2_t __a) + { +@@ -19022,7 +16994,7 @@ + vtbl1_s8 (int8x8_t tab, int8x8_t idx) + { + int8x8_t result; +- int8x16_t temp = vcombine_s8 (tab, vcreate_s8 (UINT64_C (0x0))); ++ int8x16_t temp = vcombine_s8 (tab, vcreate_s8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" + : "=w"(result) + : "w"(temp), "w"(idx) +@@ -19034,7 +17006,7 @@ + vtbl1_u8 (uint8x8_t tab, uint8x8_t idx) + { + uint8x8_t result; +- uint8x16_t temp = vcombine_u8 (tab, vcreate_u8 (UINT64_C (0x0))); ++ uint8x16_t temp = vcombine_u8 (tab, vcreate_u8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" + : "=w"(result) + : "w"(temp), "w"(idx) +@@ -19046,7 +17018,7 @@ + vtbl1_p8 (poly8x8_t tab, uint8x8_t idx) + { + poly8x8_t result; +- poly8x16_t temp = vcombine_p8 (tab, vcreate_p8 (UINT64_C (0x0))); ++ poly8x16_t temp = vcombine_p8 (tab, vcreate_p8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" + : "=w"(result) + : "w"(temp), "w"(idx) +@@ -19096,7 +17068,7 @@ + int8x8_t result; + int8x16x2_t temp; + temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]); +- temp.val[1] = vcombine_s8 (tab.val[2], vcreate_s8 (UINT64_C (0x0))); ++ temp.val[1] = vcombine_s8 (tab.val[2], vcreate_s8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" + "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" + : "=w"(result) +@@ -19111,7 +17083,7 @@ + uint8x8_t result; + uint8x16x2_t temp; + temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]); +- temp.val[1] = vcombine_u8 (tab.val[2], vcreate_u8 (UINT64_C (0x0))); ++ temp.val[1] = vcombine_u8 (tab.val[2], vcreate_u8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" + "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" + : "=w"(result) +@@ -19126,7 +17098,7 @@ + poly8x8_t result; + poly8x16x2_t temp; + temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]); +- temp.val[1] = vcombine_p8 (tab.val[2], vcreate_p8 (UINT64_C (0x0))); ++ temp.val[1] = vcombine_p8 (tab.val[2], vcreate_p8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" + "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" + : "=w"(result) +@@ -19185,7 +17157,7 @@ + { + int8x8_t result; + int8x8_t tmp1; +- int8x16_t temp = vcombine_s8 (tab, vcreate_s8 (UINT64_C (0x0))); ++ int8x16_t temp = vcombine_s8 (tab, vcreate_s8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("movi %0.8b, 8\n\t" + "cmhs %0.8b, %3.8b, %0.8b\n\t" + "tbl %1.8b, {%2.16b}, %3.8b\n\t" +@@ -19201,7 +17173,7 @@ + { + uint8x8_t result; + uint8x8_t tmp1; +- uint8x16_t temp = vcombine_u8 (tab, vcreate_u8 (UINT64_C (0x0))); ++ uint8x16_t temp = vcombine_u8 (tab, vcreate_u8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("movi %0.8b, 8\n\t" + "cmhs %0.8b, %3.8b, %0.8b\n\t" + "tbl %1.8b, {%2.16b}, %3.8b\n\t" +@@ -19217,7 +17189,7 @@ + { + poly8x8_t result; + poly8x8_t tmp1; +- poly8x16_t temp = vcombine_p8 (tab, vcreate_p8 (UINT64_C (0x0))); ++ poly8x16_t temp = vcombine_p8 (tab, vcreate_p8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("movi %0.8b, 8\n\t" + "cmhs %0.8b, %3.8b, %0.8b\n\t" + "tbl %1.8b, {%2.16b}, %3.8b\n\t" +@@ -19271,7 +17243,7 @@ + int8x8_t tmp1; + int8x16x2_t temp; + temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]); +- temp.val[1] = vcombine_s8 (tab.val[2], vcreate_s8 (UINT64_C (0x0))); ++ temp.val[1] = vcombine_s8 (tab.val[2], vcreate_s8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("ld1 {v16.16b - v17.16b}, %2\n\t" + "movi %0.8b, 24\n\t" + "cmhs %0.8b, %3.8b, %0.8b\n\t" +@@ -19290,7 +17262,7 @@ + uint8x8_t tmp1; + uint8x16x2_t temp; + temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]); +- temp.val[1] = vcombine_u8 (tab.val[2], vcreate_u8 (UINT64_C (0x0))); ++ temp.val[1] = vcombine_u8 (tab.val[2], vcreate_u8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("ld1 {v16.16b - v17.16b}, %2\n\t" + "movi %0.8b, 24\n\t" + "cmhs %0.8b, %3.8b, %0.8b\n\t" +@@ -19309,7 +17281,7 @@ + poly8x8_t tmp1; + poly8x16x2_t temp; + temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]); +- temp.val[1] = vcombine_p8 (tab.val[2], vcreate_p8 (UINT64_C (0x0))); ++ temp.val[1] = vcombine_p8 (tab.val[2], vcreate_p8 (__AARCH64_UINT64_C (0x0))); + __asm__ ("ld1 {v16.16b - v17.16b}, %2\n\t" + "movi %0.8b, 24\n\t" + "cmhs %0.8b, %3.8b, %0.8b\n\t" +@@ -19370,6 +17342,80 @@ + + /* Start of optimal implementations in approved order. */ + ++/* vabs */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vabs_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_absv2sf (__a); ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vabs_f64 (float64x1_t __a) ++{ ++ return __builtin_fabs (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vabs_s8 (int8x8_t __a) ++{ ++ return __builtin_aarch64_absv8qi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vabs_s16 (int16x4_t __a) ++{ ++ return __builtin_aarch64_absv4hi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vabs_s32 (int32x2_t __a) ++{ ++ return __builtin_aarch64_absv2si (__a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vabs_s64 (int64x1_t __a) ++{ ++ return __builtin_llabs (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vabsq_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_absv4sf (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vabsq_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_absv2df (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vabsq_s8 (int8x16_t __a) ++{ ++ return __builtin_aarch64_absv16qi (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabsq_s16 (int16x8_t __a) ++{ ++ return __builtin_aarch64_absv8hi (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabsq_s32 (int32x4_t __a) ++{ ++ return __builtin_aarch64_absv4si (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabsq_s64 (int64x2_t __a) ++{ ++ return __builtin_aarch64_absv2di (__a); ++} ++ + /* vadd */ + + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) +@@ -19384,8 +17430,269 @@ + return __a + __b; + } + +-/* vceq */ ++/* vaddv */ + ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vaddv_s8 (int8x8_t __a) ++{ ++ return vget_lane_s8 (__builtin_aarch64_reduc_splus_v8qi (__a), 0); ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vaddv_s16 (int16x4_t __a) ++{ ++ return vget_lane_s16 (__builtin_aarch64_reduc_splus_v4hi (__a), 0); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddv_s32 (int32x2_t __a) ++{ ++ return vget_lane_s32 (__builtin_aarch64_reduc_splus_v2si (__a), 0); ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vaddv_u8 (uint8x8_t __a) ++{ ++ return vget_lane_u8 ((uint8x8_t) ++ __builtin_aarch64_reduc_uplus_v8qi ((int8x8_t) __a), 0); ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vaddv_u16 (uint16x4_t __a) ++{ ++ return vget_lane_u16 ((uint16x4_t) ++ __builtin_aarch64_reduc_uplus_v4hi ((int16x4_t) __a), 0); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddv_u32 (uint32x2_t __a) ++{ ++ return vget_lane_u32 ((uint32x2_t) ++ __builtin_aarch64_reduc_uplus_v2si ((int32x2_t) __a), 0); ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vaddvq_s8 (int8x16_t __a) ++{ ++ return vgetq_lane_s8 (__builtin_aarch64_reduc_splus_v16qi (__a), 0); ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vaddvq_s16 (int16x8_t __a) ++{ ++ return vgetq_lane_s16 (__builtin_aarch64_reduc_splus_v8hi (__a), 0); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddvq_s32 (int32x4_t __a) ++{ ++ return vgetq_lane_s32 (__builtin_aarch64_reduc_splus_v4si (__a), 0); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddvq_s64 (int64x2_t __a) ++{ ++ return vgetq_lane_s64 (__builtin_aarch64_reduc_splus_v2di (__a), 0); ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vaddvq_u8 (uint8x16_t __a) ++{ ++ return vgetq_lane_u8 ((uint8x16_t) ++ __builtin_aarch64_reduc_uplus_v16qi ((int8x16_t) __a), 0); ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vaddvq_u16 (uint16x8_t __a) ++{ ++ return vgetq_lane_u16 ((uint16x8_t) ++ __builtin_aarch64_reduc_uplus_v8hi ((int16x8_t) __a), 0); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddvq_u32 (uint32x4_t __a) ++{ ++ return vgetq_lane_u32 ((uint32x4_t) ++ __builtin_aarch64_reduc_uplus_v4si ((int32x4_t) __a), 0); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddvq_u64 (uint64x2_t __a) ++{ ++ return vgetq_lane_u64 ((uint64x2_t) ++ __builtin_aarch64_reduc_uplus_v2di ((int64x2_t) __a), 0); ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vaddv_f32 (float32x2_t __a) ++{ ++ float32x2_t t = __builtin_aarch64_reduc_splus_v2sf (__a); ++ return vget_lane_f32 (t, 0); ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vaddvq_f32 (float32x4_t __a) ++{ ++ float32x4_t t = __builtin_aarch64_reduc_splus_v4sf (__a); ++ return vgetq_lane_f32 (t, 0); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vaddvq_f64 (float64x2_t __a) ++{ ++ float64x2_t t = __builtin_aarch64_reduc_splus_v2df (__a); ++ return vgetq_lane_f64 (t, 0); ++} ++ ++#ifdef __ARM_FEATURE_CRYPTO ++ ++/* vaes */ ++ ++static __inline uint8x16_t ++vaeseq_u8 (uint8x16_t data, uint8x16_t key) ++{ ++ return __builtin_aarch64_crypto_aesev16qi_uuu (data, key); ++} ++ ++static __inline uint8x16_t ++__attribute__ ((__always_inline__)) ++vaesdq_u8 (uint8x16_t data, uint8x16_t key) ++{ ++ return __builtin_aarch64_crypto_aesdv16qi_uuu (data, key); ++} ++ ++static __inline uint8x16_t ++vaesmcq_u8 (uint8x16_t data) ++{ ++ return __builtin_aarch64_crypto_aesmcv16qi_uu (data); ++} ++ ++static __inline uint8x16_t ++vaesimcq_u8 (uint8x16_t data) ++{ ++ return __builtin_aarch64_crypto_aesimcv16qi_uu (data); ++} ++ ++#endif ++ ++/* vcage */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcages_f32 (float32_t __a, float32_t __b) ++{ ++ return __builtin_fabsf (__a) >= __builtin_fabsf (__b) ? -1 : 0; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcage_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return vabs_f32 (__a) >= vabs_f32 (__b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcageq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return vabsq_f32 (__a) >= vabsq_f32 (__b); ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcaged_f64 (float64_t __a, float64_t __b) ++{ ++ return __builtin_fabs (__a) >= __builtin_fabs (__b) ? -1 : 0; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcageq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return vabsq_f64 (__a) >= vabsq_f64 (__b); ++} ++ ++/* vcagt */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcagts_f32 (float32_t __a, float32_t __b) ++{ ++ return __builtin_fabsf (__a) > __builtin_fabsf (__b) ? -1 : 0; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcagt_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return vabs_f32 (__a) > vabs_f32 (__b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcagtq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return vabsq_f32 (__a) > vabsq_f32 (__b); ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcagtd_f64 (float64_t __a, float64_t __b) ++{ ++ return __builtin_fabs (__a) > __builtin_fabs (__b) ? -1 : 0; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcagtq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return vabsq_f64 (__a) > vabsq_f64 (__b); ++} ++ ++/* vcale */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcale_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return vabs_f32 (__a) <= vabs_f32 (__b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcaleq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return vabsq_f32 (__a) <= vabsq_f32 (__b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcaleq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return vabsq_f64 (__a) <= vabsq_f64 (__b); ++} ++ ++/* vcalt */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcalt_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return vabs_f32 (__a) < vabs_f32 (__b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcaltq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return vabsq_f32 (__a) < vabsq_f32 (__b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcaltq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return vabsq_f64 (__a) < vabsq_f64 (__b); ++} ++ ++/* vceq - vector. */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vceq_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmeqv2sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceq_f64 (float64x1_t __a, float64x1_t __b) ++{ ++ return __a == __b ? -1ll : 0ll; ++} ++ + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) + vceq_p8 (poly8x8_t __a, poly8x8_t __b) + { +@@ -19414,7 +17721,7 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vceq_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, __b); ++ return __a == __b ? -1ll : 0ll; + } + + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +@@ -19441,10 +17748,21 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vceq_u64 (uint64x1_t __a, uint64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmeqdi ((int64x1_t) __a, +- (int64x1_t) __b); ++ return __a == __b ? -1ll : 0ll; + } + ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vceqq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmeqv4sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vceqq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmeqv2df (__a, __b); ++} ++ + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vceqq_p8 (poly8x16_t __a, poly8x16_t __b) + { +@@ -19504,27 +17822,245 @@ + (int64x2_t) __b); + } + ++/* vceq - scalar. */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vceqs_f32 (float32_t __a, float32_t __b) ++{ ++ return __a == __b ? -1 : 0; ++} ++ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vceqd_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, __b); ++ return __a == __b ? -1ll : 0ll; + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vceqd_u64 (uint64x1_t __a, uint64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, __b); ++ return __a == __b ? -1ll : 0ll; + } + ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vceqd_f64 (float64_t __a, float64_t __b) ++{ ++ return __a == __b ? -1ll : 0ll; ++} ++ ++/* vceqz - vector. */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vceqz_f32 (float32x2_t __a) ++{ ++ float32x2_t __b = {0.0f, 0.0f}; ++ return (uint32x2_t) __builtin_aarch64_cmeqv2sf (__a, __b); ++} ++ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceqz_f64 (float64x1_t __a) ++{ ++ return __a == 0.0 ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vceqz_p8 (poly8x8_t __a) ++{ ++ poly8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmeqv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vceqz_s8 (int8x8_t __a) ++{ ++ int8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmeqv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vceqz_s16 (int16x4_t __a) ++{ ++ int16x4_t __b = {0, 0, 0, 0}; ++ return (uint16x4_t) __builtin_aarch64_cmeqv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vceqz_s32 (int32x2_t __a) ++{ ++ int32x2_t __b = {0, 0}; ++ return (uint32x2_t) __builtin_aarch64_cmeqv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceqz_s64 (int64x1_t __a) ++{ ++ return __a == 0ll ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vceqz_u8 (uint8x8_t __a) ++{ ++ uint8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmeqv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vceqz_u16 (uint16x4_t __a) ++{ ++ uint16x4_t __b = {0, 0, 0, 0}; ++ return (uint16x4_t) __builtin_aarch64_cmeqv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vceqz_u32 (uint32x2_t __a) ++{ ++ uint32x2_t __b = {0, 0}; ++ return (uint32x2_t) __builtin_aarch64_cmeqv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceqz_u64 (uint64x1_t __a) ++{ ++ return __a == 0ll ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vceqzq_f32 (float32x4_t __a) ++{ ++ float32x4_t __b = {0.0f, 0.0f, 0.0f, 0.0f}; ++ return (uint32x4_t) __builtin_aarch64_cmeqv4sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vceqzq_f64 (float64x2_t __a) ++{ ++ float64x2_t __b = {0.0, 0.0}; ++ return (uint64x2_t) __builtin_aarch64_cmeqv2df (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vceqzq_p8 (poly8x16_t __a) ++{ ++ poly8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmeqv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vceqzq_s8 (int8x16_t __a) ++{ ++ int8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmeqv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vceqzq_s16 (int16x8_t __a) ++{ ++ int16x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint16x8_t) __builtin_aarch64_cmeqv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vceqzq_s32 (int32x4_t __a) ++{ ++ int32x4_t __b = {0, 0, 0, 0}; ++ return (uint32x4_t) __builtin_aarch64_cmeqv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vceqzq_s64 (int64x2_t __a) ++{ ++ int64x2_t __b = {0, 0}; ++ return (uint64x2_t) __builtin_aarch64_cmeqv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vceqzq_u8 (uint8x16_t __a) ++{ ++ uint8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmeqv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vceqzq_u16 (uint16x8_t __a) ++{ ++ uint16x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint16x8_t) __builtin_aarch64_cmeqv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vceqzq_u32 (uint32x4_t __a) ++{ ++ uint32x4_t __b = {0, 0, 0, 0}; ++ return (uint32x4_t) __builtin_aarch64_cmeqv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vceqzq_u64 (uint64x2_t __a) ++{ ++ uint64x2_t __b = {0, 0}; ++ return (uint64x2_t) __builtin_aarch64_cmeqv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++/* vceqz - scalar. */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vceqzs_f32 (float32_t __a) ++{ ++ return __a == 0.0f ? -1 : 0; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vceqzd_s64 (int64x1_t __a) + { +- return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, 0); ++ return __a == 0 ? -1ll : 0ll; + } + +-/* vcge */ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceqzd_u64 (int64x1_t __a) ++{ ++ return __a == 0 ? -1ll : 0ll; ++} + ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vceqzd_f64 (float64_t __a) ++{ ++ return __a == 0.0 ? -1ll : 0ll; ++} ++ ++/* vcge - vector. */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcge_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgev2sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcge_f64 (float64x1_t __a, float64x1_t __b) ++{ ++ return __a >= __b ? -1ll : 0ll; ++} ++ + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcge_p8 (poly8x8_t __a, poly8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgev8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) + vcge_s8 (int8x8_t __a, int8x8_t __b) + { + return (uint8x8_t) __builtin_aarch64_cmgev8qi (__a, __b); +@@ -19545,7 +18081,7 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcge_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgedi (__a, __b); ++ return __a >= __b ? -1ll : 0ll; + } + + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +@@ -19572,11 +18108,29 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcge_u64 (uint64x1_t __a, uint64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgeudi ((int64x1_t) __a, +- (int64x1_t) __b); ++ return __a >= __b ? -1ll : 0ll; + } + ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgeq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgev4sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgeq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgev2df (__a, __b); ++} ++ + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgeq_p8 (poly8x16_t __a, poly8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgev16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vcgeq_s8 (int8x16_t __a, int8x16_t __b) + { + return (uint8x16_t) __builtin_aarch64_cmgev16qi (__a, __b); +@@ -19628,28 +18182,245 @@ + (int64x2_t) __b); + } + ++/* vcge - scalar. */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcges_f32 (float32_t __a, float32_t __b) ++{ ++ return __a >= __b ? -1 : 0; ++} ++ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcged_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgedi (__a, __b); ++ return __a >= __b ? -1ll : 0ll; + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcged_u64 (uint64x1_t __a, uint64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgeudi ((int64x1_t) __a, +- (int64x1_t) __b); ++ return __a >= __b ? -1ll : 0ll; + } + ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcged_f64 (float64_t __a, float64_t __b) ++{ ++ return __a >= __b ? -1ll : 0ll; ++} ++ ++/* vcgez - vector. */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgez_f32 (float32x2_t __a) ++{ ++ float32x2_t __b = {0.0f, 0.0f}; ++ return (uint32x2_t) __builtin_aarch64_cmgev2sf (__a, __b); ++} ++ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgez_f64 (float64x1_t __a) ++{ ++ return __a >= 0.0 ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgez_p8 (poly8x8_t __a) ++{ ++ poly8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmgev8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgez_s8 (int8x8_t __a) ++{ ++ int8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmgev8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcgez_s16 (int16x4_t __a) ++{ ++ int16x4_t __b = {0, 0, 0, 0}; ++ return (uint16x4_t) __builtin_aarch64_cmgev4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgez_s32 (int32x2_t __a) ++{ ++ int32x2_t __b = {0, 0}; ++ return (uint32x2_t) __builtin_aarch64_cmgev2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgez_s64 (int64x1_t __a) ++{ ++ return __a >= 0ll ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgez_u8 (uint8x8_t __a) ++{ ++ uint8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmgeuv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcgez_u16 (uint16x4_t __a) ++{ ++ uint16x4_t __b = {0, 0, 0, 0}; ++ return (uint16x4_t) __builtin_aarch64_cmgeuv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgez_u32 (uint32x2_t __a) ++{ ++ uint32x2_t __b = {0, 0}; ++ return (uint32x2_t) __builtin_aarch64_cmgeuv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgez_u64 (uint64x1_t __a) ++{ ++ return __a >= 0ll ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgezq_f32 (float32x4_t __a) ++{ ++ float32x4_t __b = {0.0f, 0.0f, 0.0f, 0.0f}; ++ return (uint32x4_t) __builtin_aarch64_cmgev4sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgezq_f64 (float64x2_t __a) ++{ ++ float64x2_t __b = {0.0, 0.0}; ++ return (uint64x2_t) __builtin_aarch64_cmgev2df (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgezq_p8 (poly8x16_t __a) ++{ ++ poly8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmgev16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgezq_s8 (int8x16_t __a) ++{ ++ int8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmgev16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgezq_s16 (int16x8_t __a) ++{ ++ int16x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint16x8_t) __builtin_aarch64_cmgev8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgezq_s32 (int32x4_t __a) ++{ ++ int32x4_t __b = {0, 0, 0, 0}; ++ return (uint32x4_t) __builtin_aarch64_cmgev4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgezq_s64 (int64x2_t __a) ++{ ++ int64x2_t __b = {0, 0}; ++ return (uint64x2_t) __builtin_aarch64_cmgev2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgezq_u8 (uint8x16_t __a) ++{ ++ uint8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmgeuv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgezq_u16 (uint16x8_t __a) ++{ ++ uint16x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint16x8_t) __builtin_aarch64_cmgeuv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgezq_u32 (uint32x4_t __a) ++{ ++ uint32x4_t __b = {0, 0, 0, 0}; ++ return (uint32x4_t) __builtin_aarch64_cmgeuv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgezq_u64 (uint64x2_t __a) ++{ ++ uint64x2_t __b = {0, 0}; ++ return (uint64x2_t) __builtin_aarch64_cmgeuv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++/* vcgez - scalar. */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcgezs_f32 (float32_t __a) ++{ ++ return __a >= 0.0f ? -1 : 0; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcgezd_s64 (int64x1_t __a) + { +- return (uint64x1_t) __builtin_aarch64_cmgedi (__a, 0); ++ return __a >= 0 ? -1ll : 0ll; + } + +-/* vcgt */ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgezd_u64 (int64x1_t __a) ++{ ++ return __a >= 0 ? -1ll : 0ll; ++} + ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcgezd_f64 (float64_t __a) ++{ ++ return __a >= 0.0 ? -1ll : 0ll; ++} ++ ++/* vcgt - vector. */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgt_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgtv2sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgt_f64 (float64x1_t __a, float64x1_t __b) ++{ ++ return __a > __b ? -1ll : 0ll; ++} ++ + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgt_p8 (poly8x8_t __a, poly8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgtv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) + vcgt_s8 (int8x8_t __a, int8x8_t __b) + { + return (uint8x8_t) __builtin_aarch64_cmgtv8qi (__a, __b); +@@ -19670,7 +18441,7 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcgt_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgtdi (__a, __b); ++ return __a > __b ? -1ll : 0ll; + } + + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +@@ -19697,11 +18468,29 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcgt_u64 (uint64x1_t __a, uint64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgtudi ((int64x1_t) __a, +- (int64x1_t) __b); ++ return __a > __b ? -1ll : 0ll; + } + ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgtq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgtv4sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgtq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgtv2df (__a, __b); ++} ++ + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgtq_p8 (poly8x16_t __a, poly8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgtv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vcgtq_s8 (int8x16_t __a, int8x16_t __b) + { + return (uint8x16_t) __builtin_aarch64_cmgtv16qi (__a, __b); +@@ -19753,28 +18542,245 @@ + (int64x2_t) __b); + } + ++/* vcgt - scalar. */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcgts_f32 (float32_t __a, float32_t __b) ++{ ++ return __a > __b ? -1 : 0; ++} ++ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcgtd_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgtdi (__a, __b); ++ return __a > __b ? -1ll : 0ll; + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcgtd_u64 (uint64x1_t __a, uint64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgtudi ((int64x1_t) __a, +- (int64x1_t) __b); ++ return __a > __b ? -1ll : 0ll; + } + ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcgtd_f64 (float64_t __a, float64_t __b) ++{ ++ return __a > __b ? -1ll : 0ll; ++} ++ ++/* vcgtz - vector. */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgtz_f32 (float32x2_t __a) ++{ ++ float32x2_t __b = {0.0f, 0.0f}; ++ return (uint32x2_t) __builtin_aarch64_cmgtv2sf (__a, __b); ++} ++ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgtz_f64 (float64x1_t __a) ++{ ++ return __a > 0.0 ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgtz_p8 (poly8x8_t __a) ++{ ++ poly8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmgtv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgtz_s8 (int8x8_t __a) ++{ ++ int8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmgtv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcgtz_s16 (int16x4_t __a) ++{ ++ int16x4_t __b = {0, 0, 0, 0}; ++ return (uint16x4_t) __builtin_aarch64_cmgtv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgtz_s32 (int32x2_t __a) ++{ ++ int32x2_t __b = {0, 0}; ++ return (uint32x2_t) __builtin_aarch64_cmgtv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgtz_s64 (int64x1_t __a) ++{ ++ return __a > 0ll ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgtz_u8 (uint8x8_t __a) ++{ ++ uint8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmgtuv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcgtz_u16 (uint16x4_t __a) ++{ ++ uint16x4_t __b = {0, 0, 0, 0}; ++ return (uint16x4_t) __builtin_aarch64_cmgtuv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgtz_u32 (uint32x2_t __a) ++{ ++ uint32x2_t __b = {0, 0}; ++ return (uint32x2_t) __builtin_aarch64_cmgtuv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgtz_u64 (uint64x1_t __a) ++{ ++ return __a > 0ll ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgtzq_f32 (float32x4_t __a) ++{ ++ float32x4_t __b = {0.0f, 0.0f, 0.0f, 0.0f}; ++ return (uint32x4_t) __builtin_aarch64_cmgtv4sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgtzq_f64 (float64x2_t __a) ++{ ++ float64x2_t __b = {0.0, 0.0}; ++ return (uint64x2_t) __builtin_aarch64_cmgtv2df (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgtzq_p8 (poly8x16_t __a) ++{ ++ poly8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmgtv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgtzq_s8 (int8x16_t __a) ++{ ++ int8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmgtv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgtzq_s16 (int16x8_t __a) ++{ ++ int16x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint16x8_t) __builtin_aarch64_cmgtv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgtzq_s32 (int32x4_t __a) ++{ ++ int32x4_t __b = {0, 0, 0, 0}; ++ return (uint32x4_t) __builtin_aarch64_cmgtv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgtzq_s64 (int64x2_t __a) ++{ ++ int64x2_t __b = {0, 0}; ++ return (uint64x2_t) __builtin_aarch64_cmgtv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgtzq_u8 (uint8x16_t __a) ++{ ++ uint8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmgtuv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgtzq_u16 (uint16x8_t __a) ++{ ++ uint16x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint16x8_t) __builtin_aarch64_cmgtuv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgtzq_u32 (uint32x4_t __a) ++{ ++ uint32x4_t __b = {0, 0, 0, 0}; ++ return (uint32x4_t) __builtin_aarch64_cmgtuv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgtzq_u64 (uint64x2_t __a) ++{ ++ uint64x2_t __b = {0, 0}; ++ return (uint64x2_t) __builtin_aarch64_cmgtuv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++/* vcgtz - scalar. */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcgtzs_f32 (float32_t __a) ++{ ++ return __a > 0.0f ? -1 : 0; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcgtzd_s64 (int64x1_t __a) + { +- return (uint64x1_t) __builtin_aarch64_cmgtdi (__a, 0); ++ return __a > 0 ? -1ll : 0ll; + } + +-/* vcle */ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgtzd_u64 (int64x1_t __a) ++{ ++ return __a > 0 ? -1ll : 0ll; ++} + ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcgtzd_f64 (float64_t __a) ++{ ++ return __a > 0.0 ? -1ll : 0ll; ++} ++ ++/* vcle - vector. */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcle_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgev2sf (__b, __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcle_f64 (float64x1_t __a, float64x1_t __b) ++{ ++ return __a <= __b ? -1ll : 0ll; ++} ++ + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcle_p8 (poly8x8_t __a, poly8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgev8qi ((int8x8_t) __b, ++ (int8x8_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) + vcle_s8 (int8x8_t __a, int8x8_t __b) + { + return (uint8x8_t) __builtin_aarch64_cmgev8qi (__b, __a); +@@ -19795,7 +18801,7 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcle_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgedi (__b, __a); ++ return __a <= __b ? -1ll : 0ll; + } + + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +@@ -19822,11 +18828,29 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcle_u64 (uint64x1_t __a, uint64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgeudi ((int64x1_t) __b, +- (int64x1_t) __a); ++ return __a <= __b ? -1ll : 0ll; + } + ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcleq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgev4sf (__b, __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcleq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgev2df (__b, __a); ++} ++ + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcleq_p8 (poly8x16_t __a, poly8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgev16qi ((int8x16_t) __b, ++ (int8x16_t) __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vcleq_s8 (int8x16_t __a, int8x16_t __b) + { + return (uint8x16_t) __builtin_aarch64_cmgev16qi (__b, __a); +@@ -19878,21 +18902,188 @@ + (int64x2_t) __a); + } + ++/* vcle - scalar. */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcles_f32 (float32_t __a, float32_t __b) ++{ ++ return __a <= __b ? -1 : 0; ++} ++ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcled_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgedi (__b, __a); ++ return __a <= __b ? -1ll : 0ll; + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcled_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a <= __b ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcled_f64 (float64_t __a, float64_t __b) ++{ ++ return __a <= __b ? -1ll : 0ll; ++} ++ ++/* vclez - vector. */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclez_f32 (float32x2_t __a) ++{ ++ float32x2_t __b = {0.0f, 0.0f}; ++ return (uint32x2_t) __builtin_aarch64_cmlev2sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclez_f64 (float64x1_t __a) ++{ ++ return __a <= 0.0 ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vclez_p8 (poly8x8_t __a) ++{ ++ poly8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmlev8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vclez_s8 (int8x8_t __a) ++{ ++ int8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmlev8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vclez_s16 (int16x4_t __a) ++{ ++ int16x4_t __b = {0, 0, 0, 0}; ++ return (uint16x4_t) __builtin_aarch64_cmlev4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclez_s32 (int32x2_t __a) ++{ ++ int32x2_t __b = {0, 0}; ++ return (uint32x2_t) __builtin_aarch64_cmlev2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclez_s64 (int64x1_t __a) ++{ ++ return __a <= 0ll ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclez_u64 (uint64x1_t __a) ++{ ++ return __a <= 0ll ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vclezq_f32 (float32x4_t __a) ++{ ++ float32x4_t __b = {0.0f, 0.0f, 0.0f, 0.0f}; ++ return (uint32x4_t) __builtin_aarch64_cmlev4sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vclezq_f64 (float64x2_t __a) ++{ ++ float64x2_t __b = {0.0, 0.0}; ++ return (uint64x2_t) __builtin_aarch64_cmlev2df (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vclezq_p8 (poly8x16_t __a) ++{ ++ poly8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmlev16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vclezq_s8 (int8x16_t __a) ++{ ++ int8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmlev16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vclezq_s16 (int16x8_t __a) ++{ ++ int16x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint16x8_t) __builtin_aarch64_cmlev8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vclezq_s32 (int32x4_t __a) ++{ ++ int32x4_t __b = {0, 0, 0, 0}; ++ return (uint32x4_t) __builtin_aarch64_cmlev4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vclezq_s64 (int64x2_t __a) ++{ ++ int64x2_t __b = {0, 0}; ++ return (uint64x2_t) __builtin_aarch64_cmlev2di (__a, __b); ++} ++ ++/* vclez - scalar. */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vclezs_f32 (float32_t __a) ++{ ++ return __a <= 0.0f ? -1 : 0; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vclezd_s64 (int64x1_t __a) + { +- return (uint64x1_t) __builtin_aarch64_cmledi (__a, 0); ++ return __a <= 0 ? -1ll : 0ll; + } + +-/* vclt */ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclezd_u64 (int64x1_t __a) ++{ ++ return __a <= 0 ? -1ll : 0ll; ++} + ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vclezd_f64 (float64_t __a) ++{ ++ return __a <= 0.0 ? -1ll : 0ll; ++} ++ ++/* vclt - vector. */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclt_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgtv2sf (__b, __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclt_f64 (float64x1_t __a, float64x1_t __b) ++{ ++ return __a < __b ? -1ll : 0ll; ++} ++ + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vclt_p8 (poly8x8_t __a, poly8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgtv8qi ((int8x8_t) __b, ++ (int8x8_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) + vclt_s8 (int8x8_t __a, int8x8_t __b) + { + return (uint8x8_t) __builtin_aarch64_cmgtv8qi (__b, __a); +@@ -19913,7 +19104,7 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vclt_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgtdi (__b, __a); ++ return __a < __b ? -1ll : 0ll; + } + + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +@@ -19940,11 +19131,29 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vclt_u64 (uint64x1_t __a, uint64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgtudi ((int64x1_t) __b, +- (int64x1_t) __a); ++ return __a < __b ? -1ll : 0ll; + } + ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcltq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgtv4sf (__b, __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcltq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgtv2df (__b, __a); ++} ++ + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcltq_p8 (poly8x16_t __a, poly8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgtv16qi ((int8x16_t) __b, ++ (int8x16_t) __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vcltq_s8 (int8x16_t __a, int8x16_t __b) + { + return (uint8x16_t) __builtin_aarch64_cmgtv16qi (__b, __a); +@@ -19996,66 +19205,639 @@ + (int64x2_t) __a); + } + ++/* vclt - scalar. */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vclts_f32 (float32_t __a, float32_t __b) ++{ ++ return __a < __b ? -1 : 0; ++} ++ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcltd_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmgtdi (__b, __a); ++ return __a < __b ? -1ll : 0ll; + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcltd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a < __b ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcltd_f64 (float64_t __a, float64_t __b) ++{ ++ return __a < __b ? -1ll : 0ll; ++} ++ ++/* vcltz - vector. */ ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcltz_f32 (float32x2_t __a) ++{ ++ float32x2_t __b = {0.0f, 0.0f}; ++ return (uint32x2_t) __builtin_aarch64_cmltv2sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcltz_f64 (float64x1_t __a) ++{ ++ return __a < 0.0 ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcltz_p8 (poly8x8_t __a) ++{ ++ poly8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmltv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcltz_s8 (int8x8_t __a) ++{ ++ int8x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x8_t) __builtin_aarch64_cmltv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcltz_s16 (int16x4_t __a) ++{ ++ int16x4_t __b = {0, 0, 0, 0}; ++ return (uint16x4_t) __builtin_aarch64_cmltv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcltz_s32 (int32x2_t __a) ++{ ++ int32x2_t __b = {0, 0}; ++ return (uint32x2_t) __builtin_aarch64_cmltv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcltz_s64 (int64x1_t __a) ++{ ++ return __a < 0ll ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcltzq_f32 (float32x4_t __a) ++{ ++ float32x4_t __b = {0.0f, 0.0f, 0.0f, 0.0f}; ++ return (uint32x4_t) __builtin_aarch64_cmltv4sf (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcltzq_f64 (float64x2_t __a) ++{ ++ float64x2_t __b = {0.0, 0.0}; ++ return (uint64x2_t) __builtin_aarch64_cmltv2df (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcltzq_p8 (poly8x16_t __a) ++{ ++ poly8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmltv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcltzq_s8 (int8x16_t __a) ++{ ++ int8x16_t __b = {0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint8x16_t) __builtin_aarch64_cmltv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcltzq_s16 (int16x8_t __a) ++{ ++ int16x8_t __b = {0, 0, 0, 0, 0, 0, 0, 0}; ++ return (uint16x8_t) __builtin_aarch64_cmltv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcltzq_s32 (int32x4_t __a) ++{ ++ int32x4_t __b = {0, 0, 0, 0}; ++ return (uint32x4_t) __builtin_aarch64_cmltv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcltzq_s64 (int64x2_t __a) ++{ ++ int64x2_t __b = {0, 0}; ++ return (uint64x2_t) __builtin_aarch64_cmltv2di (__a, __b); ++} ++ ++/* vcltz - scalar. */ ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcltzs_f32 (float32_t __a) ++{ ++ return __a < 0.0f ? -1 : 0; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vcltzd_s64 (int64x1_t __a) + { +- return (uint64x1_t) __builtin_aarch64_cmltdi (__a, 0); ++ return __a < 0 ? -1ll : 0ll; + } + ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcltzd_u64 (int64x1_t __a) ++{ ++ return __a < 0 ? -1ll : 0ll; ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcltzd_f64 (float64_t __a) ++{ ++ return __a < 0.0 ? -1ll : 0ll; ++} ++ ++/* vcvt (double -> float). */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvt_f32_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_float_truncate_lo_v2sf (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvt_high_f32_f64 (float32x2_t __a, float64x2_t __b) ++{ ++ return __builtin_aarch64_float_truncate_hi_v4sf (__a, __b); ++} ++ ++/* vcvt (float -> double). */ ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvt_f64_f32 (float32x2_t __a) ++{ ++ ++ return __builtin_aarch64_float_extend_lo_v2df (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvt_high_f64_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_vec_unpacks_hi_v4sf (__a); ++} ++ ++/* vcvt (int -> float) */ ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtd_f64_s64 (int64_t __a) ++{ ++ return (float64_t) __a; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtd_f64_u64 (uint64_t __a) ++{ ++ return (float64_t) __a; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvts_f32_s32 (int32_t __a) ++{ ++ return (float32_t) __a; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvts_f32_u32 (uint32_t __a) ++{ ++ return (float32_t) __a; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvt_f32_s32 (int32x2_t __a) ++{ ++ return __builtin_aarch64_floatv2siv2sf (__a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvt_f32_u32 (uint32x2_t __a) ++{ ++ return __builtin_aarch64_floatunsv2siv2sf ((int32x2_t) __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvtq_f32_s32 (int32x4_t __a) ++{ ++ return __builtin_aarch64_floatv4siv4sf (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvtq_f32_u32 (uint32x4_t __a) ++{ ++ return __builtin_aarch64_floatunsv4siv4sf ((int32x4_t) __a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvtq_f64_s64 (int64x2_t __a) ++{ ++ return __builtin_aarch64_floatv2div2df (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvtq_f64_u64 (uint64x2_t __a) ++{ ++ return __builtin_aarch64_floatunsv2div2df ((int64x2_t) __a); ++} ++ ++/* vcvt (float -> int) */ ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vcvtd_s64_f64 (float64_t __a) ++{ ++ return (int64_t) __a; ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcvtd_u64_f64 (float64_t __a) ++{ ++ return (uint64_t) __a; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vcvts_s32_f32 (float32_t __a) ++{ ++ return (int32_t) __a; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcvts_u32_f32 (float32_t __a) ++{ ++ return (uint32_t) __a; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvt_s32_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_lbtruncv2sfv2si (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvt_u32_f32 (float32x2_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint32x2_t) __builtin_aarch64_lbtruncuv2sfv2si (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtq_s32_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_lbtruncv4sfv4si (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtq_u32_f32 (float32x4_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint32x4_t) __builtin_aarch64_lbtruncuv4sfv4si (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtq_s64_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_lbtruncv2dfv2di (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtq_u64_f64 (float64x2_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint64x2_t) __builtin_aarch64_lbtruncuv2dfv2di (__a); ++} ++ ++/* vcvta */ ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vcvtad_s64_f64 (float64_t __a) ++{ ++ return __builtin_aarch64_lrounddfdi (__a); ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcvtad_u64_f64 (float64_t __a) ++{ ++ return __builtin_aarch64_lroundudfdi (__a); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vcvtas_s32_f32 (float32_t __a) ++{ ++ return __builtin_aarch64_lroundsfsi (__a); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcvtas_u32_f32 (float32_t __a) ++{ ++ return __builtin_aarch64_lroundusfsi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvta_s32_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_lroundv2sfv2si (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvta_u32_f32 (float32x2_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint32x2_t) __builtin_aarch64_lrounduv2sfv2si (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtaq_s32_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_lroundv4sfv4si (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtaq_u32_f32 (float32x4_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint32x4_t) __builtin_aarch64_lrounduv4sfv4si (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtaq_s64_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_lroundv2dfv2di (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtaq_u64_f64 (float64x2_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint64x2_t) __builtin_aarch64_lrounduv2dfv2di (__a); ++} ++ ++/* vcvtm */ ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vcvtmd_s64_f64 (float64_t __a) ++{ ++ return __builtin_lfloor (__a); ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcvtmd_u64_f64 (float64_t __a) ++{ ++ return __builtin_aarch64_lfloorudfdi (__a); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vcvtms_s32_f32 (float32_t __a) ++{ ++ return __builtin_ifloorf (__a); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcvtms_u32_f32 (float32_t __a) ++{ ++ return __builtin_aarch64_lfloorusfsi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvtm_s32_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_lfloorv2sfv2si (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvtm_u32_f32 (float32x2_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint32x2_t) __builtin_aarch64_lflooruv2sfv2si (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtmq_s32_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_lfloorv4sfv4si (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtmq_u32_f32 (float32x4_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint32x4_t) __builtin_aarch64_lflooruv4sfv4si (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtmq_s64_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_lfloorv2dfv2di (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtmq_u64_f64 (float64x2_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint64x2_t) __builtin_aarch64_lflooruv2dfv2di (__a); ++} ++ ++/* vcvtn */ ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vcvtnd_s64_f64 (float64_t __a) ++{ ++ return __builtin_aarch64_lfrintndfdi (__a); ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcvtnd_u64_f64 (float64_t __a) ++{ ++ return __builtin_aarch64_lfrintnudfdi (__a); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vcvtns_s32_f32 (float32_t __a) ++{ ++ return __builtin_aarch64_lfrintnsfsi (__a); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcvtns_u32_f32 (float32_t __a) ++{ ++ return __builtin_aarch64_lfrintnusfsi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvtn_s32_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_lfrintnv2sfv2si (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvtn_u32_f32 (float32x2_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint32x2_t) __builtin_aarch64_lfrintnuv2sfv2si (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtnq_s32_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_lfrintnv4sfv4si (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtnq_u32_f32 (float32x4_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint32x4_t) __builtin_aarch64_lfrintnuv4sfv4si (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtnq_s64_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_lfrintnv2dfv2di (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtnq_u64_f64 (float64x2_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint64x2_t) __builtin_aarch64_lfrintnuv2dfv2di (__a); ++} ++ ++/* vcvtp */ ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vcvtpd_s64_f64 (float64_t __a) ++{ ++ return __builtin_lceil (__a); ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcvtpd_u64_f64 (float64_t __a) ++{ ++ return __builtin_aarch64_lceiludfdi (__a); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vcvtps_s32_f32 (float32_t __a) ++{ ++ return __builtin_iceilf (__a); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcvtps_u32_f32 (float32_t __a) ++{ ++ return __builtin_aarch64_lceilusfsi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvtp_s32_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_lceilv2sfv2si (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvtp_u32_f32 (float32x2_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint32x2_t) __builtin_aarch64_lceiluv2sfv2si (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtpq_s32_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_lceilv4sfv4si (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtpq_u32_f32 (float32x4_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint32x4_t) __builtin_aarch64_lceiluv4sfv4si (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtpq_s64_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_lceilv2dfv2di (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtpq_u64_f64 (float64x2_t __a) ++{ ++ /* TODO: This cast should go away when builtins have ++ their correct types. */ ++ return (uint64x2_t) __builtin_aarch64_lceiluv2dfv2di (__a); ++} ++ + /* vdup */ + + __extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) + vdupb_lane_s8 (int8x16_t a, int const b) + { +- return __builtin_aarch64_dup_laneqi (a, b); ++ return __aarch64_vgetq_lane_s8 (a, b); + } + + __extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) + vdupb_lane_u8 (uint8x16_t a, int const b) + { +- return (uint8x1_t) __builtin_aarch64_dup_laneqi ((int8x16_t) a, b); ++ return __aarch64_vgetq_lane_u8 (a, b); + } + + __extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) + vduph_lane_s16 (int16x8_t a, int const b) + { +- return __builtin_aarch64_dup_lanehi (a, b); ++ return __aarch64_vgetq_lane_s16 (a, b); + } + + __extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) + vduph_lane_u16 (uint16x8_t a, int const b) + { +- return (uint16x1_t) __builtin_aarch64_dup_lanehi ((int16x8_t) a, b); ++ return __aarch64_vgetq_lane_u16 (a, b); + } + + __extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) + vdups_lane_s32 (int32x4_t a, int const b) + { +- return __builtin_aarch64_dup_lanesi (a, b); ++ return __aarch64_vgetq_lane_s32 (a, b); + } + + __extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) + vdups_lane_u32 (uint32x4_t a, int const b) + { +- return (uint32x1_t) __builtin_aarch64_dup_lanesi ((int32x4_t) a, b); ++ return __aarch64_vgetq_lane_u32 (a, b); + } + + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vdupd_lane_s64 (int64x2_t a, int const b) + { +- return __builtin_aarch64_dup_lanedi (a, b); ++ return __aarch64_vgetq_lane_s64 (a, b); + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vdupd_lane_u64 (uint64x2_t a, int const b) + { +- return (uint64x1_t) __builtin_aarch64_dup_lanedi ((int64x2_t) a, b); ++ return __aarch64_vgetq_lane_u64 (a, b); + } + + /* vld1 */ +@@ -21088,7 +20870,7 @@ + __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) + vmax_f32 (float32x2_t __a, float32x2_t __b) + { +- return __builtin_aarch64_fmaxv2sf (__a, __b); ++ return __builtin_aarch64_smax_nanv2sf (__a, __b); + } + + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +@@ -21133,13 +20915,13 @@ + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) + vmaxq_f32 (float32x4_t __a, float32x4_t __b) + { +- return __builtin_aarch64_fmaxv4sf (__a, __b); ++ return __builtin_aarch64_smax_nanv4sf (__a, __b); + } + + __extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) + vmaxq_f64 (float64x2_t __a, float64x2_t __b) + { +- return __builtin_aarch64_fmaxv2df (__a, __b); ++ return __builtin_aarch64_smax_nanv2df (__a, __b); + } + + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +@@ -21181,12 +20963,150 @@ + (int32x4_t) __b); + } + +-/* vmin */ ++/* vmaxnm */ + + __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmaxnm_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __builtin_aarch64_smaxv2sf (__a, __b); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmaxnmq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __builtin_aarch64_smaxv4sf (__a, __b); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmaxnmq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __builtin_aarch64_smaxv2df (__a, __b); ++} ++ ++/* vmaxv */ ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmaxv_f32 (float32x2_t __a) ++{ ++ return vget_lane_f32 (__builtin_aarch64_reduc_smax_nan_v2sf (__a), 0); ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vmaxv_s8 (int8x8_t __a) ++{ ++ return vget_lane_s8 (__builtin_aarch64_reduc_smax_v8qi (__a), 0); ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vmaxv_s16 (int16x4_t __a) ++{ ++ return vget_lane_s16 (__builtin_aarch64_reduc_smax_v4hi (__a), 0); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vmaxv_s32 (int32x2_t __a) ++{ ++ return vget_lane_s32 (__builtin_aarch64_reduc_smax_v2si (__a), 0); ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vmaxv_u8 (uint8x8_t __a) ++{ ++ return vget_lane_u8 ((uint8x8_t) ++ __builtin_aarch64_reduc_umax_v8qi ((int8x8_t) __a), 0); ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vmaxv_u16 (uint16x4_t __a) ++{ ++ return vget_lane_u16 ((uint16x4_t) ++ __builtin_aarch64_reduc_umax_v4hi ((int16x4_t) __a), 0); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vmaxv_u32 (uint32x2_t __a) ++{ ++ return vget_lane_u32 ((uint32x2_t) ++ __builtin_aarch64_reduc_umax_v2si ((int32x2_t) __a), 0); ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmaxvq_f32 (float32x4_t __a) ++{ ++ return vgetq_lane_f32 (__builtin_aarch64_reduc_smax_nan_v4sf (__a), 0); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vmaxvq_f64 (float64x2_t __a) ++{ ++ return vgetq_lane_f64 (__builtin_aarch64_reduc_smax_nan_v2df (__a), 0); ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vmaxvq_s8 (int8x16_t __a) ++{ ++ return vgetq_lane_s8 (__builtin_aarch64_reduc_smax_v16qi (__a), 0); ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vmaxvq_s16 (int16x8_t __a) ++{ ++ return vgetq_lane_s16 (__builtin_aarch64_reduc_smax_v8hi (__a), 0); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vmaxvq_s32 (int32x4_t __a) ++{ ++ return vgetq_lane_s32 (__builtin_aarch64_reduc_smax_v4si (__a), 0); ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vmaxvq_u8 (uint8x16_t __a) ++{ ++ return vgetq_lane_u8 ((uint8x16_t) ++ __builtin_aarch64_reduc_umax_v16qi ((int8x16_t) __a), 0); ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vmaxvq_u16 (uint16x8_t __a) ++{ ++ return vgetq_lane_u16 ((uint16x8_t) ++ __builtin_aarch64_reduc_umax_v8hi ((int16x8_t) __a), 0); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vmaxvq_u32 (uint32x4_t __a) ++{ ++ return vgetq_lane_u32 ((uint32x4_t) ++ __builtin_aarch64_reduc_umax_v4si ((int32x4_t) __a), 0); ++} ++ ++/* vmaxnmv */ ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmaxnmv_f32 (float32x2_t __a) ++{ ++ return vget_lane_f32 (__builtin_aarch64_reduc_smax_v2sf (__a), 0); ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmaxnmvq_f32 (float32x4_t __a) ++{ ++ return vgetq_lane_f32 (__builtin_aarch64_reduc_smax_v4sf (__a), 0); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vmaxnmvq_f64 (float64x2_t __a) ++{ ++ return vgetq_lane_f64 (__builtin_aarch64_reduc_smax_v2df (__a), 0); ++} ++ ++/* vmin */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) + vmin_f32 (float32x2_t __a, float32x2_t __b) + { +- return __builtin_aarch64_fminv2sf (__a, __b); ++ return __builtin_aarch64_smin_nanv2sf (__a, __b); + } + + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +@@ -21231,13 +21151,13 @@ + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) + vminq_f32 (float32x4_t __a, float32x4_t __b) + { +- return __builtin_aarch64_fminv4sf (__a, __b); ++ return __builtin_aarch64_smin_nanv4sf (__a, __b); + } + + __extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) + vminq_f64 (float64x2_t __a, float64x2_t __b) + { +- return __builtin_aarch64_fminv2df (__a, __b); ++ return __builtin_aarch64_smin_nanv2df (__a, __b); + } + + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +@@ -21279,6 +21199,144 @@ + (int32x4_t) __b); + } + ++/* vminnm */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vminnm_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __builtin_aarch64_sminv2sf (__a, __b); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vminnmq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __builtin_aarch64_sminv4sf (__a, __b); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vminnmq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __builtin_aarch64_sminv2df (__a, __b); ++} ++ ++/* vminv */ ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vminv_f32 (float32x2_t __a) ++{ ++ return vget_lane_f32 (__builtin_aarch64_reduc_smin_nan_v2sf (__a), 0); ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vminv_s8 (int8x8_t __a) ++{ ++ return vget_lane_s8 (__builtin_aarch64_reduc_smin_v8qi (__a), 0); ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vminv_s16 (int16x4_t __a) ++{ ++ return vget_lane_s16 (__builtin_aarch64_reduc_smin_v4hi (__a), 0); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vminv_s32 (int32x2_t __a) ++{ ++ return vget_lane_s32 (__builtin_aarch64_reduc_smin_v2si (__a), 0); ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vminv_u8 (uint8x8_t __a) ++{ ++ return vget_lane_u8 ((uint8x8_t) ++ __builtin_aarch64_reduc_umin_v8qi ((int8x8_t) __a), 0); ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vminv_u16 (uint16x4_t __a) ++{ ++ return vget_lane_u16 ((uint16x4_t) ++ __builtin_aarch64_reduc_umin_v4hi ((int16x4_t) __a), 0); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vminv_u32 (uint32x2_t __a) ++{ ++ return vget_lane_u32 ((uint32x2_t) ++ __builtin_aarch64_reduc_umin_v2si ((int32x2_t) __a), 0); ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vminvq_f32 (float32x4_t __a) ++{ ++ return vgetq_lane_f32 (__builtin_aarch64_reduc_smin_nan_v4sf (__a), 0); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vminvq_f64 (float64x2_t __a) ++{ ++ return vgetq_lane_f64 (__builtin_aarch64_reduc_smin_nan_v2df (__a), 0); ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vminvq_s8 (int8x16_t __a) ++{ ++ return vgetq_lane_s8 (__builtin_aarch64_reduc_smin_v16qi (__a), 0); ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vminvq_s16 (int16x8_t __a) ++{ ++ return vgetq_lane_s16 (__builtin_aarch64_reduc_smin_v8hi (__a), 0); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vminvq_s32 (int32x4_t __a) ++{ ++ return vgetq_lane_s32 (__builtin_aarch64_reduc_smin_v4si (__a), 0); ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vminvq_u8 (uint8x16_t __a) ++{ ++ return vgetq_lane_u8 ((uint8x16_t) ++ __builtin_aarch64_reduc_umin_v16qi ((int8x16_t) __a), 0); ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vminvq_u16 (uint16x8_t __a) ++{ ++ return vgetq_lane_u16 ((uint16x8_t) ++ __builtin_aarch64_reduc_umin_v8hi ((int16x8_t) __a), 0); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vminvq_u32 (uint32x4_t __a) ++{ ++ return vgetq_lane_u32 ((uint32x4_t) ++ __builtin_aarch64_reduc_umin_v4si ((int32x4_t) __a), 0); ++} ++ ++/* vminnmv */ ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vminnmv_f32 (float32x2_t __a) ++{ ++ return vget_lane_f32 (__builtin_aarch64_reduc_smin_v2sf (__a), 0); ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vminnmvq_f32 (float32x4_t __a) ++{ ++ return vgetq_lane_f32 (__builtin_aarch64_reduc_smin_v4sf (__a), 0); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vminnmvq_f64 (float64x2_t __a) ++{ ++ return vgetq_lane_f64 (__builtin_aarch64_reduc_smin_v2df (__a), 0); ++} ++ + /* vmla */ + + __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +@@ -21430,7 +21488,7 @@ + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) + vqdmlal_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, int const __d) + { +- int16x8_t __tmp = vcombine_s16 (__c, vcreate_s16 (INT64_C (0))); ++ int16x8_t __tmp = vcombine_s16 (__c, vcreate_s16 (__AARCH64_INT64_C (0))); + return __builtin_aarch64_sqdmlal_lanev4hi (__a, __b, __tmp, __d); + } + +@@ -21481,7 +21539,7 @@ + __extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) + vqdmlal_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, int const __d) + { +- int32x4_t __tmp = vcombine_s32 (__c, vcreate_s32 (INT64_C (0))); ++ int32x4_t __tmp = vcombine_s32 (__c, vcreate_s32 (__AARCH64_INT64_C (0))); + return __builtin_aarch64_sqdmlal_lanev2si (__a, __b, __tmp, __d); + } + +@@ -21558,7 +21616,7 @@ + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) + vqdmlsl_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, int const __d) + { +- int16x8_t __tmp = vcombine_s16 (__c, vcreate_s16 (INT64_C (0))); ++ int16x8_t __tmp = vcombine_s16 (__c, vcreate_s16 (__AARCH64_INT64_C (0))); + return __builtin_aarch64_sqdmlsl_lanev4hi (__a, __b, __tmp, __d); + } + +@@ -21609,7 +21667,7 @@ + __extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) + vqdmlsl_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, int const __d) + { +- int32x4_t __tmp = vcombine_s32 (__c, vcreate_s32 (INT64_C (0))); ++ int32x4_t __tmp = vcombine_s32 (__c, vcreate_s32 (__AARCH64_INT64_C (0))); + return __builtin_aarch64_sqdmlsl_lanev2si (__a, __b, __tmp, __d); + } + +@@ -21734,7 +21792,7 @@ + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) + vqdmull_lane_s16 (int16x4_t __a, int16x4_t __b, int const __c) + { +- int16x8_t __tmp = vcombine_s16 (__b, vcreate_s16 (INT64_C (0))); ++ int16x8_t __tmp = vcombine_s16 (__b, vcreate_s16 (__AARCH64_INT64_C (0))); + return __builtin_aarch64_sqdmull_lanev4hi (__a, __tmp, __c); + } + +@@ -21783,7 +21841,7 @@ + __extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) + vqdmull_lane_s32 (int32x2_t __a, int32x2_t __b, int const __c) + { +- int32x4_t __tmp = vcombine_s32 (__b, vcreate_s32 (INT64_C (0))); ++ int32x4_t __tmp = vcombine_s32 (__b, vcreate_s32 (__AARCH64_INT64_C (0))); + return __builtin_aarch64_sqdmull_lanev2si (__a, __tmp, __c); + } + +@@ -22795,6 +22853,223 @@ + return (uint64x1_t) __builtin_aarch64_uqsubdi (__a, __b); + } + ++/* vrecpe */ ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrecpes_f32 (float32_t __a) ++{ ++ return __builtin_aarch64_frecpesf (__a); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrecped_f64 (float64_t __a) ++{ ++ return __builtin_aarch64_frecpedf (__a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrecpe_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_frecpev2sf (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrecpeq_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_frecpev4sf (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrecpeq_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_frecpev2df (__a); ++} ++ ++/* vrecps */ ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrecpss_f32 (float32_t __a, float32_t __b) ++{ ++ return __builtin_aarch64_frecpssf (__a, __b); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrecpsd_f64 (float64_t __a, float64_t __b) ++{ ++ return __builtin_aarch64_frecpsdf (__a, __b); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrecps_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __builtin_aarch64_frecpsv2sf (__a, __b); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrecpsq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __builtin_aarch64_frecpsv4sf (__a, __b); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrecpsq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __builtin_aarch64_frecpsv2df (__a, __b); ++} ++ ++/* vrecpx */ ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrecpxs_f32 (float32_t __a) ++{ ++ return __builtin_aarch64_frecpxsf (__a); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrecpxd_f64 (float64_t __a) ++{ ++ return __builtin_aarch64_frecpxdf (__a); ++} ++ ++/* vrnd */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrnd_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_btruncv2sf (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndq_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_btruncv4sf (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndq_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_btruncv2df (__a); ++} ++ ++/* vrnda */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrnda_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_roundv2sf (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndaq_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_roundv4sf (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndaq_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_roundv2df (__a); ++} ++ ++/* vrndi */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndi_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_nearbyintv2sf (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndiq_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_nearbyintv4sf (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndiq_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_nearbyintv2df (__a); ++} ++ ++/* vrndm */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndm_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_floorv2sf (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndmq_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_floorv4sf (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndmq_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_floorv2df (__a); ++} ++ ++/* vrndn */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndn_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_frintnv2sf (__a); ++} ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndnq_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_frintnv4sf (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndnq_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_frintnv2df (__a); ++} ++ ++/* vrndp */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndp_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_ceilv2sf (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndpq_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_ceilv4sf (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndpq_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_ceilv2df (__a); ++} ++ ++/* vrndx */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndx_f32 (float32x2_t __a) ++{ ++ return __builtin_aarch64_rintv2sf (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndxq_f32 (float32x4_t __a) ++{ ++ return __builtin_aarch64_rintv4sf (__a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndxq_f64 (float64x2_t __a) ++{ ++ return __builtin_aarch64_rintv2df (__a); ++} ++ + /* vrshl */ + + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +@@ -23133,114 +23408,191 @@ + return (uint64x1_t) __builtin_aarch64_ursra_ndi (__a, __b, __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++ ++/* vsha1 */ ++ ++static __inline uint32x4_t ++vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) ++{ ++ return __builtin_aarch64_crypto_sha1cv4si_uuuu (hash_abcd, hash_e, wk); ++} ++static __inline uint32x4_t ++vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) ++{ ++ return __builtin_aarch64_crypto_sha1mv4si_uuuu (hash_abcd, hash_e, wk); ++} ++static __inline uint32x4_t ++vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) ++{ ++ return __builtin_aarch64_crypto_sha1pv4si_uuuu (hash_abcd, hash_e, wk); ++} ++ ++static __inline uint32_t ++vsha1h_u32 (uint32_t hash_e) ++{ ++ return __builtin_aarch64_crypto_sha1hsi_uu (hash_e); ++} ++ ++static __inline uint32x4_t ++vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11) ++{ ++ return __builtin_aarch64_crypto_sha1su0v4si_uuuu (w0_3, w4_7, w8_11); ++} ++ ++static __inline uint32x4_t ++vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15) ++{ ++ return __builtin_aarch64_crypto_sha1su1v4si_uuu (tw0_3, w12_15); ++} ++ ++static __inline uint32x4_t ++vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk) ++{ ++ return __builtin_aarch64_crypto_sha256hv4si_uuuu (hash_abcd, hash_efgh, wk); ++} ++ ++static __inline uint32x4_t ++vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk) ++{ ++ return __builtin_aarch64_crypto_sha256h2v4si_uuuu (hash_efgh, hash_abcd, wk); ++} ++ ++static __inline uint32x4_t ++vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7) ++{ ++ return __builtin_aarch64_crypto_sha256su0v4si_uuu (w0_3, w4_7); ++} ++ ++static __inline uint32x4_t ++vsha256su1q_u32 (uint32x4_t tw0_3, uint32x4_t w8_11, uint32x4_t w12_15) ++{ ++ return __builtin_aarch64_crypto_sha256su1v4si_uuuu (tw0_3, w8_11, w12_15); ++} ++ ++static __inline poly128_t ++vmull_p64 (poly64_t a, poly64_t b) ++{ ++ return ++ __builtin_aarch64_crypto_pmulldi_ppp (a, b); ++} ++ ++static __inline poly128_t ++vmull_high_p64 (poly64x2_t a, poly64x2_t b) ++{ ++ return __builtin_aarch64_crypto_pmullv2di_ppp (a, b); ++} ++ ++#endif ++ + /* vshl */ + + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vshl_n_s8 (int8x8_t __a, const int __b) + { +- return (int8x8_t) __builtin_aarch64_sshl_nv8qi (__a, __b); ++ return (int8x8_t) __builtin_aarch64_ashlv8qi (__a, __b); + } + + __extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) + vshl_n_s16 (int16x4_t __a, const int __b) + { +- return (int16x4_t) __builtin_aarch64_sshl_nv4hi (__a, __b); ++ return (int16x4_t) __builtin_aarch64_ashlv4hi (__a, __b); + } + + __extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) + vshl_n_s32 (int32x2_t __a, const int __b) + { +- return (int32x2_t) __builtin_aarch64_sshl_nv2si (__a, __b); ++ return (int32x2_t) __builtin_aarch64_ashlv2si (__a, __b); + } + + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vshl_n_s64 (int64x1_t __a, const int __b) + { +- return (int64x1_t) __builtin_aarch64_sshl_ndi (__a, __b); ++ return (int64x1_t) __builtin_aarch64_ashldi (__a, __b); + } + + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) + vshl_n_u8 (uint8x8_t __a, const int __b) + { +- return (uint8x8_t) __builtin_aarch64_ushl_nv8qi ((int8x8_t) __a, __b); ++ return (uint8x8_t) __builtin_aarch64_ashlv8qi ((int8x8_t) __a, __b); + } + + __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) + vshl_n_u16 (uint16x4_t __a, const int __b) + { +- return (uint16x4_t) __builtin_aarch64_ushl_nv4hi ((int16x4_t) __a, __b); ++ return (uint16x4_t) __builtin_aarch64_ashlv4hi ((int16x4_t) __a, __b); + } + + __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) + vshl_n_u32 (uint32x2_t __a, const int __b) + { +- return (uint32x2_t) __builtin_aarch64_ushl_nv2si ((int32x2_t) __a, __b); ++ return (uint32x2_t) __builtin_aarch64_ashlv2si ((int32x2_t) __a, __b); + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vshl_n_u64 (uint64x1_t __a, const int __b) + { +- return (uint64x1_t) __builtin_aarch64_ushl_ndi ((int64x1_t) __a, __b); ++ return (uint64x1_t) __builtin_aarch64_ashldi ((int64x1_t) __a, __b); + } + + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vshlq_n_s8 (int8x16_t __a, const int __b) + { +- return (int8x16_t) __builtin_aarch64_sshl_nv16qi (__a, __b); ++ return (int8x16_t) __builtin_aarch64_ashlv16qi (__a, __b); + } + + __extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) + vshlq_n_s16 (int16x8_t __a, const int __b) + { +- return (int16x8_t) __builtin_aarch64_sshl_nv8hi (__a, __b); ++ return (int16x8_t) __builtin_aarch64_ashlv8hi (__a, __b); + } + + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) + vshlq_n_s32 (int32x4_t __a, const int __b) + { +- return (int32x4_t) __builtin_aarch64_sshl_nv4si (__a, __b); ++ return (int32x4_t) __builtin_aarch64_ashlv4si (__a, __b); + } + + __extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) + vshlq_n_s64 (int64x2_t __a, const int __b) + { +- return (int64x2_t) __builtin_aarch64_sshl_nv2di (__a, __b); ++ return (int64x2_t) __builtin_aarch64_ashlv2di (__a, __b); + } + + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vshlq_n_u8 (uint8x16_t __a, const int __b) + { +- return (uint8x16_t) __builtin_aarch64_ushl_nv16qi ((int8x16_t) __a, __b); ++ return (uint8x16_t) __builtin_aarch64_ashlv16qi ((int8x16_t) __a, __b); + } + + __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) + vshlq_n_u16 (uint16x8_t __a, const int __b) + { +- return (uint16x8_t) __builtin_aarch64_ushl_nv8hi ((int16x8_t) __a, __b); ++ return (uint16x8_t) __builtin_aarch64_ashlv8hi ((int16x8_t) __a, __b); + } + + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) + vshlq_n_u32 (uint32x4_t __a, const int __b) + { +- return (uint32x4_t) __builtin_aarch64_ushl_nv4si ((int32x4_t) __a, __b); ++ return (uint32x4_t) __builtin_aarch64_ashlv4si ((int32x4_t) __a, __b); + } + + __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) + vshlq_n_u64 (uint64x2_t __a, const int __b) + { +- return (uint64x2_t) __builtin_aarch64_ushl_nv2di ((int64x2_t) __a, __b); ++ return (uint64x2_t) __builtin_aarch64_ashlv2di ((int64x2_t) __a, __b); + } + + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vshld_n_s64 (int64x1_t __a, const int __b) + { +- return (int64x1_t) __builtin_aarch64_sshl_ndi (__a, __b); ++ return (int64x1_t) __builtin_aarch64_ashldi (__a, __b); + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vshld_n_u64 (uint64x1_t __a, const int __b) + { +- return (uint64x1_t) __builtin_aarch64_ushl_ndi (__a, __b); ++ return (uint64x1_t) __builtin_aarch64_ashldi (__a, __b); + } + + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +@@ -23428,109 +23780,109 @@ + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vshr_n_s8 (int8x8_t __a, const int __b) + { +- return (int8x8_t) __builtin_aarch64_sshr_nv8qi (__a, __b); ++ return (int8x8_t) __builtin_aarch64_ashrv8qi (__a, __b); + } + + __extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) + vshr_n_s16 (int16x4_t __a, const int __b) + { +- return (int16x4_t) __builtin_aarch64_sshr_nv4hi (__a, __b); ++ return (int16x4_t) __builtin_aarch64_ashrv4hi (__a, __b); + } + + __extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) + vshr_n_s32 (int32x2_t __a, const int __b) + { +- return (int32x2_t) __builtin_aarch64_sshr_nv2si (__a, __b); ++ return (int32x2_t) __builtin_aarch64_ashrv2si (__a, __b); + } + + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vshr_n_s64 (int64x1_t __a, const int __b) + { +- return (int64x1_t) __builtin_aarch64_sshr_ndi (__a, __b); ++ return (int64x1_t) __builtin_aarch64_ashrdi (__a, __b); + } + + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) + vshr_n_u8 (uint8x8_t __a, const int __b) + { +- return (uint8x8_t) __builtin_aarch64_ushr_nv8qi ((int8x8_t) __a, __b); ++ return (uint8x8_t) __builtin_aarch64_lshrv8qi ((int8x8_t) __a, __b); + } + + __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) + vshr_n_u16 (uint16x4_t __a, const int __b) + { +- return (uint16x4_t) __builtin_aarch64_ushr_nv4hi ((int16x4_t) __a, __b); ++ return (uint16x4_t) __builtin_aarch64_lshrv4hi ((int16x4_t) __a, __b); + } + + __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) + vshr_n_u32 (uint32x2_t __a, const int __b) + { +- return (uint32x2_t) __builtin_aarch64_ushr_nv2si ((int32x2_t) __a, __b); ++ return (uint32x2_t) __builtin_aarch64_lshrv2si ((int32x2_t) __a, __b); + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vshr_n_u64 (uint64x1_t __a, const int __b) + { +- return (uint64x1_t) __builtin_aarch64_ushr_ndi ((int64x1_t) __a, __b); ++ return (uint64x1_t) __builtin_aarch64_lshrdi ((int64x1_t) __a, __b); + } + + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vshrq_n_s8 (int8x16_t __a, const int __b) + { +- return (int8x16_t) __builtin_aarch64_sshr_nv16qi (__a, __b); ++ return (int8x16_t) __builtin_aarch64_ashrv16qi (__a, __b); + } + + __extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) + vshrq_n_s16 (int16x8_t __a, const int __b) + { +- return (int16x8_t) __builtin_aarch64_sshr_nv8hi (__a, __b); ++ return (int16x8_t) __builtin_aarch64_ashrv8hi (__a, __b); + } + + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) + vshrq_n_s32 (int32x4_t __a, const int __b) + { +- return (int32x4_t) __builtin_aarch64_sshr_nv4si (__a, __b); ++ return (int32x4_t) __builtin_aarch64_ashrv4si (__a, __b); + } + + __extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) + vshrq_n_s64 (int64x2_t __a, const int __b) + { +- return (int64x2_t) __builtin_aarch64_sshr_nv2di (__a, __b); ++ return (int64x2_t) __builtin_aarch64_ashrv2di (__a, __b); + } + + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vshrq_n_u8 (uint8x16_t __a, const int __b) + { +- return (uint8x16_t) __builtin_aarch64_ushr_nv16qi ((int8x16_t) __a, __b); ++ return (uint8x16_t) __builtin_aarch64_lshrv16qi ((int8x16_t) __a, __b); + } + + __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) + vshrq_n_u16 (uint16x8_t __a, const int __b) + { +- return (uint16x8_t) __builtin_aarch64_ushr_nv8hi ((int16x8_t) __a, __b); ++ return (uint16x8_t) __builtin_aarch64_lshrv8hi ((int16x8_t) __a, __b); + } + + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) + vshrq_n_u32 (uint32x4_t __a, const int __b) + { +- return (uint32x4_t) __builtin_aarch64_ushr_nv4si ((int32x4_t) __a, __b); ++ return (uint32x4_t) __builtin_aarch64_lshrv4si ((int32x4_t) __a, __b); + } + + __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) + vshrq_n_u64 (uint64x2_t __a, const int __b) + { +- return (uint64x2_t) __builtin_aarch64_ushr_nv2di ((int64x2_t) __a, __b); ++ return (uint64x2_t) __builtin_aarch64_lshrv2di ((int64x2_t) __a, __b); + } + + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vshrd_n_s64 (int64x1_t __a, const int __b) + { +- return (int64x1_t) __builtin_aarch64_sshr_ndi (__a, __b); ++ return (int64x1_t) __builtin_aarch64_ashrdi (__a, __b); + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vshrd_n_u64 (uint64x1_t __a, const int __b) + { +- return (uint64x1_t) __builtin_aarch64_ushr_ndi (__a, __b); ++ return (uint64x1_t) __builtin_aarch64_lshrdi (__a, __b); + } + + /* vsli */ +@@ -24153,8 +24505,8 @@ + { + __builtin_aarch64_simd_oi __o; + int64x2x2_t temp; +- temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (INT64_C (0))); +- temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (INT64_C (0))); ++ temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[1], 1); + __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o); +@@ -24165,8 +24517,8 @@ + { + __builtin_aarch64_simd_oi __o; + uint64x2x2_t temp; +- temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (UINT64_C (0))); +- temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (UINT64_C (0))); ++ temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[1], 1); + __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o); +@@ -24177,8 +24529,8 @@ + { + __builtin_aarch64_simd_oi __o; + float64x2x2_t temp; +- temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (UINT64_C (0))); +- temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (UINT64_C (0))); ++ temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) temp.val[1], 1); + __builtin_aarch64_st2df ((__builtin_aarch64_simd_df *) __a, __o); +@@ -24189,8 +24541,8 @@ + { + __builtin_aarch64_simd_oi __o; + int8x16x2_t temp; +- temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (INT64_C (0))); +- temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (INT64_C (0))); ++ temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1); + __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o); +@@ -24201,8 +24553,8 @@ + { + __builtin_aarch64_simd_oi __o; + poly8x16x2_t temp; +- temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (UINT64_C (0))); +- temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (UINT64_C (0))); ++ temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1); + __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o); +@@ -24213,8 +24565,8 @@ + { + __builtin_aarch64_simd_oi __o; + int16x8x2_t temp; +- temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (INT64_C (0))); +- temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (INT64_C (0))); ++ temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1); + __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o); +@@ -24225,8 +24577,8 @@ + { + __builtin_aarch64_simd_oi __o; + poly16x8x2_t temp; +- temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (UINT64_C (0))); +- temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (UINT64_C (0))); ++ temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1); + __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o); +@@ -24237,8 +24589,8 @@ + { + __builtin_aarch64_simd_oi __o; + int32x4x2_t temp; +- temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (INT64_C (0))); +- temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (INT64_C (0))); ++ temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[1], 1); + __builtin_aarch64_st2v2si ((__builtin_aarch64_simd_si *) __a, __o); +@@ -24249,8 +24601,8 @@ + { + __builtin_aarch64_simd_oi __o; + uint8x16x2_t temp; +- temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (UINT64_C (0))); +- temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (UINT64_C (0))); ++ temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1); + __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o); +@@ -24261,8 +24613,8 @@ + { + __builtin_aarch64_simd_oi __o; + uint16x8x2_t temp; +- temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (UINT64_C (0))); +- temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (UINT64_C (0))); ++ temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1); + __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o); +@@ -24273,8 +24625,8 @@ + { + __builtin_aarch64_simd_oi __o; + uint32x4x2_t temp; +- temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (UINT64_C (0))); +- temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (UINT64_C (0))); ++ temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[1], 1); + __builtin_aarch64_st2v2si ((__builtin_aarch64_simd_si *) __a, __o); +@@ -24285,8 +24637,8 @@ + { + __builtin_aarch64_simd_oi __o; + float32x4x2_t temp; +- temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (UINT64_C (0))); +- temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (UINT64_C (0))); ++ temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) temp.val[1], 1); + __builtin_aarch64_st2v2sf ((__builtin_aarch64_simd_sf *) __a, __o); +@@ -24405,9 +24757,9 @@ + { + __builtin_aarch64_simd_ci __o; + int64x2x3_t temp; +- temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (INT64_C (0))); +- temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (INT64_C (0))); +- temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (INT64_C (0))); ++ temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (__AARCH64_INT64_C (0))); ++ temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[2], 2); +@@ -24419,9 +24771,9 @@ + { + __builtin_aarch64_simd_ci __o; + uint64x2x3_t temp; +- temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (UINT64_C (0))); +- temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (UINT64_C (0))); +- temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (UINT64_C (0))); ++ temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[2], 2); +@@ -24433,9 +24785,9 @@ + { + __builtin_aarch64_simd_ci __o; + float64x2x3_t temp; +- temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (UINT64_C (0))); +- temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (UINT64_C (0))); +- temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (UINT64_C (0))); ++ temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[2], 2); +@@ -24447,9 +24799,9 @@ + { + __builtin_aarch64_simd_ci __o; + int8x16x3_t temp; +- temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (INT64_C (0))); +- temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (INT64_C (0))); +- temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (INT64_C (0))); ++ temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (__AARCH64_INT64_C (0))); ++ temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2); +@@ -24461,9 +24813,9 @@ + { + __builtin_aarch64_simd_ci __o; + poly8x16x3_t temp; +- temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (UINT64_C (0))); +- temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (UINT64_C (0))); +- temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (UINT64_C (0))); ++ temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2); +@@ -24475,9 +24827,9 @@ + { + __builtin_aarch64_simd_ci __o; + int16x8x3_t temp; +- temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (INT64_C (0))); +- temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (INT64_C (0))); +- temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (INT64_C (0))); ++ temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (__AARCH64_INT64_C (0))); ++ temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2); +@@ -24489,9 +24841,9 @@ + { + __builtin_aarch64_simd_ci __o; + poly16x8x3_t temp; +- temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (UINT64_C (0))); +- temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (UINT64_C (0))); +- temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (UINT64_C (0))); ++ temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2); +@@ -24503,9 +24855,9 @@ + { + __builtin_aarch64_simd_ci __o; + int32x4x3_t temp; +- temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (INT64_C (0))); +- temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (INT64_C (0))); +- temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (INT64_C (0))); ++ temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (__AARCH64_INT64_C (0))); ++ temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[2], 2); +@@ -24517,9 +24869,9 @@ + { + __builtin_aarch64_simd_ci __o; + uint8x16x3_t temp; +- temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (UINT64_C (0))); +- temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (UINT64_C (0))); +- temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (UINT64_C (0))); ++ temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2); +@@ -24531,9 +24883,9 @@ + { + __builtin_aarch64_simd_ci __o; + uint16x8x3_t temp; +- temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (UINT64_C (0))); +- temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (UINT64_C (0))); +- temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (UINT64_C (0))); ++ temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2); +@@ -24545,9 +24897,9 @@ + { + __builtin_aarch64_simd_ci __o; + uint32x4x3_t temp; +- temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (UINT64_C (0))); +- temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (UINT64_C (0))); +- temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (UINT64_C (0))); ++ temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[2], 2); +@@ -24559,9 +24911,9 @@ + { + __builtin_aarch64_simd_ci __o; + float32x4x3_t temp; +- temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (UINT64_C (0))); +- temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (UINT64_C (0))); +- temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (UINT64_C (0))); ++ temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[2], 2); +@@ -24693,10 +25045,10 @@ + { + __builtin_aarch64_simd_xi __o; + int64x2x4_t temp; +- temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (INT64_C (0))); +- temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (INT64_C (0))); +- temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (INT64_C (0))); +- temp.val[3] = vcombine_s64 (val.val[3], vcreate_s64 (INT64_C (0))); ++ temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (__AARCH64_INT64_C (0))); ++ temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (__AARCH64_INT64_C (0))); ++ temp.val[3] = vcombine_s64 (val.val[3], vcreate_s64 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[2], 2); +@@ -24709,10 +25061,10 @@ + { + __builtin_aarch64_simd_xi __o; + uint64x2x4_t temp; +- temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (UINT64_C (0))); +- temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (UINT64_C (0))); +- temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (UINT64_C (0))); +- temp.val[3] = vcombine_u64 (val.val[3], vcreate_u64 (UINT64_C (0))); ++ temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (__AARCH64_UINT64_C (0))); ++ temp.val[3] = vcombine_u64 (val.val[3], vcreate_u64 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[2], 2); +@@ -24725,10 +25077,10 @@ + { + __builtin_aarch64_simd_xi __o; + float64x2x4_t temp; +- temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (UINT64_C (0))); +- temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (UINT64_C (0))); +- temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (UINT64_C (0))); +- temp.val[3] = vcombine_f64 (val.val[3], vcreate_f64 (UINT64_C (0))); ++ temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (__AARCH64_UINT64_C (0))); ++ temp.val[3] = vcombine_f64 (val.val[3], vcreate_f64 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[2], 2); +@@ -24741,10 +25093,10 @@ + { + __builtin_aarch64_simd_xi __o; + int8x16x4_t temp; +- temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (INT64_C (0))); +- temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (INT64_C (0))); +- temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (INT64_C (0))); +- temp.val[3] = vcombine_s8 (val.val[3], vcreate_s8 (INT64_C (0))); ++ temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (__AARCH64_INT64_C (0))); ++ temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (__AARCH64_INT64_C (0))); ++ temp.val[3] = vcombine_s8 (val.val[3], vcreate_s8 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2); +@@ -24757,10 +25109,10 @@ + { + __builtin_aarch64_simd_xi __o; + poly8x16x4_t temp; +- temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (UINT64_C (0))); +- temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (UINT64_C (0))); +- temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (UINT64_C (0))); +- temp.val[3] = vcombine_p8 (val.val[3], vcreate_p8 (UINT64_C (0))); ++ temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (__AARCH64_UINT64_C (0))); ++ temp.val[3] = vcombine_p8 (val.val[3], vcreate_p8 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2); +@@ -24773,10 +25125,10 @@ + { + __builtin_aarch64_simd_xi __o; + int16x8x4_t temp; +- temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (INT64_C (0))); +- temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (INT64_C (0))); +- temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (INT64_C (0))); +- temp.val[3] = vcombine_s16 (val.val[3], vcreate_s16 (INT64_C (0))); ++ temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (__AARCH64_INT64_C (0))); ++ temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (__AARCH64_INT64_C (0))); ++ temp.val[3] = vcombine_s16 (val.val[3], vcreate_s16 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2); +@@ -24789,10 +25141,10 @@ + { + __builtin_aarch64_simd_xi __o; + poly16x8x4_t temp; +- temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (UINT64_C (0))); +- temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (UINT64_C (0))); +- temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (UINT64_C (0))); +- temp.val[3] = vcombine_p16 (val.val[3], vcreate_p16 (UINT64_C (0))); ++ temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (__AARCH64_UINT64_C (0))); ++ temp.val[3] = vcombine_p16 (val.val[3], vcreate_p16 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2); +@@ -24805,10 +25157,10 @@ + { + __builtin_aarch64_simd_xi __o; + int32x4x4_t temp; +- temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (INT64_C (0))); +- temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (INT64_C (0))); +- temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (INT64_C (0))); +- temp.val[3] = vcombine_s32 (val.val[3], vcreate_s32 (INT64_C (0))); ++ temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (__AARCH64_INT64_C (0))); ++ temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (__AARCH64_INT64_C (0))); ++ temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (__AARCH64_INT64_C (0))); ++ temp.val[3] = vcombine_s32 (val.val[3], vcreate_s32 (__AARCH64_INT64_C (0))); + __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[2], 2); +@@ -24821,10 +25173,10 @@ + { + __builtin_aarch64_simd_xi __o; + uint8x16x4_t temp; +- temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (UINT64_C (0))); +- temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (UINT64_C (0))); +- temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (UINT64_C (0))); +- temp.val[3] = vcombine_u8 (val.val[3], vcreate_u8 (UINT64_C (0))); ++ temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (__AARCH64_UINT64_C (0))); ++ temp.val[3] = vcombine_u8 (val.val[3], vcreate_u8 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2); +@@ -24837,10 +25189,10 @@ + { + __builtin_aarch64_simd_xi __o; + uint16x8x4_t temp; +- temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (UINT64_C (0))); +- temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (UINT64_C (0))); +- temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (UINT64_C (0))); +- temp.val[3] = vcombine_u16 (val.val[3], vcreate_u16 (UINT64_C (0))); ++ temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (__AARCH64_UINT64_C (0))); ++ temp.val[3] = vcombine_u16 (val.val[3], vcreate_u16 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2); +@@ -24853,10 +25205,10 @@ + { + __builtin_aarch64_simd_xi __o; + uint32x4x4_t temp; +- temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (UINT64_C (0))); +- temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (UINT64_C (0))); +- temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (UINT64_C (0))); +- temp.val[3] = vcombine_u32 (val.val[3], vcreate_u32 (UINT64_C (0))); ++ temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (__AARCH64_UINT64_C (0))); ++ temp.val[3] = vcombine_u32 (val.val[3], vcreate_u32 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[2], 2); +@@ -24869,10 +25221,10 @@ + { + __builtin_aarch64_simd_xi __o; + float32x4x4_t temp; +- temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (UINT64_C (0))); +- temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (UINT64_C (0))); +- temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (UINT64_C (0))); +- temp.val[3] = vcombine_f32 (val.val[3], vcreate_f32 (UINT64_C (0))); ++ temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0))); ++ temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0))); ++ temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (__AARCH64_UINT64_C (0))); ++ temp.val[3] = vcombine_f32 (val.val[3], vcreate_f32 (__AARCH64_UINT64_C (0))); + __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[0], 0); + __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[1], 1); + __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[2], 2); +@@ -25159,7 +25511,7 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vtst_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmtstdi (__a, __b); ++ return (__a & __b) ? -1ll : 0ll; + } + + __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +@@ -25186,8 +25538,7 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vtst_u64 (uint64x1_t __a, uint64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmtstdi ((int64x1_t) __a, +- (int64x1_t) __b); ++ return (__a & __b) ? -1ll : 0ll; + } + + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +@@ -25245,14 +25596,13 @@ + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vtstd_s64 (int64x1_t __a, int64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmtstdi (__a, __b); ++ return (__a & __b) ? -1ll : 0ll; + } + + __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) + vtstd_u64 (uint64x1_t __a, uint64x1_t __b) + { +- return (uint64x1_t) __builtin_aarch64_cmtstdi ((int64x1_t) __a, +- (int64x1_t) __b); ++ return (__a & __b) ? -1ll : 0ll; + } + + /* vuqadd */ +@@ -25371,4 +25721,31 @@ + + /* End of optimal implementations in approved order. */ + ++#undef __aarch64_vget_lane_any ++#undef __aarch64_vget_lane_f32 ++#undef __aarch64_vget_lane_f64 ++#undef __aarch64_vget_lane_p8 ++#undef __aarch64_vget_lane_p16 ++#undef __aarch64_vget_lane_s8 ++#undef __aarch64_vget_lane_s16 ++#undef __aarch64_vget_lane_s32 ++#undef __aarch64_vget_lane_s64 ++#undef __aarch64_vget_lane_u8 ++#undef __aarch64_vget_lane_u16 ++#undef __aarch64_vget_lane_u32 ++#undef __aarch64_vget_lane_u64 ++ ++#undef __aarch64_vgetq_lane_f32 ++#undef __aarch64_vgetq_lane_f64 ++#undef __aarch64_vgetq_lane_p8 ++#undef __aarch64_vgetq_lane_p16 ++#undef __aarch64_vgetq_lane_s8 ++#undef __aarch64_vgetq_lane_s16 ++#undef __aarch64_vgetq_lane_s32 ++#undef __aarch64_vgetq_lane_s64 ++#undef __aarch64_vgetq_lane_u8 ++#undef __aarch64_vgetq_lane_u16 ++#undef __aarch64_vgetq_lane_u32 ++#undef __aarch64_vgetq_lane_u64 ++ + #endif +--- a/src/gcc/config/aarch64/aarch64.md ++++ b/src/gcc/config/aarch64/aarch64.md +@@ -68,14 +68,19 @@ + (define_c_enum "unspec" [ + UNSPEC_CASESI + UNSPEC_CLS ++ UNSPEC_FRECPE ++ UNSPEC_FRECPS ++ UNSPEC_FRECPX + UNSPEC_FRINTA + UNSPEC_FRINTI + UNSPEC_FRINTM ++ UNSPEC_FRINTN + UNSPEC_FRINTP + UNSPEC_FRINTX + UNSPEC_FRINTZ + UNSPEC_GOTSMALLPIC + UNSPEC_GOTSMALLTLS ++ UNSPEC_GOTTINYPIC + UNSPEC_LD2 + UNSPEC_LD3 + UNSPEC_LD4 +@@ -107,206 +112,10 @@ + ;; Instruction types and attributes + ;; ------------------------------------------------------------------- + +-;; Main data types used by the insntructions ++; The "type" attribute is is included here from AArch32 backend to be able ++; to share pipeline descriptions. ++(include "../arm/types.md") + +-(define_attr "mode" "unknown,none,QI,HI,SI,DI,TI,SF,DF,TF" +- (const_string "unknown")) +- +-(define_attr "mode2" "unknown,none,QI,HI,SI,DI,TI,SF,DF,TF" +- (const_string "unknown")) +- +-; The "v8type" attribute is used to for fine grained classification of +-; AArch64 instructions. This table briefly explains the meaning of each type. +- +-; adc add/subtract with carry. +-; adcs add/subtract with carry (setting condition flags). +-; adr calculate address. +-; alu simple alu instruction (no memory or fp regs access). +-; alu_ext simple alu instruction (sign/zero-extended register). +-; alu_shift simple alu instruction, with a source operand shifted by a constant. +-; alus simple alu instruction (setting condition flags). +-; alus_ext simple alu instruction (sign/zero-extended register, setting condition flags). +-; alus_shift simple alu instruction, with a source operand shifted by a constant (setting condition flags). +-; bfm bitfield move operation. +-; branch branch. +-; call subroutine call. +-; ccmp conditional compare. +-; clz count leading zeros/sign bits. +-; csel conditional select. +-; dmb data memory barrier. +-; extend sign/zero-extend (specialised bitfield move). +-; extr extract register-sized bitfield encoding. +-; fpsimd_load load single floating point / simd scalar register from memory. +-; fpsimd_load2 load pair of floating point / simd scalar registers from memory. +-; fpsimd_store store single floating point / simd scalar register to memory. +-; fpsimd_store2 store pair floating point / simd scalar registers to memory. +-; fadd floating point add/sub. +-; fccmp floating point conditional compare. +-; fcmp floating point comparison. +-; fconst floating point load immediate. +-; fcsel floating point conditional select. +-; fcvt floating point convert (float to float). +-; fcvtf2i floating point convert (float to integer). +-; fcvti2f floating point convert (integer to float). +-; fdiv floating point division operation. +-; ffarith floating point abs, neg or cpy. +-; fmadd floating point multiply-add/sub. +-; fminmax floating point min/max. +-; fmov floating point move (float to float). +-; fmovf2i floating point move (float to integer). +-; fmovi2f floating point move (integer to float). +-; fmul floating point multiply. +-; frint floating point round to integral. +-; fsqrt floating point square root. +-; load_acq load-acquire. +-; load load single general register from memory +-; load2 load pair of general registers from memory +-; logic logical operation (register). +-; logic_imm and/or/xor operation (immediate). +-; logic_shift logical operation with shift. +-; logics logical operation (register, setting condition flags). +-; logics_imm and/or/xor operation (immediate, setting condition flags). +-; logics_shift logical operation with shift (setting condition flags). +-; madd integer multiply-add/sub. +-; maddl widening integer multiply-add/sub. +-; misc miscellaneous - any type that doesn't fit into the rest. +-; move integer move operation. +-; move2 double integer move operation. +-; movk move 16-bit immediate with keep. +-; movz move 16-bit immmediate with zero/one. +-; mrs system/special register move. +-; mulh 64x64 to 128-bit multiply (high part). +-; mull widening multiply. +-; mult integer multiply instruction. +-; prefetch memory prefetch. +-; rbit reverse bits. +-; rev reverse bytes. +-; sdiv integer division operation (signed). +-; shift variable shift operation. +-; shift_imm immediate shift operation (specialised bitfield move). +-; store_rel store-release. +-; store store single general register to memory. +-; store2 store pair of general registers to memory. +-; udiv integer division operation (unsigned). +- +-(define_attr "v8type" +- "adc,\ +- adcs,\ +- adr,\ +- alu,\ +- alu_ext,\ +- alu_shift,\ +- alus,\ +- alus_ext,\ +- alus_shift,\ +- bfm,\ +- branch,\ +- call,\ +- ccmp,\ +- clz,\ +- csel,\ +- dmb,\ +- div,\ +- div64,\ +- extend,\ +- extr,\ +- fpsimd_load,\ +- fpsimd_load2,\ +- fpsimd_store2,\ +- fpsimd_store,\ +- fadd,\ +- fccmp,\ +- fcvt,\ +- fcvtf2i,\ +- fcvti2f,\ +- fcmp,\ +- fconst,\ +- fcsel,\ +- fdiv,\ +- ffarith,\ +- fmadd,\ +- fminmax,\ +- fmov,\ +- fmovf2i,\ +- fmovi2f,\ +- fmul,\ +- frint,\ +- fsqrt,\ +- load_acq,\ +- load1,\ +- load2,\ +- logic,\ +- logic_imm,\ +- logic_shift,\ +- logics,\ +- logics_imm,\ +- logics_shift,\ +- madd,\ +- maddl,\ +- misc,\ +- move,\ +- move2,\ +- movk,\ +- movz,\ +- mrs,\ +- mulh,\ +- mull,\ +- mult,\ +- prefetch,\ +- rbit,\ +- rev,\ +- sdiv,\ +- shift,\ +- shift_imm,\ +- store_rel,\ +- store1,\ +- store2,\ +- udiv" +- (const_string "alu")) +- +- +-; The "type" attribute is used by the AArch32 backend. Below is a mapping +-; from "v8type" to "type". +- +-(define_attr "type" +- "alu,alu_shift,block,branch,call,f_2_r,f_cvt,f_flag,f_loads, +- f_loadd,f_stored,f_stores,faddd,fadds,fcmpd,fcmps,fconstd,fconsts, +- fcpys,fdivd,fdivs,ffarithd,ffariths,fmacd,fmacs,fmuld,fmuls,load_byte, +- load1,load2,mult,r_2_f,store1,store2" +- (cond [ +- (eq_attr "v8type" "alu_shift,alus_shift,logic_shift,logics_shift") (const_string "alu_shift") +- (eq_attr "v8type" "branch") (const_string "branch") +- (eq_attr "v8type" "call") (const_string "call") +- (eq_attr "v8type" "fmovf2i") (const_string "f_2_r") +- (eq_attr "v8type" "fcvt,fcvtf2i,fcvti2f") (const_string "f_cvt") +- (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "SF")) (const_string "f_loads") +- (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "DF")) (const_string "f_loadd") +- (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "SF")) (const_string "f_stores") +- (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "DF")) (const_string "f_stored") +- (and (eq_attr "v8type" "fadd,fminmax") (eq_attr "mode" "DF")) (const_string "faddd") +- (and (eq_attr "v8type" "fadd,fminmax") (eq_attr "mode" "SF")) (const_string "fadds") +- (and (eq_attr "v8type" "fcmp,fccmp") (eq_attr "mode" "DF")) (const_string "fcmpd") +- (and (eq_attr "v8type" "fcmp,fccmp") (eq_attr "mode" "SF")) (const_string "fcmps") +- (and (eq_attr "v8type" "fconst") (eq_attr "mode" "DF")) (const_string "fconstd") +- (and (eq_attr "v8type" "fconst") (eq_attr "mode" "SF")) (const_string "fconsts") +- (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "DF")) (const_string "fdivd") +- (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "SF")) (const_string "fdivs") +- (and (eq_attr "v8type" "ffarith") (eq_attr "mode" "DF")) (const_string "ffarithd") +- (and (eq_attr "v8type" "ffarith") (eq_attr "mode" "SF")) (const_string "ffariths") +- (and (eq_attr "v8type" "fmadd") (eq_attr "mode" "DF")) (const_string "fmacd") +- (and (eq_attr "v8type" "fmadd") (eq_attr "mode" "SF")) (const_string "fmacs") +- (and (eq_attr "v8type" "fmul") (eq_attr "mode" "DF")) (const_string "fmuld") +- (and (eq_attr "v8type" "fmul") (eq_attr "mode" "SF")) (const_string "fmuls") +- (and (eq_attr "v8type" "load1") (eq_attr "mode" "QI,HI")) (const_string "load_byte") +- (and (eq_attr "v8type" "load1") (eq_attr "mode" "SI,DI,TI")) (const_string "load1") +- (eq_attr "v8type" "load2") (const_string "load2") +- (and (eq_attr "v8type" "mulh,mult,mull,madd,sdiv,udiv") (eq_attr "mode" "SI")) (const_string "mult") +- (eq_attr "v8type" "fmovi2f") (const_string "r_2_f") +- (eq_attr "v8type" "store1") (const_string "store1") +- (eq_attr "v8type" "store2") (const_string "store2") +- ] +- (const_string "alu"))) +- + ;; Attribute that specifies whether or not the instruction touches fp + ;; registers. + (define_attr "fp" "no,yes" (const_string "no")) +@@ -337,10 +146,17 @@ + ;; Processor types. + (include "aarch64-tune.md") + ++;; True if the generic scheduling description should be used. ++ ++(define_attr "generic_sched" "yes,no" ++ (const (if_then_else ++ (eq_attr "tune" "cortexa53,cortexa15") ++ (const_string "no") ++ (const_string "yes")))) ++ + ;; Scheduling +-(include "aarch64-generic.md") +-(include "large.md") +-(include "small.md") ++(include "../arm/cortex-a53.md") ++(include "../arm/cortex-a15.md") + + ;; ------------------------------------------------------------------- + ;; Jumps and other miscellaneous insns +@@ -350,7 +166,7 @@ + [(set (pc) (match_operand:DI 0 "register_operand" "r"))] + "" + "br\\t%0" +- [(set_attr "v8type" "branch")] ++ [(set_attr "type" "branch")] + ) + + (define_insn "jump" +@@ -357,7 +173,7 @@ + [(set (pc) (label_ref (match_operand 0 "" "")))] + "" + "b\\t%l0" +- [(set_attr "v8type" "branch")] ++ [(set_attr "type" "branch")] + ) + + (define_expand "cbranch4" +@@ -395,7 +211,7 @@ + (pc)))] + "" + "b%m0\\t%l2" +- [(set_attr "v8type" "branch")] ++ [(set_attr "type" "branch")] + ) + + (define_expand "casesi" +@@ -459,7 +275,7 @@ + return aarch64_output_casesi (operands); + " + [(set_attr "length" "16") +- (set_attr "v8type" "branch")] ++ (set_attr "type" "branch")] + ) + + (define_insn "nop" +@@ -466,7 +282,7 @@ + [(unspec[(const_int 0)] UNSPEC_NOP)] + "" + "nop" +- [(set_attr "v8type" "misc")] ++ [(set_attr "type" "no_insn")] + ) + + (define_expand "prologue" +@@ -500,7 +316,7 @@ + [(return)] + "" + "ret" +- [(set_attr "v8type" "branch")] ++ [(set_attr "type" "branch")] + ) + + (define_insn "eh_return" +@@ -508,7 +324,8 @@ + UNSPECV_EH_RETURN)] + "" + "#" +- [(set_attr "v8type" "branch")] ++ [(set_attr "type" "branch")] ++ + ) + + (define_split +@@ -528,7 +345,8 @@ + (pc)))] + "" + "\\t%0, %l1" +- [(set_attr "v8type" "branch")] ++ [(set_attr "type" "branch")] ++ + ) + + (define_insn "*tb1" +@@ -546,8 +364,7 @@ + return \"ubfx\\t%3, %0, %1, #1\;\\t%3, %l2\"; + return \"\\t%0, %1, %l2\"; + " +- [(set_attr "v8type" "branch") +- (set_attr "mode" "") ++ [(set_attr "type" "branch") + (set (attr "length") + (if_then_else (and (ge (minus (match_dup 2) (pc)) (const_int -32768)) + (lt (minus (match_dup 2) (pc)) (const_int 32764))) +@@ -567,8 +384,7 @@ + return \"ubfx\\t%2, %0, , #1\;\\t%2, %l1\"; + return \"\\t%0, , %l1\"; + " +- [(set_attr "v8type" "branch") +- (set_attr "mode" "") ++ [(set_attr "type" "branch") + (set (attr "length") + (if_then_else (and (ge (minus (match_dup 1) (pc)) (const_int -32768)) + (lt (minus (match_dup 1) (pc)) (const_int 32764))) +@@ -612,7 +428,7 @@ + (clobber (reg:DI LR_REGNUM))] + "" + "blr\\t%0" +- [(set_attr "v8type" "call")] ++ [(set_attr "type" "call")] + ) + + (define_insn "*call_symbol" +@@ -623,7 +439,7 @@ + "GET_CODE (operands[0]) == SYMBOL_REF + && !aarch64_is_long_call_p (operands[0])" + "bl\\t%a0" +- [(set_attr "v8type" "call")] ++ [(set_attr "type" "call")] + ) + + (define_expand "call_value" +@@ -660,7 +476,8 @@ + (clobber (reg:DI LR_REGNUM))] + "" + "blr\\t%1" +- [(set_attr "v8type" "call")] ++ [(set_attr "type" "call")] ++ + ) + + (define_insn "*call_value_symbol" +@@ -672,7 +489,7 @@ + "GET_CODE (operands[1]) == SYMBOL_REF + && !aarch64_is_long_call_p (operands[1])" + "bl\\t%a1" +- [(set_attr "v8type" "call")] ++ [(set_attr "type" "call")] + ) + + (define_expand "sibcall" +@@ -707,7 +524,8 @@ + (use (match_operand 2 "" ""))] + "GET_CODE (operands[0]) == SYMBOL_REF" + "b\\t%a0" +- [(set_attr "v8type" "branch")] ++ [(set_attr "type" "branch")] ++ + ) + + (define_insn "*sibcall_value_insn" +@@ -718,7 +536,7 @@ + (use (match_operand 3 "" ""))] + "GET_CODE (operands[1]) == SYMBOL_REF" + "b\\t%a1" +- [(set_attr "v8type" "branch")] ++ [(set_attr "type" "branch")] + ) + + ;; Call subroutine returning any type. +@@ -763,21 +581,41 @@ + ) + + (define_insn "*mov_aarch64" +- [(set (match_operand:SHORT 0 "nonimmediate_operand" "=r,r,r,m, r,*w") +- (match_operand:SHORT 1 "general_operand" " r,M,m,rZ,*w,r"))] ++ [(set (match_operand:SHORT 0 "nonimmediate_operand" "=r,r, *w,r,*w, m, m, r,*w,*w") ++ (match_operand:SHORT 1 "general_operand" " r,M,D,m, m,rZ,*w,*w, r,*w"))] + "(register_operand (operands[0], mode) + || aarch64_reg_or_zero (operands[1], mode))" +- "@ +- mov\\t%w0, %w1 +- mov\\t%w0, %1 +- ldr\\t%w0, %1 +- str\\t%w1, %0 +- umov\\t%w0, %1.[0] +- dup\\t%0., %w1" +- [(set_attr "v8type" "move,alu,load1,store1,*,*") +- (set_attr "simd_type" "*,*,*,*,simd_movgp,simd_dupgp") +- (set_attr "mode" "") +- (set_attr "simd_mode" "")] ++{ ++ switch (which_alternative) ++ { ++ case 0: ++ return "mov\t%w0, %w1"; ++ case 1: ++ return "mov\t%w0, %1"; ++ case 2: ++ return aarch64_output_scalar_simd_mov_immediate (operands[1], ++ mode); ++ case 3: ++ return "ldr\t%w0, %1"; ++ case 4: ++ return "ldr\t%0, %1"; ++ case 5: ++ return "str\t%w1, %0"; ++ case 6: ++ return "str\t%1, %0"; ++ case 7: ++ return "umov\t%w0, %1.[0]"; ++ case 8: ++ return "dup\t%0., %w1"; ++ case 9: ++ return "dup\t%0, %1.[0]"; ++ default: ++ gcc_unreachable (); ++ } ++} ++ [(set_attr "type" "mov_reg,mov_imm,mov_imm,load1,load1,store1,store1,\ ++ neon_from_gp,neon_from_gp, neon_dup") ++ (set_attr "simd" "*,*,yes,*,*,*,*,yes,yes,yes")] + ) + + (define_expand "mov" +@@ -797,8 +635,8 @@ + ) + + (define_insn "*movsi_aarch64" +- [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,m, *w, r,*w") +- (match_operand:SI 1 "aarch64_mov_operand" " r,M,m,rZ,rZ,*w,*w"))] ++ [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,*w,m, m,*w, r,*w") ++ (match_operand:SI 1 "aarch64_mov_operand" " r,M,m, m,rZ,*w,rZ,*w,*w"))] + "(register_operand (operands[0], SImode) + || aarch64_reg_or_zero (operands[1], SImode))" + "@ +@@ -805,18 +643,19 @@ + mov\\t%w0, %w1 + mov\\t%w0, %1 + ldr\\t%w0, %1 ++ ldr\\t%s0, %1 + str\\t%w1, %0 ++ str\\t%s1, %0 + fmov\\t%s0, %w1 + fmov\\t%w0, %s1 + fmov\\t%s0, %s1" +- [(set_attr "v8type" "move,alu,load1,store1,fmov,fmov,fmov") +- (set_attr "mode" "SI") +- (set_attr "fp" "*,*,*,*,yes,yes,yes")] ++ [(set_attr "type" "mov_reg,mov_imm,load1,load1,store1,store1,fmov,fmov,fmov") ++ (set_attr "fp" "*,*,*,yes,*,yes,yes,yes,yes")] + ) + + (define_insn "*movdi_aarch64" +- [(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,m, r, r, *w, r,*w,w") +- (match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,m,rZ,Usa,Ush,rZ,*w,*w,Dd"))] ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,*w,m, m,r,r, *w, r,*w,w") ++ (match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,m, m,rZ,*w,S,Ush,rZ,*w,*w,Dd"))] + "(register_operand (operands[0], DImode) + || aarch64_reg_or_zero (operands[1], DImode))" + "@ +@@ -825,7 +664,9 @@ + mov\\t%x0, %1 + mov\\t%x0, %1 + ldr\\t%x0, %1 ++ ldr\\t%d0, %1 + str\\t%x1, %0 ++ str\\t%d1, %0 + adr\\t%x0, %a1 + adrp\\t%x0, %A1 + fmov\\t%d0, %x1 +@@ -832,10 +673,10 @@ + fmov\\t%x0, %d1 + fmov\\t%d0, %d1 + movi\\t%d0, %1" +- [(set_attr "v8type" "move,move,move,alu,load1,store1,adr,adr,fmov,fmov,fmov,fmov") +- (set_attr "mode" "DI") +- (set_attr "fp" "*,*,*,*,*,*,*,*,yes,yes,yes,*") +- (set_attr "simd" "*,*,*,*,*,*,*,*,*,*,*,yes")] ++ [(set_attr "type" "mov_reg,mov_reg,mov_reg,mov_imm,load1,load1,store1,store1,\ ++ adr,adr,fmov,fmov,fmov,fmov") ++ (set_attr "fp" "*,*,*,*,*,yes,*,yes,*,*,yes,yes,yes,*") ++ (set_attr "simd" "*,*,*,*,*,*,*,*,*,*,*,*,*,yes")] + ) + + (define_insn "insv_imm" +@@ -843,12 +684,10 @@ + (const_int 16) + (match_operand:GPI 1 "const_int_operand" "n")) + (match_operand:GPI 2 "const_int_operand" "n"))] +- "INTVAL (operands[1]) < GET_MODE_BITSIZE (mode) +- && INTVAL (operands[1]) % 16 == 0 +- && UINTVAL (operands[2]) <= 0xffff" ++ "UINTVAL (operands[1]) < GET_MODE_BITSIZE (mode) ++ && UINTVAL (operands[1]) % 16 == 0" + "movk\\t%0, %X2, lsl %1" +- [(set_attr "v8type" "movk") +- (set_attr "mode" "")] ++ [(set_attr "type" "mov_imm")] + ) + + (define_expand "movti" +@@ -878,13 +717,12 @@ + stp\\txzr, xzr, %0 + ldr\\t%q0, %1 + str\\t%q1, %0" +- [(set_attr "v8type" "move2,fmovi2f,fmovf2i,*, \ +- load2,store2,store2,fpsimd_load,fpsimd_store") +- (set_attr "simd_type" "*,*,*,simd_move,*,*,*,*,*") +- (set_attr "mode" "DI,DI,DI,TI,DI,DI,DI,TI,TI") ++ [(set_attr "type" "multiple,f_mcr,f_mrc,neon_logic_q, \ ++ load2,store2,store2,f_loadd,f_stored") + (set_attr "length" "8,8,8,4,4,4,4,4,4") +- (set_attr "fp" "*,*,*,*,*,*,*,yes,yes") +- (set_attr "simd" "*,*,*,yes,*,*,*,*,*")]) ++ (set_attr "simd" "*,*,*,yes,*,*,*,*,*") ++ (set_attr "fp" "*,*,*,*,*,*,*,yes,yes")] ++) + + ;; Split a TImode register-register or register-immediate move into + ;; its component DImode pieces, taking care to handle overlapping +@@ -930,10 +768,8 @@ + ldr\\t%w0, %1 + str\\t%w1, %0 + mov\\t%w0, %w1" +- [(set_attr "v8type" "fmovi2f,fmovf2i,\ +- fmov,fconst,fpsimd_load,\ +- fpsimd_store,fpsimd_load,fpsimd_store,fmov") +- (set_attr "mode" "SF")] ++ [(set_attr "type" "f_mcr,f_mrc,fmov,fconsts,\ ++ f_loads,f_stores,f_loads,f_stores,fmov")] + ) + + (define_insn "*movdf_aarch64" +@@ -951,10 +787,8 @@ + ldr\\t%x0, %1 + str\\t%x1, %0 + mov\\t%x0, %x1" +- [(set_attr "v8type" "fmovi2f,fmovf2i,\ +- fmov,fconst,fpsimd_load,\ +- fpsimd_store,fpsimd_load,fpsimd_store,move") +- (set_attr "mode" "DF")] ++ [(set_attr "type" "f_mcr,f_mrc,fmov,fconstd,\ ++ f_loadd,f_stored,f_loadd,f_stored,mov_reg")] + ) + + (define_expand "movtf" +@@ -982,9 +816,9 @@ + || register_operand (operands[1], TFmode))" + "@ + orr\\t%0.16b, %1.16b, %1.16b +- mov\\t%0, %1\;mov\\t%H0, %H1 +- fmov\\t%d0, %Q1\;fmov\\t%0.d[1], %R1 +- fmov\\t%Q0, %d1\;fmov\\t%R0, %1.d[1] ++ # ++ # ++ # + movi\\t%0.2d, #0 + fmov\\t%s0, wzr + ldr\\t%q0, %1 +@@ -991,13 +825,24 @@ + str\\t%q1, %0 + ldp\\t%0, %H0, %1 + stp\\t%1, %H1, %0" +- [(set_attr "v8type" "logic,move2,fmovi2f,fmovf2i,fconst,fconst,fpsimd_load,fpsimd_store,fpsimd_load2,fpsimd_store2") +- (set_attr "mode" "DF,DF,DF,DF,DF,DF,TF,TF,DF,DF") ++ [(set_attr "type" "logic_reg,multiple,f_mcr,f_mrc,fconstd,fconstd,\ ++ f_loadd,f_stored,neon_load1_2reg,neon_store1_2reg") + (set_attr "length" "4,8,8,8,4,4,4,4,4,4") + (set_attr "fp" "*,*,yes,yes,*,yes,yes,yes,*,*") + (set_attr "simd" "yes,*,*,*,yes,*,*,*,*,*")] + ) + ++(define_split ++ [(set (match_operand:TF 0 "register_operand" "") ++ (match_operand:TF 1 "aarch64_reg_or_imm" ""))] ++ "reload_completed && aarch64_split_128bit_move_p (operands[0], operands[1])" ++ [(const_int 0)] ++ { ++ aarch64_split_128bit_move (operands[0], operands[1]); ++ DONE; ++ } ++) ++ + ;; Operands 1 and 3 are tied together by the final condition; so we allow + ;; fairly lax checking on the second memory operation. + (define_insn "load_pair" +@@ -1010,8 +855,7 @@ + XEXP (operands[1], 0), + GET_MODE_SIZE (mode)))" + "ldp\\t%0, %2, %1" +- [(set_attr "v8type" "load2") +- (set_attr "mode" "")] ++ [(set_attr "type" "load2")] + ) + + ;; Operands 0 and 2 are tied together by the final condition; so we allow +@@ -1026,8 +870,7 @@ + XEXP (operands[0], 0), + GET_MODE_SIZE (mode)))" + "stp\\t%1, %3, %0" +- [(set_attr "v8type" "store2") +- (set_attr "mode" "")] ++ [(set_attr "type" "store2")] + ) + + ;; Operands 1 and 3 are tied together by the final condition; so we allow +@@ -1042,8 +885,7 @@ + XEXP (operands[1], 0), + GET_MODE_SIZE (mode)))" + "ldp\\t%0, %2, %1" +- [(set_attr "v8type" "fpsimd_load2") +- (set_attr "mode" "")] ++ [(set_attr "type" "neon_load1_2reg")] + ) + + ;; Operands 0 and 2 are tied together by the final condition; so we allow +@@ -1058,8 +900,7 @@ + XEXP (operands[0], 0), + GET_MODE_SIZE (mode)))" + "stp\\t%1, %3, %0" +- [(set_attr "v8type" "fpsimd_load2") +- (set_attr "mode" "")] ++ [(set_attr "type" "neon_store1_2reg")] + ) + + ;; Load pair with writeback. This is primarily used in function epilogues +@@ -1077,8 +918,7 @@ + (match_operand:PTR 5 "const_int_operand" "n"))))])] + "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (mode)" + "ldp\\t%2, %3, [%1], %4" +- [(set_attr "v8type" "load2") +- (set_attr "mode" "")] ++ [(set_attr "type" "load2")] + ) + + ;; Store pair with writeback. This is primarily used in function prologues +@@ -1096,8 +936,7 @@ + (match_operand:GPI 3 "register_operand" "r"))])] + "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (mode)" + "stp\\t%2, %3, [%0, %4]!" +- [(set_attr "v8type" "store2") +- (set_attr "mode" "")] ++ [(set_attr "type" "store2")] + ) + + ;; ------------------------------------------------------------------- +@@ -1117,8 +956,7 @@ + "@ + sxtw\t%0, %w1 + ldrsw\t%0, %1" +- [(set_attr "v8type" "extend,load1") +- (set_attr "mode" "DI")] ++ [(set_attr "type" "extend,load1")] + ) + + (define_insn "*zero_extendsidi2_aarch64" +@@ -1128,8 +966,7 @@ + "@ + uxtw\t%0, %w1 + ldr\t%w0, %1" +- [(set_attr "v8type" "extend,load1") +- (set_attr "mode" "DI")] ++ [(set_attr "type" "extend,load1")] + ) + + (define_expand "2" +@@ -1145,19 +982,18 @@ + "@ + sxt\t%0, %w1 + ldrs\t%0, %1" +- [(set_attr "v8type" "extend,load1") +- (set_attr "mode" "")] ++ [(set_attr "type" "extend,load1")] + ) + + (define_insn "*zero_extend2_aarch64" +- [(set (match_operand:GPI 0 "register_operand" "=r,r") +- (zero_extend:GPI (match_operand:SHORT 1 "nonimmediate_operand" "r,m")))] ++ [(set (match_operand:GPI 0 "register_operand" "=r,r,*w") ++ (zero_extend:GPI (match_operand:SHORT 1 "nonimmediate_operand" "r,m,m")))] + "" + "@ + uxt\t%0, %w1 +- ldr\t%w0, %1" +- [(set_attr "v8type" "extend,load1") +- (set_attr "mode" "")] ++ ldr\t%w0, %1 ++ ldr\t%0, %1" ++ [(set_attr "type" "extend,load1,load1")] + ) + + (define_expand "qihi2" +@@ -1173,8 +1009,7 @@ + "@ + xtb\t%w0, %w1 + b\t%w0, %1" +- [(set_attr "v8type" "extend,load1") +- (set_attr "mode" "HI")] ++ [(set_attr "type" "extend,load1")] + ) + + ;; ------------------------------------------------------------------- +@@ -1217,8 +1052,7 @@ + add\\t%w0, %w1, %2 + add\\t%w0, %w1, %w2 + sub\\t%w0, %w1, #%n2" +- [(set_attr "v8type" "alu") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_imm,alu_reg,alu_imm")] + ) + + ;; zero_extend version of above +@@ -1233,8 +1067,7 @@ + add\\t%w0, %w1, %2 + add\\t%w0, %w1, %w2 + sub\\t%w0, %w1, #%n2" +- [(set_attr "v8type" "alu") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_imm,alu_reg,alu_imm")] + ) + + (define_insn "*adddi3_aarch64" +@@ -1249,8 +1082,7 @@ + add\\t%x0, %x1, %x2 + sub\\t%x0, %x1, #%n2 + add\\t%d0, %d1, %d2" +- [(set_attr "v8type" "alu") +- (set_attr "mode" "DI") ++ [(set_attr "type" "alu_imm,alu_reg,alu_imm,alu_reg") + (set_attr "simd" "*,*,*,yes")] + ) + +@@ -1257,17 +1089,17 @@ + (define_insn "*add3_compare0" + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ +- (plus:GPI (match_operand:GPI 1 "register_operand" "%r,r") +- (match_operand:GPI 2 "aarch64_plus_operand" "rI,J")) ++ (plus:GPI (match_operand:GPI 1 "register_operand" "%r,r,r") ++ (match_operand:GPI 2 "aarch64_plus_operand" "r,I,J")) + (const_int 0))) +- (set (match_operand:GPI 0 "register_operand" "=r,r") ++ (set (match_operand:GPI 0 "register_operand" "=r,r,r") + (plus:GPI (match_dup 1) (match_dup 2)))] + "" + "@ + adds\\t%0, %1, %2 ++ adds\\t%0, %1, %2 + subs\\t%0, %1, #%n2" +- [(set_attr "v8type" "alus") +- (set_attr "mode" "")] ++ [(set_attr "type" "alus_reg,alus_imm,alus_imm")] + ) + + ;; zero_extend version of above +@@ -1274,42 +1106,141 @@ + (define_insn "*addsi3_compare0_uxtw" + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ +- (plus:SI (match_operand:SI 1 "register_operand" "%r,r") +- (match_operand:SI 2 "aarch64_plus_operand" "rI,J")) ++ (plus:SI (match_operand:SI 1 "register_operand" "%r,r,r") ++ (match_operand:SI 2 "aarch64_plus_operand" "r,I,J")) + (const_int 0))) +- (set (match_operand:DI 0 "register_operand" "=r,r") ++ (set (match_operand:DI 0 "register_operand" "=r,r,r") + (zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))] + "" + "@ + adds\\t%w0, %w1, %w2 ++ adds\\t%w0, %w1, %w2 + subs\\t%w0, %w1, #%n2" +- [(set_attr "v8type" "alus") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alus_reg,alus_imm,alus_imm")] + ) + ++(define_insn "*adds_mul_imm_" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (plus:GPI (mult:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_pwr_2_" "n")) ++ (match_operand:GPI 3 "register_operand" "rk")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (mult:GPI (match_dup 1) (match_dup 2)) ++ (match_dup 3)))] ++ "" ++ "adds\\t%0, %3, %1, lsl %p2" ++ [(set_attr "type" "alus_shift_imm")] ++) ++ ++(define_insn "*subs_mul_imm_" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (minus:GPI (match_operand:GPI 1 "register_operand" "rk") ++ (mult:GPI ++ (match_operand:GPI 2 "register_operand" "r") ++ (match_operand:QI 3 "aarch64_pwr_2_" "n"))) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (minus:GPI (match_dup 1) ++ (mult:GPI (match_dup 2) (match_dup 3))))] ++ "" ++ "subs\\t%0, %1, %2, lsl %p3" ++ [(set_attr "type" "alus_shift_imm")] ++) ++ ++(define_insn "*adds__" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (plus:GPI ++ (ANY_EXTEND:GPI (match_operand:ALLX 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (ANY_EXTEND:GPI (match_dup 1)) (match_dup 2)))] ++ "" ++ "adds\\t%0, %2, %1, xt" ++ [(set_attr "type" "alus_ext")] ++) ++ ++(define_insn "*subs__" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (minus:GPI (match_operand:GPI 1 "register_operand" "r") ++ (ANY_EXTEND:GPI ++ (match_operand:ALLX 2 "register_operand" "r"))) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (minus:GPI (match_dup 1) (ANY_EXTEND:GPI (match_dup 2))))] ++ "" ++ "subs\\t%0, %1, %2, xt" ++ [(set_attr "type" "alus_ext")] ++) ++ ++(define_insn "*adds__multp2" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (plus:GPI (ANY_EXTRACT:GPI ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n") ++ (const_int 0)) ++ (match_operand:GPI 4 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (ANY_EXTRACT:GPI (mult:GPI (match_dup 1) (match_dup 2)) ++ (match_dup 3) ++ (const_int 0)) ++ (match_dup 4)))] ++ "aarch64_is_extend_from_extract (mode, operands[2], operands[3])" ++ "adds\\t%0, %4, %1, xt%e3 %p2" ++ [(set_attr "type" "alus_ext")] ++) ++ ++(define_insn "*subs__multp2" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (minus:GPI (match_operand:GPI 4 "register_operand" "r") ++ (ANY_EXTRACT:GPI ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n") ++ (const_int 0))) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (minus:GPI (match_dup 4) (ANY_EXTRACT:GPI ++ (mult:GPI (match_dup 1) (match_dup 2)) ++ (match_dup 3) ++ (const_int 0))))] ++ "aarch64_is_extend_from_extract (mode, operands[2], operands[3])" ++ "subs\\t%0, %4, %1, xt%e3 %p2" ++ [(set_attr "type" "alus_ext")] ++) ++ + (define_insn "*add3nr_compare0" + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ +- (plus:GPI (match_operand:GPI 0 "register_operand" "%r,r") +- (match_operand:GPI 1 "aarch64_plus_operand" "rI,J")) ++ (plus:GPI (match_operand:GPI 0 "register_operand" "%r,r,r") ++ (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")) + (const_int 0)))] + "" + "@ + cmn\\t%0, %1 ++ cmn\\t%0, %1 + cmp\\t%0, #%n1" +- [(set_attr "v8type" "alus") +- (set_attr "mode" "")] ++ [(set_attr "type" "alus_reg,alus_imm,alus_imm")] + ) + + (define_insn "*compare_neg" +- [(set (reg:CC CC_REGNUM) +- (compare:CC +- (match_operand:GPI 0 "register_operand" "r") +- (neg:GPI (match_operand:GPI 1 "register_operand" "r"))))] ++ [(set (reg:CC_Z CC_REGNUM) ++ (compare:CC_Z ++ (neg:GPI (match_operand:GPI 0 "register_operand" "r")) ++ (match_operand:GPI 1 "register_operand" "r")))] + "" +- "cmn\\t%0, %1" +- [(set_attr "v8type" "alus") +- (set_attr "mode" "")] ++ "cmn\\t%1, %0" ++ [(set_attr "type" "alus_reg")] + ) + + (define_insn "*add__" +@@ -1319,8 +1250,7 @@ + (match_operand:GPI 3 "register_operand" "r")))] + "" + "add\\t%0, %3, %1, %2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + ;; zero_extend version of above +@@ -1332,8 +1262,7 @@ + (match_operand:SI 3 "register_operand" "r"))))] + "" + "add\\t%w0, %w3, %w1, %2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + (define_insn "*add_mul_imm_" +@@ -1343,8 +1272,7 @@ + (match_operand:GPI 3 "register_operand" "r")))] + "" + "add\\t%0, %3, %1, lsl %p2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + (define_insn "*add__" +@@ -1353,8 +1281,7 @@ + (match_operand:GPI 2 "register_operand" "r")))] + "" + "add\\t%0, %2, %1, xt" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_ext")] + ) + + ;; zero_extend version of above +@@ -1365,8 +1292,7 @@ + (match_operand:GPI 2 "register_operand" "r"))))] + "" + "add\\t%w0, %w2, %w1, xt" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_ext")] + ) + + (define_insn "*add__shft_" +@@ -1377,8 +1303,7 @@ + (match_operand:GPI 3 "register_operand" "r")))] + "" + "add\\t%0, %3, %1, xt %2" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_ext")] + ) + + ;; zero_extend version of above +@@ -1391,8 +1316,7 @@ + (match_operand:SI 3 "register_operand" "r"))))] + "" + "add\\t%w0, %w3, %w1, xt %2" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_ext")] + ) + + (define_insn "*add__mult_" +@@ -1403,8 +1327,7 @@ + (match_operand:GPI 3 "register_operand" "r")))] + "" + "add\\t%0, %3, %1, xt %p2" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_ext")] + ) + + ;; zero_extend version of above +@@ -1416,8 +1339,7 @@ + (match_operand:SI 3 "register_operand" "r"))))] + "" + "add\\t%w0, %w3, %w1, xt %p2" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_ext")] + ) + + (define_insn "*add__multp2" +@@ -1430,8 +1352,7 @@ + (match_operand:GPI 4 "register_operand" "r")))] + "aarch64_is_extend_from_extract (mode, operands[2], operands[3])" + "add\\t%0, %4, %1, xt%e3 %p2" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_ext")] + ) + + ;; zero_extend version of above +@@ -1446,8 +1367,7 @@ + (match_operand:SI 4 "register_operand" "r"))))] + "aarch64_is_extend_from_extract (SImode, operands[2], operands[3])" + "add\\t%w0, %w4, %w1, xt%e3 %p2" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_ext")] + ) + + (define_insn "*add3_carryin" +@@ -1459,8 +1379,7 @@ + (match_operand:GPI 2 "register_operand" "r"))))] + "" + "adc\\t%0, %1, %2" +- [(set_attr "v8type" "adc") +- (set_attr "mode" "")] ++ [(set_attr "type" "adc_reg")] + ) + + ;; zero_extend version of above +@@ -1474,8 +1393,7 @@ + (match_operand:SI 2 "register_operand" "r")))))] + "" + "adc\\t%w0, %w1, %w2" +- [(set_attr "v8type" "adc") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "adc_reg")] + ) + + (define_insn "*add3_carryin_alt1" +@@ -1487,8 +1405,7 @@ + (geu:GPI (reg:CC CC_REGNUM) (const_int 0))))] + "" + "adc\\t%0, %1, %2" +- [(set_attr "v8type" "adc") +- (set_attr "mode" "")] ++ [(set_attr "type" "adc_reg")] + ) + + ;; zero_extend version of above +@@ -1502,8 +1419,7 @@ + (geu:SI (reg:CC CC_REGNUM) (const_int 0)))))] + "" + "adc\\t%w0, %w1, %w2" +- [(set_attr "v8type" "adc") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "adc_reg")] + ) + + (define_insn "*add3_carryin_alt2" +@@ -1515,8 +1431,7 @@ + (match_operand:GPI 2 "register_operand" "r")))] + "" + "adc\\t%0, %1, %2" +- [(set_attr "v8type" "adc") +- (set_attr "mode" "")] ++ [(set_attr "type" "adc_reg")] + ) + + ;; zero_extend version of above +@@ -1530,8 +1445,7 @@ + (match_operand:SI 2 "register_operand" "r"))))] + "" + "adc\\t%w0, %w1, %w2" +- [(set_attr "v8type" "adc") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "adc_reg")] + ) + + (define_insn "*add3_carryin_alt3" +@@ -1543,8 +1457,7 @@ + (match_operand:GPI 1 "register_operand" "r")))] + "" + "adc\\t%0, %1, %2" +- [(set_attr "v8type" "adc") +- (set_attr "mode" "")] ++ [(set_attr "type" "adc_reg")] + ) + + ;; zero_extend version of above +@@ -1558,8 +1471,7 @@ + (match_operand:SI 1 "register_operand" "r"))))] + "" + "adc\\t%w0, %w1, %w2" +- [(set_attr "v8type" "adc") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "adc_reg")] + ) + + (define_insn "*add_uxt_multp2" +@@ -1574,8 +1486,7 @@ + operands[3] = GEN_INT (aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), + INTVAL (operands[3]))); + return \"add\t%0, %4, %1, uxt%e3 %p2\";" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_ext")] + ) + + ;; zero_extend version of above +@@ -1592,8 +1503,7 @@ + operands[3] = GEN_INT (aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), + INTVAL (operands[3]))); + return \"add\t%w0, %w4, %w1, uxt%e3 %p2\";" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_ext")] + ) + + (define_insn "subsi3" +@@ -1602,8 +1512,7 @@ + (match_operand:SI 2 "register_operand" "r")))] + "" + "sub\\t%w0, %w1, %w2" +- [(set_attr "v8type" "alu") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_reg")] + ) + + ;; zero_extend version of above +@@ -1614,8 +1523,7 @@ + (match_operand:SI 2 "register_operand" "r"))))] + "" + "sub\\t%w0, %w1, %w2" +- [(set_attr "v8type" "alu") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_reg")] + ) + + (define_insn "subdi3" +@@ -1626,8 +1534,7 @@ + "@ + sub\\t%x0, %x1, %x2 + sub\\t%d0, %d1, %d2" +- [(set_attr "v8type" "alu") +- (set_attr "mode" "DI") ++ [(set_attr "type" "alu_reg, neon_sub") + (set_attr "simd" "*,yes")] + ) + +@@ -1641,8 +1548,7 @@ + (minus:GPI (match_dup 1) (match_dup 2)))] + "" + "subs\\t%0, %1, %2" +- [(set_attr "v8type" "alus") +- (set_attr "mode" "")] ++ [(set_attr "type" "alus_reg")] + ) + + ;; zero_extend version of above +@@ -1655,8 +1561,7 @@ + (zero_extend:DI (minus:SI (match_dup 1) (match_dup 2))))] + "" + "subs\\t%w0, %w1, %w2" +- [(set_attr "v8type" "alus") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alus_reg")] + ) + + (define_insn "*sub__" +@@ -1667,8 +1572,7 @@ + (match_operand:QI 2 "aarch64_shift_imm_" "n"))))] + "" + "sub\\t%0, %3, %1, %2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + ;; zero_extend version of above +@@ -1681,8 +1585,7 @@ + (match_operand:QI 2 "aarch64_shift_imm_si" "n")))))] + "" + "sub\\t%w0, %w3, %w1, %2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + (define_insn "*sub_mul_imm_" +@@ -1693,8 +1596,7 @@ + (match_operand:QI 2 "aarch64_pwr_2_" "n"))))] + "" + "sub\\t%0, %3, %1, lsl %p2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + ;; zero_extend version of above +@@ -1707,8 +1609,7 @@ + (match_operand:QI 2 "aarch64_pwr_2_si" "n")))))] + "" + "sub\\t%w0, %w3, %w1, lsl %p2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + (define_insn "*sub__" +@@ -1718,8 +1619,7 @@ + (match_operand:ALLX 2 "register_operand" "r"))))] + "" + "sub\\t%0, %1, %2, xt" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_ext")] + ) + + ;; zero_extend version of above +@@ -1731,8 +1631,7 @@ + (match_operand:SHORT 2 "register_operand" "r")))))] + "" + "sub\\t%w0, %w1, %w2, xt" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_ext")] + ) + + (define_insn "*sub__shft_" +@@ -1743,8 +1642,7 @@ + (match_operand 3 "aarch64_imm3" "Ui3"))))] + "" + "sub\\t%0, %1, %2, xt %3" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_ext")] + ) + + ;; zero_extend version of above +@@ -1757,8 +1655,7 @@ + (match_operand 3 "aarch64_imm3" "Ui3")))))] + "" + "sub\\t%w0, %w1, %w2, xt %3" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_ext")] + ) + + (define_insn "*sub__multp2" +@@ -1771,8 +1668,7 @@ + (const_int 0))))] + "aarch64_is_extend_from_extract (mode, operands[2], operands[3])" + "sub\\t%0, %4, %1, xt%e3 %p2" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_ext")] + ) + + ;; zero_extend version of above +@@ -1787,10 +1683,35 @@ + (const_int 0)))))] + "aarch64_is_extend_from_extract (SImode, operands[2], operands[3])" + "sub\\t%w0, %w4, %w1, xt%e3 %p2" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_ext")] + ) + ++(define_insn "*sub3_carryin" ++ [(set ++ (match_operand:GPI 0 "register_operand" "=r") ++ (minus:GPI (minus:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (ltu:GPI (reg:CC CC_REGNUM) (const_int 0))) ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "sbc\\t%0, %1, %2" ++ [(set_attr "type" "adc_reg")] ++) ++ ++;; zero_extend version of the above ++(define_insn "*subsi3_carryin_uxtw" ++ [(set ++ (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (minus:SI (minus:SI ++ (match_operand:SI 1 "register_operand" "r") ++ (ltu:SI (reg:CC CC_REGNUM) (const_int 0))) ++ (match_operand:SI 2 "register_operand" "r"))))] ++ "" ++ "sbc\\t%w0, %w1, %w2" ++ [(set_attr "type" "adc_reg")] ++) ++ + (define_insn "*sub_uxt_multp2" + [(set (match_operand:GPI 0 "register_operand" "=rk") + (minus:GPI (match_operand:GPI 4 "register_operand" "r") +@@ -1803,8 +1724,7 @@ + operands[3] = GEN_INT (aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), + INTVAL (operands[3]))); + return \"sub\t%0, %4, %1, uxt%e3 %p2\";" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_ext")] + ) + + ;; zero_extend version of above +@@ -1821,17 +1741,47 @@ + operands[3] = GEN_INT (aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), + INTVAL (operands[3]))); + return \"sub\t%w0, %w4, %w1, uxt%e3 %p2\";" +- [(set_attr "v8type" "alu_ext") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_ext")] + ) + ++(define_insn_and_split "absdi2" ++ [(set (match_operand:DI 0 "register_operand" "=r,w") ++ (abs:DI (match_operand:DI 1 "register_operand" "r,w"))) ++ (clobber (match_scratch:DI 2 "=&r,X"))] ++ "" ++ "@ ++ # ++ abs\\t%d0, %d1" ++ "reload_completed ++ && GP_REGNUM_P (REGNO (operands[0])) ++ && GP_REGNUM_P (REGNO (operands[1]))" ++ [(const_int 0)] ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, operands[2], ++ gen_rtx_XOR (DImode, ++ gen_rtx_ASHIFTRT (DImode, ++ operands[1], ++ GEN_INT (63)), ++ operands[1]))); ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_MINUS (DImode, ++ operands[2], ++ gen_rtx_ASHIFTRT (DImode, ++ operands[1], ++ GEN_INT (63))))); ++ DONE; ++ } ++ [(set_attr "type" "alu_reg")] ++) ++ + (define_insn "neg2" + [(set (match_operand:GPI 0 "register_operand" "=r") + (neg:GPI (match_operand:GPI 1 "register_operand" "r")))] + "" + "neg\\t%0, %1" +- [(set_attr "v8type" "alu") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_reg") ++ (set_attr "simd" "*")] + ) + + ;; zero_extend version of above +@@ -1840,10 +1790,28 @@ + (zero_extend:DI (neg:SI (match_operand:SI 1 "register_operand" "r"))))] + "" + "neg\\t%w0, %w1" +- [(set_attr "v8type" "alu") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_reg")] + ) + ++(define_insn "*ngc" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (minus:GPI (neg:GPI (ltu:GPI (reg:CC CC_REGNUM) (const_int 0))) ++ (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "ngc\\t%0, %1" ++ [(set_attr "type" "adc_reg")] ++) ++ ++(define_insn "*ngcsi_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (minus:SI (neg:SI (ltu:SI (reg:CC CC_REGNUM) (const_int 0))) ++ (match_operand:SI 1 "register_operand" "r"))))] ++ "" ++ "ngc\\t%w0, %w1" ++ [(set_attr "type" "adc_reg")] ++) ++ + (define_insn "*neg2_compare0" + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ (neg:GPI (match_operand:GPI 1 "register_operand" "r")) +@@ -1852,8 +1820,7 @@ + (neg:GPI (match_dup 1)))] + "" + "negs\\t%0, %1" +- [(set_attr "v8type" "alus") +- (set_attr "mode" "")] ++ [(set_attr "type" "alus_reg")] + ) + + ;; zero_extend version of above +@@ -1865,10 +1832,23 @@ + (zero_extend:DI (neg:SI (match_dup 1))))] + "" + "negs\\t%w0, %w1" +- [(set_attr "v8type" "alus") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alus_reg")] + ) + ++(define_insn "*neg_3_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (neg:GPI (ASHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n"))) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (neg:GPI (ASHIFT:GPI (match_dup 1) (match_dup 2))))] ++ "" ++ "negs\\t%0, %1, %2" ++ [(set_attr "type" "alus_shift_imm")] ++) ++ + (define_insn "*neg__2" + [(set (match_operand:GPI 0 "register_operand" "=r") + (neg:GPI (ASHIFT:GPI +@@ -1876,8 +1856,7 @@ + (match_operand:QI 2 "aarch64_shift_imm_" "n"))))] + "" + "neg\\t%0, %1, %2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + ;; zero_extend version of above +@@ -1889,8 +1868,7 @@ + (match_operand:QI 2 "aarch64_shift_imm_si" "n")))))] + "" + "neg\\t%w0, %w1, %2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + (define_insn "*neg_mul_imm_2" +@@ -1900,8 +1878,7 @@ + (match_operand:QI 2 "aarch64_pwr_2_" "n"))))] + "" + "neg\\t%0, %1, lsl %p2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + ;; zero_extend version of above +@@ -1913,8 +1890,7 @@ + (match_operand:QI 2 "aarch64_pwr_2_si" "n")))))] + "" + "neg\\t%w0, %w1, lsl %p2" +- [(set_attr "v8type" "alu_shift") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "alu_shift_imm")] + ) + + (define_insn "mul3" +@@ -1923,8 +1899,7 @@ + (match_operand:GPI 2 "register_operand" "r")))] + "" + "mul\\t%0, %1, %2" +- [(set_attr "v8type" "mult") +- (set_attr "mode" "")] ++ [(set_attr "type" "mul")] + ) + + ;; zero_extend version of above +@@ -1935,8 +1910,7 @@ + (match_operand:SI 2 "register_operand" "r"))))] + "" + "mul\\t%w0, %w1, %w2" +- [(set_attr "v8type" "mult") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "mul")] + ) + + (define_insn "*madd" +@@ -1946,8 +1920,7 @@ + (match_operand:GPI 3 "register_operand" "r")))] + "" + "madd\\t%0, %1, %2, %3" +- [(set_attr "v8type" "madd") +- (set_attr "mode" "")] ++ [(set_attr "type" "mla")] + ) + + ;; zero_extend version of above +@@ -1959,8 +1932,7 @@ + (match_operand:SI 3 "register_operand" "r"))))] + "" + "madd\\t%w0, %w1, %w2, %w3" +- [(set_attr "v8type" "madd") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "mla")] + ) + + (define_insn "*msub" +@@ -1971,8 +1943,7 @@ + + "" + "msub\\t%0, %1, %2, %3" +- [(set_attr "v8type" "madd") +- (set_attr "mode" "")] ++ [(set_attr "type" "mla")] + ) + + ;; zero_extend version of above +@@ -1985,8 +1956,7 @@ + + "" + "msub\\t%w0, %w1, %w2, %w3" +- [(set_attr "v8type" "madd") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "mla")] + ) + + (define_insn "*mul_neg" +@@ -1996,8 +1966,7 @@ + + "" + "mneg\\t%0, %1, %2" +- [(set_attr "v8type" "mult") +- (set_attr "mode" "")] ++ [(set_attr "type" "mul")] + ) + + ;; zero_extend version of above +@@ -2009,8 +1978,7 @@ + + "" + "mneg\\t%w0, %w1, %w2" +- [(set_attr "v8type" "mult") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "mul")] + ) + + (define_insn "mulsidi3" +@@ -2019,8 +1987,7 @@ + (ANY_EXTEND:DI (match_operand:SI 2 "register_operand" "r"))))] + "" + "mull\\t%0, %w1, %w2" +- [(set_attr "v8type" "mull") +- (set_attr "mode" "DI")] ++ [(set_attr "type" "mull")] + ) + + (define_insn "maddsidi4" +@@ -2031,8 +1998,7 @@ + (match_operand:DI 3 "register_operand" "r")))] + "" + "maddl\\t%0, %w1, %w2, %3" +- [(set_attr "v8type" "maddl") +- (set_attr "mode" "DI")] ++ [(set_attr "type" "mlal")] + ) + + (define_insn "msubsidi4" +@@ -2044,8 +2010,7 @@ + (match_operand:SI 2 "register_operand" "r")))))] + "" + "msubl\\t%0, %w1, %w2, %3" +- [(set_attr "v8type" "maddl") +- (set_attr "mode" "DI")] ++ [(set_attr "type" "mlal")] + ) + + (define_insn "*mulsidi_neg" +@@ -2055,8 +2020,7 @@ + (ANY_EXTEND:DI (match_operand:SI 2 "register_operand" "r"))))] + "" + "mnegl\\t%0, %w1, %w2" +- [(set_attr "v8type" "mull") +- (set_attr "mode" "DI")] ++ [(set_attr "type" "mull")] + ) + + (define_insn "muldi3_highpart" +@@ -2069,8 +2033,7 @@ + (const_int 64))))] + "" + "mulh\\t%0, %1, %2" +- [(set_attr "v8type" "mulh") +- (set_attr "mode" "DI")] ++ [(set_attr "type" "mull")] + ) + + (define_insn "div3" +@@ -2079,8 +2042,7 @@ + (match_operand:GPI 2 "register_operand" "r")))] + "" + "div\\t%0, %1, %2" +- [(set_attr "v8type" "div") +- (set_attr "mode" "")] ++ [(set_attr "type" "div")] + ) + + ;; zero_extend version of above +@@ -2091,8 +2053,7 @@ + (match_operand:SI 2 "register_operand" "r"))))] + "" + "div\\t%w0, %w1, %w2" +- [(set_attr "v8type" "div") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "div")] + ) + + ;; ------------------------------------------------------------------- +@@ -2101,14 +2062,14 @@ + + (define_insn "*cmp" + [(set (reg:CC CC_REGNUM) +- (compare:CC (match_operand:GPI 0 "register_operand" "r,r") +- (match_operand:GPI 1 "aarch64_plus_operand" "rI,J")))] ++ (compare:CC (match_operand:GPI 0 "register_operand" "r,r,r") ++ (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))] + "" + "@ + cmp\\t%0, %1 ++ cmp\\t%0, %1 + cmn\\t%0, #%n1" +- [(set_attr "v8type" "alus") +- (set_attr "mode" "")] ++ [(set_attr "type" "alus_reg,alus_imm,alus_imm")] + ) + + (define_insn "*cmp" +@@ -2119,8 +2080,7 @@ + "@ + fcmp\\t%0, #0.0 + fcmp\\t%0, %1" +- [(set_attr "v8type" "fcmp") +- (set_attr "mode" "")] ++ [(set_attr "type" "fcmp")] + ) + + (define_insn "*cmpe" +@@ -2131,8 +2091,7 @@ + "@ + fcmpe\\t%0, #0.0 + fcmpe\\t%0, %1" +- [(set_attr "v8type" "fcmp") +- (set_attr "mode" "")] ++ [(set_attr "type" "fcmp")] + ) + + (define_insn "*cmp_swp__reg" +@@ -2143,8 +2102,7 @@ + (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ")))] + "" + "cmp\\t%2, %0, %1" +- [(set_attr "v8type" "alus_shift") +- (set_attr "mode" "")] ++ [(set_attr "type" "alus_shift_imm")] + ) + + (define_insn "*cmp_swp__reg" +@@ -2154,10 +2112,20 @@ + (match_operand:GPI 1 "register_operand" "r")))] + "" + "cmp\\t%1, %0, xt" +- [(set_attr "v8type" "alus_ext") +- (set_attr "mode" "")] ++ [(set_attr "type" "alus_ext")] + ) + ++(define_insn "*cmp_swp__shft_" ++ [(set (reg:CC_SWP CC_REGNUM) ++ (compare:CC_SWP (ashift:GPI ++ (ANY_EXTEND:GPI ++ (match_operand:ALLX 0 "register_operand" "r")) ++ (match_operand 1 "aarch64_imm3" "Ui3")) ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "cmp\\t%2, %0, xt %1" ++ [(set_attr "type" "alus_ext")] ++) + + ;; ------------------------------------------------------------------- + ;; Store-flag and conditional select insns +@@ -2195,8 +2163,7 @@ + [(match_operand 2 "cc_register" "") (const_int 0)]))] + "" + "cset\\t%0, %m1" +- [(set_attr "v8type" "csel") +- (set_attr "mode" "")] ++ [(set_attr "type" "csel")] + ) + + ;; zero_extend version of the above +@@ -2207,8 +2174,7 @@ + [(match_operand 2 "cc_register" "") (const_int 0)])))] + "" + "cset\\t%w0, %m1" +- [(set_attr "v8type" "csel") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "csel")] + ) + + (define_insn "cstore_neg" +@@ -2217,8 +2183,7 @@ + [(match_operand 2 "cc_register" "") (const_int 0)])))] + "" + "csetm\\t%0, %m1" +- [(set_attr "v8type" "csel") +- (set_attr "mode" "")] ++ [(set_attr "type" "csel")] + ) + + ;; zero_extend version of the above +@@ -2229,8 +2194,7 @@ + [(match_operand 2 "cc_register" "") (const_int 0)]))))] + "" + "csetm\\t%w0, %m1" +- [(set_attr "v8type" "csel") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "csel")] + ) + + (define_expand "cmov6" +@@ -2283,8 +2247,7 @@ + csinc\\t%0, %4, zr, %M1 + mov\\t%0, -1 + mov\\t%0, 1" +- [(set_attr "v8type" "csel") +- (set_attr "mode" "")] ++ [(set_attr "type" "csel")] + ) + + ;; zero_extend version of above +@@ -2307,8 +2270,7 @@ + csinc\\t%w0, %w4, wzr, %M1 + mov\\t%w0, -1 + mov\\t%w0, 1" +- [(set_attr "v8type" "csel") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "csel")] + ) + + (define_insn "*cmov_insn" +@@ -2320,8 +2282,7 @@ + (match_operand:GPF 4 "register_operand" "w")))] + "TARGET_FLOAT" + "fcsel\\t%0, %3, %4, %m1" +- [(set_attr "v8type" "fcsel") +- (set_attr "mode" "")] ++ [(set_attr "type" "fcsel")] + ) + + (define_expand "movcc" +@@ -2369,8 +2330,8 @@ + (match_operand:GPI 1 "register_operand" "r")))] + "" + "csinc\\t%0, %1, %1, %M2" +- [(set_attr "v8type" "csel") +- (set_attr "mode" "")]) ++ [(set_attr "type" "csel")] ++) + + (define_insn "csinc3_insn" + [(set (match_operand:GPI 0 "register_operand" "=r") +@@ -2382,8 +2343,7 @@ + (match_operand:GPI 4 "aarch64_reg_or_zero" "rZ")))] + "" + "csinc\\t%0, %4, %3, %M1" +- [(set_attr "v8type" "csel") +- (set_attr "mode" "")] ++ [(set_attr "type" "csel")] + ) + + (define_insn "*csinv3_insn" +@@ -2395,8 +2355,8 @@ + (match_operand:GPI 4 "aarch64_reg_or_zero" "rZ")))] + "" + "csinv\\t%0, %4, %3, %M1" +- [(set_attr "v8type" "csel") +- (set_attr "mode" "")]) ++ [(set_attr "type" "csel")] ++) + + (define_insn "*csneg3_insn" + [(set (match_operand:GPI 0 "register_operand" "=r") +@@ -2407,8 +2367,8 @@ + (match_operand:GPI 4 "aarch64_reg_or_zero" "rZ")))] + "" + "csneg\\t%0, %4, %3, %M1" +- [(set_attr "v8type" "csel") +- (set_attr "mode" "")]) ++ [(set_attr "type" "csel")] ++) + + ;; ------------------------------------------------------------------- + ;; Logical operations +@@ -2420,8 +2380,8 @@ + (match_operand:GPI 2 "aarch64_logical_operand" "r,")))] + "" + "\\t%0, %1, %2" +- [(set_attr "v8type" "logic,logic_imm") +- (set_attr "mode" "")]) ++ [(set_attr "type" "logic_reg,logic_imm")] ++) + + ;; zero_extend version of above + (define_insn "*si3_uxtw" +@@ -2431,9 +2391,68 @@ + (match_operand:SI 2 "aarch64_logical_operand" "r,K"))))] + "" + "\\t%w0, %w1, %w2" +- [(set_attr "v8type" "logic,logic_imm") +- (set_attr "mode" "SI")]) ++ [(set_attr "type" "logic_reg,logic_imm")] ++) + ++(define_insn "*and3_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (and:GPI (match_operand:GPI 1 "register_operand" "%r,r") ++ (match_operand:GPI 2 "aarch64_logical_operand" "r,")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r,r") ++ (and:GPI (match_dup 1) (match_dup 2)))] ++ "" ++ "ands\\t%0, %1, %2" ++ [(set_attr "type" "logics_reg,logics_imm")] ++) ++ ++;; zero_extend version of above ++(define_insn "*andsi3_compare0_uxtw" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (and:SI (match_operand:SI 1 "register_operand" "%r,r") ++ (match_operand:SI 2 "aarch64_logical_operand" "r,K")) ++ (const_int 0))) ++ (set (match_operand:DI 0 "register_operand" "=r,r") ++ (zero_extend:DI (and:SI (match_dup 1) (match_dup 2))))] ++ "" ++ "ands\\t%w0, %w1, %w2" ++ [(set_attr "type" "logics_reg,logics_imm")] ++) ++ ++(define_insn "*and_3_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (and:GPI (SHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n")) ++ (match_operand:GPI 3 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (and:GPI (SHIFT:GPI (match_dup 1) (match_dup 2)) (match_dup 3)))] ++ "" ++ "ands\\t%0, %3, %1, %2" ++ [(set_attr "type" "logics_shift_imm")] ++) ++ ++;; zero_extend version of above ++(define_insn "*and_si3_compare0_uxtw" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (and:SI (SHIFT:SI ++ (match_operand:SI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_si" "n")) ++ (match_operand:SI 3 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI (and:SI (SHIFT:SI (match_dup 1) (match_dup 2)) ++ (match_dup 3))))] ++ "" ++ "ands\\t%w0, %w3, %w1, %2" ++ [(set_attr "type" "logics_shift_imm")] ++) ++ + (define_insn "*_3" + [(set (match_operand:GPI 0 "register_operand" "=r") + (LOGICAL:GPI (SHIFT:GPI +@@ -2442,8 +2461,8 @@ + (match_operand:GPI 3 "register_operand" "r")))] + "" + "\\t%0, %3, %1, %2" +- [(set_attr "v8type" "logic_shift") +- (set_attr "mode" "")]) ++ [(set_attr "type" "logic_shift_imm")] ++) + + ;; zero_extend version of above + (define_insn "*_si3_uxtw" +@@ -2455,8 +2474,8 @@ + (match_operand:SI 3 "register_operand" "r"))))] + "" + "\\t%w0, %w3, %w1, %2" +- [(set_attr "v8type" "logic_shift") +- (set_attr "mode" "SI")]) ++ [(set_attr "type" "logic_shift_imm")] ++) + + (define_insn "one_cmpl2" + [(set (match_operand:GPI 0 "register_operand" "=r") +@@ -2463,8 +2482,8 @@ + (not:GPI (match_operand:GPI 1 "register_operand" "r")))] + "" + "mvn\\t%0, %1" +- [(set_attr "v8type" "logic") +- (set_attr "mode" "")]) ++ [(set_attr "type" "logic_reg")] ++) + + (define_insn "*one_cmpl_2" + [(set (match_operand:GPI 0 "register_operand" "=r") +@@ -2472,8 +2491,8 @@ + (match_operand:QI 2 "aarch64_shift_imm_" "n"))))] + "" + "mvn\\t%0, %1, %2" +- [(set_attr "v8type" "logic_shift") +- (set_attr "mode" "")]) ++ [(set_attr "type" "logic_shift_imm")] ++) + + (define_insn "*_one_cmpl3" + [(set (match_operand:GPI 0 "register_operand" "=r") +@@ -2482,9 +2501,38 @@ + (match_operand:GPI 2 "register_operand" "r")))] + "" + "\\t%0, %2, %1" +- [(set_attr "v8type" "logic") +- (set_attr "mode" "")]) ++ [(set_attr "type" "logic_reg")] ++) + ++(define_insn "*and_one_cmpl3_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (and:GPI (not:GPI ++ (match_operand:GPI 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (and:GPI (not:GPI (match_dup 1)) (match_dup 2)))] ++ "" ++ "bics\\t%0, %2, %1" ++ [(set_attr "type" "logics_reg")] ++) ++ ++;; zero_extend version of above ++(define_insn "*and_one_cmplsi3_compare0_uxtw" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (and:SI (not:SI ++ (match_operand:SI 1 "register_operand" "r")) ++ (match_operand:SI 2 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI (and:SI (not:SI (match_dup 1)) (match_dup 2))))] ++ "" ++ "bics\\t%w0, %w2, %w1" ++ [(set_attr "type" "logics_reg")] ++) ++ + (define_insn "*_one_cmpl_3" + [(set (match_operand:GPI 0 "register_operand" "=r") + (LOGICAL:GPI (not:GPI +@@ -2494,16 +2542,53 @@ + (match_operand:GPI 3 "register_operand" "r")))] + "" + "\\t%0, %3, %1, %2" +- [(set_attr "v8type" "logic_shift") +- (set_attr "mode" "")]) ++ [(set_attr "type" "logics_shift_imm")] ++) + ++(define_insn "*and_one_cmpl_3_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (and:GPI (not:GPI ++ (SHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n"))) ++ (match_operand:GPI 3 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (and:GPI (not:GPI ++ (SHIFT:GPI ++ (match_dup 1) (match_dup 2))) (match_dup 3)))] ++ "" ++ "bics\\t%0, %3, %1, %2" ++ [(set_attr "type" "logics_shift_imm")] ++) ++ ++;; zero_extend version of above ++(define_insn "*and_one_cmpl_si3_compare0_uxtw" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (and:SI (not:SI ++ (SHIFT:SI ++ (match_operand:SI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_si" "n"))) ++ (match_operand:SI 3 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI (and:SI ++ (not:SI ++ (SHIFT:SI (match_dup 1) (match_dup 2))) (match_dup 3))))] ++ "" ++ "bics\\t%w0, %w3, %w1, %2" ++ [(set_attr "type" "logics_shift_imm")] ++) ++ + (define_insn "clz2" + [(set (match_operand:GPI 0 "register_operand" "=r") + (clz:GPI (match_operand:GPI 1 "register_operand" "r")))] + "" + "clz\\t%0, %1" +- [(set_attr "v8type" "clz") +- (set_attr "mode" "")]) ++ [(set_attr "type" "clz")] ++) + + (define_expand "ffs2" + [(match_operand:GPI 0 "register_operand") +@@ -2525,8 +2610,8 @@ + (unspec:GPI [(match_operand:GPI 1 "register_operand" "r")] UNSPEC_CLS))] + "" + "cls\\t%0, %1" +- [(set_attr "v8type" "clz") +- (set_attr "mode" "")]) ++ [(set_attr "type" "clz")] ++) + + (define_insn "rbit2" + [(set (match_operand:GPI 0 "register_operand" "=r") +@@ -2533,8 +2618,8 @@ + (unspec:GPI [(match_operand:GPI 1 "register_operand" "r")] UNSPEC_RBIT))] + "" + "rbit\\t%0, %1" +- [(set_attr "v8type" "rbit") +- (set_attr "mode" "")]) ++ [(set_attr "type" "rbit")] ++) + + (define_expand "ctz2" + [(match_operand:GPI 0 "register_operand") +@@ -2555,8 +2640,8 @@ + (const_int 0)))] + "" + "tst\\t%0, %1" +- [(set_attr "v8type" "logics") +- (set_attr "mode" "")]) ++ [(set_attr "type" "logics_reg")] ++) + + (define_insn "*and_3nr_compare0" + [(set (reg:CC_NZ CC_REGNUM) +@@ -2568,8 +2653,8 @@ + (const_int 0)))] + "" + "tst\\t%2, %0, %1" +- [(set_attr "v8type" "logics_shift") +- (set_attr "mode" "")]) ++ [(set_attr "type" "logics_shift_imm")] ++) + + ;; ------------------------------------------------------------------- + ;; Shifts +@@ -2667,8 +2752,7 @@ + (match_operand:QI 2 "aarch64_reg_or_shift_imm_" "rUs")))] + "" + "\\t%0, %1, %2" +- [(set_attr "v8type" "shift") +- (set_attr "mode" "")] ++ [(set_attr "type" "shift_reg")] + ) + + ;; zero_extend version of above +@@ -2679,8 +2763,7 @@ + (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "rUss"))))] + "" + "\\t%w0, %w1, %w2" +- [(set_attr "v8type" "shift") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "shift_reg")] + ) + + (define_insn "*3_insn" +@@ -2692,10 +2775,61 @@ + operands[3] = GEN_INT ( - UINTVAL (operands[2])); + return "\t%w0, %w1, %2, %3"; + } +- [(set_attr "v8type" "bfm") +- (set_attr "mode" "")] ++ [(set_attr "type" "bfm")] + ) + ++(define_insn "*extr5_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (ior:GPI (ashift:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 3 "const_int_operand" "n")) ++ (lshiftrt:GPI (match_operand:GPI 2 "register_operand" "r") ++ (match_operand 4 "const_int_operand" "n"))))] ++ "UINTVAL (operands[3]) < GET_MODE_BITSIZE (mode) && ++ (UINTVAL (operands[3]) + UINTVAL (operands[4]) == GET_MODE_BITSIZE (mode))" ++ "extr\\t%0, %1, %2, %4" ++ [(set_attr "type" "shift_imm")] ++) ++ ++;; zero_extend version of the above ++(define_insn "*extrsi5_insn_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand 3 "const_int_operand" "n")) ++ (lshiftrt:SI (match_operand:SI 2 "register_operand" "r") ++ (match_operand 4 "const_int_operand" "n")))))] ++ "UINTVAL (operands[3]) < 32 && ++ (UINTVAL (operands[3]) + UINTVAL (operands[4]) == 32)" ++ "extr\\t%w0, %w1, %w2, %4" ++ [(set_attr "type" "shift_imm")] ++) ++ ++(define_insn "*ror3_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (rotate:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n")))] ++ "UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode)" ++{ ++ operands[3] = GEN_INT ( - UINTVAL (operands[2])); ++ return "ror\\t%0, %1, %3"; ++} ++ [(set_attr "type" "shift_imm")] ++) ++ ++;; zero_extend version of the above ++(define_insn "*rorsi3_insn_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (rotate:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n"))))] ++ "UINTVAL (operands[2]) < 32" ++{ ++ operands[3] = GEN_INT (32 - UINTVAL (operands[2])); ++ return "ror\\t%w0, %w1, %3"; ++} ++ [(set_attr "type" "shift_imm")] ++) ++ + (define_insn "*_ashl" + [(set (match_operand:GPI 0 "register_operand" "=r") + (ANY_EXTEND:GPI +@@ -2706,8 +2840,7 @@ + operands[3] = GEN_INT ( - UINTVAL (operands[2])); + return "bfiz\t%0, %1, %2, %3"; + } +- [(set_attr "v8type" "bfm") +- (set_attr "mode" "")] ++ [(set_attr "type" "bfm")] + ) + + (define_insn "*zero_extend_lshr" +@@ -2720,8 +2853,7 @@ + operands[3] = GEN_INT ( - UINTVAL (operands[2])); + return "ubfx\t%0, %1, %2, %3"; + } +- [(set_attr "v8type" "bfm") +- (set_attr "mode" "")] ++ [(set_attr "type" "bfm")] + ) + + (define_insn "*extend_ashr" +@@ -2734,8 +2866,7 @@ + operands[3] = GEN_INT ( - UINTVAL (operands[2])); + return "sbfx\\t%0, %1, %2, %3"; + } +- [(set_attr "v8type" "bfm") +- (set_attr "mode" "")] ++ [(set_attr "type" "bfm")] + ) + + ;; ------------------------------------------------------------------- +@@ -2758,10 +2889,66 @@ + (match_operand 3 "const_int_operand" "n")))] + "" + "bfx\\t%0, %1, %3, %2" +- [(set_attr "v8type" "bfm") +- (set_attr "mode" "")] ++ [(set_attr "type" "bfm")] + ) + ++;; Bitfield Insert (insv) ++(define_expand "insv" ++ [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand") ++ (match_operand 1 "const_int_operand") ++ (match_operand 2 "const_int_operand")) ++ (match_operand:GPI 3 "general_operand"))] ++ "" ++{ ++ unsigned HOST_WIDE_INT width = UINTVAL (operands[1]); ++ unsigned HOST_WIDE_INT pos = UINTVAL (operands[2]); ++ rtx value = operands[3]; ++ ++ if (width == 0 || (pos + width) > GET_MODE_BITSIZE (mode)) ++ FAIL; ++ ++ if (CONST_INT_P (value)) ++ { ++ unsigned HOST_WIDE_INT mask = ((unsigned HOST_WIDE_INT)1 << width) - 1; ++ ++ /* Prefer AND/OR for inserting all zeros or all ones. */ ++ if ((UINTVAL (value) & mask) == 0 ++ || (UINTVAL (value) & mask) == mask) ++ FAIL; ++ ++ /* 16-bit aligned 16-bit wide insert is handled by insv_imm. */ ++ if (width == 16 && (pos % 16) == 0) ++ DONE; ++ } ++ operands[3] = force_reg (mode, value); ++}) ++ ++(define_insn "*insv_reg" ++ [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r") ++ (match_operand 1 "const_int_operand" "n") ++ (match_operand 2 "const_int_operand" "n")) ++ (match_operand:GPI 3 "register_operand" "r"))] ++ "!(UINTVAL (operands[1]) == 0 ++ || (UINTVAL (operands[2]) + UINTVAL (operands[1]) ++ > GET_MODE_BITSIZE (mode)))" ++ "bfi\\t%0, %3, %2, %1" ++ [(set_attr "type" "bfm")] ++) ++ ++(define_insn "*extr_insv_lower_reg" ++ [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r") ++ (match_operand 1 "const_int_operand" "n") ++ (const_int 0)) ++ (zero_extract:GPI (match_operand:GPI 2 "register_operand" "+r") ++ (match_dup 1) ++ (match_operand 3 "const_int_operand" "n")))] ++ "!(UINTVAL (operands[1]) == 0 ++ || (UINTVAL (operands[3]) + UINTVAL (operands[1]) ++ > GET_MODE_BITSIZE (mode)))" ++ "bfxil\\t%0, %2, %3, %1" ++ [(set_attr "type" "bfm")] ++) ++ + (define_insn "*_shft_" + [(set (match_operand:GPI 0 "register_operand" "=r") + (ashift:GPI (ANY_EXTEND:GPI +@@ -2774,8 +2961,7 @@ + : GEN_INT ( - UINTVAL (operands[2])); + return "bfiz\t%0, %1, %2, %3"; + } +- [(set_attr "v8type" "bfm") +- (set_attr "mode" "")] ++ [(set_attr "type" "bfm")] + ) + + ;; XXX We should match (any_extend (ashift)) here, like (and (ashift)) below +@@ -2788,8 +2974,7 @@ + "exact_log2 ((INTVAL (operands[3]) >> INTVAL (operands[2])) + 1) >= 0 + && (INTVAL (operands[3]) & ((1 << INTVAL (operands[2])) - 1)) == 0" + "ubfiz\\t%0, %1, %2, %P3" +- [(set_attr "v8type" "bfm") +- (set_attr "mode" "")] ++ [(set_attr "type" "bfm")] + ) + + (define_insn "bswap2" +@@ -2797,8 +2982,7 @@ + (bswap:GPI (match_operand:GPI 1 "register_operand" "r")))] + "" + "rev\\t%0, %1" +- [(set_attr "v8type" "rev") +- (set_attr "mode" "")] ++ [(set_attr "type" "rev")] + ) + + (define_insn "bswaphi2" +@@ -2806,8 +2990,7 @@ + (bswap:HI (match_operand:HI 1 "register_operand" "r")))] + "" + "rev16\\t%w0, %w1" +- [(set_attr "v8type" "rev") +- (set_attr "mode" "HI")] ++ [(set_attr "type" "rev")] + ) + + ;; zero_extend version of above +@@ -2816,8 +2999,7 @@ + (zero_extend:DI (bswap:SI (match_operand:SI 1 "register_operand" "r"))))] + "" + "rev\\t%w0, %w1" +- [(set_attr "v8type" "rev") +- (set_attr "mode" "SI")] ++ [(set_attr "type" "rev")] + ) + + ;; ------------------------------------------------------------------- +@@ -2833,8 +3015,7 @@ + FRINT))] + "TARGET_FLOAT" + "frint\\t%0, %1" +- [(set_attr "v8type" "frint") +- (set_attr "mode" "")] ++ [(set_attr "type" "f_rint")] + ) + + ;; frcvt floating-point round to integer and convert standard patterns. +@@ -2845,9 +3026,7 @@ + FCVT)))] + "TARGET_FLOAT" + "fcvt\\t%0, %1" +- [(set_attr "v8type" "fcvtf2i") +- (set_attr "mode" "") +- (set_attr "mode2" "")] ++ [(set_attr "type" "f_cvtf2i")] + ) + + ;; fma - no throw +@@ -2859,8 +3038,7 @@ + (match_operand:GPF 3 "register_operand" "w")))] + "TARGET_FLOAT" + "fmadd\\t%0, %1, %2, %3" +- [(set_attr "v8type" "fmadd") +- (set_attr "mode" "")] ++ [(set_attr "type" "fmac")] + ) + + (define_insn "fnma4" +@@ -2870,8 +3048,7 @@ + (match_operand:GPF 3 "register_operand" "w")))] + "TARGET_FLOAT" + "fmsub\\t%0, %1, %2, %3" +- [(set_attr "v8type" "fmadd") +- (set_attr "mode" "")] ++ [(set_attr "type" "fmac")] + ) + + (define_insn "fms4" +@@ -2881,8 +3058,7 @@ + (neg:GPF (match_operand:GPF 3 "register_operand" "w"))))] + "TARGET_FLOAT" + "fnmsub\\t%0, %1, %2, %3" +- [(set_attr "v8type" "fmadd") +- (set_attr "mode" "")] ++ [(set_attr "type" "fmac")] + ) + + (define_insn "fnms4" +@@ -2892,8 +3068,7 @@ + (neg:GPF (match_operand:GPF 3 "register_operand" "w"))))] + "TARGET_FLOAT" + "fnmadd\\t%0, %1, %2, %3" +- [(set_attr "v8type" "fmadd") +- (set_attr "mode" "")] ++ [(set_attr "type" "fmac")] + ) + + ;; If signed zeros are ignored, -(a * b + c) = -a * b - c. +@@ -2904,8 +3079,7 @@ + (match_operand:GPF 3 "register_operand" "w"))))] + "!HONOR_SIGNED_ZEROS (mode) && TARGET_FLOAT" + "fnmadd\\t%0, %1, %2, %3" +- [(set_attr "v8type" "fmadd") +- (set_attr "mode" "")] ++ [(set_attr "type" "fmac")] + ) + + ;; ------------------------------------------------------------------- +@@ -2917,9 +3091,7 @@ + (float_extend:DF (match_operand:SF 1 "register_operand" "w")))] + "TARGET_FLOAT" + "fcvt\\t%d0, %s1" +- [(set_attr "v8type" "fcvt") +- (set_attr "mode" "DF") +- (set_attr "mode2" "SF")] ++ [(set_attr "type" "f_cvt")] + ) + + (define_insn "truncdfsf2" +@@ -2927,9 +3099,7 @@ + (float_truncate:SF (match_operand:DF 1 "register_operand" "w")))] + "TARGET_FLOAT" + "fcvt\\t%s0, %d1" +- [(set_attr "v8type" "fcvt") +- (set_attr "mode" "SF") +- (set_attr "mode2" "DF")] ++ [(set_attr "type" "f_cvt")] + ) + + (define_insn "fix_trunc2" +@@ -2937,9 +3107,7 @@ + (fix:GPI (match_operand:GPF 1 "register_operand" "w")))] + "TARGET_FLOAT" + "fcvtzs\\t%0, %1" +- [(set_attr "v8type" "fcvtf2i") +- (set_attr "mode" "") +- (set_attr "mode2" "")] ++ [(set_attr "type" "f_cvtf2i")] + ) + + (define_insn "fixuns_trunc2" +@@ -2947,9 +3115,7 @@ + (unsigned_fix:GPI (match_operand:GPF 1 "register_operand" "w")))] + "TARGET_FLOAT" + "fcvtzu\\t%0, %1" +- [(set_attr "v8type" "fcvtf2i") +- (set_attr "mode" "") +- (set_attr "mode2" "")] ++ [(set_attr "type" "f_cvtf2i")] + ) + + (define_insn "float2" +@@ -2957,9 +3123,7 @@ + (float:GPF (match_operand:GPI 1 "register_operand" "r")))] + "TARGET_FLOAT" + "scvtf\\t%0, %1" +- [(set_attr "v8type" "fcvti2f") +- (set_attr "mode" "") +- (set_attr "mode2" "")] ++ [(set_attr "type" "f_cvti2f")] + ) + + (define_insn "floatuns2" +@@ -2967,9 +3131,7 @@ + (unsigned_float:GPF (match_operand:GPI 1 "register_operand" "r")))] + "TARGET_FLOAT" + "ucvtf\\t%0, %1" +- [(set_attr "v8type" "fcvt") +- (set_attr "mode" "") +- (set_attr "mode2" "")] ++ [(set_attr "type" "f_cvt")] + ) + + ;; ------------------------------------------------------------------- +@@ -2983,8 +3145,7 @@ + (match_operand:GPF 2 "register_operand" "w")))] + "TARGET_FLOAT" + "fadd\\t%0, %1, %2" +- [(set_attr "v8type" "fadd") +- (set_attr "mode" "")] ++ [(set_attr "type" "fadd")] + ) + + (define_insn "sub3" +@@ -2994,8 +3155,7 @@ + (match_operand:GPF 2 "register_operand" "w")))] + "TARGET_FLOAT" + "fsub\\t%0, %1, %2" +- [(set_attr "v8type" "fadd") +- (set_attr "mode" "")] ++ [(set_attr "type" "fadd")] + ) + + (define_insn "mul3" +@@ -3005,8 +3165,7 @@ + (match_operand:GPF 2 "register_operand" "w")))] + "TARGET_FLOAT" + "fmul\\t%0, %1, %2" +- [(set_attr "v8type" "fmul") +- (set_attr "mode" "")] ++ [(set_attr "type" "fmul")] + ) + + (define_insn "*fnmul3" +@@ -3016,8 +3175,7 @@ + (match_operand:GPF 2 "register_operand" "w")))] + "TARGET_FLOAT" + "fnmul\\t%0, %1, %2" +- [(set_attr "v8type" "fmul") +- (set_attr "mode" "")] ++ [(set_attr "type" "fmul")] + ) + + (define_insn "div3" +@@ -3027,8 +3185,7 @@ + (match_operand:GPF 2 "register_operand" "w")))] + "TARGET_FLOAT" + "fdiv\\t%0, %1, %2" +- [(set_attr "v8type" "fdiv") +- (set_attr "mode" "")] ++ [(set_attr "type" "fdiv")] + ) + + (define_insn "neg2" +@@ -3036,8 +3193,7 @@ + (neg:GPF (match_operand:GPF 1 "register_operand" "w")))] + "TARGET_FLOAT" + "fneg\\t%0, %1" +- [(set_attr "v8type" "ffarith") +- (set_attr "mode" "")] ++ [(set_attr "type" "ffarith")] + ) + + (define_insn "sqrt2" +@@ -3045,8 +3201,7 @@ + (sqrt:GPF (match_operand:GPF 1 "register_operand" "w")))] + "TARGET_FLOAT" + "fsqrt\\t%0, %1" +- [(set_attr "v8type" "fsqrt") +- (set_attr "mode" "")] ++ [(set_attr "type" "fsqrt")] + ) + + (define_insn "abs2" +@@ -3054,8 +3209,7 @@ + (abs:GPF (match_operand:GPF 1 "register_operand" "w")))] + "TARGET_FLOAT" + "fabs\\t%0, %1" +- [(set_attr "v8type" "ffarith") +- (set_attr "mode" "")] ++ [(set_attr "type" "ffarith")] + ) + + ;; Given that smax/smin do not specify the result when either input is NaN, +@@ -3068,8 +3222,7 @@ + (match_operand:GPF 2 "register_operand" "w")))] + "TARGET_FLOAT" + "fmaxnm\\t%0, %1, %2" +- [(set_attr "v8type" "fminmax") +- (set_attr "mode" "")] ++ [(set_attr "type" "f_minmax")] + ) + + (define_insn "smin3" +@@ -3078,8 +3231,7 @@ + (match_operand:GPF 2 "register_operand" "w")))] + "TARGET_FLOAT" + "fminnm\\t%0, %1, %2" +- [(set_attr "v8type" "fminmax") +- (set_attr "mode" "")] ++ [(set_attr "type" "f_minmax")] + ) + + ;; ------------------------------------------------------------------- +@@ -3138,48 +3290,42 @@ + ;; after or during reload as we don't want these patterns to start + ;; kicking in during the combiner. + +-(define_insn "aarch64_movdi_tilow" ++(define_insn "aarch64_movdi_low" + [(set (match_operand:DI 0 "register_operand" "=r") +- (truncate:DI (match_operand:TI 1 "register_operand" "w")))] ++ (truncate:DI (match_operand:TX 1 "register_operand" "w")))] + "reload_completed || reload_in_progress" + "fmov\\t%x0, %d1" +- [(set_attr "v8type" "fmovf2i") +- (set_attr "mode" "DI") ++ [(set_attr "type" "f_mrc") + (set_attr "length" "4") + ]) + +-(define_insn "aarch64_movdi_tihigh" ++(define_insn "aarch64_movdi_high" + [(set (match_operand:DI 0 "register_operand" "=r") + (truncate:DI +- (lshiftrt:TI (match_operand:TI 1 "register_operand" "w") ++ (lshiftrt:TX (match_operand:TX 1 "register_operand" "w") + (const_int 64))))] + "reload_completed || reload_in_progress" + "fmov\\t%x0, %1.d[1]" +- [(set_attr "v8type" "fmovf2i") +- (set_attr "mode" "DI") ++ [(set_attr "type" "f_mrc") + (set_attr "length" "4") + ]) + +-(define_insn "aarch64_movtihigh_di" +- [(set (zero_extract:TI (match_operand:TI 0 "register_operand" "+w") ++(define_insn "aarch64_movhigh_di" ++ [(set (zero_extract:TX (match_operand:TX 0 "register_operand" "+w") + (const_int 64) (const_int 64)) +- (zero_extend:TI (match_operand:DI 1 "register_operand" "r")))] ++ (zero_extend:TX (match_operand:DI 1 "register_operand" "r")))] + "reload_completed || reload_in_progress" + "fmov\\t%0.d[1], %x1" +- +- [(set_attr "v8type" "fmovi2f") +- (set_attr "mode" "DI") ++ [(set_attr "type" "f_mcr") + (set_attr "length" "4") + ]) + +-(define_insn "aarch64_movtilow_di" +- [(set (match_operand:TI 0 "register_operand" "=w") +- (zero_extend:TI (match_operand:DI 1 "register_operand" "r")))] ++(define_insn "aarch64_movlow_di" ++ [(set (match_operand:TX 0 "register_operand" "=w") ++ (zero_extend:TX (match_operand:DI 1 "register_operand" "r")))] + "reload_completed || reload_in_progress" + "fmov\\t%d0, %x1" +- +- [(set_attr "v8type" "fmovi2f") +- (set_attr "mode" "DI") ++ [(set_attr "type" "f_mcr") + (set_attr "length" "4") + ]) + +@@ -3189,9 +3335,7 @@ + (truncate:DI (match_operand:TI 1 "register_operand" "w"))))] + "reload_completed || reload_in_progress" + "fmov\\t%d0, %d1" +- +- [(set_attr "v8type" "fmovi2f") +- (set_attr "mode" "DI") ++ [(set_attr "type" "f_mcr") + (set_attr "length" "4") + ]) + +@@ -3206,9 +3350,7 @@ + (match_operand 2 "aarch64_valid_symref" "S")))] + "" + "add\\t%0, %1, :lo12:%a2" +- [(set_attr "v8type" "alu") +- (set_attr "mode" "DI")] +- ++ [(set_attr "type" "alu_reg")] + ) + + (define_insn "ldr_got_small" +@@ -3219,17 +3361,24 @@ + UNSPEC_GOTSMALLPIC))] + "" + "ldr\\t%0, [%1, #:got_lo12:%a2]" +- [(set_attr "v8type" "load1") +- (set_attr "mode" "DI")] ++ [(set_attr "type" "load1")] + ) + ++(define_insn "ldr_got_tiny" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "S")] ++ UNSPEC_GOTTINYPIC))] ++ "" ++ "ldr\\t%0, %L1" ++ [(set_attr "type" "load1")] ++) ++ + (define_insn "aarch64_load_tp_hard" + [(set (match_operand:DI 0 "register_operand" "=r") + (unspec:DI [(const_int 0)] UNSPEC_TLS))] + "" + "mrs\\t%0, tpidr_el0" +- [(set_attr "v8type" "mrs") +- (set_attr "mode" "DI")] ++ [(set_attr "type" "mrs")] + ) + + ;; The TLS ABI specifically requires that the compiler does not schedule +@@ -3253,7 +3402,7 @@ + ] + "" + "adrp\\tx0, %A1\;add\\tx0, x0, %L1\;bl\\t%2\;nop" +- [(set_attr "v8type" "call") ++ [(set_attr "type" "call") + (set_attr "length" "16")]) + + (define_insn "tlsie_small" +@@ -3262,8 +3411,7 @@ + UNSPEC_GOTSMALLTLS))] + "" + "adrp\\t%0, %A1\;ldr\\t%0, [%0, #%L1]" +- [(set_attr "v8type" "load1") +- (set_attr "mode" "DI") ++ [(set_attr "type" "load1") + (set_attr "length" "8")] + ) + +@@ -3274,8 +3422,7 @@ + UNSPEC_GOTSMALLTLS))] + "" + "add\\t%0, %1, #%G2\;add\\t%0, %0, #%L2" +- [(set_attr "v8type" "alu") +- (set_attr "mode" "DI") ++ [(set_attr "type" "alu_reg") + (set_attr "length" "8")] + ) + +@@ -3288,7 +3435,7 @@ + (clobber (match_scratch:DI 1 "=r"))] + "TARGET_TLS_DESC" + "adrp\\tx0, %A0\;ldr\\t%1, [x0, #%L0]\;add\\tx0, x0, %L0\;.tlsdesccall\\t%0\;blr\\t%1" +- [(set_attr "v8type" "call") ++ [(set_attr "type" "call") + (set_attr "length" "16")]) + + (define_insn "stack_tie" +--- a/src/gcc/config/aarch64/aarch64-arches.def ++++ b/src/gcc/config/aarch64/aarch64-arches.def +@@ -26,4 +26,4 @@ + this architecture. ARCH is the architecture revision. FLAGS are + the flags implied by the architecture. */ + +-AARCH64_ARCH("armv8-a", generic, 8, AARCH64_FL_FOR_ARCH8) ++AARCH64_ARCH("armv8-a", cortexa53, 8, AARCH64_FL_FOR_ARCH8) +--- a/src/gcc/config/aarch64/aarch64-option-extensions.def ++++ b/src/gcc/config/aarch64/aarch64-option-extensions.def +@@ -35,3 +35,4 @@ + AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, AARCH64_FL_FPSIMD | AARCH64_FL_CRYPTO) + AARCH64_OPT_EXTENSION("simd", AARCH64_FL_FPSIMD, AARCH64_FL_SIMD | AARCH64_FL_CRYPTO) + AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO | AARCH64_FL_FPSIMD, AARCH64_FL_CRYPTO) ++AARCH64_OPT_EXTENSION("crc", AARCH64_FL_CRC, AARCH64_FL_CRC) +--- a/src/gcc/config/aarch64/t-aarch64 ++++ b/src/gcc/config/aarch64/t-aarch64 +@@ -34,3 +34,10 @@ + $(srcdir)/config/aarch64/aarch64-simd-builtins.def + $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ + $(srcdir)/config/aarch64/aarch64-builtins.c ++ ++aarch-common.o: $(srcdir)/config/arm/aarch-common.c $(CONFIG_H) $(SYSTEM_H) \ ++ coretypes.h $(TM_H) $(TM_P_H) $(RTL_H) $(TREE_H) output.h $(C_COMMON_H) ++ $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ ++ $(srcdir)/config/arm/aarch-common.c ++ ++ +--- a/src/gcc/config/aarch64/aarch64-modes.def ++++ b/src/gcc/config/aarch64/aarch64-modes.def +@@ -24,6 +24,7 @@ + CC_MODE (CC_ZESWP); /* zero-extend LHS (but swap to make it RHS). */ + CC_MODE (CC_SESWP); /* sign-extend LHS (but swap to make it RHS). */ + CC_MODE (CC_NZ); /* Only N and Z bits of condition flags are valid. */ ++CC_MODE (CC_Z); /* Only Z bit of condition flags is valid. */ + + /* Vector modes. */ + VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI. */ +--- a/src/gcc/config/aarch64/aarch64-cores.def ++++ b/src/gcc/config/aarch64/aarch64-cores.def +@@ -35,6 +35,4 @@ + therefore serves as a template for adding more CPUs in the future. */ + + AARCH64_CORE("cortex-a53", cortexa53, 8, AARCH64_FL_FPSIMD, generic) +-AARCH64_CORE("cortex-a57", cortexa57, 8, AARCH64_FL_FPSIMD, generic) +-AARCH64_CORE("example-1", large, 8, AARCH64_FL_FPSIMD, generic) +-AARCH64_CORE("example-2", small, 8, AARCH64_FL_FPSIMD, generic) ++AARCH64_CORE("cortex-a57", cortexa15, 8, AARCH64_FL_FPSIMD, generic) +--- a/src/gcc/config/aarch64/aarch64-builtins.c ++++ b/src/gcc/config/aarch64/aarch64-builtins.c +@@ -30,6 +30,7 @@ + #include "langhooks.h" + #include "diagnostic-core.h" + #include "optabs.h" ++#include "gimple.h" + + enum aarch64_simd_builtin_type_mode + { +@@ -50,6 +51,7 @@ + T_OI, + T_XI, + T_SI, ++ T_SF, + T_HI, + T_QI, + T_MAX +@@ -72,172 +74,251 @@ + #define oi_UP T_OI + #define xi_UP T_XI + #define si_UP T_SI ++#define sf_UP T_SF + #define hi_UP T_HI + #define qi_UP T_QI + + #define UP(X) X##_UP + +-typedef enum ++#define SIMD_MAX_BUILTIN_ARGS 5 ++ ++enum aarch64_type_qualifiers + { +- AARCH64_SIMD_BINOP, +- AARCH64_SIMD_TERNOP, +- AARCH64_SIMD_QUADOP, +- AARCH64_SIMD_UNOP, +- AARCH64_SIMD_GETLANE, +- AARCH64_SIMD_SETLANE, +- AARCH64_SIMD_CREATE, +- AARCH64_SIMD_DUP, +- AARCH64_SIMD_DUPLANE, +- AARCH64_SIMD_COMBINE, +- AARCH64_SIMD_SPLIT, +- AARCH64_SIMD_LANEMUL, +- AARCH64_SIMD_LANEMULL, +- AARCH64_SIMD_LANEMULH, +- AARCH64_SIMD_LANEMAC, +- AARCH64_SIMD_SCALARMUL, +- AARCH64_SIMD_SCALARMULL, +- AARCH64_SIMD_SCALARMULH, +- AARCH64_SIMD_SCALARMAC, +- AARCH64_SIMD_CONVERT, +- AARCH64_SIMD_FIXCONV, +- AARCH64_SIMD_SELECT, +- AARCH64_SIMD_RESULTPAIR, +- AARCH64_SIMD_REINTERP, +- AARCH64_SIMD_VTBL, +- AARCH64_SIMD_VTBX, +- AARCH64_SIMD_LOAD1, +- AARCH64_SIMD_LOAD1LANE, +- AARCH64_SIMD_STORE1, +- AARCH64_SIMD_STORE1LANE, +- AARCH64_SIMD_LOADSTRUCT, +- AARCH64_SIMD_LOADSTRUCTLANE, +- AARCH64_SIMD_STORESTRUCT, +- AARCH64_SIMD_STORESTRUCTLANE, +- AARCH64_SIMD_LOGICBINOP, +- AARCH64_SIMD_SHIFTINSERT, +- AARCH64_SIMD_SHIFTIMM, +- AARCH64_SIMD_SHIFTACC +-} aarch64_simd_itype; ++ /* T foo. */ ++ qualifier_none = 0x0, ++ /* unsigned T foo. */ ++ qualifier_unsigned = 0x1, /* 1 << 0 */ ++ /* const T foo. */ ++ qualifier_const = 0x2, /* 1 << 1 */ ++ /* T *foo. */ ++ qualifier_pointer = 0x4, /* 1 << 2 */ ++ /* const T *foo. */ ++ qualifier_const_pointer = 0x6, /* qualifier_const | qualifier_pointer */ ++ /* Used when expanding arguments if an operand could ++ be an immediate. */ ++ qualifier_immediate = 0x8, /* 1 << 3 */ ++ qualifier_maybe_immediate = 0x10, /* 1 << 4 */ ++ /* void foo (...). */ ++ qualifier_void = 0x20, /* 1 << 5 */ ++ /* Some patterns may have internal operands, this qualifier is an ++ instruction to the initialisation code to skip this operand. */ ++ qualifier_internal = 0x40, /* 1 << 6 */ ++ /* Some builtins should use the T_*mode* encoded in a simd_builtin_datum ++ rather than using the type of the operand. */ ++ qualifier_map_mode = 0x80, /* 1 << 7 */ ++ /* qualifier_pointer | qualifier_map_mode */ ++ qualifier_pointer_map_mode = 0x84, ++ /* qualifier_const_pointer | qualifier_map_mode */ ++ qualifier_const_pointer_map_mode = 0x86, ++ /* Polynomial types. */ ++ qualifier_poly = 0x100 ++}; + + typedef struct + { + const char *name; +- const aarch64_simd_itype itype; + enum aarch64_simd_builtin_type_mode mode; + const enum insn_code code; + unsigned int fcode; ++ enum aarch64_type_qualifiers *qualifiers; + } aarch64_simd_builtin_datum; + +-#define CF(N, X) CODE_FOR_aarch64_##N##X ++static enum aarch64_type_qualifiers ++aarch64_types_unop_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_none, qualifier_none }; ++#define TYPES_UNOP (aarch64_types_unop_qualifiers) ++static enum aarch64_type_qualifiers ++aarch64_types_unopu_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_unsigned, qualifier_unsigned }; ++#define TYPES_UNOPU (aarch64_types_unopu_qualifiers) ++#define TYPES_CREATE (aarch64_types_unop_qualifiers) ++#define TYPES_REINTERP (aarch64_types_unop_qualifiers) ++static enum aarch64_type_qualifiers ++aarch64_types_binop_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_none, qualifier_none, qualifier_maybe_immediate }; ++#define TYPES_BINOP (aarch64_types_binop_qualifiers) ++static enum aarch64_type_qualifiers ++aarch64_types_binopu_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned }; ++#define TYPES_BINOPU (aarch64_types_binopu_qualifiers) ++static enum aarch64_type_qualifiers ++aarch64_types_binopp_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_poly, qualifier_poly, qualifier_poly }; ++#define TYPES_BINOPP (aarch64_types_binopp_qualifiers) + +-#define VAR1(T, N, A) \ +- {#N, AARCH64_SIMD_##T, UP (A), CF (N, A), 0}, +-#define VAR2(T, N, A, B) \ +- VAR1 (T, N, A) \ +- VAR1 (T, N, B) +-#define VAR3(T, N, A, B, C) \ +- VAR2 (T, N, A, B) \ +- VAR1 (T, N, C) +-#define VAR4(T, N, A, B, C, D) \ +- VAR3 (T, N, A, B, C) \ +- VAR1 (T, N, D) +-#define VAR5(T, N, A, B, C, D, E) \ +- VAR4 (T, N, A, B, C, D) \ +- VAR1 (T, N, E) +-#define VAR6(T, N, A, B, C, D, E, F) \ +- VAR5 (T, N, A, B, C, D, E) \ +- VAR1 (T, N, F) +-#define VAR7(T, N, A, B, C, D, E, F, G) \ +- VAR6 (T, N, A, B, C, D, E, F) \ +- VAR1 (T, N, G) +-#define VAR8(T, N, A, B, C, D, E, F, G, H) \ +- VAR7 (T, N, A, B, C, D, E, F, G) \ +- VAR1 (T, N, H) +-#define VAR9(T, N, A, B, C, D, E, F, G, H, I) \ +- VAR8 (T, N, A, B, C, D, E, F, G, H) \ +- VAR1 (T, N, I) +-#define VAR10(T, N, A, B, C, D, E, F, G, H, I, J) \ +- VAR9 (T, N, A, B, C, D, E, F, G, H, I) \ +- VAR1 (T, N, J) +-#define VAR11(T, N, A, B, C, D, E, F, G, H, I, J, K) \ +- VAR10 (T, N, A, B, C, D, E, F, G, H, I, J) \ +- VAR1 (T, N, K) +-#define VAR12(T, N, A, B, C, D, E, F, G, H, I, J, K, L) \ +- VAR11 (T, N, A, B, C, D, E, F, G, H, I, J, K) \ +- VAR1 (T, N, L) ++static enum aarch64_type_qualifiers ++aarch64_types_ternop_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_none, qualifier_none, qualifier_none, qualifier_none }; ++#define TYPES_TERNOP (aarch64_types_ternop_qualifiers) ++static enum aarch64_type_qualifiers ++aarch64_types_ternopu_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_unsigned, qualifier_unsigned, ++ qualifier_unsigned, qualifier_unsigned }; ++#define TYPES_TERNOPU (aarch64_types_ternopu_qualifiers) + ++static enum aarch64_type_qualifiers ++aarch64_types_quadop_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_none, qualifier_none, qualifier_none, ++ qualifier_none, qualifier_none }; ++#define TYPES_QUADOP (aarch64_types_quadop_qualifiers) ++ ++static enum aarch64_type_qualifiers ++aarch64_types_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_none, qualifier_none, qualifier_immediate }; ++#define TYPES_GETLANE (aarch64_types_getlane_qualifiers) ++#define TYPES_SHIFTIMM (aarch64_types_getlane_qualifiers) ++static enum aarch64_type_qualifiers ++aarch64_types_setlane_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_none, qualifier_none, qualifier_none, qualifier_immediate }; ++#define TYPES_SETLANE (aarch64_types_setlane_qualifiers) ++#define TYPES_SHIFTINSERT (aarch64_types_setlane_qualifiers) ++#define TYPES_SHIFTACC (aarch64_types_setlane_qualifiers) ++ ++static enum aarch64_type_qualifiers ++aarch64_types_combine_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_none, qualifier_none, qualifier_none }; ++#define TYPES_COMBINE (aarch64_types_combine_qualifiers) ++ ++static enum aarch64_type_qualifiers ++aarch64_types_load1_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_none, qualifier_const_pointer_map_mode }; ++#define TYPES_LOAD1 (aarch64_types_load1_qualifiers) ++#define TYPES_LOADSTRUCT (aarch64_types_load1_qualifiers) ++ ++/* The first argument (return type) of a store should be void type, ++ which we represent with qualifier_void. Their first operand will be ++ a DImode pointer to the location to store to, so we must use ++ qualifier_map_mode | qualifier_pointer to build a pointer to the ++ element type of the vector. */ ++static enum aarch64_type_qualifiers ++aarch64_types_store1_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ = { qualifier_void, qualifier_pointer_map_mode, qualifier_none }; ++#define TYPES_STORE1 (aarch64_types_store1_qualifiers) ++#define TYPES_STORESTRUCT (aarch64_types_store1_qualifiers) ++ ++#define CF0(N, X) CODE_FOR_aarch64_##N##X ++#define CF1(N, X) CODE_FOR_##N##X##1 ++#define CF2(N, X) CODE_FOR_##N##X##2 ++#define CF3(N, X) CODE_FOR_##N##X##3 ++#define CF4(N, X) CODE_FOR_##N##X##4 ++#define CF10(N, X) CODE_FOR_##N##X ++ ++#define VAR1(T, N, MAP, A) \ ++ {#N, UP (A), CF##MAP (N, A), 0, TYPES_##T}, ++#define VAR2(T, N, MAP, A, B) \ ++ VAR1 (T, N, MAP, A) \ ++ VAR1 (T, N, MAP, B) ++#define VAR3(T, N, MAP, A, B, C) \ ++ VAR2 (T, N, MAP, A, B) \ ++ VAR1 (T, N, MAP, C) ++#define VAR4(T, N, MAP, A, B, C, D) \ ++ VAR3 (T, N, MAP, A, B, C) \ ++ VAR1 (T, N, MAP, D) ++#define VAR5(T, N, MAP, A, B, C, D, E) \ ++ VAR4 (T, N, MAP, A, B, C, D) \ ++ VAR1 (T, N, MAP, E) ++#define VAR6(T, N, MAP, A, B, C, D, E, F) \ ++ VAR5 (T, N, MAP, A, B, C, D, E) \ ++ VAR1 (T, N, MAP, F) ++#define VAR7(T, N, MAP, A, B, C, D, E, F, G) \ ++ VAR6 (T, N, MAP, A, B, C, D, E, F) \ ++ VAR1 (T, N, MAP, G) ++#define VAR8(T, N, MAP, A, B, C, D, E, F, G, H) \ ++ VAR7 (T, N, MAP, A, B, C, D, E, F, G) \ ++ VAR1 (T, N, MAP, H) ++#define VAR9(T, N, MAP, A, B, C, D, E, F, G, H, I) \ ++ VAR8 (T, N, MAP, A, B, C, D, E, F, G, H) \ ++ VAR1 (T, N, MAP, I) ++#define VAR10(T, N, MAP, A, B, C, D, E, F, G, H, I, J) \ ++ VAR9 (T, N, MAP, A, B, C, D, E, F, G, H, I) \ ++ VAR1 (T, N, MAP, J) ++#define VAR11(T, N, MAP, A, B, C, D, E, F, G, H, I, J, K) \ ++ VAR10 (T, N, MAP, A, B, C, D, E, F, G, H, I, J) \ ++ VAR1 (T, N, MAP, K) ++#define VAR12(T, N, MAP, A, B, C, D, E, F, G, H, I, J, K, L) \ ++ VAR11 (T, N, MAP, A, B, C, D, E, F, G, H, I, J, K) \ ++ VAR1 (T, N, MAP, L) ++ + /* BUILTIN_ macros should expand to cover the same range of + modes as is given for each define_mode_iterator in + config/aarch64/iterators.md. */ + +-#define BUILTIN_DX(T, N) \ +- VAR2 (T, N, di, df) +-#define BUILTIN_SDQ_I(T, N) \ +- VAR4 (T, N, qi, hi, si, di) +-#define BUILTIN_SD_HSI(T, N) \ +- VAR2 (T, N, hi, si) +-#define BUILTIN_V2F(T, N) \ +- VAR2 (T, N, v2sf, v2df) +-#define BUILTIN_VALL(T, N) \ +- VAR10 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, v2sf, v4sf, v2df) +-#define BUILTIN_VB(T, N) \ +- VAR2 (T, N, v8qi, v16qi) +-#define BUILTIN_VD(T, N) \ +- VAR4 (T, N, v8qi, v4hi, v2si, v2sf) +-#define BUILTIN_VDC(T, N) \ +- VAR6 (T, N, v8qi, v4hi, v2si, v2sf, di, df) +-#define BUILTIN_VDIC(T, N) \ +- VAR3 (T, N, v8qi, v4hi, v2si) +-#define BUILTIN_VDN(T, N) \ +- VAR3 (T, N, v4hi, v2si, di) +-#define BUILTIN_VDQ(T, N) \ +- VAR7 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di) +-#define BUILTIN_VDQF(T, N) \ +- VAR3 (T, N, v2sf, v4sf, v2df) +-#define BUILTIN_VDQHS(T, N) \ +- VAR4 (T, N, v4hi, v8hi, v2si, v4si) +-#define BUILTIN_VDQIF(T, N) \ +- VAR9 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2sf, v4sf, v2df) +-#define BUILTIN_VDQM(T, N) \ +- VAR6 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si) +-#define BUILTIN_VDQV(T, N) \ +- VAR5 (T, N, v8qi, v16qi, v4hi, v8hi, v4si) +-#define BUILTIN_VDQ_BHSI(T, N) \ +- VAR6 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si) +-#define BUILTIN_VDQ_I(T, N) \ +- VAR7 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di) +-#define BUILTIN_VDW(T, N) \ +- VAR3 (T, N, v8qi, v4hi, v2si) +-#define BUILTIN_VD_BHSI(T, N) \ +- VAR3 (T, N, v8qi, v4hi, v2si) +-#define BUILTIN_VD_HSI(T, N) \ +- VAR2 (T, N, v4hi, v2si) +-#define BUILTIN_VD_RE(T, N) \ +- VAR6 (T, N, v8qi, v4hi, v2si, v2sf, di, df) +-#define BUILTIN_VQ(T, N) \ +- VAR6 (T, N, v16qi, v8hi, v4si, v2di, v4sf, v2df) +-#define BUILTIN_VQN(T, N) \ +- VAR3 (T, N, v8hi, v4si, v2di) +-#define BUILTIN_VQW(T, N) \ +- VAR3 (T, N, v16qi, v8hi, v4si) +-#define BUILTIN_VQ_HSI(T, N) \ +- VAR2 (T, N, v8hi, v4si) +-#define BUILTIN_VQ_S(T, N) \ +- VAR6 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si) +-#define BUILTIN_VSDQ_HSI(T, N) \ +- VAR6 (T, N, v4hi, v8hi, v2si, v4si, hi, si) +-#define BUILTIN_VSDQ_I(T, N) \ +- VAR11 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, qi, hi, si, di) +-#define BUILTIN_VSDQ_I_BHSI(T, N) \ +- VAR10 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, qi, hi, si) +-#define BUILTIN_VSDQ_I_DI(T, N) \ +- VAR8 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, di) +-#define BUILTIN_VSD_HSI(T, N) \ +- VAR4 (T, N, v4hi, v2si, hi, si) +-#define BUILTIN_VSQN_HSDI(T, N) \ +- VAR6 (T, N, v8hi, v4si, v2di, hi, si, di) +-#define BUILTIN_VSTRUCT(T, N) \ +- VAR3 (T, N, oi, ci, xi) ++#define BUILTIN_DX(T, N, MAP) \ ++ VAR2 (T, N, MAP, di, df) ++#define BUILTIN_GPF(T, N, MAP) \ ++ VAR2 (T, N, MAP, sf, df) ++#define BUILTIN_SDQ_I(T, N, MAP) \ ++ VAR4 (T, N, MAP, qi, hi, si, di) ++#define BUILTIN_SD_HSI(T, N, MAP) \ ++ VAR2 (T, N, MAP, hi, si) ++#define BUILTIN_V2F(T, N, MAP) \ ++ VAR2 (T, N, MAP, v2sf, v2df) ++#define BUILTIN_VALL(T, N, MAP) \ ++ VAR10 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, \ ++ v4si, v2di, v2sf, v4sf, v2df) ++#define BUILTIN_VALLDI(T, N, MAP) \ ++ VAR11 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, \ ++ v4si, v2di, v2sf, v4sf, v2df, di) ++#define BUILTIN_VB(T, N, MAP) \ ++ VAR2 (T, N, MAP, v8qi, v16qi) ++#define BUILTIN_VD(T, N, MAP) \ ++ VAR4 (T, N, MAP, v8qi, v4hi, v2si, v2sf) ++#define BUILTIN_VDC(T, N, MAP) \ ++ VAR6 (T, N, MAP, v8qi, v4hi, v2si, v2sf, di, df) ++#define BUILTIN_VDIC(T, N, MAP) \ ++ VAR3 (T, N, MAP, v8qi, v4hi, v2si) ++#define BUILTIN_VDN(T, N, MAP) \ ++ VAR3 (T, N, MAP, v4hi, v2si, di) ++#define BUILTIN_VDQ(T, N, MAP) \ ++ VAR7 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di) ++#define BUILTIN_VDQF(T, N, MAP) \ ++ VAR3 (T, N, MAP, v2sf, v4sf, v2df) ++#define BUILTIN_VDQH(T, N, MAP) \ ++ VAR2 (T, N, MAP, v4hi, v8hi) ++#define BUILTIN_VDQHS(T, N, MAP) \ ++ VAR4 (T, N, MAP, v4hi, v8hi, v2si, v4si) ++#define BUILTIN_VDQIF(T, N, MAP) \ ++ VAR9 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2sf, v4sf, v2df) ++#define BUILTIN_VDQM(T, N, MAP) \ ++ VAR6 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si) ++#define BUILTIN_VDQV(T, N, MAP) \ ++ VAR5 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v4si) ++#define BUILTIN_VDQ_BHSI(T, N, MAP) \ ++ VAR6 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si) ++#define BUILTIN_VDQ_I(T, N, MAP) \ ++ VAR7 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di) ++#define BUILTIN_VDW(T, N, MAP) \ ++ VAR3 (T, N, MAP, v8qi, v4hi, v2si) ++#define BUILTIN_VD_BHSI(T, N, MAP) \ ++ VAR3 (T, N, MAP, v8qi, v4hi, v2si) ++#define BUILTIN_VD_HSI(T, N, MAP) \ ++ VAR2 (T, N, MAP, v4hi, v2si) ++#define BUILTIN_VD_RE(T, N, MAP) \ ++ VAR6 (T, N, MAP, v8qi, v4hi, v2si, v2sf, di, df) ++#define BUILTIN_VQ(T, N, MAP) \ ++ VAR6 (T, N, MAP, v16qi, v8hi, v4si, v2di, v4sf, v2df) ++#define BUILTIN_VQN(T, N, MAP) \ ++ VAR3 (T, N, MAP, v8hi, v4si, v2di) ++#define BUILTIN_VQW(T, N, MAP) \ ++ VAR3 (T, N, MAP, v16qi, v8hi, v4si) ++#define BUILTIN_VQ_HSI(T, N, MAP) \ ++ VAR2 (T, N, MAP, v8hi, v4si) ++#define BUILTIN_VQ_S(T, N, MAP) \ ++ VAR6 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si) ++#define BUILTIN_VSDQ_HSI(T, N, MAP) \ ++ VAR6 (T, N, MAP, v4hi, v8hi, v2si, v4si, hi, si) ++#define BUILTIN_VSDQ_I(T, N, MAP) \ ++ VAR11 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, qi, hi, si, di) ++#define BUILTIN_VSDQ_I_BHSI(T, N, MAP) \ ++ VAR10 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, qi, hi, si) ++#define BUILTIN_VSDQ_I_DI(T, N, MAP) \ ++ VAR8 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, di) ++#define BUILTIN_VSD_HSI(T, N, MAP) \ ++ VAR4 (T, N, MAP, v4hi, v2si, hi, si) ++#define BUILTIN_VSQN_HSDI(T, N, MAP) \ ++ VAR6 (T, N, MAP, v8hi, v4si, v2di, hi, si, di) ++#define BUILTIN_VSTRUCT(T, N, MAP) \ ++ VAR3 (T, N, MAP, oi, ci, xi) + + static aarch64_simd_builtin_datum aarch64_simd_builtin_data[] = { + #include "aarch64-simd-builtins.def" +@@ -244,8 +325,8 @@ + }; + + #undef VAR1 +-#define VAR1(T, N, A) \ +- AARCH64_SIMD_BUILTIN_##N##A, ++#define VAR1(T, N, MAP, A) \ ++ AARCH64_SIMD_BUILTIN_##T##_##N##A, + + enum aarch64_builtins + { +@@ -257,171 +338,218 @@ + AARCH64_BUILTIN_MAX + }; + +-#undef BUILTIN_DX +-#undef BUILTIN_SDQ_I +-#undef BUILTIN_SD_HSI +-#undef BUILTIN_V2F +-#undef BUILTIN_VALL +-#undef BUILTIN_VB +-#undef BUILTIN_VD +-#undef BUILTIN_VDC +-#undef BUILTIN_VDIC +-#undef BUILTIN_VDN +-#undef BUILTIN_VDQ +-#undef BUILTIN_VDQF +-#undef BUILTIN_VDQHS +-#undef BUILTIN_VDQIF +-#undef BUILTIN_VDQM +-#undef BUILTIN_VDQV +-#undef BUILTIN_VDQ_BHSI +-#undef BUILTIN_VDQ_I +-#undef BUILTIN_VDW +-#undef BUILTIN_VD_BHSI +-#undef BUILTIN_VD_HSI +-#undef BUILTIN_VD_RE +-#undef BUILTIN_VQ +-#undef BUILTIN_VQN +-#undef BUILTIN_VQW +-#undef BUILTIN_VQ_HSI +-#undef BUILTIN_VQ_S +-#undef BUILTIN_VSDQ_HSI +-#undef BUILTIN_VSDQ_I +-#undef BUILTIN_VSDQ_I_BHSI +-#undef BUILTIN_VSDQ_I_DI +-#undef BUILTIN_VSD_HSI +-#undef BUILTIN_VSQN_HSDI +-#undef BUILTIN_VSTRUCT +-#undef CF +-#undef VAR1 +-#undef VAR2 +-#undef VAR3 +-#undef VAR4 +-#undef VAR5 +-#undef VAR6 +-#undef VAR7 +-#undef VAR8 +-#undef VAR9 +-#undef VAR10 +-#undef VAR11 +- + static GTY(()) tree aarch64_builtin_decls[AARCH64_BUILTIN_MAX]; + + #define NUM_DREG_TYPES 6 + #define NUM_QREG_TYPES 6 + +-static void +-aarch64_init_simd_builtins (void) ++/* Return a tree for a signed or unsigned argument of either ++ the mode specified by MODE, or the inner mode of MODE. */ ++tree ++aarch64_build_scalar_type (enum machine_mode mode, ++ bool unsigned_p, ++ bool poly_p) + { +- unsigned int i, fcode = AARCH64_SIMD_BUILTIN_BASE + 1; ++#undef INT_TYPES ++#define INT_TYPES \ ++ AARCH64_TYPE_BUILDER (QI) \ ++ AARCH64_TYPE_BUILDER (HI) \ ++ AARCH64_TYPE_BUILDER (SI) \ ++ AARCH64_TYPE_BUILDER (DI) \ ++ AARCH64_TYPE_BUILDER (EI) \ ++ AARCH64_TYPE_BUILDER (OI) \ ++ AARCH64_TYPE_BUILDER (CI) \ ++ AARCH64_TYPE_BUILDER (XI) \ ++ AARCH64_TYPE_BUILDER (TI) \ + +- /* Scalar type nodes. */ +- tree aarch64_simd_intQI_type_node; +- tree aarch64_simd_intHI_type_node; +- tree aarch64_simd_polyQI_type_node; +- tree aarch64_simd_polyHI_type_node; +- tree aarch64_simd_intSI_type_node; +- tree aarch64_simd_intDI_type_node; +- tree aarch64_simd_float_type_node; +- tree aarch64_simd_double_type_node; ++/* Statically declare all the possible types we might need. */ ++#undef AARCH64_TYPE_BUILDER ++#define AARCH64_TYPE_BUILDER(X) \ ++ static tree X##_aarch64_type_node_p = NULL; \ ++ static tree X##_aarch64_type_node_s = NULL; \ ++ static tree X##_aarch64_type_node_u = NULL; + +- /* Pointer to scalar type nodes. */ +- tree intQI_pointer_node; +- tree intHI_pointer_node; +- tree intSI_pointer_node; +- tree intDI_pointer_node; +- tree float_pointer_node; +- tree double_pointer_node; ++ INT_TYPES + +- /* Const scalar type nodes. */ +- tree const_intQI_node; +- tree const_intHI_node; +- tree const_intSI_node; +- tree const_intDI_node; +- tree const_float_node; +- tree const_double_node; ++ static tree float_aarch64_type_node = NULL; ++ static tree double_aarch64_type_node = NULL; + +- /* Pointer to const scalar type nodes. */ +- tree const_intQI_pointer_node; +- tree const_intHI_pointer_node; +- tree const_intSI_pointer_node; +- tree const_intDI_pointer_node; +- tree const_float_pointer_node; +- tree const_double_pointer_node; ++ gcc_assert (!VECTOR_MODE_P (mode)); + +- /* Vector type nodes. */ +- tree V8QI_type_node; +- tree V4HI_type_node; +- tree V2SI_type_node; +- tree V2SF_type_node; +- tree V16QI_type_node; +- tree V8HI_type_node; +- tree V4SI_type_node; +- tree V4SF_type_node; +- tree V2DI_type_node; +- tree V2DF_type_node; ++/* If we've already initialised this type, don't initialise it again, ++ otherwise ask for a new type of the correct size. */ ++#undef AARCH64_TYPE_BUILDER ++#define AARCH64_TYPE_BUILDER(X) \ ++ case X##mode: \ ++ if (unsigned_p) \ ++ return (X##_aarch64_type_node_u \ ++ ? X##_aarch64_type_node_u \ ++ : X##_aarch64_type_node_u \ ++ = make_unsigned_type (GET_MODE_PRECISION (mode))); \ ++ else if (poly_p) \ ++ return (X##_aarch64_type_node_p \ ++ ? X##_aarch64_type_node_p \ ++ : X##_aarch64_type_node_p \ ++ = make_unsigned_type (GET_MODE_PRECISION (mode))); \ ++ else \ ++ return (X##_aarch64_type_node_s \ ++ ? X##_aarch64_type_node_s \ ++ : X##_aarch64_type_node_s \ ++ = make_signed_type (GET_MODE_PRECISION (mode))); \ ++ break; + +- /* Scalar unsigned type nodes. */ +- tree intUQI_type_node; +- tree intUHI_type_node; +- tree intUSI_type_node; +- tree intUDI_type_node; ++ switch (mode) ++ { ++ INT_TYPES ++ case SFmode: ++ if (!float_aarch64_type_node) ++ { ++ float_aarch64_type_node = make_node (REAL_TYPE); ++ TYPE_PRECISION (float_aarch64_type_node) = FLOAT_TYPE_SIZE; ++ layout_type (float_aarch64_type_node); ++ } ++ return float_aarch64_type_node; ++ break; ++ case DFmode: ++ if (!double_aarch64_type_node) ++ { ++ double_aarch64_type_node = make_node (REAL_TYPE); ++ TYPE_PRECISION (double_aarch64_type_node) = DOUBLE_TYPE_SIZE; ++ layout_type (double_aarch64_type_node); ++ } ++ return double_aarch64_type_node; ++ break; ++ default: ++ gcc_unreachable (); ++ } ++} + +- /* Opaque integer types for structures of vectors. */ +- tree intEI_type_node; +- tree intOI_type_node; +- tree intCI_type_node; +- tree intXI_type_node; ++tree ++aarch64_build_vector_type (enum machine_mode mode, ++ bool unsigned_p, ++ bool poly_p) ++{ ++ tree eltype; + +- /* Pointer to vector type nodes. */ +- tree V8QI_pointer_node; +- tree V4HI_pointer_node; +- tree V2SI_pointer_node; +- tree V2SF_pointer_node; +- tree V16QI_pointer_node; +- tree V8HI_pointer_node; +- tree V4SI_pointer_node; +- tree V4SF_pointer_node; +- tree V2DI_pointer_node; +- tree V2DF_pointer_node; ++#define VECTOR_TYPES \ ++ AARCH64_TYPE_BUILDER (V16QI) \ ++ AARCH64_TYPE_BUILDER (V8HI) \ ++ AARCH64_TYPE_BUILDER (V4SI) \ ++ AARCH64_TYPE_BUILDER (V2DI) \ ++ AARCH64_TYPE_BUILDER (V8QI) \ ++ AARCH64_TYPE_BUILDER (V4HI) \ ++ AARCH64_TYPE_BUILDER (V2SI) \ ++ \ ++ AARCH64_TYPE_BUILDER (V4SF) \ ++ AARCH64_TYPE_BUILDER (V2DF) \ ++ AARCH64_TYPE_BUILDER (V2SF) \ ++/* Declare our "cache" of values. */ ++#undef AARCH64_TYPE_BUILDER ++#define AARCH64_TYPE_BUILDER(X) \ ++ static tree X##_aarch64_type_node_s = NULL; \ ++ static tree X##_aarch64_type_node_u = NULL; \ ++ static tree X##_aarch64_type_node_p = NULL; + +- /* Operations which return results as pairs. */ +- tree void_ftype_pv8qi_v8qi_v8qi; +- tree void_ftype_pv4hi_v4hi_v4hi; +- tree void_ftype_pv2si_v2si_v2si; +- tree void_ftype_pv2sf_v2sf_v2sf; +- tree void_ftype_pdi_di_di; +- tree void_ftype_pv16qi_v16qi_v16qi; +- tree void_ftype_pv8hi_v8hi_v8hi; +- tree void_ftype_pv4si_v4si_v4si; +- tree void_ftype_pv4sf_v4sf_v4sf; +- tree void_ftype_pv2di_v2di_v2di; +- tree void_ftype_pv2df_v2df_v2df; ++ VECTOR_TYPES + +- tree reinterp_ftype_dreg[NUM_DREG_TYPES][NUM_DREG_TYPES]; +- tree reinterp_ftype_qreg[NUM_QREG_TYPES][NUM_QREG_TYPES]; +- tree dreg_types[NUM_DREG_TYPES], qreg_types[NUM_QREG_TYPES]; ++ gcc_assert (VECTOR_MODE_P (mode)); + +- /* Create distinguished type nodes for AARCH64_SIMD vector element types, +- and pointers to values of such types, so we can detect them later. */ +- aarch64_simd_intQI_type_node = +- make_signed_type (GET_MODE_PRECISION (QImode)); +- aarch64_simd_intHI_type_node = +- make_signed_type (GET_MODE_PRECISION (HImode)); +- aarch64_simd_polyQI_type_node = +- make_signed_type (GET_MODE_PRECISION (QImode)); +- aarch64_simd_polyHI_type_node = +- make_signed_type (GET_MODE_PRECISION (HImode)); +- aarch64_simd_intSI_type_node = +- make_signed_type (GET_MODE_PRECISION (SImode)); +- aarch64_simd_intDI_type_node = +- make_signed_type (GET_MODE_PRECISION (DImode)); +- aarch64_simd_float_type_node = make_node (REAL_TYPE); +- aarch64_simd_double_type_node = make_node (REAL_TYPE); +- TYPE_PRECISION (aarch64_simd_float_type_node) = FLOAT_TYPE_SIZE; +- TYPE_PRECISION (aarch64_simd_double_type_node) = DOUBLE_TYPE_SIZE; +- layout_type (aarch64_simd_float_type_node); +- layout_type (aarch64_simd_double_type_node); ++#undef AARCH64_TYPE_BUILDER ++#define AARCH64_TYPE_BUILDER(X) \ ++ case X##mode: \ ++ if (unsigned_p) \ ++ return X##_aarch64_type_node_u \ ++ ? X##_aarch64_type_node_u \ ++ : X##_aarch64_type_node_u \ ++ = build_vector_type_for_mode (aarch64_build_scalar_type \ ++ (GET_MODE_INNER (mode), \ ++ unsigned_p, poly_p), mode); \ ++ else if (poly_p) \ ++ return X##_aarch64_type_node_p \ ++ ? X##_aarch64_type_node_p \ ++ : X##_aarch64_type_node_p \ ++ = build_vector_type_for_mode (aarch64_build_scalar_type \ ++ (GET_MODE_INNER (mode), \ ++ unsigned_p, poly_p), mode); \ ++ else \ ++ return X##_aarch64_type_node_s \ ++ ? X##_aarch64_type_node_s \ ++ : X##_aarch64_type_node_s \ ++ = build_vector_type_for_mode (aarch64_build_scalar_type \ ++ (GET_MODE_INNER (mode), \ ++ unsigned_p, poly_p), mode); \ ++ break; + ++ switch (mode) ++ { ++ default: ++ eltype = aarch64_build_scalar_type (GET_MODE_INNER (mode), ++ unsigned_p, poly_p); ++ return build_vector_type_for_mode (eltype, mode); ++ break; ++ VECTOR_TYPES ++ } ++} ++ ++tree ++aarch64_build_type (enum machine_mode mode, bool unsigned_p, bool poly_p) ++{ ++ if (VECTOR_MODE_P (mode)) ++ return aarch64_build_vector_type (mode, unsigned_p, poly_p); ++ else ++ return aarch64_build_scalar_type (mode, unsigned_p, poly_p); ++} ++ ++tree ++aarch64_build_signed_type (enum machine_mode mode) ++{ ++ return aarch64_build_type (mode, false, false); ++} ++ ++tree ++aarch64_build_unsigned_type (enum machine_mode mode) ++{ ++ return aarch64_build_type (mode, true, false); ++} ++ ++tree ++aarch64_build_poly_type (enum machine_mode mode) ++{ ++ return aarch64_build_type (mode, false, true); ++} ++ ++static void ++aarch64_init_simd_builtins (void) ++{ ++ unsigned int i, fcode = AARCH64_SIMD_BUILTIN_BASE + 1; ++ ++ /* Signed scalar type nodes. */ ++ tree aarch64_simd_intQI_type_node = aarch64_build_signed_type (QImode); ++ tree aarch64_simd_intHI_type_node = aarch64_build_signed_type (HImode); ++ tree aarch64_simd_intSI_type_node = aarch64_build_signed_type (SImode); ++ tree aarch64_simd_intDI_type_node = aarch64_build_signed_type (DImode); ++ tree aarch64_simd_intTI_type_node = aarch64_build_signed_type (TImode); ++ tree aarch64_simd_intEI_type_node = aarch64_build_signed_type (EImode); ++ tree aarch64_simd_intOI_type_node = aarch64_build_signed_type (OImode); ++ tree aarch64_simd_intCI_type_node = aarch64_build_signed_type (CImode); ++ tree aarch64_simd_intXI_type_node = aarch64_build_signed_type (XImode); ++ ++ /* Unsigned scalar type nodes. */ ++ tree aarch64_simd_intUQI_type_node = aarch64_build_unsigned_type (QImode); ++ tree aarch64_simd_intUHI_type_node = aarch64_build_unsigned_type (HImode); ++ tree aarch64_simd_intUSI_type_node = aarch64_build_unsigned_type (SImode); ++ tree aarch64_simd_intUDI_type_node = aarch64_build_unsigned_type (DImode); ++ ++ /* Poly scalar type nodes. */ ++ tree aarch64_simd_polyQI_type_node = aarch64_build_poly_type (QImode); ++ tree aarch64_simd_polyHI_type_node = aarch64_build_poly_type (HImode); ++ tree aarch64_simd_polyDI_type_node = aarch64_build_poly_type (DImode); ++ tree aarch64_simd_polyTI_type_node = aarch64_build_poly_type (TImode); ++ ++ /* Float type nodes. */ ++ tree aarch64_simd_float_type_node = aarch64_build_signed_type (SFmode); ++ tree aarch64_simd_double_type_node = aarch64_build_signed_type (DFmode); ++ + /* Define typedefs which exactly correspond to the modes we are basing vector + types on. If you change these names you'll need to change + the table used by aarch64_mangle_type too. */ +@@ -441,518 +569,139 @@ + "__builtin_aarch64_simd_poly8"); + (*lang_hooks.types.register_builtin_type) (aarch64_simd_polyHI_type_node, + "__builtin_aarch64_simd_poly16"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_polyDI_type_node, ++ "__builtin_aarch64_simd_poly64"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_polyTI_type_node, ++ "__builtin_aarch64_simd_poly128"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intTI_type_node, ++ "__builtin_aarch64_simd_ti"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intEI_type_node, ++ "__builtin_aarch64_simd_ei"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intOI_type_node, ++ "__builtin_aarch64_simd_oi"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intCI_type_node, ++ "__builtin_aarch64_simd_ci"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intXI_type_node, ++ "__builtin_aarch64_simd_xi"); + +- intQI_pointer_node = build_pointer_type (aarch64_simd_intQI_type_node); +- intHI_pointer_node = build_pointer_type (aarch64_simd_intHI_type_node); +- intSI_pointer_node = build_pointer_type (aarch64_simd_intSI_type_node); +- intDI_pointer_node = build_pointer_type (aarch64_simd_intDI_type_node); +- float_pointer_node = build_pointer_type (aarch64_simd_float_type_node); +- double_pointer_node = build_pointer_type (aarch64_simd_double_type_node); +- +- /* Next create constant-qualified versions of the above types. */ +- const_intQI_node = build_qualified_type (aarch64_simd_intQI_type_node, +- TYPE_QUAL_CONST); +- const_intHI_node = build_qualified_type (aarch64_simd_intHI_type_node, +- TYPE_QUAL_CONST); +- const_intSI_node = build_qualified_type (aarch64_simd_intSI_type_node, +- TYPE_QUAL_CONST); +- const_intDI_node = build_qualified_type (aarch64_simd_intDI_type_node, +- TYPE_QUAL_CONST); +- const_float_node = build_qualified_type (aarch64_simd_float_type_node, +- TYPE_QUAL_CONST); +- const_double_node = build_qualified_type (aarch64_simd_double_type_node, +- TYPE_QUAL_CONST); +- +- const_intQI_pointer_node = build_pointer_type (const_intQI_node); +- const_intHI_pointer_node = build_pointer_type (const_intHI_node); +- const_intSI_pointer_node = build_pointer_type (const_intSI_node); +- const_intDI_pointer_node = build_pointer_type (const_intDI_node); +- const_float_pointer_node = build_pointer_type (const_float_node); +- const_double_pointer_node = build_pointer_type (const_double_node); +- +- /* Now create vector types based on our AARCH64 SIMD element types. */ +- /* 64-bit vectors. */ +- V8QI_type_node = +- build_vector_type_for_mode (aarch64_simd_intQI_type_node, V8QImode); +- V4HI_type_node = +- build_vector_type_for_mode (aarch64_simd_intHI_type_node, V4HImode); +- V2SI_type_node = +- build_vector_type_for_mode (aarch64_simd_intSI_type_node, V2SImode); +- V2SF_type_node = +- build_vector_type_for_mode (aarch64_simd_float_type_node, V2SFmode); +- /* 128-bit vectors. */ +- V16QI_type_node = +- build_vector_type_for_mode (aarch64_simd_intQI_type_node, V16QImode); +- V8HI_type_node = +- build_vector_type_for_mode (aarch64_simd_intHI_type_node, V8HImode); +- V4SI_type_node = +- build_vector_type_for_mode (aarch64_simd_intSI_type_node, V4SImode); +- V4SF_type_node = +- build_vector_type_for_mode (aarch64_simd_float_type_node, V4SFmode); +- V2DI_type_node = +- build_vector_type_for_mode (aarch64_simd_intDI_type_node, V2DImode); +- V2DF_type_node = +- build_vector_type_for_mode (aarch64_simd_double_type_node, V2DFmode); +- + /* Unsigned integer types for various mode sizes. */ +- intUQI_type_node = make_unsigned_type (GET_MODE_PRECISION (QImode)); +- intUHI_type_node = make_unsigned_type (GET_MODE_PRECISION (HImode)); +- intUSI_type_node = make_unsigned_type (GET_MODE_PRECISION (SImode)); +- intUDI_type_node = make_unsigned_type (GET_MODE_PRECISION (DImode)); +- +- (*lang_hooks.types.register_builtin_type) (intUQI_type_node, ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intUQI_type_node, + "__builtin_aarch64_simd_uqi"); +- (*lang_hooks.types.register_builtin_type) (intUHI_type_node, ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intUHI_type_node, + "__builtin_aarch64_simd_uhi"); +- (*lang_hooks.types.register_builtin_type) (intUSI_type_node, ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intUSI_type_node, + "__builtin_aarch64_simd_usi"); +- (*lang_hooks.types.register_builtin_type) (intUDI_type_node, ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intUDI_type_node, + "__builtin_aarch64_simd_udi"); + +- /* Opaque integer types for structures of vectors. */ +- intEI_type_node = make_signed_type (GET_MODE_PRECISION (EImode)); +- intOI_type_node = make_signed_type (GET_MODE_PRECISION (OImode)); +- intCI_type_node = make_signed_type (GET_MODE_PRECISION (CImode)); +- intXI_type_node = make_signed_type (GET_MODE_PRECISION (XImode)); +- +- (*lang_hooks.types.register_builtin_type) (intTI_type_node, +- "__builtin_aarch64_simd_ti"); +- (*lang_hooks.types.register_builtin_type) (intEI_type_node, +- "__builtin_aarch64_simd_ei"); +- (*lang_hooks.types.register_builtin_type) (intOI_type_node, +- "__builtin_aarch64_simd_oi"); +- (*lang_hooks.types.register_builtin_type) (intCI_type_node, +- "__builtin_aarch64_simd_ci"); +- (*lang_hooks.types.register_builtin_type) (intXI_type_node, +- "__builtin_aarch64_simd_xi"); +- +- /* Pointers to vector types. */ +- V8QI_pointer_node = build_pointer_type (V8QI_type_node); +- V4HI_pointer_node = build_pointer_type (V4HI_type_node); +- V2SI_pointer_node = build_pointer_type (V2SI_type_node); +- V2SF_pointer_node = build_pointer_type (V2SF_type_node); +- V16QI_pointer_node = build_pointer_type (V16QI_type_node); +- V8HI_pointer_node = build_pointer_type (V8HI_type_node); +- V4SI_pointer_node = build_pointer_type (V4SI_type_node); +- V4SF_pointer_node = build_pointer_type (V4SF_type_node); +- V2DI_pointer_node = build_pointer_type (V2DI_type_node); +- V2DF_pointer_node = build_pointer_type (V2DF_type_node); +- +- /* Operations which return results as pairs. */ +- void_ftype_pv8qi_v8qi_v8qi = +- build_function_type_list (void_type_node, V8QI_pointer_node, +- V8QI_type_node, V8QI_type_node, NULL); +- void_ftype_pv4hi_v4hi_v4hi = +- build_function_type_list (void_type_node, V4HI_pointer_node, +- V4HI_type_node, V4HI_type_node, NULL); +- void_ftype_pv2si_v2si_v2si = +- build_function_type_list (void_type_node, V2SI_pointer_node, +- V2SI_type_node, V2SI_type_node, NULL); +- void_ftype_pv2sf_v2sf_v2sf = +- build_function_type_list (void_type_node, V2SF_pointer_node, +- V2SF_type_node, V2SF_type_node, NULL); +- void_ftype_pdi_di_di = +- build_function_type_list (void_type_node, intDI_pointer_node, +- aarch64_simd_intDI_type_node, +- aarch64_simd_intDI_type_node, NULL); +- void_ftype_pv16qi_v16qi_v16qi = +- build_function_type_list (void_type_node, V16QI_pointer_node, +- V16QI_type_node, V16QI_type_node, NULL); +- void_ftype_pv8hi_v8hi_v8hi = +- build_function_type_list (void_type_node, V8HI_pointer_node, +- V8HI_type_node, V8HI_type_node, NULL); +- void_ftype_pv4si_v4si_v4si = +- build_function_type_list (void_type_node, V4SI_pointer_node, +- V4SI_type_node, V4SI_type_node, NULL); +- void_ftype_pv4sf_v4sf_v4sf = +- build_function_type_list (void_type_node, V4SF_pointer_node, +- V4SF_type_node, V4SF_type_node, NULL); +- void_ftype_pv2di_v2di_v2di = +- build_function_type_list (void_type_node, V2DI_pointer_node, +- V2DI_type_node, V2DI_type_node, NULL); +- void_ftype_pv2df_v2df_v2df = +- build_function_type_list (void_type_node, V2DF_pointer_node, +- V2DF_type_node, V2DF_type_node, NULL); +- +- dreg_types[0] = V8QI_type_node; +- dreg_types[1] = V4HI_type_node; +- dreg_types[2] = V2SI_type_node; +- dreg_types[3] = V2SF_type_node; +- dreg_types[4] = aarch64_simd_intDI_type_node; +- dreg_types[5] = aarch64_simd_double_type_node; +- +- qreg_types[0] = V16QI_type_node; +- qreg_types[1] = V8HI_type_node; +- qreg_types[2] = V4SI_type_node; +- qreg_types[3] = V4SF_type_node; +- qreg_types[4] = V2DI_type_node; +- qreg_types[5] = V2DF_type_node; +- +- /* If NUM_DREG_TYPES != NUM_QREG_TYPES, we will need separate nested loops +- for qreg and dreg reinterp inits. */ +- for (i = 0; i < NUM_DREG_TYPES; i++) +- { +- int j; +- for (j = 0; j < NUM_DREG_TYPES; j++) +- { +- reinterp_ftype_dreg[i][j] +- = build_function_type_list (dreg_types[i], dreg_types[j], NULL); +- reinterp_ftype_qreg[i][j] +- = build_function_type_list (qreg_types[i], qreg_types[j], NULL); +- } +- } +- + for (i = 0; i < ARRAY_SIZE (aarch64_simd_builtin_data); i++, fcode++) + { ++ bool print_type_signature_p = false; ++ char type_signature[SIMD_MAX_BUILTIN_ARGS] = { 0 }; + aarch64_simd_builtin_datum *d = &aarch64_simd_builtin_data[i]; + const char *const modenames[] = +- { +- "v8qi", "v4hi", "v2si", "v2sf", "di", "df", +- "v16qi", "v8hi", "v4si", "v4sf", "v2di", "v2df", +- "ti", "ei", "oi", "xi", "si", "hi", "qi" +- }; ++ { ++ "v8qi", "v4hi", "v2si", "v2sf", "di", "df", ++ "v16qi", "v8hi", "v4si", "v4sf", "v2di", "v2df", ++ "ti", "ei", "oi", "xi", "si", "sf", "hi", "qi" ++ }; ++ const enum machine_mode modes[] = ++ { ++ V8QImode, V4HImode, V2SImode, V2SFmode, DImode, DFmode, ++ V16QImode, V8HImode, V4SImode, V4SFmode, V2DImode, ++ V2DFmode, TImode, EImode, OImode, XImode, SImode, ++ SFmode, HImode, QImode ++ }; + char namebuf[60]; + tree ftype = NULL; + tree fndecl = NULL; +- int is_load = 0; +- int is_store = 0; + + gcc_assert (ARRAY_SIZE (modenames) == T_MAX); + + d->fcode = fcode; + +- switch (d->itype) ++ /* We must track two variables here. op_num is ++ the operand number as in the RTL pattern. This is ++ required to access the mode (e.g. V4SF mode) of the ++ argument, from which the base type can be derived. ++ arg_num is an index in to the qualifiers data, which ++ gives qualifiers to the type (e.g. const unsigned). ++ The reason these two variables may differ by one is the ++ void return type. While all return types take the 0th entry ++ in the qualifiers array, there is no operand for them in the ++ RTL pattern. */ ++ int op_num = insn_data[d->code].n_operands - 1; ++ int arg_num = d->qualifiers[0] & qualifier_void ++ ? op_num + 1 ++ : op_num; ++ tree return_type = void_type_node, args = void_list_node; ++ tree eltype; ++ ++ /* Build a function type directly from the insn_data for this ++ builtin. The build_function_type () function takes care of ++ removing duplicates for us. */ ++ for (; op_num >= 0; arg_num--, op_num--) + { +- case AARCH64_SIMD_LOAD1: +- case AARCH64_SIMD_LOAD1LANE: +- case AARCH64_SIMD_LOADSTRUCT: +- case AARCH64_SIMD_LOADSTRUCTLANE: +- is_load = 1; +- /* Fall through. */ +- case AARCH64_SIMD_STORE1: +- case AARCH64_SIMD_STORE1LANE: +- case AARCH64_SIMD_STORESTRUCT: +- case AARCH64_SIMD_STORESTRUCTLANE: +- if (!is_load) +- is_store = 1; +- /* Fall through. */ +- case AARCH64_SIMD_UNOP: +- case AARCH64_SIMD_BINOP: +- case AARCH64_SIMD_TERNOP: +- case AARCH64_SIMD_QUADOP: +- case AARCH64_SIMD_COMBINE: +- case AARCH64_SIMD_CONVERT: +- case AARCH64_SIMD_CREATE: +- case AARCH64_SIMD_DUP: +- case AARCH64_SIMD_DUPLANE: +- case AARCH64_SIMD_FIXCONV: +- case AARCH64_SIMD_GETLANE: +- case AARCH64_SIMD_LANEMAC: +- case AARCH64_SIMD_LANEMUL: +- case AARCH64_SIMD_LANEMULH: +- case AARCH64_SIMD_LANEMULL: +- case AARCH64_SIMD_LOGICBINOP: +- case AARCH64_SIMD_SCALARMAC: +- case AARCH64_SIMD_SCALARMUL: +- case AARCH64_SIMD_SCALARMULH: +- case AARCH64_SIMD_SCALARMULL: +- case AARCH64_SIMD_SELECT: +- case AARCH64_SIMD_SETLANE: +- case AARCH64_SIMD_SHIFTACC: +- case AARCH64_SIMD_SHIFTIMM: +- case AARCH64_SIMD_SHIFTINSERT: +- case AARCH64_SIMD_SPLIT: +- case AARCH64_SIMD_VTBL: +- case AARCH64_SIMD_VTBX: +- { +- int k; +- tree return_type = void_type_node, args = void_list_node; +- tree eltype; +- /* Build a function type directly from the insn_data for this +- builtin. The build_function_type () function takes care of +- removing duplicates for us. */ ++ enum machine_mode op_mode = insn_data[d->code].operand[op_num].mode; ++ enum aarch64_type_qualifiers qualifiers = d->qualifiers[arg_num]; + +- for (k = insn_data[d->code].n_operands -1; k >= 0; k--) +- { +- /* Skip an internal operand for vget_{low, high}. */ +- if (k == 2 && d->itype == AARCH64_SIMD_SPLIT) +- continue; ++ if (qualifiers & qualifier_unsigned) ++ { ++ type_signature[arg_num] = 'u'; ++ print_type_signature_p = true; ++ } ++ else if (qualifiers & qualifier_poly) ++ { ++ type_signature[arg_num] = 'p'; ++ print_type_signature_p = true; ++ } ++ else ++ type_signature[arg_num] = 's'; + +- if (is_load && k == 1) +- { +- /* AdvSIMD load patterns always have the memory operand +- (a DImode pointer) in the operand 1 position. We +- want a const pointer to the element type in that +- position. */ +- gcc_assert (insn_data[d->code].operand[k].mode == DImode); ++ /* Skip an internal operand for vget_{low, high}. */ ++ if (qualifiers & qualifier_internal) ++ continue; + +- switch (d->mode) +- { +- case T_V8QI: +- case T_V16QI: +- eltype = const_intQI_pointer_node; +- break; ++ /* Some builtins have different user-facing types ++ for certain arguments, encoded in d->mode. */ ++ if (qualifiers & qualifier_map_mode) ++ op_mode = modes[d->mode]; + +- case T_V4HI: +- case T_V8HI: +- eltype = const_intHI_pointer_node; +- break; ++ /* For pointers, we want a pointer to the basic type ++ of the vector. */ ++ if (qualifiers & qualifier_pointer && VECTOR_MODE_P (op_mode)) ++ op_mode = GET_MODE_INNER (op_mode); + +- case T_V2SI: +- case T_V4SI: +- eltype = const_intSI_pointer_node; +- break; ++ eltype = aarch64_build_type (op_mode, ++ qualifiers & qualifier_unsigned, ++ qualifiers & qualifier_poly); + +- case T_V2SF: +- case T_V4SF: +- eltype = const_float_pointer_node; +- break; ++ /* Add qualifiers. */ ++ if (qualifiers & qualifier_const) ++ eltype = build_qualified_type (eltype, TYPE_QUAL_CONST); + +- case T_DI: +- case T_V2DI: +- eltype = const_intDI_pointer_node; +- break; ++ if (qualifiers & qualifier_pointer) ++ eltype = build_pointer_type (eltype); + +- case T_DF: +- case T_V2DF: +- eltype = const_double_pointer_node; +- break; ++ /* If we have reached arg_num == 0, we are at a non-void ++ return type. Otherwise, we are still processing ++ arguments. */ ++ if (arg_num == 0) ++ return_type = eltype; ++ else ++ args = tree_cons (NULL_TREE, eltype, args); ++ } + +- default: +- gcc_unreachable (); +- } +- } +- else if (is_store && k == 0) +- { +- /* Similarly, AdvSIMD store patterns use operand 0 as +- the memory location to store to (a DImode pointer). +- Use a pointer to the element type of the store in +- that position. */ +- gcc_assert (insn_data[d->code].operand[k].mode == DImode); ++ ftype = build_function_type (return_type, args); + +- switch (d->mode) +- { +- case T_V8QI: +- case T_V16QI: +- eltype = intQI_pointer_node; +- break; +- +- case T_V4HI: +- case T_V8HI: +- eltype = intHI_pointer_node; +- break; +- +- case T_V2SI: +- case T_V4SI: +- eltype = intSI_pointer_node; +- break; +- +- case T_V2SF: +- case T_V4SF: +- eltype = float_pointer_node; +- break; +- +- case T_DI: +- case T_V2DI: +- eltype = intDI_pointer_node; +- break; +- +- case T_DF: +- case T_V2DF: +- eltype = double_pointer_node; +- break; +- +- default: +- gcc_unreachable (); +- } +- } +- else +- { +- switch (insn_data[d->code].operand[k].mode) +- { +- case VOIDmode: +- eltype = void_type_node; +- break; +- /* Scalars. */ +- case QImode: +- eltype = aarch64_simd_intQI_type_node; +- break; +- case HImode: +- eltype = aarch64_simd_intHI_type_node; +- break; +- case SImode: +- eltype = aarch64_simd_intSI_type_node; +- break; +- case SFmode: +- eltype = aarch64_simd_float_type_node; +- break; +- case DFmode: +- eltype = aarch64_simd_double_type_node; +- break; +- case DImode: +- eltype = aarch64_simd_intDI_type_node; +- break; +- case TImode: +- eltype = intTI_type_node; +- break; +- case EImode: +- eltype = intEI_type_node; +- break; +- case OImode: +- eltype = intOI_type_node; +- break; +- case CImode: +- eltype = intCI_type_node; +- break; +- case XImode: +- eltype = intXI_type_node; +- break; +- /* 64-bit vectors. */ +- case V8QImode: +- eltype = V8QI_type_node; +- break; +- case V4HImode: +- eltype = V4HI_type_node; +- break; +- case V2SImode: +- eltype = V2SI_type_node; +- break; +- case V2SFmode: +- eltype = V2SF_type_node; +- break; +- /* 128-bit vectors. */ +- case V16QImode: +- eltype = V16QI_type_node; +- break; +- case V8HImode: +- eltype = V8HI_type_node; +- break; +- case V4SImode: +- eltype = V4SI_type_node; +- break; +- case V4SFmode: +- eltype = V4SF_type_node; +- break; +- case V2DImode: +- eltype = V2DI_type_node; +- break; +- case V2DFmode: +- eltype = V2DF_type_node; +- break; +- default: +- gcc_unreachable (); +- } +- } +- +- if (k == 0 && !is_store) +- return_type = eltype; +- else +- args = tree_cons (NULL_TREE, eltype, args); +- } +- ftype = build_function_type (return_type, args); +- } +- break; +- +- case AARCH64_SIMD_RESULTPAIR: +- { +- switch (insn_data[d->code].operand[1].mode) +- { +- case V8QImode: +- ftype = void_ftype_pv8qi_v8qi_v8qi; +- break; +- case V4HImode: +- ftype = void_ftype_pv4hi_v4hi_v4hi; +- break; +- case V2SImode: +- ftype = void_ftype_pv2si_v2si_v2si; +- break; +- case V2SFmode: +- ftype = void_ftype_pv2sf_v2sf_v2sf; +- break; +- case DImode: +- ftype = void_ftype_pdi_di_di; +- break; +- case V16QImode: +- ftype = void_ftype_pv16qi_v16qi_v16qi; +- break; +- case V8HImode: +- ftype = void_ftype_pv8hi_v8hi_v8hi; +- break; +- case V4SImode: +- ftype = void_ftype_pv4si_v4si_v4si; +- break; +- case V4SFmode: +- ftype = void_ftype_pv4sf_v4sf_v4sf; +- break; +- case V2DImode: +- ftype = void_ftype_pv2di_v2di_v2di; +- break; +- case V2DFmode: +- ftype = void_ftype_pv2df_v2df_v2df; +- break; +- default: +- gcc_unreachable (); +- } +- } +- break; +- +- case AARCH64_SIMD_REINTERP: +- { +- /* We iterate over 6 doubleword types, then 6 quadword +- types. */ +- int rhs_d = d->mode % NUM_DREG_TYPES; +- int rhs_q = (d->mode - NUM_DREG_TYPES) % NUM_QREG_TYPES; +- switch (insn_data[d->code].operand[0].mode) +- { +- case V8QImode: +- ftype = reinterp_ftype_dreg[0][rhs_d]; +- break; +- case V4HImode: +- ftype = reinterp_ftype_dreg[1][rhs_d]; +- break; +- case V2SImode: +- ftype = reinterp_ftype_dreg[2][rhs_d]; +- break; +- case V2SFmode: +- ftype = reinterp_ftype_dreg[3][rhs_d]; +- break; +- case DImode: +- ftype = reinterp_ftype_dreg[4][rhs_d]; +- break; +- case DFmode: +- ftype = reinterp_ftype_dreg[5][rhs_d]; +- break; +- case V16QImode: +- ftype = reinterp_ftype_qreg[0][rhs_q]; +- break; +- case V8HImode: +- ftype = reinterp_ftype_qreg[1][rhs_q]; +- break; +- case V4SImode: +- ftype = reinterp_ftype_qreg[2][rhs_q]; +- break; +- case V4SFmode: +- ftype = reinterp_ftype_qreg[3][rhs_q]; +- break; +- case V2DImode: +- ftype = reinterp_ftype_qreg[4][rhs_q]; +- break; +- case V2DFmode: +- ftype = reinterp_ftype_qreg[5][rhs_q]; +- break; +- default: +- gcc_unreachable (); +- } +- } +- break; +- +- default: +- gcc_unreachable (); +- } + gcc_assert (ftype != NULL); + +- snprintf (namebuf, sizeof (namebuf), "__builtin_aarch64_%s%s", +- d->name, modenames[d->mode]); ++ if (print_type_signature_p) ++ snprintf (namebuf, sizeof (namebuf), "__builtin_aarch64_%s%s_%s", ++ d->name, modenames[d->mode], type_signature); ++ else ++ snprintf (namebuf, sizeof (namebuf), "__builtin_aarch64_%s%s", ++ d->name, modenames[d->mode]); + + fndecl = add_builtin_function (namebuf, ftype, fcode, BUILT_IN_MD, + NULL, NULL_TREE); +@@ -983,8 +732,6 @@ + SIMD_ARG_STOP + } builtin_simd_arg; + +-#define SIMD_MAX_BUILTIN_ARGS 5 +- + static rtx + aarch64_simd_expand_args (rtx target, int icode, int have_retval, + tree exp, ...) +@@ -1110,99 +857,58 @@ + { + aarch64_simd_builtin_datum *d = + &aarch64_simd_builtin_data[fcode - (AARCH64_SIMD_BUILTIN_BASE + 1)]; +- aarch64_simd_itype itype = d->itype; + enum insn_code icode = d->code; ++ builtin_simd_arg args[SIMD_MAX_BUILTIN_ARGS]; ++ int num_args = insn_data[d->code].n_operands; ++ int is_void = 0; ++ int k; + +- switch (itype) +- { +- case AARCH64_SIMD_UNOP: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_STOP); ++ is_void = !!(d->qualifiers[0] & qualifier_void); + +- case AARCH64_SIMD_BINOP: +- { +- rtx arg2 = expand_normal (CALL_EXPR_ARG (exp, 1)); +- /* Handle constants only if the predicate allows it. */ +- bool op1_const_int_p = +- (CONST_INT_P (arg2) +- && (*insn_data[icode].operand[2].predicate) +- (arg2, insn_data[icode].operand[2].mode)); +- return aarch64_simd_expand_args +- (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, +- op1_const_int_p ? SIMD_ARG_CONSTANT : SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_STOP); +- } ++ num_args += is_void; + +- case AARCH64_SIMD_TERNOP: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_STOP); ++ for (k = 1; k < num_args; k++) ++ { ++ /* We have four arrays of data, each indexed in a different fashion. ++ qualifiers - element 0 always describes the function return type. ++ operands - element 0 is either the operand for return value (if ++ the function has a non-void return type) or the operand for the ++ first argument. ++ expr_args - element 0 always holds the first argument. ++ args - element 0 is always used for the return type. */ ++ int qualifiers_k = k; ++ int operands_k = k - is_void; ++ int expr_args_k = k - 1; + +- case AARCH64_SIMD_QUADOP: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_STOP); +- case AARCH64_SIMD_LOAD1: +- case AARCH64_SIMD_LOADSTRUCT: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ if (d->qualifiers[qualifiers_k] & qualifier_immediate) ++ args[k] = SIMD_ARG_CONSTANT; ++ else if (d->qualifiers[qualifiers_k] & qualifier_maybe_immediate) ++ { ++ rtx arg ++ = expand_normal (CALL_EXPR_ARG (exp, ++ (expr_args_k))); ++ /* Handle constants only if the predicate allows it. */ ++ bool op_const_int_p = ++ (CONST_INT_P (arg) ++ && (*insn_data[icode].operand[operands_k].predicate) ++ (arg, insn_data[icode].operand[operands_k].mode)); ++ args[k] = op_const_int_p ? SIMD_ARG_CONSTANT : SIMD_ARG_COPY_TO_REG; ++ } ++ else ++ args[k] = SIMD_ARG_COPY_TO_REG; + +- case AARCH64_SIMD_STORE1: +- case AARCH64_SIMD_STORESTRUCT: +- return aarch64_simd_expand_args (target, icode, 0, exp, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ } ++ args[k] = SIMD_ARG_STOP; + +- case AARCH64_SIMD_REINTERP: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); +- +- case AARCH64_SIMD_CREATE: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); +- +- case AARCH64_SIMD_COMBINE: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); +- +- case AARCH64_SIMD_GETLANE: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_CONSTANT, +- SIMD_ARG_STOP); +- +- case AARCH64_SIMD_SETLANE: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_CONSTANT, +- SIMD_ARG_STOP); +- +- case AARCH64_SIMD_SHIFTIMM: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_CONSTANT, +- SIMD_ARG_STOP); +- +- case AARCH64_SIMD_SHIFTACC: +- case AARCH64_SIMD_SHIFTINSERT: +- return aarch64_simd_expand_args (target, icode, 1, exp, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_COPY_TO_REG, +- SIMD_ARG_CONSTANT, +- SIMD_ARG_STOP); +- +- default: +- gcc_unreachable (); +- } ++ /* The interface to aarch64_simd_expand_args expects a 0 if ++ the function is void, and a 1 if it is not. */ ++ return aarch64_simd_expand_args ++ (target, icode, !is_void, exp, ++ args[1], ++ args[2], ++ args[3], ++ args[4], ++ SIMD_ARG_STOP); + } + + /* Expand an expression EXP that calls a built-in function, +@@ -1242,11 +948,11 @@ + #define AARCH64_CHECK_BUILTIN_MODE(C, N) 1 + #define AARCH64_FIND_FRINT_VARIANT(N) \ + (AARCH64_CHECK_BUILTIN_MODE (2, D) \ +- ? aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_##N##v2df] \ ++ ? aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOP_##N##v2df] \ + : (AARCH64_CHECK_BUILTIN_MODE (4, S) \ +- ? aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_##N##v4sf] \ ++ ? aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOP_##N##v4sf] \ + : (AARCH64_CHECK_BUILTIN_MODE (2, S) \ +- ? aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_##N##v2sf] \ ++ ? aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOP_##N##v2sf] \ + : NULL_TREE))) + if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_NORMAL) + { +@@ -1259,30 +965,82 @@ + && in_mode == N##Fmode && in_n == C) + case BUILT_IN_FLOOR: + case BUILT_IN_FLOORF: +- return AARCH64_FIND_FRINT_VARIANT (frintm); ++ return AARCH64_FIND_FRINT_VARIANT (floor); + case BUILT_IN_CEIL: + case BUILT_IN_CEILF: +- return AARCH64_FIND_FRINT_VARIANT (frintp); ++ return AARCH64_FIND_FRINT_VARIANT (ceil); + case BUILT_IN_TRUNC: + case BUILT_IN_TRUNCF: +- return AARCH64_FIND_FRINT_VARIANT (frintz); ++ return AARCH64_FIND_FRINT_VARIANT (btrunc); + case BUILT_IN_ROUND: + case BUILT_IN_ROUNDF: +- return AARCH64_FIND_FRINT_VARIANT (frinta); ++ return AARCH64_FIND_FRINT_VARIANT (round); + case BUILT_IN_NEARBYINT: + case BUILT_IN_NEARBYINTF: +- return AARCH64_FIND_FRINT_VARIANT (frinti); ++ return AARCH64_FIND_FRINT_VARIANT (nearbyint); + case BUILT_IN_SQRT: + case BUILT_IN_SQRTF: + return AARCH64_FIND_FRINT_VARIANT (sqrt); + #undef AARCH64_CHECK_BUILTIN_MODE + #define AARCH64_CHECK_BUILTIN_MODE(C, N) \ ++ (out_mode == SImode && out_n == C \ ++ && in_mode == N##Imode && in_n == C) ++ case BUILT_IN_CLZ: ++ { ++ if (AARCH64_CHECK_BUILTIN_MODE (4, S)) ++ return aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOP_clzv4si]; ++ return NULL_TREE; ++ } ++#undef AARCH64_CHECK_BUILTIN_MODE ++#define AARCH64_CHECK_BUILTIN_MODE(C, N) \ + (out_mode == N##Imode && out_n == C \ + && in_mode == N##Fmode && in_n == C) + case BUILT_IN_LFLOOR: +- return AARCH64_FIND_FRINT_VARIANT (fcvtms); ++ case BUILT_IN_IFLOORF: ++ { ++ enum aarch64_builtins builtin; ++ if (AARCH64_CHECK_BUILTIN_MODE (2, D)) ++ builtin = AARCH64_SIMD_BUILTIN_UNOP_lfloorv2dfv2di; ++ else if (AARCH64_CHECK_BUILTIN_MODE (4, S)) ++ builtin = AARCH64_SIMD_BUILTIN_UNOP_lfloorv4sfv4si; ++ else if (AARCH64_CHECK_BUILTIN_MODE (2, S)) ++ builtin = AARCH64_SIMD_BUILTIN_UNOP_lfloorv2sfv2si; ++ else ++ return NULL_TREE; ++ ++ return aarch64_builtin_decls[builtin]; ++ } + case BUILT_IN_LCEIL: +- return AARCH64_FIND_FRINT_VARIANT (fcvtps); ++ case BUILT_IN_ICEILF: ++ { ++ enum aarch64_builtins builtin; ++ if (AARCH64_CHECK_BUILTIN_MODE (2, D)) ++ builtin = AARCH64_SIMD_BUILTIN_UNOP_lceilv2dfv2di; ++ else if (AARCH64_CHECK_BUILTIN_MODE (4, S)) ++ builtin = AARCH64_SIMD_BUILTIN_UNOP_lceilv4sfv4si; ++ else if (AARCH64_CHECK_BUILTIN_MODE (2, S)) ++ builtin = AARCH64_SIMD_BUILTIN_UNOP_lceilv2sfv2si; ++ else ++ return NULL_TREE; ++ ++ return aarch64_builtin_decls[builtin]; ++ } ++ case BUILT_IN_LROUND: ++ case BUILT_IN_IROUNDF: ++ { ++ enum aarch64_builtins builtin; ++ if (AARCH64_CHECK_BUILTIN_MODE (2, D)) ++ builtin = AARCH64_SIMD_BUILTIN_UNOP_lroundv2dfv2di; ++ else if (AARCH64_CHECK_BUILTIN_MODE (4, S)) ++ builtin = AARCH64_SIMD_BUILTIN_UNOP_lroundv4sfv4si; ++ else if (AARCH64_CHECK_BUILTIN_MODE (2, S)) ++ builtin = AARCH64_SIMD_BUILTIN_UNOP_lroundv2sfv2si; ++ else ++ return NULL_TREE; ++ ++ return aarch64_builtin_decls[builtin]; ++ } ++ + default: + return NULL_TREE; + } +@@ -1290,5 +1048,160 @@ + + return NULL_TREE; + } ++ ++#undef VAR1 ++#define VAR1(T, N, MAP, A) \ ++ case AARCH64_SIMD_BUILTIN_##T##_##N##A: ++ ++tree ++aarch64_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *args, ++ bool ignore ATTRIBUTE_UNUSED) ++{ ++ int fcode = DECL_FUNCTION_CODE (fndecl); ++ tree type = TREE_TYPE (TREE_TYPE (fndecl)); ++ ++ switch (fcode) ++ { ++ BUILTIN_VALLDI (UNOP, abs, 2) ++ return fold_build1 (ABS_EXPR, type, args[0]); ++ break; ++ BUILTIN_VALLDI (BINOP, cmge, 0) ++ return fold_build2 (GE_EXPR, type, args[0], args[1]); ++ break; ++ BUILTIN_VALLDI (BINOP, cmgt, 0) ++ return fold_build2 (GT_EXPR, type, args[0], args[1]); ++ break; ++ BUILTIN_VALLDI (BINOP, cmeq, 0) ++ return fold_build2 (EQ_EXPR, type, args[0], args[1]); ++ break; ++ BUILTIN_VSDQ_I_DI (BINOP, cmtst, 0) ++ { ++ tree and_node = fold_build2 (BIT_AND_EXPR, type, args[0], args[1]); ++ tree vec_zero_node = build_zero_cst (type); ++ return fold_build2 (NE_EXPR, type, and_node, vec_zero_node); ++ break; ++ } ++ VAR1 (UNOP, floatv2si, 2, v2sf) ++ VAR1 (UNOP, floatv4si, 2, v4sf) ++ VAR1 (UNOP, floatv2di, 2, v2df) ++ return fold_build1 (FLOAT_EXPR, type, args[0]); ++ default: ++ break; ++ } ++ ++ return NULL_TREE; ++} ++ ++bool ++aarch64_gimple_fold_builtin (gimple_stmt_iterator *gsi) ++{ ++ bool changed = false; ++ gimple stmt = gsi_stmt (*gsi); ++ tree call = gimple_call_fn (stmt); ++ tree fndecl; ++ gimple new_stmt = NULL; ++ if (call) ++ { ++ fndecl = gimple_call_fndecl (stmt); ++ if (fndecl) ++ { ++ int fcode = DECL_FUNCTION_CODE (fndecl); ++ int nargs = gimple_call_num_args (stmt); ++ tree *args = (nargs > 0 ++ ? gimple_call_arg_ptr (stmt, 0) ++ : &error_mark_node); ++ ++ switch (fcode) ++ { ++ BUILTIN_VALL (UNOP, reduc_splus_, 10) ++ new_stmt = gimple_build_assign_with_ops ( ++ REDUC_PLUS_EXPR, ++ gimple_call_lhs (stmt), ++ args[0], ++ NULL_TREE); ++ break; ++ BUILTIN_VDQIF (UNOP, reduc_smax_, 10) ++ new_stmt = gimple_build_assign_with_ops ( ++ REDUC_MAX_EXPR, ++ gimple_call_lhs (stmt), ++ args[0], ++ NULL_TREE); ++ break; ++ BUILTIN_VDQIF (UNOP, reduc_smin_, 10) ++ new_stmt = gimple_build_assign_with_ops ( ++ REDUC_MIN_EXPR, ++ gimple_call_lhs (stmt), ++ args[0], ++ NULL_TREE); ++ break; ++ ++ default: ++ break; ++ } ++ } ++ } ++ ++ if (new_stmt) ++ { ++ gsi_replace (gsi, new_stmt, true); ++ changed = true; ++ } ++ ++ return changed; ++} ++ + #undef AARCH64_CHECK_BUILTIN_MODE + #undef AARCH64_FIND_FRINT_VARIANT ++#undef BUILTIN_DX ++#undef BUILTIN_SDQ_I ++#undef BUILTIN_SD_HSI ++#undef BUILTIN_V2F ++#undef BUILTIN_VALL ++#undef BUILTIN_VB ++#undef BUILTIN_VD ++#undef BUILTIN_VDC ++#undef BUILTIN_VDIC ++#undef BUILTIN_VDN ++#undef BUILTIN_VDQ ++#undef BUILTIN_VDQF ++#undef BUILTIN_VDQH ++#undef BUILTIN_VDQHS ++#undef BUILTIN_VDQIF ++#undef BUILTIN_VDQM ++#undef BUILTIN_VDQV ++#undef BUILTIN_VDQ_BHSI ++#undef BUILTIN_VDQ_I ++#undef BUILTIN_VDW ++#undef BUILTIN_VD_BHSI ++#undef BUILTIN_VD_HSI ++#undef BUILTIN_VD_RE ++#undef BUILTIN_VQ ++#undef BUILTIN_VQN ++#undef BUILTIN_VQW ++#undef BUILTIN_VQ_HSI ++#undef BUILTIN_VQ_S ++#undef BUILTIN_VSDQ_HSI ++#undef BUILTIN_VSDQ_I ++#undef BUILTIN_VSDQ_I_BHSI ++#undef BUILTIN_VSDQ_I_DI ++#undef BUILTIN_VSD_HSI ++#undef BUILTIN_VSQN_HSDI ++#undef BUILTIN_VSTRUCT ++#undef CF0 ++#undef CF1 ++#undef CF2 ++#undef CF3 ++#undef CF4 ++#undef CF10 ++#undef VAR1 ++#undef VAR2 ++#undef VAR3 ++#undef VAR4 ++#undef VAR5 ++#undef VAR6 ++#undef VAR7 ++#undef VAR8 ++#undef VAR9 ++#undef VAR10 ++#undef VAR11 ++ +--- a/src/gcc/config/aarch64/aarch64-tune.md ++++ b/src/gcc/config/aarch64/aarch64-tune.md +@@ -1,5 +1,5 @@ + ;; -*- buffer-read-only: t -*- + ;; Generated automatically by gentune.sh from aarch64-cores.def + (define_attr "tune" +- "cortexa53,cortexa57,large,small" ++ "cortexa53,cortexa15" + (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) +--- a/src/gcc/config/aarch64/aarch64-protos.h ++++ b/src/gcc/config/aarch64/aarch64-protos.h +@@ -68,6 +68,24 @@ + Each of of these represents a thread-local symbol, and corresponds to the + thread local storage relocation operator for the symbol being referred to. + ++ SYMBOL_TINY_ABSOLUTE ++ ++ Generate symbol accesses as a PC relative address using a single ++ instruction. To compute the address of symbol foo, we generate: ++ ++ ADR x0, foo ++ ++ SYMBOL_TINY_GOT ++ ++ Generate symbol accesses via the GOT using a single PC relative ++ instruction. To compute the address of symbol foo, we generate: ++ ++ ldr t0, :got:foo ++ ++ The value of foo can subsequently read using: ++ ++ ldrb t0, [t0] ++ + SYMBOL_FORCE_TO_MEM : Global variables are addressed using + constant pool. All variable addresses are spilled into constant + pools. The constant pools themselves are addressed using PC +@@ -81,6 +99,8 @@ + SYMBOL_SMALL_TLSDESC, + SYMBOL_SMALL_GOTTPREL, + SYMBOL_SMALL_TPREL, ++ SYMBOL_TINY_ABSOLUTE, ++ SYMBOL_TINY_GOT, + SYMBOL_FORCE_TO_MEM + }; + +@@ -126,25 +146,55 @@ + const int FP2FP; + }; + ++/* Cost for vector insn classes. */ ++struct cpu_vector_cost ++{ ++ const int scalar_stmt_cost; /* Cost of any scalar operation, ++ excluding load and store. */ ++ const int scalar_load_cost; /* Cost of scalar load. */ ++ const int scalar_store_cost; /* Cost of scalar store. */ ++ const int vec_stmt_cost; /* Cost of any vector operation, ++ excluding load, store, ++ vector-to-scalar and ++ scalar-to-vector operation. */ ++ const int vec_to_scalar_cost; /* Cost of vec-to-scalar operation. */ ++ const int scalar_to_vec_cost; /* Cost of scalar-to-vector ++ operation. */ ++ const int vec_align_load_cost; /* Cost of aligned vector load. */ ++ const int vec_unalign_load_cost; /* Cost of unaligned vector load. */ ++ const int vec_unalign_store_cost; /* Cost of unaligned vector store. */ ++ const int vec_store_cost; /* Cost of vector store. */ ++ const int cond_taken_branch_cost; /* Cost of taken branch. */ ++ const int cond_not_taken_branch_cost; /* Cost of not taken branch. */ ++}; ++ + struct tune_params + { + const struct cpu_rtx_cost_table *const insn_extra_cost; + const struct cpu_addrcost_table *const addr_cost; + const struct cpu_regmove_cost *const regmove_cost; ++ const struct cpu_vector_cost *const vec_costs; + const int memmov_cost; + }; + + HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned); + bool aarch64_bitmask_imm (HOST_WIDE_INT val, enum machine_mode); ++enum aarch64_symbol_type ++aarch64_classify_symbolic_expression (rtx, enum aarch64_symbol_context); + bool aarch64_constant_address_p (rtx); + bool aarch64_float_const_zero_rtx_p (rtx); + bool aarch64_function_arg_regno_p (unsigned); + bool aarch64_gen_movmemqi (rtx *); ++bool aarch64_gimple_fold_builtin (gimple_stmt_iterator *); + bool aarch64_is_extend_from_extract (enum machine_mode, rtx, rtx); + bool aarch64_is_long_call_p (rtx); + bool aarch64_label_mentioned_p (rtx); + bool aarch64_legitimate_pic_operand_p (rtx); + bool aarch64_move_imm (HOST_WIDE_INT, enum machine_mode); ++bool aarch64_mov_operand_p (rtx, enum aarch64_symbol_context, ++ enum machine_mode); ++char *aarch64_output_scalar_simd_mov_immediate (rtx, enum machine_mode); ++char *aarch64_output_simd_mov_immediate (rtx, enum machine_mode, unsigned); + bool aarch64_pad_arg_upward (enum machine_mode, const_tree); + bool aarch64_pad_reg_upward (enum machine_mode, const_tree, bool); + bool aarch64_regno_ok_for_base_p (int, bool); +@@ -151,10 +201,11 @@ + bool aarch64_regno_ok_for_index_p (int, bool); + bool aarch64_simd_imm_scalar_p (rtx x, enum machine_mode mode); + bool aarch64_simd_imm_zero_p (rtx, enum machine_mode); ++bool aarch64_simd_scalar_immediate_valid_for_move (rtx, enum machine_mode); + bool aarch64_simd_shift_imm_p (rtx, enum machine_mode, bool); ++bool aarch64_simd_valid_immediate (rtx, enum machine_mode, bool, ++ struct simd_immediate_info *); + bool aarch64_symbolic_address_p (rtx); +-bool aarch64_symbolic_constant_p (rtx, enum aarch64_symbol_context, +- enum aarch64_symbol_type *); + bool aarch64_uimm12_shift (HOST_WIDE_INT); + const char *aarch64_output_casesi (rtx *); + enum aarch64_symbol_type aarch64_classify_symbol (rtx, +@@ -165,9 +216,6 @@ + int aarch64_hard_regno_mode_ok (unsigned, enum machine_mode); + int aarch64_hard_regno_nregs (unsigned, enum machine_mode); + int aarch64_simd_attr_length_move (rtx); +-int aarch64_simd_immediate_valid_for_move (rtx, enum machine_mode, rtx *, +- int *, unsigned char *, int *, +- int *); + int aarch64_uxt_size (int, HOST_WIDE_INT); + rtx aarch64_final_eh_return_addr (void); + rtx aarch64_legitimize_reload_address (rtx *, enum machine_mode, int, int, int); +@@ -177,6 +225,7 @@ + bool aarch64_simd_mem_operand_p (rtx); + rtx aarch64_simd_vect_par_cnst_half (enum machine_mode, bool); + rtx aarch64_tls_get_addr (void); ++tree aarch64_fold_builtin (tree, int, tree *, bool); + unsigned aarch64_dbx_register_number (unsigned); + unsigned aarch64_trampoline_size (void); + void aarch64_asm_output_labelref (FILE *, const char *); +@@ -216,6 +265,10 @@ + + bool aarch64_split_128bit_move_p (rtx, rtx); + ++void aarch64_split_simd_combine (rtx, rtx, rtx); ++ ++void aarch64_split_simd_move (rtx, rtx); ++ + /* Check for a legitimate floating point constant for FMOV. */ + bool aarch64_float_const_representable_p (rtx); + +@@ -251,6 +304,4 @@ + extern void aarch64_final_prescan_insn (rtx); + extern bool + aarch64_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel); +- +-char* aarch64_output_simd_mov_immediate (rtx *, enum machine_mode, unsigned); + #endif /* GCC_AARCH64_PROTOS_H */ +--- a/src/gcc/config/aarch64/aarch64-simd-builtins.def ++++ b/src/gcc/config/aarch64/aarch64-simd-builtins.def +@@ -18,248 +18,367 @@ + along with GCC; see the file COPYING3. If not see + . */ + +-/* In the list below, the BUILTIN_ macros should +- correspond to the iterator used to construct the instruction's +- patterns in aarch64-simd.md. A helpful idiom to follow when +- adding new builtins is to add a line for each pattern in the md +- file. Thus, ADDP, which has one pattern defined for the VD_BHSI +- iterator, and one for DImode, has two entries below. */ ++/* In the list below, the BUILTIN_ macros expand to create ++ builtins for each of the modes described by . When adding ++ new builtins to this list, a helpful idiom to follow is to add ++ a line for each pattern in the md file. Thus, ADDP, which has one ++ pattern defined for the VD_BHSI iterator, and one for DImode, has two ++ entries below. + +- BUILTIN_VD_RE (CREATE, create) +- BUILTIN_VQ_S (GETLANE, get_lane_signed) +- BUILTIN_VDQ (GETLANE, get_lane_unsigned) +- BUILTIN_VDQF (GETLANE, get_lane) +- VAR1 (GETLANE, get_lane, di) +- BUILTIN_VDC (COMBINE, combine) +- BUILTIN_VB (BINOP, pmul) +- BUILTIN_VDQF (UNOP, sqrt) +- BUILTIN_VD_BHSI (BINOP, addp) +- VAR1 (UNOP, addp, di) ++ Parameter 1 is the 'type' of the intrinsic. This is used to ++ describe the type modifiers (for example; unsigned) applied to ++ each of the parameters to the intrinsic function. + +- BUILTIN_VD_RE (REINTERP, reinterpretdi) +- BUILTIN_VDC (REINTERP, reinterpretv8qi) +- BUILTIN_VDC (REINTERP, reinterpretv4hi) +- BUILTIN_VDC (REINTERP, reinterpretv2si) +- BUILTIN_VDC (REINTERP, reinterpretv2sf) +- BUILTIN_VQ (REINTERP, reinterpretv16qi) +- BUILTIN_VQ (REINTERP, reinterpretv8hi) +- BUILTIN_VQ (REINTERP, reinterpretv4si) +- BUILTIN_VQ (REINTERP, reinterpretv4sf) +- BUILTIN_VQ (REINTERP, reinterpretv2di) +- BUILTIN_VQ (REINTERP, reinterpretv2df) ++ Parameter 2 is the name of the intrinsic. This is appended ++ to `__builtin_aarch64_` to give the intrinsic name ++ as exported to the front-ends. + +- BUILTIN_VDQ_I (BINOP, dup_lane) +- BUILTIN_SDQ_I (BINOP, dup_lane) ++ Parameter 3 describes how to map from the name to the CODE_FOR_ ++ macro holding the RTL pattern for the intrinsic. This mapping is: ++ 0 - CODE_FOR_aarch64_ ++ 1-9 - CODE_FOR_<1-9> ++ 10 - CODE_FOR_. */ ++ ++ BUILTIN_VD_RE (CREATE, create, 0) ++ BUILTIN_VDC (COMBINE, combine, 0) ++ BUILTIN_VB (BINOP, pmul, 0) ++ BUILTIN_VDQF (UNOP, sqrt, 2) ++ BUILTIN_VD_BHSI (BINOP, addp, 0) ++ VAR1 (UNOP, addp, 0, di) ++ VAR1 (UNOP, clz, 2, v4si) ++ ++ BUILTIN_VALL (GETLANE, get_lane, 0) ++ VAR1 (GETLANE, get_lane, 0, di) ++ ++ BUILTIN_VD_RE (REINTERP, reinterpretdi, 0) ++ BUILTIN_VDC (REINTERP, reinterpretv8qi, 0) ++ BUILTIN_VDC (REINTERP, reinterpretv4hi, 0) ++ BUILTIN_VDC (REINTERP, reinterpretv2si, 0) ++ BUILTIN_VDC (REINTERP, reinterpretv2sf, 0) ++ BUILTIN_VQ (REINTERP, reinterpretv16qi, 0) ++ BUILTIN_VQ (REINTERP, reinterpretv8hi, 0) ++ BUILTIN_VQ (REINTERP, reinterpretv4si, 0) ++ BUILTIN_VQ (REINTERP, reinterpretv4sf, 0) ++ BUILTIN_VQ (REINTERP, reinterpretv2di, 0) ++ BUILTIN_VQ (REINTERP, reinterpretv2df, 0) ++ ++ BUILTIN_VDQ_I (BINOP, dup_lane, 0) + /* Implemented by aarch64_qshl. */ +- BUILTIN_VSDQ_I (BINOP, sqshl) +- BUILTIN_VSDQ_I (BINOP, uqshl) +- BUILTIN_VSDQ_I (BINOP, sqrshl) +- BUILTIN_VSDQ_I (BINOP, uqrshl) ++ BUILTIN_VSDQ_I (BINOP, sqshl, 0) ++ BUILTIN_VSDQ_I (BINOP, uqshl, 0) ++ BUILTIN_VSDQ_I (BINOP, sqrshl, 0) ++ BUILTIN_VSDQ_I (BINOP, uqrshl, 0) + /* Implemented by aarch64_. */ +- BUILTIN_VSDQ_I (BINOP, sqadd) +- BUILTIN_VSDQ_I (BINOP, uqadd) +- BUILTIN_VSDQ_I (BINOP, sqsub) +- BUILTIN_VSDQ_I (BINOP, uqsub) ++ BUILTIN_VSDQ_I (BINOP, sqadd, 0) ++ BUILTIN_VSDQ_I (BINOP, uqadd, 0) ++ BUILTIN_VSDQ_I (BINOP, sqsub, 0) ++ BUILTIN_VSDQ_I (BINOP, uqsub, 0) + /* Implemented by aarch64_qadd. */ +- BUILTIN_VSDQ_I (BINOP, suqadd) +- BUILTIN_VSDQ_I (BINOP, usqadd) ++ BUILTIN_VSDQ_I (BINOP, suqadd, 0) ++ BUILTIN_VSDQ_I (BINOP, usqadd, 0) + + /* Implemented by aarch64_get_dreg. */ +- BUILTIN_VDC (GETLANE, get_dregoi) +- BUILTIN_VDC (GETLANE, get_dregci) +- BUILTIN_VDC (GETLANE, get_dregxi) ++ BUILTIN_VDC (GETLANE, get_dregoi, 0) ++ BUILTIN_VDC (GETLANE, get_dregci, 0) ++ BUILTIN_VDC (GETLANE, get_dregxi, 0) + /* Implemented by aarch64_get_qreg. */ +- BUILTIN_VQ (GETLANE, get_qregoi) +- BUILTIN_VQ (GETLANE, get_qregci) +- BUILTIN_VQ (GETLANE, get_qregxi) ++ BUILTIN_VQ (GETLANE, get_qregoi, 0) ++ BUILTIN_VQ (GETLANE, get_qregci, 0) ++ BUILTIN_VQ (GETLANE, get_qregxi, 0) + /* Implemented by aarch64_set_qreg. */ +- BUILTIN_VQ (SETLANE, set_qregoi) +- BUILTIN_VQ (SETLANE, set_qregci) +- BUILTIN_VQ (SETLANE, set_qregxi) ++ BUILTIN_VQ (SETLANE, set_qregoi, 0) ++ BUILTIN_VQ (SETLANE, set_qregci, 0) ++ BUILTIN_VQ (SETLANE, set_qregxi, 0) + /* Implemented by aarch64_ld. */ +- BUILTIN_VDC (LOADSTRUCT, ld2) +- BUILTIN_VDC (LOADSTRUCT, ld3) +- BUILTIN_VDC (LOADSTRUCT, ld4) ++ BUILTIN_VDC (LOADSTRUCT, ld2, 0) ++ BUILTIN_VDC (LOADSTRUCT, ld3, 0) ++ BUILTIN_VDC (LOADSTRUCT, ld4, 0) + /* Implemented by aarch64_ld. */ +- BUILTIN_VQ (LOADSTRUCT, ld2) +- BUILTIN_VQ (LOADSTRUCT, ld3) +- BUILTIN_VQ (LOADSTRUCT, ld4) ++ BUILTIN_VQ (LOADSTRUCT, ld2, 0) ++ BUILTIN_VQ (LOADSTRUCT, ld3, 0) ++ BUILTIN_VQ (LOADSTRUCT, ld4, 0) + /* Implemented by aarch64_st. */ +- BUILTIN_VDC (STORESTRUCT, st2) +- BUILTIN_VDC (STORESTRUCT, st3) +- BUILTIN_VDC (STORESTRUCT, st4) ++ BUILTIN_VDC (STORESTRUCT, st2, 0) ++ BUILTIN_VDC (STORESTRUCT, st3, 0) ++ BUILTIN_VDC (STORESTRUCT, st4, 0) + /* Implemented by aarch64_st. */ +- BUILTIN_VQ (STORESTRUCT, st2) +- BUILTIN_VQ (STORESTRUCT, st3) +- BUILTIN_VQ (STORESTRUCT, st4) ++ BUILTIN_VQ (STORESTRUCT, st2, 0) ++ BUILTIN_VQ (STORESTRUCT, st3, 0) ++ BUILTIN_VQ (STORESTRUCT, st4, 0) + +- BUILTIN_VQW (BINOP, saddl2) +- BUILTIN_VQW (BINOP, uaddl2) +- BUILTIN_VQW (BINOP, ssubl2) +- BUILTIN_VQW (BINOP, usubl2) +- BUILTIN_VQW (BINOP, saddw2) +- BUILTIN_VQW (BINOP, uaddw2) +- BUILTIN_VQW (BINOP, ssubw2) +- BUILTIN_VQW (BINOP, usubw2) ++ BUILTIN_VQW (BINOP, saddl2, 0) ++ BUILTIN_VQW (BINOP, uaddl2, 0) ++ BUILTIN_VQW (BINOP, ssubl2, 0) ++ BUILTIN_VQW (BINOP, usubl2, 0) ++ BUILTIN_VQW (BINOP, saddw2, 0) ++ BUILTIN_VQW (BINOP, uaddw2, 0) ++ BUILTIN_VQW (BINOP, ssubw2, 0) ++ BUILTIN_VQW (BINOP, usubw2, 0) + /* Implemented by aarch64_l. */ +- BUILTIN_VDW (BINOP, saddl) +- BUILTIN_VDW (BINOP, uaddl) +- BUILTIN_VDW (BINOP, ssubl) +- BUILTIN_VDW (BINOP, usubl) ++ BUILTIN_VDW (BINOP, saddl, 0) ++ BUILTIN_VDW (BINOP, uaddl, 0) ++ BUILTIN_VDW (BINOP, ssubl, 0) ++ BUILTIN_VDW (BINOP, usubl, 0) + /* Implemented by aarch64_w. */ +- BUILTIN_VDW (BINOP, saddw) +- BUILTIN_VDW (BINOP, uaddw) +- BUILTIN_VDW (BINOP, ssubw) +- BUILTIN_VDW (BINOP, usubw) ++ BUILTIN_VDW (BINOP, saddw, 0) ++ BUILTIN_VDW (BINOP, uaddw, 0) ++ BUILTIN_VDW (BINOP, ssubw, 0) ++ BUILTIN_VDW (BINOP, usubw, 0) + /* Implemented by aarch64_h. */ +- BUILTIN_VQ_S (BINOP, shadd) +- BUILTIN_VQ_S (BINOP, uhadd) +- BUILTIN_VQ_S (BINOP, srhadd) +- BUILTIN_VQ_S (BINOP, urhadd) ++ BUILTIN_VQ_S (BINOP, shadd, 0) ++ BUILTIN_VQ_S (BINOP, uhadd, 0) ++ BUILTIN_VQ_S (BINOP, srhadd, 0) ++ BUILTIN_VQ_S (BINOP, urhadd, 0) + /* Implemented by aarch64_hn. */ +- BUILTIN_VQN (BINOP, addhn) +- BUILTIN_VQN (BINOP, raddhn) ++ BUILTIN_VQN (BINOP, addhn, 0) ++ BUILTIN_VQN (BINOP, raddhn, 0) + /* Implemented by aarch64_hn2. */ +- BUILTIN_VQN (TERNOP, addhn2) +- BUILTIN_VQN (TERNOP, raddhn2) ++ BUILTIN_VQN (TERNOP, addhn2, 0) ++ BUILTIN_VQN (TERNOP, raddhn2, 0) + +- BUILTIN_VSQN_HSDI (UNOP, sqmovun) ++ BUILTIN_VSQN_HSDI (UNOP, sqmovun, 0) + /* Implemented by aarch64_qmovn. */ +- BUILTIN_VSQN_HSDI (UNOP, sqmovn) +- BUILTIN_VSQN_HSDI (UNOP, uqmovn) ++ BUILTIN_VSQN_HSDI (UNOP, sqmovn, 0) ++ BUILTIN_VSQN_HSDI (UNOP, uqmovn, 0) + /* Implemented by aarch64_s. */ +- BUILTIN_VSDQ_I_BHSI (UNOP, sqabs) +- BUILTIN_VSDQ_I_BHSI (UNOP, sqneg) ++ BUILTIN_VSDQ_I_BHSI (UNOP, sqabs, 0) ++ BUILTIN_VSDQ_I_BHSI (UNOP, sqneg, 0) + +- BUILTIN_VSD_HSI (QUADOP, sqdmlal_lane) +- BUILTIN_VSD_HSI (QUADOP, sqdmlsl_lane) +- BUILTIN_VSD_HSI (QUADOP, sqdmlal_laneq) +- BUILTIN_VSD_HSI (QUADOP, sqdmlsl_laneq) +- BUILTIN_VQ_HSI (TERNOP, sqdmlal2) +- BUILTIN_VQ_HSI (TERNOP, sqdmlsl2) +- BUILTIN_VQ_HSI (QUADOP, sqdmlal2_lane) +- BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_lane) +- BUILTIN_VQ_HSI (QUADOP, sqdmlal2_laneq) +- BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_laneq) +- BUILTIN_VQ_HSI (TERNOP, sqdmlal2_n) +- BUILTIN_VQ_HSI (TERNOP, sqdmlsl2_n) ++ BUILTIN_VSD_HSI (QUADOP, sqdmlal_lane, 0) ++ BUILTIN_VSD_HSI (QUADOP, sqdmlsl_lane, 0) ++ BUILTIN_VSD_HSI (QUADOP, sqdmlal_laneq, 0) ++ BUILTIN_VSD_HSI (QUADOP, sqdmlsl_laneq, 0) ++ BUILTIN_VQ_HSI (TERNOP, sqdmlal2, 0) ++ BUILTIN_VQ_HSI (TERNOP, sqdmlsl2, 0) ++ BUILTIN_VQ_HSI (QUADOP, sqdmlal2_lane, 0) ++ BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_lane, 0) ++ BUILTIN_VQ_HSI (QUADOP, sqdmlal2_laneq, 0) ++ BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_laneq, 0) ++ BUILTIN_VQ_HSI (TERNOP, sqdmlal2_n, 0) ++ BUILTIN_VQ_HSI (TERNOP, sqdmlsl2_n, 0) + /* Implemented by aarch64_sqdmll. */ +- BUILTIN_VSD_HSI (TERNOP, sqdmlal) +- BUILTIN_VSD_HSI (TERNOP, sqdmlsl) ++ BUILTIN_VSD_HSI (TERNOP, sqdmlal, 0) ++ BUILTIN_VSD_HSI (TERNOP, sqdmlsl, 0) + /* Implemented by aarch64_sqdmll_n. */ +- BUILTIN_VD_HSI (TERNOP, sqdmlal_n) +- BUILTIN_VD_HSI (TERNOP, sqdmlsl_n) ++ BUILTIN_VD_HSI (TERNOP, sqdmlal_n, 0) ++ BUILTIN_VD_HSI (TERNOP, sqdmlsl_n, 0) + +- BUILTIN_VSD_HSI (BINOP, sqdmull) +- BUILTIN_VSD_HSI (TERNOP, sqdmull_lane) +- BUILTIN_VD_HSI (TERNOP, sqdmull_laneq) +- BUILTIN_VD_HSI (BINOP, sqdmull_n) +- BUILTIN_VQ_HSI (BINOP, sqdmull2) +- BUILTIN_VQ_HSI (TERNOP, sqdmull2_lane) +- BUILTIN_VQ_HSI (TERNOP, sqdmull2_laneq) +- BUILTIN_VQ_HSI (BINOP, sqdmull2_n) ++ BUILTIN_VSD_HSI (BINOP, sqdmull, 0) ++ BUILTIN_VSD_HSI (TERNOP, sqdmull_lane, 0) ++ BUILTIN_VD_HSI (TERNOP, sqdmull_laneq, 0) ++ BUILTIN_VD_HSI (BINOP, sqdmull_n, 0) ++ BUILTIN_VQ_HSI (BINOP, sqdmull2, 0) ++ BUILTIN_VQ_HSI (TERNOP, sqdmull2_lane, 0) ++ BUILTIN_VQ_HSI (TERNOP, sqdmull2_laneq, 0) ++ BUILTIN_VQ_HSI (BINOP, sqdmull2_n, 0) + /* Implemented by aarch64_sqdmulh. */ +- BUILTIN_VSDQ_HSI (BINOP, sqdmulh) +- BUILTIN_VSDQ_HSI (BINOP, sqrdmulh) ++ BUILTIN_VSDQ_HSI (BINOP, sqdmulh, 0) ++ BUILTIN_VSDQ_HSI (BINOP, sqrdmulh, 0) + /* Implemented by aarch64_sqdmulh_lane. */ +- BUILTIN_VDQHS (TERNOP, sqdmulh_lane) +- BUILTIN_VDQHS (TERNOP, sqdmulh_laneq) +- BUILTIN_VDQHS (TERNOP, sqrdmulh_lane) +- BUILTIN_VDQHS (TERNOP, sqrdmulh_laneq) +- BUILTIN_SD_HSI (TERNOP, sqdmulh_lane) +- BUILTIN_SD_HSI (TERNOP, sqrdmulh_lane) ++ BUILTIN_VDQHS (TERNOP, sqdmulh_lane, 0) ++ BUILTIN_VDQHS (TERNOP, sqdmulh_laneq, 0) ++ BUILTIN_VDQHS (TERNOP, sqrdmulh_lane, 0) ++ BUILTIN_VDQHS (TERNOP, sqrdmulh_laneq, 0) ++ BUILTIN_SD_HSI (TERNOP, sqdmulh_lane, 0) ++ BUILTIN_SD_HSI (TERNOP, sqrdmulh_lane, 0) + +- BUILTIN_VSDQ_I_DI (BINOP, sshl_n) +- BUILTIN_VSDQ_I_DI (BINOP, ushl_n) ++ BUILTIN_VSDQ_I_DI (BINOP, ashl, 3) + /* Implemented by aarch64_shl. */ +- BUILTIN_VSDQ_I_DI (BINOP, sshl) +- BUILTIN_VSDQ_I_DI (BINOP, ushl) +- BUILTIN_VSDQ_I_DI (BINOP, srshl) +- BUILTIN_VSDQ_I_DI (BINOP, urshl) ++ BUILTIN_VSDQ_I_DI (BINOP, sshl, 0) ++ BUILTIN_VSDQ_I_DI (BINOP, ushl, 0) ++ BUILTIN_VSDQ_I_DI (BINOP, srshl, 0) ++ BUILTIN_VSDQ_I_DI (BINOP, urshl, 0) + +- BUILTIN_VSDQ_I_DI (SHIFTIMM, sshr_n) +- BUILTIN_VSDQ_I_DI (SHIFTIMM, ushr_n) ++ BUILTIN_VSDQ_I_DI (SHIFTIMM, ashr, 3) ++ BUILTIN_VSDQ_I_DI (SHIFTIMM, lshr, 3) + /* Implemented by aarch64_shr_n. */ +- BUILTIN_VSDQ_I_DI (SHIFTIMM, srshr_n) +- BUILTIN_VSDQ_I_DI (SHIFTIMM, urshr_n) ++ BUILTIN_VSDQ_I_DI (SHIFTIMM, srshr_n, 0) ++ BUILTIN_VSDQ_I_DI (SHIFTIMM, urshr_n, 0) + /* Implemented by aarch64_sra_n. */ +- BUILTIN_VSDQ_I_DI (SHIFTACC, ssra_n) +- BUILTIN_VSDQ_I_DI (SHIFTACC, usra_n) +- BUILTIN_VSDQ_I_DI (SHIFTACC, srsra_n) +- BUILTIN_VSDQ_I_DI (SHIFTACC, ursra_n) ++ BUILTIN_VSDQ_I_DI (SHIFTACC, ssra_n, 0) ++ BUILTIN_VSDQ_I_DI (SHIFTACC, usra_n, 0) ++ BUILTIN_VSDQ_I_DI (SHIFTACC, srsra_n, 0) ++ BUILTIN_VSDQ_I_DI (SHIFTACC, ursra_n, 0) + /* Implemented by aarch64_shll_n. */ +- BUILTIN_VDW (SHIFTIMM, sshll_n) +- BUILTIN_VDW (SHIFTIMM, ushll_n) ++ BUILTIN_VDW (SHIFTIMM, sshll_n, 0) ++ BUILTIN_VDW (SHIFTIMM, ushll_n, 0) + /* Implemented by aarch64_shll2_n. */ +- BUILTIN_VQW (SHIFTIMM, sshll2_n) +- BUILTIN_VQW (SHIFTIMM, ushll2_n) ++ BUILTIN_VQW (SHIFTIMM, sshll2_n, 0) ++ BUILTIN_VQW (SHIFTIMM, ushll2_n, 0) + /* Implemented by aarch64_qshrn_n. */ +- BUILTIN_VSQN_HSDI (SHIFTIMM, sqshrun_n) +- BUILTIN_VSQN_HSDI (SHIFTIMM, sqrshrun_n) +- BUILTIN_VSQN_HSDI (SHIFTIMM, sqshrn_n) +- BUILTIN_VSQN_HSDI (SHIFTIMM, uqshrn_n) +- BUILTIN_VSQN_HSDI (SHIFTIMM, sqrshrn_n) +- BUILTIN_VSQN_HSDI (SHIFTIMM, uqrshrn_n) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, sqshrun_n, 0) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, sqrshrun_n, 0) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, sqshrn_n, 0) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, uqshrn_n, 0) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, sqrshrn_n, 0) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, uqrshrn_n, 0) + /* Implemented by aarch64_si_n. */ +- BUILTIN_VSDQ_I_DI (SHIFTINSERT, ssri_n) +- BUILTIN_VSDQ_I_DI (SHIFTINSERT, usri_n) +- BUILTIN_VSDQ_I_DI (SHIFTINSERT, ssli_n) +- BUILTIN_VSDQ_I_DI (SHIFTINSERT, usli_n) ++ BUILTIN_VSDQ_I_DI (SHIFTINSERT, ssri_n, 0) ++ BUILTIN_VSDQ_I_DI (SHIFTINSERT, usri_n, 0) ++ BUILTIN_VSDQ_I_DI (SHIFTINSERT, ssli_n, 0) ++ BUILTIN_VSDQ_I_DI (SHIFTINSERT, usli_n, 0) + /* Implemented by aarch64_qshl_n. */ +- BUILTIN_VSDQ_I (SHIFTIMM, sqshlu_n) +- BUILTIN_VSDQ_I (SHIFTIMM, sqshl_n) +- BUILTIN_VSDQ_I (SHIFTIMM, uqshl_n) ++ BUILTIN_VSDQ_I (SHIFTIMM, sqshlu_n, 0) ++ BUILTIN_VSDQ_I (SHIFTIMM, sqshl_n, 0) ++ BUILTIN_VSDQ_I (SHIFTIMM, uqshl_n, 0) + + /* Implemented by aarch64_cm. */ +- BUILTIN_VSDQ_I_DI (BINOP, cmeq) +- BUILTIN_VSDQ_I_DI (BINOP, cmge) +- BUILTIN_VSDQ_I_DI (BINOP, cmgt) +- BUILTIN_VSDQ_I_DI (BINOP, cmle) +- BUILTIN_VSDQ_I_DI (BINOP, cmlt) ++ BUILTIN_VALLDI (BINOP, cmeq, 0) ++ BUILTIN_VALLDI (BINOP, cmge, 0) ++ BUILTIN_VALLDI (BINOP, cmgt, 0) ++ BUILTIN_VALLDI (BINOP, cmle, 0) ++ BUILTIN_VALLDI (BINOP, cmlt, 0) + /* Implemented by aarch64_cm. */ +- BUILTIN_VSDQ_I_DI (BINOP, cmgeu) +- BUILTIN_VSDQ_I_DI (BINOP, cmgtu) +- BUILTIN_VSDQ_I_DI (BINOP, cmtst) ++ BUILTIN_VSDQ_I_DI (BINOP, cmgeu, 0) ++ BUILTIN_VSDQ_I_DI (BINOP, cmgtu, 0) ++ BUILTIN_VSDQ_I_DI (BINOP, cmtst, 0) + +- /* Implemented by aarch64_. */ +- BUILTIN_VDQF (BINOP, fmax) +- BUILTIN_VDQF (BINOP, fmin) +- /* Implemented by aarch64_. */ +- BUILTIN_VDQ_BHSI (BINOP, smax) +- BUILTIN_VDQ_BHSI (BINOP, smin) +- BUILTIN_VDQ_BHSI (BINOP, umax) +- BUILTIN_VDQ_BHSI (BINOP, umin) ++ /* Implemented by reduc_plus_. */ ++ BUILTIN_VALL (UNOP, reduc_splus_, 10) ++ BUILTIN_VDQ (UNOP, reduc_uplus_, 10) + +- /* Implemented by aarch64_frint. */ +- BUILTIN_VDQF (UNOP, frintz) +- BUILTIN_VDQF (UNOP, frintp) +- BUILTIN_VDQF (UNOP, frintm) +- BUILTIN_VDQF (UNOP, frinti) +- BUILTIN_VDQF (UNOP, frintx) +- BUILTIN_VDQF (UNOP, frinta) ++ /* Implemented by reduc__. */ ++ BUILTIN_VDQIF (UNOP, reduc_smax_, 10) ++ BUILTIN_VDQIF (UNOP, reduc_smin_, 10) ++ BUILTIN_VDQ_BHSI (UNOP, reduc_umax_, 10) ++ BUILTIN_VDQ_BHSI (UNOP, reduc_umin_, 10) ++ BUILTIN_VDQF (UNOP, reduc_smax_nan_, 10) ++ BUILTIN_VDQF (UNOP, reduc_smin_nan_, 10) + +- /* Implemented by aarch64_fcvt. */ +- BUILTIN_VDQF (UNOP, fcvtzs) +- BUILTIN_VDQF (UNOP, fcvtzu) +- BUILTIN_VDQF (UNOP, fcvtas) +- BUILTIN_VDQF (UNOP, fcvtau) +- BUILTIN_VDQF (UNOP, fcvtps) +- BUILTIN_VDQF (UNOP, fcvtpu) +- BUILTIN_VDQF (UNOP, fcvtms) +- BUILTIN_VDQF (UNOP, fcvtmu) ++ /* Implemented by 3. ++ smax variants map to fmaxnm, ++ smax_nan variants map to fmax. */ ++ BUILTIN_VDQIF (BINOP, smax, 3) ++ BUILTIN_VDQIF (BINOP, smin, 3) ++ BUILTIN_VDQ_BHSI (BINOP, umax, 3) ++ BUILTIN_VDQ_BHSI (BINOP, umin, 3) ++ BUILTIN_VDQF (BINOP, smax_nan, 3) ++ BUILTIN_VDQF (BINOP, smin_nan, 3) + ++ /* Implemented by 2. */ ++ BUILTIN_VDQF (UNOP, btrunc, 2) ++ BUILTIN_VDQF (UNOP, ceil, 2) ++ BUILTIN_VDQF (UNOP, floor, 2) ++ BUILTIN_VDQF (UNOP, nearbyint, 2) ++ BUILTIN_VDQF (UNOP, rint, 2) ++ BUILTIN_VDQF (UNOP, round, 2) ++ BUILTIN_VDQF (UNOP, frintn, 2) ++ ++ /* Implemented by l2. */ ++ VAR1 (UNOP, lbtruncv2sf, 2, v2si) ++ VAR1 (UNOP, lbtruncv4sf, 2, v4si) ++ VAR1 (UNOP, lbtruncv2df, 2, v2di) ++ ++ VAR1 (UNOP, lbtruncuv2sf, 2, v2si) ++ VAR1 (UNOP, lbtruncuv4sf, 2, v4si) ++ VAR1 (UNOP, lbtruncuv2df, 2, v2di) ++ ++ VAR1 (UNOP, lroundv2sf, 2, v2si) ++ VAR1 (UNOP, lroundv4sf, 2, v4si) ++ VAR1 (UNOP, lroundv2df, 2, v2di) ++ /* Implemented by l2. */ ++ VAR1 (UNOP, lroundsf, 2, si) ++ VAR1 (UNOP, lrounddf, 2, di) ++ ++ VAR1 (UNOP, lrounduv2sf, 2, v2si) ++ VAR1 (UNOP, lrounduv4sf, 2, v4si) ++ VAR1 (UNOP, lrounduv2df, 2, v2di) ++ VAR1 (UNOP, lroundusf, 2, si) ++ VAR1 (UNOP, lroundudf, 2, di) ++ ++ VAR1 (UNOP, lceilv2sf, 2, v2si) ++ VAR1 (UNOP, lceilv4sf, 2, v4si) ++ VAR1 (UNOP, lceilv2df, 2, v2di) ++ ++ VAR1 (UNOP, lceiluv2sf, 2, v2si) ++ VAR1 (UNOP, lceiluv4sf, 2, v4si) ++ VAR1 (UNOP, lceiluv2df, 2, v2di) ++ VAR1 (UNOP, lceilusf, 2, si) ++ VAR1 (UNOP, lceiludf, 2, di) ++ ++ VAR1 (UNOP, lfloorv2sf, 2, v2si) ++ VAR1 (UNOP, lfloorv4sf, 2, v4si) ++ VAR1 (UNOP, lfloorv2df, 2, v2di) ++ ++ VAR1 (UNOP, lflooruv2sf, 2, v2si) ++ VAR1 (UNOP, lflooruv4sf, 2, v4si) ++ VAR1 (UNOP, lflooruv2df, 2, v2di) ++ VAR1 (UNOP, lfloorusf, 2, si) ++ VAR1 (UNOP, lfloorudf, 2, di) ++ ++ VAR1 (UNOP, lfrintnv2sf, 2, v2si) ++ VAR1 (UNOP, lfrintnv4sf, 2, v4si) ++ VAR1 (UNOP, lfrintnv2df, 2, v2di) ++ VAR1 (UNOP, lfrintnsf, 2, si) ++ VAR1 (UNOP, lfrintndf, 2, di) ++ ++ VAR1 (UNOP, lfrintnuv2sf, 2, v2si) ++ VAR1 (UNOP, lfrintnuv4sf, 2, v4si) ++ VAR1 (UNOP, lfrintnuv2df, 2, v2di) ++ VAR1 (UNOP, lfrintnusf, 2, si) ++ VAR1 (UNOP, lfrintnudf, 2, di) ++ ++ /* Implemented by 2. */ ++ VAR1 (UNOP, floatv2si, 2, v2sf) ++ VAR1 (UNOP, floatv4si, 2, v4sf) ++ VAR1 (UNOP, floatv2di, 2, v2df) ++ ++ VAR1 (UNOP, floatunsv2si, 2, v2sf) ++ VAR1 (UNOP, floatunsv4si, 2, v4sf) ++ VAR1 (UNOP, floatunsv2di, 2, v2df) ++ + /* Implemented by + aarch64_. */ +- BUILTIN_VALL (BINOP, zip1) +- BUILTIN_VALL (BINOP, zip2) +- BUILTIN_VALL (BINOP, uzp1) +- BUILTIN_VALL (BINOP, uzp2) +- BUILTIN_VALL (BINOP, trn1) +- BUILTIN_VALL (BINOP, trn2) ++ BUILTIN_VALL (BINOP, zip1, 0) ++ BUILTIN_VALL (BINOP, zip2, 0) ++ BUILTIN_VALL (BINOP, uzp1, 0) ++ BUILTIN_VALL (BINOP, uzp2, 0) ++ BUILTIN_VALL (BINOP, trn1, 0) ++ BUILTIN_VALL (BINOP, trn2, 0) + ++ /* Implemented by ++ aarch64_frecp. */ ++ BUILTIN_GPF (UNOP, frecpe, 0) ++ BUILTIN_GPF (BINOP, frecps, 0) ++ BUILTIN_GPF (UNOP, frecpx, 0) ++ ++ BUILTIN_VDQF (UNOP, frecpe, 0) ++ BUILTIN_VDQF (BINOP, frecps, 0) ++ ++ BUILTIN_VALLDI (UNOP, abs, 2) ++ ++ VAR1 (UNOP, vec_unpacks_hi_, 10, v4sf) ++ VAR1 (BINOP, float_truncate_hi_, 0, v4sf) ++ ++ VAR1 (UNOP, float_extend_lo_, 0, v2df) ++ VAR1 (UNOP, float_truncate_lo_, 0, v2sf) ++ + /* Implemented by aarch64_ld1. */ +- BUILTIN_VALL (LOAD1, ld1) ++ BUILTIN_VALL (LOAD1, ld1, 0) + + /* Implemented by aarch64_st1. */ +- BUILTIN_VALL (STORE1, st1) ++ BUILTIN_VALL (STORE1, st1, 0) + ++ /* Implemented by aarch64_crypto_aes. */ ++ VAR1 (BINOPU, crypto_aese, 0, v16qi) ++ VAR1 (BINOPU, crypto_aesd, 0, v16qi) ++ VAR1 (UNOPU, crypto_aesmc, 0, v16qi) ++ VAR1 (UNOPU, crypto_aesimc, 0, v16qi) ++ ++ /* Implemented by aarch64_crypto_sha1. */ ++ VAR1 (UNOPU, crypto_sha1h, 0, si) ++ VAR1 (BINOPU, crypto_sha1su1, 0, v4si) ++ VAR1 (TERNOPU, crypto_sha1c, 0, v4si) ++ VAR1 (TERNOPU, crypto_sha1m, 0, v4si) ++ VAR1 (TERNOPU, crypto_sha1p, 0, v4si) ++ VAR1 (TERNOPU, crypto_sha1su0, 0, v4si) ++ ++ /* Implemented by aarch64_crypto_sha256. */ ++ VAR1 (TERNOPU, crypto_sha256h, 0, v4si) ++ VAR1 (TERNOPU, crypto_sha256h2, 0, v4si) ++ VAR1 (BINOPU, crypto_sha256su0, 0, v4si) ++ VAR1 (TERNOPU, crypto_sha256su1, 0, v4si) ++ ++ /* Implemented by aarch64_crypto_pmull. */ ++ VAR1 (BINOPP, crypto_pmull, 0, di) ++ VAR1 (BINOPP, crypto_pmull, 0, v2di) +--- a/src/gcc/config/aarch64/constraints.md ++++ b/src/gcc/config/aarch64/constraints.md +@@ -75,11 +75,6 @@ + "Integer constant zero." + (match_test "op == const0_rtx")) + +-(define_constraint "Usa" +- "A constraint that matches an absolute symbolic address." +- (and (match_code "const,symbol_ref") +- (match_test "aarch64_symbolic_address_p (op)"))) +- + (define_constraint "Ush" + "A constraint that matches an absolute symbolic address high part." + (and (match_code "high") +@@ -148,10 +143,25 @@ + "@internal + A constraint that matches vector of immediates." + (and (match_code "const_vector") +- (match_test "aarch64_simd_immediate_valid_for_move (op, GET_MODE (op), +- NULL, NULL, NULL, +- NULL, NULL) != 0"))) ++ (match_test "aarch64_simd_valid_immediate (op, GET_MODE (op), ++ false, NULL)"))) + ++(define_constraint "Dh" ++ "@internal ++ A constraint that matches an immediate operand valid for\ ++ AdvSIMD scalar move in HImode." ++ (and (match_code "const_int") ++ (match_test "aarch64_simd_scalar_immediate_valid_for_move (op, ++ HImode)"))) ++ ++(define_constraint "Dq" ++ "@internal ++ A constraint that matches an immediate operand valid for\ ++ AdvSIMD scalar move in QImode." ++ (and (match_code "const_int") ++ (match_test "aarch64_simd_scalar_immediate_valid_for_move (op, ++ QImode)"))) ++ + (define_constraint "Dl" + "@internal + A constraint that matches vector of immediates for left shifts." +--- a/src/gcc/config/aarch64/aarch64.c ++++ b/src/gcc/config/aarch64/aarch64.c +@@ -45,6 +45,8 @@ + #include "gimple.h" + #include "optabs.h" + #include "dwarf2.h" ++#include "cfgloop.h" ++#include "tree-vectorizer.h" + + /* Classifies an address. + +@@ -87,6 +89,15 @@ + enum aarch64_symbol_type symbol_type; + }; + ++struct simd_immediate_info ++{ ++ rtx value; ++ int shift; ++ int element_width; ++ bool mvn; ++ bool msl; ++}; ++ + /* The current code model. */ + enum aarch64_code_model aarch64_cmodel; + +@@ -103,8 +114,6 @@ + static void aarch64_elf_asm_constructor (rtx, int) ATTRIBUTE_UNUSED; + static void aarch64_elf_asm_destructor (rtx, int) ATTRIBUTE_UNUSED; + static void aarch64_override_options_after_change (void); +-static int aarch64_simd_valid_immediate (rtx, enum machine_mode, int, rtx *, +- int *, unsigned char *, int *, int *); + static bool aarch64_vector_mode_supported_p (enum machine_mode); + static unsigned bit_count (unsigned HOST_WIDE_INT); + static bool aarch64_const_vec_all_same_int_p (rtx, +@@ -114,7 +123,7 @@ + const unsigned char *sel); + + /* The processor for which instructions should be scheduled. */ +-enum aarch64_processor aarch64_tune = generic; ++enum aarch64_processor aarch64_tune = cortexa53; + + /* The current tuning set. */ + const struct tune_params *aarch64_tune_params; +@@ -178,14 +187,35 @@ + NAMED_PARAM (FP2FP, 4) + }; + ++/* Generic costs for vector insn classes. */ + #if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 + __extension__ + #endif ++static const struct cpu_vector_cost generic_vector_cost = ++{ ++ NAMED_PARAM (scalar_stmt_cost, 1), ++ NAMED_PARAM (scalar_load_cost, 1), ++ NAMED_PARAM (scalar_store_cost, 1), ++ NAMED_PARAM (vec_stmt_cost, 1), ++ NAMED_PARAM (vec_to_scalar_cost, 1), ++ NAMED_PARAM (scalar_to_vec_cost, 1), ++ NAMED_PARAM (vec_align_load_cost, 1), ++ NAMED_PARAM (vec_unalign_load_cost, 1), ++ NAMED_PARAM (vec_unalign_store_cost, 1), ++ NAMED_PARAM (vec_store_cost, 1), ++ NAMED_PARAM (cond_taken_branch_cost, 3), ++ NAMED_PARAM (cond_not_taken_branch_cost, 1) ++}; ++ ++#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 ++__extension__ ++#endif + static const struct tune_params generic_tunings = + { + &generic_rtx_cost_table, + &generic_addrcost_table, + &generic_regmove_cost, ++ &generic_vector_cost, + NAMED_PARAM (memmov_cost, 4) + }; + +@@ -206,7 +236,7 @@ + {NAME, IDENT, #ARCH, FLAGS | AARCH64_FL_FOR_ARCH##ARCH, &COSTS##_tunings}, + #include "aarch64-cores.def" + #undef AARCH64_CORE +- {"generic", generic, "8", AARCH64_FL_FPSIMD | AARCH64_FL_FOR_ARCH8, &generic_tunings}, ++ {"generic", cortexa53, "8", AARCH64_FL_FPSIMD | AARCH64_FL_FOR_ARCH8, &generic_tunings}, + {NULL, aarch64_none, NULL, 0, NULL} + }; + +@@ -524,13 +554,15 @@ + return; + } + ++ case SYMBOL_TINY_ABSOLUTE: ++ emit_insn (gen_rtx_SET (Pmode, dest, imm)); ++ return; ++ + case SYMBOL_SMALL_GOT: + { + rtx tmp_reg = dest; + if (can_create_pseudo_p ()) +- { +- tmp_reg = gen_reg_rtx (Pmode); +- } ++ tmp_reg = gen_reg_rtx (Pmode); + emit_move_insn (tmp_reg, gen_rtx_HIGH (Pmode, imm)); + emit_insn (gen_ldr_got_small (dest, tmp_reg, imm)); + return; +@@ -581,6 +613,10 @@ + return; + } + ++ case SYMBOL_TINY_GOT: ++ emit_insn (gen_ldr_got_tiny (dest, imm)); ++ return; ++ + default: + gcc_unreachable (); + } +@@ -604,49 +640,85 @@ + { + rtx low_dst; + +- gcc_assert (GET_MODE (dst) == TImode); ++ enum machine_mode src_mode = GET_MODE (src); ++ enum machine_mode dst_mode = GET_MODE (dst); ++ int src_regno = REGNO (src); ++ int dst_regno = REGNO (dst); + ++ gcc_assert (dst_mode == TImode || dst_mode == TFmode); ++ + if (REG_P (dst) && REG_P (src)) + { +- int src_regno = REGNO (src); +- int dst_regno = REGNO (dst); ++ gcc_assert (src_mode == TImode || src_mode == TFmode); + +- gcc_assert (GET_MODE (src) == TImode); +- + /* Handle r -> w, w -> r. */ + if (FP_REGNUM_P (dst_regno) && GP_REGNUM_P (src_regno)) + { +- emit_insn (gen_aarch64_movtilow_di (dst, +- gen_lowpart (word_mode, src))); +- emit_insn (gen_aarch64_movtihigh_di (dst, +- gen_highpart (word_mode, src))); +- return; ++ switch (src_mode) { ++ case TImode: ++ emit_insn ++ (gen_aarch64_movtilow_di (dst, gen_lowpart (word_mode, src))); ++ emit_insn ++ (gen_aarch64_movtihigh_di (dst, gen_highpart (word_mode, src))); ++ return; ++ case TFmode: ++ emit_insn ++ (gen_aarch64_movtflow_di (dst, gen_lowpart (word_mode, src))); ++ emit_insn ++ (gen_aarch64_movtfhigh_di (dst, gen_highpart (word_mode, src))); ++ return; ++ default: ++ gcc_unreachable (); ++ } + } + else if (GP_REGNUM_P (dst_regno) && FP_REGNUM_P (src_regno)) + { +- emit_insn (gen_aarch64_movdi_tilow (gen_lowpart (word_mode, dst), +- src)); +- emit_insn (gen_aarch64_movdi_tihigh (gen_highpart (word_mode, dst), +- src)); +- return; ++ switch (src_mode) { ++ case TImode: ++ emit_insn ++ (gen_aarch64_movdi_tilow (gen_lowpart (word_mode, dst), src)); ++ emit_insn ++ (gen_aarch64_movdi_tihigh (gen_highpart (word_mode, dst), src)); ++ return; ++ case TFmode: ++ emit_insn ++ (gen_aarch64_movdi_tflow (gen_lowpart (word_mode, dst), src)); ++ emit_insn ++ (gen_aarch64_movdi_tfhigh (gen_highpart (word_mode, dst), src)); ++ return; ++ default: ++ gcc_unreachable (); ++ } + } + /* Fall through to r -> r cases. */ + } + +- low_dst = gen_lowpart (word_mode, dst); +- if (REG_P (low_dst) +- && reg_overlap_mentioned_p (low_dst, src)) +- { +- aarch64_emit_move (gen_highpart (word_mode, dst), +- gen_highpart_mode (word_mode, TImode, src)); +- aarch64_emit_move (low_dst, gen_lowpart (word_mode, src)); +- } +- else +- { +- aarch64_emit_move (low_dst, gen_lowpart (word_mode, src)); +- aarch64_emit_move (gen_highpart (word_mode, dst), +- gen_highpart_mode (word_mode, TImode, src)); +- } ++ switch (dst_mode) { ++ case TImode: ++ low_dst = gen_lowpart (word_mode, dst); ++ if (REG_P (low_dst) ++ && reg_overlap_mentioned_p (low_dst, src)) ++ { ++ aarch64_emit_move (gen_highpart (word_mode, dst), ++ gen_highpart_mode (word_mode, TImode, src)); ++ aarch64_emit_move (low_dst, gen_lowpart (word_mode, src)); ++ } ++ else ++ { ++ aarch64_emit_move (low_dst, gen_lowpart (word_mode, src)); ++ aarch64_emit_move (gen_highpart (word_mode, dst), ++ gen_highpart_mode (word_mode, TImode, src)); ++ } ++ return; ++ case TFmode: ++ emit_move_insn (gen_rtx_REG (DFmode, dst_regno), ++ gen_rtx_REG (DFmode, src_regno)); ++ emit_move_insn (gen_rtx_REG (DFmode, dst_regno + 1), ++ gen_rtx_REG (DFmode, src_regno + 1)); ++ return; ++ default: ++ gcc_unreachable (); ++ } + } + + bool +@@ -656,11 +728,99 @@ + || ! (FP_REGNUM_P (REGNO (dst)) && FP_REGNUM_P (REGNO (src)))); + } + ++/* Split a complex SIMD combine. */ ++ ++void ++aarch64_split_simd_combine (rtx dst, rtx src1, rtx src2) ++{ ++ enum machine_mode src_mode = GET_MODE (src1); ++ enum machine_mode dst_mode = GET_MODE (dst); ++ ++ gcc_assert (VECTOR_MODE_P (dst_mode)); ++ ++ if (REG_P (dst) && REG_P (src1) && REG_P (src2)) ++ { ++ rtx (*gen) (rtx, rtx, rtx); ++ ++ switch (src_mode) ++ { ++ case V8QImode: ++ gen = gen_aarch64_simd_combinev8qi; ++ break; ++ case V4HImode: ++ gen = gen_aarch64_simd_combinev4hi; ++ break; ++ case V2SImode: ++ gen = gen_aarch64_simd_combinev2si; ++ break; ++ case V2SFmode: ++ gen = gen_aarch64_simd_combinev2sf; ++ break; ++ case DImode: ++ gen = gen_aarch64_simd_combinedi; ++ break; ++ case DFmode: ++ gen = gen_aarch64_simd_combinedf; ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ ++ emit_insn (gen (dst, src1, src2)); ++ return; ++ } ++} ++ ++/* Split a complex SIMD move. */ ++ ++void ++aarch64_split_simd_move (rtx dst, rtx src) ++{ ++ enum machine_mode src_mode = GET_MODE (src); ++ enum machine_mode dst_mode = GET_MODE (dst); ++ ++ gcc_assert (VECTOR_MODE_P (dst_mode)); ++ ++ if (REG_P (dst) && REG_P (src)) ++ { ++ rtx (*gen) (rtx, rtx); ++ ++ gcc_assert (VECTOR_MODE_P (src_mode)); ++ ++ switch (src_mode) ++ { ++ case V16QImode: ++ gen = gen_aarch64_split_simd_movv16qi; ++ break; ++ case V8HImode: ++ gen = gen_aarch64_split_simd_movv8hi; ++ break; ++ case V4SImode: ++ gen = gen_aarch64_split_simd_movv4si; ++ break; ++ case V2DImode: ++ gen = gen_aarch64_split_simd_movv2di; ++ break; ++ case V4SFmode: ++ gen = gen_aarch64_split_simd_movv4sf; ++ break; ++ case V2DFmode: ++ gen = gen_aarch64_split_simd_movv2df; ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ ++ emit_insn (gen (dst, src)); ++ return; ++ } ++} ++ + static rtx +-aarch64_force_temporary (rtx x, rtx value) ++aarch64_force_temporary (enum machine_mode mode, rtx x, rtx value) + { + if (can_create_pseudo_p ()) +- return force_reg (Pmode, value); ++ return force_reg (mode, value); + else + { + x = aarch64_emit_move (x, value); +@@ -672,7 +832,7 @@ + static rtx + aarch64_add_offset (enum machine_mode mode, rtx temp, rtx reg, HOST_WIDE_INT offset) + { +- if (!aarch64_plus_immediate (GEN_INT (offset), DImode)) ++ if (!aarch64_plus_immediate (GEN_INT (offset), mode)) + { + rtx high; + /* Load the full offset into a register. This +@@ -679,8 +839,9 @@ + might be improvable in the future. */ + high = GEN_INT (offset); + offset = 0; +- high = aarch64_force_temporary (temp, high); +- reg = aarch64_force_temporary (temp, gen_rtx_PLUS (Pmode, high, reg)); ++ high = aarch64_force_temporary (mode, temp, high); ++ reg = aarch64_force_temporary (mode, temp, ++ gen_rtx_PLUS (mode, high, reg)); + } + return plus_constant (mode, reg, offset); + } +@@ -719,7 +880,7 @@ + && targetm.cannot_force_const_mem (mode, imm)) + { + gcc_assert(can_create_pseudo_p ()); +- base = aarch64_force_temporary (dest, base); ++ base = aarch64_force_temporary (mode, dest, base); + base = aarch64_add_offset (mode, NULL, base, INTVAL (offset)); + aarch64_emit_move (dest, base); + return; +@@ -733,10 +894,11 @@ + case SYMBOL_SMALL_TLSDESC: + case SYMBOL_SMALL_GOTTPREL: + case SYMBOL_SMALL_GOT: ++ case SYMBOL_TINY_GOT: + if (offset != const0_rtx) + { + gcc_assert(can_create_pseudo_p ()); +- base = aarch64_force_temporary (dest, base); ++ base = aarch64_force_temporary (mode, dest, base); + base = aarch64_add_offset (mode, NULL, base, INTVAL (offset)); + aarch64_emit_move (dest, base); + return; +@@ -745,6 +907,7 @@ + + case SYMBOL_SMALL_TPREL: + case SYMBOL_SMALL_ABSOLUTE: ++ case SYMBOL_TINY_ABSOLUTE: + aarch64_load_symref_appropriately (dest, imm, sty); + return; + +@@ -1813,7 +1976,7 @@ + Establish the stack frame by decreasing the stack pointer with a + properly calculated size and, if necessary, create a frame record + filled with the values of LR and previous frame pointer. The +- current FP is also set up is it is in use. */ ++ current FP is also set up if it is in use. */ + + void + aarch64_expand_prologue (void) +@@ -2556,12 +2719,14 @@ + aarch64_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) + { + rtx base, offset; ++ + if (GET_CODE (x) == HIGH) + return true; + + split_const (x, &base, &offset); + if (GET_CODE (base) == SYMBOL_REF || GET_CODE (base) == LABEL_REF) +- return (aarch64_classify_symbol (base, SYMBOL_CONTEXT_ADR) != SYMBOL_FORCE_TO_MEM); ++ return (aarch64_classify_symbol (base, SYMBOL_CONTEXT_ADR) ++ != SYMBOL_FORCE_TO_MEM); + + return aarch64_tls_referenced_p (x); + } +@@ -2999,10 +3164,13 @@ + + /* Classify the base of symbolic expression X, given that X appears in + context CONTEXT. */ +-static enum aarch64_symbol_type +-aarch64_classify_symbolic_expression (rtx x, enum aarch64_symbol_context context) ++ ++enum aarch64_symbol_type ++aarch64_classify_symbolic_expression (rtx x, ++ enum aarch64_symbol_context context) + { + rtx offset; ++ + split_const (x, &x, &offset); + return aarch64_classify_symbol (x, context); + } +@@ -3090,7 +3258,8 @@ + if ((GET_MODE (x) == SImode || GET_MODE (x) == DImode) + && y == const0_rtx + && (code == EQ || code == NE || code == LT || code == GE) +- && (GET_CODE (x) == PLUS || GET_CODE (x) == MINUS || GET_CODE (x) == AND)) ++ && (GET_CODE (x) == PLUS || GET_CODE (x) == MINUS || GET_CODE (x) == AND ++ || GET_CODE (x) == NEG)) + return CC_NZmode; + + /* A compare with a shifted operand. Because of canonicalization, +@@ -3103,6 +3272,14 @@ + || GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)) + return CC_SWPmode; + ++ /* Similarly for a negated operand, but we can only do this for ++ equalities. */ ++ if ((GET_MODE (x) == SImode || GET_MODE (x) == DImode) ++ && (GET_CODE (y) == REG || GET_CODE (y) == SUBREG) ++ && (code == EQ || code == NE) ++ && GET_CODE (x) == NEG) ++ return CC_Zmode; ++ + /* A compare of a mode narrower than SI mode against zero can be done + by extending the value in the comparison. */ + if ((GET_MODE (x) == QImode || GET_MODE (x) == HImode) +@@ -3193,6 +3370,15 @@ + } + break; + ++ case CC_Zmode: ++ switch (comp_code) ++ { ++ case NE: return AARCH64_NE; ++ case EQ: return AARCH64_EQ; ++ default: gcc_unreachable (); ++ } ++ break; ++ + default: + gcc_unreachable (); + break; +@@ -3285,26 +3471,6 @@ + asm_fprintf (f, "%s", reg_names [REGNO (x) + 1]); + break; + +- case 'Q': +- /* Print the least significant register of a pair (TImode) of regs. */ +- if (GET_CODE (x) != REG || !GP_REGNUM_P (REGNO (x) + 1)) +- { +- output_operand_lossage ("invalid operand for '%%%c'", code); +- return; +- } +- asm_fprintf (f, "%s", reg_names [REGNO (x) + (WORDS_BIG_ENDIAN ? 1 : 0)]); +- break; +- +- case 'R': +- /* Print the most significant register of a pair (TImode) of regs. */ +- if (GET_CODE (x) != REG || !GP_REGNUM_P (REGNO (x) + 1)) +- { +- output_operand_lossage ("invalid operand for '%%%c'", code); +- return; +- } +- asm_fprintf (f, "%s", reg_names [REGNO (x) + (WORDS_BIG_ENDIAN ? 0 : 1)]); +- break; +- + case 'm': + /* Print a condition (eq, ne, etc). */ + +@@ -3352,7 +3518,7 @@ + output_operand_lossage ("incompatible floating point / vector register operand for '%%%c'", code); + return; + } +- asm_fprintf (f, "%s%c%d", REGISTER_PREFIX, code, REGNO (x) - V0_REGNUM); ++ asm_fprintf (f, "%c%d", code, REGNO (x) - V0_REGNUM); + break; + + case 'S': +@@ -3365,18 +3531,17 @@ + output_operand_lossage ("incompatible floating point / vector register operand for '%%%c'", code); + return; + } +- asm_fprintf (f, "%sv%d", REGISTER_PREFIX, +- REGNO (x) - V0_REGNUM + (code - 'S')); ++ asm_fprintf (f, "v%d", REGNO (x) - V0_REGNUM + (code - 'S')); + break; + + case 'X': +- /* Print integer constant in hex. */ ++ /* Print bottom 16 bits of integer constant in hex. */ + if (GET_CODE (x) != CONST_INT) + { + output_operand_lossage ("invalid operand for '%%%c'", code); + return; + } +- asm_fprintf (f, "0x%wx", UINTVAL (x)); ++ asm_fprintf (f, "0x%wx", UINTVAL (x) & 0xffff); + break; + + case 'w': +@@ -3386,20 +3551,19 @@ + if (x == const0_rtx + || (CONST_DOUBLE_P (x) && aarch64_float_const_zero_rtx_p (x))) + { +- asm_fprintf (f, "%s%czr", REGISTER_PREFIX, code); ++ asm_fprintf (f, "%czr", code); + break; + } + + if (REG_P (x) && GP_REGNUM_P (REGNO (x))) + { +- asm_fprintf (f, "%s%c%d", REGISTER_PREFIX, code, +- REGNO (x) - R0_REGNUM); ++ asm_fprintf (f, "%c%d", code, REGNO (x) - R0_REGNUM); + break; + } + + if (REG_P (x) && REGNO (x) == SP_REGNUM) + { +- asm_fprintf (f, "%s%ssp", REGISTER_PREFIX, code == 'w' ? "w" : ""); ++ asm_fprintf (f, "%ssp", code == 'w' ? "w" : ""); + break; + } + +@@ -3507,6 +3671,10 @@ + asm_fprintf (asm_out_file, ":tprel:"); + break; + ++ case SYMBOL_TINY_GOT: ++ gcc_unreachable (); ++ break; ++ + default: + break; + } +@@ -3536,6 +3704,10 @@ + asm_fprintf (asm_out_file, ":tprel_lo12_nc:"); + break; + ++ case SYMBOL_TINY_GOT: ++ asm_fprintf (asm_out_file, ":got:"); ++ break; ++ + default: + break; + } +@@ -3650,13 +3822,6 @@ + output_addr_const (f, x); + } + +-void +-aarch64_function_profiler (FILE *f ATTRIBUTE_UNUSED, +- int labelno ATTRIBUTE_UNUSED) +-{ +- sorry ("function profiling"); +-} +- + bool + aarch64_label_mentioned_p (rtx x) + { +@@ -3922,7 +4087,7 @@ + return offset - crtl->outgoing_args_size; + + if (from == FRAME_POINTER_REGNUM) +- return cfun->machine->frame.saved_regs_size; ++ return cfun->machine->frame.saved_regs_size + get_frame_size (); + } + + if (to == STACK_POINTER_REGNUM) +@@ -3931,6 +4096,7 @@ + { + HOST_WIDE_INT elim = crtl->outgoing_args_size + + cfun->machine->frame.saved_regs_size ++ + get_frame_size () + - cfun->machine->frame.fp_lr_offset; + elim = AARCH64_ROUND_UP (elim, STACK_BOUNDARY / BITS_PER_UNIT); + return elim; +@@ -4605,6 +4771,101 @@ + return aarch64_tune_params->memmov_cost; + } + ++/* Vectorizer cost model target hooks. */ ++ ++/* Implement targetm.vectorize.builtin_vectorization_cost. */ ++static int ++aarch64_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost, ++ tree vectype, ++ int misalign ATTRIBUTE_UNUSED) ++{ ++ unsigned elements; ++ ++ switch (type_of_cost) ++ { ++ case scalar_stmt: ++ return aarch64_tune_params->vec_costs->scalar_stmt_cost; ++ ++ case scalar_load: ++ return aarch64_tune_params->vec_costs->scalar_load_cost; ++ ++ case scalar_store: ++ return aarch64_tune_params->vec_costs->scalar_store_cost; ++ ++ case vector_stmt: ++ return aarch64_tune_params->vec_costs->vec_stmt_cost; ++ ++ case vector_load: ++ return aarch64_tune_params->vec_costs->vec_align_load_cost; ++ ++ case vector_store: ++ return aarch64_tune_params->vec_costs->vec_store_cost; ++ ++ case vec_to_scalar: ++ return aarch64_tune_params->vec_costs->vec_to_scalar_cost; ++ ++ case scalar_to_vec: ++ return aarch64_tune_params->vec_costs->scalar_to_vec_cost; ++ ++ case unaligned_load: ++ return aarch64_tune_params->vec_costs->vec_unalign_load_cost; ++ ++ case unaligned_store: ++ return aarch64_tune_params->vec_costs->vec_unalign_store_cost; ++ ++ case cond_branch_taken: ++ return aarch64_tune_params->vec_costs->cond_taken_branch_cost; ++ ++ case cond_branch_not_taken: ++ return aarch64_tune_params->vec_costs->cond_not_taken_branch_cost; ++ ++ case vec_perm: ++ case vec_promote_demote: ++ return aarch64_tune_params->vec_costs->vec_stmt_cost; ++ ++ case vec_construct: ++ elements = TYPE_VECTOR_SUBPARTS (vectype); ++ return elements / 2 + 1; ++ ++ default: ++ gcc_unreachable (); ++ } ++} ++ ++/* Implement targetm.vectorize.add_stmt_cost. */ ++static unsigned ++aarch64_add_stmt_cost (void *data, int count, enum vect_cost_for_stmt kind, ++ struct _stmt_vec_info *stmt_info, int misalign, ++ enum vect_cost_model_location where) ++{ ++ unsigned *cost = (unsigned *) data; ++ unsigned retval = 0; ++ ++ if (flag_vect_cost_model) ++ { ++ tree vectype = stmt_info ? stmt_vectype (stmt_info) : NULL_TREE; ++ int stmt_cost = ++ aarch64_builtin_vectorization_cost (kind, vectype, misalign); ++ ++ /* Statements in an inner loop relative to the loop being ++ vectorized are weighted more heavily. The value here is ++ a function (linear for now) of the loop nest level. */ ++ if (where == vect_body && stmt_info && stmt_in_inner_loop_p (stmt_info)) ++ { ++ loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (stmt_info); ++ struct loop *loop = LOOP_VINFO_LOOP (loop_info); ++ unsigned nest_level = loop_depth (loop); ++ ++ count *= nest_level; ++ } ++ ++ retval = (unsigned) (count * stmt_cost); ++ cost[where] += retval; ++ } ++ ++ return retval; ++} ++ + static void initialize_aarch64_code_model (void); + + /* Parse the architecture extension string. */ +@@ -4831,7 +5092,7 @@ + + /* If the user did not specify a processor, choose the default + one for them. This will be the CPU set during configuration using +- --with-cpu, otherwise it is "generic". */ ++ --with-cpu, otherwise it is "coretex-a53". */ + if (!selected_cpu) + { + selected_cpu = &all_cores[TARGET_CPU_DEFAULT & 0x3f]; +@@ -4969,6 +5230,7 @@ + + /* Return the method that should be used to access SYMBOL_REF or + LABEL_REF X in context CONTEXT. */ ++ + enum aarch64_symbol_type + aarch64_classify_symbol (rtx x, + enum aarch64_symbol_context context ATTRIBUTE_UNUSED) +@@ -4982,6 +5244,8 @@ + + case AARCH64_CMODEL_TINY_PIC: + case AARCH64_CMODEL_TINY: ++ return SYMBOL_TINY_ABSOLUTE; ++ + case AARCH64_CMODEL_SMALL_PIC: + case AARCH64_CMODEL_SMALL: + return SYMBOL_SMALL_ABSOLUTE; +@@ -4991,71 +5255,47 @@ + } + } + +- gcc_assert (GET_CODE (x) == SYMBOL_REF); +- +- switch (aarch64_cmodel) ++ if (GET_CODE (x) == SYMBOL_REF) + { +- case AARCH64_CMODEL_LARGE: +- return SYMBOL_FORCE_TO_MEM; +- +- case AARCH64_CMODEL_TINY: +- case AARCH64_CMODEL_SMALL: +- +- /* This is needed to get DFmode, TImode constants to be loaded off +- the constant pool. Is it necessary to dump TImode values into +- the constant pool. We don't handle TImode constant loads properly +- yet and hence need to use the constant pool. */ +- if (CONSTANT_POOL_ADDRESS_P (x)) ++ if (aarch64_cmodel == AARCH64_CMODEL_LARGE ++ || CONSTANT_POOL_ADDRESS_P (x)) + return SYMBOL_FORCE_TO_MEM; + + if (aarch64_tls_symbol_p (x)) + return aarch64_classify_tls_symbol (x); + +- if (SYMBOL_REF_WEAK (x)) +- return SYMBOL_FORCE_TO_MEM; ++ switch (aarch64_cmodel) ++ { ++ case AARCH64_CMODEL_TINY: ++ if (SYMBOL_REF_WEAK (x)) ++ return SYMBOL_FORCE_TO_MEM; ++ return SYMBOL_TINY_ABSOLUTE; + +- return SYMBOL_SMALL_ABSOLUTE; ++ case AARCH64_CMODEL_SMALL: ++ if (SYMBOL_REF_WEAK (x)) ++ return SYMBOL_FORCE_TO_MEM; ++ return SYMBOL_SMALL_ABSOLUTE; + +- case AARCH64_CMODEL_TINY_PIC: +- case AARCH64_CMODEL_SMALL_PIC: ++ case AARCH64_CMODEL_TINY_PIC: ++ if (!aarch64_symbol_binds_local_p (x)) ++ return SYMBOL_TINY_GOT; ++ return SYMBOL_TINY_ABSOLUTE; + +- if (CONSTANT_POOL_ADDRESS_P (x)) +- return SYMBOL_FORCE_TO_MEM; ++ case AARCH64_CMODEL_SMALL_PIC: ++ if (!aarch64_symbol_binds_local_p (x)) ++ return SYMBOL_SMALL_GOT; ++ return SYMBOL_SMALL_ABSOLUTE; + +- if (aarch64_tls_symbol_p (x)) +- return aarch64_classify_tls_symbol (x); ++ default: ++ gcc_unreachable (); ++ } ++ } + +- if (!aarch64_symbol_binds_local_p (x)) +- return SYMBOL_SMALL_GOT; +- +- return SYMBOL_SMALL_ABSOLUTE; +- +- default: +- gcc_unreachable (); +- } + /* By default push everything into the constant pool. */ + return SYMBOL_FORCE_TO_MEM; + } + +-/* Return true if X is a symbolic constant that can be used in context +- CONTEXT. If it is, store the type of the symbol in *SYMBOL_TYPE. */ +- + bool +-aarch64_symbolic_constant_p (rtx x, enum aarch64_symbol_context context, +- enum aarch64_symbol_type *symbol_type) +-{ +- rtx offset; +- split_const (x, &x, &offset); +- if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF) +- *symbol_type = aarch64_classify_symbol (x, context); +- else +- return false; +- +- /* No checking of offset at this point. */ +- return true; +-} +- +-bool + aarch64_constant_address_p (rtx x) + { + return (CONSTANT_P (x) && memory_address_p (DImode, x)); +@@ -5105,8 +5345,7 @@ + /* This could probably go away because + we now decompose CONST_INTs according to expand_mov_immediate. */ + if ((GET_CODE (x) == CONST_VECTOR +- && aarch64_simd_valid_immediate (x, mode, false, +- NULL, NULL, NULL, NULL, NULL) != -1) ++ && aarch64_simd_valid_immediate (x, mode, false, NULL)) + || CONST_INT_P (x) || aarch64_valid_floating_const (mode, x)) + return !targetm.cannot_force_const_mem (mode, x); + +@@ -5937,32 +6176,57 @@ + return false; + } + +-/* Return quad mode as the preferred SIMD mode. */ ++/* Return appropriate SIMD container ++ for MODE within a vector of WIDTH bits. */ + static enum machine_mode +-aarch64_preferred_simd_mode (enum machine_mode mode) ++aarch64_simd_container_mode (enum machine_mode mode, unsigned width) + { ++ gcc_assert (width == 64 || width == 128); + if (TARGET_SIMD) +- switch (mode) +- { +- case DFmode: +- return V2DFmode; +- case SFmode: +- return V4SFmode; +- case SImode: +- return V4SImode; +- case HImode: +- return V8HImode; +- case QImode: +- return V16QImode; +- case DImode: +- return V2DImode; +- break; +- +- default:; +- } ++ { ++ if (width == 128) ++ switch (mode) ++ { ++ case DFmode: ++ return V2DFmode; ++ case SFmode: ++ return V4SFmode; ++ case SImode: ++ return V4SImode; ++ case HImode: ++ return V8HImode; ++ case QImode: ++ return V16QImode; ++ case DImode: ++ return V2DImode; ++ default: ++ break; ++ } ++ else ++ switch (mode) ++ { ++ case SFmode: ++ return V2SFmode; ++ case SImode: ++ return V2SImode; ++ case HImode: ++ return V4HImode; ++ case QImode: ++ return V8QImode; ++ default: ++ break; ++ } ++ } + return word_mode; + } + ++/* Return 128-bit container as the preferred SIMD mode for MODE. */ ++static enum machine_mode ++aarch64_preferred_simd_mode (enum machine_mode mode) ++{ ++ return aarch64_simd_container_mode (mode, 128); ++} ++ + /* Return the bitmask of possible vector sizes for the vectorizer + to iterate over. */ + static unsigned int +@@ -6012,6 +6276,7 @@ + { V2DFmode, "__builtin_aarch64_simd_df", "13__Float64x2_t" }, + { V16QImode, "__builtin_aarch64_simd_poly8", "12__Poly8x16_t" }, + { V8HImode, "__builtin_aarch64_simd_poly16", "12__Poly16x8_t" }, ++ { V2DImode, "__builtin_aarch64_simd_poly64", "12__Poly64x2_t" }, + { VOIDmode, NULL, NULL } + }; + +@@ -6087,13 +6352,26 @@ + return insn; + } + +-/* Return true iff t1 is the v8type of a multiply-accumulate instruction. */ ++/* Return true iff t1 is the type of a multiply-accumulate instruction. */ + + static bool +-is_madd_op (enum attr_v8type t1) ++is_madd_op (enum attr_type t1) + { +- return t1 == V8TYPE_MADD +- || t1 == V8TYPE_MADDL; ++ unsigned int i; ++ /* A number of these may be AArch32 only. */ ++ enum attr_type mlatypes[] = { ++ TYPE_MLA, TYPE_MLAS, TYPE_SMLAD, TYPE_SMLADX, TYPE_SMLAL, TYPE_SMLALD, ++ TYPE_SMLALS, TYPE_SMLALXY, TYPE_SMLAWX, TYPE_SMLAWY, TYPE_SMLAXY, ++ TYPE_SMMLA, TYPE_UMLAL, TYPE_UMLALS,TYPE_SMLSD, TYPE_SMLSDX, TYPE_SMLSLD ++ }; ++ ++ for (i = 0; i < sizeof (mlatypes) / sizeof (enum attr_type); i++) ++ { ++ if (t1 == mlatypes[i]) ++ return true; ++ } ++ ++ return false; + } + + +@@ -6133,7 +6411,7 @@ + bool + aarch64_madd_needs_nop (rtx insn) + { +- enum attr_v8type attr_type; ++ enum attr_type attr_type; + rtx prev; + rtx body; + +@@ -6143,7 +6421,7 @@ + if (recog_memoized (insn) < 0) + return false; + +- attr_type = get_attr_v8type (insn); ++ attr_type = get_attr_type (insn); + if (!is_madd_op (attr_type)) + return false; + +@@ -6179,7 +6457,7 @@ + + + /* Return the equivalent letter for size. */ +-static unsigned char ++static char + sizetochar (int size) + { + switch (size) +@@ -6226,15 +6504,10 @@ + return aarch64_float_const_representable_p (x0); + } + +-/* TODO: This function returns values similar to those +- returned by neon_valid_immediate in gcc/config/arm/arm.c +- but the API here is different enough that these magic numbers +- are not used. It should be sufficient to return true or false. */ +-static int +-aarch64_simd_valid_immediate (rtx op, enum machine_mode mode, int inverse, +- rtx *modconst, int *elementwidth, +- unsigned char *elementchar, +- int *mvn, int *shift) ++/* Return true for valid and false for invalid. */ ++bool ++aarch64_simd_valid_immediate (rtx op, enum machine_mode mode, bool inverse, ++ struct simd_immediate_info *info) + { + #define CHECK(STRIDE, ELSIZE, CLASS, TEST, SHIFT, NEG) \ + matches = 1; \ +@@ -6245,7 +6518,6 @@ + { \ + immtype = (CLASS); \ + elsize = (ELSIZE); \ +- elchar = sizetochar (elsize); \ + eshift = (SHIFT); \ + emvn = (NEG); \ + break; \ +@@ -6254,7 +6526,6 @@ + unsigned int i, elsize = 0, idx = 0, n_elts = CONST_VECTOR_NUNITS (op); + unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode)); + unsigned char bytes[16]; +- unsigned char elchar = 0; + int immtype = -1, matches; + unsigned int invmask = inverse ? 0xff : 0; + int eshift, emvn; +@@ -6261,29 +6532,19 @@ + + if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT) + { +- bool simd_imm_zero = aarch64_simd_imm_zero_p (op, mode); +- int elem_width = GET_MODE_BITSIZE (GET_MODE (CONST_VECTOR_ELT (op, 0))); ++ if (! (aarch64_simd_imm_zero_p (op, mode) ++ || aarch64_vect_float_const_representable_p (op))) ++ return false; + +- if (!(simd_imm_zero +- || aarch64_vect_float_const_representable_p (op))) +- return -1; ++ if (info) ++ { ++ info->value = CONST_VECTOR_ELT (op, 0); ++ info->element_width = GET_MODE_BITSIZE (GET_MODE (info->value)); ++ info->mvn = false; ++ info->shift = 0; ++ } + +- if (modconst) +- *modconst = CONST_VECTOR_ELT (op, 0); +- +- if (elementwidth) +- *elementwidth = elem_width; +- +- if (elementchar) +- *elementchar = sizetochar (elem_width); +- +- if (shift) +- *shift = 0; +- +- if (simd_imm_zero) +- return 19; +- else +- return 18; ++ return true; + } + + /* Splat vector constant out into a byte vector. */ +@@ -6357,16 +6618,16 @@ + CHECK (2, 16, 11, bytes[i] == 0xff && bytes[i + 1] == bytes[1], 8, 1); + + CHECK (4, 32, 12, bytes[i] == 0xff && bytes[i + 1] == bytes[1] +- && bytes[i + 2] == 0 && bytes[i + 3] == 0, 0, 0); ++ && bytes[i + 2] == 0 && bytes[i + 3] == 0, 8, 0); + + CHECK (4, 32, 13, bytes[i] == 0 && bytes[i + 1] == bytes[1] +- && bytes[i + 2] == 0xff && bytes[i + 3] == 0xff, 0, 1); ++ && bytes[i + 2] == 0xff && bytes[i + 3] == 0xff, 8, 1); + + CHECK (4, 32, 14, bytes[i] == 0xff && bytes[i + 1] == 0xff +- && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0, 0, 0); ++ && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0, 16, 0); + + CHECK (4, 32, 15, bytes[i] == 0 && bytes[i + 1] == 0 +- && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0xff, 0, 1); ++ && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0xff, 16, 1); + + CHECK (1, 8, 16, bytes[i] == bytes[0], 0, 0); + +@@ -6375,31 +6636,20 @@ + } + while (0); + +- /* TODO: Currently the assembler cannot handle types 12 to 15. +- And there is no way to specify cmode through the compiler. +- Disable them till there is support in the assembler. */ +- if (immtype == -1 +- || (immtype >= 12 && immtype <= 15) +- || immtype == 18) +- return -1; ++ if (immtype == -1) ++ return false; + ++ if (info) ++ { ++ info->element_width = elsize; ++ info->mvn = emvn != 0; ++ info->shift = eshift; + +- if (elementwidth) +- *elementwidth = elsize; ++ unsigned HOST_WIDE_INT imm = 0; + +- if (elementchar) +- *elementchar = elchar; ++ if (immtype >= 12 && immtype <= 15) ++ info->msl = true; + +- if (mvn) +- *mvn = emvn; +- +- if (shift) +- *shift = eshift; +- +- if (modconst) +- { +- unsigned HOST_WIDE_INT imm = 0; +- + /* Un-invert bytes of recognized vector, if necessary. */ + if (invmask != 0) + for (i = 0; i < idx; i++) +@@ -6414,68 +6664,27 @@ + imm |= (unsigned HOST_WIDE_INT) (bytes[i] ? 0xff : 0) + << (i * BITS_PER_UNIT); + +- *modconst = GEN_INT (imm); +- } ++ ++ info->value = GEN_INT (imm); ++ } + else +- { +- unsigned HOST_WIDE_INT imm = 0; ++ { ++ for (i = 0; i < elsize / BITS_PER_UNIT; i++) ++ imm |= (unsigned HOST_WIDE_INT) bytes[i] << (i * BITS_PER_UNIT); + +- for (i = 0; i < elsize / BITS_PER_UNIT; i++) +- imm |= (unsigned HOST_WIDE_INT) bytes[i] << (i * BITS_PER_UNIT); +- + /* Construct 'abcdefgh' because the assembler cannot handle +- generic constants. */ +- gcc_assert (shift != NULL && mvn != NULL); +- if (*mvn) ++ generic constants. */ ++ if (info->mvn) + imm = ~imm; +- imm = (imm >> *shift) & 0xff; +- *modconst = GEN_INT (imm); +- } ++ imm = (imm >> info->shift) & 0xff; ++ info->value = GEN_INT (imm); ++ } + } + +- return immtype; ++ return true; + #undef CHECK + } + +-/* Return TRUE if rtx X is legal for use as either a AdvSIMD MOVI instruction +- (or, implicitly, MVNI) immediate. Write back width per element +- to *ELEMENTWIDTH, and a modified constant (whatever should be output +- for a MOVI instruction) in *MODCONST. */ +-int +-aarch64_simd_immediate_valid_for_move (rtx op, enum machine_mode mode, +- rtx *modconst, int *elementwidth, +- unsigned char *elementchar, +- int *mvn, int *shift) +-{ +- rtx tmpconst; +- int tmpwidth; +- unsigned char tmpwidthc; +- int tmpmvn = 0, tmpshift = 0; +- int retval = aarch64_simd_valid_immediate (op, mode, 0, &tmpconst, +- &tmpwidth, &tmpwidthc, +- &tmpmvn, &tmpshift); +- +- if (retval == -1) +- return 0; +- +- if (modconst) +- *modconst = tmpconst; +- +- if (elementwidth) +- *elementwidth = tmpwidth; +- +- if (elementchar) +- *elementchar = tmpwidthc; +- +- if (mvn) +- *mvn = tmpmvn; +- +- if (shift) +- *shift = tmpshift; +- +- return 1; +-} +- + static bool + aarch64_const_vec_all_same_int_p (rtx x, + HOST_WIDE_INT minval, +@@ -6537,6 +6746,25 @@ + return true; + } + ++bool ++aarch64_mov_operand_p (rtx x, ++ enum aarch64_symbol_context context, ++ enum machine_mode mode) ++{ ++ if (GET_CODE (x) == HIGH ++ && aarch64_valid_symref (XEXP (x, 0), GET_MODE (XEXP (x, 0)))) ++ return true; ++ ++ if (CONST_INT_P (x) && aarch64_move_imm (INTVAL (x), mode)) ++ return true; ++ ++ if (GET_CODE (x) == SYMBOL_REF && mode == DImode && CONSTANT_ADDRESS_P (x)) ++ return true; ++ ++ return aarch64_classify_symbolic_expression (x, context) ++ == SYMBOL_TINY_ABSOLUTE; ++} ++ + /* Return a const_int vector of VAL. */ + rtx + aarch64_simd_gen_const_vector_dup (enum machine_mode mode, int val) +@@ -6551,6 +6779,19 @@ + return gen_rtx_CONST_VECTOR (mode, v); + } + ++/* Check OP is a legal scalar immediate for the MOVI instruction. */ ++ ++bool ++aarch64_simd_scalar_immediate_valid_for_move (rtx op, enum machine_mode mode) ++{ ++ enum machine_mode vmode; ++ ++ gcc_assert (!VECTOR_MODE_P (mode)); ++ vmode = aarch64_preferred_simd_mode (mode); ++ rtx op_v = aarch64_simd_gen_const_vector_dup (vmode, INTVAL (op)); ++ return aarch64_simd_valid_immediate (op_v, vmode, false, NULL); ++} ++ + /* Construct and return a PARALLEL RTX vector. */ + rtx + aarch64_simd_vect_par_cnst_half (enum machine_mode mode, bool high) +@@ -6776,8 +7017,7 @@ + gcc_unreachable (); + + if (const_vec != NULL_RTX +- && aarch64_simd_immediate_valid_for_move (const_vec, mode, NULL, NULL, +- NULL, NULL, NULL)) ++ && aarch64_simd_valid_immediate (const_vec, mode, false, NULL)) + /* Load using MOVI/MVNI. */ + return const_vec; + else if ((const_dup = aarch64_simd_dup_constant (vals)) != NULL_RTX) +@@ -7335,49 +7575,80 @@ + } + + char* +-aarch64_output_simd_mov_immediate (rtx *const_vector, ++aarch64_output_simd_mov_immediate (rtx const_vector, + enum machine_mode mode, + unsigned width) + { +- int is_valid; +- unsigned char widthc; +- int lane_width_bits; ++ bool is_valid; + static char templ[40]; +- int shift = 0, mvn = 0; + const char *mnemonic; ++ const char *shift_op; + unsigned int lane_count = 0; ++ char element_char; + +- is_valid = +- aarch64_simd_immediate_valid_for_move (*const_vector, mode, +- const_vector, &lane_width_bits, +- &widthc, &mvn, &shift); ++ struct simd_immediate_info info = { NULL_RTX, 0, 0, false, false }; ++ ++ /* This will return true to show const_vector is legal for use as either ++ a AdvSIMD MOVI instruction (or, implicitly, MVNI) immediate. It will ++ also update INFO to show how the immediate should be generated. */ ++ is_valid = aarch64_simd_valid_immediate (const_vector, mode, false, &info); + gcc_assert (is_valid); + ++ element_char = sizetochar (info.element_width); ++ lane_count = width / info.element_width; ++ + mode = GET_MODE_INNER (mode); + if (mode == SFmode || mode == DFmode) + { +- bool zero_p = +- aarch64_float_const_zero_rtx_p (*const_vector); +- gcc_assert (shift == 0); +- mnemonic = zero_p ? "movi" : "fmov"; ++ gcc_assert (info.shift == 0 && ! info.mvn); ++ if (aarch64_float_const_zero_rtx_p (info.value)) ++ info.value = GEN_INT (0); ++ else ++ { ++#define buf_size 20 ++ REAL_VALUE_TYPE r; ++ REAL_VALUE_FROM_CONST_DOUBLE (r, info.value); ++ char float_buf[buf_size] = {'\0'}; ++ real_to_decimal_for_mode (float_buf, &r, buf_size, buf_size, 1, mode); ++#undef buf_size ++ ++ if (lane_count == 1) ++ snprintf (templ, sizeof (templ), "fmov\t%%d0, %s", float_buf); ++ else ++ snprintf (templ, sizeof (templ), "fmov\t%%0.%d%c, %s", ++ lane_count, element_char, float_buf); ++ return templ; ++ } + } +- else +- mnemonic = mvn ? "mvni" : "movi"; + +- gcc_assert (lane_width_bits != 0); +- lane_count = width / lane_width_bits; ++ mnemonic = info.mvn ? "mvni" : "movi"; ++ shift_op = info.msl ? "msl" : "lsl"; + + if (lane_count == 1) +- snprintf (templ, sizeof (templ), "%s\t%%d0, %%1", mnemonic); +- else if (shift) +- snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, %%1, lsl %d", +- mnemonic, lane_count, widthc, shift); ++ snprintf (templ, sizeof (templ), "%s\t%%d0, " HOST_WIDE_INT_PRINT_HEX, ++ mnemonic, UINTVAL (info.value)); ++ else if (info.shift) ++ snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, " HOST_WIDE_INT_PRINT_HEX ++ ", %s %d", mnemonic, lane_count, element_char, ++ UINTVAL (info.value), shift_op, info.shift); + else +- snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, %%1", +- mnemonic, lane_count, widthc); ++ snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, " HOST_WIDE_INT_PRINT_HEX, ++ mnemonic, lane_count, element_char, UINTVAL (info.value)); + return templ; + } + ++char* ++aarch64_output_scalar_simd_mov_immediate (rtx immediate, ++ enum machine_mode mode) ++{ ++ enum machine_mode vmode; ++ ++ gcc_assert (!VECTOR_MODE_P (mode)); ++ vmode = aarch64_simd_container_mode (mode, 64); ++ rtx v_op = aarch64_simd_gen_const_vector_dup (vmode, INTVAL (immediate)); ++ return aarch64_output_simd_mov_immediate (v_op, vmode, 64); ++} ++ + /* Split operands into moves from op[1] + op[2] into op[0]. */ + + void +@@ -8002,6 +8273,9 @@ + #undef TARGET_EXPAND_BUILTIN_VA_START + #define TARGET_EXPAND_BUILTIN_VA_START aarch64_expand_builtin_va_start + ++#undef TARGET_FOLD_BUILTIN ++#define TARGET_FOLD_BUILTIN aarch64_fold_builtin ++ + #undef TARGET_FUNCTION_ARG + #define TARGET_FUNCTION_ARG aarch64_function_arg + +@@ -8023,6 +8297,9 @@ + #undef TARGET_FRAME_POINTER_REQUIRED + #define TARGET_FRAME_POINTER_REQUIRED aarch64_frame_pointer_required + ++#undef TARGET_GIMPLE_FOLD_BUILTIN ++#define TARGET_GIMPLE_FOLD_BUILTIN aarch64_gimple_fold_builtin ++ + #undef TARGET_GIMPLIFY_VA_ARG_EXPR + #define TARGET_GIMPLIFY_VA_ARG_EXPR aarch64_gimplify_va_arg_expr + +@@ -8102,6 +8379,13 @@ + #undef TARGET_ARRAY_MODE_SUPPORTED_P + #define TARGET_ARRAY_MODE_SUPPORTED_P aarch64_array_mode_supported_p + ++#undef TARGET_VECTORIZE_ADD_STMT_COST ++#define TARGET_VECTORIZE_ADD_STMT_COST aarch64_add_stmt_cost ++ ++#undef TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST ++#define TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST \ ++ aarch64_builtin_vectorization_cost ++ + #undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE + #define TARGET_VECTORIZE_PREFERRED_SIMD_MODE aarch64_preferred_simd_mode + +--- a/src/gcc/config/aarch64/iterators.md ++++ b/src/gcc/config/aarch64/iterators.md +@@ -83,6 +83,9 @@ + ;; Vector Float modes. + (define_mode_iterator VDQF [V2SF V4SF V2DF]) + ++;; Modes suitable to use as the return type of a vcond expression. ++(define_mode_iterator VDQF_COND [V2SF V2SI V4SF V4SI V2DF V2DI]) ++ + ;; All Float modes. + (define_mode_iterator VALLF [V2SF V4SF V2DF SF DF]) + +@@ -125,9 +128,15 @@ + ;; Vector modes except double int. + (define_mode_iterator VDQIF [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF V2DF]) + ++;; Vector modes for Q and H types. ++(define_mode_iterator VDQQH [V8QI V16QI V4HI V8HI]) ++ + ;; Vector modes for H and S types. + (define_mode_iterator VDQHS [V4HI V8HI V2SI V4SI]) + ++;; Vector modes for Q, H and S types. ++(define_mode_iterator VDQQHS [V8QI V16QI V4HI V8HI V2SI V4SI]) ++ + ;; Vector and scalar integer modes for H and S + (define_mode_iterator VSDQ_HSI [V4HI V8HI V2SI V4SI HI SI]) + +@@ -163,10 +172,15 @@ + [ + UNSPEC_ASHIFT_SIGNED ; Used in aarch-simd.md. + UNSPEC_ASHIFT_UNSIGNED ; Used in aarch64-simd.md. ++ UNSPEC_FMAX ; Used in aarch64-simd.md. ++ UNSPEC_FMAXNMV ; Used in aarch64-simd.md. + UNSPEC_FMAXV ; Used in aarch64-simd.md. ++ UNSPEC_FMIN ; Used in aarch64-simd.md. ++ UNSPEC_FMINNMV ; Used in aarch64-simd.md. + UNSPEC_FMINV ; Used in aarch64-simd.md. + UNSPEC_FADDV ; Used in aarch64-simd.md. +- UNSPEC_ADDV ; Used in aarch64-simd.md. ++ UNSPEC_SADDV ; Used in aarch64-simd.md. ++ UNSPEC_UADDV ; Used in aarch64-simd.md. + UNSPEC_SMAXV ; Used in aarch64-simd.md. + UNSPEC_SMINV ; Used in aarch64-simd.md. + UNSPEC_UMAXV ; Used in aarch64-simd.md. +@@ -223,9 +237,6 @@ + UNSPEC_SSHLL ; Used in aarch64-simd.md. + UNSPEC_USHLL ; Used in aarch64-simd.md. + UNSPEC_ADDP ; Used in aarch64-simd.md. +- UNSPEC_FMAX ; Used in aarch64-simd.md. +- UNSPEC_FMIN ; Used in aarch64-simd.md. +- UNSPEC_BSL ; Used in aarch64-simd.md. + UNSPEC_TBL ; Used in vector permute patterns. + UNSPEC_CONCAT ; Used in vector permute patterns. + UNSPEC_ZIP1 ; Used in vector permute patterns. +@@ -234,6 +245,22 @@ + UNSPEC_UZP2 ; Used in vector permute patterns. + UNSPEC_TRN1 ; Used in vector permute patterns. + UNSPEC_TRN2 ; Used in vector permute patterns. ++ UNSPEC_AESE ; Used in aarch64-simd.md. ++ UNSPEC_AESD ; Used in aarch64-simd.md. ++ UNSPEC_AESMC ; Used in aarch64-simd.md. ++ UNSPEC_AESIMC ; Used in aarch64-simd.md. ++ UNSPEC_SHA1C ; Used in aarch64-simd.md. ++ UNSPEC_SHA1M ; Used in aarch64-simd.md. ++ UNSPEC_SHA1P ; Used in aarch64-simd.md. ++ UNSPEC_SHA1H ; Used in aarch64-simd.md. ++ UNSPEC_SHA1SU0 ; Used in aarch64-simd.md. ++ UNSPEC_SHA1SU1 ; Used in aarch64-simd.md. ++ UNSPEC_SHA256H ; Used in aarch64-simd.md. ++ UNSPEC_SHA256H2 ; Used in aarch64-simd.md. ++ UNSPEC_SHA256SU0 ; Used in aarch64-simd.md. ++ UNSPEC_SHA256SU1 ; Used in aarch64-simd.md. ++ UNSPEC_PMULL ; Used in aarch64-simd.md. ++ UNSPEC_PMULL2 ; Used in aarch64-simd.md. + ]) + + ;; ------------------------------------------------------------------- +@@ -244,6 +271,9 @@ + ;; 32-bit version and "%x0" in the 64-bit version. + (define_mode_attr w [(QI "w") (HI "w") (SI "w") (DI "x") (SF "s") (DF "d")]) + ++;; For constraints used in scalar immediate vector moves ++(define_mode_attr hq [(HI "h") (QI "q")]) ++ + ;; For scalar usage of vector/FP registers + (define_mode_attr v [(QI "b") (HI "h") (SI "s") (DI "d") + (SF "s") (DF "d") +@@ -319,6 +349,7 @@ + (V2SI "s") (V4SI "s") + (V2DI "d") (V2SF "s") + (V4SF "s") (V2DF "d") ++ (SF "s") (DF "d") + (QI "b") (HI "h") + (SI "s") (DI "d")]) + +@@ -380,7 +411,8 @@ + ;; Double modes of vector modes (lower case). + (define_mode_attr Vdbl [(V8QI "v16qi") (V4HI "v8hi") + (V2SI "v4si") (V2SF "v4sf") +- (SI "v2si") (DI "v2di")]) ++ (SI "v2si") (DI "v2di") ++ (DF "v2df")]) + + ;; Narrowed modes for VDN. + (define_mode_attr VNARROWD [(V4HI "V8QI") (V2SI "V4HI") +@@ -435,6 +467,15 @@ + (V2SF "s") (V4SF "s") + (V2DF "d")]) + ++;; Corresponding core element mode for each vector mode. This is a ++;; variation on mapping FP modes to GP regs. ++(define_mode_attr vwcore [(V8QI "w") (V16QI "w") ++ (V4HI "w") (V8HI "w") ++ (V2SI "w") (V4SI "w") ++ (DI "x") (V2DI "x") ++ (V2SF "w") (V4SF "w") ++ (V2DF "x")]) ++ + ;; Double vector types for ALLX. + (define_mode_attr Vallxd [(QI "8b") (HI "4h") (SI "2s")]) + +@@ -494,6 +535,24 @@ + (define_mode_attr fcvt_target [(V2DF "v2di") (V4SF "v4si") (V2SF "v2si")]) + (define_mode_attr FCVT_TARGET [(V2DF "V2DI") (V4SF "V4SI") (V2SF "V2SI")]) + ++;; Defined to '_fp' for types whose element type is a float type. ++(define_mode_attr fp [(V8QI "") (V16QI "") ++ (V4HI "") (V8HI "") ++ (V2SI "") (V4SI "") ++ (DI "") (V2DI "") ++ (V2SF "_fp") (V4SF "_fp") ++ (V2DF "_fp") (DF "_fp") ++ (SF "_fp")]) ++ ++;; Defined to '_q' for 128-bit types. ++(define_mode_attr q [(V8QI "") (V16QI "_q") ++ (V4HI "") (V8HI "_q") ++ (V2SI "") (V4SI "_q") ++ (DI "") (V2DI "_q") ++ (V2SF "") (V4SF "_q") ++ (V2DF "_q") ++ (QI "") (HI "") (SI "") (DI "") (SF "") (DF "")]) ++ + ;; ------------------------------------------------------------------- + ;; Code Iterators + ;; ------------------------------------------------------------------- +@@ -530,9 +589,14 @@ + ;; Iterator for integer conversions + (define_code_iterator FIXUORS [fix unsigned_fix]) + ++;; Iterator for float conversions ++(define_code_iterator FLOATUORS [float unsigned_float]) ++ + ;; Code iterator for variants of vector max and min. + (define_code_iterator MAXMIN [smax smin umax umin]) + ++(define_code_iterator FMAXMIN [smax smin]) ++ + ;; Code iterator for variants of vector max and min. + (define_code_iterator ADDSUB [plus minus]) + +@@ -551,6 +615,9 @@ + ;; Unsigned comparison operators. + (define_code_iterator UCOMPARISONS [ltu leu geu gtu]) + ++;; Unsigned comparison operators. ++(define_code_iterator FAC_COMPARISONS [lt le ge gt]) ++ + ;; ------------------------------------------------------------------- + ;; Code Attributes + ;; ------------------------------------------------------------------- +@@ -563,6 +630,10 @@ + (zero_extend "zero_extend") + (sign_extract "extv") + (zero_extract "extzv") ++ (fix "fix") ++ (unsigned_fix "fixuns") ++ (float "float") ++ (unsigned_float "floatuns") + (and "and") + (ior "ior") + (xor "xor") +@@ -602,10 +673,14 @@ + (define_code_attr CMP [(lt "LT") (le "LE") (eq "EQ") (ge "GE") (gt "GT") + (ltu "LTU") (leu "LEU") (geu "GEU") (gtu "GTU")]) + ++(define_code_attr fix_trunc_optab [(fix "fix_trunc") ++ (unsigned_fix "fixuns_trunc")]) ++ + ;; Optab prefix for sign/zero-extending operations + (define_code_attr su_optab [(sign_extend "") (zero_extend "u") + (div "") (udiv "u") + (fix "") (unsigned_fix "u") ++ (float "s") (unsigned_float "u") + (ss_plus "s") (us_plus "u") + (ss_minus "s") (us_minus "u")]) + +@@ -630,7 +705,9 @@ + (define_code_attr su [(sign_extend "s") (zero_extend "u") + (sign_extract "s") (zero_extract "u") + (fix "s") (unsigned_fix "u") +- (div "s") (udiv "u")]) ++ (div "s") (udiv "u") ++ (smax "s") (umax "u") ++ (smin "s") (umin "u")]) + + ;; Emit cbz/cbnz depending on comparison type. + (define_code_attr cbz [(eq "cbz") (ne "cbnz") (lt "cbnz") (ge "cbz")]) +@@ -639,10 +716,10 @@ + (define_code_attr tbz [(eq "tbz") (ne "tbnz") (lt "tbnz") (ge "tbz")]) + + ;; Max/min attributes. +-(define_code_attr maxmin [(smax "smax") +- (smin "smin") +- (umax "umax") +- (umin "umin")]) ++(define_code_attr maxmin [(smax "max") ++ (smin "min") ++ (umax "max") ++ (umin "min")]) + + ;; MLA/MLS attributes. + (define_code_attr as [(ss_plus "a") (ss_minus "s")]) +@@ -664,8 +741,11 @@ + (define_int_iterator MAXMINV [UNSPEC_UMAXV UNSPEC_UMINV + UNSPEC_SMAXV UNSPEC_SMINV]) + +-(define_int_iterator FMAXMINV [UNSPEC_FMAXV UNSPEC_FMINV]) ++(define_int_iterator FMAXMINV [UNSPEC_FMAXV UNSPEC_FMINV ++ UNSPEC_FMAXNMV UNSPEC_FMINNMV]) + ++(define_int_iterator SUADDV [UNSPEC_SADDV UNSPEC_UADDV]) ++ + (define_int_iterator HADDSUB [UNSPEC_SHADD UNSPEC_UHADD + UNSPEC_SRHADD UNSPEC_URHADD + UNSPEC_SHSUB UNSPEC_UHSUB +@@ -678,7 +758,7 @@ + (define_int_iterator ADDSUBHN2 [UNSPEC_ADDHN2 UNSPEC_RADDHN2 + UNSPEC_SUBHN2 UNSPEC_RSUBHN2]) + +-(define_int_iterator FMAXMIN [UNSPEC_FMAX UNSPEC_FMIN]) ++(define_int_iterator FMAXMIN_UNS [UNSPEC_FMAX UNSPEC_FMIN]) + + (define_int_iterator VQDMULH [UNSPEC_SQDMULH UNSPEC_SQRDMULH]) + +@@ -714,25 +794,46 @@ + UNSPEC_UZP1 UNSPEC_UZP2]) + + (define_int_iterator FRINT [UNSPEC_FRINTZ UNSPEC_FRINTP UNSPEC_FRINTM +- UNSPEC_FRINTI UNSPEC_FRINTX UNSPEC_FRINTA]) ++ UNSPEC_FRINTN UNSPEC_FRINTI UNSPEC_FRINTX ++ UNSPEC_FRINTA]) + + (define_int_iterator FCVT [UNSPEC_FRINTZ UNSPEC_FRINTP UNSPEC_FRINTM +- UNSPEC_FRINTA]) ++ UNSPEC_FRINTA UNSPEC_FRINTN]) + ++(define_int_iterator FRECP [UNSPEC_FRECPE UNSPEC_FRECPX]) ++ ++(define_int_iterator CRYPTO_AES [UNSPEC_AESE UNSPEC_AESD]) ++(define_int_iterator CRYPTO_AESMC [UNSPEC_AESMC UNSPEC_AESIMC]) ++ ++(define_int_iterator CRYPTO_SHA1 [UNSPEC_SHA1C UNSPEC_SHA1M UNSPEC_SHA1P]) ++ ++(define_int_iterator CRYPTO_SHA256 [UNSPEC_SHA256H UNSPEC_SHA256H2]) ++ + ;; ------------------------------------------------------------------- + ;; Int Iterators Attributes. + ;; ------------------------------------------------------------------- +-(define_int_attr maxminv [(UNSPEC_UMAXV "umax") +- (UNSPEC_UMINV "umin") +- (UNSPEC_SMAXV "smax") +- (UNSPEC_SMINV "smin")]) ++(define_int_attr maxmin_uns [(UNSPEC_UMAXV "umax") ++ (UNSPEC_UMINV "umin") ++ (UNSPEC_SMAXV "smax") ++ (UNSPEC_SMINV "smin") ++ (UNSPEC_FMAX "smax_nan") ++ (UNSPEC_FMAXNMV "smax") ++ (UNSPEC_FMAXV "smax_nan") ++ (UNSPEC_FMIN "smin_nan") ++ (UNSPEC_FMINNMV "smin") ++ (UNSPEC_FMINV "smin_nan")]) + +-(define_int_attr fmaxminv [(UNSPEC_FMAXV "max") +- (UNSPEC_FMINV "min")]) ++(define_int_attr maxmin_uns_op [(UNSPEC_UMAXV "umax") ++ (UNSPEC_UMINV "umin") ++ (UNSPEC_SMAXV "smax") ++ (UNSPEC_SMINV "smin") ++ (UNSPEC_FMAX "fmax") ++ (UNSPEC_FMAXNMV "fmaxnm") ++ (UNSPEC_FMAXV "fmax") ++ (UNSPEC_FMIN "fmin") ++ (UNSPEC_FMINNMV "fminnm") ++ (UNSPEC_FMINV "fmin")]) + +-(define_int_attr fmaxmin [(UNSPEC_FMAX "fmax") +- (UNSPEC_FMIN "fmin")]) +- + (define_int_attr sur [(UNSPEC_SHADD "s") (UNSPEC_UHADD "u") + (UNSPEC_SRHADD "sr") (UNSPEC_URHADD "ur") + (UNSPEC_SHSUB "s") (UNSPEC_UHSUB "u") +@@ -743,6 +844,7 @@ + (UNSPEC_SUBHN2 "") (UNSPEC_RSUBHN2 "r") + (UNSPEC_SQXTN "s") (UNSPEC_UQXTN "u") + (UNSPEC_USQADD "us") (UNSPEC_SUQADD "su") ++ (UNSPEC_SADDV "s") (UNSPEC_UADDV "u") + (UNSPEC_SSLI "s") (UNSPEC_USLI "u") + (UNSPEC_SSRI "s") (UNSPEC_USRI "u") + (UNSPEC_USRA "u") (UNSPEC_SSRA "s") +@@ -801,15 +903,18 @@ + (UNSPEC_FRINTM "floor") + (UNSPEC_FRINTI "nearbyint") + (UNSPEC_FRINTX "rint") +- (UNSPEC_FRINTA "round")]) ++ (UNSPEC_FRINTA "round") ++ (UNSPEC_FRINTN "frintn")]) + + ;; frint suffix for floating-point rounding instructions. + (define_int_attr frint_suffix [(UNSPEC_FRINTZ "z") (UNSPEC_FRINTP "p") + (UNSPEC_FRINTM "m") (UNSPEC_FRINTI "i") +- (UNSPEC_FRINTX "x") (UNSPEC_FRINTA "a")]) ++ (UNSPEC_FRINTX "x") (UNSPEC_FRINTA "a") ++ (UNSPEC_FRINTN "n")]) + + (define_int_attr fcvt_pattern [(UNSPEC_FRINTZ "btrunc") (UNSPEC_FRINTA "round") +- (UNSPEC_FRINTP "ceil") (UNSPEC_FRINTM "floor")]) ++ (UNSPEC_FRINTP "ceil") (UNSPEC_FRINTM "floor") ++ (UNSPEC_FRINTN "frintn")]) + + (define_int_attr perm_insn [(UNSPEC_ZIP1 "zip") (UNSPEC_ZIP2 "zip") + (UNSPEC_TRN1 "trn") (UNSPEC_TRN2 "trn") +@@ -818,3 +923,13 @@ + (define_int_attr perm_hilo [(UNSPEC_ZIP1 "1") (UNSPEC_ZIP2 "2") + (UNSPEC_TRN1 "1") (UNSPEC_TRN2 "2") + (UNSPEC_UZP1 "1") (UNSPEC_UZP2 "2")]) ++ ++(define_int_attr frecp_suffix [(UNSPEC_FRECPE "e") (UNSPEC_FRECPX "x")]) ++ ++(define_int_attr aes_op [(UNSPEC_AESE "e") (UNSPEC_AESD "d")]) ++(define_int_attr aesmc_op [(UNSPEC_AESMC "mc") (UNSPEC_AESIMC "imc")]) ++ ++(define_int_attr sha1_op [(UNSPEC_SHA1C "c") (UNSPEC_SHA1P "p") ++ (UNSPEC_SHA1M "m")]) ++ ++(define_int_attr sha256_op [(UNSPEC_SHA256H "") (UNSPEC_SHA256H2 "2")]) +--- a/src/gcc/config/aarch64/aarch64.h ++++ b/src/gcc/config/aarch64/aarch64.h +@@ -49,6 +49,8 @@ + break; \ + } \ + \ ++ if (TARGET_CRYPTO) \ ++ builtin_define ("__ARM_FEATURE_CRYPTO"); \ + } while (0) + + +@@ -151,6 +153,7 @@ + #define AARCH64_FL_FP (1 << 1) /* Has FP. */ + #define AARCH64_FL_CRYPTO (1 << 2) /* Has crypto. */ + #define AARCH64_FL_SLOWMUL (1 << 3) /* A slow multiply core. */ ++#define AARCH64_FL_CRC (1 << 4) /* Has CRC. */ + + /* Has FP and SIMD. */ + #define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD) +@@ -163,6 +166,7 @@ + + /* Macros to test ISA flags. */ + extern unsigned long aarch64_isa_flags; ++#define AARCH64_ISA_CRC (aarch64_isa_flags & AARCH64_FL_CRC) + #define AARCH64_ISA_CRYPTO (aarch64_isa_flags & AARCH64_FL_CRYPTO) + #define AARCH64_ISA_FP (aarch64_isa_flags & AARCH64_FL_FP) + #define AARCH64_ISA_SIMD (aarch64_isa_flags & AARCH64_FL_SIMD) +@@ -171,6 +175,8 @@ + extern unsigned long aarch64_tune_flags; + #define AARCH64_TUNE_SLOWMUL (aarch64_tune_flags & AARCH64_FL_SLOWMUL) + ++/* Crypto is an optional feature. */ ++#define TARGET_CRYPTO AARCH64_ISA_CRYPTO + + /* Standard register usage. */ + +@@ -434,7 +440,7 @@ + #define INDEX_REG_CLASS CORE_REGS + #define BASE_REG_CLASS POINTER_REGS + +-/* Register pairs used to eliminate unneeded registers that point intoi ++/* Register pairs used to eliminate unneeded registers that point into + the stack frame. */ + #define ELIMINABLE_REGS \ + { \ +@@ -459,10 +465,10 @@ + TARGET_CPU_generic + }; + +-/* If there is no CPU defined at configure, use "generic" as default. */ ++/* If there is no CPU defined at configure, use "cortex-a53" as default. */ + #ifndef TARGET_CPU_DEFAULT + #define TARGET_CPU_DEFAULT \ +- (TARGET_CPU_generic | (AARCH64_CPU_DEFAULT_FLAGS << 6)) ++ (TARGET_CPU_cortexa53 | (AARCH64_CPU_DEFAULT_FLAGS << 6)) + #endif + + /* If inserting NOP before a mult-accumulate insn remember to adjust the +@@ -487,7 +493,7 @@ + /* Stack layout; function entry, exit and calling. */ + #define STACK_GROWS_DOWNWARD 1 + +-#define FRAME_GROWS_DOWNWARD 0 ++#define FRAME_GROWS_DOWNWARD 1 + + #define STARTING_FRAME_OFFSET 0 + +@@ -533,12 +539,6 @@ + #endif + + +-/* Which ABI to use. */ +-enum arm_abi_type +-{ +- ARM_ABI_AAPCS64 +-}; +- + enum arm_pcs + { + ARM_PCS_AAPCS64, /* Base standard AAPCS for 64 bit. */ +@@ -546,11 +546,7 @@ + }; + + +-extern enum arm_abi_type arm_abi; + extern enum arm_pcs arm_pcs_variant; +-#ifndef ARM_DEFAULT_ABI +-#define ARM_DEFAULT_ABI ARM_ABI_AAPCS64 +-#endif + + #ifndef ARM_DEFAULT_PCS + #define ARM_DEFAULT_PCS ARM_PCS_AAPCS64 +@@ -721,6 +717,8 @@ + + #define SELECT_CC_MODE(OP, X, Y) aarch64_select_cc_mode (OP, X, Y) + ++#define REVERSIBLE_CC_MODE(MODE) 1 ++ + #define REVERSE_CONDITION(CODE, MODE) \ + (((MODE) == CCFPmode || (MODE) == CCFPEmode) \ + ? reverse_condition_maybe_unordered (CODE) \ +@@ -770,9 +768,23 @@ + #define PRINT_OPERAND_ADDRESS(STREAM, X) \ + aarch64_print_operand_address (STREAM, X) + +-#define FUNCTION_PROFILER(STREAM, LABELNO) \ +- aarch64_function_profiler (STREAM, LABELNO) ++#define MCOUNT_NAME "_mcount" + ++#define NO_PROFILE_COUNTERS 1 ++ ++/* Emit rtl for profiling. Output assembler code to FILE ++ to call "_mcount" for profiling a function entry. */ ++#define PROFILE_HOOK(LABEL) \ ++{ \ ++ rtx fun,lr; \ ++ lr = get_hard_reg_initial_val (Pmode, LR_REGNUM); \ ++ fun = gen_rtx_SYMBOL_REF (Pmode, MCOUNT_NAME); \ ++ emit_library_call (fun, LCT_NORMAL, VOIDmode, 1, lr, Pmode); \ ++} ++ ++/* All the work done in PROFILE_HOOK, but still required. */ ++#define FUNCTION_PROFILER(STREAM, LABELNO) do { } while (0) ++ + /* For some reason, the Linux headers think they know how to define + these macros. They don't!!! */ + #undef ASM_APP_ON +--- a/src/gcc/config/arm/neon-schedgen.ml ++++ b/src/gcc/config/arm/neon-schedgen.ml +@@ -1,543 +0,0 @@ +-(* Emission of the core of the Cortex-A8 NEON scheduling description. +- Copyright (C) 2007-2013 Free Software Foundation, Inc. +- Contributed by CodeSourcery. +- This file is part of GCC. +- +- GCC is free software; you can redistribute it and/or modify it under +- the terms of the GNU General Public License as published by the Free +- Software Foundation; either version 3, or (at your option) any later +- version. +- +- GCC is distributed in the hope that it will be useful, but WITHOUT ANY +- WARRANTY; without even the implied warranty of MERCHANTABILITY or +- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +- for more details. +- +- You should have received a copy of the GNU General Public License +- along with GCC; see the file COPYING3. If not see +- . +-*) +- +-(* This scheduling description generator works as follows. +- - Each group of instructions has source and destination requirements +- specified and a list of cores supported. This is then filtered +- and per core scheduler descriptions are generated out. +- The reservations generated are prefixed by the name of the +- core and the check is performed on the basis of what the tuning +- string is. Running this will generate Neon scheduler descriptions +- for all cores supported. +- +- The source requirements may be specified using +- Source (the stage at which all source operands not otherwise +- described are read), Source_m (the stage at which Rm operands are +- read), Source_n (likewise for Rn) and Source_d (likewise for Rd). +- - For each group of instructions the earliest stage where a source +- operand may be required is calculated. +- - Each group of instructions is selected in turn as a producer. +- The latencies between this group and every other group are then +- calculated, yielding up to four values for each combination: +- 1. Producer -> consumer Rn latency +- 2. Producer -> consumer Rm latency +- 3. Producer -> consumer Rd (as a source) latency +- 4. Producer -> consumer worst-case latency. +- Value 4 is calculated from the destination availability requirements +- of the consumer and the earliest source availability requirements +- of the producer. +- - The largest Value 4 calculated for the current producer is the +- worse-case latency, L, for that instruction group. This value is written +- out in a define_insn_reservation for the producer group. +- - For each producer and consumer pair, the latencies calculated above +- are collated. The average (of up to four values) is calculated and +- if this average is different from the worst-case latency, an +- unguarded define_bypass construction is issued for that pair. +- (For each pair only one define_bypass construction will be emitted, +- and at present we do not emit specific guards.) +-*) +- +-let find_with_result fn lst = +- let rec scan = function +- [] -> raise Not_found +- | l::ls -> +- match fn l with +- Some result -> result +- | _ -> scan ls in +- scan lst +- +-let n1 = 1 and n2 = 2 and n3 = 3 and n4 = 4 and n5 = 5 and n6 = 6 +- and n7 = 7 and n8 = 8 and n9 = 9 +- +-type availability = Source of int +- | Source_n of int +- | Source_m of int +- | Source_d of int +- | Dest of int +- | Dest_n_after of int * int +- +-type guard = Guard_none | Guard_only_m | Guard_only_n | Guard_only_d +- +-(* Reservation behaviors. All but the last row here correspond to one +- pipeline each. Each constructor will correspond to one +- define_reservation. *) +-type reservation = +- Mul | Mul_2cycle | Mul_4cycle +-| Shift | Shift_2cycle +-| ALU | ALU_2cycle +-| Fmul | Fmul_2cycle +-| Fadd | Fadd_2cycle +-(* | VFP *) +-| Permute of int +-| Ls of int +-| Fmul_then_fadd | Fmul_then_fadd_2 +- +-type core = CortexA8 | CortexA9 +-let allCores = [CortexA8; CortexA9] +-let coreStr = function +- CortexA8 -> "cortex_a8" +- | CortexA9 -> "cortex_a9" +- +-let tuneStr = function +- CortexA8 -> "cortexa8" +- | CortexA9 -> "cortexa9" +- +- +-(* This table must be kept as short as possible by conflating +- entries with the same availability behavior. +- +- First components: instruction group names +- Second components: availability requirements, in the order in which +- they should appear in the comments in the .md file. +- Third components: reservation info +- Fourth components: List of supported cores. +-*) +-let availability_table = [ +- (* NEON integer ALU instructions. *) +- (* vbit vbif vbsl vorr vbic vnot vcls vclz vcnt vadd vand vorr +- veor vbic vorn ddd qqq *) +- "neon_int_1", [Source n2; Dest n3], ALU, allCores; +- (* vadd vsub qqd vsub ddd qqq *) +- "neon_int_2", [Source_m n1; Source_n n2; Dest n3], ALU, allCores; +- (* vsum vneg dd qq vadd vsub qdd *) +- "neon_int_3", [Source n1; Dest n3], ALU, allCores; +- (* vabs vceqz vcgez vcbtz vclez vcltz vadh vradh vsbh vrsbh dqq *) +- (* vhadd vrhadd vqadd vtst ddd qqq *) +- "neon_int_4", [Source n2; Dest n4], ALU, allCores; +- (* vabd qdd vhsub vqsub vabd vceq vcge vcgt vmax vmin vfmx vfmn ddd ddd *) +- "neon_int_5", [Source_m n1; Source_n n2; Dest n4], ALU, allCores; +- (* vqneg vqabs dd qq *) +- "neon_vqneg_vqabs", [Source n1; Dest n4], ALU, allCores; +- (* vmov vmvn *) +- "neon_vmov", [Dest n3], ALU, allCores; +- (* vaba *) +- "neon_vaba", [Source_n n2; Source_m n1; Source_d n3; Dest n6], ALU, allCores; +- "neon_vaba_qqq", +- [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (1, n6)], +- ALU_2cycle, allCores; +- (* vsma *) +- "neon_vsma", [Source_m n1; Source_d n3; Dest n6], ALU, allCores; +- +- (* NEON integer multiply instructions. *) +- (* vmul, vqdmlh, vqrdmlh *) +- (* vmul, vqdmul, qdd 16/8 long 32/16 long *) +- "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long", [Source n2; Dest n6], +- Mul, allCores; +- "neon_mul_qqq_8_16_32_ddd_32", [Source n2; Dest_n_after (1, n6)], +- Mul_2cycle, allCores; +- (* vmul, vqdmul again *) +- "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar", +- [Source_n n2; Source_m n1; Dest_n_after (1, n6)], Mul_2cycle, allCores; +- (* vmla, vmls *) +- "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long", +- [Source_n n2; Source_m n2; Source_d n3; Dest n6], Mul, allCores; +- "neon_mla_qqq_8_16", +- [Source_n n2; Source_m n2; Source_d n3; Dest_n_after (1, n6)], +- Mul_2cycle, allCores; +- "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long", +- [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (1, n6)], +- Mul_2cycle, allCores; +- "neon_mla_qqq_32_qqd_32_scalar", +- [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (3, n6)], +- Mul_4cycle, allCores; +- (* vmul, vqdmulh, vqrdmulh *) +- (* vmul, vqdmul *) +- "neon_mul_ddd_16_scalar_32_16_long_scalar", +- [Source_n n2; Source_m n1; Dest n6], Mul, allCores; +- "neon_mul_qqd_32_scalar", +- [Source_n n2; Source_m n1; Dest_n_after (3, n6)], Mul_4cycle, allCores; +- (* vmla, vmls *) +- (* vmla, vmla, vqdmla, vqdmls *) +- "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar", +- [Source_n n2; Source_m n1; Source_d n3; Dest n6], Mul, allCores; +- +- (* NEON integer shift instructions. *) +- (* vshr/vshl immediate, vshr_narrow, vshl_vmvh, vsli_vsri_ddd *) +- "neon_shift_1", [Source n1; Dest n3], Shift, allCores; +- (* vqshl, vrshr immediate; vqshr, vqmov, vrshr, vqrshr narrow, allCores; +- vqshl_vrshl_vqrshl_ddd *) +- "neon_shift_2", [Source n1; Dest n4], Shift, allCores; +- (* vsli, vsri and vshl for qqq *) +- "neon_shift_3", [Source n1; Dest_n_after (1, n3)], Shift_2cycle, allCores; +- "neon_vshl_ddd", [Source n1; Dest n1], Shift, allCores; +- "neon_vqshl_vrshl_vqrshl_qqq", [Source n1; Dest_n_after (1, n4)], +- Shift_2cycle, allCores; +- "neon_vsra_vrsra", [Source_m n1; Source_d n3; Dest n6], Shift, allCores; +- +- (* NEON floating-point instructions. *) +- (* vadd, vsub, vabd, vmul, vceq, vcge, vcgt, vcage, vcagt, vmax, vmin *) +- (* vabs, vneg, vceqz, vcgez, vcgtz, vclez, vcltz, vrecpe, vrsqrte, vcvt *) +- "neon_fp_vadd_ddd_vabs_dd", [Source n2; Dest n5], Fadd, allCores; +- "neon_fp_vadd_qqq_vabs_qq", [Source n2; Dest_n_after (1, n5)], +- Fadd_2cycle, allCores; +- (* vsum, fvmx, vfmn *) +- "neon_fp_vsum", [Source n1; Dest n5], Fadd, allCores; +- "neon_fp_vmul_ddd", [Source_n n2; Source_m n1; Dest n5], Fmul, allCores; +- "neon_fp_vmul_qqd", [Source_n n2; Source_m n1; Dest_n_after (1, n5)], +- Fmul_2cycle, allCores; +- (* vmla, vmls *) +- "neon_fp_vmla_ddd", +- [Source_n n2; Source_m n2; Source_d n3; Dest n9], Fmul_then_fadd, allCores; +- "neon_fp_vmla_qqq", +- [Source_n n2; Source_m n2; Source_d n3; Dest_n_after (1, n9)], +- Fmul_then_fadd_2, allCores; +- "neon_fp_vmla_ddd_scalar", +- [Source_n n2; Source_m n1; Source_d n3; Dest n9], Fmul_then_fadd, allCores; +- "neon_fp_vmla_qqq_scalar", +- [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (1, n9)], +- Fmul_then_fadd_2, allCores; +- "neon_fp_vrecps_vrsqrts_ddd", [Source n2; Dest n9], Fmul_then_fadd, allCores; +- "neon_fp_vrecps_vrsqrts_qqq", [Source n2; Dest_n_after (1, n9)], +- Fmul_then_fadd_2, allCores; +- +- (* NEON byte permute instructions. *) +- (* vmov; vtrn and vswp for dd; vzip for dd; vuzp for dd; vrev; vext for dd *) +- "neon_bp_simple", [Source n1; Dest n2], Permute 1, allCores; +- (* vswp for qq; vext for qqq; vtbl with {Dn} or {Dn, Dn1}, allCores; +- similarly for vtbx *) +- "neon_bp_2cycle", [Source n1; Dest_n_after (1, n2)], Permute 2, allCores; +- (* all the rest *) +- "neon_bp_3cycle", [Source n1; Dest_n_after (2, n2)], Permute 3, allCores; +- +- (* NEON load/store instructions. *) +- "neon_ldr", [Dest n1], Ls 1, allCores; +- "neon_str", [Source n1], Ls 1, allCores; +- "neon_vld1_1_2_regs", [Dest_n_after (1, n1)], Ls 2, allCores; +- "neon_vld1_3_4_regs", [Dest_n_after (2, n1)], Ls 3, allCores; +- "neon_vld2_2_regs_vld1_vld2_all_lanes", [Dest_n_after (1, n2)], Ls 2, allCores; +- "neon_vld2_4_regs", [Dest_n_after (2, n2)], Ls 3, allCores; +- "neon_vld3_vld4", [Dest_n_after (3, n2)], Ls 4, allCores; +- "neon_vst1_1_2_regs_vst2_2_regs", [Source n1], Ls 2, allCores; +- "neon_vst1_3_4_regs", [Source n1], Ls 3, allCores; +- "neon_vst2_4_regs_vst3_vst4", [Source n1], Ls 4, allCores; +- "neon_vst3_vst4", [Source n1], Ls 4, allCores; +- "neon_vld1_vld2_lane", [Source n1; Dest_n_after (2, n2)], Ls 3, allCores; +- "neon_vld3_vld4_lane", [Source n1; Dest_n_after (4, n2)], Ls 5, allCores; +- "neon_vst1_vst2_lane", [Source n1], Ls 2, allCores; +- "neon_vst3_vst4_lane", [Source n1], Ls 3, allCores; +- "neon_vld3_vld4_all_lanes", [Dest_n_after (1, n2)], Ls 3, allCores; +- +- (* NEON register transfer instructions. *) +- "neon_mcr", [Dest n2], Permute 1, allCores; +- "neon_mcr_2_mcrr", [Dest n2], Permute 2, allCores; +- (* MRC instructions are in the .tpl file. *) +-] +- +-(* Augment the tuples in the availability table with an extra component +- that describes the earliest stage where a source operand may be +- required. (It is also possible that an entry in the table has no +- source requirements.) *) +-let calculate_sources = +- List.map (fun (name, avail, res, cores) -> +- let earliest_stage = +- List.fold_left +- (fun cur -> fun info -> +- match info with +- Source stage +- | Source_n stage +- | Source_m stage +- | Source_d stage -> +- (match cur with +- None -> Some stage +- | Some stage' when stage < stage' -> Some stage +- | _ -> cur) +- | _ -> cur) None avail +- in +- (name, avail, res, earliest_stage)) +- +-(* Find the stage, if any, at the end of which a group produces a result. *) +-let find_dest (attr, avail, _, _) = +- try +- find_with_result +- (fun av -> match av with +- Dest st -> Some (Some st) +- | Dest_n_after (after, st) -> Some (Some (after + st)) +- | _ -> None) avail +- with Not_found -> None +- +-(* Find the worst-case latency between a producer and a consumer. *) +-let worst_case_latency producer (_, _, _, earliest_required) = +- let dest = find_dest producer in +- match earliest_required, dest with +- None, _ -> +- (* The consumer doesn't have any source requirements. *) +- None +- | _, None -> +- (* The producer doesn't produce any results (e.g. a store insn). *) +- None +- | Some consumed, Some produced -> Some (produced - consumed + 1) +- +-(* Helper function for below. *) +-let latency_calc f producer (_, avail, _, _) = +- try +- let source_avail = find_with_result f avail in +- match find_dest producer with +- None -> +- (* The producer does not produce a result. *) +- Some 0 +- | Some produced -> +- let latency = produced - source_avail + 1 in +- (* Latencies below zero are raised to zero since we don't have +- delay slots. *) +- if latency < 0 then Some 0 else Some latency +- with Not_found -> None +- +-(* Find any Rm latency between a producer and a consumer. If no +- Rm source requirement is explicitly specified for the consumer, +- return "positive infinity". Also return "positive infinity" if +- the latency matches the supplied worst-case latency for this +- producer. *) +-let get_m_latency producer consumer = +- match latency_calc (fun av -> match av with Source_m stage -> Some stage +- | _ -> None) producer consumer +- with None -> [] | Some latency -> [(Guard_only_m, latency)] +- +-(* Likewise for Rn. *) +-let get_n_latency producer consumer = +- match latency_calc (fun av -> match av with Source_n stage -> Some stage +- | _ -> None) producer consumer +- with None -> [] | Some latency -> [(Guard_only_n, latency)] +- +-(* Likewise for Rd. *) +-let get_d_latency producer consumer = +- match +- latency_calc (fun av -> match av with Source_d stage -> Some stage +- | _ -> None) producer consumer +- with None -> [] | Some latency -> [(Guard_only_d, latency)] +- +-(* Given a producer and a consumer, work out the latency of the producer +- to the consumer in each of the four cases (availability information +- permitting) identified at the top of this file. Return the +- consumer, the worst-case unguarded latency and any guarded latencies. *) +-let calculate_latencies producer consumer = +- let worst = worst_case_latency producer consumer in +- let m_latency = get_m_latency producer consumer in +- let n_latency = get_n_latency producer consumer in +- let d_latency = get_d_latency producer consumer in +- (consumer, worst, m_latency @ n_latency @ d_latency) +- +-(* Helper function for below. *) +-let pick_latency largest worst guards = +- let guards = +- match worst with +- None -> guards +- | Some worst -> (Guard_none, worst) :: guards +- in +- if List.length guards = 0 then None else +- let total_latency = +- List.fold_left (fun acc -> fun (_, latency) -> acc + latency) 0 guards +- in +- let average_latency = (float_of_int total_latency) /. +- (float_of_int (List.length guards)) in +- let rounded_latency = int_of_float (ceil average_latency) in +- if rounded_latency = largest then None +- else Some (Guard_none, rounded_latency) +- +-(* Collate all bypasses for a particular producer as required in +- worst_case_latencies_and_bypasses. (By this stage there is a maximum +- of one bypass from this producer to any particular consumer listed +- in LATENCIES.) Use a hash table to collate bypasses with the +- same latency and guard. *) +-let collate_bypasses (producer_name, _, _, _) largest latencies core = +- let ht = Hashtbl.create 42 in +- let keys = ref [] in +- List.iter ( +- fun ((consumer, _, _, _), worst, guards) -> +- (* Find out which latency to use. Ignoring latencies that match +- the *overall* worst-case latency for this producer (which will +- be in define_insn_reservation), we have to examine: +- 1. the latency with no guard between this producer and this +- consumer; and +- 2. any guarded latency. *) +- let guard_latency_opt = pick_latency largest worst guards in +- match guard_latency_opt with +- None -> () +- | Some (guard, latency) -> +- begin +- (if (try ignore (Hashtbl.find ht (guard, latency)); false +- with Not_found -> true) then +- keys := (guard, latency) :: !keys); +- Hashtbl.add ht (guard, latency) ((coreStr core) ^ "_" ^ consumer) +- end +- ) latencies; +- (* The hash table now has bypasses collated so that ones with the +- same latency and guard have the same keys. Walk through all the +- keys, extract the associated bypasses, and concatenate the names +- of the consumers for each bypass. *) +- List.map ( +- fun ((guard, latency) as key) -> +- let consumers = Hashtbl.find_all ht key in +- (producer_name, +- String.concat ",\\\n " consumers, +- latency, +- guard) +- ) !keys +- +-(* For every producer, find the worst-case latency between it and +- *any* consumer. Also determine (if such a thing exists) the +- lowest-latency bypass from each producer to each consumer. Group +- the output in such a way that all bypasses with the same producer +- and latency are together, and so that bypasses with the worst-case +- latency are ignored. *) +-let worst_case_latencies_and_bypasses core = +- let rec f (worst_acc, bypasses_acc) prev xs = +- match xs with +- [] -> (worst_acc, bypasses_acc) +- | ((producer_name, producer_avail, res_string, _) as producer)::next -> +- (* For this particular producer, work out the latencies between +- it and every consumer. *) +- let latencies = +- List.fold_left (fun acc -> fun consumer -> +- (calculate_latencies producer consumer) :: acc) +- [] (prev @ xs) +- in +- (* Now work out what the overall worst case latency was for this +- particular producer. *) +- match latencies with +- [] -> assert false +- | _ -> +- let comp_fn (_, l1, _) (_, l2, _) = +- if l1 > l2 then -1 else if l1 = l2 then 0 else 1 +- in +- let largest = +- match List.hd (List.sort comp_fn latencies) with +- (_, None, _) -> 0 (* Producer has no consumers. *) +- | (_, Some worst, _) -> worst +- in +- (* Having got the largest latency, collect all bypasses for +- this producer and filter out those with that larger +- latency. Record the others for later emission. *) +- let bypasses = collate_bypasses producer largest latencies core in +- (* Go on to process remaining producers, having noted +- the result for this one. *) +- f ((producer_name, producer_avail, largest, +- res_string) :: worst_acc, +- bypasses @ bypasses_acc) +- (prev @ [producer]) next +- in +- f ([], []) [] +- +-(* Emit a helpful comment for a define_insn_reservation. *) +-let write_comment producer avail = +- let seen_source = ref false in +- let describe info = +- let read = if !seen_source then "" else "read " in +- match info with +- Source stage -> +- seen_source := true; +- Printf.printf "%stheir source operands at N%d" read stage +- | Source_n stage -> +- seen_source := true; +- Printf.printf "%stheir (D|Q)n operands at N%d" read stage +- | Source_m stage -> +- seen_source := true; +- Printf.printf "%stheir (D|Q)m operands at N%d" read stage +- | Source_d stage -> +- Printf.printf "%stheir (D|Q)d operands at N%d" read stage +- | Dest stage -> +- Printf.printf "produce a result at N%d" stage +- | Dest_n_after (after, stage) -> +- Printf.printf "produce a result at N%d on cycle %d" stage (after + 1) +- in +- Printf.printf ";; Instructions using this reservation "; +- let rec f infos x = +- let sep = if x mod 2 = 1 then "" else "\n;;" in +- match infos with +- [] -> assert false +- | [info] -> describe info; Printf.printf ".\n" +- | info::(_::[] as infos) -> +- describe info; Printf.printf ", and%s " sep; f infos (x+1) +- | info::infos -> describe info; Printf.printf ",%s " sep; f infos (x+1) +- in +- f avail 0 +- +- +-(* Emit a define_insn_reservation for each producer. The latency +- written in will be its worst-case latency. *) +-let emit_insn_reservations core = +- let corestring = coreStr core in +- let tunestring = tuneStr core +- in List.iter ( +- fun (producer, avail, latency, reservation) -> +- write_comment producer avail; +- Printf.printf "(define_insn_reservation \"%s_%s\" %d\n" +- corestring producer latency; +- Printf.printf " (and (eq_attr \"tune\" \"%s\")\n" tunestring; +- Printf.printf " (eq_attr \"neon_type\" \"%s\"))\n" producer; +- let str = +- match reservation with +- Mul -> "dp" | Mul_2cycle -> "dp_2" | Mul_4cycle -> "dp_4" +- | Shift -> "dp" | Shift_2cycle -> "dp_2" +- | ALU -> "dp" | ALU_2cycle -> "dp_2" +- | Fmul -> "dp" | Fmul_2cycle -> "dp_2" +- | Fadd -> "fadd" | Fadd_2cycle -> "fadd_2" +- | Ls 1 -> "ls" +- | Ls n -> "ls_" ^ (string_of_int n) +- | Permute 1 -> "perm" +- | Permute n -> "perm_" ^ (string_of_int n) +- | Fmul_then_fadd -> "fmul_then_fadd" +- | Fmul_then_fadd_2 -> "fmul_then_fadd_2" +- in +- Printf.printf " \"%s_neon_%s\")\n\n" corestring str +- ) +- +-(* Given a guard description, return the name of the C function to +- be used as the guard for define_bypass. *) +-let guard_fn g = +- match g with +- Guard_only_m -> "arm_neon_only_m_dependency" +- | Guard_only_n -> "arm_neon_only_n_dependency" +- | Guard_only_d -> "arm_neon_only_d_dependency" +- | Guard_none -> assert false +- +-(* Emit a define_bypass for each bypass. *) +-let emit_bypasses core = +- List.iter ( +- fun (producer, consumers, latency, guard) -> +- Printf.printf "(define_bypass %d \"%s_%s\"\n" +- latency (coreStr core) producer; +- +- if guard = Guard_none then +- Printf.printf " \"%s\")\n\n" consumers +- else +- begin +- Printf.printf " \"%s\"\n" consumers; +- Printf.printf " \"%s\")\n\n" (guard_fn guard) +- end +- ) +- +- +-let calculate_per_core_availability_table core availability_table = +- let table = calculate_sources availability_table in +- let worst_cases, bypasses = worst_case_latencies_and_bypasses core table in +- emit_insn_reservations core (List.rev worst_cases); +- Printf.printf ";; Exceptions to the default latencies.\n\n"; +- emit_bypasses core bypasses +- +-let calculate_core_availability_table core availability_table = +-let filter_core = List.filter (fun (_, _, _, cores) +- -> List.exists ((=) core) cores) +-in calculate_per_core_availability_table core (filter_core availability_table) +- +- +-(* Program entry point. *) +-let main = +- List.map (fun core -> calculate_core_availability_table +- core availability_table) allCores +--- a/src/gcc/config/arm/arm1020e.md ++++ b/src/gcc/config/arm/arm1020e.md +@@ -66,13 +66,21 @@ + ;; ALU operations with no shifted operand + (define_insn_reservation "1020alu_op" 1 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "type" "alu_reg,simple_alu_imm")) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,\ ++ mov_imm,mov_reg,mvn_imm,mvn_reg,\ ++ multiple,no_insn")) + "1020a_e,1020a_m,1020a_w") + + ;; ALU operations with a shift-by-constant operand + (define_insn_reservation "1020alu_shift_op" 1 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "type" "simple_alu_shift,alu_shift")) ++ (eq_attr "type" "alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ extend,mov_shift,mvn_shift")) + "1020a_e,1020a_m,1020a_w") + + ;; ALU operations with a shift-by-register operand +@@ -81,7 +89,9 @@ + ;; the execute stage. + (define_insn_reservation "1020alu_shift_reg_op" 2 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "type" "alu_shift_reg")) ++ (eq_attr "type" "alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_shift_reg,mvn_shift_reg")) + "1020a_e*2,1020a_m,1020a_w") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -96,7 +106,7 @@ + ;; until after the memory stage. + (define_insn_reservation "1020mult1" 2 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "insn" "smulxy,smulwy")) ++ (eq_attr "type" "smulxy,smulwy")) + "1020a_e,1020a_m,1020a_w") + + ;; The "smlaxy" and "smlawx" instructions require two iterations through +@@ -104,7 +114,7 @@ + ;; the execute stage. + (define_insn_reservation "1020mult2" 2 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "insn" "smlaxy,smlalxy,smlawx")) ++ (eq_attr "type" "smlaxy,smlalxy,smlawx")) + "1020a_e*2,1020a_m,1020a_w") + + ;; The "smlalxy", "mul", and "mla" instructions require two iterations +@@ -112,7 +122,7 @@ + ;; the memory stage. + (define_insn_reservation "1020mult3" 3 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "insn" "smlalxy,mul,mla")) ++ (eq_attr "type" "smlalxy,mul,mla")) + "1020a_e*2,1020a_m,1020a_w") + + ;; The "muls" and "mlas" instructions loop in the execute stage for +@@ -120,7 +130,7 @@ + ;; available after three iterations. + (define_insn_reservation "1020mult4" 3 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "insn" "muls,mlas")) ++ (eq_attr "type" "muls,mlas")) + "1020a_e*4,1020a_m,1020a_w") + + ;; Long multiply instructions that produce two registers of +@@ -135,7 +145,7 @@ + ;; available after the memory cycle. + (define_insn_reservation "1020mult5" 4 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "insn" "umull,umlal,smull,smlal")) ++ (eq_attr "type" "umull,umlal,smull,smlal")) + "1020a_e*3,1020a_m,1020a_w") + + ;; The "umulls", "umlals", "smulls", and "smlals" instructions loop in +@@ -143,7 +153,7 @@ + ;; The value result is available after four iterations. + (define_insn_reservation "1020mult6" 4 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "insn" "umulls,umlals,smulls,smlals")) ++ (eq_attr "type" "umulls,umlals,smulls,smlals")) + "1020a_e*5,1020a_m,1020a_w") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -269,7 +279,7 @@ + ;; first execute state. We model this by using 1020a_e in the first cycle. + (define_insn_reservation "v10_ffarith" 5 + (and (eq_attr "vfp10" "yes") +- (eq_attr "type" "fcpys,ffariths,ffarithd,fcmps,fcmpd")) ++ (eq_attr "type" "fmov,ffariths,ffarithd,fcmps,fcmpd")) + "1020a_e+v10_fmac") + + (define_insn_reservation "v10_farith" 5 +@@ -279,7 +289,7 @@ + + (define_insn_reservation "v10_cvt" 5 + (and (eq_attr "vfp10" "yes") +- (eq_attr "type" "f_cvt")) ++ (eq_attr "type" "f_cvt,f_cvti2f,f_cvtf2i")) + "1020a_e+v10_fmac") + + (define_insn_reservation "v10_fmul" 6 +@@ -289,12 +299,12 @@ + + (define_insn_reservation "v10_fdivs" 18 + (and (eq_attr "vfp10" "yes") +- (eq_attr "type" "fdivs")) ++ (eq_attr "type" "fdivs, fsqrts")) + "1020a_e+v10_ds*14") + + (define_insn_reservation "v10_fdivd" 32 + (and (eq_attr "vfp10" "yes") +- (eq_attr "type" "fdivd")) ++ (eq_attr "type" "fdivd, fsqrtd")) + "1020a_e+v10_fmac+v10_ds*28") + + (define_insn_reservation "v10_floads" 4 +@@ -315,7 +325,7 @@ + + (define_insn_reservation "v10_c2v" 4 + (and (eq_attr "vfp10" "yes") +- (eq_attr "type" "r_2_f")) ++ (eq_attr "type" "f_mcr,f_mcrr")) + "1020a_e+1020l_e+v10_ls1,v10_ls2") + + (define_insn_reservation "v10_fstores" 1 +@@ -330,7 +340,7 @@ + + (define_insn_reservation "v10_v2c" 1 + (and (eq_attr "vfp10" "yes") +- (eq_attr "type" "f_2_r")) ++ (eq_attr "type" "f_mrc,f_mrrc")) + "1020a_e+1020l_e,1020l_m,1020l_w") + + (define_insn_reservation "v10_to_cpsr" 2 +--- a/src/gcc/config/arm/cortex-a15.md ++++ b/src/gcc/config/arm/cortex-a15.md +@@ -61,15 +61,23 @@ + ;; Simple ALU without shift + (define_insn_reservation "cortex_a15_alu" 2 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "alu_reg,simple_alu_imm") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,\ ++ mov_imm,mov_reg,\ ++ mvn_imm,mvn_reg,\ ++ mrs,multiple,no_insn")) + "ca15_issue1,(ca15_sx1,ca15_sx1_alu)|(ca15_sx2,ca15_sx2_alu)") + + ;; ALU ops with immediate shift + (define_insn_reservation "cortex_a15_alu_shift" 3 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "simple_alu_shift,alu_shift") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "extend,\ ++ alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ mov_shift,mvn_shift")) + "ca15_issue1,(ca15_sx1,ca15_sx1+ca15_sx1_shf,ca15_sx1_alu)\ + |(ca15_sx2,ca15_sx2+ca15_sx2_shf,ca15_sx2_alu)") + +@@ -76,8 +84,9 @@ + ;; ALU ops with register controlled shift + (define_insn_reservation "cortex_a15_alu_shift_reg" 3 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "alu_shift_reg") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_shift_reg,mvn_shift_reg")) + "(ca15_issue2,ca15_sx1+ca15_sx2,ca15_sx1_shf,ca15_sx2_alu)\ + |(ca15_issue1,(ca15_issue1+ca15_sx2,ca15_sx1+ca15_sx2_shf)\ + |(ca15_issue1+ca15_sx1,ca15_sx1+ca15_sx1_shf),ca15_sx1_alu)") +@@ -87,35 +96,30 @@ + ;; 32-bit multiplies + (define_insn_reservation "cortex_a15_mult32" 3 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "mult") +- (and (eq_attr "neon_type" "none") +- (eq_attr "mul64" "no")))) ++ (eq_attr "mul32" "yes")) + "ca15_issue1,ca15_mx") + + ;; 64-bit multiplies + (define_insn_reservation "cortex_a15_mult64" 4 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "mult") +- (and (eq_attr "neon_type" "none") +- (eq_attr "mul64" "yes")))) ++ (eq_attr "mul64" "yes")) + "ca15_issue1,ca15_mx*2") + + ;; Integer divide + (define_insn_reservation "cortex_a15_udiv" 9 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "insn" "udiv")) ++ (eq_attr "type" "udiv")) + "ca15_issue1,ca15_mx") + + (define_insn_reservation "cortex_a15_sdiv" 10 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "insn" "sdiv")) ++ (eq_attr "type" "sdiv")) + "ca15_issue1,ca15_mx") + + ;; Block all issue pipes for a cycle + (define_insn_reservation "cortex_a15_block" 1 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "block") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "block")) + "ca15_issue3") + + ;; Branch execution Unit +@@ -124,8 +128,7 @@ + ;; No latency as there is no result + (define_insn_reservation "cortex_a15_branch" 0 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "branch") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "branch")) + "ca15_issue1,ca15_bx") + + ;; Load-store execution Unit +@@ -133,40 +136,35 @@ + ;; Loads of up to two words. + (define_insn_reservation "cortex_a15_load1" 4 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "load_byte,load1,load2") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "load_byte,load1,load2")) + "ca15_issue1,ca15_ls,ca15_ldr,nothing") + + ;; Loads of three or four words. + (define_insn_reservation "cortex_a15_load3" 5 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "load3,load4") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "load3,load4")) + "ca15_issue2,ca15_ls1+ca15_ls2,ca15_ldr,ca15_ldr,nothing") + + ;; Stores of up to two words. + (define_insn_reservation "cortex_a15_store1" 0 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "store1,store2") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "store1,store2")) + "ca15_issue1,ca15_ls,ca15_str") + + ;; Stores of three or four words. + (define_insn_reservation "cortex_a15_store3" 0 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "store3,store4") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "store3,store4")) + "ca15_issue2,ca15_ls1+ca15_ls2,ca15_str,ca15_str") + + ;; We include Neon.md here to ensure that the branch can block the Neon units. +-(include "cortex-a15-neon.md") ++(include "../arm/cortex-a15-neon.md") + + ;; We lie with calls. They take up all issue slots, and form a block in the + ;; pipeline. The result however is available the next cycle. + (define_insn_reservation "cortex_a15_call" 1 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "call") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "call")) + "ca15_issue3,\ + ca15_sx1+ca15_sx2+ca15_bx+ca15_mx+ca15_cx_ij+ca15_cx_ik+ca15_ls1+ca15_ls2+\ + ca15_cx_imac1+ca15_cx_ialu1+ca15_cx_ialu2+ca15_cx_ishf+\ +--- a/src/gcc/config/arm/arm-tables.opt ++++ b/src/gcc/config/arm/arm-tables.opt +@@ -250,6 +250,9 @@ + Enum(processor_type) String(cortex-a15) Value(cortexa15) + + EnumValue ++Enum(processor_type) String(cortex-a53) Value(cortexa53) ++ ++EnumValue + Enum(processor_type) String(cortex-r4) Value(cortexr4) + + EnumValue +@@ -259,6 +262,9 @@ + Enum(processor_type) String(cortex-r5) Value(cortexr5) + + EnumValue ++Enum(processor_type) String(cortex-r7) Value(cortexr7) ++ ++EnumValue + Enum(processor_type) String(cortex-m4) Value(cortexm4) + + EnumValue +@@ -353,11 +359,14 @@ + Enum(arm_arch) String(armv8-a) Value(23) + + EnumValue +-Enum(arm_arch) String(iwmmxt) Value(24) ++Enum(arm_arch) String(armv8-a+crc) Value(24) + + EnumValue +-Enum(arm_arch) String(iwmmxt2) Value(25) ++Enum(arm_arch) String(iwmmxt) Value(25) + ++EnumValue ++Enum(arm_arch) String(iwmmxt2) Value(26) ++ + Enum + Name(arm_fpu) Type(int) + Known ARM FPUs (for use with the -mfpu= option): +--- a/src/gcc/config/arm/arm1026ejs.md ++++ b/src/gcc/config/arm/arm1026ejs.md +@@ -66,13 +66,21 @@ + ;; ALU operations with no shifted operand + (define_insn_reservation "alu_op" 1 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "type" "alu_reg,simple_alu_imm")) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,\ ++ mov_imm,mov_reg,mvn_imm,mvn_reg,\ ++ multiple,no_insn")) + "a_e,a_m,a_w") + + ;; ALU operations with a shift-by-constant operand + (define_insn_reservation "alu_shift_op" 1 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "type" "simple_alu_shift,alu_shift")) ++ (eq_attr "type" "alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ extend,mov_shift,mvn_shift")) + "a_e,a_m,a_w") + + ;; ALU operations with a shift-by-register operand +@@ -81,7 +89,9 @@ + ;; the execute stage. + (define_insn_reservation "alu_shift_reg_op" 2 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "type" "alu_shift_reg")) ++ (eq_attr "type" "alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_shift_reg,mvn_shift_reg")) + "a_e*2,a_m,a_w") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -96,7 +106,7 @@ + ;; until after the memory stage. + (define_insn_reservation "mult1" 2 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "insn" "smulxy,smulwy")) ++ (eq_attr "type" "smulxy,smulwy")) + "a_e,a_m,a_w") + + ;; The "smlaxy" and "smlawx" instructions require two iterations through +@@ -104,7 +114,7 @@ + ;; the execute stage. + (define_insn_reservation "mult2" 2 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "insn" "smlaxy,smlalxy,smlawx")) ++ (eq_attr "type" "smlaxy,smlalxy,smlawx")) + "a_e*2,a_m,a_w") + + ;; The "smlalxy", "mul", and "mla" instructions require two iterations +@@ -112,7 +122,7 @@ + ;; the memory stage. + (define_insn_reservation "mult3" 3 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "insn" "smlalxy,mul,mla")) ++ (eq_attr "type" "smlalxy,mul,mla")) + "a_e*2,a_m,a_w") + + ;; The "muls" and "mlas" instructions loop in the execute stage for +@@ -120,7 +130,7 @@ + ;; available after three iterations. + (define_insn_reservation "mult4" 3 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "insn" "muls,mlas")) ++ (eq_attr "type" "muls,mlas")) + "a_e*4,a_m,a_w") + + ;; Long multiply instructions that produce two registers of +@@ -135,7 +145,7 @@ + ;; available after the memory cycle. + (define_insn_reservation "mult5" 4 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "insn" "umull,umlal,smull,smlal")) ++ (eq_attr "type" "umull,umlal,smull,smlal")) + "a_e*3,a_m,a_w") + + ;; The "umulls", "umlals", "smulls", and "smlals" instructions loop in +@@ -143,7 +153,7 @@ + ;; The value result is available after four iterations. + (define_insn_reservation "mult6" 4 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "insn" "umulls,umlals,smulls,smlals")) ++ (eq_attr "type" "umulls,umlals,smulls,smlals")) + "a_e*5,a_m,a_w") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +--- a/src/gcc/config/arm/linux-elf.h ++++ b/src/gcc/config/arm/linux-elf.h +@@ -44,9 +44,9 @@ + + #define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION " -p" + ++/* We do not have any MULTILIB_OPTIONS specified, so there are no ++ MULTILIB_DEFAULTS. */ + #undef MULTILIB_DEFAULTS +-#define MULTILIB_DEFAULTS \ +- { "marm", "mlittle-endian", "mfloat-abi=hard", "mno-thumb-interwork" } + + /* Now we define the strings used to build the spec file. */ + #undef LIB_SPEC +--- a/src/gcc/config/arm/arm1136jfs.md ++++ b/src/gcc/config/arm/arm1136jfs.md +@@ -75,13 +75,21 @@ + ;; ALU operations with no shifted operand + (define_insn_reservation "11_alu_op" 2 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "type" "alu_reg,simple_alu_imm")) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,\ ++ mov_imm,mov_reg,mvn_imm,mvn_reg,\ ++ multiple,no_insn")) + "e_1,e_2,e_3,e_wb") + + ;; ALU operations with a shift-by-constant operand + (define_insn_reservation "11_alu_shift_op" 2 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "type" "simple_alu_shift,alu_shift")) ++ (eq_attr "type" "alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ extend,mov_shift,mvn_shift")) + "e_1,e_2,e_3,e_wb") + + ;; ALU operations with a shift-by-register operand +@@ -90,7 +98,9 @@ + ;; the shift stage. + (define_insn_reservation "11_alu_shift_reg_op" 3 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "type" "alu_shift_reg")) ++ (eq_attr "type" "alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_shift_reg,mvn_shift_reg")) + "e_1*2,e_2,e_3,e_wb") + + ;; alu_ops can start sooner, if there is no shifter dependency +@@ -129,13 +139,13 @@ + ;; Multiply and multiply-accumulate results are available after four stages. + (define_insn_reservation "11_mult1" 4 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "insn" "mul,mla")) ++ (eq_attr "type" "mul,mla")) + "e_1*2,e_2,e_3,e_wb") + + ;; The *S variants set the condition flags, which requires three more cycles. + (define_insn_reservation "11_mult2" 4 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "insn" "muls,mlas")) ++ (eq_attr "type" "muls,mlas")) + "e_1*2,e_2,e_3,e_wb") + + (define_bypass 3 "11_mult1,11_mult2" +@@ -160,13 +170,13 @@ + ;; the two multiply-accumulate instructions. + (define_insn_reservation "11_mult3" 5 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "insn" "smull,umull,smlal,umlal")) ++ (eq_attr "type" "smull,umull,smlal,umlal")) + "e_1*3,e_2,e_3,e_wb*2") + + ;; The *S variants set the condition flags, which requires three more cycles. + (define_insn_reservation "11_mult4" 5 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "insn" "smulls,umulls,smlals,umlals")) ++ (eq_attr "type" "smulls,umulls,smlals,umlals")) + "e_1*3,e_2,e_3,e_wb*2") + + (define_bypass 4 "11_mult3,11_mult4" +@@ -190,7 +200,8 @@ + ;; cycles. + (define_insn_reservation "11_mult5" 3 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "insn" "smulxy,smlaxy,smulwy,smlawy,smuad,smuadx,smlad,smladx,smusd,smusdx,smlsd,smlsdx")) ++ (eq_attr "type" "smulxy,smlaxy,smulwy,smlawy,smuad,smuadx,smlad,smladx,\ ++ smusd,smusdx,smlsd,smlsdx")) + "e_1,e_2,e_3,e_wb") + + (define_bypass 2 "11_mult5" +@@ -211,7 +222,7 @@ + ;; The same idea, then the 32-bit result is added to a 64-bit quantity. + (define_insn_reservation "11_mult6" 4 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "insn" "smlalxy")) ++ (eq_attr "type" "smlalxy")) + "e_1*2,e_2,e_3,e_wb*2") + + ;; Signed 32x32 multiply, then the most significant 32 bits are extracted +@@ -218,7 +229,7 @@ + ;; and are available after the memory stage. + (define_insn_reservation "11_mult7" 4 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "insn" "smmul,smmulr")) ++ (eq_attr "type" "smmul,smmulr")) + "e_1*2,e_2,e_3,e_wb") + + (define_bypass 3 "11_mult6,11_mult7" +--- a/src/gcc/config/arm/marvell-pj4.md ++++ b/src/gcc/config/arm/marvell-pj4.md +@@ -41,41 +41,55 @@ + + (define_insn_reservation "pj4_alu_e1" 1 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "simple_alu_imm,alu_reg") +- (not (eq_attr "conds" "set")) +- (eq_attr "insn" "mov,mvn")) ++ (eq_attr "type" "mov_imm,mov_reg,mvn_imm,mvn_reg") ++ (not (eq_attr "conds" "set"))) + "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)") + + (define_insn_reservation "pj4_alu_e1_conds" 4 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "simple_alu_imm,alu_reg") +- (eq_attr "conds" "set") +- (eq_attr "insn" "mov,mvn")) ++ (eq_attr "type" "mov_imm,mov_reg,mvn_imm,mvn_reg") ++ (eq_attr "conds" "set")) + "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)") + + (define_insn_reservation "pj4_alu" 1 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "simple_alu_imm,alu_reg") +- (not (eq_attr "conds" "set")) +- (not (eq_attr "insn" "mov,mvn"))) ++ (eq_attr "type" "alu_imm,alus_imm,alu_reg,alus_reg,\ ++ logic_imm,logics_imm,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg") ++ (not (eq_attr "conds" "set"))) + "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)") + + (define_insn_reservation "pj4_alu_conds" 4 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "simple_alu_imm,alu_reg") +- (eq_attr "conds" "set") +- (not (eq_attr "insn" "mov,mvn"))) ++ (eq_attr "type" "alu_imm,alus_imm,alu_reg,alus_reg,\ ++ logic_imm,logics_imm,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg") ++ (eq_attr "conds" "set")) + "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)") + + (define_insn_reservation "pj4_shift" 1 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "alu_shift,alu_shift_reg,simple_alu_shift") ++ (eq_attr "type" "alu_shift_imm,logic_shift_imm,\ ++ alus_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,logic_shift_reg,\ ++ alus_shift_reg,logics_shift_reg,\ ++ extend,\ ++ mov_shift,mvn_shift,mov_shift_reg,mvn_shift_reg") + (not (eq_attr "conds" "set")) + (eq_attr "shift" "1")) "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)") + + (define_insn_reservation "pj4_shift_conds" 4 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "alu_shift,alu_shift_reg,simple_alu_shift") ++ (eq_attr "type" "alu_shift_imm,logic_shift_imm,\ ++ alus_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,logic_shift_reg,\ ++ alus_shift_reg,logics_shift_reg,\ ++ extend,\ ++ mov_shift,mvn_shift,mov_shift_reg,mvn_shift_reg") + (eq_attr "conds" "set") + (eq_attr "shift" "1")) "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)") + +@@ -82,13 +96,21 @@ + (define_insn_reservation "pj4_alu_shift" 1 + (and (eq_attr "tune" "marvell_pj4") + (not (eq_attr "conds" "set")) +- (eq_attr "type" "alu_shift,alu_shift_reg,simple_alu_shift")) ++ (eq_attr "type" "alu_shift_imm,logic_shift_imm,\ ++ alus_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,logic_shift_reg,\ ++ alus_shift_reg,logics_shift_reg,\ ++ extend,\ ++ mov_shift,mvn_shift,mov_shift_reg,mvn_shift_reg")) + "pj4_is,(pj4_alu1,nothing,pj4_w1+pj4_cp)|(pj4_alu2,nothing,pj4_w2+pj4_cp)") + + (define_insn_reservation "pj4_alu_shift_conds" 4 + (and (eq_attr "tune" "marvell_pj4") + (eq_attr "conds" "set") +- (eq_attr "type" "alu_shift,alu_shift_reg,simple_alu_shift")) ++ (eq_attr "type" "alu_shift_imm,logic_shift_imm,alus_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,logic_shift_reg,alus_shift_reg,logics_shift_reg,\ ++ extend,\ ++ mov_shift,mvn_shift,mov_shift_reg,mvn_shift_reg")) + "pj4_is,(pj4_alu1,nothing,pj4_w1+pj4_cp)|(pj4_alu2,nothing,pj4_w2+pj4_cp)") + + (define_bypass 2 "pj4_alu_shift,pj4_shift" +@@ -95,10 +117,14 @@ + "pj4_ir_mul,pj4_ir_div,pj4_core_to_vfp") + + (define_insn_reservation "pj4_ir_mul" 3 +- (and (eq_attr "tune" "marvell_pj4") (eq_attr "type" "mult")) "pj4_is,pj4_mul,nothing*2,pj4_cp") ++ (and (eq_attr "tune" "marvell_pj4") ++ (ior (eq_attr "mul32" "yes") ++ (eq_attr "mul64" "yes"))) ++ "pj4_is,pj4_mul,nothing*2,pj4_cp") + + (define_insn_reservation "pj4_ir_div" 20 +- (and (eq_attr "tune" "marvell_pj4") (eq_attr "insn" "udiv,sdiv")) "pj4_is,pj4_div*19,pj4_cp") ++ (and (eq_attr "tune" "marvell_pj4") ++ (eq_attr "type" "udiv,sdiv")) "pj4_is,pj4_div*19,pj4_cp") + + ;; Branches and calls. + +@@ -167,11 +193,11 @@ + + (define_insn_reservation "pj4_vfp_divs" 20 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "fdivs")) "pj4_is,nothing*2,vissue,vdiv*18,nothing") ++ (eq_attr "type" "fdivs, fsqrts")) "pj4_is,nothing*2,vissue,vdiv*18,nothing") + + (define_insn_reservation "pj4_vfp_divd" 34 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "fdivd")) "pj4_is,nothing*2,vissue,vdiv*32,nothing") ++ (eq_attr "type" "fdivd, fsqrtd")) "pj4_is,nothing*2,vissue,vdiv*32,nothing") + + (define_insn_reservation "pj4_vfp_mac" 9 + (and (eq_attr "tune" "marvell_pj4") +@@ -182,8 +208,9 @@ + + (define_insn_reservation "pj4_vfp_cpy" 4 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "fcpys,ffariths,ffarithd,fconsts,fconstd,\ +- fcmps,fcmpd,f_cvt")) "pj4_is,nothing*2,vissue,vfast,nothing*2") ++ (eq_attr "type" "fmov,ffariths,ffarithd,fconsts,fconstd,\ ++ fcmps,fcmpd,f_cvt,f_cvtf2i,f_cvti2f")) ++"pj4_is,nothing*2,vissue,vfast,nothing*2") + + ;; Enlarge latency, and wish that more nondependent insns are + ;; scheduled immediately after VFP load. +@@ -197,9 +224,9 @@ + + (define_insn_reservation "pj4_vfp_to_core" 7 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "f_2_r,f_flag")) "pj4_isb,nothing,nothing,vissue,vfast,nothing*2") ++ (eq_attr "type" "f_mrc,f_mrrc,f_flag")) "pj4_isb,nothing,nothing,vissue,vfast,nothing*2") + + (define_insn_reservation "pj4_core_to_vfp" 2 + (and (eq_attr "tune" "marvell_pj4") +- (eq_attr "type" "r_2_f")) "pj4_isb,pj4_alu1,pj4_w1,vissue,pj4_cp") ++ (eq_attr "type" "f_mcr,f_mcrr")) "pj4_isb,pj4_alu1,pj4_w1,vissue,pj4_cp") + +--- a/src/gcc/config/arm/thumb2.md ++++ b/src/gcc/config/arm/thumb2.md +@@ -60,105 +60,237 @@ + "TARGET_THUMB2" + "bic%?\\t%0, %1, %2%S4" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "shift" "2") +- (set_attr "type" "alu_shift")] ++ (set_attr "type" "alu_shift_imm")] + ) + +-(define_insn "*thumb2_smaxsi3" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") +- (smax:SI (match_operand:SI 1 "s_register_operand" "0,r,?r") +- (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) ++;; We use the '0' constraint for operand 1 because reload should ++;; be smart enough to generate an appropriate move for the r/r/r case. ++(define_insn_and_split "*thumb2_smaxsi3" ++ [(set (match_operand:SI 0 "s_register_operand" "=r,l,r") ++ (smax:SI (match_operand:SI 1 "s_register_operand" "%0,0,0") ++ (match_operand:SI 2 "arm_rhs_operand" "r,Py,I"))) + (clobber (reg:CC CC_REGNUM))] +- "TARGET_THUMB2" +- "@ +- cmp\\t%1, %2\;it\\tlt\;movlt\\t%0, %2 +- cmp\\t%1, %2\;it\\tge\;movge\\t%0, %1 +- cmp\\t%1, %2\;ite\\tge\;movge\\t%0, %1\;movlt\\t%0, %2" ++ "TARGET_THUMB2" ++ "#" ++ ; cmp\\t%1, %2\;it\\tlt\;movlt\\t%0, %2 ++ "TARGET_THUMB2 && reload_completed" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (cond_exec (lt:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_dup 0) ++ (match_dup 2)))] ++ "" + [(set_attr "conds" "clob") +- (set_attr "length" "10,10,14")] ++ (set_attr "enabled_for_depr_it" "yes,yes,no") ++ (set_attr "length" "6,6,10") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*thumb2_sminsi3" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") +- (smin:SI (match_operand:SI 1 "s_register_operand" "0,r,?r") +- (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) ++(define_insn_and_split "*thumb2_sminsi3" ++ [(set (match_operand:SI 0 "s_register_operand" "=r,l,r") ++ (smin:SI (match_operand:SI 1 "s_register_operand" "%0,0,0") ++ (match_operand:SI 2 "arm_rhs_operand" "r,Py,I"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_THUMB2" +- "@ +- cmp\\t%1, %2\;it\\tge\;movge\\t%0, %2 +- cmp\\t%1, %2\;it\\tlt\;movlt\\t%0, %1 +- cmp\\t%1, %2\;ite\\tlt\;movlt\\t%0, %1\;movge\\t%0, %2" ++ "#" ++ ; cmp\\t%1, %2\;it\\tge\;movge\\t%0, %2 ++ "TARGET_THUMB2 && reload_completed" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (cond_exec (ge:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_dup 0) ++ (match_dup 2)))] ++ "" + [(set_attr "conds" "clob") +- (set_attr "length" "10,10,14")] ++ (set_attr "enabled_for_depr_it" "yes,yes,no") ++ (set_attr "length" "6,6,10") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*thumb32_umaxsi3" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") +- (umax:SI (match_operand:SI 1 "s_register_operand" "0,r,?r") +- (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) +- (clobber (reg:CC CC_REGNUM))] ++(define_insn_and_split "*thumb32_umaxsi3" ++ [(set (match_operand:SI 0 "s_register_operand" "=r,l,r") ++ (umax:SI (match_operand:SI 1 "s_register_operand" "%0,0,0") ++ (match_operand:SI 2 "arm_rhs_operand" "r,Py,I"))) ++ (clobber (reg:CC CC_REGNUM))] + "TARGET_THUMB2" +- "@ +- cmp\\t%1, %2\;it\\tcc\;movcc\\t%0, %2 +- cmp\\t%1, %2\;it\\tcs\;movcs\\t%0, %1 +- cmp\\t%1, %2\;ite\\tcs\;movcs\\t%0, %1\;movcc\\t%0, %2" ++ "#" ++ ; cmp\\t%1, %2\;it\\tcc\;movcc\\t%0, %2 ++ "TARGET_THUMB2 && reload_completed" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (cond_exec (ltu:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_dup 0) ++ (match_dup 2)))] ++ "" + [(set_attr "conds" "clob") +- (set_attr "length" "10,10,14")] ++ (set_attr "length" "6,6,10") ++ (set_attr "enabled_for_depr_it" "yes,yes,no") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*thumb2_uminsi3" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") +- (umin:SI (match_operand:SI 1 "s_register_operand" "0,r,?r") +- (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) ++(define_insn_and_split "*thumb2_uminsi3" ++ [(set (match_operand:SI 0 "s_register_operand" "=r,l,r") ++ (umin:SI (match_operand:SI 1 "s_register_operand" "%0,0,0") ++ (match_operand:SI 2 "arm_rhs_operand" "r,Py,I"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_THUMB2" +- "@ +- cmp\\t%1, %2\;it\\tcs\;movcs\\t%0, %2 +- cmp\\t%1, %2\;it\\tcc\;movcc\\t%0, %1 +- cmp\\t%1, %2\;ite\\tcc\;movcc\\t%0, %1\;movcs\\t%0, %2" ++ "#" ++ ; cmp\\t%1, %2\;it\\tcs\;movcs\\t%0, %2 ++ "TARGET_THUMB2 && reload_completed" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (cond_exec (geu:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_dup 0) ++ (match_dup 2)))] ++ "" + [(set_attr "conds" "clob") +- (set_attr "length" "10,10,14")] ++ (set_attr "length" "6,6,10") ++ (set_attr "enabled_for_depr_it" "yes,yes,no") ++ (set_attr "type" "multiple")] + ) + + ;; Thumb-2 does not have rsc, so use a clever trick with shifter operands. +-(define_insn "*thumb2_negdi2" ++(define_insn_and_split "*thumb2_negdi2" + [(set (match_operand:DI 0 "s_register_operand" "=&r,r") + (neg:DI (match_operand:DI 1 "s_register_operand" "?r,0"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_THUMB2" +- "negs\\t%Q0, %Q1\;sbc\\t%R0, %R1, %R1, lsl #1" ++ "#" ; negs\\t%Q0, %Q1\;sbc\\t%R0, %R1, %R1, lsl #1 ++ "&& reload_completed" ++ [(parallel [(set (reg:CC CC_REGNUM) ++ (compare:CC (const_int 0) (match_dup 1))) ++ (set (match_dup 0) (minus:SI (const_int 0) (match_dup 1)))]) ++ (set (match_dup 2) (minus:SI (minus:SI (match_dup 3) ++ (ashift:SI (match_dup 3) ++ (const_int 1))) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ { ++ operands[2] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ operands[3] = gen_highpart (SImode, operands[1]); ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ } + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*thumb2_abssi2" +- [(set (match_operand:SI 0 "s_register_operand" "=r,&r") +- (abs:SI (match_operand:SI 1 "s_register_operand" "0,r"))) ++(define_insn_and_split "*thumb2_abssi2" ++ [(set (match_operand:SI 0 "s_register_operand" "=&r,l,r") ++ (abs:SI (match_operand:SI 1 "s_register_operand" "r,0,0"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_THUMB2" +- "@ +- cmp\\t%0, #0\;it\tlt\;rsblt\\t%0, %0, #0 +- eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31" +- [(set_attr "conds" "clob,*") ++ "#" ++ ; eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31 ++ ; cmp\\t%0, #0\;it\tlt\;rsblt\\t%0, %0, #0 ++ ; cmp\\t%0, #0\;it\tlt\;rsblt\\t%0, %0, #0 ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ if (REGNO(operands[0]) == REGNO(operands[1])) ++ { ++ rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM); ++ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ cc_reg, ++ gen_rtx_COMPARE (CCmode, operands[0], const0_rtx))); ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ (gen_rtx_LT (SImode, ++ cc_reg, ++ const0_rtx)), ++ (gen_rtx_SET (VOIDmode, ++ operands[0], ++ (gen_rtx_MINUS (SImode, ++ const0_rtx, ++ operands[1])))))); ++ } ++ else ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_XOR (SImode, ++ gen_rtx_ASHIFTRT (SImode, ++ operands[1], ++ GEN_INT (31)), ++ operands[1]))); ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_MINUS (SImode, ++ operands[0], ++ gen_rtx_ASHIFTRT (SImode, ++ operands[1], ++ GEN_INT (31))))); ++ } ++ DONE; ++ } ++ [(set_attr "conds" "*,clob,clob") + (set_attr "shift" "1") +- (set_attr "predicable" "no, yes") ++ (set_attr "predicable" "yes,no,no") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "enabled_for_depr_it" "yes,yes,no") + (set_attr "ce_count" "2") +- (set_attr "length" "10,8")] ++ (set_attr "length" "8,6,10") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*thumb2_neg_abssi2" +- [(set (match_operand:SI 0 "s_register_operand" "=r,&r") +- (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" "0,r")))) ++(define_insn_and_split "*thumb2_neg_abssi2" ++ [(set (match_operand:SI 0 "s_register_operand" "=&r,l,r") ++ (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" "r,0,0")))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_THUMB2" +- "@ +- cmp\\t%0, #0\;it\\tgt\;rsbgt\\t%0, %0, #0 +- eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31" +- [(set_attr "conds" "clob,*") ++ "#" ++ ; eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31 ++ ; cmp\\t%0, #0\;it\\tgt\;rsbgt\\t%0, %0, #0 ++ ; cmp\\t%0, #0\;it\\tgt\;rsbgt\\t%0, %0, #0 ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ if (REGNO(operands[0]) == REGNO(operands[1])) ++ { ++ rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM); ++ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ cc_reg, ++ gen_rtx_COMPARE (CCmode, operands[0], const0_rtx))); ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ (gen_rtx_GT (SImode, ++ cc_reg, ++ const0_rtx)), ++ (gen_rtx_SET (VOIDmode, ++ operands[0], ++ (gen_rtx_MINUS (SImode, ++ const0_rtx, ++ operands[1])))))); ++ } ++ else ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_XOR (SImode, ++ gen_rtx_ASHIFTRT (SImode, ++ operands[1], ++ GEN_INT (31)), ++ operands[1]))); ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_MINUS (SImode, ++ gen_rtx_ASHIFTRT (SImode, ++ operands[1], ++ GEN_INT (31)), ++ operands[0]))); ++ } ++ DONE; ++ } ++ [(set_attr "conds" "*,clob,clob") + (set_attr "shift" "1") +- (set_attr "predicable" "no, yes") ++ (set_attr "predicable" "yes,no,no") ++ (set_attr "enabled_for_depr_it" "yes,yes,no") ++ (set_attr "predicable_short_it" "no") + (set_attr "ce_count" "2") +- (set_attr "length" "10,8")] ++ (set_attr "length" "8,6,10") ++ (set_attr "type" "multiple")] + ) + + ;; We have two alternatives here for memory loads (and similarly for stores) +@@ -167,8 +299,8 @@ + ;; regs. The high register alternatives are not taken into account when + ;; choosing register preferences in order to reflect their expense. + (define_insn "*thumb2_movsi_insn" +- [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,l ,*hk,m,*m") +- (match_operand:SI 1 "general_operand" "rk ,I,K,j,mi,*mi,l,*hk"))] ++ [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,l,r,r,l ,*hk,m,*m") ++ (match_operand:SI 1 "general_operand" "rk,I,Py,K,j,mi,*mi,l,*hk"))] + "TARGET_THUMB2 && ! TARGET_IWMMXT + && !(TARGET_HARD_FLOAT && TARGET_VFP) + && ( register_operand (operands[0], SImode) +@@ -176,6 +308,7 @@ + "@ + mov%?\\t%0, %1 + mov%?\\t%0, %1 ++ mov%?\\t%0, %1 + mvn%?\\t%0, #%B1 + movw%?\\t%0, %1 + ldr%?\\t%0, %1 +@@ -182,10 +315,12 @@ + ldr%?\\t%0, %1 + str%?\\t%1, %0 + str%?\\t%1, %0" +- [(set_attr "type" "*,*,simple_alu_imm,*,load1,load1,store1,store1") ++ [(set_attr "type" "mov_reg,alu_imm,alu_imm,alu_imm,mov_imm,load1,load1,store1,store1") ++ (set_attr "length" "2,4,2,4,4,4,4,4,4") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,*,*,*,1018,4094,*,*") +- (set_attr "neg_pool_range" "*,*,*,*,0,0,*,*")] ++ (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no,no,no") ++ (set_attr "pool_range" "*,*,*,*,*,1018,4094,*,*") ++ (set_attr "neg_pool_range" "*,*,*,*,*,0,0,*,*")] + ) + + (define_insn "tls_load_dot_plus_four" +@@ -201,7 +336,8 @@ + INTVAL (operands[3])); + return \"add\\t%2, %|pc\;ldr%?\\t%0, [%2]\"; + " +- [(set_attr "length" "4,4,6,6")] ++ [(set_attr "length" "4,4,6,6") ++ (set_attr "type" "multiple")] + ) + + ;; Thumb-2 always has load/store halfword instructions, so we can avoid a lot +@@ -217,12 +353,27 @@ + movw%?\\t%0, %L1\\t%@ movhi + str%(h%)\\t%1, %0\\t%@ movhi + ldr%(h%)\\t%0, %1\\t%@ movhi" +- [(set_attr "type" "*,*,store1,load1") ++ [(set_attr "type" "mov_imm,mov_reg,store1,load1") + (set_attr "predicable" "yes") + (set_attr "pool_range" "*,*,*,4094") + (set_attr "neg_pool_range" "*,*,*,250")] + ) + ++(define_insn "*thumb2_storewb_pairsi" ++ [(set (match_operand:SI 0 "register_operand" "=&kr") ++ (plus:SI (match_operand:SI 1 "register_operand" "0") ++ (match_operand:SI 2 "const_int_operand" "n"))) ++ (set (mem:SI (plus:SI (match_dup 0) (match_dup 2))) ++ (match_operand:SI 3 "register_operand" "r")) ++ (set (mem:SI (plus:SI (match_dup 0) ++ (match_operand:SI 5 "const_int_operand" "n"))) ++ (match_operand:SI 4 "register_operand" "r"))] ++ "TARGET_THUMB2 ++ && INTVAL (operands[5]) == INTVAL (operands[2]) + 4" ++ "strd\\t%3, %4, [%0, %2]!" ++ [(set_attr "type" "store2")] ++) ++ + (define_insn "*thumb2_cmpsi_neg_shiftsi" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_operand:SI 0 "s_register_operand" "r") +@@ -233,58 +384,177 @@ + "cmn%?\\t%0, %1%S3" + [(set_attr "conds" "set") + (set_attr "shift" "1") +- (set_attr "type" "alu_shift")] ++ (set_attr "type" "alus_shift_imm")] + ) + +-(define_insn "*thumb2_mov_scc" +- [(set (match_operand:SI 0 "s_register_operand" "=r") ++(define_insn_and_split "*thumb2_mov_scc" ++ [(set (match_operand:SI 0 "s_register_operand" "=l,r") + (match_operator:SI 1 "arm_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)]))] + "TARGET_THUMB2" +- "ite\\t%D1\;mov%D1\\t%0, #0\;mov%d1\\t%0, #1" ++ "#" ; "ite\\t%D1\;mov%D1\\t%0, #0\;mov%d1\\t%0, #1" ++ "TARGET_THUMB2" ++ [(set (match_dup 0) ++ (if_then_else:SI (match_dup 1) ++ (const_int 1) ++ (const_int 0)))] ++ "" + [(set_attr "conds" "use") +- (set_attr "length" "10")] ++ (set_attr "enabled_for_depr_it" "yes,no") ++ (set_attr "length" "8,10") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*thumb2_mov_negscc" ++(define_insn_and_split "*thumb2_mov_negscc" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (neg:SI (match_operator:SI 1 "arm_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)])))] ++ "TARGET_THUMB2 && !arm_restrict_it" ++ "#" ; "ite\\t%D1\;mov%D1\\t%0, #0\;mvn%d1\\t%0, #0" + "TARGET_THUMB2" +- "ite\\t%D1\;mov%D1\\t%0, #0\;mvn%d1\\t%0, #0" ++ [(set (match_dup 0) ++ (if_then_else:SI (match_dup 1) ++ (match_dup 3) ++ (const_int 0)))] ++ { ++ operands[3] = GEN_INT (~0); ++ } + [(set_attr "conds" "use") +- (set_attr "length" "10")] ++ (set_attr "length" "10") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*thumb2_mov_notscc" ++(define_insn_and_split "*thumb2_mov_negscc_strict_it" ++ [(set (match_operand:SI 0 "low_register_operand" "=l") ++ (neg:SI (match_operator:SI 1 "arm_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)])))] ++ "TARGET_THUMB2 && arm_restrict_it" ++ "#" ; ";mvn\\t%0, #0 ;it\\t%D1\;mov%D1\\t%0, #0\" ++ "&& reload_completed" ++ [(set (match_dup 0) ++ (match_dup 3)) ++ (cond_exec (match_dup 4) ++ (set (match_dup 0) ++ (const_int 0)))] ++ { ++ operands[3] = GEN_INT (~0); ++ enum machine_mode mode = GET_MODE (operands[2]); ++ enum rtx_code rc = GET_CODE (operands[1]); ++ ++ if (mode == CCFPmode || mode == CCFPEmode) ++ rc = reverse_condition_maybe_unordered (rc); ++ else ++ rc = reverse_condition (rc); ++ operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx); ++ ++ } ++ [(set_attr "conds" "use") ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] ++) ++ ++(define_insn_and_split "*thumb2_mov_notscc" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (not:SI (match_operator:SI 1 "arm_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)])))] ++ "TARGET_THUMB2 && !arm_restrict_it" ++ "#" ; "ite\\t%D1\;mvn%D1\\t%0, #0\;mvn%d1\\t%0, #1" + "TARGET_THUMB2" +- "ite\\t%D1\;mvn%D1\\t%0, #0\;mvn%d1\\t%0, #1" ++ [(set (match_dup 0) ++ (if_then_else:SI (match_dup 1) ++ (match_dup 3) ++ (match_dup 4)))] ++ { ++ operands[3] = GEN_INT (~1); ++ operands[4] = GEN_INT (~0); ++ } + [(set_attr "conds" "use") +- (set_attr "length" "10")] ++ (set_attr "length" "10") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*thumb2_movsicc_insn" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r,r,r,r,r,r") ++(define_insn_and_split "*thumb2_mov_notscc_strict_it" ++ [(set (match_operand:SI 0 "low_register_operand" "=l") ++ (not:SI (match_operator:SI 1 "arm_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)])))] ++ "TARGET_THUMB2 && arm_restrict_it" ++ "#" ; "mvn %0, #0 ; it%d1 ; lsl%d1 %0, %0, #1" ++ "&& reload_completed" ++ [(set (match_dup 0) ++ (match_dup 3)) ++ (cond_exec (match_dup 4) ++ (set (match_dup 0) ++ (ashift:SI (match_dup 0) ++ (const_int 1))))] ++ { ++ operands[3] = GEN_INT (~0); ++ operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[1]), ++ VOIDmode, operands[2], const0_rtx); ++ } ++ [(set_attr "conds" "use") ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] ++) ++ ++(define_insn_and_split "*thumb2_movsicc_insn" ++ [(set (match_operand:SI 0 "s_register_operand" "=l,l,r,r,r,r,r,r,r,r,r") + (if_then_else:SI + (match_operator 3 "arm_comparison_operator" + [(match_operand 4 "cc_register" "") (const_int 0)]) +- (match_operand:SI 1 "arm_not_operand" "0,0,rI,K,rI,rI,K,K") +- (match_operand:SI 2 "arm_not_operand" "rI,K,0,0,rI,K,rI,K")))] ++ (match_operand:SI 1 "arm_not_operand" "0 ,lPy,0 ,0,rI,K,rI,rI,K ,K,r") ++ (match_operand:SI 2 "arm_not_operand" "lPy,0 ,rI,K,0 ,0,rI,K ,rI,K,r")))] + "TARGET_THUMB2" + "@ + it\\t%D3\;mov%D3\\t%0, %2 ++ it\\t%d3\;mov%d3\\t%0, %1 ++ it\\t%D3\;mov%D3\\t%0, %2 + it\\t%D3\;mvn%D3\\t%0, #%B2 + it\\t%d3\;mov%d3\\t%0, %1 + it\\t%d3\;mvn%d3\\t%0, #%B1 +- ite\\t%d3\;mov%d3\\t%0, %1\;mov%D3\\t%0, %2 +- ite\\t%d3\;mov%d3\\t%0, %1\;mvn%D3\\t%0, #%B2 +- ite\\t%d3\;mvn%d3\\t%0, #%B1\;mov%D3\\t%0, %2 +- ite\\t%d3\;mvn%d3\\t%0, #%B1\;mvn%D3\\t%0, #%B2" +- [(set_attr "length" "6,6,6,6,10,10,10,10") +- (set_attr "conds" "use")] ++ # ++ # ++ # ++ # ++ #" ++ ; alt 6: ite\\t%d3\;mov%d3\\t%0, %1\;mov%D3\\t%0, %2 ++ ; alt 7: ite\\t%d3\;mov%d3\\t%0, %1\;mvn%D3\\t%0, #%B2 ++ ; alt 8: ite\\t%d3\;mvn%d3\\t%0, #%B1\;mov%D3\\t%0, %2 ++ ; alt 9: ite\\t%d3\;mvn%d3\\t%0, #%B1\;mvn%D3\\t%0, #%B2 ++ ; alt 10: ite\\t%d3\;mov%d3\\t%0, %1\;mov%D3\\t%0, %2 ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ enum rtx_code rev_code; ++ enum machine_mode mode; ++ rtx rev_cond; ++ ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ operands[3], ++ gen_rtx_SET (VOIDmode, ++ operands[0], ++ operands[1]))); ++ rev_code = GET_CODE (operands[3]); ++ mode = GET_MODE (operands[4]); ++ if (mode == CCFPmode || mode == CCFPEmode) ++ rev_code = reverse_condition_maybe_unordered (rev_code); ++ else ++ rev_code = reverse_condition (rev_code); ++ ++ rev_cond = gen_rtx_fmt_ee (rev_code, ++ VOIDmode, ++ gen_rtx_REG (mode, CC_REGNUM), ++ const0_rtx); ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ rev_cond, ++ gen_rtx_SET (VOIDmode, ++ operands[0], ++ operands[2]))); ++ DONE; ++ } ++ [(set_attr "length" "4,4,6,6,6,6,10,10,10,10,6") ++ (set_attr "enabled_for_depr_it" "yes,yes,no,no,no,no,no,no,no,no,yes") ++ (set_attr "conds" "use") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*thumb2_movsfcc_soft_insn" +@@ -298,7 +568,8 @@ + it\\t%D3\;mov%D3\\t%0, %2 + it\\t%d3\;mov%d3\\t%0, %1" + [(set_attr "length" "6,6") +- (set_attr "conds" "use")] ++ (set_attr "conds" "use") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*call_reg_thumb2" +@@ -327,34 +598,84 @@ + (match_operand:SI 0 "register_operand" "l*r"))] + "TARGET_THUMB2" + "bx\\t%0" +- [(set_attr "conds" "clob")] ++ [(set_attr "conds" "clob") ++ (set_attr "type" "branch")] + ) + ;; Don't define thumb2_load_indirect_jump because we can't guarantee label + ;; addresses will have the thumb bit set correctly. + + +-(define_insn "*thumb2_and_scc" +- [(set (match_operand:SI 0 "s_register_operand" "=r") ++(define_insn_and_split "*thumb2_and_scc" ++ [(set (match_operand:SI 0 "s_register_operand" "=Ts") + (and:SI (match_operator:SI 1 "arm_comparison_operator" +- [(match_operand 3 "cc_register" "") (const_int 0)]) +- (match_operand:SI 2 "s_register_operand" "r")))] ++ [(match_operand 2 "cc_register" "") (const_int 0)]) ++ (match_operand:SI 3 "s_register_operand" "r")))] + "TARGET_THUMB2" +- "ite\\t%D1\;mov%D1\\t%0, #0\;and%d1\\t%0, %2, #1" ++ "#" ; "and\\t%0, %3, #1\;it\\t%D1\;mov%D1\\t%0, #0" ++ "&& reload_completed" ++ [(set (match_dup 0) ++ (and:SI (match_dup 3) (const_int 1))) ++ (cond_exec (match_dup 4) (set (match_dup 0) (const_int 0)))] ++ { ++ enum machine_mode mode = GET_MODE (operands[2]); ++ enum rtx_code rc = GET_CODE (operands[1]); ++ ++ if (mode == CCFPmode || mode == CCFPEmode) ++ rc = reverse_condition_maybe_unordered (rc); ++ else ++ rc = reverse_condition (rc); ++ operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx); ++ } + [(set_attr "conds" "use") +- (set_attr "length" "10")] ++ (set_attr "type" "multiple") ++ (set (attr "length") (if_then_else (match_test "arm_restrict_it") ++ (const_int 8) ++ (const_int 10)))] + ) + +-(define_insn "*thumb2_ior_scc" ++(define_insn_and_split "*thumb2_ior_scc" + [(set (match_operand:SI 0 "s_register_operand" "=r,r") ++ (ior:SI (match_operator:SI 1 "arm_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)]) ++ (match_operand:SI 3 "s_register_operand" "0,?r")))] ++ "TARGET_THUMB2 && !arm_restrict_it" ++ "@ ++ it\\t%d1\;orr%d1\\t%0, %3, #1 ++ #" ++ ; alt 1: ite\\t%D1\;mov%D1\\t%0, %3\;orr%d1\\t%0, %3, #1 ++ "&& reload_completed ++ && REGNO (operands [0]) != REGNO (operands[3])" ++ [(cond_exec (match_dup 5) (set (match_dup 0) (match_dup 3))) ++ (cond_exec (match_dup 4) (set (match_dup 0) ++ (ior:SI (match_dup 3) (const_int 1))))] ++ { ++ enum machine_mode mode = GET_MODE (operands[2]); ++ enum rtx_code rc = GET_CODE (operands[1]); ++ ++ operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx); ++ if (mode == CCFPmode || mode == CCFPEmode) ++ rc = reverse_condition_maybe_unordered (rc); ++ else ++ rc = reverse_condition (rc); ++ operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx); ++ } ++ [(set_attr "conds" "use") ++ (set_attr "length" "6,10") ++ (set_attr "type" "multiple")] ++) ++ ++(define_insn "*thumb2_ior_scc_strict_it" ++ [(set (match_operand:SI 0 "s_register_operand" "=l,l") + (ior:SI (match_operator:SI 2 "arm_comparison_operator" + [(match_operand 3 "cc_register" "") (const_int 0)]) +- (match_operand:SI 1 "s_register_operand" "0,?r")))] +- "TARGET_THUMB2" ++ (match_operand:SI 1 "s_register_operand" "0,?l")))] ++ "TARGET_THUMB2 && arm_restrict_it" + "@ +- it\\t%d2\;orr%d2\\t%0, %1, #1 +- ite\\t%D2\;mov%D2\\t%0, %1\;orr%d2\\t%0, %1, #1" ++ it\\t%d2\;mov%d2\\t%0, #1\;it\\t%d2\;orr%d2\\t%0, %1 ++ mov\\t%0, #1\;orr\\t%0, %1\;it\\t%D2\;mov%D2\\t%0, %1" + [(set_attr "conds" "use") +- (set_attr "length" "6,10")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*thumb2_cond_move" +@@ -384,19 +705,27 @@ + output_asm_insn (\"it\\t%D4\", operands); + break; + case 2: +- output_asm_insn (\"ite\\t%D4\", operands); ++ if (arm_restrict_it) ++ output_asm_insn (\"it\\t%D4\", operands); ++ else ++ output_asm_insn (\"ite\\t%D4\", operands); + break; + default: + abort(); + } + if (which_alternative != 0) +- output_asm_insn (\"mov%D4\\t%0, %1\", operands); ++ { ++ output_asm_insn (\"mov%D4\\t%0, %1\", operands); ++ if (arm_restrict_it && which_alternative == 2) ++ output_asm_insn (\"it\\t%d4\", operands); ++ } + if (which_alternative != 1) + output_asm_insn (\"mov%d4\\t%0, %2\", operands); + return \"\"; + " + [(set_attr "conds" "use") +- (set_attr "length" "6,6,10")] ++ (set_attr "length" "6,6,10") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*thumb2_cond_arith" +@@ -407,7 +736,7 @@ + (match_operand:SI 3 "arm_rhs_operand" "rI,rI")]) + (match_operand:SI 1 "s_register_operand" "0,?r")])) + (clobber (reg:CC CC_REGNUM))] +- "TARGET_THUMB2" ++ "TARGET_THUMB2 && !arm_restrict_it" + "* + if (GET_CODE (operands[4]) == LT && operands[3] == const0_rtx) + return \"%i5\\t%0, %1, %2, lsr #31\"; +@@ -433,12 +762,83 @@ + return \"%i5%d4\\t%0, %1, #1\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "14")] ++ (set_attr "length" "14") ++ (set_attr "type" "multiple")] + ) + ++(define_insn_and_split "*thumb2_cond_arith_strict_it" ++ [(set (match_operand:SI 0 "s_register_operand" "=l") ++ (match_operator:SI 5 "shiftable_operator_strict_it" ++ [(match_operator:SI 4 "arm_comparison_operator" ++ [(match_operand:SI 2 "s_register_operand" "r") ++ (match_operand:SI 3 "arm_rhs_operand" "rI")]) ++ (match_operand:SI 1 "s_register_operand" "0")])) ++ (clobber (reg:CC CC_REGNUM))] ++ "TARGET_THUMB2 && arm_restrict_it" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ if (GET_CODE (operands[4]) == LT && operands[3] == const0_rtx) ++ { ++ /* %i5 %0, %1, %2, lsr #31 */ ++ rtx shifted_op = gen_rtx_LSHIFTRT (SImode, operands[2], GEN_INT (31)); ++ rtx op = NULL_RTX; ++ ++ switch (GET_CODE (operands[5])) ++ { ++ case AND: ++ op = gen_rtx_AND (SImode, shifted_op, operands[1]); ++ break; ++ case PLUS: ++ op = gen_rtx_PLUS (SImode, shifted_op, operands[1]); ++ break; ++ default: gcc_unreachable (); ++ } ++ emit_insn (gen_rtx_SET (VOIDmode, operands[0], op)); ++ DONE; ++ } ++ ++ /* "cmp %2, %3" */ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ gen_rtx_REG (CCmode, CC_REGNUM), ++ gen_rtx_COMPARE (CCmode, operands[2], operands[3]))); ++ ++ if (GET_CODE (operands[5]) == AND) ++ { ++ /* %i5 %0, %1, #1 ++ it%D4 ++ mov%D4 %0, #0 */ ++ enum rtx_code rc = reverse_condition (GET_CODE (operands[4])); ++ emit_insn (gen_rtx_SET (VOIDmode, operands[0], gen_rtx_AND (SImode, operands[1], GEN_INT (1)))); ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ gen_rtx_fmt_ee (rc, VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM), const0_rtx), ++ gen_rtx_SET (VOIDmode, operands[0], const0_rtx))); ++ DONE; ++ } ++ else ++ { ++ /* it\\t%d4 ++ %i5%d4\\t%0, %1, #1 */ ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, gen_rtx_fmt_ee (GET_CODE (operands[4]), ++ VOIDmode, ++ gen_rtx_REG (CCmode, CC_REGNUM), const0_rtx), ++ gen_rtx_SET(VOIDmode, operands[0], ++ gen_rtx_PLUS (SImode, ++ operands[1], ++ GEN_INT (1))))); ++ DONE; ++ } ++ FAIL; ++ } ++ [(set_attr "conds" "clob") ++ (set_attr "length" "12") ++ (set_attr "type" "multiple")] ++) ++ + (define_insn "*thumb2_cond_sub" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r") +- (minus:SI (match_operand:SI 1 "s_register_operand" "0,?r") ++ [(set (match_operand:SI 0 "s_register_operand" "=Ts,Ts") ++ (minus:SI (match_operand:SI 1 "s_register_operand" "0,?Ts") + (match_operator:SI 4 "arm_comparison_operator" + [(match_operand:SI 2 "s_register_operand" "r,r") + (match_operand:SI 3 "arm_rhs_operand" "rI,rI")]))) +@@ -448,8 +848,16 @@ + output_asm_insn (\"cmp\\t%2, %3\", operands); + if (which_alternative != 0) + { +- output_asm_insn (\"ite\\t%D4\", operands); +- output_asm_insn (\"mov%D4\\t%0, %1\", operands); ++ if (arm_restrict_it) ++ { ++ output_asm_insn (\"mov\\t%0, %1\", operands); ++ output_asm_insn (\"it\\t%d4\", operands); ++ } ++ else ++ { ++ output_asm_insn (\"ite\\t%D4\", operands); ++ output_asm_insn (\"mov%D4\\t%0, %1\", operands); ++ } + } + else + output_asm_insn (\"it\\t%d4\", operands); +@@ -456,40 +864,87 @@ + return \"sub%d4\\t%0, %1, #1\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "10,14")] ++ (set_attr "length" "10,14") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*thumb2_negscc" +- [(set (match_operand:SI 0 "s_register_operand" "=r") ++(define_insn_and_split "*thumb2_negscc" ++ [(set (match_operand:SI 0 "s_register_operand" "=Ts") + (neg:SI (match_operator 3 "arm_comparison_operator" + [(match_operand:SI 1 "s_register_operand" "r") + (match_operand:SI 2 "arm_rhs_operand" "rI")]))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_THUMB2" +- "* +- if (GET_CODE (operands[3]) == LT && operands[2] == const0_rtx) +- return \"asr\\t%0, %1, #31\"; ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM); + +- if (GET_CODE (operands[3]) == NE) +- return \"subs\\t%0, %1, %2\;it\\tne\;mvnne\\t%0, #0\"; ++ if (GET_CODE (operands[3]) == LT && operands[2] == const0_rtx) ++ { ++ /* Emit asr\\t%0, %1, #31 */ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_ASHIFTRT (SImode, ++ operands[1], ++ GEN_INT (31)))); ++ DONE; ++ } ++ else if (GET_CODE (operands[3]) == NE && !arm_restrict_it) ++ { ++ /* Emit subs\\t%0, %1, %2\;it\\tne\;mvnne\\t%0, #0 */ ++ if (CONST_INT_P (operands[2])) ++ emit_insn (gen_cmpsi2_addneg (operands[0], operands[1], operands[2], ++ GEN_INT (- INTVAL (operands[2])))); ++ else ++ emit_insn (gen_subsi3_compare (operands[0], operands[1], operands[2])); + +- output_asm_insn (\"cmp\\t%1, %2\", operands); +- output_asm_insn (\"ite\\t%D3\", operands); +- output_asm_insn (\"mov%D3\\t%0, #0\", operands); +- return \"mvn%d3\\t%0, #0\"; +- " ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ gen_rtx_NE (SImode, ++ cc_reg, ++ const0_rtx), ++ gen_rtx_SET (SImode, ++ operands[0], ++ GEN_INT (~0)))); ++ DONE; ++ } ++ else ++ { ++ /* Emit: cmp\\t%1, %2\;mvn\\t%0, #0\;it\\t%D3\;mov%D3\\t%0, #0\;*/ ++ enum rtx_code rc = reverse_condition (GET_CODE (operands[3])); ++ enum machine_mode mode = SELECT_CC_MODE (rc, operands[1], operands[2]); ++ rtx tmp1 = gen_rtx_REG (mode, CC_REGNUM); ++ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ cc_reg, ++ gen_rtx_COMPARE (CCmode, operands[1], operands[2]))); ++ ++ emit_insn (gen_rtx_SET (VOIDmode, operands[0], GEN_INT (~0))); ++ ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ gen_rtx_fmt_ee (rc, ++ VOIDmode, ++ tmp1, ++ const0_rtx), ++ gen_rtx_SET (VOIDmode, operands[0], const0_rtx))); ++ DONE; ++ } ++ FAIL; ++ } + [(set_attr "conds" "clob") +- (set_attr "length" "14")] ++ (set_attr "length" "14") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*thumb2_movcond" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") ++ [(set (match_operand:SI 0 "s_register_operand" "=Ts,Ts,Ts") + (if_then_else:SI + (match_operator 5 "arm_comparison_operator" + [(match_operand:SI 3 "s_register_operand" "r,r,r") + (match_operand:SI 4 "arm_add_operand" "rIL,rIL,rIL")]) +- (match_operand:SI 1 "arm_rhs_operand" "0,rI,?rI") +- (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) ++ (match_operand:SI 1 "arm_rhs_operand" "0,TsI,?TsI") ++ (match_operand:SI 2 "arm_rhs_operand" "TsI,0,TsI"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_THUMB2" + "* +@@ -544,12 +999,18 @@ + output_asm_insn (\"it\\t%d5\", operands); + break; + case 2: +- output_asm_insn (\"ite\\t%d5\", operands); ++ if (arm_restrict_it) ++ { ++ output_asm_insn (\"mov\\t%0, %1\", operands); ++ output_asm_insn (\"it\\t%D5\", operands); ++ } ++ else ++ output_asm_insn (\"ite\\t%d5\", operands); + break; + default: + abort(); + } +- if (which_alternative != 0) ++ if (which_alternative != 0 && !(arm_restrict_it && which_alternative == 2)) + output_asm_insn (\"mov%d5\\t%0, %1\", operands); + if (which_alternative != 1) + output_asm_insn (\"mov%D5\\t%0, %2\", operands); +@@ -556,7 +1017,8 @@ + return \"\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "10,10,14")] ++ (set_attr "length" "10,10,14") ++ (set_attr "type" "multiple")] + ) + + ;; Zero and sign extension instructions. +@@ -570,8 +1032,9 @@ + "@ + sxtb%?\\t%0, %1 + ldr%(sb%)\\t%0, %1" +- [(set_attr "type" "simple_alu_shift,load_byte") ++ [(set_attr "type" "extend,load_byte") + (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "pool_range" "*,4094") + (set_attr "neg_pool_range" "*,250")] + ) +@@ -583,8 +1046,9 @@ + "@ + uxth%?\\t%0, %1 + ldr%(h%)\\t%0, %1" +- [(set_attr "type" "simple_alu_shift,load_byte") ++ [(set_attr "type" "extend,load_byte") + (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "pool_range" "*,4094") + (set_attr "neg_pool_range" "*,250")] + ) +@@ -596,8 +1060,9 @@ + "@ + uxtb%(%)\\t%0, %1 + ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2" +- [(set_attr "type" "simple_alu_shift,load_byte") ++ [(set_attr "type" "extend,load_byte") + (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "pool_range" "*,4094") + (set_attr "neg_pool_range" "*,250")] + ) +@@ -616,7 +1081,8 @@ + "TARGET_THUMB2 && !flag_pic" + "* return thumb2_output_casesi(operands);" + [(set_attr "conds" "clob") +- (set_attr "length" "16")] ++ (set_attr "length" "16") ++ (set_attr "type" "multiple")] + ) + + (define_insn "thumb2_casesi_internal_pic" +@@ -634,7 +1100,8 @@ + "TARGET_THUMB2 && flag_pic" + "* return thumb2_output_casesi(operands);" + [(set_attr "conds" "clob") +- (set_attr "length" "20")] ++ (set_attr "length" "20") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*thumb2_return" +@@ -671,7 +1138,8 @@ + && GET_CODE(operands[3]) != MINUS" + "%I3%!\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "length" "2")] ++ (set_attr "length" "2") ++ (set_attr "type" "alu_reg")] + ) + + (define_insn "*thumb2_shiftsi3_short" +@@ -688,7 +1156,7 @@ + (set_attr "shift" "1") + (set_attr "length" "2") + (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "") +- (const_string "alu_shift") ++ (const_string "alu_shift_imm") + (const_string "alu_shift_reg")))] + ) + +@@ -699,7 +1167,8 @@ + "TARGET_THUMB2 && reload_completed" + "mov%!\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "length" "2")] ++ (set_attr "length" "2") ++ (set_attr "type" "mov_imm")] + ) + + (define_insn "*thumb2_addsi_short" +@@ -723,7 +1192,8 @@ + return \"add%!\\t%0, %1, %2\"; + " + [(set_attr "predicable" "yes") +- (set_attr "length" "2")] ++ (set_attr "length" "2") ++ (set_attr "type" "alu_reg")] + ) + + (define_insn "*thumb2_subsi_short" +@@ -734,7 +1204,8 @@ + "TARGET_THUMB2 && reload_completed" + "sub%!\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "length" "2")] ++ (set_attr "length" "2") ++ (set_attr "type" "alu_reg")] + ) + + (define_peephole2 +@@ -786,7 +1257,8 @@ + return \"adds\\t%0, %1, %2\"; + " + [(set_attr "conds" "set") +- (set_attr "length" "2,2,4")] ++ (set_attr "length" "2,2,4") ++ (set_attr "type" "alu_reg")] + ) + + (define_insn "*thumb2_addsi3_compare0_scratch" +@@ -811,7 +1283,7 @@ + " + [(set_attr "conds" "set") + (set_attr "length" "2,2,4,4") +- (set_attr "type" "simple_alu_imm,*,simple_alu_imm,*")] ++ (set_attr "type" "alus_imm,alus_reg,alus_imm,alus_reg")] + ) + + (define_insn "*thumb2_mulsi_short" +@@ -823,7 +1295,7 @@ + "mul%!\\t%0, %2, %0" + [(set_attr "predicable" "yes") + (set_attr "length" "2") +- (set_attr "insn" "muls")]) ++ (set_attr "type" "muls")]) + + (define_insn "*thumb2_mulsi_short_compare0" + [(set (reg:CC_NOOV CC_REGNUM) +@@ -836,7 +1308,7 @@ + "TARGET_THUMB2 && optimize_size" + "muls\\t%0, %2, %0" + [(set_attr "length" "2") +- (set_attr "insn" "muls")]) ++ (set_attr "type" "muls")]) + + (define_insn "*thumb2_mulsi_short_compare0_scratch" + [(set (reg:CC_NOOV CC_REGNUM) +@@ -848,7 +1320,7 @@ + "TARGET_THUMB2 && optimize_size" + "muls\\t%0, %2, %0" + [(set_attr "length" "2") +- (set_attr "insn" "muls")]) ++ (set_attr "type" "muls")]) + + (define_insn "*thumb2_cbz" + [(set (pc) (if_then_else +@@ -870,7 +1342,8 @@ + (le (minus (match_dup 1) (pc)) (const_int 128)) + (not (match_test "which_alternative"))) + (const_int 2) +- (const_int 8)))] ++ (const_int 8))) ++ (set_attr "type" "branch,multiple")] + ) + + (define_insn "*thumb2_cbnz" +@@ -893,7 +1366,8 @@ + (le (minus (match_dup 1) (pc)) (const_int 128)) + (not (match_test "which_alternative"))) + (const_int 2) +- (const_int 8)))] ++ (const_int 8))) ++ (set_attr "type" "branch,multiple")] + ) + + (define_insn "*thumb2_one_cmplsi2_short" +@@ -903,7 +1377,8 @@ + "TARGET_THUMB2 && reload_completed" + "mvn%!\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "length" "2")] ++ (set_attr "length" "2") ++ (set_attr "type" "mvn_reg")] + ) + + (define_insn "*thumb2_negsi2_short" +@@ -913,7 +1388,8 @@ + "TARGET_THUMB2 && reload_completed" + "neg%!\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "length" "2")] ++ (set_attr "length" "2") ++ (set_attr "type" "alu_reg")] + ) + + (define_insn "*orsi_notsi_si" +@@ -922,7 +1398,9 @@ + (match_operand:SI 1 "s_register_operand" "r")))] + "TARGET_THUMB2" + "orn%?\\t%0, %1, %2" +- [(set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "logic_reg")] + ) + + (define_insn "*orsi_not_shiftsi_si" +@@ -934,8 +1412,9 @@ + "TARGET_THUMB2" + "orn%?\\t%0, %1, %2%S4" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "shift" "2") +- (set_attr "type" "alu_shift")] ++ (set_attr "type" "alu_shift_imm")] + ) + + (define_peephole2 +--- a/src/gcc/config/arm/arm.c ++++ b/src/gcc/config/arm/arm.c +@@ -172,6 +172,7 @@ + static tree arm_builtin_decl (unsigned, bool); + static void emit_constant_insn (rtx cond, rtx pattern); + static rtx emit_set_insn (rtx, rtx); ++static rtx emit_multi_reg_push (unsigned long); + static int arm_arg_partial_bytes (cumulative_args_t, enum machine_mode, + tree, bool); + static rtx arm_function_arg (cumulative_args_t, enum machine_mode, +@@ -278,6 +279,7 @@ + + static void arm_canonicalize_comparison (int *code, rtx *op0, rtx *op1, + bool op0_preserve_value); ++static unsigned HOST_WIDE_INT arm_asan_shadow_offset (void); + + /* Table of machine attributes. */ + static const struct attribute_spec arm_attribute_table[] = +@@ -618,6 +620,13 @@ + #undef TARGET_CLASS_LIKELY_SPILLED_P + #define TARGET_CLASS_LIKELY_SPILLED_P arm_class_likely_spilled_p + ++#undef TARGET_VECTORIZE_BUILTINS ++#define TARGET_VECTORIZE_BUILTINS ++ ++#undef TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION ++#define TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION \ ++ arm_builtin_vectorized_function ++ + #undef TARGET_VECTOR_ALIGNMENT + #define TARGET_VECTOR_ALIGNMENT arm_vector_alignment + +@@ -647,6 +656,13 @@ + #define TARGET_CANONICALIZE_COMPARISON \ + arm_canonicalize_comparison + ++#undef TARGET_ASAN_SHADOW_OFFSET ++#define TARGET_ASAN_SHADOW_OFFSET arm_asan_shadow_offset ++ ++#undef MAX_INSN_PER_IT_BLOCK ++#define MAX_INSN_PER_IT_BLOCK (arm_restrict_it ? 1 : 4) ++ ++ + struct gcc_target targetm = TARGET_INITIALIZER; + + /* Obstack for minipool constant handling. */ +@@ -708,6 +724,7 @@ + #define FL_ARCH7 (1 << 22) /* Architecture 7. */ + #define FL_ARM_DIV (1 << 23) /* Hardware divide (ARM mode). */ + #define FL_ARCH8 (1 << 24) /* Architecture 8. */ ++#define FL_CRC32 (1 << 25) /* ARMv8 CRC32 instructions. */ + + #define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */ + #define FL_IWMMXT2 (1 << 30) /* "Intel Wireless MMX2 technology". */ +@@ -837,6 +854,10 @@ + int arm_arch_arm_hwdiv; + int arm_arch_thumb_hwdiv; + ++/* Nonzero if we should use Neon to handle 64-bits operations rather ++ than core registers. */ ++int prefer_neon_for_64bits = 0; ++ + /* In case of a PRE_INC, POST_INC, PRE_DEC, POST_DEC memory reference, + we must report the mode of the memory reference from + TARGET_PRINT_OPERAND to TARGET_PRINT_OPERAND_ADDRESS. */ +@@ -866,6 +887,9 @@ + /* The number of bits used in arm_condexec_mask. */ + int arm_condexec_masklen = 0; + ++/* Nonzero if chip supports the ARMv8 CRC instructions. */ ++int arm_arch_crc = 0; ++ + /* The condition codes of the ARM, and the inverse function. */ + static const char * const arm_condition_codes[] = + { +@@ -934,6 +958,7 @@ + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + const struct tune_params arm_fastmul_tune = +@@ -948,6 +973,7 @@ + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + /* StrongARM has early execution of branches, so a sequence that is worth +@@ -965,6 +991,7 @@ + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + const struct tune_params arm_xscale_tune = +@@ -979,6 +1006,7 @@ + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + const struct tune_params arm_9e_tune = +@@ -993,6 +1021,7 @@ + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + const struct tune_params arm_v6t2_tune = +@@ -1007,6 +1036,7 @@ + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + /* Generic Cortex tuning. Use more specific tunings if appropriate. */ +@@ -1022,6 +1052,7 @@ + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + const struct tune_params arm_cortex_a15_tune = +@@ -1029,7 +1060,7 @@ + arm_9e_rtx_costs, + NULL, + 1, /* Constant limit. */ +- 5, /* Max cond insns. */ ++ 2, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + false, /* Prefer constant pool. */ + arm_default_branch_cost, +@@ -1036,6 +1067,7 @@ + true, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + /* Branches can be dual-issued on Cortex-A5, so conditional execution is +@@ -1053,6 +1085,7 @@ + false, /* Prefer LDRD/STRD. */ + {false, false}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + const struct tune_params arm_cortex_a9_tune = +@@ -1067,6 +1100,7 @@ + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + /* The arm_v6m_tune is duplicated from arm_cortex_tune, rather than +@@ -1083,6 +1117,7 @@ + false, /* Prefer LDRD/STRD. */ + {false, false}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + const struct tune_params arm_fa726te_tune = +@@ -1097,6 +1132,7 @@ + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ ++ false /* Prefer Neon for 64-bits bitops. */ + }; + + +@@ -1840,7 +1876,13 @@ + arm_arch_thumb_hwdiv = (insn_flags & FL_THUMB_DIV) != 0; + arm_arch_arm_hwdiv = (insn_flags & FL_ARM_DIV) != 0; + arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0; ++ arm_arch_crc = (insn_flags & FL_CRC32) != 0; ++ if (arm_restrict_it == 2) ++ arm_restrict_it = arm_arch8 && TARGET_THUMB2; + ++ if (!TARGET_THUMB2) ++ arm_restrict_it = 0; ++ + /* If we are not using the default (ARM mode) section anchor offset + ranges, then set the correct ranges now. */ + if (TARGET_THUMB1) +@@ -2127,11 +2169,25 @@ + global_options.x_param_values, + global_options_set.x_param_values); + ++ /* Use Neon to perform 64-bits operations rather than core ++ registers. */ ++ prefer_neon_for_64bits = current_tune->prefer_neon_for_64bits; ++ if (use_neon_for_64bits == 1) ++ prefer_neon_for_64bits = true; ++ + /* Use the alternative scheduling-pressure algorithm by default. */ + maybe_set_param_value (PARAM_SCHED_PRESSURE_ALGORITHM, 2, + global_options.x_param_values, + global_options_set.x_param_values); + ++ /* Disable shrink-wrap when optimizing function for size, since it tends to ++ generate additional returns. */ ++ if (optimize_function_for_size_p (cfun) && TARGET_THUMB2) ++ flag_shrink_wrap = false; ++ /* TBD: Dwarf info for apcs frame is not handled yet. */ ++ if (TARGET_APCS_FRAME) ++ flag_shrink_wrap = false; ++ + /* Register global variables with the garbage collector. */ + arm_add_gc_roots (); + } +@@ -2380,6 +2436,10 @@ + if (IS_INTERRUPT (func_type) && (frame_pointer_needed || TARGET_THUMB)) + return 0; + ++ if (TARGET_LDRD && current_tune->prefer_ldrd_strd ++ && !optimize_function_for_size_p (cfun)) ++ return 0; ++ + offsets = arm_get_frame_offsets (); + stack_adjust = offsets->outgoing_args - offsets->saved_regs; + +@@ -2477,6 +2537,18 @@ + return 1; + } + ++/* Return TRUE if we should try to use a simple_return insn, i.e. perform ++ shrink-wrapping if possible. This is the case if we need to emit a ++ prologue, which we can test by looking at the offsets. */ ++bool ++use_simple_return_p (void) ++{ ++ arm_stack_offsets *offsets; ++ ++ offsets = arm_get_frame_offsets (); ++ return offsets->outgoing_args != 0; ++} ++ + /* Return TRUE if int I is a valid immediate ARM constant. */ + + int +@@ -2615,6 +2687,11 @@ + + switch (code) + { ++ case AND: ++ case IOR: ++ case XOR: ++ return (const_ok_for_op (hi_val, code) || hi_val == 0xFFFFFFFF) ++ && (const_ok_for_op (lo_val, code) || lo_val == 0xFFFFFFFF); + case PLUS: + return arm_not_operand (hi, SImode) && arm_add_operand (lo, SImode); + +@@ -5335,9 +5412,8 @@ + if (cfun->machine->sibcall_blocked) + return false; + +- /* Never tailcall something for which we have no decl, or if we +- are generating code for Thumb-1. */ +- if (decl == NULL || TARGET_THUMB1) ++ /* Never tailcall something if we are generating code for Thumb-1. */ ++ if (TARGET_THUMB1) + return false; + + /* The PIC register is live on entry to VxWorks PLT entries, so we +@@ -5347,13 +5423,14 @@ + + /* Cannot tail-call to long calls, since these are out of range of + a branch instruction. */ +- if (arm_is_long_call_p (decl)) ++ if (decl && arm_is_long_call_p (decl)) + return false; + + /* If we are interworking and the function is not declared static + then we can't tail-call it unless we know that it exists in this + compilation unit (since it might be a Thumb routine). */ +- if (TARGET_INTERWORK && TREE_PUBLIC (decl) && !TREE_ASM_WRITTEN (decl)) ++ if (TARGET_INTERWORK && decl && TREE_PUBLIC (decl) ++ && !TREE_ASM_WRITTEN (decl)) + return false; + + func_type = arm_current_func_type (); +@@ -5385,6 +5462,7 @@ + sibling calls. */ + if (TARGET_AAPCS_BASED + && arm_abi == ARM_ABI_AAPCS ++ && decl + && DECL_WEAK (decl)) + return false; + +@@ -8596,7 +8674,18 @@ + instruction we depend on is another ALU instruction, then we may + have to account for an additional stall. */ + if (shift_opnum != 0 +- && (attr_type == TYPE_ALU_SHIFT || attr_type == TYPE_ALU_SHIFT_REG)) ++ && (attr_type == TYPE_ALU_SHIFT_IMM ++ || attr_type == TYPE_ALUS_SHIFT_IMM ++ || attr_type == TYPE_LOGIC_SHIFT_IMM ++ || attr_type == TYPE_LOGICS_SHIFT_IMM ++ || attr_type == TYPE_ALU_SHIFT_REG ++ || attr_type == TYPE_ALUS_SHIFT_REG ++ || attr_type == TYPE_LOGIC_SHIFT_REG ++ || attr_type == TYPE_LOGICS_SHIFT_REG ++ || attr_type == TYPE_MOV_SHIFT ++ || attr_type == TYPE_MVN_SHIFT ++ || attr_type == TYPE_MOV_SHIFT_REG ++ || attr_type == TYPE_MVN_SHIFT_REG)) + { + rtx shifted_operand; + int opno; +@@ -8877,12 +8966,20 @@ + if (recog_memoized (insn) < 0) + return false; + +- if (get_attr_insn (insn) == INSN_MOV) +- return false; +- + switch (get_attr_type (insn)) + { + case TYPE_ALU_REG: ++ case TYPE_ALUS_REG: ++ case TYPE_LOGIC_REG: ++ case TYPE_LOGICS_REG: ++ case TYPE_ADC_REG: ++ case TYPE_ADCS_REG: ++ case TYPE_ADR: ++ case TYPE_BFM: ++ case TYPE_REV: ++ case TYPE_MVN_REG: ++ case TYPE_SHIFT_IMM: ++ case TYPE_SHIFT_REG: + case TYPE_LOAD_BYTE: + case TYPE_LOAD1: + case TYPE_STORE1: +@@ -8890,7 +8987,7 @@ + case TYPE_FADDS: + case TYPE_FFARITHD: + case TYPE_FADDD: +- case TYPE_FCPYS: ++ case TYPE_FMOV: + case TYPE_F_CVT: + case TYPE_FCMPS: + case TYPE_FCMPD: +@@ -8902,7 +8999,8 @@ + case TYPE_FMACD: + case TYPE_FDIVS: + case TYPE_FDIVD: +- case TYPE_F_2_R: ++ case TYPE_F_MRC: ++ case TYPE_F_MRRC: + case TYPE_F_FLAG: + case TYPE_F_LOADS: + case TYPE_F_STORES: +@@ -8923,13 +9021,18 @@ + return false; + } + +- if (get_attr_insn (insn) == INSN_MOV) +- return true; +- + switch (get_attr_type (insn)) + { +- case TYPE_SIMPLE_ALU_IMM: +- case TYPE_SIMPLE_ALU_SHIFT: ++ case TYPE_ALU_IMM: ++ case TYPE_ALUS_IMM: ++ case TYPE_LOGIC_IMM: ++ case TYPE_LOGICS_IMM: ++ case TYPE_EXTEND: ++ case TYPE_MVN_IMM: ++ case TYPE_MOV_IMM: ++ case TYPE_MOV_REG: ++ case TYPE_MOV_SHIFT: ++ case TYPE_MOV_SHIFT_REG: + case TYPE_BRANCH: + case TYPE_CALL: + return true; +@@ -9088,6 +9191,12 @@ + return cost; + } + ++int ++arm_max_conditional_execute (void) ++{ ++ return max_insns_skipped; ++} ++ + static int + arm_default_branch_cost (bool speed_p, bool predictable_p ATTRIBUTE_UNUSED) + { +@@ -11843,6 +11952,142 @@ + return 1; + } + ++/* Helper for gen_movmem_ldrd_strd. Increase the address of memory rtx ++by mode size. */ ++inline static rtx ++next_consecutive_mem (rtx mem) ++{ ++ enum machine_mode mode = GET_MODE (mem); ++ HOST_WIDE_INT offset = GET_MODE_SIZE (mode); ++ rtx addr = plus_constant (Pmode, XEXP (mem, 0), offset); ++ ++ return adjust_automodify_address (mem, mode, addr, offset); ++} ++ ++/* Copy using LDRD/STRD instructions whenever possible. ++ Returns true upon success. */ ++bool ++gen_movmem_ldrd_strd (rtx *operands) ++{ ++ unsigned HOST_WIDE_INT len; ++ HOST_WIDE_INT align; ++ rtx src, dst, base; ++ rtx reg0; ++ bool src_aligned, dst_aligned; ++ bool src_volatile, dst_volatile; ++ ++ gcc_assert (CONST_INT_P (operands[2])); ++ gcc_assert (CONST_INT_P (operands[3])); ++ ++ len = UINTVAL (operands[2]); ++ if (len > 64) ++ return false; ++ ++ /* Maximum alignment we can assume for both src and dst buffers. */ ++ align = INTVAL (operands[3]); ++ ++ if ((!unaligned_access) && (len >= 4) && ((align & 3) != 0)) ++ return false; ++ ++ /* Place src and dst addresses in registers ++ and update the corresponding mem rtx. */ ++ dst = operands[0]; ++ dst_volatile = MEM_VOLATILE_P (dst); ++ dst_aligned = MEM_ALIGN (dst) >= BITS_PER_WORD; ++ base = copy_to_mode_reg (SImode, XEXP (dst, 0)); ++ dst = adjust_automodify_address (dst, VOIDmode, base, 0); ++ ++ src = operands[1]; ++ src_volatile = MEM_VOLATILE_P (src); ++ src_aligned = MEM_ALIGN (src) >= BITS_PER_WORD; ++ base = copy_to_mode_reg (SImode, XEXP (src, 0)); ++ src = adjust_automodify_address (src, VOIDmode, base, 0); ++ ++ if (!unaligned_access && !(src_aligned && dst_aligned)) ++ return false; ++ ++ if (src_volatile || dst_volatile) ++ return false; ++ ++ /* If we cannot generate any LDRD/STRD, try to generate LDM/STM. */ ++ if (!(dst_aligned || src_aligned)) ++ return arm_gen_movmemqi (operands); ++ ++ src = adjust_address (src, DImode, 0); ++ dst = adjust_address (dst, DImode, 0); ++ while (len >= 8) ++ { ++ len -= 8; ++ reg0 = gen_reg_rtx (DImode); ++ if (src_aligned) ++ emit_move_insn (reg0, src); ++ else ++ emit_insn (gen_unaligned_loaddi (reg0, src)); ++ ++ if (dst_aligned) ++ emit_move_insn (dst, reg0); ++ else ++ emit_insn (gen_unaligned_storedi (dst, reg0)); ++ ++ src = next_consecutive_mem (src); ++ dst = next_consecutive_mem (dst); ++ } ++ ++ gcc_assert (len < 8); ++ if (len >= 4) ++ { ++ /* More than a word but less than a double-word to copy. Copy a word. */ ++ reg0 = gen_reg_rtx (SImode); ++ src = adjust_address (src, SImode, 0); ++ dst = adjust_address (dst, SImode, 0); ++ if (src_aligned) ++ emit_move_insn (reg0, src); ++ else ++ emit_insn (gen_unaligned_loadsi (reg0, src)); ++ ++ if (dst_aligned) ++ emit_move_insn (dst, reg0); ++ else ++ emit_insn (gen_unaligned_storesi (dst, reg0)); ++ ++ src = next_consecutive_mem (src); ++ dst = next_consecutive_mem (dst); ++ len -= 4; ++ } ++ ++ if (len == 0) ++ return true; ++ ++ /* Copy the remaining bytes. */ ++ if (len >= 2) ++ { ++ dst = adjust_address (dst, HImode, 0); ++ src = adjust_address (src, HImode, 0); ++ reg0 = gen_reg_rtx (SImode); ++ if (src_aligned) ++ emit_insn (gen_zero_extendhisi2 (reg0, src)); ++ else ++ emit_insn (gen_unaligned_loadhiu (reg0, src)); ++ ++ if (dst_aligned) ++ emit_insn (gen_movhi (dst, gen_lowpart(HImode, reg0))); ++ else ++ emit_insn (gen_unaligned_storehi (dst, gen_lowpart (HImode, reg0))); ++ ++ src = next_consecutive_mem (src); ++ dst = next_consecutive_mem (dst); ++ if (len == 2) ++ return true; ++ } ++ ++ dst = adjust_address (dst, QImode, 0); ++ src = adjust_address (src, QImode, 0); ++ reg0 = gen_reg_rtx (QImode); ++ emit_move_insn (reg0, src); ++ emit_move_insn (dst, reg0); ++ return true; ++} ++ + /* Select a dominance comparison mode if possible for a test of the general + form (OP (COND_OR (X) (Y)) (const_int 0)). We support three forms. + COND_OR == DOM_CC_X_AND_Y => (X && Y) +@@ -12643,6 +12888,286 @@ + return true; + } + ++/* Helper for gen_operands_ldrd_strd. Returns true iff the memory ++ operand MEM's address contains an immediate offset from the base ++ register and has no side effects, in which case it sets BASE and ++ OFFSET accordingly. */ ++static bool ++mem_ok_for_ldrd_strd (rtx mem, rtx *base, rtx *offset) ++{ ++ rtx addr; ++ ++ gcc_assert (base != NULL && offset != NULL); ++ ++ /* TODO: Handle more general memory operand patterns, such as ++ PRE_DEC and PRE_INC. */ ++ ++ if (side_effects_p (mem)) ++ return false; ++ ++ /* Can't deal with subregs. */ ++ if (GET_CODE (mem) == SUBREG) ++ return false; ++ ++ gcc_assert (MEM_P (mem)); ++ ++ *offset = const0_rtx; ++ ++ addr = XEXP (mem, 0); ++ ++ /* If addr isn't valid for DImode, then we can't handle it. */ ++ if (!arm_legitimate_address_p (DImode, addr, ++ reload_in_progress || reload_completed)) ++ return false; ++ ++ if (REG_P (addr)) ++ { ++ *base = addr; ++ return true; ++ } ++ else if (GET_CODE (addr) == PLUS || GET_CODE (addr) == MINUS) ++ { ++ *base = XEXP (addr, 0); ++ *offset = XEXP (addr, 1); ++ return (REG_P (*base) && CONST_INT_P (*offset)); ++ } ++ ++ return false; ++} ++ ++#define SWAP_RTX(x,y) do { rtx tmp = x; x = y; y = tmp; } while (0) ++ ++/* Called from a peephole2 to replace two word-size accesses with a ++ single LDRD/STRD instruction. Returns true iff we can generate a ++ new instruction sequence. That is, both accesses use the same base ++ register and the gap between constant offsets is 4. This function ++ may reorder its operands to match ldrd/strd RTL templates. ++ OPERANDS are the operands found by the peephole matcher; ++ OPERANDS[0,1] are register operands, and OPERANDS[2,3] are the ++ corresponding memory operands. LOAD indicaates whether the access ++ is load or store. CONST_STORE indicates a store of constant ++ integer values held in OPERANDS[4,5] and assumes that the pattern ++ is of length 4 insn, for the purpose of checking dead registers. ++ COMMUTE indicates that register operands may be reordered. */ ++bool ++gen_operands_ldrd_strd (rtx *operands, bool load, ++ bool const_store, bool commute) ++{ ++ int nops = 2; ++ HOST_WIDE_INT offsets[2], offset; ++ rtx base = NULL_RTX; ++ rtx cur_base, cur_offset, tmp; ++ int i, gap; ++ HARD_REG_SET regset; ++ ++ gcc_assert (!const_store || !load); ++ /* Check that the memory references are immediate offsets from the ++ same base register. Extract the base register, the destination ++ registers, and the corresponding memory offsets. */ ++ for (i = 0; i < nops; i++) ++ { ++ if (!mem_ok_for_ldrd_strd (operands[nops+i], &cur_base, &cur_offset)) ++ return false; ++ ++ if (i == 0) ++ base = cur_base; ++ else if (REGNO (base) != REGNO (cur_base)) ++ return false; ++ ++ offsets[i] = INTVAL (cur_offset); ++ if (GET_CODE (operands[i]) == SUBREG) ++ { ++ tmp = SUBREG_REG (operands[i]); ++ gcc_assert (GET_MODE (operands[i]) == GET_MODE (tmp)); ++ operands[i] = tmp; ++ } ++ } ++ ++ /* Make sure there is no dependency between the individual loads. */ ++ if (load && REGNO (operands[0]) == REGNO (base)) ++ return false; /* RAW */ ++ ++ if (load && REGNO (operands[0]) == REGNO (operands[1])) ++ return false; /* WAW */ ++ ++ /* If the same input register is used in both stores ++ when storing different constants, try to find a free register. ++ For example, the code ++ mov r0, 0 ++ str r0, [r2] ++ mov r0, 1 ++ str r0, [r2, #4] ++ can be transformed into ++ mov r1, 0 ++ strd r1, r0, [r2] ++ in Thumb mode assuming that r1 is free. */ ++ if (const_store ++ && REGNO (operands[0]) == REGNO (operands[1]) ++ && INTVAL (operands[4]) != INTVAL (operands[5])) ++ { ++ if (TARGET_THUMB2) ++ { ++ CLEAR_HARD_REG_SET (regset); ++ tmp = peep2_find_free_register (0, 4, "r", SImode, ®set); ++ if (tmp == NULL_RTX) ++ return false; ++ ++ /* Use the new register in the first load to ensure that ++ if the original input register is not dead after peephole, ++ then it will have the correct constant value. */ ++ operands[0] = tmp; ++ } ++ else if (TARGET_ARM) ++ { ++ return false; ++ int regno = REGNO (operands[0]); ++ if (!peep2_reg_dead_p (4, operands[0])) ++ { ++ /* When the input register is even and is not dead after the ++ pattern, it has to hold the second constant but we cannot ++ form a legal STRD in ARM mode with this register as the second ++ register. */ ++ if (regno % 2 == 0) ++ return false; ++ ++ /* Is regno-1 free? */ ++ SET_HARD_REG_SET (regset); ++ CLEAR_HARD_REG_BIT(regset, regno - 1); ++ tmp = peep2_find_free_register (0, 4, "r", SImode, ®set); ++ if (tmp == NULL_RTX) ++ return false; ++ ++ operands[0] = tmp; ++ } ++ else ++ { ++ /* Find a DImode register. */ ++ CLEAR_HARD_REG_SET (regset); ++ tmp = peep2_find_free_register (0, 4, "r", DImode, ®set); ++ if (tmp != NULL_RTX) ++ { ++ operands[0] = simplify_gen_subreg (SImode, tmp, DImode, 0); ++ operands[1] = simplify_gen_subreg (SImode, tmp, DImode, 4); ++ } ++ else ++ { ++ /* Can we use the input register to form a DI register? */ ++ SET_HARD_REG_SET (regset); ++ CLEAR_HARD_REG_BIT(regset, ++ regno % 2 == 0 ? regno + 1 : regno - 1); ++ tmp = peep2_find_free_register (0, 4, "r", SImode, ®set); ++ if (tmp == NULL_RTX) ++ return false; ++ operands[regno % 2 == 1 ? 0 : 1] = tmp; ++ } ++ } ++ ++ gcc_assert (operands[0] != NULL_RTX); ++ gcc_assert (operands[1] != NULL_RTX); ++ gcc_assert (REGNO (operands[0]) % 2 == 0); ++ gcc_assert (REGNO (operands[1]) == REGNO (operands[0]) + 1); ++ } ++ } ++ ++ /* Make sure the instructions are ordered with lower memory access first. */ ++ if (offsets[0] > offsets[1]) ++ { ++ gap = offsets[0] - offsets[1]; ++ offset = offsets[1]; ++ ++ /* Swap the instructions such that lower memory is accessed first. */ ++ SWAP_RTX (operands[0], operands[1]); ++ SWAP_RTX (operands[2], operands[3]); ++ if (const_store) ++ SWAP_RTX (operands[4], operands[5]); ++ } ++ else ++ { ++ gap = offsets[1] - offsets[0]; ++ offset = offsets[0]; ++ } ++ ++ /* Make sure accesses are to consecutive memory locations. */ ++ if (gap != 4) ++ return false; ++ ++ /* Make sure we generate legal instructions. */ ++ if (operands_ok_ldrd_strd (operands[0], operands[1], base, offset, ++ false, load)) ++ return true; ++ ++ /* In Thumb state, where registers are almost unconstrained, there ++ is little hope to fix it. */ ++ if (TARGET_THUMB2) ++ return false; ++ ++ if (load && commute) ++ { ++ /* Try reordering registers. */ ++ SWAP_RTX (operands[0], operands[1]); ++ if (operands_ok_ldrd_strd (operands[0], operands[1], base, offset, ++ false, load)) ++ return true; ++ } ++ ++ if (const_store) ++ { ++ /* If input registers are dead after this pattern, they can be ++ reordered or replaced by other registers that are free in the ++ current pattern. */ ++ if (!peep2_reg_dead_p (4, operands[0]) ++ || !peep2_reg_dead_p (4, operands[1])) ++ return false; ++ ++ /* Try to reorder the input registers. */ ++ /* For example, the code ++ mov r0, 0 ++ mov r1, 1 ++ str r1, [r2] ++ str r0, [r2, #4] ++ can be transformed into ++ mov r1, 0 ++ mov r0, 1 ++ strd r0, [r2] ++ */ ++ if (operands_ok_ldrd_strd (operands[1], operands[0], base, offset, ++ false, false)) ++ { ++ SWAP_RTX (operands[0], operands[1]); ++ return true; ++ } ++ ++ /* Try to find a free DI register. */ ++ CLEAR_HARD_REG_SET (regset); ++ add_to_hard_reg_set (®set, SImode, REGNO (operands[0])); ++ add_to_hard_reg_set (®set, SImode, REGNO (operands[1])); ++ while (true) ++ { ++ tmp = peep2_find_free_register (0, 4, "r", DImode, ®set); ++ if (tmp == NULL_RTX) ++ return false; ++ ++ /* DREG must be an even-numbered register in DImode. ++ Split it into SI registers. */ ++ operands[0] = simplify_gen_subreg (SImode, tmp, DImode, 0); ++ operands[1] = simplify_gen_subreg (SImode, tmp, DImode, 4); ++ gcc_assert (operands[0] != NULL_RTX); ++ gcc_assert (operands[1] != NULL_RTX); ++ gcc_assert (REGNO (operands[0]) % 2 == 0); ++ gcc_assert (REGNO (operands[0]) + 1 == REGNO (operands[1])); ++ ++ return (operands_ok_ldrd_strd (operands[0], operands[1], ++ base, offset, ++ false, load)); ++ } ++ } ++ ++ return false; ++} ++#undef SWAP_RTX ++ ++ ++ + + /* Print a symbolic form of X to the debug file, F. */ + static void +@@ -13876,6 +14401,16 @@ + && IN_RANGE (INTVAL (op1), -7, 7)) + action = CONV; + } ++ /* ADCS , */ ++ else if (GET_CODE (XEXP (src, 0)) == PLUS ++ && rtx_equal_p (XEXP (XEXP (src, 0), 0), dst) ++ && low_register_operand (XEXP (XEXP (src, 0), 1), ++ SImode) ++ && COMPARISON_P (op1) ++ && cc_register (XEXP (op1, 0), VOIDmode) ++ && maybe_get_arm_condition_code (op1) == ARM_CS ++ && XEXP (op1, 1) == const0_rtx) ++ action = CONV; + break; + + case MINUS: +@@ -14834,7 +15369,8 @@ + { + /* Constraints should ensure this. */ + gcc_assert (code0 == MEM && code1 == REG); +- gcc_assert (REGNO (operands[1]) != IP_REGNUM); ++ gcc_assert ((REGNO (operands[1]) != IP_REGNUM) ++ || (TARGET_ARM && TARGET_LDRD)); + + switch (GET_CODE (XEXP (operands[0], 0))) + { +@@ -16315,124 +16851,308 @@ + } + } + +-/* Generate and emit a pattern that will be recognized as STRD pattern. If even +- number of registers are being pushed, multiple STRD patterns are created for +- all register pairs. If odd number of registers are pushed, emit a +- combination of STRDs and STR for the prologue saves. */ ++/* Generate and emit a sequence of insns equivalent to PUSH, but using ++ STR and STRD. If an even number of registers are being pushed, one ++ or more STRD patterns are created for each register pair. If an ++ odd number of registers are pushed, emit an initial STR followed by ++ as many STRD instructions as are needed. This works best when the ++ stack is initially 64-bit aligned (the normal case), since it ++ ensures that each STRD is also 64-bit aligned. */ + static void + thumb2_emit_strd_push (unsigned long saved_regs_mask) + { + int num_regs = 0; +- int i, j; ++ int i; ++ int regno; + rtx par = NULL_RTX; +- rtx insn = NULL_RTX; + rtx dwarf = NULL_RTX; +- rtx tmp, reg, tmp1; ++ rtx tmp; ++ bool first = true; + ++ num_regs = bit_count (saved_regs_mask); ++ ++ /* Must be at least one register to save, and can't save SP or PC. */ ++ gcc_assert (num_regs > 0 && num_regs <= 14); ++ gcc_assert (!(saved_regs_mask & (1 << SP_REGNUM))); ++ gcc_assert (!(saved_regs_mask & (1 << PC_REGNUM))); ++ ++ /* Create sequence for DWARF info. All the frame-related data for ++ debugging is held in this wrapper. */ ++ dwarf = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (num_regs + 1)); ++ ++ /* Describe the stack adjustment. */ ++ tmp = gen_rtx_SET (VOIDmode, ++ stack_pointer_rtx, ++ plus_constant (Pmode, stack_pointer_rtx, -4 * num_regs)); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ XVECEXP (dwarf, 0, 0) = tmp; ++ ++ /* Find the first register. */ ++ for (regno = 0; (saved_regs_mask & (1 << regno)) == 0; regno++) ++ ; ++ ++ i = 0; ++ ++ /* If there's an odd number of registers to push. Start off by ++ pushing a single register. This ensures that subsequent strd ++ operations are dword aligned (assuming that SP was originally ++ 64-bit aligned). */ ++ if ((num_regs & 1) != 0) ++ { ++ rtx reg, mem, insn; ++ ++ reg = gen_rtx_REG (SImode, regno); ++ if (num_regs == 1) ++ mem = gen_frame_mem (Pmode, gen_rtx_PRE_DEC (Pmode, ++ stack_pointer_rtx)); ++ else ++ mem = gen_frame_mem (Pmode, ++ gen_rtx_PRE_MODIFY ++ (Pmode, stack_pointer_rtx, ++ plus_constant (Pmode, stack_pointer_rtx, ++ -4 * num_regs))); ++ ++ tmp = gen_rtx_SET (VOIDmode, mem, reg); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ insn = emit_insn (tmp); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf); ++ tmp = gen_rtx_SET (VOIDmode, gen_frame_mem (Pmode, stack_pointer_rtx), ++ reg); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ i++; ++ regno++; ++ XVECEXP (dwarf, 0, i) = tmp; ++ first = false; ++ } ++ ++ while (i < num_regs) ++ if (saved_regs_mask & (1 << regno)) ++ { ++ rtx reg1, reg2, mem1, mem2; ++ rtx tmp0, tmp1, tmp2; ++ int regno2; ++ ++ /* Find the register to pair with this one. */ ++ for (regno2 = regno + 1; (saved_regs_mask & (1 << regno2)) == 0; ++ regno2++) ++ ; ++ ++ reg1 = gen_rtx_REG (SImode, regno); ++ reg2 = gen_rtx_REG (SImode, regno2); ++ ++ if (first) ++ { ++ rtx insn; ++ ++ first = false; ++ mem1 = gen_frame_mem (Pmode, plus_constant (Pmode, ++ stack_pointer_rtx, ++ -4 * num_regs)); ++ mem2 = gen_frame_mem (Pmode, plus_constant (Pmode, ++ stack_pointer_rtx, ++ -4 * (num_regs - 1))); ++ tmp0 = gen_rtx_SET (VOIDmode, stack_pointer_rtx, ++ plus_constant (Pmode, stack_pointer_rtx, ++ -4 * (num_regs))); ++ tmp1 = gen_rtx_SET (VOIDmode, mem1, reg1); ++ tmp2 = gen_rtx_SET (VOIDmode, mem2, reg2); ++ RTX_FRAME_RELATED_P (tmp0) = 1; ++ RTX_FRAME_RELATED_P (tmp1) = 1; ++ RTX_FRAME_RELATED_P (tmp2) = 1; ++ par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3)); ++ XVECEXP (par, 0, 0) = tmp0; ++ XVECEXP (par, 0, 1) = tmp1; ++ XVECEXP (par, 0, 2) = tmp2; ++ insn = emit_insn (par); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf); ++ } ++ else ++ { ++ mem1 = gen_frame_mem (Pmode, plus_constant (Pmode, ++ stack_pointer_rtx, ++ 4 * i)); ++ mem2 = gen_frame_mem (Pmode, plus_constant (Pmode, ++ stack_pointer_rtx, ++ 4 * (i + 1))); ++ tmp1 = gen_rtx_SET (VOIDmode, mem1, reg1); ++ tmp2 = gen_rtx_SET (VOIDmode, mem2, reg2); ++ RTX_FRAME_RELATED_P (tmp1) = 1; ++ RTX_FRAME_RELATED_P (tmp2) = 1; ++ par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2)); ++ XVECEXP (par, 0, 0) = tmp1; ++ XVECEXP (par, 0, 1) = tmp2; ++ emit_insn (par); ++ } ++ ++ /* Create unwind information. This is an approximation. */ ++ tmp1 = gen_rtx_SET (VOIDmode, ++ gen_frame_mem (Pmode, ++ plus_constant (Pmode, ++ stack_pointer_rtx, ++ 4 * i)), ++ reg1); ++ tmp2 = gen_rtx_SET (VOIDmode, ++ gen_frame_mem (Pmode, ++ plus_constant (Pmode, ++ stack_pointer_rtx, ++ 4 * (i + 1))), ++ reg2); ++ ++ RTX_FRAME_RELATED_P (tmp1) = 1; ++ RTX_FRAME_RELATED_P (tmp2) = 1; ++ XVECEXP (dwarf, 0, i + 1) = tmp1; ++ XVECEXP (dwarf, 0, i + 2) = tmp2; ++ i += 2; ++ regno = regno2 + 1; ++ } ++ else ++ regno++; ++ ++ return; ++} ++ ++/* STRD in ARM mode requires consecutive registers. This function emits STRD ++ whenever possible, otherwise it emits single-word stores. The first store ++ also allocates stack space for all saved registers, using writeback with ++ post-addressing mode. All other stores use offset addressing. If no STRD ++ can be emitted, this function emits a sequence of single-word stores, ++ and not an STM as before, because single-word stores provide more freedom ++ scheduling and can be turned into an STM by peephole optimizations. */ ++static void ++arm_emit_strd_push (unsigned long saved_regs_mask) ++{ ++ int num_regs = 0; ++ int i, j, dwarf_index = 0; ++ int offset = 0; ++ rtx dwarf = NULL_RTX; ++ rtx insn = NULL_RTX; ++ rtx tmp, mem; ++ ++ /* TODO: A more efficient code can be emitted by changing the ++ layout, e.g., first push all pairs that can use STRD to keep the ++ stack aligned, and then push all other registers. */ + for (i = 0; i <= LAST_ARM_REGNUM; i++) + if (saved_regs_mask & (1 << i)) + num_regs++; + +- gcc_assert (num_regs && num_regs <= 16); ++ gcc_assert (!(saved_regs_mask & (1 << SP_REGNUM))); ++ gcc_assert (!(saved_regs_mask & (1 << PC_REGNUM))); ++ gcc_assert (num_regs > 0); + +- /* Pre-decrement the stack pointer, based on there being num_regs 4-byte +- registers to push. */ +- tmp = gen_rtx_SET (VOIDmode, +- stack_pointer_rtx, +- plus_constant (Pmode, stack_pointer_rtx, -4 * num_regs)); +- RTX_FRAME_RELATED_P (tmp) = 1; +- insn = emit_insn (tmp); +- + /* Create sequence for DWARF info. */ + dwarf = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (num_regs + 1)); + +- /* RTLs cannot be shared, hence create new copy for dwarf. */ +- tmp1 = gen_rtx_SET (VOIDmode, ++ /* For dwarf info, we generate explicit stack update. */ ++ tmp = gen_rtx_SET (VOIDmode, + stack_pointer_rtx, + plus_constant (Pmode, stack_pointer_rtx, -4 * num_regs)); +- RTX_FRAME_RELATED_P (tmp1) = 1; +- XVECEXP (dwarf, 0, 0) = tmp1; ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ XVECEXP (dwarf, 0, dwarf_index++) = tmp; + +- gcc_assert (!(saved_regs_mask & (1 << SP_REGNUM))); +- gcc_assert (!(saved_regs_mask & (1 << PC_REGNUM))); +- +- /* Var j iterates over all the registers to gather all the registers in +- saved_regs_mask. Var i gives index of register R_j in stack frame. +- A PARALLEL RTX of register-pair is created here, so that pattern for +- STRD can be matched. If num_regs is odd, 1st register will be pushed +- using STR and remaining registers will be pushed with STRD in pairs. +- If num_regs is even, all registers are pushed with STRD in pairs. +- Hence, skip first element for odd num_regs. */ +- for (i = num_regs - 1, j = LAST_ARM_REGNUM; i >= (num_regs % 2); j--) ++ /* Save registers. */ ++ offset = - 4 * num_regs; ++ j = 0; ++ while (j <= LAST_ARM_REGNUM) + if (saved_regs_mask & (1 << j)) + { +- /* Create RTX for store. New RTX is created for dwarf as +- they are not sharable. */ +- reg = gen_rtx_REG (SImode, j); +- tmp = gen_rtx_SET (SImode, +- gen_frame_mem +- (SImode, +- plus_constant (Pmode, stack_pointer_rtx, 4 * i)), +- reg); ++ if ((j % 2 == 0) ++ && (saved_regs_mask & (1 << (j + 1)))) ++ { ++ /* Current register and previous register form register pair for ++ which STRD can be generated. */ ++ if (offset < 0) ++ { ++ /* Allocate stack space for all saved registers. */ ++ tmp = plus_constant (Pmode, stack_pointer_rtx, offset); ++ tmp = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, tmp); ++ mem = gen_frame_mem (DImode, tmp); ++ offset = 0; ++ } ++ else if (offset > 0) ++ mem = gen_frame_mem (DImode, ++ plus_constant (Pmode, ++ stack_pointer_rtx, ++ offset)); ++ else ++ mem = gen_frame_mem (DImode, stack_pointer_rtx); + +- tmp1 = gen_rtx_SET (SImode, +- gen_frame_mem +- (SImode, +- plus_constant (Pmode, stack_pointer_rtx, 4 * i)), +- reg); +- RTX_FRAME_RELATED_P (tmp) = 1; +- RTX_FRAME_RELATED_P (tmp1) = 1; ++ tmp = gen_rtx_SET (DImode, mem, gen_rtx_REG (DImode, j)); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ tmp = emit_insn (tmp); + +- if (((i - (num_regs % 2)) % 2) == 1) +- /* When (i - (num_regs % 2)) is odd, the RTX to be emitted is yet to +- be created. Hence create it first. The STRD pattern we are +- generating is : +- [ (SET (MEM (PLUS (SP) (NUM))) (reg_t1)) +- (SET (MEM (PLUS (SP) (NUM + 4))) (reg_t2)) ] +- where the target registers need not be consecutive. */ +- par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2)); ++ /* Record the first store insn. */ ++ if (dwarf_index == 1) ++ insn = tmp; + +- /* Register R_j is added in PARALLEL RTX. If (i - (num_regs % 2)) is +- even, the reg_j is added as 0th element and if it is odd, reg_i is +- added as 1st element of STRD pattern shown above. */ +- XVECEXP (par, 0, ((i - (num_regs % 2)) % 2)) = tmp; +- XVECEXP (dwarf, 0, (i + 1)) = tmp1; ++ /* Generate dwarf info. */ ++ mem = gen_frame_mem (SImode, ++ plus_constant (Pmode, ++ stack_pointer_rtx, ++ offset)); ++ tmp = gen_rtx_SET (SImode, mem, gen_rtx_REG (SImode, j)); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ XVECEXP (dwarf, 0, dwarf_index++) = tmp; + +- if (((i - (num_regs % 2)) % 2) == 0) +- /* When (i - (num_regs % 2)) is even, RTXs for both the registers +- to be loaded are generated in above given STRD pattern, and the +- pattern can be emitted now. */ +- emit_insn (par); ++ mem = gen_frame_mem (SImode, ++ plus_constant (Pmode, ++ stack_pointer_rtx, ++ offset + 4)); ++ tmp = gen_rtx_SET (SImode, mem, gen_rtx_REG (SImode, j + 1)); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ XVECEXP (dwarf, 0, dwarf_index++) = tmp; + +- i--; +- } ++ offset += 8; ++ j += 2; ++ } ++ else ++ { ++ /* Emit a single word store. */ ++ if (offset < 0) ++ { ++ /* Allocate stack space for all saved registers. */ ++ tmp = plus_constant (Pmode, stack_pointer_rtx, offset); ++ tmp = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, tmp); ++ mem = gen_frame_mem (SImode, tmp); ++ offset = 0; ++ } ++ else if (offset > 0) ++ mem = gen_frame_mem (SImode, ++ plus_constant (Pmode, ++ stack_pointer_rtx, ++ offset)); ++ else ++ mem = gen_frame_mem (SImode, stack_pointer_rtx); + +- if ((num_regs % 2) == 1) +- { +- /* If odd number of registers are pushed, generate STR pattern to store +- lone register. */ +- for (; (saved_regs_mask & (1 << j)) == 0; j--); ++ tmp = gen_rtx_SET (SImode, mem, gen_rtx_REG (SImode, j)); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ tmp = emit_insn (tmp); + +- tmp1 = gen_frame_mem (SImode, plus_constant (Pmode, +- stack_pointer_rtx, 4 * i)); +- reg = gen_rtx_REG (SImode, j); +- tmp = gen_rtx_SET (SImode, tmp1, reg); +- RTX_FRAME_RELATED_P (tmp) = 1; ++ /* Record the first store insn. */ ++ if (dwarf_index == 1) ++ insn = tmp; + +- emit_insn (tmp); ++ /* Generate dwarf info. */ ++ mem = gen_frame_mem (SImode, ++ plus_constant(Pmode, ++ stack_pointer_rtx, ++ offset)); ++ tmp = gen_rtx_SET (SImode, mem, gen_rtx_REG (SImode, j)); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ XVECEXP (dwarf, 0, dwarf_index++) = tmp; + +- tmp1 = gen_rtx_SET (SImode, +- gen_frame_mem +- (SImode, +- plus_constant (Pmode, stack_pointer_rtx, 4 * i)), +- reg); +- RTX_FRAME_RELATED_P (tmp1) = 1; +- XVECEXP (dwarf, 0, (i + 1)) = tmp1; +- } ++ offset += 4; ++ j += 1; ++ } ++ } ++ else ++ j++; + ++ /* Attach dwarf info to the first insn we generate. */ ++ gcc_assert (insn != NULL_RTX); + add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf); + RTX_FRAME_RELATED_P (insn) = 1; +- return; + } + + /* Generate and emit an insn that we will recognize as a push_multi. +@@ -16577,6 +17297,19 @@ + return par; + } + ++/* Add a REG_CFA_ADJUST_CFA REG note to INSN. ++ SIZE is the offset to be adjusted. ++ DEST and SRC might be stack_pointer_rtx or hard_frame_pointer_rtx. */ ++static void ++arm_add_cfa_adjust_cfa_note (rtx insn, int size, rtx dest, rtx src) ++{ ++ rtx dwarf; ++ ++ RTX_FRAME_RELATED_P (insn) = 1; ++ dwarf = gen_rtx_SET (VOIDmode, dest, plus_constant (Pmode, src, size)); ++ add_reg_note (insn, REG_CFA_ADJUST_CFA, dwarf); ++} ++ + /* Generate and emit an insn pattern that we will recognize as a pop_multi. + SAVED_REGS_MASK shows which registers need to be restored. + +@@ -16634,6 +17367,17 @@ + if (saved_regs_mask & (1 << i)) + { + reg = gen_rtx_REG (SImode, i); ++ if ((num_regs == 1) && emit_update && !return_in_pc) ++ { ++ /* Emit single load with writeback. */ ++ tmp = gen_frame_mem (SImode, ++ gen_rtx_POST_INC (Pmode, ++ stack_pointer_rtx)); ++ tmp = emit_insn (gen_rtx_SET (VOIDmode, reg, tmp)); ++ REG_NOTES (tmp) = alloc_reg_note (REG_CFA_RESTORE, reg, dwarf); ++ return; ++ } ++ + tmp = gen_rtx_SET (VOIDmode, + reg, + gen_frame_mem +@@ -16656,6 +17400,9 @@ + par = emit_insn (par); + + REG_NOTES (par) = dwarf; ++ if (!return_in_pc) ++ arm_add_cfa_adjust_cfa_note (par, UNITS_PER_WORD * num_regs, ++ stack_pointer_rtx, stack_pointer_rtx); + } + + /* Generate and emit an insn pattern that we will recognize as a pop_multi +@@ -16726,6 +17473,16 @@ + + par = emit_insn (par); + REG_NOTES (par) = dwarf; ++ ++ /* Make sure cfa doesn't leave with IP_REGNUM to allow unwinding fron FP. */ ++ if (TARGET_VFP && REGNO (base_reg) == IP_REGNUM) ++ { ++ RTX_FRAME_RELATED_P (par) = 1; ++ add_reg_note (par, REG_CFA_DEF_CFA, hard_frame_pointer_rtx); ++ } ++ else ++ arm_add_cfa_adjust_cfa_note (par, 2 * UNITS_PER_WORD * num_regs, ++ base_reg, base_reg); + } + + /* Generate and emit a pattern that will be recognized as LDRD pattern. If even +@@ -16801,6 +17558,7 @@ + pattern can be emitted now. */ + par = emit_insn (par); + REG_NOTES (par) = dwarf; ++ RTX_FRAME_RELATED_P (par) = 1; + } + + i++; +@@ -16817,7 +17575,12 @@ + stack_pointer_rtx, + plus_constant (Pmode, stack_pointer_rtx, 4 * i)); + RTX_FRAME_RELATED_P (tmp) = 1; +- emit_insn (tmp); ++ tmp = emit_insn (tmp); ++ if (!return_in_pc) ++ { ++ arm_add_cfa_adjust_cfa_note (tmp, UNITS_PER_WORD * i, ++ stack_pointer_rtx, stack_pointer_rtx); ++ } + + dwarf = NULL_RTX; + +@@ -16851,9 +17614,11 @@ + else + { + par = emit_insn (tmp); ++ REG_NOTES (par) = dwarf; ++ arm_add_cfa_adjust_cfa_note (par, UNITS_PER_WORD, ++ stack_pointer_rtx, stack_pointer_rtx); + } + +- REG_NOTES (par) = dwarf; + } + else if ((num_regs % 2) == 1 && return_in_pc) + { +@@ -16865,6 +17630,132 @@ + return; + } + ++/* LDRD in ARM mode needs consecutive registers as operands. This function ++ emits LDRD whenever possible, otherwise it emits single-word loads. It uses ++ offset addressing and then generates one separate stack udpate. This provides ++ more scheduling freedom, compared to writeback on every load. However, ++ if the function returns using load into PC directly ++ (i.e., if PC is in SAVED_REGS_MASK), the stack needs to be updated ++ before the last load. TODO: Add a peephole optimization to recognize ++ the new epilogue sequence as an LDM instruction whenever possible. TODO: Add ++ peephole optimization to merge the load at stack-offset zero ++ with the stack update instruction using load with writeback ++ in post-index addressing mode. */ ++static void ++arm_emit_ldrd_pop (unsigned long saved_regs_mask) ++{ ++ int j = 0; ++ int offset = 0; ++ rtx par = NULL_RTX; ++ rtx dwarf = NULL_RTX; ++ rtx tmp, mem; ++ ++ /* Restore saved registers. */ ++ gcc_assert (!((saved_regs_mask & (1 << SP_REGNUM)))); ++ j = 0; ++ while (j <= LAST_ARM_REGNUM) ++ if (saved_regs_mask & (1 << j)) ++ { ++ if ((j % 2) == 0 ++ && (saved_regs_mask & (1 << (j + 1))) ++ && (j + 1) != PC_REGNUM) ++ { ++ /* Current register and next register form register pair for which ++ LDRD can be generated. PC is always the last register popped, and ++ we handle it separately. */ ++ if (offset > 0) ++ mem = gen_frame_mem (DImode, ++ plus_constant (Pmode, ++ stack_pointer_rtx, ++ offset)); ++ else ++ mem = gen_frame_mem (DImode, stack_pointer_rtx); ++ ++ tmp = gen_rtx_SET (DImode, gen_rtx_REG (DImode, j), mem); ++ tmp = emit_insn (tmp); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ ++ /* Generate dwarf info. */ ++ ++ dwarf = alloc_reg_note (REG_CFA_RESTORE, ++ gen_rtx_REG (SImode, j), ++ NULL_RTX); ++ dwarf = alloc_reg_note (REG_CFA_RESTORE, ++ gen_rtx_REG (SImode, j + 1), ++ dwarf); ++ ++ REG_NOTES (tmp) = dwarf; ++ ++ offset += 8; ++ j += 2; ++ } ++ else if (j != PC_REGNUM) ++ { ++ /* Emit a single word load. */ ++ if (offset > 0) ++ mem = gen_frame_mem (SImode, ++ plus_constant (Pmode, ++ stack_pointer_rtx, ++ offset)); ++ else ++ mem = gen_frame_mem (SImode, stack_pointer_rtx); ++ ++ tmp = gen_rtx_SET (SImode, gen_rtx_REG (SImode, j), mem); ++ tmp = emit_insn (tmp); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ ++ /* Generate dwarf info. */ ++ REG_NOTES (tmp) = alloc_reg_note (REG_CFA_RESTORE, ++ gen_rtx_REG (SImode, j), ++ NULL_RTX); ++ ++ offset += 4; ++ j += 1; ++ } ++ else /* j == PC_REGNUM */ ++ j++; ++ } ++ else ++ j++; ++ ++ /* Update the stack. */ ++ if (offset > 0) ++ { ++ tmp = gen_rtx_SET (Pmode, ++ stack_pointer_rtx, ++ plus_constant (Pmode, ++ stack_pointer_rtx, ++ offset)); ++ tmp = emit_insn (tmp); ++ arm_add_cfa_adjust_cfa_note (tmp, offset, ++ stack_pointer_rtx, stack_pointer_rtx); ++ offset = 0; ++ } ++ ++ if (saved_regs_mask & (1 << PC_REGNUM)) ++ { ++ /* Only PC is to be popped. */ ++ par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2)); ++ XVECEXP (par, 0, 0) = ret_rtx; ++ tmp = gen_rtx_SET (SImode, ++ gen_rtx_REG (SImode, PC_REGNUM), ++ gen_frame_mem (SImode, ++ gen_rtx_POST_INC (SImode, ++ stack_pointer_rtx))); ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ XVECEXP (par, 0, 1) = tmp; ++ par = emit_jump_insn (par); ++ ++ /* Generate dwarf info. */ ++ dwarf = alloc_reg_note (REG_CFA_RESTORE, ++ gen_rtx_REG (SImode, PC_REGNUM), ++ NULL_RTX); ++ REG_NOTES (par) = dwarf; ++ arm_add_cfa_adjust_cfa_note (par, UNITS_PER_WORD, ++ stack_pointer_rtx, stack_pointer_rtx); ++ } ++} ++ + /* Calculate the size of the return value that is passed in registers. */ + static unsigned + arm_size_return_regs (void) +@@ -16889,11 +17780,27 @@ + || df_regs_ever_live_p (LR_REGNUM)); + } + ++/* We do not know if r3 will be available because ++ we do have an indirect tailcall happening in this ++ particular case. */ ++static bool ++is_indirect_tailcall_p (rtx call) ++{ ++ rtx pat = PATTERN (call); + ++ /* Indirect tail call. */ ++ pat = XVECEXP (pat, 0, 0); ++ if (GET_CODE (pat) == SET) ++ pat = SET_SRC (pat); ++ ++ pat = XEXP (XEXP (pat, 0), 0); ++ return REG_P (pat); ++} ++ + /* Return true if r3 is used by any of the tail call insns in the + current function. */ + static bool +-any_sibcall_uses_r3 (void) ++any_sibcall_could_use_r3 (void) + { + edge_iterator ei; + edge e; +@@ -16907,7 +17814,8 @@ + if (!CALL_P (call)) + call = prev_nonnote_nondebug_insn (call); + gcc_assert (CALL_P (call) && SIBLING_CALL_P (call)); +- if (find_regno_fusage (call, USE, 3)) ++ if (find_regno_fusage (call, USE, 3) ++ || is_indirect_tailcall_p (call)) + return true; + } + return false; +@@ -17074,9 +17982,11 @@ + /* If it is safe to use r3, then do so. This sometimes + generates better code on Thumb-2 by avoiding the need to + use 32-bit push/pop instructions. */ +- if (! any_sibcall_uses_r3 () ++ if (! any_sibcall_could_use_r3 () + && arm_size_return_regs () <= 12 +- && (offsets->saved_regs_mask & (1 << 3)) == 0) ++ && (offsets->saved_regs_mask & (1 << 3)) == 0 ++ && (TARGET_THUMB2 ++ || !(TARGET_LDRD && current_tune->prefer_ldrd_strd))) + { + reg = 3; + } +@@ -17509,6 +18419,12 @@ + { + thumb2_emit_strd_push (live_regs_mask); + } ++ else if (TARGET_ARM ++ && !TARGET_APCS_FRAME ++ && !IS_INTERRUPT (func_type)) ++ { ++ arm_emit_strd_push (live_regs_mask); ++ } + else + { + insn = emit_multi_reg_push (live_regs_mask); +@@ -18786,7 +19702,14 @@ + enum arm_cond_code code; + int n; + int mask; ++ int max; + ++ /* Maximum number of conditionally executed instructions in a block ++ is minimum of the two max values: maximum allowed in an IT block ++ and maximum that is beneficial according to the cost model and tune. */ ++ max = (max_insns_skipped < MAX_INSN_PER_IT_BLOCK) ? ++ max_insns_skipped : MAX_INSN_PER_IT_BLOCK; ++ + /* Remove the previous insn from the count of insns to be output. */ + if (arm_condexec_count) + arm_condexec_count--; +@@ -18828,9 +19751,9 @@ + /* ??? Recognize conditional jumps, and combine them with IT blocks. */ + if (GET_CODE (body) != COND_EXEC) + break; +- /* Allow up to 4 conditionally executed instructions in a block. */ ++ /* Maximum number of conditionally executed instructions in a block. */ + n = get_attr_ce_count (insn); +- if (arm_condexec_masklen + n > 4) ++ if (arm_condexec_masklen + n > max) + break; + + predicate = COND_EXEC_TEST (body); +@@ -19388,6 +20311,7 @@ + typedef enum { + T_V8QI, + T_V4HI, ++ T_V4HF, + T_V2SI, + T_V2SF, + T_DI, +@@ -19405,8 +20329,8 @@ + #define TYPE_MODE_BIT(X) (1 << (X)) + + #define TB_DREG (TYPE_MODE_BIT (T_V8QI) | TYPE_MODE_BIT (T_V4HI) \ +- | TYPE_MODE_BIT (T_V2SI) | TYPE_MODE_BIT (T_V2SF) \ +- | TYPE_MODE_BIT (T_DI)) ++ | TYPE_MODE_BIT (T_V4HF) | TYPE_MODE_BIT (T_V2SI) \ ++ | TYPE_MODE_BIT (T_V2SF) | TYPE_MODE_BIT (T_DI)) + #define TB_QREG (TYPE_MODE_BIT (T_V16QI) | TYPE_MODE_BIT (T_V8HI) \ + | TYPE_MODE_BIT (T_V4SI) | TYPE_MODE_BIT (T_V4SF) \ + | TYPE_MODE_BIT (T_V2DI) | TYPE_MODE_BIT (T_TI)) +@@ -19413,6 +20337,7 @@ + + #define v8qi_UP T_V8QI + #define v4hi_UP T_V4HI ++#define v4hf_UP T_V4HF + #define v2si_UP T_V2SI + #define v2sf_UP T_V2SF + #define di_UP T_DI +@@ -19448,6 +20373,8 @@ + NEON_SCALARMULH, + NEON_SCALARMAC, + NEON_CONVERT, ++ NEON_FLOAT_WIDEN, ++ NEON_FLOAT_NARROW, + NEON_FIXCONV, + NEON_SELECT, + NEON_RESULTPAIR, +@@ -19508,7 +20435,8 @@ + VAR9 (T, N, A, B, C, D, E, F, G, H, I), \ + {#N, NEON_##T, UP (J), CF (N, J), 0} + +-/* The mode entries in the following table correspond to the "key" type of the ++/* The NEON builtin data can be found in arm_neon_builtins.def. ++ The mode entries in the following table correspond to the "key" type of the + instruction variant, i.e. equivalent to that which would be specified after + the assembler mnemonic, which usually refers to the last vector operand. + (Signed/unsigned/polynomial types are not differentiated between though, and +@@ -19518,196 +20446,7 @@ + + static neon_builtin_datum neon_builtin_data[] = + { +- VAR10 (BINOP, vadd, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR3 (BINOP, vaddl, v8qi, v4hi, v2si), +- VAR3 (BINOP, vaddw, v8qi, v4hi, v2si), +- VAR6 (BINOP, vhadd, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR8 (BINOP, vqadd, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR3 (BINOP, vaddhn, v8hi, v4si, v2di), +- VAR8 (BINOP, vmul, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR8 (TERNOP, vmla, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR3 (TERNOP, vmlal, v8qi, v4hi, v2si), +- VAR2 (TERNOP, vfma, v2sf, v4sf), +- VAR2 (TERNOP, vfms, v2sf, v4sf), +- VAR8 (TERNOP, vmls, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR3 (TERNOP, vmlsl, v8qi, v4hi, v2si), +- VAR4 (BINOP, vqdmulh, v4hi, v2si, v8hi, v4si), +- VAR2 (TERNOP, vqdmlal, v4hi, v2si), +- VAR2 (TERNOP, vqdmlsl, v4hi, v2si), +- VAR3 (BINOP, vmull, v8qi, v4hi, v2si), +- VAR2 (SCALARMULL, vmull_n, v4hi, v2si), +- VAR2 (LANEMULL, vmull_lane, v4hi, v2si), +- VAR2 (SCALARMULL, vqdmull_n, v4hi, v2si), +- VAR2 (LANEMULL, vqdmull_lane, v4hi, v2si), +- VAR4 (SCALARMULH, vqdmulh_n, v4hi, v2si, v8hi, v4si), +- VAR4 (LANEMULH, vqdmulh_lane, v4hi, v2si, v8hi, v4si), +- VAR2 (BINOP, vqdmull, v4hi, v2si), +- VAR8 (BINOP, vshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR8 (BINOP, vqshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR8 (SHIFTIMM, vshr_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR3 (SHIFTIMM, vshrn_n, v8hi, v4si, v2di), +- VAR3 (SHIFTIMM, vqshrn_n, v8hi, v4si, v2di), +- VAR3 (SHIFTIMM, vqshrun_n, v8hi, v4si, v2di), +- VAR8 (SHIFTIMM, vshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR8 (SHIFTIMM, vqshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR8 (SHIFTIMM, vqshlu_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR3 (SHIFTIMM, vshll_n, v8qi, v4hi, v2si), +- VAR8 (SHIFTACC, vsra_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR10 (BINOP, vsub, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR3 (BINOP, vsubl, v8qi, v4hi, v2si), +- VAR3 (BINOP, vsubw, v8qi, v4hi, v2si), +- VAR8 (BINOP, vqsub, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR6 (BINOP, vhsub, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR3 (BINOP, vsubhn, v8hi, v4si, v2di), +- VAR8 (BINOP, vceq, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR8 (BINOP, vcge, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR6 (BINOP, vcgeu, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR8 (BINOP, vcgt, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR6 (BINOP, vcgtu, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR2 (BINOP, vcage, v2sf, v4sf), +- VAR2 (BINOP, vcagt, v2sf, v4sf), +- VAR6 (BINOP, vtst, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR8 (BINOP, vabd, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR3 (BINOP, vabdl, v8qi, v4hi, v2si), +- VAR6 (TERNOP, vaba, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR3 (TERNOP, vabal, v8qi, v4hi, v2si), +- VAR8 (BINOP, vmax, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR8 (BINOP, vmin, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR4 (BINOP, vpadd, v8qi, v4hi, v2si, v2sf), +- VAR6 (UNOP, vpaddl, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR6 (BINOP, vpadal, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR4 (BINOP, vpmax, v8qi, v4hi, v2si, v2sf), +- VAR4 (BINOP, vpmin, v8qi, v4hi, v2si, v2sf), +- VAR2 (BINOP, vrecps, v2sf, v4sf), +- VAR2 (BINOP, vrsqrts, v2sf, v4sf), +- VAR8 (SHIFTINSERT, vsri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR8 (SHIFTINSERT, vsli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), +- VAR8 (UNOP, vabs, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR6 (UNOP, vqabs, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR8 (UNOP, vneg, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR6 (UNOP, vqneg, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR6 (UNOP, vcls, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR6 (UNOP, vclz, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- VAR2 (UNOP, vcnt, v8qi, v16qi), +- VAR4 (UNOP, vrecpe, v2si, v2sf, v4si, v4sf), +- VAR4 (UNOP, vrsqrte, v2si, v2sf, v4si, v4sf), +- VAR6 (UNOP, vmvn, v8qi, v4hi, v2si, v16qi, v8hi, v4si), +- /* FIXME: vget_lane supports more variants than this! */ +- VAR10 (GETLANE, vget_lane, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (SETLANE, vset_lane, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR5 (CREATE, vcreate, v8qi, v4hi, v2si, v2sf, di), +- VAR10 (DUP, vdup_n, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (DUPLANE, vdup_lane, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR5 (COMBINE, vcombine, v8qi, v4hi, v2si, v2sf, di), +- VAR5 (SPLIT, vget_high, v16qi, v8hi, v4si, v4sf, v2di), +- VAR5 (SPLIT, vget_low, v16qi, v8hi, v4si, v4sf, v2di), +- VAR3 (UNOP, vmovn, v8hi, v4si, v2di), +- VAR3 (UNOP, vqmovn, v8hi, v4si, v2di), +- VAR3 (UNOP, vqmovun, v8hi, v4si, v2di), +- VAR3 (UNOP, vmovl, v8qi, v4hi, v2si), +- VAR6 (LANEMUL, vmul_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR6 (LANEMAC, vmla_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR2 (LANEMAC, vmlal_lane, v4hi, v2si), +- VAR2 (LANEMAC, vqdmlal_lane, v4hi, v2si), +- VAR6 (LANEMAC, vmls_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR2 (LANEMAC, vmlsl_lane, v4hi, v2si), +- VAR2 (LANEMAC, vqdmlsl_lane, v4hi, v2si), +- VAR6 (SCALARMUL, vmul_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR6 (SCALARMAC, vmla_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR2 (SCALARMAC, vmlal_n, v4hi, v2si), +- VAR2 (SCALARMAC, vqdmlal_n, v4hi, v2si), +- VAR6 (SCALARMAC, vmls_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR2 (SCALARMAC, vmlsl_n, v4hi, v2si), +- VAR2 (SCALARMAC, vqdmlsl_n, v4hi, v2si), +- VAR10 (BINOP, vext, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR8 (UNOP, vrev64, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR4 (UNOP, vrev32, v8qi, v4hi, v16qi, v8hi), +- VAR2 (UNOP, vrev16, v8qi, v16qi), +- VAR4 (CONVERT, vcvt, v2si, v2sf, v4si, v4sf), +- VAR4 (FIXCONV, vcvt_n, v2si, v2sf, v4si, v4sf), +- VAR10 (SELECT, vbsl, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR2 (RINT, vrintn, v2sf, v4sf), +- VAR2 (RINT, vrinta, v2sf, v4sf), +- VAR2 (RINT, vrintp, v2sf, v4sf), +- VAR2 (RINT, vrintm, v2sf, v4sf), +- VAR2 (RINT, vrintz, v2sf, v4sf), +- VAR2 (RINT, vrintx, v2sf, v4sf), +- VAR1 (VTBL, vtbl1, v8qi), +- VAR1 (VTBL, vtbl2, v8qi), +- VAR1 (VTBL, vtbl3, v8qi), +- VAR1 (VTBL, vtbl4, v8qi), +- VAR1 (VTBX, vtbx1, v8qi), +- VAR1 (VTBX, vtbx2, v8qi), +- VAR1 (VTBX, vtbx3, v8qi), +- VAR1 (VTBX, vtbx4, v8qi), +- VAR8 (RESULTPAIR, vtrn, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR8 (RESULTPAIR, vzip, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR8 (RESULTPAIR, vuzp, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), +- VAR5 (REINTERP, vreinterpretv8qi, v8qi, v4hi, v2si, v2sf, di), +- VAR5 (REINTERP, vreinterpretv4hi, v8qi, v4hi, v2si, v2sf, di), +- VAR5 (REINTERP, vreinterpretv2si, v8qi, v4hi, v2si, v2sf, di), +- VAR5 (REINTERP, vreinterpretv2sf, v8qi, v4hi, v2si, v2sf, di), +- VAR5 (REINTERP, vreinterpretdi, v8qi, v4hi, v2si, v2sf, di), +- VAR5 (REINTERP, vreinterpretv16qi, v16qi, v8hi, v4si, v4sf, v2di), +- VAR5 (REINTERP, vreinterpretv8hi, v16qi, v8hi, v4si, v4sf, v2di), +- VAR5 (REINTERP, vreinterpretv4si, v16qi, v8hi, v4si, v4sf, v2di), +- VAR5 (REINTERP, vreinterpretv4sf, v16qi, v8hi, v4si, v4sf, v2di), +- VAR5 (REINTERP, vreinterpretv2di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (LOAD1, vld1, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (LOAD1LANE, vld1_lane, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (LOAD1, vld1_dup, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (STORE1, vst1, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (STORE1LANE, vst1_lane, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR9 (LOADSTRUCT, +- vld2, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), +- VAR7 (LOADSTRUCTLANE, vld2_lane, +- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR5 (LOADSTRUCT, vld2_dup, v8qi, v4hi, v2si, v2sf, di), +- VAR9 (STORESTRUCT, vst2, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), +- VAR7 (STORESTRUCTLANE, vst2_lane, +- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR9 (LOADSTRUCT, +- vld3, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), +- VAR7 (LOADSTRUCTLANE, vld3_lane, +- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR5 (LOADSTRUCT, vld3_dup, v8qi, v4hi, v2si, v2sf, di), +- VAR9 (STORESTRUCT, vst3, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), +- VAR7 (STORESTRUCTLANE, vst3_lane, +- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR9 (LOADSTRUCT, vld4, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), +- VAR7 (LOADSTRUCTLANE, vld4_lane, +- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR5 (LOADSTRUCT, vld4_dup, v8qi, v4hi, v2si, v2sf, di), +- VAR9 (STORESTRUCT, vst4, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), +- VAR7 (STORESTRUCTLANE, vst4_lane, +- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), +- VAR10 (LOGICBINOP, vand, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (LOGICBINOP, vorr, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (BINOP, veor, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (LOGICBINOP, vbic, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), +- VAR10 (LOGICBINOP, vorn, +- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) ++#include "arm_neon_builtins.def" + }; + + #undef CF +@@ -19722,9 +20461,36 @@ + #undef VAR9 + #undef VAR10 + +-/* Neon defines builtins from ARM_BUILTIN_MAX upwards, though they don't have +- symbolic names defined here (which would require too much duplication). +- FIXME? */ ++#define CF(N,X) ARM_BUILTIN_NEON_##N##X ++#define VAR1(T, N, A) \ ++ CF (N, A) ++#define VAR2(T, N, A, B) \ ++ VAR1 (T, N, A), \ ++ CF (N, B) ++#define VAR3(T, N, A, B, C) \ ++ VAR2 (T, N, A, B), \ ++ CF (N, C) ++#define VAR4(T, N, A, B, C, D) \ ++ VAR3 (T, N, A, B, C), \ ++ CF (N, D) ++#define VAR5(T, N, A, B, C, D, E) \ ++ VAR4 (T, N, A, B, C, D), \ ++ CF (N, E) ++#define VAR6(T, N, A, B, C, D, E, F) \ ++ VAR5 (T, N, A, B, C, D, E), \ ++ CF (N, F) ++#define VAR7(T, N, A, B, C, D, E, F, G) \ ++ VAR6 (T, N, A, B, C, D, E, F), \ ++ CF (N, G) ++#define VAR8(T, N, A, B, C, D, E, F, G, H) \ ++ VAR7 (T, N, A, B, C, D, E, F, G), \ ++ CF (N, H) ++#define VAR9(T, N, A, B, C, D, E, F, G, H, I) \ ++ VAR8 (T, N, A, B, C, D, E, F, G, H), \ ++ CF (N, I) ++#define VAR10(T, N, A, B, C, D, E, F, G, H, I, J) \ ++ VAR9 (T, N, A, B, C, D, E, F, G, H, I), \ ++ CF (N, J) + enum arm_builtins + { + ARM_BUILTIN_GETWCGR0, +@@ -19973,13 +20739,54 @@ + + ARM_BUILTIN_WMERGE, + +- ARM_BUILTIN_NEON_BASE, ++ ARM_BUILTIN_CRC32B, ++ ARM_BUILTIN_CRC32H, ++ ARM_BUILTIN_CRC32W, ++ ARM_BUILTIN_CRC32CB, ++ ARM_BUILTIN_CRC32CH, ++ ARM_BUILTIN_CRC32CW, + +- ARM_BUILTIN_MAX = ARM_BUILTIN_NEON_BASE + ARRAY_SIZE (neon_builtin_data) ++#undef CRYPTO1 ++#undef CRYPTO2 ++#undef CRYPTO3 ++ ++#define CRYPTO1(L, U, M1, M2) \ ++ ARM_BUILTIN_CRYPTO_##U, ++#define CRYPTO2(L, U, M1, M2, M3) \ ++ ARM_BUILTIN_CRYPTO_##U, ++#define CRYPTO3(L, U, M1, M2, M3, M4) \ ++ ARM_BUILTIN_CRYPTO_##U, ++ ++#include "crypto.def" ++ ++#undef CRYPTO1 ++#undef CRYPTO2 ++#undef CRYPTO3 ++ ++#include "arm_neon_builtins.def" ++ ++ ,ARM_BUILTIN_MAX + }; + ++#define ARM_BUILTIN_NEON_BASE (ARM_BUILTIN_MAX - ARRAY_SIZE (neon_builtin_data)) ++ ++#undef CF ++#undef VAR1 ++#undef VAR2 ++#undef VAR3 ++#undef VAR4 ++#undef VAR5 ++#undef VAR6 ++#undef VAR7 ++#undef VAR8 ++#undef VAR9 ++#undef VAR10 ++ + static GTY(()) tree arm_builtin_decls[ARM_BUILTIN_MAX]; + ++#define NUM_DREG_TYPES 5 ++#define NUM_QREG_TYPES 6 ++ + static void + arm_init_neon_builtins (void) + { +@@ -19988,10 +20795,12 @@ + + tree neon_intQI_type_node; + tree neon_intHI_type_node; ++ tree neon_floatHF_type_node; + tree neon_polyQI_type_node; + tree neon_polyHI_type_node; + tree neon_intSI_type_node; + tree neon_intDI_type_node; ++ tree neon_intUTI_type_node; + tree neon_float_type_node; + + tree intQI_pointer_node; +@@ -20014,6 +20823,7 @@ + + tree V8QI_type_node; + tree V4HI_type_node; ++ tree V4HF_type_node; + tree V2SI_type_node; + tree V2SF_type_node; + tree V16QI_type_node; +@@ -20053,9 +20863,9 @@ + tree void_ftype_pv4sf_v4sf_v4sf; + tree void_ftype_pv2di_v2di_v2di; + +- tree reinterp_ftype_dreg[5][5]; +- tree reinterp_ftype_qreg[5][5]; +- tree dreg_types[5], qreg_types[5]; ++ tree reinterp_ftype_dreg[NUM_DREG_TYPES][NUM_DREG_TYPES]; ++ tree reinterp_ftype_qreg[NUM_QREG_TYPES][NUM_QREG_TYPES]; ++ tree dreg_types[NUM_DREG_TYPES], qreg_types[NUM_QREG_TYPES]; + + /* Create distinguished type nodes for NEON vector element types, + and pointers to values of such types, so we can detect them later. */ +@@ -20068,6 +20878,9 @@ + neon_float_type_node = make_node (REAL_TYPE); + TYPE_PRECISION (neon_float_type_node) = FLOAT_TYPE_SIZE; + layout_type (neon_float_type_node); ++ neon_floatHF_type_node = make_node (REAL_TYPE); ++ TYPE_PRECISION (neon_floatHF_type_node) = GET_MODE_PRECISION (HFmode); ++ layout_type (neon_floatHF_type_node); + + /* Define typedefs which exactly correspond to the modes we are basing vector + types on. If you change these names you'll need to change +@@ -20076,6 +20889,8 @@ + "__builtin_neon_qi"); + (*lang_hooks.types.register_builtin_type) (neon_intHI_type_node, + "__builtin_neon_hi"); ++ (*lang_hooks.types.register_builtin_type) (neon_floatHF_type_node, ++ "__builtin_neon_hf"); + (*lang_hooks.types.register_builtin_type) (neon_intSI_type_node, + "__builtin_neon_si"); + (*lang_hooks.types.register_builtin_type) (neon_float_type_node, +@@ -20117,6 +20932,8 @@ + build_vector_type_for_mode (neon_intQI_type_node, V8QImode); + V4HI_type_node = + build_vector_type_for_mode (neon_intHI_type_node, V4HImode); ++ V4HF_type_node = ++ build_vector_type_for_mode (neon_floatHF_type_node, V4HFmode); + V2SI_type_node = + build_vector_type_for_mode (neon_intSI_type_node, V2SImode); + V2SF_type_node = +@@ -20138,7 +20955,9 @@ + intUHI_type_node = make_unsigned_type (GET_MODE_PRECISION (HImode)); + intUSI_type_node = make_unsigned_type (GET_MODE_PRECISION (SImode)); + intUDI_type_node = make_unsigned_type (GET_MODE_PRECISION (DImode)); ++ neon_intUTI_type_node = make_unsigned_type (GET_MODE_PRECISION (TImode)); + ++ + (*lang_hooks.types.register_builtin_type) (intUQI_type_node, + "__builtin_neon_uqi"); + (*lang_hooks.types.register_builtin_type) (intUHI_type_node, +@@ -20147,6 +20966,10 @@ + "__builtin_neon_usi"); + (*lang_hooks.types.register_builtin_type) (intUDI_type_node, + "__builtin_neon_udi"); ++ (*lang_hooks.types.register_builtin_type) (intUDI_type_node, ++ "__builtin_neon_poly64"); ++ (*lang_hooks.types.register_builtin_type) (neon_intUTI_type_node, ++ "__builtin_neon_poly128"); + + /* Opaque integer types for structures of vectors. */ + intEI_type_node = make_signed_type (GET_MODE_PRECISION (EImode)); +@@ -20208,6 +21031,80 @@ + build_function_type_list (void_type_node, V2DI_pointer_node, V2DI_type_node, + V2DI_type_node, NULL); + ++ if (TARGET_CRYPTO && TARGET_HARD_FLOAT) ++ { ++ tree V4USI_type_node = ++ build_vector_type_for_mode (intUSI_type_node, V4SImode); ++ ++ tree V16UQI_type_node = ++ build_vector_type_for_mode (intUQI_type_node, V16QImode); ++ ++ tree v16uqi_ftype_v16uqi ++ = build_function_type_list (V16UQI_type_node, V16UQI_type_node, NULL_TREE); ++ ++ tree v16uqi_ftype_v16uqi_v16uqi ++ = build_function_type_list (V16UQI_type_node, V16UQI_type_node, ++ V16UQI_type_node, NULL_TREE); ++ ++ tree v4usi_ftype_v4usi ++ = build_function_type_list (V4USI_type_node, V4USI_type_node, NULL_TREE); ++ ++ tree v4usi_ftype_v4usi_v4usi ++ = build_function_type_list (V4USI_type_node, V4USI_type_node, ++ V4USI_type_node, NULL_TREE); ++ ++ tree v4usi_ftype_v4usi_v4usi_v4usi ++ = build_function_type_list (V4USI_type_node, V4USI_type_node, ++ V4USI_type_node, V4USI_type_node, NULL_TREE); ++ ++ tree uti_ftype_udi_udi ++ = build_function_type_list (neon_intUTI_type_node, intUDI_type_node, ++ intUDI_type_node, NULL_TREE); ++ ++ #undef CRYPTO1 ++ #undef CRYPTO2 ++ #undef CRYPTO3 ++ #undef C ++ #undef N ++ #undef CF ++ #undef FT1 ++ #undef FT2 ++ #undef FT3 ++ ++ #define C(U) \ ++ ARM_BUILTIN_CRYPTO_##U ++ #define N(L) \ ++ "__builtin_arm_crypto_"#L ++ #define FT1(R, A) \ ++ R##_ftype_##A ++ #define FT2(R, A1, A2) \ ++ R##_ftype_##A1##_##A2 ++ #define FT3(R, A1, A2, A3) \ ++ R##_ftype_##A1##_##A2##_##A3 ++ #define CRYPTO1(L, U, R, A) \ ++ arm_builtin_decls[C (U)] = add_builtin_function (N (L), FT1 (R, A), \ ++ C (U), BUILT_IN_MD, \ ++ NULL, NULL_TREE); ++ #define CRYPTO2(L, U, R, A1, A2) \ ++ arm_builtin_decls[C (U)] = add_builtin_function (N (L), FT2 (R, A1, A2), \ ++ C (U), BUILT_IN_MD, \ ++ NULL, NULL_TREE); ++ ++ #define CRYPTO3(L, U, R, A1, A2, A3) \ ++ arm_builtin_decls[C (U)] = add_builtin_function (N (L), FT3 (R, A1, A2, A3), \ ++ C (U), BUILT_IN_MD, \ ++ NULL, NULL_TREE); ++ #include "crypto.def" ++ ++ #undef CRYPTO1 ++ #undef CRYPTO2 ++ #undef CRYPTO3 ++ #undef C ++ #undef N ++ #undef FT1 ++ #undef FT2 ++ #undef FT3 ++ } + dreg_types[0] = V8QI_type_node; + dreg_types[1] = V4HI_type_node; + dreg_types[2] = V2SI_type_node; +@@ -20219,14 +21116,17 @@ + qreg_types[2] = V4SI_type_node; + qreg_types[3] = V4SF_type_node; + qreg_types[4] = V2DI_type_node; ++ qreg_types[5] = neon_intUTI_type_node; + +- for (i = 0; i < 5; i++) ++ for (i = 0; i < NUM_QREG_TYPES; i++) + { + int j; +- for (j = 0; j < 5; j++) ++ for (j = 0; j < NUM_QREG_TYPES; j++) + { +- reinterp_ftype_dreg[i][j] +- = build_function_type_list (dreg_types[i], dreg_types[j], NULL); ++ if (i < NUM_DREG_TYPES && j < NUM_DREG_TYPES) ++ reinterp_ftype_dreg[i][j] ++ = build_function_type_list (dreg_types[i], dreg_types[j], NULL); ++ + reinterp_ftype_qreg[i][j] + = build_function_type_list (qreg_types[i], qreg_types[j], NULL); + } +@@ -20239,7 +21139,7 @@ + neon_builtin_datum *d = &neon_builtin_data[i]; + + const char* const modenames[] = { +- "v8qi", "v4hi", "v2si", "v2sf", "di", ++ "v8qi", "v4hi", "v4hf", "v2si", "v2sf", "di", + "v16qi", "v8hi", "v4si", "v4sf", "v2di", + "ti", "ei", "oi" + }; +@@ -20441,9 +21341,14 @@ + + case NEON_REINTERP: + { +- /* We iterate over 5 doubleword types, then 5 quadword +- types. */ +- int rhs = d->mode % 5; ++ /* We iterate over NUM_DREG_TYPES doubleword types, ++ then NUM_QREG_TYPES quadword types. ++ V4HF is not a type used in reinterpret, so we translate ++ d->mode to the correct index in reinterp_ftype_dreg. */ ++ bool qreg_p ++ = GET_MODE_SIZE (insn_data[d->code].operand[0].mode) > 8; ++ int rhs = (d->mode - ((!qreg_p && (d->mode > T_V4HF)) ? 1 : 0)) ++ % NUM_QREG_TYPES; + switch (insn_data[d->code].operand[0].mode) + { + case V8QImode: ftype = reinterp_ftype_dreg[0][rhs]; break; +@@ -20456,11 +21361,43 @@ + case V4SImode: ftype = reinterp_ftype_qreg[2][rhs]; break; + case V4SFmode: ftype = reinterp_ftype_qreg[3][rhs]; break; + case V2DImode: ftype = reinterp_ftype_qreg[4][rhs]; break; ++ case TImode: ftype = reinterp_ftype_qreg[5][rhs]; break; + default: gcc_unreachable (); + } + } + break; ++ case NEON_FLOAT_WIDEN: ++ { ++ tree eltype = NULL_TREE; ++ tree return_type = NULL_TREE; + ++ switch (insn_data[d->code].operand[1].mode) ++ { ++ case V4HFmode: ++ eltype = V4HF_type_node; ++ return_type = V4SF_type_node; ++ break; ++ default: gcc_unreachable (); ++ } ++ ftype = build_function_type_list (return_type, eltype, NULL); ++ break; ++ } ++ case NEON_FLOAT_NARROW: ++ { ++ tree eltype = NULL_TREE; ++ tree return_type = NULL_TREE; ++ ++ switch (insn_data[d->code].operand[1].mode) ++ { ++ case V4SFmode: ++ eltype = V4SF_type_node; ++ return_type = V4HF_type_node; ++ break; ++ default: gcc_unreachable (); ++ } ++ ftype = build_function_type_list (return_type, eltype, NULL); ++ break; ++ } + default: + gcc_unreachable (); + } +@@ -20475,6 +21412,9 @@ + } + } + ++#undef NUM_DREG_TYPES ++#undef NUM_QREG_TYPES ++ + #define def_mbuiltin(MASK, NAME, TYPE, CODE) \ + do \ + { \ +@@ -20497,7 +21437,7 @@ + const enum rtx_code comparison; + const unsigned int flag; + }; +- ++ + static const struct builtin_description bdesc_2arg[] = + { + #define IWMMXT_BUILTIN(code, string, builtin) \ +@@ -20603,6 +21543,33 @@ + IWMMXT_BUILTIN2 (iwmmxt_wpackdus, WPACKDUS) + IWMMXT_BUILTIN2 (iwmmxt_wmacuz, WMACUZ) + IWMMXT_BUILTIN2 (iwmmxt_wmacsz, WMACSZ) ++ ++#define CRC32_BUILTIN(L, U) \ ++ {0, CODE_FOR_##L, "__builtin_arm_"#L, ARM_BUILTIN_##U, \ ++ UNKNOWN, 0}, ++ CRC32_BUILTIN (crc32b, CRC32B) ++ CRC32_BUILTIN (crc32h, CRC32H) ++ CRC32_BUILTIN (crc32w, CRC32W) ++ CRC32_BUILTIN (crc32cb, CRC32CB) ++ CRC32_BUILTIN (crc32ch, CRC32CH) ++ CRC32_BUILTIN (crc32cw, CRC32CW) ++#undef CRC32_BUILTIN ++ ++ ++#define CRYPTO_BUILTIN(L, U) \ ++ {0, CODE_FOR_crypto_##L, "__builtin_arm_crypto_"#L, ARM_BUILTIN_CRYPTO_##U, \ ++ UNKNOWN, 0}, ++#undef CRYPTO1 ++#undef CRYPTO2 ++#undef CRYPTO3 ++#define CRYPTO2(L, U, R, A1, A2) CRYPTO_BUILTIN (L, U) ++#define CRYPTO1(L, U, R, A) ++#define CRYPTO3(L, U, R, A1, A2, A3) ++#include "crypto.def" ++#undef CRYPTO1 ++#undef CRYPTO2 ++#undef CRYPTO3 ++ + }; + + static const struct builtin_description bdesc_1arg[] = +@@ -20631,8 +21598,28 @@ + IWMMXT_BUILTIN (tbcstv8qi, "tbcstb", TBCSTB) + IWMMXT_BUILTIN (tbcstv4hi, "tbcsth", TBCSTH) + IWMMXT_BUILTIN (tbcstv2si, "tbcstw", TBCSTW) ++ ++#define CRYPTO1(L, U, R, A) CRYPTO_BUILTIN (L, U) ++#define CRYPTO2(L, U, R, A1, A2) ++#define CRYPTO3(L, U, R, A1, A2, A3) ++#include "crypto.def" ++#undef CRYPTO1 ++#undef CRYPTO2 ++#undef CRYPTO3 + }; + ++static const struct builtin_description bdesc_3arg[] = ++{ ++#define CRYPTO3(L, U, R, A1, A2, A3) CRYPTO_BUILTIN (L, U) ++#define CRYPTO1(L, U, R, A) ++#define CRYPTO2(L, U, R, A1, A2) ++#include "crypto.def" ++#undef CRYPTO1 ++#undef CRYPTO2 ++#undef CRYPTO3 ++ }; ++#undef CRYPTO_BUILTIN ++ + /* Set up all the iWMMXt builtins. This is not called if + TARGET_IWMMXT is zero. */ + +@@ -20827,7 +21814,7 @@ + enum machine_mode mode; + tree type; + +- if (d->name == 0) ++ if (d->name == 0 || !(d->mask == FL_IWMMXT || d->mask == FL_IWMMXT2)) + continue; + + mode = insn_data[d->icode].operand[1].mode; +@@ -21022,6 +22009,42 @@ + } + + static void ++arm_init_crc32_builtins () ++{ ++ tree si_ftype_si_qi ++ = build_function_type_list (unsigned_intSI_type_node, ++ unsigned_intSI_type_node, ++ unsigned_intQI_type_node, NULL_TREE); ++ tree si_ftype_si_hi ++ = build_function_type_list (unsigned_intSI_type_node, ++ unsigned_intSI_type_node, ++ unsigned_intHI_type_node, NULL_TREE); ++ tree si_ftype_si_si ++ = build_function_type_list (unsigned_intSI_type_node, ++ unsigned_intSI_type_node, ++ unsigned_intSI_type_node, NULL_TREE); ++ ++ arm_builtin_decls[ARM_BUILTIN_CRC32B] ++ = add_builtin_function ("__builtin_arm_crc32b", si_ftype_si_qi, ++ ARM_BUILTIN_CRC32B, BUILT_IN_MD, NULL, NULL_TREE); ++ arm_builtin_decls[ARM_BUILTIN_CRC32H] ++ = add_builtin_function ("__builtin_arm_crc32h", si_ftype_si_hi, ++ ARM_BUILTIN_CRC32H, BUILT_IN_MD, NULL, NULL_TREE); ++ arm_builtin_decls[ARM_BUILTIN_CRC32W] ++ = add_builtin_function ("__builtin_arm_crc32w", si_ftype_si_si, ++ ARM_BUILTIN_CRC32W, BUILT_IN_MD, NULL, NULL_TREE); ++ arm_builtin_decls[ARM_BUILTIN_CRC32CB] ++ = add_builtin_function ("__builtin_arm_crc32cb", si_ftype_si_qi, ++ ARM_BUILTIN_CRC32CB, BUILT_IN_MD, NULL, NULL_TREE); ++ arm_builtin_decls[ARM_BUILTIN_CRC32CH] ++ = add_builtin_function ("__builtin_arm_crc32ch", si_ftype_si_hi, ++ ARM_BUILTIN_CRC32CH, BUILT_IN_MD, NULL, NULL_TREE); ++ arm_builtin_decls[ARM_BUILTIN_CRC32CW] ++ = add_builtin_function ("__builtin_arm_crc32cw", si_ftype_si_si, ++ ARM_BUILTIN_CRC32CW, BUILT_IN_MD, NULL, NULL_TREE); ++} ++ ++static void + arm_init_builtins (void) + { + if (TARGET_REALLY_IWMMXT) +@@ -21032,6 +22055,9 @@ + + if (arm_fp16_format) + arm_init_fp16_builtins (); ++ ++ if (TARGET_CRC32) ++ arm_init_crc32_builtins (); + } + + /* Return the ARM builtin for CODE. */ +@@ -21125,6 +22151,73 @@ + return x; + } + ++/* Function to expand ternary builtins. */ ++static rtx ++arm_expand_ternop_builtin (enum insn_code icode, ++ tree exp, rtx target) ++{ ++ rtx pat; ++ tree arg0 = CALL_EXPR_ARG (exp, 0); ++ tree arg1 = CALL_EXPR_ARG (exp, 1); ++ tree arg2 = CALL_EXPR_ARG (exp, 2); ++ ++ rtx op0 = expand_normal (arg0); ++ rtx op1 = expand_normal (arg1); ++ rtx op2 = expand_normal (arg2); ++ rtx op3 = NULL_RTX; ++ ++ /* The sha1c, sha1p, sha1m crypto builtins require a different vec_select ++ lane operand depending on endianness. */ ++ bool builtin_sha1cpm_p = false; ++ ++ if (insn_data[icode].n_operands == 5) ++ { ++ gcc_assert (icode == CODE_FOR_crypto_sha1c ++ || icode == CODE_FOR_crypto_sha1p ++ || icode == CODE_FOR_crypto_sha1m); ++ builtin_sha1cpm_p = true; ++ } ++ enum machine_mode tmode = insn_data[icode].operand[0].mode; ++ enum machine_mode mode0 = insn_data[icode].operand[1].mode; ++ enum machine_mode mode1 = insn_data[icode].operand[2].mode; ++ enum machine_mode mode2 = insn_data[icode].operand[3].mode; ++ ++ ++ if (VECTOR_MODE_P (mode0)) ++ op0 = safe_vector_operand (op0, mode0); ++ if (VECTOR_MODE_P (mode1)) ++ op1 = safe_vector_operand (op1, mode1); ++ if (VECTOR_MODE_P (mode2)) ++ op2 = safe_vector_operand (op2, mode2); ++ ++ if (! target ++ || GET_MODE (target) != tmode ++ || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) ++ target = gen_reg_rtx (tmode); ++ ++ gcc_assert ((GET_MODE (op0) == mode0 || GET_MODE (op0) == VOIDmode) ++ && (GET_MODE (op1) == mode1 || GET_MODE (op1) == VOIDmode) ++ && (GET_MODE (op2) == mode2 || GET_MODE (op2) == VOIDmode)); ++ ++ if (! (*insn_data[icode].operand[1].predicate) (op0, mode0)) ++ op0 = copy_to_mode_reg (mode0, op0); ++ if (! (*insn_data[icode].operand[2].predicate) (op1, mode1)) ++ op1 = copy_to_mode_reg (mode1, op1); ++ if (! (*insn_data[icode].operand[3].predicate) (op2, mode2)) ++ op2 = copy_to_mode_reg (mode2, op2); ++ if (builtin_sha1cpm_p) ++ op3 = GEN_INT (TARGET_BIG_END ? 1 : 0); ++ ++ if (builtin_sha1cpm_p) ++ pat = GEN_FCN (icode) (target, op0, op1, op2, op3); ++ else ++ pat = GEN_FCN (icode) (target, op0, op1, op2); ++ if (! pat) ++ return 0; ++ emit_insn (pat); ++ return target; ++} ++ + /* Subroutine of arm_expand_builtin to take care of binop insns. */ + + static rtx +@@ -21174,9 +22267,17 @@ + rtx pat; + tree arg0 = CALL_EXPR_ARG (exp, 0); + rtx op0 = expand_normal (arg0); ++ rtx op1 = NULL_RTX; + enum machine_mode tmode = insn_data[icode].operand[0].mode; + enum machine_mode mode0 = insn_data[icode].operand[1].mode; ++ bool builtin_sha1h_p = false; + ++ if (insn_data[icode].n_operands == 3) ++ { ++ gcc_assert (icode == CODE_FOR_crypto_sha1h); ++ builtin_sha1h_p = true; ++ } ++ + if (! target + || GET_MODE (target) != tmode + || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) +@@ -21191,8 +22292,13 @@ + if (! (*insn_data[icode].operand[1].predicate) (op0, mode0)) + op0 = copy_to_mode_reg (mode0, op0); + } ++ if (builtin_sha1h_p) ++ op1 = GEN_INT (TARGET_BIG_END ? 1 : 0); + +- pat = GEN_FCN (icode) (target, op0); ++ if (builtin_sha1h_p) ++ pat = GEN_FCN (icode) (target, op0, op1); ++ else ++ pat = GEN_FCN (icode) (target, op0); + if (! pat) + return 0; + emit_insn (pat); +@@ -21464,6 +22570,8 @@ + case NEON_DUP: + case NEON_RINT: + case NEON_SPLIT: ++ case NEON_FLOAT_WIDEN: ++ case NEON_FLOAT_NARROW: + case NEON_REINTERP: + return arm_expand_neon_args (target, icode, 1, type_mode, exp, fcode, + NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); +@@ -21661,7 +22769,7 @@ + rtx op1; + rtx op2; + rtx pat; +- int fcode = DECL_FUNCTION_CODE (fndecl); ++ unsigned int fcode = DECL_FUNCTION_CODE (fndecl); + size_t i; + enum machine_mode tmode; + enum machine_mode mode0; +@@ -22155,6 +23263,10 @@ + if (d->code == (const enum arm_builtins) fcode) + return arm_expand_unop_builtin (d->icode, exp, target, 0); + ++ for (i = 0, d = bdesc_3arg; i < ARRAY_SIZE (bdesc_3arg); i++, d++) ++ if (d->code == (const enum arm_builtins) fcode) ++ return arm_expand_ternop_builtin (d->icode, exp, target); ++ + /* @@@ Should really do something sensible here. */ + return NULL_RTX; + } +@@ -23378,7 +24490,7 @@ + all we really need to check here is if single register is to be + returned, or multiple register return. */ + void +-thumb2_expand_return (void) ++thumb2_expand_return (bool simple_return) + { + int i, num_regs; + unsigned long saved_regs_mask; +@@ -23391,7 +24503,7 @@ + if (saved_regs_mask & (1 << i)) + num_regs++; + +- if (saved_regs_mask) ++ if (!simple_return && saved_regs_mask) + { + if (num_regs == 1) + { +@@ -23507,15 +24619,19 @@ + if (TARGET_HARD_FLOAT && TARGET_VFP) + { + int start_reg; ++ rtx ip_rtx = gen_rtx_REG (SImode, IP_REGNUM); + + /* The offset is from IP_REGNUM. */ + int saved_size = arm_get_vfp_saved_size (); + if (saved_size > 0) + { ++ rtx insn; + floats_from_frame += saved_size; +- emit_insn (gen_addsi3 (gen_rtx_REG (SImode, IP_REGNUM), +- hard_frame_pointer_rtx, +- GEN_INT (-floats_from_frame))); ++ insn = emit_insn (gen_addsi3 (ip_rtx, ++ hard_frame_pointer_rtx, ++ GEN_INT (-floats_from_frame))); ++ arm_add_cfa_adjust_cfa_note (insn, -floats_from_frame, ++ ip_rtx, hard_frame_pointer_rtx); + } + + /* Generate VFP register multi-pop. */ +@@ -23588,11 +24704,15 @@ + num_regs = bit_count (saved_regs_mask); + if ((offsets->outgoing_args != (1 + num_regs)) || cfun->calls_alloca) + { ++ rtx insn; + emit_insn (gen_blockage ()); + /* Unwind the stack to just below the saved registers. */ +- emit_insn (gen_addsi3 (stack_pointer_rtx, +- hard_frame_pointer_rtx, +- GEN_INT (- 4 * num_regs))); ++ insn = emit_insn (gen_addsi3 (stack_pointer_rtx, ++ hard_frame_pointer_rtx, ++ GEN_INT (- 4 * num_regs))); ++ ++ arm_add_cfa_adjust_cfa_note (insn, - 4 * num_regs, ++ stack_pointer_rtx, hard_frame_pointer_rtx); + } + + arm_emit_multi_reg_pop (saved_regs_mask); +@@ -23670,6 +24790,7 @@ + + if (frame_pointer_needed) + { ++ rtx insn; + /* Restore stack pointer if necessary. */ + if (TARGET_ARM) + { +@@ -23680,9 +24801,12 @@ + /* Force out any pending memory operations that reference stacked data + before stack de-allocation occurs. */ + emit_insn (gen_blockage ()); +- emit_insn (gen_addsi3 (stack_pointer_rtx, +- hard_frame_pointer_rtx, +- GEN_INT (amount))); ++ insn = emit_insn (gen_addsi3 (stack_pointer_rtx, ++ hard_frame_pointer_rtx, ++ GEN_INT (amount))); ++ arm_add_cfa_adjust_cfa_note (insn, amount, ++ stack_pointer_rtx, ++ hard_frame_pointer_rtx); + + /* Emit USE(stack_pointer_rtx) to ensure that stack adjustment is not + deleted. */ +@@ -23692,16 +24816,25 @@ + { + /* In Thumb-2 mode, the frame pointer points to the last saved + register. */ +- amount = offsets->locals_base - offsets->saved_regs; +- if (amount) +- emit_insn (gen_addsi3 (hard_frame_pointer_rtx, +- hard_frame_pointer_rtx, +- GEN_INT (amount))); ++ amount = offsets->locals_base - offsets->saved_regs; ++ if (amount) ++ { ++ insn = emit_insn (gen_addsi3 (hard_frame_pointer_rtx, ++ hard_frame_pointer_rtx, ++ GEN_INT (amount))); ++ arm_add_cfa_adjust_cfa_note (insn, amount, ++ hard_frame_pointer_rtx, ++ hard_frame_pointer_rtx); ++ } + + /* Force out any pending memory operations that reference stacked data + before stack de-allocation occurs. */ + emit_insn (gen_blockage ()); +- emit_insn (gen_movsi (stack_pointer_rtx, hard_frame_pointer_rtx)); ++ insn = emit_insn (gen_movsi (stack_pointer_rtx, ++ hard_frame_pointer_rtx)); ++ arm_add_cfa_adjust_cfa_note (insn, 0, ++ stack_pointer_rtx, ++ hard_frame_pointer_rtx); + /* Emit USE(stack_pointer_rtx) to ensure that stack adjustment is not + deleted. */ + emit_insn (gen_force_register_use (stack_pointer_rtx)); +@@ -23714,12 +24847,15 @@ + amount = offsets->outgoing_args - offsets->saved_regs; + if (amount) + { ++ rtx tmp; + /* Force out any pending memory operations that reference stacked data + before stack de-allocation occurs. */ + emit_insn (gen_blockage ()); +- emit_insn (gen_addsi3 (stack_pointer_rtx, +- stack_pointer_rtx, +- GEN_INT (amount))); ++ tmp = emit_insn (gen_addsi3 (stack_pointer_rtx, ++ stack_pointer_rtx, ++ GEN_INT (amount))); ++ arm_add_cfa_adjust_cfa_note (tmp, amount, ++ stack_pointer_rtx, stack_pointer_rtx); + /* Emit USE(stack_pointer_rtx) to ensure that stack adjustment is + not deleted. */ + emit_insn (gen_force_register_use (stack_pointer_rtx)); +@@ -23772,6 +24908,8 @@ + REG_NOTES (insn) = alloc_reg_note (REG_CFA_RESTORE, + gen_rtx_REG (V2SImode, i), + NULL_RTX); ++ arm_add_cfa_adjust_cfa_note (insn, UNITS_PER_WORD, ++ stack_pointer_rtx, stack_pointer_rtx); + } + + if (saved_regs_mask) +@@ -23819,6 +24957,9 @@ + REG_NOTES (insn) = alloc_reg_note (REG_CFA_RESTORE, + gen_rtx_REG (SImode, i), + NULL_RTX); ++ arm_add_cfa_adjust_cfa_note (insn, UNITS_PER_WORD, ++ stack_pointer_rtx, ++ stack_pointer_rtx); + } + } + } +@@ -23830,6 +24971,8 @@ + { + if (TARGET_THUMB2) + thumb2_emit_ldrd_pop (saved_regs_mask); ++ else if (TARGET_ARM && !IS_INTERRUPT (func_type)) ++ arm_emit_ldrd_pop (saved_regs_mask); + else + arm_emit_multi_reg_pop (saved_regs_mask); + } +@@ -23842,10 +24985,34 @@ + } + + if (crtl->args.pretend_args_size) +- emit_insn (gen_addsi3 (stack_pointer_rtx, +- stack_pointer_rtx, +- GEN_INT (crtl->args.pretend_args_size))); ++ { ++ int i, j; ++ rtx dwarf = NULL_RTX; ++ rtx tmp = emit_insn (gen_addsi3 (stack_pointer_rtx, ++ stack_pointer_rtx, ++ GEN_INT (crtl->args.pretend_args_size))); + ++ RTX_FRAME_RELATED_P (tmp) = 1; ++ ++ if (cfun->machine->uses_anonymous_args) ++ { ++ /* Restore pretend args. Refer arm_expand_prologue on how to save ++ pretend_args in stack. */ ++ int num_regs = crtl->args.pretend_args_size / 4; ++ saved_regs_mask = (0xf0 >> num_regs) & 0xf; ++ for (j = 0, i = 0; j < num_regs; i++) ++ if (saved_regs_mask & (1 << i)) ++ { ++ rtx reg = gen_rtx_REG (SImode, i); ++ dwarf = alloc_reg_note (REG_CFA_RESTORE, reg, dwarf); ++ j++; ++ } ++ REG_NOTES (tmp) = dwarf; ++ } ++ arm_add_cfa_adjust_cfa_note (tmp, crtl->args.pretend_args_size, ++ stack_pointer_rtx, stack_pointer_rtx); ++ } ++ + if (!really_return) + return; + +@@ -24241,7 +25408,22 @@ + { + const char *fpu_name; + if (arm_selected_arch) +- asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_arch->name); ++ { ++ const char* pos = strchr (arm_selected_arch->name, '+'); ++ if (pos) ++ { ++ char buf[15]; ++ gcc_assert (strlen (arm_selected_arch->name) ++ <= sizeof (buf) / sizeof (*pos)); ++ strncpy (buf, arm_selected_arch->name, ++ (pos - arm_selected_arch->name) * sizeof (*pos)); ++ buf[pos - arm_selected_arch->name] = '\0'; ++ asm_fprintf (asm_out_file, "\t.arch %s\n", buf); ++ asm_fprintf (asm_out_file, "\t.arch_extension %s\n", pos + 1); ++ } ++ else ++ asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_arch->name); ++ } + else if (strncmp (arm_selected_cpu->name, "generic", 7) == 0) + asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_cpu->name + 8); + else +@@ -24620,163 +25802,6 @@ + *pretend_size = (NUM_ARG_REGS - nregs) * UNITS_PER_WORD; + } + +-/* Return nonzero if the CONSUMER instruction (a store) does not need +- PRODUCER's value to calculate the address. */ +- +-int +-arm_no_early_store_addr_dep (rtx producer, rtx consumer) +-{ +- rtx value = PATTERN (producer); +- rtx addr = PATTERN (consumer); +- +- if (GET_CODE (value) == COND_EXEC) +- value = COND_EXEC_CODE (value); +- if (GET_CODE (value) == PARALLEL) +- value = XVECEXP (value, 0, 0); +- value = XEXP (value, 0); +- if (GET_CODE (addr) == COND_EXEC) +- addr = COND_EXEC_CODE (addr); +- if (GET_CODE (addr) == PARALLEL) +- addr = XVECEXP (addr, 0, 0); +- addr = XEXP (addr, 0); +- +- return !reg_overlap_mentioned_p (value, addr); +-} +- +-/* Return nonzero if the CONSUMER instruction (a store) does need +- PRODUCER's value to calculate the address. */ +- +-int +-arm_early_store_addr_dep (rtx producer, rtx consumer) +-{ +- return !arm_no_early_store_addr_dep (producer, consumer); +-} +- +-/* Return nonzero if the CONSUMER instruction (a load) does need +- PRODUCER's value to calculate the address. */ +- +-int +-arm_early_load_addr_dep (rtx producer, rtx consumer) +-{ +- rtx value = PATTERN (producer); +- rtx addr = PATTERN (consumer); +- +- if (GET_CODE (value) == COND_EXEC) +- value = COND_EXEC_CODE (value); +- if (GET_CODE (value) == PARALLEL) +- value = XVECEXP (value, 0, 0); +- value = XEXP (value, 0); +- if (GET_CODE (addr) == COND_EXEC) +- addr = COND_EXEC_CODE (addr); +- if (GET_CODE (addr) == PARALLEL) +- { +- if (GET_CODE (XVECEXP (addr, 0, 0)) == RETURN) +- addr = XVECEXP (addr, 0, 1); +- else +- addr = XVECEXP (addr, 0, 0); +- } +- addr = XEXP (addr, 1); +- +- return reg_overlap_mentioned_p (value, addr); +-} +- +-/* Return nonzero if the CONSUMER instruction (an ALU op) does not +- have an early register shift value or amount dependency on the +- result of PRODUCER. */ +- +-int +-arm_no_early_alu_shift_dep (rtx producer, rtx consumer) +-{ +- rtx value = PATTERN (producer); +- rtx op = PATTERN (consumer); +- rtx early_op; +- +- if (GET_CODE (value) == COND_EXEC) +- value = COND_EXEC_CODE (value); +- if (GET_CODE (value) == PARALLEL) +- value = XVECEXP (value, 0, 0); +- value = XEXP (value, 0); +- if (GET_CODE (op) == COND_EXEC) +- op = COND_EXEC_CODE (op); +- if (GET_CODE (op) == PARALLEL) +- op = XVECEXP (op, 0, 0); +- op = XEXP (op, 1); +- +- early_op = XEXP (op, 0); +- /* This is either an actual independent shift, or a shift applied to +- the first operand of another operation. We want the whole shift +- operation. */ +- if (REG_P (early_op)) +- early_op = op; +- +- return !reg_overlap_mentioned_p (value, early_op); +-} +- +-/* Return nonzero if the CONSUMER instruction (an ALU op) does not +- have an early register shift value dependency on the result of +- PRODUCER. */ +- +-int +-arm_no_early_alu_shift_value_dep (rtx producer, rtx consumer) +-{ +- rtx value = PATTERN (producer); +- rtx op = PATTERN (consumer); +- rtx early_op; +- +- if (GET_CODE (value) == COND_EXEC) +- value = COND_EXEC_CODE (value); +- if (GET_CODE (value) == PARALLEL) +- value = XVECEXP (value, 0, 0); +- value = XEXP (value, 0); +- if (GET_CODE (op) == COND_EXEC) +- op = COND_EXEC_CODE (op); +- if (GET_CODE (op) == PARALLEL) +- op = XVECEXP (op, 0, 0); +- op = XEXP (op, 1); +- +- early_op = XEXP (op, 0); +- +- /* This is either an actual independent shift, or a shift applied to +- the first operand of another operation. We want the value being +- shifted, in either case. */ +- if (!REG_P (early_op)) +- early_op = XEXP (early_op, 0); +- +- return !reg_overlap_mentioned_p (value, early_op); +-} +- +-/* Return nonzero if the CONSUMER (a mul or mac op) does not +- have an early register mult dependency on the result of +- PRODUCER. */ +- +-int +-arm_no_early_mul_dep (rtx producer, rtx consumer) +-{ +- rtx value = PATTERN (producer); +- rtx op = PATTERN (consumer); +- +- if (GET_CODE (value) == COND_EXEC) +- value = COND_EXEC_CODE (value); +- if (GET_CODE (value) == PARALLEL) +- value = XVECEXP (value, 0, 0); +- value = XEXP (value, 0); +- if (GET_CODE (op) == COND_EXEC) +- op = COND_EXEC_CODE (op); +- if (GET_CODE (op) == PARALLEL) +- op = XVECEXP (op, 0, 0); +- op = XEXP (op, 1); +- +- if (GET_CODE (op) == PLUS || GET_CODE (op) == MINUS) +- { +- if (GET_CODE (XEXP (op, 0)) == MULT) +- return !reg_overlap_mentioned_p (value, XEXP (op, 0)); +- else +- return !reg_overlap_mentioned_p (value, XEXP (op, 1)); +- } +- +- return 0; +-} +- + /* We can't rely on the caller doing the proper promotion when + using APCS or ATPCS. */ + +@@ -24826,96 +25851,7 @@ + return TARGET_AAPCS_BASED ? integer_type_node : long_long_integer_type_node; + } + +-/* Return non-zero iff the consumer (a multiply-accumulate or a +- multiple-subtract instruction) has an accumulator dependency on the +- result of the producer and no other dependency on that result. It +- does not check if the producer is multiply-accumulate instruction. */ +-int +-arm_mac_accumulator_is_result (rtx producer, rtx consumer) +-{ +- rtx result; +- rtx op0, op1, acc; + +- producer = PATTERN (producer); +- consumer = PATTERN (consumer); +- +- if (GET_CODE (producer) == COND_EXEC) +- producer = COND_EXEC_CODE (producer); +- if (GET_CODE (consumer) == COND_EXEC) +- consumer = COND_EXEC_CODE (consumer); +- +- if (GET_CODE (producer) != SET) +- return 0; +- +- result = XEXP (producer, 0); +- +- if (GET_CODE (consumer) != SET) +- return 0; +- +- /* Check that the consumer is of the form +- (set (...) (plus (mult ...) (...))) +- or +- (set (...) (minus (...) (mult ...))). */ +- if (GET_CODE (XEXP (consumer, 1)) == PLUS) +- { +- if (GET_CODE (XEXP (XEXP (consumer, 1), 0)) != MULT) +- return 0; +- +- op0 = XEXP (XEXP (XEXP (consumer, 1), 0), 0); +- op1 = XEXP (XEXP (XEXP (consumer, 1), 0), 1); +- acc = XEXP (XEXP (consumer, 1), 1); +- } +- else if (GET_CODE (XEXP (consumer, 1)) == MINUS) +- { +- if (GET_CODE (XEXP (XEXP (consumer, 1), 1)) != MULT) +- return 0; +- +- op0 = XEXP (XEXP (XEXP (consumer, 1), 1), 0); +- op1 = XEXP (XEXP (XEXP (consumer, 1), 1), 1); +- acc = XEXP (XEXP (consumer, 1), 0); +- } +- else +- return 0; +- +- return (reg_overlap_mentioned_p (result, acc) +- && !reg_overlap_mentioned_p (result, op0) +- && !reg_overlap_mentioned_p (result, op1)); +-} +- +-/* Return non-zero if the consumer (a multiply-accumulate instruction) +- has an accumulator dependency on the result of the producer (a +- multiplication instruction) and no other dependency on that result. */ +-int +-arm_mac_accumulator_is_mul_result (rtx producer, rtx consumer) +-{ +- rtx mul = PATTERN (producer); +- rtx mac = PATTERN (consumer); +- rtx mul_result; +- rtx mac_op0, mac_op1, mac_acc; +- +- if (GET_CODE (mul) == COND_EXEC) +- mul = COND_EXEC_CODE (mul); +- if (GET_CODE (mac) == COND_EXEC) +- mac = COND_EXEC_CODE (mac); +- +- /* Check that mul is of the form (set (...) (mult ...)) +- and mla is of the form (set (...) (plus (mult ...) (...))). */ +- if ((GET_CODE (mul) != SET || GET_CODE (XEXP (mul, 1)) != MULT) +- || (GET_CODE (mac) != SET || GET_CODE (XEXP (mac, 1)) != PLUS +- || GET_CODE (XEXP (XEXP (mac, 1), 0)) != MULT)) +- return 0; +- +- mul_result = XEXP (mul, 0); +- mac_op0 = XEXP (XEXP (XEXP (mac, 1), 0), 0); +- mac_op1 = XEXP (XEXP (XEXP (mac, 1), 0), 1); +- mac_acc = XEXP (XEXP (mac, 1), 1); +- +- return (reg_overlap_mentioned_p (mul_result, mac_acc) +- && !reg_overlap_mentioned_p (mul_result, mac_op0) +- && !reg_overlap_mentioned_p (mul_result, mac_op1)); +-} +- +- + /* The EABI says test the least significant bit of a guard variable. */ + + static bool +@@ -25102,7 +26038,7 @@ + { + /* Neon also supports V2SImode, etc. listed in the clause below. */ + if (TARGET_NEON && (mode == V2SFmode || mode == V4SImode || mode == V8HImode +- || mode == V16QImode || mode == V4SFmode || mode == V2DImode)) ++ || mode == V4HFmode || mode == V16QImode || mode == V4SFmode || mode == V2DImode)) + return true; + + if ((TARGET_NEON || TARGET_IWMMXT) +@@ -25265,9 +26201,8 @@ + + nregs = GET_MODE_SIZE (GET_MODE (rtl)) / 8; + p = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (nregs)); +- regno = (regno - FIRST_VFP_REGNUM) / 2; + for (i = 0; i < nregs; i++) +- XVECEXP (p, 0, i) = gen_rtx_REG (DImode, 256 + regno + i); ++ XVECEXP (p, 0, i) = gen_rtx_REG (DImode, regno + i); + + return p; + } +@@ -25517,9 +26452,17 @@ + handled_one = true; + break; + ++ /* The INSN is generated in epilogue. It is set as RTX_FRAME_RELATED_P ++ to get correct dwarf information for shrink-wrap. We should not ++ emit unwind information for it because these are used either for ++ pretend arguments or notes to adjust sp and restore registers from ++ stack. */ + case REG_CFA_DEF_CFA: ++ case REG_CFA_ADJUST_CFA: ++ case REG_CFA_RESTORE: ++ return; ++ + case REG_CFA_EXPRESSION: +- case REG_CFA_ADJUST_CFA: + case REG_CFA_OFFSET: + /* ??? Only handling here what we actually emit. */ + gcc_unreachable (); +@@ -25917,6 +26860,7 @@ + case cortexa7: + case cortexa8: + case cortexa9: ++ case cortexa53: + case fa726te: + case marvell_pj4: + return 2; +@@ -25945,11 +26889,13 @@ + { V8QImode, "__builtin_neon_uqi", "16__simd64_uint8_t" }, + { V4HImode, "__builtin_neon_hi", "16__simd64_int16_t" }, + { V4HImode, "__builtin_neon_uhi", "17__simd64_uint16_t" }, ++ { V4HFmode, "__builtin_neon_hf", "18__simd64_float16_t" }, + { V2SImode, "__builtin_neon_si", "16__simd64_int32_t" }, + { V2SImode, "__builtin_neon_usi", "17__simd64_uint32_t" }, + { V2SFmode, "__builtin_neon_sf", "18__simd64_float32_t" }, + { V8QImode, "__builtin_neon_poly8", "16__simd64_poly8_t" }, + { V4HImode, "__builtin_neon_poly16", "17__simd64_poly16_t" }, ++ + /* 128-bit containerized types. */ + { V16QImode, "__builtin_neon_qi", "16__simd128_int8_t" }, + { V16QImode, "__builtin_neon_uqi", "17__simd128_uint8_t" }, +@@ -26043,6 +26989,60 @@ + return !TARGET_THUMB1; + } + ++tree ++arm_builtin_vectorized_function (tree fndecl, tree type_out, tree type_in) ++{ ++ enum machine_mode in_mode, out_mode; ++ int in_n, out_n; ++ ++ if (TREE_CODE (type_out) != VECTOR_TYPE ++ || TREE_CODE (type_in) != VECTOR_TYPE ++ || !(TARGET_NEON && TARGET_FPU_ARMV8 && flag_unsafe_math_optimizations)) ++ return NULL_TREE; ++ ++ out_mode = TYPE_MODE (TREE_TYPE (type_out)); ++ out_n = TYPE_VECTOR_SUBPARTS (type_out); ++ in_mode = TYPE_MODE (TREE_TYPE (type_in)); ++ in_n = TYPE_VECTOR_SUBPARTS (type_in); ++ ++/* ARM_CHECK_BUILTIN_MODE and ARM_FIND_VRINT_VARIANT are used to find the ++ decl of the vectorized builtin for the appropriate vector mode. ++ NULL_TREE is returned if no such builtin is available. */ ++#undef ARM_CHECK_BUILTIN_MODE ++#define ARM_CHECK_BUILTIN_MODE(C) \ ++ (out_mode == SFmode && out_n == C \ ++ && in_mode == SFmode && in_n == C) ++ ++#undef ARM_FIND_VRINT_VARIANT ++#define ARM_FIND_VRINT_VARIANT(N) \ ++ (ARM_CHECK_BUILTIN_MODE (2) \ ++ ? arm_builtin_decl(ARM_BUILTIN_NEON_##N##v2sf, false) \ ++ : (ARM_CHECK_BUILTIN_MODE (4) \ ++ ? arm_builtin_decl(ARM_BUILTIN_NEON_##N##v4sf, false) \ ++ : NULL_TREE)) ++ ++ if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_NORMAL) ++ { ++ enum built_in_function fn = DECL_FUNCTION_CODE (fndecl); ++ switch (fn) ++ { ++ case BUILT_IN_FLOORF: ++ return ARM_FIND_VRINT_VARIANT (vrintm); ++ case BUILT_IN_CEILF: ++ return ARM_FIND_VRINT_VARIANT (vrintp); ++ case BUILT_IN_TRUNCF: ++ return ARM_FIND_VRINT_VARIANT (vrintz); ++ case BUILT_IN_ROUNDF: ++ return ARM_FIND_VRINT_VARIANT (vrinta); ++ default: ++ return NULL_TREE; ++ } ++ } ++ return NULL_TREE; ++} ++#undef ARM_CHECK_BUILTIN_MODE ++#undef ARM_FIND_VRINT_VARIANT ++ + /* The AAPCS sets the maximum alignment of a vector to 64 bits. */ + static HOST_WIDE_INT + arm_vector_alignment (const_tree type) +@@ -26273,40 +27273,72 @@ + emit_insn (gen_memory_barrier ()); + } + +-/* Emit the load-exclusive and store-exclusive instructions. */ ++/* Emit the load-exclusive and store-exclusive instructions. ++ Use acquire and release versions if necessary. */ + + static void +-arm_emit_load_exclusive (enum machine_mode mode, rtx rval, rtx mem) ++arm_emit_load_exclusive (enum machine_mode mode, rtx rval, rtx mem, bool acq) + { + rtx (*gen) (rtx, rtx); + +- switch (mode) ++ if (acq) + { +- case QImode: gen = gen_arm_load_exclusiveqi; break; +- case HImode: gen = gen_arm_load_exclusivehi; break; +- case SImode: gen = gen_arm_load_exclusivesi; break; +- case DImode: gen = gen_arm_load_exclusivedi; break; +- default: +- gcc_unreachable (); ++ switch (mode) ++ { ++ case QImode: gen = gen_arm_load_acquire_exclusiveqi; break; ++ case HImode: gen = gen_arm_load_acquire_exclusivehi; break; ++ case SImode: gen = gen_arm_load_acquire_exclusivesi; break; ++ case DImode: gen = gen_arm_load_acquire_exclusivedi; break; ++ default: ++ gcc_unreachable (); ++ } + } ++ else ++ { ++ switch (mode) ++ { ++ case QImode: gen = gen_arm_load_exclusiveqi; break; ++ case HImode: gen = gen_arm_load_exclusivehi; break; ++ case SImode: gen = gen_arm_load_exclusivesi; break; ++ case DImode: gen = gen_arm_load_exclusivedi; break; ++ default: ++ gcc_unreachable (); ++ } ++ } + + emit_insn (gen (rval, mem)); + } + + static void +-arm_emit_store_exclusive (enum machine_mode mode, rtx bval, rtx rval, rtx mem) ++arm_emit_store_exclusive (enum machine_mode mode, rtx bval, rtx rval, ++ rtx mem, bool rel) + { + rtx (*gen) (rtx, rtx, rtx); + +- switch (mode) ++ if (rel) + { +- case QImode: gen = gen_arm_store_exclusiveqi; break; +- case HImode: gen = gen_arm_store_exclusivehi; break; +- case SImode: gen = gen_arm_store_exclusivesi; break; +- case DImode: gen = gen_arm_store_exclusivedi; break; +- default: +- gcc_unreachable (); ++ switch (mode) ++ { ++ case QImode: gen = gen_arm_store_release_exclusiveqi; break; ++ case HImode: gen = gen_arm_store_release_exclusivehi; break; ++ case SImode: gen = gen_arm_store_release_exclusivesi; break; ++ case DImode: gen = gen_arm_store_release_exclusivedi; break; ++ default: ++ gcc_unreachable (); ++ } + } ++ else ++ { ++ switch (mode) ++ { ++ case QImode: gen = gen_arm_store_exclusiveqi; break; ++ case HImode: gen = gen_arm_store_exclusivehi; break; ++ case SImode: gen = gen_arm_store_exclusivesi; break; ++ case DImode: gen = gen_arm_store_exclusivedi; break; ++ default: ++ gcc_unreachable (); ++ } ++ } + + emit_insn (gen (bval, rval, mem)); + } +@@ -26341,6 +27373,15 @@ + mod_f = operands[7]; + mode = GET_MODE (mem); + ++ /* Normally the succ memory model must be stronger than fail, but in the ++ unlikely event of fail being ACQUIRE and succ being RELEASE we need to ++ promote succ to ACQ_REL so that we don't lose the acquire semantics. */ ++ ++ if (TARGET_HAVE_LDACQ ++ && INTVAL (mod_f) == MEMMODEL_ACQUIRE ++ && INTVAL (mod_s) == MEMMODEL_RELEASE) ++ mod_s = GEN_INT (MEMMODEL_ACQ_REL); ++ + switch (mode) + { + case QImode: +@@ -26415,8 +27456,20 @@ + scratch = operands[7]; + mode = GET_MODE (mem); + +- arm_pre_atomic_barrier (mod_s); ++ bool use_acquire = TARGET_HAVE_LDACQ ++ && !(mod_s == MEMMODEL_RELAXED ++ || mod_s == MEMMODEL_CONSUME ++ || mod_s == MEMMODEL_RELEASE); + ++ bool use_release = TARGET_HAVE_LDACQ ++ && !(mod_s == MEMMODEL_RELAXED ++ || mod_s == MEMMODEL_CONSUME ++ || mod_s == MEMMODEL_ACQUIRE); ++ ++ /* Checks whether a barrier is needed and emits one accordingly. */ ++ if (!(use_acquire || use_release)) ++ arm_pre_atomic_barrier (mod_s); ++ + label1 = NULL_RTX; + if (!is_weak) + { +@@ -26425,7 +27478,7 @@ + } + label2 = gen_label_rtx (); + +- arm_emit_load_exclusive (mode, rval, mem); ++ arm_emit_load_exclusive (mode, rval, mem, use_acquire); + + cond = arm_gen_compare_reg (NE, rval, oldval, scratch); + x = gen_rtx_NE (VOIDmode, cond, const0_rtx); +@@ -26433,7 +27486,7 @@ + gen_rtx_LABEL_REF (Pmode, label2), pc_rtx); + emit_unlikely_jump (gen_rtx_SET (VOIDmode, pc_rtx, x)); + +- arm_emit_store_exclusive (mode, scratch, mem, newval); ++ arm_emit_store_exclusive (mode, scratch, mem, newval, use_release); + + /* Weak or strong, we want EQ to be true for success, so that we + match the flags that we got from the compare above. */ +@@ -26452,7 +27505,9 @@ + if (mod_f != MEMMODEL_RELAXED) + emit_label (label2); + +- arm_post_atomic_barrier (mod_s); ++ /* Checks whether a barrier is needed and emits one accordingly. */ ++ if (!(use_acquire || use_release)) ++ arm_post_atomic_barrier (mod_s); + + if (mod_f == MEMMODEL_RELAXED) + emit_label (label2); +@@ -26467,8 +27522,20 @@ + enum machine_mode wmode = (mode == DImode ? DImode : SImode); + rtx label, x; + +- arm_pre_atomic_barrier (model); ++ bool use_acquire = TARGET_HAVE_LDACQ ++ && !(model == MEMMODEL_RELAXED ++ || model == MEMMODEL_CONSUME ++ || model == MEMMODEL_RELEASE); + ++ bool use_release = TARGET_HAVE_LDACQ ++ && !(model == MEMMODEL_RELAXED ++ || model == MEMMODEL_CONSUME ++ || model == MEMMODEL_ACQUIRE); ++ ++ /* Checks whether a barrier is needed and emits one accordingly. */ ++ if (!(use_acquire || use_release)) ++ arm_pre_atomic_barrier (model); ++ + label = gen_label_rtx (); + emit_label (label); + +@@ -26480,7 +27547,7 @@ + old_out = new_out; + value = simplify_gen_subreg (wmode, value, mode, 0); + +- arm_emit_load_exclusive (mode, old_out, mem); ++ arm_emit_load_exclusive (mode, old_out, mem, use_acquire); + + switch (code) + { +@@ -26528,12 +27595,15 @@ + break; + } + +- arm_emit_store_exclusive (mode, cond, mem, gen_lowpart (mode, new_out)); ++ arm_emit_store_exclusive (mode, cond, mem, gen_lowpart (mode, new_out), ++ use_release); + + x = gen_rtx_NE (VOIDmode, cond, const0_rtx); + emit_unlikely_jump (gen_cbranchsi4 (x, cond, const0_rtx, label)); + +- arm_post_atomic_barrier (model); ++ /* Checks whether a barrier is needed and emits one accordingly. */ ++ if (!(use_acquire || use_release)) ++ arm_post_atomic_barrier (model); + } + + #define MAX_VECT_LEN 16 +@@ -27473,6 +28543,14 @@ + + } + ++/* Implement the TARGET_ASAN_SHADOW_OFFSET hook. */ ++ ++static unsigned HOST_WIDE_INT ++arm_asan_shadow_offset (void) ++{ ++ return (unsigned HOST_WIDE_INT) 1 << 29; ++} ++ + /* return TRUE if x is a reference to a value in a constant pool */ + extern bool + arm_is_constant_pool_ref (rtx x) +--- a/src/gcc/config/arm/t-aprofile ++++ b/src/gcc/config/arm/t-aprofile +@@ -0,0 +1,177 @@ ++# Copyright (C) 2012-2013 Free Software Foundation, Inc. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . ++ ++# This is a target makefile fragment that attempts to get ++# multilibs built for the range of CPU's, FPU's and ABI's that ++# are relevant for the A-profile architecture. It should ++# not be used in conjunction with another make file fragment and ++# assumes --with-arch, --with-cpu, --with-fpu, --with-float, --with-mode ++# have their default values during the configure step. We enforce ++# this during the top-level configury. ++ ++MULTILIB_OPTIONS = ++MULTILIB_DIRNAMES = ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = ++MULTILIB_REUSE = ++ ++# We have the following hierachy: ++# ISA: A32 (.) or T32 (thumb) ++# Architecture: ARMv7-A (v7-a), ARMv7VE (v7ve), or ARMv8-A (v8-a). ++# FPU: VFPv3-D16 (fpv3), NEONv1 (simdv1), VFPv4-D16 (fpv4), ++# NEON-VFPV4 (simdvfpv4), NEON for ARMv8 (simdv8), or None (.). ++# Float-abi: Soft (.), softfp (softfp), or hard (hardfp). ++ ++# We use the option -mcpu=cortex-a7 because we do not yet have march=armv7ve ++# or march=armv7a+virt as a command line option for the compiler. ++MULTILIB_OPTIONS += mthumb ++MULTILIB_DIRNAMES += thumb ++ ++MULTILIB_OPTIONS += march=armv7-a/mcpu=cortex-a7/march=armv8-a ++MULTILIB_DIRNAMES += v7-a v7ve v8-a ++ ++MULTILIB_OPTIONS += mfpu=vfpv3-d16/mfpu=neon/mfpu=vfpv4-d16/mfpu=neon-vfpv4/mfpu=neon-fp-armv8 ++MULTILIB_DIRNAMES += fpv3 simdv1 fpv4 simdvfpv4 simdv8 ++ ++MULTILIB_OPTIONS += mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES += softfp hard ++ ++# We don't build no-float libraries with an FPU. ++MULTILIB_EXCEPTIONS += *mfpu=vfpv3-d16 ++MULTILIB_EXCEPTIONS += *mfpu=neon ++MULTILIB_EXCEPTIONS += *mfpu=vfpv4-d16 ++MULTILIB_EXCEPTIONS += *mfpu=neon-vfpv4 ++MULTILIB_EXCEPTIONS += *mfpu=neon-fp-armv8 ++ ++# We don't build libraries requiring an FPU at the CPU/Arch/ISA level. ++MULTILIB_EXCEPTIONS += mfloat-abi=* ++MULTILIB_EXCEPTIONS += mfpu=* ++MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=* ++MULTILIB_EXCEPTIONS += mthumb/mfpu=* ++MULTILIB_EXCEPTIONS += *march=armv7-a/mfloat-abi=* ++MULTILIB_EXCEPTIONS += *mcpu=cortex-a7/mfloat-abi=* ++MULTILIB_EXCEPTIONS += *march=armv8-a/mfloat-abi=* ++ ++# Ensure the correct FPU variants apply to the correct base architectures. ++MULTILIB_EXCEPTIONS += *mcpu=cortex-a7/*mfpu=vfpv3-d16* ++MULTILIB_EXCEPTIONS += *mcpu=cortex-a7/*mfpu=neon/* ++MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=vfpv3-d16* ++MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=neon/* ++MULTILIB_EXCEPTIONS += *march=armv7-a/*mfpu=vfpv4-d16* ++MULTILIB_EXCEPTIONS += *march=armv7-a/*mfpu=neon-vfpv4* ++MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=vfpv4-d16* ++MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=neon-vfpv4* ++MULTILIB_EXCEPTIONS += *march=armv7-a/*mfpu=neon-fp-armv8* ++MULTILIB_EXCEPTIONS += *mcpu=cortex-a7/*mfpu=neon-fp-armv8* ++ ++# CPU Matches ++MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a8 ++MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a9 ++MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a5 ++MULTILIB_MATCHES += mcpu?cortex-a7=mcpu?cortex-a15 ++MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a53 ++ ++# FPU matches ++MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3 ++MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-fp16 ++MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-fp16-d16 ++MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?vfpv4 ++MULTILIB_MATCHES += mfpu?neon-fp-armv8=mfpu?crypto-neon-fp-armv8 ++ ++ ++# Map all requests for vfpv3 with a later CPU to vfpv3-d16 v7-a. ++# So if new CPUs are added above at the newer architecture levels, ++# do something to map them below here. ++# We take the approach of mapping down to v7-a regardless of what ++# the fp option is if the integer architecture brings things down. ++# This applies to any similar combination at the v7ve and v8-a arch ++# levels. ++ ++MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mcpu.cortex-a7/mfpu.vfpv3-d16/mfloat-abi.hard ++MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mcpu.cortex-a7/mfpu.vfpv3-d16/mfloat-abi.softfp ++MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.hard ++MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.softfp ++MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.hard ++MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.softfp ++MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7-a/mfpu.fp-armv8/mfloat-abi.hard ++MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7-a/mfpu.fp-armv8/mfloat-abi.softfp ++MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7-a/mfpu.vfpv4/mfloat-abi.hard ++MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7-a/mfpu.vfpv4/mfloat-abi.softfp ++ ++ ++MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=mcpu.cortex-a7/mfpu.neon/mfloat-abi.hard ++MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=mcpu.cortex-a7/mfpu.neon/mfloat-abi.softfp ++MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv8-a/mfpu.neon/mfloat-abi.hard ++MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv8-a/mfpu.neon/mfloat-abi.softfp ++MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.hard ++MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.softfp ++MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.hard ++MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.softfp ++ ++ ++MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=mcpu.cortex-a7/mfpu.fp-armv8/mfloat-abi.hard ++MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=mcpu.cortex-a7/mfpu.fp-armv8/mfloat-abi.softfp ++MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv4/mfloat-abi.hard ++MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv4/mfloat-abi.softfp ++MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard ++MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp ++ ++ ++MULTILIB_REUSE += mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.hard=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard ++MULTILIB_REUSE += mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.softfp=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp ++MULTILIB_REUSE += mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.hard=mcpu.cortex-a7/mfpu.neon-fp-armv8/mfloat-abi.hard ++MULTILIB_REUSE += mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.softfp=mcpu.cortex-a7/mfpu.neon-fp-armv8/mfloat-abi.softfp ++ ++ ++ ++# And again for mthumb. ++ ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/mcpu.cortex-a7/mfpu.vfpv3-d16/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/mcpu.cortex-a7/mfpu.vfpv3-d16/mfloat-abi.softfp ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.softfp ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.softfp ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.fp-armv8/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.fp-armv8/mfloat-abi.softfp ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.vfpv4/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.vfpv4/mfloat-abi.softfp ++ ++ ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/mcpu.cortex-a7/mfpu.neon/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/mcpu.cortex-a7/mfpu.neon/mfloat-abi.softfp ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon/mfloat-abi.softfp ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.softfp ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.softfp ++ ++ ++MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/mcpu.cortex-a7/mfpu.fp-armv8/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/mcpu.cortex-a7/mfpu.fp-armv8/mfloat-abi.softfp ++MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv4/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv4/mfloat-abi.softfp ++MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp ++ ++ ++MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp ++MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/mcpu.cortex-a7/mfpu.neon-fp-armv8/mfloat-abi.hard ++MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/mcpu.cortex-a7/mfpu.neon-fp-armv8/mfloat-abi.softfp +--- a/src/gcc/config/arm/arm.h ++++ b/src/gcc/config/arm/arm.h +@@ -49,8 +49,14 @@ + builtin_define ("__ARM_FEATURE_QBIT"); \ + if (TARGET_ARM_SAT) \ + builtin_define ("__ARM_FEATURE_SAT"); \ ++ if (TARGET_CRYPTO) \ ++ builtin_define ("__ARM_FEATURE_CRYPTO"); \ + if (unaligned_access) \ + builtin_define ("__ARM_FEATURE_UNALIGNED"); \ ++ if (TARGET_CRC32) \ ++ builtin_define ("__ARM_FEATURE_CRC32"); \ ++ if (TARGET_32BIT) \ ++ builtin_define ("__ARM_32BIT_STATE"); \ + if (TARGET_ARM_FEATURE_LDREX) \ + builtin_define_with_int_value ( \ + "__ARM_FEATURE_LDREX", TARGET_ARM_FEATURE_LDREX); \ +@@ -183,6 +189,11 @@ + + #define ARM_INVERSE_CONDITION_CODE(X) ((arm_cc) (((int)X) ^ 1)) + ++/* The maximaum number of instructions that is beneficial to ++ conditionally execute. */ ++#undef MAX_CONDITIONAL_EXECUTE ++#define MAX_CONDITIONAL_EXECUTE arm_max_conditional_execute () ++ + extern int arm_target_label; + extern int arm_ccfsm_state; + extern GTY(()) rtx arm_target_insn; +@@ -269,6 +280,8 @@ + #define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN \ + && !TARGET_THUMB1) + ++#define TARGET_CRC32 (arm_arch_crc) ++ + /* The following two macros concern the ability to execute coprocessor + instructions for VFPv3 or NEON. TARGET_VFP3/TARGET_VFPD32 are currently + only ever tested when we know we are generating for VFP hardware; we need +@@ -350,10 +363,16 @@ + #define TARGET_HAVE_LDREXD (((arm_arch6k && TARGET_ARM) || arm_arch7) \ + && arm_arch_notm) + ++/* Nonzero if this chip supports load-acquire and store-release. */ ++#define TARGET_HAVE_LDACQ (TARGET_ARM_ARCH >= 8) ++ + /* Nonzero if integer division instructions supported. */ + #define TARGET_IDIV ((TARGET_ARM && arm_arch_arm_hwdiv) \ + || (TARGET_THUMB2 && arm_arch_thumb_hwdiv)) + ++/* Should NEON be used for 64-bits bitops. */ ++#define TARGET_PREFER_NEON_64BITS (prefer_neon_for_64bits) ++ + /* True iff the full BPABI is being used. If TARGET_BPABI is true, + then TARGET_AAPCS_BASED must be true -- but the converse does not + hold. TARGET_BPABI implies the use of the BPABI runtime library, +@@ -539,6 +558,13 @@ + /* Nonzero if chip supports integer division instruction in Thumb mode. */ + extern int arm_arch_thumb_hwdiv; + ++/* Nonzero if we should use Neon to handle 64-bits operations rather ++ than core registers. */ ++extern int prefer_neon_for_64bits; ++ ++/* Nonzero if chip supports the ARMv8 CRC instructions. */ ++extern int arm_arch_crc; ++ + #ifndef TARGET_DEFAULT + #define TARGET_DEFAULT (MASK_APCS_FRAME) + #endif +@@ -630,6 +656,8 @@ + + #define BIGGEST_ALIGNMENT (ARM_DOUBLEWORD_ALIGN ? DOUBLEWORD_ALIGNMENT : 32) + ++#define MALLOC_ABI_ALIGNMENT BIGGEST_ALIGNMENT ++ + /* XXX Blah -- this macro is used directly by libobjc. Since it + supports no vector modes, cut out the complexity and fall back + on BIGGEST_FIELD_ALIGNMENT. */ +@@ -1040,7 +1068,7 @@ + /* Modes valid for Neon D registers. */ + #define VALID_NEON_DREG_MODE(MODE) \ + ((MODE) == V2SImode || (MODE) == V4HImode || (MODE) == V8QImode \ +- || (MODE) == V2SFmode || (MODE) == DImode) ++ || (MODE) == V4HFmode || (MODE) == V2SFmode || (MODE) == DImode) + + /* Modes valid for Neon Q registers. */ + #define VALID_NEON_QREG_MODE(MODE) \ +@@ -1130,6 +1158,7 @@ + STACK_REG, + BASE_REGS, + HI_REGS, ++ CALLER_SAVE_REGS, + GENERAL_REGS, + CORE_REGS, + VFP_D0_D7_REGS, +@@ -1156,6 +1185,7 @@ + "STACK_REG", \ + "BASE_REGS", \ + "HI_REGS", \ ++ "CALLER_SAVE_REGS", \ + "GENERAL_REGS", \ + "CORE_REGS", \ + "VFP_D0_D7_REGS", \ +@@ -1181,6 +1211,7 @@ + { 0x00002000, 0x00000000, 0x00000000, 0x00000000 }, /* STACK_REG */ \ + { 0x000020FF, 0x00000000, 0x00000000, 0x00000000 }, /* BASE_REGS */ \ + { 0x00005F00, 0x00000000, 0x00000000, 0x00000000 }, /* HI_REGS */ \ ++ { 0x0000100F, 0x00000000, 0x00000000, 0x00000000 }, /* CALLER_SAVE_REGS */ \ + { 0x00005FFF, 0x00000000, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \ + { 0x00007FFF, 0x00000000, 0x00000000, 0x00000000 }, /* CORE_REGS */ \ + { 0xFFFF0000, 0x00000000, 0x00000000, 0x00000000 }, /* VFP_D0_D7_REGS */ \ +@@ -1643,7 +1674,7 @@ + frame. */ + #define EXIT_IGNORE_STACK 1 + +-#define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNUM) ++#define EPILOGUE_USES(REGNO) (epilogue_completed && (REGNO) == LR_REGNUM) + + /* Determine if the epilogue should be output as RTL. + You should override this if you define FUNCTION_EXTRA_EPILOGUE. */ +--- a/src/gcc/config/arm/cortex-a8-neon.md ++++ b/src/gcc/config/arm/cortex-a8-neon.md +@@ -18,6 +18,221 @@ + ;; along with GCC; see the file COPYING3. If not see + ;; . + ++(define_attr "cortex_a8_neon_type" ++ "neon_int_1,neon_int_2,neon_int_3,neon_int_4,neon_int_5,neon_vqneg_vqabs, ++ neon_bit_ops_q, ++ neon_vaba,neon_vaba_qqq, neon_vmov, ++ neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,neon_mul_qqq_8_16_32_ddd_32, ++ neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar, ++ neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,neon_mla_qqq_8_16, ++ neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long, ++ neon_mla_qqq_32_qqd_32_scalar,neon_mul_ddd_16_scalar_32_16_long_scalar, ++ neon_mul_qqd_32_scalar,neon_mla_ddd_16_scalar_qdd_32_16_long_scalar, ++ neon_shift_1,neon_shift_2,neon_shift_3, ++ neon_vqshl_vrshl_vqrshl_qqq,neon_vsra_vrsra,neon_fp_vadd_ddd_vabs_dd, ++ neon_fp_vadd_qqq_vabs_qq,neon_fp_vsum,neon_fp_vmul_ddd,neon_fp_vmul_qqd, ++ neon_fp_vmla_ddd,neon_fp_vmla_qqq,neon_fp_vmla_ddd_scalar, ++ neon_fp_vmla_qqq_scalar,neon_fp_vrecps_vrsqrts_ddd, ++ neon_fp_vrecps_vrsqrts_qqq,neon_bp_simple,neon_bp_2cycle,neon_bp_3cycle, ++ neon_ldr,neon_str,neon_vld1_1_2_regs,neon_vld1_3_4_regs, ++ neon_vld2_2_regs_vld1_vld2_all_lanes,neon_vld2_4_regs,neon_vld3_vld4, ++ neon_vst1_1_2_regs_vst2_2_regs,neon_vst1_3_4_regs, ++ neon_vst2_4_regs_vst3_vst4,neon_vld1_vld2_lane, ++ neon_vld3_vld4_lane,neon_vst1_vst2_lane,neon_vst3_vst4_lane, ++ neon_vld3_vld4_all_lanes,neon_mcr,neon_mcr_2_mcrr,neon_mrc,neon_mrrc, ++ neon_ldm_2,neon_stm_2,none,unknown" ++ (cond [ ++ (eq_attr "type" "neon_logic, neon_logic_q,\ ++ neon_bsl, neon_cls, neon_cnt,\ ++ neon_add, neon_add_q") ++ (const_string "neon_int_1") ++ (eq_attr "type" "neon_add_widen, neon_sub_widen,\ ++ neon_sub, neon_sub_q") ++ (const_string "neon_int_2") ++ (eq_attr "type" "neon_neg, neon_neg_q,\ ++ neon_reduc_add, neon_reduc_add_q,\ ++ neon_reduc_add_long,\ ++ neon_add_long, neon_sub_long") ++ (const_string "neon_int_3") ++ (eq_attr "type" "neon_abs, neon_abs_q, ++ neon_compare_zero, neon_compare_zero_q,\ ++ neon_add_halve_narrow_q,\ ++ neon_sub_halve_narrow_q,\ ++ neon_add_halve, neon_add_halve_q,\ ++ neon_qadd, neon_qadd_q,\ ++ neon_tst, neon_tst_q") ++ (const_string "neon_int_4") ++ (eq_attr "type" "neon_abd_long, neon_sub_halve, neon_sub_halve_q,\ ++ neon_qsub, neon_qsub_q,\ ++ neon_abd, neon_abd_q,\ ++ neon_compare, neon_compare_q,\ ++ neon_minmax, neon_minmax_q, neon_reduc_minmax,\ ++ neon_reduc_minmax_q") ++ (const_string "neon_int_5") ++ (eq_attr "type" "neon_qneg, neon_qneg_q, neon_qabs, neon_qabs_q") ++ (const_string "neon_vqneg_vqabs") ++ (eq_attr "type" "neon_move, neon_move_q") ++ (const_string "neon_vmov") ++ (eq_attr "type" "neon_bsl_q, neon_cls_q, neon_cnt_q") ++ (const_string "neon_bit_ops_q") ++ (eq_attr "type" "neon_arith_acc, neon_reduc_add_acc") ++ (const_string "neon_vaba") ++ (eq_attr "type" "neon_arith_acc_q") ++ (const_string "neon_vaba_qqq") ++ (eq_attr "type" "neon_shift_imm, neon_shift_imm_q,\ ++ neon_shift_imm_long, neon_shift_imm_narrow_q,\ ++ neon_shift_reg") ++ (const_string "neon_shift_1") ++ (eq_attr "type" "neon_sat_shift_imm, neon_sat_shift_imm_q, ++ neon_sat_shift_imm_narrow_q,\ ++ neon_sat_shift_reg") ++ (const_string "neon_shift_2") ++ (eq_attr "type" "neon_shift_reg_q") ++ (const_string "neon_shift_3") ++ (eq_attr "type" "neon_sat_shift_reg_q") ++ (const_string "neon_vqshl_vrshl_vqrshl_qqq") ++ (eq_attr "type" "neon_shift_acc, neon_shift_acc_q") ++ (const_string "neon_vsra_vrsra") ++ (eq_attr "type" "neon_mul_b, neon_mul_h,\ ++ neon_mul_b_long, neon_mul_h_long,\ ++ neon_sat_mul_b, neon_sat_mul_h,\ ++ neon_sat_mul_b_long, neon_sat_mul_h_long") ++ (const_string ++ "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") ++ (eq_attr "type" "neon_mul_b_q, neon_mul_h_q,\ ++ neon_sat_mul_b_q, neon_sat_mul_h_q") ++ (const_string "neon_mul_qqq_8_16_32_ddd_32") ++ (eq_attr "type" "neon_mul_s, neon_mul_s_long,\ ++ neon_sat_mul_s, neon_sat_mul_s_long,\ ++ neon_mul_h_scalar_q, neon_sat_mul_h_scalar_q,\ ++ neon_mul_s_scalar, neon_sat_mul_s_scalar,\ ++ neon_mul_s_scalar_long,\ ++ neon_sat_mul_s_scalar_long") ++ (const_string ++ "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar") ++ (eq_attr "type" "neon_mla_b, neon_mla_h,\ ++ neon_mla_b_long, neon_mla_h_long,\ ++ neon_sat_mla_b_long, neon_sat_mla_h_long,\ ++ neon_sat_mla_h_scalar_long") ++ (const_string ++ "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") ++ (eq_attr "type" "neon_mla_b_q, neon_mla_h_q") ++ (const_string "neon_mla_qqq_8_16") ++ (eq_attr "type" "neon_mla_s, neon_mla_s_long,\ ++ neon_sat_mla_s_long,\ ++ neon_mla_h_scalar_q, neon_mla_s_scalar,\ ++ neon_mla_s_scalar_long,\ ++ neon_sat_mla_s_scalar_long") ++ (const_string ++ "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long") ++ (eq_attr "type" "neon_mla_s_q, neon_mla_s_scalar_q") ++ (const_string "neon_mla_qqq_32_qqd_32_scalar") ++ (eq_attr "type" "neon_mul_h_scalar, neon_sat_mul_h_scalar,\ ++ neon_mul_h_scalar_long,\ ++ neon_sat_mul_h_scalar_long") ++ (const_string ++ "neon_mul_ddd_16_scalar_32_16_long_scalar") ++ (eq_attr "type" "neon_mul_s_q, neon_sat_mul_s_q,\ ++ neon_mul_s_scalar_q") ++ (const_string "neon_mul_qqd_32_scalar") ++ (eq_attr "type" "neon_mla_h_scalar, neon_mla_h_scalar_long") ++ (const_string ++ "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar") ++ (eq_attr "type" "neon_fp_abd_s, neon_fp_abs_s, neon_fp_neg_s,\ ++ neon_fp_addsub_s, neon_fp_compare_s,\ ++ neon_fp_minmax_s, neon_fp_mul_s,\ ++ neon_fp_recpe_s, neon_fp_rsqrte_s,\ ++ neon_fp_to_int_s, neon_int_to_fp_s") ++ (const_string "neon_fp_vadd_ddd_vabs_dd") ++ (eq_attr "type" "neon_fp_abd_s_q, neon_fp_abs_s_q,\ ++ neon_fp_neg_s_q,\ ++ neon_fp_addsub_s_q, neon_fp_compare_s_q,\ ++ neon_fp_minmax_s_q, neon_fp_mul_s_q,\ ++ neon_fp_recpe_s_q, neon_fp_rsqrte_s_q,\ ++ neon_fp_to_int_s_q, neon_int_to_fp_s_q") ++ (const_string "neon_fp_vadd_qqq_vabs_qq") ++ (eq_attr "type" "neon_fp_reduc_add_s, neon_fp_reduc_minmax_s,\ ++ neon_fp_reduc_add_s_q, neon_fp_reduc_minmax_s_q") ++ (const_string "neon_fp_vsum") ++ (eq_attr "type" "neon_fp_mul_s_scalar") ++ (const_string "neon_fp_vmul_ddd") ++ (eq_attr "type" "neon_fp_mul_s_scalar_q") ++ (const_string "neon_fp_vmul_qqd") ++ (eq_attr "type" "neon_fp_mla_s") ++ (const_string "neon_fp_vmla_ddd") ++ (eq_attr "type" "neon_fp_mla_s_q") ++ (const_string "neon_fp_vmla_qqq") ++ (eq_attr "type" "neon_fp_mla_s_scalar") ++ (const_string "neon_fp_vmla_ddd_scalar") ++ (eq_attr "type" "neon_fp_mla_s_scalar_q") ++ (const_string "neon_fp_vmla_qqq_scalar") ++ (eq_attr "type" "neon_fp_recps_s, neon_fp_rsqrts_s") ++ (const_string "neon_fp_vrecps_vrsqrts_ddd") ++ (eq_attr "type" "neon_fp_recps_s_q, neon_fp_rsqrts_s_q") ++ (const_string "neon_fp_vrecps_vrsqrts_qqq") ++ (eq_attr "type" "neon_move_narrow_q, neon_dup,\ ++ neon_dup_q, neon_permute, neon_zip,\ ++ neon_ext, neon_rev, neon_rev_q") ++ (const_string "neon_bp_simple") ++ (eq_attr "type" "neon_permute_q, neon_ext_q, neon_tbl1, neon_tbl2") ++ (const_string "neon_bp_2cycle") ++ (eq_attr "type" "neon_zip_q, neon_tbl3, neon_tbl4") ++ (const_string "neon_bp_3cycle") ++ (eq_attr "type" "neon_ldr") ++ (const_string "neon_ldr") ++ (eq_attr "type" "neon_str") ++ (const_string "neon_str") ++ (eq_attr "type" "neon_load1_1reg, neon_load1_1reg_q,\ ++ neon_load1_2reg, neon_load1_2reg_q,\ ++ neon_load2_2reg, neon_load2_2reg_q") ++ (const_string "neon_vld1_1_2_regs") ++ (eq_attr "type" "neon_load1_3reg, neon_load1_3reg_q,\ ++ neon_load1_4reg, neon_load1_4reg_q") ++ (const_string "neon_vld1_3_4_regs") ++ (eq_attr "type" "neon_load1_all_lanes, neon_load1_all_lanes_q,\ ++ neon_load2_all_lanes, neon_load2_all_lanes_q") ++ (const_string ++ "neon_vld2_2_regs_vld1_vld2_all_lanes") ++ (eq_attr "type" "neon_load3_all_lanes, neon_load3_all_lanes_q,\ ++ neon_load4_all_lanes, neon_load4_all_lanes_q,\ ++ neon_load2_4reg, neon_load2_4reg_q") ++ (const_string "neon_vld2_4_regs") ++ (eq_attr "type" "neon_load3_3reg, neon_load3_3reg_q,\ ++ neon_load4_4reg, neon_load4_4reg_q") ++ (const_string "neon_vld3_vld4") ++ (eq_attr "type" "f_loads, f_loadd, f_stores, f_stored,\ ++ neon_load1_one_lane, neon_load1_one_lane_q,\ ++ neon_load2_one_lane, neon_load2_one_lane_q") ++ (const_string "neon_vld1_vld2_lane") ++ (eq_attr "type" "neon_load3_one_lane, neon_load3_one_lane_q,\ ++ neon_load4_one_lane, neon_load4_one_lane_q") ++ (const_string "neon_vld3_vld4_lane") ++ (eq_attr "type" "neon_store1_1reg, neon_store1_1reg_q,\ ++ neon_store1_2reg, neon_store1_2reg_q,\ ++ neon_store2_2reg, neon_store2_2reg_q") ++ (const_string "neon_vst1_1_2_regs_vst2_2_regs") ++ (eq_attr "type" "neon_store1_3reg, neon_store1_3reg_q,\ ++ neon_store1_4reg, neon_store1_4reg_q") ++ (const_string "neon_vst1_3_4_regs") ++ (eq_attr "type" "neon_store2_4reg, neon_store2_4reg_q,\ ++ neon_store3_3reg, neon_store3_3reg_q,\ ++ neon_store4_4reg, neon_store4_4reg_q") ++ (const_string "neon_vst2_4_regs_vst3_vst4") ++ (eq_attr "type" "neon_store1_one_lane, neon_store1_one_lane_q,\ ++ neon_store2_one_lane, neon_store2_one_lane_q") ++ (const_string "neon_vst1_vst2_lane") ++ (eq_attr "type" "neon_store3_one_lane, neon_store3_one_lane_q,\ ++ neon_store4_one_lane, neon_store4_one_lane_q") ++ (const_string "neon_vst3_vst4_lane") ++ (eq_attr "type" "neon_from_gp, f_mcr") ++ (const_string "neon_mcr") ++ (eq_attr "type" "neon_from_gp_q, f_mcrr") ++ (const_string "neon_mcr_2_mcrr") ++ (eq_attr "type" "neon_to_gp, f_mrc") ++ (const_string "neon_mrc") ++ (eq_attr "type" "neon_to_gp_q, f_mrrc") ++ (const_string "neon_mrrc")] ++ (const_string "unknown"))) + + (define_automaton "cortex_a8_neon") + +@@ -159,12 +374,12 @@ + + (define_insn_reservation "cortex_a8_vfp_divs" 37 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "type" "fdivs")) ++ (eq_attr "type" "fdivs, fsqrts")) + "cortex_a8_vfp,cortex_a8_vfplite*36") + + (define_insn_reservation "cortex_a8_vfp_divd" 65 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "type" "fdivd")) ++ (eq_attr "type" "fdivd, fsqrtd")) + "cortex_a8_vfp,cortex_a8_vfplite*64") + + ;; Comparisons can actually take 7 cycles sometimes instead of four, +@@ -172,12 +387,12 @@ + ;; take four cycles, we pick that latency. + (define_insn_reservation "cortex_a8_vfp_farith" 4 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "type" "fcpys,ffariths,ffarithd,fconsts,fconstd,fcmps,fcmpd")) ++ (eq_attr "type" "fmov,ffariths,ffarithd,fconsts,fconstd,fcmps,fcmpd")) + "cortex_a8_vfp,cortex_a8_vfplite*3") + + (define_insn_reservation "cortex_a8_vfp_cvt" 7 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "type" "f_cvt")) ++ (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f")) + "cortex_a8_vfp,cortex_a8_vfplite*6") + + ;; NEON -> core transfers. +@@ -184,21 +399,21 @@ + + (define_insn_reservation "cortex_a8_neon_mrc" 20 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mrc")) ++ (eq_attr "cortex_a8_neon_type" "neon_mrc")) + "cortex_a8_neon_ls") + + (define_insn_reservation "cortex_a8_neon_mrrc" 21 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mrrc")) ++ (eq_attr "cortex_a8_neon_type" "neon_mrrc")) + "cortex_a8_neon_ls_2") + +-;; The remainder of this file is auto-generated by neon-schedgen. ++;; Arithmetic Operations + + ;; Instructions using this reservation read their source operands at N2, and + ;; produce a result at N3. + (define_insn_reservation "cortex_a8_neon_int_1" 3 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_int_1")) ++ (eq_attr "cortex_a8_neon_type" "neon_int_1")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their (D|Q)m operands at N1, +@@ -205,7 +420,7 @@ + ;; their (D|Q)n operands at N2, and produce a result at N3. + (define_insn_reservation "cortex_a8_neon_int_2" 3 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_int_2")) ++ (eq_attr "cortex_a8_neon_type" "neon_int_2")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -212,7 +427,7 @@ + ;; produce a result at N3. + (define_insn_reservation "cortex_a8_neon_int_3" 3 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_int_3")) ++ (eq_attr "cortex_a8_neon_type" "neon_int_3")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their source operands at N2, and +@@ -219,7 +434,7 @@ + ;; produce a result at N4. + (define_insn_reservation "cortex_a8_neon_int_4" 4 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_int_4")) ++ (eq_attr "cortex_a8_neon_type" "neon_int_4")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their (D|Q)m operands at N1, +@@ -226,7 +441,7 @@ + ;; their (D|Q)n operands at N2, and produce a result at N4. + (define_insn_reservation "cortex_a8_neon_int_5" 4 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_int_5")) ++ (eq_attr "cortex_a8_neon_type" "neon_int_5")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -233,13 +448,13 @@ + ;; produce a result at N4. + (define_insn_reservation "cortex_a8_neon_vqneg_vqabs" 4 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vqneg_vqabs")) ++ (eq_attr "cortex_a8_neon_type" "neon_vqneg_vqabs")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation produce a result at N3. + (define_insn_reservation "cortex_a8_neon_vmov" 3 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vmov")) ++ (eq_attr "cortex_a8_neon_type" "neon_vmov")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -247,7 +462,7 @@ + ;; produce a result at N6. + (define_insn_reservation "cortex_a8_neon_vaba" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vaba")) ++ (eq_attr "cortex_a8_neon_type" "neon_vaba")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -255,21 +470,24 @@ + ;; produce a result at N6 on cycle 2. + (define_insn_reservation "cortex_a8_neon_vaba_qqq" 7 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vaba_qqq")) ++ (eq_attr "cortex_a8_neon_type" "neon_vaba_qqq")) + "cortex_a8_neon_dp_2") + +-;; Instructions using this reservation read their (D|Q)m operands at N1, +-;; their (D|Q)d operands at N3, and produce a result at N6. +-(define_insn_reservation "cortex_a8_neon_vsma" 6 ++;; Instructions using this reservation read their source operands at N2, and ++;; produce a result at N3 on cycle 2. ++(define_insn_reservation "cortex_a8_neon_bit_ops_q" 4 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vsma")) +- "cortex_a8_neon_dp") ++ (eq_attr "cortex_a8_neon_type" "neon_bit_ops_q")) ++ "cortex_a8_neon_dp_2") + ++;; Integer Multiply/Accumulate Operations ++ + ;; Instructions using this reservation read their source operands at N2, and + ;; produce a result at N6. + (define_insn_reservation "cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long")) ++ (eq_attr "cortex_a8_neon_type" ++ "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their source operands at N2, and +@@ -276,7 +494,7 @@ + ;; produce a result at N6 on cycle 2. + (define_insn_reservation "cortex_a8_neon_mul_qqq_8_16_32_ddd_32" 7 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mul_qqq_8_16_32_ddd_32")) ++ (eq_attr "cortex_a8_neon_type" "neon_mul_qqq_8_16_32_ddd_32")) + "cortex_a8_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -283,7 +501,8 @@ + ;; their (D|Q)m operands at N1, and produce a result at N6 on cycle 2. + (define_insn_reservation "cortex_a8_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" 7 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")) ++ (eq_attr "cortex_a8_neon_type" ++ "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")) + "cortex_a8_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -291,7 +510,8 @@ + ;; produce a result at N6. + (define_insn_reservation "cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long")) ++ (eq_attr "cortex_a8_neon_type" ++ "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -299,7 +519,7 @@ + ;; produce a result at N6 on cycle 2. + (define_insn_reservation "cortex_a8_neon_mla_qqq_8_16" 7 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mla_qqq_8_16")) ++ (eq_attr "cortex_a8_neon_type" "neon_mla_qqq_8_16")) + "cortex_a8_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -307,7 +527,8 @@ + ;; produce a result at N6 on cycle 2. + (define_insn_reservation "cortex_a8_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long" 7 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")) ++ (eq_attr "cortex_a8_neon_type" ++ "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")) + "cortex_a8_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -315,7 +536,7 @@ + ;; produce a result at N6 on cycle 4. + (define_insn_reservation "cortex_a8_neon_mla_qqq_32_qqd_32_scalar" 9 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mla_qqq_32_qqd_32_scalar")) ++ (eq_attr "cortex_a8_neon_type" "neon_mla_qqq_32_qqd_32_scalar")) + "cortex_a8_neon_dp_4") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -322,7 +543,8 @@ + ;; their (D|Q)m operands at N1, and produce a result at N6. + (define_insn_reservation "cortex_a8_neon_mul_ddd_16_scalar_32_16_long_scalar" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mul_ddd_16_scalar_32_16_long_scalar")) ++ (eq_attr "cortex_a8_neon_type" ++ "neon_mul_ddd_16_scalar_32_16_long_scalar")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -329,7 +551,7 @@ + ;; their (D|Q)m operands at N1, and produce a result at N6 on cycle 4. + (define_insn_reservation "cortex_a8_neon_mul_qqd_32_scalar" 9 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mul_qqd_32_scalar")) ++ (eq_attr "cortex_a8_neon_type" "neon_mul_qqd_32_scalar")) + "cortex_a8_neon_dp_4") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -337,14 +559,17 @@ + ;; produce a result at N6. + (define_insn_reservation "cortex_a8_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar")) ++ (eq_attr "cortex_a8_neon_type" ++ "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar")) + "cortex_a8_neon_dp") + ++;; Shift Operations ++ + ;; Instructions using this reservation read their source operands at N1, and + ;; produce a result at N3. + (define_insn_reservation "cortex_a8_neon_shift_1" 3 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_shift_1")) ++ (eq_attr "cortex_a8_neon_type" "neon_shift_1")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -351,7 +576,7 @@ + ;; produce a result at N4. + (define_insn_reservation "cortex_a8_neon_shift_2" 4 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_shift_2")) ++ (eq_attr "cortex_a8_neon_type" "neon_shift_2")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -358,21 +583,14 @@ + ;; produce a result at N3 on cycle 2. + (define_insn_reservation "cortex_a8_neon_shift_3" 4 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_shift_3")) ++ (eq_attr "cortex_a8_neon_type" "neon_shift_3")) + "cortex_a8_neon_dp_2") + + ;; Instructions using this reservation read their source operands at N1, and +-;; produce a result at N1. +-(define_insn_reservation "cortex_a8_neon_vshl_ddd" 1 +- (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vshl_ddd")) +- "cortex_a8_neon_dp") +- +-;; Instructions using this reservation read their source operands at N1, and + ;; produce a result at N4 on cycle 2. + (define_insn_reservation "cortex_a8_neon_vqshl_vrshl_vqrshl_qqq" 5 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vqshl_vrshl_vqrshl_qqq")) ++ (eq_attr "cortex_a8_neon_type" "neon_vqshl_vrshl_vqrshl_qqq")) + "cortex_a8_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)m operands at N1, +@@ -379,21 +597,23 @@ + ;; their (D|Q)d operands at N3, and produce a result at N6. + (define_insn_reservation "cortex_a8_neon_vsra_vrsra" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vsra_vrsra")) ++ (eq_attr "cortex_a8_neon_type" "neon_vsra_vrsra")) + "cortex_a8_neon_dp") + ++;; Floating point Operations ++ + ;; Instructions using this reservation read their source operands at N2, and + ;; produce a result at N5. + (define_insn_reservation "cortex_a8_neon_fp_vadd_ddd_vabs_dd" 5 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vadd_ddd_vabs_dd")) +- "cortex_a8_neon_fadd") ++ (eq_attr "cortex_a8_neon_type" "neon_fp_vadd_ddd_vabs_dd")) ++ "cortex_a8_neon_fadd") + + ;; Instructions using this reservation read their source operands at N2, and + ;; produce a result at N5 on cycle 2. + (define_insn_reservation "cortex_a8_neon_fp_vadd_qqq_vabs_qq" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vadd_qqq_vabs_qq")) ++ (eq_attr "cortex_a8_neon_type" "neon_fp_vadd_qqq_vabs_qq")) + "cortex_a8_neon_fadd_2") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -400,7 +620,7 @@ + ;; produce a result at N5. + (define_insn_reservation "cortex_a8_neon_fp_vsum" 5 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vsum")) ++ (eq_attr "cortex_a8_neon_type" "neon_fp_vsum")) + "cortex_a8_neon_fadd") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -407,7 +627,7 @@ + ;; their (D|Q)m operands at N1, and produce a result at N5. + (define_insn_reservation "cortex_a8_neon_fp_vmul_ddd" 5 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vmul_ddd")) ++ (eq_attr "cortex_a8_neon_type" "neon_fp_vmul_ddd")) + "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -414,7 +634,7 @@ + ;; their (D|Q)m operands at N1, and produce a result at N5 on cycle 2. + (define_insn_reservation "cortex_a8_neon_fp_vmul_qqd" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vmul_qqd")) ++ (eq_attr "cortex_a8_neon_type" "neon_fp_vmul_qqd")) + "cortex_a8_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -422,7 +642,7 @@ + ;; produce a result at N9. + (define_insn_reservation "cortex_a8_neon_fp_vmla_ddd" 9 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vmla_ddd")) ++ (eq_attr "cortex_a8_neon_type" "neon_fp_vmla_ddd")) + "cortex_a8_neon_fmul_then_fadd") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -430,7 +650,7 @@ + ;; produce a result at N9 on cycle 2. + (define_insn_reservation "cortex_a8_neon_fp_vmla_qqq" 10 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vmla_qqq")) ++ (eq_attr "cortex_a8_neon_type" "neon_fp_vmla_qqq")) + "cortex_a8_neon_fmul_then_fadd_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -438,7 +658,7 @@ + ;; produce a result at N9. + (define_insn_reservation "cortex_a8_neon_fp_vmla_ddd_scalar" 9 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vmla_ddd_scalar")) ++ (eq_attr "cortex_a8_neon_type" "neon_fp_vmla_ddd_scalar")) + "cortex_a8_neon_fmul_then_fadd") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -446,7 +666,7 @@ + ;; produce a result at N9 on cycle 2. + (define_insn_reservation "cortex_a8_neon_fp_vmla_qqq_scalar" 10 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vmla_qqq_scalar")) ++ (eq_attr "cortex_a8_neon_type" "neon_fp_vmla_qqq_scalar")) + "cortex_a8_neon_fmul_then_fadd_2") + + ;; Instructions using this reservation read their source operands at N2, and +@@ -453,7 +673,7 @@ + ;; produce a result at N9. + (define_insn_reservation "cortex_a8_neon_fp_vrecps_vrsqrts_ddd" 9 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vrecps_vrsqrts_ddd")) ++ (eq_attr "cortex_a8_neon_type" "neon_fp_vrecps_vrsqrts_ddd")) + "cortex_a8_neon_fmul_then_fadd") + + ;; Instructions using this reservation read their source operands at N2, and +@@ -460,14 +680,16 @@ + ;; produce a result at N9 on cycle 2. + (define_insn_reservation "cortex_a8_neon_fp_vrecps_vrsqrts_qqq" 10 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_fp_vrecps_vrsqrts_qqq")) ++ (eq_attr "type" "neon_fp_recps_s_q, neon_fp_rsqrts_s_q")) + "cortex_a8_neon_fmul_then_fadd_2") + ++;; Permute operations. ++ + ;; Instructions using this reservation read their source operands at N1, and + ;; produce a result at N2. + (define_insn_reservation "cortex_a8_neon_bp_simple" 2 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_bp_simple")) ++ (eq_attr "cortex_a8_neon_type" "neon_bp_simple")) + "cortex_a8_neon_perm") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -474,7 +696,7 @@ + ;; produce a result at N2 on cycle 2. + (define_insn_reservation "cortex_a8_neon_bp_2cycle" 3 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_bp_2cycle")) ++ (eq_attr "cortex_a8_neon_type" "neon_bp_2cycle")) + "cortex_a8_neon_perm_2") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -481,80 +703,78 @@ + ;; produce a result at N2 on cycle 3. + (define_insn_reservation "cortex_a8_neon_bp_3cycle" 4 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_bp_3cycle")) ++ (eq_attr "cortex_a8_neon_type" "neon_bp_3cycle")) + "cortex_a8_neon_perm_3") + ++;; Load Operations. ++ + ;; Instructions using this reservation produce a result at N1. + (define_insn_reservation "cortex_a8_neon_ldr" 1 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_ldr")) ++ (eq_attr "cortex_a8_neon_type" "neon_ldr")) + "cortex_a8_neon_ls") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a8_neon_str" 0 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_str")) ++ (eq_attr "cortex_a8_neon_type" "neon_str")) + "cortex_a8_neon_ls") + + ;; Instructions using this reservation produce a result at N1 on cycle 2. + (define_insn_reservation "cortex_a8_neon_vld1_1_2_regs" 2 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vld1_1_2_regs")) ++ (eq_attr "cortex_a8_neon_type" "neon_vld1_1_2_regs")) + "cortex_a8_neon_ls_2") + + ;; Instructions using this reservation produce a result at N1 on cycle 3. + (define_insn_reservation "cortex_a8_neon_vld1_3_4_regs" 3 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vld1_3_4_regs")) ++ (eq_attr "cortex_a8_neon_type" "neon_vld1_3_4_regs")) + "cortex_a8_neon_ls_3") + + ;; Instructions using this reservation produce a result at N2 on cycle 2. + (define_insn_reservation "cortex_a8_neon_vld2_2_regs_vld1_vld2_all_lanes" 3 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")) ++ (eq_attr "cortex_a8_neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")) + "cortex_a8_neon_ls_2") + + ;; Instructions using this reservation produce a result at N2 on cycle 3. + (define_insn_reservation "cortex_a8_neon_vld2_4_regs" 4 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vld2_4_regs")) ++ (eq_attr "cortex_a8_neon_type" "neon_vld2_4_regs")) + "cortex_a8_neon_ls_3") + + ;; Instructions using this reservation produce a result at N2 on cycle 4. + (define_insn_reservation "cortex_a8_neon_vld3_vld4" 5 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vld3_vld4")) ++ (eq_attr "cortex_a8_neon_type" "neon_vld3_vld4")) + "cortex_a8_neon_ls_4") + ++;; Store operations. ++ + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a8_neon_vst1_1_2_regs_vst2_2_regs" 0 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")) ++ (eq_attr "cortex_a8_neon_type" "neon_vst1_1_2_regs_vst2_2_regs")) + "cortex_a8_neon_ls_2") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a8_neon_vst1_3_4_regs" 0 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vst1_3_4_regs")) ++ (eq_attr "cortex_a8_neon_type" "neon_vst1_3_4_regs")) + "cortex_a8_neon_ls_3") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a8_neon_vst2_4_regs_vst3_vst4" 0 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")) ++ (eq_attr "cortex_a8_neon_type" "neon_vst2_4_regs_vst3_vst4")) + "cortex_a8_neon_ls_4") + +-;; Instructions using this reservation read their source operands at N1. +-(define_insn_reservation "cortex_a8_neon_vst3_vst4" 0 +- (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vst3_vst4")) +- "cortex_a8_neon_ls_4") +- + ;; Instructions using this reservation read their source operands at N1, and + ;; produce a result at N2 on cycle 3. + (define_insn_reservation "cortex_a8_neon_vld1_vld2_lane" 4 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vld1_vld2_lane")) ++ (eq_attr "cortex_a8_neon_type" "neon_vld1_vld2_lane")) + "cortex_a8_neon_ls_3") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -561,37 +781,33 @@ + ;; produce a result at N2 on cycle 5. + (define_insn_reservation "cortex_a8_neon_vld3_vld4_lane" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vld3_vld4_lane")) ++ (eq_attr "cortex_a8_neon_type" "neon_vld3_vld4_lane")) + "cortex_a8_neon_ls_5") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a8_neon_vst1_vst2_lane" 0 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vst1_vst2_lane")) ++ (eq_attr "cortex_a8_neon_type" "neon_vst1_vst2_lane")) + "cortex_a8_neon_ls_2") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a8_neon_vst3_vst4_lane" 0 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vst3_vst4_lane")) ++ (eq_attr "cortex_a8_neon_type" "neon_vst3_vst4_lane")) + "cortex_a8_neon_ls_3") + +-;; Instructions using this reservation produce a result at N2 on cycle 2. +-(define_insn_reservation "cortex_a8_neon_vld3_vld4_all_lanes" 3 +- (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_vld3_vld4_all_lanes")) +- "cortex_a8_neon_ls_3") ++;; Register Transfer Operations + + ;; Instructions using this reservation produce a result at N2. + (define_insn_reservation "cortex_a8_neon_mcr" 2 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mcr")) ++ (eq_attr "cortex_a8_neon_type" "neon_mcr")) + "cortex_a8_neon_perm") + + ;; Instructions using this reservation produce a result at N2. + (define_insn_reservation "cortex_a8_neon_mcr_2_mcrr" 2 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "neon_type" "neon_mcr_2_mcrr")) ++ (eq_attr "cortex_a8_neon_type" "neon_mcr_2_mcrr")) + "cortex_a8_neon_perm_2") + + ;; Exceptions to the default latencies. +@@ -599,6 +815,7 @@ + (define_bypass 1 "cortex_a8_neon_mcr_2_mcrr" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -613,6 +830,7 @@ + (define_bypass 1 "cortex_a8_neon_mcr" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -624,23 +842,10 @@ + cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\ + cortex_a8_neon_fp_vrecps_vrsqrts_qqq") + +-(define_bypass 2 "cortex_a8_neon_vld3_vld4_all_lanes" +- "cortex_a8_neon_int_1,\ +- cortex_a8_neon_int_4,\ +- cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a8_neon_mla_qqq_8_16,\ +- cortex_a8_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a8_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a8_neon_fp_vmla_ddd,\ +- cortex_a8_neon_fp_vmla_qqq,\ +- cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a8_neon_fp_vrecps_vrsqrts_qqq") +- + (define_bypass 5 "cortex_a8_neon_vld3_vld4_lane" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -655,6 +860,7 @@ + (define_bypass 3 "cortex_a8_neon_vld1_vld2_lane" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -669,6 +875,7 @@ + (define_bypass 4 "cortex_a8_neon_vld3_vld4" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -683,6 +890,7 @@ + (define_bypass 3 "cortex_a8_neon_vld2_4_regs" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -697,6 +905,7 @@ + (define_bypass 2 "cortex_a8_neon_vld2_2_regs_vld1_vld2_all_lanes" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -711,6 +920,7 @@ + (define_bypass 2 "cortex_a8_neon_vld1_3_4_regs" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -725,6 +935,7 @@ + (define_bypass 1 "cortex_a8_neon_vld1_1_2_regs" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -739,6 +950,7 @@ + (define_bypass 0 "cortex_a8_neon_ldr" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -753,6 +965,7 @@ + (define_bypass 3 "cortex_a8_neon_bp_3cycle" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -767,6 +980,7 @@ + (define_bypass 2 "cortex_a8_neon_bp_2cycle" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -781,6 +995,7 @@ + (define_bypass 1 "cortex_a8_neon_bp_simple" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -795,6 +1010,7 @@ + (define_bypass 9 "cortex_a8_neon_fp_vrecps_vrsqrts_qqq" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -809,6 +1025,7 @@ + (define_bypass 8 "cortex_a8_neon_fp_vrecps_vrsqrts_ddd" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -823,6 +1040,7 @@ + (define_bypass 9 "cortex_a8_neon_fp_vmla_qqq_scalar" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -837,6 +1055,7 @@ + (define_bypass 8 "cortex_a8_neon_fp_vmla_ddd_scalar" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -851,6 +1070,7 @@ + (define_bypass 9 "cortex_a8_neon_fp_vmla_qqq" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -865,6 +1085,7 @@ + (define_bypass 8 "cortex_a8_neon_fp_vmla_ddd" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -879,6 +1100,7 @@ + (define_bypass 5 "cortex_a8_neon_fp_vmul_qqd" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -893,6 +1115,7 @@ + (define_bypass 4 "cortex_a8_neon_fp_vmul_ddd" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -907,6 +1130,7 @@ + (define_bypass 4 "cortex_a8_neon_fp_vsum" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -921,6 +1145,7 @@ + (define_bypass 5 "cortex_a8_neon_fp_vadd_qqq_vabs_qq" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -935,6 +1160,7 @@ + (define_bypass 4 "cortex_a8_neon_fp_vadd_ddd_vabs_dd" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -949,6 +1175,7 @@ + (define_bypass 5 "cortex_a8_neon_vsra_vrsra" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -963,6 +1190,7 @@ + (define_bypass 4 "cortex_a8_neon_vqshl_vrshl_vqrshl_qqq" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -974,23 +1202,10 @@ + cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\ + cortex_a8_neon_fp_vrecps_vrsqrts_qqq") + +-(define_bypass 0 "cortex_a8_neon_vshl_ddd" +- "cortex_a8_neon_int_1,\ +- cortex_a8_neon_int_4,\ +- cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a8_neon_mla_qqq_8_16,\ +- cortex_a8_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a8_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a8_neon_fp_vmla_ddd,\ +- cortex_a8_neon_fp_vmla_qqq,\ +- cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a8_neon_fp_vrecps_vrsqrts_qqq") +- + (define_bypass 3 "cortex_a8_neon_shift_3" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1005,6 +1220,7 @@ + (define_bypass 3 "cortex_a8_neon_shift_2" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1019,6 +1235,7 @@ + (define_bypass 2 "cortex_a8_neon_shift_1" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1033,6 +1250,7 @@ + (define_bypass 5 "cortex_a8_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1047,6 +1265,7 @@ + (define_bypass 8 "cortex_a8_neon_mul_qqd_32_scalar" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1061,6 +1280,7 @@ + (define_bypass 5 "cortex_a8_neon_mul_ddd_16_scalar_32_16_long_scalar" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1075,6 +1295,7 @@ + (define_bypass 8 "cortex_a8_neon_mla_qqq_32_qqd_32_scalar" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1089,6 +1310,7 @@ + (define_bypass 6 "cortex_a8_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1103,6 +1325,7 @@ + (define_bypass 6 "cortex_a8_neon_mla_qqq_8_16" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1117,6 +1340,7 @@ + (define_bypass 5 "cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1131,6 +1355,7 @@ + (define_bypass 6 "cortex_a8_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1145,6 +1370,7 @@ + (define_bypass 6 "cortex_a8_neon_mul_qqq_8_16_32_ddd_32" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1159,6 +1385,7 @@ + (define_bypass 5 "cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1170,23 +1397,10 @@ + cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\ + cortex_a8_neon_fp_vrecps_vrsqrts_qqq") + +-(define_bypass 5 "cortex_a8_neon_vsma" +- "cortex_a8_neon_int_1,\ +- cortex_a8_neon_int_4,\ +- cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a8_neon_mla_qqq_8_16,\ +- cortex_a8_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a8_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a8_neon_fp_vmla_ddd,\ +- cortex_a8_neon_fp_vmla_qqq,\ +- cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a8_neon_fp_vrecps_vrsqrts_qqq") +- + (define_bypass 6 "cortex_a8_neon_vaba_qqq" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1201,6 +1415,7 @@ + (define_bypass 5 "cortex_a8_neon_vaba" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1212,9 +1427,10 @@ + cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\ + cortex_a8_neon_fp_vrecps_vrsqrts_qqq") + +-(define_bypass 2 "cortex_a8_neon_vmov" ++(define_bypass 3 "cortex_a8_neon_bit_ops_q" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1229,6 +1445,7 @@ + (define_bypass 3 "cortex_a8_neon_vqneg_vqabs" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1243,6 +1460,7 @@ + (define_bypass 3 "cortex_a8_neon_int_5" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1257,6 +1475,7 @@ + (define_bypass 3 "cortex_a8_neon_int_4" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1271,6 +1490,7 @@ + (define_bypass 2 "cortex_a8_neon_int_3" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1285,6 +1505,7 @@ + (define_bypass 2 "cortex_a8_neon_int_2" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1299,6 +1520,7 @@ + (define_bypass 2 "cortex_a8_neon_int_1" + "cortex_a8_neon_int_1,\ + cortex_a8_neon_int_4,\ ++ cortex_a8_neon_bit_ops_q,\ + cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +--- a/src/gcc/config/arm/cortex-a9-neon.md ++++ b/src/gcc/config/arm/cortex-a9-neon.md +@@ -19,6 +19,220 @@ + ;; along with GCC; see the file COPYING3. If not see + ;; . + ++(define_attr "cortex_a9_neon_type" ++ "neon_int_1,neon_int_2,neon_int_3,neon_int_4,neon_int_5,neon_vqneg_vqabs, ++ neon_bit_ops_q, ++ neon_vaba,neon_vaba_qqq, neon_vmov, ++ neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,neon_mul_qqq_8_16_32_ddd_32, ++ neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar, ++ neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,neon_mla_qqq_8_16, ++ neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long, ++ neon_mla_qqq_32_qqd_32_scalar,neon_mul_ddd_16_scalar_32_16_long_scalar, ++ neon_mul_qqd_32_scalar,neon_mla_ddd_16_scalar_qdd_32_16_long_scalar, ++ neon_shift_1,neon_shift_2,neon_shift_3, ++ neon_vqshl_vrshl_vqrshl_qqq,neon_vsra_vrsra,neon_fp_vadd_ddd_vabs_dd, ++ neon_fp_vadd_qqq_vabs_qq,neon_fp_vsum,neon_fp_vmul_ddd,neon_fp_vmul_qqd, ++ neon_fp_vmla_ddd,neon_fp_vmla_qqq,neon_fp_vmla_ddd_scalar, ++ neon_fp_vmla_qqq_scalar,neon_fp_vrecps_vrsqrts_ddd, ++ neon_fp_vrecps_vrsqrts_qqq,neon_bp_simple,neon_bp_2cycle,neon_bp_3cycle, ++ neon_ldr,neon_str,neon_vld1_1_2_regs,neon_vld1_3_4_regs, ++ neon_vld2_2_regs_vld1_vld2_all_lanes,neon_vld2_4_regs,neon_vld3_vld4, ++ neon_vst1_1_2_regs_vst2_2_regs,neon_vst1_3_4_regs, ++ neon_vst2_4_regs_vst3_vst4,neon_vld1_vld2_lane, ++ neon_vld3_vld4_lane,neon_vst1_vst2_lane,neon_vst3_vst4_lane, ++ neon_vld3_vld4_all_lanes,neon_mcr,neon_mcr_2_mcrr,neon_mrc,neon_mrrc, ++ neon_ldm_2,neon_stm_2,none,unknown" ++ (cond [ ++ (eq_attr "type" "neon_logic, neon_logic_q,\ ++ neon_bsl, neon_cls, neon_cnt,\ ++ neon_add, neon_add_q") ++ (const_string "neon_int_1") ++ (eq_attr "type" "neon_add_widen, neon_sub_widen,\ ++ neon_sub, neon_sub_q") ++ (const_string "neon_int_2") ++ (eq_attr "type" "neon_neg, neon_neg_q,\ ++ neon_reduc_add, neon_reduc_add_q,\ ++ neon_reduc_add_long,\ ++ neon_add_long, neon_sub_long") ++ (const_string "neon_int_3") ++ (eq_attr "type" "neon_abs, neon_abs_q, ++ neon_compare_zero, neon_compare_zero_q,\ ++ neon_add_halve_narrow_q,\ ++ neon_sub_halve_narrow_q,\ ++ neon_add_halve, neon_add_halve_q,\ ++ neon_qadd, neon_qadd_q,\ ++ neon_tst, neon_tst_q") ++ (const_string "neon_int_4") ++ (eq_attr "type" "neon_abd_long, neon_sub_halve, neon_sub_halve_q,\ ++ neon_qsub, neon_qsub_q,\ ++ neon_abd, neon_abd_q,\ ++ neon_compare, neon_compare_q,\ ++ neon_minmax, neon_minmax_q, neon_reduc_minmax,\ ++ neon_reduc_minmax_q") ++ (const_string "neon_int_5") ++ (eq_attr "type" "neon_qneg, neon_qneg_q, neon_qabs, neon_qabs_q") ++ (const_string "neon_vqneg_vqabs") ++ (eq_attr "type" "neon_move, neon_move_q") ++ (const_string "neon_vmov") ++ (eq_attr "type" "neon_bsl_q, neon_cls_q, neon_cnt_q") ++ (const_string "neon_bit_ops_q") ++ (eq_attr "type" "neon_arith_acc, neon_reduc_add_acc") ++ (const_string "neon_vaba") ++ (eq_attr "type" "neon_arith_acc_q") ++ (const_string "neon_vaba_qqq") ++ (eq_attr "type" "neon_shift_imm, neon_shift_imm_q,\ ++ neon_shift_imm_long, neon_shift_imm_narrow_q,\ ++ neon_shift_reg") ++ (const_string "neon_shift_1") ++ (eq_attr "type" "neon_sat_shift_imm, neon_sat_shift_imm_q, ++ neon_sat_shift_imm_narrow_q,\ ++ neon_sat_shift_reg") ++ (const_string "neon_shift_2") ++ (eq_attr "type" "neon_shift_reg_q") ++ (const_string "neon_shift_3") ++ (eq_attr "type" "neon_sat_shift_reg_q") ++ (const_string "neon_vqshl_vrshl_vqrshl_qqq") ++ (eq_attr "type" "neon_shift_acc, neon_shift_acc_q") ++ (const_string "neon_vsra_vrsra") ++ (eq_attr "type" "neon_mul_b, neon_mul_h,\ ++ neon_mul_b_long, neon_mul_h_long,\ ++ neon_sat_mul_b, neon_sat_mul_h,\ ++ neon_sat_mul_b_long, neon_sat_mul_h_long") ++ (const_string ++ "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") ++ (eq_attr "type" "neon_mul_b_q, neon_mul_h_q,\ ++ neon_sat_mul_b_q, neon_sat_mul_h_q") ++ (const_string "neon_mul_qqq_8_16_32_ddd_32") ++ (eq_attr "type" "neon_mul_s, neon_mul_s_long,\ ++ neon_sat_mul_s, neon_sat_mul_s_long,\ ++ neon_mul_h_scalar_q, neon_sat_mul_h_scalar_q,\ ++ neon_mul_s_scalar, neon_sat_mul_s_scalar,\ ++ neon_mul_s_scalar_long,\ ++ neon_sat_mul_s_scalar_long") ++ (const_string ++ "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar") ++ (eq_attr "type" "neon_mla_b, neon_mla_h,\ ++ neon_mla_b_long, neon_mla_h_long,\ ++ neon_sat_mla_b_long, neon_sat_mla_h_long,\ ++ neon_sat_mla_h_scalar_long") ++ (const_string ++ "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") ++ (eq_attr "type" "neon_mla_b_q, neon_mla_h_q") ++ (const_string "neon_mla_qqq_8_16") ++ (eq_attr "type" "neon_mla_s, neon_mla_s_long,\ ++ neon_sat_mla_s_long,\ ++ neon_mla_h_scalar_q, neon_mla_s_scalar,\ ++ neon_mla_s_scalar_long,\ ++ neon_sat_mla_s_scalar_long") ++ (const_string ++ "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long") ++ (eq_attr "type" "neon_mla_s_q, neon_mla_s_scalar_q") ++ (const_string "neon_mla_qqq_32_qqd_32_scalar") ++ (eq_attr "type" "neon_mul_h_scalar, neon_sat_mul_h_scalar,\ ++ neon_mul_h_scalar_long,\ ++ neon_sat_mul_h_scalar_long") ++ (const_string ++ "neon_mul_ddd_16_scalar_32_16_long_scalar") ++ (eq_attr "type" "neon_mul_s_q, neon_sat_mul_s_q,\ ++ neon_mul_s_scalar_q") ++ (const_string "neon_mul_qqd_32_scalar") ++ (eq_attr "type" "neon_mla_h_scalar, neon_mla_h_scalar_long") ++ (const_string ++ "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar") ++ (eq_attr "type" "neon_fp_abd_s, neon_fp_abs_s, neon_fp_neg_s,\ ++ neon_fp_addsub_s, neon_fp_compare_s,\ ++ neon_fp_minmax_s, neon_fp_mul_s,\ ++ neon_fp_recpe_s, neon_fp_rsqrte_s,\ ++ neon_fp_to_int_s, neon_int_to_fp_s") ++ (const_string "neon_fp_vadd_ddd_vabs_dd") ++ (eq_attr "type" "neon_fp_abd_s_q, neon_fp_abs_s_q,\ ++ neon_fp_neg_s_q,\ ++ neon_fp_addsub_s_q, neon_fp_compare_s_q,\ ++ neon_fp_minmax_s_q, neon_fp_mul_s_q,\ ++ neon_fp_recpe_s_q, neon_fp_rsqrte_s_q,\ ++ neon_fp_to_int_s_q, neon_int_to_fp_s_q") ++ (const_string "neon_fp_vadd_qqq_vabs_qq") ++ (eq_attr "type" "neon_fp_reduc_add_s, neon_fp_reduc_minmax_s,\ ++ neon_fp_reduc_add_s_q, neon_fp_reduc_minmax_s_q") ++ (const_string "neon_fp_vsum") ++ (eq_attr "type" "neon_fp_mul_s_scalar") ++ (const_string "neon_fp_vmul_ddd") ++ (eq_attr "type" "neon_fp_mul_s_scalar_q") ++ (const_string "neon_fp_vmul_qqd") ++ (eq_attr "type" "neon_fp_mla_s") ++ (const_string "neon_fp_vmla_ddd") ++ (eq_attr "type" "neon_fp_mla_s_q") ++ (const_string "neon_fp_vmla_qqq") ++ (eq_attr "type" "neon_fp_mla_s_scalar") ++ (const_string "neon_fp_vmla_ddd_scalar") ++ (eq_attr "type" "neon_fp_mla_s_scalar_q") ++ (const_string "neon_fp_vmla_qqq_scalar") ++ (eq_attr "type" "neon_fp_recps_s, neon_fp_rsqrts_s") ++ (const_string "neon_fp_vrecps_vrsqrts_ddd") ++ (eq_attr "type" "neon_fp_recps_s_q, neon_fp_rsqrts_s_q") ++ (const_string "neon_fp_vrecps_vrsqrts_qqq") ++ (eq_attr "type" "neon_move_narrow_q, neon_dup,\ ++ neon_dup_q, neon_permute, neon_zip,\ ++ neon_ext, neon_rev, neon_rev_q") ++ (const_string "neon_bp_simple") ++ (eq_attr "type" "neon_permute_q, neon_ext_q, neon_tbl1, neon_tbl2") ++ (const_string "neon_bp_2cycle") ++ (eq_attr "type" "neon_zip_q, neon_tbl3, neon_tbl4") ++ (const_string "neon_bp_3cycle") ++ (eq_attr "type" "neon_ldr") ++ (const_string "neon_ldr") ++ (eq_attr "type" "neon_str") ++ (const_string "neon_str") ++ (eq_attr "type" "neon_load1_1reg, neon_load1_1reg_q,\ ++ neon_load1_2reg, neon_load1_2reg_q,\ ++ neon_load2_2reg, neon_load2_2reg_q") ++ (const_string "neon_vld1_1_2_regs") ++ (eq_attr "type" "neon_load1_3reg, neon_load1_3reg_q,\ ++ neon_load1_4reg, neon_load1_4reg_q") ++ (const_string "neon_vld1_3_4_regs") ++ (eq_attr "type" "neon_load1_all_lanes, neon_load1_all_lanes_q,\ ++ neon_load2_all_lanes, neon_load2_all_lanes_q") ++ (const_string ++ "neon_vld2_2_regs_vld1_vld2_all_lanes") ++ (eq_attr "type" "neon_load3_all_lanes, neon_load3_all_lanes_q,\ ++ neon_load4_all_lanes, neon_load4_all_lanes_q,\ ++ neon_load2_4reg, neon_load2_4reg_q") ++ (const_string "neon_vld2_4_regs") ++ (eq_attr "type" "neon_load3_3reg, neon_load3_3reg_q,\ ++ neon_load4_4reg, neon_load4_4reg_q") ++ (const_string "neon_vld3_vld4") ++ (eq_attr "type" "neon_load1_one_lane, neon_load1_one_lane_q,\ ++ neon_load2_one_lane, neon_load2_one_lane_q") ++ (const_string "neon_vld1_vld2_lane") ++ (eq_attr "type" "neon_load3_one_lane, neon_load3_one_lane_q,\ ++ neon_load4_one_lane, neon_load4_one_lane_q") ++ (const_string "neon_vld3_vld4_lane") ++ (eq_attr "type" "neon_store1_1reg, neon_store1_1reg_q,\ ++ neon_store1_2reg, neon_store1_2reg_q,\ ++ neon_store2_2reg, neon_store2_2reg_q") ++ (const_string "neon_vst1_1_2_regs_vst2_2_regs") ++ (eq_attr "type" "neon_store1_3reg, neon_store1_3reg_q,\ ++ neon_store1_4reg, neon_store1_4reg_q") ++ (const_string "neon_vst1_3_4_regs") ++ (eq_attr "type" "neon_store2_4reg, neon_store2_4reg_q,\ ++ neon_store3_3reg, neon_store3_3reg_q,\ ++ neon_store4_4reg, neon_store4_4reg_q") ++ (const_string "neon_vst2_4_regs_vst3_vst4") ++ (eq_attr "type" "neon_store1_one_lane, neon_store1_one_lane_q,\ ++ neon_store2_one_lane, neon_store2_one_lane_q") ++ (const_string "neon_vst1_vst2_lane") ++ (eq_attr "type" "neon_store3_one_lane, neon_store3_one_lane_q,\ ++ neon_store4_one_lane, neon_store4_one_lane_q") ++ (const_string "neon_vst3_vst4_lane") ++ (eq_attr "type" "neon_from_gp") ++ (const_string "neon_mcr") ++ (eq_attr "type" "neon_from_gp_q") ++ (const_string "neon_mcr_2_mcrr") ++ (eq_attr "type" "neon_to_gp") ++ (const_string "neon_mrc") ++ (eq_attr "type" "neon_to_gp_q") ++ (const_string "neon_mrrc")] ++ (const_string "unknown"))) + + (define_automaton "cortex_a9_neon") + +@@ -105,25 +319,22 @@ + cortex_a9_neon_issue_fadd,\ + cortex_a9_neon_issue_fadd") + +- + ;; NEON -> core transfers. + (define_insn_reservation "ca9_neon_mrc" 1 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mrc")) ++ (eq_attr "cortex_a9_neon_type" "neon_mrc")) + "ca9_issue_vfp_neon + cortex_a9_neon_mcr") + + (define_insn_reservation "ca9_neon_mrrc" 1 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mrrc")) ++ (eq_attr "cortex_a9_neon_type" "neon_mrrc")) + "ca9_issue_vfp_neon + cortex_a9_neon_mcr") + +-;; The remainder of this file is auto-generated by neon-schedgen. +- + ;; Instructions using this reservation read their source operands at N2, and + ;; produce a result at N3. + (define_insn_reservation "cortex_a9_neon_int_1" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_int_1")) ++ (eq_attr "cortex_a9_neon_type" "neon_int_1")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their (D|Q)m operands at N1, +@@ -130,7 +341,7 @@ + ;; their (D|Q)n operands at N2, and produce a result at N3. + (define_insn_reservation "cortex_a9_neon_int_2" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_int_2")) ++ (eq_attr "cortex_a9_neon_type" "neon_int_2")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -137,14 +348,14 @@ + ;; produce a result at N3. + (define_insn_reservation "cortex_a9_neon_int_3" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_int_3")) +- "cortex_a9_neon_dp") ++ (eq_attr "cortex_a9_neon_type" "neon_int_3")) ++ "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their source operands at N2, and + ;; produce a result at N4. + (define_insn_reservation "cortex_a9_neon_int_4" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_int_4")) ++ (eq_attr "cortex_a9_neon_type" "neon_int_4")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their (D|Q)m operands at N1, +@@ -151,7 +362,7 @@ + ;; their (D|Q)n operands at N2, and produce a result at N4. + (define_insn_reservation "cortex_a9_neon_int_5" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_int_5")) ++ (eq_attr "cortex_a9_neon_type" "neon_int_5")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -158,14 +369,14 @@ + ;; produce a result at N4. + (define_insn_reservation "cortex_a9_neon_vqneg_vqabs" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vqneg_vqabs")) +- "cortex_a9_neon_dp") ++ (eq_attr "cortex_a9_neon_type" "neon_vqneg_vqabs")) ++ "cortex_a9_neon_dp") + + ;; Instructions using this reservation produce a result at N3. + (define_insn_reservation "cortex_a9_neon_vmov" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vmov")) +- "cortex_a9_neon_dp") ++ (eq_attr "cortex_a9_neon_type" "neon_vmov")) ++ "cortex_a8_neon_dp") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, + ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and +@@ -172,7 +383,7 @@ + ;; produce a result at N6. + (define_insn_reservation "cortex_a9_neon_vaba" 6 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vaba")) ++ (eq_attr "cortex_a9_neon_type" "neon_vaba")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -180,21 +391,21 @@ + ;; produce a result at N6 on cycle 2. + (define_insn_reservation "cortex_a9_neon_vaba_qqq" 7 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vaba_qqq")) ++ (eq_attr "cortex_a9_neon_type" "neon_vaba_qqq")) + "cortex_a9_neon_dp_2") + +-;; Instructions using this reservation read their (D|Q)m operands at N1, +-;; their (D|Q)d operands at N3, and produce a result at N6. +-(define_insn_reservation "cortex_a9_neon_vsma" 6 ++;; Instructions using this reservation read their source operands at N2, and ++;; produce a result at N3 on cycle 2. ++(define_insn_reservation "cortex_a9_neon_bit_ops_q" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vsma")) +- "cortex_a9_neon_dp") ++ (eq_attr "cortex_a9_neon_type" "neon_bit_ops_q")) ++ "cortex_a9_neon_dp_2") + + ;; Instructions using this reservation read their source operands at N2, and + ;; produce a result at N6. + (define_insn_reservation "cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" 6 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long")) ++ (eq_attr "cortex_a9_neon_type" "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their source operands at N2, and +@@ -201,7 +412,7 @@ + ;; produce a result at N6 on cycle 2. + (define_insn_reservation "cortex_a9_neon_mul_qqq_8_16_32_ddd_32" 7 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mul_qqq_8_16_32_ddd_32")) ++ (eq_attr "cortex_a9_neon_type" "neon_mul_qqq_8_16_32_ddd_32")) + "cortex_a9_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -208,7 +419,7 @@ + ;; their (D|Q)m operands at N1, and produce a result at N6 on cycle 2. + (define_insn_reservation "cortex_a9_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" 7 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")) ++ (eq_attr "cortex_a9_neon_type" "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")) + "cortex_a9_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -216,7 +427,7 @@ + ;; produce a result at N6. + (define_insn_reservation "cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" 6 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long")) ++ (eq_attr "cortex_a9_neon_type" "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -224,7 +435,7 @@ + ;; produce a result at N6 on cycle 2. + (define_insn_reservation "cortex_a9_neon_mla_qqq_8_16" 7 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mla_qqq_8_16")) ++ (eq_attr "cortex_a9_neon_type" "neon_mla_qqq_8_16")) + "cortex_a9_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -232,7 +443,7 @@ + ;; produce a result at N6 on cycle 2. + (define_insn_reservation "cortex_a9_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long" 7 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")) ++ (eq_attr "cortex_a9_neon_type" "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")) + "cortex_a9_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -240,7 +451,7 @@ + ;; produce a result at N6 on cycle 4. + (define_insn_reservation "cortex_a9_neon_mla_qqq_32_qqd_32_scalar" 9 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mla_qqq_32_qqd_32_scalar")) ++ (eq_attr "cortex_a9_neon_type" "neon_mla_qqq_32_qqd_32_scalar")) + "cortex_a9_neon_dp_4") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -247,7 +458,7 @@ + ;; their (D|Q)m operands at N1, and produce a result at N6. + (define_insn_reservation "cortex_a9_neon_mul_ddd_16_scalar_32_16_long_scalar" 6 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mul_ddd_16_scalar_32_16_long_scalar")) ++ (eq_attr "cortex_a9_neon_type" "neon_mul_ddd_16_scalar_32_16_long_scalar")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -254,7 +465,7 @@ + ;; their (D|Q)m operands at N1, and produce a result at N6 on cycle 4. + (define_insn_reservation "cortex_a9_neon_mul_qqd_32_scalar" 9 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mul_qqd_32_scalar")) ++ (eq_attr "cortex_a9_neon_type" "neon_mul_qqd_32_scalar")) + "cortex_a9_neon_dp_4") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -262,7 +473,7 @@ + ;; produce a result at N6. + (define_insn_reservation "cortex_a9_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" 6 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar")) ++ (eq_attr "cortex_a9_neon_type" "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -269,7 +480,7 @@ + ;; produce a result at N3. + (define_insn_reservation "cortex_a9_neon_shift_1" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_shift_1")) ++ (eq_attr "cortex_a9_neon_type" "neon_shift_1")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -276,7 +487,7 @@ + ;; produce a result at N4. + (define_insn_reservation "cortex_a9_neon_shift_2" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_shift_2")) ++ (eq_attr "cortex_a9_neon_type" "neon_shift_2")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -283,21 +494,14 @@ + ;; produce a result at N3 on cycle 2. + (define_insn_reservation "cortex_a9_neon_shift_3" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_shift_3")) ++ (eq_attr "cortex_a9_neon_type" "neon_shift_3")) + "cortex_a9_neon_dp_2") + + ;; Instructions using this reservation read their source operands at N1, and +-;; produce a result at N1. +-(define_insn_reservation "cortex_a9_neon_vshl_ddd" 1 +- (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vshl_ddd")) +- "cortex_a9_neon_dp") +- +-;; Instructions using this reservation read their source operands at N1, and + ;; produce a result at N4 on cycle 2. + (define_insn_reservation "cortex_a9_neon_vqshl_vrshl_vqrshl_qqq" 5 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vqshl_vrshl_vqrshl_qqq")) ++ (eq_attr "cortex_a9_neon_type" "neon_vqshl_vrshl_vqrshl_qqq")) + "cortex_a9_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)m operands at N1, +@@ -304,7 +508,7 @@ + ;; their (D|Q)d operands at N3, and produce a result at N6. + (define_insn_reservation "cortex_a9_neon_vsra_vrsra" 6 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vsra_vrsra")) ++ (eq_attr "cortex_a9_neon_type" "neon_vsra_vrsra")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their source operands at N2, and +@@ -311,7 +515,7 @@ + ;; produce a result at N5. + (define_insn_reservation "cortex_a9_neon_fp_vadd_ddd_vabs_dd" 5 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vadd_ddd_vabs_dd")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vadd_ddd_vabs_dd")) + "cortex_a9_neon_fadd") + + ;; Instructions using this reservation read their source operands at N2, and +@@ -318,7 +522,7 @@ + ;; produce a result at N5 on cycle 2. + (define_insn_reservation "cortex_a9_neon_fp_vadd_qqq_vabs_qq" 6 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vadd_qqq_vabs_qq")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vadd_qqq_vabs_qq")) + "cortex_a9_neon_fadd_2") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -325,7 +529,7 @@ + ;; produce a result at N5. + (define_insn_reservation "cortex_a9_neon_fp_vsum" 5 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vsum")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vsum")) + "cortex_a9_neon_fadd") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -332,7 +536,7 @@ + ;; their (D|Q)m operands at N1, and produce a result at N5. + (define_insn_reservation "cortex_a9_neon_fp_vmul_ddd" 5 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vmul_ddd")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vmul_ddd")) + "cortex_a9_neon_dp") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -339,7 +543,7 @@ + ;; their (D|Q)m operands at N1, and produce a result at N5 on cycle 2. + (define_insn_reservation "cortex_a9_neon_fp_vmul_qqd" 6 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vmul_qqd")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vmul_qqd")) + "cortex_a9_neon_dp_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -347,7 +551,7 @@ + ;; produce a result at N9. + (define_insn_reservation "cortex_a9_neon_fp_vmla_ddd" 9 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vmla_ddd")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vmla_ddd")) + "cortex_a9_neon_fmul_then_fadd") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -355,7 +559,7 @@ + ;; produce a result at N9 on cycle 2. + (define_insn_reservation "cortex_a9_neon_fp_vmla_qqq" 10 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vmla_qqq")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vmla_qqq")) + "cortex_a9_neon_fmul_then_fadd_2") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -363,7 +567,7 @@ + ;; produce a result at N9. + (define_insn_reservation "cortex_a9_neon_fp_vmla_ddd_scalar" 9 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vmla_ddd_scalar")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vmla_ddd_scalar")) + "cortex_a9_neon_fmul_then_fadd") + + ;; Instructions using this reservation read their (D|Q)n operands at N2, +@@ -371,7 +575,7 @@ + ;; produce a result at N9 on cycle 2. + (define_insn_reservation "cortex_a9_neon_fp_vmla_qqq_scalar" 10 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vmla_qqq_scalar")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vmla_qqq_scalar")) + "cortex_a9_neon_fmul_then_fadd_2") + + ;; Instructions using this reservation read their source operands at N2, and +@@ -378,7 +582,7 @@ + ;; produce a result at N9. + (define_insn_reservation "cortex_a9_neon_fp_vrecps_vrsqrts_ddd" 9 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vrecps_vrsqrts_ddd")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vrecps_vrsqrts_ddd")) + "cortex_a9_neon_fmul_then_fadd") + + ;; Instructions using this reservation read their source operands at N2, and +@@ -385,7 +589,7 @@ + ;; produce a result at N9 on cycle 2. + (define_insn_reservation "cortex_a9_neon_fp_vrecps_vrsqrts_qqq" 10 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_fp_vrecps_vrsqrts_qqq")) ++ (eq_attr "cortex_a9_neon_type" "neon_fp_vrecps_vrsqrts_qqq")) + "cortex_a9_neon_fmul_then_fadd_2") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -392,7 +596,7 @@ + ;; produce a result at N2. + (define_insn_reservation "cortex_a9_neon_bp_simple" 2 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_bp_simple")) ++ (eq_attr "cortex_a9_neon_type" "neon_bp_simple")) + "cortex_a9_neon_perm") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -399,7 +603,7 @@ + ;; produce a result at N2 on cycle 2. + (define_insn_reservation "cortex_a9_neon_bp_2cycle" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_bp_2cycle")) ++ (eq_attr "cortex_a9_neon_type" "neon_bp_2cycle")) + "cortex_a9_neon_perm_2") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -406,80 +610,74 @@ + ;; produce a result at N2 on cycle 3. + (define_insn_reservation "cortex_a9_neon_bp_3cycle" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_bp_3cycle")) ++ (eq_attr "cortex_a9_neon_type" "neon_bp_3cycle")) + "cortex_a9_neon_perm_3") + + ;; Instructions using this reservation produce a result at N1. + (define_insn_reservation "cortex_a9_neon_ldr" 1 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_ldr")) ++ (eq_attr "cortex_a9_neon_type" "neon_ldr")) + "cortex_a9_neon_ls") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a9_neon_str" 0 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_str")) ++ (eq_attr "cortex_a9_neon_type" "neon_str")) + "cortex_a9_neon_ls") + + ;; Instructions using this reservation produce a result at N1 on cycle 2. + (define_insn_reservation "cortex_a9_neon_vld1_1_2_regs" 2 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vld1_1_2_regs")) ++ (eq_attr "cortex_a9_neon_type" "neon_vld1_1_2_regs")) + "cortex_a9_neon_ls_2") + + ;; Instructions using this reservation produce a result at N1 on cycle 3. + (define_insn_reservation "cortex_a9_neon_vld1_3_4_regs" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vld1_3_4_regs")) ++ (eq_attr "cortex_a9_neon_type" "neon_vld1_3_4_regs")) + "cortex_a9_neon_ls_3") + + ;; Instructions using this reservation produce a result at N2 on cycle 2. + (define_insn_reservation "cortex_a9_neon_vld2_2_regs_vld1_vld2_all_lanes" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")) ++ (eq_attr "cortex_a9_neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")) + "cortex_a9_neon_ls_2") + + ;; Instructions using this reservation produce a result at N2 on cycle 3. + (define_insn_reservation "cortex_a9_neon_vld2_4_regs" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vld2_4_regs")) ++ (eq_attr "cortex_a9_neon_type" "neon_vld2_4_regs")) + "cortex_a9_neon_ls_3") + + ;; Instructions using this reservation produce a result at N2 on cycle 4. + (define_insn_reservation "cortex_a9_neon_vld3_vld4" 5 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vld3_vld4")) ++ (eq_attr "cortex_a9_neon_type" "neon_vld3_vld4")) + "cortex_a9_neon_ls_4") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a9_neon_vst1_1_2_regs_vst2_2_regs" 0 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")) ++ (eq_attr "cortex_a9_neon_type" "neon_vst1_1_2_regs_vst2_2_regs")) + "cortex_a9_neon_ls_2") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a9_neon_vst1_3_4_regs" 0 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vst1_3_4_regs")) ++ (eq_attr "cortex_a9_neon_type" "neon_vst1_3_4_regs")) + "cortex_a9_neon_ls_3") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a9_neon_vst2_4_regs_vst3_vst4" 0 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")) ++ (eq_attr "cortex_a9_neon_type" "neon_vst2_4_regs_vst3_vst4")) + "cortex_a9_neon_ls_4") + +-;; Instructions using this reservation read their source operands at N1. +-(define_insn_reservation "cortex_a9_neon_vst3_vst4" 0 +- (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vst3_vst4")) +- "cortex_a9_neon_ls_4") +- + ;; Instructions using this reservation read their source operands at N1, and + ;; produce a result at N2 on cycle 3. + (define_insn_reservation "cortex_a9_neon_vld1_vld2_lane" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vld1_vld2_lane")) ++ (eq_attr "cortex_a9_neon_type" "neon_vld1_vld2_lane")) + "cortex_a9_neon_ls_3") + + ;; Instructions using this reservation read their source operands at N1, and +@@ -486,37 +684,37 @@ + ;; produce a result at N2 on cycle 5. + (define_insn_reservation "cortex_a9_neon_vld3_vld4_lane" 6 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vld3_vld4_lane")) ++ (eq_attr "cortex_a9_neon_type" "neon_vld3_vld4_lane")) + "cortex_a9_neon_ls_5") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a9_neon_vst1_vst2_lane" 0 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vst1_vst2_lane")) ++ (eq_attr "cortex_a9_neon_type" "neon_vst1_vst2_lane")) + "cortex_a9_neon_ls_2") + + ;; Instructions using this reservation read their source operands at N1. + (define_insn_reservation "cortex_a9_neon_vst3_vst4_lane" 0 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vst3_vst4_lane")) ++ (eq_attr "cortex_a9_neon_type" "neon_vst3_vst4_lane")) + "cortex_a9_neon_ls_3") + + ;; Instructions using this reservation produce a result at N2 on cycle 2. + (define_insn_reservation "cortex_a9_neon_vld3_vld4_all_lanes" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_vld3_vld4_all_lanes")) ++ (eq_attr "cortex_a9_neon_type" "neon_vld3_vld4_all_lanes")) + "cortex_a9_neon_ls_3") + + ;; Instructions using this reservation produce a result at N2. + (define_insn_reservation "cortex_a9_neon_mcr" 2 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mcr")) ++ (eq_attr "cortex_a9_neon_type" "neon_mcr")) + "cortex_a9_neon_perm") + + ;; Instructions using this reservation produce a result at N2. + (define_insn_reservation "cortex_a9_neon_mcr_2_mcrr" 2 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "neon_type" "neon_mcr_2_mcrr")) ++ (eq_attr "cortex_a9_neon_type" "neon_mcr_2_mcrr")) + "cortex_a9_neon_perm_2") + + ;; Exceptions to the default latencies. +@@ -524,6 +722,7 @@ + (define_bypass 1 "cortex_a9_neon_mcr_2_mcrr" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -538,6 +737,7 @@ + (define_bypass 1 "cortex_a9_neon_mcr" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -552,6 +752,7 @@ + (define_bypass 2 "cortex_a9_neon_vld3_vld4_all_lanes" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -566,6 +767,7 @@ + (define_bypass 5 "cortex_a9_neon_vld3_vld4_lane" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -580,6 +782,7 @@ + (define_bypass 3 "cortex_a9_neon_vld1_vld2_lane" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -594,6 +797,7 @@ + (define_bypass 4 "cortex_a9_neon_vld3_vld4" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -608,6 +812,7 @@ + (define_bypass 3 "cortex_a9_neon_vld2_4_regs" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -622,6 +827,7 @@ + (define_bypass 2 "cortex_a9_neon_vld2_2_regs_vld1_vld2_all_lanes" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -636,6 +842,7 @@ + (define_bypass 2 "cortex_a9_neon_vld1_3_4_regs" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -650,6 +857,7 @@ + (define_bypass 1 "cortex_a9_neon_vld1_1_2_regs" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -664,6 +872,7 @@ + (define_bypass 0 "cortex_a9_neon_ldr" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -678,6 +887,7 @@ + (define_bypass 3 "cortex_a9_neon_bp_3cycle" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -692,6 +902,7 @@ + (define_bypass 2 "cortex_a9_neon_bp_2cycle" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -706,6 +917,7 @@ + (define_bypass 1 "cortex_a9_neon_bp_simple" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -720,6 +932,7 @@ + (define_bypass 9 "cortex_a9_neon_fp_vrecps_vrsqrts_qqq" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -734,6 +947,7 @@ + (define_bypass 8 "cortex_a9_neon_fp_vrecps_vrsqrts_ddd" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -748,6 +962,7 @@ + (define_bypass 9 "cortex_a9_neon_fp_vmla_qqq_scalar" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -762,6 +977,7 @@ + (define_bypass 8 "cortex_a9_neon_fp_vmla_ddd_scalar" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -776,6 +992,7 @@ + (define_bypass 9 "cortex_a9_neon_fp_vmla_qqq" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -790,6 +1007,7 @@ + (define_bypass 8 "cortex_a9_neon_fp_vmla_ddd" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -804,6 +1022,7 @@ + (define_bypass 5 "cortex_a9_neon_fp_vmul_qqd" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -818,6 +1037,7 @@ + (define_bypass 4 "cortex_a9_neon_fp_vmul_ddd" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -832,6 +1052,7 @@ + (define_bypass 4 "cortex_a9_neon_fp_vsum" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -846,6 +1067,7 @@ + (define_bypass 5 "cortex_a9_neon_fp_vadd_qqq_vabs_qq" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -860,6 +1082,7 @@ + (define_bypass 4 "cortex_a9_neon_fp_vadd_ddd_vabs_dd" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -874,6 +1097,7 @@ + (define_bypass 5 "cortex_a9_neon_vsra_vrsra" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -888,6 +1112,7 @@ + (define_bypass 4 "cortex_a9_neon_vqshl_vrshl_vqrshl_qqq" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -899,23 +1124,10 @@ + cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\ + cortex_a9_neon_fp_vrecps_vrsqrts_qqq") + +-(define_bypass 0 "cortex_a9_neon_vshl_ddd" +- "cortex_a9_neon_int_1,\ +- cortex_a9_neon_int_4,\ +- cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a9_neon_mla_qqq_8_16,\ +- cortex_a9_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a9_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a9_neon_fp_vmla_ddd,\ +- cortex_a9_neon_fp_vmla_qqq,\ +- cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a9_neon_fp_vrecps_vrsqrts_qqq") +- + (define_bypass 3 "cortex_a9_neon_shift_3" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -930,6 +1142,7 @@ + (define_bypass 3 "cortex_a9_neon_shift_2" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -944,6 +1157,7 @@ + (define_bypass 2 "cortex_a9_neon_shift_1" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -958,6 +1172,7 @@ + (define_bypass 5 "cortex_a9_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -972,6 +1187,7 @@ + (define_bypass 8 "cortex_a9_neon_mul_qqd_32_scalar" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -986,6 +1202,7 @@ + (define_bypass 5 "cortex_a9_neon_mul_ddd_16_scalar_32_16_long_scalar" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1000,6 +1217,7 @@ + (define_bypass 8 "cortex_a9_neon_mla_qqq_32_qqd_32_scalar" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1014,6 +1232,7 @@ + (define_bypass 6 "cortex_a9_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1028,6 +1247,7 @@ + (define_bypass 6 "cortex_a9_neon_mla_qqq_8_16" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1042,6 +1262,7 @@ + (define_bypass 5 "cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1056,6 +1277,7 @@ + (define_bypass 6 "cortex_a9_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1070,6 +1292,7 @@ + (define_bypass 6 "cortex_a9_neon_mul_qqq_8_16_32_ddd_32" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1084,6 +1307,7 @@ + (define_bypass 5 "cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1095,9 +1319,10 @@ + cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\ + cortex_a9_neon_fp_vrecps_vrsqrts_qqq") + +-(define_bypass 5 "cortex_a9_neon_vsma" ++(define_bypass 6 "cortex_a9_neon_vaba_qqq" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1109,9 +1334,10 @@ + cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\ + cortex_a9_neon_fp_vrecps_vrsqrts_qqq") + +-(define_bypass 6 "cortex_a9_neon_vaba_qqq" ++(define_bypass 5 "cortex_a9_neon_vaba" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1123,9 +1349,10 @@ + cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\ + cortex_a9_neon_fp_vrecps_vrsqrts_qqq") + +-(define_bypass 5 "cortex_a9_neon_vaba" ++(define_bypass 2 "cortex_a9_neon_vmov" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1137,9 +1364,10 @@ + cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\ + cortex_a9_neon_fp_vrecps_vrsqrts_qqq") + +-(define_bypass 2 "cortex_a9_neon_vmov" ++(define_bypass 3 "cortex_a9_neon_bit_ops_q" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1154,6 +1382,7 @@ + (define_bypass 3 "cortex_a9_neon_vqneg_vqabs" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1168,6 +1397,7 @@ + (define_bypass 3 "cortex_a9_neon_int_5" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1182,6 +1412,7 @@ + (define_bypass 3 "cortex_a9_neon_int_4" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1196,6 +1427,7 @@ + (define_bypass 2 "cortex_a9_neon_int_3" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1210,6 +1442,7 @@ + (define_bypass 2 "cortex_a9_neon_int_2" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +@@ -1224,6 +1457,7 @@ + (define_bypass 2 "cortex_a9_neon_int_1" + "cortex_a9_neon_int_1,\ + cortex_a9_neon_int_4,\ ++ cortex_a9_neon_bit_ops_q,\ + cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ + cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\ + cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +--- a/src/gcc/config/arm/cortex-a8.md ++++ b/src/gcc/config/arm/cortex-a8.md +@@ -85,22 +85,25 @@ + ;; (source read in E2 and destination available at the end of that cycle). + (define_insn_reservation "cortex_a8_alu" 2 + (and (eq_attr "tune" "cortexa8") +- (ior (and (and (eq_attr "type" "alu_reg,simple_alu_imm") +- (eq_attr "neon_type" "none")) +- (not (eq_attr "insn" "mov,mvn"))) +- (eq_attr "insn" "clz"))) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,clz,rbit,rev,\ ++ shift_imm,shift_reg,\ ++ multiple,no_insn")) + "cortex_a8_default") + + (define_insn_reservation "cortex_a8_alu_shift" 2 + (and (eq_attr "tune" "cortexa8") +- (and (eq_attr "type" "simple_alu_shift,alu_shift") +- (not (eq_attr "insn" "mov,mvn")))) ++ (eq_attr "type" "alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ extend")) + "cortex_a8_default") + + (define_insn_reservation "cortex_a8_alu_shift_reg" 2 + (and (eq_attr "tune" "cortexa8") +- (and (eq_attr "type" "alu_shift_reg") +- (not (eq_attr "insn" "mov,mvn")))) ++ (eq_attr "type" "alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg")) + "cortex_a8_default") + + ;; Move instructions. +@@ -107,8 +110,9 @@ + + (define_insn_reservation "cortex_a8_mov" 1 + (and (eq_attr "tune" "cortexa8") +- (and (eq_attr "type" "alu_reg,simple_alu_imm,simple_alu_shift,alu_shift,alu_shift_reg") +- (eq_attr "insn" "mov,mvn"))) ++ (eq_attr "type" "mov_imm,mov_reg,mov_shift,mov_shift_reg,\ ++ mvn_imm,mvn_reg,mvn_shift,mvn_shift_reg,\ ++ mrs")) + "cortex_a8_default") + + ;; Exceptions to the default latencies for data processing instructions. +@@ -139,22 +143,22 @@ + + (define_insn_reservation "cortex_a8_mul" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "insn" "mul,smulxy,smmul")) ++ (eq_attr "type" "mul,smulxy,smmul")) + "cortex_a8_multiply_2") + + (define_insn_reservation "cortex_a8_mla" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "insn" "mla,smlaxy,smlawy,smmla,smlad,smlsd")) ++ (eq_attr "type" "mla,smlaxy,smlawy,smmla,smlad,smlsd")) + "cortex_a8_multiply_2") + + (define_insn_reservation "cortex_a8_mull" 7 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "insn" "smull,umull,smlal,umlal,umaal,smlalxy")) ++ (eq_attr "type" "smull,umull,smlal,umlal,umaal,smlalxy")) + "cortex_a8_multiply_3") + + (define_insn_reservation "cortex_a8_smulwy" 5 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "insn" "smulwy,smuad,smusd")) ++ (eq_attr "type" "smulwy,smuad,smusd")) + "cortex_a8_multiply") + + ;; smlald and smlsld are multiply-accumulate instructions but do not +@@ -162,7 +166,7 @@ + ;; cannot go in cortex_a8_mla above. (See below for bypass details.) + (define_insn_reservation "cortex_a8_smlald" 6 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "insn" "smlald,smlsld")) ++ (eq_attr "type" "smlald,smlsld")) + "cortex_a8_multiply_2") + + ;; A multiply with a single-register result or an MLA, followed by an +--- a/src/gcc/config/arm/arm-fixed.md ++++ b/src/gcc/config/arm/arm-fixed.md +@@ -19,12 +19,14 @@ + ;; This file contains ARM instructions that support fixed-point operations. + + (define_insn "add3" +- [(set (match_operand:FIXED 0 "s_register_operand" "=r") +- (plus:FIXED (match_operand:FIXED 1 "s_register_operand" "r") +- (match_operand:FIXED 2 "s_register_operand" "r")))] ++ [(set (match_operand:FIXED 0 "s_register_operand" "=l,r") ++ (plus:FIXED (match_operand:FIXED 1 "s_register_operand" "l,r") ++ (match_operand:FIXED 2 "s_register_operand" "l,r")))] + "TARGET_32BIT" + "add%?\\t%0, %1, %2" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "yes,no") ++ (set_attr "type" "alu_reg")]) + + (define_insn "add3" + [(set (match_operand:ADDSUB 0 "s_register_operand" "=r") +@@ -32,7 +34,9 @@ + (match_operand:ADDSUB 2 "s_register_operand" "r")))] + "TARGET_INT_SIMD" + "sadd%?\\t%0, %1, %2" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "alu_reg")]) + + (define_insn "usadd3" + [(set (match_operand:UQADDSUB 0 "s_register_operand" "=r") +@@ -40,7 +44,9 @@ + (match_operand:UQADDSUB 2 "s_register_operand" "r")))] + "TARGET_INT_SIMD" + "uqadd%?\\t%0, %1, %2" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "alu_reg")]) + + (define_insn "ssadd3" + [(set (match_operand:QADDSUB 0 "s_register_operand" "=r") +@@ -48,15 +54,19 @@ + (match_operand:QADDSUB 2 "s_register_operand" "r")))] + "TARGET_INT_SIMD" + "qadd%?\\t%0, %1, %2" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "alu_reg")]) + + (define_insn "sub3" +- [(set (match_operand:FIXED 0 "s_register_operand" "=r") +- (minus:FIXED (match_operand:FIXED 1 "s_register_operand" "r") +- (match_operand:FIXED 2 "s_register_operand" "r")))] ++ [(set (match_operand:FIXED 0 "s_register_operand" "=l,r") ++ (minus:FIXED (match_operand:FIXED 1 "s_register_operand" "l,r") ++ (match_operand:FIXED 2 "s_register_operand" "l,r")))] + "TARGET_32BIT" + "sub%?\\t%0, %1, %2" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "yes,no") ++ (set_attr "type" "alu_reg")]) + + (define_insn "sub3" + [(set (match_operand:ADDSUB 0 "s_register_operand" "=r") +@@ -64,7 +74,9 @@ + (match_operand:ADDSUB 2 "s_register_operand" "r")))] + "TARGET_INT_SIMD" + "ssub%?\\t%0, %1, %2" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "alu_reg")]) + + (define_insn "ussub3" + [(set (match_operand:UQADDSUB 0 "s_register_operand" "=r") +@@ -73,7 +85,9 @@ + (match_operand:UQADDSUB 2 "s_register_operand" "r")))] + "TARGET_INT_SIMD" + "uqsub%?\\t%0, %1, %2" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "alu_reg")]) + + (define_insn "sssub3" + [(set (match_operand:QADDSUB 0 "s_register_operand" "=r") +@@ -81,7 +95,9 @@ + (match_operand:QADDSUB 2 "s_register_operand" "r")))] + "TARGET_INT_SIMD" + "qsub%?\\t%0, %1, %2" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "alu_reg")]) + + ;; Fractional multiplies. + +@@ -96,7 +112,7 @@ + rtx tmp1 = gen_reg_rtx (HImode); + rtx tmp2 = gen_reg_rtx (HImode); + rtx tmp3 = gen_reg_rtx (SImode); +- ++ + emit_insn (gen_extendqihi2 (tmp1, gen_lowpart (QImode, operands[1]))); + emit_insn (gen_extendqihi2 (tmp2, gen_lowpart (QImode, operands[2]))); + emit_insn (gen_mulhisi3 (tmp3, tmp1, tmp2)); +@@ -132,7 +148,7 @@ + rtx tmp1 = gen_reg_rtx (DImode); + rtx tmp2 = gen_reg_rtx (SImode); + rtx tmp3 = gen_reg_rtx (SImode); +- ++ + /* s.31 * s.31 -> s.62 multiplication. */ + emit_insn (gen_mulsidi3 (tmp1, gen_lowpart (SImode, operands[1]), + gen_lowpart (SImode, operands[2]))); +@@ -154,7 +170,7 @@ + rtx tmp1 = gen_reg_rtx (DImode); + rtx tmp2 = gen_reg_rtx (SImode); + rtx tmp3 = gen_reg_rtx (SImode); +- ++ + emit_insn (gen_mulsidi3 (tmp1, gen_lowpart (SImode, operands[1]), + gen_lowpart (SImode, operands[2]))); + emit_insn (gen_lshrsi3 (tmp2, gen_lowpart (SImode, tmp1), GEN_INT (15))); +@@ -173,13 +189,13 @@ + rtx tmp1 = gen_reg_rtx (DImode); + rtx tmp2 = gen_reg_rtx (SImode); + rtx tmp3 = gen_reg_rtx (SImode); +- ++ + emit_insn (gen_umulsidi3 (tmp1, gen_lowpart (SImode, operands[1]), + gen_lowpart (SImode, operands[2]))); + emit_insn (gen_lshrsi3 (tmp2, gen_lowpart (SImode, tmp1), GEN_INT (16))); + emit_insn (gen_ashlsi3 (tmp3, gen_highpart (SImode, tmp1), GEN_INT (16))); + emit_insn (gen_iorsi3 (gen_lowpart (SImode, operands[0]), tmp2, tmp3)); +- ++ + DONE; + }) + +@@ -209,7 +225,7 @@ + } + + /* We have: +- 31 high word 0 31 low word 0 ++ 31 high word 0 31 low word 0 + + [ S i i .... i i i ] [ i f f f ... f f ] + | +@@ -221,17 +237,29 @@ + output_asm_insn ("ssat\\t%R3, #15, %R3", operands); + output_asm_insn ("mrs\\t%4, APSR", operands); + output_asm_insn ("tst\\t%4, #1<<27", operands); +- if (TARGET_THUMB2) +- output_asm_insn ("it\\tne", operands); +- output_asm_insn ("mvnne\\t%Q3, %R3, asr #32", operands); ++ if (arm_restrict_it) ++ { ++ output_asm_insn ("mvn\\t%4, %R3, asr #32", operands); ++ output_asm_insn ("it\\tne", operands); ++ output_asm_insn ("movne\\t%Q3, %4", operands); ++ } ++ else ++ { ++ if (TARGET_THUMB2) ++ output_asm_insn ("it\\tne", operands); ++ output_asm_insn ("mvnne\\t%Q3, %R3, asr #32", operands); ++ } + output_asm_insn ("mov\\t%0, %Q3, lsr #15", operands); + output_asm_insn ("orr\\t%0, %0, %R3, asl #17", operands); + return ""; + } + [(set_attr "conds" "clob") ++ (set_attr "type" "multiple") + (set (attr "length") + (if_then_else (eq_attr "is_thumb" "yes") +- (const_int 38) ++ (if_then_else (match_test "arm_restrict_it") ++ (const_int 40) ++ (const_int 38)) + (const_int 32)))]) + + ;; Same goes for this. +@@ -257,7 +285,7 @@ + } + + /* We have: +- 31 high word 0 31 low word 0 ++ 31 high word 0 31 low word 0 + + [ i i i .... i i i ] [ f f f f ... f f ] + | +@@ -269,17 +297,29 @@ + output_asm_insn ("usat\\t%R3, #16, %R3", operands); + output_asm_insn ("mrs\\t%4, APSR", operands); + output_asm_insn ("tst\\t%4, #1<<27", operands); +- if (TARGET_THUMB2) +- output_asm_insn ("it\\tne", operands); +- output_asm_insn ("sbfxne\\t%Q3, %R3, #15, #1", operands); ++ if (arm_restrict_it) ++ { ++ output_asm_insn ("sbfx\\t%4, %R3, #15, #1", operands); ++ output_asm_insn ("it\\tne", operands); ++ output_asm_insn ("movne\\t%Q3, %4", operands); ++ } ++ else ++ { ++ if (TARGET_THUMB2) ++ output_asm_insn ("it\\tne", operands); ++ output_asm_insn ("sbfxne\\t%Q3, %R3, #15, #1", operands); ++ } + output_asm_insn ("lsr\\t%0, %Q3, #16", operands); + output_asm_insn ("orr\\t%0, %0, %R3, asl #16", operands); + return ""; + } + [(set_attr "conds" "clob") ++ (set_attr "type" "multiple") + (set (attr "length") + (if_then_else (eq_attr "is_thumb" "yes") +- (const_int 38) ++ (if_then_else (match_test "arm_restrict_it") ++ (const_int 40) ++ (const_int 38)) + (const_int 32)))]) + + (define_expand "mulha3" +@@ -289,7 +329,7 @@ + "TARGET_DSP_MULTIPLY && arm_arch_thumb2" + { + rtx tmp = gen_reg_rtx (SImode); +- ++ + emit_insn (gen_mulhisi3 (tmp, gen_lowpart (HImode, operands[1]), + gen_lowpart (HImode, operands[2]))); + emit_insn (gen_extv (gen_lowpart (SImode, operands[0]), tmp, GEN_INT (16), +@@ -307,7 +347,7 @@ + rtx tmp1 = gen_reg_rtx (SImode); + rtx tmp2 = gen_reg_rtx (SImode); + rtx tmp3 = gen_reg_rtx (SImode); +- ++ + /* 8.8 * 8.8 -> 16.16 multiply. */ + emit_insn (gen_zero_extendhisi2 (tmp1, gen_lowpart (HImode, operands[1]))); + emit_insn (gen_zero_extendhisi2 (tmp2, gen_lowpart (HImode, operands[2]))); +@@ -326,7 +366,7 @@ + { + rtx tmp = gen_reg_rtx (SImode); + rtx rshift; +- ++ + emit_insn (gen_mulhisi3 (tmp, gen_lowpart (HImode, operands[1]), + gen_lowpart (HImode, operands[2]))); + +@@ -348,12 +388,12 @@ + rtx tmp2 = gen_reg_rtx (SImode); + rtx tmp3 = gen_reg_rtx (SImode); + rtx rshift_tmp = gen_reg_rtx (SImode); +- ++ + /* Note: there's no smul[bt][bt] equivalent for unsigned multiplies. Use a + normal 32x32->32-bit multiply instead. */ + emit_insn (gen_zero_extendhisi2 (tmp1, gen_lowpart (HImode, operands[1]))); + emit_insn (gen_zero_extendhisi2 (tmp2, gen_lowpart (HImode, operands[2]))); +- ++ + emit_insn (gen_mulsi3 (tmp3, tmp1, tmp2)); + + /* The operand to "usat" is signed, so we cannot use the "..., asr #8" +@@ -374,9 +414,9 @@ + "TARGET_32BIT && arm_arch6" + "ssat%?\\t%0, #16, %2%S1" + [(set_attr "predicable" "yes") +- (set_attr "insn" "sat") ++ (set_attr "predicable_short_it" "no") + (set_attr "shift" "1") +- (set_attr "type" "alu_shift")]) ++ (set_attr "type" "alu_shift_imm")]) + + (define_insn "arm_usatsihi" + [(set (match_operand:HI 0 "s_register_operand" "=r") +@@ -384,4 +424,6 @@ + "TARGET_INT_SIMD" + "usat%?\\t%0, #16, %1" + [(set_attr "predicable" "yes") +- (set_attr "insn" "sat")]) ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "alu_imm")] ++) +--- a/src/gcc/config/arm/crypto.def ++++ b/src/gcc/config/arm/crypto.def +@@ -0,0 +1,34 @@ ++/* Cryptographic instruction builtin definitions. ++ Copyright (C) 2013-2014 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++CRYPTO2 (aesd, AESD, v16uqi, v16uqi, v16uqi) ++CRYPTO2 (aese, AESE, v16uqi, v16uqi, v16uqi) ++CRYPTO1 (aesimc, AESIMC, v16uqi, v16uqi) ++CRYPTO1 (aesmc, AESMC, v16uqi, v16uqi) ++CRYPTO1 (sha1h, SHA1H, v4usi, v4usi) ++CRYPTO2 (sha1su1, SHA1SU1, v4usi, v4usi, v4usi) ++CRYPTO2 (sha256su0, SHA256SU0, v4usi, v4usi, v4usi) ++CRYPTO3 (sha1c, SHA1C, v4usi, v4usi, v4usi, v4usi) ++CRYPTO3 (sha1m, SHA1M, v4usi, v4usi, v4usi, v4usi) ++CRYPTO3 (sha1p, SHA1P, v4usi, v4usi, v4usi, v4usi) ++CRYPTO3 (sha1su0, SHA1SU0, v4usi, v4usi, v4usi, v4usi) ++CRYPTO3 (sha256h, SHA256H, v4usi, v4usi, v4usi, v4usi) ++CRYPTO3 (sha256h2, SHA256H2, v4usi, v4usi, v4usi, v4usi) ++CRYPTO3 (sha256su1, SHA256SU1, v4usi, v4usi, v4usi, v4usi) ++CRYPTO2 (vmullp64, VMULLP64, uti, udi, udi) +--- a/src/gcc/config/arm/unspecs.md ++++ b/src/gcc/config/arm/unspecs.md +@@ -139,6 +139,10 @@ + VUNSPEC_ATOMIC_OP ; Represent an atomic operation. + VUNSPEC_LL ; Represent a load-register-exclusive. + VUNSPEC_SC ; Represent a store-register-exclusive. ++ VUNSPEC_LAX ; Represent a load-register-acquire-exclusive. ++ VUNSPEC_SLX ; Represent a store-register-release-exclusive. ++ VUNSPEC_LDA ; Represent a store-register-acquire. ++ VUNSPEC_STL ; Represent a store-register-release. + ]) + + ;; Enumerators for NEON unspecs. +@@ -145,6 +149,27 @@ + (define_c_enum "unspec" [ + UNSPEC_ASHIFT_SIGNED + UNSPEC_ASHIFT_UNSIGNED ++ UNSPEC_CRC32B ++ UNSPEC_CRC32H ++ UNSPEC_CRC32W ++ UNSPEC_CRC32CB ++ UNSPEC_CRC32CH ++ UNSPEC_CRC32CW ++ UNSPEC_AESD ++ UNSPEC_AESE ++ UNSPEC_AESIMC ++ UNSPEC_AESMC ++ UNSPEC_SHA1C ++ UNSPEC_SHA1M ++ UNSPEC_SHA1P ++ UNSPEC_SHA1H ++ UNSPEC_SHA1SU0 ++ UNSPEC_SHA1SU1 ++ UNSPEC_SHA256H ++ UNSPEC_SHA256H2 ++ UNSPEC_SHA256SU0 ++ UNSPEC_SHA256SU1 ++ UNSPEC_VMULLP64 + UNSPEC_LOAD_COUNT + UNSPEC_VABD + UNSPEC_VABDL +--- a/src/gcc/config/arm/cortex-m4.md ++++ b/src/gcc/config/arm/cortex-m4.md +@@ -31,7 +31,20 @@ + ;; ALU and multiply is one cycle. + (define_insn_reservation "cortex_m4_alu" 1 + (and (eq_attr "tune" "cortexm4") +- (eq_attr "type" "alu_reg,simple_alu_imm,simple_alu_shift,alu_shift,alu_shift_reg,mult")) ++ (ior (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,extend,\ ++ alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_imm,mov_reg,mov_shift,mov_shift_reg,\ ++ mvn_imm,mvn_reg,mvn_shift,mvn_shift_reg,\ ++ mrs,multiple,no_insn") ++ (ior (eq_attr "mul32" "yes") ++ (eq_attr "mul64" "yes")))) + "cortex_m4_ex") + + ;; Byte, half-word and word load is two cycles. +--- a/src/gcc/config/arm/linux-eabi.h ++++ b/src/gcc/config/arm/linux-eabi.h +@@ -84,10 +84,14 @@ + LINUX_OR_ANDROID_LD (LINUX_TARGET_LINK_SPEC, \ + LINUX_TARGET_LINK_SPEC " " ANDROID_LINK_SPEC) + ++#undef ASAN_CC1_SPEC ++#define ASAN_CC1_SPEC "%{fsanitize=*:-funwind-tables}" ++ + #undef CC1_SPEC + #define CC1_SPEC \ +- LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC, \ +- GNU_USER_TARGET_CC1_SPEC " " ANDROID_CC1_SPEC) ++ LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \ ++ GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \ ++ ANDROID_CC1_SPEC) + + #define CC1PLUS_SPEC \ + LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC) +@@ -95,7 +99,7 @@ + #undef LIB_SPEC + #define LIB_SPEC \ + LINUX_OR_ANDROID_LD (GNU_USER_TARGET_LIB_SPEC, \ +- GNU_USER_TARGET_LIB_SPEC " " ANDROID_LIB_SPEC) ++ GNU_USER_TARGET_NO_PTHREADS_LIB_SPEC " " ANDROID_LIB_SPEC) + + #undef STARTFILE_SPEC + #define STARTFILE_SPEC \ +--- a/src/gcc/config/arm/arm-cores.def ++++ b/src/gcc/config/arm/arm-cores.def +@@ -129,9 +129,11 @@ + ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex) + ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9) + ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15) ++ARM_CORE("cortex-a53", cortexa53, 8A, FL_LDSCHED, cortex) + ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex) + ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex) + ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex) ++ARM_CORE("cortex-r7", cortexr7, 7R, FL_LDSCHED | FL_ARM_DIV, cortex) + ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, cortex) + ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, cortex) + ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, v6m) +--- a/src/gcc/config/arm/cortex-r4.md ++++ b/src/gcc/config/arm/cortex-r4.md +@@ -78,24 +78,31 @@ + ;; for the purposes of the dual-issue constraints above. + (define_insn_reservation "cortex_r4_alu" 2 + (and (eq_attr "tune_cortexr4" "yes") +- (and (eq_attr "type" "alu_reg,simple_alu_imm") +- (not (eq_attr "insn" "mov")))) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,mvn_imm,mvn_reg")) + "cortex_r4_alu") + + (define_insn_reservation "cortex_r4_mov" 2 + (and (eq_attr "tune_cortexr4" "yes") +- (and (eq_attr "type" "alu_reg,simple_alu_imm") +- (eq_attr "insn" "mov"))) ++ (eq_attr "type" "mov_imm,mov_reg")) + "cortex_r4_mov") + + (define_insn_reservation "cortex_r4_alu_shift" 2 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "simple_alu_shift,alu_shift")) ++ (eq_attr "type" "alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ extend,mov_shift,mvn_shift")) + "cortex_r4_alu") + + (define_insn_reservation "cortex_r4_alu_shift_reg" 2 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "alu_shift_reg")) ++ (eq_attr "type" "alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_shift_reg,mvn_shift_reg,\ ++ mrs,multiple,no_insn")) + "cortex_r4_alu_shift_reg") + + ;; An ALU instruction followed by an ALU instruction with no early dep. +@@ -128,32 +135,32 @@ + + (define_insn_reservation "cortex_r4_mul_4" 4 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "insn" "mul,smmul")) ++ (eq_attr "type" "mul,smmul")) + "cortex_r4_mul_2") + + (define_insn_reservation "cortex_r4_mul_3" 3 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "insn" "smulxy,smulwy,smuad,smusd")) ++ (eq_attr "type" "smulxy,smulwy,smuad,smusd")) + "cortex_r4_mul") + + (define_insn_reservation "cortex_r4_mla_4" 4 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "insn" "mla,smmla")) ++ (eq_attr "type" "mla,smmla")) + "cortex_r4_mul_2") + + (define_insn_reservation "cortex_r4_mla_3" 3 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "insn" "smlaxy,smlawy,smlad,smlsd")) ++ (eq_attr "type" "smlaxy,smlawy,smlad,smlsd")) + "cortex_r4_mul") + + (define_insn_reservation "cortex_r4_smlald" 3 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "insn" "smlald,smlsld")) ++ (eq_attr "type" "smlald,smlsld")) + "cortex_r4_mul") + + (define_insn_reservation "cortex_r4_mull" 4 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "insn" "smull,umull,umlal,umaal")) ++ (eq_attr "type" "smull,umull,umlal,umaal")) + "cortex_r4_mul_2") + + ;; A multiply or an MLA with a single-register result, followed by an +@@ -196,12 +203,12 @@ + ;; This gives a latency of nine for udiv and ten for sdiv. + (define_insn_reservation "cortex_r4_udiv" 9 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "insn" "udiv")) ++ (eq_attr "type" "udiv")) + "cortex_r4_div_9") + + (define_insn_reservation "cortex_r4_sdiv" 10 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "insn" "sdiv")) ++ (eq_attr "type" "sdiv")) + "cortex_r4_div_10") + + ;; Branches. We assume correct prediction. +--- a/src/gcc/config/arm/arm-tune.md ++++ b/src/gcc/config/arm/arm-tune.md +@@ -1,5 +1,5 @@ + ;; -*- buffer-read-only: t -*- + ;; Generated automatically by gentune.sh from arm-cores.def + (define_attr "tune" +- "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexr5,cortexm4,cortexm3,cortexm1,cortexm0,cortexm0plus,marvell_pj4" ++ "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexa53,cortexr4,cortexr4f,cortexr5,cortexr7,cortexm4,cortexm3,cortexm1,cortexm0,cortexm0plus,marvell_pj4" + (const (symbol_ref "((enum attr_tune) arm_tune)"))) +--- a/src/gcc/config/arm/arm_acle.h ++++ b/src/gcc/config/arm/arm_acle.h +@@ -0,0 +1,100 @@ ++/* ARM Non-NEON ACLE intrinsics include file. ++ ++ Copyright (C) 2013-2014 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ Under Section 7 of GPL version 3, you are granted additional ++ permissions described in the GCC Runtime Library Exception, version ++ 3.1, as published by the Free Software Foundation. ++ ++ You should have received a copy of the GNU General Public License and ++ a copy of the GCC Runtime Library Exception along with this program; ++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ . */ ++ ++#ifndef _GCC_ARM_ACLE_H ++#define _GCC_ARM_ACLE_H ++ ++#include ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#ifdef __ARM_FEATURE_CRC32 ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++__crc32b (uint32_t __a, uint8_t __b) ++{ ++ return __builtin_arm_crc32b (__a, __b); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++__crc32h (uint32_t __a, uint16_t __b) ++{ ++ return __builtin_arm_crc32h (__a, __b); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++__crc32w (uint32_t __a, uint32_t __b) ++{ ++ return __builtin_arm_crc32w (__a, __b); ++} ++ ++#ifdef __ARM_32BIT_STATE ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++__crc32d (uint32_t __a, uint64_t __b) ++{ ++ uint32_t __d; ++ ++ __d = __crc32w (__crc32w (__a, __b & 0xffffffffULL), __b >> 32); ++ return __d; ++} ++#endif ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++__crc32cb (uint32_t __a, uint8_t __b) ++{ ++ return __builtin_arm_crc32cb (__a, __b); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++__crc32ch (uint32_t __a, uint16_t __b) ++{ ++ return __builtin_arm_crc32ch (__a, __b); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++__crc32cw (uint32_t __a, uint32_t __b) ++{ ++ return __builtin_arm_crc32cw (__a, __b); ++} ++ ++#ifdef __ARM_32BIT_STATE ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++__crc32cd (uint32_t __a, uint64_t __b) ++{ ++ uint32_t __d; ++ ++ __d = __crc32cw (__crc32cw (__a, __b & 0xffffffffULL), __b >> 32); ++ return __d; ++} ++#endif ++ ++#endif ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif +--- a/src/gcc/config/arm/arm-protos.h ++++ b/src/gcc/config/arm/arm-protos.h +@@ -24,12 +24,13 @@ + + extern enum unwind_info_type arm_except_unwind_info (struct gcc_options *); + extern int use_return_insn (int, rtx); ++extern bool use_simple_return_p (void); + extern enum reg_class arm_regno_class (int); + extern void arm_load_pic_register (unsigned long); + extern int arm_volatile_func (void); + extern void arm_expand_prologue (void); + extern void arm_expand_epilogue (bool); +-extern void thumb2_expand_return (void); ++extern void thumb2_expand_return (bool); + extern const char *arm_strip_name_encoding (const char *); + extern void arm_asm_output_labelref (FILE *, const char *); + extern void thumb2_asm_output_opcode (FILE *); +@@ -79,6 +80,7 @@ + extern void neon_pairwise_reduce (rtx, rtx, enum machine_mode, + rtx (*) (rtx, rtx, rtx)); + extern rtx neon_make_constant (rtx); ++extern tree arm_builtin_vectorized_function (tree, tree, tree); + extern void neon_expand_vector_init (rtx, rtx); + extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT); + extern void neon_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT); +@@ -96,14 +98,6 @@ + extern int arm_coproc_mem_operand (rtx, bool); + extern int neon_vector_mem_operand (rtx, int); + extern int neon_struct_mem_operand (rtx); +-extern int arm_no_early_store_addr_dep (rtx, rtx); +-extern int arm_early_store_addr_dep (rtx, rtx); +-extern int arm_early_load_addr_dep (rtx, rtx); +-extern int arm_no_early_alu_shift_dep (rtx, rtx); +-extern int arm_no_early_alu_shift_value_dep (rtx, rtx); +-extern int arm_no_early_mul_dep (rtx, rtx); +-extern int arm_mac_accumulator_is_result (rtx, rtx); +-extern int arm_mac_accumulator_is_mul_result (rtx, rtx); + + extern int tls_mentioned_p (rtx); + extern int symbol_mentioned_p (rtx); +@@ -118,7 +112,9 @@ + extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *); + extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT); + extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool); ++extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool); + extern int arm_gen_movmemqi (rtx *); ++extern bool gen_movmem_ldrd_strd (rtx *); + extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx); + extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx, + HOST_WIDE_INT); +@@ -225,6 +221,8 @@ + + extern void arm_order_regs_for_local_alloc (void); + ++extern int arm_max_conditional_execute (); ++ + /* Vectorizer cost model implementation. */ + struct cpu_vec_costs { + const int scalar_stmt_cost; /* Cost of any scalar operation, excluding +@@ -254,8 +252,7 @@ + bool (*rtx_costs) (rtx, RTX_CODE, RTX_CODE, int *, bool); + bool (*sched_adjust_cost) (rtx, rtx, rtx, int *); + int constant_limit; +- /* Maximum number of instructions to conditionalise in +- arm_final_prescan_insn. */ ++ /* Maximum number of instructions to conditionalise. */ + int max_insns_skipped; + int num_prefetch_slots; + int l1_cache_size; +@@ -270,6 +267,8 @@ + bool logical_op_non_short_circuit[2]; + /* Vectorizer costs. */ + const struct cpu_vec_costs* vec_costs; ++ /* Prefer Neon for 64-bit bitops. */ ++ bool prefer_neon_for_64bits; + }; + + extern const struct tune_params *current_tune; +--- a/src/gcc/config/arm/vfp.md ++++ b/src/gcc/config/arm/vfp.md +@@ -18,31 +18,6 @@ + ;; along with GCC; see the file COPYING3. If not see + ;; . */ + +-;; The VFP "type" attributes differ from those used in the FPA model. +-;; fcpys Single precision cpy. +-;; ffariths Single precision abs, neg. +-;; ffarithd Double precision abs, neg, cpy. +-;; fadds Single precision add/sub. +-;; faddd Double precision add/sub. +-;; fconsts Single precision load immediate. +-;; fconstd Double precision load immediate. +-;; fcmps Single precision comparison. +-;; fcmpd Double precision comparison. +-;; fmuls Single precision multiply. +-;; fmuld Double precision multiply. +-;; fmacs Single precision multiply-accumulate. +-;; fmacd Double precision multiply-accumulate. +-;; ffmas Single precision fused multiply-accumulate. +-;; ffmad Double precision fused multiply-accumulate. +-;; fdivs Single precision sqrt or division. +-;; fdivd Double precision sqrt or division. +-;; f_flag fmstat operation +-;; f_load[sd] Floating point load from memory. +-;; f_store[sd] Floating point store to memory. +-;; f_2_r Transfer vfp to arm reg. +-;; r_2_f Transfer arm to vfp reg. +-;; f_cvt Convert floating<->integral +- + ;; SImode moves + ;; ??? For now do not allow loading constants into vfp regs. This causes + ;; problems because small constants get converted into adds. +@@ -78,9 +53,7 @@ + } + " + [(set_attr "predicable" "yes") +- (set_attr "type" "*,*,simple_alu_imm,simple_alu_imm,load1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores") +- (set_attr "neon_type" "*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,*,*") +- (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*") ++ (set_attr "type" "mov_reg,mov_reg,mvn_imm,mov_imm,load1,store1,f_mcr,f_mrc,fmov,f_loads,f_stores") + (set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*") + (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")] + ) +@@ -87,9 +60,12 @@ + + ;; See thumb2.md:thumb2_movsi_insn for an explanation of the split + ;; high/low register alternatives for loads and stores here. ++;; The l/Py alternative should come after r/I to ensure that the short variant ++;; is chosen with length 2 when the instruction is predicated for ++;; arm_restrict_it. + (define_insn "*thumb2_movsi_vfp" +- [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r, l,*hk,m, *m,*t, r,*t,*t, *Uv") +- (match_operand:SI 1 "general_operand" "rk, I,K,j,mi,*mi,l,*hk, r,*t,*t,*Uvi,*t"))] ++ [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,l,r,r, l,*hk,m, *m,*t, r,*t,*t, *Uv") ++ (match_operand:SI 1 "general_operand" "rk,I,Py,K,j,mi,*mi,l,*hk, r,*t,*t,*Uvi,*t"))] + "TARGET_THUMB2 && TARGET_VFP && TARGET_HARD_FLOAT + && ( s_register_operand (operands[0], SImode) + || s_register_operand (operands[1], SImode))" +@@ -96,25 +72,27 @@ + "* + switch (which_alternative) + { +- case 0: case 1: ++ case 0: ++ case 1: ++ case 2: + return \"mov%?\\t%0, %1\"; +- case 2: ++ case 3: + return \"mvn%?\\t%0, #%B1\"; +- case 3: ++ case 4: + return \"movw%?\\t%0, %1\"; +- case 4: + case 5: ++ case 6: + return \"ldr%?\\t%0, %1\"; +- case 6: + case 7: ++ case 8: + return \"str%?\\t%1, %0\"; +- case 8: ++ case 9: + return \"fmsr%?\\t%0, %1\\t%@ int\"; +- case 9: ++ case 10: + return \"fmrs%?\\t%0, %1\\t%@ int\"; +- case 10: ++ case 11: + return \"fcpys%?\\t%0, %1\\t%@ int\"; +- case 11: case 12: ++ case 12: case 13: + return output_move_vfp (operands); + default: + gcc_unreachable (); +@@ -121,11 +99,11 @@ + } + " + [(set_attr "predicable" "yes") +- (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores") +- (set_attr "neon_type" "*,*,*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,*,*") +- (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*,*,*") +- (set_attr "pool_range" "*,*,*,*,1018,4094,*,*,*,*,*,1018,*") +- (set_attr "neg_pool_range" "*,*,*,*, 0, 0,*,*,*,*,*,1008,*")] ++ (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no,no,no,no,no,no,no,no") ++ (set_attr "type" "mov_reg,mov_reg,mov_reg,mvn_reg,mov_reg,load1,load1,store1,store1,f_mcr,f_mrc,fmov,f_loads,f_stores") ++ (set_attr "length" "2,4,2,4,4,4,4,4,4,4,4,4,4,4") ++ (set_attr "pool_range" "*,*,*,*,*,1018,4094,*,*,*,*,*,1018,*") ++ (set_attr "neg_pool_range" "*,*,*,*,*, 0, 0,*,*,*,*,*,1008,*")] + ) + + +@@ -132,8 +110,8 @@ + ;; DImode moves + + (define_insn "*movdi_vfp" +- [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,r,w,w, Uv") +- (match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))] ++ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,q,q,m,w,r,w,w, Uv") ++ (match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,q,r,w,w,Uvi,w"))] + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune != cortexa8 + && ( register_operand (operands[0], DImode) + || register_operand (operands[1], DImode)) +@@ -166,8 +144,7 @@ + gcc_unreachable (); + } + " +- [(set_attr "type" "*,*,*,*,load2,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored") +- (set_attr "neon_type" "*,*,*,*,*,*,*,neon_mcr_2_mcrr,neon_mrrc,neon_vmov,*,*") ++ [(set_attr "type" "multiple,multiple,multiple,multiple,load2,load2,store2,f_mcrr,f_mrrc,ffarithd,f_loadd,f_stored") + (set (attr "length") (cond [(eq_attr "alternative" "1,4,5,6") (const_int 8) + (eq_attr "alternative" "2") (const_int 12) + (eq_attr "alternative" "3") (const_int 16) +@@ -215,8 +192,7 @@ + gcc_unreachable (); + } + " +- [(set_attr "type" "*,*,*,*,load2,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored") +- (set_attr "neon_type" "*,*,*,*,*,*,*,neon_mcr_2_mcrr,neon_mrrc,neon_vmov,*,*") ++ [(set_attr "type" "multiple,multiple,multiple,multiple,load2,load2,store2,f_mcrr,f_mrrc,ffarithd,f_loadd,f_stored") + (set (attr "length") (cond [(eq_attr "alternative" "1") (const_int 8) + (eq_attr "alternative" "2") (const_int 12) + (eq_attr "alternative" "3") (const_int 16) +@@ -284,8 +260,8 @@ + } + " + [(set_attr "conds" "unconditional") +- (set_attr "type" "*,*,load1,store1,fcpys,*,r_2_f,f_2_r,*") +- (set_attr "neon_type" "neon_vld1_1_2_regs,neon_vst1_1_2_regs_vst2_2_regs,*,*,*,*,*,*,*") ++ (set_attr "type" "neon_load1_1reg,neon_store1_1reg,\ ++ load1,store1,fmov,mov_reg,f_mcr,f_mrc,multiple") + (set_attr "length" "4,4,4,4,4,4,4,4,8")] + ) + +@@ -335,7 +311,7 @@ + } + " + [(set_attr "conds" "unconditional") +- (set_attr "type" "load1,store1,fcpys,*,r_2_f,f_2_r,*") ++ (set_attr "type" "load1,store1,fmov,mov_reg,f_mcr,f_mrc,multiple") + (set_attr "length" "4,4,4,4,4,4,8")] + ) + +@@ -375,9 +351,7 @@ + " + [(set_attr "predicable" "yes") + (set_attr "type" +- "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*") +- (set_attr "neon_type" "neon_mcr,neon_mrc,*,*,*,*,*,neon_vmov,*") +- (set_attr "insn" "*,*,*,*,*,*,*,*,mov") ++ "f_mcr,f_mrc,fconsts,f_loads,f_stores,load1,store1,fmov,mov_reg") + (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*") + (set_attr "neg_pool_range" "*,*,*,1008,*,4080,*,*,*")] + ) +@@ -412,15 +386,13 @@ + } + " + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" +- "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*") +- (set_attr "neon_type" "neon_mcr,neon_mrc,*,*,*,*,*,neon_vmov,*") +- (set_attr "insn" "*,*,*,*,*,*,*,*,mov") ++ "f_mcr,f_mrc,fconsts,f_loads,f_stores,load1,store1,fmov,mov_reg") + (set_attr "pool_range" "*,*,*,1018,*,4090,*,*,*") + (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] + ) + +- + ;; DFmode moves + + (define_insn "*movdf_vfp" +@@ -456,9 +428,8 @@ + } + } + " +- [(set_attr "type" +- "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*") +- (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*") ++ [(set_attr "type" "f_mcrr,f_mrrc,fconstd,f_loadd,f_stored,\ ++ load2,store2,ffarithd,multiple") + (set (attr "length") (cond [(eq_attr "alternative" "5,6,8") (const_int 8) + (eq_attr "alternative" "7") + (if_then_else +@@ -502,9 +473,8 @@ + } + } + " +- [(set_attr "type" +- "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*") +- (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*") ++ [(set_attr "type" "f_mcrr,f_mrrc,fconstd,f_loadd,\ ++ f_stored,load2,store2,ffarithd,multiple") + (set (attr "length") (cond [(eq_attr "alternative" "5,6,8") (const_int 8) + (eq_attr "alternative" "7") + (if_then_else +@@ -539,8 +509,7 @@ + fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1" + [(set_attr "conds" "use") + (set_attr "length" "4,4,8,4,4,8,4,4,8") +- (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r") +- (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr,neon_mcr,neon_mcr,neon_mrc,neon_mrc,neon_mrc")] ++ (set_attr "type" "fmov,fmov,fmov,f_mcr,f_mcr,f_mcr,f_mrc,f_mrc,f_mrc")] + ) + + (define_insn "*thumb2_movsfcc_vfp" +@@ -550,7 +519,7 @@ + [(match_operand 4 "cc_register" "") (const_int 0)]) + (match_operand:SF 1 "s_register_operand" "0,t,t,0,?r,?r,0,t,t") + (match_operand:SF 2 "s_register_operand" "t,0,t,?r,0,?r,t,0,t")))] +- "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP" ++ "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP && !arm_restrict_it" + "@ + it\\t%D3\;fcpys%D3\\t%0, %2 + it\\t%d3\;fcpys%d3\\t%0, %1 +@@ -563,8 +532,7 @@ + ite\\t%D3\;fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1" + [(set_attr "conds" "use") + (set_attr "length" "6,6,10,6,6,10,6,6,10") +- (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r") +- (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr,neon_mcr,neon_mcr,neon_mrc,neon_mrc,neon_mrc")] ++ (set_attr "type" "fmov,fmov,fmov,f_mcr,f_mcr,f_mcr,f_mrc,f_mrc,f_mrc")] + ) + + (define_insn "*movdfcc_vfp" +@@ -587,8 +555,7 @@ + fmrrd%D3\\t%Q0, %R0, %P2\;fmrrd%d3\\t%Q0, %R0, %P1" + [(set_attr "conds" "use") + (set_attr "length" "4,4,8,4,4,8,4,4,8") +- (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r") +- (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mrrc,neon_mrrc,neon_mrrc")] ++ (set_attr "type" "ffarithd,ffarithd,ffarithd,f_mcr,f_mcr,f_mcr,f_mrrc,f_mrrc,f_mrrc")] + ) + + (define_insn "*thumb2_movdfcc_vfp" +@@ -598,7 +565,7 @@ + [(match_operand 4 "cc_register" "") (const_int 0)]) + (match_operand:DF 1 "s_register_operand" "0,w,w,0,?r,?r,0,w,w") + (match_operand:DF 2 "s_register_operand" "w,0,w,?r,0,?r,w,0,w")))] +- "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" ++ "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE && !arm_restrict_it" + "@ + it\\t%D3\;fcpyd%D3\\t%P0, %P2 + it\\t%d3\;fcpyd%d3\\t%P0, %P1 +@@ -611,8 +578,7 @@ + ite\\t%D3\;fmrrd%D3\\t%Q0, %R0, %P2\;fmrrd%d3\\t%Q0, %R0, %P1" + [(set_attr "conds" "use") + (set_attr "length" "6,6,10,6,6,10,6,6,10") +- (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r") +- (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mrrc,neon_mrrc,neon_mrrc")] ++ (set_attr "type" "ffarithd,ffarithd,ffarithd,f_mcr,f_mcr,f_mcrr,f_mrrc,f_mrrc,f_mrrc")] + ) + + +@@ -624,6 +590,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fabss%?\\t%0, %1" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "ffariths")] + ) + +@@ -633,6 +600,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fabsd%?\\t%P0, %P1" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "ffarithd")] + ) + +@@ -644,6 +612,7 @@ + fnegs%?\\t%0, %1 + eor%?\\t%0, %1, #-2147483648" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "ffariths")] + ) + +@@ -689,6 +658,7 @@ + } + " + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "length" "4,4,8") + (set_attr "type" "ffarithd")] + ) +@@ -703,6 +673,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fadds%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fadds")] + ) + +@@ -713,6 +684,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "faddd%?\\t%P0, %P1, %P2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "faddd")] + ) + +@@ -724,6 +696,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fsubs%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fadds")] + ) + +@@ -734,6 +707,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fsubd%?\\t%P0, %P1, %P2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "faddd")] + ) + +@@ -747,6 +721,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fdivs%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fdivs")] + ) + +@@ -757,6 +732,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fdivd%?\\t%P0, %P1, %P2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fdivd")] + ) + +@@ -770,6 +746,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fmuls%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmuls")] + ) + +@@ -780,6 +757,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fmuld%?\\t%P0, %P1, %P2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmuld")] + ) + +@@ -790,6 +768,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fnmuls%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmuls")] + ) + +@@ -800,6 +779,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fnmuld%?\\t%P0, %P1, %P2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmuld")] + ) + +@@ -815,6 +795,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fmacs%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmacs")] + ) + +@@ -826,6 +807,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fmacd%?\\t%P0, %P2, %P3" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmacd")] + ) + +@@ -838,6 +820,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fmscs%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmacs")] + ) + +@@ -849,6 +832,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fmscd%?\\t%P0, %P2, %P3" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmacd")] + ) + +@@ -861,6 +845,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fnmacs%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmacs")] + ) + +@@ -872,6 +857,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fnmacd%?\\t%P0, %P2, %P3" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmacd")] + ) + +@@ -886,6 +872,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fnmscs%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmacs")] + ) + +@@ -898,6 +885,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fnmscd%?\\t%P0, %P2, %P3" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fmacd")] + ) + +@@ -911,6 +899,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA" + "vfma%?.\\t%0, %1, %2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "ffma")] + ) + +@@ -923,6 +912,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA" + "vfms%?.\\t%0, %1, %2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "ffma")] + ) + +@@ -934,6 +924,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA" + "vfnms%?.\\t%0, %1, %2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "ffma")] + ) + +@@ -946,6 +937,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA" + "vfnma%?.\\t%0, %1, %2" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "ffma")] + ) + +@@ -958,6 +950,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fcvtds%?\\t%P0, %1" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "f_cvt")] + ) + +@@ -967,6 +960,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fcvtsd%?\\t%0, %P1" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "f_cvt")] + ) + +@@ -976,6 +970,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FP16" + "vcvtb%?.f32.f16\\t%0, %1" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "f_cvt")] + ) + +@@ -985,6 +980,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FP16" + "vcvtb%?.f16.f32\\t%0, %1" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "f_cvt")] + ) + +@@ -994,7 +990,8 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "ftosizs%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "type" "f_cvt")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "f_cvtf2i")] + ) + + (define_insn "*truncsidf2_vfp" +@@ -1003,7 +1000,8 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "ftosizd%?\\t%0, %P1" + [(set_attr "predicable" "yes") +- (set_attr "type" "f_cvt")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "f_cvtf2i")] + ) + + +@@ -1013,7 +1011,8 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "ftouizs%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "type" "f_cvt")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "f_cvtf2i")] + ) + + (define_insn "fixuns_truncdfsi2" +@@ -1022,7 +1021,8 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "ftouizd%?\\t%0, %P1" + [(set_attr "predicable" "yes") +- (set_attr "type" "f_cvt")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "f_cvtf2i")] + ) + + +@@ -1032,7 +1032,8 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fsitos%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "type" "f_cvt")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "f_cvti2f")] + ) + + (define_insn "*floatsidf2_vfp" +@@ -1041,7 +1042,8 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fsitod%?\\t%P0, %1" + [(set_attr "predicable" "yes") +- (set_attr "type" "f_cvt")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "f_cvti2f")] + ) + + +@@ -1051,7 +1053,8 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fuitos%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "type" "f_cvt")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "f_cvti2f")] + ) + + (define_insn "floatunssidf2" +@@ -1060,7 +1063,8 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fuitod%?\\t%P0, %1" + [(set_attr "predicable" "yes") +- (set_attr "type" "f_cvt")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "f_cvti2f")] + ) + + +@@ -1072,7 +1076,8 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP" + "fsqrts%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "type" "fdivs")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "fsqrts")] + ) + + (define_insn "*sqrtdf2_vfp" +@@ -1081,7 +1086,8 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" + "fsqrtd%?\\t%P0, %P1" + [(set_attr "predicable" "yes") +- (set_attr "type" "fdivd")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "fsqrtd")] + ) + + +@@ -1168,6 +1174,7 @@ + fcmps%?\\t%0, %1 + fcmpzs%?\\t%0" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fcmps")] + ) + +@@ -1180,6 +1187,7 @@ + fcmpes%?\\t%0, %1 + fcmpezs%?\\t%0" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fcmps")] + ) + +@@ -1192,6 +1200,7 @@ + fcmpd%?\\t%P0, %P1 + fcmpzd%?\\t%P0" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fcmpd")] + ) + +@@ -1204,6 +1213,7 @@ + fcmped%?\\t%P0, %P1 + fcmpezd%?\\t%P0" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "type" "fcmpd")] + ) + +@@ -1219,7 +1229,7 @@ + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP3 && !flag_rounding_math" + "vcvt%?.f32.\\t%0, %1, %v2" + [(set_attr "predicable" "yes") +- (set_attr "type" "f_cvt")] ++ (set_attr "type" "f_cvti2f")] + ) + + ;; Not the ideal way of implementing this. Ideally we would be able to split +@@ -1237,7 +1247,7 @@ + vmov%?.f64\\t%P0, %1, %1\;vcvt%?.f64.\\t%P0, %P0, %v2" + [(set_attr "predicable" "yes") + (set_attr "ce_count" "2") +- (set_attr "type" "f_cvt") ++ (set_attr "type" "f_cvti2f") + (set_attr "length" "8")] + ) + +@@ -1264,6 +1274,7 @@ + "TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 " + "vrint%?.\\t%0, %1" + [(set_attr "predicable" "") ++ (set_attr "predicable_short_it" "no") + (set_attr "conds" "") + (set_attr "type" "f_rint")] + ) +--- a/src/gcc/config/arm/t-linux-eabi ++++ b/src/gcc/config/arm/t-linux-eabi +@@ -18,6 +18,8 @@ + + # We do not build a Thumb multilib for Linux because the definition of + # CLEAR_INSN_CACHE in linux-gas.h does not work in Thumb mode. ++# If you set MULTILIB_OPTIONS to a non-empty value you should also set ++# MULTILIB_DEFAULTS in linux-elf.h. + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + +--- a/src/gcc/config/arm/neon.md ++++ b/src/gcc/config/arm/neon.md +@@ -20,7 +20,7 @@ + + + ;; Attribute used to permit string comparisons against in +-;; neon_type attribute definitions. ++;; type attribute definitions. + (define_attr "vqh_mnem" "vadd,vmin,vmax" (const_string "vadd")) + + (define_insn "*neon_mov" +@@ -60,9 +60,9 @@ + default: return output_move_double (operands, true, NULL); + } + } +- [(set_attr "neon_type" "neon_int_1,*,neon_vmov,*,neon_mrrc,neon_mcr_2_mcrr,*,*,*") +- (set_attr "type" "*,f_stored,*,f_loadd,*,*,alu_reg,load2,store2") +- (set_attr "insn" "*,*,*,*,*,*,mov,*,*") ++ [(set_attr "type" "neon_move,neon_store1_1reg,neon_move,\ ++ neon_load1_1reg, neon_to_gp,neon_from_gp,mov_reg,\ ++ neon_load1_2reg, neon_store1_2reg") + (set_attr "length" "4,4,4,4,4,4,8,8,8") + (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*") + (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*") +@@ -105,10 +105,9 @@ + default: return output_move_quad (operands); + } + } +- [(set_attr "neon_type" "neon_int_1,neon_stm_2,neon_vmov,neon_ldm_2,\ +- neon_mrrc,neon_mcr_2_mcrr,*,*,*") +- (set_attr "type" "*,*,*,*,*,*,alu_reg,load4,store4") +- (set_attr "insn" "*,*,*,*,*,*,mov,*,*") ++ [(set_attr "type" "neon_move_q,neon_store2_2reg_q,neon_move_q,\ ++ neon_load2_2reg_q,neon_to_gp_q,neon_from_gp_q,\ ++ mov_reg,neon_load1_4reg,neon_store1_4reg") + (set_attr "length" "4,8,4,8,8,8,16,8,16") + (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*") + (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*") +@@ -152,7 +151,7 @@ + default: gcc_unreachable (); + } + } +- [(set_attr "neon_type" "neon_int_1,neon_stm_2,neon_ldm_2") ++ [(set_attr "type" "neon_move_q,neon_store2_2reg_q,neon_load2_2reg_q") + (set (attr "length") (symbol_ref "arm_attr_length_move_neon (insn)"))]) + + (define_split +@@ -260,7 +259,7 @@ + UNSPEC_MISALIGNED_ACCESS))] + "TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access" + "vst1.\t{%P1}, %A0" +- [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")]) ++ [(set_attr "type" "neon_store1_1reg")]) + + (define_insn "*movmisalign_neon_load" + [(set (match_operand:VDX 0 "s_register_operand" "=w") +@@ -268,7 +267,7 @@ + UNSPEC_MISALIGNED_ACCESS))] + "TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access" + "vld1.\t{%P0}, %A1" +- [(set_attr "neon_type" "neon_vld1_1_2_regs")]) ++ [(set_attr "type" "neon_load1_1reg")]) + + (define_insn "*movmisalign_neon_store" + [(set (match_operand:VQX 0 "neon_struct_operand" "=Um") +@@ -276,7 +275,7 @@ + UNSPEC_MISALIGNED_ACCESS))] + "TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access" + "vst1.\t{%q1}, %A0" +- [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")]) ++ [(set_attr "type" "neon_store1_1reg")]) + + (define_insn "*movmisalign_neon_load" + [(set (match_operand:VQX 0 "s_register_operand" "=w") +@@ -284,7 +283,7 @@ + UNSPEC_MISALIGNED_ACCESS))] + "TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access" + "vld1.\t{%q0}, %A1" +- [(set_attr "neon_type" "neon_vld1_1_2_regs")]) ++ [(set_attr "type" "neon_store1_1reg")]) + + (define_insn "vec_set_internal" + [(set (match_operand:VD 0 "s_register_operand" "=w,w") +@@ -305,7 +304,7 @@ + else + return "vmov.\t%P0[%c2], %1"; + } +- [(set_attr "neon_type" "neon_vld1_vld2_lane,neon_mcr")]) ++ [(set_attr "type" "neon_load1_all_lanes,neon_from_gp")]) + + (define_insn "vec_set_internal" + [(set (match_operand:VQ 0 "s_register_operand" "=w,w") +@@ -333,7 +332,7 @@ + else + return "vmov.\t%P0[%c2], %1"; + } +- [(set_attr "neon_type" "neon_vld1_vld2_lane,neon_mcr")] ++ [(set_attr "type" "neon_load1_all_lanes,neon_from_gp")] + ) + + (define_insn "vec_setv2di_internal" +@@ -355,7 +354,7 @@ + else + return "vmov\t%P0, %Q1, %R1"; + } +- [(set_attr "neon_type" "neon_vld1_1_2_regs,neon_mcr_2_mcrr")] ++ [(set_attr "type" "neon_load1_all_lanes_q,neon_from_gp_q")] + ) + + (define_expand "vec_set" +@@ -389,7 +388,7 @@ + else + return "vmov.\t%0, %P1[%c2]"; + } +- [(set_attr "neon_type" "neon_vst1_vst2_lane,neon_bp_simple")] ++ [(set_attr "type" "neon_store1_one_lane,neon_to_gp")] + ) + + (define_insn "vec_extract" +@@ -415,7 +414,7 @@ + else + return "vmov.\t%0, %P1[%c2]"; + } +- [(set_attr "neon_type" "neon_vst1_vst2_lane,neon_bp_simple")] ++ [(set_attr "type" "neon_store1_one_lane,neon_to_gp")] + ) + + (define_insn "vec_extractv2di" +@@ -434,7 +433,7 @@ + else + return "vmov\t%Q0, %R0, %P1 @ v2di"; + } +- [(set_attr "neon_type" "neon_vst1_vst2_lane,neon_int_1")] ++ [(set_attr "type" "neon_store1_one_lane_q,neon_to_gp_q")] + ) + + (define_expand "vec_init" +@@ -457,12 +456,10 @@ + (match_operand:VDQ 2 "s_register_operand" "w")))] + "TARGET_NEON && (! || flag_unsafe_math_optimizations)" + "vadd.\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_1")))] ++ (const_string "neon_fp_addsub_s") ++ (const_string "neon_add")))] + ) + + (define_insn "adddi3_neon" +@@ -484,10 +481,11 @@ + default: gcc_unreachable (); + } + } +- [(set_attr "neon_type" "neon_int_1,*,*,neon_int_1,*,*,*") ++ [(set_attr "type" "neon_add,multiple,multiple,neon_add,\ ++ multiple,multiple,multiple") + (set_attr "conds" "*,clob,clob,*,clob,clob,clob") + (set_attr "length" "*,8,8,*,8,8,8") +- (set_attr "arch" "nota8,*,*,onlya8,*,*,*")] ++ (set_attr "arch" "neon_for_64bits,*,*,avoid_neon_for_64bits,*,*,*")] + ) + + (define_insn "*sub3_neon" +@@ -496,12 +494,10 @@ + (match_operand:VDQ 2 "s_register_operand" "w")))] + "TARGET_NEON && (! || flag_unsafe_math_optimizations)" + "vsub.\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_2")))] ++ (const_string "neon_fp_addsub_s") ++ (const_string "neon_sub")))] + ) + + (define_insn "subdi3_neon" +@@ -521,75 +517,48 @@ + default: gcc_unreachable (); + } + } +- [(set_attr "neon_type" "neon_int_2,*,*,*,neon_int_2") ++ [(set_attr "type" "neon_sub,multiple,multiple,multiple,neon_sub") + (set_attr "conds" "*,clob,clob,clob,*") + (set_attr "length" "*,8,8,8,*") +- (set_attr "arch" "nota8,*,*,*,onlya8")] ++ (set_attr "arch" "neon_for_64bits,*,*,*,avoid_neon_for_64bits")] + ) + + (define_insn "*mul3_neon" +- [(set (match_operand:VDQ 0 "s_register_operand" "=w") +- (mult:VDQ (match_operand:VDQ 1 "s_register_operand" "w") +- (match_operand:VDQ 2 "s_register_operand" "w")))] ++ [(set (match_operand:VDQW 0 "s_register_operand" "=w") ++ (mult:VDQW (match_operand:VDQW 1 "s_register_operand" "w") ++ (match_operand:VDQW 2 "s_register_operand" "w")))] + "TARGET_NEON && (! || flag_unsafe_math_optimizations)" + "vmul.\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (if_then_else (match_test "") +- (if_then_else +- (match_test "") +- (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mul_qqq_8_16_32_ddd_32")) +- (if_then_else (match_test "") +- (const_string "neon_mul_qqq_8_16_32_ddd_32") +- (const_string "neon_mul_qqq_8_16_32_ddd_32")))))] ++ (const_string "neon_fp_mul_s") ++ (const_string "neon_mul_")))] + ) + + (define_insn "mul3add_neon" +- [(set (match_operand:VDQ 0 "s_register_operand" "=w") +- (plus:VDQ (mult:VDQ (match_operand:VDQ 2 "s_register_operand" "w") +- (match_operand:VDQ 3 "s_register_operand" "w")) +- (match_operand:VDQ 1 "s_register_operand" "0")))] ++ [(set (match_operand:VDQW 0 "s_register_operand" "=w") ++ (plus:VDQW (mult:VDQW (match_operand:VDQW 2 "s_register_operand" "w") ++ (match_operand:VDQW 3 "s_register_operand" "w")) ++ (match_operand:VDQW 1 "s_register_operand" "0")))] + "TARGET_NEON && (! || flag_unsafe_math_optimizations)" + "vmla.\t%0, %2, %3" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vmla_ddd") +- (const_string "neon_fp_vmla_qqq")) +- (if_then_else (match_test "") +- (if_then_else +- (match_test "") +- (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")) +- (if_then_else (match_test "") +- (const_string "neon_mla_qqq_8_16") +- (const_string "neon_mla_qqq_32_qqd_32_scalar")))))] ++ (const_string "neon_fp_mla_s") ++ (const_string "neon_mla_")))] + ) + + (define_insn "mul3negadd_neon" +- [(set (match_operand:VDQ 0 "s_register_operand" "=w") +- (minus:VDQ (match_operand:VDQ 1 "s_register_operand" "0") +- (mult:VDQ (match_operand:VDQ 2 "s_register_operand" "w") +- (match_operand:VDQ 3 "s_register_operand" "w"))))] ++ [(set (match_operand:VDQW 0 "s_register_operand" "=w") ++ (minus:VDQW (match_operand:VDQW 1 "s_register_operand" "0") ++ (mult:VDQW (match_operand:VDQW 2 "s_register_operand" "w") ++ (match_operand:VDQW 3 "s_register_operand" "w"))))] + "TARGET_NEON && (! || flag_unsafe_math_optimizations)" + "vmls.\t%0, %2, %3" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vmla_ddd") +- (const_string "neon_fp_vmla_qqq")) +- (if_then_else (match_test "") +- (if_then_else +- (match_test "") +- (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")) +- (if_then_else (match_test "") +- (const_string "neon_mla_qqq_8_16") +- (const_string "neon_mla_qqq_32_qqd_32_scalar")))))] ++ (const_string "neon_fp_mla_s") ++ (const_string "neon_mla_")))] + ) + + ;; Fused multiply-accumulate +@@ -604,10 +573,7 @@ + (match_operand:VCVTF 3 "register_operand" "0")))] + "TARGET_NEON && TARGET_FMA && flag_unsafe_math_optimizations" + "vfma%?.\\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vmla_ddd") +- (const_string "neon_fp_vmla_qqq")))] ++ [(set_attr "type" "neon_fp_mla_s")] + ) + + (define_insn "fma4_intrinsic" +@@ -617,10 +583,7 @@ + (match_operand:VCVTF 3 "register_operand" "0")))] + "TARGET_NEON && TARGET_FMA" + "vfma%?.\\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vmla_ddd") +- (const_string "neon_fp_vmla_qqq")))] ++ [(set_attr "type" "neon_fp_mla_s")] + ) + + (define_insn "*fmsub4" +@@ -630,10 +593,7 @@ + (match_operand:VCVTF 3 "register_operand" "0")))] + "TARGET_NEON && TARGET_FMA && flag_unsafe_math_optimizations" + "vfms%?.\\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vmla_ddd") +- (const_string "neon_fp_vmla_qqq")))] ++ [(set_attr "type" "neon_fp_mla_s")] + ) + + (define_insn "fmsub4_intrinsic" +@@ -643,10 +603,7 @@ + (match_operand:VCVTF 3 "register_operand" "0")))] + "TARGET_NEON && TARGET_FMA" + "vfms%?.\\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vmla_ddd") +- (const_string "neon_fp_vmla_qqq")))] ++ [(set_attr "type" "neon_fp_mla_s")] + ) + + (define_insn "neon_vrint" +@@ -656,10 +613,7 @@ + NEON_VRINT))] + "TARGET_NEON && TARGET_FPU_ARMV8" + "vrint%?.f32\\t%0, %1" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_fp_round_")] + ) + + (define_insn "ior3" +@@ -676,32 +630,9 @@ + default: gcc_unreachable (); + } + } +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_logic")] + ) + +-(define_insn "iordi3_neon" +- [(set (match_operand:DI 0 "s_register_operand" "=w,w,?&r,?&r,?w,?w") +- (ior:DI (match_operand:DI 1 "s_register_operand" "%w,0,0,r,w,0") +- (match_operand:DI 2 "neon_logic_op2" "w,Dl,r,r,w,Dl")))] +- "TARGET_NEON" +-{ +- switch (which_alternative) +- { +- case 0: /* fall through */ +- case 4: return "vorr\t%P0, %P1, %P2"; +- case 1: /* fall through */ +- case 5: return neon_output_logic_immediate ("vorr", &operands[2], +- DImode, 0, VALID_NEON_QREG_MODE (DImode)); +- case 2: return "#"; +- case 3: return "#"; +- default: gcc_unreachable (); +- } +-} +- [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*,neon_int_1,neon_int_1") +- (set_attr "length" "*,*,8,8,*,*") +- (set_attr "arch" "nota8,nota8,*,*,onlya8,onlya8")] +-) +- + ;; The concrete forms of the Neon immediate-logic instructions are vbic and + ;; vorr. We support the pseudo-instruction vand instead, because that + ;; corresponds to the canonical form the middle-end expects to use for +@@ -721,32 +652,9 @@ + default: gcc_unreachable (); + } + } +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_logic")] + ) + +-(define_insn "anddi3_neon" +- [(set (match_operand:DI 0 "s_register_operand" "=w,w,?&r,?&r,?w,?w") +- (and:DI (match_operand:DI 1 "s_register_operand" "%w,0,0,r,w,0") +- (match_operand:DI 2 "neon_inv_logic_op2" "w,DL,r,r,w,DL")))] +- "TARGET_NEON" +-{ +- switch (which_alternative) +- { +- case 0: /* fall through */ +- case 4: return "vand\t%P0, %P1, %P2"; +- case 1: /* fall through */ +- case 5: return neon_output_logic_immediate ("vand", &operands[2], +- DImode, 1, VALID_NEON_QREG_MODE (DImode)); +- case 2: return "#"; +- case 3: return "#"; +- default: gcc_unreachable (); +- } +-} +- [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*,neon_int_1,neon_int_1") +- (set_attr "length" "*,*,8,8,*,*") +- (set_attr "arch" "nota8,nota8,*,*,onlya8,onlya8")] +-) +- + (define_insn "orn3_neon" + [(set (match_operand:VDQ 0 "s_register_operand" "=w") + (ior:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w")) +@@ -753,7 +661,7 @@ + (match_operand:VDQ 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vorn\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_logic")] + ) + + ;; TODO: investigate whether we should disable +@@ -791,7 +699,7 @@ + DONE; + } + }" +- [(set_attr "neon_type" "neon_int_1,*,*,*") ++ [(set_attr "type" "neon_logic,multiple,multiple,multiple") + (set_attr "length" "*,16,8,8") + (set_attr "arch" "any,a,t2,t2")] + ) +@@ -802,7 +710,7 @@ + (match_operand:VDQ 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vbic\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_logic")] + ) + + ;; Compare to *anddi_notdi_di. +@@ -815,7 +723,7 @@ + vbic\t%P0, %P1, %P2 + # + #" +- [(set_attr "neon_type" "neon_int_1,*,*") ++ [(set_attr "type" "neon_logic,multiple,multiple") + (set_attr "length" "*,8,8")] + ) + +@@ -825,30 +733,15 @@ + (match_operand:VDQ 2 "s_register_operand" "w")))] + "TARGET_NEON" + "veor\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_logic")] + ) + +-(define_insn "xordi3_neon" +- [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?w") +- (xor:DI (match_operand:DI 1 "s_register_operand" "%w,0,r,w") +- (match_operand:DI 2 "s_register_operand" "w,r,r,w")))] +- "TARGET_NEON" +- "@ +- veor\t%P0, %P1, %P2 +- # +- # +- veor\t%P0, %P1, %P2" +- [(set_attr "neon_type" "neon_int_1,*,*,neon_int_1") +- (set_attr "length" "*,8,8,*") +- (set_attr "arch" "nota8,*,*,onlya8")] +-) +- + (define_insn "one_cmpl2" + [(set (match_operand:VDQ 0 "s_register_operand" "=w") + (not:VDQ (match_operand:VDQ 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vmvn\t%0, %1" +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_move")] + ) + + (define_insn "abs2" +@@ -856,12 +749,10 @@ + (abs:VDQW (match_operand:VDQW 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vabs.\t%0, %1" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_3")))] ++ (const_string "neon_fp_abs_s") ++ (const_string "neon_abs")))] + ) + + (define_insn "neg2" +@@ -869,12 +760,10 @@ + (neg:VDQW (match_operand:VDQW 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vneg.\t%0, %1" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_3")))] ++ (const_string "neon_fp_neg_s") ++ (const_string "neon_neg")))] + ) + + (define_insn "negdi2_neon" +@@ -884,7 +773,8 @@ + (clobber (reg:CC CC_REGNUM))] + "TARGET_NEON" + "#" +- [(set_attr "length" "8")] ++ [(set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + ; Split negdi2_neon for vfp registers +@@ -922,7 +812,7 @@ + (match_operand:VDQIW 2 "s_register_operand" "w")))] + "TARGET_NEON" + "vmin.\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_minmax")] + ) + + (define_insn "*umax3_neon" +@@ -931,7 +821,7 @@ + (match_operand:VDQIW 2 "s_register_operand" "w")))] + "TARGET_NEON" + "vmax.\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_minmax")] + ) + + (define_insn "*smin3_neon" +@@ -940,10 +830,10 @@ + (match_operand:VDQW 2 "s_register_operand" "w")))] + "TARGET_NEON" + "vmin.\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_minmax_s") ++ (const_string "neon_minmax")))] + ) + + (define_insn "*smax3_neon" +@@ -952,10 +842,10 @@ + (match_operand:VDQW 2 "s_register_operand" "w")))] + "TARGET_NEON" + "vmax.\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_minmax_s") ++ (const_string "neon_minmax")))] + ) + + ; TODO: V2DI shifts are current disabled because there are bugs in the +@@ -978,10 +868,7 @@ + default: gcc_unreachable (); + } + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_vshl_ddd") +- (const_string "neon_shift_3")))] ++ [(set_attr "type" "neon_shift_reg, neon_shift_imm")] + ) + + (define_insn "vashr3_imm" +@@ -994,10 +881,7 @@ + mode, VALID_NEON_QREG_MODE (mode), + false); + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_vshl_ddd") +- (const_string "neon_shift_3")))] ++ [(set_attr "type" "neon_shift_imm")] + ) + + (define_insn "vlshr3_imm" +@@ -1010,10 +894,7 @@ + mode, VALID_NEON_QREG_MODE (mode), + false); + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_vshl_ddd") +- (const_string "neon_shift_3")))] ++ [(set_attr "type" "neon_shift_imm")] + ) + + ; Used for implementing logical shift-right, which is a left-shift by a negative +@@ -1028,10 +909,7 @@ + UNSPEC_ASHIFT_SIGNED))] + "TARGET_NEON" + "vshl.\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_vshl_ddd") +- (const_string "neon_shift_3")))] ++ [(set_attr "type" "neon_shift_reg")] + ) + + ; Used for implementing logical shift-right, which is a left-shift by a negative +@@ -1044,10 +922,7 @@ + UNSPEC_ASHIFT_UNSIGNED))] + "TARGET_NEON" + "vshl.\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_vshl_ddd") +- (const_string "neon_shift_3")))] ++ [(set_attr "type" "neon_shift_reg")] + ) + + (define_expand "vashr3" +@@ -1099,7 +974,7 @@ + "@ + vld1.32\t{%P0[0]}, %A1 + vmov.32\t%P0[0], %1" +- [(set_attr "neon_type" "neon_vld1_vld2_lane,neon_mcr")] ++ [(set_attr "type" "neon_load1_1reg,neon_from_gp")] + ) + + (define_insn "ashldi3_neon_noclobber" +@@ -1112,7 +987,7 @@ + "@ + vshl.u64\t%P0, %P1, %2 + vshl.u64\t%P0, %P1, %P2" +- [(set_attr "neon_type" "neon_vshl_ddd,neon_vshl_ddd")] ++ [(set_attr "type" "neon_shift_imm, neon_shift_reg")] + ) + + (define_insn_and_split "ashldi3_neon" +@@ -1162,8 +1037,9 @@ + } + DONE; + }" +- [(set_attr "arch" "nota8,nota8,*,*,onlya8,onlya8") +- (set_attr "opt" "*,*,speed,speed,*,*")] ++ [(set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits") ++ (set_attr "opt" "*,*,speed,speed,*,*") ++ (set_attr "type" "multiple")] + ) + + ; The shift amount needs to be negated for right-shifts +@@ -1174,7 +1050,7 @@ + UNSPEC_ASHIFT_SIGNED))] + "TARGET_NEON && reload_completed" + "vshl.s64\t%P0, %P1, %P2" +- [(set_attr "neon_type" "neon_vshl_ddd")] ++ [(set_attr "type" "neon_shift_reg")] + ) + + ; The shift amount needs to be negated for right-shifts +@@ -1185,7 +1061,7 @@ + UNSPEC_ASHIFT_UNSIGNED))] + "TARGET_NEON && reload_completed" + "vshl.u64\t%P0, %P1, %P2" +- [(set_attr "neon_type" "neon_vshl_ddd")] ++ [(set_attr "type" "neon_shift_reg")] + ) + + (define_insn "ashrdi3_neon_imm_noclobber" +@@ -1195,7 +1071,7 @@ + "TARGET_NEON && reload_completed + && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 64" + "vshr.s64\t%P0, %P1, %2" +- [(set_attr "neon_type" "neon_vshl_ddd")] ++ [(set_attr "type" "neon_shift_imm")] + ) + + (define_insn "lshrdi3_neon_imm_noclobber" +@@ -1205,7 +1081,7 @@ + "TARGET_NEON && reload_completed + && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 64" + "vshr.u64\t%P0, %P1, %2" +- [(set_attr "neon_type" "neon_vshl_ddd")] ++ [(set_attr "type" "neon_shift_imm")] + ) + + ;; ashrdi3_neon +@@ -1263,8 +1139,9 @@ + + DONE; + }" +- [(set_attr "arch" "nota8,nota8,*,*,onlya8,onlya8") +- (set_attr "opt" "*,*,speed,speed,*,*")] ++ [(set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits") ++ (set_attr "opt" "*,*,speed,speed,*,*") ++ (set_attr "type" "multiple")] + ) + + ;; Widening operations +@@ -1276,7 +1153,7 @@ + (match_operand: 2 "s_register_operand" "w")))] + "TARGET_NEON" + "vaddw.\t%q0, %q2, %P1" +- [(set_attr "neon_type" "neon_int_3")] ++ [(set_attr "type" "neon_add_widen")] + ) + + (define_insn "widen_usum3" +@@ -1286,7 +1163,7 @@ + (match_operand: 2 "s_register_operand" "w")))] + "TARGET_NEON" + "vaddw.\t%q0, %q2, %P1" +- [(set_attr "neon_type" "neon_int_3")] ++ [(set_attr "type" "neon_add_widen")] + ) + + ;; VEXT can be used to synthesize coarse whole-vector shifts with 8-bit +@@ -1370,9 +1247,7 @@ + "TARGET_NEON" + ".32\t%P0, %e1, %f1" + [(set_attr "vqh_mnem" "") +- (set (attr "neon_type") +- (if_then_else (eq_attr "vqh_mnem" "vadd") +- (const_string "neon_int_1") (const_string "neon_int_5")))] ++ (set_attr "type" "neon_reduc__q")] + ) + + (define_insn "quad_halves_v4sf" +@@ -1385,9 +1260,7 @@ + "TARGET_NEON && flag_unsafe_math_optimizations" + ".f32\t%P0, %e1, %f1" + [(set_attr "vqh_mnem" "") +- (set (attr "neon_type") +- (if_then_else (eq_attr "vqh_mnem" "vadd") +- (const_string "neon_int_1") (const_string "neon_int_5")))] ++ (set_attr "type" "neon_fp_reduc__s_q")] + ) + + (define_insn "quad_halves_v8hi" +@@ -1402,9 +1275,7 @@ + "TARGET_NEON" + ".16\t%P0, %e1, %f1" + [(set_attr "vqh_mnem" "") +- (set (attr "neon_type") +- (if_then_else (eq_attr "vqh_mnem" "vadd") +- (const_string "neon_int_1") (const_string "neon_int_5")))] ++ (set_attr "type" "neon_reduc__q")] + ) + + (define_insn "quad_halves_v16qi" +@@ -1423,9 +1294,7 @@ + "TARGET_NEON" + ".8\t%P0, %e1, %f1" + [(set_attr "vqh_mnem" "") +- (set (attr "neon_type") +- (if_then_else (eq_attr "vqh_mnem" "vadd") +- (const_string "neon_int_1") (const_string "neon_int_5")))] ++ (set_attr "type" "neon_reduc__q")] + ) + + (define_expand "move_hi_quad_" +@@ -1484,7 +1353,7 @@ + UNSPEC_VPADD))] + "TARGET_NEON && !BYTES_BIG_ENDIAN" + "vadd.i64\t%e0, %e1, %f1" +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_add_q")] + ) + + ;; NEON does not distinguish between signed and unsigned addition except on +@@ -1608,12 +1477,10 @@ + "TARGET_NEON" + "vpadd.\t%P0, %P1, %P2" + ;; Assume this schedules like vadd. +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_1")))] ++ (const_string "neon_fp_reduc_add_s") ++ (const_string "neon_reduc_add")))] + ) + + (define_insn "neon_vpsmin" +@@ -1623,11 +1490,10 @@ + UNSPEC_VPSMIN))] + "TARGET_NEON" + "vpmin.\t%P0, %P1, %P2" +- ;; Assume this schedules like vmin. +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_reduc_minmax_s") ++ (const_string "neon_reduc_minmax")))] + ) + + (define_insn "neon_vpsmax" +@@ -1637,11 +1503,10 @@ + UNSPEC_VPSMAX))] + "TARGET_NEON" + "vpmax.\t%P0, %P1, %P2" +- ;; Assume this schedules like vmax. +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_reduc_minmax_s") ++ (const_string "neon_reduc_minmax")))] + ) + + (define_insn "neon_vpumin" +@@ -1651,8 +1516,7 @@ + UNSPEC_VPUMIN))] + "TARGET_NEON" + "vpmin.\t%P0, %P1, %P2" +- ;; Assume this schedules like umin. +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_reduc_minmax")] + ) + + (define_insn "neon_vpumax" +@@ -1662,8 +1526,7 @@ + UNSPEC_VPUMAX))] + "TARGET_NEON" + "vpmax.\t%P0, %P1, %P2" +- ;; Assume this schedules like umax. +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_reduc_minmax")] + ) + + ;; Saturating arithmetic +@@ -1680,7 +1543,7 @@ + (match_operand:VD 2 "s_register_operand" "w")))] + "TARGET_NEON" + "vqadd.\t%P0, %P1, %P2" +- [(set_attr "neon_type" "neon_int_4")] ++ [(set_attr "type" "neon_qadd")] + ) + + (define_insn "*us_add_neon" +@@ -1689,7 +1552,7 @@ + (match_operand:VD 2 "s_register_operand" "w")))] + "TARGET_NEON" + "vqadd.\t%P0, %P1, %P2" +- [(set_attr "neon_type" "neon_int_4")] ++ [(set_attr "type" "neon_qadd")] + ) + + (define_insn "*ss_sub_neon" +@@ -1698,7 +1561,7 @@ + (match_operand:VD 2 "s_register_operand" "w")))] + "TARGET_NEON" + "vqsub.\t%P0, %P1, %P2" +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_qsub")] + ) + + (define_insn "*us_sub_neon" +@@ -1707,7 +1570,7 @@ + (match_operand:VD 2 "s_register_operand" "w")))] + "TARGET_NEON" + "vqsub.\t%P0, %P1, %P2" +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_qsub")] + ) + + ;; Conditional instructions. These are comparisons with conditional moves for +@@ -1999,12 +1862,10 @@ + UNSPEC_VADD))] + "TARGET_NEON" + "vadd.\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_1")))] ++ (const_string "neon_fp_addsub_s") ++ (const_string "neon_add")))] + ) + + ; operand 3 represents in bits: +@@ -2019,7 +1880,7 @@ + UNSPEC_VADDL))] + "TARGET_NEON" + "vaddl.%T3%#\t%q0, %P1, %P2" +- [(set_attr "neon_type" "neon_int_3")] ++ [(set_attr "type" "neon_add_long")] + ) + + (define_insn "neon_vaddw" +@@ -2030,7 +1891,7 @@ + UNSPEC_VADDW))] + "TARGET_NEON" + "vaddw.%T3%#\t%q0, %q1, %P2" +- [(set_attr "neon_type" "neon_int_2")] ++ [(set_attr "type" "neon_add_widen")] + ) + + ; vhadd and vrhadd. +@@ -2043,7 +1904,7 @@ + UNSPEC_VHADD))] + "TARGET_NEON" + "v%O3hadd.%T3%#\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_4")] ++ [(set_attr "type" "neon_add_halve_q")] + ) + + (define_insn "neon_vqadd" +@@ -2054,7 +1915,7 @@ + UNSPEC_VQADD))] + "TARGET_NEON" + "vqadd.%T3%#\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_4")] ++ [(set_attr "type" "neon_qadd")] + ) + + (define_insn "neon_vaddhn" +@@ -2065,7 +1926,7 @@ + UNSPEC_VADDHN))] + "TARGET_NEON" + "v%O3addhn.\t%P0, %q1, %q2" +- [(set_attr "neon_type" "neon_int_4")] ++ [(set_attr "type" "neon_add_halve_narrow_q")] + ) + + ;; We cannot replace this unspec with mul3 because of the odd +@@ -2078,19 +1939,10 @@ + UNSPEC_VMUL))] + "TARGET_NEON" + "vmul.%F3%#\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (if_then_else (match_test "") +- (if_then_else +- (match_test "") +- (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mul_qqq_8_16_32_ddd_32")) +- (if_then_else (match_test "") +- (const_string "neon_mul_qqq_8_16_32_ddd_32") +- (const_string "neon_mul_qqq_8_16_32_ddd_32")))))] ++ (const_string "neon_fp_mul_s") ++ (const_string "neon_mul_")))] + ) + + (define_expand "neon_vmla" +@@ -2139,26 +1991,17 @@ + ; Used for intrinsics when flag_unsafe_math_optimizations is false. + + (define_insn "neon_vmla_unspec" +- [(set (match_operand:VDQ 0 "s_register_operand" "=w") +- (unspec:VDQ [(match_operand:VDQ 1 "s_register_operand" "0") +- (match_operand:VDQ 2 "s_register_operand" "w") +- (match_operand:VDQ 3 "s_register_operand" "w")] ++ [(set (match_operand:VDQW 0 "s_register_operand" "=w") ++ (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0") ++ (match_operand:VDQW 2 "s_register_operand" "w") ++ (match_operand:VDQW 3 "s_register_operand" "w")] + UNSPEC_VMLA))] + "TARGET_NEON" + "vmla.\t%0, %2, %3" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vmla_ddd") +- (const_string "neon_fp_vmla_qqq")) +- (if_then_else (match_test "") +- (if_then_else +- (match_test "") +- (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")) +- (if_then_else (match_test "") +- (const_string "neon_mla_qqq_8_16") +- (const_string "neon_mla_qqq_32_qqd_32_scalar")))))] ++ (const_string "neon_fp_mla_s") ++ (const_string "neon_mla_")))] + ) + + (define_insn "neon_vmlal" +@@ -2170,10 +2013,7 @@ + UNSPEC_VMLAL))] + "TARGET_NEON" + "vmlal.%T4%#\t%q0, %P2, %P3" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")))] ++ [(set_attr "type" "neon_mla__long")] + ) + + (define_expand "neon_vmls" +@@ -2196,27 +2036,17 @@ + ; Used for intrinsics when flag_unsafe_math_optimizations is false. + + (define_insn "neon_vmls_unspec" +- [(set (match_operand:VDQ 0 "s_register_operand" "=w") +- (unspec:VDQ [(match_operand:VDQ 1 "s_register_operand" "0") +- (match_operand:VDQ 2 "s_register_operand" "w") +- (match_operand:VDQ 3 "s_register_operand" "w")] ++ [(set (match_operand:VDQW 0 "s_register_operand" "=w") ++ (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0") ++ (match_operand:VDQW 2 "s_register_operand" "w") ++ (match_operand:VDQW 3 "s_register_operand" "w")] + UNSPEC_VMLS))] + "TARGET_NEON" + "vmls.\t%0, %2, %3" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vmla_ddd") +- (const_string "neon_fp_vmla_qqq")) +- (if_then_else (match_test "") +- (if_then_else +- (match_test "") +- (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")) +- (if_then_else +- (match_test "") +- (const_string "neon_mla_qqq_8_16") +- (const_string "neon_mla_qqq_32_qqd_32_scalar")))))] ++ (const_string "neon_fp_mla_s") ++ (const_string "neon_mla_")))] + ) + + (define_insn "neon_vmlsl" +@@ -2228,10 +2058,7 @@ + UNSPEC_VMLSL))] + "TARGET_NEON" + "vmlsl.%T4%#\t%q0, %P2, %P3" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")))] ++ [(set_attr "type" "neon_mla__long")] + ) + + (define_insn "neon_vqdmulh" +@@ -2242,14 +2069,7 @@ + UNSPEC_VQDMULH))] + "TARGET_NEON" + "vq%O3dmulh.\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mul_qqq_8_16_32_ddd_32")) +- (if_then_else (match_test "") +- (const_string "neon_mul_qqq_8_16_32_ddd_32") +- (const_string "neon_mul_qqq_8_16_32_ddd_32"))))] ++ [(set_attr "type" "neon_sat_mul_")] + ) + + (define_insn "neon_vqdmlal" +@@ -2261,10 +2081,7 @@ + UNSPEC_VQDMLAL))] + "TARGET_NEON" + "vqdmlal.\t%q0, %P2, %P3" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")))] ++ [(set_attr "type" "neon_sat_mla__long")] + ) + + (define_insn "neon_vqdmlsl" +@@ -2276,10 +2093,7 @@ + UNSPEC_VQDMLSL))] + "TARGET_NEON" + "vqdmlsl.\t%q0, %P2, %P3" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")))] ++ [(set_attr "type" "neon_sat_mla__long")] + ) + + (define_insn "neon_vmull" +@@ -2290,10 +2104,7 @@ + UNSPEC_VMULL))] + "TARGET_NEON" + "vmull.%T3%#\t%q0, %P1, %P2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")))] ++ [(set_attr "type" "neon_mul__long")] + ) + + (define_insn "neon_vqdmull" +@@ -2304,10 +2115,7 @@ + UNSPEC_VQDMULL))] + "TARGET_NEON" + "vqdmull.\t%q0, %P1, %P2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") +- (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")))] ++ [(set_attr "type" "neon_sat_mul__long")] + ) + + (define_expand "neon_vsub" +@@ -2334,12 +2142,10 @@ + UNSPEC_VSUB))] + "TARGET_NEON" + "vsub.\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_2")))] ++ (const_string "neon_fp_addsub_s") ++ (const_string "neon_sub")))] + ) + + (define_insn "neon_vsubl" +@@ -2350,7 +2156,7 @@ + UNSPEC_VSUBL))] + "TARGET_NEON" + "vsubl.%T3%#\t%q0, %P1, %P2" +- [(set_attr "neon_type" "neon_int_2")] ++ [(set_attr "type" "neon_sub_long")] + ) + + (define_insn "neon_vsubw" +@@ -2361,7 +2167,7 @@ + UNSPEC_VSUBW))] + "TARGET_NEON" + "vsubw.%T3%#\t%q0, %q1, %P2" +- [(set_attr "neon_type" "neon_int_2")] ++ [(set_attr "type" "neon_sub_widen")] + ) + + (define_insn "neon_vqsub" +@@ -2372,7 +2178,7 @@ + UNSPEC_VQSUB))] + "TARGET_NEON" + "vqsub.%T3%#\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_qsub")] + ) + + (define_insn "neon_vhsub" +@@ -2383,7 +2189,7 @@ + UNSPEC_VHSUB))] + "TARGET_NEON" + "vhsub.%T3%#\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_sub_halve")] + ) + + (define_insn "neon_vsubhn" +@@ -2394,7 +2200,7 @@ + UNSPEC_VSUBHN))] + "TARGET_NEON" + "v%O3subhn.\t%P0, %q1, %q2" +- [(set_attr "neon_type" "neon_int_4")] ++ [(set_attr "type" "neon_sub_halve_narrow_q")] + ) + + (define_insn "neon_vceq" +@@ -2408,12 +2214,12 @@ + "@ + vceq.\t%0, %1, %2 + vceq.\t%0, %1, #0" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_compare_s") ++ (if_then_else (match_operand 2 "zero_operand") ++ (const_string "neon_compare_zero") ++ (const_string "neon_compare"))))] + ) + + (define_insn "neon_vcge" +@@ -2427,12 +2233,12 @@ + "@ + vcge.%T3%#\t%0, %1, %2 + vcge.%T3%#\t%0, %1, #0" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_compare_s") ++ (if_then_else (match_operand 2 "zero_operand") ++ (const_string "neon_compare_zero") ++ (const_string "neon_compare"))))] + ) + + (define_insn "neon_vcgeu" +@@ -2444,7 +2250,7 @@ + UNSPEC_VCGEU))] + "TARGET_NEON" + "vcge.%T3%#\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_compare")] + ) + + (define_insn "neon_vcgt" +@@ -2458,12 +2264,12 @@ + "@ + vcgt.%T3%#\t%0, %1, %2 + vcgt.%T3%#\t%0, %1, #0" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_compare_s") ++ (if_then_else (match_operand 2 "zero_operand") ++ (const_string "neon_compare_zero") ++ (const_string "neon_compare"))))] + ) + + (define_insn "neon_vcgtu" +@@ -2475,7 +2281,7 @@ + UNSPEC_VCGTU))] + "TARGET_NEON" + "vcgt.%T3%#\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_compare")] + ) + + ;; VCLE and VCLT only support comparisons with immediate zero (register +@@ -2490,12 +2296,12 @@ + UNSPEC_VCLE))] + "TARGET_NEON" + "vcle.%T3%#\t%0, %1, #0" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_compare_s") ++ (if_then_else (match_operand 2 "zero_operand") ++ (const_string "neon_compare_zero") ++ (const_string "neon_compare"))))] + ) + + (define_insn "neon_vclt" +@@ -2507,12 +2313,12 @@ + UNSPEC_VCLT))] + "TARGET_NEON" + "vclt.%T3%#\t%0, %1, #0" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_compare_s") ++ (if_then_else (match_operand 2 "zero_operand") ++ (const_string "neon_compare_zero") ++ (const_string "neon_compare"))))] + ) + + (define_insn "neon_vcage" +@@ -2523,10 +2329,7 @@ + UNSPEC_VCAGE))] + "TARGET_NEON" + "vacge.\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_fp_compare_s")] + ) + + (define_insn "neon_vcagt" +@@ -2537,10 +2340,7 @@ + UNSPEC_VCAGT))] + "TARGET_NEON" + "vacgt.\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_fp_compare_s")] + ) + + (define_insn "neon_vtst" +@@ -2551,7 +2351,7 @@ + UNSPEC_VTST))] + "TARGET_NEON" + "vtst.\t%0, %1, %2" +- [(set_attr "neon_type" "neon_int_4")] ++ [(set_attr "type" "neon_tst")] + ) + + (define_insn "neon_vabd" +@@ -2562,12 +2362,10 @@ + UNSPEC_VABD))] + "TARGET_NEON" + "vabd.%T3%#\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_abd_s") ++ (const_string "neon_abd")))] + ) + + (define_insn "neon_vabdl" +@@ -2578,7 +2376,7 @@ + UNSPEC_VABDL))] + "TARGET_NEON" + "vabdl.%T3%#\t%q0, %P1, %P2" +- [(set_attr "neon_type" "neon_int_5")] ++ [(set_attr "type" "neon_abd_long")] + ) + + (define_insn "neon_vaba" +@@ -2590,9 +2388,7 @@ + (match_operand:VDQIW 1 "s_register_operand" "0")))] + "TARGET_NEON" + "vaba.%T4%#\t%0, %2, %3" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_vaba") (const_string "neon_vaba_qqq")))] ++ [(set_attr "type" "neon_arith_acc")] + ) + + (define_insn "neon_vabal" +@@ -2604,7 +2400,7 @@ + (match_operand: 1 "s_register_operand" "0")))] + "TARGET_NEON" + "vabal.%T4%#\t%q0, %P2, %P3" +- [(set_attr "neon_type" "neon_vaba")] ++ [(set_attr "type" "neon_arith_acc")] + ) + + (define_insn "neon_vmax" +@@ -2615,12 +2411,10 @@ + UNSPEC_VMAX))] + "TARGET_NEON" + "vmax.%T3%#\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_minmax_s") ++ (const_string "neon_minmax")))] + ) + + (define_insn "neon_vmin" +@@ -2631,12 +2425,10 @@ + UNSPEC_VMIN))] + "TARGET_NEON" + "vmin.%T3%#\t%0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_minmax_s") ++ (const_string "neon_minmax")))] + ) + + (define_expand "neon_vpadd" +@@ -2658,8 +2450,7 @@ + UNSPEC_VPADDL))] + "TARGET_NEON" + "vpaddl.%T2%#\t%0, %1" +- ;; Assume this schedules like vaddl. +- [(set_attr "neon_type" "neon_int_3")] ++ [(set_attr "type" "neon_reduc_add_long")] + ) + + (define_insn "neon_vpadal" +@@ -2670,8 +2461,7 @@ + UNSPEC_VPADAL))] + "TARGET_NEON" + "vpadal.%T3%#\t%0, %2" +- ;; Assume this schedules like vpadd. +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_reduc_add_acc")] + ) + + (define_insn "neon_vpmax" +@@ -2682,11 +2472,10 @@ + UNSPEC_VPMAX))] + "TARGET_NEON" + "vpmax.%T3%#\t%0, %1, %2" +- ;; Assume this schedules like vmax. +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_reduc_minmax_s") ++ (const_string "neon_reduc_minmax")))] + ) + + (define_insn "neon_vpmin" +@@ -2697,11 +2486,10 @@ + UNSPEC_VPMIN))] + "TARGET_NEON" + "vpmin.%T3%#\t%0, %1, %2" +- ;; Assume this schedules like vmin. +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_reduc_minmax_s") ++ (const_string "neon_reduc_minmax")))] + ) + + (define_insn "neon_vrecps" +@@ -2712,10 +2500,7 @@ + UNSPEC_VRECPS))] + "TARGET_NEON" + "vrecps.\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vrecps_vrsqrts_ddd") +- (const_string "neon_fp_vrecps_vrsqrts_qqq")))] ++ [(set_attr "type" "neon_fp_recps_s")] + ) + + (define_insn "neon_vrsqrts" +@@ -2726,10 +2511,7 @@ + UNSPEC_VRSQRTS))] + "TARGET_NEON" + "vrsqrts.\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vrecps_vrsqrts_ddd") +- (const_string "neon_fp_vrecps_vrsqrts_qqq")))] ++ [(set_attr "type" "neon_fp_rsqrts_s")] + ) + + (define_expand "neon_vabs" +@@ -2749,7 +2531,7 @@ + UNSPEC_VQABS))] + "TARGET_NEON" + "vqabs.\t%0, %1" +- [(set_attr "neon_type" "neon_vqneg_vqabs")] ++ [(set_attr "type" "neon_qabs")] + ) + + (define_expand "neon_vneg" +@@ -2769,7 +2551,7 @@ + UNSPEC_VQNEG))] + "TARGET_NEON" + "vqneg.\t%0, %1" +- [(set_attr "neon_type" "neon_vqneg_vqabs")] ++ [(set_attr "type" "neon_qneg")] + ) + + (define_insn "neon_vcls" +@@ -2779,7 +2561,7 @@ + UNSPEC_VCLS))] + "TARGET_NEON" + "vcls.\t%0, %1" +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_cls")] + ) + + (define_insn "clz2" +@@ -2787,7 +2569,7 @@ + (clz:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vclz.\t%0, %1" +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_cnt")] + ) + + (define_expand "neon_vclz" +@@ -2805,7 +2587,7 @@ + (popcount:VE (match_operand:VE 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vcnt.\t%0, %1" +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_cnt")] + ) + + (define_expand "neon_vcnt" +@@ -2825,10 +2607,7 @@ + UNSPEC_VRECPE))] + "TARGET_NEON" + "vrecpe.\t%0, %1" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_fp_recpe_s")] + ) + + (define_insn "neon_vrsqrte" +@@ -2838,10 +2617,7 @@ + UNSPEC_VRSQRTE))] + "TARGET_NEON" + "vrsqrte.\t%0, %1" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_fp_rsqrte_s")] + ) + + (define_expand "neon_vmvn" +@@ -2870,7 +2646,7 @@ + } + return "vmov.s\t%0, %P1[%c2]"; + } +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_to_gp")] + ) + + (define_insn "neon_vget_lane_zext_internal" +@@ -2889,7 +2665,7 @@ + } + return "vmov.u\t%0, %P1[%c2]"; + } +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_to_gp")] + ) + + (define_insn "neon_vget_lane_sext_internal" +@@ -2916,7 +2692,7 @@ + + return ""; + } +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_to_gp_q")] + ) + + (define_insn "neon_vget_lane_zext_internal" +@@ -2943,7 +2719,7 @@ + + return ""; + } +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_to_gp_q")] + ) + + (define_expand "neon_vget_lane" +@@ -3075,8 +2851,7 @@ + (vec_duplicate:VX (match_operand: 1 "s_register_operand" "r")))] + "TARGET_NEON" + "vdup.\t%0, %1" +- ;; Assume this schedules like vmov. +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_from_gp")] + ) + + (define_insn "neon_vdup_n" +@@ -3086,8 +2861,7 @@ + "@ + vdup.\t%0, %1 + vdup.\t%0, %y1" +- ;; Assume this schedules like vmov. +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_from_gp,neon_dup")] + ) + + (define_expand "neon_vdup_ndi" +@@ -3108,7 +2882,7 @@ + vmov\t%e0, %Q1, %R1\;vmov\t%f0, %Q1, %R1 + vmov\t%e0, %P1\;vmov\t%f0, %P1" + [(set_attr "length" "8") +- (set_attr "neon_type" "neon_bp_simple")] ++ (set_attr "type" "multiple")] + ) + + (define_insn "neon_vdup_lane_internal" +@@ -3130,8 +2904,7 @@ + else + return "vdup.\t%q0, %P1[%c2]"; + } +- ;; Assume this schedules like vmov. +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_dup")] + ) + + (define_expand "neon_vdup_lane" +@@ -3186,10 +2959,7 @@ + (set (match_dup 1) (match_dup 0))] + "TARGET_NEON && reload_completed" + "vswp\t%0, %1" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_bp_simple") +- (const_string "neon_bp_2cycle")))] ++ [(set_attr "type" "neon_permute")] + ) + + ;; In this insn, operand 1 should be low, and operand 2 the high part of the +@@ -3211,7 +2981,9 @@ + { + neon_split_vcombine (operands); + DONE; +-}) ++} ++[(set_attr "type" "multiple")] ++) + + (define_expand "neon_vget_high" + [(match_operand: 0 "s_register_operand") +@@ -3240,10 +3012,7 @@ + (float: (match_operand:VCVTI 1 "s_register_operand" "w")))] + "TARGET_NEON && !flag_rounding_math" + "vcvt.f32.s32\t%0, %1" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_int_to_fp_")] + ) + + (define_insn "floatuns2" +@@ -3251,10 +3020,7 @@ + (unsigned_float: (match_operand:VCVTI 1 "s_register_operand" "w")))] + "TARGET_NEON && !flag_rounding_math" + "vcvt.f32.u32\t%0, %1" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_int_to_fp_")] + ) + + (define_insn "fix_trunc2" +@@ -3262,10 +3028,7 @@ + (fix: (match_operand:VCVTF 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vcvt.s32.f32\t%0, %1" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_fp_to_int_")] + ) + + (define_insn "fixuns_trunc2" +@@ -3273,10 +3036,7 @@ + (unsigned_fix: (match_operand:VCVTF 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vcvt.u32.f32\t%0, %1" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_fp_to_int_")] + ) + + (define_insn "neon_vcvt" +@@ -3286,10 +3046,7 @@ + UNSPEC_VCVT))] + "TARGET_NEON" + "vcvt.%T2%#32.f32\t%0, %1" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_fp_to_int_")] + ) + + (define_insn "neon_vcvt" +@@ -3299,12 +3056,27 @@ + UNSPEC_VCVT))] + "TARGET_NEON" + "vcvt.f32.%T2%#32\t%0, %1" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_int_to_fp_")] + ) + ++(define_insn "neon_vcvtv4sfv4hf" ++ [(set (match_operand:V4SF 0 "s_register_operand" "=w") ++ (unspec:V4SF [(match_operand:V4HF 1 "s_register_operand" "w")] ++ UNSPEC_VCVT))] ++ "TARGET_NEON && TARGET_FP16" ++ "vcvt.f32.f16\t%q0, %P1" ++ [(set_attr "type" "neon_fp_cvt_widen_h")] ++) ++ ++(define_insn "neon_vcvtv4hfv4sf" ++ [(set (match_operand:V4HF 0 "s_register_operand" "=w") ++ (unspec:V4HF [(match_operand:V4SF 1 "s_register_operand" "w")] ++ UNSPEC_VCVT))] ++ "TARGET_NEON && TARGET_FP16" ++ "vcvt.f16.f32\t%P0, %q1" ++ [(set_attr "type" "neon_fp_cvt_narrow_s_q")] ++) ++ + (define_insn "neon_vcvt_n" + [(set (match_operand: 0 "s_register_operand" "=w") + (unspec: [(match_operand:VCVTF 1 "s_register_operand" "w") +@@ -3316,10 +3088,7 @@ + neon_const_bounds (operands[2], 1, 33); + return "vcvt.%T3%#32.f32\t%0, %1, %2"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_fp_to_int_")] + ) + + (define_insn "neon_vcvt_n" +@@ -3333,10 +3102,7 @@ + neon_const_bounds (operands[2], 1, 33); + return "vcvt.f32.%T3%#32\t%0, %1, %2"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")))] ++ [(set_attr "type" "neon_int_to_fp_")] + ) + + (define_insn "neon_vmovn" +@@ -3346,7 +3112,7 @@ + UNSPEC_VMOVN))] + "TARGET_NEON" + "vmovn.\t%P0, %q1" +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_shift_imm_narrow_q")] + ) + + (define_insn "neon_vqmovn" +@@ -3356,7 +3122,7 @@ + UNSPEC_VQMOVN))] + "TARGET_NEON" + "vqmovn.%T2%#\t%P0, %q1" +- [(set_attr "neon_type" "neon_shift_2")] ++ [(set_attr "type" "neon_sat_shift_imm_narrow_q")] + ) + + (define_insn "neon_vqmovun" +@@ -3366,7 +3132,7 @@ + UNSPEC_VQMOVUN))] + "TARGET_NEON" + "vqmovun.\t%P0, %q1" +- [(set_attr "neon_type" "neon_shift_2")] ++ [(set_attr "type" "neon_sat_shift_imm_narrow_q")] + ) + + (define_insn "neon_vmovl" +@@ -3376,7 +3142,7 @@ + UNSPEC_VMOVL))] + "TARGET_NEON" + "vmovl.%T2%#\t%q0, %P1" +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_shift_imm_long")] + ) + + (define_insn "neon_vmul_lane" +@@ -3392,12 +3158,10 @@ + neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); + return "vmul.\t%P0, %P1, %P2[%c3]"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vmul_ddd") +- (if_then_else (match_test "") +- (const_string "neon_mul_ddd_16_scalar_32_16_long_scalar") +- (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar"))))] ++ (const_string "neon_fp_mul_s_scalar") ++ (const_string "neon_mul__scalar")))] + ) + + (define_insn "neon_vmul_lane" +@@ -3413,12 +3177,10 @@ + neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); + return "vmul.\t%q0, %q1, %P2[%c3]"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vmul_qqd") +- (if_then_else (match_test "") +- (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar") +- (const_string "neon_mul_qqd_32_scalar"))))] ++ (const_string "neon_fp_mul_s_scalar") ++ (const_string "neon_mul__scalar")))] + ) + + (define_insn "neon_vmull_lane" +@@ -3434,10 +3196,7 @@ + neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); + return "vmull.%T4%#\t%q0, %P1, %P2[%c3]"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mul_ddd_16_scalar_32_16_long_scalar") +- (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")))] ++ [(set_attr "type" "neon_mul__scalar_long")] + ) + + (define_insn "neon_vqdmull_lane" +@@ -3453,10 +3212,7 @@ + neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); + return "vqdmull.\t%q0, %P1, %P2[%c3]"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mul_ddd_16_scalar_32_16_long_scalar") +- (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")))] ++ [(set_attr "type" "neon_sat_mul__scalar_long")] + ) + + (define_insn "neon_vqdmulh_lane" +@@ -3472,10 +3228,7 @@ + neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); + return "vq%O4dmulh.%T4%#\t%q0, %q1, %P2[%c3]"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar") +- (const_string "neon_mul_qqd_32_scalar")))] ++ [(set_attr "type" "neon_sat_mul__scalar_q")] + ) + + (define_insn "neon_vqdmulh_lane" +@@ -3491,10 +3244,7 @@ + neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); + return "vq%O4dmulh.%T4%#\t%P0, %P1, %P2[%c3]"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mul_ddd_16_scalar_32_16_long_scalar") +- (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")))] ++ [(set_attr "type" "neon_sat_mul__scalar_q")] + ) + + (define_insn "neon_vmla_lane" +@@ -3511,12 +3261,10 @@ + neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); + return "vmla.\t%P0, %P2, %P3[%c4]"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vmla_ddd_scalar") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"))))] ++ (const_string "neon_fp_mla_s_scalar") ++ (const_string "neon_mla__scalar")))] + ) + + (define_insn "neon_vmla_lane" +@@ -3533,12 +3281,10 @@ + neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); + return "vmla.\t%q0, %q2, %P3[%c4]"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vmla_qqq_scalar") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long") +- (const_string "neon_mla_qqq_32_qqd_32_scalar"))))] ++ (const_string "neon_fp_mla_s_scalar") ++ (const_string "neon_mla__scalar")))] + ) + + (define_insn "neon_vmlal_lane" +@@ -3555,10 +3301,7 @@ + neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); + return "vmlal.%T5%#\t%q0, %P2, %P3[%c4]"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")))] ++ [(set_attr "type" "neon_mla__scalar_long")] + ) + + (define_insn "neon_vqdmlal_lane" +@@ -3575,10 +3318,7 @@ + neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); + return "vqdmlal.\t%q0, %P2, %P3[%c4]"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")))] ++ [(set_attr "type" "neon_sat_mla__scalar_long")] + ) + + (define_insn "neon_vmls_lane" +@@ -3595,12 +3335,10 @@ + neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); + return "vmls.\t%P0, %P2, %P3[%c4]"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vmla_ddd_scalar") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"))))] ++ (const_string "neon_fp_mla_s_scalar") ++ (const_string "neon_mla__scalar")))] + ) + + (define_insn "neon_vmls_lane" +@@ -3617,12 +3355,10 @@ + neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); + return "vmls.\t%q0, %q2, %P3[%c4]"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (match_test "") +- (const_string "neon_fp_vmla_qqq_scalar") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long") +- (const_string "neon_mla_qqq_32_qqd_32_scalar"))))] ++ (const_string "neon_fp_mla_s_scalar") ++ (const_string "neon_mla__scalar")))] + ) + + (define_insn "neon_vmlsl_lane" +@@ -3639,10 +3375,7 @@ + neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); + return "vmlsl.%T5%#\t%q0, %P2, %P3[%c4]"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")))] ++ [(set_attr "type" "neon_mla__scalar_long")] + ) + + (define_insn "neon_vqdmlsl_lane" +@@ -3659,10 +3392,7 @@ + neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); + return "vqdmlsl.\t%q0, %P2, %P3[%c4]"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar") +- (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")))] ++ [(set_attr "type" "neon_sat_mla__scalar_long")] + ) + + ; FIXME: For the "_n" multiply/multiply-accumulate insns, we copy a value in a +@@ -3887,10 +3617,7 @@ + neon_const_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); + return "vext.\t%0, %1, %2, %3"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_bp_simple") +- (const_string "neon_bp_2cycle")))] ++ [(set_attr "type" "neon_ext")] + ) + + (define_insn "neon_vrev64" +@@ -3900,7 +3627,7 @@ + UNSPEC_VREV64))] + "TARGET_NEON" + "vrev64.\t%0, %1" +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_rev")] + ) + + (define_insn "neon_vrev32" +@@ -3910,7 +3637,7 @@ + UNSPEC_VREV32))] + "TARGET_NEON" + "vrev32.\t%0, %1" +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_rev")] + ) + + (define_insn "neon_vrev16" +@@ -3920,7 +3647,7 @@ + UNSPEC_VREV16))] + "TARGET_NEON" + "vrev16.\t%0, %1" +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "type" "neon_rev")] + ) + + ; vbsl_* intrinsics may compile to any of vbsl/vbif/vbit depending on register +@@ -3942,7 +3669,7 @@ + vbsl\t%0, %2, %3 + vbit\t%0, %2, %1 + vbif\t%0, %3, %1" +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "type" "neon_bsl")] + ) + + (define_expand "neon_vbsl" +@@ -3965,10 +3692,7 @@ + UNSPEC_VSHL))] + "TARGET_NEON" + "v%O3shl.%T3%#\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_vshl_ddd") +- (const_string "neon_shift_3")))] ++ [(set_attr "type" "neon_shift_imm")] + ) + + (define_insn "neon_vqshl" +@@ -3979,10 +3703,7 @@ + UNSPEC_VQSHL))] + "TARGET_NEON" + "vq%O3shl.%T3%#\t%0, %1, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_shift_2") +- (const_string "neon_vqshl_vrshl_vqrshl_qqq")))] ++ [(set_attr "type" "neon_sat_shift_imm")] + ) + + (define_insn "neon_vshr_n" +@@ -3996,7 +3717,7 @@ + neon_const_bounds (operands[2], 1, neon_element_bits (mode) + 1); + return "v%O3shr.%T3%#\t%0, %1, %2"; + } +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_shift_imm")] + ) + + (define_insn "neon_vshrn_n" +@@ -4010,7 +3731,7 @@ + neon_const_bounds (operands[2], 1, neon_element_bits (mode) / 2 + 1); + return "v%O3shrn.\t%P0, %q1, %2"; + } +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_shift_imm_narrow_q")] + ) + + (define_insn "neon_vqshrn_n" +@@ -4024,7 +3745,7 @@ + neon_const_bounds (operands[2], 1, neon_element_bits (mode) / 2 + 1); + return "vq%O3shrn.%T3%#\t%P0, %q1, %2"; + } +- [(set_attr "neon_type" "neon_shift_2")] ++ [(set_attr "type" "neon_sat_shift_imm_narrow_q")] + ) + + (define_insn "neon_vqshrun_n" +@@ -4038,7 +3759,7 @@ + neon_const_bounds (operands[2], 1, neon_element_bits (mode) / 2 + 1); + return "vq%O3shrun.%T3%#\t%P0, %q1, %2"; + } +- [(set_attr "neon_type" "neon_shift_2")] ++ [(set_attr "type" "neon_sat_shift_imm_narrow_q")] + ) + + (define_insn "neon_vshl_n" +@@ -4052,7 +3773,7 @@ + neon_const_bounds (operands[2], 0, neon_element_bits (mode)); + return "vshl.\t%0, %1, %2"; + } +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_shift_imm")] + ) + + (define_insn "neon_vqshl_n" +@@ -4066,7 +3787,7 @@ + neon_const_bounds (operands[2], 0, neon_element_bits (mode)); + return "vqshl.%T3%#\t%0, %1, %2"; + } +- [(set_attr "neon_type" "neon_shift_2")] ++ [(set_attr "type" "neon_sat_shift_imm")] + ) + + (define_insn "neon_vqshlu_n" +@@ -4080,7 +3801,7 @@ + neon_const_bounds (operands[2], 0, neon_element_bits (mode)); + return "vqshlu.%T3%#\t%0, %1, %2"; + } +- [(set_attr "neon_type" "neon_shift_2")] ++ [(set_attr "type" "neon_sat_shift_imm")] + ) + + (define_insn "neon_vshll_n" +@@ -4095,7 +3816,7 @@ + neon_const_bounds (operands[2], 0, neon_element_bits (mode) + 1); + return "vshll.%T3%#\t%q0, %P1, %2"; + } +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_shift_imm_long")] + ) + + (define_insn "neon_vsra_n" +@@ -4110,7 +3831,7 @@ + neon_const_bounds (operands[3], 1, neon_element_bits (mode) + 1); + return "v%O4sra.%T4%#\t%0, %2, %3"; + } +- [(set_attr "neon_type" "neon_vsra_vrsra")] ++ [(set_attr "type" "neon_shift_acc")] + ) + + (define_insn "neon_vsri_n" +@@ -4124,10 +3845,7 @@ + neon_const_bounds (operands[3], 1, neon_element_bits (mode) + 1); + return "vsri.\t%0, %2, %3"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_shift_1") +- (const_string "neon_shift_3")))] ++ [(set_attr "type" "neon_shift_reg")] + ) + + (define_insn "neon_vsli_n" +@@ -4141,10 +3859,7 @@ + neon_const_bounds (operands[3], 0, neon_element_bits (mode)); + return "vsli.\t%0, %2, %3"; + } +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_shift_1") +- (const_string "neon_shift_3")))] ++ [(set_attr "type" "neon_shift_reg")] + ) + + (define_insn "neon_vtbl1v8qi" +@@ -4154,7 +3869,7 @@ + UNSPEC_VTBL))] + "TARGET_NEON" + "vtbl.8\t%P0, {%P1}, %P2" +- [(set_attr "neon_type" "neon_bp_2cycle")] ++ [(set_attr "type" "neon_tbl1")] + ) + + (define_insn "neon_vtbl2v8qi" +@@ -4175,7 +3890,7 @@ + + return ""; + } +- [(set_attr "neon_type" "neon_bp_2cycle")] ++ [(set_attr "type" "neon_tbl2")] + ) + + (define_insn "neon_vtbl3v8qi" +@@ -4197,7 +3912,7 @@ + + return ""; + } +- [(set_attr "neon_type" "neon_bp_3cycle")] ++ [(set_attr "type" "neon_tbl3")] + ) + + (define_insn "neon_vtbl4v8qi" +@@ -4220,7 +3935,7 @@ + + return ""; + } +- [(set_attr "neon_type" "neon_bp_3cycle")] ++ [(set_attr "type" "neon_tbl4")] + ) + + ;; These three are used by the vec_perm infrastructure for V16QImode. +@@ -4251,7 +3966,9 @@ + part2 = simplify_subreg (V8QImode, op2, V16QImode, ofs); + emit_insn (gen_neon_vtbl2v8qi (part0, op1, part2)); + DONE; +-}) ++} ++ [(set_attr "type" "multiple")] ++) + + (define_insn_and_split "neon_vtbl2v16qi" + [(set (match_operand:V16QI 0 "s_register_operand" "=&w") +@@ -4280,7 +3997,9 @@ + part2 = simplify_subreg (V8QImode, op2, V16QImode, ofs); + emit_insn (gen_neon_vtbl2v8qi (part0, op1, part2)); + DONE; +-}) ++} ++ [(set_attr "type" "multiple")] ++) + + ;; ??? Logically we should extend the regular neon_vcombine pattern to + ;; handle quad-word input modes, producing octa-word output modes. But +@@ -4298,7 +4017,9 @@ + { + neon_split_vcombine (operands); + DONE; +-}) ++} ++[(set_attr "type" "multiple")] ++) + + (define_insn "neon_vtbx1v8qi" + [(set (match_operand:V8QI 0 "s_register_operand" "=w") +@@ -4308,7 +4029,7 @@ + UNSPEC_VTBX))] + "TARGET_NEON" + "vtbx.8\t%P0, {%P2}, %P3" +- [(set_attr "neon_type" "neon_bp_2cycle")] ++ [(set_attr "type" "neon_tbl1")] + ) + + (define_insn "neon_vtbx2v8qi" +@@ -4330,7 +4051,7 @@ + + return ""; + } +- [(set_attr "neon_type" "neon_bp_2cycle")] ++ [(set_attr "type" "neon_tbl2")] + ) + + (define_insn "neon_vtbx3v8qi" +@@ -4353,7 +4074,7 @@ + + return ""; + } +- [(set_attr "neon_type" "neon_bp_3cycle")] ++ [(set_attr "type" "neon_tbl3")] + ) + + (define_insn "neon_vtbx4v8qi" +@@ -4377,7 +4098,7 @@ + + return ""; + } +- [(set_attr "neon_type" "neon_bp_3cycle")] ++ [(set_attr "type" "neon_tbl4")] + ) + + (define_expand "neon_vtrn_internal" +@@ -4403,10 +4124,7 @@ + UNSPEC_VTRN2))] + "TARGET_NEON" + "vtrn.\t%0, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_bp_simple") +- (const_string "neon_bp_3cycle")))] ++ [(set_attr "type" "neon_permute")] + ) + + (define_expand "neon_vtrn" +@@ -4443,10 +4161,7 @@ + UNSPEC_VZIP2))] + "TARGET_NEON" + "vzip.\t%0, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_bp_simple") +- (const_string "neon_bp_3cycle")))] ++ [(set_attr "type" "neon_zip")] + ) + + (define_expand "neon_vzip" +@@ -4483,10 +4198,7 @@ + UNSPEC_VUZP2))] + "TARGET_NEON" + "vuzp.\t%0, %2" +- [(set (attr "neon_type") +- (if_then_else (match_test "") +- (const_string "neon_bp_simple") +- (const_string "neon_bp_3cycle")))] ++ [(set_attr "type" "neon_zip")] + ) + + (define_expand "neon_vuzp" +@@ -4545,9 +4257,19 @@ + DONE; + }) + ++(define_expand "neon_vreinterpretti" ++ [(match_operand:TI 0 "s_register_operand" "") ++ (match_operand:VQXMOV 1 "s_register_operand" "")] ++ "TARGET_NEON" ++{ ++ neon_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++ + (define_expand "neon_vreinterpretv16qi" + [(match_operand:V16QI 0 "s_register_operand" "") +- (match_operand:VQX 1 "s_register_operand" "")] ++ (match_operand:VQXMOV 1 "s_register_operand" "")] + "TARGET_NEON" + { + neon_reinterpret (operands[0], operands[1]); +@@ -4556,7 +4278,7 @@ + + (define_expand "neon_vreinterpretv8hi" + [(match_operand:V8HI 0 "s_register_operand" "") +- (match_operand:VQX 1 "s_register_operand" "")] ++ (match_operand:VQXMOV 1 "s_register_operand" "")] + "TARGET_NEON" + { + neon_reinterpret (operands[0], operands[1]); +@@ -4565,7 +4287,7 @@ + + (define_expand "neon_vreinterpretv4si" + [(match_operand:V4SI 0 "s_register_operand" "") +- (match_operand:VQX 1 "s_register_operand" "")] ++ (match_operand:VQXMOV 1 "s_register_operand" "")] + "TARGET_NEON" + { + neon_reinterpret (operands[0], operands[1]); +@@ -4574,7 +4296,7 @@ + + (define_expand "neon_vreinterpretv4sf" + [(match_operand:V4SF 0 "s_register_operand" "") +- (match_operand:VQX 1 "s_register_operand" "")] ++ (match_operand:VQXMOV 1 "s_register_operand" "")] + "TARGET_NEON" + { + neon_reinterpret (operands[0], operands[1]); +@@ -4583,7 +4305,7 @@ + + (define_expand "neon_vreinterpretv2di" + [(match_operand:V2DI 0 "s_register_operand" "") +- (match_operand:VQX 1 "s_register_operand" "")] ++ (match_operand:VQXMOV 1 "s_register_operand" "")] + "TARGET_NEON" + { + neon_reinterpret (operands[0], operands[1]); +@@ -4602,7 +4324,7 @@ + UNSPEC_VLD1))] + "TARGET_NEON" + "vld1.\t%h0, %A1" +- [(set_attr "neon_type" "neon_vld1_1_2_regs")] ++ [(set_attr "type" "neon_load1_1reg")] + ) + + (define_insn "neon_vld1_lane" +@@ -4622,10 +4344,7 @@ + else + return "vld1.\t{%P0[%c3]}, %A1"; + } +- [(set (attr "neon_type") +- (if_then_else (eq (const_string "") (const_int 2)) +- (const_string "neon_vld1_1_2_regs") +- (const_string "neon_vld1_vld2_lane")))] ++ [(set_attr "type" "neon_load1_one_lane")] + ) + + (define_insn "neon_vld1_lane" +@@ -4653,28 +4372,26 @@ + else + return "vld1.\t{%P0[%c3]}, %A1"; + } +- [(set (attr "neon_type") +- (if_then_else (eq (const_string "") (const_int 2)) +- (const_string "neon_vld1_1_2_regs") +- (const_string "neon_vld1_vld2_lane")))] ++ [(set_attr "type" "neon_load1_one_lane")] + ) + + (define_insn "neon_vld1_dup" +- [(set (match_operand:VDX 0 "s_register_operand" "=w") +- (vec_duplicate:VDX (match_operand: 1 "neon_struct_operand" "Um")))] ++ [(set (match_operand:VD 0 "s_register_operand" "=w") ++ (vec_duplicate:VD (match_operand: 1 "neon_struct_operand" "Um")))] + "TARGET_NEON" +-{ +- if (GET_MODE_NUNITS (mode) > 1) +- return "vld1.\t{%P0[]}, %A1"; +- else +- return "vld1.\t%h0, %A1"; +-} +- [(set (attr "neon_type") +- (if_then_else (gt (const_string "") (const_string "1")) +- (const_string "neon_vld2_2_regs_vld1_vld2_all_lanes") +- (const_string "neon_vld1_1_2_regs")))] ++ "vld1.\t{%P0[]}, %A1" ++ [(set_attr "type" "neon_load1_all_lanes")] + ) + ++;; Special case for DImode. Treat it exactly like a simple load. ++(define_expand "neon_vld1_dupdi" ++ [(set (match_operand:DI 0 "s_register_operand" "") ++ (unspec:DI [(match_operand:DI 1 "neon_struct_operand" "")] ++ UNSPEC_VLD1))] ++ "TARGET_NEON" ++ "" ++) ++ + (define_insn "neon_vld1_dup" + [(set (match_operand:VQ 0 "s_register_operand" "=w") + (vec_duplicate:VQ (match_operand: 1 "neon_struct_operand" "Um")))] +@@ -4682,7 +4399,7 @@ + { + return "vld1.\t{%e0[], %f0[]}, %A1"; + } +- [(set_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")] ++ [(set_attr "type" "neon_load1_all_lanes")] + ) + + (define_insn_and_split "neon_vld1_dupv2di" +@@ -4699,7 +4416,7 @@ + DONE; + } + [(set_attr "length" "8") +- (set_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")] ++ (set_attr "type" "neon_load1_all_lanes_q")] + ) + + (define_expand "vec_store_lanes" +@@ -4714,7 +4431,7 @@ + UNSPEC_VST1))] + "TARGET_NEON" + "vst1.\t%h1, %A0" +- [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")]) ++ [(set_attr "type" "neon_store1_1reg")]) + + (define_insn "neon_vst1_lane" + [(set (match_operand: 0 "neon_struct_operand" "=Um") +@@ -4733,10 +4450,8 @@ + else + return "vst1.\t{%P1[%c2]}, %A0"; + } +- [(set (attr "neon_type") +- (if_then_else (eq (const_string "") (const_int 1)) +- (const_string "neon_vst1_1_2_regs_vst2_2_regs") +- (const_string "neon_vst1_vst2_lane")))]) ++ [(set_attr "type" "neon_store1_one_lane")] ++) + + (define_insn "neon_vst1_lane" + [(set (match_operand: 0 "neon_struct_operand" "=Um") +@@ -4763,7 +4478,7 @@ + else + return "vst1.\t{%P1[%c2]}, %A0"; + } +- [(set_attr "neon_type" "neon_vst1_vst2_lane")] ++ [(set_attr "type" "neon_store1_one_lane")] + ) + + (define_expand "vec_load_lanesti" +@@ -4785,10 +4500,10 @@ + else + return "vld2.\t%h0, %A1"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (eq (const_string "") (const_string "64")) +- (const_string "neon_vld1_1_2_regs") +- (const_string "neon_vld2_2_regs_vld1_vld2_all_lanes")))] ++ (const_string "neon_load1_2reg") ++ (const_string "neon_load2_2reg")))] + ) + + (define_expand "vec_load_lanesoi" +@@ -4805,7 +4520,7 @@ + UNSPEC_VLD2))] + "TARGET_NEON" + "vld2.\t%h0, %A1" +- [(set_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")]) ++ [(set_attr "type" "neon_load2_2reg_q")]) + + (define_insn "neon_vld2_lane" + [(set (match_operand:TI 0 "s_register_operand" "=w") +@@ -4829,7 +4544,7 @@ + output_asm_insn ("vld2.\t{%P0[%c3], %P1[%c3]}, %A2", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vld1_vld2_lane")] ++ [(set_attr "type" "neon_load2_one_lane")] + ) + + (define_insn "neon_vld2_lane" +@@ -4859,7 +4574,7 @@ + output_asm_insn ("vld2.\t{%P0[%c3], %P1[%c3]}, %A2", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vld1_vld2_lane")] ++ [(set_attr "type" "neon_load2_one_lane")] + ) + + (define_insn "neon_vld2_dup" +@@ -4874,10 +4589,10 @@ + else + return "vld1.\t%h0, %A1"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (gt (const_string "") (const_string "1")) +- (const_string "neon_vld2_2_regs_vld1_vld2_all_lanes") +- (const_string "neon_vld1_1_2_regs")))] ++ (const_string "neon_load2_all_lanes") ++ (const_string "neon_load1_1reg")))] + ) + + (define_expand "vec_store_lanesti" +@@ -4899,10 +4614,10 @@ + else + return "vst2.\t%h1, %A0"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (eq (const_string "") (const_string "64")) +- (const_string "neon_vst1_1_2_regs_vst2_2_regs") +- (const_string "neon_vst1_1_2_regs_vst2_2_regs")))] ++ (const_string "neon_store1_2reg") ++ (const_string "neon_store2_one_lane")))] + ) + + (define_expand "vec_store_lanesoi" +@@ -4919,7 +4634,7 @@ + UNSPEC_VST2))] + "TARGET_NEON" + "vst2.\t%h1, %A0" +- [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")] ++ [(set_attr "type" "neon_store2_4reg")] + ) + + (define_insn "neon_vst2_lane" +@@ -4944,7 +4659,7 @@ + output_asm_insn ("vst2.\t{%P1[%c3], %P2[%c3]}, %A0", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vst1_vst2_lane")] ++ [(set_attr "type" "neon_store2_one_lane")] + ) + + (define_insn "neon_vst2_lane" +@@ -4974,7 +4689,7 @@ + output_asm_insn ("vst2.\t{%P1[%c3], %P2[%c3]}, %A0", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vst1_vst2_lane")] ++ [(set_attr "type" "neon_store2_one_lane")] + ) + + (define_expand "vec_load_lanesei" +@@ -4996,10 +4711,10 @@ + else + return "vld3.\t%h0, %A1"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (eq (const_string "") (const_string "64")) +- (const_string "neon_vld1_1_2_regs") +- (const_string "neon_vld3_vld4")))] ++ (const_string "neon_load1_3reg") ++ (const_string "neon_load3_3reg")))] + ) + + (define_expand "vec_load_lanesci" +@@ -5043,7 +4758,7 @@ + output_asm_insn ("vld3.\t{%P0, %P1, %P2}, %A3", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vld3_vld4")] ++ [(set_attr "type" "neon_load3_3reg")] + ) + + (define_insn "neon_vld3qb" +@@ -5063,7 +4778,7 @@ + output_asm_insn ("vld3.\t{%P0, %P1, %P2}, %A3", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vld3_vld4")] ++ [(set_attr "type" "neon_load3_3reg")] + ) + + (define_insn "neon_vld3_lane" +@@ -5090,7 +4805,7 @@ + ops); + return ""; + } +- [(set_attr "neon_type" "neon_vld3_vld4_lane")] ++ [(set_attr "type" "neon_load3_one_lane")] + ) + + (define_insn "neon_vld3_lane" +@@ -5122,7 +4837,7 @@ + ops); + return ""; + } +- [(set_attr "neon_type" "neon_vld3_vld4_lane")] ++ [(set_attr "type" "neon_load3_one_lane")] + ) + + (define_insn "neon_vld3_dup" +@@ -5146,10 +4861,10 @@ + else + return "vld1.\t%h0, %A1"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (gt (const_string "") (const_string "1")) +- (const_string "neon_vld3_vld4_all_lanes") +- (const_string "neon_vld1_1_2_regs")))]) ++ (const_string "neon_load3_all_lanes") ++ (const_string "neon_load1_1reg")))]) + + (define_expand "vec_store_lanesei" + [(set (match_operand:EI 0 "neon_struct_operand") +@@ -5170,10 +4885,10 @@ + else + return "vst3.\t%h1, %A0"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (eq (const_string "") (const_string "64")) +- (const_string "neon_vst1_1_2_regs_vst2_2_regs") +- (const_string "neon_vst2_4_regs_vst3_vst4")))]) ++ (const_string "neon_store1_3reg") ++ (const_string "neon_store3_one_lane")))]) + + (define_expand "vec_store_lanesci" + [(match_operand:CI 0 "neon_struct_operand") +@@ -5216,7 +4931,7 @@ + output_asm_insn ("vst3.\t{%P1, %P2, %P3}, %A0", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] ++ [(set_attr "type" "neon_store3_3reg")] + ) + + (define_insn "neon_vst3qb" +@@ -5235,7 +4950,7 @@ + output_asm_insn ("vst3.\t{%P1, %P2, %P3}, %A0", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] ++ [(set_attr "type" "neon_store3_3reg")] + ) + + (define_insn "neon_vst3_lane" +@@ -5262,7 +4977,7 @@ + ops); + return ""; + } +- [(set_attr "neon_type" "neon_vst3_vst4_lane")] ++ [(set_attr "type" "neon_store3_one_lane")] + ) + + (define_insn "neon_vst3_lane" +@@ -5294,7 +5009,8 @@ + ops); + return ""; + } +-[(set_attr "neon_type" "neon_vst3_vst4_lane")]) ++ [(set_attr "type" "neon_store3_one_lane")] ++) + + (define_expand "vec_load_lanesoi" + [(set (match_operand:OI 0 "s_register_operand") +@@ -5315,10 +5031,10 @@ + else + return "vld4.\t%h0, %A1"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (eq (const_string "") (const_string "64")) +- (const_string "neon_vld1_1_2_regs") +- (const_string "neon_vld3_vld4")))] ++ (const_string "neon_load1_4reg") ++ (const_string "neon_load4_4reg")))] + ) + + (define_expand "vec_load_lanesxi" +@@ -5363,7 +5079,7 @@ + output_asm_insn ("vld4.\t{%P0, %P1, %P2, %P3}, %A4", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vld3_vld4")] ++ [(set_attr "type" "neon_load4_4reg")] + ) + + (define_insn "neon_vld4qb" +@@ -5384,7 +5100,7 @@ + output_asm_insn ("vld4.\t{%P0, %P1, %P2, %P3}, %A4", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vld3_vld4")] ++ [(set_attr "type" "neon_load4_4reg")] + ) + + (define_insn "neon_vld4_lane" +@@ -5412,7 +5128,7 @@ + ops); + return ""; + } +- [(set_attr "neon_type" "neon_vld3_vld4_lane")] ++ [(set_attr "type" "neon_load4_one_lane")] + ) + + (define_insn "neon_vld4_lane" +@@ -5445,7 +5161,7 @@ + ops); + return ""; + } +- [(set_attr "neon_type" "neon_vld3_vld4_lane")] ++ [(set_attr "type" "neon_load4_one_lane")] + ) + + (define_insn "neon_vld4_dup" +@@ -5471,10 +5187,10 @@ + else + return "vld1.\t%h0, %A1"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (gt (const_string "") (const_string "1")) +- (const_string "neon_vld3_vld4_all_lanes") +- (const_string "neon_vld1_1_2_regs")))] ++ (const_string "neon_load4_all_lanes") ++ (const_string "neon_load1_1reg")))] + ) + + (define_expand "vec_store_lanesoi" +@@ -5496,10 +5212,10 @@ + else + return "vst4.\t%h1, %A0"; + } +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (eq (const_string "") (const_string "64")) +- (const_string "neon_vst1_1_2_regs_vst2_2_regs") +- (const_string "neon_vst2_4_regs_vst3_vst4")))] ++ (const_string "neon_store1_4reg") ++ (const_string "neon_store4_4reg")))] + ) + + (define_expand "vec_store_lanesxi" +@@ -5544,7 +5260,7 @@ + output_asm_insn ("vst4.\t{%P1, %P2, %P3, %P4}, %A0", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] ++ [(set_attr "type" "neon_store4_4reg")] + ) + + (define_insn "neon_vst4qb" +@@ -5564,7 +5280,7 @@ + output_asm_insn ("vst4.\t{%P1, %P2, %P3, %P4}, %A0", ops); + return ""; + } +- [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] ++ [(set_attr "type" "neon_store4_4reg")] + ) + + (define_insn "neon_vst4_lane" +@@ -5592,7 +5308,7 @@ + ops); + return ""; + } +- [(set_attr "neon_type" "neon_vst3_vst4_lane")] ++ [(set_attr "type" "neon_store4_one_lane")] + ) + + (define_insn "neon_vst4_lane" +@@ -5625,7 +5341,7 @@ + ops); + return ""; + } +- [(set_attr "neon_type" "neon_vst3_vst4_lane")] ++ [(set_attr "type" "neon_store4_4reg")] + ) + + (define_expand "neon_vand" +@@ -5635,7 +5351,7 @@ + (match_operand:SI 3 "immediate_operand" "")] + "TARGET_NEON" + { +- emit_insn (gen_and3 (operands[0], operands[1], operands[2])); ++ emit_insn (gen_and3 (operands[0], operands[1], operands[2])); + DONE; + }) + +@@ -5646,7 +5362,7 @@ + (match_operand:SI 3 "immediate_operand" "")] + "TARGET_NEON" + { +- emit_insn (gen_ior3 (operands[0], operands[1], operands[2])); ++ emit_insn (gen_ior3 (operands[0], operands[1], operands[2])); + DONE; + }) + +@@ -5657,7 +5373,7 @@ + (match_operand:SI 3 "immediate_operand" "")] + "TARGET_NEON" + { +- emit_insn (gen_xor3 (operands[0], operands[1], operands[2])); ++ emit_insn (gen_xor3 (operands[0], operands[1], operands[2])); + DONE; + }) + +@@ -5690,7 +5406,7 @@ + (match_operand:VU 2 "vect_par_constant_low" ""))))] + "TARGET_NEON && !BYTES_BIG_ENDIAN" + "vmovl. %q0, %e1" +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_shift_imm_long")] + ) + + (define_insn "neon_vec_unpack_hi_" +@@ -5700,7 +5416,7 @@ + (match_operand:VU 2 "vect_par_constant_high" ""))))] + "TARGET_NEON && !BYTES_BIG_ENDIAN" + "vmovl. %q0, %f1" +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_shift_imm_long")] + ) + + (define_expand "vec_unpack_hi_" +@@ -5750,7 +5466,7 @@ + (match_dup 2)))))] + "TARGET_NEON && !BYTES_BIG_ENDIAN" + "vmull. %q0, %e1, %e3" +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_mul__long")] + ) + + (define_expand "vec_widen_mult_lo_" +@@ -5784,7 +5500,7 @@ + (match_dup 2)))))] + "TARGET_NEON && !BYTES_BIG_ENDIAN" + "vmull. %q0, %f1, %f3" +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_mul__long")] + ) + + (define_expand "vec_widen_mult_hi_" +@@ -5817,7 +5533,7 @@ + { + return "vshll. %q0, %P1, %2"; + } +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_shift_imm_long")] + ) + + (define_expand "vec_widen_shiftl_lo_" +@@ -5853,7 +5569,7 @@ + (SE: (match_operand:VDI 1 "register_operand" "w")))] + "TARGET_NEON" + "vmovl. %q0, %P1" +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_move")] + ) + + (define_expand "vec_unpack_lo_" +@@ -5890,7 +5606,7 @@ + (match_operand:VDI 2 "register_operand" "w"))))] + "TARGET_NEON" + "vmull. %q0, %P1, %P2" +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_mul__long")] + ) + + (define_expand "vec_widen_mult_hi_" +@@ -5964,7 +5680,7 @@ + (match_operand:VN 2 "register_operand" "w"))))] + "TARGET_NEON && !BYTES_BIG_ENDIAN" + "vmovn.i\t%e0, %q1\;vmovn.i\t%f0, %q2" +- [(set_attr "neon_type" "neon_shift_1") ++ [(set_attr "type" "multiple") + (set_attr "length" "8")] + ) + +@@ -5974,7 +5690,7 @@ + (truncate: (match_operand:VN 1 "register_operand" "w")))] + "TARGET_NEON && !BYTES_BIG_ENDIAN" + "vmovn.i\t%P0, %q1" +- [(set_attr "neon_type" "neon_shift_1")] ++ [(set_attr "type" "neon_move_narrow_q")] + ) + + (define_expand "vec_pack_trunc_" +@@ -5997,12 +5713,10 @@ + (match_operand:VDQ 2 "s_register_operand" "w"))))] + "TARGET_NEON && (! || flag_unsafe_math_optimizations)" + "vabd. %0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (ne (symbol_ref "") (const_int 0)) +- (if_then_else (ne (symbol_ref "") (const_int 0)) +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_abd_s") ++ (const_string "neon_abd")))] + ) + + (define_insn "neon_vabd_3" +@@ -6012,12 +5726,10 @@ + UNSPEC_VSUB)))] + "TARGET_NEON && (! || flag_unsafe_math_optimizations)" + "vabd. %0, %1, %2" +- [(set (attr "neon_type") ++ [(set (attr "type") + (if_then_else (ne (symbol_ref "") (const_int 0)) +- (if_then_else (ne (symbol_ref "") (const_int 0)) +- (const_string "neon_fp_vadd_ddd_vabs_dd") +- (const_string "neon_fp_vadd_qqq_vabs_qq")) +- (const_string "neon_int_5")))] ++ (const_string "neon_fp_abd_s") ++ (const_string "neon_abd")))] + ) + + ;; Copy from core-to-neon regs, then extend, not vice-versa +--- a/src/gcc/config/arm/ldmstm.md ++++ b/src/gcc/config/arm/ldmstm.md +@@ -37,7 +37,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "ldm%(ia%)\t%5, {%1, %2, %3, %4}" + [(set_attr "type" "load4") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb_ldm4_ia" + [(match_parallel 0 "load_multiple_operation" +@@ -74,7 +75,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 5" + "ldm%(ia%)\t%5!, {%1, %2, %3, %4}" + [(set_attr "type" "load4") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb_ldm4_ia_update" + [(match_parallel 0 "load_multiple_operation" +@@ -108,7 +110,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "stm%(ia%)\t%5, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*stm4_ia_update" + [(match_parallel 0 "store_multiple_operation" +@@ -125,7 +128,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 5" + "stm%(ia%)\t%5!, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb_stm4_ia_update" + [(match_parallel 0 "store_multiple_operation" +@@ -302,7 +306,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "ldm%(db%)\t%5, {%1, %2, %3, %4}" + [(set_attr "type" "load4") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*ldm4_db_update" + [(match_parallel 0 "load_multiple_operation" +@@ -323,7 +328,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 5" + "ldm%(db%)\t%5!, {%1, %2, %3, %4}" + [(set_attr "type" "load4") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*stm4_db" + [(match_parallel 0 "store_multiple_operation" +@@ -338,7 +344,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "stm%(db%)\t%5, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*stm4_db_update" + [(match_parallel 0 "store_multiple_operation" +@@ -355,7 +362,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 5" + "stm%(db%)\t%5!, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_peephole2 + [(set (match_operand:SI 0 "s_register_operand" "") +@@ -477,7 +485,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "ldm%(ia%)\t%4, {%1, %2, %3}" + [(set_attr "type" "load3") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb_ldm3_ia" + [(match_parallel 0 "load_multiple_operation" +@@ -508,7 +517,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "ldm%(ia%)\t%4!, {%1, %2, %3}" + [(set_attr "type" "load3") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb_ldm3_ia_update" + [(match_parallel 0 "load_multiple_operation" +@@ -537,7 +547,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "stm%(ia%)\t%4, {%1, %2, %3}" + [(set_attr "type" "store3") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*stm3_ia_update" + [(match_parallel 0 "store_multiple_operation" +@@ -552,7 +563,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "stm%(ia%)\t%4!, {%1, %2, %3}" + [(set_attr "type" "store3") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb_stm3_ia_update" + [(match_parallel 0 "store_multiple_operation" +@@ -704,7 +716,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "ldm%(db%)\t%4, {%1, %2, %3}" + [(set_attr "type" "load3") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*ldm3_db_update" + [(match_parallel 0 "load_multiple_operation" +@@ -722,7 +735,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "ldm%(db%)\t%4!, {%1, %2, %3}" + [(set_attr "type" "load3") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*stm3_db" + [(match_parallel 0 "store_multiple_operation" +@@ -735,7 +749,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "stm%(db%)\t%4, {%1, %2, %3}" + [(set_attr "type" "store3") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*stm3_db_update" + [(match_parallel 0 "store_multiple_operation" +@@ -750,7 +765,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "stm%(db%)\t%4!, {%1, %2, %3}" + [(set_attr "type" "store3") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_peephole2 + [(set (match_operand:SI 0 "s_register_operand" "") +@@ -855,7 +871,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 2" + "ldm%(ia%)\t%3, {%1, %2}" + [(set_attr "type" "load2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb_ldm2_ia" + [(match_parallel 0 "load_multiple_operation" +@@ -880,7 +897,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "ldm%(ia%)\t%3!, {%1, %2}" + [(set_attr "type" "load2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb_ldm2_ia_update" + [(match_parallel 0 "load_multiple_operation" +@@ -904,7 +922,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 2" + "stm%(ia%)\t%3, {%1, %2}" + [(set_attr "type" "store2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*stm2_ia_update" + [(match_parallel 0 "store_multiple_operation" +@@ -917,7 +936,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "stm%(ia%)\t%3!, {%1, %2}" + [(set_attr "type" "store2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb_stm2_ia_update" + [(match_parallel 0 "store_multiple_operation" +@@ -1044,7 +1064,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 2" + "ldm%(db%)\t%3, {%1, %2}" + [(set_attr "type" "load2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*ldm2_db_update" + [(match_parallel 0 "load_multiple_operation" +@@ -1059,7 +1080,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "ldm%(db%)\t%3!, {%1, %2}" + [(set_attr "type" "load2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*stm2_db" + [(match_parallel 0 "store_multiple_operation" +@@ -1070,7 +1092,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 2" + "stm%(db%)\t%3, {%1, %2}" + [(set_attr "type" "store2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*stm2_db_update" + [(match_parallel 0 "store_multiple_operation" +@@ -1083,7 +1106,8 @@ + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "stm%(db%)\t%3!, {%1, %2}" + [(set_attr "type" "store2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_peephole2 + [(set (match_operand:SI 0 "s_register_operand" "") +--- a/src/gcc/config/arm/types.md ++++ b/src/gcc/config/arm/types.md +@@ -0,0 +1,1076 @@ ++;; Instruction Classification for ARM for GNU compiler. ++ ++;; Copyright (C) 1991-2013 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++ ++;; This file is part of GCC. ++ ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published ++;; by the Free Software Foundation; either version 3, or (at your ++;; option) any later version. ++ ++;; GCC is distributed in the hope that it will be useful, but WITHOUT ++;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++;; License for more details. ++ ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++; TYPE attribute is used to classify instructions for use in scheduling. ++; ++; Instruction classification: ++; ++; adc_imm add/subtract with carry and with an immediate operand. ++; adc_reg add/subtract with carry and no immediate operand. ++; adcs_imm as adc_imm, setting condition flags. ++; adcs_reg as adc_reg, setting condition flags. ++; adr calculate address. ++; alu_ext From ARMv8-A: any arithmetic instruction that has a ++; sign/zero-extended. ++; AArch64 Only. ++; source operand ++; alu_imm any arithmetic instruction that doesn't have a shifted ++; operand and has an immediate operand. This ++; excludes MOV, MVN and RSB(S) immediate. ++; alu_reg any arithmetic instruction that doesn't have a shifted ++; or an immediate operand. This excludes ++; MOV and MVN but includes MOVT. This is also the default. ++; alu_shift_imm any arithmetic instruction that has a source operand ++; shifted by a constant. This excludes simple shifts. ++; alu_shift_reg as alu_shift_imm, with the shift amount specified in a ++; register. ++; alus_ext From ARMv8-A: as alu_ext, setting condition flags. ++; AArch64 Only. ++; alus_imm as alu_imm, setting condition flags. ++; alus_reg as alu_reg, setting condition flags. ++; alus_shift_imm as alu_shift_imm, setting condition flags. ++; alus_shift_reg as alu_shift_reg, setting condition flags. ++; bfm bitfield move operation. ++; block blockage insn, this blocks all functional units. ++; branch branch. ++; call subroutine call. ++; clz count leading zeros (CLZ). ++; csel From ARMv8-A: conditional select. ++; extend extend instruction (SXTB, SXTH, UXTB, UXTH). ++; f_cvt conversion between float representations. ++; f_cvtf2i conversion between float and integral types. ++; f_cvti2f conversion between integral and float types. ++; f_flag transfer of co-processor flags to the CPSR. ++; f_load[d,s] double/single load from memory. Used for VFP unit. ++; f_mcr transfer arm to vfp reg. ++; f_mcrr transfer two arm regs to vfp reg. ++; f_minmax[d,s] double/single floating point minimum/maximum. ++; f_mrc transfer vfp to arm reg. ++; f_mrrc transfer vfp to two arm regs. ++; f_rint[d,s] double/single floating point rount to integral. ++; f_sel[d,s] double/single floating byte select. ++; f_store[d,s] double/single store to memory. Used for VFP unit. ++; fadd[d,s] double/single floating-point scalar addition. ++; fcmp[d,s] double/single floating-point compare. ++; fconst[d,s] double/single load immediate. ++; fcsel From ARMv8-A: Floating-point conditional select. ++; fdiv[d,s] double/single precision floating point division. ++; ffarith[d,s] double/single floating point abs/neg/cpy. ++; ffma[d,s] double/single floating point fused multiply-accumulate. ++; float floating point arithmetic operation. ++; fmac[d,s] double/single floating point multiply-accumulate. ++; fmov floating point to floating point register move. ++; fmul[d,s] double/single floating point multiply. ++; fsqrt[d,s] double/single precision floating point square root. ++; load_acq load-acquire. ++; load_byte load byte(s) from memory to arm registers. ++; load1 load 1 word from memory to arm registers. ++; load2 load 2 words from memory to arm registers. ++; load3 load 3 words from memory to arm registers. ++; load4 load 4 words from memory to arm registers. ++; logic_imm any logical instruction that doesn't have a shifted ++; operand and has an immediate operand. ++; logic_reg any logical instruction that doesn't have a shifted ++; operand or an immediate operand. ++; logic_shift_imm any logical instruction that has a source operand ++; shifted by a constant. This excludes simple shifts. ++; logic_shift_reg as logic_shift_imm, with the shift amount specified in a ++; register. ++; logics_imm as logic_imm, setting condition flags. ++; logics_reg as logic_reg, setting condition flags. ++; logics_shift_imm as logic_shift_imm, setting condition flags. ++; logics_shift_reg as logic_shift_reg, setting condition flags. ++; mla integer multiply accumulate. ++; mlas integer multiply accumulate, flag setting. ++; mov_imm simple MOV instruction that moves an immediate to ++; register. This includes MOVW, but not MOVT. ++; mov_reg simple MOV instruction that moves a register to another ++; register. This includes MOVW, but not MOVT. ++; mov_shift simple MOV instruction, shifted operand by a constant. ++; mov_shift_reg simple MOV instruction, shifted operand by a register. ++; mrs system/special/co-processor register move. ++; mul integer multiply. ++; muls integer multiply, flag setting. ++; multiple more than one instruction, candidate for future ++; splitting, or better modeling. ++; mvn_imm inverting move instruction, immediate. ++; mvn_reg inverting move instruction, register. ++; mvn_shift inverting move instruction, shifted operand by a constant. ++; mvn_shift_reg inverting move instruction, shifted operand by a register. ++; no_insn an insn which does not represent an instruction in the ++; final output, thus having no impact on scheduling. ++; rbit reverse bits. ++; rev reverse bytes. ++; sdiv signed division. ++; shift_imm simple shift operation (LSL, LSR, ASR, ROR) with an ++; immediate. ++; shift_reg simple shift by a register. ++; smlad signed multiply accumulate dual. ++; smladx signed multiply accumulate dual reverse. ++; smlal signed multiply accumulate long. ++; smlald signed multiply accumulate long dual. ++; smlals signed multiply accumulate long, flag setting. ++; smlalxy signed multiply accumulate, 16x16-bit, 64-bit accumulate. ++; smlawx signed multiply accumulate, 32x16-bit, 32-bit accumulate. ++; smlawy signed multiply accumulate wide, 32x16-bit, ++; 32-bit accumulate. ++; smlaxy signed multiply accumulate, 16x16-bit, 32-bit accumulate. ++; smlsd signed multiply subtract dual. ++; smlsdx signed multiply subtract dual reverse. ++; smlsld signed multiply subtract long dual. ++; smmla signed most significant word multiply accumulate. ++; smmul signed most significant word multiply. ++; smmulr signed most significant word multiply, rounded. ++; smuad signed dual multiply add. ++; smuadx signed dual multiply add reverse. ++; smull signed multiply long. ++; smulls signed multiply long, flag setting. ++; smulwy signed multiply wide, 32x16-bit, 32-bit accumulate. ++; smulxy signed multiply, 16x16-bit, 32-bit accumulate. ++; smusd signed dual multiply subtract. ++; smusdx signed dual multiply subtract reverse. ++; store_rel store-release. ++; store1 store 1 word to memory from arm registers. ++; store2 store 2 words to memory from arm registers. ++; store3 store 3 words to memory from arm registers. ++; store4 store 4 (or more) words to memory from arm registers. ++; udiv unsigned division. ++; umaal unsigned multiply accumulate accumulate long. ++; umlal unsigned multiply accumulate long. ++; umlals unsigned multiply accumulate long, flag setting. ++; umull unsigned multiply long. ++; umulls unsigned multiply long, flag setting. ++; untyped insn without type information - default, and error, ++; case. ++; ++; The classification below is for instructions used by the Wireless MMX ++; Technology. Each attribute value is used to classify an instruction of the ++; same name or family. ++; ++; wmmx_tandc ++; wmmx_tbcst ++; wmmx_textrc ++; wmmx_textrm ++; wmmx_tinsr ++; wmmx_tmcr ++; wmmx_tmcrr ++; wmmx_tmia ++; wmmx_tmiaph ++; wmmx_tmiaxy ++; wmmx_tmrc ++; wmmx_tmrrc ++; wmmx_tmovmsk ++; wmmx_torc ++; wmmx_torvsc ++; wmmx_wabs ++; wmmx_wdiff ++; wmmx_wacc ++; wmmx_wadd ++; wmmx_waddbhus ++; wmmx_waddsubhx ++; wmmx_waligni ++; wmmx_walignr ++; wmmx_wand ++; wmmx_wandn ++; wmmx_wavg2 ++; wmmx_wavg4 ++; wmmx_wcmpeq ++; wmmx_wcmpgt ++; wmmx_wmac ++; wmmx_wmadd ++; wmmx_wmax ++; wmmx_wmerge ++; wmmx_wmiawxy ++; wmmx_wmiaxy ++; wmmx_wmin ++; wmmx_wmov ++; wmmx_wmul ++; wmmx_wmulw ++; wmmx_wldr ++; wmmx_wor ++; wmmx_wpack ++; wmmx_wqmiaxy ++; wmmx_wqmulm ++; wmmx_wqmulwm ++; wmmx_wror ++; wmmx_wsad ++; wmmx_wshufh ++; wmmx_wsll ++; wmmx_wsra ++; wmmx_wsrl ++; wmmx_wstr ++; wmmx_wsub ++; wmmx_wsubaddhx ++; wmmx_wunpckeh ++; wmmx_wunpckel ++; wmmx_wunpckih ++; wmmx_wunpckil ++; wmmx_wxor ++; ++; The classification below is for NEON instructions. ++; ++; neon_add ++; neon_add_q ++; neon_add_widen ++; neon_add_long ++; neon_qadd ++; neon_qadd_q ++; neon_add_halve ++; neon_add_halve_q ++; neon_add_halve_narrow_q ++; neon_sub ++; neon_sub_q ++; neon_sub_widen ++; neon_sub_long ++; neon_qsub ++; neon_qsub_q ++; neon_sub_halve ++; neon_sub_halve_q ++; neon_sub_halve_narrow_q ++; neon_abs ++; neon_abs_q ++; neon_neg ++; neon_neg_q ++; neon_qneg ++; neon_qneg_q ++; neon_qabs ++; neon_qabs_q ++; neon_abd ++; neon_abd_q ++; neon_abd_long ++; neon_minmax ++; neon_minmax_q ++; neon_compare ++; neon_compare_q ++; neon_compare_zero ++; neon_compare_zero_q ++; neon_arith_acc ++; neon_arith_acc_q ++; neon_reduc_add ++; neon_reduc_add_q ++; neon_reduc_add_long ++; neon_reduc_add_acc ++; neon_reduc_add_acc_q ++; neon_reduc_minmax ++; neon_reduc_minmax_q ++; neon_logic ++; neon_logic_q ++; neon_tst ++; neon_tst_q ++; neon_shift_imm ++; neon_shift_imm_q ++; neon_shift_imm_narrow_q ++; neon_shift_imm_long ++; neon_shift_reg ++; neon_shift_reg_q ++; neon_shift_acc ++; neon_shift_acc_q ++; neon_sat_shift_imm ++; neon_sat_shift_imm_q ++; neon_sat_shift_imm_narrow_q ++; neon_sat_shift_reg ++; neon_sat_shift_reg_q ++; neon_ins ++; neon_ins_q ++; neon_move ++; neon_move_q ++; neon_move_narrow_q ++; neon_permute ++; neon_permute_q ++; neon_zip ++; neon_zip_q ++; neon_tbl1 ++; neon_tbl1_q ++; neon_tbl2 ++; neon_tbl2_q ++; neon_tbl3 ++; neon_tbl3_q ++; neon_tbl4 ++; neon_tbl4_q ++; neon_bsl ++; neon_bsl_q ++; neon_cls ++; neon_cls_q ++; neon_cnt ++; neon_cnt_q ++; neon_ext ++; neon_ext_q ++; neon_rbit ++; neon_rbit_q ++; neon_rev ++; neon_rev_q ++; neon_mul_b ++; neon_mul_b_q ++; neon_mul_h ++; neon_mul_h_q ++; neon_mul_s ++; neon_mul_s_q ++; neon_mul_b_long ++; neon_mul_h_long ++; neon_mul_s_long ++; neon_mul_d_long ++; neon_mul_h_scalar ++; neon_mul_h_scalar_q ++; neon_mul_s_scalar ++; neon_mul_s_scalar_q ++; neon_mul_h_scalar_long ++; neon_mul_s_scalar_long ++; neon_sat_mul_b ++; neon_sat_mul_b_q ++; neon_sat_mul_h ++; neon_sat_mul_h_q ++; neon_sat_mul_s ++; neon_sat_mul_s_q ++; neon_sat_mul_b_long ++; neon_sat_mul_h_long ++; neon_sat_mul_s_long ++; neon_sat_mul_h_scalar ++; neon_sat_mul_h_scalar_q ++; neon_sat_mul_s_scalar ++; neon_sat_mul_s_scalar_q ++; neon_sat_mul_h_scalar_long ++; neon_sat_mul_s_scalar_long ++; neon_mla_b ++; neon_mla_b_q ++; neon_mla_h ++; neon_mla_h_q ++; neon_mla_s ++; neon_mla_s_q ++; neon_mla_b_long ++; neon_mla_h_long ++; neon_mla_s_long ++; neon_mla_h_scalar ++; neon_mla_h_scalar_q ++; neon_mla_s_scalar ++; neon_mla_s_scalar_q ++; neon_mla_h_scalar_long ++; neon_mla_s_scalar_long ++; neon_sat_mla_b_long ++; neon_sat_mla_h_long ++; neon_sat_mla_s_long ++; neon_sat_mla_h_scalar_long ++; neon_sat_mla_s_scalar_long ++; neon_to_gp ++; neon_to_gp_q ++; neon_from_gp ++; neon_from_gp_q ++; neon_ldr ++; neon_load1_1reg ++; neon_load1_1reg_q ++; neon_load1_2reg ++; neon_load1_2reg_q ++; neon_load1_3reg ++; neon_load1_3reg_q ++; neon_load1_4reg ++; neon_load1_4reg_q ++; neon_load1_all_lanes ++; neon_load1_all_lanes_q ++; neon_load1_one_lane ++; neon_load1_one_lane_q ++; neon_load2_2reg ++; neon_load2_2reg_q ++; neon_load2_4reg ++; neon_load2_4reg_q ++; neon_load2_all_lanes ++; neon_load2_all_lanes_q ++; neon_load2_one_lane ++; neon_load2_one_lane_q ++; neon_load3_3reg ++; neon_load3_3reg_q ++; neon_load3_all_lanes ++; neon_load3_all_lanes_q ++; neon_load3_one_lane ++; neon_load3_one_lane_q ++; neon_load4_4reg ++; neon_load4_4reg_q ++; neon_load4_all_lanes ++; neon_load4_all_lanes_q ++; neon_load4_one_lane ++; neon_load4_one_lane_q ++; neon_str ++; neon_store1_1reg ++; neon_store1_1reg_q ++; neon_store1_2reg ++; neon_store1_2reg_q ++; neon_store1_3reg ++; neon_store1_3reg_q ++; neon_store1_4reg ++; neon_store1_4reg_q ++; neon_store1_one_lane ++; neon_store1_one_lane_q ++; neon_store2_2reg ++; neon_store2_2reg_q ++; neon_store2_4reg ++; neon_store2_4reg_q ++; neon_store2_one_lane ++; neon_store2_one_lane_q ++; neon_store3_3reg ++; neon_store3_3reg_q ++; neon_store3_one_lane ++; neon_store3_one_lane_q ++; neon_store4_4reg ++; neon_store4_4reg_q ++; neon_store4_one_lane ++; neon_store4_one_lane_q ++; neon_fp_abs_s ++; neon_fp_abs_s_q ++; neon_fp_abs_d ++; neon_fp_abs_d_q ++; neon_fp_neg_s ++; neon_fp_neg_s_q ++; neon_fp_neg_d ++; neon_fp_neg_d_q ++; neon_fp_abd_s ++; neon_fp_abd_s_q ++; neon_fp_abd_d ++; neon_fp_abd_d_q ++; neon_fp_addsub_s ++; neon_fp_addsub_s_q ++; neon_fp_addsub_d ++; neon_fp_addsub_d_q ++; neon_fp_compare_s ++; neon_fp_compare_s_q ++; neon_fp_compare_d ++; neon_fp_compare_d_q ++; neon_fp_minmax_s ++; neon_fp_minmax_s_q ++; neon_fp_minmax_d ++; neon_fp_minmax_d_q ++; neon_fp_reduc_add_s ++; neon_fp_reduc_add_s_q ++; neon_fp_reduc_add_d ++; neon_fp_reduc_add_d_q ++; neon_fp_reduc_minmax_s ++; neon_fp_reduc_minmax_s_q ++; neon_fp_reduc_minmax_d ++; neon_fp_reduc_minmax_d_q ++; neon_fp_cvt_narrow_s_q ++; neon_fp_cvt_narrow_d_q ++; neon_fp_cvt_widen_h ++; neon_fp_cvt_widen_s ++; neon_fp_to_int_s ++; neon_fp_to_int_s_q ++; neon_fp_to_int_d ++; neon_fp_to_int_d_q ++; neon_int_to_fp_s ++; neon_int_to_fp_s_q ++; neon_int_to_fp_d ++; neon_int_to_fp_d_q ++; neon_fp_round_s ++; neon_fp_round_s_q ++; neon_fp_round_d ++; neon_fp_round_d_q ++; neon_fp_recpe_s ++; neon_fp_recpe_s_q ++; neon_fp_recpe_d ++; neon_fp_recpe_d_q ++; neon_fp_recps_s ++; neon_fp_recps_s_q ++; neon_fp_recps_d ++; neon_fp_recps_d_q ++; neon_fp_recpx_s ++; neon_fp_recpx_s_q ++; neon_fp_recpx_d ++; neon_fp_recpx_d_q ++; neon_fp_rsqrte_s ++; neon_fp_rsqrte_s_q ++; neon_fp_rsqrte_d ++; neon_fp_rsqrte_d_q ++; neon_fp_rsqrts_s ++; neon_fp_rsqrts_s_q ++; neon_fp_rsqrts_d ++; neon_fp_rsqrts_d_q ++; neon_fp_mul_s ++; neon_fp_mul_s_q ++; neon_fp_mul_s_scalar ++; neon_fp_mul_s_scalar_q ++; neon_fp_mul_d ++; neon_fp_mul_d_q ++; neon_fp_mul_d_scalar_q ++; neon_fp_mla_s ++; neon_fp_mla_s_q ++; neon_fp_mla_s_scalar ++; neon_fp_mla_s_scalar_q ++; neon_fp_mla_d ++; neon_fp_mla_d_q ++; neon_fp_mla_d_scalar_q ++; neon_fp_sqrt_s ++; neon_fp_sqrt_s_q ++; neon_fp_sqrt_d ++; neon_fp_sqrt_d_q ++; neon_fp_div_s ++; neon_fp_div_s_q ++; neon_fp_div_d ++; neon_fp_div_d_q ++ ++; ++; The classification below is for Crypto instructions. ++; ++; crypto_aes ++; crypto_sha1_xor ++; crypto_sha1_fast ++; crypto_sha1_slow ++; crypto_sha256_fast ++; crypto_sha256_slow ++ ++(define_attr "type" ++ "adc_imm,\ ++ adc_reg,\ ++ adcs_imm,\ ++ adcs_reg,\ ++ adr,\ ++ alu_ext,\ ++ alu_imm,\ ++ alu_reg,\ ++ alu_shift_imm,\ ++ alu_shift_reg,\ ++ alus_ext,\ ++ alus_imm,\ ++ alus_reg,\ ++ alus_shift_imm,\ ++ alus_shift_reg,\ ++ bfm,\ ++ block,\ ++ branch,\ ++ call,\ ++ clz,\ ++ no_insn,\ ++ csel,\ ++ crc,\ ++ extend,\ ++ f_cvt,\ ++ f_cvtf2i,\ ++ f_cvti2f,\ ++ f_flag,\ ++ f_loadd,\ ++ f_loads,\ ++ f_mcr,\ ++ f_mcrr,\ ++ f_minmaxd,\ ++ f_minmaxs,\ ++ f_mrc,\ ++ f_mrrc,\ ++ f_rintd,\ ++ f_rints,\ ++ f_seld,\ ++ f_sels,\ ++ f_stored,\ ++ f_stores,\ ++ faddd,\ ++ fadds,\ ++ fcmpd,\ ++ fcmps,\ ++ fconstd,\ ++ fconsts,\ ++ fcsel,\ ++ fdivd,\ ++ fdivs,\ ++ ffarithd,\ ++ ffariths,\ ++ ffmad,\ ++ ffmas,\ ++ float,\ ++ fmacd,\ ++ fmacs,\ ++ fmov,\ ++ fmuld,\ ++ fmuls,\ ++ fsqrts,\ ++ fsqrtd,\ ++ load_acq,\ ++ load_byte,\ ++ load1,\ ++ load2,\ ++ load3,\ ++ load4,\ ++ logic_imm,\ ++ logic_reg,\ ++ logic_shift_imm,\ ++ logic_shift_reg,\ ++ logics_imm,\ ++ logics_reg,\ ++ logics_shift_imm,\ ++ logics_shift_reg,\ ++ mla,\ ++ mlas,\ ++ mov_imm,\ ++ mov_reg,\ ++ mov_shift,\ ++ mov_shift_reg,\ ++ mrs,\ ++ mul,\ ++ muls,\ ++ multiple,\ ++ mvn_imm,\ ++ mvn_reg,\ ++ mvn_shift,\ ++ mvn_shift_reg,\ ++ nop,\ ++ rbit,\ ++ rev,\ ++ sdiv,\ ++ shift_imm,\ ++ shift_reg,\ ++ smlad,\ ++ smladx,\ ++ smlal,\ ++ smlald,\ ++ smlals,\ ++ smlalxy,\ ++ smlawx,\ ++ smlawy,\ ++ smlaxy,\ ++ smlsd,\ ++ smlsdx,\ ++ smlsld,\ ++ smmla,\ ++ smmul,\ ++ smmulr,\ ++ smuad,\ ++ smuadx,\ ++ smull,\ ++ smulls,\ ++ smulwy,\ ++ smulxy,\ ++ smusd,\ ++ smusdx,\ ++ store_rel,\ ++ store1,\ ++ store2,\ ++ store3,\ ++ store4,\ ++ udiv,\ ++ umaal,\ ++ umlal,\ ++ umlals,\ ++ umull,\ ++ umulls,\ ++ untyped,\ ++ wmmx_tandc,\ ++ wmmx_tbcst,\ ++ wmmx_textrc,\ ++ wmmx_textrm,\ ++ wmmx_tinsr,\ ++ wmmx_tmcr,\ ++ wmmx_tmcrr,\ ++ wmmx_tmia,\ ++ wmmx_tmiaph,\ ++ wmmx_tmiaxy,\ ++ wmmx_tmrc,\ ++ wmmx_tmrrc,\ ++ wmmx_tmovmsk,\ ++ wmmx_torc,\ ++ wmmx_torvsc,\ ++ wmmx_wabs,\ ++ wmmx_wabsdiff,\ ++ wmmx_wacc,\ ++ wmmx_wadd,\ ++ wmmx_waddbhus,\ ++ wmmx_waddsubhx,\ ++ wmmx_waligni,\ ++ wmmx_walignr,\ ++ wmmx_wand,\ ++ wmmx_wandn,\ ++ wmmx_wavg2,\ ++ wmmx_wavg4,\ ++ wmmx_wcmpeq,\ ++ wmmx_wcmpgt,\ ++ wmmx_wmac,\ ++ wmmx_wmadd,\ ++ wmmx_wmax,\ ++ wmmx_wmerge,\ ++ wmmx_wmiawxy,\ ++ wmmx_wmiaxy,\ ++ wmmx_wmin,\ ++ wmmx_wmov,\ ++ wmmx_wmul,\ ++ wmmx_wmulw,\ ++ wmmx_wldr,\ ++ wmmx_wor,\ ++ wmmx_wpack,\ ++ wmmx_wqmiaxy,\ ++ wmmx_wqmulm,\ ++ wmmx_wqmulwm,\ ++ wmmx_wror,\ ++ wmmx_wsad,\ ++ wmmx_wshufh,\ ++ wmmx_wsll,\ ++ wmmx_wsra,\ ++ wmmx_wsrl,\ ++ wmmx_wstr,\ ++ wmmx_wsub,\ ++ wmmx_wsubaddhx,\ ++ wmmx_wunpckeh,\ ++ wmmx_wunpckel,\ ++ wmmx_wunpckih,\ ++ wmmx_wunpckil,\ ++ wmmx_wxor,\ ++\ ++ neon_add,\ ++ neon_add_q,\ ++ neon_add_widen,\ ++ neon_add_long,\ ++ neon_qadd,\ ++ neon_qadd_q,\ ++ neon_add_halve,\ ++ neon_add_halve_q,\ ++ neon_add_halve_narrow_q,\ ++\ ++ neon_sub,\ ++ neon_sub_q,\ ++ neon_sub_widen,\ ++ neon_sub_long,\ ++ neon_qsub,\ ++ neon_qsub_q,\ ++ neon_sub_halve,\ ++ neon_sub_halve_q,\ ++ neon_sub_halve_narrow_q,\ ++\ ++ neon_abs,\ ++ neon_abs_q,\ ++ neon_neg,\ ++ neon_neg_q,\ ++ neon_qneg,\ ++ neon_qneg_q,\ ++ neon_qabs,\ ++ neon_qabs_q,\ ++ neon_abd,\ ++ neon_abd_q,\ ++ neon_abd_long,\ ++\ ++ neon_minmax,\ ++ neon_minmax_q,\ ++ neon_compare,\ ++ neon_compare_q,\ ++ neon_compare_zero,\ ++ neon_compare_zero_q,\ ++\ ++ neon_arith_acc,\ ++ neon_arith_acc_q,\ ++ neon_reduc_add,\ ++ neon_reduc_add_q,\ ++ neon_reduc_add_long,\ ++ neon_reduc_add_acc,\ ++ neon_reduc_add_acc_q,\ ++ neon_reduc_minmax,\ ++ neon_reduc_minmax_q,\ ++ neon_logic,\ ++ neon_logic_q,\ ++ neon_tst,\ ++ neon_tst_q,\ ++\ ++ neon_shift_imm,\ ++ neon_shift_imm_q,\ ++ neon_shift_imm_narrow_q,\ ++ neon_shift_imm_long,\ ++ neon_shift_reg,\ ++ neon_shift_reg_q,\ ++ neon_shift_acc,\ ++ neon_shift_acc_q,\ ++ neon_sat_shift_imm,\ ++ neon_sat_shift_imm_q,\ ++ neon_sat_shift_imm_narrow_q,\ ++ neon_sat_shift_reg,\ ++ neon_sat_shift_reg_q,\ ++\ ++ neon_ins,\ ++ neon_ins_q,\ ++ neon_move,\ ++ neon_move_q,\ ++ neon_move_narrow_q,\ ++ neon_permute,\ ++ neon_permute_q,\ ++ neon_zip,\ ++ neon_zip_q,\ ++ neon_tbl1,\ ++ neon_tbl1_q,\ ++ neon_tbl2,\ ++ neon_tbl2_q,\ ++ neon_tbl3,\ ++ neon_tbl3_q,\ ++ neon_tbl4,\ ++ neon_tbl4_q,\ ++\ ++ neon_bsl,\ ++ neon_bsl_q,\ ++ neon_cls,\ ++ neon_cls_q,\ ++ neon_cnt,\ ++ neon_cnt_q,\ ++ neon_dup,\ ++ neon_dup_q,\ ++ neon_ext,\ ++ neon_ext_q,\ ++ neon_rbit,\ ++ neon_rbit_q,\ ++ neon_rev,\ ++ neon_rev_q,\ ++\ ++ neon_mul_b,\ ++ neon_mul_b_q,\ ++ neon_mul_h,\ ++ neon_mul_h_q,\ ++ neon_mul_s,\ ++ neon_mul_s_q,\ ++ neon_mul_b_long,\ ++ neon_mul_h_long,\ ++ neon_mul_s_long,\ ++ neon_mul_d_long,\ ++ neon_mul_h_scalar,\ ++ neon_mul_h_scalar_q,\ ++ neon_mul_s_scalar,\ ++ neon_mul_s_scalar_q,\ ++ neon_mul_h_scalar_long,\ ++ neon_mul_s_scalar_long,\ ++\ ++ neon_sat_mul_b,\ ++ neon_sat_mul_b_q,\ ++ neon_sat_mul_h,\ ++ neon_sat_mul_h_q,\ ++ neon_sat_mul_s,\ ++ neon_sat_mul_s_q,\ ++ neon_sat_mul_b_long,\ ++ neon_sat_mul_h_long,\ ++ neon_sat_mul_s_long,\ ++ neon_sat_mul_h_scalar,\ ++ neon_sat_mul_h_scalar_q,\ ++ neon_sat_mul_s_scalar,\ ++ neon_sat_mul_s_scalar_q,\ ++ neon_sat_mul_h_scalar_long,\ ++ neon_sat_mul_s_scalar_long,\ ++\ ++ neon_mla_b,\ ++ neon_mla_b_q,\ ++ neon_mla_h,\ ++ neon_mla_h_q,\ ++ neon_mla_s,\ ++ neon_mla_s_q,\ ++ neon_mla_b_long,\ ++ neon_mla_h_long,\ ++ neon_mla_s_long,\ ++ neon_mla_h_scalar,\ ++ neon_mla_h_scalar_q,\ ++ neon_mla_s_scalar,\ ++ neon_mla_s_scalar_q,\ ++ neon_mla_h_scalar_long,\ ++ neon_mla_s_scalar_long,\ ++\ ++ neon_sat_mla_b_long,\ ++ neon_sat_mla_h_long,\ ++ neon_sat_mla_s_long,\ ++ neon_sat_mla_h_scalar_long,\ ++ neon_sat_mla_s_scalar_long,\ ++\ ++ neon_to_gp,\ ++ neon_to_gp_q,\ ++ neon_from_gp,\ ++ neon_from_gp_q,\ ++\ ++ neon_ldr,\ ++ neon_load1_1reg,\ ++ neon_load1_1reg_q,\ ++ neon_load1_2reg,\ ++ neon_load1_2reg_q,\ ++ neon_load1_3reg,\ ++ neon_load1_3reg_q,\ ++ neon_load1_4reg,\ ++ neon_load1_4reg_q,\ ++ neon_load1_all_lanes,\ ++ neon_load1_all_lanes_q,\ ++ neon_load1_one_lane,\ ++ neon_load1_one_lane_q,\ ++\ ++ neon_load2_2reg,\ ++ neon_load2_2reg_q,\ ++ neon_load2_4reg,\ ++ neon_load2_4reg_q,\ ++ neon_load2_all_lanes,\ ++ neon_load2_all_lanes_q,\ ++ neon_load2_one_lane,\ ++ neon_load2_one_lane_q,\ ++\ ++ neon_load3_3reg,\ ++ neon_load3_3reg_q,\ ++ neon_load3_all_lanes,\ ++ neon_load3_all_lanes_q,\ ++ neon_load3_one_lane,\ ++ neon_load3_one_lane_q,\ ++\ ++ neon_load4_4reg,\ ++ neon_load4_4reg_q,\ ++ neon_load4_all_lanes,\ ++ neon_load4_all_lanes_q,\ ++ neon_load4_one_lane,\ ++ neon_load4_one_lane_q,\ ++\ ++ neon_str,\ ++ neon_store1_1reg,\ ++ neon_store1_1reg_q,\ ++ neon_store1_2reg,\ ++ neon_store1_2reg_q,\ ++ neon_store1_3reg,\ ++ neon_store1_3reg_q,\ ++ neon_store1_4reg,\ ++ neon_store1_4reg_q,\ ++ neon_store1_one_lane,\ ++ neon_store1_one_lane_q,\ ++\ ++ neon_store2_2reg,\ ++ neon_store2_2reg_q,\ ++ neon_store2_4reg,\ ++ neon_store2_4reg_q,\ ++ neon_store2_one_lane,\ ++ neon_store2_one_lane_q,\ ++\ ++ neon_store3_3reg,\ ++ neon_store3_3reg_q,\ ++ neon_store3_one_lane,\ ++ neon_store3_one_lane_q,\ ++\ ++ neon_store4_4reg,\ ++ neon_store4_4reg_q,\ ++ neon_store4_one_lane,\ ++ neon_store4_one_lane_q,\ ++\ ++ neon_fp_abs_s,\ ++ neon_fp_abs_s_q,\ ++ neon_fp_abs_d,\ ++ neon_fp_abs_d_q,\ ++ neon_fp_neg_s,\ ++ neon_fp_neg_s_q,\ ++ neon_fp_neg_d,\ ++ neon_fp_neg_d_q,\ ++\ ++ neon_fp_abd_s,\ ++ neon_fp_abd_s_q,\ ++ neon_fp_abd_d,\ ++ neon_fp_abd_d_q,\ ++ neon_fp_addsub_s,\ ++ neon_fp_addsub_s_q,\ ++ neon_fp_addsub_d,\ ++ neon_fp_addsub_d_q,\ ++ neon_fp_compare_s,\ ++ neon_fp_compare_s_q,\ ++ neon_fp_compare_d,\ ++ neon_fp_compare_d_q,\ ++ neon_fp_minmax_s,\ ++ neon_fp_minmax_s_q,\ ++ neon_fp_minmax_d,\ ++ neon_fp_minmax_d_q,\ ++\ ++ neon_fp_reduc_add_s,\ ++ neon_fp_reduc_add_s_q,\ ++ neon_fp_reduc_add_d,\ ++ neon_fp_reduc_add_d_q,\ ++ neon_fp_reduc_minmax_s,\ ++ neon_fp_reduc_minmax_s_q,\ ++ neon_fp_reduc_minmax_d,\ ++ neon_fp_reduc_minmax_d_q,\ ++\ ++ neon_fp_cvt_narrow_s_q,\ ++ neon_fp_cvt_narrow_d_q,\ ++ neon_fp_cvt_widen_h,\ ++ neon_fp_cvt_widen_s,\ ++\ ++ neon_fp_to_int_s,\ ++ neon_fp_to_int_s_q,\ ++ neon_fp_to_int_d,\ ++ neon_fp_to_int_d_q,\ ++ neon_int_to_fp_s,\ ++ neon_int_to_fp_s_q,\ ++ neon_int_to_fp_d,\ ++ neon_int_to_fp_d_q,\ ++ neon_fp_round_s,\ ++ neon_fp_round_s_q,\ ++ neon_fp_round_d,\ ++ neon_fp_round_d_q,\ ++\ ++ neon_fp_recpe_s,\ ++ neon_fp_recpe_s_q,\ ++ neon_fp_recpe_d,\ ++ neon_fp_recpe_d_q,\ ++ neon_fp_recps_s,\ ++ neon_fp_recps_s_q,\ ++ neon_fp_recps_d,\ ++ neon_fp_recps_d_q,\ ++ neon_fp_recpx_s,\ ++ neon_fp_recpx_s_q,\ ++ neon_fp_recpx_d,\ ++ neon_fp_recpx_d_q,\ ++\ ++ neon_fp_rsqrte_s,\ ++ neon_fp_rsqrte_s_q,\ ++ neon_fp_rsqrte_d,\ ++ neon_fp_rsqrte_d_q,\ ++ neon_fp_rsqrts_s,\ ++ neon_fp_rsqrts_s_q,\ ++ neon_fp_rsqrts_d,\ ++ neon_fp_rsqrts_d_q,\ ++\ ++ neon_fp_mul_s,\ ++ neon_fp_mul_s_q,\ ++ neon_fp_mul_s_scalar,\ ++ neon_fp_mul_s_scalar_q,\ ++ neon_fp_mul_d,\ ++ neon_fp_mul_d_q,\ ++ neon_fp_mul_d_scalar_q,\ ++\ ++ neon_fp_mla_s,\ ++ neon_fp_mla_s_q,\ ++ neon_fp_mla_s_scalar,\ ++ neon_fp_mla_s_scalar_q,\ ++ neon_fp_mla_d,\ ++ neon_fp_mla_d_q,\ ++ neon_fp_mla_d_scalar_q,\ ++\ ++ neon_fp_sqrt_s,\ ++ neon_fp_sqrt_s_q,\ ++ neon_fp_sqrt_d,\ ++ neon_fp_sqrt_d_q,\ ++ neon_fp_div_s,\ ++ neon_fp_div_s_q,\ ++ neon_fp_div_d,\ ++ neon_fp_div_d_q,\ ++\ ++ crypto_aes,\ ++ crypto_sha1_xor,\ ++ crypto_sha1_fast,\ ++ crypto_sha1_slow,\ ++ crypto_sha256_fast,\ ++ crypto_sha256_slow" ++ (const_string "untyped")) ++ ++; Is this an (integer side) multiply with a 32-bit (or smaller) result? ++(define_attr "mul32" "no,yes" ++ (if_then_else ++ (eq_attr "type" ++ "smulxy,smlaxy,smulwy,smlawx,mul,muls,mla,mlas,smlawy,smuad,smuadx,\ ++ smlad,smladx,smusd,smusdx,smlsd,smlsdx,smmul,smmulr,smmla,smlald,smlsld") ++ (const_string "yes") ++ (const_string "no"))) ++ ++; Is this an (integer side) multiply with a 64-bit result? ++(define_attr "mul64" "no,yes" ++ (if_then_else ++ (eq_attr "type" ++ "smlalxy,umull,umulls,umaal,umlal,umlals,smull,smulls,smlal,smlals") ++ (const_string "yes") ++ (const_string "no"))) +--- a/src/gcc/config/arm/arm_neon_builtins.def ++++ b/src/gcc/config/arm/arm_neon_builtins.def +@@ -0,0 +1,213 @@ ++/* NEON builtin definitions for ARM. ++ Copyright (C) 2013 ++ Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++VAR10 (BINOP, vadd, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR3 (BINOP, vaddl, v8qi, v4hi, v2si), ++VAR3 (BINOP, vaddw, v8qi, v4hi, v2si), ++VAR6 (BINOP, vhadd, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR8 (BINOP, vqadd, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR3 (BINOP, vaddhn, v8hi, v4si, v2di), ++VAR8 (BINOP, vmul, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR8 (TERNOP, vmla, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR3 (TERNOP, vmlal, v8qi, v4hi, v2si), ++VAR2 (TERNOP, vfma, v2sf, v4sf), ++VAR2 (TERNOP, vfms, v2sf, v4sf), ++VAR8 (TERNOP, vmls, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR3 (TERNOP, vmlsl, v8qi, v4hi, v2si), ++VAR4 (BINOP, vqdmulh, v4hi, v2si, v8hi, v4si), ++VAR2 (TERNOP, vqdmlal, v4hi, v2si), ++VAR2 (TERNOP, vqdmlsl, v4hi, v2si), ++VAR3 (BINOP, vmull, v8qi, v4hi, v2si), ++VAR2 (SCALARMULL, vmull_n, v4hi, v2si), ++VAR2 (LANEMULL, vmull_lane, v4hi, v2si), ++VAR2 (SCALARMULL, vqdmull_n, v4hi, v2si), ++VAR2 (LANEMULL, vqdmull_lane, v4hi, v2si), ++VAR4 (SCALARMULH, vqdmulh_n, v4hi, v2si, v8hi, v4si), ++VAR4 (LANEMULH, vqdmulh_lane, v4hi, v2si, v8hi, v4si), ++VAR2 (BINOP, vqdmull, v4hi, v2si), ++VAR8 (BINOP, vshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR8 (BINOP, vqshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR8 (SHIFTIMM, vshr_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR3 (SHIFTIMM, vshrn_n, v8hi, v4si, v2di), ++VAR3 (SHIFTIMM, vqshrn_n, v8hi, v4si, v2di), ++VAR3 (SHIFTIMM, vqshrun_n, v8hi, v4si, v2di), ++VAR8 (SHIFTIMM, vshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR8 (SHIFTIMM, vqshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR8 (SHIFTIMM, vqshlu_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR3 (SHIFTIMM, vshll_n, v8qi, v4hi, v2si), ++VAR8 (SHIFTACC, vsra_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR10 (BINOP, vsub, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR3 (BINOP, vsubl, v8qi, v4hi, v2si), ++VAR3 (BINOP, vsubw, v8qi, v4hi, v2si), ++VAR8 (BINOP, vqsub, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR6 (BINOP, vhsub, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR3 (BINOP, vsubhn, v8hi, v4si, v2di), ++VAR8 (BINOP, vceq, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR8 (BINOP, vcge, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR6 (BINOP, vcgeu, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR8 (BINOP, vcgt, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR6 (BINOP, vcgtu, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR2 (BINOP, vcage, v2sf, v4sf), ++VAR2 (BINOP, vcagt, v2sf, v4sf), ++VAR6 (BINOP, vtst, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR8 (BINOP, vabd, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR3 (BINOP, vabdl, v8qi, v4hi, v2si), ++VAR6 (TERNOP, vaba, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR3 (TERNOP, vabal, v8qi, v4hi, v2si), ++VAR8 (BINOP, vmax, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR8 (BINOP, vmin, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR4 (BINOP, vpadd, v8qi, v4hi, v2si, v2sf), ++VAR6 (UNOP, vpaddl, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR6 (BINOP, vpadal, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR4 (BINOP, vpmax, v8qi, v4hi, v2si, v2sf), ++VAR4 (BINOP, vpmin, v8qi, v4hi, v2si, v2sf), ++VAR2 (BINOP, vrecps, v2sf, v4sf), ++VAR2 (BINOP, vrsqrts, v2sf, v4sf), ++VAR8 (SHIFTINSERT, vsri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR8 (SHIFTINSERT, vsli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), ++VAR8 (UNOP, vabs, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR6 (UNOP, vqabs, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR8 (UNOP, vneg, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR6 (UNOP, vqneg, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR6 (UNOP, vcls, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR6 (UNOP, vclz, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++VAR2 (UNOP, vcnt, v8qi, v16qi), ++VAR4 (UNOP, vrecpe, v2si, v2sf, v4si, v4sf), ++VAR4 (UNOP, vrsqrte, v2si, v2sf, v4si, v4sf), ++VAR6 (UNOP, vmvn, v8qi, v4hi, v2si, v16qi, v8hi, v4si), ++ /* FIXME: vget_lane supports more variants than this! */ ++VAR10 (GETLANE, vget_lane, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR10 (SETLANE, vset_lane, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR5 (CREATE, vcreate, v8qi, v4hi, v2si, v2sf, di), ++VAR10 (DUP, vdup_n, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR10 (DUPLANE, vdup_lane, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR5 (COMBINE, vcombine, v8qi, v4hi, v2si, v2sf, di), ++VAR5 (SPLIT, vget_high, v16qi, v8hi, v4si, v4sf, v2di), ++VAR5 (SPLIT, vget_low, v16qi, v8hi, v4si, v4sf, v2di), ++VAR3 (UNOP, vmovn, v8hi, v4si, v2di), ++VAR3 (UNOP, vqmovn, v8hi, v4si, v2di), ++VAR3 (UNOP, vqmovun, v8hi, v4si, v2di), ++VAR3 (UNOP, vmovl, v8qi, v4hi, v2si), ++VAR6 (LANEMUL, vmul_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR6 (LANEMAC, vmla_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR2 (LANEMAC, vmlal_lane, v4hi, v2si), ++VAR2 (LANEMAC, vqdmlal_lane, v4hi, v2si), ++VAR6 (LANEMAC, vmls_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR2 (LANEMAC, vmlsl_lane, v4hi, v2si), ++VAR2 (LANEMAC, vqdmlsl_lane, v4hi, v2si), ++VAR6 (SCALARMUL, vmul_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR6 (SCALARMAC, vmla_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR2 (SCALARMAC, vmlal_n, v4hi, v2si), ++VAR2 (SCALARMAC, vqdmlal_n, v4hi, v2si), ++VAR6 (SCALARMAC, vmls_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR2 (SCALARMAC, vmlsl_n, v4hi, v2si), ++VAR2 (SCALARMAC, vqdmlsl_n, v4hi, v2si), ++VAR10 (BINOP, vext, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR8 (UNOP, vrev64, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR4 (UNOP, vrev32, v8qi, v4hi, v16qi, v8hi), ++VAR2 (UNOP, vrev16, v8qi, v16qi), ++VAR4 (CONVERT, vcvt, v2si, v2sf, v4si, v4sf), ++VAR4 (FIXCONV, vcvt_n, v2si, v2sf, v4si, v4sf), ++VAR1 (FLOAT_WIDEN, vcvtv4sf, v4hf), ++VAR1 (FLOAT_NARROW, vcvtv4hf, v4sf), ++VAR10 (SELECT, vbsl, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR2 (RINT, vrintn, v2sf, v4sf), ++VAR2 (RINT, vrinta, v2sf, v4sf), ++VAR2 (RINT, vrintp, v2sf, v4sf), ++VAR2 (RINT, vrintm, v2sf, v4sf), ++VAR2 (RINT, vrintz, v2sf, v4sf), ++VAR2 (RINT, vrintx, v2sf, v4sf), ++VAR1 (VTBL, vtbl1, v8qi), ++VAR1 (VTBL, vtbl2, v8qi), ++VAR1 (VTBL, vtbl3, v8qi), ++VAR1 (VTBL, vtbl4, v8qi), ++VAR1 (VTBX, vtbx1, v8qi), ++VAR1 (VTBX, vtbx2, v8qi), ++VAR1 (VTBX, vtbx3, v8qi), ++VAR1 (VTBX, vtbx4, v8qi), ++VAR8 (RESULTPAIR, vtrn, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR8 (RESULTPAIR, vzip, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR8 (RESULTPAIR, vuzp, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), ++VAR5 (REINTERP, vreinterpretv8qi, v8qi, v4hi, v2si, v2sf, di), ++VAR5 (REINTERP, vreinterpretv4hi, v8qi, v4hi, v2si, v2sf, di), ++VAR5 (REINTERP, vreinterpretv2si, v8qi, v4hi, v2si, v2sf, di), ++VAR5 (REINTERP, vreinterpretv2sf, v8qi, v4hi, v2si, v2sf, di), ++VAR5 (REINTERP, vreinterpretdi, v8qi, v4hi, v2si, v2sf, di), ++VAR6 (REINTERP, vreinterpretv16qi, v16qi, v8hi, v4si, v4sf, v2di, ti), ++VAR6 (REINTERP, vreinterpretv8hi, v16qi, v8hi, v4si, v4sf, v2di, ti), ++VAR6 (REINTERP, vreinterpretv4si, v16qi, v8hi, v4si, v4sf, v2di, ti), ++VAR6 (REINTERP, vreinterpretv4sf, v16qi, v8hi, v4si, v4sf, v2di, ti), ++VAR6 (REINTERP, vreinterpretv2di, v16qi, v8hi, v4si, v4sf, v2di, ti), ++VAR6 (REINTERP, vreinterpretti, v16qi, v8hi, v4si, v4sf, v2di, ti), ++VAR10 (LOAD1, vld1, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR10 (LOAD1LANE, vld1_lane, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR10 (LOAD1, vld1_dup, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR10 (STORE1, vst1, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR10 (STORE1LANE, vst1_lane, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR9 (LOADSTRUCT, ++ vld2, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), ++VAR7 (LOADSTRUCTLANE, vld2_lane, ++ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR5 (LOADSTRUCT, vld2_dup, v8qi, v4hi, v2si, v2sf, di), ++VAR9 (STORESTRUCT, vst2, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), ++VAR7 (STORESTRUCTLANE, vst2_lane, ++ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR9 (LOADSTRUCT, ++ vld3, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), ++VAR7 (LOADSTRUCTLANE, vld3_lane, ++ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR5 (LOADSTRUCT, vld3_dup, v8qi, v4hi, v2si, v2sf, di), ++VAR9 (STORESTRUCT, vst3, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), ++VAR7 (STORESTRUCTLANE, vst3_lane, ++ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR9 (LOADSTRUCT, vld4, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), ++VAR7 (LOADSTRUCTLANE, vld4_lane, ++ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR5 (LOADSTRUCT, vld4_dup, v8qi, v4hi, v2si, v2sf, di), ++VAR9 (STORESTRUCT, vst4, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), ++VAR7 (STORESTRUCTLANE, vst4_lane, ++ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), ++VAR10 (LOGICBINOP, vand, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR10 (LOGICBINOP, vorr, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR10 (BINOP, veor, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR10 (LOGICBINOP, vbic, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), ++VAR10 (LOGICBINOP, vorn, ++ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) +--- a/src/gcc/config/arm/neon.ml ++++ b/src/gcc/config/arm/neon.ml +@@ -21,8 +21,8 @@ + . *) + + (* Shorthand types for vector elements. *) +-type elts = S8 | S16 | S32 | S64 | F32 | U8 | U16 | U32 | U64 | P8 | P16 +- | I8 | I16 | I32 | I64 | B8 | B16 | B32 | B64 | Conv of elts * elts ++type elts = S8 | S16 | S32 | S64 | F16 | F32 | U8 | U16 | U32 | U64 | P8 | P16 ++ | P64 | P128 | I8 | I16 | I32 | I64 | B8 | B16 | B32 | B64 | Conv of elts * elts + | Cast of elts * elts | NoElts + + type eltclass = Signed | Unsigned | Float | Poly | Int | Bits +@@ -37,6 +37,7 @@ + | T_uint16x4 | T_uint16x8 + | T_uint32x2 | T_uint32x4 + | T_uint64x1 | T_uint64x2 ++ | T_float16x4 + | T_float32x2 | T_float32x4 + | T_poly8x8 | T_poly8x16 + | T_poly16x4 | T_poly16x8 +@@ -46,11 +47,15 @@ + | T_uint8 | T_uint16 + | T_uint32 | T_uint64 + | T_poly8 | T_poly16 +- | T_float32 | T_arrayof of int * vectype ++ | T_poly64 | T_poly64x1 ++ | T_poly64x2 | T_poly128 ++ | T_float16 | T_float32 ++ | T_arrayof of int * vectype + | T_ptrto of vectype | T_const of vectype + | T_void | T_intQI + | T_intHI | T_intSI +- | T_intDI | T_floatSF ++ | T_intDI | T_intTI ++ | T_floatHF | T_floatSF + + (* The meanings of the following are: + TImode : "Tetra", two registers (four words). +@@ -92,8 +97,8 @@ + | Arity3 of vectype * vectype * vectype * vectype + | Arity4 of vectype * vectype * vectype * vectype * vectype + +-type vecmode = V8QI | V4HI | V2SI | V2SF | DI +- | V16QI | V8HI | V4SI | V4SF | V2DI ++type vecmode = V8QI | V4HI | V4HF |V2SI | V2SF | DI ++ | V16QI | V8HI | V4SI | V4SF | V2DI | TI + | QI | HI | SI | SF + + type opcode = +@@ -284,18 +289,23 @@ + | Fixed_core_reg + (* Mark that the intrinsic requires __ARM_FEATURE_string to be defined. *) + | Requires_feature of string ++ (* Mark that the intrinsic requires a particular architecture version. *) + | Requires_arch of int ++ (* Mark that the intrinsic requires a particular bit in __ARM_FP to ++ be set. *) ++ | Requires_FP_bit of int + + exception MixedMode of elts * elts + + let rec elt_width = function + S8 | U8 | P8 | I8 | B8 -> 8 +- | S16 | U16 | P16 | I16 | B16 -> 16 ++ | S16 | U16 | P16 | I16 | B16 | F16 -> 16 + | S32 | F32 | U32 | I32 | B32 -> 32 +- | S64 | U64 | I64 | B64 -> 64 ++ | S64 | U64 | P64 | I64 | B64 -> 64 ++ | P128 -> 128 + | Conv (a, b) -> + let wa = elt_width a and wb = elt_width b in +- if wa = wb then wa else failwith "element width?" ++ if wa = wb then wa else raise (MixedMode (a, b)) + | Cast (a, b) -> raise (MixedMode (a, b)) + | NoElts -> failwith "No elts" + +@@ -302,8 +312,8 @@ + let rec elt_class = function + S8 | S16 | S32 | S64 -> Signed + | U8 | U16 | U32 | U64 -> Unsigned +- | P8 | P16 -> Poly +- | F32 -> Float ++ | P8 | P16 | P64 | P128 -> Poly ++ | F16 | F32 -> Float + | I8 | I16 | I32 | I64 -> Int + | B8 | B16 | B32 | B64 -> Bits + | Conv (a, b) | Cast (a, b) -> ConvClass (elt_class a, elt_class b) +@@ -315,6 +325,7 @@ + | Signed, 16 -> S16 + | Signed, 32 -> S32 + | Signed, 64 -> S64 ++ | Float, 16 -> F16 + | Float, 32 -> F32 + | Unsigned, 8 -> U8 + | Unsigned, 16 -> U16 +@@ -322,6 +333,8 @@ + | Unsigned, 64 -> U64 + | Poly, 8 -> P8 + | Poly, 16 -> P16 ++ | Poly, 64 -> P64 ++ | Poly, 128 -> P128 + | Int, 8 -> I8 + | Int, 16 -> I16 + | Int, 32 -> I32 +@@ -384,20 +397,28 @@ + in + scan ((Array.length operands) - 1) + +-let rec mode_of_elt elt shape = ++(* Find a vecmode from a shape_elt ELT for an instruction with shape_form ++ SHAPE. For a Use_operands shape, if ARGPOS is passed then return the mode ++ for the given argument position, else determine which argument to return a ++ mode for automatically. *) ++ ++let rec mode_of_elt ?argpos elt shape = + let flt = match elt_class elt with + Float | ConvClass(_, Float) -> true | _ -> false in + let idx = + match elt_width elt with +- 8 -> 0 | 16 -> 1 | 32 -> 2 | 64 -> 3 ++ 8 -> 0 | 16 -> 1 | 32 -> 2 | 64 -> 3 | 128 -> 4 + | _ -> failwith "Bad element width" + in match shape with + All (_, Dreg) | By_scalar Dreg | Pair_result Dreg | Unary_scalar Dreg + | Binary_imm Dreg | Long_noreg Dreg | Wide_noreg Dreg -> +- [| V8QI; V4HI; if flt then V2SF else V2SI; DI |].(idx) ++ if flt then ++ [| V8QI; V4HF; V2SF; DI |].(idx) ++ else ++ [| V8QI; V4HI; V2SI; DI |].(idx) + | All (_, Qreg) | By_scalar Qreg | Pair_result Qreg | Unary_scalar Qreg + | Binary_imm Qreg | Long_noreg Qreg | Wide_noreg Qreg -> +- [| V16QI; V8HI; if flt then V4SF else V4SI; V2DI |].(idx) ++ [| V16QI; V8HI; if flt then V4SF else V4SI; V2DI; TI|].(idx) + | All (_, (Corereg | PtrTo _ | CstPtrTo _)) -> + [| QI; HI; if flt then SF else SI; DI |].(idx) + | Long | Wide | Wide_lane | Wide_scalar +@@ -404,7 +425,11 @@ + | Long_imm -> + [| V8QI; V4HI; V2SI; DI |].(idx) + | Narrow | Narrow_imm -> [| V16QI; V8HI; V4SI; V2DI |].(idx) +- | Use_operands ops -> mode_of_elt elt (All (0, (find_key_operand ops))) ++ | Use_operands ops -> ++ begin match argpos with ++ None -> mode_of_elt ?argpos elt (All (0, (find_key_operand ops))) ++ | Some pos -> mode_of_elt ?argpos elt (All (0, ops.(pos))) ++ end + | _ -> failwith "invalid shape" + + (* Modify an element type dependent on the shape of the instruction and the +@@ -454,10 +479,13 @@ + | U16 -> T_uint16x4 + | U32 -> T_uint32x2 + | U64 -> T_uint64x1 ++ | P64 -> T_poly64x1 ++ | P128 -> T_poly128 ++ | F16 -> T_float16x4 + | F32 -> T_float32x2 + | P8 -> T_poly8x8 + | P16 -> T_poly16x4 +- | _ -> failwith "Bad elt type" ++ | _ -> failwith "Bad elt type for Dreg" + end + | Qreg -> + begin match elt with +@@ -472,7 +500,9 @@ + | F32 -> T_float32x4 + | P8 -> T_poly8x16 + | P16 -> T_poly16x8 +- | _ -> failwith "Bad elt type" ++ | P64 -> T_poly64x2 ++ | P128 -> T_poly128 ++ | _ -> failwith "Bad elt type for Qreg" + end + | Corereg -> + begin match elt with +@@ -486,8 +516,10 @@ + | U64 -> T_uint64 + | P8 -> T_poly8 + | P16 -> T_poly16 ++ | P64 -> T_poly64 ++ | P128 -> T_poly128 + | F32 -> T_float32 +- | _ -> failwith "Bad elt type" ++ | _ -> failwith "Bad elt type for Corereg" + end + | Immed -> + T_immediate (0, 0) +@@ -506,10 +538,10 @@ + let vectype_size = function + T_int8x8 | T_int16x4 | T_int32x2 | T_int64x1 + | T_uint8x8 | T_uint16x4 | T_uint32x2 | T_uint64x1 +- | T_float32x2 | T_poly8x8 | T_poly16x4 -> 64 ++ | T_float32x2 | T_poly8x8 | T_poly64x1 | T_poly16x4 | T_float16x4 -> 64 + | T_int8x16 | T_int16x8 | T_int32x4 | T_int64x2 + | T_uint8x16 | T_uint16x8 | T_uint32x4 | T_uint64x2 +- | T_float32x4 | T_poly8x16 | T_poly16x8 -> 128 ++ | T_float32x4 | T_poly8x16 | T_poly64x2 | T_poly16x8 -> 128 + | _ -> raise Not_found + + let inttype_for_array num elttype = +@@ -1020,14 +1052,22 @@ + "vRsraQ_n", shift_right_acc, su_8_64; + + (* Vector shift right and insert. *) ++ Vsri, [Requires_feature "CRYPTO"], Use_operands [| Dreg; Dreg; Immed |], "vsri_n", shift_insert, ++ [P64]; + Vsri, [], Use_operands [| Dreg; Dreg; Immed |], "vsri_n", shift_insert, + P8 :: P16 :: su_8_64; ++ Vsri, [Requires_feature "CRYPTO"], Use_operands [| Qreg; Qreg; Immed |], "vsriQ_n", shift_insert, ++ [P64]; + Vsri, [], Use_operands [| Qreg; Qreg; Immed |], "vsriQ_n", shift_insert, + P8 :: P16 :: su_8_64; + + (* Vector shift left and insert. *) ++ Vsli, [Requires_feature "CRYPTO"], Use_operands [| Dreg; Dreg; Immed |], "vsli_n", shift_insert, ++ [P64]; + Vsli, [], Use_operands [| Dreg; Dreg; Immed |], "vsli_n", shift_insert, + P8 :: P16 :: su_8_64; ++ Vsli, [Requires_feature "CRYPTO"], Use_operands [| Qreg; Qreg; Immed |], "vsliQ_n", shift_insert, ++ [P64]; + Vsli, [], Use_operands [| Qreg; Qreg; Immed |], "vsliQ_n", shift_insert, + P8 :: P16 :: su_8_64; + +@@ -1114,6 +1154,11 @@ + + (* Create vector from literal bit pattern. *) + Vcreate, ++ [Requires_feature "CRYPTO"; No_op], (* Not really, but it can yield various things that are too ++ hard for the test generator at this time. *) ++ Use_operands [| Dreg; Corereg |], "vcreate", create_vector, ++ [P64]; ++ Vcreate, + [No_op], (* Not really, but it can yield various things that are too + hard for the test generator at this time. *) + Use_operands [| Dreg; Corereg |], "vcreate", create_vector, +@@ -1127,6 +1172,12 @@ + Use_operands [| Dreg; Corereg |], "vdup_n", bits_1, + pf_su_8_32; + Vdup_n, ++ [No_op; Requires_feature "CRYPTO"; ++ Instruction_name ["vmov"]; ++ Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]], ++ Use_operands [| Dreg; Corereg |], "vdup_n", notype_1, ++ [P64]; ++ Vdup_n, + [No_op; + Instruction_name ["vmov"]; + Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]], +@@ -1133,6 +1184,13 @@ + Use_operands [| Dreg; Corereg |], "vdup_n", notype_1, + [S64; U64]; + Vdup_n, ++ [No_op; Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| Qreg; ++ Alternatives [ Corereg; ++ Element_of_dreg ] |]]], ++ Use_operands [| Qreg; Corereg |], "vdupQ_n", bits_1, ++ [P64]; ++ Vdup_n, + [Disassembles_as [Use_operands [| Qreg; + Alternatives [ Corereg; + Element_of_dreg ] |]]], +@@ -1185,6 +1243,9 @@ + [Disassembles_as [Use_operands [| Dreg; Element_of_dreg |]]], + Unary_scalar Dreg, "vdup_lane", bits_2, pf_su_8_32; + Vdup_lane, ++ [No_op; Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)], ++ Unary_scalar Dreg, "vdup_lane", bits_2, [P64]; ++ Vdup_lane, + [No_op; Const_valuator (fun _ -> 0)], + Unary_scalar Dreg, "vdup_lane", bits_2, [S64; U64]; + Vdup_lane, +@@ -1191,15 +1252,24 @@ + [Disassembles_as [Use_operands [| Qreg; Element_of_dreg |]]], + Unary_scalar Qreg, "vdupQ_lane", bits_2, pf_su_8_32; + Vdup_lane, ++ [No_op; Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)], ++ Unary_scalar Qreg, "vdupQ_lane", bits_2, [P64]; ++ Vdup_lane, + [No_op; Const_valuator (fun _ -> 0)], + Unary_scalar Qreg, "vdupQ_lane", bits_2, [S64; U64]; + + (* Combining vectors. *) ++ Vcombine, [Requires_feature "CRYPTO"; No_op], ++ Use_operands [| Qreg; Dreg; Dreg |], "vcombine", notype_2, ++ [P64]; + Vcombine, [No_op], + Use_operands [| Qreg; Dreg; Dreg |], "vcombine", notype_2, + pf_su_8_64; + + (* Splitting vectors. *) ++ Vget_high, [Requires_feature "CRYPTO"; No_op], ++ Use_operands [| Dreg; Qreg |], "vget_high", ++ notype_1, [P64]; + Vget_high, [No_op], + Use_operands [| Dreg; Qreg |], "vget_high", + notype_1, pf_su_8_64; +@@ -1208,8 +1278,11 @@ + Fixed_vector_reg], + Use_operands [| Dreg; Qreg |], "vget_low", + notype_1, pf_su_8_32; +- Vget_low, [No_op], ++ Vget_low, [Requires_feature "CRYPTO"; No_op], + Use_operands [| Dreg; Qreg |], "vget_low", ++ notype_1, [P64]; ++ Vget_low, [No_op], ++ Use_operands [| Dreg; Qreg |], "vget_low", + notype_1, [S64; U64]; + + (* Conversions. *) +@@ -1217,6 +1290,10 @@ + [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)]; + Vcvt, [InfoWord], All (2, Qreg), "vcvtQ", conv_1, + [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)]; ++ Vcvt, [Builtin_name "vcvt" ; Requires_FP_bit 1], ++ Use_operands [| Dreg; Qreg; |], "vcvt", conv_1, [Conv (F16, F32)]; ++ Vcvt, [Builtin_name "vcvt" ; Requires_FP_bit 1], ++ Use_operands [| Qreg; Dreg; |], "vcvt", conv_1, [Conv (F32, F16)]; + Vcvt_n, [InfoWord], Use_operands [| Dreg; Dreg; Immed |], "vcvt_n", conv_2, + [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)]; + Vcvt_n, [InfoWord], Use_operands [| Qreg; Qreg; Immed |], "vcvtQ_n", conv_2, +@@ -1387,9 +1464,15 @@ + [S16; S32]; + + (* Vector extract. *) ++ Vext, [Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)], ++ Use_operands [| Dreg; Dreg; Dreg; Immed |], "vext", extend, ++ [P64]; + Vext, [Const_valuator (fun _ -> 0)], + Use_operands [| Dreg; Dreg; Dreg; Immed |], "vext", extend, + pf_su_8_64; ++ Vext, [Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)], ++ Use_operands [| Qreg; Qreg; Qreg; Immed |], "vextQ", extend, ++ [P64]; + Vext, [Const_valuator (fun _ -> 0)], + Use_operands [| Qreg; Qreg; Qreg; Immed |], "vextQ", extend, + pf_su_8_64; +@@ -1410,11 +1493,21 @@ + + (* Bit selection. *) + Vbsl, ++ [Requires_feature "CRYPTO"; Instruction_name ["vbsl"; "vbit"; "vbif"]; ++ Disassembles_as [Use_operands [| Dreg; Dreg; Dreg |]]], ++ Use_operands [| Dreg; Dreg; Dreg; Dreg |], "vbsl", bit_select, ++ [P64]; ++ Vbsl, + [Instruction_name ["vbsl"; "vbit"; "vbif"]; + Disassembles_as [Use_operands [| Dreg; Dreg; Dreg |]]], + Use_operands [| Dreg; Dreg; Dreg; Dreg |], "vbsl", bit_select, + pf_su_8_64; + Vbsl, ++ [Requires_feature "CRYPTO"; Instruction_name ["vbsl"; "vbit"; "vbif"]; ++ Disassembles_as [Use_operands [| Qreg; Qreg; Qreg |]]], ++ Use_operands [| Qreg; Qreg; Qreg; Qreg |], "vbslQ", bit_select, ++ [P64]; ++ Vbsl, + [Instruction_name ["vbsl"; "vbit"; "vbif"]; + Disassembles_as [Use_operands [| Qreg; Qreg; Qreg |]]], + Use_operands [| Qreg; Qreg; Qreg; Qreg |], "vbslQ", bit_select, +@@ -1436,10 +1529,21 @@ + + (* Element/structure loads. VLD1 variants. *) + Vldx 1, ++ [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (1, Dreg); ++ CstPtrTo Corereg |]]], ++ Use_operands [| Dreg; CstPtrTo Corereg |], "vld1", bits_1, ++ [P64]; ++ Vldx 1, + [Disassembles_as [Use_operands [| VecArray (1, Dreg); + CstPtrTo Corereg |]]], + Use_operands [| Dreg; CstPtrTo Corereg |], "vld1", bits_1, + pf_su_8_64; ++ Vldx 1, [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (2, Dreg); ++ CstPtrTo Corereg |]]], ++ Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q", bits_1, ++ [P64]; + Vldx 1, [Disassembles_as [Use_operands [| VecArray (2, Dreg); + CstPtrTo Corereg |]]], + Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q", bits_1, +@@ -1451,6 +1555,13 @@ + Use_operands [| Dreg; CstPtrTo Corereg; Dreg; Immed |], + "vld1_lane", bits_3, pf_su_8_32; + Vldx_lane 1, ++ [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (1, Dreg); ++ CstPtrTo Corereg |]]; ++ Const_valuator (fun _ -> 0)], ++ Use_operands [| Dreg; CstPtrTo Corereg; Dreg; Immed |], ++ "vld1_lane", bits_3, [P64]; ++ Vldx_lane 1, + [Disassembles_as [Use_operands [| VecArray (1, Dreg); + CstPtrTo Corereg |]]; + Const_valuator (fun _ -> 0)], +@@ -1462,6 +1573,12 @@ + Use_operands [| Qreg; CstPtrTo Corereg; Qreg; Immed |], + "vld1Q_lane", bits_3, pf_su_8_32; + Vldx_lane 1, ++ [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (1, Dreg); ++ CstPtrTo Corereg |]]], ++ Use_operands [| Qreg; CstPtrTo Corereg; Qreg; Immed |], ++ "vld1Q_lane", bits_3, [P64]; ++ Vldx_lane 1, + [Disassembles_as [Use_operands [| VecArray (1, Dreg); + CstPtrTo Corereg |]]], + Use_operands [| Qreg; CstPtrTo Corereg; Qreg; Immed |], +@@ -1473,6 +1590,12 @@ + Use_operands [| Dreg; CstPtrTo Corereg |], "vld1_dup", + bits_1, pf_su_8_32; + Vldx_dup 1, ++ [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (1, Dreg); ++ CstPtrTo Corereg |]]], ++ Use_operands [| Dreg; CstPtrTo Corereg |], "vld1_dup", ++ bits_1, [P64]; ++ Vldx_dup 1, + [Disassembles_as [Use_operands [| VecArray (1, Dreg); + CstPtrTo Corereg |]]], + Use_operands [| Dreg; CstPtrTo Corereg |], "vld1_dup", +@@ -1485,6 +1608,12 @@ + (* Treated identically to vld1_dup above as we now + do a single load followed by a duplicate. *) + Vldx_dup 1, ++ [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (1, Dreg); ++ CstPtrTo Corereg |]]], ++ Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup", ++ bits_1, [P64]; ++ Vldx_dup 1, + [Disassembles_as [Use_operands [| VecArray (1, Dreg); + CstPtrTo Corereg |]]], + Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup", +@@ -1491,10 +1620,20 @@ + bits_1, [S64; U64]; + + (* VST1 variants. *) ++ Vstx 1, [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (1, Dreg); ++ PtrTo Corereg |]]], ++ Use_operands [| PtrTo Corereg; Dreg |], "vst1", ++ store_1, [P64]; + Vstx 1, [Disassembles_as [Use_operands [| VecArray (1, Dreg); + PtrTo Corereg |]]], + Use_operands [| PtrTo Corereg; Dreg |], "vst1", + store_1, pf_su_8_64; ++ Vstx 1, [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (2, Dreg); ++ PtrTo Corereg |]]], ++ Use_operands [| PtrTo Corereg; Qreg |], "vst1Q", ++ store_1, [P64]; + Vstx 1, [Disassembles_as [Use_operands [| VecArray (2, Dreg); + PtrTo Corereg |]]], + Use_operands [| PtrTo Corereg; Qreg |], "vst1Q", +@@ -1506,6 +1645,13 @@ + Use_operands [| PtrTo Corereg; Dreg; Immed |], + "vst1_lane", store_3, pf_su_8_32; + Vstx_lane 1, ++ [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (1, Dreg); ++ CstPtrTo Corereg |]]; ++ Const_valuator (fun _ -> 0)], ++ Use_operands [| PtrTo Corereg; Dreg; Immed |], ++ "vst1_lane", store_3, [P64]; ++ Vstx_lane 1, + [Disassembles_as [Use_operands [| VecArray (1, Dreg); + CstPtrTo Corereg |]]; + Const_valuator (fun _ -> 0)], +@@ -1517,6 +1663,12 @@ + Use_operands [| PtrTo Corereg; Qreg; Immed |], + "vst1Q_lane", store_3, pf_su_8_32; + Vstx_lane 1, ++ [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (1, Dreg); ++ CstPtrTo Corereg |]]], ++ Use_operands [| PtrTo Corereg; Qreg; Immed |], ++ "vst1Q_lane", store_3, [P64]; ++ Vstx_lane 1, + [Disassembles_as [Use_operands [| VecArray (1, Dreg); + CstPtrTo Corereg |]]], + Use_operands [| PtrTo Corereg; Qreg; Immed |], +@@ -1525,6 +1677,9 @@ + (* VLD2 variants. *) + Vldx 2, [], Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |], + "vld2", bits_1, pf_su_8_32; ++ Vldx 2, [Requires_feature "CRYPTO"; Instruction_name ["vld1"]], ++ Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |], ++ "vld2", bits_1, [P64]; + Vldx 2, [Instruction_name ["vld1"]], + Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |], + "vld2", bits_1, [S64; U64]; +@@ -1556,6 +1711,12 @@ + Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |], + "vld2_dup", bits_1, pf_su_8_32; + Vldx_dup 2, ++ [Requires_feature "CRYPTO"; ++ Instruction_name ["vld1"]; Disassembles_as [Use_operands ++ [| VecArray (2, Dreg); CstPtrTo Corereg |]]], ++ Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |], ++ "vld2_dup", bits_1, [P64]; ++ Vldx_dup 2, + [Instruction_name ["vld1"]; Disassembles_as [Use_operands + [| VecArray (2, Dreg); CstPtrTo Corereg |]]], + Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |], +@@ -1566,6 +1727,12 @@ + PtrTo Corereg |]]], + Use_operands [| PtrTo Corereg; VecArray (2, Dreg) |], "vst2", + store_1, pf_su_8_32; ++ Vstx 2, [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (2, Dreg); ++ PtrTo Corereg |]]; ++ Instruction_name ["vst1"]], ++ Use_operands [| PtrTo Corereg; VecArray (2, Dreg) |], "vst2", ++ store_1, [P64]; + Vstx 2, [Disassembles_as [Use_operands [| VecArray (2, Dreg); + PtrTo Corereg |]]; + Instruction_name ["vst1"]], +@@ -1594,6 +1761,9 @@ + (* VLD3 variants. *) + Vldx 3, [], Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |], + "vld3", bits_1, pf_su_8_32; ++ Vldx 3, [Requires_feature "CRYPTO"; Instruction_name ["vld1"]], ++ Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |], ++ "vld3", bits_1, [P64]; + Vldx 3, [Instruction_name ["vld1"]], + Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |], + "vld3", bits_1, [S64; U64]; +@@ -1625,6 +1795,12 @@ + Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |], + "vld3_dup", bits_1, pf_su_8_32; + Vldx_dup 3, ++ [Requires_feature "CRYPTO"; ++ Instruction_name ["vld1"]; Disassembles_as [Use_operands ++ [| VecArray (3, Dreg); CstPtrTo Corereg |]]], ++ Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |], ++ "vld3_dup", bits_1, [P64]; ++ Vldx_dup 3, + [Instruction_name ["vld1"]; Disassembles_as [Use_operands + [| VecArray (3, Dreg); CstPtrTo Corereg |]]], + Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |], +@@ -1635,6 +1811,12 @@ + PtrTo Corereg |]]], + Use_operands [| PtrTo Corereg; VecArray (3, Dreg) |], "vst3", + store_1, pf_su_8_32; ++ Vstx 3, [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (4, Dreg); ++ PtrTo Corereg |]]; ++ Instruction_name ["vst1"]], ++ Use_operands [| PtrTo Corereg; VecArray (3, Dreg) |], "vst3", ++ store_1, [P64]; + Vstx 3, [Disassembles_as [Use_operands [| VecArray (4, Dreg); + PtrTo Corereg |]]; + Instruction_name ["vst1"]], +@@ -1663,6 +1845,9 @@ + (* VLD4/VST4 variants. *) + Vldx 4, [], Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |], + "vld4", bits_1, pf_su_8_32; ++ Vldx 4, [Requires_feature "CRYPTO"; Instruction_name ["vld1"]], ++ Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |], ++ "vld4", bits_1, [P64]; + Vldx 4, [Instruction_name ["vld1"]], + Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |], + "vld4", bits_1, [S64; U64]; +@@ -1694,6 +1879,12 @@ + Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |], + "vld4_dup", bits_1, pf_su_8_32; + Vldx_dup 4, ++ [Requires_feature "CRYPTO"; ++ Instruction_name ["vld1"]; Disassembles_as [Use_operands ++ [| VecArray (4, Dreg); CstPtrTo Corereg |]]], ++ Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |], ++ "vld4_dup", bits_1, [P64]; ++ Vldx_dup 4, + [Instruction_name ["vld1"]; Disassembles_as [Use_operands + [| VecArray (4, Dreg); CstPtrTo Corereg |]]], + Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |], +@@ -1703,6 +1894,12 @@ + PtrTo Corereg |]]], + Use_operands [| PtrTo Corereg; VecArray (4, Dreg) |], "vst4", + store_1, pf_su_8_32; ++ Vstx 4, [Requires_feature "CRYPTO"; ++ Disassembles_as [Use_operands [| VecArray (4, Dreg); ++ PtrTo Corereg |]]; ++ Instruction_name ["vst1"]], ++ Use_operands [| PtrTo Corereg; VecArray (4, Dreg) |], "vst4", ++ store_1, [P64]; + Vstx 4, [Disassembles_as [Use_operands [| VecArray (4, Dreg); + PtrTo Corereg |]]; + Instruction_name ["vst1"]], +@@ -1754,27 +1951,33 @@ + Vorn, [], All (3, Qreg), "vornQ", notype_2, su_8_64; + ] + ++let type_in_crypto_only t ++ = (t == P64) or (t == P128) ++ ++let cross_product s1 s2 ++ = List.filter (fun (e, e') -> e <> e') ++ (List.concat (List.map (fun e1 -> List.map (fun e2 -> (e1,e2)) s1) s2)) ++ + let reinterp = +- let elems = P8 :: P16 :: F32 :: su_8_64 in +- List.fold_right +- (fun convto acc -> +- let types = List.fold_right +- (fun convfrom acc -> +- if convfrom <> convto then +- Cast (convto, convfrom) :: acc +- else +- acc) +- elems +- [] +- in +- let dconv = Vreinterp, [No_op], Use_operands [| Dreg; Dreg |], +- "vreinterpret", conv_1, types +- and qconv = Vreinterp, [No_op], Use_operands [| Qreg; Qreg |], +- "vreinterpretQ", conv_1, types in +- dconv :: qconv :: acc) +- elems +- [] ++ let elems = P8 :: P16 :: F32 :: P64 :: su_8_64 in ++ let casts = cross_product elems elems in ++ List.map ++ (fun (convto, convfrom) -> ++ Vreinterp, (if (type_in_crypto_only convto) or (type_in_crypto_only convfrom) ++ then [Requires_feature "CRYPTO"] else []) @ [No_op], Use_operands [| Dreg; Dreg |], ++ "vreinterpret", conv_1, [Cast (convto, convfrom)]) ++ casts + ++let reinterpq = ++ let elems = P8 :: P16 :: F32 :: P64 :: P128 :: su_8_64 in ++ let casts = cross_product elems elems in ++ List.map ++ (fun (convto, convfrom) -> ++ Vreinterp, (if (type_in_crypto_only convto) or (type_in_crypto_only convfrom) ++ then [Requires_feature "CRYPTO"] else []) @ [No_op], Use_operands [| Qreg; Qreg |], ++ "vreinterpretQ", conv_1, [Cast (convto, convfrom)]) ++ casts ++ + (* Output routines. *) + + let rec string_of_elt = function +@@ -1782,7 +1985,8 @@ + | U8 -> "u8" | U16 -> "u16" | U32 -> "u32" | U64 -> "u64" + | I8 -> "i8" | I16 -> "i16" | I32 -> "i32" | I64 -> "i64" + | B8 -> "8" | B16 -> "16" | B32 -> "32" | B64 -> "64" +- | F32 -> "f32" | P8 -> "p8" | P16 -> "p16" ++ | F16 -> "f16" | F32 -> "f32" | P8 -> "p8" | P16 -> "p16" ++ | P64 -> "p64" | P128 -> "p128" + | Conv (a, b) | Cast (a, b) -> string_of_elt a ^ "_" ^ string_of_elt b + | NoElts -> failwith "No elts" + +@@ -1809,6 +2013,7 @@ + | T_uint32x4 -> affix "uint32x4" + | T_uint64x1 -> affix "uint64x1" + | T_uint64x2 -> affix "uint64x2" ++ | T_float16x4 -> affix "float16x4" + | T_float32x2 -> affix "float32x2" + | T_float32x4 -> affix "float32x4" + | T_poly8x8 -> affix "poly8x8" +@@ -1825,6 +2030,11 @@ + | T_uint64 -> affix "uint64" + | T_poly8 -> affix "poly8" + | T_poly16 -> affix "poly16" ++ | T_poly64 -> affix "poly64" ++ | T_poly64x1 -> affix "poly64x1" ++ | T_poly64x2 -> affix "poly64x2" ++ | T_poly128 -> affix "poly128" ++ | T_float16 -> affix "float16" + | T_float32 -> affix "float32" + | T_immediate _ -> "const int" + | T_void -> "void" +@@ -1832,6 +2042,8 @@ + | T_intHI -> "__builtin_neon_hi" + | T_intSI -> "__builtin_neon_si" + | T_intDI -> "__builtin_neon_di" ++ | T_intTI -> "__builtin_neon_ti" ++ | T_floatHF -> "__builtin_neon_hf" + | T_floatSF -> "__builtin_neon_sf" + | T_arrayof (num, base) -> + let basename = name (fun x -> x) base in +@@ -1853,10 +2065,10 @@ + | B_XImode -> "__builtin_neon_xi" + + let string_of_mode = function +- V8QI -> "v8qi" | V4HI -> "v4hi" | V2SI -> "v2si" | V2SF -> "v2sf" +- | DI -> "di" | V16QI -> "v16qi" | V8HI -> "v8hi" | V4SI -> "v4si" +- | V4SF -> "v4sf" | V2DI -> "v2di" | QI -> "qi" | HI -> "hi" | SI -> "si" +- | SF -> "sf" ++ V8QI -> "v8qi" | V4HI -> "v4hi" | V4HF -> "v4hf" | V2SI -> "v2si" ++ | V2SF -> "v2sf" | DI -> "di" | V16QI -> "v16qi" | V8HI -> "v8hi" ++ | V4SI -> "v4si" | V4SF -> "v4sf" | V2DI -> "v2di" | QI -> "qi" ++ | HI -> "hi" | SI -> "si" | SF -> "sf" | TI -> "ti" + + (* Use uppercase chars for letters which form part of the intrinsic name, but + should be omitted from the builtin name (the info is passed in an extra +@@ -1963,3 +2175,181 @@ + | _ -> assert false + with Not_found -> [f shape] + ++(* The crypto intrinsics have unconventional shapes and are not that ++ numerous to be worth the trouble of encoding here. We implement them ++ explicitly here. *) ++let crypto_intrinsics = ++" ++#ifdef __ARM_FEATURE_CRYPTO ++ ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vldrq_p128 (poly128_t const * __ptr) ++{ ++#ifdef __ARM_BIG_ENDIAN ++ poly64_t* __ptmp = (poly64_t*) __ptr; ++ poly64_t __d0 = vld1_p64 (__ptmp); ++ poly64_t __d1 = vld1_p64 (__ptmp + 1); ++ return vreinterpretq_p128_p64 (vcombine_p64 (__d1, __d0)); ++#else ++ return vreinterpretq_p128_p64 (vld1q_p64 ((poly64_t*) __ptr)); ++#endif ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vstrq_p128 (poly128_t * __ptr, poly128_t __val) ++{ ++#ifdef __ARM_BIG_ENDIAN ++ poly64x2_t __tmp = vreinterpretq_p64_p128 (__val); ++ poly64_t __d0 = vget_high_p64 (__tmp); ++ poly64_t __d1 = vget_low_p64 (__tmp); ++ vst1q_p64 ((poly64_t*) __ptr, vcombine_p64 (__d0, __d1)); ++#else ++ vst1q_p64 ((poly64_t*) __ptr, vreinterpretq_p64_p128 (__val)); ++#endif ++} ++ ++/* The vceq_p64 intrinsic does not map to a single instruction. ++ Instead we emulate it by performing a 32-bit variant of the vceq ++ and applying a pairwise min reduction to the result. ++ vceq_u32 will produce two 32-bit halves, each of which will contain either ++ all ones or all zeros depending on whether the corresponding 32-bit ++ halves of the poly64_t were equal. The whole poly64_t values are equal ++ if and only if both halves are equal, i.e. vceq_u32 returns all ones. ++ If the result is all zeroes for any half then the whole result is zeroes. ++ This is what the pairwise min reduction achieves. */ ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceq_p64 (poly64x1_t __a, poly64x1_t __b) ++{ ++ uint32x2_t __t_a = vreinterpret_u32_p64 (__a); ++ uint32x2_t __t_b = vreinterpret_u32_p64 (__b); ++ uint32x2_t __c = vceq_u32 (__t_a, __t_b); ++ uint32x2_t __m = vpmin_u32 (__c, __c); ++ return vreinterpret_u64_u32 (__m); ++} ++ ++/* The vtst_p64 intrinsic does not map to a single instruction. ++ We emulate it in way similar to vceq_p64 above but here we do ++ a reduction with max since if any two corresponding bits ++ in the two poly64_t's match, then the whole result must be all ones. */ ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vtst_p64 (poly64x1_t __a, poly64x1_t __b) ++{ ++ uint32x2_t __t_a = vreinterpret_u32_p64 (__a); ++ uint32x2_t __t_b = vreinterpret_u32_p64 (__b); ++ uint32x2_t __c = vtst_u32 (__t_a, __t_b); ++ uint32x2_t __m = vpmax_u32 (__c, __c); ++ return vreinterpret_u64_u32 (__m); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaeseq_u8 (uint8x16_t __data, uint8x16_t __key) ++{ ++ return __builtin_arm_crypto_aese (__data, __key); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaesdq_u8 (uint8x16_t __data, uint8x16_t __key) ++{ ++ return __builtin_arm_crypto_aesd (__data, __key); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaesmcq_u8 (uint8x16_t __data) ++{ ++ return __builtin_arm_crypto_aesmc (__data); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaesimcq_u8 (uint8x16_t __data) ++{ ++ return __builtin_arm_crypto_aesimc (__data); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vsha1h_u32 (uint32_t __hash_e) ++{ ++ uint32x4_t __t = vdupq_n_u32 (0); ++ __t = vsetq_lane_u32 (__hash_e, __t, 0); ++ __t = __builtin_arm_crypto_sha1h (__t); ++ return vgetq_lane_u32 (__t, 0); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsha1cq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk) ++{ ++ uint32x4_t __t = vdupq_n_u32 (0); ++ __t = vsetq_lane_u32 (__hash_e, __t, 0); ++ return __builtin_arm_crypto_sha1c (__hash_abcd, __t, __wk); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsha1pq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk) ++{ ++ uint32x4_t __t = vdupq_n_u32 (0); ++ __t = vsetq_lane_u32 (__hash_e, __t, 0); ++ return __builtin_arm_crypto_sha1p (__hash_abcd, __t, __wk); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsha1mq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk) ++{ ++ uint32x4_t __t = vdupq_n_u32 (0); ++ __t = vsetq_lane_u32 (__hash_e, __t, 0); ++ return __builtin_arm_crypto_sha1m (__hash_abcd, __t, __wk); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsha1su0q_u32 (uint32x4_t __w0_3, uint32x4_t __w4_7, uint32x4_t __w8_11) ++{ ++ return __builtin_arm_crypto_sha1su0 (__w0_3, __w4_7, __w8_11); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsha1su1q_u32 (uint32x4_t __tw0_3, uint32x4_t __w12_15) ++{ ++ return __builtin_arm_crypto_sha1su1 (__tw0_3, __w12_15); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsha256hq_u32 (uint32x4_t __hash_abcd, uint32x4_t __hash_efgh, uint32x4_t __wk) ++{ ++ return __builtin_arm_crypto_sha256h (__hash_abcd, __hash_efgh, __wk); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsha256h2q_u32 (uint32x4_t __hash_abcd, uint32x4_t __hash_efgh, uint32x4_t __wk) ++{ ++ return __builtin_arm_crypto_sha256h2 (__hash_abcd, __hash_efgh, __wk); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsha256su0q_u32 (uint32x4_t __w0_3, uint32x4_t __w4_7) ++{ ++ return __builtin_arm_crypto_sha256su0 (__w0_3, __w4_7); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsha256su1q_u32 (uint32x4_t __tw0_3, uint32x4_t __w8_11, uint32x4_t __w12_15) ++{ ++ return __builtin_arm_crypto_sha256su1 (__tw0_3, __w8_11, __w12_15); ++} ++ ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vmull_p64 (poly64_t __a, poly64_t __b) ++{ ++ return (poly128_t) __builtin_arm_crypto_vmullp64 ((uint64_t) __a, (uint64_t) __b); ++} ++ ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vmull_high_p64 (poly64x2_t __a, poly64x2_t __b) ++{ ++ poly64_t __t1 = vget_high_p64 (__a); ++ poly64_t __t2 = vget_high_p64 (__b); ++ ++ return (poly128_t) __builtin_arm_crypto_vmullp64 ((uint64_t) __t1, (uint64_t) __t2); ++} ++ ++#endif ++" +--- a/src/gcc/config/arm/constraints.md ++++ b/src/gcc/config/arm/constraints.md +@@ -21,7 +21,7 @@ + ;; The following register constraints have been used: + ;; - in ARM/Thumb-2 state: t, w, x, y, z + ;; - in Thumb state: h, b +-;; - in both states: l, c, k ++;; - in both states: l, c, k, q, US + ;; In ARM state, 'l' is an alias for 'r' + ;; 'f' and 'v' were previously used for FPA and MAVERICK registers. + +@@ -86,6 +86,9 @@ + (define_register_constraint "k" "STACK_REG" + "@internal The stack register.") + ++(define_register_constraint "q" "(TARGET_ARM && TARGET_LDRD) ? CORE_REGS : GENERAL_REGS" ++ "@internal In ARM state with LDRD support, core registers, otherwise general registers.") ++ + (define_register_constraint "b" "TARGET_THUMB ? BASE_REGS : NO_REGS" + "@internal + Thumb only. The union of the low registers and the stack register.") +@@ -93,6 +96,9 @@ + (define_register_constraint "c" "CC_REG" + "@internal The condition code register.") + ++(define_register_constraint "Cs" "CALLER_SAVE_REGS" ++ "@internal The caller save registers. Useful for sibcalls.") ++ + (define_constraint "I" + "In ARM/Thumb-2 state a constant that can be used as an immediate value in a + Data Processing instruction. In Thumb-1 state a constant in the range +@@ -164,9 +170,9 @@ + && ival > 1020 && ival <= 1275"))) + + (define_constraint "Pd" +- "@internal In Thumb-1 state a constant in the range 0 to 7" ++ "@internal In Thumb state a constant in the range 0 to 7" + (and (match_code "const_int") +- (match_test "TARGET_THUMB1 && ival >= 0 && ival <= 7"))) ++ (match_test "TARGET_THUMB && ival >= 0 && ival <= 7"))) + + (define_constraint "Pe" + "@internal In Thumb-1 state a constant in the range 256 to +510" +@@ -208,6 +214,11 @@ + (and (match_code "const_int") + (match_test "TARGET_THUMB2 && ival >= 0 && ival <= 255"))) + ++(define_constraint "Pz" ++ "@internal In Thumb-2 state the constant 0" ++ (and (match_code "const_int") ++ (match_test "TARGET_THUMB2 && (ival == 0)"))) ++ + (define_constraint "G" + "In ARM/Thumb-2 state the floating-point constant 0." + (and (match_code "const_double") +@@ -248,6 +259,24 @@ + (and (match_code "const_int") + (match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, PLUS)"))) + ++(define_constraint "De" ++ "@internal ++ In ARM/Thumb-2 state a const_int that can be used by insn anddi." ++ (and (match_code "const_int") ++ (match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, AND)"))) ++ ++(define_constraint "Df" ++ "@internal ++ In ARM/Thumb-2 state a const_int that can be used by insn iordi." ++ (and (match_code "const_int") ++ (match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, IOR)"))) ++ ++(define_constraint "Dg" ++ "@internal ++ In ARM/Thumb-2 state a const_int that can be used by insn xordi." ++ (and (match_code "const_int") ++ (match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, XOR)"))) ++ + (define_constraint "Di" + "@internal + In ARM/Thumb-2 state a const_int or const_double where both the high +@@ -305,6 +334,9 @@ + (and (match_code "const_double") + (match_test "TARGET_32BIT && TARGET_VFP && vfp3_const_double_for_fract_bits (op)"))) + ++(define_register_constraint "Ts" "(arm_restrict_it) ? LO_REGS : GENERAL_REGS" ++ "For arm_restrict_it the core registers @code{r0}-@code{r7}. GENERAL_REGS otherwise.") ++ + (define_memory_constraint "Ua" + "@internal + An address valid for loading/storing register exclusive" +@@ -392,6 +424,12 @@ + 0) + && GET_CODE (XEXP (op, 0)) != POST_INC"))) + ++(define_constraint "US" ++ "@internal ++ US is a symbol reference." ++ (match_code "symbol_ref") ++) ++ + ;; We used to have constraint letters for S and R in ARM state, but + ;; all uses of these now appear to have been removed. + +@@ -398,3 +436,4 @@ + ;; Additionally, we used to have a Q constraint in Thumb state, but + ;; this wasn't really a valid memory constraint. Again, all uses of + ;; this now seem to have been removed. ++ +--- a/src/gcc/config/arm/cortex-a7.md ++++ b/src/gcc/config/arm/cortex-a7.md +@@ -20,6 +20,45 @@ + ;; along with GCC; see the file COPYING3. If not see + ;; . + ++(define_attr "cortex_a7_neon_type" ++ "neon_mul, neon_mla, neon_other" ++ (cond [ ++ (eq_attr "type" "neon_mul_b, neon_mul_b_q,\ ++ neon_mul_h, neon_mul_h_q,\ ++ neon_mul_s, neon_mul_s_q,\ ++ neon_mul_b_long, neon_mul_h_long,\ ++ neon_mul_s_long, neon_mul_h_scalar,\ ++ neon_mul_h_scalar_q, neon_mul_s_scalar,\ ++ neon_mul_s_scalar_q, neon_mul_h_scalar_long,\ ++ neon_mul_s_scalar_long,\ ++ neon_sat_mul_b, neon_sat_mul_b_q,\ ++ neon_sat_mul_h, neon_sat_mul_h_q,\ ++ neon_sat_mul_s, neon_sat_mul_s_q,\ ++ neon_sat_mul_b_long, neon_sat_mul_h_long,\ ++ neon_sat_mul_s_long,\ ++ neon_sat_mul_h_scalar, neon_sat_mul_h_scalar_q,\ ++ neon_sat_mul_s_scalar, neon_sat_mul_s_scalar_q,\ ++ neon_sat_mul_h_scalar_long,\ ++ neon_sat_mul_s_scalar_long,\ ++ neon_fp_mul_s, neon_fp_mul_s_q,\ ++ neon_fp_mul_s_scalar, neon_fp_mul_s_scalar_q") ++ (const_string "neon_mul") ++ (eq_attr "type" "neon_mla_b, neon_mla_b_q, neon_mla_h,\ ++ neon_mla_h_q, neon_mla_s, neon_mla_s_q,\ ++ neon_mla_b_long, neon_mla_h_long,\ ++ neon_mla_s_long,\ ++ neon_mla_h_scalar, neon_mla_h_scalar_q,\ ++ neon_mla_s_scalar, neon_mla_s_scalar_q,\ ++ neon_mla_h_scalar_long, neon_mla_s_scalar_long,\ ++ neon_sat_mla_b_long, neon_sat_mla_h_long,\ ++ neon_sat_mla_s_long,\ ++ neon_sat_mla_h_scalar_long,\ ++ neon_sat_mla_s_scalar_long,\ ++ neon_fp_mla_s, neon_fp_mla_s_q,\ ++ neon_fp_mla_s_scalar, neon_fp_mla_s_scalar_q") ++ (const_string "neon_mla")] ++ (const_string "neon_other"))) ++ + (define_automaton "cortex_a7") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -67,8 +106,7 @@ + + (define_insn_reservation "cortex_a7_branch" 0 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "branch") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "branch")) + "(cortex_a7_ex2|cortex_a7_ex1)+cortex_a7_branch") + + ;; Call cannot dual-issue as an older instruction. It can dual-issue +@@ -77,8 +115,7 @@ + ;; cycle. + (define_insn_reservation "cortex_a7_call" 1 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "call") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "call")) + "(cortex_a7_ex2|cortex_a7_both)+cortex_a7_branch") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -88,11 +125,10 @@ + ;; ALU instruction with an immediate operand can dual-issue. + (define_insn_reservation "cortex_a7_alu_imm" 2 + (and (eq_attr "tune" "cortexa7") +- (and (ior (eq_attr "type" "simple_alu_imm") +- (ior (eq_attr "type" "simple_alu_shift") +- (and (eq_attr "insn" "mov") +- (not (eq_attr "length" "8"))))) +- (eq_attr "neon_type" "none"))) ++ (ior (eq_attr "type" "adr,alu_imm,alus_imm,logic_imm,logics_imm,\ ++ mov_imm,mvn_imm,extend") ++ (and (eq_attr "type" "mov_reg,mov_shift,mov_shift_reg") ++ (not (eq_attr "length" "8"))))) + "cortex_a7_ex2|cortex_a7_ex1") + + ;; ALU instruction with register operands can dual-issue +@@ -99,14 +135,21 @@ + ;; with a younger immediate-based instruction. + (define_insn_reservation "cortex_a7_alu_reg" 2 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "alu_reg") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ bfm,rev,\ ++ shift_imm,shift_reg,mov_reg,mvn_reg")) + "cortex_a7_ex1") + + (define_insn_reservation "cortex_a7_alu_shift" 2 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "alu_shift,alu_shift_reg") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_shift,mov_shift_reg,\ ++ mvn_shift,mvn_shift_reg,\ ++ mrs,multiple,no_insn")) + "cortex_a7_ex1") + + ;; Forwarding path for unshifted operands. +@@ -127,8 +170,8 @@ + + (define_insn_reservation "cortex_a7_mul" 2 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "mult") +- (eq_attr "neon_type" "none"))) ++ (ior (eq_attr "mul32" "yes") ++ (eq_attr "mul64" "yes"))) + "cortex_a7_both") + + ;; Forward the result of a multiply operation to the accumulator +@@ -140,7 +183,7 @@ + ;; The latency depends on the operands, so we use an estimate here. + (define_insn_reservation "cortex_a7_idiv" 5 + (and (eq_attr "tune" "cortexa7") +- (eq_attr "insn" "udiv,sdiv")) ++ (eq_attr "type" "udiv,sdiv")) + "cortex_a7_both*5") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -153,50 +196,42 @@ + + (define_insn_reservation "cortex_a7_load1" 2 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "load_byte,load1") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "load_byte,load1")) + "cortex_a7_ex1") + + (define_insn_reservation "cortex_a7_store1" 0 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "store1") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "store1")) + "cortex_a7_ex1") + + (define_insn_reservation "cortex_a7_load2" 2 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "load2") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "load2")) + "cortex_a7_both") + + (define_insn_reservation "cortex_a7_store2" 0 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "store2") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "store2")) + "cortex_a7_both") + + (define_insn_reservation "cortex_a7_load3" 3 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "load3") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "load3")) + "cortex_a7_both, cortex_a7_ex1") + + (define_insn_reservation "cortex_a7_store3" 0 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "store4") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "store4")) + "cortex_a7_both, cortex_a7_ex1") + + (define_insn_reservation "cortex_a7_load4" 3 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "load4") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "load4")) + "cortex_a7_both, cortex_a7_both") + + (define_insn_reservation "cortex_a7_store4" 0 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "store3") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "store3")) + "cortex_a7_both, cortex_a7_both") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -208,9 +243,8 @@ + + (define_insn_reservation "cortex_a7_fpalu" 4 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fcpys,\ +- f_cvt, fcmps, fcmpd") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fmov,\ ++ f_cvt, f_cvtf2i, f_cvti2f, fcmps, fcmpd")) + "cortex_a7_ex1+cortex_a7_fpadd_pipe") + + ;; For fconsts and fconstd, 8-bit immediate data is passed directly from +@@ -218,8 +252,7 @@ + + (define_insn_reservation "cortex_a7_fconst" 3 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "fconsts,fconstd") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "fconsts,fconstd")) + "cortex_a7_ex1+cortex_a7_fpadd_pipe") + + ;; We should try not to attempt to issue a single-precision multiplication in +@@ -228,40 +261,22 @@ + + (define_insn_reservation "cortex_a7_fpmuls" 4 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "fmuls") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "fmuls")) + "cortex_a7_ex1+cortex_a7_fpmul_pipe") + + (define_insn_reservation "cortex_a7_neon_mul" 4 + (and (eq_attr "tune" "cortexa7") +- (eq_attr "neon_type" +- "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- neon_mul_qqq_8_16_32_ddd_32,\ +- neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar,\ +- neon_mul_ddd_16_scalar_32_16_long_scalar,\ +- neon_mul_qqd_32_scalar,\ +- neon_fp_vmul_ddd,\ +- neon_fp_vmul_qqd")) ++ (eq_attr "cortex_a7_neon_type" "neon_mul")) + "(cortex_a7_both+cortex_a7_fpmul_pipe)*2") + + (define_insn_reservation "cortex_a7_fpmacs" 8 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "fmacs,ffmas") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "fmacs,ffmas")) + "cortex_a7_ex1+cortex_a7_fpmul_pipe") + + (define_insn_reservation "cortex_a7_neon_mla" 8 + (and (eq_attr "tune" "cortexa7") +- (eq_attr "neon_type" +- "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- neon_mla_qqq_8_16,\ +- neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long,\ +- neon_mla_qqq_32_qqd_32_scalar,\ +- neon_mla_ddd_16_scalar_qdd_32_16_long_scalar,\ +- neon_fp_vmla_ddd,\ +- neon_fp_vmla_qqq,\ +- neon_fp_vmla_ddd_scalar,\ +- neon_fp_vmla_qqq_scalar")) ++ (eq_attr "cortex_a7_neon_type" "neon_mla")) + "cortex_a7_both+cortex_a7_fpmul_pipe") + + (define_bypass 4 "cortex_a7_fpmacs,cortex_a7_neon_mla" +@@ -273,20 +288,17 @@ + + (define_insn_reservation "cortex_a7_fpmuld" 7 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "fmuld") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "fmuld")) + "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*3") + + (define_insn_reservation "cortex_a7_fpmacd" 11 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "fmacd") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "fmacd")) + "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*3") + + (define_insn_reservation "cortex_a7_fpfmad" 8 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "ffmad") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "ffmad")) + "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*4") + + (define_bypass 7 "cortex_a7_fpmacd" +@@ -299,14 +311,12 @@ + + (define_insn_reservation "cortex_a7_fdivs" 16 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "fdivs") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "fdivs, fsqrts")) + "cortex_a7_ex1+cortex_a7_fp_div_sqrt, cortex_a7_fp_div_sqrt * 13") + + (define_insn_reservation "cortex_a7_fdivd" 31 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "fdivd") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "fdivd, fsqrtd")) + "cortex_a7_ex1+cortex_a7_fp_div_sqrt, cortex_a7_fp_div_sqrt * 28") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -317,14 +327,12 @@ + + (define_insn_reservation "cortex_a7_r2f" 4 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "r_2_f") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "f_mcr,f_mcrr")) + "cortex_a7_both") + + (define_insn_reservation "cortex_a7_f2r" 2 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "f_2_r") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "f_mrc,f_mrrc")) + "cortex_a7_ex1") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -336,8 +344,7 @@ + + (define_insn_reservation "cortex_a7_f_flags" 4 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "f_flag") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "f_flag")) + "cortex_a7_ex1") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -346,26 +353,22 @@ + + (define_insn_reservation "cortex_a7_f_loads" 4 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "f_loads") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "f_loads")) + "cortex_a7_ex1") + + (define_insn_reservation "cortex_a7_f_loadd" 4 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "f_loadd") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "f_loadd")) + "cortex_a7_both") + + (define_insn_reservation "cortex_a7_f_stores" 0 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "f_stores") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "f_stores")) + "cortex_a7_ex1") + + (define_insn_reservation "cortex_a7_f_stored" 0 + (and (eq_attr "tune" "cortexa7") +- (and (eq_attr "type" "f_stored") +- (eq_attr "neon_type" "none"))) ++ (eq_attr "type" "f_stored")) + "cortex_a7_both") + + ;; Load-to-use for floating-point values has a penalty of one cycle, +@@ -386,22 +389,6 @@ + + (define_insn_reservation "cortex_a7_neon" 4 + (and (eq_attr "tune" "cortexa7") +- (eq_attr "neon_type" +- "!none,\ +- neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- neon_mul_qqq_8_16_32_ddd_32,\ +- neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar,\ +- neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- neon_mla_qqq_8_16,\ +- neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long,\ +- neon_mla_qqq_32_qqd_32_scalar,\ +- neon_mul_ddd_16_scalar_32_16_long_scalar,\ +- neon_mul_qqd_32_scalar,\ +- neon_mla_ddd_16_scalar_qdd_32_16_long_scalar,\ +- neon_fp_vmul_ddd,\ +- neon_fp_vmul_qqd,\ +- neon_fp_vmla_ddd,\ +- neon_fp_vmla_qqq,\ +- neon_fp_vmla_ddd_scalar,\ +- neon_fp_vmla_qqq_scalar")) ++ (and (eq_attr "is_neon_type" "yes") ++ (eq_attr "cortex_a7_neon_type" "neon_other"))) + "cortex_a7_both*2") +--- a/src/gcc/config/arm/aarch-common-protos.h ++++ b/src/gcc/config/arm/aarch-common-protos.h +@@ -0,0 +1,36 @@ ++/* Function prototypes for instruction scheduling dependeoncy routines, ++ defined in aarch-common.c ++ ++ Copyright (C) 1991-2013 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++ ++#ifndef GCC_AARCH_COMMON_PROTOS_H ++#define GCC_AARCH_COMMON_PROTOS_H ++ ++extern int arm_early_load_addr_dep (rtx, rtx); ++extern int arm_early_store_addr_dep (rtx, rtx); ++extern int arm_mac_accumulator_is_mul_result (rtx, rtx); ++extern int arm_mac_accumulator_is_result (rtx, rtx); ++extern int arm_no_early_alu_shift_dep (rtx, rtx); ++extern int arm_no_early_alu_shift_value_dep (rtx, rtx); ++extern int arm_no_early_mul_dep (rtx, rtx); ++extern int arm_no_early_store_addr_dep (rtx, rtx); ++ ++#endif /* GCC_AARCH_COMMON_PROTOS_H */ +--- a/src/gcc/config/arm/arm-arches.def ++++ b/src/gcc/config/arm/arm-arches.def +@@ -53,6 +53,7 @@ + ARM_ARCH("armv7-r", cortexr4, 7R, FL_CO_PROC | FL_FOR_ARCH7R) + ARM_ARCH("armv7-m", cortexm3, 7M, FL_CO_PROC | FL_FOR_ARCH7M) + ARM_ARCH("armv7e-m", cortexm4, 7EM, FL_CO_PROC | FL_FOR_ARCH7EM) +-ARM_ARCH("armv8-a", cortexa15, 8A, FL_CO_PROC | FL_FOR_ARCH8A) ++ARM_ARCH("armv8-a", cortexa53, 8A, FL_CO_PROC | FL_FOR_ARCH8A) ++ARM_ARCH("armv8-a+crc",cortexa53, 8A,FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A) + ARM_ARCH("iwmmxt", iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT) + ARM_ARCH("iwmmxt2", iwmmxt2, 5TE, FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2) +--- a/src/gcc/config/arm/t-arm ++++ b/src/gcc/config/arm/t-arm +@@ -39,6 +39,7 @@ + $(srcdir)/config/arm/cortex-a8-neon.md \ + $(srcdir)/config/arm/cortex-a9.md \ + $(srcdir)/config/arm/cortex-a9-neon.md \ ++ $(srcdir)/config/arm/cortex-a53.md \ + $(srcdir)/config/arm/cortex-m4-fpu.md \ + $(srcdir)/config/arm/cortex-m4.md \ + $(srcdir)/config/arm/cortex-r4f.md \ +@@ -52,6 +53,7 @@ + $(srcdir)/config/arm/iwmmxt.md \ + $(srcdir)/config/arm/iwmmxt2.md \ + $(srcdir)/config/arm/ldmstm.md \ ++ $(srcdir)/config/arm/ldrdstrd.md \ + $(srcdir)/config/arm/marvell-f-iwmmxt.md \ + $(srcdir)/config/arm/neon.md \ + $(srcdir)/config/arm/predicates.md \ +@@ -76,6 +78,11 @@ + $(SHELL) $(srcdir)/config/arm/genopt.sh $(srcdir)/config/arm > \ + $(srcdir)/config/arm/arm-tables.opt + ++aarch-common.o: $(srcdir)/config/arm/aarch-common.c $(CONFIG_H) $(SYSTEM_H) \ ++ coretypes.h $(TM_H) $(TM_P_H) $(RTL_H) $(TREE_H) output.h $(C_COMMON_H) ++ $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ ++ $(srcdir)/config/arm/aarch-common.c ++ + arm.o: $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(RTL_H) $(TREE_H) $(OBSTACK_H) $(REGS_H) hard-reg-set.h \ + insn-config.h conditions.h output.h dumpfile.h \ +@@ -84,7 +91,8 @@ + $(GGC_H) except.h $(C_PRAGMA_H) $(TM_P_H) \ + $(TARGET_H) $(TARGET_DEF_H) debug.h langhooks.h $(DF_H) \ + intl.h libfuncs.h $(PARAMS_H) $(OPTS_H) $(srcdir)/config/arm/arm-cores.def \ +- $(srcdir)/config/arm/arm-arches.def $(srcdir)/config/arm/arm-fpus.def ++ $(srcdir)/config/arm/arm-arches.def $(srcdir)/config/arm/arm-fpus.def \ ++ $(srcdir)/config/arm/arm_neon_builtins.def + + arm-c.o: $(srcdir)/config/arm/arm-c.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TM_H) $(TREE_H) output.h $(C_COMMON_H) +--- a/src/gcc/config/arm/arm.opt ++++ b/src/gcc/config/arm/arm.opt +@@ -239,6 +239,10 @@ + Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS) + Only generate absolute relocations on word sized values. + ++mrestrict-it ++Target Report Var(arm_restrict_it) Init(2) ++Generate IT blocks appropriate for ARMv8. ++ + mfix-cortex-m3-ldrd + Target Report Var(fix_cm3_ldrd) Init(2) + Avoid overlapping destination and address registers on LDRD instructions +@@ -247,3 +251,7 @@ + munaligned-access + Target Report Var(unaligned_access) Init(2) + Enable unaligned word and halfword accesses to packed data. ++ ++mneon-for-64bits ++Target Report RejectNegative Var(use_neon_for_64bits) Init(0) ++Use Neon to perform 64-bits operations rather than core registers. +--- a/src/gcc/config/arm/arm926ejs.md ++++ b/src/gcc/config/arm/arm926ejs.md +@@ -58,7 +58,16 @@ + ;; ALU operations with no shifted operand + (define_insn_reservation "9_alu_op" 1 + (and (eq_attr "tune" "arm926ejs") +- (eq_attr "type" "alu_reg,simple_alu_imm,simple_alu_shift,alu_shift")) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ shift_imm,shift_reg,extend,\ ++ mov_imm,mov_reg,mov_shift,\ ++ mvn_imm,mvn_reg,mvn_shift,\ ++ multiple,no_insn")) + "e,m,w") + + ;; ALU operations with a shift-by-register operand +@@ -67,7 +76,9 @@ + ;; the execute stage. + (define_insn_reservation "9_alu_shift_reg_op" 2 + (and (eq_attr "tune" "arm926ejs") +- (eq_attr "type" "alu_shift_reg")) ++ (eq_attr "type" "alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_shift_reg,mvn_shift_reg")) + "e*2,m,w") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -81,32 +92,32 @@ + + (define_insn_reservation "9_mult1" 3 + (and (eq_attr "tune" "arm926ejs") +- (eq_attr "insn" "smlalxy,mul,mla")) ++ (eq_attr "type" "smlalxy,mul,mla")) + "e*2,m,w") + + (define_insn_reservation "9_mult2" 4 + (and (eq_attr "tune" "arm926ejs") +- (eq_attr "insn" "muls,mlas")) ++ (eq_attr "type" "muls,mlas")) + "e*3,m,w") + + (define_insn_reservation "9_mult3" 4 + (and (eq_attr "tune" "arm926ejs") +- (eq_attr "insn" "umull,umlal,smull,smlal")) ++ (eq_attr "type" "umull,umlal,smull,smlal")) + "e*3,m,w") + + (define_insn_reservation "9_mult4" 5 + (and (eq_attr "tune" "arm926ejs") +- (eq_attr "insn" "umulls,umlals,smulls,smlals")) ++ (eq_attr "type" "umulls,umlals,smulls,smlals")) + "e*4,m,w") + + (define_insn_reservation "9_mult5" 2 + (and (eq_attr "tune" "arm926ejs") +- (eq_attr "insn" "smulxy,smlaxy,smlawx")) ++ (eq_attr "type" "smulxy,smlaxy,smlawx")) + "e,m,w") + + (define_insn_reservation "9_mult6" 3 + (and (eq_attr "tune" "arm926ejs") +- (eq_attr "insn" "smlalxy")) ++ (eq_attr "type" "smlalxy")) + "e*2,m,w") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +--- a/src/gcc/config/arm/ldrdstrd.md ++++ b/src/gcc/config/arm/ldrdstrd.md +@@ -0,0 +1,260 @@ ++;; ARM ldrd/strd peephole optimizations. ++;; ++;; Copyright (C) 2013 Free Software Foundation, Inc. ++;; ++;; Written by Greta Yorsh ++ ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; The following peephole optimizations identify consecutive memory ++;; accesses, and try to rearrange the operands to enable generation of ++;; ldrd/strd. ++ ++(define_peephole2 ; ldrd ++ [(set (match_operand:SI 0 "arm_general_register_operand" "") ++ (match_operand:SI 2 "memory_operand" "")) ++ (set (match_operand:SI 1 "arm_general_register_operand" "") ++ (match_operand:SI 3 "memory_operand" ""))] ++ "TARGET_LDRD ++ && current_tune->prefer_ldrd_strd ++ && !optimize_function_for_size_p (cfun)" ++ [(const_int 0)] ++{ ++ if (!gen_operands_ldrd_strd (operands, true, false, false)) ++ FAIL; ++ else if (TARGET_ARM) ++ { ++ /* In ARM state, the destination registers of LDRD/STRD must be ++ consecutive. We emit DImode access. */ ++ operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); ++ operands[2] = adjust_address (operands[2], DImode, 0); ++ /* Emit [(set (match_dup 0) (match_dup 2))] */ ++ emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[2])); ++ DONE; ++ } ++ else if (TARGET_THUMB2) ++ { ++ /* Emit the pattern: ++ [(parallel [(set (match_dup 0) (match_dup 2)) ++ (set (match_dup 1) (match_dup 3))])] */ ++ rtx t1 = gen_rtx_SET (VOIDmode, operands[0], operands[2]); ++ rtx t2 = gen_rtx_SET (VOIDmode, operands[1], operands[3]); ++ emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, t1, t2))); ++ DONE; ++ } ++}) ++ ++(define_peephole2 ; strd ++ [(set (match_operand:SI 2 "memory_operand" "") ++ (match_operand:SI 0 "arm_general_register_operand" "")) ++ (set (match_operand:SI 3 "memory_operand" "") ++ (match_operand:SI 1 "arm_general_register_operand" ""))] ++ "TARGET_LDRD ++ && current_tune->prefer_ldrd_strd ++ && !optimize_function_for_size_p (cfun)" ++ [(const_int 0)] ++{ ++ if (!gen_operands_ldrd_strd (operands, false, false, false)) ++ FAIL; ++ else if (TARGET_ARM) ++ { ++ /* In ARM state, the destination registers of LDRD/STRD must be ++ consecutive. We emit DImode access. */ ++ operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); ++ operands[2] = adjust_address (operands[2], DImode, 0); ++ /* Emit [(set (match_dup 2) (match_dup 0))] */ ++ emit_insn (gen_rtx_SET (VOIDmode, operands[2], operands[0])); ++ DONE; ++ } ++ else if (TARGET_THUMB2) ++ { ++ /* Emit the pattern: ++ [(parallel [(set (match_dup 2) (match_dup 0)) ++ (set (match_dup 3) (match_dup 1))])] */ ++ rtx t1 = gen_rtx_SET (VOIDmode, operands[2], operands[0]); ++ rtx t2 = gen_rtx_SET (VOIDmode, operands[3], operands[1]); ++ emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, t1, t2))); ++ DONE; ++ } ++}) ++ ++;; The following peepholes reorder registers to enable LDRD/STRD. ++(define_peephole2 ; strd of constants ++ [(set (match_operand:SI 0 "arm_general_register_operand" "") ++ (match_operand:SI 4 "const_int_operand" "")) ++ (set (match_operand:SI 2 "memory_operand" "") ++ (match_dup 0)) ++ (set (match_operand:SI 1 "arm_general_register_operand" "") ++ (match_operand:SI 5 "const_int_operand" "")) ++ (set (match_operand:SI 3 "memory_operand" "") ++ (match_dup 1))] ++ "TARGET_LDRD ++ && current_tune->prefer_ldrd_strd ++ && !optimize_function_for_size_p (cfun)" ++ [(const_int 0)] ++{ ++ if (!gen_operands_ldrd_strd (operands, false, true, false)) ++ FAIL; ++ else if (TARGET_ARM) ++ { ++ rtx tmp = gen_rtx_REG (DImode, REGNO (operands[0])); ++ operands[2] = adjust_address (operands[2], DImode, 0); ++ /* Emit the pattern: ++ [(set (match_dup 0) (match_dup 4)) ++ (set (match_dup 1) (match_dup 5)) ++ (set (match_dup 2) tmp)] */ ++ emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[4])); ++ emit_insn (gen_rtx_SET (VOIDmode, operands[1], operands[5])); ++ emit_insn (gen_rtx_SET (VOIDmode, operands[2], tmp)); ++ DONE; ++ } ++ else if (TARGET_THUMB2) ++ { ++ /* Emit the pattern: ++ [(set (match_dup 0) (match_dup 4)) ++ (set (match_dup 1) (match_dup 5)) ++ (parallel [(set (match_dup 2) (match_dup 0)) ++ (set (match_dup 3) (match_dup 1))])] */ ++ emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[4])); ++ emit_insn (gen_rtx_SET (VOIDmode, operands[1], operands[5])); ++ rtx t1 = gen_rtx_SET (VOIDmode, operands[2], operands[0]); ++ rtx t2 = gen_rtx_SET (VOIDmode, operands[3], operands[1]); ++ emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, t1, t2))); ++ DONE; ++ } ++}) ++ ++(define_peephole2 ; strd of constants ++ [(set (match_operand:SI 0 "arm_general_register_operand" "") ++ (match_operand:SI 4 "const_int_operand" "")) ++ (set (match_operand:SI 1 "arm_general_register_operand" "") ++ (match_operand:SI 5 "const_int_operand" "")) ++ (set (match_operand:SI 2 "memory_operand" "") ++ (match_dup 0)) ++ (set (match_operand:SI 3 "memory_operand" "") ++ (match_dup 1))] ++ "TARGET_LDRD ++ && current_tune->prefer_ldrd_strd ++ && !optimize_function_for_size_p (cfun)" ++ [(const_int 0)] ++{ ++ if (!gen_operands_ldrd_strd (operands, false, true, false)) ++ FAIL; ++ else if (TARGET_ARM) ++ { ++ rtx tmp = gen_rtx_REG (DImode, REGNO (operands[0])); ++ operands[2] = adjust_address (operands[2], DImode, 0); ++ /* Emit the pattern ++ [(set (match_dup 0) (match_dup 4)) ++ (set (match_dup 1) (match_dup 5)) ++ (set (match_dup 2) tmp)] */ ++ emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[4])); ++ emit_insn (gen_rtx_SET (VOIDmode, operands[1], operands[5])); ++ emit_insn (gen_rtx_SET (VOIDmode, operands[2], tmp)); ++ DONE; ++ } ++ else if (TARGET_THUMB2) ++ { ++ /* Emit the pattern: ++ [(set (match_dup 0) (match_dup 4)) ++ (set (match_dup 1) (match_dup 5)) ++ (parallel [(set (match_dup 2) (match_dup 0)) ++ (set (match_dup 3) (match_dup 1))])] */ ++ emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[4])); ++ emit_insn (gen_rtx_SET (VOIDmode, operands[1], operands[5])); ++ rtx t1 = gen_rtx_SET (VOIDmode, operands[2], operands[0]); ++ rtx t2 = gen_rtx_SET (VOIDmode, operands[3], operands[1]); ++ emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, t1, t2))); ++ DONE; ++ } ++}) ++ ++;; The following two peephole optimizations are only relevant for ARM ++;; mode where LDRD/STRD require consecutive registers. ++ ++(define_peephole2 ; swap the destination registers of two loads ++ ; before a commutative operation. ++ [(set (match_operand:SI 0 "arm_general_register_operand" "") ++ (match_operand:SI 2 "memory_operand" "")) ++ (set (match_operand:SI 1 "arm_general_register_operand" "") ++ (match_operand:SI 3 "memory_operand" "")) ++ (set (match_operand:SI 4 "arm_general_register_operand" "") ++ (match_operator:SI 5 "commutative_binary_operator" ++ [(match_operand 6 "arm_general_register_operand" "") ++ (match_operand 7 "arm_general_register_operand" "") ]))] ++ "TARGET_LDRD && TARGET_ARM ++ && current_tune->prefer_ldrd_strd ++ && !optimize_function_for_size_p (cfun) ++ && ( ((rtx_equal_p(operands[0], operands[6])) && (rtx_equal_p(operands[1], operands[7]))) ++ ||((rtx_equal_p(operands[0], operands[7])) && (rtx_equal_p(operands[1], operands[6])))) ++ && (peep2_reg_dead_p (3, operands[0]) || rtx_equal_p (operands[0], operands[4])) ++ && (peep2_reg_dead_p (3, operands[1]) || rtx_equal_p (operands[1], operands[4]))" ++ [(set (match_dup 0) (match_dup 2)) ++ (set (match_dup 4) (match_op_dup 5 [(match_dup 6) (match_dup 7)]))] ++ { ++ if (!gen_operands_ldrd_strd (operands, true, false, true)) ++ { ++ FAIL; ++ } ++ else ++ { ++ operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); ++ operands[2] = adjust_address (operands[2], DImode, 0); ++ } ++ } ++) ++ ++(define_peephole2 ; swap the destination registers of two loads ++ ; before a commutative operation that sets the flags. ++ [(set (match_operand:SI 0 "arm_general_register_operand" "") ++ (match_operand:SI 2 "memory_operand" "")) ++ (set (match_operand:SI 1 "arm_general_register_operand" "") ++ (match_operand:SI 3 "memory_operand" "")) ++ (parallel ++ [(set (match_operand:SI 4 "arm_general_register_operand" "") ++ (match_operator:SI 5 "commutative_binary_operator" ++ [(match_operand 6 "arm_general_register_operand" "") ++ (match_operand 7 "arm_general_register_operand" "") ])) ++ (clobber (reg:CC CC_REGNUM))])] ++ "TARGET_LDRD && TARGET_ARM ++ && current_tune->prefer_ldrd_strd ++ && !optimize_function_for_size_p (cfun) ++ && ( ((rtx_equal_p(operands[0], operands[6])) && (rtx_equal_p(operands[1], operands[7]))) ++ ||((rtx_equal_p(operands[0], operands[7])) && (rtx_equal_p(operands[1], operands[6])))) ++ && (peep2_reg_dead_p (3, operands[0]) || rtx_equal_p (operands[0], operands[4])) ++ && (peep2_reg_dead_p (3, operands[1]) || rtx_equal_p (operands[1], operands[4]))" ++ [(set (match_dup 0) (match_dup 2)) ++ (parallel ++ [(set (match_dup 4) ++ (match_op_dup 5 [(match_dup 6) (match_dup 7)])) ++ (clobber (reg:CC CC_REGNUM))])] ++ { ++ if (!gen_operands_ldrd_strd (operands, true, false, true)) ++ { ++ FAIL; ++ } ++ else ++ { ++ operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); ++ operands[2] = adjust_address (operands[2], DImode, 0); ++ } ++ } ++) ++ ++;; TODO: Handle LDRD/STRD with writeback: ++;; (a) memory operands can be POST_INC, POST_DEC, PRE_MODIFY, POST_MODIFY ++;; (b) Patterns may be followed by an update of the base address. +--- a/src/gcc/config/arm/predicates.md ++++ b/src/gcc/config/arm/predicates.md +@@ -31,6 +31,28 @@ + || REGNO_REG_CLASS (REGNO (op)) != NO_REGS)); + }) + ++(define_predicate "imm_for_neon_inv_logic_operand" ++ (match_code "const_vector") ++{ ++ return (TARGET_NEON ++ && neon_immediate_valid_for_logic (op, mode, 1, NULL, NULL)); ++}) ++ ++(define_predicate "neon_inv_logic_op2" ++ (ior (match_operand 0 "imm_for_neon_inv_logic_operand") ++ (match_operand 0 "s_register_operand"))) ++ ++(define_predicate "imm_for_neon_logic_operand" ++ (match_code "const_vector") ++{ ++ return (TARGET_NEON ++ && neon_immediate_valid_for_logic (op, mode, 0, NULL, NULL)); ++}) ++ ++(define_predicate "neon_logic_op2" ++ (ior (match_operand 0 "imm_for_neon_logic_operand") ++ (match_operand 0 "s_register_operand"))) ++ + ;; Any general register. + (define_predicate "arm_hard_general_register_operand" + (match_code "reg") +@@ -151,6 +173,23 @@ + (ior (match_operand 0 "arm_rhs_operand") + (match_operand 0 "arm_neg_immediate_operand"))) + ++(define_predicate "arm_anddi_operand_neon" ++ (ior (match_operand 0 "s_register_operand") ++ (and (match_code "const_int") ++ (match_test "const_ok_for_dimode_op (INTVAL (op), AND)")) ++ (match_operand 0 "neon_inv_logic_op2"))) ++ ++(define_predicate "arm_iordi_operand_neon" ++ (ior (match_operand 0 "s_register_operand") ++ (and (match_code "const_int") ++ (match_test "const_ok_for_dimode_op (INTVAL (op), IOR)")) ++ (match_operand 0 "neon_logic_op2"))) ++ ++(define_predicate "arm_xordi_operand" ++ (ior (match_operand 0 "s_register_operand") ++ (and (match_code "const_int") ++ (match_test "const_ok_for_dimode_op (INTVAL (op), XOR)")))) ++ + (define_predicate "arm_adddi_operand" + (ior (match_operand 0 "s_register_operand") + (and (match_code "const_int") +@@ -213,6 +252,10 @@ + (and (match_code "plus,minus,ior,xor,and") + (match_test "mode == GET_MODE (op)"))) + ++(define_special_predicate "shiftable_operator_strict_it" ++ (and (match_code "plus,and") ++ (match_test "mode == GET_MODE (op)"))) ++ + ;; True for logical binary operators. + (define_special_predicate "logical_binary_operator" + (and (match_code "ior,xor,and") +@@ -276,6 +319,24 @@ + (define_special_predicate "lt_ge_comparison_operator" + (match_code "lt,ge")) + ++;; The vsel instruction only accepts the ARM condition codes listed below. ++(define_special_predicate "arm_vsel_comparison_operator" ++ (and (match_operand 0 "expandable_comparison_operator") ++ (match_test "maybe_get_arm_condition_code (op) == ARM_GE ++ || maybe_get_arm_condition_code (op) == ARM_GT ++ || maybe_get_arm_condition_code (op) == ARM_EQ ++ || maybe_get_arm_condition_code (op) == ARM_VS ++ || maybe_get_arm_condition_code (op) == ARM_LT ++ || maybe_get_arm_condition_code (op) == ARM_LE ++ || maybe_get_arm_condition_code (op) == ARM_NE ++ || maybe_get_arm_condition_code (op) == ARM_VC"))) ++ ++(define_special_predicate "arm_cond_move_operator" ++ (if_then_else (match_test "arm_restrict_it") ++ (and (match_test "TARGET_FPU_ARMV8") ++ (match_operand 0 "arm_vsel_comparison_operator")) ++ (match_operand 0 "expandable_comparison_operator"))) ++ + (define_special_predicate "noov_comparison_operator" + (match_code "lt,ge,eq,ne")) + +@@ -512,28 +573,6 @@ + (ior (match_operand 0 "s_register_operand") + (match_operand 0 "imm_for_neon_rshift_operand"))) + +-(define_predicate "imm_for_neon_logic_operand" +- (match_code "const_vector") +-{ +- return (TARGET_NEON +- && neon_immediate_valid_for_logic (op, mode, 0, NULL, NULL)); +-}) +- +-(define_predicate "imm_for_neon_inv_logic_operand" +- (match_code "const_vector") +-{ +- return (TARGET_NEON +- && neon_immediate_valid_for_logic (op, mode, 1, NULL, NULL)); +-}) +- +-(define_predicate "neon_logic_op2" +- (ior (match_operand 0 "imm_for_neon_logic_operand") +- (match_operand 0 "s_register_operand"))) +- +-(define_predicate "neon_inv_logic_op2" +- (ior (match_operand 0 "imm_for_neon_inv_logic_operand") +- (match_operand 0 "s_register_operand"))) +- + ;; Predicates for named expanders that overlap multiple ISAs. + + (define_predicate "cmpdi_operand" +@@ -623,3 +662,7 @@ + (define_predicate "mem_noofs_operand" + (and (match_code "mem") + (match_code "reg" "0"))) ++ ++(define_predicate "call_insn_operand" ++ (ior (match_code "symbol_ref") ++ (match_operand 0 "s_register_operand"))) +--- a/src/gcc/config/arm/cortex-a15-neon.md ++++ b/src/gcc/config/arm/cortex-a15-neon.md +@@ -17,6 +17,199 @@ + ;; along with GCC; see the file COPYING3. If not see + ;; . + ++(define_attr "cortex_a15_neon_type" ++ "neon_abd, neon_abd_q, neon_arith_acc, neon_arith_acc_q, ++ neon_arith_basic, neon_arith_complex, ++ neon_reduc_add_acc, neon_multiply, neon_multiply_q, ++ neon_multiply_long, neon_mla, neon_mla_q, neon_mla_long, ++ neon_sat_mla_long, neon_shift_acc, neon_shift_imm_basic,\ ++ neon_shift_imm_complex, ++ neon_shift_reg_basic, neon_shift_reg_basic_q, neon_shift_reg_complex, ++ neon_shift_reg_complex_q, neon_fp_negabs, neon_fp_arith, ++ neon_fp_arith_q, neon_fp_cvt_int, ++ neon_fp_cvt_int_q, neon_fp_cvt16, neon_fp_minmax, neon_fp_mul, ++ neon_fp_mul_q, neon_fp_mla, neon_fp_mla_q, neon_fp_recpe_rsqrte, ++ neon_fp_recpe_rsqrte_q, neon_bitops, neon_bitops_q, neon_from_gp, ++ neon_from_gp_q, neon_move, neon_tbl3_tbl4, neon_zip_q, neon_to_gp, ++ neon_load_a, neon_load_b, neon_load_c, neon_load_d, neon_load_e, ++ neon_load_f, neon_store_a, neon_store_b, neon_store_c, neon_store_d, ++ neon_store_e, neon_store_f, neon_store_g, neon_store_h, ++ unknown" ++ (cond [ ++ (eq_attr "type" "neon_abd, neon_abd_long") ++ (const_string "neon_abd") ++ (eq_attr "type" "neon_abd_q") ++ (const_string "neon_abd_q") ++ (eq_attr "type" "neon_arith_acc, neon_reduc_add_acc,\ ++ neon_reduc_add_acc_q") ++ (const_string "neon_arith_acc") ++ (eq_attr "type" "neon_arith_acc_q") ++ (const_string "neon_arith_acc_q") ++ (eq_attr "type" "neon_add, neon_add_q, neon_add_long,\ ++ neon_add_widen, neon_neg, neon_neg_q,\ ++ neon_reduc_add, neon_reduc_add_q,\ ++ neon_reduc_add_long, neon_sub, neon_sub_q,\ ++ neon_sub_long, neon_sub_widen, neon_logic,\ ++ neon_logic_q, neon_tst, neon_tst_q") ++ (const_string "neon_arith_basic") ++ (eq_attr "type" "neon_abs, neon_abs_q, neon_add_halve_narrow_q,\ ++ neon_add_halve, neon_add_halve_q,\ ++ neon_sub_halve, neon_sub_halve_q, neon_qabs,\ ++ neon_qabs_q, neon_qadd, neon_qadd_q, neon_qneg,\ ++ neon_qneg_q, neon_qsub, neon_qsub_q,\ ++ neon_sub_halve_narrow_q,\ ++ neon_compare, neon_compare_q,\ ++ neon_compare_zero, neon_compare_zero_q,\ ++ neon_minmax, neon_minmax_q, neon_reduc_minmax,\ ++ neon_reduc_minmax_q") ++ (const_string "neon_arith_complex") ++ ++ (eq_attr "type" "neon_mul_b, neon_mul_h, neon_mul_s,\ ++ neon_mul_h_scalar, neon_mul_s_scalar,\ ++ neon_sat_mul_b, neon_sat_mul_h,\ ++ neon_sat_mul_s, neon_sat_mul_h_scalar,\ ++ neon_sat_mul_s_scalar,\ ++ neon_mul_b_long, neon_mul_h_long,\ ++ neon_mul_s_long,\ ++ neon_mul_h_scalar_long, neon_mul_s_scalar_long,\ ++ neon_sat_mul_b_long, neon_sat_mul_h_long,\ ++ neon_sat_mul_s_long, neon_sat_mul_h_scalar_long,\ ++ neon_sat_mul_s_scalar_long") ++ (const_string "neon_multiply") ++ (eq_attr "type" "neon_mul_b_q, neon_mul_h_q, neon_mul_s_q,\ ++ neon_mul_h_scalar_q, neon_mul_s_scalar_q,\ ++ neon_sat_mul_b_q, neon_sat_mul_h_q,\ ++ neon_sat_mul_s_q, neon_sat_mul_h_scalar_q,\ ++ neon_sat_mul_s_scalar_q") ++ (const_string "neon_multiply_q") ++ (eq_attr "type" "neon_mla_b, neon_mla_h, neon_mla_s,\ ++ neon_mla_h_scalar, neon_mla_s_scalar,\ ++ neon_mla_b_long, neon_mla_h_long,\ ++ neon_mla_s_long,\ ++ neon_mla_h_scalar_long, neon_mla_s_scalar_long") ++ (const_string "neon_mla") ++ (eq_attr "type" "neon_mla_b_q, neon_mla_h_q, neon_mla_s_q,\ ++ neon_mla_h_scalar_q, neon_mla_s_scalar_q") ++ (const_string "neon_mla_q") ++ (eq_attr "type" "neon_sat_mla_b_long, neon_sat_mla_h_long,\ ++ neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\ ++ neon_sat_mla_s_scalar_long") ++ (const_string "neon_sat_mla_long") ++ ++ (eq_attr "type" "neon_shift_acc, neon_shift_acc_q") ++ (const_string "neon_shift_acc") ++ (eq_attr "type" "neon_shift_imm, neon_shift_imm_q,\ ++ neon_shift_imm_narrow_q, neon_shift_imm_long") ++ (const_string "neon_shift_imm_basic") ++ (eq_attr "type" "neon_sat_shift_imm, neon_sat_shift_imm_q,\ ++ neon_sat_shift_imm_narrow_q") ++ (const_string "neon_shift_imm_complex") ++ (eq_attr "type" "neon_shift_reg") ++ (const_string "neon_shift_reg_basic") ++ (eq_attr "type" "neon_shift_reg_q") ++ (const_string "neon_shift_reg_basic_q") ++ (eq_attr "type" "neon_sat_shift_reg") ++ (const_string "neon_shift_reg_complex") ++ (eq_attr "type" "neon_sat_shift_reg_q") ++ (const_string "neon_shift_reg_complex_q") ++ ++ (eq_attr "type" "neon_fp_neg_s, neon_fp_neg_s_q,\ ++ neon_fp_abs_s, neon_fp_abs_s_q") ++ (const_string "neon_fp_negabs") ++ (eq_attr "type" "neon_fp_addsub_s, neon_fp_abd_s,\ ++ neon_fp_reduc_add_s, neon_fp_compare_s,\ ++ neon_fp_minmax_s, neon_fp_minmax_s_q,\ ++ neon_fp_reduc_minmax_s, neon_fp_reduc_minmax_s_q") ++ (const_string "neon_fp_arith") ++ (eq_attr "type" "neon_fp_addsub_s_q, neon_fp_abd_s_q,\ ++ neon_fp_reduc_add_s_q, neon_fp_compare_s_q") ++ (const_string "neon_fp_arith_q") ++ (eq_attr "type" "neon_fp_to_int_s, neon_int_to_fp_s") ++ (const_string "neon_fp_cvt_int") ++ (eq_attr "type" "neon_fp_to_int_s_q, neon_int_to_fp_s_q") ++ (const_string "neon_fp_cvt_int_q") ++ (eq_attr "type" "neon_fp_cvt_narrow_s_q, neon_fp_cvt_widen_h") ++ (const_string "neon_fp_cvt16") ++ (eq_attr "type" "neon_fp_mul_s, neon_fp_mul_s_scalar") ++ (const_string "neon_fp_mul") ++ (eq_attr "type" "neon_fp_mul_s_q, neon_fp_mul_s_scalar_q") ++ (const_string "neon_fp_mul_q") ++ (eq_attr "type" "neon_fp_mla_s, neon_fp_mla_s_scalar") ++ (const_string "neon_fp_mla") ++ (eq_attr "type" "neon_fp_mla_s_q, neon_fp_mla_s_scalar_q") ++ (const_string "neon_fp_mla_q") ++ (eq_attr "type" "neon_fp_recpe_s, neon_fp_rsqrte_s") ++ (const_string "neon_fp_recpe_rsqrte") ++ (eq_attr "type" "neon_fp_recpe_s_q, neon_fp_rsqrte_s_q") ++ (const_string "neon_fp_recpe_rsqrte_q") ++ ++ (eq_attr "type" "neon_bsl, neon_cls, neon_cnt,\ ++ neon_rev, neon_permute,\ ++ neon_tbl1, neon_tbl2, neon_zip,\ ++ neon_dup, neon_dup_q, neon_ext, neon_ext_q,\ ++ neon_move, neon_move_q, neon_move_narrow_q") ++ (const_string "neon_bitops") ++ (eq_attr "type" "neon_bsl_q, neon_cls_q, neon_cnt_q,\ ++ neon_rev_q, neon_permute_q") ++ (const_string "neon_bitops_q") ++ (eq_attr "type" "neon_from_gp") ++ (const_string "neon_from_gp") ++ (eq_attr "type" "neon_from_gp_q") ++ (const_string "neon_from_gp_q") ++ (eq_attr "type" "neon_tbl3, neon_tbl4") ++ (const_string "neon_tbl3_tbl4") ++ (eq_attr "type" "neon_zip_q") ++ (const_string "neon_zip_q") ++ (eq_attr "type" "neon_to_gp, neon_to_gp_q") ++ (const_string "neon_to_gp") ++ ++ (eq_attr "type" "f_loads, f_loadd,\ ++ neon_load1_1reg, neon_load1_1reg_q,\ ++ neon_load1_2reg, neon_load1_2reg_q") ++ (const_string "neon_load_a") ++ (eq_attr "type" "neon_load1_3reg, neon_load1_3reg_q,\ ++ neon_load1_4reg, neon_load1_4reg_q") ++ (const_string "neon_load_b") ++ (eq_attr "type" "neon_load1_one_lane, neon_load1_one_lane_q,\ ++ neon_load1_all_lanes, neon_load1_all_lanes_q,\ ++ neon_load2_2reg, neon_load2_2reg_q,\ ++ neon_load2_all_lanes, neon_load2_all_lanes_q") ++ (const_string "neon_load_c") ++ (eq_attr "type" "neon_load2_4reg, neon_load2_4reg_q,\ ++ neon_load3_3reg, neon_load3_3reg_q,\ ++ neon_load3_one_lane, neon_load3_one_lane_q,\ ++ neon_load4_4reg, neon_load4_4reg_q") ++ (const_string "neon_load_d") ++ (eq_attr "type" "neon_load2_one_lane, neon_load2_one_lane_q,\ ++ neon_load3_all_lanes, neon_load3_all_lanes_q,\ ++ neon_load4_all_lanes, neon_load4_all_lanes_q") ++ (const_string "neon_load_e") ++ (eq_attr "type" "neon_load4_one_lane, neon_load4_one_lane_q") ++ (const_string "neon_load_f") ++ ++ (eq_attr "type" "f_stores, f_stored,\ ++ neon_store1_1reg, neon_store1_1reg_q") ++ (const_string "neon_store_a") ++ (eq_attr "type" "neon_store1_2reg, neon_store1_2reg_q") ++ (const_string "neon_store_b") ++ (eq_attr "type" "neon_store1_3reg, neon_store1_3reg_q") ++ (const_string "neon_store_c") ++ (eq_attr "type" "neon_store1_4reg, neon_store1_4reg_q") ++ (const_string "neon_store_d") ++ (eq_attr "type" "neon_store1_one_lane, neon_store1_one_lane_q,\ ++ neon_store2_one_lane, neon_store2_one_lane_q") ++ (const_string "neon_store_e") ++ (eq_attr "type" "neon_store2_2reg, neon_store2_2reg_q,\ ++ neon_store3_one_lane, neon_store3_one_lane_q,\ ++ neon_store4_one_lane, neon_store4_one_lane_q") ++ (const_string "neon_store_f") ++ (eq_attr "type" "neon_store2_4reg, neon_store2_4reg_q,\ ++ neon_store4_4reg, neon_store4_4reg_q") ++ (const_string "neon_store_g") ++ (eq_attr "type" "neon_store3_3reg, neon_store3_3reg_q") ++ (const_string "neon_store_h")] ++ (const_string "unknown"))) ++ + (define_automaton "cortex_a15_neon") + + ;; Dispatch unit. +@@ -91,393 +284,317 @@ + (define_reservation "ca15_cx_perm" "ca15_cx_ij|ca15_cx_ik") + (define_reservation "ca15_cx_perm_2" "ca15_cx_ij+ca15_cx_ik") + +-(define_insn_reservation "cortex_a15_neon_int_1" 5 +- (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_int_1")) +- "ca15_issue1,ca15_cx_ialu") ++;; Integer Arithmetic Instructions. + +-(define_insn_reservation "cortex_a15_neon_int_2" 5 ++(define_insn_reservation "cortex_a15_neon_abd" 5 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_int_2")) ++ (eq_attr "cortex_a15_neon_type" "neon_abd")) + "ca15_issue1,ca15_cx_ialu") + +-(define_insn_reservation "cortex_a15_neon_int_3" 5 ++(define_insn_reservation "cortex_a15_neon_abd_q" 5 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_int_3")) +- "ca15_issue1,ca15_cx_ialu") ++ (eq_attr "cortex_a15_neon_type" "neon_abd_q")) ++ "ca15_issue2,ca15_cx_ialu*2") + +-(define_insn_reservation "cortex_a15_neon_int_4" 5 ++(define_insn_reservation "cortex_a15_neon_aba" 7 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_int_4")) +- "ca15_issue1,ca15_cx_ialu") ++ (eq_attr "cortex_a15_neon_type" "neon_arith_acc")) ++ "ca15_issue1,ca15_cx_ialu_with_acc") + +-(define_insn_reservation "cortex_a15_neon_int_5" 5 ++(define_insn_reservation "cortex_a15_neon_aba_q" 8 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_int_5")) +- "ca15_issue1,ca15_cx_ialu") ++ (eq_attr "cortex_a15_neon_type" "neon_arith_acc_q")) ++ "ca15_issue2,ca15_cx_ialu_with_acc*2") + +-(define_insn_reservation "cortex_a15_neon_vqneg_vqabs" 5 ++(define_insn_reservation "cortex_a15_neon_arith_basic" 4 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_vqneg_vqabs")) ++ (eq_attr "cortex_a15_neon_type" "neon_arith_basic")) + "ca15_issue1,ca15_cx_ialu") + +-(define_insn_reservation "cortex_a15_neon_vmov" 5 ++(define_insn_reservation "cortex_a15_neon_arith_complex" 5 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_vmov")) ++ (eq_attr "cortex_a15_neon_type" "neon_arith_complex")) + "ca15_issue1,ca15_cx_ialu") + +-(define_insn_reservation "cortex_a15_neon_vaba" 7 +- (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_vaba")) +- "ca15_issue1,ca15_cx_ialu_with_acc") ++;; Integer Multiply Instructions. + +-(define_insn_reservation "cortex_a15_neon_vaba_qqq" 8 ++(define_insn_reservation "cortex_a15_neon_multiply" 6 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_vaba_qqq")) +- "ca15_issue2,ca15_cx_ialu_with_acc*2") +- +-(define_insn_reservation +- "cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" 6 +- (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long")) ++ (eq_attr "cortex_a15_neon_type" "neon_multiply")) + "ca15_issue1,ca15_cx_imac") + +-(define_insn_reservation "cortex_a15_neon_mul_qqq_8_16_32_ddd_32" 7 ++(define_insn_reservation "cortex_a15_neon_multiply_q" 7 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" "neon_mul_qqq_8_16_32_ddd_32")) +- "ca15_issue1,ca15_cx_imac*2") ++ (eq_attr "cortex_a15_neon_type" "neon_multiply_q")) ++ "ca15_issue2,ca15_cx_imac*2") + +-(define_insn_reservation +- "cortex_a15_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" 7 ++(define_insn_reservation "cortex_a15_neon_mla" 6 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")) +- "ca15_issue1,ca15_cx_imac*2") +- +-(define_insn_reservation +- "cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" 6 +- (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long")) ++ (eq_attr "cortex_a15_neon_type" "neon_mla")) + "ca15_issue1,ca15_cx_imac") + +-(define_insn_reservation +- "cortex_a15_neon_mla_qqq_8_16" 7 ++(define_insn_reservation "cortex_a15_neon_mla_q" 7 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mla_qqq_8_16")) ++ (eq_attr "cortex_a15_neon_type" "neon_mla_q")) + "ca15_issue1,ca15_cx_imac*2") + +-(define_insn_reservation +- "cortex_a15_neon_mla_ddd_32_qqd_16_ddd_32_scalar_\ +- qdd_64_32_long_scalar_qdd_64_32_long" 7 ++(define_insn_reservation "cortex_a15_neon_sat_mla_long" 6 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")) ++ (eq_attr "cortex_a15_neon_type" "neon_sat_mla_long")) + "ca15_issue1,ca15_cx_imac") + +-(define_insn_reservation +- "cortex_a15_neon_mla_qqq_32_qqd_32_scalar" 7 +- (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mla_qqq_32_qqd_32_scalar")) +- "ca15_issue1,ca15_cx_imac*2") ++;; Integer Shift Instructions. + + (define_insn_reservation +- "cortex_a15_neon_mul_ddd_16_scalar_32_16_long_scalar" 6 ++ "cortex_a15_neon_shift_acc" 7 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mul_ddd_16_scalar_32_16_long_scalar")) +- "ca15_issue1,ca15_cx_imac") ++ (eq_attr "cortex_a15_neon_type" "neon_shift_acc")) ++ "ca15_issue1,ca15_cx_ishf_with_acc") + + (define_insn_reservation +- "cortex_a15_neon_mul_qqd_32_scalar" 7 ++ "cortex_a15_neon_shift_imm_basic" 4 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mul_qqd_32_scalar")) +- "ca15_issue1,ca15_cx_imac*2") ++ (eq_attr "cortex_a15_neon_type" "neon_shift_imm_basic")) ++ "ca15_issue1,ca15_cx_ik+ca15_cx_ishf") + + (define_insn_reservation +- "cortex_a15_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" 6 ++ "cortex_a15_neon_shift_imm_complex" 5 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar")) +- "ca15_issue1,ca15_cx_imac") +- +-(define_insn_reservation +- "cortex_a15_neon_shift_1" 5 +- (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_shift_1")) ++ (eq_attr "cortex_a15_neon_type" "neon_shift_imm_complex")) + "ca15_issue1,ca15_cx_ik+ca15_cx_ishf") + + (define_insn_reservation +- "cortex_a15_neon_shift_2" 5 ++ "cortex_a15_neon_shift_reg_basic" 4 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_shift_2")) ++ (eq_attr "cortex_a15_neon_type" "neon_shift_reg_basic")) + "ca15_issue1,ca15_cx_ik+ca15_cx_ishf") + + (define_insn_reservation +- "cortex_a15_neon_shift_3" 6 ++ "cortex_a15_neon_shift_reg_basic_q" 5 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_shift_3")) +- "ca15_issue2,(ca15_cx_ik+ca15_cx_ishf)*2") ++ (eq_attr "cortex_a15_neon_type" "neon_shift_reg_basic_q")) ++ "ca15_issue2,(ca15_cx_ik+ca15_cx_ishf*2)") + + (define_insn_reservation +- "cortex_a15_neon_vshl_ddd" 5 ++ "cortex_a15_neon_shift_reg_complex" 5 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vshl_ddd")) +- "ca15_issue1,ca15_cx_ik+ca15_cx_ishf") ++ (eq_attr "cortex_a15_neon_type" "neon_shift_reg_complex")) ++ "ca15_issue2,ca15_cx_ik+ca15_cx_ishf") + + (define_insn_reservation +- "cortex_a15_neon_vqshl_vrshl_vqrshl_qqq" 6 ++ "cortex_a15_neon_shift_reg_complex_q" 6 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vqshl_vrshl_vqrshl_qqq")) ++ (eq_attr "cortex_a15_neon_type" "neon_shift_reg_complex_q")) + "ca15_issue2,(ca15_cx_ik+ca15_cx_ishf)*2") + ++;; Floating Point Instructions. ++ + (define_insn_reservation +- "cortex_a15_neon_vsra_vrsra" 7 ++ "cortex_a15_neon_fp_negabs" 4 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vsra_vrsra")) +- "ca15_issue1,ca15_cx_ishf_with_acc") ++ (eq_attr "cortex_a15_neon_type" "neon_fp_negabs")) ++ "ca15_issue1,ca15_cx_falu") + + (define_insn_reservation +- "cortex_a15_neon_fp_vadd_ddd_vabs_dd" 6 ++ "cortex_a15_neon_fp_arith" 6 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_fp_vadd_ddd_vabs_dd")) ++ (eq_attr "cortex_a15_neon_type" "neon_fp_arith")) + "ca15_issue1,ca15_cx_falu") + + (define_insn_reservation +- "cortex_a15_neon_fp_vadd_qqq_vabs_qq" 7 ++ "cortex_a15_neon_fp_arith_q" 6 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_fp_vadd_qqq_vabs_qq")) ++ (eq_attr "cortex_a15_neon_type" "neon_fp_arith_q")) + "ca15_issue2,ca15_cx_falu_2") + + (define_insn_reservation +- "cortex_a15_neon_fp_vmul_ddd" 5 ++ "cortex_a15_neon_fp_cvt_int" 6 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_fp_vmul_ddd")) +- "ca15_issue1,ca15_cx_fmul") ++ (eq_attr "cortex_a15_neon_type" "neon_fp_cvt_int")) ++ "ca15_issue1,ca15_cx_falu+ca15_cx_ishf") + + (define_insn_reservation +- "cortex_a15_neon_fp_vmul_qqd" 6 ++ "cortex_a15_neon_fp_cvt_int_q" 6 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_fp_vmul_qqd")) +- "ca15_issue2,ca15_cx_fmul_2") ++ (eq_attr "cortex_a15_neon_type" "neon_fp_cvt_int_q")) ++ "ca15_issue2,(ca15_cx_falu+ca15_cx_ishf)*2") + + (define_insn_reservation +- "cortex_a15_neon_fp_vmla_ddd" 9 ++ "cortex_a15_neon_fp_cvt16" 10 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_fp_vmla_ddd")) +- "ca15_issue1,ca15_cx_fmac") ++ (eq_attr "cortex_a15_neon_type" "neon_fp_cvt16")) ++ "ca15_issue3,(ca15_cx_falu+ca15_cx_ishf)*2+ca15_cx_falu") + + (define_insn_reservation +- "cortex_a15_neon_fp_vmla_qqq" 11 ++ "cortex_a15_neon_fp_mul" 5 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_fp_vmla_qqq")) +- "ca15_issue2,ca15_cx_fmac_2") ++ (eq_attr "cortex_a15_neon_type" "neon_fp_mul")) ++ "ca15_issue1,ca15_cx_fmul") + + (define_insn_reservation +- "cortex_a15_neon_fp_vmla_ddd_scalar" 9 ++ "cortex_a15_neon_fp_mul_q" 5 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_fp_vmla_ddd_scalar")) +- "ca15_issue1,ca15_cx_fmac") ++ (eq_attr "cortex_a15_neon_type" "neon_fp_mul_q")) ++ "ca15_issue2,ca15_cx_fmul_2") + + (define_insn_reservation +- "cortex_a15_neon_fp_vmla_qqq_scalar" 11 ++ "cortex_a15_neon_fp_mla" 9 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_fp_vmla_qqq_scalar")) +- "ca15_issue2,ca15_cx_fmac_2") ++ (eq_attr "cortex_a15_neon_type" "neon_fp_mla")) ++ "ca15_issue1,ca15_cx_fmul") + + (define_insn_reservation +- "cortex_a15_neon_fp_vrecps_vrsqrts_ddd" 9 ++ "cortex_a15_neon_fp_mla_q" 9 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_fp_vrecps_vrsqrts_ddd")) +- "ca15_issue1,ca15_cx_fmac") ++ (eq_attr "cortex_a15_neon_type" "neon_fp_mla_q")) ++ "ca15_issue2,ca15_cx_fmul_2") + + (define_insn_reservation +- "cortex_a15_neon_fp_vrecps_vrsqrts_qqq" 11 ++ "cortex_a15_neon_fp_recps_rsqrte" 9 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_fp_vrecps_vrsqrts_qqq")) +- "ca15_issue2,ca15_cx_fmac_2") ++ (eq_attr "cortex_a15_neon_type" "neon_fp_recpe_rsqrte")) ++ "ca15_issue1,ca15_cx_fmac") + + (define_insn_reservation +- "cortex_a15_neon_bp_simple" 4 ++ "cortex_a15_neon_fp_recps_rsqrte_q" 9 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_bp_simple")) +- "ca15_issue3,ca15_ls+ca15_cx_perm_2,ca15_cx_perm") ++ (eq_attr "cortex_a15_neon_type" "neon_fp_recpe_rsqrte_q")) ++ "ca15_issue2,ca15_cx_fmac_2") + ++;; Miscelaaneous Instructions. ++ + (define_insn_reservation +- "cortex_a15_neon_bp_2cycle" 4 ++ "cortex_a15_neon_bitops" 4 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_bp_2cycle")) ++ (eq_attr "cortex_a15_neon_type" "neon_bitops")) + "ca15_issue1,ca15_cx_perm") + + (define_insn_reservation +- "cortex_a15_neon_bp_3cycle" 7 ++ "cortex_a15_neon_bitops_q" 4 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_bp_3cycle")) +- "ca15_issue3,ca15_cx_ialu+ca15_cx_perm_2,ca15_cx_perm") ++ (eq_attr "cortex_a15_neon_type" "neon_bitops_q")) ++ "ca15_issue2,ca15_cx_perm_2") + + (define_insn_reservation +- "cortex_a15_neon_vld1_1_2_regs" 7 ++ "cortex_a15_neon_from_gp" 9 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vld1_1_2_regs")) +- "ca15_issue2,ca15_ls,ca15_ldr") ++ (eq_attr "cortex_a15_neon_type" "neon_from_gp")) ++ "ca15_issue2,ca15_ls1+ca15_ls2+ca15_cx_perm") + + (define_insn_reservation +- "cortex_a15_neon_vld1_3_4_regs" 8 ++ "cortex_a15_neon_from_gp_q" 9 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vld1_3_4_regs")) +- "ca15_issue3,ca15_ls1+ca15_ls2,ca15_ldr,ca15_ldr") ++ (eq_attr "cortex_a15_neon_type" "neon_from_gp_q")) ++ "ca15_issue2,ca15_ls1+ca15_ls2+ca15_cx_perm_2") + + (define_insn_reservation +- "cortex_a15_neon_vld2_2_regs_vld1_vld2_all_lanes" 9 ++ "cortex_a15_neon_tbl3_tbl4" 7 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vld2_2_regs_vld1_vld2_all_lanes")) +- "ca15_issue3,ca15_ls,ca15_ldr") ++ (eq_attr "cortex_a15_neon_type" "neon_tbl3_tbl4")) ++ "ca15_issue2,ca15_cx_perm_2") + + (define_insn_reservation +- "cortex_a15_neon_vld2_4_regs" 12 ++ "cortex_a15_neon_zip_q" 7 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vld2_4_regs")) +- "ca15_issue3,ca15_issue3+ca15_ls1+ca15_ls2,ca15_ldr*2") ++ (eq_attr "cortex_a15_neon_type" "neon_zip_q")) ++ "ca15_issue3,ca15_cx_perm*3") + + (define_insn_reservation +- "cortex_a15_neon_vld3_vld4" 12 ++ "cortex_a15_neon_to_gp" 7 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vld3_vld4")) +- "ca15_issue3,ca15_issue3+ca15_ls1+ca15_ls2,ca15_ldr*2") ++ (eq_attr "cortex_a15_neon_type" "neon_to_gp")) ++ "ca15_issue2,ca15_ls1+ca15_ls2") + +-(define_insn_reservation +- "cortex_a15_neon_vst1_1_2_regs_vst2_2_regs" 0 +- (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vst1_1_2_regs_vst2_2_regs")) +- "ca15_issue3,ca15_issue3+ca15_cx_perm+ca15_ls1+ca15_ls2,ca15_str*2") ++;; Load Instructions. + + (define_insn_reservation +- "cortex_a15_neon_vst1_3_4_regs" 0 ++ "cortex_a15_neon_load_a" 6 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vst1_3_4_regs")) +- "ca15_issue3,ca15_issue3+ca15_ls1+ca15_ls2,ca15_str*3") ++ (eq_attr "cortex_a15_neon_type" "neon_load_a")) ++ "ca15_issue1,ca15_ls,ca15_ldr") + + (define_insn_reservation +- "cortex_a15_neon_vst2_4_regs_vst3_vst4" 0 ++ "cortex_a15_neon_load_b" 7 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vst2_4_regs_vst3_vst4")) +- "ca15_issue3,ca15_issue3+ca15_cx_perm_2+ca15_ls1+ca15_ls2,\ +- ca15_issue3+ca15_str,ca15_str*3") ++ (eq_attr "cortex_a15_neon_type" "neon_load_b")) ++ "ca15_issue2,ca15_ls1+ca15_ls2,ca15_ldr,ca15_ldr") + + (define_insn_reservation +- "cortex_a15_neon_vst3_vst4" 0 ++ "cortex_a15_neon_load_c" 9 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vst3_vst4")) +- "ca15_issue3,ca15_issue3+ca15_cx_perm_2+ca15_ls1+ca15_ls2,ca15_str*4") ++ (eq_attr "cortex_a15_neon_type" "neon_load_c")) ++ "ca15_issue2,ca15_ls1+ca15_ls2,ca15_ldr,ca15_ldr") + + (define_insn_reservation +- "cortex_a15_neon_vld1_vld2_lane" 9 ++ "cortex_a15_neon_load_d" 11 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vld1_vld2_lane")) +- "ca15_issue3,ca15_ls,ca15_ldr") ++ (eq_attr "cortex_a15_neon_type" "neon_load_d")) ++ "ca15_issue1,ca15_issue3+ca15_ls1+ca15_ls2,ca15_ldr*2") + + (define_insn_reservation +- "cortex_a15_neon_vld3_vld4_lane" 10 ++ "cortex_a15_neon_load_e" 9 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vld3_vld4_lane")) +- "ca15_issue3,ca15_issue3+ca15_ls,ca15_issue3+ca15_ldr") ++ (eq_attr "cortex_a15_neon_type" "neon_load_e")) ++ "ca15_issue3+ca15_ls1+ca15_ls2,ca15_ldr*2") + + (define_insn_reservation +- "cortex_a15_neon_vst1_vst2_lane" 0 ++ "cortex_a15_neon_load_f" 11 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vst1_vst2_lane")) +- "ca15_issue3,ca15_cx_perm+ca15_ls,ca15_str") ++ (eq_attr "cortex_a15_neon_type" "neon_load_f")) ++ "ca15_issue3,ca15_issue3+ca15_ls1+ca15_ls2,ca15_ldr*2") + ++;; Store Instructions. ++ + (define_insn_reservation +- "cortex_a15_neon_vst3_vst4_lane" 0 ++ "cortex_a15_neon_store_a" 0 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vst3_vst4_lane")) +- "ca15_issue3,ca15_issue3+ca15_cx_perm+ca15_ls1+ca15_ls2,ca15_str*2") ++ (eq_attr "cortex_a15_neon_type" "neon_store_a")) ++ "ca15_issue1,ca15_ls1+ca15_ls2,ca15_str") + + (define_insn_reservation +- "cortex_a15_neon_vld3_vld4_all_lanes" 11 ++ "cortex_a15_neon_store_b" 0 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_vld3_vld4_all_lanes")) +- "ca15_issue3,ca15_issue3+ca15_ls,ca15_ldr") ++ (eq_attr "cortex_a15_neon_type" "neon_store_b")) ++ "ca15_issue2,ca15_ls1+ca15_ls2,ca15_str*2") + + (define_insn_reservation +- "cortex_a15_neon_ldm_2" 20 ++ "cortex_a15_neon_store_c" 0 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_ldm_2")) +- "ca15_issue3*6") ++ (eq_attr "cortex_a15_neon_type" "neon_store_c")) ++ "ca15_issue3,ca15_ls1+ca15_ls2,ca15_str*3") + + (define_insn_reservation +- "cortex_a15_neon_stm_2" 0 ++ "cortex_a15_neon_store_d" 0 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_stm_2")) +- "ca15_issue3*6") ++ (eq_attr "cortex_a15_neon_type" "neon_store_d")) ++ "ca15_issue3,ca15_issue1,ca15_ls1+ca15_ls2,ca15_str*4") + + (define_insn_reservation +- "cortex_a15_neon_mcr" 6 ++ "cortex_a15_neon_store_e" 0 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mcr")) +- "ca15_issue2,ca15_ls,ca15_cx_perm") ++ (eq_attr "cortex_a15_neon_type" "neon_store_e")) ++ "ca15_issue2,ca15_ls1+ca15_ls2,ca15_str+ca15_cx_perm") + + (define_insn_reservation +- "cortex_a15_neon_mcr_2_mcrr" 6 ++ "cortex_a15_neon_store_f" 0 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mcr_2_mcrr")) +- "ca15_issue2,ca15_ls1+ca15_ls2") ++ (eq_attr "cortex_a15_neon_type" "neon_store_f")) ++ "ca15_issue3,ca15_ls1+ca15_ls2,ca15_str*2+ca15_cx_perm") + + (define_insn_reservation +- "cortex_a15_neon_mrc" 5 ++ "cortex_a15_neon_store_g" 0 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mrc")) +- "ca15_issue1,ca15_ls") ++ (eq_attr "cortex_a15_neon_type" "neon_store_g")) ++ "ca15_issue3,ca15_issue3+ca15_cx_perm+ca15_ls1+ca15_ls2,ca15_str*2") + + (define_insn_reservation +- "cortex_a15_neon_mrrc" 6 ++ "cortex_a15_neon_store_h" 0 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "neon_type" +- "neon_mrrc")) +- "ca15_issue2,ca15_ls1+ca15_ls2") ++ (eq_attr "cortex_a15_neon_type" "neon_store_h")) ++ "ca15_issue3,ca15_issue2+ca15_cx_perm+ca15_ls1+ca15_ls2,ca15_str*2") + ++;; VFP Operations. ++ + (define_insn_reservation "cortex_a15_vfp_const" 4 + (and (eq_attr "tune" "cortexa15") + (eq_attr "type" "fconsts,fconstd")) +@@ -515,7 +632,7 @@ + + (define_insn_reservation "cortex_a15_vfp_cvt" 6 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "type" "f_cvt")) ++ (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f")) + "ca15_issue1,ca15_cx_vfp") + + (define_insn_reservation "cortex_a15_vfp_cmpd" 8 +@@ -535,9 +652,14 @@ + + (define_insn_reservation "cortex_a15_vfp_cpys" 4 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "type" "fcpys")) ++ (eq_attr "type" "fmov")) + "ca15_issue1,ca15_cx_perm") + ++(define_insn_reservation "cortex_a15_vfp_to_from_gp" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "f_mcr, f_mcrr, f_mrc, f_mrrc")) ++ "ca15_issue1,ca15_ls1+ca15_ls2") ++ + (define_insn_reservation "cortex_a15_vfp_ariths" 7 + (and (eq_attr "tune" "cortexa15") + (eq_attr "type" "ffariths")) +@@ -545,671 +667,11 @@ + + (define_insn_reservation "cortex_a15_vfp_divs" 10 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "type" "fdivs")) ++ (eq_attr "type" "fdivs, fsqrts")) + "ca15_issue1,ca15_cx_ik") + + (define_insn_reservation "cortex_a15_vfp_divd" 18 + (and (eq_attr "tune" "cortexa15") +- (eq_attr "type" "fdivd")) ++ (eq_attr "type" "fdivd, fsqrtd")) + "ca15_issue1,ca15_cx_ik") + +-;; Define bypasses. +-(define_bypass 5 "cortex_a15_neon_mcr_2_mcrr" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 5 "cortex_a15_neon_mcr" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 10 "cortex_a15_neon_vld3_vld4_all_lanes" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 9 "cortex_a15_neon_vld3_vld4_lane" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 8 "cortex_a15_neon_vld1_vld2_lane" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 11 "cortex_a15_neon_vld3_vld4" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 11 "cortex_a15_neon_vld2_4_regs" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 8 "cortex_a15_neon_vld2_2_regs_vld1_vld2_all_lanes" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 7 "cortex_a15_neon_vld1_3_4_regs" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 6 "cortex_a15_neon_vld1_1_2_regs" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 6 "cortex_a15_neon_bp_3cycle" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 3 "cortex_a15_neon_bp_2cycle" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 3 "cortex_a15_neon_bp_simple" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 10 "cortex_a15_neon_fp_vrecps_vrsqrts_qqq" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 8 "cortex_a15_neon_fp_vrecps_vrsqrts_ddd" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 10 "cortex_a15_neon_fp_vmla_qqq_scalar" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 8 "cortex_a15_neon_fp_vmla_ddd_scalar" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 10 "cortex_a15_neon_fp_vmla_qqq" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 8 "cortex_a15_neon_fp_vmla_ddd" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 5 "cortex_a15_neon_fp_vmul_qqd" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_fp_vmul_ddd" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 6 "cortex_a15_neon_fp_vadd_qqq_vabs_qq" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 5 "cortex_a15_neon_fp_vadd_ddd_vabs_dd" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 6 "cortex_a15_neon_vsra_vrsra" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 5 "cortex_a15_neon_vqshl_vrshl_vqrshl_qqq" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_vshl_ddd" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 5 "cortex_a15_neon_shift_3" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_shift_2" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_shift_1" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 5 "cortex_a15_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 6 "cortex_a15_neon_mul_qqd_32_scalar" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 5 "cortex_a15_neon_mul_ddd_16_scalar_32_16_long_scalar" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 6 "cortex_a15_neon_mla_qqq_32_qqd_32_scalar" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 6 "cortex_a15_neon_mla_qqq_8_16" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 5 "cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 6 +- "cortex_a15_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 6 "cortex_a15_neon_mul_qqq_8_16_32_ddd_32" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 5 "cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 7 "cortex_a15_neon_vaba_qqq" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 6 "cortex_a15_neon_vaba" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_vmov" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_vqneg_vqabs" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_int_5" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_int_4" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_int_3" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_int_2" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +-(define_bypass 4 "cortex_a15_neon_int_1" +- "cortex_a15_neon_int_1,\ +- cortex_a15_neon_int_4,\ +- cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ +- cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- cortex_a15_neon_mla_qqq_8_16,\ +- cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ +- cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ +- cortex_a15_neon_fp_vmla_ddd,\ +- cortex_a15_neon_fp_vmla_qqq,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ +- cortex_a15_neon_fp_vrecps_vrsqrts_qqq") +- +--- a/src/gcc/config/arm/arm_neon.h ++++ b/src/gcc/config/arm/arm_neon.h +@@ -42,9 +42,13 @@ + typedef __builtin_neon_hi int16x4_t __attribute__ ((__vector_size__ (8))); + typedef __builtin_neon_si int32x2_t __attribute__ ((__vector_size__ (8))); + typedef __builtin_neon_di int64x1_t; ++typedef __builtin_neon_hf float16x4_t __attribute__ ((__vector_size__ (8))); + typedef __builtin_neon_sf float32x2_t __attribute__ ((__vector_size__ (8))); + typedef __builtin_neon_poly8 poly8x8_t __attribute__ ((__vector_size__ (8))); + typedef __builtin_neon_poly16 poly16x4_t __attribute__ ((__vector_size__ (8))); ++#ifdef __ARM_FEATURE_CRYPTO ++typedef __builtin_neon_poly64 poly64x1_t; ++#endif + typedef __builtin_neon_uqi uint8x8_t __attribute__ ((__vector_size__ (8))); + typedef __builtin_neon_uhi uint16x4_t __attribute__ ((__vector_size__ (8))); + typedef __builtin_neon_usi uint32x2_t __attribute__ ((__vector_size__ (8))); +@@ -56,6 +60,9 @@ + typedef __builtin_neon_sf float32x4_t __attribute__ ((__vector_size__ (16))); + typedef __builtin_neon_poly8 poly8x16_t __attribute__ ((__vector_size__ (16))); + typedef __builtin_neon_poly16 poly16x8_t __attribute__ ((__vector_size__ (16))); ++#ifdef __ARM_FEATURE_CRYPTO ++typedef __builtin_neon_poly64 poly64x2_t __attribute__ ((__vector_size__ (16))); ++#endif + typedef __builtin_neon_uqi uint8x16_t __attribute__ ((__vector_size__ (16))); + typedef __builtin_neon_uhi uint16x8_t __attribute__ ((__vector_size__ (16))); + typedef __builtin_neon_usi uint32x4_t __attribute__ ((__vector_size__ (16))); +@@ -64,6 +71,10 @@ + typedef float float32_t; + typedef __builtin_neon_poly8 poly8_t; + typedef __builtin_neon_poly16 poly16_t; ++#ifdef __ARM_FEATURE_CRYPTO ++typedef __builtin_neon_poly64 poly64_t; ++typedef __builtin_neon_poly128 poly128_t; ++#endif + + typedef struct int8x8x2_t + { +@@ -175,6 +186,22 @@ + poly16x8_t val[2]; + } poly16x8x2_t; + ++#ifdef __ARM_FEATURE_CRYPTO ++typedef struct poly64x1x2_t ++{ ++ poly64x1_t val[2]; ++} poly64x1x2_t; ++#endif ++ ++ ++#ifdef __ARM_FEATURE_CRYPTO ++typedef struct poly64x2x2_t ++{ ++ poly64x2_t val[2]; ++} poly64x2x2_t; ++#endif ++ ++ + typedef struct int8x8x3_t + { + int8x8_t val[3]; +@@ -285,6 +312,22 @@ + poly16x8_t val[3]; + } poly16x8x3_t; + ++#ifdef __ARM_FEATURE_CRYPTO ++typedef struct poly64x1x3_t ++{ ++ poly64x1_t val[3]; ++} poly64x1x3_t; ++#endif ++ ++ ++#ifdef __ARM_FEATURE_CRYPTO ++typedef struct poly64x2x3_t ++{ ++ poly64x2_t val[3]; ++} poly64x2x3_t; ++#endif ++ ++ + typedef struct int8x8x4_t + { + int8x8_t val[4]; +@@ -395,7 +438,23 @@ + poly16x8_t val[4]; + } poly16x8x4_t; + ++#ifdef __ARM_FEATURE_CRYPTO ++typedef struct poly64x1x4_t ++{ ++ poly64x1_t val[4]; ++} poly64x1x4_t; ++#endif + ++ ++#ifdef __ARM_FEATURE_CRYPTO ++typedef struct poly64x2x4_t ++{ ++ poly64x2_t val[4]; ++} poly64x2x4_t; ++#endif ++ ++ ++ + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vadd_s8 (int8x8_t __a, int8x8_t __b) + { +@@ -4360,6 +4419,14 @@ + return (uint64x2_t)__builtin_neon_vsra_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c, 4); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vsri_n_p64 (poly64x1_t __a, poly64x1_t __b, const int __c) ++{ ++ return (poly64x1_t)__builtin_neon_vsri_ndi (__a, __b, __c); ++} ++ ++#endif + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vsri_n_s8 (int8x8_t __a, int8x8_t __b, const int __c) + { +@@ -4420,6 +4487,14 @@ + return (poly16x4_t)__builtin_neon_vsri_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vsriq_n_p64 (poly64x2_t __a, poly64x2_t __b, const int __c) ++{ ++ return (poly64x2_t)__builtin_neon_vsri_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c); ++} ++ ++#endif + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vsriq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c) + { +@@ -4480,6 +4555,14 @@ + return (poly16x8_t)__builtin_neon_vsri_nv8hi ((int16x8_t) __a, (int16x8_t) __b, __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vsli_n_p64 (poly64x1_t __a, poly64x1_t __b, const int __c) ++{ ++ return (poly64x1_t)__builtin_neon_vsli_ndi (__a, __b, __c); ++} ++ ++#endif + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vsli_n_s8 (int8x8_t __a, int8x8_t __b, const int __c) + { +@@ -4540,6 +4623,14 @@ + return (poly16x4_t)__builtin_neon_vsli_nv4hi ((int16x4_t) __a, (int16x4_t) __b, __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vsliq_n_p64 (poly64x2_t __a, poly64x2_t __b, const int __c) ++{ ++ return (poly64x2_t)__builtin_neon_vsli_nv2di ((int64x2_t) __a, (int64x2_t) __b, __c); ++} ++ ++#endif + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vsliq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c) + { +@@ -5308,6 +5399,14 @@ + return (uint64x2_t)__builtin_neon_vset_lanev2di ((__builtin_neon_di) __a, (int64x2_t) __b, __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vcreate_p64 (uint64_t __a) ++{ ++ return (poly64x1_t)__builtin_neon_vcreatedi ((__builtin_neon_di) __a); ++} ++ ++#endif + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vcreate_s8 (uint64_t __a) + { +@@ -5428,6 +5527,14 @@ + return (poly16x4_t)__builtin_neon_vdup_nv4hi ((__builtin_neon_hi) __a); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vdup_n_p64 (poly64_t __a) ++{ ++ return (poly64x1_t)__builtin_neon_vdup_ndi ((__builtin_neon_di) __a); ++} ++ ++#endif + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vdup_n_s64 (int64_t __a) + { +@@ -5440,6 +5547,14 @@ + return (uint64x1_t)__builtin_neon_vdup_ndi ((__builtin_neon_di) __a); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vdupq_n_p64 (poly64_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vdup_nv2di ((__builtin_neon_di) __a); ++} ++ ++#endif + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vdupq_n_s8 (int8_t __a) + { +@@ -5692,6 +5807,14 @@ + return (poly16x4_t)__builtin_neon_vdup_lanev4hi ((int16x4_t) __a, __b); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vdup_lane_p64 (poly64x1_t __a, const int __b) ++{ ++ return (poly64x1_t)__builtin_neon_vdup_lanedi (__a, __b); ++} ++ ++#endif + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vdup_lane_s64 (int64x1_t __a, const int __b) + { +@@ -5758,6 +5881,14 @@ + return (poly16x8_t)__builtin_neon_vdup_lanev8hi ((int16x4_t) __a, __b); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vdupq_lane_p64 (poly64x1_t __a, const int __b) ++{ ++ return (poly64x2_t)__builtin_neon_vdup_lanev2di (__a, __b); ++} ++ ++#endif + __extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) + vdupq_lane_s64 (int64x1_t __a, const int __b) + { +@@ -5770,6 +5901,14 @@ + return (uint64x2_t)__builtin_neon_vdup_lanev2di ((int64x1_t) __a, __b); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vcombine_p64 (poly64x1_t __a, poly64x1_t __b) ++{ ++ return (poly64x2_t)__builtin_neon_vcombinedi (__a, __b); ++} ++ ++#endif + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vcombine_s8 (int8x8_t __a, int8x8_t __b) + { +@@ -5836,6 +5975,14 @@ + return (poly16x8_t)__builtin_neon_vcombinev4hi ((int16x4_t) __a, (int16x4_t) __b); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vget_high_p64 (poly64x2_t __a) ++{ ++ return (poly64x1_t)__builtin_neon_vget_highv2di ((int64x2_t) __a); ++} ++ ++#endif + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vget_high_s8 (int8x16_t __a) + { +@@ -5956,6 +6103,14 @@ + return (poly16x4_t)__builtin_neon_vget_lowv8hi ((int16x8_t) __a); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vget_low_p64 (poly64x2_t __a) ++{ ++ return (poly64x1_t)__builtin_neon_vget_lowv2di ((int64x2_t) __a); ++} ++ ++#endif + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vget_low_s64 (int64x2_t __a) + { +@@ -6016,6 +6171,22 @@ + return (uint32x4_t)__builtin_neon_vcvtv4sf (__a, 0); + } + ++#if ((__ARM_FP & 0x2) != 0) ++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__)) ++vcvt_f16_f32 (float32x4_t __a) ++{ ++ return (float16x4_t)__builtin_neon_vcvtv4hfv4sf (__a); ++} ++ ++#endif ++#if ((__ARM_FP & 0x2) != 0) ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvt_f32_f16 (float16x4_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vcvtv4sfv4hf (__a); ++} ++ ++#endif + __extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) + vcvt_n_s32_f32 (float32x2_t __a, const int __b) + { +@@ -7024,6 +7195,14 @@ + return (int64x2_t)__builtin_neon_vqdmlsl_nv2si (__a, __b, (__builtin_neon_si) __c, 1); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vext_p64 (poly64x1_t __a, poly64x1_t __b, const int __c) ++{ ++ return (poly64x1_t)__builtin_neon_vextdi (__a, __b, __c); ++} ++ ++#endif + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vext_s8 (int8x8_t __a, int8x8_t __b, const int __c) + { +@@ -7090,6 +7269,14 @@ + return (poly16x4_t)__builtin_neon_vextv4hi ((int16x4_t) __a, (int16x4_t) __b, __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vextq_p64 (poly64x2_t __a, poly64x2_t __b, const int __c) ++{ ++ return (poly64x2_t)__builtin_neon_vextv2di ((int64x2_t) __a, (int64x2_t) __b, __c); ++} ++ ++#endif + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vextq_s8 (int8x16_t __a, int8x16_t __b, const int __c) + { +@@ -7372,6 +7559,14 @@ + return (poly8x16_t) __builtin_shuffle (__a, (uint8x16_t) { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 }); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vbsl_p64 (uint64x1_t __a, poly64x1_t __b, poly64x1_t __c) ++{ ++ return (poly64x1_t)__builtin_neon_vbsldi ((int64x1_t) __a, __b, __c); ++} ++ ++#endif + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vbsl_s8 (uint8x8_t __a, int8x8_t __b, int8x8_t __c) + { +@@ -7438,6 +7633,14 @@ + return (poly16x4_t)__builtin_neon_vbslv4hi ((int16x4_t) __a, (int16x4_t) __b, (int16x4_t) __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vbslq_p64 (uint64x2_t __a, poly64x2_t __b, poly64x2_t __c) ++{ ++ return (poly64x2_t)__builtin_neon_vbslv2di ((int64x2_t) __a, (int64x2_t) __b, (int64x2_t) __c); ++} ++ ++#endif + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vbslq_s8 (uint8x16_t __a, int8x16_t __b, int8x16_t __c) + { +@@ -7990,6 +8193,14 @@ + return __rv; + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vld1_p64 (const poly64_t * __a) ++{ ++ return (poly64x1_t)__builtin_neon_vld1di ((const __builtin_neon_di *) __a); ++} ++ ++#endif + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vld1_s8 (const int8_t * __a) + { +@@ -8056,6 +8267,14 @@ + return (poly16x4_t)__builtin_neon_vld1v4hi ((const __builtin_neon_hi *) __a); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vld1q_p64 (const poly64_t * __a) ++{ ++ return (poly64x2_t)__builtin_neon_vld1v2di ((const __builtin_neon_di *) __a); ++} ++ ++#endif + __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) + vld1q_s8 (const int8_t * __a) + { +@@ -8176,6 +8395,14 @@ + return (poly16x4_t)__builtin_neon_vld1_lanev4hi ((const __builtin_neon_hi *) __a, (int16x4_t) __b, __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vld1_lane_p64 (const poly64_t * __a, poly64x1_t __b, const int __c) ++{ ++ return (poly64x1_t)__builtin_neon_vld1_lanedi ((const __builtin_neon_di *) __a, __b, __c); ++} ++ ++#endif + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vld1_lane_s64 (const int64_t * __a, int64x1_t __b, const int __c) + { +@@ -8242,6 +8469,14 @@ + return (poly16x8_t)__builtin_neon_vld1_lanev8hi ((const __builtin_neon_hi *) __a, (int16x8_t) __b, __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vld1q_lane_p64 (const poly64_t * __a, poly64x2_t __b, const int __c) ++{ ++ return (poly64x2_t)__builtin_neon_vld1_lanev2di ((const __builtin_neon_di *) __a, (int64x2_t) __b, __c); ++} ++ ++#endif + __extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) + vld1q_lane_s64 (const int64_t * __a, int64x2_t __b, const int __c) + { +@@ -8308,6 +8543,14 @@ + return (poly16x4_t)__builtin_neon_vld1_dupv4hi ((const __builtin_neon_hi *) __a); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vld1_dup_p64 (const poly64_t * __a) ++{ ++ return (poly64x1_t)__builtin_neon_vld1_dupdi ((const __builtin_neon_di *) __a); ++} ++ ++#endif + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vld1_dup_s64 (const int64_t * __a) + { +@@ -8374,6 +8617,14 @@ + return (poly16x8_t)__builtin_neon_vld1_dupv8hi ((const __builtin_neon_hi *) __a); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vld1q_dup_p64 (const poly64_t * __a) ++{ ++ return (poly64x2_t)__builtin_neon_vld1_dupv2di ((const __builtin_neon_di *) __a); ++} ++ ++#endif + __extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) + vld1q_dup_s64 (const int64_t * __a) + { +@@ -8386,7 +8637,15 @@ + return (uint64x2_t)__builtin_neon_vld1_dupv2di ((const __builtin_neon_di *) __a); + } + ++#ifdef __ARM_FEATURE_CRYPTO + __extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_p64 (poly64_t * __a, poly64x1_t __b) ++{ ++ __builtin_neon_vst1di ((__builtin_neon_di *) __a, __b); ++} ++ ++#endif ++__extension__ static __inline void __attribute__ ((__always_inline__)) + vst1_s8 (int8_t * __a, int8x8_t __b) + { + __builtin_neon_vst1v8qi ((__builtin_neon_qi *) __a, __b); +@@ -8452,7 +8711,15 @@ + __builtin_neon_vst1v4hi ((__builtin_neon_hi *) __a, (int16x4_t) __b); + } + ++#ifdef __ARM_FEATURE_CRYPTO + __extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_p64 (poly64_t * __a, poly64x2_t __b) ++{ ++ __builtin_neon_vst1v2di ((__builtin_neon_di *) __a, (int64x2_t) __b); ++} ++ ++#endif ++__extension__ static __inline void __attribute__ ((__always_inline__)) + vst1q_s8 (int8_t * __a, int8x16_t __b) + { + __builtin_neon_vst1v16qi ((__builtin_neon_qi *) __a, __b); +@@ -8572,7 +8839,15 @@ + __builtin_neon_vst1_lanev4hi ((__builtin_neon_hi *) __a, (int16x4_t) __b, __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO + __extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_lane_p64 (poly64_t * __a, poly64x1_t __b, const int __c) ++{ ++ __builtin_neon_vst1_lanedi ((__builtin_neon_di *) __a, __b, __c); ++} ++ ++#endif ++__extension__ static __inline void __attribute__ ((__always_inline__)) + vst1_lane_s64 (int64_t * __a, int64x1_t __b, const int __c) + { + __builtin_neon_vst1_lanedi ((__builtin_neon_di *) __a, __b, __c); +@@ -8638,7 +8913,15 @@ + __builtin_neon_vst1_lanev8hi ((__builtin_neon_hi *) __a, (int16x8_t) __b, __c); + } + ++#ifdef __ARM_FEATURE_CRYPTO + __extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_lane_p64 (poly64_t * __a, poly64x2_t __b, const int __c) ++{ ++ __builtin_neon_vst1_lanev2di ((__builtin_neon_di *) __a, (int64x2_t) __b, __c); ++} ++ ++#endif ++__extension__ static __inline void __attribute__ ((__always_inline__)) + vst1q_lane_s64 (int64_t * __a, int64x2_t __b, const int __c) + { + __builtin_neon_vst1_lanev2di ((__builtin_neon_di *) __a, __b, __c); +@@ -8722,6 +9005,16 @@ + return __rv.__i; + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1x2_t __attribute__ ((__always_inline__)) ++vld2_p64 (const poly64_t * __a) ++{ ++ union { poly64x1x2_t __i; __builtin_neon_ti __o; } __rv; ++ __rv.__o = __builtin_neon_vld2di ((const __builtin_neon_di *) __a); ++ return __rv.__i; ++} ++ ++#endif + __extension__ static __inline int64x1x2_t __attribute__ ((__always_inline__)) + vld2_s64 (const int64_t * __a) + { +@@ -9017,6 +9310,16 @@ + return __rv.__i; + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1x2_t __attribute__ ((__always_inline__)) ++vld2_dup_p64 (const poly64_t * __a) ++{ ++ union { poly64x1x2_t __i; __builtin_neon_ti __o; } __rv; ++ __rv.__o = __builtin_neon_vld2_dupdi ((const __builtin_neon_di *) __a); ++ return __rv.__i; ++} ++ ++#endif + __extension__ static __inline int64x1x2_t __attribute__ ((__always_inline__)) + vld2_dup_s64 (const int64_t * __a) + { +@@ -9096,7 +9399,16 @@ + __builtin_neon_vst2v4hi ((__builtin_neon_hi *) __a, __bu.__o); + } + ++#ifdef __ARM_FEATURE_CRYPTO + __extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_p64 (poly64_t * __a, poly64x1x2_t __b) ++{ ++ union { poly64x1x2_t __i; __builtin_neon_ti __o; } __bu = { __b }; ++ __builtin_neon_vst2di ((__builtin_neon_di *) __a, __bu.__o); ++} ++ ++#endif ++__extension__ static __inline void __attribute__ ((__always_inline__)) + vst2_s64 (int64_t * __a, int64x1x2_t __b) + { + union { int64x1x2_t __i; __builtin_neon_ti __o; } __bu = { __b }; +@@ -9350,6 +9662,16 @@ + return __rv.__i; + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1x3_t __attribute__ ((__always_inline__)) ++vld3_p64 (const poly64_t * __a) ++{ ++ union { poly64x1x3_t __i; __builtin_neon_ei __o; } __rv; ++ __rv.__o = __builtin_neon_vld3di ((const __builtin_neon_di *) __a); ++ return __rv.__i; ++} ++ ++#endif + __extension__ static __inline int64x1x3_t __attribute__ ((__always_inline__)) + vld3_s64 (const int64_t * __a) + { +@@ -9645,6 +9967,16 @@ + return __rv.__i; + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1x3_t __attribute__ ((__always_inline__)) ++vld3_dup_p64 (const poly64_t * __a) ++{ ++ union { poly64x1x3_t __i; __builtin_neon_ei __o; } __rv; ++ __rv.__o = __builtin_neon_vld3_dupdi ((const __builtin_neon_di *) __a); ++ return __rv.__i; ++} ++ ++#endif + __extension__ static __inline int64x1x3_t __attribute__ ((__always_inline__)) + vld3_dup_s64 (const int64_t * __a) + { +@@ -9724,7 +10056,16 @@ + __builtin_neon_vst3v4hi ((__builtin_neon_hi *) __a, __bu.__o); + } + ++#ifdef __ARM_FEATURE_CRYPTO + __extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_p64 (poly64_t * __a, poly64x1x3_t __b) ++{ ++ union { poly64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; ++ __builtin_neon_vst3di ((__builtin_neon_di *) __a, __bu.__o); ++} ++ ++#endif ++__extension__ static __inline void __attribute__ ((__always_inline__)) + vst3_s64 (int64_t * __a, int64x1x3_t __b) + { + union { int64x1x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; +@@ -9978,6 +10319,16 @@ + return __rv.__i; + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1x4_t __attribute__ ((__always_inline__)) ++vld4_p64 (const poly64_t * __a) ++{ ++ union { poly64x1x4_t __i; __builtin_neon_oi __o; } __rv; ++ __rv.__o = __builtin_neon_vld4di ((const __builtin_neon_di *) __a); ++ return __rv.__i; ++} ++ ++#endif + __extension__ static __inline int64x1x4_t __attribute__ ((__always_inline__)) + vld4_s64 (const int64_t * __a) + { +@@ -10273,6 +10624,16 @@ + return __rv.__i; + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1x4_t __attribute__ ((__always_inline__)) ++vld4_dup_p64 (const poly64_t * __a) ++{ ++ union { poly64x1x4_t __i; __builtin_neon_oi __o; } __rv; ++ __rv.__o = __builtin_neon_vld4_dupdi ((const __builtin_neon_di *) __a); ++ return __rv.__i; ++} ++ ++#endif + __extension__ static __inline int64x1x4_t __attribute__ ((__always_inline__)) + vld4_dup_s64 (const int64_t * __a) + { +@@ -10352,7 +10713,16 @@ + __builtin_neon_vst4v4hi ((__builtin_neon_hi *) __a, __bu.__o); + } + ++#ifdef __ARM_FEATURE_CRYPTO + __extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_p64 (poly64_t * __a, poly64x1x4_t __b) ++{ ++ union { poly64x1x4_t __i; __builtin_neon_oi __o; } __bu = { __b }; ++ __builtin_neon_vst4di ((__builtin_neon_di *) __a, __bu.__o); ++} ++ ++#endif ++__extension__ static __inline void __attribute__ ((__always_inline__)) + vst4_s64 (int64_t * __a, int64x1x4_t __b) + { + union { int64x1x4_t __i; __builtin_neon_oi __o; } __bu = { __b }; +@@ -11016,23 +11386,25 @@ + + + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_p8_s8 (int8x8_t __a) ++vreinterpret_p8_p16 (poly16x4_t __a) + { +- return (poly8x8_t)__builtin_neon_vreinterpretv8qiv8qi (__a); ++ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); + } + + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_p8_s16 (int16x4_t __a) ++vreinterpret_p8_f32 (float32x2_t __a) + { +- return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a); ++ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a); + } + ++#ifdef __ARM_FEATURE_CRYPTO + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_p8_s32 (int32x2_t __a) ++vreinterpret_p8_p64 (poly64x1_t __a) + { +- return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a); ++ return (poly8x8_t)__builtin_neon_vreinterpretv8qidi (__a); + } + ++#endif + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) + vreinterpret_p8_s64 (int64x1_t __a) + { +@@ -11040,101 +11412,79 @@ + } + + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_p8_f32 (float32x2_t __a) ++vreinterpret_p8_u64 (uint64x1_t __a) + { +- return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a); ++ return (poly8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a); + } + + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_p8_u8 (uint8x8_t __a) ++vreinterpret_p8_s8 (int8x8_t __a) + { +- return (poly8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a); ++ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv8qi (__a); + } + + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_p8_u16 (uint16x4_t __a) ++vreinterpret_p8_s16 (int16x4_t __a) + { +- return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); ++ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a); + } + + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_p8_u32 (uint32x2_t __a) ++vreinterpret_p8_s32 (int32x2_t __a) + { +- return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a); ++ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a); + } + + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_p8_u64 (uint64x1_t __a) ++vreinterpret_p8_u8 (uint8x8_t __a) + { +- return (poly8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a); ++ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a); + } + + __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_p8_p16 (poly16x4_t __a) ++vreinterpret_p8_u16 (uint16x4_t __a) + { + return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_p8_s8 (int8x16_t __a) ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_u32 (uint32x2_t __a) + { +- return (poly8x16_t)__builtin_neon_vreinterpretv16qiv16qi (__a); ++ return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a); + } + +-__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_p8_s16 (int16x8_t __a) ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_p8 (poly8x8_t __a) + { +- return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a); ++ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_p8_s32 (int32x4_t __a) ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_f32 (float32x2_t __a) + { +- return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a); ++ return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a); + } + +-__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_p8_s64 (int64x2_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_p64 (poly64x1_t __a) + { +- return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a); ++ return (poly16x4_t)__builtin_neon_vreinterpretv4hidi (__a); + } + +-__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_p8_f32 (float32x4_t __a) ++#endif ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_s64 (int64x1_t __a) + { +- return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a); ++ return (poly16x4_t)__builtin_neon_vreinterpretv4hidi (__a); + } + +-__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_p8_u8 (uint8x16_t __a) ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_u64 (uint64x1_t __a) + { +- return (poly8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a); ++ return (poly16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a); + } + +-__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_p8_u16 (uint16x8_t __a) +-{ +- return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); +-} +- +-__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_p8_u32 (uint32x4_t __a) +-{ +- return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a); +-} +- +-__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_p8_u64 (uint64x2_t __a) +-{ +- return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a); +-} +- +-__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_p8_p16 (poly16x8_t __a) +-{ +- return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); +-} +- + __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) + vreinterpret_p16_s8 (int8x8_t __a) + { +@@ -11154,18 +11504,6 @@ + } + + __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_p16_s64 (int64x1_t __a) +-{ +- return (poly16x4_t)__builtin_neon_vreinterpretv4hidi (__a); +-} +- +-__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_p16_f32 (float32x2_t __a) +-{ +- return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a); +-} +- +-__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) + vreinterpret_p16_u8 (uint8x8_t __a) + { + return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); +@@ -11183,78 +11521,38 @@ + return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a); + } + +-__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_p16_u64 (uint64x1_t __a) ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_p8 (poly8x8_t __a) + { +- return (poly16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a); ++ return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_p16_p8 (poly8x8_t __a) ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_p16 (poly16x4_t __a) + { +- return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); ++ return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_p16_s8 (int8x16_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_p64 (poly64x1_t __a) + { +- return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a); ++ return (float32x2_t)__builtin_neon_vreinterpretv2sfdi (__a); + } + +-__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_p16_s16 (int16x8_t __a) ++#endif ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_s64 (int64x1_t __a) + { +- return (poly16x8_t)__builtin_neon_vreinterpretv8hiv8hi (__a); ++ return (float32x2_t)__builtin_neon_vreinterpretv2sfdi (__a); + } + +-__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_p16_s32 (int32x4_t __a) ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_u64 (uint64x1_t __a) + { +- return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a); ++ return (float32x2_t)__builtin_neon_vreinterpretv2sfdi ((int64x1_t) __a); + } + +-__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_p16_s64 (int64x2_t __a) +-{ +- return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a); +-} +- +-__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_p16_f32 (float32x4_t __a) +-{ +- return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a); +-} +- +-__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_p16_u8 (uint8x16_t __a) +-{ +- return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); +-} +- +-__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_p16_u16 (uint16x8_t __a) +-{ +- return (poly16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a); +-} +- +-__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_p16_u32 (uint32x4_t __a) +-{ +- return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a); +-} +- +-__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_p16_u64 (uint64x2_t __a) +-{ +- return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a); +-} +- +-__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_p16_p8 (poly8x16_t __a) +-{ +- return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); +-} +- + __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) + vreinterpret_f32_s8 (int8x8_t __a) + { +@@ -11274,12 +11572,6 @@ + } + + __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_f32_s64 (int64x1_t __a) +-{ +- return (float32x2_t)__builtin_neon_vreinterpretv2sfdi (__a); +-} +- +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) + vreinterpret_f32_u8 (uint8x8_t __a) + { + return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi ((int8x8_t) __a); +@@ -11297,85 +11589,127 @@ + return (float32x2_t)__builtin_neon_vreinterpretv2sfv2si ((int32x2_t) __a); + } + +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_f32_u64 (uint64x1_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_p8 (poly8x8_t __a) + { +- return (float32x2_t)__builtin_neon_vreinterpretv2sfdi ((int64x1_t) __a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_f32_p8 (poly8x8_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_p16 (poly16x4_t __a) + { +- return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi ((int8x8_t) __a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_f32_p16 (poly16x4_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_f32 (float32x2_t __a) + { +- return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi ((int16x4_t) __a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdiv2sf (__a); + } + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_f32_s8 (int8x16_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_s64 (int64x1_t __a) + { +- return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi (__a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdidi (__a); + } + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_f32_s16 (int16x8_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_u64 (uint64x1_t __a) + { +- return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi (__a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdidi ((int64x1_t) __a); + } + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_f32_s32 (int32x4_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_s8 (int8x8_t __a) + { +- return (float32x4_t)__builtin_neon_vreinterpretv4sfv4si (__a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdiv8qi (__a); + } + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_f32_s64 (int64x2_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_s16 (int16x4_t __a) + { +- return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di (__a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdiv4hi (__a); + } + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_f32_u8 (uint8x16_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_s32 (int32x2_t __a) + { +- return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi ((int8x16_t) __a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdiv2si (__a); + } + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_f32_u16 (uint16x8_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_u8 (uint8x8_t __a) + { +- return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi ((int16x8_t) __a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_f32_u32 (uint32x4_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_u16 (uint16x4_t __a) + { +- return (float32x4_t)__builtin_neon_vreinterpretv4sfv4si ((int32x4_t) __a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_f32_u64 (uint64x2_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_p64_u32 (uint32x2_t __a) + { +- return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di ((int64x2_t) __a); ++ return (poly64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a); + } + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_f32_p8 (poly8x16_t __a) ++#endif ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_p8 (poly8x8_t __a) + { +- return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi ((int8x16_t) __a); ++ return (int64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_f32_p16 (poly16x8_t __a) ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_p16 (poly16x4_t __a) + { +- return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi ((int16x8_t) __a); ++ return (int64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a); + } + + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_f32 (float32x2_t __a) ++{ ++ return (int64x1_t)__builtin_neon_vreinterpretdiv2sf (__a); ++} ++ ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_p64 (poly64x1_t __a) ++{ ++ return (int64x1_t)__builtin_neon_vreinterpretdidi (__a); ++} ++ ++#endif ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_u64 (uint64x1_t __a) ++{ ++ return (int64x1_t)__builtin_neon_vreinterpretdidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vreinterpret_s64_s8 (int8x8_t __a) + { + return (int64x1_t)__builtin_neon_vreinterpretdiv8qi (__a); +@@ -11394,12 +11728,6 @@ + } + + __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_s64_f32 (float32x2_t __a) +-{ +- return (int64x1_t)__builtin_neon_vreinterpretdiv2sf (__a); +-} +- +-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) + vreinterpret_s64_u8 (uint8x8_t __a) + { + return (int64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a); +@@ -11417,552 +11745,1206 @@ + return (int64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a); + } + +-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_s64_u64 (uint64x1_t __a) ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_p8 (poly8x8_t __a) + { +- return (int64x1_t)__builtin_neon_vreinterpretdidi ((int64x1_t) __a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_s64_p8 (poly8x8_t __a) ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_p16 (poly16x4_t __a) + { +- return (int64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_s64_p16 (poly16x4_t __a) ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_f32 (float32x2_t __a) + { +- return (int64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdiv2sf (__a); + } + +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_s64_s8 (int8x16_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_p64 (poly64x1_t __a) + { +- return (int64x2_t)__builtin_neon_vreinterpretv2div16qi (__a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdidi (__a); + } + +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_s64_s16 (int16x8_t __a) ++#endif ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s64 (int64x1_t __a) + { +- return (int64x2_t)__builtin_neon_vreinterpretv2div8hi (__a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdidi (__a); + } + +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_s64_s32 (int32x4_t __a) ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s8 (int8x8_t __a) + { +- return (int64x2_t)__builtin_neon_vreinterpretv2div4si (__a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi (__a); + } + +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_s64_f32 (float32x4_t __a) ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s16 (int16x4_t __a) + { +- return (int64x2_t)__builtin_neon_vreinterpretv2div4sf (__a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi (__a); + } + +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_s64_u8 (uint8x16_t __a) ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s32 (int32x2_t __a) + { +- return (int64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdiv2si (__a); + } + +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_s64_u16 (uint16x8_t __a) ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_u8 (uint8x8_t __a) + { +- return (int64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_s64_u32 (uint32x4_t __a) ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_u16 (uint16x4_t __a) + { +- return (int64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_s64_u64 (uint64x2_t __a) ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_u32 (uint32x2_t __a) + { +- return (int64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a); ++ return (uint64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a); + } + +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_s64_p8 (poly8x16_t __a) ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_p8 (poly8x8_t __a) + { +- return (int64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_s64_p16 (poly16x8_t __a) ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_p16 (poly16x4_t __a) + { +- return (int64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_u64_s8 (int8x8_t __a) ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_f32 (float32x2_t __a) + { +- return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi (__a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a); + } + +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_u64_s16 (int16x4_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_p64 (poly64x1_t __a) + { +- return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi (__a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qidi (__a); + } + +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_u64_s32 (int32x2_t __a) ++#endif ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_s64 (int64x1_t __a) + { +- return (uint64x1_t)__builtin_neon_vreinterpretdiv2si (__a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qidi (__a); + } + +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_u64_s64 (int64x1_t __a) ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u64 (uint64x1_t __a) + { +- return (uint64x1_t)__builtin_neon_vreinterpretdidi (__a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a); + } + +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_u64_f32 (float32x2_t __a) ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_s16 (int16x4_t __a) + { +- return (uint64x1_t)__builtin_neon_vreinterpretdiv2sf (__a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a); + } + +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_u64_u8 (uint8x8_t __a) ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_s32 (int32x2_t __a) + { +- return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a); + } + +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_u64_u16 (uint16x4_t __a) ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u8 (uint8x8_t __a) + { +- return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_u64_u32 (uint32x2_t __a) ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u16 (uint16x4_t __a) + { +- return (uint64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_u64_p8 (poly8x8_t __a) ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u32 (uint32x2_t __a) + { +- return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a); ++ return (int8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a); + } + +-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +-vreinterpret_u64_p16 (poly16x4_t __a) ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_p8 (poly8x8_t __a) + { +- return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_u64_s8 (int8x16_t __a) ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_p16 (poly16x4_t __a) + { +- return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi (__a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_u64_s16 (int16x8_t __a) ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_f32 (float32x2_t __a) + { +- return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi (__a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a); + } + +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_u64_s32 (int32x4_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_p64 (poly64x1_t __a) + { +- return (uint64x2_t)__builtin_neon_vreinterpretv2div4si (__a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hidi (__a); + } + +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_u64_s64 (int64x2_t __a) ++#endif ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_s64 (int64x1_t __a) + { +- return (uint64x2_t)__builtin_neon_vreinterpretv2div2di (__a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hidi (__a); + } + +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_u64_f32 (float32x4_t __a) ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u64 (uint64x1_t __a) + { +- return (uint64x2_t)__builtin_neon_vreinterpretv2div4sf (__a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a); + } + +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_u64_u8 (uint8x16_t __a) ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_s8 (int8x8_t __a) + { +- return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a); + } + +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_u64_u16 (uint16x8_t __a) ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_s32 (int32x2_t __a) + { +- return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a); + } + +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_u64_u32 (uint32x4_t __a) ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u8 (uint8x8_t __a) + { +- return (uint64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_u64_p8 (poly8x16_t __a) ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u16 (uint16x4_t __a) + { +- return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) +-vreinterpretq_u64_p16 (poly16x8_t __a) ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u32 (uint32x2_t __a) + { +- return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a); ++ return (int16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a); + } + +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_s8_s16 (int16x4_t __a) ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_p8 (poly8x8_t __a) + { +- return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_s8_s32 (int32x2_t __a) ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_p16 (poly16x4_t __a) + { +- return (int8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_s8_s64 (int64x1_t __a) ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_f32 (float32x2_t __a) + { +- return (int8x8_t)__builtin_neon_vreinterpretv8qidi (__a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2siv2sf (__a); + } + +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_s8_f32 (float32x2_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_p64 (poly64x1_t __a) + { +- return (int8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2sidi (__a); + } + +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_s8_u8 (uint8x8_t __a) ++#endif ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_s64 (int64x1_t __a) + { +- return (int8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2sidi (__a); + } + +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_s8_u16 (uint16x4_t __a) ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u64 (uint64x1_t __a) + { +- return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2sidi ((int64x1_t) __a); + } + +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_s8_u32 (uint32x2_t __a) ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_s8 (int8x8_t __a) + { +- return (int8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi (__a); + } + +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_s8_u64 (uint64x1_t __a) ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_s16 (int16x4_t __a) + { +- return (int8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi (__a); + } + +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_s8_p8 (poly8x8_t __a) ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u8 (uint8x8_t __a) + { +- return (int8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_s8_p16 (poly16x4_t __a) ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u16 (uint16x4_t __a) + { +- return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_s8_s16 (int16x8_t __a) ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u32 (uint32x2_t __a) + { +- return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a); ++ return (int32x2_t)__builtin_neon_vreinterpretv2siv2si ((int32x2_t) __a); + } + +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_s8_s32 (int32x4_t __a) ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_p8 (poly8x8_t __a) + { +- return (int8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_s8_s64 (int64x2_t __a) ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_p16 (poly16x4_t __a) + { +- return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_s8_f32 (float32x4_t __a) ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_f32 (float32x2_t __a) + { +- return (int8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a); + } + +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_s8_u8 (uint8x16_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_p64 (poly64x1_t __a) + { +- return (int8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qidi (__a); + } + +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_s8_u16 (uint16x8_t __a) ++#endif ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s64 (int64x1_t __a) + { +- return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qidi (__a); + } + +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_s8_u32 (uint32x4_t __a) ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_u64 (uint64x1_t __a) + { +- return (int8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a); + } + +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_s8_u64 (uint64x2_t __a) ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s8 (int8x8_t __a) + { +- return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv8qi (__a); + } + +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_s8_p8 (poly8x16_t __a) ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s16 (int16x4_t __a) + { +- return (int8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a); + } + +-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_s8_p16 (poly16x8_t __a) ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s32 (int32x2_t __a) + { +- return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a); + } + +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_s16_s8 (int8x8_t __a) ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_u16 (uint16x4_t __a) + { +- return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_s16_s32 (int32x2_t __a) ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_u32 (uint32x2_t __a) + { +- return (int16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a); ++ return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a); + } + +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_s16_s64 (int64x1_t __a) ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_p8 (poly8x8_t __a) + { +- return (int16x4_t)__builtin_neon_vreinterpretv4hidi (__a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_s16_f32 (float32x2_t __a) ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_p16 (poly16x4_t __a) + { +- return (int16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_s16_u8 (uint8x8_t __a) ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_f32 (float32x2_t __a) + { +- return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a); + } + +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_s16_u16 (uint16x4_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_p64 (poly64x1_t __a) + { +- return (int16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hidi (__a); + } + +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_s16_u32 (uint32x2_t __a) ++#endif ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s64 (int64x1_t __a) + { +- return (int16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hidi (__a); + } + +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_s16_u64 (uint64x1_t __a) ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_u64 (uint64x1_t __a) + { +- return (int16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a); + } + +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_s16_p8 (poly8x8_t __a) ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s8 (int8x8_t __a) + { +- return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a); + } + +-__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_s16_p16 (poly16x4_t __a) ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s16 (int16x4_t __a) + { +- return (int16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv4hi (__a); + } + +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_s16_s8 (int8x16_t __a) ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s32 (int32x2_t __a) + { +- return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a); + } + +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_s16_s32 (int32x4_t __a) ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_u8 (uint8x8_t __a) + { +- return (int16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_s16_s64 (int64x2_t __a) ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_u32 (uint32x2_t __a) + { +- return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a); ++ return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a); + } + +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_s16_f32 (float32x4_t __a) ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_p8 (poly8x8_t __a) + { +- return (int16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_s16_u8 (uint8x16_t __a) ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_p16 (poly16x4_t __a) + { +- return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_s16_u16 (uint16x8_t __a) ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_f32 (float32x2_t __a) + { +- return (int16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2siv2sf (__a); + } + +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_s16_u32 (uint32x4_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_p64 (poly64x1_t __a) + { +- return (int16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2sidi (__a); + } + +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_s16_u64 (uint64x2_t __a) ++#endif ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s64 (int64x1_t __a) + { +- return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2sidi (__a); + } + +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_s16_p8 (poly8x16_t __a) ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_u64 (uint64x1_t __a) + { +- return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2sidi ((int64x1_t) __a); + } + +-__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_s16_p16 (poly16x8_t __a) ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s8 (int8x8_t __a) + { +- return (int16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi (__a); + } + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_s32_s8 (int8x8_t __a) ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s16 (int16x4_t __a) + { +- return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi (__a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi (__a); + } + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_s32_s16 (int16x4_t __a) ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s32 (int32x2_t __a) + { +- return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi (__a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2siv2si (__a); + } + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_s32_s64 (int64x1_t __a) ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_u8 (uint8x8_t __a) + { +- return (int32x2_t)__builtin_neon_vreinterpretv2sidi (__a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a); + } + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_s32_f32 (float32x2_t __a) ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_u16 (uint16x4_t __a) + { +- return (int32x2_t)__builtin_neon_vreinterpretv2siv2sf (__a); ++ return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a); + } + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_s32_u8 (uint8x8_t __a) ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_p16 (poly16x8_t __a) + { +- return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); + } + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_s32_u16 (uint16x4_t __a) ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_f32 (float32x4_t __a) + { +- return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a); + } + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_s32_u32 (uint32x2_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_p64 (poly64x2_t __a) + { +- return (int32x2_t)__builtin_neon_vreinterpretv2siv2si ((int32x2_t) __a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a); + } + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_s32_u64 (uint64x1_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_p128 (poly128_t __a) + { +- return (int32x2_t)__builtin_neon_vreinterpretv2sidi ((int64x1_t) __a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiti ((__builtin_neon_ti) __a); + } + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_s32_p8 (poly8x8_t __a) ++#endif ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s64 (int64x2_t __a) + { +- return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a); + } + +-__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_s32_p16 (poly16x4_t __a) ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u64 (uint64x2_t __a) + { +- return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a); + } + +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_s32_s8 (int8x16_t __a) ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s8 (int8x16_t __a) + { +- return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi (__a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv16qi (__a); + } + +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_s32_s16 (int16x8_t __a) ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s16 (int16x8_t __a) + { +- return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi (__a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a); + } + +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_s32_s64 (int64x2_t __a) ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s32 (int32x4_t __a) + { +- return (int32x4_t)__builtin_neon_vreinterpretv4siv2di (__a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a); + } + +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_s32_f32 (float32x4_t __a) ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u8 (uint8x16_t __a) + { +- return (int32x4_t)__builtin_neon_vreinterpretv4siv4sf (__a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a); + } + +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_s32_u8 (uint8x16_t __a) ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u16 (uint16x8_t __a) + { +- return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); + } + +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_s32_u16 (uint16x8_t __a) ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u32 (uint32x4_t __a) + { +- return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a); ++ return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a); + } + +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_s32_u32 (uint32x4_t __a) ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_p8 (poly8x16_t __a) + { +- return (int32x4_t)__builtin_neon_vreinterpretv4siv4si ((int32x4_t) __a); ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); + } + +-__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_s32_u64 (uint64x2_t __a) ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_f32 (float32x4_t __a) + { +- return (int32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a); ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a); + } + ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_p64 (poly64x2_t __a) ++{ ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_p128 (poly128_t __a) ++{ ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiti ((__builtin_neon_ti) __a); ++} ++ ++#endif ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s64 (int64x2_t __a) ++{ ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u64 (uint64x2_t __a) ++{ ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s8 (int8x16_t __a) ++{ ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s16 (int16x8_t __a) ++{ ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv8hi (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s32 (int32x4_t __a) ++{ ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u8 (uint8x16_t __a) ++{ ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u16 (uint16x8_t __a) ++{ ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u32 (uint32x4_t __a) ++{ ++ return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_p8 (poly8x16_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_p16 (poly16x8_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi ((int16x8_t) __a); ++} ++ ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_p64 (poly64x2_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di ((int64x2_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_p128 (poly128_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfti ((__builtin_neon_ti) __a); ++} ++ ++#endif ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s64 (int64x2_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u64 (uint64x2_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s8 (int8x16_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s16 (int16x8_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s32 (int32x4_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv4si (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u8 (uint8x16_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u16 (uint16x8_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u32 (uint32x4_t __a) ++{ ++ return (float32x4_t)__builtin_neon_vreinterpretv4sfv4si ((int32x4_t) __a); ++} ++ ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_p8 (poly8x16_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_p16 (poly16x8_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_f32 (float32x4_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div4sf (__a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_p128 (poly128_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2diti ((__builtin_neon_ti) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_s64 (int64x2_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div2di (__a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_u64 (uint64x2_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_s8 (int8x16_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div16qi (__a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_s16 (int16x8_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div8hi (__a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_s32 (int32x4_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div4si (__a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_u8 (uint8x16_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_u16 (uint16x8_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_p64_u32 (uint32x4_t __a) ++{ ++ return (poly64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_p8 (poly8x16_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv16qi ((int8x16_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_p16 (poly16x8_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv8hi ((int16x8_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_f32 (float32x4_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv4sf (__a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_p64 (poly64x2_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv2di ((int64x2_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_s64 (int64x2_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv2di (__a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_u64 (uint64x2_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv2di ((int64x2_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_s8 (int8x16_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv16qi (__a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_s16 (int16x8_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv8hi (__a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_s32 (int32x4_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv4si (__a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_u8 (uint8x16_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv16qi ((int8x16_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_u16 (uint16x8_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv8hi ((int16x8_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vreinterpretq_p128_u32 (uint32x4_t __a) ++{ ++ return (poly128_t)__builtin_neon_vreinterprettiv4si ((int32x4_t) __a); ++} ++ ++#endif ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_p8 (poly8x16_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_p16 (poly16x8_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_f32 (float32x4_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div4sf (__a); ++} ++ ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_p64 (poly64x2_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_p128 (poly128_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2diti ((__builtin_neon_ti) __a); ++} ++ ++#endif ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u64 (uint64x2_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_s8 (int8x16_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div16qi (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_s16 (int16x8_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div8hi (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_s32 (int32x4_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div4si (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u8 (uint8x16_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u16 (uint16x8_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u32 (uint32x4_t __a) ++{ ++ return (int64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_p8 (poly8x16_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_p16 (poly16x8_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_f32 (float32x4_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div4sf (__a); ++} ++ ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_p64 (poly64x2_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_p128 (poly128_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2diti ((__builtin_neon_ti) __a); ++} ++ ++#endif ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s64 (int64x2_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div2di (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s8 (int8x16_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s16 (int16x8_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s32 (int32x4_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div4si (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_u8 (uint8x16_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_u16 (uint16x8_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_u32 (uint32x4_t __a) ++{ ++ return (uint64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_p8 (poly8x16_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_p16 (poly16x8_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_f32 (float32x4_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a); ++} ++ ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_p64 (poly64x2_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_p128 (poly128_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiti ((__builtin_neon_ti) __a); ++} ++ ++#endif ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_s64 (int64x2_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u64 (uint64x2_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_s16 (int16x8_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_s32 (int32x4_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u8 (uint8x16_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u16 (uint16x8_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u32 (uint32x4_t __a) ++{ ++ return (int8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_p8 (poly8x16_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_p16 (poly16x8_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_f32 (float32x4_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a); ++} ++ ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_p64 (poly64x2_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_p128 (poly128_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiti ((__builtin_neon_ti) __a); ++} ++ ++#endif ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_s64 (int64x2_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u64 (uint64x2_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_s8 (int8x16_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_s32 (int32x4_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u8 (uint8x16_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u16 (uint16x8_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u32 (uint32x4_t __a) ++{ ++ return (int16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a); ++} ++ + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) + vreinterpretq_s32_p8 (poly8x16_t __a) + { +@@ -11975,109 +12957,111 @@ + return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a); + } + +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_u8_s8 (int8x8_t __a) ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_f32 (float32x4_t __a) + { +- return (uint8x8_t)__builtin_neon_vreinterpretv8qiv8qi (__a); ++ return (int32x4_t)__builtin_neon_vreinterpretv4siv4sf (__a); + } + +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_u8_s16 (int16x4_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_p64 (poly64x2_t __a) + { +- return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a); ++ return (int32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a); + } + +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_u8_s32 (int32x2_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_p128 (poly128_t __a) + { +- return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a); ++ return (int32x4_t)__builtin_neon_vreinterpretv4siti ((__builtin_neon_ti) __a); + } + +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_u8_s64 (int64x1_t __a) ++#endif ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_s64 (int64x2_t __a) + { +- return (uint8x8_t)__builtin_neon_vreinterpretv8qidi (__a); ++ return (int32x4_t)__builtin_neon_vreinterpretv4siv2di (__a); + } + +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_u8_f32 (float32x2_t __a) ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u64 (uint64x2_t __a) + { +- return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a); ++ return (int32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a); + } + +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_u8_u16 (uint16x4_t __a) ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_s8 (int8x16_t __a) + { +- return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); ++ return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi (__a); + } + +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_u8_u32 (uint32x2_t __a) ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_s16 (int16x8_t __a) + { +- return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a); ++ return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi (__a); + } + +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_u8_u64 (uint64x1_t __a) ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u8 (uint8x16_t __a) + { +- return (uint8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a); ++ return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a); + } + +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_u8_p8 (poly8x8_t __a) ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u16 (uint16x8_t __a) + { +- return (uint8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a); ++ return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a); + } + +-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +-vreinterpret_u8_p16 (poly16x4_t __a) ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u32 (uint32x4_t __a) + { +- return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a); ++ return (int32x4_t)__builtin_neon_vreinterpretv4siv4si ((int32x4_t) __a); + } + + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_u8_s8 (int8x16_t __a) ++vreinterpretq_u8_p8 (poly8x16_t __a) + { +- return (uint8x16_t)__builtin_neon_vreinterpretv16qiv16qi (__a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a); + } + + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_u8_s16 (int16x8_t __a) ++vreinterpretq_u8_p16 (poly16x8_t __a) + { +- return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); + } + + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_u8_s32 (int32x4_t __a) ++vreinterpretq_u8_f32 (float32x4_t __a) + { +- return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a); + } + ++#ifdef __ARM_FEATURE_CRYPTO + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_u8_s64 (int64x2_t __a) ++vreinterpretq_u8_p64 (poly64x2_t __a) + { +- return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a); + } + ++#endif ++#ifdef __ARM_FEATURE_CRYPTO + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_u8_f32 (float32x4_t __a) ++vreinterpretq_u8_p128 (poly128_t __a) + { +- return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiti ((__builtin_neon_ti) __a); + } + ++#endif + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_u8_u16 (uint16x8_t __a) ++vreinterpretq_u8_s64 (int64x2_t __a) + { +- return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a); + } + + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_u8_u32 (uint32x4_t __a) +-{ +- return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a); +-} +- +-__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) + vreinterpretq_u8_u64 (uint64x2_t __a) + { + return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a); +@@ -12084,75 +13068,79 @@ + } + + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_u8_p8 (poly8x16_t __a) ++vreinterpretq_u8_s8 (int8x16_t __a) + { +- return (uint8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv16qi (__a); + } + + __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +-vreinterpretq_u8_p16 (poly16x8_t __a) ++vreinterpretq_u8_s16 (int16x8_t __a) + { +- return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a); + } + +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_u16_s8 (int8x8_t __a) ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_s32 (int32x4_t __a) + { +- return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a); + } + +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_u16_s16 (int16x4_t __a) ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_u16 (uint16x8_t __a) + { +- return (uint16x4_t)__builtin_neon_vreinterpretv4hiv4hi (__a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a); + } + +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_u16_s32 (int32x2_t __a) ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_u32 (uint32x4_t __a) + { +- return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a); ++ return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a); + } + +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_u16_s64 (int64x1_t __a) ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_p8 (poly8x16_t __a) + { +- return (uint16x4_t)__builtin_neon_vreinterpretv4hidi (__a); ++ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); + } + +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_u16_f32 (float32x2_t __a) ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_p16 (poly16x8_t __a) + { +- return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a); ++ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a); + } + +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_u16_u8 (uint8x8_t __a) ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_f32 (float32x4_t __a) + { +- return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); ++ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a); + } + +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_u16_u32 (uint32x2_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_p64 (poly64x2_t __a) + { +- return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a); ++ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a); + } + +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_u16_u64 (uint64x1_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_p128 (poly128_t __a) + { +- return (uint16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a); ++ return (uint16x8_t)__builtin_neon_vreinterpretv8hiti ((__builtin_neon_ti) __a); + } + +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_u16_p8 (poly8x8_t __a) ++#endif ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_s64 (int64x2_t __a) + { +- return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a); ++ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a); + } + +-__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) +-vreinterpret_u16_p16 (poly16x4_t __a) ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_u64 (uint64x2_t __a) + { +- return (uint16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a); ++ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a); + } + + __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) +@@ -12174,167 +13162,266 @@ + } + + __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_u16_s64 (int64x2_t __a) ++vreinterpretq_u16_u8 (uint8x16_t __a) + { +- return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a); ++ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); + } + + __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_u16_f32 (float32x4_t __a) ++vreinterpretq_u16_u32 (uint32x4_t __a) + { +- return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a); ++ return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a); + } + +-__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_u16_u8 (uint8x16_t __a) ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_p8 (poly8x16_t __a) + { +- return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a); + } + +-__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_u16_u32 (uint32x4_t __a) ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_p16 (poly16x8_t __a) + { +- return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a); + } + +-__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_u16_u64 (uint64x2_t __a) ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_f32 (float32x4_t __a) + { +- return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv4sf (__a); + } + +-__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_u16_p8 (poly8x16_t __a) ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_p64 (poly64x2_t __a) + { +- return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a); + } + +-__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) +-vreinterpretq_u16_p16 (poly16x8_t __a) ++#endif ++#ifdef __ARM_FEATURE_CRYPTO ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_p128 (poly128_t __a) + { +- return (uint16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siti ((__builtin_neon_ti) __a); + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_u32_s8 (int8x8_t __a) ++#endif ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s64 (int64x2_t __a) + { +- return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi (__a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di (__a); + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_u32_s16 (int16x4_t __a) ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_u64 (uint64x2_t __a) + { +- return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi (__a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a); + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_u32_s32 (int32x2_t __a) ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s8 (int8x16_t __a) + { +- return (uint32x2_t)__builtin_neon_vreinterpretv2siv2si (__a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi (__a); + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_u32_s64 (int64x1_t __a) ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s16 (int16x8_t __a) + { +- return (uint32x2_t)__builtin_neon_vreinterpretv2sidi (__a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi (__a); + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_u32_f32 (float32x2_t __a) ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s32 (int32x4_t __a) + { +- return (uint32x2_t)__builtin_neon_vreinterpretv2siv2sf (__a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv4si (__a); + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_u32_u8 (uint8x8_t __a) ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_u8 (uint8x16_t __a) + { +- return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a); + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_u32_u16 (uint16x4_t __a) ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_u16 (uint16x8_t __a) + { +- return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a); ++ return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a); + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_u32_u64 (uint64x1_t __a) ++ ++#ifdef __ARM_FEATURE_CRYPTO ++ ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vldrq_p128 (poly128_t const * __ptr) + { +- return (uint32x2_t)__builtin_neon_vreinterpretv2sidi ((int64x1_t) __a); ++#ifdef __ARM_BIG_ENDIAN ++ poly64_t* __ptmp = (poly64_t*) __ptr; ++ poly64_t __d0 = vld1_p64 (__ptmp); ++ poly64_t __d1 = vld1_p64 (__ptmp + 1); ++ return vreinterpretq_p128_p64 (vcombine_p64 (__d1, __d0)); ++#else ++ return vreinterpretq_p128_p64 (vld1q_p64 ((poly64_t*) __ptr)); ++#endif + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_u32_p8 (poly8x8_t __a) ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vstrq_p128 (poly128_t * __ptr, poly128_t __val) + { +- return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a); ++#ifdef __ARM_BIG_ENDIAN ++ poly64x2_t __tmp = vreinterpretq_p64_p128 (__val); ++ poly64_t __d0 = vget_high_p64 (__tmp); ++ poly64_t __d1 = vget_low_p64 (__tmp); ++ vst1q_p64 ((poly64_t*) __ptr, vcombine_p64 (__d0, __d1)); ++#else ++ vst1q_p64 ((poly64_t*) __ptr, vreinterpretq_p64_p128 (__val)); ++#endif + } + +-__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) +-vreinterpret_u32_p16 (poly16x4_t __a) ++/* The vceq_p64 intrinsic does not map to a single instruction. ++ Instead we emulate it by performing a 32-bit variant of the vceq ++ and applying a pairwise min reduction to the result. ++ vceq_u32 will produce two 32-bit halves, each of which will contain either ++ all ones or all zeros depending on whether the corresponding 32-bit ++ halves of the poly64_t were equal. The whole poly64_t values are equal ++ if and only if both halves are equal, i.e. vceq_u32 returns all ones. ++ If the result is all zeroes for any half then the whole result is zeroes. ++ This is what the pairwise min reduction achieves. */ ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceq_p64 (poly64x1_t __a, poly64x1_t __b) + { +- return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a); ++ uint32x2_t __t_a = vreinterpret_u32_p64 (__a); ++ uint32x2_t __t_b = vreinterpret_u32_p64 (__b); ++ uint32x2_t __c = vceq_u32 (__t_a, __t_b); ++ uint32x2_t __m = vpmin_u32 (__c, __c); ++ return vreinterpret_u64_u32 (__m); + } + +-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_u32_s8 (int8x16_t __a) ++/* The vtst_p64 intrinsic does not map to a single instruction. ++ We emulate it in way similar to vceq_p64 above but here we do ++ a reduction with max since if any two corresponding bits ++ in the two poly64_t's match, then the whole result must be all ones. */ ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vtst_p64 (poly64x1_t __a, poly64x1_t __b) + { +- return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi (__a); ++ uint32x2_t __t_a = vreinterpret_u32_p64 (__a); ++ uint32x2_t __t_b = vreinterpret_u32_p64 (__b); ++ uint32x2_t __c = vtst_u32 (__t_a, __t_b); ++ uint32x2_t __m = vpmax_u32 (__c, __c); ++ return vreinterpret_u64_u32 (__m); + } + ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaeseq_u8 (uint8x16_t __data, uint8x16_t __key) ++{ ++ return __builtin_arm_crypto_aese (__data, __key); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaesdq_u8 (uint8x16_t __data, uint8x16_t __key) ++{ ++ return __builtin_arm_crypto_aesd (__data, __key); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaesmcq_u8 (uint8x16_t __data) ++{ ++ return __builtin_arm_crypto_aesmc (__data); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaesimcq_u8 (uint8x16_t __data) ++{ ++ return __builtin_arm_crypto_aesimc (__data); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vsha1h_u32 (uint32_t __hash_e) ++{ ++ uint32x4_t __t = vdupq_n_u32 (0); ++ __t = vsetq_lane_u32 (__hash_e, __t, 0); ++ __t = __builtin_arm_crypto_sha1h (__t); ++ return vgetq_lane_u32 (__t, 0); ++} ++ + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_u32_s16 (int16x8_t __a) ++vsha1cq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk) + { +- return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi (__a); ++ uint32x4_t __t = vdupq_n_u32 (0); ++ __t = vsetq_lane_u32 (__hash_e, __t, 0); ++ return __builtin_arm_crypto_sha1c (__hash_abcd, __t, __wk); + } + + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_u32_s32 (int32x4_t __a) ++vsha1pq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk) + { +- return (uint32x4_t)__builtin_neon_vreinterpretv4siv4si (__a); ++ uint32x4_t __t = vdupq_n_u32 (0); ++ __t = vsetq_lane_u32 (__hash_e, __t, 0); ++ return __builtin_arm_crypto_sha1p (__hash_abcd, __t, __wk); + } + + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_u32_s64 (int64x2_t __a) ++vsha1mq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk) + { +- return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di (__a); ++ uint32x4_t __t = vdupq_n_u32 (0); ++ __t = vsetq_lane_u32 (__hash_e, __t, 0); ++ return __builtin_arm_crypto_sha1m (__hash_abcd, __t, __wk); + } + + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_u32_f32 (float32x4_t __a) ++vsha1su0q_u32 (uint32x4_t __w0_3, uint32x4_t __w4_7, uint32x4_t __w8_11) + { +- return (uint32x4_t)__builtin_neon_vreinterpretv4siv4sf (__a); ++ return __builtin_arm_crypto_sha1su0 (__w0_3, __w4_7, __w8_11); + } + + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_u32_u8 (uint8x16_t __a) ++vsha1su1q_u32 (uint32x4_t __tw0_3, uint32x4_t __w12_15) + { +- return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a); ++ return __builtin_arm_crypto_sha1su1 (__tw0_3, __w12_15); + } + + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_u32_u16 (uint16x8_t __a) ++vsha256hq_u32 (uint32x4_t __hash_abcd, uint32x4_t __hash_efgh, uint32x4_t __wk) + { +- return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a); ++ return __builtin_arm_crypto_sha256h (__hash_abcd, __hash_efgh, __wk); + } + + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_u32_u64 (uint64x2_t __a) ++vsha256h2q_u32 (uint32x4_t __hash_abcd, uint32x4_t __hash_efgh, uint32x4_t __wk) + { +- return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a); ++ return __builtin_arm_crypto_sha256h2 (__hash_abcd, __hash_efgh, __wk); + } + + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_u32_p8 (poly8x16_t __a) ++vsha256su0q_u32 (uint32x4_t __w0_3, uint32x4_t __w4_7) + { +- return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a); ++ return __builtin_arm_crypto_sha256su0 (__w0_3, __w4_7); + } + + __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) +-vreinterpretq_u32_p16 (poly16x8_t __a) ++vsha256su1q_u32 (uint32x4_t __tw0_3, uint32x4_t __w8_11, uint32x4_t __w12_15) + { +- return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a); ++ return __builtin_arm_crypto_sha256su1 (__tw0_3, __w8_11, __w12_15); + } + ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vmull_p64 (poly64_t __a, poly64_t __b) ++{ ++ return (poly128_t) __builtin_arm_crypto_vmullp64 ((uint64_t) __a, (uint64_t) __b); ++} ++ ++__extension__ static __inline poly128_t __attribute__ ((__always_inline__)) ++vmull_high_p64 (poly64x2_t __a, poly64x2_t __b) ++{ ++ poly64_t __t1 = vget_high_p64 (__a); ++ poly64_t __t2 = vget_high_p64 (__b); ++ ++ return (poly128_t) __builtin_arm_crypto_vmullp64 ((uint64_t) __t1, (uint64_t) __t2); ++} ++ ++#endif + #ifdef __cplusplus + } + #endif +--- a/src/gcc/config/arm/arm-ldmstm.ml ++++ b/src/gcc/config/arm/arm-ldmstm.ml +@@ -149,6 +149,8 @@ + | IA, true, true -> true + | _ -> false + ++exception InvalidAddrMode of string;; ++ + let target addrmode thumb = + match addrmode, thumb with + IA, true -> "TARGET_THUMB1" +@@ -155,6 +157,7 @@ + | IA, false -> "TARGET_32BIT" + | DB, false -> "TARGET_32BIT" + | _, false -> "TARGET_ARM" ++ | _, _ -> raise (InvalidAddrMode "ERROR: Invalid Addressing mode for Thumb1.") + + let write_pattern_1 name ls addrmode nregs write_set_fn update thumb = + let astr = string_of_addrmode addrmode in +@@ -184,8 +187,10 @@ + done; + Printf.printf "}\"\n"; + Printf.printf " [(set_attr \"type\" \"%s%d\")" ls nregs; +- begin if not thumb then ++ if not thumb then begin + Printf.printf "\n (set_attr \"predicable\" \"yes\")"; ++ if addrmode == IA || addrmode == DB then ++ Printf.printf "\n (set_attr \"predicable_short_it\" \"no\")"; + end; + Printf.printf "])\n\n" + +--- a/src/gcc/config/arm/iwmmxt.md ++++ b/src/gcc/config/arm/iwmmxt.md +@@ -33,7 +33,7 @@ + "TARGET_REALLY_IWMMXT" + "tbcstb%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tbcst")] ++ (set_attr "type" "wmmx_tbcst")] + ) + + (define_insn "tbcstv4hi" +@@ -42,7 +42,7 @@ + "TARGET_REALLY_IWMMXT" + "tbcsth%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tbcst")] ++ (set_attr "type" "wmmx_tbcst")] + ) + + (define_insn "tbcstv2si" +@@ -51,7 +51,7 @@ + "TARGET_REALLY_IWMMXT" + "tbcstw%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tbcst")] ++ (set_attr "type" "wmmx_tbcst")] + ) + + (define_insn "iwmmxt_iordi3" +@@ -65,7 +65,7 @@ + #" + [(set_attr "predicable" "yes") + (set_attr "length" "4,8,8") +- (set_attr "wtype" "wor,none,none")] ++ (set_attr "type" "wmmx_wor,*,*")] + ) + + (define_insn "iwmmxt_xordi3" +@@ -79,7 +79,7 @@ + #" + [(set_attr "predicable" "yes") + (set_attr "length" "4,8,8") +- (set_attr "wtype" "wxor,none,none")] ++ (set_attr "type" "wmmx_wxor,*,*")] + ) + + (define_insn "iwmmxt_anddi3" +@@ -93,7 +93,7 @@ + #" + [(set_attr "predicable" "yes") + (set_attr "length" "4,8,8") +- (set_attr "wtype" "wand,none,none")] ++ (set_attr "type" "wmmx_wand,*,*")] + ) + + (define_insn "iwmmxt_nanddi3" +@@ -103,7 +103,7 @@ + "TARGET_REALLY_IWMMXT" + "wandn%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wandn")] ++ (set_attr "type" "wmmx_wandn")] + ) + + (define_insn "*iwmmxt_arm_movdi" +@@ -155,10 +155,10 @@ + (const_int 8) + (const_int 4))] + (const_int 4))) +- (set_attr "type" "*,*,*,load2,store2,*,*,*,*,*,r_2_f,f_2_r,ffarithd,f_loadd,f_stored") ++ (set_attr "type" "*,*,*,load2,store2,*,*,*,*,*,f_mcrr,f_mrrc,\ ++ ffarithd,f_loadd,f_stored") + (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,*,*,*,*,*,*,1020,*") +- (set_attr "arm_neg_pool_range" "*,*,*,1008,*,*,*,*,*,*,*,*,*,1008,*") +- (set_attr "wtype" "*,*,*,*,*,wmov,tmcrr,tmrrc,wldr,wstr,*,*,*,*,*")] ++ (set_attr "arm_neg_pool_range" "*,*,*,1008,*,*,*,*,*,*,*,*,*,1008,*")] + ) + + (define_insn "*iwmmxt_movsi_insn" +@@ -188,7 +188,8 @@ + default: + gcc_unreachable (); + }" +- [(set_attr "type" "*,*,*,*,load1,store1,*,*,*,*,r_2_f,f_2_r,fcpys,f_loads,f_stores") ++ [(set_attr "type" "*,*,*,*,load1,store1,*,*,*,*,f_mcr,f_mrc,\ ++ fmov,f_loads,f_stores") + (set_attr "length" "*,*,*,*,*, *,*,*, 16, *,*,*,*,*,*") + (set_attr "pool_range" "*,*,*,*,4096, *,*,*,1024, *,*,*,*,1020,*") + (set_attr "neg_pool_range" "*,*,*,*,4084, *,*,*, *, 1012,*,*,*,1008,*") +@@ -200,8 +201,7 @@ + ;; Also - we have to pretend that these insns clobber the condition code + ;; bits as otherwise arm_final_prescan_insn() will try to conditionalize + ;; them. +- (set_attr "conds" "clob") +- (set_attr "wtype" "*,*,*,*,*,*,tmcr,tmrc,wldr,wstr,*,*,*,*,*")] ++ (set_attr "conds" "clob")] + ) + + ;; Because iwmmxt_movsi_insn is not predicable, we provide the +@@ -249,10 +249,9 @@ + }" + [(set_attr "predicable" "yes") + (set_attr "length" "4, 4, 4,4,4,8, 8,8") +- (set_attr "type" "*,*,*,*,*,*,load1,store1") ++ (set_attr "type" "wmmx_wmov,wmmx_wstr,wmmx_wldr,wmmx_tmrrc,wmmx_tmcrr,*,load1,store1") + (set_attr "pool_range" "*, *, 256,*,*,*, 256,*") +- (set_attr "neg_pool_range" "*, *, 244,*,*,*, 244,*") +- (set_attr "wtype" "wmov,wstr,wldr,tmrrc,tmcrr,*,*,*")] ++ (set_attr "neg_pool_range" "*, *, 244,*,*,*, 244,*")] + ) + + (define_expand "iwmmxt_setwcgr0" +@@ -318,7 +317,7 @@ + "TARGET_REALLY_IWMMXT" + "wand\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wand")] ++ (set_attr "type" "wmmx_wand")] + ) + + (define_insn "*ior3_iwmmxt" +@@ -328,7 +327,7 @@ + "TARGET_REALLY_IWMMXT" + "wor\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wor")] ++ (set_attr "type" "wmmx_wor")] + ) + + (define_insn "*xor3_iwmmxt" +@@ -338,7 +337,7 @@ + "TARGET_REALLY_IWMMXT" + "wxor\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wxor")] ++ (set_attr "type" "wmmx_wxor")] + ) + + +@@ -351,7 +350,7 @@ + "TARGET_REALLY_IWMMXT" + "wadd%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wadd")] ++ (set_attr "type" "wmmx_wadd")] + ) + + (define_insn "ssaddv8qi3" +@@ -361,7 +360,7 @@ + "TARGET_REALLY_IWMMXT" + "waddbss%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wadd")] ++ (set_attr "type" "wmmx_wadd")] + ) + + (define_insn "ssaddv4hi3" +@@ -371,7 +370,7 @@ + "TARGET_REALLY_IWMMXT" + "waddhss%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wadd")] ++ (set_attr "type" "wmmx_wadd")] + ) + + (define_insn "ssaddv2si3" +@@ -381,7 +380,7 @@ + "TARGET_REALLY_IWMMXT" + "waddwss%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wadd")] ++ (set_attr "type" "wmmx_wadd")] + ) + + (define_insn "usaddv8qi3" +@@ -391,7 +390,7 @@ + "TARGET_REALLY_IWMMXT" + "waddbus%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wadd")] ++ (set_attr "type" "wmmx_wadd")] + ) + + (define_insn "usaddv4hi3" +@@ -401,7 +400,7 @@ + "TARGET_REALLY_IWMMXT" + "waddhus%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wadd")] ++ (set_attr "type" "wmmx_wadd")] + ) + + (define_insn "usaddv2si3" +@@ -411,7 +410,7 @@ + "TARGET_REALLY_IWMMXT" + "waddwus%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wadd")] ++ (set_attr "type" "wmmx_wadd")] + ) + + (define_insn "*sub3_iwmmxt" +@@ -421,7 +420,7 @@ + "TARGET_REALLY_IWMMXT" + "wsub%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsub")] ++ (set_attr "type" "wmmx_wsub")] + ) + + (define_insn "sssubv8qi3" +@@ -431,7 +430,7 @@ + "TARGET_REALLY_IWMMXT" + "wsubbss%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsub")] ++ (set_attr "type" "wmmx_wsub")] + ) + + (define_insn "sssubv4hi3" +@@ -441,7 +440,7 @@ + "TARGET_REALLY_IWMMXT" + "wsubhss%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsub")] ++ (set_attr "type" "wmmx_wsub")] + ) + + (define_insn "sssubv2si3" +@@ -451,7 +450,7 @@ + "TARGET_REALLY_IWMMXT" + "wsubwss%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsub")] ++ (set_attr "type" "wmmx_wsub")] + ) + + (define_insn "ussubv8qi3" +@@ -461,7 +460,7 @@ + "TARGET_REALLY_IWMMXT" + "wsubbus%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsub")] ++ (set_attr "type" "wmmx_wsub")] + ) + + (define_insn "ussubv4hi3" +@@ -471,7 +470,7 @@ + "TARGET_REALLY_IWMMXT" + "wsubhus%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsub")] ++ (set_attr "type" "wmmx_wsub")] + ) + + (define_insn "ussubv2si3" +@@ -481,7 +480,7 @@ + "TARGET_REALLY_IWMMXT" + "wsubwus%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsub")] ++ (set_attr "type" "wmmx_wsub")] + ) + + (define_insn "*mulv4hi3_iwmmxt" +@@ -491,7 +490,7 @@ + "TARGET_REALLY_IWMMXT" + "wmulul%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmul")] ++ (set_attr "type" "wmmx_wmul")] + ) + + (define_insn "smulv4hi3_highpart" +@@ -504,7 +503,7 @@ + "TARGET_REALLY_IWMMXT" + "wmulsm%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmul")] ++ (set_attr "type" "wmmx_wmul")] + ) + + (define_insn "umulv4hi3_highpart" +@@ -517,7 +516,7 @@ + "TARGET_REALLY_IWMMXT" + "wmulum%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmul")] ++ (set_attr "type" "wmmx_wmul")] + ) + + (define_insn "iwmmxt_wmacs" +@@ -528,7 +527,7 @@ + "TARGET_REALLY_IWMMXT" + "wmacs%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmac")] ++ (set_attr "type" "wmmx_wmac")] + ) + + (define_insn "iwmmxt_wmacsz" +@@ -538,7 +537,7 @@ + "TARGET_REALLY_IWMMXT" + "wmacsz%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmac")] ++ (set_attr "type" "wmmx_wmac")] + ) + + (define_insn "iwmmxt_wmacu" +@@ -549,7 +548,7 @@ + "TARGET_REALLY_IWMMXT" + "wmacu%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmac")] ++ (set_attr "type" "wmmx_wmac")] + ) + + (define_insn "iwmmxt_wmacuz" +@@ -559,7 +558,7 @@ + "TARGET_REALLY_IWMMXT" + "wmacuz%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmac")] ++ (set_attr "type" "wmmx_wmac")] + ) + + ;; Same as xordi3, but don't show input operands so that we don't think +@@ -570,7 +569,7 @@ + "TARGET_REALLY_IWMMXT" + "wxor%?\\t%0, %0, %0" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wxor")] ++ (set_attr "type" "wmmx_wxor")] + ) + + ;; Seems like cse likes to generate these, so we have to support them. +@@ -584,7 +583,7 @@ + "TARGET_REALLY_IWMMXT" + "wxor%?\\t%0, %0, %0" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wxor")] ++ (set_attr "type" "wmmx_wxor")] + ) + + (define_insn "iwmmxt_clrv4hi" +@@ -594,7 +593,7 @@ + "TARGET_REALLY_IWMMXT" + "wxor%?\\t%0, %0, %0" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wxor")] ++ (set_attr "type" "wmmx_wxor")] + ) + + (define_insn "iwmmxt_clrv2si" +@@ -603,7 +602,7 @@ + "TARGET_REALLY_IWMMXT" + "wxor%?\\t%0, %0, %0" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wxor")] ++ (set_attr "type" "wmmx_wxor")] + ) + + ;; Unsigned averages/sum of absolute differences +@@ -627,7 +626,7 @@ + "TARGET_REALLY_IWMMXT" + "wavg2br%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wavg2")] ++ (set_attr "type" "wmmx_wavg2")] + ) + + (define_insn "iwmmxt_uavgrndv4hi3" +@@ -645,7 +644,7 @@ + "TARGET_REALLY_IWMMXT" + "wavg2hr%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wavg2")] ++ (set_attr "type" "wmmx_wavg2")] + ) + + (define_insn "iwmmxt_uavgv8qi3" +@@ -658,7 +657,7 @@ + "TARGET_REALLY_IWMMXT" + "wavg2b%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wavg2")] ++ (set_attr "type" "wmmx_wavg2")] + ) + + (define_insn "iwmmxt_uavgv4hi3" +@@ -671,7 +670,7 @@ + "TARGET_REALLY_IWMMXT" + "wavg2h%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wavg2")] ++ (set_attr "type" "wmmx_wavg2")] + ) + + ;; Insert/extract/shuffle +@@ -690,7 +689,7 @@ + } + " + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tinsr")] ++ (set_attr "type" "wmmx_tinsr")] + ) + + (define_insn "iwmmxt_tinsrh" +@@ -707,7 +706,7 @@ + } + " + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tinsr")] ++ (set_attr "type" "wmmx_tinsr")] + ) + + (define_insn "iwmmxt_tinsrw" +@@ -724,7 +723,7 @@ + } + " + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tinsr")] ++ (set_attr "type" "wmmx_tinsr")] + ) + + (define_insn "iwmmxt_textrmub" +@@ -735,7 +734,7 @@ + "TARGET_REALLY_IWMMXT" + "textrmub%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "textrm")] ++ (set_attr "type" "wmmx_textrm")] + ) + + (define_insn "iwmmxt_textrmsb" +@@ -746,7 +745,7 @@ + "TARGET_REALLY_IWMMXT" + "textrmsb%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "textrm")] ++ (set_attr "type" "wmmx_textrm")] + ) + + (define_insn "iwmmxt_textrmuh" +@@ -757,7 +756,7 @@ + "TARGET_REALLY_IWMMXT" + "textrmuh%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "textrm")] ++ (set_attr "type" "wmmx_textrm")] + ) + + (define_insn "iwmmxt_textrmsh" +@@ -768,7 +767,7 @@ + "TARGET_REALLY_IWMMXT" + "textrmsh%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "textrm")] ++ (set_attr "type" "wmmx_textrm")] + ) + + ;; There are signed/unsigned variants of this instruction, but they are +@@ -780,7 +779,7 @@ + "TARGET_REALLY_IWMMXT" + "textrmsw%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "textrm")] ++ (set_attr "type" "wmmx_textrm")] + ) + + (define_insn "iwmmxt_wshufh" +@@ -790,7 +789,7 @@ + "TARGET_REALLY_IWMMXT" + "wshufh%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wshufh")] ++ (set_attr "type" "wmmx_wshufh")] + ) + + ;; Mask-generating comparisons +@@ -812,7 +811,7 @@ + "TARGET_REALLY_IWMMXT" + "wcmpeqb%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wcmpeq")] ++ (set_attr "type" "wmmx_wcmpeq")] + ) + + (define_insn "eqv4hi3" +@@ -823,7 +822,7 @@ + "TARGET_REALLY_IWMMXT" + "wcmpeqh%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wcmpeq")] ++ (set_attr "type" "wmmx_wcmpeq")] + ) + + (define_insn "eqv2si3" +@@ -835,7 +834,7 @@ + "TARGET_REALLY_IWMMXT" + "wcmpeqw%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wcmpeq")] ++ (set_attr "type" "wmmx_wcmpeq")] + ) + + (define_insn "gtuv8qi3" +@@ -846,7 +845,7 @@ + "TARGET_REALLY_IWMMXT" + "wcmpgtub%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wcmpgt")] ++ (set_attr "type" "wmmx_wcmpgt")] + ) + + (define_insn "gtuv4hi3" +@@ -857,7 +856,7 @@ + "TARGET_REALLY_IWMMXT" + "wcmpgtuh%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wcmpgt")] ++ (set_attr "type" "wmmx_wcmpgt")] + ) + + (define_insn "gtuv2si3" +@@ -868,7 +867,7 @@ + "TARGET_REALLY_IWMMXT" + "wcmpgtuw%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wcmpgt")] ++ (set_attr "type" "wmmx_wcmpgt")] + ) + + (define_insn "gtv8qi3" +@@ -879,7 +878,7 @@ + "TARGET_REALLY_IWMMXT" + "wcmpgtsb%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wcmpgt")] ++ (set_attr "type" "wmmx_wcmpgt")] + ) + + (define_insn "gtv4hi3" +@@ -890,7 +889,7 @@ + "TARGET_REALLY_IWMMXT" + "wcmpgtsh%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wcmpgt")] ++ (set_attr "type" "wmmx_wcmpgt")] + ) + + (define_insn "gtv2si3" +@@ -901,7 +900,7 @@ + "TARGET_REALLY_IWMMXT" + "wcmpgtsw%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wcmpgt")] ++ (set_attr "type" "wmmx_wcmpgt")] + ) + + ;; Max/min insns +@@ -913,7 +912,7 @@ + "TARGET_REALLY_IWMMXT" + "wmaxs%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmax")] ++ (set_attr "type" "wmmx_wmax")] + ) + + (define_insn "*umax3_iwmmxt" +@@ -923,7 +922,7 @@ + "TARGET_REALLY_IWMMXT" + "wmaxu%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmax")] ++ (set_attr "type" "wmmx_wmax")] + ) + + (define_insn "*smin3_iwmmxt" +@@ -933,7 +932,7 @@ + "TARGET_REALLY_IWMMXT" + "wmins%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmin")] ++ (set_attr "type" "wmmx_wmin")] + ) + + (define_insn "*umin3_iwmmxt" +@@ -943,7 +942,7 @@ + "TARGET_REALLY_IWMMXT" + "wminu%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmin")] ++ (set_attr "type" "wmmx_wmin")] + ) + + ;; Pack/unpack insns. +@@ -956,7 +955,7 @@ + "TARGET_REALLY_IWMMXT" + "wpackhss%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wpack")] ++ (set_attr "type" "wmmx_wpack")] + ) + + (define_insn "iwmmxt_wpackwss" +@@ -967,7 +966,7 @@ + "TARGET_REALLY_IWMMXT" + "wpackwss%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wpack")] ++ (set_attr "type" "wmmx_wpack")] + ) + + (define_insn "iwmmxt_wpackdss" +@@ -978,7 +977,7 @@ + "TARGET_REALLY_IWMMXT" + "wpackdss%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wpack")] ++ (set_attr "type" "wmmx_wpack")] + ) + + (define_insn "iwmmxt_wpackhus" +@@ -989,7 +988,7 @@ + "TARGET_REALLY_IWMMXT" + "wpackhus%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wpack")] ++ (set_attr "type" "wmmx_wpack")] + ) + + (define_insn "iwmmxt_wpackwus" +@@ -1000,7 +999,7 @@ + "TARGET_REALLY_IWMMXT" + "wpackwus%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wpack")] ++ (set_attr "type" "wmmx_wpack")] + ) + + (define_insn "iwmmxt_wpackdus" +@@ -1011,7 +1010,7 @@ + "TARGET_REALLY_IWMMXT" + "wpackdus%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wpack")] ++ (set_attr "type" "wmmx_wpack")] + ) + + (define_insn "iwmmxt_wunpckihb" +@@ -1039,7 +1038,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckihb%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckih")] ++ (set_attr "type" "wmmx_wunpckih")] + ) + + (define_insn "iwmmxt_wunpckihh" +@@ -1059,7 +1058,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckihh%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckih")] ++ (set_attr "type" "wmmx_wunpckih")] + ) + + (define_insn "iwmmxt_wunpckihw" +@@ -1075,7 +1074,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckihw%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckih")] ++ (set_attr "type" "wmmx_wunpckih")] + ) + + (define_insn "iwmmxt_wunpckilb" +@@ -1103,7 +1102,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckilb%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckil")] ++ (set_attr "type" "wmmx_wunpckil")] + ) + + (define_insn "iwmmxt_wunpckilh" +@@ -1123,7 +1122,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckilh%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckil")] ++ (set_attr "type" "wmmx_wunpckil")] + ) + + (define_insn "iwmmxt_wunpckilw" +@@ -1139,7 +1138,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckilw%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckil")] ++ (set_attr "type" "wmmx_wunpckil")] + ) + + (define_insn "iwmmxt_wunpckehub" +@@ -1151,7 +1150,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckehub%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckeh")] ++ (set_attr "type" "wmmx_wunpckeh")] + ) + + (define_insn "iwmmxt_wunpckehuh" +@@ -1162,7 +1161,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckehuh%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckeh")] ++ (set_attr "type" "wmmx_wunpckeh")] + ) + + (define_insn "iwmmxt_wunpckehuw" +@@ -1173,7 +1172,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckehuw%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckeh")] ++ (set_attr "type" "wmmx_wunpckeh")] + ) + + (define_insn "iwmmxt_wunpckehsb" +@@ -1185,7 +1184,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckehsb%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckeh")] ++ (set_attr "type" "wmmx_wunpckeh")] + ) + + (define_insn "iwmmxt_wunpckehsh" +@@ -1196,7 +1195,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckehsh%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckeh")] ++ (set_attr "type" "wmmx_wunpckeh")] + ) + + (define_insn "iwmmxt_wunpckehsw" +@@ -1207,7 +1206,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckehsw%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckeh")] ++ (set_attr "type" "wmmx_wunpckeh")] + ) + + (define_insn "iwmmxt_wunpckelub" +@@ -1219,7 +1218,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckelub%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckel")] ++ (set_attr "type" "wmmx_wunpckel")] + ) + + (define_insn "iwmmxt_wunpckeluh" +@@ -1230,7 +1229,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckeluh%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckel")] ++ (set_attr "type" "wmmx_wunpckel")] + ) + + (define_insn "iwmmxt_wunpckeluw" +@@ -1241,7 +1240,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckeluw%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckel")] ++ (set_attr "type" "wmmx_wunpckel")] + ) + + (define_insn "iwmmxt_wunpckelsb" +@@ -1253,7 +1252,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckelsb%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckel")] ++ (set_attr "type" "wmmx_wunpckel")] + ) + + (define_insn "iwmmxt_wunpckelsh" +@@ -1264,7 +1263,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckelsh%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckel")] ++ (set_attr "type" "wmmx_wunpckel")] + ) + + (define_insn "iwmmxt_wunpckelsw" +@@ -1275,7 +1274,7 @@ + "TARGET_REALLY_IWMMXT" + "wunpckelsw%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wunpckel")] ++ (set_attr "type" "wmmx_wunpckel")] + ) + + ;; Shifts +@@ -1298,7 +1297,7 @@ + " + [(set_attr "predicable" "yes") + (set_attr "arch" "*, iwmmxt2") +- (set_attr "wtype" "wror, wror")] ++ (set_attr "type" "wmmx_wror, wmmx_wror")] + ) + + (define_insn "ashr3_iwmmxt" +@@ -1319,7 +1318,7 @@ + " + [(set_attr "predicable" "yes") + (set_attr "arch" "*, iwmmxt2") +- (set_attr "wtype" "wsra, wsra")] ++ (set_attr "type" "wmmx_wsra, wmmx_wsra")] + ) + + (define_insn "lshr3_iwmmxt" +@@ -1340,7 +1339,7 @@ + " + [(set_attr "predicable" "yes") + (set_attr "arch" "*, iwmmxt2") +- (set_attr "wtype" "wsrl, wsrl")] ++ (set_attr "type" "wmmx_wsrl, wmmx_wsrl")] + ) + + (define_insn "ashl3_iwmmxt" +@@ -1361,7 +1360,7 @@ + " + [(set_attr "predicable" "yes") + (set_attr "arch" "*, iwmmxt2") +- (set_attr "wtype" "wsll, wsll")] ++ (set_attr "type" "wmmx_wsll, wmmx_wsll")] + ) + + (define_insn "ror3_di" +@@ -1382,7 +1381,7 @@ + " + [(set_attr "predicable" "yes") + (set_attr "arch" "*, iwmmxt2") +- (set_attr "wtype" "wror, wror")] ++ (set_attr "type" "wmmx_wror, wmmx_wror")] + ) + + (define_insn "ashr3_di" +@@ -1403,7 +1402,7 @@ + " + [(set_attr "predicable" "yes") + (set_attr "arch" "*, iwmmxt2") +- (set_attr "wtype" "wsra, wsra")] ++ (set_attr "type" "wmmx_wsra, wmmx_wsra")] + ) + + (define_insn "lshr3_di" +@@ -1424,7 +1423,7 @@ + " + [(set_attr "predicable" "yes") + (set_attr "arch" "*, iwmmxt2") +- (set_attr "wtype" "wsrl, wsrl")] ++ (set_attr "type" "wmmx_wsrl, wmmx_wsrl")] + ) + + (define_insn "ashl3_di" +@@ -1445,7 +1444,7 @@ + " + [(set_attr "predicable" "yes") + (set_attr "arch" "*, iwmmxt2") +- (set_attr "wtype" "wsll, wsll")] ++ (set_attr "type" "wmmx_wsll, wmmx_wsll")] + ) + + (define_insn "iwmmxt_wmadds" +@@ -1464,7 +1463,7 @@ + "TARGET_REALLY_IWMMXT" + "wmadds%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmadd")] ++ (set_attr "type" "wmmx_wmadd")] + ) + + (define_insn "iwmmxt_wmaddu" +@@ -1483,7 +1482,7 @@ + "TARGET_REALLY_IWMMXT" + "wmaddu%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmadd")] ++ (set_attr "type" "wmmx_wmadd")] + ) + + (define_insn "iwmmxt_tmia" +@@ -1496,7 +1495,7 @@ + "TARGET_REALLY_IWMMXT" + "tmia%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tmia")] ++ (set_attr "type" "wmmx_tmia")] + ) + + (define_insn "iwmmxt_tmiaph" +@@ -1514,7 +1513,7 @@ + "TARGET_REALLY_IWMMXT" + "tmiaph%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tmiaph")] ++ (set_attr "type" "wmmx_tmiaph")] + ) + + (define_insn "iwmmxt_tmiabb" +@@ -1527,7 +1526,7 @@ + "TARGET_REALLY_IWMMXT" + "tmiabb%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tmiaxy")] ++ (set_attr "type" "wmmx_tmiaxy")] + ) + + (define_insn "iwmmxt_tmiatb" +@@ -1544,7 +1543,7 @@ + "TARGET_REALLY_IWMMXT" + "tmiatb%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tmiaxy")] ++ (set_attr "type" "wmmx_tmiaxy")] + ) + + (define_insn "iwmmxt_tmiabt" +@@ -1561,7 +1560,7 @@ + "TARGET_REALLY_IWMMXT" + "tmiabt%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tmiaxy")] ++ (set_attr "type" "wmmx_tmiaxy")] + ) + + (define_insn "iwmmxt_tmiatt" +@@ -1580,7 +1579,7 @@ + "TARGET_REALLY_IWMMXT" + "tmiatt%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tmiaxy")] ++ (set_attr "type" "wmmx_tmiaxy")] + ) + + (define_insn "iwmmxt_tmovmskb" +@@ -1589,7 +1588,7 @@ + "TARGET_REALLY_IWMMXT" + "tmovmskb%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tmovmsk")] ++ (set_attr "type" "wmmx_tmovmsk")] + ) + + (define_insn "iwmmxt_tmovmskh" +@@ -1598,7 +1597,7 @@ + "TARGET_REALLY_IWMMXT" + "tmovmskh%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tmovmsk")] ++ (set_attr "type" "wmmx_tmovmsk")] + ) + + (define_insn "iwmmxt_tmovmskw" +@@ -1607,7 +1606,7 @@ + "TARGET_REALLY_IWMMXT" + "tmovmskw%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tmovmsk")] ++ (set_attr "type" "wmmx_tmovmsk")] + ) + + (define_insn "iwmmxt_waccb" +@@ -1616,7 +1615,7 @@ + "TARGET_REALLY_IWMMXT" + "waccb%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wacc")] ++ (set_attr "type" "wmmx_wacc")] + ) + + (define_insn "iwmmxt_wacch" +@@ -1625,7 +1624,7 @@ + "TARGET_REALLY_IWMMXT" + "wacch%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wacc")] ++ (set_attr "type" "wmmx_wacc")] + ) + + (define_insn "iwmmxt_waccw" +@@ -1634,7 +1633,7 @@ + "TARGET_REALLY_IWMMXT" + "waccw%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wacc")] ++ (set_attr "type" "wmmx_wacc")] + ) + + ;; use unspec here to prevent 8 * imm to be optimized by cse +@@ -1651,7 +1650,7 @@ + "TARGET_REALLY_IWMMXT" + "waligni%?\\t%0, %1, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "waligni")] ++ (set_attr "type" "wmmx_waligni")] + ) + + (define_insn "iwmmxt_walignr" +@@ -1666,7 +1665,7 @@ + "TARGET_REALLY_IWMMXT" + "walignr%U3%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "walignr")] ++ (set_attr "type" "wmmx_walignr")] + ) + + (define_insn "iwmmxt_walignr0" +@@ -1681,7 +1680,7 @@ + "TARGET_REALLY_IWMMXT" + "walignr0%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "walignr")] ++ (set_attr "type" "wmmx_walignr")] + ) + + (define_insn "iwmmxt_walignr1" +@@ -1696,7 +1695,7 @@ + "TARGET_REALLY_IWMMXT" + "walignr1%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "walignr")] ++ (set_attr "type" "wmmx_walignr")] + ) + + (define_insn "iwmmxt_walignr2" +@@ -1711,7 +1710,7 @@ + "TARGET_REALLY_IWMMXT" + "walignr2%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "walignr")] ++ (set_attr "type" "wmmx_walignr")] + ) + + (define_insn "iwmmxt_walignr3" +@@ -1726,7 +1725,7 @@ + "TARGET_REALLY_IWMMXT" + "walignr3%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "walignr")] ++ (set_attr "type" "wmmx_walignr")] + ) + + (define_insn "iwmmxt_wsadb" +@@ -1738,7 +1737,7 @@ + "TARGET_REALLY_IWMMXT" + "wsadb%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsad")] ++ (set_attr "type" "wmmx_wsad")] + ) + + (define_insn "iwmmxt_wsadh" +@@ -1750,7 +1749,7 @@ + "TARGET_REALLY_IWMMXT" + "wsadh%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsad")] ++ (set_attr "type" "wmmx_wsad")] + ) + + (define_insn "iwmmxt_wsadbz" +@@ -1760,7 +1759,7 @@ + "TARGET_REALLY_IWMMXT" + "wsadbz%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsad")] ++ (set_attr "type" "wmmx_wsad")] + ) + + (define_insn "iwmmxt_wsadhz" +@@ -1770,7 +1769,7 @@ + "TARGET_REALLY_IWMMXT" + "wsadhz%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsad")] ++ (set_attr "type" "wmmx_wsad")] + ) + + (include "iwmmxt2.md") +--- a/src/gcc/config/arm/aarch-common.c ++++ b/src/gcc/config/arm/aarch-common.c +@@ -0,0 +1,356 @@ ++/* Dependency checks for instruction scheduling, shared between ARM and ++ AARCH64. ++ ++ Copyright (C) 1991-2013 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++ ++/* Return nonzero if the CONSUMER instruction (a load) does need ++ PRODUCER's value to calculate the address. */ ++ ++#include "config.h" ++#include "system.h" ++#include "coretypes.h" ++#include "tm.h" ++#include "tm_p.h" ++#include "rtl.h" ++#include "tree.h" ++#include "c-family/c-common.h" ++#include "rtl.h" ++ ++typedef struct ++{ ++ rtx_code search_code; ++ rtx search_result; ++ bool find_any_shift; ++} search_term; ++ ++/* Return TRUE if X is either an arithmetic shift left, or ++ is a multiplication by a power of two. */ ++static bool ++arm_rtx_shift_left_p (rtx x) ++{ ++ enum rtx_code code = GET_CODE (x); ++ ++ if (code == MULT && CONST_INT_P (XEXP (x, 1)) ++ && exact_log2 (INTVAL (XEXP (x, 1))) > 0) ++ return true; ++ ++ if (code == ASHIFT) ++ return true; ++ ++ return false; ++} ++ ++static rtx_code shift_rtx_codes[] = ++ { ASHIFT, ROTATE, ASHIFTRT, LSHIFTRT, ++ ROTATERT, ZERO_EXTEND, SIGN_EXTEND }; ++ ++/* Callback function for arm_find_sub_rtx_with_code. ++ DATA is safe to treat as a SEARCH_TERM, ST. This will ++ hold a SEARCH_CODE. PATTERN is checked to see if it is an ++ RTX with that code. If it is, write SEARCH_RESULT in ST ++ and return 1. Otherwise, or if we have been passed a NULL_RTX ++ return 0. If ST.FIND_ANY_SHIFT then we are interested in ++ anything which can reasonably be described as a SHIFT RTX. */ ++static int ++arm_find_sub_rtx_with_search_term (rtx *pattern, void *data) ++{ ++ search_term *st = (search_term *) data; ++ rtx_code pattern_code; ++ int found = 0; ++ ++ gcc_assert (pattern); ++ gcc_assert (st); ++ ++ /* Poorly formed patterns can really ruin our day. */ ++ if (*pattern == NULL_RTX) ++ return 0; ++ ++ pattern_code = GET_CODE (*pattern); ++ ++ if (st->find_any_shift) ++ { ++ unsigned i = 0; ++ ++ /* Left shifts might have been canonicalized to a MULT of some ++ power of two. Make sure we catch them. */ ++ if (arm_rtx_shift_left_p (*pattern)) ++ found = 1; ++ else ++ for (i = 0; i < ARRAY_SIZE (shift_rtx_codes); i++) ++ if (pattern_code == shift_rtx_codes[i]) ++ found = 1; ++ } ++ ++ if (pattern_code == st->search_code) ++ found = 1; ++ ++ if (found) ++ st->search_result = *pattern; ++ ++ return found; ++} ++ ++/* Traverse PATTERN looking for a sub-rtx with RTX_CODE CODE. */ ++static rtx ++arm_find_sub_rtx_with_code (rtx pattern, rtx_code code, bool find_any_shift) ++{ ++ search_term st; ++ int result = 0; ++ ++ gcc_assert (pattern != NULL_RTX); ++ st.search_code = code; ++ st.search_result = NULL_RTX; ++ st.find_any_shift = find_any_shift; ++ result = for_each_rtx (&pattern, arm_find_sub_rtx_with_search_term, &st); ++ if (result) ++ return st.search_result; ++ else ++ return NULL_RTX; ++} ++ ++/* Traverse PATTERN looking for any sub-rtx which looks like a shift. */ ++static rtx ++arm_find_shift_sub_rtx (rtx pattern) ++{ ++ return arm_find_sub_rtx_with_code (pattern, ASHIFT, true); ++} ++ ++/* PRODUCER and CONSUMER are two potentially dependant RTX. PRODUCER ++ (possibly) contains a SET which will provide a result we can access ++ using the SET_DEST macro. We will place the RTX which would be ++ written by PRODUCER in SET_SOURCE. ++ Similarly, CONSUMER (possibly) contains a SET which has an operand ++ we can access using SET_SRC. We place this operand in ++ SET_DESTINATION. ++ ++ Return nonzero if we found the SET RTX we expected. */ ++static int ++arm_get_set_operands (rtx producer, rtx consumer, ++ rtx *set_source, rtx *set_destination) ++{ ++ rtx set_producer = arm_find_sub_rtx_with_code (producer, SET, false); ++ rtx set_consumer = arm_find_sub_rtx_with_code (consumer, SET, false); ++ ++ if (set_producer && set_consumer) ++ { ++ *set_source = SET_DEST (set_producer); ++ *set_destination = SET_SRC (set_consumer); ++ return 1; ++ } ++ return 0; ++} ++ ++/* Return nonzero if the CONSUMER instruction (a load) does need ++ PRODUCER's value to calculate the address. */ ++int ++arm_early_load_addr_dep (rtx producer, rtx consumer) ++{ ++ rtx value, addr; ++ ++ if (!arm_get_set_operands (producer, consumer, &value, &addr)) ++ return 0; ++ ++ return reg_overlap_mentioned_p (value, addr); ++} ++ ++/* Return nonzero if the CONSUMER instruction (an ALU op) does not ++ have an early register shift value or amount dependency on the ++ result of PRODUCER. */ ++int ++arm_no_early_alu_shift_dep (rtx producer, rtx consumer) ++{ ++ rtx value, op; ++ rtx early_op; ++ ++ if (!arm_get_set_operands (producer, consumer, &value, &op)) ++ return 0; ++ ++ if ((early_op = arm_find_shift_sub_rtx (op))) ++ { ++ if (REG_P (early_op)) ++ early_op = op; ++ ++ return !reg_overlap_mentioned_p (value, early_op); ++ } ++ ++ return 0; ++} ++ ++/* Return nonzero if the CONSUMER instruction (an ALU op) does not ++ have an early register shift value dependency on the result of ++ PRODUCER. */ ++int ++arm_no_early_alu_shift_value_dep (rtx producer, rtx consumer) ++{ ++ rtx value, op; ++ rtx early_op; ++ ++ if (!arm_get_set_operands (producer, consumer, &value, &op)) ++ return 0; ++ ++ if ((early_op = arm_find_shift_sub_rtx (op))) ++ /* We want to check the value being shifted. */ ++ if (!reg_overlap_mentioned_p (value, XEXP (early_op, 0))) ++ return 1; ++ ++ return 0; ++} ++ ++/* Return nonzero if the CONSUMER (a mul or mac op) does not ++ have an early register mult dependency on the result of ++ PRODUCER. */ ++int ++arm_no_early_mul_dep (rtx producer, rtx consumer) ++{ ++ rtx value, op; ++ ++ if (!arm_get_set_operands (producer, consumer, &value, &op)) ++ return 0; ++ ++ if (GET_CODE (op) == PLUS || GET_CODE (op) == MINUS) ++ { ++ if (GET_CODE (XEXP (op, 0)) == MULT) ++ return !reg_overlap_mentioned_p (value, XEXP (op, 0)); ++ else ++ return !reg_overlap_mentioned_p (value, XEXP (op, 1)); ++ } ++ ++ return 0; ++} ++ ++/* Return nonzero if the CONSUMER instruction (a store) does not need ++ PRODUCER's value to calculate the address. */ ++ ++int ++arm_no_early_store_addr_dep (rtx producer, rtx consumer) ++{ ++ rtx value = arm_find_sub_rtx_with_code (producer, SET, false); ++ rtx addr = arm_find_sub_rtx_with_code (consumer, SET, false); ++ ++ if (value) ++ value = SET_DEST (value); ++ ++ if (addr) ++ addr = SET_DEST (addr); ++ ++ if (!value || !addr) ++ return 0; ++ ++ return !reg_overlap_mentioned_p (value, addr); ++} ++ ++/* Return nonzero if the CONSUMER instruction (a store) does need ++ PRODUCER's value to calculate the address. */ ++ ++int ++arm_early_store_addr_dep (rtx producer, rtx consumer) ++{ ++ return !arm_no_early_store_addr_dep (producer, consumer); ++} ++ ++/* Return non-zero iff the consumer (a multiply-accumulate or a ++ multiple-subtract instruction) has an accumulator dependency on the ++ result of the producer and no other dependency on that result. It ++ does not check if the producer is multiply-accumulate instruction. */ ++int ++arm_mac_accumulator_is_result (rtx producer, rtx consumer) ++{ ++ rtx result; ++ rtx op0, op1, acc; ++ ++ producer = PATTERN (producer); ++ consumer = PATTERN (consumer); ++ ++ if (GET_CODE (producer) == COND_EXEC) ++ producer = COND_EXEC_CODE (producer); ++ if (GET_CODE (consumer) == COND_EXEC) ++ consumer = COND_EXEC_CODE (consumer); ++ ++ if (GET_CODE (producer) != SET) ++ return 0; ++ ++ result = XEXP (producer, 0); ++ ++ if (GET_CODE (consumer) != SET) ++ return 0; ++ ++ /* Check that the consumer is of the form ++ (set (...) (plus (mult ...) (...))) ++ or ++ (set (...) (minus (...) (mult ...))). */ ++ if (GET_CODE (XEXP (consumer, 1)) == PLUS) ++ { ++ if (GET_CODE (XEXP (XEXP (consumer, 1), 0)) != MULT) ++ return 0; ++ ++ op0 = XEXP (XEXP (XEXP (consumer, 1), 0), 0); ++ op1 = XEXP (XEXP (XEXP (consumer, 1), 0), 1); ++ acc = XEXP (XEXP (consumer, 1), 1); ++ } ++ else if (GET_CODE (XEXP (consumer, 1)) == MINUS) ++ { ++ if (GET_CODE (XEXP (XEXP (consumer, 1), 1)) != MULT) ++ return 0; ++ ++ op0 = XEXP (XEXP (XEXP (consumer, 1), 1), 0); ++ op1 = XEXP (XEXP (XEXP (consumer, 1), 1), 1); ++ acc = XEXP (XEXP (consumer, 1), 0); ++ } ++ else ++ return 0; ++ ++ return (reg_overlap_mentioned_p (result, acc) ++ && !reg_overlap_mentioned_p (result, op0) ++ && !reg_overlap_mentioned_p (result, op1)); ++} ++ ++/* Return non-zero if the consumer (a multiply-accumulate instruction) ++ has an accumulator dependency on the result of the producer (a ++ multiplication instruction) and no other dependency on that result. */ ++int ++arm_mac_accumulator_is_mul_result (rtx producer, rtx consumer) ++{ ++ rtx mul = PATTERN (producer); ++ rtx mac = PATTERN (consumer); ++ rtx mul_result; ++ rtx mac_op0, mac_op1, mac_acc; ++ ++ if (GET_CODE (mul) == COND_EXEC) ++ mul = COND_EXEC_CODE (mul); ++ if (GET_CODE (mac) == COND_EXEC) ++ mac = COND_EXEC_CODE (mac); ++ ++ /* Check that mul is of the form (set (...) (mult ...)) ++ and mla is of the form (set (...) (plus (mult ...) (...))). */ ++ if ((GET_CODE (mul) != SET || GET_CODE (XEXP (mul, 1)) != MULT) ++ || (GET_CODE (mac) != SET || GET_CODE (XEXP (mac, 1)) != PLUS ++ || GET_CODE (XEXP (XEXP (mac, 1), 0)) != MULT)) ++ return 0; ++ ++ mul_result = XEXP (mul, 0); ++ mac_op0 = XEXP (XEXP (XEXP (mac, 1), 0), 0); ++ mac_op1 = XEXP (XEXP (XEXP (mac, 1), 0), 1); ++ mac_acc = XEXP (XEXP (mac, 1), 1); ++ ++ return (reg_overlap_mentioned_p (mul_result, mac_acc) ++ && !reg_overlap_mentioned_p (mul_result, mac_op0) ++ && !reg_overlap_mentioned_p (mul_result, mac_op1)); ++} +--- a/src/gcc/config/arm/cortex-a53.md ++++ b/src/gcc/config/arm/cortex-a53.md +@@ -0,0 +1,309 @@ ++;; ARM Cortex-A53 pipeline description ++;; Copyright (C) 2013 Free Software Foundation, Inc. ++;; ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_automaton "cortex_a53") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Functional units. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++;; There are two main integer execution pipelines, described as ++;; slot 0 and issue slot 1. ++ ++(define_cpu_unit "cortex_a53_slot0" "cortex_a53") ++(define_cpu_unit "cortex_a53_slot1" "cortex_a53") ++ ++(define_reservation "cortex_a53_slot_any" "cortex_a53_slot0|cortex_a53_slot1") ++(define_reservation "cortex_a53_single_issue" "cortex_a53_slot0+cortex_a53_slot1") ++ ++;; The load/store pipeline. Load/store instructions can dual-issue from ++;; either pipeline, but two load/stores cannot simultaneously issue. ++ ++(define_cpu_unit "cortex_a53_ls" "cortex_a53") ++ ++;; The store pipeline. Shared between both execution pipelines. ++ ++(define_cpu_unit "cortex_a53_store" "cortex_a53") ++ ++;; The branch pipeline. Branches can dual-issue with other instructions ++;; (except when those instructions take multiple cycles to issue). ++ ++(define_cpu_unit "cortex_a53_branch" "cortex_a53") ++ ++;; The integer divider. ++ ++(define_cpu_unit "cortex_a53_idiv" "cortex_a53") ++ ++;; The floating-point add pipeline used to model the usage ++;; of the add pipeline by fmac instructions. ++ ++(define_cpu_unit "cortex_a53_fpadd_pipe" "cortex_a53") ++ ++;; Floating-point div/sqrt (long latency, out-of-order completion). ++ ++(define_cpu_unit "cortex_a53_fp_div_sqrt" "cortex_a53") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; ALU instructions. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++(define_insn_reservation "cortex_a53_alu" 2 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,csel,rev,\ ++ shift_imm,shift_reg,\ ++ mov_imm,mov_reg,mvn_imm,mvn_reg,\ ++ mrs,multiple,no_insn")) ++ "cortex_a53_slot_any") ++ ++(define_insn_reservation "cortex_a53_alu_shift" 2 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ extend,mov_shift,mov_shift_reg,\ ++ mvn_shift,mvn_shift_reg")) ++ "cortex_a53_slot_any") ++ ++;; Forwarding path for unshifted operands. ++ ++(define_bypass 1 "cortex_a53_alu,cortex_a53_alu_shift" ++ "cortex_a53_alu") ++ ++(define_bypass 1 "cortex_a53_alu,cortex_a53_alu_shift" ++ "cortex_a53_alu_shift" ++ "arm_no_early_alu_shift_dep") ++ ++;; The multiplier pipeline can forward results so there's no need to specify ++;; bypasses. Multiplies can only single-issue currently. ++ ++(define_insn_reservation "cortex_a53_mul" 3 ++ (and (eq_attr "tune" "cortexa53") ++ (ior (eq_attr "mul32" "yes") ++ (eq_attr "mul64" "yes"))) ++ "cortex_a53_single_issue") ++ ++;; A multiply with a single-register result or an MLA, followed by an ++;; MLA with an accumulator dependency, has its result forwarded so two ++;; such instructions can issue back-to-back. ++ ++(define_bypass 1 "cortex_a53_mul" ++ "cortex_a53_mul" ++ "arm_mac_accumulator_is_mul_result") ++ ++;; Punt with a high enough latency for divides. ++(define_insn_reservation "cortex_a53_udiv" 8 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "udiv")) ++ "(cortex_a53_slot0+cortex_a53_idiv),cortex_a53_idiv*7") ++ ++(define_insn_reservation "cortex_a53_sdiv" 9 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "sdiv")) ++ "(cortex_a53_slot0+cortex_a53_idiv),cortex_a53_idiv*8") ++ ++ ++(define_bypass 2 "cortex_a53_mul,cortex_a53_udiv,cortex_a53_sdiv" ++ "cortex_a53_alu") ++(define_bypass 2 "cortex_a53_mul,cortex_a53_udiv,cortex_a53_sdiv" ++ "cortex_a53_alu_shift" ++ "arm_no_early_alu_shift_dep") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Load/store instructions. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++;; Address-generation happens in the issue stage. ++ ++(define_insn_reservation "cortex_a53_load1" 3 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "load_byte,load1,load_acq")) ++ "cortex_a53_slot_any+cortex_a53_ls") ++ ++(define_insn_reservation "cortex_a53_store1" 2 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "store1,store_rel")) ++ "cortex_a53_slot_any+cortex_a53_ls+cortex_a53_store") ++ ++(define_insn_reservation "cortex_a53_load2" 3 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "load2")) ++ "cortex_a53_single_issue+cortex_a53_ls") ++ ++(define_insn_reservation "cortex_a53_store2" 2 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "store2")) ++ "cortex_a53_single_issue+cortex_a53_ls+cortex_a53_store") ++ ++(define_insn_reservation "cortex_a53_load3plus" 4 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "load3,load4")) ++ "(cortex_a53_single_issue+cortex_a53_ls)*2") ++ ++(define_insn_reservation "cortex_a53_store3plus" 3 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "store3,store4")) ++ "(cortex_a53_single_issue+cortex_a53_ls+cortex_a53_store)*2") ++ ++;; Load/store addresses are required early in Issue. ++(define_bypass 3 "cortex_a53_load1,cortex_a53_load2,cortex_a53_load3plus,cortex_a53_alu,cortex_a53_alu_shift" ++ "cortex_a53_load*" ++ "arm_early_load_addr_dep") ++(define_bypass 3 "cortex_a53_load1,cortex_a53_load2,cortex_a53_load3plus,cortex_a53_alu,cortex_a53_alu_shift" ++ "cortex_a53_store*" ++ "arm_early_store_addr_dep") ++ ++;; Load data can forward in the ALU pipeline ++(define_bypass 2 "cortex_a53_load1,cortex_a53_load2" ++ "cortex_a53_alu") ++(define_bypass 2 "cortex_a53_load1,cortex_a53_load2" ++ "cortex_a53_alu_shift" ++ "arm_no_early_alu_shift_dep") ++ ++;; ALU ops can forward to stores. ++(define_bypass 0 "cortex_a53_alu,cortex_a53_alu_shift" ++ "cortex_a53_store1,cortex_a53_store2,cortex_a53_store3plus" ++ "arm_no_early_store_addr_dep") ++ ++(define_bypass 1 "cortex_a53_mul,cortex_a53_udiv,cortex_a53_sdiv,cortex_a53_load1,cortex_a53_load2,cortex_a53_load3plus" ++ "cortex_a53_store1,cortex_a53_store2,cortex_a53_store3plus" ++ "arm_no_early_store_addr_dep") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Branches. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++;; Currently models all branches as dual-issuable from either execution ++;; slot, which isn't true for all cases. We still need to model indirect ++;; branches. ++ ++(define_insn_reservation "cortex_a53_branch" 0 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "branch,call")) ++ "cortex_a53_slot_any+cortex_a53_branch") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Floating-point arithmetic. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++(define_insn_reservation "cortex_a53_fpalu" 4 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fmov, fmuls,\ ++ f_cvt,f_cvtf2i,f_cvti2f,\ ++ fcmps, fcmpd, fcsel")) ++ "cortex_a53_slot0+cortex_a53_fpadd_pipe") ++ ++(define_insn_reservation "cortex_a53_fconst" 2 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "fconsts,fconstd")) ++ "cortex_a53_slot0+cortex_a53_fpadd_pipe") ++ ++(define_insn_reservation "cortex_a53_fpmul" 4 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "fmuls,fmuld")) ++ "cortex_a53_slot0") ++ ++;; For single-precision multiply-accumulate, the add (accumulate) is issued after ++;; the multiply completes. Model that accordingly. ++ ++(define_insn_reservation "cortex_a53_fpmac" 8 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "fmacs,fmacd,ffmas,ffmad")) ++ "cortex_a53_slot0, nothing*3, cortex_a53_fpadd_pipe") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Floating-point divide/square root instructions. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; fsqrt really takes one cycle less, but that is not modelled. ++ ++(define_insn_reservation "cortex_a53_fdivs" 14 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "fdivs, fsqrts")) ++ "cortex_a53_slot0, cortex_a53_fp_div_sqrt * 13") ++ ++(define_insn_reservation "cortex_a53_fdivd" 29 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "fdivd, fsqrtd")) ++ "cortex_a53_slot0, cortex_a53_fp_div_sqrt * 28") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; VFP to/from core transfers. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++(define_insn_reservation "cortex_a53_r2f" 4 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "f_mcr,f_mcrr")) ++ "cortex_a53_slot0") ++ ++(define_insn_reservation "cortex_a53_f2r" 2 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "f_mrc,f_mrrc")) ++ "cortex_a53_slot0") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; VFP flag transfer. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++(define_insn_reservation "cortex_a53_f_flags" 4 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "f_flag")) ++ "cortex_a53_slot0") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; VFP load/store. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++(define_insn_reservation "cortex_a53_f_loads" 4 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "f_loads")) ++ "cortex_a53_slot0") ++ ++(define_insn_reservation "cortex_a53_f_loadd" 5 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "f_loadd")) ++ "cortex_a53_slot0") ++ ++(define_insn_reservation "cortex_a53_f_stores" 0 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "f_stores")) ++ "cortex_a53_slot0") ++ ++(define_insn_reservation "cortex_a53_f_stored" 0 ++ (and (eq_attr "tune" "cortexa53") ++ (eq_attr "type" "f_stored")) ++ "cortex_a53_slot0") ++ ++;; Load-to-use for floating-point values has a penalty of one cycle, ++;; i.e. a latency of two. ++ ++(define_bypass 2 "cortex_a53_f_loads" ++ "cortex_a53_fpalu, cortex_a53_fpmac, cortex_a53_fpmul,\ ++ cortex_a53_fdivs, cortex_a53_fdivd,\ ++ cortex_a53_f2r") ++ ++(define_bypass 2 "cortex_a53_f_loadd" ++ "cortex_a53_fpalu, cortex_a53_fpmac, cortex_a53_fpmul,\ ++ cortex_a53_fdivs, cortex_a53_fdivd,\ ++ cortex_a53_f2r") ++ +--- a/src/gcc/config/arm/cortex-r4f.md ++++ b/src/gcc/config/arm/cortex-r4f.md +@@ -48,7 +48,7 @@ + + (define_insn_reservation "cortex_r4_fcpys" 2 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "fcpys")) ++ (eq_attr "type" "fmov")) + "cortex_r4_issue_ab") + + (define_insn_reservation "cortex_r4_ffariths" 2 +@@ -68,7 +68,7 @@ + + (define_insn_reservation "cortex_r4_fdivs" 17 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "fdivs")) ++ (eq_attr "type" "fdivs, fsqrts")) + "cortex_r4_issue_ab+cortex_r4_v1,cortex_r4_issue_a+cortex_r4_v1") + + (define_insn_reservation "cortex_r4_floads" 2 +@@ -83,12 +83,12 @@ + + (define_insn_reservation "cortex_r4_mcr" 2 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "r_2_f")) ++ (eq_attr "type" "f_mcr,f_mcrr")) + "cortex_r4_issue_ab") + + (define_insn_reservation "cortex_r4_mrc" 3 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "f_2_r")) ++ (eq_attr "type" "f_mrc,f_mrrc")) + "cortex_r4_issue_ab") + + ;; Bypasses for normal (not early) regs. +@@ -131,7 +131,7 @@ + ;; out of order. Chances are this is not a pipelined operation. + (define_insn_reservation "cortex_r4_fdivd" 97 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "fdivd")) ++ (eq_attr "type" "fdivd, fsqrtd")) + "cortex_r4_single_issue*3") + + (define_insn_reservation "cortex_r4_ffarithd" 2 +@@ -146,7 +146,7 @@ + + (define_insn_reservation "cortex_r4_f_cvt" 8 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "f_cvt")) ++ (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f")) + "cortex_r4_single_issue*3") + + (define_insn_reservation "cortex_r4_f_memd" 8 +--- a/src/gcc/config/arm/bpabi.h ++++ b/src/gcc/config/arm/bpabi.h +@@ -60,6 +60,7 @@ + |mcpu=cortex-a7 \ + |mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15 \ + |mcpu=marvell-pj4 \ ++ |mcpu=cortex-a53 \ + |mcpu=generic-armv7-a \ + |march=armv7-m|mcpu=cortex-m3 \ + |march=armv7e-m|mcpu=cortex-m4 \ +@@ -71,6 +72,7 @@ + " %{mbig-endian:%{march=armv7-a|mcpu=cortex-a5 \ + |mcpu=cortex-a7 \ + |mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15 \ ++ |mcpu=cortex-a53 \ + |mcpu=marvell-pj4 \ + |mcpu=generic-armv7-a \ + |march=armv7-m|mcpu=cortex-m3 \ +--- a/src/gcc/config/arm/marvell-f-iwmmxt.md ++++ b/src/gcc/config/arm/marvell-f-iwmmxt.md +@@ -63,52 +63,62 @@ + ;; An attribute appended to instructions for classification + + (define_attr "wmmxt_shift" "yes,no" +- (if_then_else (eq_attr "wtype" "wror, wsll, wsra, wsrl") ++ (if_then_else (eq_attr "type" "wmmx_wror, wmmx_wsll, wmmx_wsra, wmmx_wsrl") + (const_string "yes") (const_string "no")) + ) + + (define_attr "wmmxt_pack" "yes,no" +- (if_then_else (eq_attr "wtype" "waligni, walignr, wmerge, wpack, wshufh, wunpckeh, wunpckih, wunpckel, wunpckil") ++ (if_then_else (eq_attr "type" "wmmx_waligni, wmmx_walignr, wmmx_wmerge,\ ++ wmmx_wpack, wmmx_wshufh, wmmx_wunpckeh,\ ++ wmmx_wunpckih, wmmx_wunpckel, wmmx_wunpckil") + (const_string "yes") (const_string "no")) + ) + + (define_attr "wmmxt_mult_c1" "yes,no" +- (if_then_else (eq_attr "wtype" "wmac, wmadd, wmiaxy, wmiawxy, wmulw, wqmiaxy, wqmulwm") ++ (if_then_else (eq_attr "type" "wmmx_wmac, wmmx_wmadd, wmmx_wmiaxy,\ ++ wmmx_wmiawxy, wmmx_wmulw, wmmx_wqmiaxy,\ ++ wmmx_wqmulwm") + (const_string "yes") (const_string "no")) + ) + + (define_attr "wmmxt_mult_c2" "yes,no" +- (if_then_else (eq_attr "wtype" "wmul, wqmulm") ++ (if_then_else (eq_attr "type" "wmmx_wmul, wmmx_wqmulm") + (const_string "yes") (const_string "no")) + ) + + (define_attr "wmmxt_alu_c1" "yes,no" +- (if_then_else (eq_attr "wtype" "wabs, wabsdiff, wand, wandn, wmov, wor, wxor") ++ (if_then_else (eq_attr "type" "wmmx_wabs, wmmx_wabsdiff, wmmx_wand,\ ++ wmmx_wandn, wmmx_wmov, wmmx_wor, wmmx_wxor") + (const_string "yes") (const_string "no")) + ) + + (define_attr "wmmxt_alu_c2" "yes,no" +- (if_then_else (eq_attr "wtype" "wacc, wadd, waddsubhx, wavg2, wavg4, wcmpeq, wcmpgt, wmax, wmin, wsub, waddbhus, wsubaddhx") ++ (if_then_else (eq_attr "type" "wmmx_wacc, wmmx_wadd, wmmx_waddsubhx,\ ++ wmmx_wavg2, wmmx_wavg4, wmmx_wcmpeq,\ ++ wmmx_wcmpgt, wmmx_wmax, wmmx_wmin,\ ++ wmmx_wsub, wmmx_waddbhus, wmmx_wsubaddhx") + (const_string "yes") (const_string "no")) + ) + + (define_attr "wmmxt_alu_c3" "yes,no" +- (if_then_else (eq_attr "wtype" "wsad") ++ (if_then_else (eq_attr "type" "wmmx_wsad") + (const_string "yes") (const_string "no")) + ) + + (define_attr "wmmxt_transfer_c1" "yes,no" +- (if_then_else (eq_attr "wtype" "tbcst, tinsr, tmcr, tmcrr") ++ (if_then_else (eq_attr "type" "wmmx_tbcst, wmmx_tinsr,\ ++ wmmx_tmcr, wmmx_tmcrr") + (const_string "yes") (const_string "no")) + ) + + (define_attr "wmmxt_transfer_c2" "yes,no" +- (if_then_else (eq_attr "wtype" "textrm, tmovmsk, tmrc, tmrrc") ++ (if_then_else (eq_attr "type" "wmmx_textrm, wmmx_tmovmsk,\ ++ wmmx_tmrc, wmmx_tmrrc") + (const_string "yes") (const_string "no")) + ) + + (define_attr "wmmxt_transfer_c3" "yes,no" +- (if_then_else (eq_attr "wtype" "tmia, tmiaph, tmiaxy") ++ (if_then_else (eq_attr "type" "wmmx_tmia, wmmx_tmiaph, wmmx_tmiaxy") + (const_string "yes") (const_string "no")) + ) + +@@ -169,11 +179,11 @@ + + (define_insn_reservation "marvell_f_iwmmxt_wstr" 0 + (and (eq_attr "marvell_f_iwmmxt" "yes") +- (eq_attr "wtype" "wstr")) ++ (eq_attr "type" "wmmx_wstr")) + "mf_iwmmxt_pipeline") + + ;There is a forwarding path from MW stage + (define_insn_reservation "marvell_f_iwmmxt_wldr" 5 + (and (eq_attr "marvell_f_iwmmxt" "yes") +- (eq_attr "wtype" "wldr")) ++ (eq_attr "type" "wmmx_wldr")) + "mf_iwmmxt_pipeline") +--- a/src/gcc/config/arm/t-mlibs ++++ b/src/gcc/config/arm/t-mlibs +@@ -0,0 +1,21 @@ ++# A set of predefined MULTILIB for different ARM targets. ++# Through the configure option --with-multilib-list, user can customize the ++# final MULTILIB implementation. ++ ++comma := , ++space := ++space += ++ ++MULTILIB_OPTIONS = marm ++MULTILIB_DIRNAMES = arm ++MULTILIB_OPTIONS += march=armv4t ++MULTILIB_DIRNAMES += armv4t ++MULTILIB_OPTIONS += mfloat-abi=soft ++MULTILIB_DIRNAMES += soft ++ ++MULTILIB_EXCEPTIONS = ++ ++MULTILIB_REQUIRED = marm/march=armv4t/mfloat-abi=soft ++ ++MULTILIB_OSDIRNAMES = marm/march.armv4t/mfloat-abi.soft=!arm-linux-gnueabi ++ +--- a/src/gcc/config/arm/iterators.md ++++ b/src/gcc/config/arm/iterators.md +@@ -201,6 +201,20 @@ + (define_int_iterator NEON_VRINT [UNSPEC_NVRINTP UNSPEC_NVRINTZ UNSPEC_NVRINTM + UNSPEC_NVRINTX UNSPEC_NVRINTA UNSPEC_NVRINTN]) + ++(define_int_iterator CRC [UNSPEC_CRC32B UNSPEC_CRC32H UNSPEC_CRC32W ++ UNSPEC_CRC32CB UNSPEC_CRC32CH UNSPEC_CRC32CW]) ++ ++(define_int_iterator CRYPTO_UNARY [UNSPEC_AESMC UNSPEC_AESIMC]) ++ ++(define_int_iterator CRYPTO_BINARY [UNSPEC_AESD UNSPEC_AESE ++ UNSPEC_SHA1SU1 UNSPEC_SHA256SU0]) ++ ++(define_int_iterator CRYPTO_TERNARY [UNSPEC_SHA1SU0 UNSPEC_SHA256H ++ UNSPEC_SHA256H2 UNSPEC_SHA256SU1]) ++ ++(define_int_iterator CRYPTO_SELECTING [UNSPEC_SHA1C UNSPEC_SHA1M ++ UNSPEC_SHA1P]) ++ + ;;---------------------------------------------------------------------------- + ;; Mode attributes + ;;---------------------------------------------------------------------------- +@@ -355,6 +369,12 @@ + (DI "64") (V2DI "64") + (V2SF "32") (V4SF "32")]) + ++(define_mode_attr V_elem_ch [(V8QI "b") (V16QI "b") ++ (V4HI "h") (V8HI "h") ++ (V2SI "s") (V4SI "s") ++ (DI "d") (V2DI "d") ++ (V2SF "s") (V4SF "s")]) ++ + ;; Element sizes for duplicating ARM registers to all elements of a vector. + (define_mode_attr VD_dup [(V8QI "8") (V4HI "16") (V2SI "32") (V2SF "32")]) + +@@ -391,7 +411,7 @@ + (define_mode_attr scalar_mul_constraint [(V4HI "x") (V2SI "t") (V2SF "t") + (V8HI "x") (V4SI "t") (V4SF "t")]) + +-;; Predicates used for setting neon_type ++;; Predicates used for setting type for neon instructions + + (define_mode_attr Is_float_mode [(V8QI "false") (V16QI "false") + (V4HI "false") (V8HI "false") +@@ -452,6 +472,14 @@ + (define_mode_attr vfp_type [(SF "s") (DF "d")]) + (define_mode_attr vfp_double_cond [(SF "") (DF "&& TARGET_VFP_DOUBLE")]) + ++;; Mode attribute used to build the "type" attribute. ++(define_mode_attr q [(V8QI "") (V16QI "_q") ++ (V4HI "") (V8HI "_q") ++ (V2SI "") (V4SI "_q") ++ (V2SF "") (V4SF "_q") ++ (DI "") (V2DI "_q") ++ (DF "") (V2DF "_q")]) ++ + ;;---------------------------------------------------------------------------- + ;; Code attributes + ;;---------------------------------------------------------------------------- +@@ -460,6 +488,10 @@ + (define_code_attr VQH_mnem [(plus "vadd") (smin "vmin") (smax "vmax") + (umin "vmin") (umax "vmax")]) + ++;; Type attributes for vqh_ops and vqhs_ops iterators. ++(define_code_attr VQH_type [(plus "add") (smin "minmax") (smax "minmax") ++ (umin "minmax") (umax "minmax")]) ++ + ;; Signs of above, where relevant. + (define_code_attr VQH_sign [(plus "i") (smin "s") (smax "s") (umin "u") + (umax "u")]) +@@ -500,3 +532,54 @@ + (define_int_attr nvrint_variant [(UNSPEC_NVRINTZ "z") (UNSPEC_NVRINTP "p") + (UNSPEC_NVRINTA "a") (UNSPEC_NVRINTM "m") + (UNSPEC_NVRINTX "x") (UNSPEC_NVRINTN "n")]) ++ ++(define_int_attr crc_variant [(UNSPEC_CRC32B "crc32b") (UNSPEC_CRC32H "crc32h") ++ (UNSPEC_CRC32W "crc32w") (UNSPEC_CRC32CB "crc32cb") ++ (UNSPEC_CRC32CH "crc32ch") (UNSPEC_CRC32CW "crc32cw")]) ++ ++(define_int_attr crc_mode [(UNSPEC_CRC32B "QI") (UNSPEC_CRC32H "HI") ++ (UNSPEC_CRC32W "SI") (UNSPEC_CRC32CB "QI") ++ (UNSPEC_CRC32CH "HI") (UNSPEC_CRC32CW "SI")]) ++ ++(define_int_attr crypto_pattern [(UNSPEC_SHA1H "sha1h") (UNSPEC_AESMC "aesmc") ++ (UNSPEC_AESIMC "aesimc") (UNSPEC_AESD "aesd") ++ (UNSPEC_AESE "aese") (UNSPEC_SHA1SU1 "sha1su1") ++ (UNSPEC_SHA256SU0 "sha256su0") (UNSPEC_SHA1C "sha1c") ++ (UNSPEC_SHA1M "sha1m") (UNSPEC_SHA1P "sha1p") ++ (UNSPEC_SHA1SU0 "sha1su0") (UNSPEC_SHA256H "sha256h") ++ (UNSPEC_SHA256H2 "sha256h2") ++ (UNSPEC_SHA256SU1 "sha256su1")]) ++ ++(define_int_attr crypto_type ++ [(UNSPEC_AESE "crypto_aes") (UNSPEC_AESD "crypto_aes") ++ (UNSPEC_AESMC "crypto_aes") (UNSPEC_AESIMC "crypto_aes") ++ (UNSPEC_SHA1C "crypto_sha1_slow") (UNSPEC_SHA1P "crypto_sha1_slow") ++ (UNSPEC_SHA1M "crypto_sha1_slow") (UNSPEC_SHA1SU1 "crypto_sha1_fast") ++ (UNSPEC_SHA1SU0 "crypto_sha1_xor") (UNSPEC_SHA256H "crypto_sha256_slow") ++ (UNSPEC_SHA256H2 "crypto_sha256_slow") (UNSPEC_SHA256SU0 "crypto_sha256_fast") ++ (UNSPEC_SHA256SU1 "crypto_sha256_slow")]) ++ ++(define_int_attr crypto_size_sfx [(UNSPEC_SHA1H "32") (UNSPEC_AESMC "8") ++ (UNSPEC_AESIMC "8") (UNSPEC_AESD "8") ++ (UNSPEC_AESE "8") (UNSPEC_SHA1SU1 "32") ++ (UNSPEC_SHA256SU0 "32") (UNSPEC_SHA1C "32") ++ (UNSPEC_SHA1M "32") (UNSPEC_SHA1P "32") ++ (UNSPEC_SHA1SU0 "32") (UNSPEC_SHA256H "32") ++ (UNSPEC_SHA256H2 "32") (UNSPEC_SHA256SU1 "32")]) ++ ++(define_int_attr crypto_mode [(UNSPEC_SHA1H "V4SI") (UNSPEC_AESMC "V16QI") ++ (UNSPEC_AESIMC "V16QI") (UNSPEC_AESD "V16QI") ++ (UNSPEC_AESE "V16QI") (UNSPEC_SHA1SU1 "V4SI") ++ (UNSPEC_SHA256SU0 "V4SI") (UNSPEC_SHA1C "V4SI") ++ (UNSPEC_SHA1M "V4SI") (UNSPEC_SHA1P "V4SI") ++ (UNSPEC_SHA1SU0 "V4SI") (UNSPEC_SHA256H "V4SI") ++ (UNSPEC_SHA256H2 "V4SI") (UNSPEC_SHA256SU1 "V4SI")]) ++ ++;; Both kinds of return insn. ++(define_code_iterator returns [return simple_return]) ++(define_code_attr return_str [(return "") (simple_return "simple_")]) ++(define_code_attr return_simple_p [(return "false") (simple_return "true")]) ++(define_code_attr return_cond_false [(return " && USE_RETURN_INSN (FALSE)") ++ (simple_return " && use_simple_return_p ()")]) ++(define_code_attr return_cond_true [(return " && USE_RETURN_INSN (TRUE)") ++ (simple_return " && use_simple_return_p ()")]) +--- a/src/gcc/config/arm/sync.md ++++ b/src/gcc/config/arm/sync.md +@@ -65,6 +65,42 @@ + (set_attr "conds" "unconditional") + (set_attr "predicable" "no")]) + ++(define_insn "atomic_load" ++ [(set (match_operand:QHSI 0 "register_operand" "=r") ++ (unspec_volatile:QHSI ++ [(match_operand:QHSI 1 "arm_sync_memory_operand" "Q") ++ (match_operand:SI 2 "const_int_operand")] ;; model ++ VUNSPEC_LDA))] ++ "TARGET_HAVE_LDACQ" ++ { ++ enum memmodel model = (enum memmodel) INTVAL (operands[2]); ++ if (model == MEMMODEL_RELAXED ++ || model == MEMMODEL_CONSUME ++ || model == MEMMODEL_RELEASE) ++ return \"ldr\\t%0, %1\"; ++ else ++ return \"lda\\t%0, %1\"; ++ } ++) ++ ++(define_insn "atomic_store" ++ [(set (match_operand:QHSI 0 "memory_operand" "=Q") ++ (unspec_volatile:QHSI ++ [(match_operand:QHSI 1 "general_operand" "r") ++ (match_operand:SI 2 "const_int_operand")] ;; model ++ VUNSPEC_STL))] ++ "TARGET_HAVE_LDACQ" ++ { ++ enum memmodel model = (enum memmodel) INTVAL (operands[2]); ++ if (model == MEMMODEL_RELAXED ++ || model == MEMMODEL_CONSUME ++ || model == MEMMODEL_ACQUIRE) ++ return \"str\t%1, %0\"; ++ else ++ return \"stl\t%1, %0\"; ++ } ++) ++ + ;; Note that ldrd and vldr are *not* guaranteed to be single-copy atomic, + ;; even for a 64-bit aligned address. Instead we use a ldrexd unparied + ;; with a store. +@@ -88,7 +124,8 @@ + UNSPEC_LL))] + "TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN" + "ldrexd%?\t%0, %H0, %C1" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_expand "atomic_compare_and_swap" + [(match_operand:SI 0 "s_register_operand" "") ;; bool out +@@ -325,8 +362,20 @@ + VUNSPEC_LL)))] + "TARGET_HAVE_LDREXBH" + "ldrex%?\t%0, %C1" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + ++(define_insn "arm_load_acquire_exclusive" ++ [(set (match_operand:SI 0 "s_register_operand" "=r") ++ (zero_extend:SI ++ (unspec_volatile:NARROW ++ [(match_operand:NARROW 1 "mem_noofs_operand" "Ua")] ++ VUNSPEC_LAX)))] ++ "TARGET_HAVE_LDACQ" ++ "ldaex%?\\t%0, %C1" ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) ++ + (define_insn "arm_load_exclusivesi" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (unspec_volatile:SI +@@ -334,8 +383,19 @@ + VUNSPEC_LL))] + "TARGET_HAVE_LDREX" + "ldrex%?\t%0, %C1" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + ++(define_insn "arm_load_acquire_exclusivesi" ++ [(set (match_operand:SI 0 "s_register_operand" "=r") ++ (unspec_volatile:SI ++ [(match_operand:SI 1 "mem_noofs_operand" "Ua")] ++ VUNSPEC_LAX))] ++ "TARGET_HAVE_LDACQ" ++ "ldaex%?\t%0, %C1" ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) ++ + (define_insn "arm_load_exclusivedi" + [(set (match_operand:DI 0 "s_register_operand" "=r") + (unspec_volatile:DI +@@ -343,8 +403,19 @@ + VUNSPEC_LL))] + "TARGET_HAVE_LDREXD" + "ldrexd%?\t%0, %H0, %C1" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + ++(define_insn "arm_load_acquire_exclusivedi" ++ [(set (match_operand:DI 0 "s_register_operand" "=r") ++ (unspec_volatile:DI ++ [(match_operand:DI 1 "mem_noofs_operand" "Ua")] ++ VUNSPEC_LAX))] ++ "TARGET_HAVE_LDACQ && ARM_DOUBLEWORD_ALIGN" ++ "ldaexd%?\t%0, %H0, %C1" ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) ++ + (define_insn "arm_store_exclusive" + [(set (match_operand:SI 0 "s_register_operand" "=&r") + (unspec_volatile:SI [(const_int 0)] VUNSPEC_SC)) +@@ -367,4 +438,35 @@ + } + return "strex%?\t%0, %2, %C1"; + } +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) ++ ++(define_insn "arm_store_release_exclusivedi" ++ [(set (match_operand:SI 0 "s_register_operand" "=&r") ++ (unspec_volatile:SI [(const_int 0)] VUNSPEC_SLX)) ++ (set (match_operand:DI 1 "mem_noofs_operand" "=Ua") ++ (unspec_volatile:DI ++ [(match_operand:DI 2 "s_register_operand" "r")] ++ VUNSPEC_SLX))] ++ "TARGET_HAVE_LDACQ && ARM_DOUBLEWORD_ALIGN" ++ { ++ rtx value = operands[2]; ++ /* See comment in arm_store_exclusive above. */ ++ gcc_assert ((REGNO (value) & 1) == 0 || TARGET_THUMB2); ++ operands[3] = gen_rtx_REG (SImode, REGNO (value) + 1); ++ return "stlexd%?\t%0, %2, %3, %C1"; ++ } ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) ++ ++(define_insn "arm_store_release_exclusive" ++ [(set (match_operand:SI 0 "s_register_operand" "=&r") ++ (unspec_volatile:SI [(const_int 0)] VUNSPEC_SLX)) ++ (set (match_operand:QHSI 1 "mem_noofs_operand" "=Ua") ++ (unspec_volatile:QHSI ++ [(match_operand:QHSI 2 "s_register_operand" "r")] ++ VUNSPEC_SLX))] ++ "TARGET_HAVE_LDACQ" ++ "stlex%?\t%0, %2, %C1" ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) +--- a/src/gcc/config/arm/fa726te.md ++++ b/src/gcc/config/arm/fa726te.md +@@ -78,7 +78,8 @@ + ;; Move instructions. + (define_insn_reservation "726te_shift_op" 1 + (and (eq_attr "tune" "fa726te") +- (eq_attr "insn" "mov,mvn")) ++ (eq_attr "type" "mov_imm,mov_reg,mov_shift,mov_shift_reg,\ ++ mvn_imm,mvn_reg,mvn_shift,mvn_shift_reg")) + "fa726te_issue+(fa726te_alu0_pipe|fa726te_alu1_pipe)") + + ;; ALU operations with no shifted operand will finished in 1 cycle +@@ -85,8 +86,12 @@ + ;; Other ALU instructions 2 cycles. + (define_insn_reservation "726te_alu_op" 1 + (and (eq_attr "tune" "fa726te") +- (and (eq_attr "type" "alu_reg,simple_alu_imm") +- (not (eq_attr "insn" "mov,mvn")))) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,\ ++ mrs,multiple,no_insn")) + "fa726te_issue+(fa726te_alu0_pipe|fa726te_alu1_pipe)") + + ;; ALU operations with a shift-by-register operand. +@@ -95,14 +100,14 @@ + ;; it takes 3 cycles. + (define_insn_reservation "726te_alu_shift_op" 3 + (and (eq_attr "tune" "fa726te") +- (and (eq_attr "type" "simple_alu_shift,alu_shift") +- (not (eq_attr "insn" "mov,mvn")))) ++ (eq_attr "type" "extend,alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm")) + "fa726te_issue+(fa726te_alu0_pipe|fa726te_alu1_pipe)") + + (define_insn_reservation "726te_alu_shift_reg_op" 3 + (and (eq_attr "tune" "fa726te") +- (and (eq_attr "type" "alu_shift_reg") +- (not (eq_attr "insn" "mov,mvn")))) ++ (eq_attr "type" "alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg")) + "fa726te_issue+(fa726te_alu0_pipe|fa726te_alu1_pipe)") + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + ;; Multiplication Instructions +@@ -115,7 +120,7 @@ + + (define_insn_reservation "726te_mult_op" 3 + (and (eq_attr "tune" "fa726te") +- (eq_attr "insn" "smlalxy,mul,mla,muls,mlas,umull,umlal,smull,smlal,\ ++ (eq_attr "type" "smlalxy,mul,mla,muls,mlas,umull,umlal,smull,smlal,\ + umulls,umlals,smulls,smlals,smlawx,smulxy,smlaxy")) + "fa726te_issue+fa726te_mac_pipe") + +--- a/src/gcc/config/arm/neon-testgen.ml ++++ b/src/gcc/config/arm/neon-testgen.ml +@@ -163,10 +163,13 @@ + match List.find (fun feature -> + match feature with Requires_feature _ -> true + | Requires_arch _ -> true ++ | Requires_FP_bit 1 -> true + | _ -> false) + features with + Requires_feature "FMA" -> "arm_neonv2" ++ | Requires_feature "CRYPTO" -> "arm_crypto" + | Requires_arch 8 -> "arm_v8_neon" ++ | Requires_FP_bit 1 -> "arm_neon_fp16" + | _ -> assert false + with Not_found -> "arm_neon" + +@@ -298,5 +301,5 @@ + (* Program entry point. *) + let _ = + let directory = if Array.length Sys.argv <> 1 then Sys.argv.(1) else "." in +- List.iter (test_intrinsic_group directory) (reinterp @ ops) ++ List.iter (test_intrinsic_group directory) (reinterp @ reinterpq @ ops) + +--- a/src/gcc/config/arm/arm.md ++++ b/src/gcc/config/arm/arm.md +@@ -74,6 +74,15 @@ + ; IS_THUMB1 is set to 'yes' iff we are generating Thumb-1 code. + (define_attr "is_thumb1" "no,yes" (const (symbol_ref "thumb1_code"))) + ++; We use this attribute to disable alternatives that can produce 32-bit ++; instructions inside an IT-block in Thumb2 state. ARMv8 deprecates IT blocks ++; that contain 32-bit instructions. ++(define_attr "enabled_for_depr_it" "no,yes" (const_string "yes")) ++ ++; This attribute is used to disable a predicated alternative when we have ++; arm_restrict_it. ++(define_attr "predicable_short_it" "no,yes" (const_string "yes")) ++ + ;; Operand number of an input operand that is shifted. Zero if the + ;; given instruction does not shift one of its input operands. + (define_attr "shift" "" (const_int 0)) +@@ -84,6 +93,8 @@ + (define_attr "fpu" "none,vfp" + (const (symbol_ref "arm_fpu_attr"))) + ++(define_attr "predicated" "yes,no" (const_string "no")) ++ + ; LENGTH of an instruction (in bytes) + (define_attr "length" "" + (const_int 4)) +@@ -92,11 +103,11 @@ + ; This can be "a" for ARM, "t" for either of the Thumbs, "32" for + ; TARGET_32BIT, "t1" or "t2" to specify a specific Thumb mode. "v6" + ; for ARM or Thumb-2 with arm_arch6, and nov6 for ARM without ++; arm_arch6. This attribute is used to compute attribute "enabled", + ; arm_arch6. "v6t2" for Thumb-2 with arm_arch6. This attribute is + ; used to compute attribute "enabled", use type "any" to enable an + ; alternative in all cases. +- +-(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,v6t2,onlya8,neon_onlya8,nota8,neon_nota8,iwmmxt,iwmmxt2" ++(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,v6t2,neon_for_64bits,avoid_neon_for_64bits,iwmmxt,iwmmxt2" + (const_string "any")) + + (define_attr "arch_enabled" "no,yes" +@@ -131,28 +142,20 @@ + (match_test "TARGET_32BIT && !arm_arch6")) + (const_string "yes") + ++ (and (eq_attr "arch" "avoid_neon_for_64bits") ++ (match_test "TARGET_NEON") ++ (not (match_test "TARGET_PREFER_NEON_64BITS"))) ++ (const_string "yes") ++ + (and (eq_attr "arch" "v6t2") + (match_test "TARGET_32BIT && arm_arch6 && arm_arch_thumb2")) + (const_string "yes") + +- (and (eq_attr "arch" "onlya8") +- (eq_attr "tune" "cortexa8")) ++ (and (eq_attr "arch" "neon_for_64bits") ++ (match_test "TARGET_NEON") ++ (match_test "TARGET_PREFER_NEON_64BITS")) + (const_string "yes") + +- (and (eq_attr "arch" "neon_onlya8") +- (eq_attr "tune" "cortexa8") +- (match_test "TARGET_NEON")) +- (const_string "yes") +- +- (and (eq_attr "arch" "nota8") +- (not (eq_attr "tune" "cortexa8"))) +- (const_string "yes") +- +- (and (eq_attr "arch" "neon_nota8") +- (not (eq_attr "tune" "cortexa8")) +- (match_test "TARGET_NEON")) +- (const_string "yes") +- + (and (eq_attr "arch" "iwmmxt2") + (match_test "TARGET_REALLY_IWMMXT2")) + (const_string "yes")] +@@ -185,6 +188,15 @@ + (cond [(eq_attr "insn_enabled" "no") + (const_string "no") + ++ (and (eq_attr "predicable_short_it" "no") ++ (and (eq_attr "predicated" "yes") ++ (match_test "arm_restrict_it"))) ++ (const_string "no") ++ ++ (and (eq_attr "enabled_for_depr_it" "no") ++ (match_test "arm_restrict_it")) ++ (const_string "no") ++ + (eq_attr "arch_enabled" "no") + (const_string "no") + +@@ -220,196 +232,109 @@ + (set_attr "length" "4") + (set_attr "pool_range" "250")]) + +-;; The instruction used to implement a particular pattern. This +-;; information is used by pipeline descriptions to provide accurate +-;; scheduling information. ++;; Instruction classification types ++(include "types.md") + +-(define_attr "insn" +- "mov,mvn,smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals,smlawy,smuad,smuadx,smlad,smladx,smusd,smusdx,smlsd,smlsdx,smmul,smmulr,smmla,umaal,smlald,smlsld,clz,mrs,msr,xtab,sdiv,udiv,sat,other" +- (const_string "other")) +- +-; TYPE attribute is used to detect floating point instructions which, if +-; running on a co-processor can run in parallel with other, basic instructions +-; If write-buffer scheduling is enabled then it can also be used in the +-; scheduling of writes. +- +-; Classification of each insn +-; Note: vfp.md has different meanings for some of these, and some further +-; types as well. See that file for details. +-; simple_alu_imm a simple alu instruction that doesn't hit memory or fp +-; regs or have a shifted source operand and has an immediate +-; operand. This currently only tracks very basic immediate +-; alu operations. +-; alu_reg any alu instruction that doesn't hit memory or fp +-; regs or have a shifted source operand +-; and does not have an immediate operand. This is +-; also the default +-; simple_alu_shift covers UXTH, UXTB, SXTH, SXTB +-; alu_shift any data instruction that doesn't hit memory or fp +-; regs, but has a source operand shifted by a constant +-; alu_shift_reg any data instruction that doesn't hit memory or fp +-; regs, but has a source operand shifted by a register value +-; mult a multiply instruction +-; block blockage insn, this blocks all functional units +-; float a floating point arithmetic operation (subject to expansion) +-; fdivd DFmode floating point division +-; fdivs SFmode floating point division +-; f_load[sd] A single/double load from memory. Used for VFP unit. +-; f_store[sd] A single/double store to memory. Used for VFP unit. +-; f_flag a transfer of co-processor flags to the CPSR +-; f_2_r transfer float to core (no memory needed) +-; r_2_f transfer core to float +-; f_cvt convert floating<->integral +-; branch a branch +-; call a subroutine call +-; load_byte load byte(s) from memory to arm registers +-; load1 load 1 word from memory to arm registers +-; load2 load 2 words from memory to arm registers +-; load3 load 3 words from memory to arm registers +-; load4 load 4 words from memory to arm registers +-; store store 1 word to memory from arm registers +-; store2 store 2 words +-; store3 store 3 words +-; store4 store 4 (or more) words +-; +- +-(define_attr "type" +- "simple_alu_imm,\ +- alu_reg,\ +- simple_alu_shift,\ +- alu_shift,\ +- alu_shift_reg,\ +- mult,\ +- block,\ +- float,\ +- fdivd,\ +- fdivs,\ +- fmuls,\ +- fmuld,\ +- fmacs,\ +- fmacd,\ +- ffmas,\ +- ffmad,\ +- f_rints,\ +- f_rintd,\ +- f_minmaxs,\ +- f_minmaxd,\ +- f_flag,\ +- f_loads,\ +- f_loadd,\ +- f_stores,\ +- f_stored,\ +- f_2_r,\ +- r_2_f,\ +- f_cvt,\ +- branch,\ +- call,\ +- load_byte,\ +- load1,\ +- load2,\ +- load3,\ +- load4,\ +- store1,\ +- store2,\ +- store3,\ +- store4,\ +- fconsts,\ +- fconstd,\ +- fadds,\ +- faddd,\ +- ffariths,\ +- ffarithd,\ +- fcmps,\ +- fcmpd,\ +- fcpys" +- (if_then_else +- (eq_attr "insn" "smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,\ +- umull,umulls,umlal,umlals,smull,smulls,smlal,smlals") +- (const_string "mult") +- (const_string "alu_reg"))) +- +-; Is this an (integer side) multiply with a 64-bit result? +-(define_attr "mul64" "no,yes" +- (if_then_else +- (eq_attr "insn" +- "smlalxy,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals") +- (const_string "yes") +- (const_string "no"))) +- +-; wtype for WMMX insn scheduling purposes. +-(define_attr "wtype" +- "none,wor,wxor,wand,wandn,wmov,tmcrr,tmrrc,wldr,wstr,tmcr,tmrc,wadd,wsub,wmul,wmac,wavg2,tinsr,textrm,wshufh,wcmpeq,wcmpgt,wmax,wmin,wpack,wunpckih,wunpckil,wunpckeh,wunpckel,wror,wsra,wsrl,wsll,wmadd,tmia,tmiaph,tmiaxy,tbcst,tmovmsk,wacc,waligni,walignr,tandc,textrc,torc,torvsc,wsad,wabs,wabsdiff,waddsubhx,wsubaddhx,wavg4,wmulw,wqmulm,wqmulwm,waddbhus,wqmiaxy,wmiaxy,wmiawxy,wmerge" (const_string "none")) +- + ; Load scheduling, set from the arm_ld_sched variable + ; initialized by arm_option_override() + (define_attr "ldsched" "no,yes" (const (symbol_ref "arm_ld_sched"))) + +-;; Classification of NEON instructions for scheduling purposes. +-(define_attr "neon_type" +- "neon_int_1,\ +- neon_int_2,\ +- neon_int_3,\ +- neon_int_4,\ +- neon_int_5,\ +- neon_vqneg_vqabs,\ +- neon_vmov,\ +- neon_vaba,\ +- neon_vsma,\ +- neon_vaba_qqq,\ +- neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ +- neon_mul_qqq_8_16_32_ddd_32,\ +- neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar,\ +- neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ +- neon_mla_qqq_8_16,\ +- neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long,\ +- neon_mla_qqq_32_qqd_32_scalar,\ +- neon_mul_ddd_16_scalar_32_16_long_scalar,\ +- neon_mul_qqd_32_scalar,\ +- neon_mla_ddd_16_scalar_qdd_32_16_long_scalar,\ +- neon_shift_1,\ +- neon_shift_2,\ +- neon_shift_3,\ +- neon_vshl_ddd,\ +- neon_vqshl_vrshl_vqrshl_qqq,\ +- neon_vsra_vrsra,\ +- neon_fp_vadd_ddd_vabs_dd,\ +- neon_fp_vadd_qqq_vabs_qq,\ +- neon_fp_vsum,\ +- neon_fp_vmul_ddd,\ +- neon_fp_vmul_qqd,\ +- neon_fp_vmla_ddd,\ +- neon_fp_vmla_qqq,\ +- neon_fp_vmla_ddd_scalar,\ +- neon_fp_vmla_qqq_scalar,\ +- neon_fp_vrecps_vrsqrts_ddd,\ +- neon_fp_vrecps_vrsqrts_qqq,\ +- neon_bp_simple,\ +- neon_bp_2cycle,\ +- neon_bp_3cycle,\ +- neon_ldr,\ +- neon_str,\ +- neon_vld1_1_2_regs,\ +- neon_vld1_3_4_regs,\ +- neon_vld2_2_regs_vld1_vld2_all_lanes,\ +- neon_vld2_4_regs,\ +- neon_vld3_vld4,\ +- neon_vst1_1_2_regs_vst2_2_regs,\ +- neon_vst1_3_4_regs,\ +- neon_vst2_4_regs_vst3_vst4,\ +- neon_vst3_vst4,\ +- neon_vld1_vld2_lane,\ +- neon_vld3_vld4_lane,\ +- neon_vst1_vst2_lane,\ +- neon_vst3_vst4_lane,\ +- neon_vld3_vld4_all_lanes,\ +- neon_mcr,\ +- neon_mcr_2_mcrr,\ +- neon_mrc,\ +- neon_mrrc,\ +- neon_ldm_2,\ +- neon_stm_2,\ +- none" +- (const_string "none")) ++; YES if the "type" attribute assigned to the insn denotes an ++; Advanced SIMD instruction, NO otherwise. ++(define_attr "is_neon_type" "yes,no" ++ (if_then_else (eq_attr "type" ++ "neon_add, neon_add_q, neon_add_widen, neon_add_long,\ ++ neon_qadd, neon_qadd_q, neon_add_halve, neon_add_halve_q,\ ++ neon_add_halve_narrow_q,\ ++ neon_sub, neon_sub_q, neon_sub_widen, neon_sub_long, neon_qsub,\ ++ neon_qsub_q, neon_sub_halve, neon_sub_halve_q,\ ++ neon_sub_halve_narrow_q,\ ++ neon_abs, neon_abs_q, neon_neg, neon_neg_q, neon_qneg,\ ++ neon_qneg_q, neon_qabs, neon_qabs_q, neon_abd, neon_abd_q,\ ++ neon_abd_long, neon_minmax, neon_minmax_q, neon_compare,\ ++ neon_compare_q, neon_compare_zero, neon_compare_zero_q,\ ++ neon_arith_acc, neon_arith_acc_q, neon_reduc_add,\ ++ neon_reduc_add_q, neon_reduc_add_long, neon_reduc_add_acc,\ ++ neon_reduc_add_acc_q, neon_reduc_minmax, neon_reduc_minmax_q,\ ++ neon_logic, neon_logic_q, neon_tst, neon_tst_q,\ ++ neon_shift_imm, neon_shift_imm_q, neon_shift_imm_narrow_q,\ ++ neon_shift_imm_long, neon_shift_reg, neon_shift_reg_q,\ ++ neon_shift_acc, neon_shift_acc_q, neon_sat_shift_imm,\ ++ neon_sat_shift_imm_q, neon_sat_shift_imm_narrow_q,\ ++ neon_sat_shift_reg, neon_sat_shift_reg_q,\ ++ neon_ins, neon_ins_q, neon_move, neon_move_q, neon_move_narrow_q,\ ++ neon_permute, neon_permute_q, neon_zip, neon_zip_q, neon_tbl1,\ ++ neon_tbl1_q, neon_tbl2, neon_tbl2_q, neon_tbl3, neon_tbl3_q,\ ++ neon_tbl4, neon_tbl4_q, neon_bsl, neon_bsl_q, neon_cls,\ ++ neon_cls_q, neon_cnt, neon_cnt_q, neon_dup, neon_dup_q,\ ++ neon_ext, neon_ext_q, neon_rbit, neon_rbit_q,\ ++ neon_rev, neon_rev_q, neon_mul_b, neon_mul_b_q, neon_mul_h,\ ++ neon_mul_h_q, neon_mul_s, neon_mul_s_q, neon_mul_b_long,\ ++ neon_mul_h_long, neon_mul_s_long, neon_mul_h_scalar,\ ++ neon_mul_h_scalar_q, neon_mul_s_scalar, neon_mul_s_scalar_q,\ ++ neon_mul_h_scalar_long, neon_mul_s_scalar_long, neon_sat_mul_b,\ ++ neon_sat_mul_b_q, neon_sat_mul_h, neon_sat_mul_h_q,\ ++ neon_sat_mul_s, neon_sat_mul_s_q, neon_sat_mul_b_long,\ ++ neon_sat_mul_h_long, neon_sat_mul_s_long, neon_sat_mul_h_scalar,\ ++ neon_sat_mul_h_scalar_q, neon_sat_mul_s_scalar,\ ++ neon_sat_mul_s_scalar_q, neon_sat_mul_h_scalar_long,\ ++ neon_sat_mul_s_scalar_long, neon_mla_b, neon_mla_b_q, neon_mla_h,\ ++ neon_mla_h_q, neon_mla_s, neon_mla_s_q, neon_mla_b_long,\ ++ neon_mla_h_long, neon_mla_s_long, neon_mla_h_scalar,\ ++ neon_mla_h_scalar_q, neon_mla_s_scalar, neon_mla_s_scalar_q,\ ++ neon_mla_h_scalar_long, neon_mla_s_scalar_long,\ ++ neon_sat_mla_b_long, neon_sat_mla_h_long,\ ++ neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\ ++ neon_sat_mla_s_scalar_long,\ ++ neon_to_gp, neon_to_gp_q, neon_from_gp, neon_from_gp_q,\ ++ neon_ldr, neon_load1_1reg, neon_load1_1reg_q, neon_load1_2reg,\ ++ neon_load1_2reg_q, neon_load1_3reg, neon_load1_3reg_q,\ ++ neon_load1_4reg, neon_load1_4reg_q, neon_load1_all_lanes,\ ++ neon_load1_all_lanes_q, neon_load1_one_lane, neon_load1_one_lane_q,\ ++ neon_load2_2reg, neon_load2_2reg_q, neon_load2_4reg,\ ++ neon_load2_4reg_q, neon_load2_all_lanes, neon_load2_all_lanes_q,\ ++ neon_load2_one_lane, neon_load2_one_lane_q,\ ++ neon_load3_3reg, neon_load3_3reg_q, neon_load3_all_lanes,\ ++ neon_load3_all_lanes_q, neon_load3_one_lane, neon_load3_one_lane_q,\ ++ neon_load4_4reg, neon_load4_4reg_q, neon_load4_all_lanes,\ ++ neon_load4_all_lanes_q, neon_load4_one_lane, neon_load4_one_lane_q,\ ++ neon_str, neon_store1_1reg, neon_store1_1reg_q, neon_store1_2reg,\ ++ neon_store1_2reg_q, neon_store1_3reg, neon_store1_3reg_q,\ ++ neon_store1_4reg, neon_store1_4reg_q, neon_store1_one_lane,\ ++ neon_store1_one_lane_q, neon_store2_2reg, neon_store2_2reg_q,\ ++ neon_store2_4reg, neon_store2_4reg_q, neon_store2_one_lane,\ ++ neon_store2_one_lane_q, neon_store3_3reg, neon_store3_3reg_q,\ ++ neon_store3_one_lane, neon_store3_one_lane_q, neon_store4_4reg,\ ++ neon_store4_4reg_q, neon_store4_one_lane, neon_store4_one_lane_q,\ ++ neon_fp_abd_s, neon_fp_abd_s_q, neon_fp_abd_d, neon_fp_abd_d_q,\ ++ neon_fp_addsub_s, neon_fp_addsub_s_q, neon_fp_addsub_d,\ ++ neon_fp_addsub_d_q, neon_fp_compare_s, neon_fp_compare_s_q,\ ++ neon_fp_compare_d, neon_fp_compare_d_q, neon_fp_minmax_s,\ ++ neon_fp_minmax_s_q, neon_fp_minmax_d, neon_fp_minmax_d_q,\ ++ neon_fp_reduc_add_s, neon_fp_reduc_add_s_q, neon_fp_reduc_add_d,\ ++ neon_fp_reduc_add_d_q, neon_fp_reduc_minmax_s, ++ neon_fp_reduc_minmax_s_q, neon_fp_reduc_minmax_d,\ ++ neon_fp_reduc_minmax_d_q,\ ++ neon_fp_cvt_narrow_s_q, neon_fp_cvt_narrow_d_q,\ ++ neon_fp_cvt_widen_h, neon_fp_cvt_widen_s, neon_fp_to_int_s,\ ++ neon_fp_to_int_s_q, neon_int_to_fp_s, neon_int_to_fp_s_q,\ ++ neon_fp_round_s, neon_fp_round_s_q, neon_fp_recpe_s,\ ++ neon_fp_recpe_s_q,\ ++ neon_fp_recpe_d, neon_fp_recpe_d_q, neon_fp_recps_s,\ ++ neon_fp_recps_s_q, neon_fp_recps_d, neon_fp_recps_d_q,\ ++ neon_fp_recpx_s, neon_fp_recpx_s_q, neon_fp_recpx_d,\ ++ neon_fp_recpx_d_q, neon_fp_rsqrte_s, neon_fp_rsqrte_s_q,\ ++ neon_fp_rsqrte_d, neon_fp_rsqrte_d_q, neon_fp_rsqrts_s,\ ++ neon_fp_rsqrts_s_q, neon_fp_rsqrts_d, neon_fp_rsqrts_d_q,\ ++ neon_fp_mul_s, neon_fp_mul_s_q, neon_fp_mul_s_scalar,\ ++ neon_fp_mul_s_scalar_q, neon_fp_mul_d, neon_fp_mul_d_q,\ ++ neon_fp_mul_d_scalar_q, neon_fp_mla_s, neon_fp_mla_s_q,\ ++ neon_fp_mla_s_scalar, neon_fp_mla_s_scalar_q, neon_fp_mla_d,\ ++ neon_fp_mla_d_q, neon_fp_mla_d_scalar_q, neon_fp_sqrt_s,\ ++ neon_fp_sqrt_s_q, neon_fp_sqrt_d, neon_fp_sqrt_d_q,\ ++ neon_fp_div_s, neon_fp_div_s_q, neon_fp_div_d, neon_fp_div_d_q") ++ (const_string "yes") ++ (const_string "no"))) + + ; condition codes: this one is used by final_prescan_insn to speed up + ; conditionalizing instructions. It saves having to scan the rtl to see if +@@ -436,9 +361,9 @@ + (ior (eq_attr "is_thumb1" "yes") + (eq_attr "type" "call")) + (const_string "clob") +- (if_then_else (eq_attr "neon_type" "none") +- (const_string "nocond") +- (const_string "unconditional")))) ++ (if_then_else (eq_attr "is_neon_type" "no") ++ (const_string "nocond") ++ (const_string "unconditional")))) + + ; Predicable means that the insn can be conditionally executed based on + ; an automatically added predicate (additional patterns are generated by +@@ -464,9 +389,22 @@ + ; than one on the main cpu execution unit. + (define_attr "core_cycles" "single,multi" + (if_then_else (eq_attr "type" +- "simple_alu_imm,alu_reg,\ +- simple_alu_shift,alu_shift,\ +- float,fdivd,fdivs") ++ "adc_imm, adc_reg, adcs_imm, adcs_reg, adr, alu_ext, alu_imm, alu_reg,\ ++ alu_shift_imm, alu_shift_reg, alus_ext, alus_imm, alus_reg,\ ++ alus_shift_imm, alus_shift_reg, bfm, csel, rev, logic_imm, logic_reg,\ ++ logic_shift_imm, logic_shift_reg, logics_imm, logics_reg,\ ++ logics_shift_imm, logics_shift_reg, extend, shift_imm, float, fcsel,\ ++ wmmx_wor, wmmx_wxor, wmmx_wand, wmmx_wandn, wmmx_wmov, wmmx_tmcrr,\ ++ wmmx_tmrrc, wmmx_wldr, wmmx_wstr, wmmx_tmcr, wmmx_tmrc, wmmx_wadd,\ ++ wmmx_wsub, wmmx_wmul, wmmx_wmac, wmmx_wavg2, wmmx_tinsr, wmmx_textrm,\ ++ wmmx_wshufh, wmmx_wcmpeq, wmmx_wcmpgt, wmmx_wmax, wmmx_wmin, wmmx_wpack,\ ++ wmmx_wunpckih, wmmx_wunpckil, wmmx_wunpckeh, wmmx_wunpckel, wmmx_wror,\ ++ wmmx_wsra, wmmx_wsrl, wmmx_wsll, wmmx_wmadd, wmmx_tmia, wmmx_tmiaph,\ ++ wmmx_tmiaxy, wmmx_tbcst, wmmx_tmovmsk, wmmx_wacc, wmmx_waligni,\ ++ wmmx_walignr, wmmx_tandc, wmmx_textrc, wmmx_torc, wmmx_torvsc, wmmx_wsad,\ ++ wmmx_wabs, wmmx_wabsdiff, wmmx_waddsubhx, wmmx_wsubaddhx, wmmx_wavg4,\ ++ wmmx_wmulw, wmmx_wqmulm, wmmx_wqmulwm, wmmx_waddbhus, wmmx_wqmiaxy,\ ++ wmmx_wmiaxy, wmmx_wmiawxy, wmmx_wmerge") + (const_string "single") + (const_string "multi"))) + +@@ -508,7 +446,7 @@ + + (define_attr "generic_sched" "yes,no" + (const (if_then_else +- (ior (eq_attr "tune" "fa526,fa626,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexm4,marvell_pj4") ++ (ior (eq_attr "tune" "fa526,fa626,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexa53,cortexm4,marvell_pj4") + (eq_attr "tune_cortexr4" "yes")) + (const_string "no") + (const_string "yes")))) +@@ -516,7 +454,7 @@ + (define_attr "generic_vfp" "yes,no" + (const (if_then_else + (and (eq_attr "fpu" "vfp") +- (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa7,cortexa8,cortexa9,cortexm4,marvell_pj4") ++ (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa7,cortexa8,cortexa9,cortexa53,cortexm4,marvell_pj4") + (eq_attr "tune_cortexr4" "no")) + (const_string "yes") + (const_string "no")))) +@@ -537,6 +475,7 @@ + (include "cortex-a8.md") + (include "cortex-a9.md") + (include "cortex-a15.md") ++(include "cortex-a53.md") + (include "cortex-r4.md") + (include "cortex-r4f.md") + (include "cortex-m4.md") +@@ -580,7 +519,8 @@ + ] + "TARGET_THUMB1" + "add\\t%Q0, %Q0, %Q2\;adc\\t%R0, %R0, %R2" +- [(set_attr "length" "4")] ++ [(set_attr "length" "4") ++ (set_attr "type" "multiple")] + ) + + (define_insn_and_split "*arm_adddi3" +@@ -608,7 +548,8 @@ + operands[2] = gen_lowpart (SImode, operands[2]); + }" + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn_and_split "*adddi_sesidi_di" +@@ -637,7 +578,8 @@ + operands[2] = gen_lowpart (SImode, operands[2]); + }" + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn_and_split "*adddi_zesidi_di" +@@ -664,7 +606,8 @@ + operands[2] = gen_lowpart (SImode, operands[2]); + }" + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_expand "addsi3" +@@ -703,14 +646,17 @@ + ;; (plus (reg rN) (reg sp)) into (reg rN). In this case reload will + ;; put the duplicated register first, and not try the commutative version. + (define_insn_and_split "*arm_addsi3" +- [(set (match_operand:SI 0 "s_register_operand" "=rk, r,k, r,r, k, r, k,k,r, k, r") +- (plus:SI (match_operand:SI 1 "s_register_operand" "%0, rk,k, r,rk,k, rk,k,r,rk,k, rk") +- (match_operand:SI 2 "reg_or_int_operand" "rk, rI,rI,k,Pj,Pj,L, L,L,PJ,PJ,?n")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=rk,l,l ,l ,r ,k ,r,r ,k ,r ,k,k,r ,k ,r") ++ (plus:SI (match_operand:SI 1 "s_register_operand" "%0 ,l,0 ,l ,rk,k ,r,rk,k ,rk,k,r,rk,k ,rk") ++ (match_operand:SI 2 "reg_or_int_operand" "rk ,l,Py,Pd,rI,rI,k,Pj,Pj,L ,L,L,PJ,PJ,?n")))] + "TARGET_32BIT" + "@ + add%?\\t%0, %0, %2 + add%?\\t%0, %1, %2 + add%?\\t%0, %1, %2 ++ add%?\\t%0, %1, %2 ++ add%?\\t%0, %1, %2 ++ add%?\\t%0, %1, %2 + add%?\\t%0, %2, %1 + addw%?\\t%0, %1, %2 + addw%?\\t%0, %1, %2 +@@ -731,11 +677,12 @@ + operands[1], 0); + DONE; + " +- [(set_attr "length" "2,4,4,4,4,4,4,4,4,4,4,16") ++ [(set_attr "length" "2,4,4,4,4,4,4,4,4,4,4,4,4,4,16") + (set_attr "predicable" "yes") +- (set_attr "arch" "t2,*,*,*,t2,t2,*,*,a,t2,t2,*") ++ (set_attr "predicable_short_it" "yes,yes,yes,yes,no,no,no,no,no,no,no,no,no,no,no") ++ (set_attr "arch" "t2,t2,t2,t2,*,*,*,t2,t2,*,*,a,t2,t2,*") + (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "") +- (const_string "simple_alu_imm") ++ (const_string "alu_imm") + (const_string "alu_reg"))) + ] + ) +@@ -786,7 +733,9 @@ + operands[3] = GEN_INT (offset); + operands[2] = GEN_INT (INTVAL (operands[2]) - offset); + } +- [(set_attr "length" "2,2,2,2,2,2,2,4,4,4")] ++ [(set_attr "length" "2,2,2,2,2,2,2,4,4,4") ++ (set_attr "type" "alus_imm,alus_imm,alus_reg,alus_reg,alus_reg, ++ alus_reg,alus_reg,multiple,multiple,multiple")] + ) + + ;; Reloading and elimination of the frame pointer can +@@ -817,7 +766,7 @@ + sub%.\\t%0, %1, #%n2 + add%.\\t%0, %1, %2" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm, simple_alu_imm, *")] ++ (set_attr "type" "alus_imm,alus_imm,alus_reg")] + ) + + (define_insn "*addsi3_compare0_scratch" +@@ -833,24 +782,27 @@ + cmn%?\\t%0, %1" + [(set_attr "conds" "set") + (set_attr "predicable" "yes") +- (set_attr "type" "simple_alu_imm, simple_alu_imm, *") +- ] ++ (set_attr "type" "alus_imm,alus_imm,alus_reg")] + ) + + (define_insn "*compare_negsi_si" + [(set (reg:CC_Z CC_REGNUM) + (compare:CC_Z +- (neg:SI (match_operand:SI 0 "s_register_operand" "r")) +- (match_operand:SI 1 "s_register_operand" "r")))] ++ (neg:SI (match_operand:SI 0 "s_register_operand" "l,r")) ++ (match_operand:SI 1 "s_register_operand" "l,r")))] + "TARGET_32BIT" + "cmn%?\\t%1, %0" + [(set_attr "conds" "set") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "arch" "t2,*") ++ (set_attr "length" "2,4") ++ (set_attr "predicable_short_it" "yes,no") ++ (set_attr "type" "alus_reg")] + ) + + ;; This is the canonicalization of addsi3_compare0_for_combiner when the + ;; addend is a constant. +-(define_insn "*cmpsi2_addneg" ++(define_insn "cmpsi2_addneg" + [(set (reg:CC CC_REGNUM) + (compare:CC + (match_operand:SI 1 "s_register_operand" "r,r") +@@ -862,7 +814,8 @@ + "@ + add%.\\t%0, %1, %3 + sub%.\\t%0, %1, #%n3" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "alus_reg")] + ) + + ;; Convert the sequence +@@ -920,7 +873,7 @@ + sub%.\\t%0, %1, #%n2 + add%.\\t%0, %1, %2" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] ++ (set_attr "type" "alus_imm,alus_imm,alus_reg")] + ) + + (define_insn "*addsi3_compare_op2" +@@ -937,63 +890,85 @@ + add%.\\t%0, %1, %2 + sub%.\\t%0, %1, #%n2" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] ++ (set_attr "type" "alus_imm,alus_imm,alus_reg")] + ) + + (define_insn "*compare_addsi2_op0" + [(set (reg:CC_C CC_REGNUM) +- (compare:CC_C +- (plus:SI (match_operand:SI 0 "s_register_operand" "r,r,r") +- (match_operand:SI 1 "arm_add_operand" "I,L,r")) +- (match_dup 0)))] ++ (compare:CC_C ++ (plus:SI (match_operand:SI 0 "s_register_operand" "l,l,r,r,r") ++ (match_operand:SI 1 "arm_add_operand" "Pv,l,I,L,r")) ++ (match_dup 0)))] + "TARGET_32BIT" + "@ ++ cmp%?\\t%0, #%n1 + cmn%?\\t%0, %1 ++ cmn%?\\t%0, %1 + cmp%?\\t%0, #%n1 + cmn%?\\t%0, %1" + [(set_attr "conds" "set") + (set_attr "predicable" "yes") +- (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] ++ (set_attr "arch" "t2,t2,*,*,*") ++ (set_attr "predicable_short_it" "yes,yes,no,no,no") ++ (set_attr "length" "2,2,4,4,4") ++ (set_attr "type" "alus_imm,alus_reg,alus_imm,alus_imm,alus_reg")] + ) + + (define_insn "*compare_addsi2_op1" + [(set (reg:CC_C CC_REGNUM) +- (compare:CC_C +- (plus:SI (match_operand:SI 0 "s_register_operand" "r,r,r") +- (match_operand:SI 1 "arm_add_operand" "I,L,r")) +- (match_dup 1)))] ++ (compare:CC_C ++ (plus:SI (match_operand:SI 0 "s_register_operand" "l,l,r,r,r") ++ (match_operand:SI 1 "arm_add_operand" "Pv,l,I,L,r")) ++ (match_dup 1)))] + "TARGET_32BIT" + "@ ++ cmp%?\\t%0, #%n1 + cmn%?\\t%0, %1 ++ cmn%?\\t%0, %1 + cmp%?\\t%0, #%n1 + cmn%?\\t%0, %1" + [(set_attr "conds" "set") + (set_attr "predicable" "yes") +- (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] +-) ++ (set_attr "arch" "t2,t2,*,*,*") ++ (set_attr "predicable_short_it" "yes,yes,no,no,no") ++ (set_attr "length" "2,2,4,4,4") ++ (set_attr "type" "alus_imm,alus_reg,alus_imm,alus_imm,alus_reg")] ++ ) + + (define_insn "*addsi3_carryin_" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r") +- (plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "%r,r") +- (match_operand:SI 2 "arm_not_operand" "rI,K")) +- (LTUGEU:SI (reg: CC_REGNUM) (const_int 0))))] ++ [(set (match_operand:SI 0 "s_register_operand" "=l,r,r") ++ (plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "%l,r,r") ++ (match_operand:SI 2 "arm_not_operand" "0,rI,K")) ++ (LTUGEU:SI (reg: CC_REGNUM) (const_int 0))))] + "TARGET_32BIT" + "@ + adc%?\\t%0, %1, %2 ++ adc%?\\t%0, %1, %2 + sbc%?\\t%0, %1, #%B2" +- [(set_attr "conds" "use")] ++ [(set_attr "conds" "use") ++ (set_attr "predicable" "yes") ++ (set_attr "arch" "t2,*,*") ++ (set_attr "length" "4") ++ (set_attr "predicable_short_it" "yes,no,no") ++ (set_attr "type" "adc_reg,adc_reg,adc_imm")] + ) + + (define_insn "*addsi3_carryin_alt2_" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r") +- (plus:SI (plus:SI (LTUGEU:SI (reg: CC_REGNUM) (const_int 0)) +- (match_operand:SI 1 "s_register_operand" "%r,r")) +- (match_operand:SI 2 "arm_rhs_operand" "rI,K")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=l,r,r") ++ (plus:SI (plus:SI (LTUGEU:SI (reg: CC_REGNUM) (const_int 0)) ++ (match_operand:SI 1 "s_register_operand" "%l,r,r")) ++ (match_operand:SI 2 "arm_rhs_operand" "l,rI,K")))] + "TARGET_32BIT" + "@ + adc%?\\t%0, %1, %2 ++ adc%?\\t%0, %1, %2 + sbc%?\\t%0, %1, #%B2" +- [(set_attr "conds" "use")] ++ [(set_attr "conds" "use") ++ (set_attr "predicable" "yes") ++ (set_attr "arch" "t2,*,*") ++ (set_attr "length" "4") ++ (set_attr "predicable_short_it" "yes,no,no") ++ (set_attr "type" "adc_reg,adc_reg,adc_imm")] + ) + + (define_insn "*addsi3_carryin_shift_" +@@ -1007,8 +982,10 @@ + "TARGET_32BIT" + "adc%?\\t%0, %1, %3%S2" + [(set_attr "conds" "use") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "") +- (const_string "alu_shift") ++ (const_string "alu_shift_imm") + (const_string "alu_shift_reg")))] + ) + +@@ -1020,29 +997,97 @@ + (clobber (reg:CC CC_REGNUM))] + "TARGET_32BIT" + "adc%.\\t%0, %1, %2" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "adcs_reg")] + ) + +-(define_expand "incscc" ++(define_insn "*subsi3_carryin" + [(set (match_operand:SI 0 "s_register_operand" "=r,r") +- (plus:SI (match_operator:SI 2 "arm_comparison_operator" +- [(match_operand:CC 3 "cc_register" "") (const_int 0)]) +- (match_operand:SI 1 "s_register_operand" "0,?r")))] ++ (minus:SI (minus:SI (match_operand:SI 1 "reg_or_int_operand" "r,I") ++ (match_operand:SI 2 "s_register_operand" "r,r")) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] + "TARGET_32BIT" +- "" ++ "@ ++ sbc%?\\t%0, %1, %2 ++ rsc%?\\t%0, %2, %1" ++ [(set_attr "conds" "use") ++ (set_attr "arch" "*,a") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "adc_reg,adc_imm")] + ) + +-(define_insn "*arm_incscc" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r") +- (plus:SI (match_operator:SI 2 "arm_comparison_operator" +- [(match_operand:CC 3 "cc_register" "") (const_int 0)]) +- (match_operand:SI 1 "s_register_operand" "0,?r")))] ++(define_insn "*subsi3_carryin_const" ++ [(set (match_operand:SI 0 "s_register_operand" "=r") ++ (minus:SI (plus:SI (match_operand:SI 1 "reg_or_int_operand" "r") ++ (match_operand:SI 2 "arm_not_operand" "K")) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ "TARGET_32BIT" ++ "sbc\\t%0, %1, #%B2" ++ [(set_attr "conds" "use") ++ (set_attr "type" "adc_imm")] ++) ++ ++(define_insn "*subsi3_carryin_compare" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_operand:SI 1 "s_register_operand" "r") ++ (match_operand:SI 2 "s_register_operand" "r"))) ++ (set (match_operand:SI 0 "s_register_operand" "=r") ++ (minus:SI (minus:SI (match_dup 1) ++ (match_dup 2)) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ "TARGET_32BIT" ++ "sbcs\\t%0, %1, %2" ++ [(set_attr "conds" "set") ++ (set_attr "type" "adcs_reg")] ++) ++ ++(define_insn "*subsi3_carryin_compare_const" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_operand:SI 1 "reg_or_int_operand" "r") ++ (match_operand:SI 2 "arm_not_operand" "K"))) ++ (set (match_operand:SI 0 "s_register_operand" "=r") ++ (minus:SI (plus:SI (match_dup 1) ++ (match_dup 2)) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ "TARGET_32BIT" ++ "sbcs\\t%0, %1, #%B2" ++ [(set_attr "conds" "set") ++ (set_attr "type" "adcs_imm")] ++) ++ ++(define_insn "*subsi3_carryin_shift" ++ [(set (match_operand:SI 0 "s_register_operand" "=r") ++ (minus:SI (minus:SI ++ (match_operand:SI 1 "s_register_operand" "r") ++ (match_operator:SI 2 "shift_operator" ++ [(match_operand:SI 3 "s_register_operand" "r") ++ (match_operand:SI 4 "reg_or_int_operand" "rM")])) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ "TARGET_32BIT" ++ "sbc%?\\t%0, %1, %3%S2" ++ [(set_attr "conds" "use") ++ (set_attr "predicable" "yes") ++ (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "") ++ (const_string "alu_shift_imm") ++ (const_string "alu_shift_reg")))] ++) ++ ++(define_insn "*rsbsi3_carryin_shift" ++ [(set (match_operand:SI 0 "s_register_operand" "=r") ++ (minus:SI (minus:SI ++ (match_operator:SI 2 "shift_operator" ++ [(match_operand:SI 3 "s_register_operand" "r") ++ (match_operand:SI 4 "reg_or_int_operand" "rM")]) ++ (match_operand:SI 1 "s_register_operand" "r")) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] + "TARGET_ARM" +- "@ +- add%d2\\t%0, %1, #1 +- mov%D2\\t%0, %1\;add%d2\\t%0, %1, #1" ++ "rsc%?\\t%0, %1, %3%S2" + [(set_attr "conds" "use") +- (set_attr "length" "4,8")] ++ (set_attr "predicable" "yes") ++ (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "") ++ (const_string "alu_shift_imm") ++ (const_string "alu_shift_reg")))] + ) + + ; transform ((x << y) - 1) to ~(~(x-1) << y) Where X is a constant. +@@ -1093,15 +1138,30 @@ + " + ) + +-(define_insn "*arm_subdi3" ++(define_insn_and_split "*arm_subdi3" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r,&r") + (minus:DI (match_operand:DI 1 "s_register_operand" "0,r,0") + (match_operand:DI 2 "s_register_operand" "r,0,0"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_32BIT && !TARGET_NEON" +- "subs\\t%Q0, %Q1, %Q2\;sbc\\t%R0, %R1, %R2" ++ "#" ; "subs\\t%Q0, %Q1, %Q2\;sbc\\t%R0, %R1, %R2" ++ "&& reload_completed" ++ [(parallel [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))]) ++ (set (match_dup 3) (minus:SI (minus:SI (match_dup 4) (match_dup 5)) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ { ++ operands[3] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ operands[4] = gen_highpart (SImode, operands[1]); ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ operands[5] = gen_highpart (SImode, operands[2]); ++ operands[2] = gen_lowpart (SImode, operands[2]); ++ } + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*thumb_subdi3" +@@ -1111,10 +1171,11 @@ + (clobber (reg:CC CC_REGNUM))] + "TARGET_THUMB1" + "sub\\t%Q0, %Q0, %Q2\;sbc\\t%R0, %R0, %R2" +- [(set_attr "length" "4")] ++ [(set_attr "length" "4") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*subdi_di_zesidi" ++(define_insn_and_split "*subdi_di_zesidi" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") + (minus:DI (match_operand:DI 1 "s_register_operand" "0,r") + (zero_extend:DI +@@ -1121,12 +1182,26 @@ + (match_operand:SI 2 "s_register_operand" "r,r")))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_32BIT" +- "subs\\t%Q0, %Q1, %2\;sbc\\t%R0, %R1, #0" ++ "#" ; "subs\\t%Q0, %Q1, %2\;sbc\\t%R0, %R1, #0" ++ "&& reload_completed" ++ [(parallel [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))]) ++ (set (match_dup 3) (minus:SI (plus:SI (match_dup 4) (match_dup 5)) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ { ++ operands[3] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ operands[4] = gen_highpart (SImode, operands[1]); ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ operands[5] = GEN_INT (~0); ++ } + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*subdi_di_sesidi" ++(define_insn_and_split "*subdi_di_sesidi" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") + (minus:DI (match_operand:DI 1 "s_register_operand" "0,r") + (sign_extend:DI +@@ -1133,12 +1208,27 @@ + (match_operand:SI 2 "s_register_operand" "r,r")))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_32BIT" +- "subs\\t%Q0, %Q1, %2\;sbc\\t%R0, %R1, %2, asr #31" ++ "#" ; "subs\\t%Q0, %Q1, %2\;sbc\\t%R0, %R1, %2, asr #31" ++ "&& reload_completed" ++ [(parallel [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))]) ++ (set (match_dup 3) (minus:SI (minus:SI (match_dup 4) ++ (ashiftrt:SI (match_dup 2) ++ (const_int 31))) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ { ++ operands[3] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ operands[4] = gen_highpart (SImode, operands[1]); ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ } + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*subdi_zesidi_di" ++(define_insn_and_split "*subdi_zesidi_di" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") + (minus:DI (zero_extend:DI + (match_operand:SI 2 "s_register_operand" "r,r")) +@@ -1145,12 +1235,27 @@ + (match_operand:DI 1 "s_register_operand" "0,r"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ARM" +- "rsbs\\t%Q0, %Q1, %2\;rsc\\t%R0, %R1, #0" ++ "#" ; "rsbs\\t%Q0, %Q1, %2\;rsc\\t%R0, %R1, #0" ++ ; is equivalent to: ++ ; "subs\\t%Q0, %2, %Q1\;rsc\\t%R0, %R1, #0" ++ "&& reload_completed" ++ [(parallel [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 2) (match_dup 1))) ++ (set (match_dup 0) (minus:SI (match_dup 2) (match_dup 1)))]) ++ (set (match_dup 3) (minus:SI (minus:SI (const_int 0) (match_dup 4)) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ { ++ operands[3] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ operands[4] = gen_highpart (SImode, operands[1]); ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ } + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*subdi_sesidi_di" ++(define_insn_and_split "*subdi_sesidi_di" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") + (minus:DI (sign_extend:DI + (match_operand:SI 2 "s_register_operand" "r,r")) +@@ -1157,12 +1262,30 @@ + (match_operand:DI 1 "s_register_operand" "0,r"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ARM" +- "rsbs\\t%Q0, %Q1, %2\;rsc\\t%R0, %R1, %2, asr #31" ++ "#" ; "rsbs\\t%Q0, %Q1, %2\;rsc\\t%R0, %R1, %2, asr #31" ++ ; is equivalent to: ++ ; "subs\\t%Q0, %2, %Q1\;rsc\\t%R0, %R1, %2, asr #31" ++ "&& reload_completed" ++ [(parallel [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 2) (match_dup 1))) ++ (set (match_dup 0) (minus:SI (match_dup 2) (match_dup 1)))]) ++ (set (match_dup 3) (minus:SI (minus:SI ++ (ashiftrt:SI (match_dup 2) ++ (const_int 31)) ++ (match_dup 4)) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ { ++ operands[3] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ operands[4] = gen_highpart (SImode, operands[1]); ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ } + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*subdi_zesidi_zesidi" ++(define_insn_and_split "*subdi_zesidi_zesidi" + [(set (match_operand:DI 0 "s_register_operand" "=r") + (minus:DI (zero_extend:DI + (match_operand:SI 1 "s_register_operand" "r")) +@@ -1170,9 +1293,20 @@ + (match_operand:SI 2 "s_register_operand" "r")))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_32BIT" +- "subs\\t%Q0, %1, %2\;sbc\\t%R0, %1, %1" ++ "#" ; "subs\\t%Q0, %1, %2\;sbc\\t%R0, %1, %1" ++ "&& reload_completed" ++ [(parallel [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))]) ++ (set (match_dup 3) (minus:SI (minus:SI (match_dup 1) (match_dup 1)) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ { ++ operands[3] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ } + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_expand "subsi3" +@@ -1203,16 +1337,22 @@ + "TARGET_THUMB1" + "sub\\t%0, %1, %2" + [(set_attr "length" "2") +- (set_attr "conds" "set")]) ++ (set_attr "conds" "set") ++ (set_attr "type" "alus_reg")] ++) + + ; ??? Check Thumb-2 split length + (define_insn_and_split "*arm_subsi3_insn" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r,rk,r") +- (minus:SI (match_operand:SI 1 "reg_or_int_operand" "rI,r,r,k,?n") +- (match_operand:SI 2 "reg_or_int_operand" "r,I,r,r, r")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=l,l ,l ,l ,r ,r,r,rk,r") ++ (minus:SI (match_operand:SI 1 "reg_or_int_operand" "l ,0 ,l ,Pz,rI,r,r,k ,?n") ++ (match_operand:SI 2 "reg_or_int_operand" "l ,Py,Pd,l ,r ,I,r,r ,r")))] + "TARGET_32BIT" + "@ ++ sub%?\\t%0, %1, %2 ++ sub%?\\t%0, %2 ++ sub%?\\t%0, %1, %2 + rsb%?\\t%0, %2, %1 ++ rsb%?\\t%0, %2, %1 + sub%?\\t%0, %1, %2 + sub%?\\t%0, %1, %2 + sub%?\\t%0, %1, %2 +@@ -1225,9 +1365,11 @@ + INTVAL (operands[1]), operands[0], operands[2], 0); + DONE; + " +- [(set_attr "length" "4,4,4,4,16") ++ [(set_attr "length" "4,4,4,4,4,4,4,4,16") ++ (set_attr "arch" "t2,t2,t2,t2,*,*,*,*,*") + (set_attr "predicable" "yes") +- (set_attr "type" "*,simple_alu_imm,*,*,*")] ++ (set_attr "predicable_short_it" "yes,yes,yes,yes,no,no,no,no,no") ++ (set_attr "type" "alu_reg,alu_reg,alu_reg,alu_reg,alu_imm,alu_imm,alu_reg,alu_reg,multiple")] + ) + + (define_peephole2 +@@ -1257,10 +1399,10 @@ + sub%.\\t%0, %1, %2 + rsb%.\\t%0, %2, %1" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm,*,*")] ++ (set_attr "type" "alus_imm,alus_reg,alus_reg")] + ) + +-(define_insn "*subsi3_compare" ++(define_insn "subsi3_compare" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_operand:SI 1 "arm_rhs_operand" "r,r,I") + (match_operand:SI 2 "arm_rhs_operand" "I,r,r"))) +@@ -1272,32 +1414,9 @@ + sub%.\\t%0, %1, %2 + rsb%.\\t%0, %2, %1" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm,*,*")] ++ (set_attr "type" "alus_imm,alus_reg,alus_reg")] + ) + +-(define_expand "decscc" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r") +- (minus:SI (match_operand:SI 1 "s_register_operand" "0,?r") +- (match_operator:SI 2 "arm_comparison_operator" +- [(match_operand 3 "cc_register" "") (const_int 0)])))] +- "TARGET_32BIT" +- "" +-) +- +-(define_insn "*arm_decscc" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r") +- (minus:SI (match_operand:SI 1 "s_register_operand" "0,?r") +- (match_operator:SI 2 "arm_comparison_operator" +- [(match_operand 3 "cc_register" "") (const_int 0)])))] +- "TARGET_ARM" +- "@ +- sub%d2\\t%0, %1, #1 +- mov%D2\\t%0, %1\;sub%d2\\t%0, %1, #1" +- [(set_attr "conds" "use") +- (set_attr "length" "*,8") +- (set_attr "type" "simple_alu_imm,*")] +-) +- + (define_expand "subsf3" + [(set (match_operand:SF 0 "s_register_operand" "") + (minus:SF (match_operand:SF 1 "s_register_operand" "") +@@ -1317,6 +1436,20 @@ + + ;; Multiplication insns + ++(define_expand "mulhi3" ++ [(set (match_operand:HI 0 "s_register_operand" "") ++ (mult:HI (match_operand:HI 1 "s_register_operand" "") ++ (match_operand:HI 2 "s_register_operand" "")))] ++ "TARGET_DSP_MULTIPLY" ++ " ++ { ++ rtx result = gen_reg_rtx (SImode); ++ emit_insn (gen_mulhisi3 (result, operands[1], operands[2])); ++ emit_move_insn (operands[0], gen_lowpart (HImode, result)); ++ DONE; ++ }" ++) ++ + (define_expand "mulsi3" + [(set (match_operand:SI 0 "s_register_operand" "") + (mult:SI (match_operand:SI 2 "s_register_operand" "") +@@ -1332,18 +1465,21 @@ + (match_operand:SI 1 "s_register_operand" "%0,r")))] + "TARGET_32BIT && !arm_arch6" + "mul%?\\t%0, %2, %1" +- [(set_attr "insn" "mul") ++ [(set_attr "type" "mul") + (set_attr "predicable" "yes")] + ) + + (define_insn "*arm_mulsi3_v6" +- [(set (match_operand:SI 0 "s_register_operand" "=r") +- (mult:SI (match_operand:SI 1 "s_register_operand" "r") +- (match_operand:SI 2 "s_register_operand" "r")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=l,l,r") ++ (mult:SI (match_operand:SI 1 "s_register_operand" "0,l,r") ++ (match_operand:SI 2 "s_register_operand" "l,0,r")))] + "TARGET_32BIT && arm_arch6" + "mul%?\\t%0, %1, %2" +- [(set_attr "insn" "mul") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "mul") ++ (set_attr "predicable" "yes") ++ (set_attr "arch" "t2,t2,*") ++ (set_attr "length" "4") ++ (set_attr "predicable_short_it" "yes,yes,no")] + ) + + ; Unfortunately with the Thumb the '&'/'0' trick can fails when operands +@@ -1363,7 +1499,7 @@ + return \"mul\\t%0, %2\"; + " + [(set_attr "length" "4,4,2") +- (set_attr "insn" "mul")] ++ (set_attr "type" "muls")] + ) + + (define_insn "*thumb_mulsi3_v6" +@@ -1376,7 +1512,7 @@ + mul\\t%0, %1 + mul\\t%0, %1" + [(set_attr "length" "2") +- (set_attr "insn" "mul")] ++ (set_attr "type" "muls")] + ) + + (define_insn "*mulsi3_compare0" +@@ -1390,7 +1526,7 @@ + "TARGET_ARM && !arm_arch6" + "mul%.\\t%0, %2, %1" + [(set_attr "conds" "set") +- (set_attr "insn" "muls")] ++ (set_attr "type" "muls")] + ) + + (define_insn "*mulsi3_compare0_v6" +@@ -1404,7 +1540,7 @@ + "TARGET_ARM && arm_arch6 && optimize_size" + "mul%.\\t%0, %2, %1" + [(set_attr "conds" "set") +- (set_attr "insn" "muls")] ++ (set_attr "type" "muls")] + ) + + (define_insn "*mulsi_compare0_scratch" +@@ -1417,7 +1553,7 @@ + "TARGET_ARM && !arm_arch6" + "mul%.\\t%0, %2, %1" + [(set_attr "conds" "set") +- (set_attr "insn" "muls")] ++ (set_attr "type" "muls")] + ) + + (define_insn "*mulsi_compare0_scratch_v6" +@@ -1430,7 +1566,7 @@ + "TARGET_ARM && arm_arch6 && optimize_size" + "mul%.\\t%0, %2, %1" + [(set_attr "conds" "set") +- (set_attr "insn" "muls")] ++ (set_attr "type" "muls")] + ) + + ;; Unnamed templates to match MLA instruction. +@@ -1443,7 +1579,7 @@ + (match_operand:SI 3 "s_register_operand" "r,r,0,0")))] + "TARGET_32BIT && !arm_arch6" + "mla%?\\t%0, %2, %1, %3" +- [(set_attr "insn" "mla") ++ [(set_attr "type" "mla") + (set_attr "predicable" "yes")] + ) + +@@ -1455,8 +1591,9 @@ + (match_operand:SI 3 "s_register_operand" "r")))] + "TARGET_32BIT && arm_arch6" + "mla%?\\t%0, %2, %1, %3" +- [(set_attr "insn" "mla") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "mla") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_insn "*mulsi3addsi_compare0" +@@ -1473,7 +1610,7 @@ + "TARGET_ARM && arm_arch6" + "mla%.\\t%0, %2, %1, %3" + [(set_attr "conds" "set") +- (set_attr "insn" "mlas")] ++ (set_attr "type" "mlas")] + ) + + (define_insn "*mulsi3addsi_compare0_v6" +@@ -1490,7 +1627,7 @@ + "TARGET_ARM && arm_arch6 && optimize_size" + "mla%.\\t%0, %2, %1, %3" + [(set_attr "conds" "set") +- (set_attr "insn" "mlas")] ++ (set_attr "type" "mlas")] + ) + + (define_insn "*mulsi3addsi_compare0_scratch" +@@ -1505,7 +1642,7 @@ + "TARGET_ARM && !arm_arch6" + "mla%.\\t%0, %2, %1, %3" + [(set_attr "conds" "set") +- (set_attr "insn" "mlas")] ++ (set_attr "type" "mlas")] + ) + + (define_insn "*mulsi3addsi_compare0_scratch_v6" +@@ -1520,7 +1657,7 @@ + "TARGET_ARM && arm_arch6 && optimize_size" + "mla%.\\t%0, %2, %1, %3" + [(set_attr "conds" "set") +- (set_attr "insn" "mlas")] ++ (set_attr "type" "mlas")] + ) + + (define_insn "*mulsi3subsi" +@@ -1531,8 +1668,9 @@ + (match_operand:SI 1 "s_register_operand" "r"))))] + "TARGET_32BIT && arm_arch_thumb2" + "mls%?\\t%0, %2, %1, %3" +- [(set_attr "insn" "mla") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "mla") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_expand "maddsidi4" +@@ -1554,7 +1692,7 @@ + (match_operand:DI 1 "s_register_operand" "0")))] + "TARGET_32BIT && arm_arch3m && !arm_arch6" + "smlal%?\\t%Q0, %R0, %3, %2" +- [(set_attr "insn" "smlal") ++ [(set_attr "type" "smlal") + (set_attr "predicable" "yes")] + ) + +@@ -1567,8 +1705,9 @@ + (match_operand:DI 1 "s_register_operand" "0")))] + "TARGET_32BIT && arm_arch6" + "smlal%?\\t%Q0, %R0, %3, %2" +- [(set_attr "insn" "smlal") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "smlal") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + ;; 32x32->64 widening multiply. +@@ -1593,7 +1732,7 @@ + (sign_extend:DI (match_operand:SI 2 "s_register_operand" "r"))))] + "TARGET_32BIT && arm_arch3m && !arm_arch6" + "smull%?\\t%Q0, %R0, %1, %2" +- [(set_attr "insn" "smull") ++ [(set_attr "type" "smull") + (set_attr "predicable" "yes")] + ) + +@@ -1604,8 +1743,9 @@ + (sign_extend:DI (match_operand:SI 2 "s_register_operand" "r"))))] + "TARGET_32BIT && arm_arch6" + "smull%?\\t%Q0, %R0, %1, %2" +- [(set_attr "insn" "smull") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "smull") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_expand "umulsidi3" +@@ -1624,7 +1764,7 @@ + (zero_extend:DI (match_operand:SI 2 "s_register_operand" "r"))))] + "TARGET_32BIT && arm_arch3m && !arm_arch6" + "umull%?\\t%Q0, %R0, %1, %2" +- [(set_attr "insn" "umull") ++ [(set_attr "type" "umull") + (set_attr "predicable" "yes")] + ) + +@@ -1635,8 +1775,9 @@ + (zero_extend:DI (match_operand:SI 2 "s_register_operand" "r"))))] + "TARGET_32BIT && arm_arch6" + "umull%?\\t%Q0, %R0, %1, %2" +- [(set_attr "insn" "umull") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "umull") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_expand "umaddsidi4" +@@ -1658,7 +1799,7 @@ + (match_operand:DI 1 "s_register_operand" "0")))] + "TARGET_32BIT && arm_arch3m && !arm_arch6" + "umlal%?\\t%Q0, %R0, %3, %2" +- [(set_attr "insn" "umlal") ++ [(set_attr "type" "umlal") + (set_attr "predicable" "yes")] + ) + +@@ -1671,8 +1812,9 @@ + (match_operand:DI 1 "s_register_operand" "0")))] + "TARGET_32BIT && arm_arch6" + "umlal%?\\t%Q0, %R0, %3, %2" +- [(set_attr "insn" "umlal") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "umlal") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_expand "smulsi3_highpart" +@@ -1700,7 +1842,7 @@ + (clobber (match_scratch:SI 3 "=&r,&r"))] + "TARGET_32BIT && arm_arch3m && !arm_arch6" + "smull%?\\t%3, %0, %2, %1" +- [(set_attr "insn" "smull") ++ [(set_attr "type" "smull") + (set_attr "predicable" "yes")] + ) + +@@ -1715,8 +1857,9 @@ + (clobber (match_scratch:SI 3 "=r"))] + "TARGET_32BIT && arm_arch6" + "smull%?\\t%3, %0, %2, %1" +- [(set_attr "insn" "smull") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "smull") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_expand "umulsi3_highpart" +@@ -1744,7 +1887,7 @@ + (clobber (match_scratch:SI 3 "=&r,&r"))] + "TARGET_32BIT && arm_arch3m && !arm_arch6" + "umull%?\\t%3, %0, %2, %1" +- [(set_attr "insn" "umull") ++ [(set_attr "type" "umull") + (set_attr "predicable" "yes")] + ) + +@@ -1759,8 +1902,9 @@ + (clobber (match_scratch:SI 3 "=r"))] + "TARGET_32BIT && arm_arch6" + "umull%?\\t%3, %0, %2, %1" +- [(set_attr "insn" "umull") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "umull") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_insn "mulhisi3" +@@ -1771,7 +1915,7 @@ + (match_operand:HI 2 "s_register_operand" "r"))))] + "TARGET_DSP_MULTIPLY" + "smulbb%?\\t%0, %1, %2" +- [(set_attr "insn" "smulxy") ++ [(set_attr "type" "smulxy") + (set_attr "predicable" "yes")] + ) + +@@ -1784,8 +1928,9 @@ + (match_operand:HI 2 "s_register_operand" "r"))))] + "TARGET_DSP_MULTIPLY" + "smultb%?\\t%0, %1, %2" +- [(set_attr "insn" "smulxy") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "smulxy") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_insn "*mulhisi3bt" +@@ -1797,8 +1942,9 @@ + (const_int 16))))] + "TARGET_DSP_MULTIPLY" + "smulbt%?\\t%0, %1, %2" +- [(set_attr "insn" "smulxy") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "smulxy") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_insn "*mulhisi3tt" +@@ -1811,8 +1957,9 @@ + (const_int 16))))] + "TARGET_DSP_MULTIPLY" + "smultt%?\\t%0, %1, %2" +- [(set_attr "insn" "smulxy") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "smulxy") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_insn "maddhisi4" +@@ -1824,8 +1971,9 @@ + (match_operand:SI 3 "s_register_operand" "r")))] + "TARGET_DSP_MULTIPLY" + "smlabb%?\\t%0, %1, %2, %3" +- [(set_attr "insn" "smlaxy") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "smlaxy") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + ;; Note: there is no maddhisi4ibt because this one is canonical form +@@ -1839,8 +1987,9 @@ + (match_operand:SI 3 "s_register_operand" "r")))] + "TARGET_DSP_MULTIPLY" + "smlatb%?\\t%0, %1, %2, %3" +- [(set_attr "insn" "smlaxy") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "smlaxy") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_insn "*maddhisi4tt" +@@ -1854,8 +2003,9 @@ + (match_operand:SI 3 "s_register_operand" "r")))] + "TARGET_DSP_MULTIPLY" + "smlatt%?\\t%0, %1, %2, %3" +- [(set_attr "insn" "smlaxy") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "smlaxy") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_insn "maddhidi4" +@@ -1862,14 +2012,15 @@ + [(set (match_operand:DI 0 "s_register_operand" "=r") + (plus:DI + (mult:DI (sign_extend:DI +- (match_operand:HI 1 "s_register_operand" "r")) ++ (match_operand:HI 1 "s_register_operand" "r")) + (sign_extend:DI + (match_operand:HI 2 "s_register_operand" "r"))) + (match_operand:DI 3 "s_register_operand" "0")))] + "TARGET_DSP_MULTIPLY" + "smlalbb%?\\t%Q0, %R0, %1, %2" +- [(set_attr "insn" "smlalxy") +- (set_attr "predicable" "yes")]) ++ [(set_attr "type" "smlalxy") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + ;; Note: there is no maddhidi4ibt because this one is canonical form + (define_insn "*maddhidi4tb" +@@ -1884,8 +2035,9 @@ + (match_operand:DI 3 "s_register_operand" "0")))] + "TARGET_DSP_MULTIPLY" + "smlaltb%?\\t%Q0, %R0, %1, %2" +- [(set_attr "insn" "smlalxy") +- (set_attr "predicable" "yes")]) ++ [(set_attr "type" "smlalxy") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*maddhidi4tt" + [(set (match_operand:DI 0 "s_register_operand" "=r") +@@ -1901,8 +2053,9 @@ + (match_operand:DI 3 "s_register_operand" "0")))] + "TARGET_DSP_MULTIPLY" + "smlaltt%?\\t%Q0, %R0, %1, %2" +- [(set_attr "insn" "smlalxy") +- (set_attr "predicable" "yes")]) ++ [(set_attr "type" "smlalxy") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_expand "mulsf3" + [(set (match_operand:SF 0 "s_register_operand" "") +@@ -2030,13 +2183,50 @@ + "" + ) + +-(define_insn "*anddi3_insn" +- [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") +- (and:DI (match_operand:DI 1 "s_register_operand" "%0,r") +- (match_operand:DI 2 "s_register_operand" "r,r")))] +- "TARGET_32BIT && !TARGET_IWMMXT && !TARGET_NEON" +- "#" +- [(set_attr "length" "8")] ++(define_insn_and_split "*anddi3_insn" ++ [(set (match_operand:DI 0 "s_register_operand" "=w,w ,&r,&r,&r,&r,?w,?w") ++ (and:DI (match_operand:DI 1 "s_register_operand" "%w,0 ,0 ,r ,0 ,r ,w ,0") ++ (match_operand:DI 2 "arm_anddi_operand_neon" "w ,DL,r ,r ,De,De,w ,DL")))] ++ "TARGET_32BIT && !TARGET_IWMMXT" ++{ ++ switch (which_alternative) ++ { ++ case 0: /* fall through */ ++ case 6: return "vand\t%P0, %P1, %P2"; ++ case 1: /* fall through */ ++ case 7: return neon_output_logic_immediate ("vand", &operands[2], ++ DImode, 1, VALID_NEON_QREG_MODE (DImode)); ++ case 2: ++ case 3: ++ case 4: ++ case 5: /* fall through */ ++ return "#"; ++ default: gcc_unreachable (); ++ } ++} ++ "TARGET_32BIT && !TARGET_IWMMXT && reload_completed ++ && !(IS_VFP_REGNUM (REGNO (operands[0])))" ++ [(set (match_dup 3) (match_dup 4)) ++ (set (match_dup 5) (match_dup 6))] ++ " ++ { ++ operands[3] = gen_lowpart (SImode, operands[0]); ++ operands[5] = gen_highpart (SImode, operands[0]); ++ ++ operands[4] = simplify_gen_binary (AND, SImode, ++ gen_lowpart (SImode, operands[1]), ++ gen_lowpart (SImode, operands[2])); ++ operands[6] = simplify_gen_binary (AND, SImode, ++ gen_highpart (SImode, operands[1]), ++ gen_highpart_mode (SImode, DImode, operands[2])); ++ ++ }" ++ [(set_attr "type" "neon_logic,neon_logic,multiple,multiple,\ ++ multiple,multiple,neon_logic,neon_logic") ++ (set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,*,*, ++ avoid_neon_for_64bits,avoid_neon_for_64bits") ++ (set_attr "length" "*,*,8,8,8,8,*,*") ++ ] + ) + + (define_insn_and_split "*anddi_zesidi_di" +@@ -2057,7 +2247,8 @@ + operands[0] = gen_lowpart (SImode, operands[0]); + operands[1] = gen_lowpart (SImode, operands[1]); + }" +- [(set_attr "length" "8")] ++ [(set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*anddi_sesdi_di" +@@ -2067,7 +2258,8 @@ + (match_operand:DI 1 "s_register_operand" "0,r")))] + "TARGET_32BIT" + "#" +- [(set_attr "length" "8")] ++ [(set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_expand "andsi3" +@@ -2151,12 +2343,13 @@ + + ; ??? Check split length for Thumb-2 + (define_insn_and_split "*arm_andsi3_insn" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r,r") +- (and:SI (match_operand:SI 1 "s_register_operand" "r,r,r,r") +- (match_operand:SI 2 "reg_or_int_operand" "I,K,r,?n")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=r,l,r,r,r") ++ (and:SI (match_operand:SI 1 "s_register_operand" "%r,0,r,r,r") ++ (match_operand:SI 2 "reg_or_int_operand" "I,l,K,r,?n")))] + "TARGET_32BIT" + "@ + and%?\\t%0, %1, %2 ++ and%?\\t%0, %1, %2 + bic%?\\t%0, %1, #%B2 + and%?\\t%0, %1, %2 + #" +@@ -2170,9 +2363,10 @@ + INTVAL (operands[2]), operands[0], operands[1], 0); + DONE; + " +- [(set_attr "length" "4,4,4,16") ++ [(set_attr "length" "4,4,4,4,16") + (set_attr "predicable" "yes") +- (set_attr "type" "simple_alu_imm,simple_alu_imm,*,simple_alu_imm")] ++ (set_attr "predicable_short_it" "no,yes,no,no,no") ++ (set_attr "type" "logic_imm,logic_imm,logic_reg,logic_reg,logic_imm")] + ) + + (define_insn "*thumb1_andsi3_insn" +@@ -2182,7 +2376,7 @@ + "TARGET_THUMB1" + "and\\t%0, %2" + [(set_attr "length" "2") +- (set_attr "type" "simple_alu_imm") ++ (set_attr "type" "logic_imm") + (set_attr "conds" "set")]) + + (define_insn "*andsi3_compare0" +@@ -2199,7 +2393,7 @@ + bic%.\\t%0, %1, #%B2 + and%.\\t%0, %1, %2" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] ++ (set_attr "type" "logics_imm,logics_imm,logics_reg")] + ) + + (define_insn "*andsi3_compare0_scratch" +@@ -2215,7 +2409,7 @@ + bic%.\\t%2, %0, #%B1 + tst%?\\t%0, %1" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] ++ (set_attr "type" "logics_imm,logics_imm,logics_reg")] + ) + + (define_insn "*zeroextractsi_compare0_scratch" +@@ -2222,7 +2416,7 @@ + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV (zero_extract:SI + (match_operand:SI 0 "s_register_operand" "r") +- (match_operand 1 "const_int_operand" "n") ++ (match_operand 1 "const_int_operand" "n") + (match_operand 2 "const_int_operand" "n")) + (const_int 0)))] + "TARGET_32BIT +@@ -2238,7 +2432,8 @@ + " + [(set_attr "conds" "set") + (set_attr "predicable" "yes") +- (set_attr "type" "simple_alu_imm")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "logics_imm")] + ) + + (define_insn_and_split "*ne_zeroextractsi" +@@ -2275,7 +2470,8 @@ + (set (attr "length") + (if_then_else (eq_attr "is_thumb" "yes") + (const_int 12) +- (const_int 8)))] ++ (const_int 8))) ++ (set_attr "type" "multiple")] + ) + + (define_insn_and_split "*ne_zeroextractsi_shifted" +@@ -2300,7 +2496,8 @@ + operands[2] = GEN_INT (32 - INTVAL (operands[2])); + " + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn_and_split "*ite_ne_zeroextractsi" +@@ -2338,7 +2535,8 @@ + << INTVAL (operands[3])); + " + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn_and_split "*ite_ne_zeroextractsi_shifted" +@@ -2365,7 +2563,8 @@ + operands[2] = GEN_INT (32 - INTVAL (operands[2])); + " + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_split +@@ -2665,7 +2864,9 @@ + "arm_arch_thumb2" + "bfc%?\t%0, %2, %1" + [(set_attr "length" "4") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "bfm")] + ) + + (define_insn "insv_t2" +@@ -2676,7 +2877,9 @@ + "arm_arch_thumb2" + "bfi%?\t%0, %3, %2, %1" + [(set_attr "length" "4") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "bfm")] + ) + + ; constants for op 2 will never be given to these patterns. +@@ -2701,9 +2904,10 @@ + operands[2] = gen_lowpart (SImode, operands[2]); + }" + [(set_attr "length" "8") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "type" "multiple")] + ) +- ++ + (define_insn_and_split "*anddi_notzesidi_di" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") + (and:DI (not:DI (zero_extend:DI +@@ -2728,9 +2932,11 @@ + operands[1] = gen_lowpart (SImode, operands[1]); + }" + [(set_attr "length" "4,8") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "multiple")] + ) +- ++ + (define_insn_and_split "*anddi_notsesidi_di" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") + (and:DI (not:DI (sign_extend:DI +@@ -2751,9 +2957,11 @@ + operands[1] = gen_lowpart (SImode, operands[1]); + }" + [(set_attr "length" "8") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "multiple")] + ) +- ++ + (define_insn "andsi_notsi_si" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (and:SI (not:SI (match_operand:SI 2 "s_register_operand" "r")) +@@ -2760,7 +2968,9 @@ + (match_operand:SI 1 "s_register_operand" "r")))] + "TARGET_32BIT" + "bic%?\\t%0, %1, %2" +- [(set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "logic_reg")] + ) + + (define_insn "thumb1_bicsi3" +@@ -2770,7 +2980,9 @@ + "TARGET_THUMB1" + "bic\\t%0, %1" + [(set_attr "length" "2") +- (set_attr "conds" "set")]) ++ (set_attr "conds" "set") ++ (set_attr "type" "logics_reg")] ++) + + (define_insn "andsi_not_shiftsi_si" + [(set (match_operand:SI 0 "s_register_operand" "=r") +@@ -2783,8 +2995,8 @@ + [(set_attr "predicable" "yes") + (set_attr "shift" "2") + (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "") +- (const_string "alu_shift") +- (const_string "alu_shift_reg")))] ++ (const_string "logic_shift_imm") ++ (const_string "logic_shift_reg")))] + ) + + (define_insn "*andsi_notsi_si_compare0" +@@ -2797,7 +3009,8 @@ + (and:SI (not:SI (match_dup 2)) (match_dup 1)))] + "TARGET_32BIT" + "bic%.\\t%0, %1, %2" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "logics_shift_reg")] + ) + + (define_insn "*andsi_notsi_si_compare0_scratch" +@@ -2809,7 +3022,8 @@ + (clobber (match_scratch:SI 0 "=r"))] + "TARGET_32BIT" + "bic%.\\t%0, %1, %2" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "logics_shift_reg")] + ) + + (define_expand "iordi3" +@@ -2820,14 +3034,48 @@ + "" + ) + +-(define_insn "*iordi3_insn" +- [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") +- (ior:DI (match_operand:DI 1 "s_register_operand" "%0,r") +- (match_operand:DI 2 "s_register_operand" "r,r")))] +- "TARGET_32BIT && !TARGET_IWMMXT && !TARGET_NEON" +- "#" +- [(set_attr "length" "8") +- (set_attr "predicable" "yes")] ++(define_insn_and_split "*iordi3_insn" ++ [(set (match_operand:DI 0 "s_register_operand" "=w,w ,&r,&r,&r,&r,?w,?w") ++ (ior:DI (match_operand:DI 1 "s_register_operand" "%w,0 ,0 ,r ,0 ,r ,w ,0") ++ (match_operand:DI 2 "arm_iordi_operand_neon" "w ,Dl,r ,r ,Df,Df,w ,Dl")))] ++ "TARGET_32BIT && !TARGET_IWMMXT" ++ { ++ switch (which_alternative) ++ { ++ case 0: /* fall through */ ++ case 6: return "vorr\t%P0, %P1, %P2"; ++ case 1: /* fall through */ ++ case 7: return neon_output_logic_immediate ("vorr", &operands[2], ++ DImode, 0, VALID_NEON_QREG_MODE (DImode)); ++ case 2: ++ case 3: ++ case 4: ++ case 5: ++ return "#"; ++ default: gcc_unreachable (); ++ } ++ } ++ "TARGET_32BIT && !TARGET_IWMMXT && reload_completed ++ && !(IS_VFP_REGNUM (REGNO (operands[0])))" ++ [(set (match_dup 3) (match_dup 4)) ++ (set (match_dup 5) (match_dup 6))] ++ " ++ { ++ operands[3] = gen_lowpart (SImode, operands[0]); ++ operands[5] = gen_highpart (SImode, operands[0]); ++ ++ operands[4] = simplify_gen_binary (IOR, SImode, ++ gen_lowpart (SImode, operands[1]), ++ gen_lowpart (SImode, operands[2])); ++ operands[6] = simplify_gen_binary (IOR, SImode, ++ gen_highpart (SImode, operands[1]), ++ gen_highpart_mode (SImode, DImode, operands[2])); ++ ++ }" ++ [(set_attr "type" "neon_logic,neon_logic,multiple,multiple,multiple,\ ++ multiple,neon_logic,neon_logic") ++ (set_attr "length" "*,*,8,8,8,8,*,*") ++ (set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits")] + ) + + (define_insn "*iordi_zesidi_di" +@@ -2840,7 +3088,9 @@ + orr%?\\t%Q0, %Q1, %2 + #" + [(set_attr "length" "4,8") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "logic_reg,multiple")] + ) + + (define_insn "*iordi_sesidi_di" +@@ -2851,7 +3101,8 @@ + "TARGET_32BIT" + "#" + [(set_attr "length" "8") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "type" "multiple")] + ) + + (define_expand "iorsi3" +@@ -2885,12 +3136,13 @@ + ) + + (define_insn_and_split "*iorsi3_insn" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r,r") +- (ior:SI (match_operand:SI 1 "s_register_operand" "%r,r,r,r") +- (match_operand:SI 2 "reg_or_int_operand" "I,K,r,?n")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=r,l,r,r,r") ++ (ior:SI (match_operand:SI 1 "s_register_operand" "%r,0,r,r,r") ++ (match_operand:SI 2 "reg_or_int_operand" "I,l,K,r,?n")))] + "TARGET_32BIT" + "@ + orr%?\\t%0, %1, %2 ++ orr%?\\t%0, %1, %2 + orn%?\\t%0, %1, #%B2 + orr%?\\t%0, %1, %2 + #" +@@ -2900,14 +3152,15 @@ + || (TARGET_THUMB2 && const_ok_for_arm (~INTVAL (operands[2]))))" + [(clobber (const_int 0))] + { +- arm_split_constant (IOR, SImode, curr_insn, ++ arm_split_constant (IOR, SImode, curr_insn, + INTVAL (operands[2]), operands[0], operands[1], 0); + DONE; + } +- [(set_attr "length" "4,4,4,16") +- (set_attr "arch" "32,t2,32,32") ++ [(set_attr "length" "4,4,4,4,16") ++ (set_attr "arch" "32,t2,t2,32,32") + (set_attr "predicable" "yes") +- (set_attr "type" "simple_alu_imm,simple_alu_imm,*,*")] ++ (set_attr "predicable_short_it" "no,yes,no,no,no") ++ (set_attr "type" "logic_imm,logic_reg,logic_imm,logic_reg,logic_reg")] + ) + + (define_insn "*thumb1_iorsi3_insn" +@@ -2917,7 +3170,8 @@ + "TARGET_THUMB1" + "orr\\t%0, %2" + [(set_attr "length" "2") +- (set_attr "conds" "set")]) ++ (set_attr "conds" "set") ++ (set_attr "type" "logics_reg")]) + + (define_peephole2 + [(match_scratch:SI 3 "r") +@@ -2942,7 +3196,7 @@ + "TARGET_32BIT" + "orr%.\\t%0, %1, %2" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm,*")] ++ (set_attr "type" "logics_imm,logics_reg")] + ) + + (define_insn "*iorsi3_compare0_scratch" +@@ -2954,25 +3208,55 @@ + "TARGET_32BIT" + "orr%.\\t%0, %1, %2" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm, *")] ++ (set_attr "type" "logics_imm,logics_reg")] + ) + + (define_expand "xordi3" + [(set (match_operand:DI 0 "s_register_operand" "") + (xor:DI (match_operand:DI 1 "s_register_operand" "") +- (match_operand:DI 2 "s_register_operand" "")))] ++ (match_operand:DI 2 "arm_xordi_operand" "")))] + "TARGET_32BIT" + "" + ) + +-(define_insn "*xordi3_insn" +- [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") +- (xor:DI (match_operand:DI 1 "s_register_operand" "%0,r") +- (match_operand:DI 2 "s_register_operand" "r,r")))] +- "TARGET_32BIT && !TARGET_IWMMXT && !TARGET_NEON" +- "#" +- [(set_attr "length" "8") +- (set_attr "predicable" "yes")] ++(define_insn_and_split "*xordi3_insn" ++ [(set (match_operand:DI 0 "s_register_operand" "=w,&r,&r,&r,&r,?w") ++ (xor:DI (match_operand:DI 1 "s_register_operand" "w ,%0,r ,0 ,r ,w") ++ (match_operand:DI 2 "arm_xordi_operand" "w ,r ,r ,Dg,Dg,w")))] ++ "TARGET_32BIT && !TARGET_IWMMXT" ++{ ++ switch (which_alternative) ++ { ++ case 1: ++ case 2: ++ case 3: ++ case 4: /* fall through */ ++ return "#"; ++ case 0: /* fall through */ ++ case 5: return "veor\t%P0, %P1, %P2"; ++ default: gcc_unreachable (); ++ } ++} ++ "TARGET_32BIT && !TARGET_IWMMXT && reload_completed ++ && !(IS_VFP_REGNUM (REGNO (operands[0])))" ++ [(set (match_dup 3) (match_dup 4)) ++ (set (match_dup 5) (match_dup 6))] ++ " ++ { ++ operands[3] = gen_lowpart (SImode, operands[0]); ++ operands[5] = gen_highpart (SImode, operands[0]); ++ ++ operands[4] = simplify_gen_binary (XOR, SImode, ++ gen_lowpart (SImode, operands[1]), ++ gen_lowpart (SImode, operands[2])); ++ operands[6] = simplify_gen_binary (XOR, SImode, ++ gen_highpart (SImode, operands[1]), ++ gen_highpart_mode (SImode, DImode, operands[2])); ++ ++ }" ++ [(set_attr "length" "*,8,8,8,8,*") ++ (set_attr "type" "neon_logic,multiple,multiple,multiple,multiple,neon_logic") ++ (set_attr "arch" "neon_for_64bits,*,*,*,*,avoid_neon_for_64bits")] + ) + + (define_insn "*xordi_zesidi_di" +@@ -2985,7 +3269,9 @@ + eor%?\\t%Q0, %Q1, %2 + #" + [(set_attr "length" "4,8") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "logic_reg")] + ) + + (define_insn "*xordi_sesidi_di" +@@ -2996,7 +3282,8 @@ + "TARGET_32BIT" + "#" + [(set_attr "length" "8") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "type" "multiple")] + ) + + (define_expand "xorsi3" +@@ -3028,13 +3315,14 @@ + ) + + (define_insn_and_split "*arm_xorsi3" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") +- (xor:SI (match_operand:SI 1 "s_register_operand" "%r,r,r") +- (match_operand:SI 2 "reg_or_int_operand" "I,r,?n")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=r,l,r,r") ++ (xor:SI (match_operand:SI 1 "s_register_operand" "%r,0,r,r") ++ (match_operand:SI 2 "reg_or_int_operand" "I,l,r,?n")))] + "TARGET_32BIT" + "@ + eor%?\\t%0, %1, %2 + eor%?\\t%0, %1, %2 ++ eor%?\\t%0, %1, %2 + #" + "TARGET_32BIT + && CONST_INT_P (operands[2]) +@@ -3045,9 +3333,10 @@ + INTVAL (operands[2]), operands[0], operands[1], 0); + DONE; + } +- [(set_attr "length" "4,4,16") ++ [(set_attr "length" "4,4,4,16") + (set_attr "predicable" "yes") +- (set_attr "type" "simple_alu_imm,*,*")] ++ (set_attr "predicable_short_it" "no,yes,no,no") ++ (set_attr "type" "logic_imm,logic_reg,logic_reg,multiple")] + ) + + (define_insn "*thumb1_xorsi3_insn" +@@ -3058,7 +3347,7 @@ + "eor\\t%0, %2" + [(set_attr "length" "2") + (set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm")] ++ (set_attr "type" "logics_reg")] + ) + + (define_insn "*xorsi3_compare0" +@@ -3071,7 +3360,7 @@ + "TARGET_32BIT" + "eor%.\\t%0, %1, %2" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm,*")] ++ (set_attr "type" "logics_imm,logics_reg")] + ) + + (define_insn "*xorsi3_compare0_scratch" +@@ -3082,7 +3371,7 @@ + "TARGET_32BIT" + "teq%?\\t%0, %1" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm, *")] ++ (set_attr "type" "logics_imm,logics_reg")] + ) + + ; By splitting (IOR (AND (NOT A) (NOT B)) C) as D = AND (IOR A B) (NOT C), +@@ -3102,16 +3391,22 @@ + "" + ) + +-(define_insn "*andsi_iorsi3_notsi" ++(define_insn_and_split "*andsi_iorsi3_notsi" + [(set (match_operand:SI 0 "s_register_operand" "=&r,&r,&r") + (and:SI (ior:SI (match_operand:SI 1 "s_register_operand" "%0,r,r") + (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI")) + (not:SI (match_operand:SI 3 "arm_rhs_operand" "rI,rI,rI"))))] + "TARGET_32BIT" +- "orr%?\\t%0, %1, %2\;bic%?\\t%0, %0, %3" ++ "#" ; "orr%?\\t%0, %1, %2\;bic%?\\t%0, %0, %3" ++ "&& reload_completed" ++ [(set (match_dup 0) (ior:SI (match_dup 1) (match_dup 2))) ++ (set (match_dup 0) (and:SI (not:SI (match_dup 3)) (match_dup 0)))] ++ "" + [(set_attr "length" "8") + (set_attr "ce_count" "2") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "multiple")] + ) + + ; ??? Are these four splitters still beneficial when the Thumb-2 bitfield +@@ -3247,7 +3542,9 @@ + (const_int 0)))] + "TARGET_32BIT" + "bic%?\\t%0, %1, %1, asr #31" +- [(set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "logic_shift_reg")] + ) + + (define_insn "*smax_m1" +@@ -3256,20 +3553,31 @@ + (const_int -1)))] + "TARGET_32BIT" + "orr%?\\t%0, %1, %1, asr #31" +- [(set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "logic_shift_reg")] + ) + +-(define_insn "*arm_smax_insn" ++(define_insn_and_split "*arm_smax_insn" + [(set (match_operand:SI 0 "s_register_operand" "=r,r") + (smax:SI (match_operand:SI 1 "s_register_operand" "%0,?r") + (match_operand:SI 2 "arm_rhs_operand" "rI,rI"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ARM" +- "@ +- cmp\\t%1, %2\;movlt\\t%0, %2 +- cmp\\t%1, %2\;movge\\t%0, %1\;movlt\\t%0, %2" ++ "#" ++ ; cmp\\t%1, %2\;movlt\\t%0, %2 ++ ; cmp\\t%1, %2\;movge\\t%0, %1\;movlt\\t%0, %2" ++ "TARGET_ARM" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (set (match_dup 0) ++ (if_then_else:SI (ge:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (match_dup 1) ++ (match_dup 2)))] ++ "" + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_expand "sminsi3" +@@ -3296,20 +3604,31 @@ + (const_int 0)))] + "TARGET_32BIT" + "and%?\\t%0, %1, %1, asr #31" +- [(set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "logic_shift_reg")] + ) + +-(define_insn "*arm_smin_insn" ++(define_insn_and_split "*arm_smin_insn" + [(set (match_operand:SI 0 "s_register_operand" "=r,r") + (smin:SI (match_operand:SI 1 "s_register_operand" "%0,?r") + (match_operand:SI 2 "arm_rhs_operand" "rI,rI"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ARM" +- "@ +- cmp\\t%1, %2\;movge\\t%0, %2 +- cmp\\t%1, %2\;movlt\\t%0, %1\;movge\\t%0, %2" ++ "#" ++ ; cmp\\t%1, %2\;movge\\t%0, %2 ++ ; cmp\\t%1, %2\;movlt\\t%0, %1\;movge\\t%0, %2" ++ "TARGET_ARM" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (set (match_dup 0) ++ (if_then_else:SI (lt:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (match_dup 1) ++ (match_dup 2)))] ++ "" + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple,multiple")] + ) + + (define_expand "umaxsi3" +@@ -3322,18 +3641,27 @@ + "" + ) + +-(define_insn "*arm_umaxsi3" ++(define_insn_and_split "*arm_umaxsi3" + [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") + (umax:SI (match_operand:SI 1 "s_register_operand" "0,r,?r") + (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ARM" +- "@ +- cmp\\t%1, %2\;movcc\\t%0, %2 +- cmp\\t%1, %2\;movcs\\t%0, %1 +- cmp\\t%1, %2\;movcs\\t%0, %1\;movcc\\t%0, %2" ++ "#" ++ ; cmp\\t%1, %2\;movcc\\t%0, %2 ++ ; cmp\\t%1, %2\;movcs\\t%0, %1 ++ ; cmp\\t%1, %2\;movcs\\t%0, %1\;movcc\\t%0, %2" ++ "TARGET_ARM" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (set (match_dup 0) ++ (if_then_else:SI (geu:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (match_dup 1) ++ (match_dup 2)))] ++ "" + [(set_attr "conds" "clob") +- (set_attr "length" "8,8,12")] ++ (set_attr "length" "8,8,12") ++ (set_attr "type" "store1")] + ) + + (define_expand "uminsi3" +@@ -3346,18 +3674,27 @@ + "" + ) + +-(define_insn "*arm_uminsi3" ++(define_insn_and_split "*arm_uminsi3" + [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") + (umin:SI (match_operand:SI 1 "s_register_operand" "0,r,?r") + (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ARM" +- "@ +- cmp\\t%1, %2\;movcs\\t%0, %2 +- cmp\\t%1, %2\;movcc\\t%0, %1 +- cmp\\t%1, %2\;movcc\\t%0, %1\;movcs\\t%0, %2" ++ "#" ++ ; cmp\\t%1, %2\;movcs\\t%0, %2 ++ ; cmp\\t%1, %2\;movcc\\t%0, %1 ++ ; cmp\\t%1, %2\;movcc\\t%0, %1\;movcs\\t%0, %2" ++ "TARGET_ARM" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 1) (match_dup 2))) ++ (set (match_dup 0) ++ (if_then_else:SI (ltu:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (match_dup 1) ++ (match_dup 2)))] ++ "" + [(set_attr "conds" "clob") +- (set_attr "length" "8,8,12")] ++ (set_attr "length" "8,8,12") ++ (set_attr "type" "store1")] + ) + + (define_insn "*store_minmaxsi" +@@ -3366,7 +3703,7 @@ + [(match_operand:SI 1 "s_register_operand" "r") + (match_operand:SI 2 "s_register_operand" "r")])) + (clobber (reg:CC CC_REGNUM))] +- "TARGET_32BIT" ++ "TARGET_32BIT && optimize_insn_for_size_p()" + "* + operands[3] = gen_rtx_fmt_ee (minmax_code (operands[3]), SImode, + operands[1], operands[2]); +@@ -3395,7 +3732,7 @@ + (match_operand:SI 3 "arm_rhs_operand" "rI,rI")]) + (match_operand:SI 1 "s_register_operand" "0,?r")])) + (clobber (reg:CC CC_REGNUM))] +- "TARGET_32BIT && !arm_eliminable_register (operands[1])" ++ "TARGET_32BIT && !arm_eliminable_register (operands[1]) && !arm_restrict_it" + "* + { + enum rtx_code code = GET_CODE (operands[4]); +@@ -3426,9 +3763,59 @@ + (set (attr "length") + (if_then_else (eq_attr "is_thumb" "yes") + (const_int 14) +- (const_int 12)))] ++ (const_int 12))) ++ (set_attr "type" "multiple")] + ) + ++; Reject the frame pointer in operand[1], since reloading this after ++; it has been eliminated can cause carnage. ++(define_insn_and_split "*minmax_arithsi_non_canon" ++ [(set (match_operand:SI 0 "s_register_operand" "=Ts,Ts") ++ (minus:SI ++ (match_operand:SI 1 "s_register_operand" "0,?Ts") ++ (match_operator:SI 4 "minmax_operator" ++ [(match_operand:SI 2 "s_register_operand" "Ts,Ts") ++ (match_operand:SI 3 "arm_rhs_operand" "TsI,TsI")]))) ++ (clobber (reg:CC CC_REGNUM))] ++ "TARGET_32BIT && !arm_eliminable_register (operands[1]) ++ && !(arm_restrict_it && CONST_INT_P (operands[3]))" ++ "#" ++ "TARGET_32BIT && !arm_eliminable_register (operands[1]) && reload_completed" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 2) (match_dup 3))) ++ ++ (cond_exec (match_op_dup 4 [(reg:CC CC_REGNUM) (const_int 0)]) ++ (set (match_dup 0) ++ (minus:SI (match_dup 1) ++ (match_dup 2)))) ++ (cond_exec (match_op_dup 5 [(reg:CC CC_REGNUM) (const_int 0)]) ++ (set (match_dup 0) ++ (match_dup 6)))] ++ { ++ enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), ++ operands[2], operands[3]); ++ enum rtx_code rc = minmax_code (operands[4]); ++ operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, ++ operands[2], operands[3]); ++ ++ if (mode == CCFPmode || mode == CCFPEmode) ++ rc = reverse_condition_maybe_unordered (rc); ++ else ++ rc = reverse_condition (rc); ++ operands[5] = gen_rtx_fmt_ee (rc, SImode, operands[2], operands[3]); ++ if (CONST_INT_P (operands[3])) ++ operands[6] = plus_constant (SImode, operands[1], -INTVAL (operands[3])); ++ else ++ operands[6] = gen_rtx_MINUS (SImode, operands[1], operands[3]); ++ } ++ [(set_attr "conds" "clob") ++ (set (attr "length") ++ (if_then_else (eq_attr "is_thumb" "yes") ++ (const_int 14) ++ (const_int 12))) ++ (set_attr "type" "multiple")] ++) ++ + (define_code_iterator SAT [smin smax]) + (define_code_iterator SATrev [smin smax]) + (define_code_attr SATlo [(smin "1") (smax "2")]) +@@ -3455,7 +3842,9 @@ + return "usat%?\t%0, %1, %3"; + } + [(set_attr "predicable" "yes") +- (set_attr "insn" "sat")]) ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "alus_imm")] ++) + + (define_insn "*satsi__shift" + [(set (match_operand:SI 0 "s_register_operand" "=r") +@@ -3480,9 +3869,9 @@ + return "usat%?\t%0, %1, %4%S3"; + } + [(set_attr "predicable" "yes") +- (set_attr "insn" "sat") ++ (set_attr "predicable_short_it" "no") + (set_attr "shift" "3") +- (set_attr "type" "alu_shift")]) ++ (set_attr "type" "logic_shift_reg")]) + + ;; Shift and rotation insns + +@@ -3547,7 +3936,8 @@ + "TARGET_32BIT" + "movs\\t%Q0, %Q1, asl #1\;adc\\t%R0, %R1, %R1" + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_expand "ashlsi3" +@@ -3572,6 +3962,7 @@ + "TARGET_THUMB1" + "lsl\\t%0, %1, %2" + [(set_attr "length" "2") ++ (set_attr "type" "shift_imm,shift_reg") + (set_attr "conds" "set")]) + + (define_expand "ashrdi3" +@@ -3629,8 +4020,8 @@ + "TARGET_32BIT" + "movs\\t%R0, %R1, asr #1\;mov\\t%Q0, %Q1, rrx" + [(set_attr "conds" "clob") +- (set_attr "insn" "mov") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_expand "ashrsi3" +@@ -3652,6 +4043,7 @@ + "TARGET_THUMB1" + "asr\\t%0, %1, %2" + [(set_attr "length" "2") ++ (set_attr "type" "shift_imm,shift_reg") + (set_attr "conds" "set")]) + + (define_expand "lshrdi3" +@@ -3709,8 +4101,8 @@ + "TARGET_32BIT" + "movs\\t%R0, %R1, lsr #1\;mov\\t%Q0, %Q1, rrx" + [(set_attr "conds" "clob") +- (set_attr "insn" "mov") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_expand "lshrsi3" +@@ -3735,6 +4127,7 @@ + "TARGET_THUMB1" + "lsr\\t%0, %1, %2" + [(set_attr "length" "2") ++ (set_attr "type" "shift_imm,shift_reg") + (set_attr "conds" "set")]) + + (define_expand "rotlsi3" +@@ -3780,51 +4173,52 @@ + (match_operand:SI 2 "register_operand" "l")))] + "TARGET_THUMB1" + "ror\\t%0, %0, %2" +- [(set_attr "length" "2")] ++ [(set_attr "type" "shift_reg") ++ (set_attr "length" "2")] + ) + + (define_insn "*arm_shiftsi3" +- [(set (match_operand:SI 0 "s_register_operand" "=r") ++ [(set (match_operand:SI 0 "s_register_operand" "=l,r,r") + (match_operator:SI 3 "shift_operator" +- [(match_operand:SI 1 "s_register_operand" "r") +- (match_operand:SI 2 "reg_or_int_operand" "rM")]))] ++ [(match_operand:SI 1 "s_register_operand" "0,r,r") ++ (match_operand:SI 2 "reg_or_int_operand" "l,M,r")]))] + "TARGET_32BIT" + "* return arm_output_shift(operands, 0);" + [(set_attr "predicable" "yes") ++ (set_attr "arch" "t2,*,*") ++ (set_attr "predicable_short_it" "yes,no,no") ++ (set_attr "length" "4") + (set_attr "shift" "1") +- (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "") +- (const_string "alu_shift") +- (const_string "alu_shift_reg")))] ++ (set_attr "type" "alu_shift_reg,alu_shift_imm,alu_shift_reg")] + ) + + (define_insn "*shiftsi3_compare0" + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV (match_operator:SI 3 "shift_operator" +- [(match_operand:SI 1 "s_register_operand" "r") +- (match_operand:SI 2 "arm_rhs_operand" "rM")]) ++ [(match_operand:SI 1 "s_register_operand" "r,r") ++ (match_operand:SI 2 "arm_rhs_operand" "M,r")]) + (const_int 0))) +- (set (match_operand:SI 0 "s_register_operand" "=r") ++ (set (match_operand:SI 0 "s_register_operand" "=r,r") + (match_op_dup 3 [(match_dup 1) (match_dup 2)]))] + "TARGET_32BIT" + "* return arm_output_shift(operands, 1);" + [(set_attr "conds" "set") + (set_attr "shift" "1") +- (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "") +- (const_string "alu_shift") +- (const_string "alu_shift_reg")))] ++ (set_attr "type" "alus_shift_imm,alus_shift_reg")] + ) + + (define_insn "*shiftsi3_compare0_scratch" + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV (match_operator:SI 3 "shift_operator" +- [(match_operand:SI 1 "s_register_operand" "r") +- (match_operand:SI 2 "arm_rhs_operand" "rM")]) ++ [(match_operand:SI 1 "s_register_operand" "r,r") ++ (match_operand:SI 2 "arm_rhs_operand" "M,r")]) + (const_int 0))) +- (clobber (match_scratch:SI 0 "=r"))] ++ (clobber (match_scratch:SI 0 "=r,r"))] + "TARGET_32BIT" + "* return arm_output_shift(operands, 1);" + [(set_attr "conds" "set") +- (set_attr "shift" "1")] ++ (set_attr "shift" "1") ++ (set_attr "type" "shift_imm,shift_reg")] + ) + + (define_insn "*not_shiftsi" +@@ -3835,10 +4229,10 @@ + "TARGET_32BIT" + "mvn%?\\t%0, %1%S3" + [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") + (set_attr "shift" "1") +- (set_attr "insn" "mvn") + (set_attr "arch" "32,a") +- (set_attr "type" "alu_shift,alu_shift_reg")]) ++ (set_attr "type" "mvn_shift,mvn_shift_reg")]) + + (define_insn "*not_shiftsi_compare0" + [(set (reg:CC_NOOV CC_REGNUM) +@@ -3853,9 +4247,8 @@ + "mvn%.\\t%0, %1%S3" + [(set_attr "conds" "set") + (set_attr "shift" "1") +- (set_attr "insn" "mvn") + (set_attr "arch" "32,a") +- (set_attr "type" "alu_shift,alu_shift_reg")]) ++ (set_attr "type" "mvn_shift,mvn_shift_reg")]) + + (define_insn "*not_shiftsi_compare0_scratch" + [(set (reg:CC_NOOV CC_REGNUM) +@@ -3869,9 +4262,8 @@ + "mvn%.\\t%0, %1%S3" + [(set_attr "conds" "set") + (set_attr "shift" "1") +- (set_attr "insn" "mvn") + (set_attr "arch" "32,a") +- (set_attr "type" "alu_shift,alu_shift_reg")]) ++ (set_attr "type" "mvn_shift,mvn_shift_reg")]) + + ;; We don't really have extzv, but defining this using shifts helps + ;; to reduce register pressure later on. +@@ -4048,6 +4440,7 @@ + [(set_attr "arch" "t2,any") + (set_attr "length" "2,4") + (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "yes,no") + (set_attr "type" "load1")]) + + (define_insn "unaligned_loadhis" +@@ -4060,6 +4453,7 @@ + [(set_attr "arch" "t2,any") + (set_attr "length" "2,4") + (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "yes,no") + (set_attr "type" "load_byte")]) + + (define_insn "unaligned_loadhiu" +@@ -4072,6 +4466,7 @@ + [(set_attr "arch" "t2,any") + (set_attr "length" "2,4") + (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "yes,no") + (set_attr "type" "load_byte")]) + + (define_insn "unaligned_storesi" +@@ -4083,6 +4478,7 @@ + [(set_attr "arch" "t2,any") + (set_attr "length" "2,4") + (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "yes,no") + (set_attr "type" "store1")]) + + (define_insn "unaligned_storehi" +@@ -4094,8 +4490,67 @@ + [(set_attr "arch" "t2,any") + (set_attr "length" "2,4") + (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "yes,no") + (set_attr "type" "store1")]) + ++;; Unaligned double-word load and store. ++;; Split after reload into two unaligned single-word accesses. ++;; It prevents lower_subreg from splitting some other aligned ++;; double-word accesses too early. Used for internal memcpy. ++ ++(define_insn_and_split "unaligned_loaddi" ++ [(set (match_operand:DI 0 "s_register_operand" "=l,r") ++ (unspec:DI [(match_operand:DI 1 "memory_operand" "o,o")] ++ UNSPEC_UNALIGNED_LOAD))] ++ "unaligned_access && TARGET_32BIT" ++ "#" ++ "&& reload_completed" ++ [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_UNALIGNED_LOAD)) ++ (set (match_dup 2) (unspec:SI [(match_dup 3)] UNSPEC_UNALIGNED_LOAD))] ++ { ++ operands[2] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ operands[3] = gen_highpart (SImode, operands[1]); ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ ++ /* If the first destination register overlaps with the base address, ++ swap the order in which the loads are emitted. */ ++ if (reg_overlap_mentioned_p (operands[0], operands[1])) ++ { ++ rtx tmp = operands[1]; ++ operands[1] = operands[3]; ++ operands[3] = tmp; ++ tmp = operands[0]; ++ operands[0] = operands[2]; ++ operands[2] = tmp; ++ } ++ } ++ [(set_attr "arch" "t2,any") ++ (set_attr "length" "4,8") ++ (set_attr "predicable" "yes") ++ (set_attr "type" "load2")]) ++ ++(define_insn_and_split "unaligned_storedi" ++ [(set (match_operand:DI 0 "memory_operand" "=o,o") ++ (unspec:DI [(match_operand:DI 1 "s_register_operand" "l,r")] ++ UNSPEC_UNALIGNED_STORE))] ++ "unaligned_access && TARGET_32BIT" ++ "#" ++ "&& reload_completed" ++ [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_UNALIGNED_STORE)) ++ (set (match_dup 2) (unspec:SI [(match_dup 3)] UNSPEC_UNALIGNED_STORE))] ++ { ++ operands[2] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ operands[3] = gen_highpart (SImode, operands[1]); ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ } ++ [(set_attr "arch" "t2,any") ++ (set_attr "length" "4,8") ++ (set_attr "predicable" "yes") ++ (set_attr "type" "store2")]) ++ ++ + (define_insn "*extv_reg" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r") +@@ -4104,7 +4559,9 @@ + "arm_arch_thumb2" + "sbfx%?\t%0, %1, %3, %2" + [(set_attr "length" "4") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "bfm")] + ) + + (define_insn "extzv_t2" +@@ -4115,7 +4572,9 @@ + "arm_arch_thumb2" + "ubfx%?\t%0, %1, %3, %2" + [(set_attr "length" "4") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "bfm")] + ) + + +@@ -4127,7 +4586,8 @@ + "TARGET_IDIV" + "sdiv%?\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "insn" "sdiv")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "sdiv")] + ) + + (define_insn "udivsi3" +@@ -4137,7 +4597,8 @@ + "TARGET_IDIV" + "udiv%?\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "insn" "udiv")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "udiv")] + ) + + +@@ -4160,14 +4621,27 @@ + + ;; The constraints here are to prevent a *partial* overlap (where %Q0 == %R1). + ;; The first alternative allows the common case of a *full* overlap. +-(define_insn "*arm_negdi2" ++(define_insn_and_split "*arm_negdi2" + [(set (match_operand:DI 0 "s_register_operand" "=r,&r") + (neg:DI (match_operand:DI 1 "s_register_operand" "0,r"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ARM" +- "rsbs\\t%Q0, %Q1, #0\;rsc\\t%R0, %R1, #0" ++ "#" ; "rsbs\\t%Q0, %Q1, #0\;rsc\\t%R0, %R1, #0" ++ "&& reload_completed" ++ [(parallel [(set (reg:CC CC_REGNUM) ++ (compare:CC (const_int 0) (match_dup 1))) ++ (set (match_dup 0) (minus:SI (const_int 0) (match_dup 1)))]) ++ (set (match_dup 2) (minus:SI (minus:SI (const_int 0) (match_dup 3)) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] ++ { ++ operands[2] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ operands[3] = gen_highpart (SImode, operands[1]); ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ } + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*thumb1_negdi2" +@@ -4176,7 +4650,8 @@ + (clobber (reg:CC CC_REGNUM))] + "TARGET_THUMB1" + "mov\\t%R0, #0\;neg\\t%Q0, %Q1\;sbc\\t%R0, %R1" +- [(set_attr "length" "6")] ++ [(set_attr "length" "6") ++ (set_attr "type" "multiple")] + ) + + (define_expand "negsi2" +@@ -4187,11 +4662,15 @@ + ) + + (define_insn "*arm_negsi2" +- [(set (match_operand:SI 0 "s_register_operand" "=r") +- (neg:SI (match_operand:SI 1 "s_register_operand" "r")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=l,r") ++ (neg:SI (match_operand:SI 1 "s_register_operand" "l,r")))] + "TARGET_32BIT" + "rsb%?\\t%0, %1, #0" +- [(set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "yes,no") ++ (set_attr "arch" "t2,*") ++ (set_attr "length" "4") ++ (set_attr "type" "alu_reg")] + ) + + (define_insn "*thumb1_negsi2" +@@ -4199,7 +4678,8 @@ + (neg:SI (match_operand:SI 1 "register_operand" "l")))] + "TARGET_THUMB1" + "neg\\t%0, %1" +- [(set_attr "length" "2")] ++ [(set_attr "length" "2") ++ (set_attr "type" "alu_imm")] + ) + + (define_expand "negsf2" +@@ -4233,18 +4713,72 @@ + operands[2] = gen_rtx_REG (CCmode, CC_REGNUM); + ") + +-(define_insn "*arm_abssi2" ++(define_insn_and_split "*arm_abssi2" + [(set (match_operand:SI 0 "s_register_operand" "=r,&r") + (abs:SI (match_operand:SI 1 "s_register_operand" "0,r"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ARM" +- "@ +- cmp\\t%0, #0\;rsblt\\t%0, %0, #0 +- eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ /* if (which_alternative == 0) */ ++ if (REGNO(operands[0]) == REGNO(operands[1])) ++ { ++ /* Emit the pattern: ++ cmp\\t%0, #0\;rsblt\\t%0, %0, #0 ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 0) (const_int 0))) ++ (cond_exec (lt:CC (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_dup 0) (minus:SI (const_int 0) (match_dup 1))))] ++ */ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ gen_rtx_REG (CCmode, CC_REGNUM), ++ gen_rtx_COMPARE (CCmode, operands[0], const0_rtx))); ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ (gen_rtx_LT (SImode, ++ gen_rtx_REG (CCmode, CC_REGNUM), ++ const0_rtx)), ++ (gen_rtx_SET (VOIDmode, ++ operands[0], ++ (gen_rtx_MINUS (SImode, ++ const0_rtx, ++ operands[1])))))); ++ DONE; ++ } ++ else ++ { ++ /* Emit the pattern: ++ alt1: eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31 ++ [(set (match_dup 0) ++ (xor:SI (match_dup 1) ++ (ashiftrt:SI (match_dup 1) (const_int 31)))) ++ (set (match_dup 0) ++ (minus:SI (match_dup 0) ++ (ashiftrt:SI (match_dup 1) (const_int 31))))] ++ */ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_XOR (SImode, ++ gen_rtx_ASHIFTRT (SImode, ++ operands[1], ++ GEN_INT (31)), ++ operands[1]))); ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_MINUS (SImode, ++ operands[0], ++ gen_rtx_ASHIFTRT (SImode, ++ operands[1], ++ GEN_INT (31))))); ++ DONE; ++ } ++ } + [(set_attr "conds" "clob,*") + (set_attr "shift" "1") + (set_attr "predicable" "no, yes") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn_and_split "*thumb1_abssi2" +@@ -4258,21 +4792,65 @@ + (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2))) + (set (match_dup 0) (xor:SI (match_dup 0) (match_dup 2)))] + "" +- [(set_attr "length" "6")] ++ [(set_attr "length" "6") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*arm_neg_abssi2" ++(define_insn_and_split "*arm_neg_abssi2" + [(set (match_operand:SI 0 "s_register_operand" "=r,&r") + (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" "0,r")))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ARM" +- "@ +- cmp\\t%0, #0\;rsbgt\\t%0, %0, #0 +- eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ /* if (which_alternative == 0) */ ++ if (REGNO (operands[0]) == REGNO (operands[1])) ++ { ++ /* Emit the pattern: ++ cmp\\t%0, #0\;rsbgt\\t%0, %0, #0 ++ */ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ gen_rtx_REG (CCmode, CC_REGNUM), ++ gen_rtx_COMPARE (CCmode, operands[0], const0_rtx))); ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ gen_rtx_GT (SImode, ++ gen_rtx_REG (CCmode, CC_REGNUM), ++ const0_rtx), ++ gen_rtx_SET (VOIDmode, ++ operands[0], ++ (gen_rtx_MINUS (SImode, ++ const0_rtx, ++ operands[1]))))); ++ } ++ else ++ { ++ /* Emit the pattern: ++ eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31 ++ */ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_XOR (SImode, ++ gen_rtx_ASHIFTRT (SImode, ++ operands[1], ++ GEN_INT (31)), ++ operands[1]))); ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_MINUS (SImode, ++ gen_rtx_ASHIFTRT (SImode, ++ operands[1], ++ GEN_INT (31)), ++ operands[0]))); ++ } ++ DONE; ++ } + [(set_attr "conds" "clob,*") + (set_attr "shift" "1") + (set_attr "predicable" "no, yes") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn_and_split "*thumb1_neg_abssi2" +@@ -4286,7 +4864,8 @@ + (set (match_dup 0) (minus:SI (match_dup 2) (match_dup 1))) + (set (match_dup 0) (xor:SI (match_dup 0) (match_dup 2)))] + "" +- [(set_attr "length" "6")] ++ [(set_attr "length" "6") ++ (set_attr "type" "multiple")] + ) + + (define_expand "abssf2" +@@ -4335,8 +4914,8 @@ + }" + [(set_attr "length" "*,8,8,*") + (set_attr "predicable" "no,yes,yes,no") +- (set_attr "neon_type" "neon_int_1,*,*,neon_int_1") +- (set_attr "arch" "neon_nota8,*,*,neon_onlya8")] ++ (set_attr "type" "neon_move,multiple,multiple,neon_move") ++ (set_attr "arch" "neon_for_64bits,*,*,avoid_neon_for_64bits")] + ) + + (define_expand "one_cmplsi2" +@@ -4347,12 +4926,15 @@ + ) + + (define_insn "*arm_one_cmplsi2" +- [(set (match_operand:SI 0 "s_register_operand" "=r") +- (not:SI (match_operand:SI 1 "s_register_operand" "r")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=l,r") ++ (not:SI (match_operand:SI 1 "s_register_operand" "l,r")))] + "TARGET_32BIT" + "mvn%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "insn" "mvn")] ++ (set_attr "predicable_short_it" "yes,no") ++ (set_attr "arch" "t2,*") ++ (set_attr "length" "4") ++ (set_attr "type" "mvn_reg")] + ) + + (define_insn "*thumb1_one_cmplsi2" +@@ -4361,7 +4943,7 @@ + "TARGET_THUMB1" + "mvn\\t%0, %1" + [(set_attr "length" "2") +- (set_attr "insn" "mvn")] ++ (set_attr "type" "mvn_reg")] + ) + + (define_insn "*notsi_compare0" +@@ -4373,7 +4955,7 @@ + "TARGET_32BIT" + "mvn%.\\t%0, %1" + [(set_attr "conds" "set") +- (set_attr "insn" "mvn")] ++ (set_attr "type" "mvn_reg")] + ) + + (define_insn "*notsi_compare0_scratch" +@@ -4384,7 +4966,7 @@ + "TARGET_32BIT" + "mvn%.\\t%0, %1" + [(set_attr "conds" "set") +- (set_attr "insn" "mvn")] ++ (set_attr "type" "mvn_reg")] + ) + + ;; Fixed <--> Floating conversion insns +@@ -4504,9 +5086,10 @@ + "TARGET_32BIT " + "#" + [(set_attr "length" "8,4,8,8") +- (set_attr "arch" "neon_nota8,*,*,neon_onlya8") ++ (set_attr "arch" "neon_for_64bits,*,*,avoid_neon_for_64bits") + (set_attr "ce_count" "2") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "type" "multiple,mov_reg,multiple,multiple")] + ) + + (define_insn "extenddi2" +@@ -4519,7 +5102,8 @@ + (set_attr "ce_count" "2") + (set_attr "shift" "1") + (set_attr "predicable" "yes") +- (set_attr "arch" "neon_nota8,*,a,t,neon_onlya8")] ++ (set_attr "arch" "neon_for_64bits,*,a,t,avoid_neon_for_64bits") ++ (set_attr "type" "multiple,mov_reg,multiple,multiple,multiple")] + ) + + ;; Splits for all extensions to DImode +@@ -4645,7 +5229,7 @@ + [(if_then_else (eq_attr "is_arch6" "yes") + (const_int 2) (const_int 4)) + (const_int 4)]) +- (set_attr "type" "simple_alu_shift, load_byte")] ++ (set_attr "type" "extend,load_byte")] + ) + + (define_insn "*arm_zero_extendhisi2" +@@ -4655,7 +5239,7 @@ + "@ + # + ldr%(h%)\\t%0, %1" +- [(set_attr "type" "alu_shift,load_byte") ++ [(set_attr "type" "alu_shift_reg,load_byte") + (set_attr "predicable" "yes")] + ) + +@@ -4667,7 +5251,7 @@ + uxth%?\\t%0, %1 + ldr%(h%)\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "type" "simple_alu_shift,load_byte")] ++ (set_attr "type" "extend,load_byte")] + ) + + (define_insn "*arm_zero_extendhisi2addsi" +@@ -4676,8 +5260,9 @@ + (match_operand:SI 2 "s_register_operand" "r")))] + "TARGET_INT_SIMD" + "uxtah%?\\t%0, %2, %1" +- [(set_attr "type" "alu_shift") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "alu_shift_reg") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_expand "zero_extendqisi2" +@@ -4725,7 +5310,7 @@ + # + ldrb\\t%0, %1" + [(set_attr "length" "4,2") +- (set_attr "type" "alu_shift,load_byte") ++ (set_attr "type" "alu_shift_reg,load_byte") + (set_attr "pool_range" "*,32")] + ) + +@@ -4737,7 +5322,7 @@ + uxtb\\t%0, %1 + ldrb\\t%0, %1" + [(set_attr "length" "2") +- (set_attr "type" "simple_alu_shift,load_byte")] ++ (set_attr "type" "extend,load_byte")] + ) + + (define_insn "*arm_zero_extendqisi2" +@@ -4748,7 +5333,7 @@ + # + ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2" + [(set_attr "length" "8,4") +- (set_attr "type" "alu_shift,load_byte") ++ (set_attr "type" "alu_shift_reg,load_byte") + (set_attr "predicable" "yes")] + ) + +@@ -4759,7 +5344,7 @@ + "@ + uxtb%(%)\\t%0, %1 + ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2" +- [(set_attr "type" "simple_alu_shift,load_byte") ++ [(set_attr "type" "extend,load_byte") + (set_attr "predicable" "yes")] + ) + +@@ -4770,8 +5355,8 @@ + "TARGET_INT_SIMD" + "uxtab%?\\t%0, %2, %1" + [(set_attr "predicable" "yes") +- (set_attr "insn" "xtab") +- (set_attr "type" "alu_shift")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "alu_shift_reg")] + ) + + (define_split +@@ -4822,7 +5407,9 @@ + "TARGET_32BIT" + "tst%?\\t%0, #255" + [(set_attr "conds" "set") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "logic_imm")] + ) + + (define_expand "extendhisi2" +@@ -4933,7 +5520,7 @@ + [(if_then_else (eq_attr "is_arch6" "yes") + (const_int 2) (const_int 4)) + (const_int 4)]) +- (set_attr "type" "simple_alu_shift,load_byte") ++ (set_attr "type" "extend,load_byte") + (set_attr "pool_range" "*,1018")] + ) + +@@ -4992,7 +5579,7 @@ + # + ldr%(sh%)\\t%0, %1" + [(set_attr "length" "8,4") +- (set_attr "type" "alu_shift,load_byte") ++ (set_attr "type" "alu_shift_reg,load_byte") + (set_attr "predicable" "yes")] + ) + +@@ -5004,8 +5591,9 @@ + "@ + sxth%?\\t%0, %1 + ldr%(sh%)\\t%0, %1" +- [(set_attr "type" "simple_alu_shift,load_byte") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "extend,load_byte") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_insn "*arm_extendhisi2addsi" +@@ -5014,6 +5602,7 @@ + (match_operand:SI 2 "s_register_operand" "r")))] + "TARGET_INT_SIMD" + "sxtah%?\\t%0, %2, %1" ++ [(set_attr "type" "alu_shift_reg")] + ) + + (define_expand "extendqihi2" +@@ -5086,7 +5675,7 @@ + # + ldr%(sb%)\\t%0, %1" + [(set_attr "length" "8,4") +- (set_attr "type" "alu_shift,load_byte") ++ (set_attr "type" "alu_shift_reg,load_byte") + (set_attr "predicable" "yes")] + ) + +@@ -5098,7 +5687,7 @@ + "@ + sxtb%?\\t%0, %1 + ldr%(sb%)\\t%0, %1" +- [(set_attr "type" "simple_alu_shift,load_byte") ++ [(set_attr "type" "extend,load_byte") + (set_attr "predicable" "yes")] + ) + +@@ -5108,9 +5697,9 @@ + (match_operand:SI 2 "s_register_operand" "r")))] + "TARGET_INT_SIMD" + "sxtab%?\\t%0, %2, %1" +- [(set_attr "type" "alu_shift") +- (set_attr "insn" "xtab") +- (set_attr "predicable" "yes")] ++ [(set_attr "type" "alu_shift_reg") ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")] + ) + + (define_split +@@ -5209,7 +5798,7 @@ + (const_int 2) + (if_then_else (eq_attr "is_arch6" "yes") + (const_int 4) (const_int 6))]) +- (set_attr "type" "simple_alu_shift,load_byte,load_byte")] ++ (set_attr "type" "extend,load_byte,load_byte")] + ) + + (define_expand "extendsfdf2" +@@ -5309,8 +5898,8 @@ + ) + + (define_insn "*arm_movdi" +- [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m") +- (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,r"))] ++ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, q, m") ++ (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,q"))] + "TARGET_32BIT + && !(TARGET_HARD_FLOAT && TARGET_VFP) + && !TARGET_IWMMXT +@@ -5328,7 +5917,7 @@ + } + " + [(set_attr "length" "8,12,16,8,8") +- (set_attr "type" "*,*,*,load2,store2") ++ (set_attr "type" "multiple,multiple,multiple,load2,store2") + (set_attr "arm_pool_range" "*,*,*,1020,*") + (set_attr "arm_neg_pool_range" "*,*,*,1004,*") + (set_attr "thumb2_pool_range" "*,*,*,4094,*") +@@ -5468,8 +6057,7 @@ + } + }" + [(set_attr "length" "4,4,6,2,2,6,4,4") +- (set_attr "type" "*,*,*,load2,store2,load2,store2,*") +- (set_attr "insn" "*,mov,*,*,*,*,*,mov") ++ (set_attr "type" "multiple,multiple,multiple,load2,store2,load2,store2,multiple") + (set_attr "pool_range" "*,*,*,*,*,1018,*,*")] + ) + +@@ -5566,7 +6154,9 @@ + "arm_arch_thumb2" + "movt%?\t%0, #:upper16:%c2" + [(set_attr "predicable" "yes") +- (set_attr "length" "4")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "length" "4") ++ (set_attr "type" "mov_imm")] + ) + + (define_insn "*arm_movsi_insn" +@@ -5583,8 +6173,7 @@ + movw%?\\t%0, %1 + ldr%?\\t%0, %1 + str%?\\t%1, %0" +- [(set_attr "type" "*,simple_alu_imm,simple_alu_imm,simple_alu_imm,load1,store1") +- (set_attr "insn" "mov,mov,mvn,mov,*,*") ++ [(set_attr "type" "mov_reg,mov_imm,mvn_imm,mov_imm,load1,store1") + (set_attr "predicable" "yes") + (set_attr "pool_range" "*,*,*,*,4096,*") + (set_attr "neg_pool_range" "*,*,*,*,4084,*")] +@@ -5639,7 +6228,7 @@ + str\\t%1, %0 + mov\\t%0, %1" + [(set_attr "length" "2,2,4,4,2,2,2,2,2") +- (set_attr "type" "*,*,*,*,load1,store1,load1,store1,*") ++ (set_attr "type" "mov_reg,mov_imm,multiple,multiple,load1,store1,load1,store1,mov_reg") + (set_attr "pool_range" "*,*,*,*,*,*,1018,*,*") + (set_attr "conds" "set,clob,*,*,nocond,nocond,nocond,nocond,nocond")]) + +@@ -5795,7 +6384,8 @@ + INTVAL (operands[2])); + return \"add\\t%0, %|pc\"; + " +- [(set_attr "length" "2")] ++ [(set_attr "length" "2") ++ (set_attr "type" "alu_reg")] + ) + + (define_insn "pic_add_dot_plus_eight" +@@ -5810,7 +6400,8 @@ + INTVAL (operands[2])); + return \"add%?\\t%0, %|pc, %1\"; + " +- [(set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "type" "alu_reg")] + ) + + (define_insn "tls_load_dot_plus_eight" +@@ -5825,7 +6416,8 @@ + INTVAL (operands[2])); + return \"ldr%?\\t%0, [%|pc, %1]\t\t@ tls_load_dot_plus_eight\"; + " +- [(set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "type" "load1")] + ) + + ;; PIC references to local variables can generate pic_add_dot_plus_eight +@@ -5886,7 +6478,7 @@ + cmp%?\\t%0, #0 + sub%.\\t%0, %1, #0" + [(set_attr "conds" "set") +- (set_attr "type" "simple_alu_imm,simple_alu_imm")] ++ (set_attr "type" "alus_imm,alus_imm")] + ) + + ;; Subroutine to store a half word from a register into memory. +@@ -6232,7 +6824,7 @@ + return \"ldrh %0, %1\"; + }" + [(set_attr "length" "2,4,2,2,2,2") +- (set_attr "type" "*,load1,store1,*,*,*") ++ (set_attr "type" "alus_imm,load1,store1,mov_reg,mov_reg,mov_imm") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond,clob")]) + + +@@ -6301,16 +6893,15 @@ + str%(h%)\\t%1, %0\\t%@ movhi + ldr%(h%)\\t%0, %1\\t%@ movhi" + [(set_attr "predicable" "yes") +- (set_attr "insn" "mov,mvn,mov,*,*") + (set_attr "pool_range" "*,*,*,*,256") + (set_attr "neg_pool_range" "*,*,*,*,244") + (set_attr "arch" "*,*,v6t2,*,*") + (set_attr_alternative "type" + [(if_then_else (match_operand 1 "const_int_operand" "") +- (const_string "simple_alu_imm" ) +- (const_string "*")) +- (const_string "simple_alu_imm") +- (const_string "simple_alu_imm") ++ (const_string "mov_imm" ) ++ (const_string "mov_reg")) ++ (const_string "mvn_imm") ++ (const_string "mov_imm") + (const_string "store1") + (const_string "load1")])] + ) +@@ -6324,8 +6915,7 @@ + mov%?\\t%0, %1\\t%@ movhi + mvn%?\\t%0, #%B1\\t%@ movhi" + [(set_attr "predicable" "yes") +- (set_attr "insn" "mov, mov,mvn") +- (set_attr "type" "simple_alu_imm,*,simple_alu_imm")] ++ (set_attr "type" "mov_imm,mov_reg,mvn_imm")] + ) + + (define_expand "thumb_movhi_clobber" +@@ -6448,10 +7038,9 @@ + " + ) + +- + (define_insn "*arm_movqi_insn" +- [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,l,Uu,r,m") +- (match_operand:QI 1 "general_operand" "r,I,K,Uu,l,m,r"))] ++ [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,l,r,l,Uu,r,m") ++ (match_operand:QI 1 "general_operand" "r,r,I,Py,K,Uu,l,m,r"))] + "TARGET_32BIT + && ( register_operand (operands[0], QImode) + || register_operand (operands[1], QImode))" +@@ -6458,16 +7047,18 @@ + "@ + mov%?\\t%0, %1 + mov%?\\t%0, %1 ++ mov%?\\t%0, %1 ++ mov%?\\t%0, %1 + mvn%?\\t%0, #%B1 + ldr%(b%)\\t%0, %1 + str%(b%)\\t%1, %0 + ldr%(b%)\\t%0, %1 + str%(b%)\\t%1, %0" +- [(set_attr "type" "*,simple_alu_imm,simple_alu_imm,load1, store1, load1, store1") +- (set_attr "insn" "mov,mov,mvn,*,*,*,*") ++ [(set_attr "type" "mov_reg,mov_reg,mov_imm,mov_imm,mvn_imm,load1,store1,load1,store1") + (set_attr "predicable" "yes") +- (set_attr "arch" "any,any,any,t2,t2,any,any") +- (set_attr "length" "4,4,4,2,2,4,4")] ++ (set_attr "predicable_short_it" "yes,yes,yes,no,no,no,no,no,no") ++ (set_attr "arch" "t2,any,any,t2,any,t2,t2,any,any") ++ (set_attr "length" "2,4,4,2,4,2,2,4,4")] + ) + + (define_insn "*thumb1_movqi_insn" +@@ -6484,8 +7075,7 @@ + mov\\t%0, %1 + mov\\t%0, %1" + [(set_attr "length" "2") +- (set_attr "type" "simple_alu_imm,load1,store1,*,*,simple_alu_imm") +- (set_attr "insn" "*,*,*,mov,mov,mov") ++ (set_attr "type" "alu_imm,load1,store1,mov_reg,mov_imm,mov_imm") + (set_attr "pool_range" "*,32,*,*,*,*") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond,clob")]) + +@@ -6514,7 +7104,7 @@ + (define_insn "*arm32_movhf" + [(set (match_operand:HF 0 "nonimmediate_operand" "=r,m,r,r") + (match_operand:HF 1 "general_operand" " m,r,r,F"))] +- "TARGET_32BIT && !(TARGET_HARD_FLOAT && TARGET_FP16) ++ "TARGET_32BIT && !(TARGET_HARD_FLOAT && TARGET_FP16) && !arm_restrict_it + && ( s_register_operand (operands[0], HFmode) + || s_register_operand (operands[1], HFmode))" + "* +@@ -6550,8 +7140,7 @@ + } + " + [(set_attr "conds" "unconditional") +- (set_attr "type" "load1,store1,*,*") +- (set_attr "insn" "*,*,mov,mov") ++ (set_attr "type" "load1,store1,mov_reg,multiple") + (set_attr "length" "4,4,4,8") + (set_attr "predicable" "yes")] + ) +@@ -6586,8 +7175,7 @@ + } + " + [(set_attr "length" "2") +- (set_attr "type" "*,load1,store1,*,*") +- (set_attr "insn" "mov,*,*,mov,mov") ++ (set_attr "type" "mov_reg,load1,store1,mov_reg,mov_reg") + (set_attr "pool_range" "*,1018,*,*,*") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond")]) + +@@ -6641,8 +7229,8 @@ + ldr%?\\t%0, %1\\t%@ float + str%?\\t%1, %0\\t%@ float" + [(set_attr "predicable" "yes") +- (set_attr "type" "*,load1,store1") +- (set_attr "insn" "mov,*,*") ++ (set_attr "predicable_short_it" "no") ++ (set_attr "type" "mov_reg,load1,store1") + (set_attr "arm_pool_range" "*,4096,*") + (set_attr "thumb2_pool_range" "*,4094,*") + (set_attr "arm_neg_pool_range" "*,4084,*") +@@ -6665,9 +7253,8 @@ + mov\\t%0, %1 + mov\\t%0, %1" + [(set_attr "length" "2") +- (set_attr "type" "*,load1,store1,load1,store1,*,*") ++ (set_attr "type" "alus_imm,load1,store1,load1,store1,mov_reg,mov_reg") + (set_attr "pool_range" "*,*,*,1018,*,*,*") +- (set_attr "insn" "*,*,*,*,*,mov,mov") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond,nocond,nocond")] + ) + +@@ -6737,8 +7324,8 @@ + ) + + (define_insn "*movdf_soft_insn" +- [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,r,m") +- (match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,r"))] ++ [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,q,m") ++ (match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,q"))] + "TARGET_32BIT && TARGET_SOFT_FLOAT + && ( register_operand (operands[0], DFmode) + || register_operand (operands[1], DFmode))" +@@ -6754,7 +7341,7 @@ + } + " + [(set_attr "length" "8,12,16,8,8") +- (set_attr "type" "*,*,*,load2,store2") ++ (set_attr "type" "multiple,multiple,multiple,load2,store2") + (set_attr "arm_pool_range" "*,*,*,1020,*") + (set_attr "thumb2_pool_range" "*,*,*,1018,*") + (set_attr "arm_neg_pool_range" "*,*,*,1004,*") +@@ -6798,8 +7385,7 @@ + } + " + [(set_attr "length" "4,2,2,6,4,4") +- (set_attr "type" "*,load2,store2,load2,store2,*") +- (set_attr "insn" "*,*,*,*,*,mov") ++ (set_attr "type" "multiple,load2,store2,load2,store2,multiple") + (set_attr "pool_range" "*,*,*,1018,*,*")] + ) + +@@ -6868,10 +7454,18 @@ + (match_operand:BLK 1 "general_operand" "") + (match_operand:SI 2 "const_int_operand" "") + (match_operand:SI 3 "const_int_operand" "")] +- "TARGET_EITHER" ++ "" + " + if (TARGET_32BIT) + { ++ if (TARGET_LDRD && current_tune->prefer_ldrd_strd ++ && !optimize_function_for_size_p (cfun)) ++ { ++ if (gen_movmem_ldrd_strd (operands)) ++ DONE; ++ FAIL; ++ } ++ + if (arm_gen_movmemqi (operands)) + DONE; + FAIL; +@@ -7099,7 +7693,8 @@ + (and (ge (minus (match_dup 3) (pc)) (const_int -2040)) + (le (minus (match_dup 3) (pc)) (const_int 2048))) + (const_int 6) +- (const_int 8))))] ++ (const_int 8)))) ++ (set_attr "type" "multiple")] + ) + + (define_insn "cbranchsi4_scratch" +@@ -7135,7 +7730,8 @@ + (and (ge (minus (match_dup 3) (pc)) (const_int -2040)) + (le (minus (match_dup 3) (pc)) (const_int 2048))) + (const_int 6) +- (const_int 8))))] ++ (const_int 8)))) ++ (set_attr "type" "multiple")] + ) + + (define_insn "*negated_cbranchsi4" +@@ -7170,7 +7766,8 @@ + (and (ge (minus (match_dup 3) (pc)) (const_int -2040)) + (le (minus (match_dup 3) (pc)) (const_int 2048))) + (const_int 6) +- (const_int 8))))] ++ (const_int 8)))) ++ (set_attr "type" "multiple")] + ) + + (define_insn "*tbit_cbranch" +@@ -7214,7 +7811,8 @@ + (and (ge (minus (match_dup 3) (pc)) (const_int -2040)) + (le (minus (match_dup 3) (pc)) (const_int 2048))) + (const_int 6) +- (const_int 8))))] ++ (const_int 8)))) ++ (set_attr "type" "multiple")] + ) + + (define_insn "*tlobits_cbranch" +@@ -7258,7 +7856,8 @@ + (and (ge (minus (match_dup 3) (pc)) (const_int -2040)) + (le (minus (match_dup 3) (pc)) (const_int 2048))) + (const_int 6) +- (const_int 8))))] ++ (const_int 8)))) ++ (set_attr "type" "multiple")] + ) + + (define_insn "*tstsi3_cbranch" +@@ -7295,7 +7894,8 @@ + (and (ge (minus (match_dup 2) (pc)) (const_int -2040)) + (le (minus (match_dup 2) (pc)) (const_int 2048))) + (const_int 6) +- (const_int 8))))] ++ (const_int 8)))) ++ (set_attr "type" "multiple")] + ) + + (define_insn "*cbranchne_decr1" +@@ -7398,7 +7998,8 @@ + (and (ge (minus (match_dup 4) (pc)) (const_int -2038)) + (le (minus (match_dup 4) (pc)) (const_int 2048))) + (const_int 8) +- (const_int 10)))])] ++ (const_int 10)))]) ++ (set_attr "type" "multiple")] + ) + + (define_insn "*addsi3_cbranch" +@@ -7479,7 +8080,8 @@ + (and (ge (minus (match_dup 5) (pc)) (const_int -2038)) + (le (minus (match_dup 5) (pc)) (const_int 2048))) + (const_int 8) +- (const_int 10)))))] ++ (const_int 10))))) ++ (set_attr "type" "multiple")] + ) + + (define_insn "*addsi3_cbranch_scratch" +@@ -7547,7 +8149,8 @@ + (and (ge (minus (match_dup 4) (pc)) (const_int -2040)) + (le (minus (match_dup 4) (pc)) (const_int 2048))) + (const_int 6) +- (const_int 8))))] ++ (const_int 8)))) ++ (set_attr "type" "multiple")] + ) + + +@@ -7555,46 +8158,48 @@ + + (define_insn "*arm_cmpsi_insn" + [(set (reg:CC CC_REGNUM) +- (compare:CC (match_operand:SI 0 "s_register_operand" "l,r,r,r") +- (match_operand:SI 1 "arm_add_operand" "Py,r,rI,L")))] ++ (compare:CC (match_operand:SI 0 "s_register_operand" "l,r,r,r,r") ++ (match_operand:SI 1 "arm_add_operand" "Py,r,r,I,L")))] + "TARGET_32BIT" + "@ + cmp%?\\t%0, %1 + cmp%?\\t%0, %1 + cmp%?\\t%0, %1 ++ cmp%?\\t%0, %1 + cmn%?\\t%0, #%n1" + [(set_attr "conds" "set") +- (set_attr "arch" "t2,t2,any,any") +- (set_attr "length" "2,2,4,4") ++ (set_attr "arch" "t2,t2,any,any,any") ++ (set_attr "length" "2,2,4,4,4") + (set_attr "predicable" "yes") +- (set_attr "type" "*,*,*,simple_alu_imm")] ++ (set_attr "predicable_short_it" "yes,yes,yes,no,no") ++ (set_attr "type" "alus_imm,alus_reg,alus_reg,alus_imm,alus_imm")] + ) + + (define_insn "*cmpsi_shiftsi" + [(set (reg:CC CC_REGNUM) +- (compare:CC (match_operand:SI 0 "s_register_operand" "r,r") ++ (compare:CC (match_operand:SI 0 "s_register_operand" "r,r,r") + (match_operator:SI 3 "shift_operator" +- [(match_operand:SI 1 "s_register_operand" "r,r") +- (match_operand:SI 2 "shift_amount_operand" "M,rM")])))] ++ [(match_operand:SI 1 "s_register_operand" "r,r,r") ++ (match_operand:SI 2 "shift_amount_operand" "M,r,M")])))] + "TARGET_32BIT" +- "cmp%?\\t%0, %1%S3" ++ "cmp\\t%0, %1%S3" + [(set_attr "conds" "set") + (set_attr "shift" "1") +- (set_attr "arch" "32,a") +- (set_attr "type" "alu_shift,alu_shift_reg")]) ++ (set_attr "arch" "32,a,a") ++ (set_attr "type" "alus_shift_imm,alu_shift_reg,alus_shift_imm")]) + + (define_insn "*cmpsi_shiftsi_swp" + [(set (reg:CC_SWP CC_REGNUM) + (compare:CC_SWP (match_operator:SI 3 "shift_operator" +- [(match_operand:SI 1 "s_register_operand" "r,r") +- (match_operand:SI 2 "shift_amount_operand" "M,rM")]) +- (match_operand:SI 0 "s_register_operand" "r,r")))] ++ [(match_operand:SI 1 "s_register_operand" "r,r,r") ++ (match_operand:SI 2 "shift_amount_operand" "M,r,M")]) ++ (match_operand:SI 0 "s_register_operand" "r,r,r")))] + "TARGET_32BIT" + "cmp%?\\t%0, %1%S3" + [(set_attr "conds" "set") + (set_attr "shift" "1") +- (set_attr "arch" "32,a") +- (set_attr "type" "alu_shift,alu_shift_reg")]) ++ (set_attr "arch" "32,a,a") ++ (set_attr "type" "alus_shift_imm,alu_shift_reg,alus_shift_imm")]) + + (define_insn "*arm_cmpsi_negshiftsi_si" + [(set (reg:CC_Z CC_REGNUM) +@@ -7607,8 +8212,8 @@ + "cmn%?\\t%0, %2%S1" + [(set_attr "conds" "set") + (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "") +- (const_string "alu_shift") +- (const_string "alu_shift_reg"))) ++ (const_string "alus_shift_imm") ++ (const_string "alus_shift_reg"))) + (set_attr "predicable" "yes")] + ) + +@@ -7616,26 +8221,71 @@ + ;; if-conversion can not reduce to a conditional compare, so we do + ;; that directly. + +-(define_insn "*arm_cmpdi_insn" ++(define_insn_and_split "*arm_cmpdi_insn" + [(set (reg:CC_NCV CC_REGNUM) + (compare:CC_NCV (match_operand:DI 0 "s_register_operand" "r") + (match_operand:DI 1 "arm_di_operand" "rDi"))) + (clobber (match_scratch:SI 2 "=r"))] + "TARGET_32BIT" +- "cmp\\t%Q0, %Q1\;sbcs\\t%2, %R0, %R1" ++ "#" ; "cmp\\t%Q0, %Q1\;sbcs\\t%2, %R0, %R1" ++ "&& reload_completed" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 0) (match_dup 1))) ++ (parallel [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 3) (match_dup 4))) ++ (set (match_dup 2) ++ (minus:SI (match_dup 5) ++ (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))])] ++ { ++ operands[3] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ if (CONST_INT_P (operands[1])) ++ { ++ operands[4] = GEN_INT (~INTVAL (gen_highpart_mode (SImode, ++ DImode, ++ operands[1]))); ++ operands[5] = gen_rtx_PLUS (SImode, operands[3], operands[4]); ++ } ++ else ++ { ++ operands[4] = gen_highpart (SImode, operands[1]); ++ operands[5] = gen_rtx_MINUS (SImode, operands[3], operands[4]); ++ } ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ operands[2] = gen_lowpart (SImode, operands[2]); ++ } + [(set_attr "conds" "set") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*arm_cmpdi_unsigned" ++(define_insn_and_split "*arm_cmpdi_unsigned" + [(set (reg:CC_CZ CC_REGNUM) +- (compare:CC_CZ (match_operand:DI 0 "s_register_operand" "r,r") +- (match_operand:DI 1 "arm_di_operand" "rDi,rDi")))] ++ (compare:CC_CZ (match_operand:DI 0 "s_register_operand" "l,r,r,r") ++ (match_operand:DI 1 "arm_di_operand" "Py,r,Di,rDi")))] ++ + "TARGET_32BIT" +- "cmp\\t%R0, %R1\;it eq\;cmpeq\\t%Q0, %Q1" ++ "#" ; "cmp\\t%R0, %R1\;it eq\;cmpeq\\t%Q0, %Q1" ++ "&& reload_completed" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 2) (match_dup 3))) ++ (cond_exec (eq:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (set (reg:CC CC_REGNUM) ++ (compare:CC (match_dup 0) (match_dup 1))))] ++ { ++ operands[2] = gen_highpart (SImode, operands[0]); ++ operands[0] = gen_lowpart (SImode, operands[0]); ++ if (CONST_INT_P (operands[1])) ++ operands[3] = gen_highpart_mode (SImode, DImode, operands[1]); ++ else ++ operands[3] = gen_highpart (SImode, operands[1]); ++ operands[1] = gen_lowpart (SImode, operands[1]); ++ } + [(set_attr "conds" "set") +- (set_attr "arch" "a,t2") +- (set_attr "length" "8,10")] ++ (set_attr "enabled_for_depr_it" "yes,yes,no,*") ++ (set_attr "arch" "t2,t2,t2,a") ++ (set_attr "length" "6,6,10,8") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*arm_cmpdi_zero" +@@ -7645,7 +8295,8 @@ + (clobber (match_scratch:SI 1 "=r"))] + "TARGET_32BIT" + "orr%.\\t%1, %Q0, %R0" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "logics_reg")] + ) + + (define_insn "*thumb_cmpdi_zero" +@@ -7656,7 +8307,8 @@ + "TARGET_THUMB1" + "orr\\t%1, %Q0, %R0" + [(set_attr "conds" "set") +- (set_attr "length" "2")] ++ (set_attr "length" "2") ++ (set_attr "type" "logics_reg")] + ) + + ; This insn allows redundant compares to be removed by cse, nothing should +@@ -7670,7 +8322,8 @@ + "TARGET_32BIT" + "\\t%@ deleted compare" + [(set_attr "conds" "set") +- (set_attr "length" "0")] ++ (set_attr "length" "0") ++ (set_attr "type" "no_insn")] + ) + + +@@ -7758,37 +8411,60 @@ + operands[3] = const0_rtx;" + ) + +-(define_insn "*mov_scc" ++(define_insn_and_split "*mov_scc" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (match_operator:SI 1 "arm_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)]))] + "TARGET_ARM" +- "mov%D1\\t%0, #0\;mov%d1\\t%0, #1" ++ "#" ; "mov%D1\\t%0, #0\;mov%d1\\t%0, #1" ++ "TARGET_ARM" ++ [(set (match_dup 0) ++ (if_then_else:SI (match_dup 1) ++ (const_int 1) ++ (const_int 0)))] ++ "" + [(set_attr "conds" "use") +- (set_attr "insn" "mov") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*mov_negscc" ++(define_insn_and_split "*mov_negscc" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (neg:SI (match_operator:SI 1 "arm_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)])))] + "TARGET_ARM" +- "mov%D1\\t%0, #0\;mvn%d1\\t%0, #0" ++ "#" ; "mov%D1\\t%0, #0\;mvn%d1\\t%0, #0" ++ "TARGET_ARM" ++ [(set (match_dup 0) ++ (if_then_else:SI (match_dup 1) ++ (match_dup 3) ++ (const_int 0)))] ++ { ++ operands[3] = GEN_INT (~0); ++ } + [(set_attr "conds" "use") +- (set_attr "insn" "mov") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + +-(define_insn "*mov_notscc" ++(define_insn_and_split "*mov_notscc" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (not:SI (match_operator:SI 1 "arm_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)])))] + "TARGET_ARM" +- "mvn%D1\\t%0, #0\;mvn%d1\\t%0, #1" ++ "#" ; "mvn%D1\\t%0, #0\;mvn%d1\\t%0, #1" ++ "TARGET_ARM" ++ [(set (match_dup 0) ++ (if_then_else:SI (match_dup 1) ++ (match_dup 3) ++ (match_dup 4)))] ++ { ++ operands[3] = GEN_INT (~1); ++ operands[4] = GEN_INT (~0); ++ } + [(set_attr "conds" "use") +- (set_attr "insn" "mov") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_expand "cstoresi4" +@@ -7993,7 +8669,8 @@ + "@ + neg\\t%0, %1\;adc\\t%0, %0, %1 + neg\\t%2, %1\;adc\\t%0, %1, %2" +- [(set_attr "length" "4")] ++ [(set_attr "length" "4") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*cstoresi_ne0_thumb1_insn" +@@ -8013,7 +8690,8 @@ + (match_operand:SI 2 "thumb1_cmp_operand" "lI*h,*r"))))] + "TARGET_THUMB1" + "cmp\\t%1, %2\;sbc\\t%0, %0, %0" +- [(set_attr "length" "4")] ++ [(set_attr "length" "4") ++ (set_attr "type" "multiple")] + ) + + (define_insn_and_split "cstoresi_ltu_thumb1" +@@ -8027,7 +8705,8 @@ + (neg:SI (ltu:SI (match_dup 1) (match_dup 2)))) + (set (match_dup 0) (neg:SI (match_dup 3)))] + "operands[3] = gen_reg_rtx (SImode);" +- [(set_attr "length" "4")] ++ [(set_attr "length" "4") ++ (set_attr "type" "multiple")] + ) + + ;; Used as part of the expansion of thumb les sequence. +@@ -8039,7 +8718,8 @@ + (match_operand:SI 4 "thumb1_cmp_operand" "lI"))))] + "TARGET_THUMB1" + "cmp\\t%3, %4\;adc\\t%0, %1, %2" +- [(set_attr "length" "4")] ++ [(set_attr "length" "4") ++ (set_attr "type" "multiple")] + ) + + +@@ -8069,7 +8749,7 @@ + + (define_expand "movsfcc" + [(set (match_operand:SF 0 "s_register_operand" "") +- (if_then_else:SF (match_operand 1 "expandable_comparison_operator" "") ++ (if_then_else:SF (match_operand 1 "arm_cond_move_operator" "") + (match_operand:SF 2 "s_register_operand" "") + (match_operand:SF 3 "s_register_operand" "")))] + "TARGET_32BIT && TARGET_HARD_FLOAT" +@@ -8091,7 +8771,7 @@ + + (define_expand "movdfcc" + [(set (match_operand:DF 0 "s_register_operand" "") +- (if_then_else:DF (match_operand 1 "expandable_comparison_operator" "") ++ (if_then_else:DF (match_operand 1 "arm_cond_move_operator" "") + (match_operand:DF 2 "s_register_operand" "") + (match_operand:DF 3 "s_register_operand" "")))] + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE" +@@ -8110,7 +8790,40 @@ + }" + ) + +-(define_insn "*movsicc_insn" ++(define_insn "*cmov" ++ [(set (match_operand:SDF 0 "s_register_operand" "=") ++ (if_then_else:SDF (match_operator 1 "arm_vsel_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)]) ++ (match_operand:SDF 3 "s_register_operand" ++ "") ++ (match_operand:SDF 4 "s_register_operand" ++ "")))] ++ "TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 " ++ "* ++ { ++ enum arm_cond_code code = maybe_get_arm_condition_code (operands[1]); ++ switch (code) ++ { ++ case ARM_GE: ++ case ARM_GT: ++ case ARM_EQ: ++ case ARM_VS: ++ return \"vsel%d1.\\t%0, %3, %4\"; ++ case ARM_LT: ++ case ARM_LE: ++ case ARM_NE: ++ case ARM_VC: ++ return \"vsel%D1.\\t%0, %4, %3\"; ++ default: ++ gcc_unreachable (); ++ } ++ return \"\"; ++ }" ++ [(set_attr "conds" "use") ++ (set_attr "type" "f_sel")] ++) ++ ++(define_insn_and_split "*movsicc_insn" + [(set (match_operand:SI 0 "s_register_operand" "=r,r,r,r,r,r,r,r") + (if_then_else:SI + (match_operator 3 "arm_comparison_operator" +@@ -8123,26 +8836,60 @@ + mvn%D3\\t%0, #%B2 + mov%d3\\t%0, %1 + mvn%d3\\t%0, #%B1 +- mov%d3\\t%0, %1\;mov%D3\\t%0, %2 +- mov%d3\\t%0, %1\;mvn%D3\\t%0, #%B2 +- mvn%d3\\t%0, #%B1\;mov%D3\\t%0, %2 +- mvn%d3\\t%0, #%B1\;mvn%D3\\t%0, #%B2" ++ # ++ # ++ # ++ #" ++ ; alt4: mov%d3\\t%0, %1\;mov%D3\\t%0, %2 ++ ; alt5: mov%d3\\t%0, %1\;mvn%D3\\t%0, #%B2 ++ ; alt6: mvn%d3\\t%0, #%B1\;mov%D3\\t%0, %2 ++ ; alt7: mvn%d3\\t%0, #%B1\;mvn%D3\\t%0, #%B2" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ enum rtx_code rev_code; ++ enum machine_mode mode; ++ rtx rev_cond; ++ ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ operands[3], ++ gen_rtx_SET (VOIDmode, ++ operands[0], ++ operands[1]))); ++ ++ rev_code = GET_CODE (operands[3]); ++ mode = GET_MODE (operands[4]); ++ if (mode == CCFPmode || mode == CCFPEmode) ++ rev_code = reverse_condition_maybe_unordered (rev_code); ++ else ++ rev_code = reverse_condition (rev_code); ++ ++ rev_cond = gen_rtx_fmt_ee (rev_code, ++ VOIDmode, ++ operands[4], ++ const0_rtx); ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ rev_cond, ++ gen_rtx_SET (VOIDmode, ++ operands[0], ++ operands[2]))); ++ DONE; ++ } + [(set_attr "length" "4,4,4,4,8,8,8,8") + (set_attr "conds" "use") +- (set_attr "insn" "mov,mvn,mov,mvn,mov,mov,mvn,mvn") + (set_attr_alternative "type" + [(if_then_else (match_operand 2 "const_int_operand" "") +- (const_string "simple_alu_imm") +- (const_string "*")) +- (const_string "simple_alu_imm") ++ (const_string "mov_imm") ++ (const_string "mov_reg")) ++ (const_string "mvn_imm") + (if_then_else (match_operand 1 "const_int_operand" "") +- (const_string "simple_alu_imm") +- (const_string "*")) +- (const_string "simple_alu_imm") +- (const_string "*") +- (const_string "*") +- (const_string "*") +- (const_string "*")])] ++ (const_string "mov_imm") ++ (const_string "mov_reg")) ++ (const_string "mvn_imm") ++ (const_string "mov_reg") ++ (const_string "mov_reg") ++ (const_string "mov_reg") ++ (const_string "mov_reg")])] + ) + + (define_insn "*movsfcc_soft_insn" +@@ -8156,7 +8903,7 @@ + mov%D3\\t%0, %2 + mov%d3\\t%0, %1" + [(set_attr "conds" "use") +- (set_attr "insn" "mov")] ++ (set_attr "type" "mov_reg")] + ) + + +@@ -8190,7 +8937,8 @@ + (and (ge (minus (match_dup 0) (pc)) (const_int -2044)) + (le (minus (match_dup 0) (pc)) (const_int 2048)))) + (const_int 2) +- (const_int 4)))] ++ (const_int 4))) ++ (set_attr "type" "branch")] + ) + + (define_insn "*thumb_jump" +@@ -8212,7 +8960,8 @@ + (and (ge (minus (match_dup 0) (pc)) (const_int -2044)) + (le (minus (match_dup 0) (pc)) (const_int 2048))) + (const_int 2) +- (const_int 4)))] ++ (const_int 4))) ++ (set_attr "type" "branch")] + ) + + (define_expand "call" +@@ -8255,7 +9004,7 @@ + (match_operand 1 "" "")) + (use (match_operand 2 "" "")) + (clobber (reg:SI LR_REGNUM))] +- "TARGET_ARM && arm_arch5" ++ "TARGET_ARM && arm_arch5 && !SIBLING_CALL_P (insn)" + "blx%?\\t%0" + [(set_attr "type" "call")] + ) +@@ -8265,7 +9014,7 @@ + (match_operand 1 "" "")) + (use (match_operand 2 "" "")) + (clobber (reg:SI LR_REGNUM))] +- "TARGET_ARM && !arm_arch5" ++ "TARGET_ARM && !arm_arch5 && !SIBLING_CALL_P (insn)" + "* + return output_call (operands); + " +@@ -8284,7 +9033,7 @@ + (match_operand 1 "" "")) + (use (match_operand 2 "" "")) + (clobber (reg:SI LR_REGNUM))] +- "TARGET_ARM && !arm_arch5" ++ "TARGET_ARM && !arm_arch5 && !SIBLING_CALL_P (insn)" + "* + return output_call_mem (operands); + " +@@ -8297,7 +9046,7 @@ + (match_operand 1 "" "")) + (use (match_operand 2 "" "")) + (clobber (reg:SI LR_REGNUM))] +- "TARGET_THUMB1 && arm_arch5" ++ "TARGET_THUMB1 && arm_arch5 && !SIBLING_CALL_P (insn)" + "blx\\t%0" + [(set_attr "length" "2") + (set_attr "type" "call")] +@@ -8308,7 +9057,7 @@ + (match_operand 1 "" "")) + (use (match_operand 2 "" "")) + (clobber (reg:SI LR_REGNUM))] +- "TARGET_THUMB1 && !arm_arch5" ++ "TARGET_THUMB1 && !arm_arch5 && !SIBLING_CALL_P (insn)" + "* + { + if (!TARGET_CALLER_INTERWORKING) +@@ -8367,7 +9116,7 @@ + (match_operand 2 "" ""))) + (use (match_operand 3 "" "")) + (clobber (reg:SI LR_REGNUM))] +- "TARGET_ARM && arm_arch5" ++ "TARGET_ARM && arm_arch5 && !SIBLING_CALL_P (insn)" + "blx%?\\t%1" + [(set_attr "type" "call")] + ) +@@ -8378,7 +9127,7 @@ + (match_operand 2 "" ""))) + (use (match_operand 3 "" "")) + (clobber (reg:SI LR_REGNUM))] +- "TARGET_ARM && !arm_arch5" ++ "TARGET_ARM && !arm_arch5 && !SIBLING_CALL_P (insn)" + "* + return output_call (&operands[1]); + " +@@ -8394,7 +9143,8 @@ + (match_operand 2 "" ""))) + (use (match_operand 3 "" "")) + (clobber (reg:SI LR_REGNUM))] +- "TARGET_ARM && !arm_arch5 && (!CONSTANT_ADDRESS_P (XEXP (operands[1], 0)))" ++ "TARGET_ARM && !arm_arch5 && (!CONSTANT_ADDRESS_P (XEXP (operands[1], 0))) ++ && !SIBLING_CALL_P (insn)" + "* + return output_call_mem (&operands[1]); + " +@@ -8444,6 +9194,7 @@ + (use (match_operand 2 "" "")) + (clobber (reg:SI LR_REGNUM))] + "TARGET_32BIT ++ && !SIBLING_CALL_P (insn) + && (GET_CODE (operands[0]) == SYMBOL_REF) + && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[0]))" + "* +@@ -8460,6 +9211,7 @@ + (use (match_operand 3 "" "")) + (clobber (reg:SI LR_REGNUM))] + "TARGET_32BIT ++ && !SIBLING_CALL_P (insn) + && (GET_CODE (operands[1]) == SYMBOL_REF) + && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[1]))" + "* +@@ -8505,6 +9257,10 @@ + "TARGET_32BIT" + " + { ++ if (!REG_P (XEXP (operands[0], 0)) ++ && (GET_CODE (XEXP (operands[0], 0)) != SYMBOL_REF)) ++ XEXP (operands[0], 0) = force_reg (SImode, XEXP (operands[0], 0)); ++ + if (operands[2] == NULL_RTX) + operands[2] = const0_rtx; + }" +@@ -8519,6 +9275,10 @@ + "TARGET_32BIT" + " + { ++ if (!REG_P (XEXP (operands[1], 0)) && ++ (GET_CODE (XEXP (operands[1],0)) != SYMBOL_REF)) ++ XEXP (operands[1], 0) = force_reg (SImode, XEXP (operands[1], 0)); ++ + if (operands[3] == NULL_RTX) + operands[3] = const0_rtx; + }" +@@ -8525,13 +9285,21 @@ + ) + + (define_insn "*sibcall_insn" +- [(call (mem:SI (match_operand:SI 0 "" "X")) ++ [(call (mem:SI (match_operand:SI 0 "call_insn_operand" "Cs, US")) + (match_operand 1 "" "")) + (return) + (use (match_operand 2 "" ""))] +- "TARGET_32BIT && GET_CODE (operands[0]) == SYMBOL_REF" ++ "TARGET_32BIT && SIBLING_CALL_P (insn)" + "* +- return NEED_PLT_RELOC ? \"b%?\\t%a0(PLT)\" : \"b%?\\t%a0\"; ++ if (which_alternative == 1) ++ return NEED_PLT_RELOC ? \"b%?\\t%a0(PLT)\" : \"b%?\\t%a0\"; ++ else ++ { ++ if (arm_arch5 || arm_arch4t) ++ return \"bx%?\\t%0\\t%@ indirect register sibling call\"; ++ else ++ return \"mov%?\\t%|pc, %0\\t%@ indirect register sibling call\"; ++ } + " + [(set_attr "type" "call")] + ) +@@ -8538,28 +9306,36 @@ + + (define_insn "*sibcall_value_insn" + [(set (match_operand 0 "" "") +- (call (mem:SI (match_operand:SI 1 "" "X")) ++ (call (mem:SI (match_operand:SI 1 "call_insn_operand" "Cs,US")) + (match_operand 2 "" ""))) + (return) + (use (match_operand 3 "" ""))] +- "TARGET_32BIT && GET_CODE (operands[1]) == SYMBOL_REF" ++ "TARGET_32BIT && SIBLING_CALL_P (insn)" + "* +- return NEED_PLT_RELOC ? \"b%?\\t%a1(PLT)\" : \"b%?\\t%a1\"; ++ if (which_alternative == 1) ++ return NEED_PLT_RELOC ? \"b%?\\t%a1(PLT)\" : \"b%?\\t%a1\"; ++ else ++ { ++ if (arm_arch5 || arm_arch4t) ++ return \"bx%?\\t%1\"; ++ else ++ return \"mov%?\\t%|pc, %1\\t@ indirect sibling call \"; ++ } + " + [(set_attr "type" "call")] + ) + +-(define_expand "return" +- [(return)] ++(define_expand "return" ++ [(returns)] + "(TARGET_ARM || (TARGET_THUMB2 + && ARM_FUNC_TYPE (arm_current_func_type ()) == ARM_FT_NORMAL + && !IS_STACKALIGN (arm_current_func_type ()))) +- && USE_RETURN_INSN (FALSE)" ++ " + " + { + if (TARGET_THUMB2) + { +- thumb2_expand_return (); ++ thumb2_expand_return (); + DONE; + } + } +@@ -8584,13 +9360,13 @@ + (set_attr "predicable" "yes")] + ) + +-(define_insn "*cond_return" ++(define_insn "*cond_return" + [(set (pc) + (if_then_else (match_operator 0 "arm_comparison_operator" + [(match_operand 1 "cc_register" "") (const_int 0)]) +- (return) ++ (returns) + (pc)))] +- "TARGET_ARM && USE_RETURN_INSN (TRUE)" ++ "TARGET_ARM " + "* + { + if (arm_ccfsm_state == 2) +@@ -8598,7 +9374,8 @@ + arm_ccfsm_state += 2; + return \"\"; + } +- return output_return_instruction (operands[0], true, false, false); ++ return output_return_instruction (operands[0], true, false, ++ ); + }" + [(set_attr "conds" "use") + (set_attr "length" "12") +@@ -8605,13 +9382,13 @@ + (set_attr "type" "load1")] + ) + +-(define_insn "*cond_return_inverted" ++(define_insn "*cond_return_inverted" + [(set (pc) + (if_then_else (match_operator 0 "arm_comparison_operator" + [(match_operand 1 "cc_register" "") (const_int 0)]) + (pc) +- (return)))] +- "TARGET_ARM && USE_RETURN_INSN (TRUE)" ++ (returns)))] ++ "TARGET_ARM " + "* + { + if (arm_ccfsm_state == 2) +@@ -8619,7 +9396,8 @@ + arm_ccfsm_state += 2; + return \"\"; + } +- return output_return_instruction (operands[0], true, true, false); ++ return output_return_instruction (operands[0], true, true, ++ ); + }" + [(set_attr "conds" "use") + (set_attr "length" "12") +@@ -8667,7 +9445,8 @@ + "TARGET_ARM" + "teq\\t%|r0, %|r0\;teq\\t%|pc, %|pc" + [(set_attr "length" "8") +- (set_attr "conds" "set")] ++ (set_attr "conds" "set") ++ (set_attr "type" "multiple")] + ) + + ;; Call subroutine returning any type. +@@ -8858,7 +9637,8 @@ + return \"cmp\\t%0, %1\;ldrls\\t%|pc, [%|pc, %0, asl #2]\;b\\t%l3\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "12")] ++ (set_attr "length" "12") ++ (set_attr "type" "multiple")] + ) + + (define_expand "thumb1_casesi_internal_pic" +@@ -8889,7 +9669,8 @@ + (clobber (reg:SI LR_REGNUM))])] + "TARGET_THUMB1" + "* return thumb1_output_casesi(operands);" +- [(set_attr "length" "4")] ++ [(set_attr "length" "4") ++ (set_attr "type" "multiple")] + ) + + (define_expand "indirect_jump" +@@ -8915,7 +9696,8 @@ + (match_operand:SI 0 "s_register_operand" "r"))] + "TARGET_ARM" + "mov%?\\t%|pc, %0\\t%@ indirect register jump" +- [(set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "type" "branch")] + ) + + (define_insn "*load_indirect_jump" +@@ -8936,7 +9718,8 @@ + "TARGET_THUMB1" + "mov\\tpc, %0" + [(set_attr "conds" "clob") +- (set_attr "length" "2")] ++ (set_attr "length" "2") ++ (set_attr "type" "branch")] + ) + + +@@ -8955,7 +9738,8 @@ + [(set (attr "length") + (if_then_else (eq_attr "is_thumb" "yes") + (const_int 2) +- (const_int 4)))] ++ (const_int 4))) ++ (set_attr "type" "mov_reg")] + ) + + +@@ -8991,7 +9775,7 @@ + (if_then_else + (match_operand:SI 3 "mult_operator" "") + (const_string "no") (const_string "yes"))]) +- (set_attr "type" "alu_shift,alu_shift,alu_shift,alu_shift_reg")]) ++ (set_attr "type" "alu_shift_imm,alu_shift_imm,alu_shift_imm,alu_shift_reg")]) + + (define_split + [(set (match_operand:SI 0 "s_register_operand" "") +@@ -9028,7 +9812,7 @@ + [(set_attr "conds" "set") + (set_attr "shift" "4") + (set_attr "arch" "32,a") +- (set_attr "type" "alu_shift,alu_shift_reg")]) ++ (set_attr "type" "alus_shift_imm,alus_shift_reg")]) + + (define_insn "*arith_shiftsi_compare0_scratch" + [(set (reg:CC_NOOV CC_REGNUM) +@@ -9045,7 +9829,7 @@ + [(set_attr "conds" "set") + (set_attr "shift" "4") + (set_attr "arch" "32,a") +- (set_attr "type" "alu_shift,alu_shift_reg")]) ++ (set_attr "type" "alus_shift_imm,alus_shift_reg")]) + + (define_insn "*sub_shiftsi" + [(set (match_operand:SI 0 "s_register_operand" "=r,r") +@@ -9058,17 +9842,17 @@ + [(set_attr "predicable" "yes") + (set_attr "shift" "3") + (set_attr "arch" "32,a") +- (set_attr "type" "alu_shift,alu_shift_reg")]) ++ (set_attr "type" "alus_shift_imm,alus_shift_reg")]) + + (define_insn "*sub_shiftsi_compare0" + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV +- (minus:SI (match_operand:SI 1 "s_register_operand" "r,r") ++ (minus:SI (match_operand:SI 1 "s_register_operand" "r,r,r") + (match_operator:SI 2 "shift_operator" +- [(match_operand:SI 3 "s_register_operand" "r,r") +- (match_operand:SI 4 "shift_amount_operand" "M,rM")])) ++ [(match_operand:SI 3 "s_register_operand" "r,r,r") ++ (match_operand:SI 4 "shift_amount_operand" "M,r,M")])) + (const_int 0))) +- (set (match_operand:SI 0 "s_register_operand" "=r,r") ++ (set (match_operand:SI 0 "s_register_operand" "=r,r,r") + (minus:SI (match_dup 1) + (match_op_dup 2 [(match_dup 3) (match_dup 4)])))] + "TARGET_32BIT" +@@ -9075,49 +9859,87 @@ + "sub%.\\t%0, %1, %3%S2" + [(set_attr "conds" "set") + (set_attr "shift" "3") +- (set_attr "arch" "32,a") +- (set_attr "type" "alu_shift,alu_shift_reg")]) ++ (set_attr "arch" "32,a,a") ++ (set_attr "type" "alus_shift_imm,alus_shift_reg,alus_shift_imm")]) + + (define_insn "*sub_shiftsi_compare0_scratch" + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV +- (minus:SI (match_operand:SI 1 "s_register_operand" "r,r") ++ (minus:SI (match_operand:SI 1 "s_register_operand" "r,r,r") + (match_operator:SI 2 "shift_operator" +- [(match_operand:SI 3 "s_register_operand" "r,r") +- (match_operand:SI 4 "shift_amount_operand" "M,rM")])) ++ [(match_operand:SI 3 "s_register_operand" "r,r,r") ++ (match_operand:SI 4 "shift_amount_operand" "M,r,M")])) + (const_int 0))) +- (clobber (match_scratch:SI 0 "=r,r"))] ++ (clobber (match_scratch:SI 0 "=r,r,r"))] + "TARGET_32BIT" + "sub%.\\t%0, %1, %3%S2" + [(set_attr "conds" "set") + (set_attr "shift" "3") +- (set_attr "arch" "32,a") +- (set_attr "type" "alu_shift,alu_shift_reg")]) ++ (set_attr "arch" "32,a,a") ++ (set_attr "type" "alus_shift_imm,alus_shift_reg,alus_shift_imm")]) + + +-(define_insn "*and_scc" ++(define_insn_and_split "*and_scc" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (and:SI (match_operator:SI 1 "arm_comparison_operator" +- [(match_operand 3 "cc_register" "") (const_int 0)]) +- (match_operand:SI 2 "s_register_operand" "r")))] ++ [(match_operand 2 "cc_register" "") (const_int 0)]) ++ (match_operand:SI 3 "s_register_operand" "r")))] + "TARGET_ARM" +- "mov%D1\\t%0, #0\;and%d1\\t%0, %2, #1" ++ "#" ; "mov%D1\\t%0, #0\;and%d1\\t%0, %3, #1" ++ "&& reload_completed" ++ [(cond_exec (match_dup 5) (set (match_dup 0) (const_int 0))) ++ (cond_exec (match_dup 4) (set (match_dup 0) ++ (and:SI (match_dup 3) (const_int 1))))] ++ { ++ enum machine_mode mode = GET_MODE (operands[2]); ++ enum rtx_code rc = GET_CODE (operands[1]); ++ ++ /* Note that operands[4] is the same as operands[1], ++ but with VOIDmode as the result. */ ++ operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx); ++ if (mode == CCFPmode || mode == CCFPEmode) ++ rc = reverse_condition_maybe_unordered (rc); ++ else ++ rc = reverse_condition (rc); ++ operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx); ++ } + [(set_attr "conds" "use") +- (set_attr "insn" "mov") ++ (set_attr "type" "multiple") + (set_attr "length" "8")] + ) + +-(define_insn "*ior_scc" ++(define_insn_and_split "*ior_scc" + [(set (match_operand:SI 0 "s_register_operand" "=r,r") +- (ior:SI (match_operator:SI 2 "arm_comparison_operator" +- [(match_operand 3 "cc_register" "") (const_int 0)]) +- (match_operand:SI 1 "s_register_operand" "0,?r")))] ++ (ior:SI (match_operator:SI 1 "arm_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)]) ++ (match_operand:SI 3 "s_register_operand" "0,?r")))] + "TARGET_ARM" + "@ +- orr%d2\\t%0, %1, #1 +- mov%D2\\t%0, %1\;orr%d2\\t%0, %1, #1" ++ orr%d1\\t%0, %3, #1 ++ #" ++ "&& reload_completed ++ && REGNO (operands [0]) != REGNO (operands[3])" ++ ;; && which_alternative == 1 ++ ; mov%D1\\t%0, %3\;orr%d1\\t%0, %3, #1 ++ [(cond_exec (match_dup 5) (set (match_dup 0) (match_dup 3))) ++ (cond_exec (match_dup 4) (set (match_dup 0) ++ (ior:SI (match_dup 3) (const_int 1))))] ++ { ++ enum machine_mode mode = GET_MODE (operands[2]); ++ enum rtx_code rc = GET_CODE (operands[1]); ++ ++ /* Note that operands[4] is the same as operands[1], ++ but with VOIDmode as the result. */ ++ operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx); ++ if (mode == CCFPmode || mode == CCFPEmode) ++ rc = reverse_condition_maybe_unordered (rc); ++ else ++ rc = reverse_condition (rc); ++ operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx); ++ } + [(set_attr "conds" "use") +- (set_attr "length" "4,8")] ++ (set_attr "length" "4,8") ++ (set_attr "type" "logic_imm,multiple")] + ) + + ; A series of splitters for the compare_scc pattern below. Note that +@@ -9144,6 +9966,16 @@ + (eq:SI (match_operand:SI 1 "s_register_operand" "") + (const_int 0))) + (clobber (reg:CC CC_REGNUM))] ++ "arm_arch5 && TARGET_32BIT" ++ [(set (match_dup 0) (clz:SI (match_dup 1))) ++ (set (match_dup 0) (lshiftrt:SI (match_dup 0) (const_int 5)))] ++) ++ ++(define_split ++ [(set (match_operand:SI 0 "s_register_operand" "") ++ (eq:SI (match_operand:SI 1 "s_register_operand" "") ++ (const_int 0))) ++ (clobber (reg:CC CC_REGNUM))] + "TARGET_32BIT && reload_completed" + [(parallel + [(set (reg:CC CC_REGNUM) +@@ -9184,7 +10016,7 @@ + (set (match_dup 0) (const_int 1)))]) + + (define_insn_and_split "*compare_scc" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r") ++ [(set (match_operand:SI 0 "s_register_operand" "=Ts,Ts") + (match_operator:SI 1 "arm_comparison_operator" + [(match_operand:SI 2 "s_register_operand" "r,r") + (match_operand:SI 3 "arm_add_operand" "rI,L")])) +@@ -9209,33 +10041,99 @@ + else + rc = reverse_condition (rc); + operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, tmp1, const0_rtx); +-}) ++} ++ [(set_attr "type" "multiple")] ++) + + ;; Attempt to improve the sequence generated by the compare_scc splitters + ;; not to use conditional execution. ++ ++;; Rd = (eq (reg1) (const_int0)) // ARMv5 ++;; clz Rd, reg1 ++;; lsr Rd, Rd, #5 + (define_peephole2 + [(set (reg:CC CC_REGNUM) + (compare:CC (match_operand:SI 1 "register_operand" "") ++ (const_int 0))) ++ (cond_exec (ne (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_operand:SI 0 "register_operand" "") (const_int 0))) ++ (cond_exec (eq (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_dup 0) (const_int 1)))] ++ "arm_arch5 && TARGET_32BIT && peep2_regno_dead_p (3, CC_REGNUM)" ++ [(set (match_dup 0) (clz:SI (match_dup 1))) ++ (set (match_dup 0) (lshiftrt:SI (match_dup 0) (const_int 5)))] ++) ++ ++;; Rd = (eq (reg1) (const_int0)) // !ARMv5 ++;; negs Rd, reg1 ++;; adc Rd, Rd, reg1 ++(define_peephole2 ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_operand:SI 1 "register_operand" "") ++ (const_int 0))) ++ (cond_exec (ne (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_operand:SI 0 "register_operand" "") (const_int 0))) ++ (cond_exec (eq (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_dup 0) (const_int 1))) ++ (match_scratch:SI 2 "r")] ++ "TARGET_32BIT && peep2_regno_dead_p (3, CC_REGNUM)" ++ [(parallel ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (const_int 0) (match_dup 1))) ++ (set (match_dup 2) (minus:SI (const_int 0) (match_dup 1)))]) ++ (set (match_dup 0) ++ (plus:SI (plus:SI (match_dup 1) (match_dup 2)) ++ (geu:SI (reg:CC CC_REGNUM) (const_int 0))))] ++) ++ ++;; Rd = (eq (reg1) (reg2/imm)) // ARMv5 and optimising for speed. ++;; sub Rd, Reg1, reg2 ++;; clz Rd, Rd ++;; lsr Rd, Rd, #5 ++(define_peephole2 ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "arm_rhs_operand" ""))) + (cond_exec (ne (reg:CC CC_REGNUM) (const_int 0)) + (set (match_operand:SI 0 "register_operand" "") (const_int 0))) + (cond_exec (eq (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_dup 0) (const_int 1)))] ++ "arm_arch5 && TARGET_32BIT && peep2_regno_dead_p (3, CC_REGNUM) ++ && !(TARGET_THUMB2 && optimize_insn_for_size_p ())" ++ [(set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2))) ++ (set (match_dup 0) (clz:SI (match_dup 0))) ++ (set (match_dup 0) (lshiftrt:SI (match_dup 0) (const_int 5)))] ++) ++ ++ ++;; Rd = (eq (reg1) (reg2)) // ! ARMv5 or optimising for size. ++;; sub T1, Reg1, reg2 ++;; negs Rd, T1 ++;; adc Rd, Rd, T1 ++(define_peephole2 ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_operand:SI 1 "register_operand" "") ++ (match_operand:SI 2 "arm_rhs_operand" ""))) ++ (cond_exec (ne (reg:CC CC_REGNUM) (const_int 0)) ++ (set (match_operand:SI 0 "register_operand" "") (const_int 0))) ++ (cond_exec (eq (reg:CC CC_REGNUM) (const_int 0)) + (set (match_dup 0) (const_int 1))) + (match_scratch:SI 3 "r")] +- "TARGET_32BIT" +- [(parallel +- [(set (reg:CC CC_REGNUM) +- (compare:CC (match_dup 1) (match_dup 2))) +- (set (match_dup 3) (minus:SI (match_dup 1) (match_dup 2)))]) ++ "TARGET_32BIT && peep2_regno_dead_p (3, CC_REGNUM)" ++ [(set (match_dup 3) (match_dup 4)) + (parallel + [(set (reg:CC CC_REGNUM) + (compare:CC (const_int 0) (match_dup 3))) + (set (match_dup 0) (minus:SI (const_int 0) (match_dup 3)))]) +- (parallel +- [(set (match_dup 0) +- (plus:SI (plus:SI (match_dup 0) (match_dup 3)) +- (geu:SI (reg:CC CC_REGNUM) (const_int 0)))) +- (clobber (reg:CC CC_REGNUM))])]) ++ (set (match_dup 0) ++ (plus:SI (plus:SI (match_dup 0) (match_dup 3)) ++ (geu:SI (reg:CC CC_REGNUM) (const_int 0))))] ++ " ++ if (CONST_INT_P (operands[2])) ++ operands[4] = plus_constant (SImode, operands[1], -INTVAL (operands[2])); ++ else ++ operands[4] = gen_rtx_MINUS (SImode, operands[1], operands[2]); ++ ") + + (define_insn "*cond_move" + [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") +@@ -9262,7 +10160,7 @@ + return \"\"; + " + [(set_attr "conds" "use") +- (set_attr "insn" "mov") ++ (set_attr "type" "mov_reg,mov_reg,multiple") + (set_attr "length" "4,4,8")] + ) + +@@ -9289,7 +10187,8 @@ + return \"%i5%d4\\t%0, %1, #1\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "12")] ++ (set_attr "length" "12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*cond_sub" +@@ -9307,7 +10206,8 @@ + return \"sub%d4\\t%0, %1, #1\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*cmp_ite0" +@@ -9371,6 +10271,7 @@ + }" + [(set_attr "conds" "set") + (set_attr "arch" "t2,t2,t2,t2,t2,any,any,any,any") ++ (set_attr "type" "multiple") + (set_attr_alternative "length" + [(const_int 6) + (const_int 8) +@@ -9470,7 +10371,8 @@ + (const_int 10)) + (if_then_else (eq_attr "is_thumb" "no") + (const_int 8) +- (const_int 10))])] ++ (const_int 10))]) ++ (set_attr "type" "multiple")] + ) + + (define_insn "*cmp_and" +@@ -9551,7 +10453,8 @@ + (const_int 10)) + (if_then_else (eq_attr "is_thumb" "no") + (const_int 8) +- (const_int 10))])] ++ (const_int 10))]) ++ (set_attr "type" "multiple")] + ) + + (define_insn "*cmp_ior" +@@ -9632,11 +10535,12 @@ + (const_int 10)) + (if_then_else (eq_attr "is_thumb" "no") + (const_int 8) +- (const_int 10))])] ++ (const_int 10))]) ++ (set_attr "type" "multiple")] + ) + + (define_insn_and_split "*ior_scc_scc" +- [(set (match_operand:SI 0 "s_register_operand" "=r") ++ [(set (match_operand:SI 0 "s_register_operand" "=Ts") + (ior:SI (match_operator:SI 3 "arm_comparison_operator" + [(match_operand:SI 1 "s_register_operand" "r") + (match_operand:SI 2 "arm_add_operand" "rIL")]) +@@ -9661,7 +10565,9 @@ + DOM_CC_X_OR_Y), + CC_REGNUM);" + [(set_attr "conds" "clob") +- (set_attr "length" "16")]) ++ (set_attr "length" "16") ++ (set_attr "type" "multiple")] ++) + + ; If the above pattern is followed by a CMP insn, then the compare is + ; redundant, since we can rework the conditional instruction that follows. +@@ -9674,7 +10580,7 @@ + [(match_operand:SI 4 "s_register_operand" "r") + (match_operand:SI 5 "arm_add_operand" "rIL")])) + (const_int 0))) +- (set (match_operand:SI 7 "s_register_operand" "=r") ++ (set (match_operand:SI 7 "s_register_operand" "=Ts") + (ior:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)]) + (match_op_dup 6 [(match_dup 4) (match_dup 5)])))] + "TARGET_32BIT" +@@ -9689,10 +10595,12 @@ + (set (match_dup 7) (ne:SI (match_dup 0) (const_int 0)))] + "" + [(set_attr "conds" "set") +- (set_attr "length" "16")]) ++ (set_attr "length" "16") ++ (set_attr "type" "multiple")] ++) + + (define_insn_and_split "*and_scc_scc" +- [(set (match_operand:SI 0 "s_register_operand" "=r") ++ [(set (match_operand:SI 0 "s_register_operand" "=Ts") + (and:SI (match_operator:SI 3 "arm_comparison_operator" + [(match_operand:SI 1 "s_register_operand" "r") + (match_operand:SI 2 "arm_add_operand" "rIL")]) +@@ -9719,7 +10627,9 @@ + DOM_CC_X_AND_Y), + CC_REGNUM);" + [(set_attr "conds" "clob") +- (set_attr "length" "16")]) ++ (set_attr "length" "16") ++ (set_attr "type" "multiple")] ++) + + ; If the above pattern is followed by a CMP insn, then the compare is + ; redundant, since we can rework the conditional instruction that follows. +@@ -9732,7 +10642,7 @@ + [(match_operand:SI 4 "s_register_operand" "r") + (match_operand:SI 5 "arm_add_operand" "rIL")])) + (const_int 0))) +- (set (match_operand:SI 7 "s_register_operand" "=r") ++ (set (match_operand:SI 7 "s_register_operand" "=Ts") + (and:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)]) + (match_op_dup 6 [(match_dup 4) (match_dup 5)])))] + "TARGET_32BIT" +@@ -9747,7 +10657,9 @@ + (set (match_dup 7) (ne:SI (match_dup 0) (const_int 0)))] + "" + [(set_attr "conds" "set") +- (set_attr "length" "16")]) ++ (set_attr "length" "16") ++ (set_attr "type" "multiple")] ++) + + ;; If there is no dominance in the comparison, then we can still save an + ;; instruction in the AND case, since we can know that the second compare +@@ -9754,7 +10666,7 @@ + ;; need only zero the value if false (if true, then the value is already + ;; correct). + (define_insn_and_split "*and_scc_scc_nodom" +- [(set (match_operand:SI 0 "s_register_operand" "=&r,&r,&r") ++ [(set (match_operand:SI 0 "s_register_operand" "=&Ts,&Ts,&Ts") + (and:SI (match_operator:SI 3 "arm_comparison_operator" + [(match_operand:SI 1 "s_register_operand" "r,r,0") + (match_operand:SI 2 "arm_add_operand" "rIL,0,rIL")]) +@@ -9781,7 +10693,9 @@ + operands[8] = gen_rtx_COMPARE (GET_MODE (operands[7]), operands[4], + operands[5]);" + [(set_attr "conds" "clob") +- (set_attr "length" "20")]) ++ (set_attr "length" "20") ++ (set_attr "type" "multiple")] ++) + + (define_split + [(set (reg:CC_NOOV CC_REGNUM) +@@ -9822,7 +10736,7 @@ + "") + ;; ??? The conditional patterns above need checking for Thumb-2 usefulness + +-(define_insn "*negscc" ++(define_insn_and_split "*negscc" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (neg:SI (match_operator 3 "arm_comparison_operator" + [(match_operand:SI 1 "s_register_operand" "r") +@@ -9829,19 +10743,110 @@ + (match_operand:SI 2 "arm_rhs_operand" "rI")]))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ARM" +- "* +- if (GET_CODE (operands[3]) == LT && operands[2] == const0_rtx) +- return \"mov\\t%0, %1, asr #31\"; ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM); + +- if (GET_CODE (operands[3]) == NE) +- return \"subs\\t%0, %1, %2\;mvnne\\t%0, #0\"; ++ if (GET_CODE (operands[3]) == LT && operands[2] == const0_rtx) ++ { ++ /* Emit mov\\t%0, %1, asr #31 */ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ operands[0], ++ gen_rtx_ASHIFTRT (SImode, ++ operands[1], ++ GEN_INT (31)))); ++ DONE; ++ } ++ else if (GET_CODE (operands[3]) == NE) ++ { ++ /* Emit subs\\t%0, %1, %2\;mvnne\\t%0, #0 */ ++ if (CONST_INT_P (operands[2])) ++ emit_insn (gen_cmpsi2_addneg (operands[0], operands[1], operands[2], ++ GEN_INT (- INTVAL (operands[2])))); ++ else ++ emit_insn (gen_subsi3_compare (operands[0], operands[1], operands[2])); + +- output_asm_insn (\"cmp\\t%1, %2\", operands); +- output_asm_insn (\"mov%D3\\t%0, #0\", operands); +- return \"mvn%d3\\t%0, #0\"; ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ gen_rtx_NE (SImode, ++ cc_reg, ++ const0_rtx), ++ gen_rtx_SET (SImode, ++ operands[0], ++ GEN_INT (~0)))); ++ DONE; ++ } ++ else ++ { ++ /* Emit: cmp\\t%1, %2\;mov%D3\\t%0, #0\;mvn%d3\\t%0, #0 */ ++ emit_insn (gen_rtx_SET (VOIDmode, ++ cc_reg, ++ gen_rtx_COMPARE (CCmode, operands[1], operands[2]))); ++ enum rtx_code rc = GET_CODE (operands[3]); ++ ++ rc = reverse_condition (rc); ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ gen_rtx_fmt_ee (rc, ++ VOIDmode, ++ cc_reg, ++ const0_rtx), ++ gen_rtx_SET (VOIDmode, operands[0], const0_rtx))); ++ rc = GET_CODE (operands[3]); ++ emit_insn (gen_rtx_COND_EXEC (VOIDmode, ++ gen_rtx_fmt_ee (rc, ++ VOIDmode, ++ cc_reg, ++ const0_rtx), ++ gen_rtx_SET (VOIDmode, ++ operands[0], ++ GEN_INT (~0)))); ++ DONE; ++ } ++ FAIL; ++ } ++ [(set_attr "conds" "clob") ++ (set_attr "length" "12") ++ (set_attr "type" "multiple")] ++) ++ ++(define_insn_and_split "movcond_addsi" ++ [(set (match_operand:SI 0 "s_register_operand" "=r,l,r") ++ (if_then_else:SI ++ (match_operator 5 "comparison_operator" ++ [(plus:SI (match_operand:SI 3 "s_register_operand" "r,r,r") ++ (match_operand:SI 4 "arm_add_operand" "rIL,rIL,rIL")) ++ (const_int 0)]) ++ (match_operand:SI 1 "arm_rhs_operand" "rI,rPy,r") ++ (match_operand:SI 2 "arm_rhs_operand" "rI,rPy,r"))) ++ (clobber (reg:CC CC_REGNUM))] ++ "TARGET_32BIT" ++ "#" ++ "&& reload_completed" ++ [(set (reg:CC_NOOV CC_REGNUM) ++ (compare:CC_NOOV ++ (plus:SI (match_dup 3) ++ (match_dup 4)) ++ (const_int 0))) ++ (set (match_dup 0) (match_dup 1)) ++ (cond_exec (match_dup 6) ++ (set (match_dup 0) (match_dup 2)))] + " ++ { ++ enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[5]), ++ operands[3], operands[4]); ++ enum rtx_code rc = GET_CODE (operands[5]); ++ ++ operands[6] = gen_rtx_REG (mode, CC_REGNUM); ++ gcc_assert (!(mode == CCFPmode || mode == CCFPEmode)); ++ rc = reverse_condition (rc); ++ ++ operands[6] = gen_rtx_fmt_ee (rc, VOIDmode, operands[6], const0_rtx); ++ } ++ " + [(set_attr "conds" "clob") +- (set_attr "length" "12")] ++ (set_attr "enabled_for_depr_it" "no,yes,yes") ++ (set_attr "type" "multiple")] + ) + + (define_insn "movcond" +@@ -9904,7 +10909,8 @@ + return \"\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "8,8,12")] ++ (set_attr "length" "8,8,12") ++ (set_attr "type" "multiple")] + ) + + ;; ??? The patterns below need checking for Thumb-2 usefulness. +@@ -9922,7 +10928,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_plus_move" +@@ -9944,11 +10951,11 @@ + (set_attr "length" "4,4,8,8") + (set_attr_alternative "type" + [(if_then_else (match_operand 3 "const_int_operand" "") +- (const_string "simple_alu_imm" ) +- (const_string "*")) +- (const_string "simple_alu_imm") +- (const_string "*") +- (const_string "*")])] ++ (const_string "alu_imm" ) ++ (const_string "alu_reg")) ++ (const_string "alu_imm") ++ (const_string "alu_reg") ++ (const_string "alu_reg")])] + ) + + (define_insn "*ifcompare_move_plus" +@@ -9964,7 +10971,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_move_plus" +@@ -9984,13 +10992,7 @@ + sub%D4\\t%0, %2, #%n3\;mov%d4\\t%0, %1" + [(set_attr "conds" "use") + (set_attr "length" "4,4,8,8") +- (set_attr_alternative "type" +- [(if_then_else (match_operand 3 "const_int_operand" "") +- (const_string "simple_alu_imm" ) +- (const_string "*")) +- (const_string "simple_alu_imm") +- (const_string "*") +- (const_string "*")])] ++ (set_attr "type" "alu_reg,alu_imm,multiple,multiple")] + ) + + (define_insn "*ifcompare_arith_arith" +@@ -10008,7 +11010,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "12")] ++ (set_attr "length" "12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_arith_arith" +@@ -10024,7 +11027,8 @@ + "TARGET_ARM" + "%I6%d5\\t%0, %1, %2\;%I7%D5\\t%0, %3, %4" + [(set_attr "conds" "use") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*ifcompare_arith_move" +@@ -10065,7 +11069,8 @@ + return \"\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_arith_move" +@@ -10082,7 +11087,7 @@ + %I5%d4\\t%0, %2, %3\;mov%D4\\t%0, %1" + [(set_attr "conds" "use") + (set_attr "length" "4,8") +- (set_attr "type" "*,*")] ++ (set_attr "type" "alu_shift_reg,multiple")] + ) + + (define_insn "*ifcompare_move_arith" +@@ -10124,7 +11129,8 @@ + return \"%I7%D6\\t%0, %2, %3\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_move_arith" +@@ -10142,7 +11148,7 @@ + %I5%D4\\t%0, %2, %3\;mov%d4\\t%0, %1" + [(set_attr "conds" "use") + (set_attr "length" "4,8") +- (set_attr "type" "*,*")] ++ (set_attr "type" "alu_shift_reg,multiple")] + ) + + (define_insn "*ifcompare_move_not" +@@ -10158,7 +11164,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_move_not" +@@ -10174,8 +11181,9 @@ + mov%d4\\t%0, %1\;mvn%D4\\t%0, %2 + mvn%d4\\t%0, #%B1\;mvn%D4\\t%0, %2" + [(set_attr "conds" "use") +- (set_attr "insn" "mvn") +- (set_attr "length" "4,8,8")] ++ (set_attr "type" "mvn_reg") ++ (set_attr "length" "4,8,8") ++ (set_attr "type" "mvn_reg,multiple,multiple")] + ) + + (define_insn "*ifcompare_not_move" +@@ -10191,7 +11199,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_not_move" +@@ -10207,7 +11216,7 @@ + mov%D4\\t%0, %1\;mvn%d4\\t%0, %2 + mvn%D4\\t%0, #%B1\;mvn%d4\\t%0, %2" + [(set_attr "conds" "use") +- (set_attr "insn" "mvn") ++ (set_attr "type" "mvn_reg,multiple,multiple") + (set_attr "length" "4,8,8")] + ) + +@@ -10225,7 +11234,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_shift_move" +@@ -10245,10 +11255,7 @@ + [(set_attr "conds" "use") + (set_attr "shift" "2") + (set_attr "length" "4,8,8") +- (set_attr "insn" "mov") +- (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "") +- (const_string "alu_shift") +- (const_string "alu_shift_reg")))] ++ (set_attr "type" "mov_shift_reg,multiple,multiple")] + ) + + (define_insn "*ifcompare_move_shift" +@@ -10265,7 +11272,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_move_shift" +@@ -10285,10 +11293,7 @@ + [(set_attr "conds" "use") + (set_attr "shift" "2") + (set_attr "length" "4,8,8") +- (set_attr "insn" "mov") +- (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "") +- (const_string "alu_shift") +- (const_string "alu_shift_reg")))] ++ (set_attr "type" "mov_shift_reg,multiple,multiple")] + ) + + (define_insn "*ifcompare_shift_shift" +@@ -10307,7 +11312,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "12")] ++ (set_attr "length" "12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_shift_shift" +@@ -10326,12 +11332,11 @@ + [(set_attr "conds" "use") + (set_attr "shift" "1") + (set_attr "length" "8") +- (set_attr "insn" "mov") + (set (attr "type") (if_then_else + (and (match_operand 2 "const_int_operand" "") + (match_operand 4 "const_int_operand" "")) +- (const_string "alu_shift") +- (const_string "alu_shift_reg")))] ++ (const_string "mov_shift") ++ (const_string "mov_shift_reg")))] + ) + + (define_insn "*ifcompare_not_arith" +@@ -10348,7 +11353,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "12")] ++ (set_attr "length" "12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_not_arith" +@@ -10363,7 +11369,7 @@ + "TARGET_ARM" + "mvn%d5\\t%0, %1\;%I6%D5\\t%0, %2, %3" + [(set_attr "conds" "use") +- (set_attr "insn" "mvn") ++ (set_attr "type" "mvn_reg") + (set_attr "length" "8")] + ) + +@@ -10381,7 +11387,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "12")] ++ (set_attr "length" "12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_arith_not" +@@ -10396,7 +11403,7 @@ + "TARGET_ARM" + "mvn%D5\\t%0, %1\;%I6%d5\\t%0, %2, %3" + [(set_attr "conds" "use") +- (set_attr "insn" "mvn") ++ (set_attr "type" "multiple") + (set_attr "length" "8")] + ) + +@@ -10412,7 +11419,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_neg_move" +@@ -10428,7 +11436,8 @@ + mov%D4\\t%0, %1\;rsb%d4\\t%0, %2, #0 + mvn%D4\\t%0, #%B1\;rsb%d4\\t%0, %2, #0" + [(set_attr "conds" "use") +- (set_attr "length" "4,8,8")] ++ (set_attr "length" "4,8,8") ++ (set_attr "type" "logic_shift_imm,multiple,multiple")] + ) + + (define_insn "*ifcompare_move_neg" +@@ -10443,7 +11452,8 @@ + "TARGET_ARM" + "#" + [(set_attr "conds" "clob") +- (set_attr "length" "8,12")] ++ (set_attr "length" "8,12") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*if_move_neg" +@@ -10459,7 +11469,8 @@ + mov%d4\\t%0, %1\;rsb%D4\\t%0, %2, #0 + mvn%d4\\t%0, #%B1\;rsb%D4\\t%0, %2, #0" + [(set_attr "conds" "use") +- (set_attr "length" "4,8,8")] ++ (set_attr "length" "4,8,8") ++ (set_attr "type" "logic_shift_imm,multiple,multiple")] + ) + + (define_insn "*arith_adjacentmem" +@@ -10657,7 +11668,8 @@ + [(unspec_volatile [(const_int 0)] VUNSPEC_THUMB1_INTERWORK)] + "TARGET_THUMB1" + "* return thumb1_output_interwork ();" +- [(set_attr "length" "8")] ++ [(set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + ;; Note - although unspec_volatile's USE all hard registers, +@@ -10844,7 +11856,7 @@ + mvn%D4\\t%0, %2 + mov%d4\\t%0, %1\;mvn%D4\\t%0, %2" + [(set_attr "conds" "use") +- (set_attr "insn" "mvn") ++ (set_attr "type" "mvn_reg,multiple") + (set_attr "length" "4,8")] + ) + +@@ -10864,7 +11876,8 @@ + return \"mvnne\\t%0, #0\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "8")] ++ (set_attr "length" "8") ++ (set_attr "type" "multiple")] + ) + + (define_insn "*not_signextract_onebit" +@@ -10882,7 +11895,8 @@ + return \"movne\\t%0, #0\"; + " + [(set_attr "conds" "clob") +- (set_attr "length" "12")] ++ (set_attr "length" "12") ++ (set_attr "type" "multiple")] + ) + ;; ??? The above patterns need auditing for Thumb-2 + +@@ -10944,7 +11958,8 @@ + UNSPEC_PRLG_STK))] + "" + "" +- [(set_attr "length" "0")] ++ [(set_attr "length" "0") ++ (set_attr "type" "block")] + ) + + ;; Pop (as used in epilogue RTL) +@@ -11074,6 +12089,7 @@ + assemble_align (32); + return \"\"; + " ++ [(set_attr "type" "no_insn")] + ) + + (define_insn "align_8" +@@ -11083,6 +12099,7 @@ + assemble_align (64); + return \"\"; + " ++ [(set_attr "type" "no_insn")] + ) + + (define_insn "consttable_end" +@@ -11092,6 +12109,7 @@ + making_const_table = FALSE; + return \"\"; + " ++ [(set_attr "type" "no_insn")] + ) + + (define_insn "consttable_1" +@@ -11103,7 +12121,8 @@ + assemble_zeros (3); + return \"\"; + " +- [(set_attr "length" "4")] ++ [(set_attr "length" "4") ++ (set_attr "type" "no_insn")] + ) + + (define_insn "consttable_2" +@@ -11125,7 +12144,8 @@ + } + return \"\"; + }" +- [(set_attr "length" "4")] ++ [(set_attr "length" "4") ++ (set_attr "type" "no_insn")] + ) + + (define_insn "consttable_4" +@@ -11158,7 +12178,8 @@ + } + return \"\"; + }" +- [(set_attr "length" "4")] ++ [(set_attr "length" "4") ++ (set_attr "type" "no_insn")] + ) + + (define_insn "consttable_8" +@@ -11182,7 +12203,8 @@ + } + return \"\"; + }" +- [(set_attr "length" "8")] ++ [(set_attr "length" "8") ++ (set_attr "type" "no_insn")] + ) + + (define_insn "consttable_16" +@@ -11206,7 +12228,8 @@ + } + return \"\"; + }" +- [(set_attr "length" "16")] ++ [(set_attr "length" "16") ++ (set_attr "type" "no_insn")] + ) + + ;; Miscellaneous Thumb patterns +@@ -11234,7 +12257,8 @@ + (use (label_ref (match_operand 1 "" "")))] + "TARGET_THUMB1" + "mov\\t%|pc, %0" +- [(set_attr "length" "2")] ++ [(set_attr "length" "2") ++ (set_attr "type" "no_insn")] + ) + + ;; V5 Instructions, +@@ -11245,7 +12269,7 @@ + "TARGET_32BIT && arm_arch5" + "clz%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "insn" "clz")]) ++ (set_attr "type" "clz")]) + + (define_insn "rbitsi2" + [(set (match_operand:SI 0 "s_register_operand" "=r") +@@ -11253,7 +12277,7 @@ + "TARGET_32BIT && arm_arch_thumb2" + "rbit%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "insn" "clz")]) ++ (set_attr "type" "clz")]) + + (define_expand "ctzsi2" + [(set (match_operand:SI 0 "s_register_operand" "") +@@ -11288,6 +12312,7 @@ + (const_int 0)])] + "TARGET_32BIT" + "" ++[(set_attr "predicated" "yes")] + ) + + (define_insn "force_register_use" +@@ -11294,7 +12319,8 @@ + [(unspec:SI [(match_operand:SI 0 "register_operand" "")] UNSPEC_REGISTER_USE)] + "" + "%@ %0 needed" +- [(set_attr "length" "0")] ++ [(set_attr "length" "0") ++ (set_attr "type" "no_insn")] + ) + + +@@ -11342,6 +12368,7 @@ + thumb_set_return_address (operands[0], operands[1]); + DONE; + }" ++ [(set_attr "type" "mov_reg")] + ) + + +@@ -11352,7 +12379,8 @@ + (unspec:SI [(const_int 0)] UNSPEC_TLS))] + "TARGET_HARD_TP" + "mrc%?\\tp15, 0, %0, c13, c0, 3\\t@ load_tp_hard" +- [(set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "type" "mrs")] + ) + + ;; Doesn't clobber R1-R3. Must use r0 for the first operand. +@@ -11363,7 +12391,8 @@ + (clobber (reg:CC CC_REGNUM))] + "TARGET_SOFT_TP" + "bl\\t__aeabi_read_tp\\t@ load_tp_soft" +- [(set_attr "conds" "clob")] ++ [(set_attr "conds" "clob") ++ (set_attr "type" "branch")] + ) + + ;; tls descriptor call +@@ -11382,7 +12411,8 @@ + return "bl\\t%c0(tlscall)"; + } + [(set_attr "conds" "clob") +- (set_attr "length" "4")] ++ (set_attr "length" "4") ++ (set_attr "type" "branch")] + ) + + ;; For thread pointer builtin +@@ -11407,7 +12437,9 @@ + "arm_arch_thumb2" + "movt%?\t%0, %L1" + [(set_attr "predicable" "yes") +- (set_attr "length" "4")] ++ (set_attr "predicable_short_it" "no") ++ (set_attr "length" "4") ++ (set_attr "type" "mov_imm")] + ) + + (define_insn "*arm_rev" +@@ -11419,7 +12451,8 @@ + rev%?\t%0, %1 + rev%?\t%0, %1" + [(set_attr "arch" "t1,t2,32") +- (set_attr "length" "2,2,4")] ++ (set_attr "length" "2,2,4") ++ (set_attr "type" "rev")] + ) + + (define_expand "arm_legacy_rev" +@@ -11519,7 +12552,8 @@ + revsh%?\t%0, %1 + revsh%?\t%0, %1" + [(set_attr "arch" "t1,t2,32") +- (set_attr "length" "2,2,4")] ++ (set_attr "length" "2,2,4") ++ (set_attr "type" "rev")] + ) + + (define_insn "*arm_rev16" +@@ -11531,7 +12565,8 @@ + rev16%?\t%0, %1 + rev16%?\t%0, %1" + [(set_attr "arch" "t1,t2,32") +- (set_attr "length" "2,2,4")] ++ (set_attr "length" "2,2,4") ++ (set_attr "type" "rev")] + ) + + (define_expand "bswaphi2" +@@ -11558,7 +12593,8 @@ + false, true))" + "ldrd%?\t%0, %3, [%1, %2]" + [(set_attr "type" "load2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb2_ldrd_base" + [(set (match_operand:SI 0 "s_register_operand" "=r") +@@ -11572,7 +12608,8 @@ + operands[1], 0, false, true))" + "ldrd%?\t%0, %2, [%1]" + [(set_attr "type" "load2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb2_ldrd_base_neg" + [(set (match_operand:SI 0 "s_register_operand" "=r") +@@ -11586,7 +12623,8 @@ + operands[1], -4, false, true))" + "ldrd%?\t%0, %2, [%1, #-4]" + [(set_attr "type" "load2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb2_strd" + [(set (mem:SI (plus:SI (match_operand:SI 0 "s_register_operand" "rk") +@@ -11603,7 +12641,8 @@ + false, false))" + "strd%?\t%2, %4, [%0, %1]" + [(set_attr "type" "store2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb2_strd_base" + [(set (mem:SI (match_operand:SI 0 "s_register_operand" "rk")) +@@ -11617,7 +12656,8 @@ + operands[0], 0, false, false))" + "strd%?\t%1, %2, [%0]" + [(set_attr "type" "store2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + + (define_insn "*thumb2_strd_base_neg" + [(set (mem:SI (plus:SI (match_operand:SI 0 "s_register_operand" "rk") +@@ -11631,9 +12671,24 @@ + operands[0], -4, false, false))" + "strd%?\t%1, %2, [%0, #-4]" + [(set_attr "type" "store2") +- (set_attr "predicable" "yes")]) ++ (set_attr "predicable" "yes") ++ (set_attr "predicable_short_it" "no")]) + ++;; ARMv8 CRC32 instructions. ++(define_insn "" ++ [(set (match_operand:SI 0 "s_register_operand" "=r") ++ (unspec:SI [(match_operand:SI 1 "s_register_operand" "r") ++ (match_operand: 2 "s_register_operand" "r")] ++ CRC))] ++ "TARGET_CRC32" ++ "\\t%0, %1, %2" ++ [(set_attr "type" "crc") ++ (set_attr "conds" "unconditional")] ++) + ++;; Load the load/store double peephole optimizations. ++(include "ldrdstrd.md") ++ + ;; Load the load/store multiple patterns + (include "ldmstm.md") + +@@ -11667,6 +12722,8 @@ + (include "thumb2.md") + ;; Neon patterns + (include "neon.md") ++;; Crypto patterns ++(include "crypto.md") + ;; Synchronization Primitives + (include "sync.md") + ;; Fixed-point patterns +--- a/src/gcc/config/arm/fmp626.md ++++ b/src/gcc/config/arm/fmp626.md +@@ -63,12 +63,21 @@ + ;; ALU operations + (define_insn_reservation "mp626_alu_op" 1 + (and (eq_attr "tune" "fmp626") +- (eq_attr "type" "alu_reg,simple_alu_imm")) ++ (eq_attr "type" "alu_imm,alus_imm,alu_reg,alus_reg,\ ++ logic_imm,logics_imm,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,\ ++ mov_imm,mov_reg,mvn_imm,mvn_reg")) + "fmp626_core") + + (define_insn_reservation "mp626_alu_shift_op" 2 + (and (eq_attr "tune" "fmp626") +- (eq_attr "type" "simple_alu_shift,alu_shift,alu_shift_reg")) ++ (eq_attr "type" "alu_shift_imm,logic_shift_imm,alus_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,logic_shift_reg,alus_shift_reg,logics_shift_reg,\ ++ extend,\ ++ mov_shift,mov_shift_reg,\ ++ mvn_shift,mvn_shift_reg")) + "fmp626_core") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -77,22 +86,22 @@ + + (define_insn_reservation "mp626_mult1" 2 + (and (eq_attr "tune" "fmp626") +- (eq_attr "insn" "smulwy,smlawy,smulxy,smlaxy")) ++ (eq_attr "type" "smulwy,smlawy,smulxy,smlaxy")) + "fmp626_core") + + (define_insn_reservation "mp626_mult2" 2 + (and (eq_attr "tune" "fmp626") +- (eq_attr "insn" "mul,mla")) ++ (eq_attr "type" "mul,mla")) + "fmp626_core") + + (define_insn_reservation "mp626_mult3" 3 + (and (eq_attr "tune" "fmp626") +- (eq_attr "insn" "muls,mlas,smull,smlal,umull,umlal,smlalxy,smlawx")) ++ (eq_attr "type" "muls,mlas,smull,smlal,umull,umlal,smlalxy,smlawx")) + "fmp626_core*2") + + (define_insn_reservation "mp626_mult4" 4 + (and (eq_attr "tune" "fmp626") +- (eq_attr "insn" "smulls,smlals,umulls,umlals")) ++ (eq_attr "type" "smulls,smlals,umulls,umlals")) + "fmp626_core*3") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +--- a/src/gcc/config/arm/crypto.md ++++ b/src/gcc/config/arm/crypto.md +@@ -0,0 +1,86 @@ ++;; ARMv8-A crypto patterns. ++;; Copyright (C) 2013-2014 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++ ++;; This file is part of GCC. ++ ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published ++;; by the Free Software Foundation; either version 3, or (at your ++;; option) any later version. ++ ++;; GCC is distributed in the hope that it will be useful, but WITHOUT ++;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++;; License for more details. ++ ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_insn "crypto_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand: 1 ++ "register_operand" "w")] ++ CRYPTO_UNARY))] ++ "TARGET_CRYPTO" ++ ".\\t%q0, %q1" ++ [(set_attr "type" "")] ++) ++ ++(define_insn "crypto_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand: 1 "register_operand" "0") ++ (match_operand: 2 "register_operand" "w")] ++ CRYPTO_BINARY))] ++ "TARGET_CRYPTO" ++ ".\\t%q0, %q2" ++ [(set_attr "type" "")] ++) ++ ++(define_insn "crypto_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand: 1 "register_operand" "0") ++ (match_operand: 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "w")] ++ CRYPTO_TERNARY))] ++ "TARGET_CRYPTO" ++ ".\\t%q0, %q2, %q3" ++ [(set_attr "type" "")] ++) ++ ++(define_insn "crypto_sha1h" ++ [(set (match_operand:V4SI 0 "register_operand" "=w") ++ (zero_extend:V4SI ++ (unspec:SI [(vec_select:SI ++ (match_operand:V4SI 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")]))] ++ UNSPEC_SHA1H)))] ++ "TARGET_CRYPTO" ++ "sha1h.32\\t%q0, %q1" ++ [(set_attr "type" "crypto_sha1_fast")] ++) ++ ++(define_insn "crypto_vmullp64" ++ [(set (match_operand:TI 0 "register_operand" "=w") ++ (unspec:TI [(match_operand:DI 1 "register_operand" "w") ++ (match_operand:DI 2 "register_operand" "w")] ++ UNSPEC_VMULLP64))] ++ "TARGET_CRYPTO" ++ "vmull.p64\\t%q0, %P1, %P2" ++ [(set_attr "type" "neon_mul_d_long")] ++) ++ ++(define_insn "crypto_" ++ [(set (match_operand:V4SI 0 "register_operand" "=w") ++ (unspec: ++ [(match_operand: 1 "register_operand" "0") ++ (vec_select:SI ++ (match_operand: 2 "register_operand" "w") ++ (parallel [(match_operand:SI 4 "immediate_operand" "i")])) ++ (match_operand: 3 "register_operand" "w")] ++ CRYPTO_SELECTING))] ++ "TARGET_CRYPTO" ++ ".\\t%q0, %q2, %q3" ++ [(set_attr "type" "")] ++) +--- a/src/gcc/config/arm/fa526.md ++++ b/src/gcc/config/arm/fa526.md +@@ -62,12 +62,24 @@ + ;; ALU operations + (define_insn_reservation "526_alu_op" 1 + (and (eq_attr "tune" "fa526") +- (eq_attr "type" "alu_reg,simple_alu_imm")) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,\ ++ mov_imm,mov_reg,mvn_imm,mvn_reg,\ ++ mrs,multiple,no_insn")) + "fa526_core") + + (define_insn_reservation "526_alu_shift_op" 2 + (and (eq_attr "tune" "fa526") +- (eq_attr "type" "simple_alu_shift,alu_shift,alu_shift_reg")) ++ (eq_attr "type" "extend,\ ++ alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_shift,mov_shift_reg,\ ++ mvn_shift,mvn_shift_reg")) + "fa526_core") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -76,12 +88,12 @@ + + (define_insn_reservation "526_mult1" 2 + (and (eq_attr "tune" "fa526") +- (eq_attr "insn" "smlalxy,smulxy,smlaxy,smlalxy")) ++ (eq_attr "type" "smlalxy,smulxy,smlaxy,smlalxy")) + "fa526_core") + + (define_insn_reservation "526_mult2" 5 + (and (eq_attr "tune" "fa526") +- (eq_attr "insn" "mul,mla,muls,mlas,umull,umlal,smull,smlal,umulls,\ ++ (eq_attr "type" "mul,mla,muls,mlas,umull,umlal,smull,smlal,umulls,\ + umlals,smulls,smlals,smlawx")) + "fa526_core*4") + +--- a/src/gcc/config/arm/arm-generic.md ++++ b/src/gcc/config/arm/arm-generic.md +@@ -114,7 +114,9 @@ + + (define_insn_reservation "mult" 16 + (and (eq_attr "generic_sched" "yes") +- (and (eq_attr "ldsched" "no") (eq_attr "type" "mult"))) ++ (and (eq_attr "ldsched" "no") ++ (ior (eq_attr "mul32" "yes") ++ (eq_attr "mul64" "yes")))) + "core*16") + + (define_insn_reservation "mult_ldsched_strongarm" 3 +@@ -122,7 +124,8 @@ + (and (eq_attr "ldsched" "yes") + (and (eq_attr "tune" + "strongarm,strongarm110,strongarm1100,strongarm1110") +- (eq_attr "type" "mult")))) ++ (ior (eq_attr "mul32" "yes") ++ (eq_attr "mul64" "yes"))))) + "core*2") + + (define_insn_reservation "mult_ldsched" 4 +@@ -130,13 +133,17 @@ + (and (eq_attr "ldsched" "yes") + (and (eq_attr "tune" + "!strongarm,strongarm110,strongarm1100,strongarm1110") +- (eq_attr "type" "mult")))) ++ (ior (eq_attr "mul32" "yes") ++ (eq_attr "mul64" "yes"))))) + "core*4") + + (define_insn_reservation "multi_cycle" 32 + (and (eq_attr "generic_sched" "yes") + (and (eq_attr "core_cycles" "multi") +- (eq_attr "type" "!mult,load_byte,load1,load2,load3,load4,store1,store2,store3,store4"))) ++ (and (eq_attr "type" "!load_byte,load1,load2,load3,load4,\ ++ store1,store2,store3,store4") ++ (not (ior (eq_attr "mul32" "yes") ++ (eq_attr "mul64" "yes")))))) + "core*32") + + (define_insn_reservation "single_cycle" 1 +--- a/src/gcc/config/arm/vfp11.md ++++ b/src/gcc/config/arm/vfp11.md +@@ -51,12 +51,13 @@ + + (define_insn_reservation "vfp_ffarith" 4 + (and (eq_attr "generic_vfp" "yes") +- (eq_attr "type" "fcpys,ffariths,ffarithd,fcmps,fcmpd")) ++ (eq_attr "type" "fmov,ffariths,ffarithd,fcmps,fcmpd")) + "fmac") + + (define_insn_reservation "vfp_farith" 8 + (and (eq_attr "generic_vfp" "yes") +- (eq_attr "type" "fadds,faddd,fconsts,fconstd,f_cvt,fmuls,fmacs,ffmas")) ++ (eq_attr "type" "fadds,faddd,fconsts,fconstd,f_cvt,f_cvtf2i,f_cvti2f,\ ++ fmuls,fmacs,ffmas")) + "fmac") + + (define_insn_reservation "vfp_fmul" 9 +@@ -66,23 +67,23 @@ + + (define_insn_reservation "vfp_fdivs" 19 + (and (eq_attr "generic_vfp" "yes") +- (eq_attr "type" "fdivs")) ++ (eq_attr "type" "fdivs, fsqrts")) + "ds*15") + + (define_insn_reservation "vfp_fdivd" 33 + (and (eq_attr "generic_vfp" "yes") +- (eq_attr "type" "fdivd")) ++ (eq_attr "type" "fdivd, fsqrtd")) + "fmac+ds*29") + + ;; Moves to/from arm regs also use the load/store pipeline. + (define_insn_reservation "vfp_fload" 4 + (and (eq_attr "generic_vfp" "yes") +- (eq_attr "type" "f_loads,f_loadd,r_2_f")) ++ (eq_attr "type" "f_loads,f_loadd,f_mcr,f_mcrr")) + "vfp_ls") + + (define_insn_reservation "vfp_fstore" 4 + (and (eq_attr "generic_vfp" "yes") +- (eq_attr "type" "f_stores,f_stored,f_2_r")) ++ (eq_attr "type" "f_stores,f_stored,f_mrc,f_mrrc")) + "vfp_ls") + + (define_insn_reservation "vfp_to_cpsr" 4 +--- a/src/gcc/config/arm/neon-docgen.ml ++++ b/src/gcc/config/arm/neon-docgen.ml +@@ -329,6 +329,85 @@ + "@c This file is generated automatically using gcc/config/arm/neon-docgen.ml"; + "@c Please do not edit manually."] + ++let crypto_doc = ++" ++@itemize @bullet ++@item poly128_t vldrq_p128(poly128_t const *) ++@end itemize ++ ++@itemize @bullet ++@item void vstrq_p128(poly128_t *, poly128_t) ++@end itemize ++ ++@itemize @bullet ++@item uint64x1_t vceq_p64 (poly64x1_t, poly64x1_t) ++@end itemize ++ ++@itemize @bullet ++@item uint64x1_t vtst_p64 (poly64x1_t, poly64x1_t) ++@end itemize ++ ++@itemize @bullet ++@item uint32_t vsha1h_u32 (uint32_t) ++@*@emph{Form of expected instruction(s):} @code{sha1h.32 @var{q0}, @var{q1}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha1cq_u32 (uint32x4_t, uint32_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha1c.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha1pq_u32 (uint32x4_t, uint32_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha1p.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha1mq_u32 (uint32x4_t, uint32_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha1m.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha1su0q_u32 (uint32x4_t, uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha1su0.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha1su1q_u32 (uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha1su1.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha256hq_u32 (uint32x4_t, uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha256h.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha256h2q_u32 (uint32x4_t, uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha256h2.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha256su0q_u32 (uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha256su0.32 @var{q0}, @var{q1}} ++@end itemize ++ ++@itemize @bullet ++@item uint32x4_t vsha256su1q_u32 (uint32x4_t, uint32x4_t, uint32x4_t) ++@*@emph{Form of expected instruction(s):} @code{sha256su1.32 @var{q0}, @var{q1}, @var{q2}} ++@end itemize ++ ++@itemize @bullet ++@item poly128_t vmull_p64 (poly64_t a, poly64_t b) ++@*@emph{Form of expected instruction(s):} @code{vmull.p64 @var{q0}, @var{d1}, @var{d2}} ++@end itemize ++ ++@itemize @bullet ++@item poly128_t vmull_high_p64 (poly64x2_t a, poly64x2_t b) ++@*@emph{Form of expected instruction(s):} @code{vmull.p64 @var{q0}, @var{d1}, @var{d2}} ++@end itemize ++" ++ + (* Program entry point. *) + let _ = + if Array.length Sys.argv <> 2 then +@@ -339,6 +418,7 @@ + let chan = open_out file in + gnu_header chan; + List.iter (document_group chan) intrinsic_groups; ++ Printf.fprintf chan "%s\n" crypto_doc; + close_out chan + with Sys_error sys -> + failwith ("Could not create output file " ^ file ^ ": " ^ sys) +--- a/src/gcc/config/arm/iwmmxt2.md ++++ b/src/gcc/config/arm/iwmmxt2.md +@@ -24,7 +24,7 @@ + "TARGET_REALLY_IWMMXT" + "wabs%?\\t%0, %1" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wabs")] ++ (set_attr "type" "wmmx_wabs")] + ) + + (define_insn "iwmmxt_wabsdiffb" +@@ -37,7 +37,7 @@ + "TARGET_REALLY_IWMMXT" + "wabsdiffb%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wabsdiff")] ++ (set_attr "type" "wmmx_wabsdiff")] + ) + + (define_insn "iwmmxt_wabsdiffh" +@@ -50,7 +50,7 @@ + "TARGET_REALLY_IWMMXT" + "wabsdiffh%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wabsdiff")] ++ (set_attr "type" "wmmx_wabsdiff")] + ) + + (define_insn "iwmmxt_wabsdiffw" +@@ -63,7 +63,7 @@ + "TARGET_REALLY_IWMMXT" + "wabsdiffw%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wabsdiff")] ++ (set_attr "type" "wmmx_wabsdiff")] + ) + + (define_insn "iwmmxt_waddsubhx" +@@ -81,7 +81,7 @@ + "TARGET_REALLY_IWMMXT" + "waddsubhx%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "waddsubhx")] ++ (set_attr "type" "wmmx_waddsubhx")] + ) + + (define_insn "iwmmxt_wsubaddhx" +@@ -99,7 +99,7 @@ + "TARGET_REALLY_IWMMXT" + "wsubaddhx%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wsubaddhx")] ++ (set_attr "type" "wmmx_wsubaddhx")] + ) + + (define_insn "addc3" +@@ -111,7 +111,7 @@ + "TARGET_REALLY_IWMMXT" + "waddc%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wadd")] ++ (set_attr "type" "wmmx_wadd")] + ) + + (define_insn "iwmmxt_avg4" +@@ -143,7 +143,7 @@ + "TARGET_REALLY_IWMMXT" + "wavg4%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wavg4")] ++ (set_attr "type" "wmmx_wavg4")] + ) + + (define_insn "iwmmxt_avg4r" +@@ -175,7 +175,7 @@ + "TARGET_REALLY_IWMMXT" + "wavg4r%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wavg4")] ++ (set_attr "type" "wmmx_wavg4")] + ) + + (define_insn "iwmmxt_wmaddsx" +@@ -194,7 +194,7 @@ + "TARGET_REALLY_IWMMXT" + "wmaddsx%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmadd")] ++ (set_attr "type" "wmmx_wmadd")] + ) + + (define_insn "iwmmxt_wmaddux" +@@ -213,7 +213,7 @@ + "TARGET_REALLY_IWMMXT" + "wmaddux%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmadd")] ++ (set_attr "type" "wmmx_wmadd")] + ) + + (define_insn "iwmmxt_wmaddsn" +@@ -232,7 +232,7 @@ + "TARGET_REALLY_IWMMXT" + "wmaddsn%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmadd")] ++ (set_attr "type" "wmmx_wmadd")] + ) + + (define_insn "iwmmxt_wmaddun" +@@ -251,7 +251,7 @@ + "TARGET_REALLY_IWMMXT" + "wmaddun%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmadd")] ++ (set_attr "type" "wmmx_wmadd")] + ) + + (define_insn "iwmmxt_wmulwsm" +@@ -265,7 +265,7 @@ + "TARGET_REALLY_IWMMXT" + "wmulwsm%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmulw")] ++ (set_attr "type" "wmmx_wmulw")] + ) + + (define_insn "iwmmxt_wmulwum" +@@ -279,7 +279,7 @@ + "TARGET_REALLY_IWMMXT" + "wmulwum%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmulw")] ++ (set_attr "type" "wmmx_wmulw")] + ) + + (define_insn "iwmmxt_wmulsmr" +@@ -297,7 +297,7 @@ + "TARGET_REALLY_IWMMXT" + "wmulsmr%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmul")] ++ (set_attr "type" "wmmx_wmul")] + ) + + (define_insn "iwmmxt_wmulumr" +@@ -316,7 +316,7 @@ + "TARGET_REALLY_IWMMXT" + "wmulumr%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmul")] ++ (set_attr "type" "wmmx_wmul")] + ) + + (define_insn "iwmmxt_wmulwsmr" +@@ -333,7 +333,7 @@ + "TARGET_REALLY_IWMMXT" + "wmulwsmr%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmul")] ++ (set_attr "type" "wmmx_wmul")] + ) + + (define_insn "iwmmxt_wmulwumr" +@@ -350,7 +350,7 @@ + "TARGET_REALLY_IWMMXT" + "wmulwumr%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmulw")] ++ (set_attr "type" "wmmx_wmulw")] + ) + + (define_insn "iwmmxt_wmulwl" +@@ -361,7 +361,7 @@ + "TARGET_REALLY_IWMMXT" + "wmulwl%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmulw")] ++ (set_attr "type" "wmmx_wmulw")] + ) + + (define_insn "iwmmxt_wqmulm" +@@ -371,7 +371,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmulm%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmulm")] ++ (set_attr "type" "wmmx_wqmulm")] + ) + + (define_insn "iwmmxt_wqmulwm" +@@ -381,7 +381,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmulwm%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmulwm")] ++ (set_attr "type" "wmmx_wqmulwm")] + ) + + (define_insn "iwmmxt_wqmulmr" +@@ -391,7 +391,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmulmr%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmulm")] ++ (set_attr "type" "wmmx_wqmulm")] + ) + + (define_insn "iwmmxt_wqmulwmr" +@@ -401,7 +401,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmulwmr%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmulwm")] ++ (set_attr "type" "wmmx_wqmulwm")] + ) + + (define_insn "iwmmxt_waddbhusm" +@@ -417,7 +417,7 @@ + "TARGET_REALLY_IWMMXT" + "waddbhusm%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "waddbhus")] ++ (set_attr "type" "wmmx_waddbhus")] + ) + + (define_insn "iwmmxt_waddbhusl" +@@ -433,7 +433,7 @@ + "TARGET_REALLY_IWMMXT" + "waddbhusl%?\\t%0, %1, %2" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "waddbhus")] ++ (set_attr "type" "wmmx_waddbhus")] + ) + + (define_insn "iwmmxt_wqmiabb" +@@ -446,7 +446,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmiabb%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmiaxy")] ++ (set_attr "type" "wmmx_wqmiaxy")] + ) + + (define_insn "iwmmxt_wqmiabt" +@@ -459,7 +459,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmiabt%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmiaxy")] ++ (set_attr "type" "wmmx_wqmiaxy")] + ) + + (define_insn "iwmmxt_wqmiatb" +@@ -472,7 +472,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmiatb%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmiaxy")] ++ (set_attr "type" "wmmx_wqmiaxy")] + ) + + (define_insn "iwmmxt_wqmiatt" +@@ -485,7 +485,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmiatt%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmiaxy")] ++ (set_attr "type" "wmmx_wqmiaxy")] + ) + + (define_insn "iwmmxt_wqmiabbn" +@@ -498,7 +498,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmiabbn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmiaxy")] ++ (set_attr "type" "wmmx_wqmiaxy")] + ) + + (define_insn "iwmmxt_wqmiabtn" +@@ -511,7 +511,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmiabtn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmiaxy")] ++ (set_attr "type" "wmmx_wqmiaxy")] + ) + + (define_insn "iwmmxt_wqmiatbn" +@@ -524,7 +524,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmiatbn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmiaxy")] ++ (set_attr "type" "wmmx_wqmiaxy")] + ) + + (define_insn "iwmmxt_wqmiattn" +@@ -537,7 +537,7 @@ + "TARGET_REALLY_IWMMXT" + "wqmiattn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wqmiaxy")] ++ (set_attr "type" "wmmx_wqmiaxy")] + ) + + (define_insn "iwmmxt_wmiabb" +@@ -561,7 +561,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiabb%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiaxy")] ++ (set_attr "type" "wmmx_wmiaxy")] + ) + + (define_insn "iwmmxt_wmiabt" +@@ -585,7 +585,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiabt%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiaxy")] ++ (set_attr "type" "wmmx_wmiaxy")] + ) + + (define_insn "iwmmxt_wmiatb" +@@ -609,7 +609,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiatb%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiaxy")] ++ (set_attr "type" "wmmx_wmiaxy")] + ) + + (define_insn "iwmmxt_wmiatt" +@@ -633,7 +633,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiatt%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiaxy")] ++ (set_attr "type" "wmmx_wmiaxy")] + ) + + (define_insn "iwmmxt_wmiabbn" +@@ -657,7 +657,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiabbn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiaxy")] ++ (set_attr "type" "wmmx_wmiaxy")] + ) + + (define_insn "iwmmxt_wmiabtn" +@@ -681,7 +681,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiabtn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiaxy")] ++ (set_attr "type" "wmmx_wmiaxy")] + ) + + (define_insn "iwmmxt_wmiatbn" +@@ -705,7 +705,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiatbn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiaxy")] ++ (set_attr "type" "wmmx_wmiaxy")] + ) + + (define_insn "iwmmxt_wmiattn" +@@ -729,7 +729,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiattn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiaxy")] ++ (set_attr "type" "wmmx_wmiaxy")] + ) + + (define_insn "iwmmxt_wmiawbb" +@@ -742,7 +742,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiawbb%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiawxy")] ++ (set_attr "type" "wmmx_wmiawxy")] + ) + + (define_insn "iwmmxt_wmiawbt" +@@ -755,7 +755,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiawbt%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiawxy")] ++ (set_attr "type" "wmmx_wmiawxy")] + ) + + (define_insn "iwmmxt_wmiawtb" +@@ -768,7 +768,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiawtb%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiawxy")] ++ (set_attr "type" "wmmx_wmiawxy")] + ) + + (define_insn "iwmmxt_wmiawtt" +@@ -781,7 +781,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiawtt%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiawxy")] ++ (set_attr "type" "wmmx_wmiawxy")] + ) + + (define_insn "iwmmxt_wmiawbbn" +@@ -794,7 +794,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiawbbn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiawxy")] ++ (set_attr "type" "wmmx_wmiawxy")] + ) + + (define_insn "iwmmxt_wmiawbtn" +@@ -807,7 +807,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiawbtn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiawxy")] ++ (set_attr "type" "wmmx_wmiawxy")] + ) + + (define_insn "iwmmxt_wmiawtbn" +@@ -820,7 +820,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiawtbn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiawxy")] ++ (set_attr "type" "wmmx_wmiawxy")] + ) + + (define_insn "iwmmxt_wmiawttn" +@@ -833,7 +833,7 @@ + "TARGET_REALLY_IWMMXT" + "wmiawttn%?\\t%0, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmiawxy")] ++ (set_attr "type" "wmmx_wmiawxy")] + ) + + (define_insn "iwmmxt_wmerge" +@@ -858,7 +858,7 @@ + "TARGET_REALLY_IWMMXT" + "wmerge%?\\t%0, %1, %2, %3" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "wmerge")] ++ (set_attr "type" "wmmx_wmerge")] + ) + + (define_insn "iwmmxt_tandc3" +@@ -868,7 +868,7 @@ + "TARGET_REALLY_IWMMXT" + "tandc%?\\t r15" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "tandc")] ++ (set_attr "type" "wmmx_tandc")] + ) + + (define_insn "iwmmxt_torc3" +@@ -878,7 +878,7 @@ + "TARGET_REALLY_IWMMXT" + "torc%?\\t r15" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "torc")] ++ (set_attr "type" "wmmx_torc")] + ) + + (define_insn "iwmmxt_torvsc3" +@@ -888,7 +888,7 @@ + "TARGET_REALLY_IWMMXT" + "torvsc%?\\t r15" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "torvsc")] ++ (set_attr "type" "wmmx_torvsc")] + ) + + (define_insn "iwmmxt_textrc3" +@@ -899,5 +899,5 @@ + "TARGET_REALLY_IWMMXT" + "textrc%?\\t r15, %0" + [(set_attr "predicable" "yes") +- (set_attr "wtype" "textrc")] ++ (set_attr "type" "wmmx_textrc")] + ) +--- a/src/gcc/config/arm/cortex-a5.md ++++ b/src/gcc/config/arm/cortex-a5.md +@@ -58,12 +58,24 @@ + + (define_insn_reservation "cortex_a5_alu" 2 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "alu_reg,simple_alu_imm")) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,\ ++ mov_imm,mov_reg,mvn_imm,mvn_reg,\ ++ mrs,multiple,no_insn")) + "cortex_a5_ex1") + + (define_insn_reservation "cortex_a5_alu_shift" 2 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "simple_alu_shift,alu_shift,alu_shift_reg")) ++ (eq_attr "type" "extend,\ ++ alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_shift,mov_shift_reg,\ ++ mvn_shift,mvn_shift_reg")) + "cortex_a5_ex1") + + ;; Forwarding path for unshifted operands. +@@ -80,7 +92,8 @@ + + (define_insn_reservation "cortex_a5_mul" 2 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "mult")) ++ (ior (eq_attr "mul32" "yes") ++ (eq_attr "mul64" "yes"))) + "cortex_a5_ex1") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -155,7 +168,8 @@ + + (define_insn_reservation "cortex_a5_fpalu" 4 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fcpys, fmuls, f_cvt,\ ++ (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fmov, fmuls,\ ++ f_cvt,f_cvtf2i,f_cvti2f,\ + fcmps, fcmpd")) + "cortex_a5_ex1+cortex_a5_fpadd_pipe") + +@@ -219,7 +233,7 @@ + + (define_insn_reservation "cortex_a5_fdivs" 14 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "fdivs")) ++ (eq_attr "type" "fdivs, fsqrts")) + "cortex_a5_ex1, cortex_a5_fp_div_sqrt * 13") + + ;; ??? Similarly for fdivd. +@@ -226,7 +240,7 @@ + + (define_insn_reservation "cortex_a5_fdivd" 29 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "fdivd")) ++ (eq_attr "type" "fdivd, fsqrtd")) + "cortex_a5_ex1, cortex_a5_fp_div_sqrt * 28") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -239,12 +253,12 @@ + + (define_insn_reservation "cortex_a5_r2f" 4 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "r_2_f")) ++ (eq_attr "type" "f_mcr,f_mcrr")) + "cortex_a5_ex1") + + (define_insn_reservation "cortex_a5_f2r" 2 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "f_2_r")) ++ (eq_attr "type" "f_mrc,f_mrrc")) + "cortex_a5_ex1") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +--- a/src/gcc/config/arm/cortex-m4-fpu.md ++++ b/src/gcc/config/arm/cortex-m4-fpu.md +@@ -26,17 +26,17 @@ + ;; Integer instructions following VDIV or VSQRT complete out-of-order. + (define_insn_reservation "cortex_m4_fdivs" 15 + (and (eq_attr "tune" "cortexm4") +- (eq_attr "type" "fdivs")) ++ (eq_attr "type" "fdivs, fsqrts")) + "cortex_m4_ex_v,cortex_m4_v*13") + + (define_insn_reservation "cortex_m4_vmov_1" 1 + (and (eq_attr "tune" "cortexm4") +- (eq_attr "type" "fcpys,fconsts")) ++ (eq_attr "type" "fmov,fconsts")) + "cortex_m4_ex_v") + + (define_insn_reservation "cortex_m4_vmov_2" 2 + (and (eq_attr "tune" "cortexm4") +- (eq_attr "type" "f_2_r,r_2_f")) ++ (eq_attr "type" "f_mrc,f_mrrc,f_mcr,f_mcrr")) + "cortex_m4_ex_v*2") + + (define_insn_reservation "cortex_m4_fmuls" 2 +@@ -71,7 +71,7 @@ + + (define_insn_reservation "cortex_m4_f_cvt" 2 + (and (eq_attr "tune" "cortexm4") +- (eq_attr "type" "f_cvt")) ++ (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f")) + "cortex_m4_ex_v") + + (define_insn_reservation "cortex_m4_f_load" 2 +--- a/src/gcc/config/arm/fa606te.md ++++ b/src/gcc/config/arm/fa606te.md +@@ -62,7 +62,18 @@ + ;; ALU operations + (define_insn_reservation "606te_alu_op" 1 + (and (eq_attr "tune" "fa606te") +- (eq_attr "type" "alu_reg,simple_alu_imm,simple_alu_shift,alu_shift,alu_shift_reg")) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,extend,\ ++ alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_imm,mov_reg,mov_shift,mov_shift_reg,\ ++ mvn_imm,mvn_reg,mvn_shift,mvn_shift_reg,\ ++ mrs,multiple,no_insn")) + "fa606te_core") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -71,22 +82,22 @@ + + (define_insn_reservation "606te_mult1" 2 + (and (eq_attr "tune" "fa606te") +- (eq_attr "insn" "smlalxy")) ++ (eq_attr "type" "smlalxy")) + "fa606te_core") + + (define_insn_reservation "606te_mult2" 3 + (and (eq_attr "tune" "fa606te") +- (eq_attr "insn" "smlaxy,smulxy,smulwy,smlawy")) ++ (eq_attr "type" "smlaxy,smulxy,smulwy,smlawy")) + "fa606te_core*2") + + (define_insn_reservation "606te_mult3" 4 + (and (eq_attr "tune" "fa606te") +- (eq_attr "insn" "mul,mla,muls,mlas")) ++ (eq_attr "type" "mul,mla,muls,mlas")) + "fa606te_core*3") + + (define_insn_reservation "606te_mult4" 5 + (and (eq_attr "tune" "fa606te") +- (eq_attr "insn" "umull,umlal,smull,smlal,umulls,umlals,smulls,smlals")) ++ (eq_attr "type" "umull,umlal,smull,smlal,umulls,umlals,smulls,smlals")) + "fa606te_core*4") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +--- a/src/gcc/config/arm/cortex-a9.md ++++ b/src/gcc/config/arm/cortex-a9.md +@@ -80,18 +80,24 @@ + ;; which can go down E2 without any problem. + (define_insn_reservation "cortex_a9_dp" 2 + (and (eq_attr "tune" "cortexa9") +- (ior (and (eq_attr "type" "alu_reg,simple_alu_imm") +- (eq_attr "neon_type" "none")) +- (and (and (eq_attr "type" "alu_shift_reg, simple_alu_shift,alu_shift") +- (eq_attr "insn" "mov")) +- (eq_attr "neon_type" "none")))) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,\ ++ mov_imm,mov_reg,mvn_imm,mvn_reg,\ ++ mov_shift_reg,mov_shift,\ ++ mrs,multiple,no_insn")) + "cortex_a9_p0_default|cortex_a9_p1_default") + + ;; An instruction using the shifter will go down E1. + (define_insn_reservation "cortex_a9_dp_shift" 3 + (and (eq_attr "tune" "cortexa9") +- (and (eq_attr "type" "alu_shift_reg, simple_alu_shift,alu_shift") +- (not (eq_attr "insn" "mov")))) ++ (eq_attr "type" "alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ extend,mvn_shift,mvn_shift_reg")) + "cortex_a9_p0_shift | cortex_a9_p1_shift") + + ;; Loads have a latency of 4 cycles. +@@ -130,7 +136,7 @@ + ;; We get 16*16 multiply / mac results in 3 cycles. + (define_insn_reservation "cortex_a9_mult16" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "insn" "smulxy")) ++ (eq_attr "type" "smulxy")) + "cortex_a9_mult16") + + ;; The 16*16 mac is slightly different that it +@@ -137,22 +143,22 @@ + ;; reserves M1 and M2 in the same cycle. + (define_insn_reservation "cortex_a9_mac16" 3 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "insn" "smlaxy")) ++ (eq_attr "type" "smlaxy")) + "cortex_a9_mac16") + + (define_insn_reservation "cortex_a9_multiply" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "insn" "mul,smmul,smmulr")) ++ (eq_attr "type" "mul,smmul,smmulr")) + "cortex_a9_mult") + + (define_insn_reservation "cortex_a9_mac" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "insn" "mla,smmla")) ++ (eq_attr "type" "mla,smmla")) + "cortex_a9_mac") + + (define_insn_reservation "cortex_a9_multiply_long" 5 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "insn" "smull,umull,smulls,umulls,smlal,smlals,umlal,umlals")) ++ (eq_attr "type" "smull,umull,smulls,umulls,smlal,smlals,umlal,umlals")) + "cortex_a9_mult_long") + + ;; An instruction with a result in E2 can be forwarded +@@ -201,7 +207,7 @@ + ;; Pipelining for VFP instructions. + ;; Issue happens either along load store unit or the VFP / Neon unit. + ;; Pipeline Instruction Classification. +-;; FPS - fcpys, ffariths, ffarithd,r_2_f,f_2_r ++;; FPS - fmov, ffariths, ffarithd,f_mcr,f_mcrr,f_mrc,f_mrrc + ;; FP_ADD - fadds, faddd, fcmps (1) + ;; FPMUL - fmul{s,d}, fmac{s,d}, ffma{s,d} + ;; FPDIV - fdiv{s,d} +@@ -214,7 +220,8 @@ + ;; fmrs, fmrrd, fmstat and fmrx - The data is available after 1 cycle. + (define_insn_reservation "cortex_a9_fps" 2 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "type" "fcpys, fconsts, fconstd, ffariths, ffarithd, r_2_f, f_2_r, f_flag")) ++ (eq_attr "type" "fmov, fconsts, fconstd, ffariths, ffarithd,\ ++ f_mcr, f_mcrr, f_mrc, f_mrrc, f_flag")) + "ca9_issue_vfp_neon + ca9fps") + + (define_bypass 1 +@@ -226,7 +233,7 @@ + + (define_insn_reservation "cortex_a9_fadd" 4 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "type" "fadds, faddd, f_cvt")) ++ (eq_attr "type" "fadds, faddd, f_cvt, f_cvtf2i, f_cvti2f")) + "ca9fp_add") + + (define_insn_reservation "cortex_a9_fcmp" 1 +@@ -264,12 +271,12 @@ + ;; Division pipeline description. + (define_insn_reservation "cortex_a9_fdivs" 15 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "type" "fdivs")) ++ (eq_attr "type" "fdivs, fsqrts")) + "ca9fp_ds1 + ca9_issue_vfp_neon, nothing*14") + + (define_insn_reservation "cortex_a9_fdivd" 25 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "type" "fdivd")) ++ (eq_attr "type" "fdivd, fsqrtd")) + "ca9fp_ds1 + ca9_issue_vfp_neon, nothing*24") + + ;; Include Neon pipeline description +--- a/src/gcc/config/arm/fa626te.md ++++ b/src/gcc/config/arm/fa626te.md +@@ -68,12 +68,24 @@ + ;; ALU operations + (define_insn_reservation "626te_alu_op" 1 + (and (eq_attr "tune" "fa626,fa626te") +- (eq_attr "type" "alu_reg,simple_alu_imm")) ++ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ ++ alu_reg,alus_reg,logic_reg,logics_reg,\ ++ adc_imm,adcs_imm,adc_reg,adcs_reg,\ ++ adr,bfm,rev,\ ++ shift_imm,shift_reg,\ ++ mov_imm,mov_reg,mvn_imm,mvn_reg,\ ++ mrs,multiple,no_insn")) + "fa626te_core") + + (define_insn_reservation "626te_alu_shift_op" 2 + (and (eq_attr "tune" "fa626,fa626te") +- (eq_attr "type" "simple_alu_shift,alu_shift,alu_shift_reg")) ++ (eq_attr "type" "extend,\ ++ alu_shift_imm,alus_shift_imm,\ ++ logic_shift_imm,logics_shift_imm,\ ++ alu_shift_reg,alus_shift_reg,\ ++ logic_shift_reg,logics_shift_reg,\ ++ mov_shift,mov_shift_reg,\ ++ mvn_shift,mvn_shift_reg")) + "fa626te_core") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +@@ -82,22 +94,22 @@ + + (define_insn_reservation "626te_mult1" 2 + (and (eq_attr "tune" "fa626,fa626te") +- (eq_attr "insn" "smulwy,smlawy,smulxy,smlaxy")) ++ (eq_attr "type" "smulwy,smlawy,smulxy,smlaxy")) + "fa626te_core") + + (define_insn_reservation "626te_mult2" 2 + (and (eq_attr "tune" "fa626,fa626te") +- (eq_attr "insn" "mul,mla")) ++ (eq_attr "type" "mul,mla")) + "fa626te_core") + + (define_insn_reservation "626te_mult3" 3 + (and (eq_attr "tune" "fa626,fa626te") +- (eq_attr "insn" "muls,mlas,smull,smlal,umull,umlal,smlalxy,smlawx")) ++ (eq_attr "type" "muls,mlas,smull,smlal,umull,umlal,smlalxy,smlawx")) + "fa626te_core*2") + + (define_insn_reservation "626te_mult4" 4 + (and (eq_attr "tune" "fa626,fa626te") +- (eq_attr "insn" "smulls,smlals,umulls,umlals")) ++ (eq_attr "type" "smulls,smlals,umulls,umlals")) + "fa626te_core*3") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +--- a/src/gcc/config/arm/neon-gen.ml ++++ b/src/gcc/config/arm/neon-gen.ml +@@ -114,6 +114,7 @@ + | T_uint32x4 -> T_int32x4 + | T_uint64x1 -> T_int64x1 + | T_uint64x2 -> T_int64x2 ++ | T_poly64x2 -> T_int64x2 + (* Cast to types defined by mode in arm.c, not random types pulled in from + the header in use. This fixes incompatible pointer errors when + compiling with C++. *) +@@ -121,9 +122,12 @@ + | T_uint16 | T_int16 -> T_intHI + | T_uint32 | T_int32 -> T_intSI + | T_uint64 | T_int64 -> T_intDI ++ | T_float16 -> T_floatHF + | T_float32 -> T_floatSF + | T_poly8 -> T_intQI + | T_poly16 -> T_intHI ++ | T_poly64 -> T_intDI ++ | T_poly128 -> T_intTI + | T_arrayof (n, elt) -> T_arrayof (n, signed_ctype elt) + | T_ptrto elt -> T_ptrto (signed_ctype elt) + | T_const elt -> T_const (signed_ctype elt) +@@ -275,8 +279,8 @@ + let mode = mode_of_elt elttype shape in + string_of_mode mode + with MixedMode (dst, src) -> +- let dstmode = mode_of_elt dst shape +- and srcmode = mode_of_elt src shape in ++ let dstmode = mode_of_elt ~argpos:0 dst shape ++ and srcmode = mode_of_elt ~argpos:1 src shape in + string_of_mode dstmode ^ string_of_mode srcmode + + let get_shuffle features = +@@ -291,19 +295,24 @@ + match List.find (fun feature -> + match feature with Requires_feature _ -> true + | Requires_arch _ -> true ++ | Requires_FP_bit _ -> true + | _ -> false) + features with +- Requires_feature feature -> ++ Requires_feature feature -> + Format.printf "#ifdef __ARM_FEATURE_%s@\n" feature + | Requires_arch arch -> + Format.printf "#if __ARM_ARCH >= %d@\n" arch ++ | Requires_FP_bit bit -> ++ Format.printf "#if ((__ARM_FP & 0x%X) != 0)@\n" ++ (1 lsl bit) + | _ -> assert false + with Not_found -> assert true + + let print_feature_test_end features = + let feature = +- List.exists (function Requires_feature x -> true +- | Requires_arch x -> true ++ List.exists (function Requires_feature _ -> true ++ | Requires_arch _ -> true ++ | Requires_FP_bit _ -> true + | _ -> false) features in + if feature then Format.printf "#endif@\n" + +@@ -356,79 +365,96 @@ + abase : "ARM" base name for the type (i.e. int in int8x8_t). + esize : element size. + enum : element count. ++ alevel: architecture level at which available. + *) + ++type fpulevel = CRYPTO | ALL ++ + let deftypes () = + let typeinfo = [ + (* Doubleword vector types. *) +- "__builtin_neon_qi", "int", 8, 8; +- "__builtin_neon_hi", "int", 16, 4; +- "__builtin_neon_si", "int", 32, 2; +- "__builtin_neon_di", "int", 64, 1; +- "__builtin_neon_sf", "float", 32, 2; +- "__builtin_neon_poly8", "poly", 8, 8; +- "__builtin_neon_poly16", "poly", 16, 4; +- "__builtin_neon_uqi", "uint", 8, 8; +- "__builtin_neon_uhi", "uint", 16, 4; +- "__builtin_neon_usi", "uint", 32, 2; +- "__builtin_neon_udi", "uint", 64, 1; ++ "__builtin_neon_qi", "int", 8, 8, ALL; ++ "__builtin_neon_hi", "int", 16, 4, ALL; ++ "__builtin_neon_si", "int", 32, 2, ALL; ++ "__builtin_neon_di", "int", 64, 1, ALL; ++ "__builtin_neon_hf", "float", 16, 4, ALL; ++ "__builtin_neon_sf", "float", 32, 2, ALL; ++ "__builtin_neon_poly8", "poly", 8, 8, ALL; ++ "__builtin_neon_poly16", "poly", 16, 4, ALL; ++ "__builtin_neon_poly64", "poly", 64, 1, CRYPTO; ++ "__builtin_neon_uqi", "uint", 8, 8, ALL; ++ "__builtin_neon_uhi", "uint", 16, 4, ALL; ++ "__builtin_neon_usi", "uint", 32, 2, ALL; ++ "__builtin_neon_udi", "uint", 64, 1, ALL; + + (* Quadword vector types. *) +- "__builtin_neon_qi", "int", 8, 16; +- "__builtin_neon_hi", "int", 16, 8; +- "__builtin_neon_si", "int", 32, 4; +- "__builtin_neon_di", "int", 64, 2; +- "__builtin_neon_sf", "float", 32, 4; +- "__builtin_neon_poly8", "poly", 8, 16; +- "__builtin_neon_poly16", "poly", 16, 8; +- "__builtin_neon_uqi", "uint", 8, 16; +- "__builtin_neon_uhi", "uint", 16, 8; +- "__builtin_neon_usi", "uint", 32, 4; +- "__builtin_neon_udi", "uint", 64, 2 ++ "__builtin_neon_qi", "int", 8, 16, ALL; ++ "__builtin_neon_hi", "int", 16, 8, ALL; ++ "__builtin_neon_si", "int", 32, 4, ALL; ++ "__builtin_neon_di", "int", 64, 2, ALL; ++ "__builtin_neon_sf", "float", 32, 4, ALL; ++ "__builtin_neon_poly8", "poly", 8, 16, ALL; ++ "__builtin_neon_poly16", "poly", 16, 8, ALL; ++ "__builtin_neon_poly64", "poly", 64, 2, CRYPTO; ++ "__builtin_neon_uqi", "uint", 8, 16, ALL; ++ "__builtin_neon_uhi", "uint", 16, 8, ALL; ++ "__builtin_neon_usi", "uint", 32, 4, ALL; ++ "__builtin_neon_udi", "uint", 64, 2, ALL + ] in + List.iter +- (fun (cbase, abase, esize, enum) -> ++ (fun (cbase, abase, esize, enum, fpulevel) -> + let attr = + match enum with + 1 -> "" + | _ -> Printf.sprintf "\t__attribute__ ((__vector_size__ (%d)))" + (esize * enum / 8) in +- Format.printf "typedef %s %s%dx%d_t%s;@\n" cbase abase esize enum attr) ++ if fpulevel == CRYPTO then ++ Format.printf "#ifdef __ARM_FEATURE_CRYPTO\n"; ++ Format.printf "typedef %s %s%dx%d_t%s;@\n" cbase abase esize enum attr; ++ if fpulevel == CRYPTO then ++ Format.printf "#endif\n";) + typeinfo; + Format.print_newline (); + (* Extra types not in . *) + Format.printf "typedef float float32_t;\n"; + Format.printf "typedef __builtin_neon_poly8 poly8_t;\n"; +- Format.printf "typedef __builtin_neon_poly16 poly16_t;\n" ++ Format.printf "typedef __builtin_neon_poly16 poly16_t;\n"; ++ Format.printf "#ifdef __ARM_FEATURE_CRYPTO\n"; ++ Format.printf "typedef __builtin_neon_poly64 poly64_t;\n"; ++ Format.printf "typedef __builtin_neon_poly128 poly128_t;\n"; ++ Format.printf "#endif\n" + +-(* Output structs containing arrays, for load & store instructions etc. *) ++(* Output structs containing arrays, for load & store instructions etc. ++ poly128_t is deliberately not included here because it has no array types ++ defined for it. *) + + let arrtypes () = + let typeinfo = [ +- "int", 8; "int", 16; +- "int", 32; "int", 64; +- "uint", 8; "uint", 16; +- "uint", 32; "uint", 64; +- "float", 32; "poly", 8; +- "poly", 16 ++ "int", 8, ALL; "int", 16, ALL; ++ "int", 32, ALL; "int", 64, ALL; ++ "uint", 8, ALL; "uint", 16, ALL; ++ "uint", 32, ALL; "uint", 64, ALL; ++ "float", 32, ALL; "poly", 8, ALL; ++ "poly", 16, ALL; "poly", 64, CRYPTO + ] in +- let writestruct elname elsize regsize arrsize = ++ let writestruct elname elsize regsize arrsize fpulevel = + let elnum = regsize / elsize in + let structname = + Printf.sprintf "%s%dx%dx%d_t" elname elsize elnum arrsize in + let sfmt = start_function () in +- Format.printf "typedef struct %s" structname; ++ Format.printf "%stypedef struct %s" ++ (if fpulevel == CRYPTO then "#ifdef __ARM_FEATURE_CRYPTO\n" else "") structname; + open_braceblock sfmt; + Format.printf "%s%dx%d_t val[%d];" elname elsize elnum arrsize; + close_braceblock sfmt; +- Format.printf " %s;" structname; ++ Format.printf " %s;%s" structname (if fpulevel == CRYPTO then "\n#endif\n" else ""); + end_function sfmt; + in + for n = 2 to 4 do + List.iter +- (fun (elname, elsize) -> +- writestruct elname elsize 64 n; +- writestruct elname elsize 128 n) ++ (fun (elname, elsize, alevel) -> ++ writestruct elname elsize 64 n alevel; ++ writestruct elname elsize 128 n alevel) + typeinfo + done + +@@ -484,6 +510,8 @@ + print_ops ops; + Format.print_newline (); + print_ops reinterp; ++ print_ops reinterpq; ++ Format.printf "%s" crypto_intrinsics; + print_lines [ + "#ifdef __cplusplus"; + "}"; +--- a/src/gcc/config/mips/linux-common.h ++++ b/src/gcc/config/mips/linux-common.h +@@ -44,7 +44,7 @@ + #undef LIB_SPEC + #define LIB_SPEC \ + LINUX_OR_ANDROID_LD (GNU_USER_TARGET_LIB_SPEC, \ +- GNU_USER_TARGET_LIB_SPEC " " ANDROID_LIB_SPEC) ++ GNU_USER_TARGET_NO_PTHREADS_LIB_SPEC " " ANDROID_LIB_SPEC) + + #undef STARTFILE_SPEC + #define STARTFILE_SPEC \ +--- a/src/gcc/tree-vect-slp.c ++++ b/src/gcc/tree-vect-slp.c +@@ -2260,7 +2260,7 @@ + } + + /* Cost model: check if the vectorization is worthwhile. */ +- if (flag_vect_cost_model ++ if (!unlimited_cost_model () + && !vect_bb_vectorization_profitable_p (bb_vinfo)) + { + if (dump_enabled_p ()) +--- a/src/gcc/params.def ++++ b/src/gcc/params.def +@@ -544,6 +544,11 @@ + "Bound on number of runtime checks inserted by the vectorizer's loop versioning for alias check", + 10, 0, 0) + ++DEFPARAM(PARAM_VECT_MAX_PEELING_FOR_ALIGNMENT, ++ "vect-max-peeling-for-alignment", ++ "Max number of loop peels to enhancement alignment of data references in a loop", ++ -1, -1, 64) ++ + DEFPARAM(PARAM_MAX_CSELIB_MEMORY_LOCATIONS, + "max-cselib-memory-locations", + "The maximum memory locations recorded by cselib", +--- a/src/libobjc/ChangeLog.linaro ++++ b/src/libobjc/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libgfortran/ChangeLog.linaro ++++ b/src/libgfortran/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libada/ChangeLog.linaro ++++ b/src/libada/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libffi/ChangeLog.linaro ++++ b/src/libffi/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libssp/ChangeLog.linaro ++++ b/src/libssp/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libcpp/configure ++++ b/src/libcpp/configure +@@ -7152,9 +7152,7 @@ + case $target in + aarch64*-*-* | \ + alpha*-*-* | \ +- arm*-*-*eabi* | \ +- arm*-*-rtems* | \ +- arm*-*-symbianelf* | \ ++ arm*-*-* | \ + x86_64-*-* | \ + ia64-*-* | \ + hppa*64*-*-* | \ +--- a/src/libcpp/configure.ac ++++ b/src/libcpp/configure.ac +@@ -184,9 +184,7 @@ + case $target in + aarch64*-*-* | \ + alpha*-*-* | \ +- arm*-*-*eabi* | \ +- arm*-*-rtems* | \ +- arm*-*-symbianelf* | \ ++ arm*-*-* | \ + x86_64-*-* | \ + ia64-*-* | \ + hppa*64*-*-* | \ +--- a/src/libcpp/ChangeLog.linaro ++++ b/src/libcpp/ChangeLog.linaro +@@ -0,0 +1,79 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-09-05 Yvan Roux ++ ++ Backport from trunk r201566. ++ 2013-08-07 Richard Earnshaw ++ ++ * configure.ac: Set need_64bit_hwint for all arm targets. ++ * configure: Regenerated. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/libcpp/po/ChangeLog.linaro ++++ b/src/libcpp/po/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. +--- a/src/fixincludes/ChangeLog.linaro ++++ b/src/fixincludes/ChangeLog.linaro +@@ -0,0 +1,71 @@ ++2015-05-18 Christophe Lyon ++ ++ GCC Linaro 4.8-2015.04 released. ++ ++2015-02-12 Michael Collison ++ ++ GCC Linaro 4.8-2015.02 released. ++ ++2014-11-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.11 released. ++ ++2014-08-14 Yvan Roux ++ ++ GCC Linaro 4.8-2014.08 released. ++ ++2014-04-07 Yvan Roux ++ ++ GCC Linaro 4.8-2014.04 released. ++ ++2014-03-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.03 released. ++ ++2014-02-11 Yvan Roux ++ ++ GCC Linaro 4.8-2014.02 released. ++ ++2014-01-17 Christophe Lyon ++ ++ GCC Linaro 4.8-2014.01 released. ++ ++2013-12-21 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.12 released. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.11 released. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.10 released. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.09 released. ++ ++2013-08-14 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.08 released. ++ ++2013-07-19 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.07-1 released. ++ ++2013-07-05 Christophe Lyon ++ ++ GCC Linaro 4.8-2013.07 released. ++ ++2013-06-11 Rob Savoye ++ ++ GCC Linaro gcc-linaro-4.8-2013.06 released. ++ ++2013-05-14 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.05 released. ++ ++2013-04-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.8-2013.04 released. --- gcc-4.8-4.8.5.orig/debian/patches/gcc-multiarch.diff +++ gcc-4.8-4.8.5/debian/patches/gcc-multiarch.diff @@ -0,0 +1,175 @@ +# DP: - Remaining multiarch patches, not yet submitted upstream. +# DP: - Add MULTIARCH_DIRNAME definitions for multilib configurations, +# DP: which are used for the non-multilib builds. + +2013-06-12 Matthias Klose + + * config/i386/t-linux64: Set MULTIARCH_DIRNAME. + * config/i386/t-kfreebsd: Set MULTIARCH_DIRNAME. + * config.gcc (i[34567]86-*-linux* | x86_64-*-linux*): Prepend + i386/t-linux to $tmake_file. + * config/mips/t-linux64: Set MULTIARCH_DIRNAME. + * config/rs6000/t-linux64: Set MULTIARCH_DIRNAME. + * config/s390/t-linux64: Set MULTIARCH_DIRNAME. + * config/sparc/t-linux64: Set MULTIARCH_DIRNAME. + +Index: b/src/libstdc++-v3/python/hook.in +=================================================================== +--- a/src/libstdc++-v3/python/hook.in ++++ b/src/libstdc++-v3/python/hook.in +@@ -47,14 +47,16 @@ if gdb.current_objfile () is not None: + libdir = libdir[len (prefix):] + + # Compute the ".."s needed to get from libdir to the prefix. +- dotdots = ('..' + os.sep) * len (libdir.split (os.sep)) ++ backdirs = len (libdir.split (os.sep)) ++ dotdots = ('..' + os.sep) * backdirs + + objfile = gdb.current_objfile ().filename + dir_ = os.path.join (os.path.dirname (objfile), dotdots, pythondir) + +- if not dir_ in sys.path: ++ if not objfile.startswith('/usr/lib/debug/') and not dir_ in sys.path: + sys.path.insert(0, dir_) + + # Load the pretty-printers. +-from libstdcxx.v6.printers import register_libstdcxx_printers +-register_libstdcxx_printers (gdb.current_objfile ()) ++if gdb.current_objfile () is None or not gdb.current_objfile ().filename.startswith ('/usr/lib/debug/'): ++ from libstdcxx.v6.printers import register_libstdcxx_printers ++ register_libstdcxx_printers (gdb.current_objfile ()) +Index: b/src/gcc/config/sh/t-linux +=================================================================== +--- a/src/gcc/config/sh/t-linux ++++ b/src/gcc/config/sh/t-linux +@@ -1,2 +1,5 @@ + MULTILIB_DIRNAMES= + MULTILIB_MATCHES = ++ ++MULTILIB_OSDIRNAMES = .:sh4-linux-gnu sh4_nofpu-linux-gnu:sh4-linux-gnu ++MULTIARCH_DIRNAME = $(call if_multiarch,sh4-linux-gnu) +Index: b/src/gcc/config/sparc/t-linux64 +=================================================================== +--- a/src/gcc/config/sparc/t-linux64 ++++ b/src/gcc/config/sparc/t-linux64 +@@ -27,3 +27,5 @@ MULTILIB_OPTIONS = m64/m32 + MULTILIB_DIRNAMES = 64 32 + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu) ++ ++MULTIARCH_DIRNAME = $(call if_multiarch,sparc$(if $(findstring 64,$(target)),64)-linux-gnu) +Index: b/src/gcc/config/s390/t-linux64 +=================================================================== +--- a/src/gcc/config/s390/t-linux64 ++++ b/src/gcc/config/s390/t-linux64 +@@ -9,3 +9,5 @@ MULTILIB_OPTIONS = m64/m31 + MULTILIB_DIRNAMES = 64 32 + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu) ++ ++MULTIARCH_DIRNAME = $(call if_multiarch,s390$(if $(findstring s390x,$(target)),x)-linux-gnu) +Index: b/src/gcc/config/rs6000/t-linux +=================================================================== +--- a/src/gcc/config/rs6000/t-linux ++++ b/src/gcc/config/rs6000/t-linux +@@ -5,7 +5,7 @@ ifneq (,$(findstring powerpc64,$(target) + MULTILIB_OSDIRNAMES := .=../lib64$(call if_multiarch,:powerpc64-linux-gnu) + else + ifneq (,$(findstring spe,$(target))) +-MULTIARCH_DIRNAME := powerpc-linux-gnuspe$(if $(findstring rs6000/e500-double.h, $(tm_file_list)),,v1) ++MULTIARCH_DIRNAME = powerpc-linux-gnuspe$(if $(findstring 8548,$(with_cpu)),,v1) + else + MULTIARCH_DIRNAME := powerpc-linux-gnu + endif +Index: b/src/gcc/config/rs6000/t-linux64 +=================================================================== +--- a/src/gcc/config/rs6000/t-linux64 ++++ b/src/gcc/config/rs6000/t-linux64 +@@ -30,3 +30,5 @@ MULTILIB_DIRNAMES := 64 32 + MULTILIB_EXTRA_OPTS := + MULTILIB_OSDIRNAMES := m64=../lib64$(call if_multiarch,:powerpc64-linux-gnu) + MULTILIB_OSDIRNAMES += m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) ++ ++MULTIARCH_DIRNAME = $(call if_multiarch,powerpc$(if $(findstring 64,$(target)),64)-linux-gnu) +Index: b/src/gcc/config/i386/t-linux64 +=================================================================== +--- a/src/gcc/config/i386/t-linux64 ++++ b/src/gcc/config/i386/t-linux64 +@@ -36,3 +36,13 @@ MULTILIB_DIRNAMES = $(patsubst m%, %, + MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) + MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu) + MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32) ++ ++ifneq (,$(findstring x86_64,$(target))) ++ ifneq (,$(findstring biarchx32.h,$(tm_include_list))) ++ MULTIARCH_DIRNAME = $(call if_multiarch,x86_64-linux-gnux32) ++ else ++ MULTIARCH_DIRNAME = $(call if_multiarch,x86_64-linux-gnu) ++ endif ++else ++ MULTIARCH_DIRNAME = $(call if_multiarch,i386-linux-gnu) ++endif +Index: b/src/gcc/config/i386/t-kfreebsd +=================================================================== +--- a/src/gcc/config/i386/t-kfreebsd ++++ b/src/gcc/config/i386/t-kfreebsd +@@ -1,5 +1,9 @@ +-MULTIARCH_DIRNAME = $(call if_multiarch,i386-kfreebsd-gnu) ++ifeq (,$(MULTIARCH_DIRNAME)) ++ MULTIARCH_DIRNAME = $(call if_multiarch,i386-kfreebsd-gnu) ++endif + + # MULTILIB_OSDIRNAMES are set in t-linux64. + KFREEBSD_OS = $(filter kfreebsd%, $(word 3, $(subst -, ,$(target)))) + MULTILIB_OSDIRNAMES := $(filter-out mx32=%,$(subst linux,$(KFREEBSD_OS),$(MULTILIB_OSDIRNAMES))) ++ ++MULTIARCH_DIRNAME := $(subst linux,$(KFREEBSD_OS),$(MULTIARCH_DIRNAME)) +Index: b/src/gcc/config.gcc +=================================================================== +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -1806,8 +1806,11 @@ mips*-mti-linux*) + mips64*-*-linux* | mipsisa64*-*-linux*) + tm_file="dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h ${tm_file} mips/gnu-user.h mips/gnu-user64.h mips/linux64.h mips/linux-common.h" + tmake_file="${tmake_file} mips/t-linux64" +- tm_defines="${tm_defines} MIPS_ABI_DEFAULT=ABI_N32" ++ tm_defines="${tm_defines} MIPS_ABI_DEFAULT=ABI_64" + case ${target} in ++ *gnuabin32*) ++ tm_defines=$(echo ${tm_defines}| sed 's/MIPS_ABI_DEFAULT=ABI_64/MIPS_ABI_DEFAULT=ABI_N32/g') ++ ;; + mips64el-st-linux-gnu) + tm_file="${tm_file} mips/st.h" + tmake_file="${tmake_file} mips/t-st" +@@ -3762,7 +3765,7 @@ case ${target} in + i[34567]86-*-darwin* | x86_64-*-darwin*) + ;; + i[34567]86-*-linux* | x86_64-*-linux*) +- tmake_file="$tmake_file i386/t-linux" ++ tmake_file="i386/t-linux $tmake_file" + ;; + i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu) + tmake_file="$tmake_file i386/t-kfreebsd" +Index: b/src/gcc/java/jvspec.c +=================================================================== +--- a/src/gcc/java/jvspec.c ++++ b/src/gcc/java/jvspec.c +@@ -59,7 +59,7 @@ static const char jvgenmain_spec[] = + "jvgenmain %{findirect-dispatch} %{D*} %b %m.i |\n\ + cc1 %m.i %1 \ + %{!Q:-quiet} -dumpbase %b.c %{d*} %{m*}\ +- %{g*} %{O*} \ ++ %{g*} %{O*} %I \ + %{v:-version} %{pg:-p} %{p}\ + % + toolexecdir = $(glibgo_toolexecdir) + toolexeclibdir = $(glibgo_toolexeclibdir) +-toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(gcc_version)/$(target_alias) ++toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(short_version) + WARN_CFLAGS = $(WARN_FLAGS) $(WERROR) + + # -I/-D flags to pass when compiling. +Index: b/src/libgo/Makefile.am +=================================================================== +--- a/src/libgo/Makefile.am ++++ b/src/libgo/Makefile.am +@@ -15,7 +15,7 @@ + + SUBDIRS = ${subdirs} + +-gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) ++short_version := $(shell sed -r 's/([0-9]+\.[0-9]+)\..*/\1/' $(top_srcdir)/../gcc/BASE-VER) + + MAINT_CHARSET = latin1 + +@@ -25,7 +25,7 @@ + + toolexecdir = $(glibgo_toolexecdir) + toolexeclibdir = $(glibgo_toolexeclibdir) +-toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(gcc_version)/$(target_alias) ++toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(short_version) + + LIBFFI = @LIBFFI@ + LIBFFIINCS = @LIBFFIINCS@ --- gcc-4.8-4.8.5.orig/debian/patches/gcj-arm-mode.diff +++ gcc-4.8-4.8.5/debian/patches/gcj-arm-mode.diff @@ -0,0 +1,33 @@ +# DP: For armhf, force arm mode instead of thumb mode + +--- a/src/libjava/configure.host ++++ b/src/libjava/configure.host +@@ -66,6 +66,9 @@ + ;; + esac + ++# on armhf force arm mode ++libgcj_flags="${libgcj_flags} -marm" ++ + AM_RUNTESTFLAGS= + + # Set any host dependent compiler flags. +--- a/src/gcc/java/lang-specs.h ++++ b/src/gcc/java/lang-specs.h +@@ -47,7 +47,7 @@ + %{.class|.zip|.jar|!fsyntax-only:jc1 \ + %{.java|fsaw-java-file:%U.jar -fsource-filename=%i %x_flag_exceptions = 1; ++ opts->x_flag_exceptions = 0; + + // Avoid range issues for complex multiply and divide. + opts->x_flag_complex_method = 2; +--- a/src/gcc/d/d-spec.c ++++ b/src/gcc/d/d-spec.c +@@ -84,7 +84,7 @@ + + /* If nonzero, use the standard D runtime library when linking with + standard libraries. */ +- int phobos = 1; ++ int phobos = 0; + + /* The number of arguments being added to what's in argv, other than + libraries. We use this to track the number of times we've inserted --- gcc-4.8-4.8.5.orig/debian/patches/gdc-frontend-posix.diff +++ gcc-4.8-4.8.5/debian/patches/gdc-frontend-posix.diff @@ -0,0 +1,13 @@ +# DP: Fix build of the D frontend on the Hurd and KFreeBSD. + +--- a/src/gcc/d/dfrontend/object.h ++++ b/src/gcc/d/dfrontend/object.h +@@ -10,7 +10,7 @@ + #ifndef OBJECT_H + #define OBJECT_H + +-#define POSIX (linux || __APPLE__ || __FreeBSD__ || __OpenBSD__ || __sun) ++#define POSIX (__linux__ || __GLIBC__ || __gnu_hurd__ || __APPLE__ || __FreeBSD__ || __OpenBSD__ || __sun) + + #if __DMC__ + #pragma once --- gcc-4.8-4.8.5.orig/debian/patches/gdc-libphobos-build.diff +++ gcc-4.8-4.8.5/debian/patches/gdc-libphobos-build.diff @@ -0,0 +1,715 @@ +# DP: This implements building of libphobos library in GCC. + + # these tools are built using the target libraries, and are intended to + # run only in the target environment +Index: b/src/configure.ac +=================================================================== +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -164,6 +164,7 @@ target_libraries="target-libgcc \ + target-libssp \ + target-libquadmath \ + target-libgfortran \ ++ target-libphobos \ + target-boehm-gc \ + ${libgcj} \ + target-libobjc \ +Index: b/src/Makefile.def +=================================================================== +--- a/src/Makefile.def ++++ b/src/Makefile.def +@@ -131,6 +131,7 @@ target_modules = { module= libquadmath; + target_modules = { module= libgfortran; }; + target_modules = { module= libobjc; }; + target_modules = { module= libgo; }; ++target_modules = { module= libphobos; }; + target_modules = { module= libtermcap; no_check=true; + missing=mostlyclean; + missing=clean; +@@ -509,6 +510,8 @@ dependencies = { module=configure-target + dependencies = { module=all-target-libgo; on=all-target-libbacktrace; }; + dependencies = { module=all-target-libgo; on=all-target-libffi; }; + dependencies = { module=all-target-libgo; on=all-target-libatomic; }; ++dependencies = { module=configure-target-libphobos; on=configure-target-zlib; }; ++dependencies = { module=all-target-libphobos; on=all-target-zlib; }; + dependencies = { module=configure-target-libjava; on=configure-target-zlib; }; + dependencies = { module=configure-target-libjava; on=configure-target-boehm-gc; }; + dependencies = { module=configure-target-libjava; on=configure-target-libffi; }; +@@ -564,6 +567,8 @@ languages = { language=objc; gcc-check-t + languages = { language=obj-c++; gcc-check-target=check-obj-c++; }; + languages = { language=go; gcc-check-target=check-go; + lib-check-target=check-target-libgo; }; ++languages = { language=d; gcc-check-target=check-d; ++ lib-check-target=check-target-libphobos; }; + + // Toplevel bootstrap + bootstrap_stage = { id=1 ; }; +Index: b/src/Makefile.in +=================================================================== +--- a/src/Makefile.in ++++ b/src/Makefile.in +@@ -933,6 +933,7 @@ configure-target: \ + maybe-configure-target-libgfortran \ + maybe-configure-target-libobjc \ + maybe-configure-target-libgo \ ++ maybe-configure-target-libphobos \ + maybe-configure-target-libtermcap \ + maybe-configure-target-winsup \ + maybe-configure-target-libgloss \ +@@ -1086,6 +1087,7 @@ all-target: maybe-all-target-libquadmath + all-target: maybe-all-target-libgfortran + all-target: maybe-all-target-libobjc + all-target: maybe-all-target-libgo ++all-target: maybe-all-target-libphobos + all-target: maybe-all-target-libtermcap + all-target: maybe-all-target-winsup + all-target: maybe-all-target-libgloss +@@ -1175,6 +1177,7 @@ info-target: maybe-info-target-libquadma + info-target: maybe-info-target-libgfortran + info-target: maybe-info-target-libobjc + info-target: maybe-info-target-libgo ++info-target: maybe-info-target-libphobos + info-target: maybe-info-target-libtermcap + info-target: maybe-info-target-winsup + info-target: maybe-info-target-libgloss +@@ -1257,6 +1260,7 @@ dvi-target: maybe-dvi-target-libquadmath + dvi-target: maybe-dvi-target-libgfortran + dvi-target: maybe-dvi-target-libobjc + dvi-target: maybe-dvi-target-libgo ++dvi-target: maybe-dvi-target-libphobos + dvi-target: maybe-dvi-target-libtermcap + dvi-target: maybe-dvi-target-winsup + dvi-target: maybe-dvi-target-libgloss +@@ -1339,6 +1343,7 @@ pdf-target: maybe-pdf-target-libquadmath + pdf-target: maybe-pdf-target-libgfortran + pdf-target: maybe-pdf-target-libobjc + pdf-target: maybe-pdf-target-libgo ++pdf-target: maybe-pdf-target-libphobos + pdf-target: maybe-pdf-target-libtermcap + pdf-target: maybe-pdf-target-winsup + pdf-target: maybe-pdf-target-libgloss +@@ -1421,6 +1426,7 @@ html-target: maybe-html-target-libquadma + html-target: maybe-html-target-libgfortran + html-target: maybe-html-target-libobjc + html-target: maybe-html-target-libgo ++html-target: maybe-html-target-libphobos + html-target: maybe-html-target-libtermcap + html-target: maybe-html-target-winsup + html-target: maybe-html-target-libgloss +@@ -1503,6 +1509,7 @@ TAGS-target: maybe-TAGS-target-libquadma + TAGS-target: maybe-TAGS-target-libgfortran + TAGS-target: maybe-TAGS-target-libobjc + TAGS-target: maybe-TAGS-target-libgo ++TAGS-target: maybe-TAGS-target-libphobos + TAGS-target: maybe-TAGS-target-libtermcap + TAGS-target: maybe-TAGS-target-winsup + TAGS-target: maybe-TAGS-target-libgloss +@@ -1585,6 +1592,7 @@ install-info-target: maybe-install-info- + install-info-target: maybe-install-info-target-libgfortran + install-info-target: maybe-install-info-target-libobjc + install-info-target: maybe-install-info-target-libgo ++install-info-target: maybe-install-info-target-libphobos + install-info-target: maybe-install-info-target-libtermcap + install-info-target: maybe-install-info-target-winsup + install-info-target: maybe-install-info-target-libgloss +@@ -1667,6 +1675,7 @@ install-pdf-target: maybe-install-pdf-ta + install-pdf-target: maybe-install-pdf-target-libgfortran + install-pdf-target: maybe-install-pdf-target-libobjc + install-pdf-target: maybe-install-pdf-target-libgo ++install-pdf-target: maybe-install-pdf-target-libphobos + install-pdf-target: maybe-install-pdf-target-libtermcap + install-pdf-target: maybe-install-pdf-target-winsup + install-pdf-target: maybe-install-pdf-target-libgloss +@@ -1749,6 +1758,7 @@ install-html-target: maybe-install-html- + install-html-target: maybe-install-html-target-libgfortran + install-html-target: maybe-install-html-target-libobjc + install-html-target: maybe-install-html-target-libgo ++install-html-target: maybe-install-html-target-libphobos + install-html-target: maybe-install-html-target-libtermcap + install-html-target: maybe-install-html-target-winsup + install-html-target: maybe-install-html-target-libgloss +@@ -1831,6 +1841,7 @@ installcheck-target: maybe-installcheck- + installcheck-target: maybe-installcheck-target-libgfortran + installcheck-target: maybe-installcheck-target-libobjc + installcheck-target: maybe-installcheck-target-libgo ++installcheck-target: maybe-installcheck-target-libphobos + installcheck-target: maybe-installcheck-target-libtermcap + installcheck-target: maybe-installcheck-target-winsup + installcheck-target: maybe-installcheck-target-libgloss +@@ -1913,6 +1924,7 @@ mostlyclean-target: maybe-mostlyclean-ta + mostlyclean-target: maybe-mostlyclean-target-libgfortran + mostlyclean-target: maybe-mostlyclean-target-libobjc + mostlyclean-target: maybe-mostlyclean-target-libgo ++mostlyclean-target: maybe-mostlyclean-target-libphobos + mostlyclean-target: maybe-mostlyclean-target-libtermcap + mostlyclean-target: maybe-mostlyclean-target-winsup + mostlyclean-target: maybe-mostlyclean-target-libgloss +@@ -1995,6 +2007,7 @@ clean-target: maybe-clean-target-libquad + clean-target: maybe-clean-target-libgfortran + clean-target: maybe-clean-target-libobjc + clean-target: maybe-clean-target-libgo ++clean-target: maybe-clean-target-libphobos + clean-target: maybe-clean-target-libtermcap + clean-target: maybe-clean-target-winsup + clean-target: maybe-clean-target-libgloss +@@ -2077,6 +2090,7 @@ distclean-target: maybe-distclean-target + distclean-target: maybe-distclean-target-libgfortran + distclean-target: maybe-distclean-target-libobjc + distclean-target: maybe-distclean-target-libgo ++distclean-target: maybe-distclean-target-libphobos + distclean-target: maybe-distclean-target-libtermcap + distclean-target: maybe-distclean-target-winsup + distclean-target: maybe-distclean-target-libgloss +@@ -2159,6 +2173,7 @@ maintainer-clean-target: maybe-maintaine + maintainer-clean-target: maybe-maintainer-clean-target-libgfortran + maintainer-clean-target: maybe-maintainer-clean-target-libobjc + maintainer-clean-target: maybe-maintainer-clean-target-libgo ++maintainer-clean-target: maybe-maintainer-clean-target-libphobos + maintainer-clean-target: maybe-maintainer-clean-target-libtermcap + maintainer-clean-target: maybe-maintainer-clean-target-winsup + maintainer-clean-target: maybe-maintainer-clean-target-libgloss +@@ -2296,6 +2311,7 @@ check-target: \ + maybe-check-target-libgfortran \ + maybe-check-target-libobjc \ + maybe-check-target-libgo \ ++ maybe-check-target-libphobos \ + maybe-check-target-libtermcap \ + maybe-check-target-winsup \ + maybe-check-target-libgloss \ +@@ -2451,6 +2467,7 @@ install-target: \ + maybe-install-target-libgfortran \ + maybe-install-target-libobjc \ + maybe-install-target-libgo \ ++ maybe-install-target-libphobos \ + maybe-install-target-libtermcap \ + maybe-install-target-winsup \ + maybe-install-target-libgloss \ +@@ -2553,6 +2570,7 @@ install-strip-target: \ + maybe-install-strip-target-libgfortran \ + maybe-install-strip-target-libobjc \ + maybe-install-strip-target-libgo \ ++ maybe-install-strip-target-libphobos \ + maybe-install-strip-target-libtermcap \ + maybe-install-strip-target-winsup \ + maybe-install-strip-target-libgloss \ +@@ -37320,6 +37338,463 @@ maintainer-clean-target-libgo: + + + ++.PHONY: configure-target-libphobos maybe-configure-target-libphobos ++maybe-configure-target-libphobos: ++@if gcc-bootstrap ++configure-target-libphobos: stage_current ++@endif gcc-bootstrap ++@if target-libphobos ++maybe-configure-target-libphobos: configure-target-libphobos ++configure-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ echo "Checking multilib configuration for libphobos..."; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libphobos ; \ ++ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libphobos/multilib.tmp 2> /dev/null ; \ ++ if test -r $(TARGET_SUBDIR)/libphobos/multilib.out; then \ ++ if cmp -s $(TARGET_SUBDIR)/libphobos/multilib.tmp $(TARGET_SUBDIR)/libphobos/multilib.out; then \ ++ rm -f $(TARGET_SUBDIR)/libphobos/multilib.tmp; \ ++ else \ ++ rm -f $(TARGET_SUBDIR)/libphobos/Makefile; \ ++ mv $(TARGET_SUBDIR)/libphobos/multilib.tmp $(TARGET_SUBDIR)/libphobos/multilib.out; \ ++ fi; \ ++ else \ ++ mv $(TARGET_SUBDIR)/libphobos/multilib.tmp $(TARGET_SUBDIR)/libphobos/multilib.out; \ ++ fi; \ ++ test ! -f $(TARGET_SUBDIR)/libphobos/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libphobos ; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo Configuring in $(TARGET_SUBDIR)/libphobos; \ ++ cd "$(TARGET_SUBDIR)/libphobos" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(TARGET_SUBDIR)/libphobos/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libphobos"; \ ++ libsrcdir="$$s/libphobos"; \ ++ rm -f no-such-file || : ; \ ++ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ ++ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif target-libphobos ++ ++ ++ ++ ++ ++.PHONY: all-target-libphobos maybe-all-target-libphobos ++maybe-all-target-libphobos: ++@if gcc-bootstrap ++all-target-libphobos: stage_current ++@endif gcc-bootstrap ++@if target-libphobos ++TARGET-target-libphobos=all ++maybe-all-target-libphobos: all-target-libphobos ++all-target-libphobos: configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) \ ++ $(TARGET-target-libphobos)) ++@endif target-libphobos ++ ++ ++ ++ ++ ++.PHONY: check-target-libphobos maybe-check-target-libphobos ++maybe-check-target-libphobos: ++@if target-libphobos ++maybe-check-target-libphobos: check-target-libphobos ++ ++check-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) check) ++ ++@endif target-libphobos ++ ++.PHONY: install-target-libphobos maybe-install-target-libphobos ++maybe-install-target-libphobos: ++@if target-libphobos ++maybe-install-target-libphobos: install-target-libphobos ++ ++install-target-libphobos: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install) ++ ++@endif target-libphobos ++ ++.PHONY: install-strip-target-libphobos maybe-install-strip-target-libphobos ++maybe-install-strip-target-libphobos: ++@if target-libphobos ++maybe-install-strip-target-libphobos: install-strip-target-libphobos ++ ++install-strip-target-libphobos: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install-strip) ++ ++@endif target-libphobos ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-target-libphobos info-target-libphobos ++maybe-info-target-libphobos: ++@if target-libphobos ++maybe-info-target-libphobos: info-target-libphobos ++ ++info-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing info in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ info) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-dvi-target-libphobos dvi-target-libphobos ++maybe-dvi-target-libphobos: ++@if target-libphobos ++maybe-dvi-target-libphobos: dvi-target-libphobos ++ ++dvi-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing dvi in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ dvi) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-pdf-target-libphobos pdf-target-libphobos ++maybe-pdf-target-libphobos: ++@if target-libphobos ++maybe-pdf-target-libphobos: pdf-target-libphobos ++ ++pdf-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing pdf in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-html-target-libphobos html-target-libphobos ++maybe-html-target-libphobos: ++@if target-libphobos ++maybe-html-target-libphobos: html-target-libphobos ++ ++html-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing html in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ html) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-TAGS-target-libphobos TAGS-target-libphobos ++maybe-TAGS-target-libphobos: ++@if target-libphobos ++maybe-TAGS-target-libphobos: TAGS-target-libphobos ++ ++TAGS-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing TAGS in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ TAGS) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-install-info-target-libphobos install-info-target-libphobos ++maybe-install-info-target-libphobos: ++@if target-libphobos ++maybe-install-info-target-libphobos: install-info-target-libphobos ++ ++install-info-target-libphobos: \ ++ configure-target-libphobos \ ++ info-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-info in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-info) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-install-pdf-target-libphobos install-pdf-target-libphobos ++maybe-install-pdf-target-libphobos: ++@if target-libphobos ++maybe-install-pdf-target-libphobos: install-pdf-target-libphobos ++ ++install-pdf-target-libphobos: \ ++ configure-target-libphobos \ ++ pdf-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-pdf in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-install-html-target-libphobos install-html-target-libphobos ++maybe-install-html-target-libphobos: ++@if target-libphobos ++maybe-install-html-target-libphobos: install-html-target-libphobos ++ ++install-html-target-libphobos: \ ++ configure-target-libphobos \ ++ html-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-html in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-installcheck-target-libphobos installcheck-target-libphobos ++maybe-installcheck-target-libphobos: ++@if target-libphobos ++maybe-installcheck-target-libphobos: installcheck-target-libphobos ++ ++installcheck-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing installcheck in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ installcheck) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-mostlyclean-target-libphobos mostlyclean-target-libphobos ++maybe-mostlyclean-target-libphobos: ++@if target-libphobos ++maybe-mostlyclean-target-libphobos: mostlyclean-target-libphobos ++ ++mostlyclean-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing mostlyclean in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-clean-target-libphobos clean-target-libphobos ++maybe-clean-target-libphobos: ++@if target-libphobos ++maybe-clean-target-libphobos: clean-target-libphobos ++ ++clean-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing clean in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-distclean-target-libphobos distclean-target-libphobos ++maybe-distclean-target-libphobos: ++@if target-libphobos ++maybe-distclean-target-libphobos: distclean-target-libphobos ++ ++distclean-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing distclean in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-maintainer-clean-target-libphobos maintainer-clean-target-libphobos ++maybe-maintainer-clean-target-libphobos: ++@if target-libphobos ++maybe-maintainer-clean-target-libphobos: maintainer-clean-target-libphobos ++ ++maintainer-clean-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++ ++ ++ ++ + .PHONY: configure-target-libtermcap maybe-configure-target-libtermcap + maybe-configure-target-libtermcap: + @if gcc-bootstrap +@@ -43344,6 +43819,14 @@ check-gcc-go: + (cd gcc && $(MAKE) $(GCC_FLAGS_TO_PASS) check-go); + check-go: check-gcc-go check-target-libgo + ++.PHONY: check-gcc-d check-d ++check-gcc-d: ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd gcc && $(MAKE) $(GCC_FLAGS_TO_PASS) check-d); ++check-d: check-gcc-d check-target-libphobos ++ + + # The gcc part of install-no-fixedincludes, which relies on an intimate + # knowledge of how a number of gcc internal targets (inter)operate. Delegate. +@@ -45397,6 +45880,7 @@ configure-target-libquadmath: stage_last + configure-target-libgfortran: stage_last + configure-target-libobjc: stage_last + configure-target-libgo: stage_last ++configure-target-libphobos: stage_last + configure-target-libtermcap: stage_last + configure-target-winsup: stage_last + configure-target-libgloss: stage_last +@@ -45428,6 +45912,7 @@ configure-target-libquadmath: maybe-all- + configure-target-libgfortran: maybe-all-gcc + configure-target-libobjc: maybe-all-gcc + configure-target-libgo: maybe-all-gcc ++configure-target-libphobos: maybe-all-gcc + configure-target-libtermcap: maybe-all-gcc + configure-target-winsup: maybe-all-gcc + configure-target-libgloss: maybe-all-gcc +@@ -46202,6 +46687,8 @@ configure-target-libgo: maybe-all-target + all-target-libgo: maybe-all-target-libbacktrace + all-target-libgo: maybe-all-target-libffi + all-target-libgo: maybe-all-target-libatomic ++configure-target-libphobos: maybe-configure-target-zlib ++all-target-libphobos: maybe-all-target-zlib + configure-target-libjava: maybe-configure-target-zlib + configure-target-libjava: maybe-configure-target-boehm-gc + configure-target-libjava: maybe-configure-target-libffi +@@ -46288,6 +46775,7 @@ configure-target-libquadmath: maybe-all- + configure-target-libgfortran: maybe-all-target-libgcc + configure-target-libobjc: maybe-all-target-libgcc + configure-target-libgo: maybe-all-target-libgcc ++configure-target-libphobos: maybe-all-target-libgcc + configure-target-libtermcap: maybe-all-target-libgcc + configure-target-winsup: maybe-all-target-libgcc + configure-target-libgloss: maybe-all-target-libgcc +@@ -46323,6 +46811,8 @@ configure-target-libobjc: maybe-all-targ + + configure-target-libgo: maybe-all-target-newlib maybe-all-target-libgloss + ++configure-target-libphobos: maybe-all-target-newlib maybe-all-target-libgloss ++ + configure-target-libtermcap: maybe-all-target-newlib maybe-all-target-libgloss + + configure-target-winsup: maybe-all-target-newlib maybe-all-target-libgloss --- gcc-4.8-4.8.5.orig/debian/patches/gdc-multiarch.diff +++ gcc-4.8-4.8.5/debian/patches/gdc-multiarch.diff @@ -0,0 +1,17 @@ +# DP: Set the D target include directory to a multiarch location. + +--- a/src/gcc/d/Make-lang.in ++++ b/src/gcc/d/Make-lang.in +@@ -61,7 +61,11 @@ + $(D_DMD_H) + + +-gcc_d_target_include_dir=$(gcc_d_include_dir)/$(target_noncanonical) ++ifneq (,$(MULTIARCH_DIRNAME)) ++ gcc_d_target_include_dir = /usr/include/$(MULTIARCH_DIRNAME)/d/$(version) ++else ++ gcc_d_target_include_dir=$(gcc_d_include_dir)/$(target_noncanonical) ++endif + + # Name of phobos library + D_LIBPHOBOS = -DLIBPHOBOS=\"gphobos2\" --- gcc-4.8-4.8.5.orig/debian/patches/gdc-texinfo.diff +++ gcc-4.8-4.8.5/debian/patches/gdc-texinfo.diff @@ -0,0 +1,53 @@ +# DP: Add macros for the gdc texinfo documentation. + +--- a/src/gcc/d/gdc.texi ++++ b/src/gcc/d/gdc.texi +@@ -43,6 +43,22 @@ + @insertcopying + @end ifinfo + ++@macro versionsubtitle ++@ifclear DEVELOPMENT ++@subtitle For @sc{gcc} version @value{version-GCC} ++@end ifclear ++@ifset DEVELOPMENT ++@subtitle For @sc{gcc} version @value{version-GCC} (pre-release) ++@end ifset ++@ifset VERSION_PACKAGE ++@sp 1 ++@subtitle @value{VERSION_PACKAGE} ++@end ifset ++@c Even if there are no authors, the second titlepage line should be ++@c forced to the bottom of the page. ++@vskip 0pt plus 1filll ++@end macro ++ + @titlepage + @title The GNU D Compiler + @versionsubtitle +@@ -138,6 +154,25 @@ + + @c man end + ++@macro gcctabopt{body} ++@code{\body\} ++@end macro ++@macro gccoptlist{body} ++@smallexample ++\body\ ++@end smallexample ++@end macro ++@c Makeinfo handles the above macro OK, TeX needs manual line breaks; ++@c they get lost at some point in handling the macro. But if @macro is ++@c used here rather than @alias, it produces double line breaks. ++@iftex ++@alias gol = * ++@end iftex ++@ifnottex ++@macro gol ++@end macro ++@end ifnottex ++ + @c man begin OPTIONS gdc + + @table @gcctabopt --- gcc-4.8-4.8.5.orig/debian/patches/gdc-versym-cpu.diff +++ gcc-4.8-4.8.5/debian/patches/gdc-versym-cpu.diff @@ -0,0 +1,382 @@ +# DP: Implements D CPU version conditions. + +This implements the following versions: +* D_HardFloat +* D_SoftFloat + +for all supported architectures. And these where appropriate: +* ARM +** ARM_Thumb +** ARM_HardFloat +** ARM_SoftFloat +** ARM_SoftFP +* AArch64 +* Alpha +** Alpha_SoftFloat +** Alpha_HardFloat +* X86 +* X86_64 +** D_X32 +* IA64 +* MIPS32 +* MIPS64 +** MIPS_O32 +** MIPS_O64 +** MIPS_N32 +** MIPS_N64 +** MIPS_EABI +** MIPS_HardFloat +** MIPS_SoftFloat +* HPPA +* HPPA64 +* PPC +* PPC64 +** PPC_HardFloat +** PPC_SoftFloat +* S390 +* S390X +* SH +* SH64 +* SPARC +* SPARC64 +* SPARC_V8Plus +** SPARC_HardFloat +** SPARC_SoftFloat + +Index: b/src/gcc/config/aarch64/aarch64.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64.h ++++ b/src/gcc/config/aarch64/aarch64.h +@@ -51,6 +51,14 @@ + \ + } while (0) + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++ do \ ++ { \ ++ builtin_define ("AArch64"); \ ++ builtin_define ("D_HardFloat"); \ ++ } while (0) ++ + + + /* Target machine storage layout. */ +Index: b/src/gcc/config/alpha/alpha.h +=================================================================== +--- a/src/gcc/config/alpha/alpha.h ++++ b/src/gcc/config/alpha/alpha.h +@@ -72,6 +72,23 @@ along with GCC; see the file COPYING3. + SUBTARGET_LANGUAGE_CPP_BUILTINS(); \ + } while (0) + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++ do \ ++ { \ ++ builtin_define ("Alpha"); \ ++ if (TARGET_SOFT_FP) \ ++ { \ ++ builtin_define ("D_SoftFloat"); \ ++ builtin_define ("Alpha_SoftFloat"); \ ++ } \ ++ else \ ++ { \ ++ builtin_define ("D_HardFloat"); \ ++ builtin_define ("Alpha_HardFloat"); \ ++ } \ ++} while (0) ++ + #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS + #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \ + do \ +Index: b/src/gcc/config/arm/arm.h +=================================================================== +--- a/src/gcc/config/arm/arm.h ++++ b/src/gcc/config/arm/arm.h +@@ -158,6 +158,31 @@ extern char arm_arch_name[]; + builtin_define ("__ARM_ARCH_EXT_IDIV__"); \ + } while (0) + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++ do \ ++ { \ ++ builtin_define ("ARM"); \ ++ \ ++ if (TARGET_THUMB || TARGET_THUMB2) \ ++ builtin_define ("ARM_Thumb"); \ ++ \ ++ if (TARGET_HARD_FLOAT_ABI) \ ++ builtin_define ("ARM_HardFloat"); \ ++ else \ ++ { \ ++ if(TARGET_SOFT_FLOAT) \ ++ builtin_define ("ARM_SoftFloat"); \ ++ else if(TARGET_HARD_FLOAT) \ ++ builtin_define ("ARM_SoftFP"); \ ++ } \ ++ \ ++ if(TARGET_SOFT_FLOAT) \ ++ builtin_define ("D_SoftFloat"); \ ++ else if(TARGET_HARD_FLOAT) \ ++ builtin_define ("D_HardFloat"); \ ++ } while (0) ++ + #include "config/arm/arm-opts.h" + + enum target_cpus +Index: b/src/gcc/config/i386/i386.h +=================================================================== +--- a/src/gcc/config/i386/i386.h ++++ b/src/gcc/config/i386/i386.h +@@ -588,6 +588,24 @@ extern const char *host_detect_local_cpu + /* Target CPU builtins. */ + #define TARGET_CPU_CPP_BUILTINS() ix86_target_macros () + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++ do { \ ++ if (TARGET_64BIT) \ ++ { \ ++ builtin_define("X86_64"); \ ++ if (TARGET_X32) \ ++ builtin_define("D_X32"); \ ++ } \ ++ else \ ++ builtin_define("X86"); \ ++ \ ++ if (TARGET_80387) \ ++ builtin_define("D_HardFloat"); \ ++ else \ ++ builtin_define("D_SoftFloat"); \ ++ } while (0) ++ + /* Target Pragmas. */ + #define REGISTER_TARGET_PRAGMAS() ix86_register_pragmas () + +Index: b/src/gcc/config/ia64/ia64.h +=================================================================== +--- a/src/gcc/config/ia64/ia64.h ++++ b/src/gcc/config/ia64/ia64.h +@@ -40,6 +40,13 @@ do { \ + builtin_define("__BIG_ENDIAN__"); \ + } while (0) + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++do { \ ++ builtin_define ("IA64"); \ ++ builtin_define ("D_HardFloat"); \ ++} while (0) ++ + #ifndef SUBTARGET_EXTRA_SPECS + #define SUBTARGET_EXTRA_SPECS + #endif +Index: b/src/gcc/config/mips/mips.h +=================================================================== +--- a/src/gcc/config/mips/mips.h ++++ b/src/gcc/config/mips/mips.h +@@ -551,6 +551,54 @@ struct mips_cpu_info { + } \ + while (0) + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++ do \ ++ { \ ++ if (TARGET_64BIT) \ ++ builtin_define("MIPS64"); \ ++ else \ ++ builtin_define("MIPS32"); \ ++ \ ++ switch (mips_abi) \ ++ { \ ++ case ABI_32: \ ++ builtin_define("MIPS_O32"); \ ++ break; \ ++ \ ++ case ABI_O64: \ ++ builtin_define("MIPS_O64"); \ ++ break; \ ++ \ ++ case ABI_N32: \ ++ builtin_define("MIPS_N32"); \ ++ break; \ ++ \ ++ case ABI_64: \ ++ builtin_define("MIPS_N64"); \ ++ break; \ ++ \ ++ case ABI_EABI: \ ++ builtin_define("MIPS_EABI"); \ ++ break; \ ++ \ ++ default: \ ++ gcc_unreachable(); \ ++ } \ ++ \ ++ if (TARGET_HARD_FLOAT_ABI) \ ++ { \ ++ builtin_define("MIPS_HardFloat"); \ ++ builtin_define("D_HardFloat"); \ ++ } \ ++ else if (TARGET_SOFT_FLOAT_ABI) \ ++ { \ ++ builtin_define("MIPS_SoftFloat"); \ ++ builtin_define("D_SoftFloat"); \ ++ } \ ++ } \ ++ while (0) ++ + /* Default target_flags if no switches are specified */ + + #ifndef TARGET_DEFAULT +Index: b/src/gcc/config/pa/pa.h +=================================================================== +--- a/src/gcc/config/pa/pa.h ++++ b/src/gcc/config/pa/pa.h +@@ -185,6 +185,20 @@ do { \ + builtin_define("_PA_RISC1_0"); \ + } while (0) + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++do { \ ++ if(TARGET_64BIT) \ ++ builtin_define("HPPA64"); \ ++ else \ ++ builtin_define("HPPA"); \ ++ \ ++ if(TARGET_SOFT_FLOAT) \ ++ builtin_define ("D_SoftFloat"); \ ++ else \ ++ builtin_define ("D_HardFloat"); \ ++} while (0) ++ + /* An old set of OS defines for various BSD-like systems. */ + #define TARGET_OS_CPP_BUILTINS() \ + do \ +Index: b/src/gcc/config/rs6000/rs6000.h +=================================================================== +--- a/src/gcc/config/rs6000/rs6000.h ++++ b/src/gcc/config/rs6000/rs6000.h +@@ -702,6 +702,28 @@ extern unsigned char rs6000_recip_bits[] + #define TARGET_CPU_CPP_BUILTINS() \ + rs6000_cpu_cpp_builtins (pfile) + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++ do \ ++ { \ ++ if (TARGET_64BIT) \ ++ builtin_define ("PPC64"); \ ++ else \ ++ builtin_define ("PPC"); \ ++ \ ++ if (TARGET_HARD_FLOAT) \ ++ { \ ++ builtin_define ("PPC_HardFloat"); \ ++ builtin_define ("D_HardFloat"); \ ++ } \ ++ else if (TARGET_SOFT_FLOAT) \ ++ { \ ++ builtin_define ("PPC_SoftFloat"); \ ++ builtin_define ("D_SoftFloat"); \ ++ } \ ++ } \ ++ while (0) ++ + /* This is used by rs6000_cpu_cpp_builtins to indicate the byte order + we're compiling for. Some configurations may need to override it. */ + #define RS6000_CPU_CPP_ENDIAN_BUILTINS() \ +Index: b/src/gcc/config/s390/s390.h +=================================================================== +--- a/src/gcc/config/s390/s390.h ++++ b/src/gcc/config/s390/s390.h +@@ -114,6 +114,22 @@ enum processor_flags + } \ + while (0) + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++ do \ ++ { \ ++ if (TARGET_64BIT) \ ++ builtin_define ("S390X"); \ ++ else \ ++ builtin_define ("S390"); \ ++ \ ++ if(TARGET_SOFT_FLOAT) \ ++ builtin_define ("D_SoftFloat"); \ ++ else if(TARGET_HARD_FLOAT) \ ++ builtin_define ("D_HardFloat"); \ ++ } \ ++ while (0) ++ + #ifdef DEFAULT_TARGET_64BIT + #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP | MASK_OPT_HTM) + #else +Index: b/src/gcc/config/sh/sh.h +=================================================================== +--- a/src/gcc/config/sh/sh.h ++++ b/src/gcc/config/sh/sh.h +@@ -31,6 +31,22 @@ extern int code_for_indirect_jump_scratc + + #define TARGET_CPU_CPP_BUILTINS() sh_cpu_cpp_builtins (pfile) + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++ do \ ++ { \ ++ if (TARGET_SHMEDIA64) \ ++ builtin_define ("SH64"); \ ++ else \ ++ builtin_define ("SH"); \ ++ \ ++ if (TARGET_FPU_ANY) \ ++ builtin_define ("D_HardFloat"); \ ++ else \ ++ builtin_define ("D_SoftFloat"); \ ++ } \ ++ while (0) ++ + /* Value should be nonzero if functions must have frame pointers. + Zero means the frame pointer need not be set up (and parms may be accessed + via the stack pointer) in functions that seem suitable. */ +Index: b/src/gcc/config/sparc/sparc.h +=================================================================== +--- a/src/gcc/config/sparc/sparc.h ++++ b/src/gcc/config/sparc/sparc.h +@@ -27,6 +27,31 @@ along with GCC; see the file COPYING3. + + #define TARGET_CPU_CPP_BUILTINS() sparc_target_macros () + ++/* Target CPU builtins for D. */ ++#define TARGET_CPU_D_BUILTINS() \ ++do \ ++ { \ ++ if (TARGET_64BIT) \ ++ builtin_define ("SPARC64"); \ ++ else \ ++ builtin_define ("SPARC"); \ ++ \ ++ if(TARGET_V8PLUS) \ ++ builtin_define ("SPARC_V8Plus"); \ ++ \ ++ if(TARGET_FPU) \ ++ { \ ++ builtin_define ("D_HardFloat"); \ ++ builtin_define ("SPARC_HardFloat"); \ ++ } \ ++ else \ ++ { \ ++ builtin_define ("D_SoftFloat"); \ ++ builtin_define ("SPARC_SoftFloat"); \ ++ } \ ++ } \ ++ while (0) ++ + /* Specify this in a cover file to provide bi-architecture (32/64) support. */ + /* #define SPARC_BI_ARCH */ + --- gcc-4.8-4.8.5.orig/debian/patches/gdc-versym-os.diff +++ gcc-4.8-4.8.5/debian/patches/gdc-versym-os.diff @@ -0,0 +1,422 @@ +# DP: Implements D OS version conditions. + +This implements the following official versions: +* Windows +** Win32 +** Win64 +** Cygwin +** MinGW +* linux +* OSX +* FreeBSD +* OpenBSD +* NetBSD +* Solaris +* Posix +* AIX +* SysV4 +* Hurd +* Android + +These gdc specific versions are also implemented: +* GNU_MinGW64 (for mingw-w64) +* GNU_OpenSolaris (for opensolaris) +* GNU_GLibc (implemented for linux & bsd & opensolaris) +* GNU_UCLibc (implemented for linux) +* GNU_Bionic (implemented for linux) + +These official OS versions are not implemented: +* DragonFlyBSD +* BSD (other BSDs) +* Haiku +* SkyOS +* SysV3 + +Index: b/src/gcc/config/alpha/linux.h +=================================================================== +--- a/src/gcc/config/alpha/linux.h ++++ b/src/gcc/config/alpha/linux.h +@@ -33,6 +33,16 @@ along with GCC; see the file COPYING3. + builtin_define ("_GNU_SOURCE"); \ + } while (0) + ++#undef TARGET_OS_D_BUILTINS ++#define TARGET_OS_D_BUILTINS() \ ++ do { \ ++ if (OPTION_GLIBC) \ ++ builtin_define ("GNU_GLibc"); \ ++ \ ++ builtin_define ("linux"); \ ++ builtin_define ("Posix"); \ ++ } while (0) ++ + #undef LIB_SPEC + #define LIB_SPEC \ + "%{pthread:-lpthread} \ +Index: b/src/gcc/config/arm/linux-eabi.h +=================================================================== +--- a/src/gcc/config/arm/linux-eabi.h ++++ b/src/gcc/config/arm/linux-eabi.h +@@ -30,6 +30,15 @@ + } \ + while (false) + ++#undef TARGET_OS_D_BUILTINS ++#define TARGET_OS_D_BUILTINS() \ ++ do \ ++ { \ ++ TARGET_GENERIC_LINUX_OS_D_BUILTINS(); \ ++ ANDROID_TARGET_OS_D_BUILTINS(); \ ++ } \ ++ while (false) ++ + /* We default to a soft-float ABI so that binaries can run on all + target hardware. If you override this to use the hard-float ABI then + change the setting of GLIBC_DYNAMIC_LINKER_DEFAULT as well. */ +Index: b/src/gcc/config/darwin.h +=================================================================== +--- a/src/gcc/config/darwin.h ++++ b/src/gcc/config/darwin.h +@@ -921,4 +921,10 @@ extern void darwin_driver_init (unsigned + providing an osx-version-min of this unless overridden by the User. */ + #define DEF_MIN_OSX_VERSION "10.4" + ++#define TARGET_OS_D_BUILTINS() \ ++ do { \ ++ builtin_define ("OSX"); \ ++ builtin_define ("Posix"); \ ++ } while (0) ++ + #endif /* CONFIG_DARWIN_H */ +Index: b/src/gcc/config/freebsd.h +=================================================================== +--- a/src/gcc/config/freebsd.h ++++ b/src/gcc/config/freebsd.h +@@ -32,6 +32,13 @@ along with GCC; see the file COPYING3. + #undef TARGET_OS_CPP_BUILTINS + #define TARGET_OS_CPP_BUILTINS() FBSD_TARGET_OS_CPP_BUILTINS() + ++#undef TARGET_OS_D_BUILTINS ++#define TARGET_OS_D_BUILTINS() \ ++ do { \ ++ builtin_define ("FreeBSD"); \ ++ builtin_define ("Posix"); \ ++ } while (0) ++ + #undef CPP_SPEC + #define CPP_SPEC FBSD_CPP_SPEC + +Index: b/src/gcc/config/gnu.h +=================================================================== +--- a/src/gcc/config/gnu.h ++++ b/src/gcc/config/gnu.h +@@ -39,3 +39,11 @@ along with GCC. If not, see /dev/null 2>&1; then ++ AC_DEFINE(HAVE_GOLD_NON_DEFAULT, 1, ++ [Define if the gold linker is available as a non-default]) ++fi ++ + ORIGINAL_LD_FOR_TARGET=$gcc_cv_ld + AC_SUBST(ORIGINAL_LD_FOR_TARGET) + case "$ORIGINAL_LD_FOR_TARGET" in --- gcc-4.8-4.8.5.orig/debian/patches/goarch-aarch64.diff +++ gcc-4.8-4.8.5/debian/patches/goarch-aarch64.diff @@ -0,0 +1,94 @@ +# DP: Introduce the arm64 goarch. + +Index: b/src/gcc/testsuite/go.test/go-test.exp +=================================================================== +--- a/src/gcc/testsuite/go.test/go-test.exp ++++ b/src/gcc/testsuite/go.test/go-test.exp +@@ -172,6 +172,9 @@ proc go-set-goarch { } { + global target_triplet + + switch -glob $target_triplet { ++ "aarch64*-*-*" { ++ set goarch "arm64" ++ } + "alpha*-*-*" { + set goarch "alpha" + } +Index: b/src/libgo/configure.ac +=================================================================== +--- a/src/libgo/configure.ac ++++ b/src/libgo/configure.ac +@@ -171,6 +171,7 @@ dnl N.B. Keep in sync with gcc/testsuite + is_386=no + is_alpha=no + is_arm=no ++is_arm64=no + is_m68k=no + mips_abi=unknown + is_ppc=no +@@ -184,6 +185,10 @@ case ${host} in + is_alpha=yes + GOARCH=alpha + ;; ++ aarch64-*-*) ++ is_arm64=yes ++ GOARCH=arm64 ++ ;; + arm*-*-* | strongarm*-*-* | ep9312*-*-* | xscale-*-*) + is_arm=yes + GOARCH=arm +@@ -264,6 +269,7 @@ esac + AM_CONDITIONAL(LIBGO_IS_386, test $is_386 = yes) + AM_CONDITIONAL(LIBGO_IS_ALPHA, test $is_alpha = yes) + AM_CONDITIONAL(LIBGO_IS_ARM, test $is_arm = yes) ++AM_CONDITIONAL(LIBGO_IS_ARM64, test $is_arm64 = yes) + AM_CONDITIONAL(LIBGO_IS_M68K, test $is_m68k = yes) + AM_CONDITIONAL(LIBGO_IS_MIPS, test $mips_abi != unknown) + AM_CONDITIONAL(LIBGO_IS_MIPSO32, test $mips_abi = o32) +Index: b/src/libgo/go/go/build/build.go +=================================================================== +--- a/src/libgo/go/go/build/build.go ++++ b/src/libgo/go/go/build/build.go +@@ -1118,6 +1118,8 @@ func ArchChar(goarch string) (string, er + return "6", nil + case "arm": + return "5", nil ++ case "arm64": ++ return "7", nil + } + return "", errors.New("unsupported GOARCH " + goarch) + } +Index: b/src/libgo/go/go/build/deps_test.go +=================================================================== +--- a/src/libgo/go/go/build/deps_test.go ++++ b/src/libgo/go/go/build/deps_test.go +@@ -360,7 +360,7 @@ func allowed(pkg string) map[string]bool + + var bools = []bool{false, true} + var geese = []string{"darwin", "freebsd", "linux", "netbsd", "openbsd", "plan9", "windows"} +-var goarches = []string{"386", "amd64", "arm"} ++var goarches = []string{"386", "amd64", "arm", "arm64"} + + type osPkg struct { + goos, pkg string +Index: b/src/libgo/go/go/build/syslist.go +=================================================================== +--- a/src/libgo/go/go/build/syslist.go ++++ b/src/libgo/go/go/build/syslist.go +@@ -5,4 +5,4 @@ + package build + + const goosList = "darwin dragonfly freebsd linux netbsd openbsd plan9 windows solaris " +-const goarchList = "386 amd64 arm alpha m68k mipso32 mipsn32 mipsn64 mipso64 ppc ppc64 sparc sparc64 " ++const goarchList = "386 amd64 arm arm64 alpha m68k mipso32 mipsn32 mipsn64 mipso64 ppc ppc64 sparc sparc64 " +Index: b/src/libgo/go/runtime/extern.go +=================================================================== +--- a/src/libgo/go/runtime/extern.go ++++ b/src/libgo/go/runtime/extern.go +@@ -170,5 +170,5 @@ func Version() string { + const GOOS string = theGoos + + // GOARCH is the running program's architecture target: +-// 386, amd64, or arm. ++// 386, amd64, arm or arm64. + const GOARCH string = theGoarch --- gcc-4.8-4.8.5.orig/debian/patches/gold-and-ld.diff +++ gcc-4.8-4.8.5/debian/patches/gold-and-ld.diff @@ -0,0 +1,482 @@ +# DP: Enable both gold and ld in a single toolchain. +# DP: New option -fuse-ld=ld.bfd, -fuse-ld=gold. + +--- a/src/gcc/doc/invoke.texi ++++ b/srcgcc/doc/invoke.texi +@@ -399,7 +399,7 @@ + -funit-at-a-time -funroll-all-loops -funroll-loops @gol + -funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops @gol + -fvariable-expansion-in-unroller -fvect-cost-model -fvpt -fweb @gol +--fwhole-program -fwpa -fuse-linker-plugin @gol ++-fwhole-program -fwpa -fuse-ld -fuse-linker-plugin @gol + --param @var{name}=@var{value} + -O -O0 -O1 -O2 -O3 -Os -Ofast} + +@@ -7689,6 +7689,16 @@ + Enabled by default when LTO support in GCC is enabled and GCC was compiled + with linker supporting plugins (GNU ld or @code{gold}). + ++@item -fuse-ld=gold ++Use the @command{gold} linker instead of the default linker. ++This option is only necessary if GCC has been configured with ++@option{--enable-gold} and @option{--enable-ld=default}. ++ ++@item -fuse-ld=bfd ++Use the @command{ld.bfd} linker instead of the default linker. ++This option is only necessary if GCC has been configured with ++@option{--enable-gold} and @option{--enable-ld}. ++ + @item -fcprop-registers + @opindex fcprop-registers + After register allocation and post-register allocation instruction splitting, +--- a/src/gcc/gcc.c ++++ b/srcgcc/gcc.c +@@ -656,6 +656,9 @@ + }"PLUGIN_COND_CLOSE" \ + %{flto|flto=*:%max_errors = value; + break; + ++ case OPT_fuse_ld_: + case OPT_fuse_linker_plugin: +- /* No-op. Used by the driver and passed to us because it starts with f.*/ ++ /* No-op. Used by the driver and passed to us because it starts with f. */ + break; + + default: +--- a/src/gcc/configure.ac ++++ b/srcgcc/configure.ac +@@ -1937,6 +1937,17 @@ + AC_PATH_PROG(gcc_cv_ld, $LD_FOR_TARGET) + fi]) + ++gcc_cv_ld_gold_srcdir=`echo $srcdir | sed -e 's,/gcc$,,'`/gold ++ ++AS_VAR_SET_IF(gcc_cv_gold,, [ ++if test -f $gcc_cv_ld_gold_srcdir/configure.ac \ ++ && test -f ../gold/Makefile \ ++ && test x$build = x$host; then ++ gcc_cv_gold=../gold/ld-new$build_exeext ++else ++ gcc_cv_gold='' ++fi]) ++ + ORIGINAL_PLUGIN_LD_FOR_TARGET=$gcc_cv_ld + PLUGIN_LD=`basename $gcc_cv_ld` + AC_ARG_WITH(plugin-ld, +@@ -1966,6 +1977,9 @@ + *) AC_CONFIG_FILES(collect-ld:exec-tool.in, [chmod +x collect-ld]) ;; + esac + ++ORIGINAL_GOLD_FOR_TARGET=$gcc_cv_gold ++AC_SUBST(ORIGINAL_GOLD_FOR_TARGET) ++ + AC_MSG_CHECKING(what linker to use) + if test "$gcc_cv_ld" = ../ld/ld-new$build_exeext; then + # Single tree build which includes ld. We want to prefer it +--- a/src/gcc/exec-tool.in ++++ b/srcgcc/exec-tool.in +@@ -1,6 +1,6 @@ + #! /bin/sh + +-# Copyright (C) 2007, 2008, 2010 Free Software Foundation, Inc. ++# Copyright (C) 2007, 2008, 2010, 2011 Free Software Foundation, Inc. + # This file is part of GCC. + + # GCC is free software; you can redistribute it and/or modify +@@ -21,11 +21,13 @@ + + ORIGINAL_AS_FOR_TARGET="@ORIGINAL_AS_FOR_TARGET@" + ORIGINAL_LD_FOR_TARGET="@ORIGINAL_LD_FOR_TARGET@" ++ORIGINAL_GOLD_FOR_TARGET="@ORIGINAL_GOLD_FOR_TARGET@" + ORIGINAL_PLUGIN_LD_FOR_TARGET="@ORIGINAL_PLUGIN_LD_FOR_TARGET@" + ORIGINAL_NM_FOR_TARGET="@ORIGINAL_NM_FOR_TARGET@" + exeext=@host_exeext@ + fast_install=@enable_fast_install@ + objdir=@objdir@ ++version="1.1" + + invoked=`basename "$0"` + id=$invoked +@@ -36,15 +38,44 @@ + dir=gas + ;; + collect-ld) +- # when using a linker plugin, gcc will always pass '-plugin' as the +- # first or second option to the linker. +- if test x"$1" = "x-plugin" || test x"$2" = "x-plugin"; then +- original=$ORIGINAL_PLUGIN_LD_FOR_TARGET +- else +- original=$ORIGINAL_LD_FOR_TARGET ++ prog=ld-new$exeext ++ # Look for the a command line option ++ # specifying the linker to be used. ++ case " $* " in ++ *\ -use-gold\ *) ++ original=$ORIGINAL_GOLD_FOR_TARGET ++ dir=gold ++ ;; ++ *\ -use-ld\ * | *\ -use-ld.bfd\ *) ++ original=$ORIGINAL_LD_FOR_TARGET ++ dir=ld ++ ;; ++ *\ -plugin\ *) ++ original=$ORIGINAL_PLUGIN_LD_FOR_TARGET ++ dir=ld ++ ;; ++ *) ++ original=$ORIGINAL_LD_FOR_TARGET ++ dir=ld ++ ;; ++ esac ++ ++ # If the selected linker has not been configured then ++ # try using the others, in the order PLUGIN-LD, LD, GOLD. ++ if test x"$original" = x; then ++ if test x"$ORIGINAL_PLUGIN_LD_FOR_TARGET" != x; then ++ original=$ORIGINAL_PLUGIN_LD_FOR_TARGET ++ dir=ld ++ elif test x"$ORIGINAL_LD_FOR_TARGET" != x; then ++ original=$ORIGINAL_LD_FOR_TARGET ++ dir=ld ++ elif test x"$ORIGINAL_GOLD_FOR_TARGET" != x; then ++ original=$ORIGINAL_GOLD_FOR_TARGET ++ dir=gold ++ # Otherwise do nothing - the case statement below ++ # will issue an error message for us. ++ fi + fi +- prog=ld-new$exeext +- dir=ld + id=ld + ;; + nm) +@@ -61,29 +92,58 @@ + scriptdir=`cd "$tdir" && pwd` + + if test -x $scriptdir/../$dir/$prog; then +- test "$fast_install" = yes || exec $scriptdir/../$dir/$prog ${1+"$@"} ++ if test "$fast_install" = yes; then ++ # If libtool did everything it needs to do, there's a fast path. ++ lt_prog=$scriptdir/../$dir/$objdir/lt-$prog + +- # if libtool did everything it needs to do, there's a fast path +- lt_prog=$scriptdir/../$dir/$objdir/lt-$prog +- test -x $lt_prog && exec $lt_prog ${1+"$@"} +- +- # libtool has not relinked ld-new yet, but we cannot just use the +- # previous stage (because then the relinking would just never happen!). +- # So we take extra care to use prev-ld/ld-new *on recursive calls*. +- eval LT_RCU="\${LT_RCU_$id}" +- test x"$LT_RCU" = x"1" && exec $scriptdir/../prev-$dir/$prog ${1+"$@"} +- +- eval LT_RCU_$id=1 +- export LT_RCU_$id +- $scriptdir/../$dir/$prog ${1+"$@"} +- result=$? +- exit $result +- ++ if test -x $lt_prog; then ++ original=$lt_prog ++ else ++ # Libtool has not relinked ld-new yet, but we cannot just use the ++ # previous stage (because then the relinking would just never happen!). ++ # So we take extra care to use prev-ld/ld-new *on recursive calls*. ++ eval LT_RCU="\${LT_RCU_$id}" ++ if test x"$LT_RCU" = x"1"; then ++ original=$scriptdir/../prev-$dir/$prog ++ else ++ eval LT_RCU_$id=1 ++ export LT_RCU_$id ++ case " $* " in ++ *\ -v\ *) ++ echo "$invoked $version" ++ echo $scriptdir/../$dir/$prog $* ++ ;; ++ esac ++ $scriptdir/../$dir/$prog ${1+"$@"} ++ result=$? ++ exit $result ++ fi ++ fi ++ else ++ original=$scriptdir/../$dir/$prog ++ fi + else +- exec $scriptdir/../prev-$dir/$prog ${1+"$@"} ++ original=$scriptdir/../prev-$dir/$prog + fi + ;; +- *) +- exec $original ${1+"$@"} ++ "") ++ echo "$invoked: executable not configured" ++ exit 1 + ;; + esac ++ ++# If -v has been used then display our version number ++# and then echo the command we are about to invoke. ++case " $* " in ++ *\ -v\ *) ++ echo "$invoked $version" ++ echo $original $* ++ ;; ++esac ++ ++if test -x $original; then ++ exec "$original" ${1+"$@"} ++else ++ echo "$invoked: unable to locate executable: $original" ++ exit 1 ++fi +--- a/src/gcc/common.opt ++++ b/srcgcc/common.opt +@@ -1998,6 +1998,9 @@ + Common Report Var(flag_unwind_tables) Optimization + Just generate unwind tables for exception handling + ++fuse-ld= ++Common Joined Undocumented ++ + fuse-linker-plugin + Common Undocumented + +--- a/src/gcc/collect2.c ++++ b/srcgcc/collect2.c +@@ -1075,17 +1075,19 @@ + int + main (int argc, char **argv) + { +- static const char *const ld_suffix = "ld"; +- static const char *const plugin_ld_suffix = PLUGIN_LD; +- static const char *const real_ld_suffix = "real-ld"; ++ static const char *const ld_suffix = "ld"; ++ static const char *const gold_suffix = "gold"; ++ static const char *const bfd_ld_suffix = "ld.bfd"; ++ static const char *const plugin_ld_suffix = PLUGIN_LD; ++ static const char *const real_ld_suffix = "real-ld"; + static const char *const collect_ld_suffix = "collect-ld"; +- static const char *const nm_suffix = "nm"; +- static const char *const gnm_suffix = "gnm"; ++ static const char *const nm_suffix = "nm"; ++ static const char *const gnm_suffix = "gnm"; + #ifdef LDD_SUFFIX +- static const char *const ldd_suffix = LDD_SUFFIX; ++ static const char *const ldd_suffix = LDD_SUFFIX; + #endif +- static const char *const strip_suffix = "strip"; +- static const char *const gstrip_suffix = "gstrip"; ++ static const char *const strip_suffix = "strip"; ++ static const char *const gstrip_suffix = "gstrip"; + + #ifdef CROSS_DIRECTORY_STRUCTURE + /* If we look for a program in the compiler directories, we just use +@@ -1095,6 +1097,10 @@ + + const char *const full_ld_suffix = + concat(target_machine, "-", ld_suffix, NULL); ++ const char *const full_gold_suffix = ++ concat (target_machine, "-", gold_suffix, NULL); ++ const char *const full_bfd_ld_suffix = ++ concat (target_machine, "-", bfd_ld_suffix, NULL); + const char *const full_plugin_ld_suffix = + concat(target_machine, "-", plugin_ld_suffix, NULL); + const char *const full_nm_suffix = +@@ -1110,15 +1116,17 @@ + const char *const full_gstrip_suffix = + concat (target_machine, "-", gstrip_suffix, NULL); + #else +- const char *const full_ld_suffix = ld_suffix; ++ const char *const full_ld_suffix = ld_suffix; ++ const char *const full_gold_suffix = gold_suffix; ++ const char *const full_bfd_ld_suffix = bfd_ld_suffix; + const char *const full_plugin_ld_suffix = plugin_ld_suffix; +- const char *const full_nm_suffix = nm_suffix; +- const char *const full_gnm_suffix = gnm_suffix; ++ const char *const full_nm_suffix = nm_suffix; ++ const char *const full_gnm_suffix = gnm_suffix; + #ifdef LDD_SUFFIX +- const char *const full_ldd_suffix = ldd_suffix; ++ const char *const full_ldd_suffix = ldd_suffix; + #endif +- const char *const full_strip_suffix = strip_suffix; +- const char *const full_gstrip_suffix = gstrip_suffix; ++ const char *const full_strip_suffix = strip_suffix; ++ const char *const full_gstrip_suffix = gstrip_suffix; + #endif /* CROSS_DIRECTORY_STRUCTURE */ + + const char *arg; +@@ -1132,7 +1140,13 @@ + const char **c_ptr; + char **ld1_argv; + const char **ld1; +- bool use_plugin = false; ++ enum linker_select ++ { ++ DFLT_LINKER, ++ PLUGIN_LINKER, ++ GOLD_LINKER, ++ BFD_LINKER ++ } selected_linker = DFLT_LINKER; + + /* The kinds of symbols we will have to consider when scanning the + outcome of a first pass link. This is ALL to start with, then might +@@ -1209,15 +1223,21 @@ + else if (! strcmp (argv[i], "-flto-partition=none")) + no_partition = true; + else if ((! strncmp (argv[i], "-flto=", 6) +- || ! strcmp (argv[i], "-flto")) && ! use_plugin) ++ || ! strcmp (argv[i], "-flto")) ++ && selected_linker != PLUGIN_LINKER) + lto_mode = LTO_MODE_WHOPR; + else if (!strncmp (argv[i], "-fno-lto", 8)) + lto_mode = LTO_MODE_NONE; + else if (! strcmp (argv[i], "-plugin")) + { +- use_plugin = true; ++ selected_linker = PLUGIN_LINKER; + lto_mode = LTO_MODE_NONE; + } ++ else if (! strcmp (argv[i], "-use-gold")) ++ selected_linker = GOLD_LINKER; ++ else if (! strcmp (argv[i], "-use-ld")) ++ selected_linker = BFD_LINKER; ++ + #ifdef COLLECT_EXPORT_LIST + /* since -brtl, -bexport, -b64 are not position dependent + also check for them here */ +@@ -1299,36 +1319,109 @@ + /* Try to discover a valid linker/nm/strip to use. */ + + /* Maybe we know the right file to use (if not cross). */ +- ld_file_name = 0; ++ ld_file_name = NULL; + #ifdef DEFAULT_LINKER + if (access (DEFAULT_LINKER, X_OK) == 0) + ld_file_name = DEFAULT_LINKER; +- if (ld_file_name == 0) ++ if (ld_file_name == NULL) + #endif + #ifdef REAL_LD_FILE_NAME + ld_file_name = find_a_file (&path, REAL_LD_FILE_NAME); +- if (ld_file_name == 0) ++ if (ld_file_name == NULL) + #endif + /* Search the (target-specific) compiler dirs for ld'. */ + ld_file_name = find_a_file (&cpath, real_ld_suffix); + /* Likewise for `collect-ld'. */ +- if (ld_file_name == 0) ++ if (ld_file_name == NULL) + ld_file_name = find_a_file (&cpath, collect_ld_suffix); + /* Search the compiler directories for `ld'. We have protection against + recursive calls in find_a_file. */ +- if (ld_file_name == 0) +- ld_file_name = find_a_file (&cpath, +- use_plugin +- ? plugin_ld_suffix +- : ld_suffix); ++ if (ld_file_name == NULL) ++ switch (selected_linker) ++ { ++ default: ++ case DFLT_LINKER: ++ ld_file_name = find_a_file (&cpath, ld_suffix); ++ break; ++ case PLUGIN_LINKER: ++ ld_file_name = find_a_file (&cpath, plugin_ld_suffix); ++ break; ++ case GOLD_LINKER: ++ ld_file_name = find_a_file (&cpath, gold_suffix); ++ break; ++ case BFD_LINKER: ++ ld_file_name = find_a_file (&cpath, bfd_ld_suffix); ++ break; ++ } + /* Search the ordinary system bin directories + for `ld' (if native linking) or `TARGET-ld' (if cross). */ +- if (ld_file_name == 0) +- ld_file_name = find_a_file (&path, +- use_plugin +- ? full_plugin_ld_suffix +- : full_ld_suffix); ++ if (ld_file_name == NULL) ++ switch (selected_linker) ++ { ++ default: ++ case DFLT_LINKER: ++ ld_file_name = find_a_file (&path, full_ld_suffix); ++ break; ++ case PLUGIN_LINKER: ++ ld_file_name = find_a_file (&path, full_plugin_ld_suffix); ++ break; ++ case GOLD_LINKER: ++ ld_file_name = find_a_file (&path, full_gold_suffix); ++ break; ++ case BFD_LINKER: ++ ld_file_name = find_a_file (&path, full_bfd_ld_suffix); ++ break; ++ } ++ /* If we failed to find a plugin-capable linker, try the ordinary one. */ ++ if (ld_file_name == NULL && selected_linker == PLUGIN_LINKER) ++ ld_file_name = find_a_file (&cpath, ld_suffix); + ++ if ((vflag || debug) && ld_file_name == NULL) ++ { ++ struct prefix_list * p; ++ const char * s; ++ ++ notice ("collect2: warning: unable to find linker.\n"); ++ ++#ifdef DEFAULT_LINKER ++ notice (" Searched for this absolute executable:\n"); ++ notice (" %s\n", DEFAULT_LINKER); ++#endif ++ ++ notice (" Searched in these paths:\n"); ++ for (p = cpath.plist; p != NULL; p = p->next) ++ notice (" %s\n", p->prefix); ++ notice (" For these executables:\n"); ++ notice (" %s\n", real_ld_suffix); ++ notice (" %s\n", collect_ld_suffix); ++ switch (selected_linker) ++ { ++ default: ++ case DFLT_LINKER: s = ld_suffix; break; ++ case PLUGIN_LINKER: s = plugin_ld_suffix; break; ++ case GOLD_LINKER: s = gold_suffix; break; ++ case BFD_LINKER: s = bfd_ld_suffix; break; ++ } ++ notice (" %s\n", s); ++ ++ notice (" And searched in these paths:\n"); ++ for (p = path.plist; p != NULL; p = p->next) ++ notice (" %s\n", p->prefix); ++ notice (" For these executables:\n"); ++#ifdef REAL_LD_FILE_NAME ++ notice (" %s\n", REAL_LD_FILE_NAME); ++#endif ++ switch (selected_linker) ++ { ++ default: ++ case DFLT_LINKER: s = full_ld_suffix; break; ++ case PLUGIN_LINKER: s = full_plugin_ld_suffix; break; ++ case GOLD_LINKER: s = full_gold_suffix; break; ++ case BFD_LINKER: s = full_bfd_ld_suffix; break; ++ } ++ notice (" %s\n", s); ++ } ++ + #ifdef REAL_NM_FILE_NAME + nm_file_name = find_a_file (&path, REAL_NM_FILE_NAME); + if (nm_file_name == 0) --- gcc-4.8-4.8.5.orig/debian/patches/hurd-boehm-gc.diff +++ gcc-4.8-4.8.5/debian/patches/hurd-boehm-gc.diff @@ -0,0 +1,26 @@ +Index: b/src/boehm-gc/configure.host +=================================================================== +--- a/src/boehm-gc/configure.host ++++ b/src/boehm-gc/configure.host +@@ -41,7 +41,7 @@ else + fi + + case "${host}" in +- *-linux*|*-kfreebsd*-gnu*) ++ *-linux*|*-kfreebsd*-gnu*|*-gnu*) + gc_use_mmap=yes + ;; + esac +Index: b/src/boehm-gc/include/private/gcconfig.h +=================================================================== +--- a/src/boehm-gc/include/private/gcconfig.h ++++ b/src/boehm-gc/include/private/gcconfig.h +@@ -2094,7 +2094,7 @@ + # endif + # endif + +-#if defined(LINUX) && defined(USE_MMAP) ++#if (defined(LINUX) || defined(HURD)) && defined(USE_MMAP) + /* The kernel may do a somewhat better job merging mappings etc. */ + /* with anonymous mappings. */ + # define USE_MMAP_ANON --- gcc-4.8-4.8.5.orig/debian/patches/hurd-changes.diff +++ gcc-4.8-4.8.5/debian/patches/hurd-changes.diff @@ -0,0 +1,20 @@ +# DP: Traditional GNU systems don't have a /usr directory. However, Debian +# DP: systems do, and we support both having a /usr -> . symlink, and having a +# DP: /usr directory like the other ports. So this patch should NOT go +# DP: upstream. + +--- + config.gcc | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/src/gcc/config.gcc (rvision 182461) ++++ b/src/gcc/config.gcc (copie de travail) +@@ -583,7 +583,7 @@ + *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-knetbsd*-gnu | *-*-kopensolaris*-gnu) + :;; + *-*-gnu*) +- native_system_header_dir=/include ++ # native_system_header_dir=/include + ;; + esac + # glibc / uclibc / bionic switch. --- gcc-4.8-4.8.5.orig/debian/patches/isl-0.15.diff +++ gcc-4.8-4.8.5/debian/patches/isl-0.15.diff @@ -0,0 +1,267 @@ +# DP: Build using isl 0.15 and cloog 0.18.4 + +Index: b/src/configure.ac +=================================================================== +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -1637,6 +1637,9 @@ if test "x$with_isl" != "xno" && + ISL_CHECK_VERSION(0,12) + if test "${gcc_cv_isl}" = no ; then + ISL_CHECK_VERSION(0,14) ++ if test "${gcc_cv_isl}" = no ; then ++ ISL_CHECK_VERSION(0,15) ++ fi + fi + fi + fi +Index: b/src/gcc/config.in +=================================================================== +--- a/src/gcc/config.in ++++ b/src/gcc/config.in +@@ -1181,6 +1181,12 @@ + #endif + + ++/* Define if isl_options_set_schedule_serialize_sccs exists. */ ++#ifndef USED_FOR_TARGET ++#undef HAVE_ISL_OPTIONS_SET_SCHEDULE_SERIALIZE_SCCS ++#endif ++ ++ + /* Define if isl_schedule_constraints_compute_schedule exists. */ + #ifndef USED_FOR_TARGET + #undef HAVE_ISL_SCHED_CONSTRAINTS_COMPUTE_SCHEDULE +Index: b/src/gcc/configure.ac +=================================================================== +--- a/src/gcc/configure.ac ++++ b/src/gcc/configure.ac +@@ -5221,6 +5221,8 @@ if test "x${CLOOGLIBS}" != "x" ; then + + # Check whether isl_schedule_constraints_compute_schedule is available; + # it's new in ISL-0.13. ++ # Check whether isl_options_set_schedule_serialize_sccs is available; ++ # it's new in ISL-0.15. + saved_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS $ISLINC" + saved_LIBS="$LIBS" +@@ -5233,6 +5235,13 @@ if test "x${CLOOGLIBS}" != "x" ; then + [ac_has_isl_schedule_constraints_compute_schedule=no]) + AC_MSG_RESULT($ac_has_isl_schedule_constraints_compute_schedule) + ++ AC_MSG_CHECKING([Checking for isl_options_set_schedule_serialize_sccs]) ++ AC_TRY_LINK([#include ], ++ [isl_options_set_schedule_serialize_sccs (NULL, 0);], ++ [ac_has_isl_options_set_schedule_serialize_sccs=yes], ++ [ac_has_isl_options_set_schedule_serialize_sccs=no]) ++ AC_MSG_RESULT($ac_has_isl_options_set_schedule_serialize_sccs) ++ + LIBS="$saved_LIBS" + CFLAGS="$saved_CFLAGS" + +@@ -5240,6 +5249,11 @@ if test "x${CLOOGLIBS}" != "x" ; then + AC_DEFINE(HAVE_ISL_SCHED_CONSTRAINTS_COMPUTE_SCHEDULE, 1, + [Define if isl_schedule_constraints_compute_schedule exists.]) + fi ++ ++ if test x"$ac_has_isl_options_set_schedule_serialize_sccs" = x"yes"; then ++ AC_DEFINE(HAVE_ISL_OPTIONS_SET_SCHEDULE_SERIALIZE_SCCS, 1, ++ [Define if isl_options_set_schedule_serialize_sccs exists.]) ++ fi + fi + + +Index: b/src/gcc/graphite-blocking.c +=================================================================== +--- a/src/gcc/graphite-blocking.c ++++ b/src/gcc/graphite-blocking.c +@@ -24,6 +24,7 @@ along with GCC; see the file COPYING3. + #include "config.h" + + #ifdef HAVE_cloog ++#include + #include + #include + #include +Index: b/src/gcc/graphite-dependences.c +=================================================================== +--- a/src/gcc/graphite-dependences.c ++++ b/src/gcc/graphite-dependences.c +@@ -22,6 +22,7 @@ along with GCC; see the file COPYING3. + #include "config.h" + + #ifdef HAVE_cloog ++#include + #include + #include + #include +@@ -174,7 +175,7 @@ scop_get_transformed_schedule (scop_p sc + /* Helper function used on each MAP of a isl_union_map. Computes the + maximal output dimension. */ + +-static int ++static isl_stat + max_number_of_out_dimensions (__isl_take isl_map *map, void *user) + { + int global_max = *((int *) user); +@@ -186,7 +187,7 @@ max_number_of_out_dimensions (__isl_take + + isl_map_free (map); + isl_space_free (space); +- return 0; ++ return isl_stat_ok; + } + + /* Extends the output dimension of MAP to MAX dimensions. */ +@@ -210,12 +211,12 @@ struct extend_schedule_str { + + /* Helper function for extend_schedule. */ + +-static int ++static isl_stat + extend_schedule_1 (__isl_take isl_map *map, void *user) + { + struct extend_schedule_str *str = (struct extend_schedule_str *) user; + str->umap = isl_union_map_add_map (str->umap, extend_map (map, str->max)); +- return 0; ++ return isl_stat_ok; + } + + /* Return a relation that has uniform output dimensions. */ +@@ -224,16 +225,16 @@ __isl_give isl_union_map * + extend_schedule (__isl_take isl_union_map *x) + { + int max = 0; +- int res; ++ isl_stat res; + struct extend_schedule_str str; + + res = isl_union_map_foreach_map (x, max_number_of_out_dimensions, (void *) &max); +- gcc_assert (res == 0); ++ gcc_assert (res == isl_stat_ok); + + str.max = max; + str.umap = isl_union_map_empty (isl_union_map_get_space (x)); + res = isl_union_map_foreach_map (x, extend_schedule_1, (void *) &str); +- gcc_assert (res == 0); ++ gcc_assert (res == isl_stat_ok); + + isl_union_map_free (x); + return str.umap; +Index: b/src/gcc/graphite-interchange.c +=================================================================== +--- a/src/gcc/graphite-interchange.c ++++ b/src/gcc/graphite-interchange.c +@@ -24,6 +24,7 @@ along with GCC; see the file COPYING3. + #include "config.h" + + #ifdef HAVE_cloog ++#include + #include + #include + #include +Index: b/src/gcc/graphite-optimize-isl.c +=================================================================== +--- a/src/gcc/graphite-optimize-isl.c ++++ b/src/gcc/graphite-optimize-isl.c +@@ -21,7 +21,9 @@ along with GCC; see the file COPYING3. + #include "config.h" + + #ifdef HAVE_cloog ++#include + #include ++#include + #include + #include + #include +@@ -407,13 +409,13 @@ getScheduleMap(isl_schedule *Schedule) + return ScheduleMap; + } + +-static int ++static isl_stat + getSingleMap(__isl_take isl_map *map, void *user) + { + isl_map **singleMap = (isl_map **) user; + *singleMap = map; + +- return 0; ++ return isl_stat_ok; + } + + static void +@@ -460,7 +462,11 @@ optimize_isl (scop_p scop) + + isl_options_set_schedule_max_constant_term(scop->ctx, CONSTANT_BOUND); + isl_options_set_schedule_maximize_band_depth(scop->ctx, 1); ++#ifdef HAVE_ISL_OPTIONS_SET_SCHEDULE_SERIALIZE_SCCS ++ isl_options_set_schedule_serialize_sccs (scop->ctx, 1); ++#else + isl_options_set_schedule_fuse(scop->ctx, ISL_SCHEDULE_FUSE_MIN); ++#endif + isl_options_set_on_error(scop->ctx, ISL_ON_ERROR_CONTINUE); + schedule = isl_union_set_compute_schedule (domain, validity, proximity); + isl_options_set_on_error(scop->ctx, ISL_ON_ERROR_ABORT); +Index: b/src/gcc/graphite-poly.c +=================================================================== +--- a/src/gcc/graphite-poly.c ++++ b/src/gcc/graphite-poly.c +@@ -22,6 +22,7 @@ along with GCC; see the file COPYING3. + #include "config.h" + + #ifdef HAVE_cloog ++#include + #include + #include + #include +Index: b/src/gcc/graphite-poly.h +=================================================================== +--- a/src/gcc/graphite-poly.h ++++ b/src/gcc/graphite-poly.h +@@ -22,6 +22,11 @@ along with GCC; see the file COPYING3. + #ifndef GCC_GRAPHITE_POLY_H + #define GCC_GRAPHITE_POLY_H + ++#ifndef HAVE_ISL_OPTIONS_SET_SCHEDULE_SERIALIZE_SCCS ++# define isl_stat int ++# define isl_stat_ok 0 ++#endif ++ + typedef struct poly_dr *poly_dr_p; + + typedef struct poly_bb *poly_bb_p; +Index: b/src/gcc/graphite-scop-detection.c +=================================================================== +--- a/src/gcc/graphite-scop-detection.c ++++ b/src/gcc/graphite-scop-detection.c +@@ -22,6 +22,7 @@ along with GCC; see the file COPYING3. + #include "config.h" + + #ifdef HAVE_cloog ++#include + #include + #include + #include +Index: b/src/gcc/graphite-sese-to-poly.c +=================================================================== +--- a/src/gcc/graphite-sese-to-poly.c ++++ b/src/gcc/graphite-sese-to-poly.c +@@ -21,6 +21,7 @@ along with GCC; see the file COPYING3. + #include "config.h" + + #ifdef HAVE_cloog ++#include + #include + #include + #include +Index: b/src/gcc/graphite.c +=================================================================== +--- a/src/gcc/graphite.c ++++ b/src/gcc/graphite.c +@@ -35,6 +35,7 @@ along with GCC; see the file COPYING3. + #include "config.h" + + #ifdef HAVE_cloog ++#include + #include + #include + #include --- gcc-4.8-4.8.5.orig/debian/patches/kfreebsd-boehm-gc.diff +++ gcc-4.8-4.8.5/debian/patches/kfreebsd-boehm-gc.diff @@ -0,0 +1,13 @@ +# DP: boehm-gc: use mmap instead of brk also on kfreebsd-*. + +--- a/src/boehm-gc/configure.host ++++ b/src/boehm-gc/configure.host +@@ -41,7 +41,7 @@ + fi + + case "${host}" in +- *-linux*) ++ *-linux*|*-kfreebsd*-gnu*) + gc_use_mmap=yes + ;; + esac --- gcc-4.8-4.8.5.orig/debian/patches/kfreebsd-unwind.diff +++ gcc-4.8-4.8.5/debian/patches/kfreebsd-unwind.diff @@ -0,0 +1,225 @@ +# DP: DWARF2 EH unwinding support for AMD x86-64 and x86 KFreeBSD. + +--- a/src/libgcc/config.host ++++ b/src/libgcc/config.host +@@ -523,7 +523,12 @@ + tmake_file="${tmake_file} i386/t-crtpc i386/t-crtfm i386/t-crtstuff t-dfprules" + md_unwind_header=i386/linux-unwind.h + ;; +-i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i[34567]86-*-gnu* | i[34567]86-*-kopensolaris*-gnu) ++i[34567]86-*-kfreebsd*-gnu) ++ extra_parts="$extra_parts crtprec32.o crtprec64.o crtprec80.o crtfastmath.o" ++ tmake_file="${tmake_file} i386/t-crtpc i386/t-crtfm i386/t-crtstuff t-dfprules" ++ md_unwind_header=i386/freebsd-unwind.h ++ ;; ++i[34567]86-*-knetbsd*-gnu | i[34567]86-*-gnu* | i[34567]86-*-kopensolaris*-gnu) + extra_parts="$extra_parts crtprec32.o crtprec64.o crtprec80.o crtfastmath.o" + tmake_file="${tmake_file} i386/t-crtpc i386/t-crtfm i386/t-crtstuff t-dfprules" + ;; +@@ -532,7 +537,12 @@ + tmake_file="${tmake_file} i386/t-crtpc i386/t-crtfm i386/t-crtstuff t-dfprules" + md_unwind_header=i386/linux-unwind.h + ;; +-x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu) ++x86_64-*-kfreebsd*-gnu) ++ extra_parts="$extra_parts crtprec32.o crtprec64.o crtprec80.o crtfastmath.o" ++ tmake_file="${tmake_file} i386/t-crtpc i386/t-crtfm i386/t-crtstuff t-dfprules" ++ md_unwind_header=i386/freebsd-unwind.h ++ ;; ++x86_64-*-knetbsd*-gnu) + extra_parts="$extra_parts crtprec32.o crtprec64.o crtprec80.o crtfastmath.o" + tmake_file="${tmake_file} i386/t-crtpc i386/t-crtfm i386/t-crtstuff t-dfprules" + ;; +--- a/src/libgcc/config/i386/freebsd-unwind.h ++++ b/src/libgcc/config/i386/freebsd-unwind.h +@@ -0,0 +1,190 @@ ++/* DWARF2 EH unwinding support for AMD x86-64 and x86. ++ Copyright (C) 2004-2013 Free Software Foundation, Inc. ++ ++This file is part of GCC. ++ ++GCC is free software; you can redistribute it and/or modify ++it under the terms of the GNU General Public License as published by ++the Free Software Foundation; either version 3, or (at your option) ++any later version. ++ ++GCC is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++GNU General Public License for more details. ++ ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. ++ ++You should have received a copy of the GNU General Public License and ++a copy of the GCC Runtime Library Exception along with this program; ++see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++. */ ++ ++/* Do code reading to identify a signal frame, and set the frame ++ state data appropriately. See unwind-dw2.c for the structs. ++ Don't use this at all if inhibit_libc is used. */ ++ ++#ifndef inhibit_libc ++ ++#include ++#include ++#include ++ ++#ifdef __x86_64__ ++ ++#define MD_FALLBACK_FRAME_STATE_FOR x86_64_fb_fallback_frame_state ++ ++static _Unwind_Reason_Code ++x86_64_fb_fallback_frame_state (struct _Unwind_Context *context, ++ _Unwind_FrameState *fs) ++{ ++ unsigned int *pc = context->ra; ++ struct sigframe *sf; ++ long new_cfa; ++ ++/* sys/amd64/amd64/sigtramp.S: ++ ++ 48 8d 7c 24 10 lea 0x10(%rsp),%rdi ++ 6a 00 pushq $0x0 ++ 48 c7 c0 a1 01 00 00 mov $0x1a1,%rax ++ 0f 05 syscall ++*/ ++ ++ if ( (pc[0] == 0x247c8d48U) ++ && (pc[1] == 0x48006a10U) ++ && (pc[2] == 0x01a1c0c7U) ++ && (pc[3] == 0x050f0000U)) ++ { ++ sf = (struct sigframe *) context->cfa; ++ } ++ else ++ return _URC_END_OF_STACK; ++ ++ new_cfa = sf->sf_uc.uc_mcontext.mc_rsp; ++ fs->regs.cfa_how = CFA_REG_OFFSET; ++ /* Register 7 is rsp */ ++ fs->regs.cfa_reg = 7; ++ fs->regs.cfa_offset = new_cfa - (long) context->cfa; ++ ++ /* The SVR4 register numbering macros aren't usable in libgcc. */ ++ fs->regs.reg[0].how = REG_SAVED_OFFSET; ++ fs->regs.reg[0].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_rax - new_cfa; ++ fs->regs.reg[1].how = REG_SAVED_OFFSET; ++ fs->regs.reg[1].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_rdx - new_cfa; ++ fs->regs.reg[2].how = REG_SAVED_OFFSET; ++ fs->regs.reg[2].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_rcx - new_cfa; ++ fs->regs.reg[3].how = REG_SAVED_OFFSET; ++ fs->regs.reg[3].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_rbx - new_cfa; ++ fs->regs.reg[4].how = REG_SAVED_OFFSET; ++ fs->regs.reg[4].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_rsi - new_cfa; ++ fs->regs.reg[5].how = REG_SAVED_OFFSET; ++ fs->regs.reg[5].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_rdi - new_cfa; ++ fs->regs.reg[6].how = REG_SAVED_OFFSET; ++ fs->regs.reg[6].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_rbp - new_cfa; ++ fs->regs.reg[8].how = REG_SAVED_OFFSET; ++ fs->regs.reg[8].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_r8 - new_cfa; ++ fs->regs.reg[9].how = REG_SAVED_OFFSET; ++ fs->regs.reg[9].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_r9 - new_cfa; ++ fs->regs.reg[10].how = REG_SAVED_OFFSET; ++ fs->regs.reg[10].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_r10 - new_cfa; ++ fs->regs.reg[11].how = REG_SAVED_OFFSET; ++ fs->regs.reg[11].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_r11 - new_cfa; ++ fs->regs.reg[12].how = REG_SAVED_OFFSET; ++ fs->regs.reg[12].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_r12 - new_cfa; ++ fs->regs.reg[13].how = REG_SAVED_OFFSET; ++ fs->regs.reg[13].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_r13 - new_cfa; ++ fs->regs.reg[14].how = REG_SAVED_OFFSET; ++ fs->regs.reg[14].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_r14 - new_cfa; ++ fs->regs.reg[15].how = REG_SAVED_OFFSET; ++ fs->regs.reg[15].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_r15 - new_cfa; ++ fs->regs.reg[16].how = REG_SAVED_OFFSET; ++ fs->regs.reg[16].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_rip - new_cfa; ++ fs->retaddr_column = 16; ++ fs->signal_frame = 1; ++ return _URC_NO_REASON; ++} ++ ++#else /* ifdef __x86_64__ */ ++ ++#define MD_FALLBACK_FRAME_STATE_FOR x86_fb_fallback_frame_state ++ ++static _Unwind_Reason_Code ++x86_fb_fallback_frame_state (struct _Unwind_Context *context, ++ _Unwind_FrameState *fs) ++{ ++ unsigned int *pc = context->ra; ++ struct sigframe *sf; ++ long new_cfa; ++ ++/* sys/amd64/ia32/ia32_sigtramp.S ++ ++ 8d 44 24 20 lea 0x20(%esp),%eax ++ 50 push %eax ++ b8 a1 01 00 00 mov $0x1a1,%eax ++ 50 push %eax ++ cd 80 int $0x80 ++ eb fe jmp - ++*/ ++ ++/* sys/i386/i386/locore.s: sigcode() ++ ++ 8d 44 24 20 lea 0x20(%esp),%eax ++ 50 push %eax ++ f7 40 54 00 00 02 00 testl $0x20000,0x54(%eax) ++ 75 03 jne + ++ 8e 68 14 mov 0x14(%eax),%gs ++ b8 a1 01 00 00 mov $0x1a1,%eax ++ 50 push %eax ++ cd 80 int $0x80 ++ eb fe jmp - ++*/ ++ ++ if ((pc[0] == 0x2024448dU) ++ && (( ++ (pc[1] == 0x01a1b850U) ++ && (pc[2] == 0xcd500000U) ++ && ((pc[3] & 0xFF) == 0x80) ++ ) ++ ++ || ( ++ (pc[4] == 0x01a1b814U) ++ && (pc[5] == 0xcd500000U) ++ && ((pc[6] & 0xFF) == 0x80) ++ ))) ++ { ++ sf = (struct sigframe *) context->cfa; ++ } ++ else ++ return _URC_END_OF_STACK; ++ ++ new_cfa = sf->sf_uc.uc_mcontext.mc_esp; ++ fs->regs.cfa_how = CFA_REG_OFFSET; ++ fs->regs.cfa_reg = 4; ++ fs->regs.cfa_offset = new_cfa - (long) context->cfa; ++ ++ /* The SVR4 register numbering macros aren't usable in libgcc. */ ++ fs->regs.reg[0].how = REG_SAVED_OFFSET; ++ fs->regs.reg[0].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_eax - new_cfa; ++ fs->regs.reg[3].how = REG_SAVED_OFFSET; ++ fs->regs.reg[3].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_ebx - new_cfa; ++ fs->regs.reg[1].how = REG_SAVED_OFFSET; ++ fs->regs.reg[1].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_ecx - new_cfa; ++ fs->regs.reg[2].how = REG_SAVED_OFFSET; ++ fs->regs.reg[2].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_edx - new_cfa; ++ fs->regs.reg[6].how = REG_SAVED_OFFSET; ++ fs->regs.reg[6].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_esi - new_cfa; ++ fs->regs.reg[7].how = REG_SAVED_OFFSET; ++ fs->regs.reg[7].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_edi - new_cfa; ++ fs->regs.reg[5].how = REG_SAVED_OFFSET; ++ fs->regs.reg[5].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_ebp - new_cfa; ++ fs->regs.reg[8].how = REG_SAVED_OFFSET; ++ fs->regs.reg[8].loc.offset = (long)&sf->sf_uc.uc_mcontext.mc_eip - new_cfa; ++ fs->retaddr_column = 8; ++ fs->signal_frame = 1; ++ return _URC_NO_REASON; ++} ++ ++#endif /* ifdef __x86_64__ */ ++#endif /* ifdef inhibit_libc */ --- gcc-4.8-4.8.5.orig/debian/patches/libffi-m68k.diff +++ gcc-4.8-4.8.5/debian/patches/libffi-m68k.diff @@ -0,0 +1,141 @@ +# DP: Apply #660525 fix to in-tree libffi + +--- a/src/libffi/src/m68k/sysv.S ++++ b/src/libffi/src/m68k/sysv.S +@@ -2,9 +2,10 @@ + + sysv.S - Copyright (c) 2012 Alan Hourihane + Copyright (c) 1998, 2012 Andreas Schwab +- Copyright (c) 2008 Red Hat, Inc. +- +- m68k Foreign Function Interface ++ Copyright (c) 2008 Red Hat, Inc. ++ Copyright (c) 2012 Thorsten Glaser ++ ++ m68k Foreign Function Interface + + Permission is hereby granted, free of charge, to any person obtaining + a copy of this software and associated documentation files (the +@@ -168,8 +169,28 @@ retstruct1: + + retstruct2: + btst #7,%d2 +- jbeq noretval ++ jbeq retsint8 + move.w %d0,(%a1) ++ jbra epilogue ++ ++retsint8: ++ btst #8,%d2 ++ jbeq retsint16 ++ | NOTE: On the mc68000, extb is not supported. 8->16, then 16->32. ++#if !defined(__mc68020__) && !defined(__mc68030__) && !defined(__mc68040__) && !defined(__mc68060__) && !defined(__mcoldfire__) ++ ext.w %d0 ++ ext.l %d0 ++#else ++ extb.l %d0 ++#endif ++ move.l %d0,(%a1) ++ jbra epilogue ++ ++retsint16: ++ btst #9,%d2 ++ jbeq noretval ++ ext.l %d0 ++ move.l %d0,(%a1) + + noretval: + epilogue: +@@ -201,8 +222,10 @@ CALLFUNC(ffi_closure_SYSV): + lsr.l #1,%d0 + jne 1f + jcc .Lcls_epilogue ++ | CIF_FLAGS_INT + move.l -12(%fp),%d0 + .Lcls_epilogue: ++ | no CIF_FLAGS_* + unlk %fp + rts + 1: +@@ -210,6 +233,7 @@ CALLFUNC(ffi_closure_SYSV): + lsr.l #2,%d0 + jne 1f + jcs .Lcls_ret_float ++ | CIF_FLAGS_DINT + move.l (%a0)+,%d0 + move.l (%a0),%d1 + jra .Lcls_epilogue +@@ -224,6 +248,7 @@ CALLFUNC(ffi_closure_SYSV): + lsr.l #2,%d0 + jne 1f + jcs .Lcls_ret_ldouble ++ | CIF_FLAGS_DOUBLE + #if defined(__MC68881__) || defined(__HAVE_68881__) + fmove.d (%a0),%fp0 + #else +@@ -242,17 +267,37 @@ CALLFUNC(ffi_closure_SYSV): + jra .Lcls_epilogue + 1: + lsr.l #2,%d0 +- jne .Lcls_ret_struct2 ++ jne 1f + jcs .Lcls_ret_struct1 ++ | CIF_FLAGS_POINTER + move.l (%a0),%a0 + move.l %a0,%d0 + jra .Lcls_epilogue + .Lcls_ret_struct1: + move.b (%a0),%d0 + jra .Lcls_epilogue +-.Lcls_ret_struct2: ++1: ++ lsr.l #2,%d0 ++ jne 1f ++ jcs .Lcls_ret_sint8 ++ | CIF_FLAGS_STRUCT2 + move.w (%a0),%d0 + jra .Lcls_epilogue ++.Lcls_ret_sint8: ++ move.l (%a0),%d0 ++ | NOTE: On the mc68000, extb is not supported. 8->16, then 16->32. ++#if !defined(__mc68020__) && !defined(__mc68030__) && !defined(__mc68040__) && !defined(__mc68060__) && !defined(__mcoldfire__) ++ ext.w %d0 ++ ext.l %d0 ++#else ++ extb.l %d0 ++#endif ++ jra .Lcls_epilogue ++1: ++ | CIF_FLAGS_SINT16 ++ move.l (%a0),%d0 ++ ext.l %d0 ++ jra .Lcls_epilogue + CFI_ENDPROC() + + .size CALLFUNC(ffi_closure_SYSV),.-CALLFUNC(ffi_closure_SYSV) +--- a/src/libffi/src/m68k/ffi.c ++++ b/src/libffi/src/m68k/ffi.c +@@ -123,6 +123,8 @@ ffi_prep_args (void *stack, extended_cif + #define CIF_FLAGS_POINTER 32 + #define CIF_FLAGS_STRUCT1 64 + #define CIF_FLAGS_STRUCT2 128 ++#define CIF_FLAGS_SINT8 256 ++#define CIF_FLAGS_SINT16 512 + + /* Perform machine dependent cif processing */ + ffi_status +@@ -200,6 +202,14 @@ ffi_prep_cif_machdep (ffi_cif *cif) + cif->flags = CIF_FLAGS_DINT; + break; + ++ case FFI_TYPE_SINT16: ++ cif->flags = CIF_FLAGS_SINT16; ++ break; ++ ++ case FFI_TYPE_SINT8: ++ cif->flags = CIF_FLAGS_SINT8; ++ break; ++ + default: + cif->flags = CIF_FLAGS_INT; + break; --- gcc-4.8-4.8.5.orig/debian/patches/libffi-ro-eh_frame_sect.diff +++ gcc-4.8-4.8.5/debian/patches/libffi-ro-eh_frame_sect.diff @@ -0,0 +1,15 @@ +# DP: PR libffi/47248, force a read only eh frame section. + +Index: b/src/libffi/configure.ac +=================================================================== +--- a/src/libffi/configure.ac ++++ b/src/libffi/configure.ac +@@ -420,6 +420,8 @@ if test "x$GCC" = "xyes"; then + libffi_cv_ro_eh_frame=yes + fi + fi ++ # FIXME: see PR libffi/47248 ++ libffi_cv_ro_eh_frame=yes + rm -f conftest.* + ]) + if test "x$libffi_cv_ro_eh_frame" = xyes; then --- gcc-4.8-4.8.5.orig/debian/patches/libgcc-no-limits-h.diff +++ gcc-4.8-4.8.5/debian/patches/libgcc-no-limits-h.diff @@ -0,0 +1,67 @@ +# DP: Don't include in libgcc/libgcc2.c. + +2013-07-15 Matthias Klose + + * libgcc2.c: Don't include . + +Index: libgcc/libgcc2.c +=================================================================== +--- a/src/libgcc/libgcc2.c (revision 198927) ++++ b/src/libgcc/libgcc2.c (working copy) +@@ -1674,18 +1674,6 @@ + #endif + + #if defined(L_fixunsxfsi) && LIBGCC2_HAS_XF_MODE +-/* Reenable the normal types, in case limits.h needs them. */ +-#undef char +-#undef short +-#undef int +-#undef long +-#undef unsigned +-#undef float +-#undef double +-#undef MIN +-#undef MAX +-#include +- + UWtype + __fixunsxfSI (XFtype a) + { +@@ -1696,18 +1684,6 @@ + #endif + + #if defined(L_fixunsdfsi) && LIBGCC2_HAS_DF_MODE +-/* Reenable the normal types, in case limits.h needs them. */ +-#undef char +-#undef short +-#undef int +-#undef long +-#undef unsigned +-#undef float +-#undef double +-#undef MIN +-#undef MAX +-#include +- + UWtype + __fixunsdfSI (DFtype a) + { +@@ -1718,18 +1694,6 @@ + #endif + + #if defined(L_fixunssfsi) && LIBGCC2_HAS_SF_MODE +-/* Reenable the normal types, in case limits.h needs them. */ +-#undef char +-#undef short +-#undef int +-#undef long +-#undef unsigned +-#undef float +-#undef double +-#undef MIN +-#undef MAX +-#include +- + UWtype + __fixunssfSI (SFtype a) + { --- gcc-4.8-4.8.5.orig/debian/patches/libgo-explicit-reservation.diff +++ gcc-4.8-4.8.5/debian/patches/libgo-explicit-reservation.diff @@ -0,0 +1,150 @@ +# DP: Fix statically linked gccgo binaries on AArch64. + +Index: b/src/libgo/runtime/malloc.goc +=================================================================== +--- a/src/libgo/runtime/malloc.goc ++++ b/src/libgo/runtime/malloc.goc +@@ -339,12 +339,14 @@ runtime_mallocinit(void) + extern byte _end[]; + byte *want; + uintptr limit; ++ bool is_reserved; + + runtime_sizeof_C_MStats = sizeof(MStats); + + p = nil; + arena_size = 0; + bitmap_size = 0; ++ is_reserved = false; + + // for 64-bit build + USED(p); +@@ -389,7 +391,8 @@ runtime_mallocinit(void) + // If this fails we fall back to the 32 bit memory mechanism + arena_size = MaxMem; + bitmap_size = arena_size / (sizeof(void*)*8/4); +- p = runtime_SysReserve((void*)(0x00c0ULL<<32), bitmap_size + arena_size); ++ p = runtime_SysReserve((void*)(0x00c0ULL<<32), bitmap_size + arena_size, false); ++ is_reserved = false; + } + if (p == nil) { + // On a 32-bit machine, we can't typically get away +@@ -428,7 +431,8 @@ runtime_mallocinit(void) + want = (byte*)(((uintptr)_end + (1<<18) + (1<<20) - 1)&~((1<<20)-1)); + if(0xffffffff - (uintptr)want <= bitmap_size + arena_size) + want = 0; +- p = runtime_SysReserve(want, bitmap_size + arena_size); ++ p = runtime_SysReserve(want, bitmap_size + arena_size, true); ++ is_reserved = true; + if(p == nil) + runtime_throw("runtime: cannot reserve arena virtual address space"); + if((uintptr)p & (((uintptr)1<arena_start = p + bitmap_size; + runtime_mheap->arena_used = runtime_mheap->arena_start; + runtime_mheap->arena_end = runtime_mheap->arena_start + arena_size; ++ runtime_mheap->is_reserved = is_reserved; + + // Initialize the rest of the allocator. + runtime_MHeap_Init(runtime_mheap, runtime_SysAlloc); +@@ -462,12 +467,15 @@ runtime_MHeap_SysAlloc(MHeap *h, uintptr + byte *new_end; + uintptr needed; + ++ if (!h->is_reserved) { ++ runtime_throw("runtime: cannot allocate memory"); ++ } + needed = (uintptr)h->arena_used + n - (uintptr)h->arena_end; + // Round wanted arena size to a multiple of 256MB. + needed = (needed + (256<<20) - 1) & ~((256<<20)-1); + new_end = h->arena_end + needed; + if(new_end <= h->arena_start + MaxArena32) { +- p = runtime_SysReserve(h->arena_end, new_end - h->arena_end); ++ p = runtime_SysReserve(h->arena_end, new_end - h->arena_end, true); + if(p == h->arena_end) + h->arena_end = new_end; + } +@@ -475,7 +483,7 @@ runtime_MHeap_SysAlloc(MHeap *h, uintptr + if(n <= (uintptr)(h->arena_end - h->arena_used)) { + // Keep taking from our reservation. + p = h->arena_used; +- runtime_SysMap(p, n); ++ runtime_SysMap(p, n, h->is_reserved); + h->arena_used += n; + runtime_MHeap_MapBits(h); + if(raceenabled) +Index: b/src/libgo/runtime/malloc.h +=================================================================== +--- a/src/libgo/runtime/malloc.h ++++ b/src/libgo/runtime/malloc.h +@@ -177,8 +177,8 @@ struct MLink + void* runtime_SysAlloc(uintptr nbytes); + void runtime_SysFree(void *v, uintptr nbytes); + void runtime_SysUnused(void *v, uintptr nbytes); +-void runtime_SysMap(void *v, uintptr nbytes); +-void* runtime_SysReserve(void *v, uintptr nbytes); ++void runtime_SysMap(void *v, uintptr nbytes, bool do_reserve); ++void* runtime_SysReserve(void *v, uintptr nbytes, bool is_reserved); + + // FixAlloc is a simple free-list allocator for fixed size objects. + // Malloc uses a FixAlloc wrapped around SysAlloc to manages its +@@ -434,6 +434,7 @@ struct MHeap + + FixAlloc spanalloc; // allocator for Span* + FixAlloc cachealloc; // allocator for MCache* ++ bool is_reserved; // is the all the address space for this heap actually reserved by us? + }; + extern MHeap *runtime_mheap; + +Index: b/src/libgo/runtime/mem.c +=================================================================== +--- a/src/libgo/runtime/mem.c ++++ b/src/libgo/runtime/mem.c +@@ -110,7 +110,7 @@ runtime_SysFree(void *v, uintptr n) + } + + void* +-runtime_SysReserve(void *v, uintptr n) ++runtime_SysReserve(void *v, uintptr n, bool do_reserve) + { + int fd = -1; + void *p; +@@ -130,7 +130,7 @@ runtime_SysReserve(void *v, uintptr n) + // much address space. Instead, assume that the reservation is okay + // if we can reserve at least 64K and check the assumption in SysMap. + // Only user-mode Linux (UML) rejects these requests. +- if(sizeof(void*) == 8 && (uintptr)v >= 0xffffffffU) { ++ if(!do_reserve) { + p = mmap_fixed(v, 64<<10, PROT_NONE, MAP_ANON|MAP_PRIVATE, fd, 0); + if (p != v) + return nil; +@@ -149,7 +149,7 @@ runtime_SysReserve(void *v, uintptr n) + } + + void +-runtime_SysMap(void *v, uintptr n) ++runtime_SysMap(void *v, uintptr n, bool is_reserved) + { + void *p; + int fd = -1; +@@ -168,7 +168,7 @@ runtime_SysMap(void *v, uintptr n) + #endif + + // On 64-bit, we don't actually have v reserved, so tread carefully. +- if(sizeof(void*) == 8 && (uintptr)v >= 0xffffffffU) { ++ if(!is_reserved) { + p = mmap_fixed(v, n, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE, fd, 0); + if(p == MAP_FAILED && errno == ENOMEM) + runtime_throw("runtime: out of memory"); +Index: b/src/libgo/runtime/mgc0.c +=================================================================== +--- a/src/libgo/runtime/mgc0.c ++++ b/src/libgo/runtime/mgc0.c +@@ -2479,6 +2479,6 @@ runtime_MHeap_MapBits(MHeap *h) + page_size = getpagesize(); + n = (n+page_size-1) & ~(page_size-1); + +- runtime_SysMap(h->arena_start - n, n - h->bitmap_mapped); ++ runtime_SysMap(h->arena_start - n, n - h->bitmap_mapped, h->is_reserved); + h->bitmap_mapped = n; + } --- gcc-4.8-4.8.5.orig/debian/patches/libgo-revert-timeout-exp.diff +++ gcc-4.8-4.8.5/debian/patches/libgo-revert-timeout-exp.diff @@ -0,0 +1,10 @@ +--- a/src/libgo/testsuite/lib/libgo.exp ++++ b/src/libgo/testsuite/lib/libgo.exp +@@ -43,7 +43,6 @@ + load_gcc_lib target-libpath.exp + load_gcc_lib wrapper.exp + load_gcc_lib gcc-defs.exp +-load_gcc_lib timeout.exp + load_gcc_lib go.exp + + proc libgo_init { args } { --- gcc-4.8-4.8.5.orig/debian/patches/libgo-setcontext-config.diff +++ gcc-4.8-4.8.5/debian/patches/libgo-setcontext-config.diff @@ -0,0 +1,20 @@ +# DP: libgo: Overwrite the setcontext_clobbers_tls check on mips* + +--- a/src/libgo/configure.ac ++++ b/src/libgo/configure.ac +@@ -752,7 +752,15 @@ + CFLAGS="$CFLAGS_hold" + LIBS="$LIBS_hold" + ]) ++dnl overwrite for the mips* 64bit multilibs, fails on some buildds + if test "$libgo_cv_lib_setcontext_clobbers_tls" = "yes"; then ++ case "$target" in ++ mips*-linux-*) ++ AC_MSG_WARN([FIXME: overwrite setcontext_clobbers_tls for $target:$ptr_type_size]) ++ libgo_cv_lib_setcontext_clobbers_tls=no ;; ++ esac ++fi ++if test "$libgo_cv_lib_setcontext_clobbers_tls" = "yes"; then + AC_DEFINE(SETCONTEXT_CLOBBERS_TLS, 1, + [Define if setcontext clobbers TLS variables]) + fi --- gcc-4.8-4.8.5.orig/debian/patches/libgo-testsuite.diff +++ gcc-4.8-4.8.5/debian/patches/libgo-testsuite.diff @@ -0,0 +1,52 @@ +# DP: Only run the libgo testsuite for flags configured in RUNTESTFLAGS + +Index: b/src/libgo/Makefile.am +=================================================================== +--- a/src/libgo/Makefile.am ++++ b/src/libgo/Makefile.am +@@ -1958,6 +1958,12 @@ + export LD_LIBRARY_PATH; \ + $(MKDIR_P) $(@D); \ + rm -f $@-testsum $@-testlog; \ ++ run_check=yes; \ ++ MULTILIBDIR="$(MULTILIBDIR)"; \ ++ case "$$MULTILIBDIR" in /64|/x32) \ ++ echo "$$RUNTESTFLAGS" | grep -q "$${MULTILIBDIR\#/*}" || run_check=; \ ++ esac; \ ++ if test "$$run_check" = "yes"; then \ + if test "$(USE_DEJAGNU)" = "yes"; then \ + $(SHELL) $(srcdir)/testsuite/gotest --dejagnu=yes --basedir=$(srcdir) --srcdir=$(srcdir)/go/$(@D) --pkgpath="$(@D)" --pkgfiles="$(go_$(subst /,_,$(@D))_files)" --testname="$(@D)" --goarch="$(GOARCH)" $(GOTESTFLAGS) $(go_$(subst /,_,$(@D))_test_files); \ + else \ +@@ -1971,6 +1977,7 @@ + echo "FAIL: $(@D)" > $@-testsum; \ + exit 1; \ + fi; \ ++ fi; \ + fi + + # Build all packages before checking any. +Index: b/src/libgo/Makefile.in +=================================================================== +--- a/src/libgo/Makefile.in ++++ b/src/libgo/Makefile.in +@@ -2039,6 +2039,12 @@ + export LD_LIBRARY_PATH; \ + $(MKDIR_P) $(@D); \ + rm -f $@-testsum $@-testlog; \ ++ run_check=yes; \ ++ MULTILIBDIR="$(MULTILIBDIR)"; \ ++ case "$$MULTILIBDIR" in /64|/x32) \ ++ echo "$$RUNTESTFLAGS" | grep -q "$${MULTILIBDIR\#/*}" || run_check=; \ ++ esac; \ ++ if test "$$run_check" = "yes"; then \ + if test "$(USE_DEJAGNU)" = "yes"; then \ + $(SHELL) $(srcdir)/testsuite/gotest --dejagnu=yes --basedir=$(srcdir) --srcdir=$(srcdir)/go/$(@D) --pkgpath="$(@D)" --pkgfiles="$(go_$(subst /,_,$(@D))_files)" --testname="$(@D)" --goarch="$(GOARCH)" $(GOTESTFLAGS) $(go_$(subst /,_,$(@D))_test_files); \ + else \ +@@ -2052,6 +2058,7 @@ + echo "FAIL: $(@D)" > $@-testsum; \ + exit 1; \ + fi; \ ++ fi; \ + fi + + --- gcc-4.8-4.8.5.orig/debian/patches/libgomp-kfreebsd-testsuite.diff +++ gcc-4.8-4.8.5/debian/patches/libgomp-kfreebsd-testsuite.diff @@ -0,0 +1,15 @@ +# DP: Disable lock-2.c test on kfreebsd-* + +--- a/src/libgomp/testsuite/libgomp.c/lock-2.c ++++ b/src/libgomp/testsuite/libgomp.c/lock-2.c +@@ -4,6 +4,9 @@ + int + main (void) + { ++#ifdef __FreeBSD_kernel__ ++ return 1; ++#endif + int l = 0; + omp_nest_lock_t lock; + omp_init_nest_lock (&lock); + --- gcc-4.8-4.8.5.orig/debian/patches/libgomp-omp_h-multilib.diff +++ gcc-4.8-4.8.5/debian/patches/libgomp-omp_h-multilib.diff @@ -0,0 +1,26 @@ +# DP: Fix up omp.h for multilibs. + +2008-06-09 Jakub Jelinek + + * omp.h.in (omp_nest_lock_t): Fix up for Linux multilibs. + +2015-03-25 Matthias Klose + + * omp.h.in (omp_nest_lock_t): Limit the fix Linux. + +--- a/src/libgomp/omp.h.in ++++ b/src/libgomp/omp.h.in +@@ -39,8 +39,13 @@ typedef struct + + typedef struct + { ++#if defined(__linux__) ++ unsigned char _x[8 + sizeof (void *)] ++ __attribute__((__aligned__(sizeof (void *)))); ++#else + unsigned char _x[@OMP_NEST_LOCK_SIZE@] + __attribute__((__aligned__(@OMP_NEST_LOCK_ALIGN@))); ++#endif + } omp_nest_lock_t; + #endif + --- gcc-4.8-4.8.5.orig/debian/patches/libitm-aarch64.diff +++ gcc-4.8-4.8.5/debian/patches/libitm-aarch64.diff @@ -0,0 +1,155 @@ +# DP: Build libitm on AArch64, patch taken from the trunk. +--- /dev/null ++++ b/src/libitm/config/aarch64/sjlj.S +@@ -0,0 +1,93 @@ ++/* Copyright (C) 2014 Free Software Foundation, Inc. ++ Contributed by Richard Henderson . ++ ++ This file is part of the GNU Transactional Memory Library (libitm). ++ ++ Libitm is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ Libitm is distributed in the hope that it will be useful, but WITHOUT ANY ++ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS ++ FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ more details. ++ ++ Under Section 7 of GPL version 3, you are granted additional ++ permissions described in the GCC Runtime Library Exception, version ++ 3.1, as published by the Free Software Foundation. ++ ++ You should have received a copy of the GNU General Public License and ++ a copy of the GCC Runtime Library Exception along with this program; ++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ . */ ++ ++#include "asmcfi.h" ++ ++ .text ++ .align 2 ++ .global _ITM_beginTransaction ++ .type _ITM_beginTransaction, %function ++ ++_ITM_beginTransaction: ++ cfi_startproc ++ mov x1, sp ++ stp x29, x30, [sp, -11*16]! ++ cfi_adjust_cfa_offset(11*16) ++ cfi_rel_offset(x29, 0) ++ cfi_rel_offset(x30, 8) ++ mov x29, sp ++ stp x19, x20, [sp, 1*16] ++ stp x21, x22, [sp, 2*16] ++ stp x23, x24, [sp, 3*16] ++ stp x25, x26, [sp, 4*16] ++ stp x27, x28, [sp, 5*16] ++ stp d8, d9, [sp, 6*16] ++ stp d10, d11, [sp, 7*16] ++ stp d12, d13, [sp, 8*16] ++ stp d14, d15, [sp, 9*16] ++ str x1, [sp, 10*16] ++ ++ /* Invoke GTM_begin_transaction with the struct we just built. */ ++ mov x1, sp ++ bl GTM_begin_transaction ++ ++ /* Return; we don't need to restore any of the call-saved regs. */ ++ ldp x29, x30, [sp] ++ add sp, sp, #11*16 ++ cfi_adjust_cfa_offset(-11*16) ++ cfi_restore(x29) ++ cfi_restore(x30) ++ ret ++ cfi_endproc ++ .size _ITM_beginTransaction, . - _ITM_beginTransaction ++ ++ .align 2 ++ .global GTM_longjmp ++ .hidden GTM_longjmp ++ .type GTM_longjmp, %function ++ ++GTM_longjmp: ++ /* The first parameter becomes the return value (x0). ++ The third parameter is ignored for now. */ ++ cfi_startproc ++ ldp x19, x20, [x1, 1*16] ++ ldp x21, x22, [x1, 2*16] ++ ldp x23, x24, [x1, 3*16] ++ ldp x25, x26, [x1, 4*16] ++ ldp x27, x28, [x1, 5*16] ++ ldp d8, d9, [x1, 6*16] ++ ldp d10, d11, [x1, 7*16] ++ ldp d12, d13, [x1, 8*16] ++ ldp d14, d15, [x1, 9*16] ++ ldr x3, [x1, 10*16] ++ ldp x29, x30, [x1] ++ cfi_def_cfa(x1, 0) ++ mov sp, x3 ++ br x30 ++ cfi_endproc ++ .size GTM_longjmp, . - GTM_longjmp ++ ++#ifdef __linux__ ++.section .note.GNU-stack, "", %progbits ++#endif +--- /dev/null ++++ b/src/libitm/config/aarch64/target.h +@@ -0,0 +1,45 @@ ++/* Copyright (C) 2014 Free Software Foundation, Inc. ++ Contributed by Richard Henderson . ++ ++ This file is part of the GNU Transactional Memory Library (libitm). ++ ++ Libitm is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ Libitm is distributed in the hope that it will be useful, but WITHOUT ANY ++ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS ++ FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ more details. ++ ++ Under Section 7 of GPL version 3, you are granted additional ++ permissions described in the GCC Runtime Library Exception, version ++ 3.1, as published by the Free Software Foundation. ++ ++ You should have received a copy of the GNU General Public License and ++ a copy of the GCC Runtime Library Exception along with this program; ++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ . */ ++ ++namespace GTM HIDDEN { ++ ++typedef struct gtm_jmpbuf ++{ ++ unsigned long long fp; /* x29 */ ++ unsigned long long pc; /* x30 */ ++ unsigned long long gr[10]; /* x19-x28 */ ++ unsigned long long vr[8]; /* d8-d15 */ ++ void *cfa; ++} gtm_jmpbuf; ++ ++/* ??? The size of one line in hardware caches (in bytes). */ ++#define HW_CACHELINE_SIZE 128 ++ ++static inline void ++cpu_relax (void) ++{ ++ __asm volatile ("" : : : "memory"); ++} ++ ++} // namespace GTM +--- a/src/libitm/configure.tgt ++++ b/src/libitm/configure.tgt +@@ -46,6 +46,7 @@ fi + # Map the target cpu to an ARCH sub-directory. At the same time, + # work out any special compilation flags as necessary. + case "${target_cpu}" in ++ aarch64*) ARCH=aarch64 ;; + alpha*) ARCH=alpha ;; + rs6000 | powerpc*) + XCFLAGS="${XCFLAGS} -mhtm" --- gcc-4.8-4.8.5.orig/debian/patches/libjava-armel-unwind.diff +++ gcc-4.8-4.8.5/debian/patches/libjava-armel-unwind.diff @@ -0,0 +1,19 @@ +# DP: On armel, apply kludge to fix unwinder infinitely looping 'til it runs out +# DP: of memory (http://gcc.gnu.org/ml/java/2008-06/msg00010.html). + +--- + libjava/stacktrace.cc | 3 +++ + 1 files changed, 3 insertions(+), 0 deletions(-) + +--- a/src/libjava/stacktrace.cc ++++ b/src/libjava/stacktrace.cc +@@ -115,6 +115,9 @@ _Jv_StackTrace::UnwindTraceFn (struct _Unwind_Context *context, void *state_ptr) + // Check if the trace buffer needs to be extended. + if (pos == state->length) + { ++ // http://gcc.gnu.org/ml/java/2008-06/msg00010.html ++ return _URC_END_OF_STACK; ++ + int newLength = state->length * 2; + void *newFrames = _Jv_AllocBytes (newLength * sizeof(_Jv_StackFrame)); + memcpy (newFrames, state->frames, state->length * sizeof(_Jv_StackFrame)); --- gcc-4.8-4.8.5.orig/debian/patches/libjava-disable-plugin.diff +++ gcc-4.8-4.8.5/debian/patches/libjava-disable-plugin.diff @@ -0,0 +1,15 @@ +# DP: Don't build the gcjwebplugin, even when configured with --enable-plugin + +Index: b/src/libjava/configure.ac +=================================================================== +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -67,6 +67,8 @@ + esac], + [browser_plugin_enabled=no] + ) ++# FIXME: don't build the plugin, this option collides with GCC plugin support ++plugin_enabled=no + + AC_ARG_ENABLE(gconf-peer, + AS_HELP_STRING([--enable-gconf-peer], --- gcc-4.8-4.8.5.orig/debian/patches/libjava-fixed-symlinks.diff +++ gcc-4.8-4.8.5/debian/patches/libjava-fixed-symlinks.diff @@ -0,0 +1,28 @@ +# DP: Remove unneed '..' elements from symlinks in JAVA_HOME + +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -828,7 +828,7 @@ + $(mkinstalldirs) $(DESTDIR)$(SDK_INCLUDE_DIR)/$(OS) + relative() { \ + $(PERL) -e 'use File::Spec; \ +- print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2; \ ++ print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2 | sed -r 's,(bin|lib)[^/]*/\.\./,,'; \ + }; \ + RELATIVE=$$(relative $(DESTDIR)$(bindir) $(DESTDIR)$(SDK_BIN_DIR)); \ + ln -sf $$RELATIVE/`echo gij | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` \ +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -12475,7 +12475,7 @@ + @CREATE_JAVA_HOME_TRUE@ $(mkinstalldirs) $(DESTDIR)$(SDK_INCLUDE_DIR)/$(OS) + @CREATE_JAVA_HOME_TRUE@ relative() { \ + @CREATE_JAVA_HOME_TRUE@ $(PERL) -e 'use File::Spec; \ +-@CREATE_JAVA_HOME_TRUE@ print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2; \ ++@CREATE_JAVA_HOME_TRUE@ print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2 | sed -r 's,(bin|lib)[^/]*/\.\./,,'; \ + @CREATE_JAVA_HOME_TRUE@ }; \ + @CREATE_JAVA_HOME_TRUE@ RELATIVE=$$(relative $(DESTDIR)$(bindir) $(DESTDIR)$(SDK_BIN_DIR)); \ + @CREATE_JAVA_HOME_TRUE@ ln -sf $$RELATIVE/`echo gij | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` \ --- gcc-4.8-4.8.5.orig/debian/patches/libjava-jnipath.diff +++ gcc-4.8-4.8.5/debian/patches/libjava-jnipath.diff @@ -0,0 +1,129 @@ +# DP: - Add /usr/lib/jni and /usr/lib//jni to java.library.path. +# DP: - When running the i386 binaries on amd64, look in +# DP: - /usr/lib32/gcj-x.y and /usr/lib32/jni instead. + +Index: b/src/libjava/configure.ac +=================================================================== +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -1525,6 +1525,9 @@ + + AC_C_BIGENDIAN + ++MULTIARCH_DIR=$(dpkg-architecture -qDEB_HOST_MULTIARCH 2>/dev/null || true) ++AC_SUBST(MULTIARCH_DIR) ++ + ZLIBS= + SYS_ZLIBS= + ZINCS= +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -362,6 +362,7 @@ + $(WARNINGS) \ + -D_GNU_SOURCE \ + -DPREFIX="\"$(prefix)\"" \ ++ -DMULTIARCH_DIR="\"$(MULTIARCH_DIR)\"" \ + -DTOOLEXECLIBDIR="\"$(toolexeclibdir)\"" \ + -DJAVA_HOME="\"$(JAVA_HOME_DIR)\"" \ + -DBOOT_CLASS_PATH="\"$(BOOT_CLASS_PATH_DIR)\"" \ +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -631,6 +631,7 @@ + MAKE = @MAKE@ + MAKEINFO = @MAKEINFO@ + MKDIR_P = @MKDIR_P@ ++MULTIARCH_DIR = @MULTIARCH_DIR@ + NM = nm + NMEDIT = @NMEDIT@ + OBJDUMP = @OBJDUMP@ +@@ -1013,6 +1014,7 @@ + $(WARNINGS) \ + -D_GNU_SOURCE \ + -DPREFIX="\"$(prefix)\"" \ ++ -DMULTIARCH_DIR="\"$(MULTIARCH_DIR)\"" \ + -DTOOLEXECLIBDIR="\"$(toolexeclibdir)\"" \ + -DJAVA_HOME="\"$(JAVA_HOME_DIR)\"" \ + -DBOOT_CLASS_PATH="\"$(BOOT_CLASS_PATH_DIR)\"" \ +Index: b/src/libjava/gnu/classpath/natSystemProperties.cc +=================================================================== +--- a/src/libjava/gnu/classpath/natSystemProperties.cc ++++ b/src/libjava/gnu/classpath/natSystemProperties.cc +@@ -141,6 +141,44 @@ + return retval; + } + ++static char* ++AppendJniLibdir (char *path, struct utsname *u) ++{ ++ char* retval; ++ const char* jnilibdir = "/usr/lib/jni"; ++#ifdef MULTIARCH_DIR ++ const char* jnilibdir2 = "/usr/lib/" MULTIARCH_DIR "/jni"; ++ jsize len2 = strlen (jnilibdir2) + 2; ++#else ++ jsize len2 = 0; ++#endif ++ ++#if defined(__linux__) && defined (__i386__) ++ if (! strcmp ("x86_64", u->machine)) ++ jnilibdir = "/usr/lib32/jni"; ++#endif ++ ++ if (path) ++ { ++ jsize total = strlen (path) ++ + (sizeof (PATH_SEPARATOR) - 1) + strlen (jnilibdir) +len2 + 1; ++ retval = (char*) _Jv_Malloc (total); ++ strcpy (retval, path); ++ strcat (retval, PATH_SEPARATOR); ++ strcat (retval, jnilibdir); ++ } ++ else ++ { ++ retval = (char*) _Jv_Malloc (strlen (jnilibdir) + len2 + 1); ++ strcpy (retval, jnilibdir); ++ } ++#ifdef MULTIARCH_DIR ++ strcat (retval, PATH_SEPARATOR); ++ strcat (retval, jnilibdir2); ++#endif ++ return retval; ++} ++ + void + gnu::classpath::SystemProperties::insertSystemProperties (::java::util::Properties *newprops) + { +@@ -373,8 +411,13 @@ + // Prepend GCJ_VERSIONED_LIBDIR to the module load path so that + // libgcj will find its own JNI libraries, like libgtkpeer.so. + char* val = PrependVersionedLibdir (path); +- _Jv_SetDLLSearchPath (val); ++ ++ // Append jnilibdir ++ char* val2 = AppendJniLibdir (val, &u); ++ ++ _Jv_SetDLLSearchPath (val2); + _Jv_Free (val); ++ _Jv_Free (val2); + } + else + { +@@ -382,9 +425,12 @@ + #ifdef USE_LTDL + char *libpath = getenv (LTDL_SHLIBPATH_VAR); + char* val = _Jv_PrependVersionedLibdir (libpath); +- SET ("java.library.path", val); +- _Jv_SetDLLSearchPath (val); ++ // Append jnilibdir ++ char* val2 = AppendJniLibdir (val, &u); ++ SET ("java.library.path", val2); ++ _Jv_SetDLLSearchPath (val2); + _Jv_Free (val); ++ _Jv_Free (val2); + #else + SET ("java.library.path", ""); + #endif --- gcc-4.8-4.8.5.orig/debian/patches/libjava-multiarch.diff +++ gcc-4.8-4.8.5/debian/patches/libjava-multiarch.diff @@ -0,0 +1,82 @@ +# DP: Install libjava libraries to multiarch location + +Index: b/src/libjava/configure.ac +=================================================================== +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -1585,6 +1585,10 @@ + .) toolexeclibdir=$toolexecmainlibdir ;; # Avoid trailing /. + *) toolexeclibdir=$toolexecmainlibdir/$multi_os_directory ;; + esac ++ multiarch=`$CC -print-multiarch` ++ if test -n "$multiarch"; then ++ toolexeclibdir=$toolexecmainlibdir/$multiarch ++ fi + ;; + esac + AC_SUBST(toolexecdir) +@@ -1610,6 +1614,10 @@ + dbexecdir='$(libdir)/'$multi_os_directory/$gcjsubdir + ;; + esac ++multiarch=`$CC -print-multiarch` ++if test -n "$multiarch"; then ++ dbexecdir='$(libdir)/'$multiarch/$gcjsubdir ++fi + AC_SUBST(dbexecdir) + AC_SUBST(gcjsubdir) + +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -371,7 +371,7 @@ + -DGCJ_VERSIONED_LIBDIR="\"$(dbexecdir)\"" \ + -DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \ + -DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \ +- -DLIBGCJ_DEFAULT_DATABASE="\"$(dbexecdir)/$(db_name)\"" \ ++ -DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-4.8/$(db_name)\"" \ + -DLIBGCJ_DEFAULT_DATABASE_PATH_TAIL="\"$(db_pathtail)\"" + + AM_GCJFLAGS = \ +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -1023,7 +1023,7 @@ + -DGCJ_VERSIONED_LIBDIR="\"$(dbexecdir)\"" \ + -DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \ + -DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \ +- -DLIBGCJ_DEFAULT_DATABASE="\"$(dbexecdir)/$(db_name)\"" \ ++ -DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-4.8/$(db_name)\"" \ + -DLIBGCJ_DEFAULT_DATABASE_PATH_TAIL="\"$(db_pathtail)\"" + + AM_GCJFLAGS = \ +Index: b/src/libjava/classpath/m4/acinclude.m4 +=================================================================== +--- a/src/libjava/classpath/m4/acinclude.m4 ++++ b/src/libjava/classpath/m4/acinclude.m4 +@@ -254,6 +254,10 @@ + .) toolexeclibdir=${libdir} ;; # Avoid trailing /. + *) toolexeclibdir=${libdir}/${multi_os_directory} ;; + esac ++ multiarch=`$CC -print-multiarch` ++ if test -n "$multiarch"; then ++ toolexeclibdir=${libdir}/${multiarch} ++ fi + AC_SUBST(toolexeclibdir) + ]) + +Index: b/src/libjava/classpath/configure.ac +=================================================================== +--- a/src/libjava/classpath/configure.ac ++++ b/src/libjava/classpath/configure.ac +@@ -16,6 +16,8 @@ + + AC_CANONICAL_TARGET + ++dnl dummy change to run autoconf ++ + dnl GCJ LOCAL + AC_ARG_ENABLE(java-maintainer-mode, + AS_HELP_STRING([--enable-java-maintainer-mode], --- gcc-4.8-4.8.5.orig/debian/patches/libjava-nobiarch-check.diff +++ gcc-4.8-4.8.5/debian/patches/libjava-nobiarch-check.diff @@ -0,0 +1,25 @@ +# DP: For biarch builds, disable the testsuite for the non-default architecture +# DP: for runtime libraries, which are not built by default (libjava). + +--- + libjava/testsuite/Makefile.in | 4 +++- + 2 files changed, 25 insertions(+), 1 deletions(-) + +--- a/src/libjava/testsuite/Makefile.in ++++ b/src/libjava/testsuite/Makefile.in +@@ -381,12 +381,14 @@ + + + check-DEJAGNU: site.exp ++ runtestflags="`echo '$(RUNTESTFLAGS)' | sed -r 's/,-m(32|64|x32)//g;s/,-mabi=(n32|64)//g'`"; \ ++ case "$$runtestflags" in *\\{\\}) runtestflags=; esac; \ + srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \ + EXPECT=$(EXPECT); export EXPECT; \ + runtest=$(RUNTEST); \ + if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ + exit_status=0; l='$(DEJATOOL)'; for tool in $$l; do \ +- if $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $(RUNTESTFLAGS); \ ++ if $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $$runtestflags; \ + then :; else exit_status=1; fi; \ + done; \ + else echo "WARNING: could not find \`runtest'" 1>&2; :;\ --- gcc-4.8-4.8.5.orig/debian/patches/libjava-rpath.diff +++ gcc-4.8-4.8.5/debian/patches/libjava-rpath.diff @@ -0,0 +1,29 @@ +# DP: - Link ecjx with -rpath $(dbexecdir) + +--- + libjava/Makefile.am | 2 +- + libjava/Makefile.in | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -888,7 +888,7 @@ else !ENABLE_SHARED + ecjx_LDFLAGS = $(ECJX_BASE_FLAGS) $(ECJ_BUILD_JAR) -fbootclasspath=$(BOOTCLASSPATH) + endif !ENABLE_SHARED + +-ecjx_LDADD = -L$(here)/.libs $(extra_ldflags) ++ecjx_LDADD = -L$(here)/.libs $(extra_ldflags) -rpath $(dbexecdir) + ecjx_DEPENDENCIES = libgcj.la libgcj.spec + if USE_LIBGCJ_BC + ecjx_DEPENDENCIES += libgcj_bc.la +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -8360,7 +8360,7 @@ ECJX_BASE_FLAGS = -findirect-dispatch \ + @NATIVE_FALSE@ecjx_LDFLAGS = $(ECJX_BASE_FLAGS) $(ECJ_BUILD_JAR) + @NATIVE_FALSE@ecjx_LDADD = + @NATIVE_TRUE@ecjx_LDADD = -L$(here)/.libs $(extra_ldflags) \ +-@NATIVE_TRUE@ $(am__append_21) ++@NATIVE_TRUE@ $(am__append_21) -rpath $(dbexecdir) + @NATIVE_FALSE@ecjx_DEPENDENCIES = + @NATIVE_TRUE@ecjx_DEPENDENCIES = libgcj.la libgcj.spec \ + @NATIVE_TRUE@ $(am__append_20) --- gcc-4.8-4.8.5.orig/debian/patches/libjava-sjlj.diff +++ gcc-4.8-4.8.5/debian/patches/libjava-sjlj.diff @@ -0,0 +1,40 @@ +# DP: Don't try to use _Unwind_Backtrace on SJLJ targets. +# DP: See bug #387875, #388505, GCC PR 29206. + +--- + libjava/sysdep/generic/backtrace.h | 17 +++++++++++++++++ + 1 files changed, 17 insertions(+), 0 deletions(-) + +Index: b/src/libjava/sysdep/generic/backtrace.h +=================================================================== +--- a/src/libjava/sysdep/generic/backtrace.h ++++ b/src/libjava/sysdep/generic/backtrace.h +@@ -13,6 +13,20 @@ + + #include + ++#ifdef SJLJ_EXCEPTIONS ++ ++#undef _Unwind_GetIPInfo ++#define _Unwind_GetIPInfo(ctx,ip_before_insn) \ ++ (abort (), (void) (ctx), *ip_before_insn = 1, 0) ++ ++#undef _Unwind_GetRegionStart ++#define _Unwind_GetRegionStart(ctx) \ ++ (abort (), (void) (ctx), 0) ++ ++#undef _Unwind_Backtrace ++#define _Unwind_Backtrace(trace_fn,state_ptr) \ ++ (fallback_backtrace (trace_fn, state_ptr)) ++ + /* Unwind through the call stack calling TRACE_FN with STATE for every stack + frame. Returns the reason why the unwinding was stopped. */ + _Unwind_Reason_Code +@@ -20,4 +34,7 @@ + { + return _URC_NO_REASON; + } ++ ++#endif /* SJLJ_EXCEPTIONS */ ++ + #endif --- gcc-4.8-4.8.5.orig/debian/patches/libjava-stacktrace.diff +++ gcc-4.8-4.8.5/debian/patches/libjava-stacktrace.diff @@ -0,0 +1,50 @@ +# DP: libgcj: Lookup source file name and line number in separated +# DP: debug files found in /usr/lib/debug + +--- + libjava/stacktrace.cc | 27 +++++++++++++++++++++++++++ + 1 files changed, 27 insertions(+), 0 deletions(-) + +--- a/src/libjava/stacktrace.cc ++++ b/src/libjava/stacktrace.cc +@@ -17,6 +17,11 @@ + #include + + #include ++#include ++#include ++#ifdef HAVE_UNISTD_H ++#include ++#endif + + #include + #include +@@ -260,6 +265,28 @@ + finder->lookup (binaryName, (jlong) offset); + *sourceFileName = finder->getSourceFile(); + *lineNum = finder->getLineNum(); ++ if (*lineNum == -1 && info.file_name[0] == '/') ++ { ++ const char *debugPrefix = "/usr/lib/debug"; ++ char *debugPath = (char *) malloc (strlen(debugPrefix) ++ + strlen(info.file_name) ++ + 2); ++ ++ if (debugPath) ++ { ++ strcpy (debugPath, debugPrefix); ++ strcat (debugPath, info.file_name); ++ //printf ("%s: 0x%x\n", debugPath, offset); ++ if (!access (debugPath, R_OK)) ++ { ++ binaryName = JvNewStringUTF (debugPath); ++ finder->lookup (binaryName, (jlong) offset); ++ *sourceFileName = finder->getSourceFile(); ++ *lineNum = finder->getLineNum(); ++ } ++ free (debugPath); ++ } ++ } + if (*lineNum == -1 && NameFinder::showRaw()) + { + gnu::gcj::runtime::StringBuffer *t = --- gcc-4.8-4.8.5.orig/debian/patches/libjava-testsuite.diff +++ gcc-4.8-4.8.5/debian/patches/libjava-testsuite.diff @@ -0,0 +1,6 @@ +# DP: Mark libjava sourcelocation test as failing. PR libjava/55637 + +--- a/src/libjava/testsuite/libjava.lang/sourcelocation.xfail ++++ b/src/libjava/testsuite/libjava.lang/sourcelocation.xfail +@@ -0,0 +1 @@ ++xfail-output --- gcc-4.8-4.8.5.orig/debian/patches/libstdc++-doclink.diff +++ gcc-4.8-4.8.5/debian/patches/libstdc++-doclink.diff @@ -0,0 +1,68 @@ +# DP: adjust hrefs to point to the local documentation + +--- + libstdc++-v3/doc/doxygen/mainpage.html | 10 +++++----- + 1 files changed, 5 insertions(+), 5 deletions(-) + +Index: b/src/libstdc++-v3/doc/doxygen/mainpage.html +=================================================================== +--- a/src/libstdc++-v3/doc/doxygen/mainpage.html ++++ b/src/libstdc++-v3/doc/doxygen/mainpage.html +@@ -27,10 +27,10 @@ +

Generated on @DATE@.

+ +

There are two types of documentation for libstdc++. One is the +- distribution documentation, which can be read online +- here +- or offline from the file doc/html/index.html in the library source +- directory. ++ distribution documentation, which can be read ++ offline in the documentation directory ++ or ++ online. +

+ +

The other type is the source documentation, of which this is the first page. +@@ -81,9 +81,10 @@ + This style guide can also be viewed on the web. + +

License, Copyright, and Other Lawyerly Verbosity

+-

The libstdc++ documentation is released under +- +- these terms. ++

The libstdc++ documentation is released under these terms ++ (read offline or ++ read online. ++ ). +

+

Part of the generated documentation involved comments and notes from + SGI, who says we gotta say this: +Index: b/src/libstdc++-v3/doc/html/api.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/api.html ++++ b/src/libstdc++-v3/doc/html/api.html +@@ -18,6 +18,8 @@ + member functions for the library classes, finding out what is in a + particular include file, looking at inheritance diagrams, etc. +

++The API documentation, rendered into HTML, can be viewed offline. ++

+ The API documentation, rendered into HTML, can be viewed online: +