Ubuntu
berkeley-abc package

berkeley-abc 1.01+20150706hgc3698e0+dfsg-2 source package in Ubuntu

Changelog

berkeley-abc (1.01+20150706hgc3698e0+dfsg-2) unstable; urgency=low

  * debian/man:
    - Added more sensible info in man page
    - Using txt2man to generate man page from .txt file

 -- Ruben Undheim <email address hidden>  Sat, 22 Aug 2015 21:36:28 +0200

Upload details

Uploaded by:
Debian Science Team
Uploaded to:
Sid
Original maintainer:
Debian Science Team
Architectures:
any
Section:
misc
Urgency:
Low Urgency

See full publishing history Publishing

Series Pocket Published Component Section
Xenial release universe misc

Downloads

File Size SHA-256 Checksum
berkeley-abc_1.01+20150706hgc3698e0+dfsg-2.dsc 2.2 KiB 6cb9c94446b057c2430ac8482372684da8adb9175f1946bfa4d23624c73efce7
berkeley-abc_1.01+20150706hgc3698e0+dfsg.orig.tar.gz 4.6 MiB adf46643e20ece269c390d66e91b43999b32d509bbc12ba60f8812e2e9f83c53
berkeley-abc_1.01+20150706hgc3698e0+dfsg-2.debian.tar.xz 7.2 KiB 8facde62b02a081432a07a944696fa9f6ab271c77dae059563baf198aa14a046

No changes file available.

Binary packages built by this source

berkeley-abc: ABC - A System for Sequential Synthesis and Verification

 This is a growing software system for synthesis and verification of binary
 sequential logic circuits appearing in synchronous hardware designs. ABC
 combines scalable logic optimization based on And-Inverter Graphs (AIGs),
 optimal-delay DAG-based technology mapping for look-up tables and standard
 cells, and innovative algorithms for sequential synthesis and verification.
 .
 ABC provides an experimental implementation of these algorithms and a
 programming environment for building similar applications. Future development
 will focus on improving the algorithms and making most of the packages
 stand-alone. This will allow the user to customize ABC for their needs as if
 it were a tool-box rather than a complete tool.

berkeley-abc-dbgsym: debug symbols for package berkeley-abc

 This is a growing software system for synthesis and verification of binary
 sequential logic circuits appearing in synchronous hardware designs. ABC
 combines scalable logic optimization based on And-Inverter Graphs (AIGs),
 optimal-delay DAG-based technology mapping for look-up tables and standard
 cells, and innovative algorithms for sequential synthesis and verification.
 .
 ABC provides an experimental implementation of these algorithms and a
 programming environment for building similar applications. Future development
 will focus on improving the algorithms and making most of the packages
 stand-alone. This will allow the user to customize ABC for their needs as if
 it were a tool-box rather than a complete tool.