intel-microcode 3.20171215.1 source package in Ubuntu


intel-microcode (3.20171215.1) unstable; urgency=high

  * Add supplementary-ucode-CVE-2017-5715.d/: (closes: #886367)
    New upstream microcodes to partially address CVE-2017-5715
    + Updated Microcodes:
      sig 0x000306c3, pf_mask 0x32, 2017-11-20, rev 0x0023, size 23552
      sig 0x000306d4, pf_mask 0xc0, 2017-11-17, rev 0x0028, size 18432
      sig 0x000306f2, pf_mask 0x6f, 2017-11-17, rev 0x003b, size 33792
      sig 0x00040651, pf_mask 0x72, 2017-11-20, rev 0x0021, size 22528
      sig 0x000406e3, pf_mask 0xc0, 2017-11-16, rev 0x00c2, size 99328
      sig 0x000406f1, pf_mask 0xef, 2017-11-18, rev 0xb000025, size 27648
      sig 0x00050654, pf_mask 0xb7, 2017-11-21, rev 0x200003a, size 27648
      sig 0x000506c9, pf_mask 0x03, 2017-11-22, rev 0x002e, size 16384
      sig 0x000806e9, pf_mask 0xc0, 2017-12-03, rev 0x007c, size 98304
      sig 0x000906e9, pf_mask 0x2a, 2017-12-03, rev 0x007c, size 98304
  * Implements IBRS and IBPB support via new MSR (Spectre variant 2
    mitigation, indirect branches).  Support is exposed through cpuid(7).EDX.
  * LFENCE terminates all previous instructions (Spectre variant 2
    mitigation, conditional branches).

 -- Henrique de Moraes Holschuh <email address hidden>  Thu, 04 Jan 2018 23:04:38 -0200

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Henrique de Moraes Holschuh on 2018-01-05
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Henrique de Moraes Holschuh
i386 amd64 x32
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intel-microcode_3.20171215.1.dsc 1.8 KiB 055a7f5f01644d6793c595f6b90875344ee79a0d4ab1078b7a1aec5c358e59d7
intel-microcode_3.20171215.1.tar.xz 2.1 MiB eca8efc0a6dc456a8723204477e229577c1079fa5c1a10b6ba95d11e261ffa4d

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