Binary package “covered” in ubuntu bionic
Verilog code coverage analysis tool
Covered is a Verilog code coverage utility that reads in a Verilog design and
a generated VCD/LXT dumpfile from that design and generates a coverage file
that can be merged with other coverage files or used to create a coverage
report. Covered also contains the GUI coverage report utility that reads in a
coverage file to allow interactive coverage discovery. Areas of coverage
measured by Covered are: line, toggle, memory, combinational logic, FSM
state/
Source package
Published versions
- covered 0.7.10-3 in amd64 (Release)
- covered 0.7.10-3build1 in amd64 (Proposed)
- covered 0.7.10-3build1 in amd64 (Release)
- covered 0.7.10-3 in arm64 (Release)
- covered 0.7.10-3build1 in arm64 (Proposed)
- covered 0.7.10-3build1 in arm64 (Release)
- covered 0.7.10-3 in armhf (Release)
- covered 0.7.10-3build1 in armhf (Proposed)
- covered 0.7.10-3build1 in armhf (Release)
- covered 0.7.10-3 in i386 (Release)
- covered 0.7.10-3build1 in i386 (Proposed)
- covered 0.7.10-3build1 in i386 (Release)
- covered 0.7.10-3 in ppc64el (Release)
- covered 0.7.10-3build1 in ppc64el (Proposed)
- covered 0.7.10-3build1 in ppc64el (Release)
- covered 0.7.10-3 in s390x (Release)
- covered 0.7.10-3build1 in s390x (Proposed)
- covered 0.7.10-3build1 in s390x (Release)