yosys-dbgsym binary package in Ubuntu Xenial arm64
This is a framework for Verilog RTL synthesis. It currently has extensive
Verilog-2005 support and provides a basic set of synthesis algorithms for
various application domains.
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Yosys can be adapted to perform any synthesis job by combining the existing
passes (algorithms) using synthesis scripts and adding additional passes as
needed by extending the yosys C++ code base.
Publishing history
| Date | Status | Target | Component | Section | Priority | Phased updates | Version | ||
|---|---|---|---|---|---|---|---|---|---|
| 2016-02-08 01:39:26 UTC | Published | Ubuntu Xenial arm64 | release | universe | electronics | Optional | 0.5.0+20151013gitf13e387-1 | ||
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| Deleted | Ubuntu Xenial arm64 | proposed | universe | electronics | Optional | 0.5.0+20151013gitf13e387-1 | |||
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