Workcraft 3.0.7

Milestone information

Project:
Workcraft
Series:
trunk
Version:
3.0.7
Released:
2016-01-04  
Registrant:
Danil Sokolov
Release registered:
2016-01-04
Active:
No. Drivers cannot target bugs and blueprints to this milestone.  

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Activities

Assigned to you:
No blueprints or bugs assigned to you.
Assignees:
1 Bowen Li, 20 Danil Sokolov
Blueprints:
1 Good progress, 3 Implemented
Bugs:
17 Fix Committed

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File Description Downloads
download icon workcraft_3.0.7.zip (md5) Distribution of Workcraft 3.0.7 for Windows 10
last downloaded 19 weeks ago
download icon workcraft_3.0.7.tar.gz (md5) Distribution of Workcraft 3.0.7 for Linux 11
last downloaded 19 weeks ago
Total downloads: 21

Release notes 

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Changelog 

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4 blueprints and 17 bugs targeted

Blueprint Priority Assignee Delivery
Translate gate and pin names on Verilog export Translate gate and pin names on Verilog export 4 High Danil Sokolov  11 Implemented
structural property checking for Alter-SON structural property checking for Alter-SON 3 Medium Bowen Li  7 Good progress
Help pages Help pages 3 Medium Danil Sokolov  11 Implemented
Integrate xMAS verification Integrate xMAS verification 3 Medium Danil Sokolov  11 Implemented
Bug report Importance Assignee Status
1525159 #1525159 Bugs in conformation check 3 High Danil Sokolov  9 Fix Committed
1513019 #1513019 On Verilog import the initial state of signals in not read in Windows 4 Medium Danil Sokolov  9 Fix Committed
1518631 #1518631 Incorrect parent of self-loop net in automatically generated circuits 4 Medium Danil Sokolov  9 Fix Committed
1525232 #1525232 Space in work name upsets Petrify 4 Medium Danil Sokolov  9 Fix Committed
1527245 #1527245 Command line too long in Windows 4 Medium Danil Sokolov  9 Fix Committed
1529416 #1529416 Incorect handling the circuit environment files in Windows 4 Medium Danil Sokolov  9 Fix Committed
1530480 #1530480 Circuit conformation does not work for the environment containing internal signals 4 Medium Danil Sokolov  9 Fix Committed
1530714 #1530714 Extra arguments before the built-in arguments may cause problems 4 Medium Danil Sokolov  9 Fix Committed
1525284 #1525284 Places of Petri net/STG generated from FSM/FST have wrong position 5 Low Danil Sokolov  9 Fix Committed
1529290 #1529290 Convert dual arcs to read arcs on import of .g files 5 Low Danil Sokolov  9 Fix Committed
1529303 #1529303 Net synthesis from Petri Net and FSM results in STG 5 Low Danil Sokolov  9 Fix Committed
1530887 #1530887 Combined verification of several STG properties 5 Low Danil Sokolov  9 Fix Committed
1515204 #1515204 Fit to screen on opening 6 Wishlist Danil Sokolov  9 Fix Committed
1515221 #1515221 Implicit place tokens underneath the arcs 6 Wishlist Danil Sokolov  9 Fix Committed
1516611 #1516611 Pass a work file as a parameter 6 Wishlist Danil Sokolov  9 Fix Committed
1516937 #1516937 Empty verification trace is confusing for an inexperienced user 6 Wishlist Danil Sokolov  9 Fix Committed
1519305 #1519305 Converter from Petri Net to Policy Net model is missing 6 Wishlist Danil Sokolov  9 Fix Committed
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